[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/psr: Print PSR_STATUS when PSR idle wait times out.
== Series Details == Series: series starting with [1/2] drm/i915/psr: Print PSR_STATUS when PSR idle wait times out. URL : https://patchwork.freedesktop.org/series/47978/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4639_full -> Patchwork_9917_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9917_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9917_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9917_full: === IGT changes === Warnings igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size: shard-hsw: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_9917_full that come from known issues: === IGT changes === Possible fixes igt@kms_flip@modeset-vs-vblank-race-interruptible: shard-hsw: DMESG-WARN (fdo#102614) -> PASS igt@perf@buffer-fill: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@perf@polling: shard-hsw: FAIL (fdo#102252) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4639 -> Patchwork_9917 CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9917: 8373ea76fc7c3089fc6725873e501a44de28b278 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9917/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: account for context save/restore removed bits
== Series Details == Series: drm/i915/icl: account for context save/restore removed bits URL : https://patchwork.freedesktop.org/series/47976/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4639_full -> Patchwork_9916_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9916_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9916_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9916_full: === IGT changes === Warnings igt@kms_plane_lowres@pipe-a-tiling-none: shard-snb: PASS -> SKIP +1 == Known issues == Here are the changes found in Patchwork_9916_full that come from known issues: === IGT changes === Issues hit igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) Possible fixes igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_flip@modeset-vs-vblank-race-interruptible: shard-hsw: DMESG-WARN (fdo#102614) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS igt@perf@buffer-fill: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@perf@polling: shard-hsw: FAIL (fdo#102252) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4639 -> Patchwork_9916 CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9916: aedbfda6c022a2cb8c60e0dea12956f7d956ddad @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9916/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/psr: Print PSR_STATUS when PSR idle wait times out.
== Series Details ==
Series: series starting with [1/2] drm/i915/psr: Print PSR_STATUS when PSR idle
wait times out.
URL : https://patchwork.freedesktop.org/series/47978/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9917 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47978/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9917:
=== IGT changes ===
Warnings
{igt@kms_psr@cursor_plane_move}:
fi-cnl-psr: DMESG-FAIL (fdo#107372) -> FAIL
== Known issues ==
Here are the changes found in Patchwork_9917 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_module_reload@basic-reload-inject:
fi-hsw-4770r: PASS -> DMESG-WARN (fdo#107425)
igt@drv_selftest@live_coherency:
fi-gdg-551: NOTRUN -> DMESG-FAIL (fdo#107164)
igt@drv_selftest@live_hangcheck:
fi-kbl-7560u: PASS -> DMESG-FAIL (fdo#106947, fdo#106560)
igt@drv_selftest@live_workarounds:
fi-cnl-psr: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: DMESG-FAIL (fdo#107292) -> PASS
{fi-bsw-kefka}: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-FAIL (fdo#107372) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
fdo#107425 https://bugs.freedesktop.org/show_bug.cgi?id=107425
== Participating hosts (53 -> 47) ==
Additional (1): fi-gdg-551
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-icl-u
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9917
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9917: 8373ea76fc7c3089fc6725873e501a44de28b278 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8373ea76fc7c drm/i915/psr: Remove wait_for_idle() for PSR2
b79c05c167d6 drm/i915/psr: Print PSR_STATUS when PSR idle wait times out.
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9917/issues.html
___
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[Intel-gfx] [PATCH 1/2] drm/i915/psr: Print PSR_STATUS when PSR idle wait times out.
Knowing the status of the PSR HW state machine is useful for debug,
especially since we are seeing errors with PSR2 in CI.
Cc: José Roberto de Souza
Cc: Rodrigo Vivi
Signed-off-by: Dhinakaran Pandiyan
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_drv.h| 3 ++-
drivers/gpu/drm/i915/intel_psr.c| 9 ++---
drivers/gpu/drm/i915/intel_sprite.c | 6 --
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0601abb8c71f..6ee0d056229d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1944,7 +1944,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool debug);
void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir);
void intel_psr_short_pulse(struct intel_dp *intel_dp);
-int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state);
+int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state,
+ u32 *out_value);
/* intel_runtime_pm.c */
int intel_power_domains_init(struct drm_i915_private *);
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 4bd5768731ee..5686ddaa6a72 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -717,7 +717,8 @@ void intel_psr_disable(struct intel_dp *intel_dp,
cancel_work_sync(_priv->psr.work);
}
-int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state)
+int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state,
+ u32 *out_value)
{
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -750,8 +751,10 @@ int intel_psr_wait_for_idle(const struct intel_crtc_state
*new_crtc_state)
* 6 ms of exit training time + 1.5 ms of aux channel
* handshake. 50 msec is defesive enough to cover everything.
*/
- return intel_wait_for_register(dev_priv, reg, mask,
- EDP_PSR_STATUS_STATE_IDLE, 50);
+
+ return __intel_wait_for_register(dev_priv, reg, mask,
+EDP_PSR_STATUS_STATE_IDLE, 2, 50,
+out_value);
}
static bool __psr_wait_for_idle_locked(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
index f7026e887fa9..774bfb03c5d9 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -83,6 +83,7 @@ void intel_pipe_update_start(const struct intel_crtc_state
*new_crtc_state)
bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) ||
IS_CHERRYVIEW(dev_priv)) &&
intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
DEFINE_WAIT(wait);
+ u32 psr_status;
vblank_start = adjusted_mode->crtc_vblank_start;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
@@ -104,8 +105,9 @@ void intel_pipe_update_start(const struct intel_crtc_state
*new_crtc_state)
* VBL interrupts will start the PSR exit and prevent a PSR
* re-entry as well.
*/
- if (intel_psr_wait_for_idle(new_crtc_state))
- DRM_ERROR("PSR idle timed out, atomic update may fail\n");
+ if (intel_psr_wait_for_idle(new_crtc_state, _status))
+ DRM_ERROR("PSR idle timed out 0x%x, atomic update may fail\n",
+ psr_status);
local_irq_disable();
--
2.17.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915/psr: Remove wait_for_idle() for PSR2
CI runs show PSR2 does not go to IDLE with selective update enabled on
all PSR exit triggers. Specifically, logs indicate the hardware enters
"SLEEP Selective Update" and not "IDLE Reset state' like the kernel
expects. This check was added for PSR1 but incorrectly extended to PSR2,
remove this check for PSR2 as there is a plan to test only PSR1 on PSR2
panels.
Also add bspec reference to the comment about idle timeout.
Cc: Tarun Vyas
Cc: José Roberto de Souza
Cc: Rodrigo Vivi
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_psr.c | 39
1 file changed, 14 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 5686ddaa6a72..09be9bfee2be 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -722,37 +722,26 @@ int intel_psr_wait_for_idle(const struct intel_crtc_state
*new_crtc_state,
{
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- i915_reg_t reg;
- u32 mask;
-
- if (!new_crtc_state->has_psr)
- return 0;
/*
-* The sole user right now is intel_pipe_update_start(),
-* which won't race with psr_enable/disable, which is
-* where psr2_enabled is written to. So, we don't need
-* to acquire the psr.lock. More importantly, we want the
-* latency inside intel_pipe_update_start() to be as low
-* as possible, so no need to acquire psr.lock when it is
-* not needed and will induce latencies in the atomic
-* update path.
+* The sole user right now is intel_pipe_update_start(), which won't
+* race with psr_enable/disable where psr2_enabled is written to. So, we
+* don't need to acquire the psr.lock. More importantly, we want the
+* latency inside intel_pipe_update_start() to be as low as possible, so
+* no need to acquire psr.lock when it is not needed and will induce
+* latencies in the atomic update path.
*/
- if (dev_priv->psr.psr2_enabled) {
- reg = EDP_PSR2_STATUS;
- mask = EDP_PSR2_STATUS_STATE_MASK;
- } else {
- reg = EDP_PSR_STATUS;
- mask = EDP_PSR_STATUS_STATE_MASK;
- }
+ if (!new_crtc_state->has_psr || READ_ONCE(dev_priv->psr.psr2_enabled))
+ return 0;
/*
-* Max time for PSR to idle = Inverse of the refresh rate +
-* 6 ms of exit training time + 1.5 ms of aux channel
-* handshake. 50 msec is defesive enough to cover everything.
+* From Bspec Panel Self Refresh (BDW+):
+* Max. time for PSR to idle = inverse of the refresh rate + 6 ms of
+* exit training time + 1.5 ms of aux channel handshake. 50 ms is
+* defensive enough to cover everything.
*/
-
- return __intel_wait_for_register(dev_priv, reg, mask,
+ return __intel_wait_for_register(dev_priv, EDP_PSR_STATUS,
+EDP_PSR_STATUS_STATE_MASK,
EDP_PSR_STATUS_STATE_IDLE, 2, 50,
out_value);
}
--
2.17.1
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: account for context save/restore removed bits
== Series Details ==
Series: drm/i915/icl: account for context save/restore removed bits
URL : https://patchwork.freedesktop.org/series/47976/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9916 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47976/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9916 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_coherency:
fi-gdg-551: NOTRUN -> DMESG-FAIL (fdo#107164)
igt@drv_selftest@live_hangcheck:
fi-kbl-7560u: PASS -> DMESG-FAIL (fdo#106560, fdo#106947)
fi-skl-6600u: PASS -> DMESG-FAIL (fdo#106560, fdo#107174)
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (53 -> 47) ==
Additional (1): fi-gdg-551
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-glk-dsi
fi-bsw-cyan fi-ctg-p8600 fi-icl-u
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9916
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9916: aedbfda6c022a2cb8c60e0dea12956f7d956ddad @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
aedbfda6c022 drm/i915/icl: account for context save/restore removed bits
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9916/issues.html
___
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Re: [Intel-gfx] [RFC/CI] drm/i915/icl: account for context save/restore removed bits
Quoting Paulo Zanoni (2018-08-10 00:58:52)
> The RS_CTX_ENABLE and CTX_SAVE_INHIBIT bits are not present on ICL
> anymore, but we still try to set them and then check them with
> GEM_BUG_ON, resulting in a BUG() call. The bug can be reproduced by
> igt/drv_selftest/live_hangcheck/others-priority and our CI was able
> to catch it. The machine hangs, which prevents further testing on it.
Non-sequitur. Capture the bug report, move on after the panic. How does
that prevent testing? What you might note is that CI's pstore is
reporting -EIO, that is what has prevented remote debugging of this.
> It is worth noticing that commit 05f0addd9b10 ("drm/i915/icl: Enhanced
> execution list support") already tried to avoid the save/restore bits
> on ICL, but only inside populate_lr_context().
>
> TODO: Should we also avoid CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT on ICL
> for execlists_init_reg_state()? We already avoid it inside
> populate_lr_context().
RESTORE_INHIBIT is still very much required. It's just the SAVE_INHIBIT
that they removed for whimsy.
> TODO: Shouldn't a new problem surface when we remove these registers?
> What should we do to replace the functionality that was provided by
> them?
Shed a tear. Resource Streamer doesn't exist and would require userspace
support for it anyway. The SAVE_INHIBIT is the one that shaves a few
cycles on preemption, but is supposed to be replaced by a bit in ELSQ at
the expense of forking process_csb/preemption. No one has demonstrated
that the cost would be worth it.
-Chris
___
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[Intel-gfx] [RFC/CI] drm/i915/icl: account for context save/restore removed bits
The RS_CTX_ENABLE and CTX_SAVE_INHIBIT bits are not present on ICL
anymore, but we still try to set them and then check them with
GEM_BUG_ON, resulting in a BUG() call. The bug can be reproduced by
igt/drv_selftest/live_hangcheck/others-priority and our CI was able
to catch it. The machine hangs, which prevents further testing on it.
It is worth noticing that commit 05f0addd9b10 ("drm/i915/icl: Enhanced
execution list support") already tried to avoid the save/restore bits
on ICL, but only inside populate_lr_context().
TODO: Should we also avoid CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT on ICL
for execlists_init_reg_state()? We already avoid it inside
populate_lr_context().
TODO: Shouldn't a new problem surface when we remove these registers?
What should we do to replace the functionality that was provided by
them?
Cc: Chris Wilson
Cc: Mika Kuoppala
Testcase: igt/drv_selftest/live_hangcheck/others-priority
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107399
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_lrc.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
As you may notice from the TODO comments, my GEM-fu is still not
strong yet. Any help on the pending questions would be really
appreciated.
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e5385dbfcdda..bcd0a1758f13 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -541,7 +541,8 @@ static void inject_preempt_context(struct intel_engine_cs
*engine)
GEM_BUG_ON(execlists->preempt_complete_status !=
upper_32_bits(ce->lrc_desc));
- GEM_BUG_ON((ce->lrc_reg_state[CTX_CONTEXT_CONTROL + 1] &
+ GEM_BUG_ON(INTEL_GEN(engine->i915) < 11 &&
+ (ce->lrc_reg_state[CTX_CONTEXT_CONTROL + 1] &
_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT)) !=
_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
@@ -2569,6 +2570,7 @@ static void execlists_init_reg_state(u32 *regs,
struct drm_i915_private *dev_priv = engine->i915;
struct i915_hw_ppgtt *ppgtt = ctx->ppgtt ?: dev_priv->mm.aliasing_ppgtt;
u32 base = engine->mmio_base;
+ u32 ctx_sr_ctl;
bool rcs = engine->class == RENDER_CLASS;
/* A context is actually a big batch buffer with several
@@ -2581,10 +2583,12 @@ static void execlists_init_reg_state(u32 *regs,
regs[CTX_LRI_HEADER_0] = MI_LOAD_REGISTER_IMM(rcs ? 14 : 11) |
MI_LRI_FORCE_POSTED;
+ ctx_sr_ctl = CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT;
+ if (INTEL_GEN(dev_priv) < 11)
+ ctx_sr_ctl |= CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
+ CTX_CTRL_RS_CTX_ENABLE;
CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
- _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
- CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
- CTX_CTRL_RS_CTX_ENABLE) |
+ _MASKED_BIT_DISABLE(ctx_sr_ctl) |
_MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
--
2.14.4
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Add PSR mode/revision to debugfs (rev2)
== Series Details == Series: drm/i915/psr: Add PSR mode/revision to debugfs (rev2) URL : https://patchwork.freedesktop.org/series/47902/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4639_full -> Patchwork_9915_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_9915_full that come from known issues: === IGT changes === Issues hit igt@kms_vblank@pipe-b-ts-continuation-suspend: shard-hsw: PASS -> FAIL (fdo#104894) Possible fixes igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_flip@modeset-vs-vblank-race-interruptible: shard-hsw: DMESG-WARN (fdo#102614) -> PASS igt@perf@buffer-fill: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@perf@polling: shard-hsw: FAIL (fdo#102252) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104894 https://bugs.freedesktop.org/show_bug.cgi?id=104894 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4639 -> Patchwork_9915 CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9915: 4087a669caa386d1c9ad87e592962b2e27e39657 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9915/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Add PSR mode/revision to debugfs (rev2)
== Series Details ==
Series: drm/i915/psr: Add PSR mode/revision to debugfs (rev2)
URL : https://patchwork.freedesktop.org/series/47902/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9915 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47902/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_9915 that come from known issues:
=== IGT changes ===
Issues hit
{igt@amdgpu/amd_basic@userptr}:
{fi-kbl-8809g}: PASS -> INCOMPLETE (fdo#107402)
igt@debugfs_test@read_all_entries:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
igt@drv_selftest@live_coherency:
fi-gdg-551: NOTRUN -> DMESG-FAIL (fdo#107164)
igt@drv_selftest@live_hangcheck:
fi-kbl-7567u: PASS -> DMESG-FAIL (fdo#106560, fdo#106947)
igt@drv_selftest@live_workarounds:
fi-whl-u: PASS -> DMESG-FAIL (fdo#107292)
igt@gem_exec_suspend@basic-s4-devices:
fi-kbl-7500u: PASS -> DMESG-WARN (fdo#105128, fdo#107139)
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: DMESG-FAIL (fdo#107292) -> PASS
{fi-bsw-kefka}: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-FAIL (fdo#107372) -> DMESG-WARN (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107139 https://bugs.freedesktop.org/show_bug.cgi?id=107139
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
fdo#107402 https://bugs.freedesktop.org/show_bug.cgi?id=107402
== Participating hosts (53 -> 48) ==
Additional (1): fi-gdg-551
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-ctg-p8600 fi-icl-u
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9915
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9915: 4087a669caa386d1c9ad87e592962b2e27e39657 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4087a669caa3 drm/i915/psr: Add PSR mode/revision to debugfs
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9915/issues.html
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[Intel-gfx] [PATCH v2] drm/i915/psr: Add PSR mode/revision to debugfs
Log the PSR mode/revision (PSR1 or PSR2) in the debugfs file i915_edp_psr_status. Suggested-by: Dhinakaran Pandiyan Signed-off-by: Azhar Shaikh Reviewed-by: Dhinakaran Pandiyan --- Changes in v2: - Fix checkpatch warning. - Add Reviewed-by: from v1 drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index f9ce35da4123..a0dc603387eb 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2708,6 +2708,8 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) intel_runtime_pm_get(dev_priv); mutex_lock(_priv->psr.lock); + seq_printf(m, "PSR mode: %s\n", + dev_priv->psr.psr2_enabled ? "PSR2" : "PSR1"); seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv->psr.enabled)); seq_printf(m, "Busy frontbuffer bits: 0x%03x\n", dev_priv->psr.busy_frontbuffer_bits); -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/psr: Add PSR mode/revision to debugfs
On Wed, 2018-08-08 at 12:16 -0700, Azhar Shaikh wrote: > Log the PSR mode/revision (PSR1 or PSR2) in the debugfs file This is not the revision. > i915_edp_psr_status. > > Suggested-by: Dhinakaran Pandiyan > Signed-off-by: Azhar Shaikh > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index f9ce35da4123..d6e3830fc513 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2708,6 +2708,8 @@ static int i915_edp_psr_status(struct seq_file > *m, void *data) > intel_runtime_pm_get(dev_priv); > > mutex_lock(_priv->psr.lock); > + seq_printf(m, "PSR mode: %s\n", > +dev_priv->psr.psr2_enabled ? "PSR2" : > "PSR1"); ^With alignment fixed, Reviewed-by: Dhinakaran Pandiyan > seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv- > >psr.enabled)); > seq_printf(m, "Busy frontbuffer bits: 0x%03x\n", > dev_priv->psr.busy_frontbuffer_bits); ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 02/20] drm/i915: Set PCH as NOP when display is disabled
On Thu, 2018-08-09 at 09:36 +0100, Chris Wilson wrote: > Quoting José Roberto de Souza (2018-08-09 01:15:48) > > num_pipes is set to 0 if disable_display is set inside > > intel_device_info_runtime_init() but when that happen PCH will > > already be set in intel_detect_pch(). > > One major thing missed is that if you disable the displays via > modparam, > you need to reap all the BIOS enabled displays and stolen memory that > conflict with our usage. (We ignore the conflict so that means the > BIOS > can write into memory we are using elsewhere.) The same bug exists > for > outputs we don't recover from the BIOS, which is a regression from > circa 3.2. I have a working in progress patch on top of this ones that complete power down all power wells, fixing this issue but for now you are right. > -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 02/20] drm/i915: Set PCH as NOP when display is disabled
On Thu, 2018-08-09 at 11:16 +0300, Jani Nikula wrote:
> On Wed, 08 Aug 2018, José Roberto de Souza
> wrote:
> > num_pipes is set to 0 if disable_display is set inside
> > intel_device_info_runtime_init() but when that happen PCH will
> > already be set in intel_detect_pch().
> >
> > i915_driver_load()
> > i915_driver_init_early()
> > ...
> > intel_detect_pch()
> > ...
> > ...
> > i915_driver_init_hw()
> > intel_device_info_runtime_init()
> >
> > So now setting num_pipes = 0 earlier to avoid this problem.
>
> Okay, this gets confusing. There are other paths in
> intel_device_info_runtime_init() that set num_pipes = 0 and depend on
> PCH having been detected. :(
>
> >
> > Cc: Jani Nikula
> > Signed-off-by: José Roberto de Souza
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 5 +
> > drivers/gpu/drm/i915/intel_device_info.c | 8 ++--
> > 2 files changed, 7 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c
> > b/drivers/gpu/drm/i915/i915_drv.c
> > index 9dce55182c3a..7952f5877402 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -917,6 +917,11 @@ static int i915_driver_init_early(struct
> > drm_i915_private *dev_priv,
> > if (ret < 0)
> > goto err_workqueues;
> >
> > + if (i915_modparams.disable_display) {
> > + DRM_INFO("Display disabled (module parameter)\n");
> > + device_info->num_pipes = 0;
> > + }
> > +
>
> Please look at the function as a whole, and note that this feels like
> a
> random thing to add in the middle. Needs to be stowed away somewhere
> deeper.
I can move it to right after:
/* Setup the write-once "constant" device info */
device_info = mkwrite_device_info(dev_priv);
memcpy(device_info, match_info, sizeof(*device_info));
device_info->device_id = dev_priv->drm.pdev->device;
>
> Overall, I think we need to be more accurate about the relationship
> of
> num_pipes = 0 and PCH_NOP.
The path in intel_device_info_runtime_init() that now sets num_pipes =
0 is when the display(I guess it is the whole GPU) is fused off so user
can't use it at all.
The other path changing num_pipes is one for IVB there is disables the
last pipe.
I guess with this changes we have a good relationship between num_pipes
and PCH_NOP or do you have another suggestion.
>
>
> BR,
> Jani.
>
> > /* This must be called before any calls to HAS_PCH_* */
> > intel_detect_pch(dev_priv);
> >
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> > b/drivers/gpu/drm/i915/intel_device_info.c
> > index 0ef0c6448d53..67102b481c8f 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.c
> > +++ b/drivers/gpu/drm/i915/intel_device_info.c
> > @@ -776,12 +776,8 @@ void intel_device_info_runtime_init(struct
> > intel_device_info *info)
> > info->num_sprites[pipe] = 1;
> > }
> >
> > - if (i915_modparams.disable_display) {
> > - DRM_INFO("Display disabled (module parameter)\n");
> > - info->num_pipes = 0;
> > - } else if (info->num_pipes > 0 &&
> > - (IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) &&
> > - HAS_PCH_SPLIT(dev_priv)) {
> > + if (info->num_pipes > 0 && (IS_GEN7(dev_priv) ||
> > IS_GEN8(dev_priv)) &&
> > + HAS_PCH_SPLIT(dev_priv)) {
> > u32 fuse_strap = I915_READ(FUSE_STRAP);
> > u32 sfuse_strap = I915_READ(SFUSE_STRAP);
>
>
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Avoid kicking priority on the current context (rev4)
== Series Details == Series: drm/i915/execlists: Avoid kicking priority on the current context (rev4) URL : https://patchwork.freedesktop.org/series/47951/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4639_full -> Patchwork_9914_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_9914_full that come from known issues: === IGT changes === Issues hit igt@gem_render_copy_redux@interruptible: shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#106650) igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) Possible fixes igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_flip@modeset-vs-vblank-race-interruptible: shard-hsw: DMESG-WARN (fdo#102614) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: shard-kbl: INCOMPLETE (fdo#103665) -> PASS +1 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#106650 https://bugs.freedesktop.org/show_bug.cgi?id=106650 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4639 -> Patchwork_9914 CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9914: 6e8f4cfda77f5f77181914ab23681b58a9774822 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9914/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Avoid kicking priority on the current context (rev3)
== Series Details == Series: drm/i915/execlists: Avoid kicking priority on the current context (rev3) URL : https://patchwork.freedesktop.org/series/47951/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4639_full -> Patchwork_9913_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_9913_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_await@wide-contexts: shard-glk: PASS -> FAIL (fdo#105900) igt@kms_flip@flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363) Possible fixes igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_flip@modeset-vs-vblank-race-interruptible: shard-hsw: DMESG-WARN (fdo#102614) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: shard-kbl: INCOMPLETE (fdo#103665) -> PASS +1 igt@perf@polling: shard-hsw: FAIL (fdo#102252) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4639 -> Patchwork_9913 CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9913: a87c45d32994aa91bd85730f70f49579d410b953 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9913/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Avoid kicking priority on the current context (rev4)
== Series Details ==
Series: drm/i915/execlists: Avoid kicking priority on the current context (rev4)
URL : https://patchwork.freedesktop.org/series/47951/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9914 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47951/revisions/4/mbox/
== Known issues ==
Here are the changes found in Patchwork_9914 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_workarounds:
fi-kbl-x1275: PASS -> DMESG-FAIL (fdo#107292)
igt@gem_exec_suspend@basic-s4-devices:
fi-kbl-7500u: PASS -> DMESG-WARN (fdo#105128, fdo#107139)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
{fi-byt-clapper}: PASS -> FAIL (fdo#107362, fdo#103191)
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: DMESG-FAIL (fdo#107292) -> PASS
{fi-bsw-kefka}: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-FAIL (fdo#107372) -> DMESG-WARN (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128
fdo#107139 https://bugs.freedesktop.org/show_bug.cgi?id=107139
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (53 -> 49) ==
Additional (1): fi-gdg-551
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9914
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9914: 6e8f4cfda77f5f77181914ab23681b58a9774822 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6e8f4cfda77f drm/i915/execlists: Avoid kicking priority on the current context
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9914/issues.html
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: kill intel_display_power_well_is_enabled()
Em Qui, 2018-08-09 às 08:29 +0200, Michal Wajdeczko escreveu: > On Thu, 09 Aug 2018 00:58:53 +0200, Paulo Zanoni > wrote: > > > Em Qua, 2018-08-08 às 22:22 +, Patchwork escreveu: > > > == Series Details == > > > > > > Series: series starting with [1/4] drm/i915: kill > > > intel_display_power_well_is_enabled() > > > URL : https://patchwork.freedesktop.org/series/47908/ > > > State : warning > > > > > > == Summary == > > > > > > $ dim checkpatch origin/drm-tip > > > 94cddb6f9752 drm/i915: kill intel_display_power_well_is_enabled() > > > dfb09a8944b0 drm/i915: BUG() if we can't lookup_power_well() > > > -:31: WARNING:AVOID_BUG: Avoid crashing the kernel - try using > > > WARN_ON & recovery code rather than BUG() or BUG_ON() > > > #31: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:1124: > > > + BUG(); > > > > See the commit message of patch 2, Mr. Robot. I don't think it's > > worth > > adding checking code in the callers, and replacing the current null > > pointer dereference with a BUG() is an improvement IMHO. > > > > If anybody disagrees with this, please say so. > > other option could be to use WARN_ON to make Mr. Robot happy and > then return first/last/default power well to make callers happy Yeah, that's probably an improvement. I'll submit a new version. Thanks! > > /michal ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Avoid kicking priority on the current context (rev4)
== Series Details ==
Series: drm/i915/execlists: Avoid kicking priority on the current context (rev4)
URL : https://patchwork.freedesktop.org/series/47951/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6e8f4cfda77f drm/i915/execlists: Avoid kicking priority on the current context
-:49: ERROR:SPACING: space prohibited after that open parenthesis '('
#49: FILE: drivers/gpu/drm/i915/intel_guc_submission.c:767:
+ if ( __guc_dequeue(engine))
total: 1 errors, 0 warnings, 0 checks, 103 lines checked
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3] drm/i915/execlists: Avoid kicking priority on the current context
If the request is currently on the HW (in port 0), then we do not need
to kick the submission tasklet to evaluate whether we should be
preempting itself in order to execute it again.
In the case that was annoying me:
execlists_schedule: rq(18:211173).prio=0 -> 2
need_preempt: last(18:211174).prio=0, queue.prio=2
We are bumping the priority of the first of a pair of requests running
in the current context. Then when evaluating preempt, we would see that
that our priority request is higher than the last executing request in
ELSP0 and so trigger preemption, not realising that our intended request
was already executing.
v2: As we assume state of the execlists->port[] that is only valid while
we hold the timeline lock we have to repeat some earlier tests that on
the validity of the node.
v3: Wrap guc submission under the timeline.lock as is now the way of all
things.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_guc_submission.c | 18 +++--
drivers/gpu/drm/i915/intel_lrc.c| 41 +++--
2 files changed, 36 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 195adbd0ebf7..2f0d5155b1bb 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -764,19 +764,8 @@ static bool __guc_dequeue(struct intel_engine_cs *engine)
static void guc_dequeue(struct intel_engine_cs *engine)
{
- unsigned long flags;
- bool submit;
-
- local_irq_save(flags);
-
- spin_lock(>timeline.lock);
- submit = __guc_dequeue(engine);
- spin_unlock(>timeline.lock);
-
- if (submit)
+ if ( __guc_dequeue(engine))
guc_submit(engine);
-
- local_irq_restore(flags);
}
static void guc_submission_tasklet(unsigned long data)
@@ -785,6 +774,9 @@ static void guc_submission_tasklet(unsigned long data)
struct intel_engine_execlists * const execlists = >execlists;
struct execlist_port *port = execlists->port;
struct i915_request *rq;
+ unsigned long flags;
+
+ spin_lock_irqsave(>timeline.lock, flags);
rq = port_request(port);
while (rq && i915_request_completed(rq)) {
@@ -808,6 +800,8 @@ static void guc_submission_tasklet(unsigned long data)
if (!execlists_is_active(execlists, EXECLISTS_ACTIVE_PREEMPT))
guc_dequeue(engine);
+
+ spin_unlock_irqrestore(>timeline.lock, flags);
}
static struct i915_request *
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e5385dbfcdda..1bbf7490a089 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -355,13 +355,8 @@ execlists_unwind_incomplete_requests(struct
intel_engine_execlists *execlists)
{
struct intel_engine_cs *engine =
container_of(execlists, typeof(*engine), execlists);
- unsigned long flags;
-
- spin_lock_irqsave(>timeline.lock, flags);
__unwind_incomplete_requests(engine);
-
- spin_unlock_irqrestore(>timeline.lock, flags);
}
static inline void
@@ -1238,9 +1233,13 @@ static void execlists_schedule(struct i915_request
*request,
engine = sched_lock_engine(node, engine);
+ /* Recheck after acquiring the engine->timeline.lock */
if (prio <= node->attr.priority)
continue;
+ if (i915_sched_node_signaled(node))
+ continue;
+
node->attr.priority = prio;
if (!list_empty(>link)) {
if (last != engine) {
@@ -1249,14 +1248,34 @@ static void execlists_schedule(struct i915_request
*request,
}
GEM_BUG_ON(pl->priority != prio);
list_move_tail(>link, >requests);
+ } else {
+ /*
+* If the request is not in the priolist queue because
+* it is not yet runnable, then it doesn't contribute
+* to our preemption decisions. On the other hand,
+* if the request is on the HW, it too is not in the
+* queue; but in that case we may still need to reorder
+* the inflight requests.
+*/
+ if
(!i915_sw_fence_done(_to_request(node)->submit))
+ continue;
}
- if (prio > engine->execlists.queue_priority &&
- i915_sw_fence_done(_to_request(node)->submit)) {
- /* defer submission until after all of our updates */
- __update_queue(engine, prio);
- tasklet_hi_schedule(>execlists.tasklet);
- }
+ if (prio <=
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Avoid kicking priority on the current context (rev3)
== Series Details ==
Series: drm/i915/execlists: Avoid kicking priority on the current context (rev3)
URL : https://patchwork.freedesktop.org/series/47951/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9913 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47951/revisions/3/mbox/
== Known issues ==
Here are the changes found in Patchwork_9913 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_coherency:
fi-gdg-551: NOTRUN -> DMESG-FAIL (fdo#107164)
igt@drv_selftest@live_hangcheck:
fi-cfl-guc: PASS -> INCOMPLETE (fdo#106693)
fi-skl-guc: PASS -> INCOMPLETE (fdo#107207, fdo#106693)
fi-kbl-guc: PASS -> INCOMPLETE (fdo#107207, fdo#106693)
fi-skl-6260u: PASS -> DMESG-FAIL (fdo#107174, fdo#106560)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-ivb-3520m: PASS -> FAIL (fdo#103375) +2
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@drv_selftest@live_workarounds:
{fi-bsw-kefka}: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107207 https://bugs.freedesktop.org/show_bug.cgi?id=107207
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (53 -> 49) ==
Additional (1): fi-gdg-551
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9913
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9913: a87c45d32994aa91bd85730f70f49579d410b953 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
a87c45d32994 drm/i915/execlists: Avoid kicking priority on the current context
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9913/issues.html
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v6,1/2] drm/i915: Allow control of PSR at runtime through debugfs, v6 (rev2)
== Series Details == Series: series starting with [v6,1/2] drm/i915: Allow control of PSR at runtime through debugfs, v6 (rev2) URL : https://patchwork.freedesktop.org/series/47888/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4639_full -> Patchwork_9911_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_9911_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9911_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9911_full: === IGT changes === Possible regressions igt@gem_eio@reset-stress: shard-apl: PASS -> FAIL == Known issues == Here are the changes found in Patchwork_9911_full that come from known issues: === IGT changes === Issues hit igt@gem_eio@wait-wedge-immediate: shard-glk: PASS -> FAIL (fdo#105957) igt@gem_exec_await@wide-contexts: shard-apl: PASS -> FAIL (fdo#106680, fdo#105900) igt@kms_atomic_transition@plane-all-modeset-transition-fencing: shard-hsw: PASS -> DMESG-WARN (fdo#102614) igt@kms_cursor_crc@cursor-64x64-suspend: shard-kbl: PASS -> DMESG-WARN (fdo#103313) igt@kms_flip@flip-vs-expired-vblank: shard-apl: PASS -> FAIL (fdo#105363, fdo#102887) igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) Possible fixes igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_flip@modeset-vs-vblank-race-interruptible: shard-hsw: DMESG-WARN (fdo#102614) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: shard-kbl: INCOMPLETE (fdo#103665) -> PASS +1 igt@perf@polling: shard-hsw: FAIL (fdo#102252) -> PASS fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900 fdo#105957 https://bugs.freedesktop.org/show_bug.cgi?id=105957 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4639 -> Patchwork_9911 CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9911: 3a302bbbaa65dc1cdc489809173533b7b0db834f @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9911/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3] drm/i915/execlists: Avoid kicking priority on the current context
If the request is currently on the HW (in port 0), then we do not need
to kick the submission tasklet to evaluate whether we should be
preempting itself in order to execute it again.
In the case that was annoying me:
execlists_schedule: rq(18:211173).prio=0 -> 2
need_preempt: last(18:211174).prio=0, queue.prio=2
We are bumping the priority of the first of a pair of requests running
in the current context. Then when evaluating preempt, we would see that
that our priority request is higher than the last executing request in
ELSP0 and so trigger preemption, not realising that our intended request
was already executing.
v2: As we assume state of the execlists->port[] that is only valid while
we hold the timeline lock we have to repeat some earlier tests that on
the validity of the node.
v3: Wrap guc submission under the timeline.lock as is now the way of all
things.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_guc_submission.c | 3 ++
drivers/gpu/drm/i915/intel_lrc.c| 36 +
2 files changed, 33 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 195adbd0ebf7..aa539c9c653d 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -785,7 +785,9 @@ static void guc_submission_tasklet(unsigned long data)
struct intel_engine_execlists * const execlists = >execlists;
struct execlist_port *port = execlists->port;
struct i915_request *rq;
+ unsigned long flags;
+ spin_lock_irqsave(>timeline.lock, flags);
rq = port_request(port);
while (rq && i915_request_completed(rq)) {
trace_i915_request_out(rq);
@@ -800,6 +802,7 @@ static void guc_submission_tasklet(unsigned long data)
rq = NULL;
}
}
+ spin_unlock_irqrestore(>timeline.lock, flags);
if (execlists_is_active(execlists, EXECLISTS_ACTIVE_PREEMPT) &&
intel_read_status_page(engine, I915_GEM_HWS_PREEMPT_INDEX) ==
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e5385dbfcdda..2257bc7b167f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1238,9 +1238,13 @@ static void execlists_schedule(struct i915_request
*request,
engine = sched_lock_engine(node, engine);
+ /* Recheck after acquiring the engine->timeline.lock */
if (prio <= node->attr.priority)
continue;
+ if (i915_sched_node_signaled(node))
+ continue;
+
node->attr.priority = prio;
if (!list_empty(>link)) {
if (last != engine) {
@@ -1249,14 +1253,34 @@ static void execlists_schedule(struct i915_request
*request,
}
GEM_BUG_ON(pl->priority != prio);
list_move_tail(>link, >requests);
+ } else {
+ /*
+* If the request is not in the priolist queue because
+* it is not yet runnable, then it doesn't contribute
+* to our preemption decisions. On the other hand,
+* if the request is on the HW, it too is not in the
+* queue; but in that case we may still need to reorder
+* the inflight requests.
+*/
+ if
(!i915_sw_fence_done(_to_request(node)->submit))
+ continue;
}
- if (prio > engine->execlists.queue_priority &&
- i915_sw_fence_done(_to_request(node)->submit)) {
- /* defer submission until after all of our updates */
- __update_queue(engine, prio);
- tasklet_hi_schedule(>execlists.tasklet);
- }
+ if (prio <= engine->execlists.queue_priority)
+ continue;
+
+ /*
+* If we are already the currently executing context, don't
+* bother evaluating if we should preempt ourselves.
+*/
+ if (sched_to_request(node)->global_seqno &&
+
i915_seqno_passed(port_request(engine->execlists.port)->global_seqno,
+ sched_to_request(node)->global_seqno))
+ continue;
+
+ /* Defer (tasklet) submission until after all of our updates. */
+ __update_queue(engine, prio);
+ tasklet_hi_schedule(>execlists.tasklet);
}
spin_unlock_irq(>timeline.lock);
--
2.18.0
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Avoid kicking priority on the current context (rev2)
== Series Details ==
Series: drm/i915/execlists: Avoid kicking priority on the current context (rev2)
URL : https://patchwork.freedesktop.org/series/47951/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9912 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47951/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_9912 that come from known issues:
=== IGT changes ===
Issues hit
{igt@amdgpu/amd_basic@userptr}:
{fi-kbl-8809g}: PASS -> INCOMPLETE (fdo#107402)
igt@drv_selftest@live_hangcheck:
fi-cfl-guc: PASS -> INCOMPLETE (fdo#106693)
fi-skl-guc: PASS -> INCOMPLETE (fdo#107207, fdo#106693)
fi-kbl-guc: PASS -> INCOMPLETE (fdo#107207, fdo#106693)
igt@drv_selftest@live_workarounds:
fi-cfl-8700k: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: DMESG-FAIL (fdo#107292) -> PASS
{fi-bsw-kefka}: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-FAIL (fdo#107372) -> DMESG-WARN (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693
fdo#107207 https://bugs.freedesktop.org/show_bug.cgi?id=107207
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
fdo#107402 https://bugs.freedesktop.org/show_bug.cgi?id=107402
== Participating hosts (53 -> 49) ==
Additional (1): fi-gdg-551
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9912
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9912: c44fb325ab1397499a4e34fad29594192139ae6a @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c44fb325ab13 drm/i915/execlists: Avoid kicking priority on the current context
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9912/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v6,1/2] drm/i915: Allow control of PSR at runtime through debugfs, v6 (rev2)
== Series Details ==
Series: series starting with [v6,1/2] drm/i915: Allow control of PSR at runtime
through debugfs, v6 (rev2)
URL : https://patchwork.freedesktop.org/series/47888/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9911 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47888/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_9911 that come from known issues:
=== IGT changes ===
Issues hit
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
{fi-byt-clapper}: PASS -> FAIL (fdo#107362, fdo#103191)
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372)
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: DMESG-FAIL (fdo#107292) -> PASS
{fi-bsw-kefka}: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-FAIL (fdo#107372) -> DMESG-WARN (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (53 -> 48) ==
Additional (1): fi-gdg-551
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9911
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9911: 3a302bbbaa65dc1cdc489809173533b7b0db834f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
3a302bbbaa65 drm/i915/psr: Add debugfs support to force a downgrade to PSR1
mode.
f12e3f989693 drm/i915: Allow control of PSR at runtime through debugfs, v6
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9911/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v6,1/2] drm/i915: Allow control of PSR at runtime through debugfs, v6 (rev2)
== Series Details == Series: series starting with [v6,1/2] drm/i915: Allow control of PSR at runtime through debugfs, v6 (rev2) URL : https://patchwork.freedesktop.org/series/47888/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Allow control of PSR at runtime through debugfs, v6 -drivers/gpu/drm/i915/selftests/../i915_drv.h:3675:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3683:16: warning: expression using sizeof(void) Commit: drm/i915/psr: Add debugfs support to force a downgrade to PSR1 mode. -drivers/gpu/drm/i915/selftests/../i915_drv.h:3683:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3684:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,1/2] drm/i915: Allow control of PSR at runtime through debugfs, v6 (rev2)
== Series Details ==
Series: series starting with [v6,1/2] drm/i915: Allow control of PSR at runtime
through debugfs, v6 (rev2)
URL : https://patchwork.freedesktop.org/series/47888/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f12e3f989693 drm/i915: Allow control of PSR at runtime through debugfs, v6
-:25: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#25:
- Add prepared bool, which should be used instead of relying on psr.dp. (dhnkrn)
-:352: CHECK:BRACES: braces {} should be used on all arms of this statement
#352: FILE: drivers/gpu/drm/i915/intel_psr.c:848:
+ if (crtc) {
[...]
+ } else
[...]
-:358: CHECK:BRACES: Unbalanced braces around else statement
#358: FILE: drivers/gpu/drm/i915/intel_psr.c:854:
+ } else
total: 0 errors, 1 warnings, 2 checks, 334 lines checked
3a302bbbaa65 drm/i915/psr: Add debugfs support to force a downgrade to PSR1
mode.
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Avoid kicking priority on the current context
== Series Details ==
Series: drm/i915/execlists: Avoid kicking priority on the current context
URL : https://patchwork.freedesktop.org/series/47951/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9910 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47951/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9910 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_hangcheck:
fi-kbl-7560u: PASS -> DMESG-FAIL (fdo#106947, fdo#106560)
fi-cfl-guc: PASS -> INCOMPLETE (fdo#106693)
fi-skl-guc: PASS -> INCOMPLETE (fdo#106693, fdo#107207)
fi-kbl-guc: PASS -> INCOMPLETE (fdo#106693, fdo#107207)
igt@drv_selftest@live_workarounds:
fi-cnl-psr: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: PASS -> DMESG-FAIL (fdo#102614, fdo#106103)
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@drv_selftest@live_workarounds:
{fi-bsw-kefka}: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107207 https://bugs.freedesktop.org/show_bug.cgi?id=107207
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (53 -> 49) ==
Additional (1): fi-gdg-551
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9910
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9910: 6cae074acd3229cb18e50b7da58e029e5b3d72c9 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6cae074acd32 drm/i915/execlists: Avoid kicking priority on the current context
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9910/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/execlists: Avoid kicking priority on the current context
If the request is currently on the HW (in port 0), then we do not need
to kick the submission tasklet to evaluate whether we should be
preempting itself in order to execute it again.
In the case that was annoying me:
execlists_schedule: rq(18:211173).prio=0 -> 2
need_preempt: last(18:211174).prio=0, queue.prio=2
We are bumping the priority of the first of a pair of requests running
in the current context. Then when evaluating preempt, we would see that
that our priority request is higher than the last executing request in
ELSP0 and so trigger preemption, not realising that our intended request
was already executing.
v2: As we assume state of the execlists->port[] that is only valid while
we hold the timeline lock we have to repeat some earlier tests that on
the validity of the node.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 36 ++--
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e5385dbfcdda..2257bc7b167f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1238,9 +1238,13 @@ static void execlists_schedule(struct i915_request
*request,
engine = sched_lock_engine(node, engine);
+ /* Recheck after acquiring the engine->timeline.lock */
if (prio <= node->attr.priority)
continue;
+ if (i915_sched_node_signaled(node))
+ continue;
+
node->attr.priority = prio;
if (!list_empty(>link)) {
if (last != engine) {
@@ -1249,14 +1253,34 @@ static void execlists_schedule(struct i915_request
*request,
}
GEM_BUG_ON(pl->priority != prio);
list_move_tail(>link, >requests);
+ } else {
+ /*
+* If the request is not in the priolist queue because
+* it is not yet runnable, then it doesn't contribute
+* to our preemption decisions. On the other hand,
+* if the request is on the HW, it too is not in the
+* queue; but in that case we may still need to reorder
+* the inflight requests.
+*/
+ if
(!i915_sw_fence_done(_to_request(node)->submit))
+ continue;
}
- if (prio > engine->execlists.queue_priority &&
- i915_sw_fence_done(_to_request(node)->submit)) {
- /* defer submission until after all of our updates */
- __update_queue(engine, prio);
- tasklet_hi_schedule(>execlists.tasklet);
- }
+ if (prio <= engine->execlists.queue_priority)
+ continue;
+
+ /*
+* If we are already the currently executing context, don't
+* bother evaluating if we should preempt ourselves.
+*/
+ if (sched_to_request(node)->global_seqno &&
+
i915_seqno_passed(port_request(engine->execlists.port)->global_seqno,
+ sched_to_request(node)->global_seqno))
+ continue;
+
+ /* Defer (tasklet) submission until after all of our updates. */
+ __update_queue(engine, prio);
+ tasklet_hi_schedule(>execlists.tasklet);
}
spin_unlock_irq(>timeline.lock);
--
2.18.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add detection of changing of edid on between suspend and resume (rev3)
== Series Details ==
Series: drm/i915: Add detection of changing of edid on between suspend and
resume (rev3)
URL : https://patchwork.freedesktop.org/series/47680/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4639 -> Patchwork_9909 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9909 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9909, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47680/revisions/3/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9909:
=== IGT changes ===
Possible regressions
igt@drv_module_reload@basic-reload-inject:
fi-byt-j1900: PASS -> DMESG-WARN
fi-bsw-n3050: PASS -> DMESG-WARN
== Known issues ==
Here are the changes found in Patchwork_9909 that come from known issues:
=== IGT changes ===
Issues hit
igt@debugfs_test@read_all_entries:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
igt@drv_selftest@live_coherency:
fi-gdg-551: NOTRUN -> DMESG-FAIL (fdo#107164)
igt@drv_selftest@live_requests:
{fi-bsw-kefka}: PASS -> INCOMPLETE (fdo#105876)
igt@drv_selftest@live_workarounds:
fi-whl-u: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#107372)
Possible fixes
{igt@amdgpu/amd_prime@amd-to-i915}:
fi-bxt-j4205: INCOMPLETE (fdo#103927) -> SKIP
{igt@amdgpu/amd_prime@i915-to-amd}:
fi-bxt-j4205: DMESG-FAIL -> SKIP
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#105876 https://bugs.freedesktop.org/show_bug.cgi?id=105876
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (53 -> 49) ==
Additional (1): fi-gdg-551
Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4639 -> Patchwork_9909
CI_DRM_4639: da34c4841d4bd5098cef0bd3ddaeed1ee3eb3103 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9909: b5655d96db430792733958ab2a84e12a85f3584d @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b5655d96db43 drm/i915: Add detection of changing of edid on between suspend and
resume
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9909/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] RFC: Add write flag to reservation object fences
Am 09.08.2018 um 16:22 schrieb Daniel Vetter: On Thu, Aug 9, 2018 at 3:58 PM, Christian König wrote: Am 09.08.2018 um 15:38 schrieb Daniel Vetter: On Thu, Aug 09, 2018 at 01:37:07PM +0200, Christian König wrote: [SNIP] See to me the explicit fence in the reservation object is not even remotely related to implicit or explicit synchronization. Hm, I guess that's the confusion then. The only reason we have the exclusive fence is to implement cross-driver implicit syncing. What else you do internally in your driver doesn't matter, as long as you keep up that contract. And it's intentionally not called write_fence or anything like that, because that's not what it tracks. Of course any buffer moves the kernel does also must be tracked in the exclusive fence, because userspace cannot know about these. So you might have an exclusive fence set and also an explicit fence passed in through the atomic ioctl. Aside: Right now all drivers only observe one or the other, not both, so will break as soon as we start moving shared buffers around. At least on Android or anything else using explicit fencing. Actually both radeon and nouveau use the approach that shared fences need to wait on as well when they don't come from the current driver. So here's my summary, as I understanding things right now: - for non-shared buffers at least, amdgpu uses explicit fencing, and hence all fences caused by userspace end up as shared fences, whether that's writes or reads. This means you end up with possibly multiple write fences, but never any exclusive fences. - for non-shared buffers the only exclusive fences amdgpu sets are for buffer moves done by the kernel. - amgpu (kernel + userspace combo here) does not seem to have a concept/tracking for when a buffer is used with implicit or explicit fencing. It does however track all writes. No, that is incorrect. It tracks all accesses to a buffer object in the form of shared fences, we don't care if it is a write or not. What we track as well is which client uses a BO last and as long as the same client uses the BO we don't add any implicit synchronization. Only when a BO is used by another client we have implicit synchronization for all command submissions. This behavior can be disable with a flag during BO creation. - as a consequence, amdgpu needs to pessimistically assume that all writes to shared buffer need to obey implicit fencing rules. - for shared buffers (across process or drivers) implicit fencing does _not_ allow concurrent writers. That limitation is why people want to do explicit fencing, and it's the reason why there's only 1 slot for an exclusive. Note I really mean concurrent here, a queue of in-flight writes by different batches is perfectly fine. But it's a fully ordered queue of writes. - but as a consequence of amdgpu's lack of implicit fencing and hence need to pessimistically assume there's multiple write fences amdgpu needs to put multiple fences behind the single exclusive slot. This is a limitation imposed by by the amdgpu stack, not something inherit to how implicit fencing works. - Chris Wilson's patch implements all this (and afaics with a bit more coffee, correctly). If you want to be less pessimistic in amdgpu for shared buffers, you need to start tracking which shared buffer access need implicit and which explicit sync. What you can't do is suddenly create more than 1 exclusive fence, that's not how implicit fencing works. Another thing you cannot do is force everyone else (in non-amdgpu or core code) to sync against _all_ writes, because that forces implicit syncing. Which people very much don't want. I also do see the problem that most other hardware doesn't need that functionality, because it is driven by a single engine. That's why I tried to keep the overhead as low as possible. But at least for amdgpu (and I strongly suspect for nouveau as well) it is absolutely vital in a number of cases to allow concurrent accesses from the same client even when the BO is then later used with implicit synchronization. This is also the reason why the current workaround is so problematic for us. Cause as soon as the BO is shared with another (non-amdgpu) device all command submissions to it will be serialized even when they come from the same client. Would it be an option extend the concept of the "owner" of the BO amdpgu uses to other drivers as well? When you already have explicit synchronization insider your client, but not between clients (e.g. still uses DRI2 or DRI3), this could also be rather beneficial for others as well. Regards, Christian. -Daniel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] RFC: Add write flag to reservation object fences
On Thu, Aug 9, 2018 at 3:58 PM, Christian König wrote: > Am 09.08.2018 um 15:38 schrieb Daniel Vetter: >> >> On Thu, Aug 09, 2018 at 01:37:07PM +0200, Christian König wrote: >>> >>> Hi everyone, >>> >>> This set of patches tries to improve read after write hazard handling >>> for reservation objects. >>> >>> It allows us to specify for each shared fence if it represents a write >>> operation. >>> >>> Based on this the i915 driver is modified to always wait for all writes >>> before pageflip and the previously used workaround is removed from >>> amdgpu. >> >> Hm, I thought after the entire discussions we agreed again that it's _not_ >> the write hazard we want to track, but whether there's an exclusive fence >> that must be observed for implicit buffer sync. That's why it's called the >> exclusive fence, not the write fence! >> >> If you want multiple of those, I guess we could add those, but that >> doesn't really make sense - how exactly did you end up with multiple >> exclusive fences in the first place? > > > Maybe you misunderstood me, we don't have multiple exclusive fences. > > What we have are multiple writers which write to the BO. In other words > multiple engines which compose the content of the BO at the same time. > > For page flipping we need to wait for all of them to completed. > >> i915 (and fwiw, any other driver) does _not_ want to observe all write >> fences attached to a dma-buf. We want to _only_ observe the single >> exclusive fence used for implicit buffer sync, which might or might not >> exist. Otherwise the entire point of having explicit sync and explicit >> fences in the atomic ioctl is out of the window and the use case of 2 >> draw/flip loops using a single buffer is defeated. > > > What do you mean with that? > > Even for the atomic IOCTL with implicit fencing I strongly suspect that we > can wait for multiple fences before doing the flip. Otherwise it would not > really be useful to us. > >> Again: How exactly you construct that exclusive fences, and how exactly >> the kernel and userspace cooperate to figure out when to set the exclusive >> fences, is 100% up to amdgpu. If you do explicit sync by default, and only >> switch to implicit sync (and setting the exclusive fence) as needed, >> that's perfectly fine. No need at all to leak that into core code and >> confuse everyone that there's multiple exclusive fences they need to >> somehow observe. > > > I simply never have a single exclusive fence provided by userspace. > > I always have multiple command submissions accessing the buffer at the same > time. > > See to me the explicit fence in the reservation object is not even remotely > related to implicit or explicit synchronization. Hm, I guess that's the confusion then. The only reason we have the exclusive fence is to implement cross-driver implicit syncing. What else you do internally in your driver doesn't matter, as long as you keep up that contract. And it's intentionally not called write_fence or anything like that, because that's not what it tracks. Of course any buffer moves the kernel does also must be tracked in the exclusive fence, because userspace cannot know about these. So you might have an exclusive fence set and also an explicit fence passed in through the atomic ioctl. Aside: Right now all drivers only observe one or the other, not both, so will break as soon as we start moving shared buffers around. At least on Android or anything else using explicit fencing. So here's my summary, as I understanding things right now: - for non-shared buffers at least, amdgpu uses explicit fencing, and hence all fences caused by userspace end up as shared fences, whether that's writes or reads. This means you end up with possibly multiple write fences, but never any exclusive fences. - for non-shared buffers the only exclusive fences amdgpu sets are for buffer moves done by the kernel. - amgpu (kernel + userspace combo here) does not seem to have a concept/tracking for when a buffer is used with implicit or explicit fencing. It does however track all writes. - as a consequence, amdgpu needs to pessimistically assume that all writes to shared buffer need to obey implicit fencing rules. - for shared buffers (across process or drivers) implicit fencing does _not_ allow concurrent writers. That limitation is why people want to do explicit fencing, and it's the reason why there's only 1 slot for an exclusive. Note I really mean concurrent here, a queue of in-flight writes by different batches is perfectly fine. But it's a fully ordered queue of writes. - but as a consequence of amdgpu's lack of implicit fencing and hence need to pessimistically assume there's multiple write fences amdgpu needs to put multiple fences behind the single exclusive slot. This is a limitation imposed by by the amdgpu stack, not something inherit to how implicit fencing works. - Chris Wilson's patch implements all this (and afaics with a bit more coffee, correctly). If you want to be less
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for RESEND: dma-buf cleanup (rev2)
== Series Details == Series: RESEND: dma-buf cleanup (rev2) URL : https://patchwork.freedesktop.org/series/45890/ State : warning == Summary == $ dim checkpatch origin/drm-tip e8a45f5bac39 drm/i915: Remove unecessary dma_fence_ops -:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps 'unnecessary'? #4: Subject: [PATCH] drm/i915: Remove unecessary dma_fence_ops total: 0 errors, 1 warnings, 0 checks, 36 lines checked 2074c167fc25 drm/msm: Remove unecessary dma_fence_ops -:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps 'unnecessary'? #4: Subject: [PATCH] drm/msm: Remove unecessary dma_fence_ops total: 0 errors, 1 warnings, 0 checks, 21 lines checked c696f9f7b3eb drm/nouveau: Remove unecessary dma_fence_ops -:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps 'unnecessary'? #4: Subject: [PATCH] drm/nouveau: Remove unecessary dma_fence_ops total: 0 errors, 1 warnings, 0 checks, 6 lines checked c7d18e95768f drm/vgem: Remove unecessary dma_fence_ops -:4: WARNING:TYPO_SPELLING: 'unecessary' may be misspelled - perhaps 'unnecessary'? #4: Subject: [PATCH] drm/vgem: Remove unecessary dma_fence_ops total: 0 errors, 1 warnings, 0 checks, 25 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v6 1/2] drm/i915: Allow control of PSR at runtime through debugfs, v6
Currently tests modify i915.enable_psr and then do a modeset cycle
to change PSR. We can write a value to i915_edp_psr_debug to force
a certain PSR mode without a modeset.
To retain compatibility with older userspace, we also still allow
the override through the module parameter, and add some tracking
to check whether a debugfs mode is specified.
Changes since v1:
- Rename dev_priv->psr.enabled to .dp, and .hw_configured to .enabled.
- Fix i915_psr_debugfs_mode to match the writes to debugfs.
- Rename __i915_edp_psr_write to intel_psr_set_debugfs_mode, simplify
it and move it to intel_psr.c. This keeps all internals in intel_psr.c
- Perform an interruptible wait for hw completion outside of the psr
lock, instead of being forced to trywait and return -EBUSY.
Changes since v2:
- Rebase on top of intel_psr changes.
Changes since v3:
- Assign psr.dp during init. (dhnkrn)
- Add prepared bool, which should be used instead of relying on psr.dp. (dhnkrn)
- Fix -EDEADLK handling in debugfs. (dhnkrn)
- Clean up waiting for idle in intel_psr_set_debugfs_mode.
- Print PSR mode when trying to enable PSR. (dhnkrn)
- Move changing psr debug setting to i915_edp_psr_debug_set. (dhnkrn)
Changes since v4:
- Return error in _set() function.
- Change flag values to make them easier to remember. (dhnkrn)
- Only assign psr.dp once. (dhnkrn)
- Only set crtc_state->has_psr on the crtc with psr.dp.
- Fix typo. (dhnkrn)
Changes since v5:
- Only wait for PSR idle on the PSR connector correctly. (dhnkrn)
- Reinstate WARN_ON(drrs.dp) in intel_psr_enable. (dhnkrn)
- Remove stray comment. (dhnkrn)
- Be silent in intel_psr_compute_config on wrong connector. (dhnkrn)
Signed-off-by: Maarten Lankhorst
Cc: Rodrigo Vivi
Cc: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/i915_debugfs.c | 23 -
drivers/gpu/drm/i915/i915_drv.h | 12 ++-
drivers/gpu/drm/i915/i915_irq.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h| 3 +
drivers/gpu/drm/i915/intel_psr.c| 134 +++-
5 files changed, 146 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index f9ce35da4123..3e81301a94ba 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2708,7 +2708,7 @@ static int i915_edp_psr_status(struct seq_file *m, void
*data)
intel_runtime_pm_get(dev_priv);
mutex_lock(_priv->psr.lock);
- seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv->psr.enabled));
+ seq_printf(m, "Enabled: %s\n", yesno(dev_priv->psr.enabled));
seq_printf(m, "Busy frontbuffer bits: 0x%03x\n",
dev_priv->psr.busy_frontbuffer_bits);
@@ -2750,17 +2750,32 @@ static int
i915_edp_psr_debug_set(void *data, u64 val)
{
struct drm_i915_private *dev_priv = data;
+ struct drm_modeset_acquire_ctx ctx;
+ int ret;
if (!CAN_PSR(dev_priv))
return -ENODEV;
- DRM_DEBUG_KMS("PSR debug %s\n", enableddisabled(val));
+ DRM_DEBUG_KMS("Setting PSR debug to %llx\n", val);
intel_runtime_pm_get(dev_priv);
- intel_psr_irq_control(dev_priv, !!val);
+
+ drm_modeset_acquire_init(, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
+
+retry:
+ ret = intel_psr_set_debugfs_mode(dev_priv, , val);
+ if (ret == -EDEADLK) {
+ ret = drm_modeset_backoff();
+ if (!ret)
+ goto retry;
+ }
+
+ drm_modeset_drop_locks();
+ drm_modeset_acquire_fini();
+
intel_runtime_pm_put(dev_priv);
- return 0;
+ return ret;
}
static int
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 657f46e0cae9..a3ea48ce1811 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -611,8 +611,17 @@ struct i915_drrs {
struct i915_psr {
struct mutex lock;
+
+#define I915_PSR_DEBUG_MODE_MASK 0x0f
+#define I915_PSR_DEBUG_DEFAULT 0x00
+#define I915_PSR_DEBUG_DISABLE 0x01
+#define I915_PSR_DEBUG_ENABLE 0x02
+#define I915_PSR_DEBUG_IRQ 0x10
+
+ u32 debug;
bool sink_support;
- struct intel_dp *enabled;
+ bool prepared, enabled;
+ struct intel_dp *dp;
bool active;
struct work_struct work;
unsigned busy_frontbuffer_bits;
@@ -622,7 +631,6 @@ struct i915_psr {
bool alpm;
bool psr2_enabled;
u8 sink_sync_latency;
- bool debug;
ktime_t last_entry_attempt;
ktime_t last_exit;
};
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8084e35b25c5..b2c9838442bc 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4048,7 +4048,7 @@ static int ironlake_irq_postinstall(struct drm_device
*dev)
if (IS_HASWELL(dev_priv)) {
gen3_assert_iir_is_zero(dev_priv, EDP_PSR_IIR);
-
Re: [Intel-gfx] [PATCH v1] Added max_bpp property to limit maximum bpp even if HDMI TV advertises higher limit.
On Wed, 2018-08-08 at 16:41 -0700, Rodrigo Vivi wrote:
> On Thu, Jul 26, 2018 at 04:02:53PM +0300, StanLis wrote:
> > From: Stanislav Lisovskiy
> >
> > This was inspired, by a bugs like this:
> >
> > Bugzilla: https://bugs.freedesktop.org/93361
> >
> > In short, when TV advertises 12bpc, the refresh
> > rate might get inaccurate causing some playback
> > issues.
> >
> > The temporary solution was to hack the EDID,
> > so that it doesn't advertise deep color, so this
> > new property makes it unnecessary.
> >
> > Long term solution would be to change clock frequency,
> > however this affects all the clock tree and might not
> > be doable, so this is the currently proposed fix.
>
> It seems that the fix for this should be on the refresh rate side,
> not providing an option to the user to workaround and hide the issue.
Correct. I mentioned this in the commit message. However,
after discussion with Ville we decided that this is way to go
at least for now, as refresh rate side fix would require changing
the whole implementation of finding best pll and clock divisor
algorithm, which will also affect all of the other connected outputs.
Currently as I understood it's not even clear, if this is doable at
all. I can of course ask again, if we still stick to this option or
should I start looking at implementing a real fix.
>
> >
> > Signed-off-by: Stanislav Lisovskiy
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_atomic.c | 8
> > drivers/gpu/drm/i915/intel_drv.h| 4
> > drivers/gpu/drm/i915/intel_hdmi.c | 13 -
> > drivers/gpu/drm/i915/intel_modes.c | 20
> > 5 files changed, 41 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index eeb002a47032..823eccd29f70 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1817,6 +1817,7 @@ struct drm_i915_private {
> > struct intel_fbdev *fbdev;
> > struct work_struct fbdev_suspend_work;
> >
> > + struct drm_property *max_bpp_property;
> > struct drm_property *broadcast_rgb_property;
> > struct drm_property *force_audio_property;
> >
> > diff --git a/drivers/gpu/drm/i915/intel_atomic.c
> > b/drivers/gpu/drm/i915/intel_atomic.c
> > index b04952bacf77..ac890fda8029 100644
> > --- a/drivers/gpu/drm/i915/intel_atomic.c
> > +++ b/drivers/gpu/drm/i915/intel_atomic.c
> > @@ -58,6 +58,8 @@ int
> > intel_digital_connector_atomic_get_property(struct drm_connector
> > *connector,
> > *val = intel_conn_state->force_audio;
> > else if (property == dev_priv->broadcast_rgb_property)
> > *val = intel_conn_state->broadcast_rgb;
> > + else if (property == dev_priv->max_bpp_property)
> > + *val = intel_conn_state->max_bpp;
> > else {
> > DRM_DEBUG_ATOMIC("Unknown property
> > [PROP:%d:%s]\n",
> > property->base.id, property-
> > >name);
> > @@ -96,6 +98,11 @@ int
> > intel_digital_connector_atomic_set_property(struct drm_connector
> > *connector,
> > return 0;
> > }
> >
> > + if (property == dev_priv->max_bpp_property) {
> > + intel_conn_state->max_bpp = val;
> > + return 0;
> > + }
> > +
> > DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
> > property->base.id, property->name);
> > return -EINVAL;
> > @@ -126,6 +133,7 @@ int intel_digital_connector_atomic_check(struct
> > drm_connector *conn,
> > if (new_conn_state->force_audio != old_conn_state-
> > >force_audio ||
> > new_conn_state->broadcast_rgb != old_conn_state-
> > >broadcast_rgb ||
> > new_conn_state->base.picture_aspect_ratio !=
> > old_conn_state->base.picture_aspect_ratio ||
> > + new_conn_state->max_bpp != old_conn_state->max_bpp ||
> > new_conn_state->base.content_type != old_conn_state-
> > >base.content_type ||
> > new_conn_state->base.scaling_mode != old_conn_state-
> > >base.scaling_mode)
> > crtc_state->mode_changed = true;
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 61e715ddd0d5..38d1f430b44f 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -422,6 +422,7 @@ struct intel_digital_connector_state {
> >
> > enum hdmi_force_audio force_audio;
> > int broadcast_rgb;
> > + int max_bpp;
> > };
> >
> > #define to_intel_digital_connector_state(x) container_of(x, struct
> > intel_digital_connector_state, base)
> > @@ -1837,9 +1838,12 @@ bool intel_is_dual_link_lvds(struct
> > drm_device *dev);
> > int intel_connector_update_modes(struct drm_connector *connector,
> > struct edid *edid);
> > int intel_ddc_get_modes(struct drm_connector *c, struct
> > i2c_adapter *adapter);
> > +
> > void
Re: [Intel-gfx] RFC: Add write flag to reservation object fences
Am 09.08.2018 um 15:38 schrieb Daniel Vetter: On Thu, Aug 09, 2018 at 01:37:07PM +0200, Christian König wrote: Hi everyone, This set of patches tries to improve read after write hazard handling for reservation objects. It allows us to specify for each shared fence if it represents a write operation. Based on this the i915 driver is modified to always wait for all writes before pageflip and the previously used workaround is removed from amdgpu. Hm, I thought after the entire discussions we agreed again that it's _not_ the write hazard we want to track, but whether there's an exclusive fence that must be observed for implicit buffer sync. That's why it's called the exclusive fence, not the write fence! If you want multiple of those, I guess we could add those, but that doesn't really make sense - how exactly did you end up with multiple exclusive fences in the first place? Maybe you misunderstood me, we don't have multiple exclusive fences. What we have are multiple writers which write to the BO. In other words multiple engines which compose the content of the BO at the same time. For page flipping we need to wait for all of them to completed. i915 (and fwiw, any other driver) does _not_ want to observe all write fences attached to a dma-buf. We want to _only_ observe the single exclusive fence used for implicit buffer sync, which might or might not exist. Otherwise the entire point of having explicit sync and explicit fences in the atomic ioctl is out of the window and the use case of 2 draw/flip loops using a single buffer is defeated. What do you mean with that? Even for the atomic IOCTL with implicit fencing I strongly suspect that we can wait for multiple fences before doing the flip. Otherwise it would not really be useful to us. Again: How exactly you construct that exclusive fences, and how exactly the kernel and userspace cooperate to figure out when to set the exclusive fences, is 100% up to amdgpu. If you do explicit sync by default, and only switch to implicit sync (and setting the exclusive fence) as needed, that's perfectly fine. No need at all to leak that into core code and confuse everyone that there's multiple exclusive fences they need to somehow observe. I simply never have a single exclusive fence provided by userspace. I always have multiple command submissions accessing the buffer at the same time. See to me the explicit fence in the reservation object is not even remotely related to implicit or explicit synchronization. Regards, Christian. Cheers, Daniel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/execlists: Avoid kicking priority on the current context
Quoting Chris Wilson (2018-08-09 14:07:01) > If the request is currently on the HW (in port 0), then we do not need > to kick the submission tasklet to evaluate whether we should be > preempting itself in order to execute it again. So in the case that was annoying me: [ 70.883173] rq(18:211173).prio=0 -> 2 [ 70.883186] need_preempt: last(18:211174).prio=0, queue.prio=2 We are bumping the priority of the first of a pair of requests running in the current context. Then when evaluating preempt, we would see that that our priority request is higher than the last executing request in ELSP0 and so trigger preemption, not realising that our intended request was already executing. Sadly performing as intended, but the patch turns out to be the right fix nevertheless. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] RFC: Add write flag to reservation object fences
On Thu, Aug 09, 2018 at 01:37:07PM +0200, Christian König wrote: > Hi everyone, > > This set of patches tries to improve read after write hazard handling > for reservation objects. > > It allows us to specify for each shared fence if it represents a write > operation. > > Based on this the i915 driver is modified to always wait for all writes > before pageflip and the previously used workaround is removed from > amdgpu. Hm, I thought after the entire discussions we agreed again that it's _not_ the write hazard we want to track, but whether there's an exclusive fence that must be observed for implicit buffer sync. That's why it's called the exclusive fence, not the write fence! If you want multiple of those, I guess we could add those, but that doesn't really make sense - how exactly did you end up with multiple exclusive fences in the first place? i915 (and fwiw, any other driver) does _not_ want to observe all write fences attached to a dma-buf. We want to _only_ observe the single exclusive fence used for implicit buffer sync, which might or might not exist. Otherwise the entire point of having explicit sync and explicit fences in the atomic ioctl is out of the window and the use case of 2 draw/flip loops using a single buffer is defeated. Again: How exactly you construct that exclusive fences, and how exactly the kernel and userspace cooperate to figure out when to set the exclusive fences, is 100% up to amdgpu. If you do explicit sync by default, and only switch to implicit sync (and setting the exclusive fence) as needed, that's perfectly fine. No need at all to leak that into core code and confuse everyone that there's multiple exclusive fences they need to somehow observe. Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add detection of changing of edid on between suspend and resume (rev3)
== Series Details ==
Series: drm/i915: Add detection of changing of edid on between suspend and
resume (rev3)
URL : https://patchwork.freedesktop.org/series/47680/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4637 -> Patchwork_9907 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9907 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9907, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47680/revisions/3/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9907:
=== IGT changes ===
Possible regressions
igt@drv_module_reload@basic-reload-inject:
fi-bsw-n3050: PASS -> DMESG-WARN
== Known issues ==
Here are the changes found in Patchwork_9907 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_hangcheck:
fi-bxt-dsi: PASS -> DMESG-FAIL (fdo#106560)
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: PASS -> FAIL (fdo#107362)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: NOTRUN -> INCOMPLETE (fdo#103713)
Possible fixes
igt@debugfs_test@read_all_entries:
{fi-icl-u}: DMESG-FAIL (fdo#107411) -> PASS
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
igt@drv_selftest@live_hangcheck:
fi-cnl-psr: DMESG-FAIL (fdo#106560) -> PASS
igt@gem_exec_reloc@basic-gtt-read-noreloc:
{fi-icl-u}: DMESG-WARN (fdo#107411) -> PASS +77
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: FAIL (fdo#103167) -> PASS
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: FAIL (fdo#104008) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107411 https://bugs.freedesktop.org/show_bug.cgi?id=107411
== Participating hosts (54 -> 48) ==
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-ctg-p8600 fi-gdg-551
== Build changes ==
* Linux: CI_DRM_4637 -> Patchwork_9907
CI_DRM_4637: 93f9ad1bdd8f66a09f39968d21f1a1de7a69bf54 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4591: 6cb3d7dbe5831a7b2b5b7a4638d8a8b7ac624f5f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9907: 69bed2bf41dd52cdc6f939c9d19e9eb5db82cff6 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
69bed2bf41dd drm/i915: Add detection of changing of edid on between suspend and
resume
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9907/issues.html
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Re: [Intel-gfx] [PATCH] drm/i915: Restore user forcewake domains across suspend
Quoting Tvrtko Ursulin (2018-08-09 12:46:05)
>
> On 08/08/2018 22:08, Chris Wilson wrote:
> > On suspend, we cancel the automatic forcewake and clear all other sources
> > of forcewake so the machine can sleep before we do suspend. However, we
> > expose the forcewake to userspace (only via debugfs, but nevertheless we
> > do) and want to restore that upon resume or else our accounting will be
> > off and we may not acquire the forcewake before we use it. So record
> > which domains we cleared on suspend and reacquire them early on resume.
> >
> > v2: Hold the spinlock to appease our sanitychecks
> >
> > Reported-by: Imre Deak
> > Fixes: b8473050805f ("drm/i915: Fix forcewake active domain tracking")
> > Signed-off-by: Chris Wilson
> > Cc: Tvrtko Ursulin
> > Cc: Mika Kuoppala
> > Cc: Imre Deak
> > ---
> > drivers/gpu/drm/i915/intel_uncore.c | 44 ++-
> > drivers/gpu/drm/i915/intel_uncore.h | 1 +
> > drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +-
> > 3 files changed, 26 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c
> > b/drivers/gpu/drm/i915/intel_uncore.c
> > index 284be151f645..cf40361fe181 100644
> > --- a/drivers/gpu/drm/i915/intel_uncore.c
> > +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > @@ -369,8 +369,8 @@ intel_uncore_fw_release_timer(struct hrtimer *timer)
> > }
> >
> > /* Note callers must have acquired the PUNIT->PMIC bus, before calling
> > this. */
> > -static void intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv,
> > - bool restore)
> > +static unsigned int
> > +intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv)
> > {
> > unsigned long irqflags;
> > struct intel_uncore_forcewake_domain *domain;
> > @@ -422,20 +422,11 @@ static void intel_uncore_forcewake_reset(struct
> > drm_i915_private *dev_priv,
> > dev_priv->uncore.funcs.force_wake_put(dev_priv, fw);
> >
> > fw_domains_reset(dev_priv, dev_priv->uncore.fw_domains);
> > -
> > - if (restore) { /* If reset with a user forcewake, try to restore */
> > - if (fw)
> > - dev_priv->uncore.funcs.force_wake_get(dev_priv, fw);
> > -
> > - if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv))
> > - dev_priv->uncore.fifo_count =
> > - fifo_free_entries(dev_priv);
> > - }
> > -
> > - if (!restore)
> > - assert_forcewakes_inactive(dev_priv);
> > + assert_forcewakes_inactive(dev_priv);
> >
> > spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
> > +
> > + return fw; /* track the lost user forcewake domains */
> > }
> >
> > static u64 gen9_edram_size(struct drm_i915_private *dev_priv)
> > @@ -544,7 +535,7 @@ check_for_unclaimed_mmio(struct drm_i915_private
> > *dev_priv)
> > }
> >
> > static void __intel_uncore_early_sanitize(struct drm_i915_private
> > *dev_priv,
> > - bool restore_forcewake)
> > + unsigned int restore_forcewake)
> > {
> > /* clear out unclaimed reg detection bit */
> > if (check_for_unclaimed_mmio(dev_priv))
> > @@ -559,7 +550,17 @@ static void __intel_uncore_early_sanitize(struct
> > drm_i915_private *dev_priv,
> > }
> >
> > iosf_mbi_punit_acquire();
> > - intel_uncore_forcewake_reset(dev_priv, restore_forcewake);
> > + intel_uncore_forcewake_reset(dev_priv);
> > + if (restore_forcewake) {
> > + spin_lock_irq(_priv->uncore.lock);
> > + dev_priv->uncore.funcs.force_wake_get(dev_priv,
> > + restore_forcewake);
> > +
> > + if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv))
> > + dev_priv->uncore.fifo_count =
> > + fifo_free_entries(dev_priv);
> > + spin_unlock_irq(_priv->uncore.lock);
> > + }
> > iosf_mbi_punit_release();
> > }
> >
> > @@ -568,13 +569,16 @@ void intel_uncore_suspend(struct drm_i915_private
> > *dev_priv)
> > iosf_mbi_punit_acquire();
> > iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
> > _priv->uncore.pmic_bus_access_nb);
> > - intel_uncore_forcewake_reset(dev_priv, false);
> > + dev_priv->uncore.fw_domains_user =
> > + intel_uncore_forcewake_reset(dev_priv);
> > iosf_mbi_punit_release();
> > }
> >
> > void intel_uncore_resume_early(struct drm_i915_private *dev_priv)
> > {
> > - __intel_uncore_early_sanitize(dev_priv, true);
> > + __intel_uncore_early_sanitize(dev_priv,
> > + dev_priv->uncore.fw_domains_user);
> > +
> > iosf_mbi_register_pmic_bus_access_notifier(
> > _priv->uncore.pmic_bus_access_nb);
> > i915_check_and_clear_faults(dev_priv);
> > @@ -1555,7 +1559,7 @@ void
[Intel-gfx] [PATCH] drm/i915/execlists: Avoid kicking priority on the current context
If the request is currently on the HW (in port 0), then we do not need
to kick the submission tasklet to evaluate whether we should be
preempting itself in order to execute it again.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 32 ++--
1 file changed, 26 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e5385dbfcdda..0ddb33cabaf2 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1249,14 +1249,34 @@ static void execlists_schedule(struct i915_request
*request,
}
GEM_BUG_ON(pl->priority != prio);
list_move_tail(>link, >requests);
+ } else {
+ /*
+* If the request is not in the priolist queue because
+* it is not yet runnable, then it doesn't contribute
+* to our preemption decisions. On the other hand,
+* if the request is on the HW, it too is not in the
+* queue; but in that case we may still need to reorder
+* the inflight requests.
+*/
+ if
(!i915_sw_fence_done(_to_request(node)->submit))
+ continue;
}
- if (prio > engine->execlists.queue_priority &&
- i915_sw_fence_done(_to_request(node)->submit)) {
- /* defer submission until after all of our updates */
- __update_queue(engine, prio);
- tasklet_hi_schedule(>execlists.tasklet);
- }
+ if (prio <= engine->execlists.queue_priority)
+ continue;
+
+ /*
+* If we are already the currently executing context, don't
+* bother evaluating if we should preempt ourselves.
+*/
+ if (sched_to_request(node)->global_seqno &&
+
i915_seqno_passed(port_request(engine->execlists.port)->global_seqno,
+ sched_to_request(node)->global_seqno))
+ continue;
+
+ /* Defer (tasklet) submission until after all of our updates. */
+ __update_queue(engine, prio);
+ tasklet_hi_schedule(>execlists.tasklet);
}
spin_unlock_irq(>timeline.lock);
--
2.18.0
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Re: [Intel-gfx] [PATCH] drm/vgem: Remove unecessary dma_fence_ops
Quoting Daniel Vetter (2018-08-09 13:45:44) > dma_fence_default_wait is the default now, same for the trivial > enable_signaling implementation. > > Also remove the ->signaled callback, vgem can't peek ahead with a > fastpath, returning false is the default implementation. > > v2: Protect the meaningful space! (Chris) > > Signed-off-by: Daniel Vetter > Cc: Kees Cook > Cc: Cihangir Akturk > Cc: Chris Wilson > Cc: Sean Paul > Cc: Daniel Vetter 1-4, Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/vgem: Remove unecessary dma_fence_ops
dma_fence_default_wait is the default now, same for the trivial
enable_signaling implementation.
Also remove the ->signaled callback, vgem can't peek ahead with a
fastpath, returning false is the default implementation.
v2: Protect the meaningful space! (Chris)
Signed-off-by: Daniel Vetter
Cc: Kees Cook
Cc: Cihangir Akturk
Cc: Chris Wilson
Cc: Sean Paul
Cc: Daniel Vetter
---
drivers/gpu/drm/vgem/vgem_fence.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/drivers/gpu/drm/vgem/vgem_fence.c
b/drivers/gpu/drm/vgem/vgem_fence.c
index b28876c222b4..e6ee71323a66 100644
--- a/drivers/gpu/drm/vgem/vgem_fence.c
+++ b/drivers/gpu/drm/vgem/vgem_fence.c
@@ -43,16 +43,6 @@ static const char *vgem_fence_get_timeline_name(struct
dma_fence *fence)
return "unbound";
}
-static bool vgem_fence_signaled(struct dma_fence *fence)
-{
- return false;
-}
-
-static bool vgem_fence_enable_signaling(struct dma_fence *fence)
-{
- return true;
-}
-
static void vgem_fence_release(struct dma_fence *base)
{
struct vgem_fence *fence = container_of(base, typeof(*fence), base);
@@ -76,9 +66,6 @@ static void vgem_fence_timeline_value_str(struct dma_fence
*fence, char *str,
static const struct dma_fence_ops vgem_fence_ops = {
.get_driver_name = vgem_fence_get_driver_name,
.get_timeline_name = vgem_fence_get_timeline_name,
- .enable_signaling = vgem_fence_enable_signaling,
- .signaled = vgem_fence_signaled,
- .wait = dma_fence_default_wait,
.release = vgem_fence_release,
.fence_value_str = vgem_fence_value_str,
--
2.18.0
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Re: [Intel-gfx] [PATCH 1/6] dma-buf: remove shared fence staging in reservation object
Am 09.08.2018 um 14:08 schrieb Chris Wilson:
Quoting Christian König (2018-08-09 12:37:08)
void reservation_object_add_shared_fence(struct reservation_object *obj,
struct dma_fence *fence)
{
- struct reservation_object_list *old, *fobj = obj->staged;
+ struct reservation_object_list *fobj;
+ unsigned int i;
- old = reservation_object_get_list(obj);
- obj->staged = NULL;
+ dma_fence_get(fence);
+
+ fobj = reservation_object_get_list(obj);
- if (!fobj) {
- BUG_ON(old->shared_count >= old->shared_max);
- reservation_object_add_shared_inplace(obj, old, fence);
- } else
- reservation_object_add_shared_replace(obj, old, fobj, fence);
+ preempt_disable();
+ write_seqcount_begin(>seq);
+
+ for (i = 0; i < fobj->shared_count; ++i) {
+ struct dma_fence *old_fence;
+
+ old_fence = rcu_dereference_protected(fobj->shared[i],
+
reservation_object_held(obj));
+ if (old_fence->context == fence->context ||
+ dma_fence_is_signaled(old_fence)) {
Are you happy with the possibility that the shared[] may contain two
fences belonging to the same context? That was a sticking point earlier.
Yeah, that is fixed by now. I've removed the dependency on this in our
VM handling code quite a while ago.
+ /* memory barrier is added by write_seqcount_begin */
+ RCU_INIT_POINTER(fobj->shared[i], fence);
+ write_seqcount_end(>seq);
+ preempt_enable();
+ dma_fence_put(old_fence);
You can rearrange this to have a single exit.
Good point, going to rearrange the code.
Christian.
for (i = 0; i < fobj->shared_count; ++i) {
struct dma_fence *old_fence;
old_fence = rcu_dereference_protected(fobj->shared[i],
reservation_object_held(obj));
if (old_fence->context == fence->context ||
dma_fence_is_signaled(old_fence)) {
dma_fence_put(old_fence);
goto replace;
}
}
fobj->shared_count++;
replace:
/*
* memory barrier is added by write_seqcount_begin,
* fobj->shared_count is protected by this lock too
*/
RCU_INIT_POINTER(fobj->shared[i], fence);
write_seqcount_end(>seq);
preempt_enable();
}
-Chris
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Re: [Intel-gfx] [PATCH 1/6] dma-buf: remove shared fence staging in reservation object
Quoting Christian König (2018-08-09 12:37:08)
> void reservation_object_add_shared_fence(struct reservation_object *obj,
> struct dma_fence *fence)
> {
> - struct reservation_object_list *old, *fobj = obj->staged;
> + struct reservation_object_list *fobj;
> + unsigned int i;
>
> - old = reservation_object_get_list(obj);
> - obj->staged = NULL;
> + dma_fence_get(fence);
> +
> + fobj = reservation_object_get_list(obj);
>
> - if (!fobj) {
> - BUG_ON(old->shared_count >= old->shared_max);
> - reservation_object_add_shared_inplace(obj, old, fence);
> - } else
> - reservation_object_add_shared_replace(obj, old, fobj, fence);
> + preempt_disable();
> + write_seqcount_begin(>seq);
> +
> + for (i = 0; i < fobj->shared_count; ++i) {
> + struct dma_fence *old_fence;
> +
> + old_fence = rcu_dereference_protected(fobj->shared[i],
> +
> reservation_object_held(obj));
> + if (old_fence->context == fence->context ||
> + dma_fence_is_signaled(old_fence)) {
Are you happy with the possibility that the shared[] may contain two
fences belonging to the same context? That was a sticking point earlier.
> + /* memory barrier is added by write_seqcount_begin */
> + RCU_INIT_POINTER(fobj->shared[i], fence);
> + write_seqcount_end(>seq);
> + preempt_enable();
> + dma_fence_put(old_fence);
You can rearrange this to have a single exit.
for (i = 0; i < fobj->shared_count; ++i) {
struct dma_fence *old_fence;
old_fence = rcu_dereference_protected(fobj->shared[i],
reservation_object_held(obj));
if (old_fence->context == fence->context ||
dma_fence_is_signaled(old_fence)) {
dma_fence_put(old_fence);
goto replace;
}
}
fobj->shared_count++;
replace:
/*
* memory barrier is added by write_seqcount_begin,
* fobj->shared_count is protected by this lock too
*/
RCU_INIT_POINTER(fobj->shared[i], fence);
write_seqcount_end(>seq);
preempt_enable();
}
-Chris
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] igt/perf_pmu: Aim for a fixed number of iterations for calibrating accuracy
On 08/08/2018 15:59, Chris Wilson wrote:
Our observation is that the systematic error is proportional to the
number of iterations we perform; the suspicion is that it directly
correlates with the number of sleeps. Reduce the number of iterations,
to try and keep the error in check.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
tests/perf_pmu.c | 34 +-
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 9a20abb6b..5a26d5272 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1521,14 +1521,13 @@ static void __rearm_spin_batch(igt_spin_t *spin)
static void
accuracy(int gem_fd, const struct intel_execution_engine2 *e,
-unsigned long target_busy_pct)
+unsigned long target_busy_pct,
+unsigned long target_iters)
{
- unsigned long busy_us = 1 - 100 * (1 + abs(50 - target_busy_pct));
- unsigned long idle_us = 100 * (busy_us - target_busy_pct *
- busy_us / 100) / target_busy_pct;
const unsigned long min_test_us = 1e6;
- const unsigned long pwm_calibration_us = min_test_us;
- const unsigned long test_us = min_test_us;
+ unsigned long pwm_calibration_us;
+ unsigned long test_us;
+ unsigned long cycle_us, busy_us, idle_us;
double busy_r, expected;
uint64_t val[2];
uint64_t ts[2];
@@ -1538,18 +1537,27 @@ accuracy(int gem_fd, const struct
intel_execution_engine2 *e,
/* Sampling platforms cannot reach the high accuracy criteria. */
igt_require(gem_has_execlists(gem_fd));
- while (idle_us < 2500) {
+ /* Aim for approximately 100 iterations for calibration */
+ cycle_us = min_test_us / target_iters;
+ busy_us = cycle_us * target_busy_pct / 100;
+ idle_us = cycle_us - busy_us;
2% load, 1s / 10 iters
cycles_us = 100ms
busy_us = 2ms
idle_us = 98ms
...
+
+ while (idle_us < 2500 || busy_us < 2500) {
busy_us *= 2;
idle_us *= 2;
...
busy_us = 4ms
idle_us = 196ms
I fear here that even sampling timers will get it right with this long
PWM cycle. So we miss to notice GuC mode is inaccurate for real world
workloads.
Okay question is what are real work workloads.. are they really
typically shorter than 4ms batches? And what PWM cycle we need here to
notice this.
I had this empirically worked out to the values that were previously
used AFAIR, or perhaps there was some leeway. Hmm.. I think finish the
series with a patch to remove the skip on !has_execlists so CI tells us?
Regards,
Tvrtko
}
+ cycle_us = busy_us + idle_us;
+ pwm_calibration_us = target_iters * cycle_us / 2;
+ test_us = target_iters * cycle_us;
- igt_info("calibration=%lums, test=%lums; ratio=%.2f%% (%luus/%luus)\n",
-pwm_calibration_us / 1000, test_us / 1000,
-(double)busy_us / (busy_us + idle_us) * 100.0,
+ igt_info("calibration=%lums, test=%lums, cycle=%lums; ratio=%.2f%%
(%luus/%luus)\n",
+pwm_calibration_us / 1000, test_us / 1000, cycle_us / 1000,
+(double)busy_us / cycle_us * 100.0,
busy_us, idle_us);
- assert_within_epsilon((double)busy_us / (busy_us + idle_us),
- (double)target_busy_pct / 100.0, tolerance);
+ assert_within_epsilon((double)busy_us / cycle_us,
+ (double)target_busy_pct / 100.0,
+ tolerance);
igt_assert(pipe(link) == 0);
@@ -1796,7 +1804,7 @@ igt_main
for (i = 0; i < ARRAY_SIZE(pct); i++) {
igt_subtest_f("busy-accuracy-%u-%s",
pct[i], e->name)
- accuracy(fd, e, pct[i]);
+ accuracy(fd, e, pct[i], 10);
}
igt_subtest_f("busy-hang-%s", e->name)
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add detection of changing of edid on between suspend and resume (rev3)
== Series Details ==
Series: drm/i915: Add detection of changing of edid on between suspend and
resume (rev3)
URL : https://patchwork.freedesktop.org/series/47680/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9905 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9905 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9905, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47680/revisions/3/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9905:
=== IGT changes ===
Possible regressions
igt@drv_module_reload@basic-reload-inject:
fi-byt-j1900: PASS -> DMESG-WARN
fi-byt-n2820: PASS -> DMESG-WARN
fi-bsw-n3050: PASS -> DMESG-WARN
igt@gem_exec_suspend@basic-s3:
{fi-kbl-soraka}:NOTRUN -> INCOMPLETE
== Known issues ==
Here are the changes found in Patchwork_9905 that come from known issues:
=== IGT changes ===
Issues hit
igt@debugfs_test@read_all_entries:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
igt@drv_selftest@live_hangcheck:
fi-bdw-5557u: PASS -> DMESG-FAIL (fdo#106560)
{fi-icl-u}: NOTRUN -> INCOMPLETE (fdo#107399)
igt@kms_chamelium@dp-crc-fast:
fi-kbl-7500u: PASS -> DMESG-FAIL (fdo#103841)
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
{fi-byt-clapper}: PASS -> FAIL (fdo#107362)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
{fi-icl-u}: NOTRUN -> DMESG-WARN (fdo#107382) +4
{igt@kms_psr@primary_page_flip}:
{fi-icl-u}: NOTRUN -> FAIL (fdo#107383) +3
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107382 https://bugs.freedesktop.org/show_bug.cgi?id=107382
fdo#107383 https://bugs.freedesktop.org/show_bug.cgi?id=107383
fdo#107399 https://bugs.freedesktop.org/show_bug.cgi?id=107399
== Participating hosts (50 -> 49) ==
Additional (3): fi-kbl-soraka fi-kbl-7560u fi-icl-u
Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4636 -> Patchwork_9905
CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9905: 8c821c599a136252fef8db116c813167dcaa4df4 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8c821c599a13 drm/i915: Add detection of changing of edid on between suspend and
resume
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9905/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] dma-buf: remove shared fence staging in reservation object
== Series Details == Series: series starting with [1/6] dma-buf: remove shared fence staging in reservation object URL : https://patchwork.freedesktop.org/series/47948/ State : failure == Summary == Applying: dma-buf: remove shared fence staging in reservation object Using index info to reconstruct a base tree... M drivers/dma-buf/reservation.c Falling back to patching base and 3-way merge... Auto-merging drivers/dma-buf/reservation.c CONFLICT (content): Merge conflict in drivers/dma-buf/reservation.c error: Failed to merge in the changes. Patch failed at 0001 dma-buf: remove shared fence staging in reservation object Use 'git am --show-current-patch' to see the failed patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Restore user forcewake domains across suspend
On 08/08/2018 22:08, Chris Wilson wrote:
On suspend, we cancel the automatic forcewake and clear all other sources
of forcewake so the machine can sleep before we do suspend. However, we
expose the forcewake to userspace (only via debugfs, but nevertheless we
do) and want to restore that upon resume or else our accounting will be
off and we may not acquire the forcewake before we use it. So record
which domains we cleared on suspend and reacquire them early on resume.
v2: Hold the spinlock to appease our sanitychecks
Reported-by: Imre Deak
Fixes: b8473050805f ("drm/i915: Fix forcewake active domain tracking")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Mika Kuoppala
Cc: Imre Deak
---
drivers/gpu/drm/i915/intel_uncore.c | 44 ++-
drivers/gpu/drm/i915/intel_uncore.h | 1 +
drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +-
3 files changed, 26 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 284be151f645..cf40361fe181 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -369,8 +369,8 @@ intel_uncore_fw_release_timer(struct hrtimer *timer)
}
/* Note callers must have acquired the PUNIT->PMIC bus, before calling this. */
-static void intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv,
-bool restore)
+static unsigned int
+intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv)
{
unsigned long irqflags;
struct intel_uncore_forcewake_domain *domain;
@@ -422,20 +422,11 @@ static void intel_uncore_forcewake_reset(struct
drm_i915_private *dev_priv,
dev_priv->uncore.funcs.force_wake_put(dev_priv, fw);
fw_domains_reset(dev_priv, dev_priv->uncore.fw_domains);
-
- if (restore) { /* If reset with a user forcewake, try to restore */
- if (fw)
- dev_priv->uncore.funcs.force_wake_get(dev_priv, fw);
-
- if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv))
- dev_priv->uncore.fifo_count =
- fifo_free_entries(dev_priv);
- }
-
- if (!restore)
- assert_forcewakes_inactive(dev_priv);
+ assert_forcewakes_inactive(dev_priv);
spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+
+ return fw; /* track the lost user forcewake domains */
}
static u64 gen9_edram_size(struct drm_i915_private *dev_priv)
@@ -544,7 +535,7 @@ check_for_unclaimed_mmio(struct drm_i915_private *dev_priv)
}
static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv,
- bool restore_forcewake)
+ unsigned int restore_forcewake)
{
/* clear out unclaimed reg detection bit */
if (check_for_unclaimed_mmio(dev_priv))
@@ -559,7 +550,17 @@ static void __intel_uncore_early_sanitize(struct
drm_i915_private *dev_priv,
}
iosf_mbi_punit_acquire();
- intel_uncore_forcewake_reset(dev_priv, restore_forcewake);
+ intel_uncore_forcewake_reset(dev_priv);
+ if (restore_forcewake) {
+ spin_lock_irq(_priv->uncore.lock);
+ dev_priv->uncore.funcs.force_wake_get(dev_priv,
+ restore_forcewake);
+
+ if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv))
+ dev_priv->uncore.fifo_count =
+ fifo_free_entries(dev_priv);
+ spin_unlock_irq(_priv->uncore.lock);
+ }
iosf_mbi_punit_release();
}
@@ -568,13 +569,16 @@ void intel_uncore_suspend(struct drm_i915_private *dev_priv)
iosf_mbi_punit_acquire();
iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
_priv->uncore.pmic_bus_access_nb);
- intel_uncore_forcewake_reset(dev_priv, false);
+ dev_priv->uncore.fw_domains_user =
+ intel_uncore_forcewake_reset(dev_priv);
iosf_mbi_punit_release();
}
void intel_uncore_resume_early(struct drm_i915_private *dev_priv)
{
- __intel_uncore_early_sanitize(dev_priv, true);
+ __intel_uncore_early_sanitize(dev_priv,
+ dev_priv->uncore.fw_domains_user);
+
iosf_mbi_register_pmic_bus_access_notifier(
_priv->uncore.pmic_bus_access_nb);
i915_check_and_clear_faults(dev_priv);
@@ -1555,7 +1559,7 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
intel_uncore_edram_detect(dev_priv);
intel_uncore_fw_domains_init(dev_priv);
- __intel_uncore_early_sanitize(dev_priv, false);
+ __intel_uncore_early_sanitize(dev_priv, 0);
I wonder if a tweak to not have a parameter but function acts on
uncore.fw_domains_user on it's own, and consumes it after restoring form
it. But it is just a
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev4)
== Series Details == Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev4) URL : https://patchwork.freedesktop.org/series/47897/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4636_full -> Patchwork_9904_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9904_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9904_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9904_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_9904_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_workarounds: shard-kbl: PASS -> DMESG-FAIL (fdo#107292) igt@gem_exec_schedule@deep-bsd2: shard-snb: SKIP -> INCOMPLETE (fdo#105411) igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) Possible fixes igt@gem_exec_suspend@basic-s3: shard-snb: INCOMPLETE (fdo#105411) -> PASS igt@gem_workarounds@suspend-resume: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_busy@extended-pageflip-hang-oldfb-render-a: shard-apl: DMESG-WARN (fdo#106247) -> PASS igt@pm_rpm@cursor-dpms: shard-glk: WARN -> PASS igt@pm_rpm@dpms-mode-unset-non-lpsp: shard-apl: FAIL (fdo#106539) -> PASS +3 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247 fdo#106539 https://bugs.freedesktop.org/show_bug.cgi?id=106539 fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4636 -> Patchwork_9904 CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9904: 424835b61710029d4162cd6b45a52aa43ca77b89 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9904/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/6] dma-buf: add writes_only flag to reservation_object_get_fences_rcu
That allows us to only retreive fences of write operations.
Signed-off-by: Christian König
---
drivers/dma-buf/reservation.c| 19 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 3 ++-
drivers/gpu/drm/i915/i915_gem.c | 4 ++--
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/i915_sw_fence.c | 2 +-
include/linux/reservation.h | 1 +
9 files changed, 27 insertions(+), 12 deletions(-)
diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c
index 0f98384b86d4..f5dc17aa5efb 100644
--- a/drivers/dma-buf/reservation.c
+++ b/drivers/dma-buf/reservation.c
@@ -316,6 +316,7 @@ EXPORT_SYMBOL(reservation_object_copy_fences);
* reservation_object_get_fences_rcu - Get an object's shared and exclusive
* fences without update side lock held
* @obj: the reservation object
+ * @writes_only: if true then only write operations are returned
* @pfence_excl: the returned exclusive fence (or NULL)
* @pshared_count: the number of shared fences returned
* @pshared: the array of shared fence ptrs returned (array is krealloc'd to
@@ -326,6 +327,7 @@ EXPORT_SYMBOL(reservation_object_copy_fences);
* shared fences as well. Returns either zero or -ENOMEM.
*/
int reservation_object_get_fences_rcu(struct reservation_object *obj,
+ bool writes_only,
struct dma_fence **pfence_excl,
unsigned *pshared_count,
struct dma_fence ***pshared)
@@ -358,6 +360,7 @@ int reservation_object_get_fences_rcu(struct
reservation_object *obj,
if (sz) {
struct dma_fence **nshared;
+ unsigned int j;
nshared = krealloc(shared, sz,
GFP_NOWAIT | __GFP_NOWARN);
@@ -374,13 +377,20 @@ int reservation_object_get_fences_rcu(struct
reservation_object *obj,
}
shared = nshared;
shared_count = fobj ? fobj->shared_count : 0;
- for (i = 0; i < shared_count; ++i) {
- void *e = rcu_dereference(fobj->shared[i]);
+ for (i = 0, j = 0; j < shared_count; ++j) {
+ void *e = rcu_dereference(fobj->shared[j]);
+
+ if (writes_only &&
+ !reservation_object_shared_is_write(e))
+ continue;
shared[i] = reservation_object_shared_fence(e);
if (!dma_fence_get_rcu(shared[i]))
- break;
+ goto drop_references;
+
+ i++;
}
+ shared_count = i;
if (!pfence_excl && fence_excl) {
shared[i] = fence_excl;
@@ -390,7 +400,8 @@ int reservation_object_get_fences_rcu(struct
reservation_object *obj,
}
}
- if (i != shared_count || read_seqcount_retry(>seq, seq)) {
+ if (read_seqcount_retry(>seq, seq)) {
+drop_references:
while (i--)
dma_fence_put(shared[i]);
dma_fence_put(fence_excl);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 7d6a36bca9dd..a6d2ba4b4d2d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -200,7 +200,8 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc
*crtc,
goto unpin;
}
- r = reservation_object_get_fences_rcu(new_abo->tbo.resv, >excl,
+ r = reservation_object_get_fences_rcu(new_abo->tbo.resv, false,
+ >excl,
>shared_count,
>shared);
if (unlikely(r != 0)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
index 3a072a7a39f0..82de4eb38dff 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
@@ -112,7 +112,8 @@ void amdgpu_pasid_free_delayed(struct reservation_object
*resv,
unsigned count;
int r;
- r = reservation_object_get_fences_rcu(resv, NULL, , );
+ r = reservation_object_get_fences_rcu(resv, false, NULL,
+ , );
if (r)
[Intel-gfx] [PATCH 1/6] dma-buf: remove shared fence staging in reservation object
No need for that any more. Just replace the list when there isn't enough
room any more for at least one additional fence.
Signed-off-by: Christian König
---
drivers/dma-buf/reservation.c | 180 ++
include/linux/reservation.h | 4 -
2 files changed, 60 insertions(+), 124 deletions(-)
diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c
index 314eb1071cce..1f0c61b540ba 100644
--- a/drivers/dma-buf/reservation.c
+++ b/drivers/dma-buf/reservation.c
@@ -68,104 +68,23 @@ EXPORT_SYMBOL(reservation_seqcount_string);
*/
int reservation_object_reserve_shared(struct reservation_object *obj)
{
- struct reservation_object_list *fobj, *old;
- u32 max;
+ struct reservation_object_list *old, *new;
+ unsigned int i, j, k, max;
old = reservation_object_get_list(obj);
if (old && old->shared_max) {
- if (old->shared_count < old->shared_max) {
- /* perform an in-place update */
- kfree(obj->staged);
- obj->staged = NULL;
+ if (old->shared_count < old->shared_max)
return 0;
- } else
+ else
max = old->shared_max * 2;
- } else
- max = 4;
-
- /*
-* resize obj->staged or allocate if it doesn't exist,
-* noop if already correct size
-*/
- fobj = krealloc(obj->staged, offsetof(typeof(*fobj), shared[max]),
- GFP_KERNEL);
- if (!fobj)
- return -ENOMEM;
-
- obj->staged = fobj;
- fobj->shared_max = max;
- return 0;
-}
-EXPORT_SYMBOL(reservation_object_reserve_shared);
-
-static void
-reservation_object_add_shared_inplace(struct reservation_object *obj,
- struct reservation_object_list *fobj,
- struct dma_fence *fence)
-{
- struct dma_fence *signaled = NULL;
- u32 i, signaled_idx;
-
- dma_fence_get(fence);
-
- preempt_disable();
- write_seqcount_begin(>seq);
-
- for (i = 0; i < fobj->shared_count; ++i) {
- struct dma_fence *old_fence;
-
- old_fence = rcu_dereference_protected(fobj->shared[i],
- reservation_object_held(obj));
-
- if (old_fence->context == fence->context) {
- /* memory barrier is added by write_seqcount_begin */
- RCU_INIT_POINTER(fobj->shared[i], fence);
- write_seqcount_end(>seq);
- preempt_enable();
-
- dma_fence_put(old_fence);
- return;
- }
-
- if (!signaled && dma_fence_is_signaled(old_fence)) {
- signaled = old_fence;
- signaled_idx = i;
- }
- }
-
- /*
-* memory barrier is added by write_seqcount_begin,
-* fobj->shared_count is protected by this lock too
-*/
- if (signaled) {
- RCU_INIT_POINTER(fobj->shared[signaled_idx], fence);
} else {
- RCU_INIT_POINTER(fobj->shared[fobj->shared_count], fence);
- fobj->shared_count++;
+ max = 4;
}
- write_seqcount_end(>seq);
- preempt_enable();
-
- dma_fence_put(signaled);
-}
-
-static void
-reservation_object_add_shared_replace(struct reservation_object *obj,
- struct reservation_object_list *old,
- struct reservation_object_list *fobj,
- struct dma_fence *fence)
-{
- unsigned i, j, k;
-
- dma_fence_get(fence);
-
- if (!old) {
- RCU_INIT_POINTER(fobj->shared[0], fence);
- fobj->shared_count = 1;
- goto done;
- }
+ new = kmalloc(offsetof(typeof(*new), shared[max]), GFP_KERNEL);
+ if (!new)
+ return -ENOMEM;
/*
* no need to bump fence refcounts, rcu_read access
@@ -173,46 +92,45 @@ reservation_object_add_shared_replace(struct
reservation_object *obj,
* references from the old struct are carried over to
* the new.
*/
- for (i = 0, j = 0, k = fobj->shared_max; i < old->shared_count; ++i) {
- struct dma_fence *check;
-
- check = rcu_dereference_protected(old->shared[i],
- reservation_object_held(obj));
+ for (i = 0, j = 0, k = max; i < (old ? old->shared_count : 0); ++i) {
+ struct dma_fence *fence;
- if (check->context == fence->context ||
- dma_fence_is_signaled(check))
- RCU_INIT_POINTER(fobj->shared[--k], check);
+ fence =
[Intel-gfx] [PATCH 3/6] dma-buf: add is_write to reservation_object_add_shared_fence
Note if the added fence is a write by using the lsb in the fenc pointer.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c| 8 +++-
drivers/dma-buf/reservation.c| 59 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 3 +-
drivers/gpu/drm/i915/i915_gem.c | 6 ++-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
drivers/gpu/drm/msm/msm_gem.c| 3 +-
drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +-
drivers/gpu/drm/qxl/qxl_release.c| 3 +-
drivers/gpu/drm/radeon/radeon_object.c | 2 +-
drivers/gpu/drm/ttm/ttm_bo.c | 2 +-
drivers/gpu/drm/ttm/ttm_execbuf_util.c | 3 +-
drivers/gpu/drm/vc4/vc4_gem.c| 3 +-
drivers/gpu/drm/vgem/vgem_fence.c| 2 +-
include/linux/reservation.h | 20 +++---
15 files changed, 76 insertions(+), 44 deletions(-)
diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index 13884474d158..6b816cd505d6 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -244,7 +244,10 @@ static __poll_t dma_buf_poll(struct file *file, poll_table
*poll)
goto out;
for (i = 0; i < shared_count; ++i) {
- struct dma_fence *fence =
rcu_dereference(fobj->shared[i]);
+ struct dma_fence *fence;
+
+ fence = reservation_object_shared_fence(
+ rcu_dereference(fobj->shared[i]));
if (!dma_fence_get_rcu(fence)) {
/*
@@ -1062,7 +1065,8 @@ static int dma_buf_debug_show(struct seq_file *s, void
*unused)
fence->ops->get_timeline_name(fence),
dma_fence_is_signaled(fence) ? "" : "un");
for (i = 0; i < shared_count; i++) {
- fence = rcu_dereference(fobj->shared[i]);
+ fence = reservation_object_shared_fence(
+ rcu_dereference(fobj->shared[i]));
if (!dma_fence_get_rcu(fence))
continue;
seq_printf(s, "\tShared fence: %s %s %ssignalled\n",
diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c
index 1f0c61b540ba..0f98384b86d4 100644
--- a/drivers/dma-buf/reservation.c
+++ b/drivers/dma-buf/reservation.c
@@ -93,14 +93,14 @@ int reservation_object_reserve_shared(struct
reservation_object *obj)
* the new.
*/
for (i = 0, j = 0, k = max; i < (old ? old->shared_count : 0); ++i) {
- struct dma_fence *fence;
+ void *e;
- fence = rcu_dereference_protected(old->shared[i],
- reservation_object_held(obj));
- if (dma_fence_is_signaled(fence))
- RCU_INIT_POINTER(new->shared[--k], fence);
+ e = rcu_dereference_protected(old->shared[i],
+ reservation_object_held(obj));
+ if (dma_fence_is_signaled(reservation_object_shared_fence(e)))
+ RCU_INIT_POINTER(new->shared[--k], e);
else
- RCU_INIT_POINTER(new->shared[j++], fence);
+ RCU_INIT_POINTER(new->shared[j++], e);
}
new->shared_count = j;
new->shared_max = max;
@@ -120,11 +120,11 @@ int reservation_object_reserve_shared(struct
reservation_object *obj)
/* Drop the references to the signaled fences */
for (i = k; i < new->shared_max; ++i) {
- struct dma_fence *fence;
+ void *e;
- fence = rcu_dereference_protected(new->shared[i],
- reservation_object_held(obj));
- dma_fence_put(fence);
+ e = rcu_dereference_protected(new->shared[i],
+ reservation_object_held(obj));
+ dma_fence_put(reservation_object_shared_fence(e));
}
kfree_rcu(old, rcu);
@@ -141,7 +141,8 @@ EXPORT_SYMBOL(reservation_object_reserve_shared);
* reservation_object_reserve_shared() has been called.
*/
void reservation_object_add_shared_fence(struct reservation_object *obj,
-struct dma_fence *fence)
+struct dma_fence *fence,
+bool is_write)
{
struct reservation_object_list *fobj;
unsigned int i;
@@ -155,13 +156,17 @@ void reservation_object_add_shared_fence(struct
reservation_object *obj,
for (i = 0; i < fobj->shared_count; ++i) {
struct dma_fence *old_fence;
+ void *e;
-
[Intel-gfx] [PATCH 2/6] dma-buf: add reservation object shared fence accessor
Add a helper to access the shared fences in an reservation object.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 7 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 3 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/msm/msm_gem.c| 4 ++--
drivers/gpu/drm/nouveau/nouveau_fence.c | 3 +--
drivers/gpu/drm/radeon/radeon_sync.c | 3 +--
drivers/gpu/drm/ttm/ttm_bo.c | 4 +---
include/linux/reservation.h | 19 +++
8 files changed, 29 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index fa38a960ce00..989932234160 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -238,9 +238,7 @@ static int amdgpu_amdkfd_remove_eviction_fence(struct
amdgpu_bo *bo,
for (i = 0; i < shared_count; ++i) {
struct dma_fence *f;
- f = rcu_dereference_protected(fobj->shared[i],
- reservation_object_held(resv));
-
+ f = reservation_object_get_shared_fence(resv, fobj, i);
if (ef) {
if (f->context == ef->base.context) {
dma_fence_put(f);
@@ -273,8 +271,7 @@ static int amdgpu_amdkfd_remove_eviction_fence(struct
amdgpu_bo *bo,
struct dma_fence *f;
struct amdgpu_amdkfd_fence *efence;
- f = rcu_dereference_protected(fobj->shared[i],
- reservation_object_held(resv));
+ f = reservation_object_get_shared_fence(resv, fobj, i);
efence = to_amdgpu_amdkfd_fence(f);
if (efence) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index 2d6f5ec77a68..dbfd62ab67e4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -212,8 +212,7 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
return r;
for (i = 0; i < flist->shared_count; ++i) {
- f = rcu_dereference_protected(flist->shared[i],
- reservation_object_held(resv));
+ f = reservation_object_get_shared_fence(resv, flist, i);
/* We only want to trigger KFD eviction fences on
* evict or move jobs. Skip KFD fences otherwise.
*/
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index c6611cff64c8..22896a398eab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1482,8 +1482,8 @@ static bool amdgpu_ttm_bo_eviction_valuable(struct
ttm_buffer_object *bo,
flist = reservation_object_get_list(bo->resv);
if (flist) {
for (i = 0; i < flist->shared_count; ++i) {
- f = rcu_dereference_protected(flist->shared[i],
- reservation_object_held(bo->resv));
+ f = reservation_object_get_shared_fence(bo->resv,
+ flist, i);
if (amdkfd_fence_check_mm(f, current->mm))
return false;
}
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index f583bb4222f9..95d25dbfde2b 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -651,8 +651,8 @@ int msm_gem_sync_object(struct drm_gem_object *obj,
return 0;
for (i = 0; i < fobj->shared_count; i++) {
- fence = rcu_dereference_protected(fobj->shared[i],
-
reservation_object_held(msm_obj->resv));
+ fence = reservation_object_get_shared_fence(msm_obj->resv,
+ fobj, i);
if (fence->context != fctx->context) {
ret = dma_fence_wait(fence, true);
if (ret)
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c
b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 412d49bc6e56..3ce921c276c1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -376,8 +376,7 @@ nouveau_fence_sync(struct nouveau_bo *nvbo, struct
nouveau_channel *chan, bool e
struct nouveau_channel *prev = NULL;
bool must_wait = true;
- fence = rcu_dereference_protected(fobj->shared[i],
- reservation_object_held(resv));
+ fence = reservation_object_get_shared_fence(resv, fobj, i);
f =
[Intel-gfx] [PATCH 6/6] drm/amdgpu: remove exclusive fence workaround
We now note that all fences are potential writers.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 24
5 files changed, 4 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
index d472a2c8399f..eee17ea7cf8b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
@@ -115,7 +115,7 @@ int amdgpu_bo_list_create(struct amdgpu_device *adev,
struct drm_file *filp,
entry->priority = min(info[i].bo_priority,
AMDGPU_BO_LIST_MAX_PRIORITY);
entry->tv.bo = >robj->tbo;
- entry->tv.shared = !entry->robj->prime_shared_count;
+ entry->tv.shared = true;
if (entry->robj->preferred_domains == AMDGPU_GEM_DOMAIN_GDS)
list->gds_obj = entry->robj;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 71792d820ae0..b52626754598 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -716,7 +716,8 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
break;
}
case AMDGPU_GEM_OP_SET_PLACEMENT:
- if (robj->prime_shared_count && (args->value &
AMDGPU_GEM_DOMAIN_VRAM)) {
+ if (robj->gem_base.import_attach &&
+ args->value & AMDGPU_GEM_DOMAIN_VRAM) {
r = -EINVAL;
amdgpu_bo_unreserve(robj);
break;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 303143b89275..8f2346da111f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -883,7 +883,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32
domain,
return -EINVAL;
/* A shared bo cannot be migrated to VRAM */
- if (bo->prime_shared_count) {
+ if (bo->gem_base.import_attach) {
if (domain & AMDGPU_GEM_DOMAIN_GTT)
domain = AMDGPU_GEM_DOMAIN_GTT;
else
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 18945dd6982d..0a3635c0def3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -88,7 +88,6 @@ struct amdgpu_bo {
u64 metadata_flags;
void*metadata;
u32 metadata_size;
- unsignedprime_shared_count;
/* list of all virtual address to which this bo is associated to */
struct list_headva;
/* Constant after initialization */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
index 2686297e34e0..bb8de0566bfa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
@@ -178,8 +178,6 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
bo->tbo.ttm->sg = sg;
bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
bo->preferred_domains = AMDGPU_GEM_DOMAIN_GTT;
- if (attach->dmabuf->ops != _dmabuf_ops)
- bo->prime_shared_count = 1;
ww_mutex_unlock(>lock);
return >gem_base;
@@ -206,7 +204,6 @@ static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
{
struct drm_gem_object *obj = dma_buf->priv;
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
- struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
long r;
r = drm_gem_map_attach(dma_buf, attach);
@@ -217,29 +214,11 @@ static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
if (unlikely(r != 0))
goto error_detach;
-
- if (attach->dev->driver != adev->dev->driver) {
- /*
-* Wait for all shared fences to complete before we switch to
future
-* use of exclusive fence on this prime shared bo.
-*/
- r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
- true, false,
- MAX_SCHEDULE_TIMEOUT);
- if (unlikely(r < 0)) {
- DRM_DEBUG_PRIME("Fence wait failed: %li\n", r);
- goto error_unreserve;
- }
- }
-
/* pin buffer into GTT */
r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
if (r)
[Intel-gfx] [PATCH 5/6] drm/i915: wait for write fences before pflip
Wait for all write operations before page flipping.
Signed-off-by: Christian König
---
drivers/gpu/drm/i915/intel_display.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 2c16c3a3cdea..154dc86062a3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -48,6 +48,7 @@
#include
#include
#include
+#include
/* Primary plane formats for gen <= 3 */
static const uint32_t i8xx_primary_formats[] = {
@@ -13022,7 +13023,8 @@ intel_prepare_plane_fb(struct drm_plane *plane,
intel_fb_obj_flush(obj, ORIGIN_DIRTYFB);
if (!new_state->fence) { /* implicit fencing */
- struct dma_fence *fence;
+ struct dma_fence *fence, **fences;
+ unsigned count;
ret =
i915_sw_fence_await_reservation(_state->commit_ready,
obj->resv, NULL,
@@ -13031,7 +13033,29 @@ intel_prepare_plane_fb(struct drm_plane *plane,
if (ret < 0)
return ret;
- fence = reservation_object_get_excl_rcu(obj->resv);
+ ret = reservation_object_get_fences_rcu(obj->resv, true, NULL,
+ , );
+ if (ret)
+ return ret;
+
+ if (count == 0) {
+ fence = NULL;
+ } else if (count == 1) {
+ fence = fences[0];
+ kfree(fences);
+ } else {
+ uint64_t context = dma_fence_context_alloc(1);
+ struct dma_fence_array *array;
+
+ array = dma_fence_array_create(count, fences, context,
+ 1, false);
+ if (!array) {
+ kfree(fences);
+ return -ENOMEM;
+ }
+ fence = >base;
+ }
+
if (fence) {
add_rps_boost_after_vblank(new_state->crtc, fence);
dma_fence_put(fence);
--
2.14.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] RFC: Add write flag to reservation object fences
Hi everyone, This set of patches tries to improve read after write hazard handling for reservation objects. It allows us to specify for each shared fence if it represents a write operation. Based on this the i915 driver is modified to always wait for all writes before pageflip and the previously used workaround is removed from amdgpu. Please comment, Christian. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add detection of changing of edid on between suspend and resume (rev3)
== Series Details == Series: drm/i915: Add detection of changing of edid on between suspend and resume (rev3) URL : https://patchwork.freedesktop.org/series/47680/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8c821c599a13 drm/i915: Add detection of changing of edid on between suspend and resume -:15: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #15: 3) unplug 1)'s display device and plug the other display device to a connector total: 0 errors, 1 warnings, 0 checks, 96 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Restore user forcewake domains across suspend
On Wed, Aug 08, 2018 at 10:08:42PM +0100, Chris Wilson wrote:
> On suspend, we cancel the automatic forcewake and clear all other sources
> of forcewake so the machine can sleep before we do suspend. However, we
> expose the forcewake to userspace (only via debugfs, but nevertheless we
> do) and want to restore that upon resume or else our accounting will be
> off and we may not acquire the forcewake before we use it. So record
> which domains we cleared on suspend and reacquire them early on resume.
>
> v2: Hold the spinlock to appease our sanitychecks
>
> Reported-by: Imre Deak
> Fixes: b8473050805f ("drm/i915: Fix forcewake active domain tracking")
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Cc: Mika Kuoppala
> Cc: Imre Deak
The issue happens to fix itself by the first reg access needing an auto
FW during resume, but such an access isn't guaranteed:
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 44 ++-
> drivers/gpu/drm/i915/intel_uncore.h | 1 +
> drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +-
> 3 files changed, 26 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
> b/drivers/gpu/drm/i915/intel_uncore.c
> index 284be151f645..cf40361fe181 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -369,8 +369,8 @@ intel_uncore_fw_release_timer(struct hrtimer *timer)
> }
>
> /* Note callers must have acquired the PUNIT->PMIC bus, before calling this.
> */
> -static void intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv,
> - bool restore)
> +static unsigned int
> +intel_uncore_forcewake_reset(struct drm_i915_private *dev_priv)
> {
> unsigned long irqflags;
> struct intel_uncore_forcewake_domain *domain;
> @@ -422,20 +422,11 @@ static void intel_uncore_forcewake_reset(struct
> drm_i915_private *dev_priv,
> dev_priv->uncore.funcs.force_wake_put(dev_priv, fw);
>
> fw_domains_reset(dev_priv, dev_priv->uncore.fw_domains);
> -
> - if (restore) { /* If reset with a user forcewake, try to restore */
> - if (fw)
> - dev_priv->uncore.funcs.force_wake_get(dev_priv, fw);
> -
> - if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv))
> - dev_priv->uncore.fifo_count =
> - fifo_free_entries(dev_priv);
> - }
> -
> - if (!restore)
> - assert_forcewakes_inactive(dev_priv);
> + assert_forcewakes_inactive(dev_priv);
>
> spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
> +
> + return fw; /* track the lost user forcewake domains */
> }
>
> static u64 gen9_edram_size(struct drm_i915_private *dev_priv)
> @@ -544,7 +535,7 @@ check_for_unclaimed_mmio(struct drm_i915_private
> *dev_priv)
> }
>
> static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv,
> - bool restore_forcewake)
> + unsigned int restore_forcewake)
> {
> /* clear out unclaimed reg detection bit */
> if (check_for_unclaimed_mmio(dev_priv))
> @@ -559,7 +550,17 @@ static void __intel_uncore_early_sanitize(struct
> drm_i915_private *dev_priv,
> }
>
> iosf_mbi_punit_acquire();
> - intel_uncore_forcewake_reset(dev_priv, restore_forcewake);
> + intel_uncore_forcewake_reset(dev_priv);
> + if (restore_forcewake) {
> + spin_lock_irq(_priv->uncore.lock);
> + dev_priv->uncore.funcs.force_wake_get(dev_priv,
> + restore_forcewake);
> +
> + if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv))
> + dev_priv->uncore.fifo_count =
> + fifo_free_entries(dev_priv);
> + spin_unlock_irq(_priv->uncore.lock);
> + }
> iosf_mbi_punit_release();
> }
>
> @@ -568,13 +569,16 @@ void intel_uncore_suspend(struct drm_i915_private
> *dev_priv)
> iosf_mbi_punit_acquire();
> iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
> _priv->uncore.pmic_bus_access_nb);
> - intel_uncore_forcewake_reset(dev_priv, false);
> + dev_priv->uncore.fw_domains_user =
> + intel_uncore_forcewake_reset(dev_priv);
> iosf_mbi_punit_release();
> }
>
> void intel_uncore_resume_early(struct drm_i915_private *dev_priv)
> {
> - __intel_uncore_early_sanitize(dev_priv, true);
> + __intel_uncore_early_sanitize(dev_priv,
> + dev_priv->uncore.fw_domains_user);
> +
> iosf_mbi_register_pmic_bus_access_notifier(
> _priv->uncore.pmic_bus_access_nb);
> i915_check_and_clear_faults(dev_priv);
> @@ -1555,7 +1559,7 @@ void intel_uncore_init(struct drm_i915_private
> *dev_priv)
>
> intel_uncore_edram_detect(dev_priv);
>
[Intel-gfx] [v3] drm/i915: Add detection of changing of edid on between suspend and resume
The hotplug detection routine of i915 uses drm_helper_hpd_irq_event(). This
helper can detect changing of status of connector, but it can not detect
changing of edid.
Following scenario requires detection of changing of edid.
1) plug display device to a connector
2) system suspend
3) unplug 1)'s display device and plug the other display device to a connector
4) system resume
It adds edid check routine when a connector status still remains as
"connector_status_connected".
v2: Add NULL check before comparing of EDIDs.
Testcase: igt/kms_chamelium/hdmi-edid-change-during-hibernate
Testcase: igt/kms_chamelium/hdmi-edid-change-during-suspend
Testcase: igt/kms_chamelium/dp-edid-change-during-hibernate
Testcase: igt/kms_chamelium/dp-edid-change-during-suspend
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/intel_hotplug.c | 84 +++-
1 file changed, 83 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_hotplug.c
b/drivers/gpu/drm/i915/intel_hotplug.c
index 648a13c6043c..965f2d771fc0 100644
--- a/drivers/gpu/drm/i915/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/intel_hotplug.c
@@ -507,6 +507,88 @@ void intel_hpd_init(struct drm_i915_private *dev_priv)
}
}
+/**
+ * intel_hpd_irq_event - hotplug processing
+ * @dev: drm_device
+ *
+ * Drivers can use this function to run a detect cycle on all connectors which
+ * have the DRM_CONNECTOR_POLL_HPD flag set in their member. All other
+ * connectors are ignored, which is useful to avoid reprobing fixed panels.
+ *
+ * This function is useful for drivers which can't or don't track hotplug
interrupts
+ * for each connector. This function is based on drm_helper_hpd_irq_event()
helper
+ * function and besides it adds edid check routine when a connector status
still
+ * remains as "connector_status_connected".
+ *
+ * Following scenario requires detection of changing of edid.
+ * 1) plug display device to a connector
+ * 2) system suspend
+ * 3) unplug 1)'s display device and plug the other display device to a
connector
+ * 4) system resume
+
+ * This function must be called from process context with no mode
+ * setting locks held.
+ *
+ * Note that a connector can be both polled and probed from the hotplug
handler,
+ * in case the hotplug interrupt is known to be unreliable.
+ */
+static bool intel_hpd_irq_event(struct drm_device *dev)
+{
+ struct drm_connector *connector;
+ struct drm_connector_list_iter conn_iter;
+ enum drm_connector_status old_status, cur_status;
+ struct edid *old_edid;
+ bool changed = false;
+
+ if (!dev->mode_config.poll_enabled)
+ return false;
+
+ mutex_lock(>mode_config.mutex);
+ drm_connector_list_iter_begin(dev, _iter);
+ drm_for_each_connector_iter(connector, _iter) {
+ /* Only handle HPD capable connectors. */
+ if (!(connector->polled & DRM_CONNECTOR_POLL_HPD))
+ continue;
+
+ old_status = connector->status;
+ old_edid = to_intel_connector(connector)->detect_edid;
+
+ cur_status = drm_helper_probe_detect(connector, NULL, false);
+ DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to
%s\n",
+ connector->base.id, connector->name,
+ drm_get_connector_status_name(old_status),
+ drm_get_connector_status_name(cur_status));
+
+ if (old_status != cur_status)
+ changed = true;
+
+ /* Check changing of edid when a connector status still remains
+* as "connector_status_connected".
+*/
+ if (old_status == cur_status &&
+ cur_status == connector_status_connected) {
+ struct edid *cur_edid =
to_intel_connector(connector)->detect_edid;
+
+ if (!old_edid || !cur_edid)
+ continue;
+
+ if (memcmp(old_edid, cur_edid, sizeof(*cur_edid))) {
+ changed = true;
+ DRM_DEBUG_KMS("[CONNECTOR:%d:%s] edid
updated\n",
+ connector->base.id,
+ connector->name);
+ }
+ }
+ }
+ drm_connector_list_iter_end(_iter);
+ mutex_unlock(>mode_config.mutex);
+
+ if (changed)
+ drm_kms_helper_hotplug_event(dev);
+
+ return changed;
+}
+
static void i915_hpd_poll_init_work(struct work_struct *work)
{
struct drm_i915_private *dev_priv =
@@ -552,7 +634,7 @@ static void i915_hpd_poll_init_work(struct work_struct
*work)
* in the middle of disabling polling
*/
if (!enabled)
- drm_helper_hpd_irq_event(dev);
+ intel_hpd_irq_event(dev);
}
/**
--
2.18.0
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev4)
== Series Details ==
Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is
active (rev4)
URL : https://patchwork.freedesktop.org/series/47897/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9904 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47897/revisions/4/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9904:
=== IGT changes ===
Possible regressions
igt@gem_exec_suspend@basic-s3:
{fi-kbl-soraka}:NOTRUN -> INCOMPLETE
== Known issues ==
Here are the changes found in Patchwork_9904 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_module_reload@basic-reload-inject:
fi-hsw-4770r: PASS -> DMESG-WARN (fdo#107425)
igt@drv_selftest@live_hangcheck:
fi-skl-guc: PASS -> DMESG-FAIL (fdo#107174)
{fi-icl-u}: NOTRUN -> INCOMPLETE (fdo#107399)
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
{fi-icl-u}: NOTRUN -> DMESG-WARN (fdo#107382) +4
{igt@kms_psr@primary_page_flip}:
{fi-icl-u}: NOTRUN -> FAIL (fdo#107383) +3
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
fdo#107382 https://bugs.freedesktop.org/show_bug.cgi?id=107382
fdo#107383 https://bugs.freedesktop.org/show_bug.cgi?id=107383
fdo#107399 https://bugs.freedesktop.org/show_bug.cgi?id=107399
fdo#107425 https://bugs.freedesktop.org/show_bug.cgi?id=107425
== Participating hosts (50 -> 49) ==
Additional (3): fi-kbl-soraka fi-kbl-7560u fi-icl-u
Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4636 -> Patchwork_9904
CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9904: 424835b61710029d4162cd6b45a52aa43ca77b89 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
424835b61710 drm/i915/tracing: Enable user interrupts while intel_engine_notify
is active
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9904/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold rpm for unparking
Chris Wilson writes:
> The call to i915_gem_unpark() checks that we hold a rpm wakeref before
> taking a long term wakeref for i915->gt.awake. We should therefore make
> sure we do hold the wakeref when directly calling unpark to disable
> the retire worker.
>
> Fixes: 932cac10c8fb ("drm/i915/selftests: Prevent background reaping of
> active objects")
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> Cc: Matthew Auld
Reviewed-by: Mika Kuoppala
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold rpm for unparking
Quoting Mika Kuoppala (2018-08-09 11:40:35) > Chris Wilson writes: > > > The call to i915_gem_unpark() checks that we hold a rpm wakeref before > > taking a long term wakeref for i915->gt.awake. We should therefore make > > sure we do hold the wakeref when directly calling unpark to disable > > the retire worker. > > We as a caller need to hold the rpm as i915_gem_unpark does > intel_runtime_pm_get_noresume() ? Correct. noresume says that the caller must have down the synchronous rpm_get for us. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold rpm for unparking
Chris Wilson writes:
> The call to i915_gem_unpark() checks that we hold a rpm wakeref before
> taking a long term wakeref for i915->gt.awake. We should therefore make
> sure we do hold the wakeref when directly calling unpark to disable
> the retire worker.
We as a caller need to hold the rpm as i915_gem_unpark does
intel_runtime_pm_get_noresume() ?
As I don't see any other checks before gt.awake being set.
-Mika
>
> Fixes: 932cac10c8fb ("drm/i915/selftests: Prevent background reaping of
> active objects")
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> Cc: Matthew Auld
> ---
> .../gpu/drm/i915/selftests/i915_gem_object.c | 20 +--
> 1 file changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> index d9eca1b02aee..6d3516d5bff9 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> @@ -499,6 +499,19 @@ static bool assert_mmap_offset(struct drm_i915_private
> *i915,
> return err == expected;
> }
>
> +static void disable_retire_worker(struct drm_i915_private *i915)
> +{
> + mutex_lock(>drm.struct_mutex);
> + if (!i915->gt.active_requests++) {
> + intel_runtime_pm_get(i915);
> + i915_gem_unpark(i915);
> + intel_runtime_pm_put(i915);
> + }
> + mutex_unlock(>drm.struct_mutex);
> + cancel_delayed_work_sync(>gt.retire_work);
> + cancel_delayed_work_sync(>gt.idle_work);
> +}
> +
> static int igt_mmap_offset_exhaustion(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> @@ -509,12 +522,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
> int loop, err;
>
> /* Disable background reaper */
> - mutex_lock(>drm.struct_mutex);
> - if (!i915->gt.active_requests++)
> - i915_gem_unpark(i915);
> - mutex_unlock(>drm.struct_mutex);
> - cancel_delayed_work_sync(>gt.retire_work);
> - cancel_delayed_work_sync(>gt.idle_work);
> + disable_retire_worker(i915);
> GEM_BUG_ON(!i915->gt.awake);
>
> /* Trim the device mmap space to only a page */
> --
> 2.18.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev4)
== Series Details == Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev4) URL : https://patchwork.freedesktop.org/series/47897/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/tracing: Enable user interrupts while intel_engine_notify is active -drivers/gpu/drm/i915/selftests/../i915_drv.h:3675:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3677:16: warning: expression using sizeof(void) +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000 becomes 0) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev4)
== Series Details ==
Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is
active (rev4)
URL : https://patchwork.freedesktop.org/series/47897/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
424835b61710 drm/i915/tracing: Enable user interrupts while intel_engine_notify
is active
-:165: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#165: FILE: drivers/gpu/drm/i915/i915_trace.h:788:
+ TP_STRUCT__entry(
-:166: ERROR:CODE_INDENT: code indent should use tabs where possible
#166: FILE: drivers/gpu/drm/i915/i915_trace.h:789:
+^I^I^I__field(u32, dev)$
-:167: ERROR:CODE_INDENT: code indent should use tabs where possible
#167: FILE: drivers/gpu/drm/i915/i915_trace.h:790:
+^I^I^I__field(u16, class)$
-:168: ERROR:CODE_INDENT: code indent should use tabs where possible
#168: FILE: drivers/gpu/drm/i915/i915_trace.h:791:
+^I^I^I__field(u16, instance)$
-:169: ERROR:CODE_INDENT: code indent should use tabs where possible
#169: FILE: drivers/gpu/drm/i915/i915_trace.h:792:
+^I^I^I__field(u32, seqno)$
-:170: ERROR:CODE_INDENT: code indent should use tabs where possible
#170: FILE: drivers/gpu/drm/i915/i915_trace.h:793:
+^I^I^I__field(bool, waiters)$
-:171: ERROR:CODE_INDENT: code indent should use tabs where possible
#171: FILE: drivers/gpu/drm/i915/i915_trace.h:794:
+^I^I^I),$
-:173: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#173: FILE: drivers/gpu/drm/i915/i915_trace.h:796:
+ TP_fast_assign(
-:191: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#191:
new file mode 100644
-:196: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#196: FILE: drivers/gpu/drm/i915/i915_tracing.c:1:
+/*
-:339: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#339: FILE: drivers/gpu/drm/i915/i915_tracing.h:1:
+/*
total: 6 errors, 3 warnings, 2 checks, 282 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev3)
== Series Details ==
Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is
active (rev3)
URL : https://patchwork.freedesktop.org/series/47897/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9903 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47897/revisions/3/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9903:
=== IGT changes ===
Possible regressions
igt@gem_exec_suspend@basic-s3:
{fi-kbl-soraka}:NOTRUN -> INCOMPLETE
== Known issues ==
Here are the changes found in Patchwork_9903 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_hangcheck:
fi-skl-guc: PASS -> DMESG-FAIL (fdo#107174)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (50 -> 47) ==
Additional (2): fi-kbl-soraka fi-kbl-7560u
Missing(5): fi-byt-squawks fi-ilk-m540 fi-bxt-dsi fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4636 -> Patchwork_9903
CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9903: 877808443224cf75a4d75b03d49009ce8e9abb9b @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
877808443224 drm/i915/tracing: Enable user interrupts while intel_engine_notify
is active
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9903/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev3)
== Series Details == Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev3) URL : https://patchwork.freedesktop.org/series/47897/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/tracing: Enable user interrupts while intel_engine_notify is active -drivers/gpu/drm/i915/selftests/../i915_drv.h:3675:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3677:16: warning: expression using sizeof(void) +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000 becomes 0) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev3)
== Series Details ==
Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is
active (rev3)
URL : https://patchwork.freedesktop.org/series/47897/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
877808443224 drm/i915/tracing: Enable user interrupts while intel_engine_notify
is active
-:160: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#160: FILE: drivers/gpu/drm/i915/i915_trace.h:788:
+ TP_STRUCT__entry(
-:161: ERROR:CODE_INDENT: code indent should use tabs where possible
#161: FILE: drivers/gpu/drm/i915/i915_trace.h:789:
+^I^I^I__field(u32, dev)$
-:162: ERROR:CODE_INDENT: code indent should use tabs where possible
#162: FILE: drivers/gpu/drm/i915/i915_trace.h:790:
+^I^I^I__field(u16, class)$
-:163: ERROR:CODE_INDENT: code indent should use tabs where possible
#163: FILE: drivers/gpu/drm/i915/i915_trace.h:791:
+^I^I^I__field(u16, instance)$
-:164: ERROR:CODE_INDENT: code indent should use tabs where possible
#164: FILE: drivers/gpu/drm/i915/i915_trace.h:792:
+^I^I^I__field(u32, seqno)$
-:165: ERROR:CODE_INDENT: code indent should use tabs where possible
#165: FILE: drivers/gpu/drm/i915/i915_trace.h:793:
+^I^I^I__field(bool, waiters)$
-:166: ERROR:CODE_INDENT: code indent should use tabs where possible
#166: FILE: drivers/gpu/drm/i915/i915_trace.h:794:
+^I^I^I),$
-:168: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#168: FILE: drivers/gpu/drm/i915/i915_trace.h:796:
+ TP_fast_assign(
-:186: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#186:
new file mode 100644
-:191: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#191: FILE: drivers/gpu/drm/i915/i915_tracing.c:1:
+/*
-:334: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#334: FILE: drivers/gpu/drm/i915/i915_tracing.h:1:
+/*
total: 6 errors, 3 warnings, 2 checks, 282 lines checked
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5] drm/i915/tracing: Enable user interrupts while intel_engine_notify is active
From: Tvrtko Ursulin
Keep the user interrupt enabled and emit intel_engine_notify tracepoint
every time as long as it is enabled. Premise is that if someone is
listening, they want to see interrupts logged.
We use tracepoint (de)registration callbacks to enable user interrupts on
all devices (future proofing and avoiding ugly global pointers) and all
engines. And in the user interrupt handler we make sure
trace_intel_engine_notify is called even when there are no waiters.
v2:
* Improve makefile. (Chris Wilson)
* Simplify by dropping the pointeless global driver list. (Chris Wilson)
* Emit tracepoint when there are no waiters, not just the user interrupt.
* Commit message tidy.
v3:
* Favour one return from notify_ring.
Chris Wilson:
* Reword commit message a bit for clarity.
* Add RPM references to driver (un)registration paths.
* Rename list link member.
* Handle !CONFIG_TRACEPOINTS in the header.
v4:
* I forgot to add comments while removing the RFC status.
* License header tidy.
* Forward declaration of drm_i915_private is enough. (Chris Wilson)
v5:
* Fix !CONFIG_TRACEPOINTS header fail. (Chris Wilson)
* Rememberd to add suggested by tag!
Signed-off-by: Tvrtko Ursulin
Suggested-by: Chris Wilson
Cc: Chris Wilson
Cc: Dmitry Rogozhkin
Cc: John Harrison
Cc: svetlana.kukan...@intel.com
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/Makefile | 3 +
drivers/gpu/drm/i915/i915_drv.c | 5 +
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_irq.c | 5 +-
drivers/gpu/drm/i915/i915_trace.h | 50 +-
drivers/gpu/drm/i915/i915_tracing.c | 137
drivers/gpu/drm/i915/i915_tracing.h | 30 ++
7 files changed, 207 insertions(+), 25 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_tracing.c
create mode 100644 drivers/gpu/drm/i915/i915_tracing.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5794f102f9b8..dfc940b32078 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -182,6 +182,9 @@ i915-y += i915_perf.o \
i915_oa_cnl.o \
i915_oa_icl.o
+# tracing
+i915-$(CONFIG_TRACEPOINTS) += i915_tracing.o
+
ifeq ($(CONFIG_DRM_I915_GVT),y)
i915-y += intel_gvt.o
include $(src)/gvt/Makefile
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9dce55182c3a..03e224ebc28c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1281,6 +1281,9 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
if (INTEL_INFO(dev_priv)->num_pipes)
drm_kms_helper_poll_init(dev);
+
+ /* Notify our tracepoints driver has been registered. */
+ i915_tracing_register(dev_priv);
}
/**
@@ -1292,6 +1295,8 @@ static void i915_driver_unregister(struct
drm_i915_private *dev_priv)
intel_fbdev_unregister(dev_priv);
intel_audio_deinit(dev_priv);
+ i915_tracing_unregister(dev_priv);
+
/*
* After flushing the fbdev (incl. a late async config which will
* have delayed queuing of a hotplug event), then flush the hotplug
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b10a30b7d96..00d9e9f65739 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2141,6 +2141,8 @@ struct drm_i915_private {
struct i915_pmu pmu;
+ struct list_head tracing_link;
+
/*
* NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
* will be rejected. Instead look for a better place.
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8084e35b25c5..0f007a46249e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1157,10 +1157,10 @@ static void notify_ring(struct intel_engine_cs *engine)
const u32 seqno = intel_engine_get_seqno(engine);
struct i915_request *rq = NULL;
struct task_struct *tsk = NULL;
- struct intel_wait *wait;
+ struct intel_wait *wait = NULL;
if (unlikely(!engine->breadcrumbs.irq_armed))
- return;
+ goto out;
rcu_read_lock();
@@ -1219,6 +1219,7 @@ static void notify_ring(struct intel_engine_cs *engine)
rcu_read_unlock();
+out:
trace_intel_engine_notify(engine, wait);
}
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_trace.h
index b50c6b829715..212e7fc1e80e 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -8,6 +8,7 @@
#include
#include "i915_drv.h"
+#include "i915_tracing.h"
#include "intel_drv.h"
#include "intel_ringbuffer.h"
@@ -780,29 +781,32 @@ trace_i915_request_out(struct i915_request *rq)
#endif
#endif
-TRACE_EVENT(intel_engine_notify,
- TP_PROTO(struct intel_engine_cs *engine, bool waiters),
-
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable
== Series Details ==
Series: series starting with [1/2] drm/i915: Introduce intel_runtime_pm_disable
to pair intel_runtime_pm_enable
URL : https://patchwork.freedesktop.org/series/47934/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9902 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9902 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9902, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47934/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9902:
=== IGT changes ===
Possible regressions
igt@drv_module_reload@basic-no-display:
{fi-skl-iommu}: PASS -> DMESG-WARN +3
fi-elk-e7500: PASS -> DMESG-WARN +16
igt@drv_module_reload@basic-reload:
fi-skl-guc: PASS -> DMESG-WARN +3
fi-kbl-x1275: PASS -> DMESG-WARN +16
igt@drv_module_reload@basic-reload-inject:
fi-skl-6260u: PASS -> DMESG-WARN +3
fi-kbl-7560u: NOTRUN -> DMESG-WARN +16
fi-skl-6770hq: PASS -> DMESG-WARN +3
igt@drv_selftest@live_contexts:
fi-cfl-s3: PASS -> DMESG-WARN +16
igt@drv_selftest@live_dmabuf:
fi-byt-n2820: PASS -> DMESG-WARN +16
fi-hsw-4770r: PASS -> DMESG-WARN +16
igt@drv_selftest@live_evict:
fi-cnl-psr: PASS -> DMESG-WARN +16
{fi-bsw-kefka}: PASS -> DMESG-WARN +16
igt@drv_selftest@live_gtt:
{fi-byt-clapper}: PASS -> DMESG-WARN +16
{fi-kbl-8809g}: PASS -> DMESG-WARN +16
fi-kbl-guc: PASS -> DMESG-WARN +15
fi-gdg-551: PASS -> DMESG-WARN +16
fi-kbl-7500u: PASS -> DMESG-WARN +16
igt@drv_selftest@live_guc:
fi-hsw-peppy: PASS -> DMESG-WARN +16
{fi-bdw-samus}: PASS -> DMESG-WARN +16
igt@drv_selftest@live_hangcheck:
fi-snb-2520m: PASS -> DMESG-WARN +16
fi-skl-6700hq: PASS -> DMESG-WARN +3
fi-skl-6700k2: PASS -> DMESG-WARN +3
igt@drv_selftest@live_hugepages:
fi-glk-dsi: PASS -> DMESG-WARN +16
{fi-cfl-8109u}: PASS -> DMESG-WARN +16
igt@drv_selftest@live_objects:
fi-bwr-2160:PASS -> DMESG-WARN +16
fi-bdw-5557u: PASS -> DMESG-WARN +16
fi-snb-2600:PASS -> DMESG-WARN +16
fi-hsw-4770:PASS -> DMESG-WARN +16
fi-bxt-dsi: PASS -> DMESG-WARN +16
igt@drv_selftest@live_requests:
fi-whl-u: PASS -> DMESG-WARN +15
fi-skl-gvtdvm: PASS -> DMESG-WARN +16
fi-ivb-3520m: PASS -> DMESG-WARN +16
fi-bxt-j4205: PASS -> DMESG-WARN +16
fi-cfl-guc: PASS -> DMESG-WARN +15
igt@drv_selftest@live_sanitycheck:
fi-bdw-gvtdvm: PASS -> DMESG-WARN +16
fi-ilk-650: PASS -> DMESG-WARN +16
fi-bsw-n3050: PASS -> DMESG-WARN +16
fi-kbl-7567u: PASS -> DMESG-WARN +16
fi-glk-j4005: PASS -> DMESG-WARN +16
fi-ivb-3770:PASS -> DMESG-WARN +16
igt@drv_selftest@live_uncore:
fi-pnv-d510:PASS -> DMESG-WARN +16
igt@drv_selftest@live_workarounds:
fi-cfl-8700k: PASS -> DMESG-WARN +16
fi-kbl-r: PASS -> DMESG-WARN +16
fi-byt-j1900: PASS -> DMESG-WARN +16
fi-blb-e6850: PASS -> DMESG-WARN +16
igt@gem_exec_suspend@basic-s3:
{fi-kbl-soraka}:NOTRUN -> INCOMPLETE
igt@pm_rpm@basic-pci-d3-state:
fi-skl-6600u: PASS -> DMESG-WARN +4
== Known issues ==
Here are the changes found in Patchwork_9902 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_objects:
fi-skl-6770hq: PASS -> DMESG-WARN (fdo#107175) +12
fi-skl-6700k2: PASS -> DMESG-WARN (fdo#107175) +12
fi-skl-6260u: PASS -> DMESG-WARN (fdo#107175) +12
igt@drv_selftest@live_requests:
fi-skl-6700hq: PASS -> DMESG-WARN (fdo#107175) +12
fi-skl-guc: PASS -> DMESG-WARN (fdo#107175) +11
igt@drv_selftest@live_sanitycheck:
{fi-skl-iommu}: PASS -> DMESG-WARN (fdo#107175) +12
igt@drv_selftest@live_uncore:
fi-skl-6600u: PASS -> DMESG-WARN (fdo#107175) +12
igt@drv_selftest@live_workarounds:
fi-whl-u: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status
Re: [Intel-gfx] [PATCH v4] drm/i915/tracing: Enable user interrupts while intel_engine_notify is active
Quoting Tvrtko Ursulin (2018-08-09 11:01:28)
> +#if IS_ENABLED(CONFIG_TRACEPOINTS)
> +
> +void i915_tracing_register(struct drm_i915_private *i915);
> +void i915_tracing_unregister(struct drm_i915_private *i915);
> +
> +int intel_engine_notify_tracepoint_register(void);
> +void intel_engine_notify_tracepoint_unregister(void);
> +
> +#else
> +
> +static inline void i915_tracing_register(struct drm_i915_private *i915) { }
> +static inline void i915_tracing_unregister(struct drm_i915_private *i915) { }
> +
> +static inline int intel_engine_notify_tracepoint_register(void) { }
I was blind, return 0;
Better keep the compiler happy before kbuild complains.
-Chris
___
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[Intel-gfx] [PATCH v4] drm/i915/tracing: Enable user interrupts while intel_engine_notify is active
From: Tvrtko Ursulin
Keep the user interrupt enabled and emit intel_engine_notify tracepoint
every time as long as it is enabled. Premise is that if someone is
listening, they want to see interrupts logged.
We use tracepoint (de)registration callbacks to enable user interrupts on
all devices (future proofing and avoiding ugly global pointers) and all
engines. And in the user interrupt handler we make sure
trace_intel_engine_notify is called even when there are no waiters.
v2:
* Improve makefile. (Chris Wilson)
* Simplify by dropping the pointeless global driver list. (Chris Wilson)
* Emit tracepoint when there are no waiters, not just the user interrupt.
* Commit message tidy.
v3:
* Favour one return from notify_ring.
Chris Wilson:
* Reword commit message a bit for clarity.
* Add RPM references to driver (un)registration paths.
* Rename list link member.
* Handle !CONFIG_TRACEPOINTS in the header.
v4:
* I forgot to add comments while removing the RFC status.
* License header tidy.
* Forward declaration of drm_i915_private is enough. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
Cc: Dmitry Rogozhkin
Cc: John Harrison
Cc: svetlana.kukan...@intel.com
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/Makefile | 3 +
drivers/gpu/drm/i915/i915_drv.c | 5 +
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_irq.c | 5 +-
drivers/gpu/drm/i915/i915_trace.h | 50 +-
drivers/gpu/drm/i915/i915_tracing.c | 137
drivers/gpu/drm/i915/i915_tracing.h | 30 ++
7 files changed, 207 insertions(+), 25 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_tracing.c
create mode 100644 drivers/gpu/drm/i915/i915_tracing.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5794f102f9b8..dfc940b32078 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -182,6 +182,9 @@ i915-y += i915_perf.o \
i915_oa_cnl.o \
i915_oa_icl.o
+# tracing
+i915-$(CONFIG_TRACEPOINTS) += i915_tracing.o
+
ifeq ($(CONFIG_DRM_I915_GVT),y)
i915-y += intel_gvt.o
include $(src)/gvt/Makefile
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9dce55182c3a..03e224ebc28c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1281,6 +1281,9 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
if (INTEL_INFO(dev_priv)->num_pipes)
drm_kms_helper_poll_init(dev);
+
+ /* Notify our tracepoints driver has been registered. */
+ i915_tracing_register(dev_priv);
}
/**
@@ -1292,6 +1295,8 @@ static void i915_driver_unregister(struct
drm_i915_private *dev_priv)
intel_fbdev_unregister(dev_priv);
intel_audio_deinit(dev_priv);
+ i915_tracing_unregister(dev_priv);
+
/*
* After flushing the fbdev (incl. a late async config which will
* have delayed queuing of a hotplug event), then flush the hotplug
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b10a30b7d96..00d9e9f65739 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2141,6 +2141,8 @@ struct drm_i915_private {
struct i915_pmu pmu;
+ struct list_head tracing_link;
+
/*
* NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
* will be rejected. Instead look for a better place.
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8084e35b25c5..0f007a46249e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1157,10 +1157,10 @@ static void notify_ring(struct intel_engine_cs *engine)
const u32 seqno = intel_engine_get_seqno(engine);
struct i915_request *rq = NULL;
struct task_struct *tsk = NULL;
- struct intel_wait *wait;
+ struct intel_wait *wait = NULL;
if (unlikely(!engine->breadcrumbs.irq_armed))
- return;
+ goto out;
rcu_read_lock();
@@ -1219,6 +1219,7 @@ static void notify_ring(struct intel_engine_cs *engine)
rcu_read_unlock();
+out:
trace_intel_engine_notify(engine, wait);
}
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_trace.h
index b50c6b829715..212e7fc1e80e 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -8,6 +8,7 @@
#include
#include "i915_drv.h"
+#include "i915_tracing.h"
#include "intel_drv.h"
#include "intel_ringbuffer.h"
@@ -780,29 +781,32 @@ trace_i915_request_out(struct i915_request *rq)
#endif
#endif
-TRACE_EVENT(intel_engine_notify,
- TP_PROTO(struct intel_engine_cs *engine, bool waiters),
- TP_ARGS(engine, waiters),
-
- TP_STRUCT__entry(
-__field(u32, dev)
-
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable
== Series Details == Series: series starting with [1/2] drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable URL : https://patchwork.freedesktop.org/series/47934/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable Okay! Commit: drm/i915: Track all held rpm wakerefs + -drivers/gpu/drm/i915/selftests/../i915_drv.h:3675:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3682:16: warning: expression using sizeof(void) +Error in reading or end of file. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable
== Series Details == Series: series starting with [1/2] drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable URL : https://patchwork.freedesktop.org/series/47934/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1787a18142d6 drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable 5d4072eab971 drm/i915: Track all held rpm wakerefs -:76: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment #76: FILE: drivers/gpu/drm/i915/i915_drv.h:1284: + spinlock_t debug_lock; -:158: ERROR:CODE_INDENT: code indent should use tabs where possible #158: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:107: +const depot_stack_handle_t * const a = _a, * const b = _b;$ -:158: WARNING:LEADING_SPACE: please, no spaces at the start of a line #158: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:107: +const depot_stack_handle_t * const a = _a, * const b = _b;$ -:160: ERROR:CODE_INDENT: code indent should use tabs where possible #160: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:109: +if (*a < *b)$ -:160: WARNING:LEADING_SPACE: please, no spaces at the start of a line #160: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:109: +if (*a < *b)$ -:161: ERROR:CODE_INDENT: code indent should use tabs where possible #161: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:110: +return -1;$ -:161: WARNING:LEADING_SPACE: please, no spaces at the start of a line #161: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:110: +return -1;$ -:162: ERROR:CODE_INDENT: code indent should use tabs where possible #162: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:111: +else if (*a > *b)$ -:162: WARNING:LEADING_SPACE: please, no spaces at the start of a line #162: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:111: +else if (*a > *b)$ -:163: ERROR:CODE_INDENT: code indent should use tabs where possible #163: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:112: +return 1;$ -:163: WARNING:LEADING_SPACE: please, no spaces at the start of a line #163: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:112: +return 1;$ -:164: ERROR:CODE_INDENT: code indent should use tabs where possible #164: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:113: +else$ -:164: WARNING:LEADING_SPACE: please, no spaces at the start of a line #164: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:113: +else$ -:165: ERROR:CODE_INDENT: code indent should use tabs where possible #165: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:114: +return 0;$ -:165: WARNING:LEADING_SPACE: please, no spaces at the start of a line #165: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:114: +return 0;$ total: 7 errors, 7 warnings, 1 checks, 236 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev2)
== Series Details ==
Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is
active (rev2)
URL : https://patchwork.freedesktop.org/series/47897/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9901 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47897/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9901:
=== IGT changes ===
Possible regressions
igt@gem_exec_suspend@basic-s3:
{fi-kbl-soraka}:NOTRUN -> INCOMPLETE
== Known issues ==
Here are the changes found in Patchwork_9901 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_hangcheck:
fi-skl-guc: PASS -> DMESG-FAIL (fdo#107174)
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (50 -> 48) ==
Additional (2): fi-kbl-soraka fi-kbl-7560u
Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4636 -> Patchwork_9901
CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9901: dea5a6eb6bc8e92a386e9d9e5aedbffa26981d34 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
dea5a6eb6bc8 drm/i915/tracing: Enable user interrupts while intel_engine_notify
is active
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9901/issues.html
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable
Quoting Patchwork (2018-08-09 10:25:42)
> == Series Details ==
>
> Series: drm/i915: Introduce intel_runtime_pm_disable to pair
> intel_runtime_pm_enable
> URL : https://patchwork.freedesktop.org/series/47932/
> State : failure
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9900 =
>
> == Summary - FAILURE ==
>
> Serious unknown changes coming with Patchwork_9900 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_9900, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL:
> https://patchwork.freedesktop.org/api/1.0/series/47932/revisions/1/mbox/
>
> == Possible new issues ==
>
> Here are the unknown changes that may have been introduced in
> Patchwork_9900:
>
> === IGT changes ===
>
> Possible regressions
>
> igt@drv_module_reload@basic-no-display:
> {fi-skl-iommu}: PASS -> DMESG-WARN +3
> fi-elk-e7500: PASS -> DMESG-WARN +16
>
> igt@drv_module_reload@basic-reload:
> fi-skl-guc: PASS -> DMESG-WARN +2
> fi-kbl-x1275: PASS -> DMESG-WARN +16
>
> igt@drv_module_reload@basic-reload-inject:
> fi-skl-6260u: PASS -> DMESG-WARN +3
> fi-kbl-7560u: NOTRUN -> DMESG-WARN +15
> fi-skl-6770hq: PASS -> DMESG-WARN +3
Well that probably came as no surprise to anyone.
-Chris
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Re: [Intel-gfx] [PATCH v3] drm/i915/tracing: Enable user interrupts while intel_engine_notify is active
On 09/08/2018 10:22, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-08-09 10:07:51)
diff --git a/drivers/gpu/drm/i915/i915_tracing.h
b/drivers/gpu/drm/i915/i915_tracing.h
new file mode 100644
index ..4d8710f5687b
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_tracing.h
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ */
+#ifndef _I915_TRACING_H_
+#define _I915_TRACING_H_
+
+#if IS_ENABLED(CONFIG_TRACEPOINTS)
+
+#include "i915_drv.h"
Nit here. You can just have a struct drm_i915_private; forward decl,
that you need for both paths.
Yes thanks, I'll do that.
I also need to add some comments to i915_tracing.c since it still looks
rather like a prototype.
Regards,
Tvrtko
+
+void i915_tracing_register(struct drm_i915_private *i915);
+void i915_tracing_unregister(struct drm_i915_private *i915);
+
+int intel_engine_notify_tracepoint_register(void);
+void intel_engine_notify_tracepoint_unregister(void);
+
+#else
+
+static inline void i915_tracing_register(struct drm_i915_private *i915) { }
+static inline void i915_tracing_unregister(struct drm_i915_private *i915) { }
+
+static inline int intel_engine_notify_tracepoint_register(void) { }
+static inline void intel_engine_notify_tracepoint_unregister(void) { }
+
+#endif
+
+#endif
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev2)
== Series Details == Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev2) URL : https://patchwork.freedesktop.org/series/47897/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/tracing: Enable user interrupts while intel_engine_notify is active -drivers/gpu/drm/i915/selftests/../i915_drv.h:3675:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3677:16: warning: expression using sizeof(void) +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000 becomes 0) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tracing: Enable user interrupts while intel_engine_notify is active (rev2)
== Series Details ==
Series: drm/i915/tracing: Enable user interrupts while intel_engine_notify is
active (rev2)
URL : https://patchwork.freedesktop.org/series/47897/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
dea5a6eb6bc8 drm/i915/tracing: Enable user interrupts while intel_engine_notify
is active
-:155: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#155: FILE: drivers/gpu/drm/i915/i915_trace.h:788:
+ TP_STRUCT__entry(
-:156: ERROR:CODE_INDENT: code indent should use tabs where possible
#156: FILE: drivers/gpu/drm/i915/i915_trace.h:789:
+^I^I^I__field(u32, dev)$
-:157: ERROR:CODE_INDENT: code indent should use tabs where possible
#157: FILE: drivers/gpu/drm/i915/i915_trace.h:790:
+^I^I^I__field(u16, class)$
-:158: ERROR:CODE_INDENT: code indent should use tabs where possible
#158: FILE: drivers/gpu/drm/i915/i915_trace.h:791:
+^I^I^I__field(u16, instance)$
-:159: ERROR:CODE_INDENT: code indent should use tabs where possible
#159: FILE: drivers/gpu/drm/i915/i915_trace.h:792:
+^I^I^I__field(u32, seqno)$
-:160: ERROR:CODE_INDENT: code indent should use tabs where possible
#160: FILE: drivers/gpu/drm/i915/i915_trace.h:793:
+^I^I^I__field(bool, waiters)$
-:161: ERROR:CODE_INDENT: code indent should use tabs where possible
#161: FILE: drivers/gpu/drm/i915/i915_trace.h:794:
+^I^I^I),$
-:163: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#163: FILE: drivers/gpu/drm/i915/i915_trace.h:796:
+ TP_fast_assign(
-:181: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#181:
new file mode 100644
-:292: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier
tag in line 1
#292: FILE: drivers/gpu/drm/i915/i915_tracing.h:1:
+// SPDX-License-Identifier: GPL-2.0
total: 6 errors, 2 warnings, 2 checks, 244 lines checked
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable
== Series Details ==
Series: drm/i915: Introduce intel_runtime_pm_disable to pair
intel_runtime_pm_enable
URL : https://patchwork.freedesktop.org/series/47932/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9900 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9900 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9900, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47932/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9900:
=== IGT changes ===
Possible regressions
igt@drv_module_reload@basic-no-display:
{fi-skl-iommu}: PASS -> DMESG-WARN +3
fi-elk-e7500: PASS -> DMESG-WARN +16
igt@drv_module_reload@basic-reload:
fi-skl-guc: PASS -> DMESG-WARN +2
fi-kbl-x1275: PASS -> DMESG-WARN +16
igt@drv_module_reload@basic-reload-inject:
fi-skl-6260u: PASS -> DMESG-WARN +3
fi-kbl-7560u: NOTRUN -> DMESG-WARN +15
fi-skl-6770hq: PASS -> DMESG-WARN +3
igt@drv_selftest@live_contexts:
fi-cfl-s3: PASS -> DMESG-WARN +16
igt@drv_selftest@live_dmabuf:
fi-byt-n2820: PASS -> DMESG-WARN +16
fi-hsw-4770r: PASS -> DMESG-WARN +16
igt@drv_selftest@live_evict:
fi-cnl-psr: PASS -> DMESG-WARN +15
{fi-bsw-kefka}: PASS -> DMESG-WARN +16
igt@drv_selftest@live_gtt:
{fi-byt-clapper}: PASS -> DMESG-WARN +16
{fi-kbl-8809g}: PASS -> DMESG-WARN +16
fi-kbl-guc: PASS -> DMESG-WARN +15
fi-gdg-551: PASS -> DMESG-WARN +16
fi-kbl-7500u: PASS -> DMESG-WARN +16
igt@drv_selftest@live_guc:
fi-hsw-peppy: PASS -> DMESG-WARN +16
{fi-bdw-samus}: PASS -> DMESG-WARN +16
igt@drv_selftest@live_hangcheck:
fi-snb-2520m: PASS -> DMESG-WARN +16
fi-skl-6700hq: PASS -> DMESG-WARN +3
fi-skl-6700k2: PASS -> DMESG-WARN +3
fi-skl-6600u: PASS -> DMESG-WARN +3
igt@drv_selftest@live_hugepages:
fi-glk-dsi: PASS -> DMESG-WARN +16
{fi-cfl-8109u}: PASS -> DMESG-WARN +16
igt@drv_selftest@live_objects:
fi-bwr-2160:PASS -> DMESG-WARN +16
fi-bdw-5557u: PASS -> DMESG-WARN +16
fi-snb-2600:PASS -> DMESG-WARN +16
fi-hsw-4770:PASS -> DMESG-WARN +16
fi-bxt-dsi: PASS -> DMESG-WARN +16
igt@drv_selftest@live_requests:
fi-whl-u: PASS -> DMESG-WARN +16
fi-skl-gvtdvm: PASS -> DMESG-WARN +16
fi-ivb-3520m: PASS -> DMESG-WARN +16
fi-bxt-j4205: PASS -> DMESG-WARN +16
fi-cfl-guc: PASS -> DMESG-WARN +15
igt@drv_selftest@live_sanitycheck:
fi-bdw-gvtdvm: PASS -> DMESG-WARN +16
fi-ilk-650: PASS -> DMESG-WARN +16
fi-bsw-n3050: PASS -> DMESG-WARN +16
fi-kbl-7567u: PASS -> DMESG-WARN +16
fi-glk-j4005: PASS -> DMESG-WARN +16
fi-ivb-3770:PASS -> DMESG-WARN +16
igt@drv_selftest@live_uncore:
fi-pnv-d510:PASS -> DMESG-WARN +16
igt@drv_selftest@live_workarounds:
fi-cfl-8700k: PASS -> DMESG-WARN +16
fi-kbl-r: PASS -> DMESG-WARN +16
fi-byt-j1900: PASS -> DMESG-WARN +16
fi-blb-e6850: PASS -> DMESG-WARN +16
igt@gem_exec_suspend@basic-s3:
{fi-kbl-soraka}:NOTRUN -> INCOMPLETE
== Known issues ==
Here are the changes found in Patchwork_9900 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_hangcheck:
fi-skl-guc: PASS -> DMESG-FAIL (fdo#107174)
igt@drv_selftest@live_objects:
fi-skl-6770hq: PASS -> DMESG-WARN (fdo#107175) +12
fi-skl-6700k2: PASS -> DMESG-WARN (fdo#107175) +12
fi-skl-6260u: PASS -> DMESG-WARN (fdo#107175) +12
igt@drv_selftest@live_requests:
fi-skl-6700hq: PASS -> DMESG-WARN (fdo#107175) +12
fi-skl-guc: PASS -> DMESG-WARN (fdo#107175) +11
igt@drv_selftest@live_sanitycheck:
{fi-skl-iommu}: PASS -> DMESG-WARN (fdo#107175) +12
igt@drv_selftest@live_uncore:
fi-skl-6600u: PASS -> DMESG-WARN (fdo#107175) +12
igt@drv_selftest@live_workarounds:
fi-cnl-psr: PASS -> DMESG-FAIL (fdo#107292)
fi-kbl-7560u: NOTRUN -> DMESG-FAIL (fdo#107292)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
Re: [Intel-gfx] [PATCH v3] drm/i915/tracing: Enable user interrupts while intel_engine_notify is active
Quoting Tvrtko Ursulin (2018-08-09 10:07:51)
> diff --git a/drivers/gpu/drm/i915/i915_tracing.h
> b/drivers/gpu/drm/i915/i915_tracing.h
> new file mode 100644
> index ..4d8710f5687b
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_tracing.h
> @@ -0,0 +1,29 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright © 2018 Intel Corporation
> + *
> + */
> +#ifndef _I915_TRACING_H_
> +#define _I915_TRACING_H_
> +
> +#if IS_ENABLED(CONFIG_TRACEPOINTS)
> +
> +#include "i915_drv.h"
Nit here. You can just have a struct drm_i915_private; forward decl,
that you need for both paths.
> +
> +void i915_tracing_register(struct drm_i915_private *i915);
> +void i915_tracing_unregister(struct drm_i915_private *i915);
> +
> +int intel_engine_notify_tracepoint_register(void);
> +void intel_engine_notify_tracepoint_unregister(void);
> +
> +#else
> +
> +static inline void i915_tracing_register(struct drm_i915_private *i915) { }
> +static inline void i915_tracing_unregister(struct drm_i915_private *i915) { }
> +
> +static inline int intel_engine_notify_tracepoint_register(void) { }
> +static inline void intel_engine_notify_tracepoint_unregister(void) { }
> +
> +#endif
> +
> +#endif
>
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[Intel-gfx] [PATCH 1/2] drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable
Currently, we cancel the extra wakeref we have for !runtime-pm devices
inside power_wells_fini_hw. However, this is not strictly paired with
the acquisition of that wakeref in runtime_pm_enable (as the fini_hw may
be called on errors paths before we even call runtime_pm_enable). Make
the symmetry more explicit and include a check that we do release all of
our rpm wakerefs.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.c | 8 ++--
drivers/gpu/drm/i915/intel_drv.h| 1 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 24 +++-
3 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9dce55182c3a..62ef105a241d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1281,6 +1281,8 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
if (INTEL_INFO(dev_priv)->num_pipes)
drm_kms_helper_poll_init(dev);
+
+ intel_runtime_pm_enable(dev_priv);
}
/**
@@ -1289,6 +1291,8 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
static void i915_driver_unregister(struct drm_i915_private *dev_priv)
{
+ intel_runtime_pm_disable(dev_priv);
+
intel_fbdev_unregister(dev_priv);
intel_audio_deinit(dev_priv);
@@ -1408,8 +1412,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct
pci_device_id *ent)
i915_driver_register(dev_priv);
- intel_runtime_pm_enable(dev_priv);
-
intel_init_ipc(dev_priv);
intel_runtime_pm_put(dev_priv);
@@ -1474,6 +1476,8 @@ void i915_driver_unload(struct drm_device *dev)
i915_driver_cleanup_mmio(dev_priv);
intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+
+ WARN_ON(atomic_read(_priv->runtime_pm.wakeref_count));
}
static void i915_driver_release(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0601abb8c71f..dc6c0cec9b36 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1956,6 +1956,7 @@ void intel_power_domains_verify_state(struct
drm_i915_private *dev_priv);
void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume);
void bxt_display_core_uninit(struct drm_i915_private *dev_priv);
void intel_runtime_pm_enable(struct drm_i915_private *dev_priv);
+void intel_runtime_pm_disable(struct drm_i915_private *dev_priv);
const char *
intel_display_power_domain_str(enum intel_display_power_domain domain);
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index e209edbc561d..b78c3b48aa62 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3793,8 +3793,6 @@ void intel_power_domains_init_hw(struct drm_i915_private
*dev_priv, bool resume)
*/
void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv)
{
- struct device *kdev = _priv->drm.pdev->dev;
-
/*
* The i915.ko module is still not prepared to be loaded when
* the power well is not enabled, so just enable it in case
@@ -3809,13 +3807,6 @@ void intel_power_domains_fini_hw(struct drm_i915_private
*dev_priv)
/* Remove the refcount we took to keep power well support disabled. */
if (!i915_modparams.disable_power_well)
intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
-
- /*
-* Remove the refcount we took in intel_runtime_pm_enable() in case
-* the platform doesn't support runtime PM.
-*/
- if (!HAS_RUNTIME_PM(dev_priv))
- pm_runtime_put(kdev);
}
/**
@@ -4074,3 +4065,18 @@ void intel_runtime_pm_enable(struct drm_i915_private
*dev_priv)
*/
pm_runtime_put_autosuspend(kdev);
}
+
+void intel_runtime_pm_disable(struct drm_i915_private *dev_priv)
+{
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+ struct device *kdev = >dev;
+
+ pm_runtime_dont_use_autosuspend(kdev);
+
+ /*
+* Remove the refcount we took in intel_runtime_pm_enable() in case
+* the platform doesn't support runtime PM.
+*/
+ if (!HAS_RUNTIME_PM(dev_priv))
+ pm_runtime_put(kdev);
+}
--
2.18.0
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[Intel-gfx] [PATCH 2/2] drm/i915: Track all held rpm wakerefs
Everytime we take a wakeref, record the stack trace of where it was
taken; clearing the set if we ever drop back to no owners. For debugging
a rpm leak, we can look at all the current wakerefs and check if they
have a matching rpm_put.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/Kconfig.debug | 13 +++
drivers/gpu/drm/i915/i915_drv.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 7 ++
drivers/gpu/drm/i915/intel_drv.h| 1 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 143 +++-
5 files changed, 165 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.debug
b/drivers/gpu/drm/i915/Kconfig.debug
index 459f8f88a34c..ed572a454e01 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -39,6 +39,19 @@ config DRM_I915_DEBUG
If in doubt, say "N".
+config DRM_I915_DEBUG_RPM
+bool "Insert extra checks into the runtime pm internals"
+depends on DRM_I915
+default n
+select STACKDEPOT
+help
+ Enable extra sanity checks (including BUGs) along the runtime pm
+ paths that may slow the system down and if hit hang the machine.
+
+ Recommended for driver developers only.
+
+ If in doubt, say "N".
+
config DRM_I915_DEBUG_GEM
bool "Insert extra checks into the GEM internals"
default n
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 62ef105a241d..63992fe45dbf 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1477,7 +1477,7 @@ void i915_driver_unload(struct drm_device *dev)
intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
- WARN_ON(atomic_read(_priv->runtime_pm.wakeref_count));
+ intel_runtime_pm_cleanup(dev_priv);
}
static void i915_driver_release(struct drm_device *dev)
@@ -2603,6 +2603,7 @@ static int intel_runtime_suspend(struct device *kdev)
DRM_DEBUG_KMS("Suspending device\n");
+ intel_runtime_pm_cleanup(dev_priv);
disable_rpm_wakeref_asserts(dev_priv);
/*
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b10a30b7d96..c8d5b896b155 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -45,6 +45,7 @@
#include
#include
#include
+#include
#include
#include
@@ -1278,6 +1279,12 @@ struct i915_runtime_pm {
atomic_t wakeref_count;
bool suspended;
bool irqs_enabled;
+
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RPM)
+ spinlock_t debug_lock;
+ depot_stack_handle_t *debug_owners;
+ unsigned long debug_count;
+#endif
};
enum intel_pipe_crc_source {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index dc6c0cec9b36..968c9074f1a8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1957,6 +1957,7 @@ void bxt_display_core_init(struct drm_i915_private
*dev_priv, bool resume);
void bxt_display_core_uninit(struct drm_i915_private *dev_priv);
void intel_runtime_pm_enable(struct drm_i915_private *dev_priv);
void intel_runtime_pm_disable(struct drm_i915_private *dev_priv);
+void intel_runtime_pm_cleanup(struct drm_i915_private *dev_priv);
const char *
intel_display_power_domain_str(enum intel_display_power_domain domain);
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index b78c3b48aa62..7f555a0ad2ee 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -49,6 +49,130 @@
* present for a given platform.
*/
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RPM)
+
+#include
+
+#define STACKDEPTH 12
+
+static void track_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+{
+ unsigned long entries[STACKDEPTH];
+ struct stack_trace trace = {
+ .entries = entries,
+ .max_entries = ARRAY_SIZE(entries),
+ .skip = 2
+ };
+ unsigned long flags;
+ depot_stack_handle_t stack, *stacks;
+
+ if (!HAS_RUNTIME_PM(i915))
+ return;
+
+ save_stack_trace();
+ if (trace.nr_entries &&
+ trace.entries[trace.nr_entries - 1] == ULONG_MAX)
+ trace.nr_entries--;
+
+ stack = depot_save_stack(, GFP_NOWAIT | __GFP_NOWARN);
+ if (!stack)
+ return;
+
+ spin_lock_irqsave(>runtime_pm.debug_lock, flags);
+ stacks = krealloc(i915->runtime_pm.debug_owners,
+ (i915->runtime_pm.debug_count + 1) * sizeof(*stacks),
+ GFP_NOWAIT | __GFP_NOWARN);
+ if (stacks) {
+ stacks[i915->runtime_pm.debug_count++] = stack;
+ i915->runtime_pm.debug_owners = stacks;
+ }
+ spin_unlock_irqrestore(>runtime_pm.debug_lock, flags);
+}
+
+static void untrack_intel_runtime_pm_wakeref(struct
Re: [Intel-gfx] [PATCH v3] drm/i915/tracing: Enable user interrupts while intel_engine_notify is active
On 09/08/2018 10:07, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Keep the user interrupt enabled and emit intel_engine_notify tracepoint
every time as long as it is enabled. Premise is that if someone is
listening, they want to see interrupts logged.
We use tracepoint (de)registration callbacks to enable user interrupts on
all devices (future proofing and avoiding ugly global pointers) and all
engines. And in the user interrupt handler we make sure
trace_intel_engine_notify is called even when there are no waiters.
v2:
* Improve makefile. (Chris Wilson)
* Simplify by dropping the pointeless global driver list. (Chris Wilson)
* Emit tracepoint when there are no waiters, not just the user interrupt.
* Commit message tidy.
v3:
* Favour one return from notify_ring.
Chris Wilson:
* Reword commit message a bit for clarity.
* Add RPM references to driver (un)registration paths.
* Rename list link member.
* Handle !CONFIG_TRACEPOINTS in the header.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
Cc: Dmitry Rogozhkin
Cc: John Harrison
Cc: svetlana.kukan...@intel.com
Reviewed-by: Chris Wilson
Also forgot to credit for tracepoint hooks discovery:
Suggested-by: Chris Wilson
Regards,
Tvrtko
---
drivers/gpu/drm/i915/Makefile | 3 +
drivers/gpu/drm/i915/i915_drv.c | 5 ++
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_irq.c | 5 +-
drivers/gpu/drm/i915/i915_trace.h | 50 +++---
drivers/gpu/drm/i915/i915_tracing.c | 100
drivers/gpu/drm/i915/i915_tracing.h | 29
7 files changed, 169 insertions(+), 25 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_tracing.c
create mode 100644 drivers/gpu/drm/i915/i915_tracing.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5794f102f9b8..dfc940b32078 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -182,6 +182,9 @@ i915-y += i915_perf.o \
i915_oa_cnl.o \
i915_oa_icl.o
+# tracing
+i915-$(CONFIG_TRACEPOINTS) += i915_tracing.o
+
ifeq ($(CONFIG_DRM_I915_GVT),y)
i915-y += intel_gvt.o
include $(src)/gvt/Makefile
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9dce55182c3a..03e224ebc28c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1281,6 +1281,9 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
if (INTEL_INFO(dev_priv)->num_pipes)
drm_kms_helper_poll_init(dev);
+
+ /* Notify our tracepoints driver has been registered. */
+ i915_tracing_register(dev_priv);
}
/**
@@ -1292,6 +1295,8 @@ static void i915_driver_unregister(struct
drm_i915_private *dev_priv)
intel_fbdev_unregister(dev_priv);
intel_audio_deinit(dev_priv);
+ i915_tracing_unregister(dev_priv);
+
/*
* After flushing the fbdev (incl. a late async config which will
* have delayed queuing of a hotplug event), then flush the hotplug
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b10a30b7d96..00d9e9f65739 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2141,6 +2141,8 @@ struct drm_i915_private {
struct i915_pmu pmu;
+ struct list_head tracing_link;
+
/*
* NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
* will be rejected. Instead look for a better place.
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8084e35b25c5..0f007a46249e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1157,10 +1157,10 @@ static void notify_ring(struct intel_engine_cs *engine)
const u32 seqno = intel_engine_get_seqno(engine);
struct i915_request *rq = NULL;
struct task_struct *tsk = NULL;
- struct intel_wait *wait;
+ struct intel_wait *wait = NULL;
if (unlikely(!engine->breadcrumbs.irq_armed))
- return;
+ goto out;
rcu_read_lock();
@@ -1219,6 +1219,7 @@ static void notify_ring(struct intel_engine_cs *engine)
rcu_read_unlock();
+out:
trace_intel_engine_notify(engine, wait);
}
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index b50c6b829715..212e7fc1e80e 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -8,6 +8,7 @@
#include
#include "i915_drv.h"
+#include "i915_tracing.h"
#include "intel_drv.h"
#include "intel_ringbuffer.h"
@@ -780,29 +781,32 @@ trace_i915_request_out(struct i915_request *rq)
#endif
#endif
-TRACE_EVENT(intel_engine_notify,
- TP_PROTO(struct intel_engine_cs *engine, bool waiters),
- TP_ARGS(engine, waiters),
-
- TP_STRUCT__entry(
-
[Intel-gfx] [PATCH v3] drm/i915/tracing: Enable user interrupts while intel_engine_notify is active
From: Tvrtko Ursulin
Keep the user interrupt enabled and emit intel_engine_notify tracepoint
every time as long as it is enabled. Premise is that if someone is
listening, they want to see interrupts logged.
We use tracepoint (de)registration callbacks to enable user interrupts on
all devices (future proofing and avoiding ugly global pointers) and all
engines. And in the user interrupt handler we make sure
trace_intel_engine_notify is called even when there are no waiters.
v2:
* Improve makefile. (Chris Wilson)
* Simplify by dropping the pointeless global driver list. (Chris Wilson)
* Emit tracepoint when there are no waiters, not just the user interrupt.
* Commit message tidy.
v3:
* Favour one return from notify_ring.
Chris Wilson:
* Reword commit message a bit for clarity.
* Add RPM references to driver (un)registration paths.
* Rename list link member.
* Handle !CONFIG_TRACEPOINTS in the header.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
Cc: Dmitry Rogozhkin
Cc: John Harrison
Cc: svetlana.kukan...@intel.com
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/Makefile | 3 +
drivers/gpu/drm/i915/i915_drv.c | 5 ++
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_irq.c | 5 +-
drivers/gpu/drm/i915/i915_trace.h | 50 +++---
drivers/gpu/drm/i915/i915_tracing.c | 100
drivers/gpu/drm/i915/i915_tracing.h | 29
7 files changed, 169 insertions(+), 25 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_tracing.c
create mode 100644 drivers/gpu/drm/i915/i915_tracing.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5794f102f9b8..dfc940b32078 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -182,6 +182,9 @@ i915-y += i915_perf.o \
i915_oa_cnl.o \
i915_oa_icl.o
+# tracing
+i915-$(CONFIG_TRACEPOINTS) += i915_tracing.o
+
ifeq ($(CONFIG_DRM_I915_GVT),y)
i915-y += intel_gvt.o
include $(src)/gvt/Makefile
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9dce55182c3a..03e224ebc28c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1281,6 +1281,9 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
if (INTEL_INFO(dev_priv)->num_pipes)
drm_kms_helper_poll_init(dev);
+
+ /* Notify our tracepoints driver has been registered. */
+ i915_tracing_register(dev_priv);
}
/**
@@ -1292,6 +1295,8 @@ static void i915_driver_unregister(struct
drm_i915_private *dev_priv)
intel_fbdev_unregister(dev_priv);
intel_audio_deinit(dev_priv);
+ i915_tracing_unregister(dev_priv);
+
/*
* After flushing the fbdev (incl. a late async config which will
* have delayed queuing of a hotplug event), then flush the hotplug
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b10a30b7d96..00d9e9f65739 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2141,6 +2141,8 @@ struct drm_i915_private {
struct i915_pmu pmu;
+ struct list_head tracing_link;
+
/*
* NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
* will be rejected. Instead look for a better place.
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8084e35b25c5..0f007a46249e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1157,10 +1157,10 @@ static void notify_ring(struct intel_engine_cs *engine)
const u32 seqno = intel_engine_get_seqno(engine);
struct i915_request *rq = NULL;
struct task_struct *tsk = NULL;
- struct intel_wait *wait;
+ struct intel_wait *wait = NULL;
if (unlikely(!engine->breadcrumbs.irq_armed))
- return;
+ goto out;
rcu_read_lock();
@@ -1219,6 +1219,7 @@ static void notify_ring(struct intel_engine_cs *engine)
rcu_read_unlock();
+out:
trace_intel_engine_notify(engine, wait);
}
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_trace.h
index b50c6b829715..212e7fc1e80e 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -8,6 +8,7 @@
#include
#include "i915_drv.h"
+#include "i915_tracing.h"
#include "intel_drv.h"
#include "intel_ringbuffer.h"
@@ -780,29 +781,32 @@ trace_i915_request_out(struct i915_request *rq)
#endif
#endif
-TRACE_EVENT(intel_engine_notify,
- TP_PROTO(struct intel_engine_cs *engine, bool waiters),
- TP_ARGS(engine, waiters),
-
- TP_STRUCT__entry(
-__field(u32, dev)
-__field(u16, class)
-__field(u16, instance)
-__field(u32, seqno)
-
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add detection of changing of edid on between suspend and resume (rev2)
== Series Details ==
Series: drm/i915: Add detection of changing of edid on between suspend and
resume (rev2)
URL : https://patchwork.freedesktop.org/series/47680/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9899 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9899 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9899, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47680/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9899:
=== IGT changes ===
Possible regressions
igt@drv_module_reload@basic-reload-inject:
fi-bsw-n3050: PASS -> DMESG-WARN
igt@gem_exec_suspend@basic-s3:
{fi-kbl-soraka}:NOTRUN -> INCOMPLETE
== Known issues ==
Here are the changes found in Patchwork_9899 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_module_reload@basic-reload-inject:
fi-hsw-4770r: PASS -> DMESG-WARN (fdo#107425)
igt@drv_selftest@live_hangcheck:
fi-kbl-7560u: NOTRUN -> DMESG-FAIL (fdo#106947, fdo#106560)
igt@drv_selftest@live_workarounds:
fi-skl-6700hq: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
{fi-byt-clapper}: PASS -> FAIL (fdo#107362, fdo#103191)
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
fdo#107425 https://bugs.freedesktop.org/show_bug.cgi?id=107425
== Participating hosts (50 -> 47) ==
Additional (2): fi-kbl-soraka fi-kbl-7560u
Missing(5): fi-skl-guc fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4636 -> Patchwork_9899
CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9899: f7f78bf703682167942c440f7cc9cf19e86c95cd @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f7f78bf70368 drm/i915: Add detection of changing of edid on between suspend and
resume
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9899/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Hold rpm for unparking
== Series Details == Series: drm/i915/selftests: Hold rpm for unparking URL : https://patchwork.freedesktop.org/series/47930/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4636_full -> Patchwork_9897_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_9897_full that come from known issues: === IGT changes === Issues hit igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) Possible fixes igt@gem_exec_suspend@basic-s3: shard-snb: INCOMPLETE (fdo#105411) -> PASS igt@kms_busy@extended-pageflip-hang-oldfb-render-a: shard-apl: DMESG-WARN (fdo#106247) -> PASS igt@pm_rpm@cursor-dpms: shard-glk: WARN -> PASS igt@pm_rpm@dpms-mode-unset-non-lpsp: shard-apl: FAIL (fdo#106539) -> PASS +3 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247 fdo#106539 https://bugs.freedesktop.org/show_bug.cgi?id=106539 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4636 -> Patchwork_9897 CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9897: 68d39a6b2408820f4c146396e499cf48e25dcecc @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9897/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Allow control of PSR at runtime through debugfs, v5
Op 09-08-18 om 01:44 schreef Dhinakaran Pandiyan:
> On Wed, 2018-08-08 at 16:19 +0200, Maarten Lankhorst wrote:
>> Currently tests modify i915.enable_psr and then do a modeset cycle
>> to change PSR. We can write a value to i915_edp_psr_debug to force
>> a certain PSR mode without a modeset.
>>
>> To retain compatibility with older userspace, we also still allow
>> the override through the module parameter, and add some tracking
>> to check whether a debugfs mode is specified.
>>
>> Changes since v1:
>> - Rename dev_priv->psr.enabled to .dp, and .hw_configured to
>> .enabled.
>> - Fix i915_psr_debugfs_mode to match the writes to debugfs.
>> - Rename __i915_edp_psr_write to intel_psr_set_debugfs_mode, simplify
>> it and move it to intel_psr.c. This keeps all internals in
>> intel_psr.c
>> - Perform an interruptible wait for hw completion outside of the psr
>> lock, instead of being forced to trywait and return -EBUSY.
>> Changes since v2:
>> - Rebase on top of intel_psr changes.
>> Changes since v3:
>> - Assign psr.dp during init. (dhnkrn)
>> - Add prepared bool, which should be used instead of relying on
>> psr.dp. (dhnkrn)
>> - Fix -EDEADLK handling in debugfs. (dhnkrn)
>> - Clean up waiting for idle in intel_psr_set_debugfs_mode.
>> - Print PSR mode when trying to enable PSR. (dhnkrn)
>> - Move changing psr debug setting to i915_edp_psr_debug_set. (dhnkrn)
>> Changes since v4:
>> - Return error in _set() function.
>> - Change flag values to make them easier to remember. (dhnkrn)
>> - Only assign psr.dp once. (dhnkrn)
>> - Only set crtc_state->has_psr on the crtc with psr.dp.
>> - Fix typo. (dhnkrn)
>>
>> Signed-off-by: Maarten Lankhorst
>> Cc: Rodrigo Vivi
>> Cc: Dhinakaran Pandiyan
>> ---
>> drivers/gpu/drm/i915/i915_debugfs.c | 23 -
>> drivers/gpu/drm/i915/i915_drv.h | 12 ++-
>> drivers/gpu/drm/i915/i915_irq.c | 2 +-
>> drivers/gpu/drm/i915/intel_drv.h| 5 +-
>> drivers/gpu/drm/i915/intel_psr.c| 138 +++---
>> --
>> 5 files changed, 149 insertions(+), 31 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
>> b/drivers/gpu/drm/i915/i915_debugfs.c
>> index f9ce35da4123..3e81301a94ba 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -2708,7 +2708,7 @@ static int i915_edp_psr_status(struct seq_file
>> *m, void *data)
>> intel_runtime_pm_get(dev_priv);
>>
>> mutex_lock(_priv->psr.lock);
>> -seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv-
>>> psr.enabled));
>> +seq_printf(m, "Enabled: %s\n", yesno(dev_priv-
>>> psr.enabled));
>> seq_printf(m, "Busy frontbuffer bits: 0x%03x\n",
>> dev_priv->psr.busy_frontbuffer_bits);
>>
>> @@ -2750,17 +2750,32 @@ static int
>> i915_edp_psr_debug_set(void *data, u64 val)
>> {
>> struct drm_i915_private *dev_priv = data;
>> +struct drm_modeset_acquire_ctx ctx;
>> +int ret;
>>
>> if (!CAN_PSR(dev_priv))
>> return -ENODEV;
>>
>> -DRM_DEBUG_KMS("PSR debug %s\n", enableddisabled(val));
>> +DRM_DEBUG_KMS("Setting PSR debug to %llx\n", val);
>>
>> intel_runtime_pm_get(dev_priv);
>> -intel_psr_irq_control(dev_priv, !!val);
>> +
>> +drm_modeset_acquire_init(,
>> DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
>> +
>> +retry:
>> +ret = intel_psr_set_debugfs_mode(dev_priv, , val);
>> +if (ret == -EDEADLK) {
>> +ret = drm_modeset_backoff();
>> +if (!ret)
>> +goto retry;
>> +}
>> +
>> +drm_modeset_drop_locks();
>> +drm_modeset_acquire_fini();
>> +
>> intel_runtime_pm_put(dev_priv);
>>
>> -return 0;
>> +return ret;
>> }
>>
>> static int
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index 657f46e0cae9..a3ea48ce1811 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -611,8 +611,17 @@ struct i915_drrs {
>>
>> struct i915_psr {
>> struct mutex lock;
>> +
>> +#define I915_PSR_DEBUG_MODE_MASK0x0f
>> +#define I915_PSR_DEBUG_DEFAULT 0x00
>> +#define I915_PSR_DEBUG_DISABLE 0x01
>> +#define I915_PSR_DEBUG_ENABLE 0x02
>> +#define I915_PSR_DEBUG_IRQ 0x10
>> +
>> +u32 debug;
> u16?
>
>> bool sink_support;
>> -struct intel_dp *enabled;
>> +bool prepared, enabled;
>> +struct intel_dp *dp;
>> bool active;
>> struct work_struct work;
>> unsigned busy_frontbuffer_bits;
>> @@ -622,7 +631,6 @@ struct i915_psr {
>> bool alpm;
>> bool psr2_enabled;
>> u8 sink_sync_latency;
>> -bool debug;
>> ktime_t last_entry_attempt;
>> ktime_t last_exit;
>> };
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c
>> b/drivers/gpu/drm/i915/i915_irq.c
>> index 8084e35b25c5..b2c9838442bc 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -4048,7 +4048,7 @@ static int
[Intel-gfx] [PATCH] drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable
Currently, we cancel the extra wakeref we have for !runtime-pm devices
inside power_wells_fini_hw. However, this is not strictly paired with
the acquisition of that wakeref in runtime_pm_enable (as the fini_hw may
be called on errors paths before we even call runtime_pm_enable). Make
the symmetry more explicit and include a check that we do release all of
our rpm wakerefs.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.c | 8 ++--
drivers/gpu/drm/i915/intel_drv.h| 1 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 24 +++-
3 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9dce55182c3a..62ef105a241d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1281,6 +1281,8 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
if (INTEL_INFO(dev_priv)->num_pipes)
drm_kms_helper_poll_init(dev);
+
+ intel_runtime_pm_enable(dev_priv);
}
/**
@@ -1289,6 +1291,8 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
static void i915_driver_unregister(struct drm_i915_private *dev_priv)
{
+ intel_runtime_pm_disable(dev_priv);
+
intel_fbdev_unregister(dev_priv);
intel_audio_deinit(dev_priv);
@@ -1408,8 +1412,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct
pci_device_id *ent)
i915_driver_register(dev_priv);
- intel_runtime_pm_enable(dev_priv);
-
intel_init_ipc(dev_priv);
intel_runtime_pm_put(dev_priv);
@@ -1474,6 +1476,8 @@ void i915_driver_unload(struct drm_device *dev)
i915_driver_cleanup_mmio(dev_priv);
intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
+
+ WARN_ON(atomic_read(_priv->runtime_pm.wakeref_count));
}
static void i915_driver_release(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0601abb8c71f..dc6c0cec9b36 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1956,6 +1956,7 @@ void intel_power_domains_verify_state(struct
drm_i915_private *dev_priv);
void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume);
void bxt_display_core_uninit(struct drm_i915_private *dev_priv);
void intel_runtime_pm_enable(struct drm_i915_private *dev_priv);
+void intel_runtime_pm_disable(struct drm_i915_private *dev_priv);
const char *
intel_display_power_domain_str(enum intel_display_power_domain domain);
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index e209edbc561d..b78c3b48aa62 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3793,8 +3793,6 @@ void intel_power_domains_init_hw(struct drm_i915_private
*dev_priv, bool resume)
*/
void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv)
{
- struct device *kdev = _priv->drm.pdev->dev;
-
/*
* The i915.ko module is still not prepared to be loaded when
* the power well is not enabled, so just enable it in case
@@ -3809,13 +3807,6 @@ void intel_power_domains_fini_hw(struct drm_i915_private
*dev_priv)
/* Remove the refcount we took to keep power well support disabled. */
if (!i915_modparams.disable_power_well)
intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
-
- /*
-* Remove the refcount we took in intel_runtime_pm_enable() in case
-* the platform doesn't support runtime PM.
-*/
- if (!HAS_RUNTIME_PM(dev_priv))
- pm_runtime_put(kdev);
}
/**
@@ -4074,3 +4065,18 @@ void intel_runtime_pm_enable(struct drm_i915_private
*dev_priv)
*/
pm_runtime_put_autosuspend(kdev);
}
+
+void intel_runtime_pm_disable(struct drm_i915_private *dev_priv)
+{
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+ struct device *kdev = >dev;
+
+ pm_runtime_dont_use_autosuspend(kdev);
+
+ /*
+* Remove the refcount we took in intel_runtime_pm_enable() in case
+* the platform doesn't support runtime PM.
+*/
+ if (!HAS_RUNTIME_PM(dev_priv))
+ pm_runtime_put(kdev);
+}
--
2.18.0
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Re: [Intel-gfx] [PATCH 4/5] drm/vgem: Remove unecessary dma_fence_ops
Quoting Daniel Vetter (2018-08-09 09:33:49)
> On Wed, Jul 04, 2018 at 11:29:08AM +0200, Daniel Vetter wrote:
> > static void vgem_fence_release(struct dma_fence *base)
> > {
> > struct vgem_fence *fence = container_of(base, typeof(*fence), base);
> > @@ -76,11 +66,7 @@ static void vgem_fence_timeline_value_str(struct
> > dma_fence *fence, char *str,
> > static const struct dma_fence_ops vgem_fence_ops = {
> > .get_driver_name = vgem_fence_get_driver_name,
> > .get_timeline_name = vgem_fence_get_timeline_name,
> > - .enable_signaling = vgem_fence_enable_signaling,
> > - .signaled = vgem_fence_signaled,
> > - .wait = dma_fence_default_wait,
> > .release = vgem_fence_release,
> > -
That space was to separate the interesting ops from the debug!
-Chris
> > .fence_value_str = vgem_fence_value_str,
> > .timeline_value_str = vgem_fence_timeline_value_str,
> > };
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Re: [Intel-gfx] [PATCH 02/20] drm/i915: Set PCH as NOP when display is disabled
Quoting José Roberto de Souza (2018-08-09 01:15:48) > num_pipes is set to 0 if disable_display is set inside > intel_device_info_runtime_init() but when that happen PCH will > already be set in intel_detect_pch(). One major thing missed is that if you disable the displays via modparam, you need to reap all the BIOS enabled displays and stolen memory that conflict with our usage. (We ignore the conflict so that means the BIOS can write into memory we are using elsewhere.) The same bug exists for outputs we don't recover from the BIOS, which is a regression from circa 3.2. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 01/20] drm: Let userspace check if driver supports modeset
Quoting José Roberto de Souza (2018-08-09 01:15:47) > GPU accelerators usually don't have display block or the display > driver part can be disabled when building driver(for servers it saves > some resources) so it is important let userspace check this > capability too. > > Right now we are checking > drmModeGetResources()/drm_mode_getresources() for a error to detect > if display is enabled but it is a hackish way as it can fail for > other reasons too. Literally there are no other ways to fail. It reports -EINVAL if !MODESET and the counts otherwise. No allocations, no pointer chasing. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 4/5] drm/vgem: Remove unecessary dma_fence_ops
On Wed, Jul 04, 2018 at 11:29:08AM +0200, Daniel Vetter wrote:
> dma_fence_default_wait is the default now, same for the trivial
> enable_signaling implementation.
>
> Also remove the ->signaled callback, vgem can't peek ahead with a
> fastpath, returning false is the default implementation.
>
> Signed-off-by: Daniel Vetter
> Cc: Kees Cook
> Cc: Cihangir Akturk
> Cc: Sean Paul
> Cc: Daniel Vetter
Anyone feel like reviewing patches 1-4 here?
Thanks, Daniel
> ---
> drivers/gpu/drm/vgem/vgem_fence.c | 14 --
> 1 file changed, 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/vgem/vgem_fence.c
> b/drivers/gpu/drm/vgem/vgem_fence.c
> index b28876c222b4..75adedeaa384 100644
> --- a/drivers/gpu/drm/vgem/vgem_fence.c
> +++ b/drivers/gpu/drm/vgem/vgem_fence.c
> @@ -43,16 +43,6 @@ static const char *vgem_fence_get_timeline_name(struct
> dma_fence *fence)
> return "unbound";
> }
>
> -static bool vgem_fence_signaled(struct dma_fence *fence)
> -{
> - return false;
> -}
> -
> -static bool vgem_fence_enable_signaling(struct dma_fence *fence)
> -{
> - return true;
> -}
> -
> static void vgem_fence_release(struct dma_fence *base)
> {
> struct vgem_fence *fence = container_of(base, typeof(*fence), base);
> @@ -76,11 +66,7 @@ static void vgem_fence_timeline_value_str(struct dma_fence
> *fence, char *str,
> static const struct dma_fence_ops vgem_fence_ops = {
> .get_driver_name = vgem_fence_get_driver_name,
> .get_timeline_name = vgem_fence_get_timeline_name,
> - .enable_signaling = vgem_fence_enable_signaling,
> - .signaled = vgem_fence_signaled,
> - .wait = dma_fence_default_wait,
> .release = vgem_fence_release,
> -
> .fence_value_str = vgem_fence_value_str,
> .timeline_value_str = vgem_fence_timeline_value_str,
> };
> --
> 2.18.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add detection of changing of edid on between suspend and resume (rev2)
== Series Details ==
Series: drm/i915: Add detection of changing of edid on between suspend and
resume (rev2)
URL : https://patchwork.freedesktop.org/series/47680/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9898 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9898 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9898, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47680/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9898:
=== IGT changes ===
Possible regressions
igt@drv_module_reload@basic-reload-inject:
fi-bsw-n3050: PASS -> DMESG-WARN
== Known issues ==
Here are the changes found in Patchwork_9898 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_hangcheck:
{fi-bdw-samus}: PASS -> DMESG-FAIL (fdo#106560)
{fi-cfl-8109u}: PASS -> DMESG-FAIL (fdo#106560)
fi-cfl-s3: PASS -> DMESG-FAIL (fdo#106560)
{fi-icl-u}: NOTRUN -> INCOMPLETE (fdo#107399)
igt@drv_selftest@live_workarounds:
{fi-bsw-kefka}: PASS -> DMESG-FAIL (fdo#107292)
fi-bsw-n3050: PASS -> DMESG-FAIL (fdo#107292)
fi-cnl-psr: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_frontbuffer_tracking@basic:
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: PASS -> INCOMPLETE (fdo#103927)
{fi-icl-u}: NOTRUN -> DMESG-WARN (fdo#107382) +4
{igt@kms_psr@primary_page_flip}:
{fi-icl-u}: NOTRUN -> FAIL (fdo#107383) +3
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
fdo#107382 https://bugs.freedesktop.org/show_bug.cgi?id=107382
fdo#107383 https://bugs.freedesktop.org/show_bug.cgi?id=107383
fdo#107399 https://bugs.freedesktop.org/show_bug.cgi?id=107399
== Participating hosts (50 -> 48) ==
Additional (2): fi-kbl-7560u fi-icl-u
Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4636 -> Patchwork_9898
CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9898: b98c413f43d6d64fca1133ee29441a73726cbed8 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b98c413f43d6 drm/i915: Add detection of changing of edid on between suspend and
resume
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9898/issues.html
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Re: [Intel-gfx] [PATCH 02/20] drm/i915: Set PCH as NOP when display is disabled
On Wed, 08 Aug 2018, José Roberto de Souza wrote:
> num_pipes is set to 0 if disable_display is set inside
> intel_device_info_runtime_init() but when that happen PCH will
> already be set in intel_detect_pch().
>
> i915_driver_load()
> i915_driver_init_early()
> ...
> intel_detect_pch()
> ...
> ...
> i915_driver_init_hw()
> intel_device_info_runtime_init()
>
> So now setting num_pipes = 0 earlier to avoid this problem.
Okay, this gets confusing. There are other paths in
intel_device_info_runtime_init() that set num_pipes = 0 and depend on
PCH having been detected. :(
>
> Cc: Jani Nikula
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/i915_drv.c | 5 +
> drivers/gpu/drm/i915/intel_device_info.c | 8 ++--
> 2 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 9dce55182c3a..7952f5877402 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -917,6 +917,11 @@ static int i915_driver_init_early(struct
> drm_i915_private *dev_priv,
> if (ret < 0)
> goto err_workqueues;
>
> + if (i915_modparams.disable_display) {
> + DRM_INFO("Display disabled (module parameter)\n");
> + device_info->num_pipes = 0;
> + }
> +
Please look at the function as a whole, and note that this feels like a
random thing to add in the middle. Needs to be stowed away somewhere
deeper.
Overall, I think we need to be more accurate about the relationship of
num_pipes = 0 and PCH_NOP.
BR,
Jani.
> /* This must be called before any calls to HAS_PCH_* */
> intel_detect_pch(dev_priv);
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> b/drivers/gpu/drm/i915/intel_device_info.c
> index 0ef0c6448d53..67102b481c8f 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -776,12 +776,8 @@ void intel_device_info_runtime_init(struct
> intel_device_info *info)
> info->num_sprites[pipe] = 1;
> }
>
> - if (i915_modparams.disable_display) {
> - DRM_INFO("Display disabled (module parameter)\n");
> - info->num_pipes = 0;
> - } else if (info->num_pipes > 0 &&
> -(IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) &&
> -HAS_PCH_SPLIT(dev_priv)) {
> + if (info->num_pipes > 0 && (IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) &&
> + HAS_PCH_SPLIT(dev_priv)) {
> u32 fuse_strap = I915_READ(FUSE_STRAP);
> u32 sfuse_strap = I915_READ(SFUSE_STRAP);
--
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Hold rpm for unparking
== Series Details ==
Series: drm/i915/selftests: Hold rpm for unparking
URL : https://patchwork.freedesktop.org/series/47930/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4636 -> Patchwork_9897 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47930/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9897 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_hangcheck:
fi-skl-guc: PASS -> DMESG-FAIL (fdo#107174)
igt@drv_selftest@live_workarounds:
{fi-bsw-kefka}: PASS -> DMESG-FAIL (fdo#107292)
fi-whl-u: PASS -> DMESG-FAIL (fdo#107292)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
{fi-byt-clapper}: PASS -> FAIL (fdo#103191, fdo#107362)
Warnings
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (50 -> 47) ==
Additional (1): fi-kbl-7560u
Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4636 -> Patchwork_9897
CI_DRM_4636: 084bb2fb549650b6da80976c9bc594779ce342b4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4590: e6ddaca7a8ea9d3d27f0ecaa36b357cc02e2df3b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9897: 68d39a6b2408820f4c146396e499cf48e25dcecc @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
68d39a6b2408 drm/i915/selftests: Hold rpm for unparking
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9897/issues.html
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[Intel-gfx] [PATCH] drm/i915/selftests: Hold rpm for unparking
The call to i915_gem_unpark() checks that we hold a rpm wakeref before
taking a long term wakeref for i915->gt.awake. We should therefore make
sure we do hold the wakeref when directly calling unpark to disable
the retire worker.
Fixes: 932cac10c8fb ("drm/i915/selftests: Prevent background reaping of active
objects")
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Matthew Auld
---
.../gpu/drm/i915/selftests/i915_gem_object.c | 20 +--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
index d9eca1b02aee..6d3516d5bff9 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
@@ -499,6 +499,19 @@ static bool assert_mmap_offset(struct drm_i915_private
*i915,
return err == expected;
}
+static void disable_retire_worker(struct drm_i915_private *i915)
+{
+ mutex_lock(>drm.struct_mutex);
+ if (!i915->gt.active_requests++) {
+ intel_runtime_pm_get(i915);
+ i915_gem_unpark(i915);
+ intel_runtime_pm_put(i915);
+ }
+ mutex_unlock(>drm.struct_mutex);
+ cancel_delayed_work_sync(>gt.retire_work);
+ cancel_delayed_work_sync(>gt.idle_work);
+}
+
static int igt_mmap_offset_exhaustion(void *arg)
{
struct drm_i915_private *i915 = arg;
@@ -509,12 +522,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
int loop, err;
/* Disable background reaper */
- mutex_lock(>drm.struct_mutex);
- if (!i915->gt.active_requests++)
- i915_gem_unpark(i915);
- mutex_unlock(>drm.struct_mutex);
- cancel_delayed_work_sync(>gt.retire_work);
- cancel_delayed_work_sync(>gt.idle_work);
+ disable_retire_worker(i915);
GEM_BUG_ON(!i915->gt.awake);
/* Trim the device mmap space to only a page */
--
2.18.0
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Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: kill intel_display_power_well_is_enabled()
On Thu, 09 Aug 2018 00:58:53 +0200, Paulo Zanoni wrote: Em Qua, 2018-08-08 às 22:22 +, Patchwork escreveu: == Series Details == Series: series starting with [1/4] drm/i915: kill intel_display_power_well_is_enabled() URL : https://patchwork.freedesktop.org/series/47908/ State : warning == Summary == $ dim checkpatch origin/drm-tip 94cddb6f9752 drm/i915: kill intel_display_power_well_is_enabled() dfb09a8944b0 drm/i915: BUG() if we can't lookup_power_well() -:31: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() #31: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:1124: + BUG(); See the commit message of patch 2, Mr. Robot. I don't think it's worth adding checking code in the callers, and replacing the current null pointer dereference with a BUG() is an improvement IMHO. If anybody disagrees with this, please say so. other option could be to use WARN_ON to make Mr. Robot happy and then return first/last/default power well to make callers happy /michal ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
