[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: allow to load DMC firmware on next gen
== Series Details == Series: series starting with [1/2] drm/i915: allow to load DMC firmware on next gen URL : https://patchwork.freedesktop.org/series/52639/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5154 -> Patchwork_10845 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10845 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10845, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/52639/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10845: === IGT changes === Possible regressions igt@i915_selftest@live_gtt: fi-kbl-7560u: PASS -> INCOMPLETE == Known issues == Here are the changes found in Patchwork_10845 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) Possible fixes igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS igt@kms_pipe_crc_basic@read-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 == Participating hosts (50 -> 46) == Missing(4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-hsw-4200u == Build changes == * Linux: CI_DRM_5154 -> Patchwork_10845 CI_DRM_5154: 2ba924da1cb3a684f538e0c25e2409b942a5a35a @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4718: 8ac5cfb4db9c7bc593beec18a6be1e2ff163106c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10845: 0ba6788d0bf95c105ec437f6bc649c2c0885eeea @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 0ba6788d0bf9 drm/i915: Downgrade unknown CSR firmware warnings ac7ff8ccff7a drm/i915: allow to load DMC firmware on next gen == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10845/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Remove all bad dp_mst_port uses and hide struct def
== Series Details == Series: Remove all bad dp_mst_port uses and hide struct def URL : https://patchwork.freedesktop.org/series/52636/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5154 -> Patchwork_10844 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/52636/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10844 that come from known issues: === IGT changes === Possible fixes igt@gem_ctx_create@basic-files: fi-bsw-kefka: FAIL (fdo#108656) -> PASS igt@i915_module_load@reload: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS igt@kms_pipe_crc_basic@read-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 == Participating hosts (50 -> 46) == Missing(4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-hsw-4200u == Build changes == * Linux: CI_DRM_5154 -> Patchwork_10844 CI_DRM_5154: 2ba924da1cb3a684f538e0c25e2409b942a5a35a @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4718: 8ac5cfb4db9c7bc593beec18a6be1e2ff163106c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10844: af900c99ec9037164b46a79abadd6d22d02af78e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == af900c99ec90 drm/i915: Start using struct drm_dp_mst_port again f7e93f99d599 drm/dp_mst: Hide drm_dp_mst_port contents from drivers 1affa2235cf2 drm/nouveau: Stop reading port->mgr in nv50_mstc_detect() 010aca1e996b drm/nouveau: Stop reading port->mgr in nv50_mstc_get_modes() 81eb3aab81da drm/nouveau: Use drm_dp_get_payload_info() for getting payload/vcpi 268300d13d06 drm/dp_mst: Add drm_dp_get_payload_info() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10844/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: allow to load DMC firmware on next gen
Before commit d8a5b7d79fb7 ("drm/i915/csr: keep max firmware size together
with firmare name and version") it was possible to load the firmware for
testing purposes via parameter. Let's use the size of the last known
platform to recover that behavior.
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index c1ca6596ff5c..b4476d891fa3 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -34,6 +34,8 @@
* low-power state and comes back to normal.
*/
+#define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE
+
#define ICL_CSR_PATH "i915/icl_dmc_ver1_07.bin"
#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
#define ICL_CSR_MAX_FW_SIZE0x6000
@@ -467,7 +469,10 @@ void intel_csr_ucode_init(struct drm_i915_private
*dev_priv)
*/
intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
- if (IS_ICELAKE(dev_priv)) {
+ if (INTEL_GEN(dev_priv) >= 12) {
+ /* Allow to load fw via parameter using the last known size */
+ csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
+ } else if (IS_ICELAKE(dev_priv)) {
csr->fw_path = ICL_CSR_PATH;
csr->required_version = ICL_CSR_VERSION_REQUIRED;
csr->max_fw_size = ICL_CSR_MAX_FW_SIZE;
--
2.19.1.1.g56c4683e68
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[Intel-gfx] [PATCH 2/2] drm/i915: Downgrade unknown CSR firmware warnings
Like it was done in commit 9e180d9991dc ("drm/i915: Downgrade unknown
firmware warnings") for huc and guc: downgrade CSR firmware warnings. If
we have released no firmware yet for a platform, stop scaring the
consumer and merely note its expected absence.
By simply removing the warning and early return we hit the condition
with the appropriate message.
Cc: Chris Wilson
Cc: Joonas Lahtinen
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_csr.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index b4476d891fa3..a516697bf57d 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -496,9 +496,6 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
csr->fw_path = BXT_CSR_PATH;
csr->required_version = BXT_CSR_VERSION_REQUIRED;
csr->max_fw_size = BXT_CSR_MAX_FW_SIZE;
- } else {
- MISSING_CASE(INTEL_REVID(dev_priv));
- return;
}
if (i915_modparams.dmc_firmware_path) {
--
2.19.1.1.g56c4683e68
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[Intel-gfx] [PATCH 3/6] drm/nouveau: Stop reading port->mgr in nv50_mstc_get_modes()
mstc->port isn't validated here so it could be null or worse when we access it. And drivers aren't ever supposed to be looking at it's contents anyway. Plus, we can already get the MST manager from >mstm->mgr. Signed-off-by: Lyude Paul Cc: sta...@vger.kernel.org --- drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index e6f72ca0b1fa..66c40b56a0cb 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -893,7 +893,8 @@ nv50_mstc_get_modes(struct drm_connector *connector) struct nv50_mstc *mstc = nv50_mstc(connector); int ret = 0; - mstc->edid = drm_dp_mst_get_edid(>connector, mstc->port->mgr, mstc->port); + mstc->edid = drm_dp_mst_get_edid(>connector, +>mstm->mgr, mstc->port); drm_connector_update_edid_property(>connector, mstc->edid); if (mstc->edid) ret = drm_add_edid_modes(>connector, mstc->edid); -- 2.19.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/6] drm/dp_mst: Add drm_dp_get_payload_info()
Some hardware (nvidia hardware in particular) needs to be notified of
the exact VCPI and payload settings that the topology manager decided on
for each mstb port. Since there isn't currently any way to get this
information without going through port (which drivers are very much not
supposed to do by themselves, ever), let's add one.
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/drm_dp_mst_topology.c | 56 +++
include/drm/drm_dp_mst_helper.h | 5 ++-
2 files changed, 60 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 529414556962..4336d17ce904 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1982,6 +1982,62 @@ int drm_dp_update_payload_part2(struct
drm_dp_mst_topology_mgr *mgr)
}
EXPORT_SYMBOL(drm_dp_update_payload_part2);
+/**
+ * drm_dp_get_payload_info() - Retrieve payload/vcpi information for the given
+ * @port
+ * @mgr: manager to use
+ * @port: the port to get the relevant payload information for
+ * @vcpi_out: where to copy the port's VCPI information to
+ * @payload_out: where to copy the port's payload information to
+ *
+ * Searches the current payloads for @mgr and finds the relevant payload and
+ * VCPI information that was programmed by the topology mgr, then copies it
+ * into @vcpi_out and @payload_out. Drivers which need to know this
+ * information must use this helper as opposed to checking @port themselves,
+ * as this helper will ensure the port reference is still valid and grab the
+ * appropriate locks in @mgr.
+ *
+ * Returns:
+ * 0 on success, negative error code if the port is no longer valid or a
+ * programmed payload could not be found for @port.
+ */
+int drm_dp_get_payload_info(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_port *port,
+ struct drm_dp_vcpi *vcpi_out,
+ struct drm_dp_payload *payload_out)
+{
+ struct drm_dp_payload *payload = NULL;
+ int i;
+ int ret = 0;
+
+ port = drm_dp_get_validated_port_ref(mgr, port);
+ if (!port)
+ return -EINVAL;
+
+ mutex_lock(>payload_lock);
+ /* Figure out which of the payloads belongs to this port */
+ for (i = 0; i < mgr->max_payloads; i++) {
+ if (mgr->payloads[i].vcpi == port->vcpi.vcpi) {
+ payload = >payloads[i];
+ break;
+ }
+ }
+
+ if (!payload) {
+ DRM_DEBUG_KMS("Failed to find payload for port %p\n", port);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ *payload_out = *payload;
+ *vcpi_out = port->vcpi;
+out:
+ mutex_unlock(>payload_lock);
+ drm_dp_put_port(port);
+ return ret;
+}
+EXPORT_SYMBOL(drm_dp_get_payload_info);
+
#if 0 /* unused as of yet */
static int drm_dp_send_dpcd_read(struct drm_dp_mst_topology_mgr *mgr,
struct drm_dp_mst_port *port,
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 59f005b419cf..9cc93ea60e7e 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -592,7 +592,10 @@ bool drm_dp_mst_allocate_vcpi(struct
drm_dp_mst_topology_mgr *mgr,
struct drm_dp_mst_port *port, int pbn, int slots);
int drm_dp_mst_get_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct
drm_dp_mst_port *port);
-
+int drm_dp_get_payload_info(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_port *port,
+ struct drm_dp_vcpi *vcpi_out,
+ struct drm_dp_payload *payload_out);
void drm_dp_mst_reset_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, struct
drm_dp_mst_port *port);
--
2.19.1
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[Intel-gfx] [PATCH 5/6] drm/dp_mst: Hide drm_dp_mst_port contents from drivers
It hasn't been OK to access any of the contents of struct
drm_dp_mst_port without validating the port first for quite a long time
now, since a drm_dp_mst_port structure can be freed at any given moment
in time outside of the driver's contorl. Any kind of information a
driver needs from drm_dp_mst_port should be exposed through a helper
function instead that handles validating the port pointer, along with
anything else that's needed.
Since we've removed the last dangerous remanents of ->port accesses in
the DRM tree, let's finish this off and move the struct drm_dp_mst_port
definition out of drm_dp_mst_helper.h, into drm_dp_mst_topology.c, and
then replace it's header definition with an incomplete struct type. This
way drivers can still use the struct type, and no one else will make the
mistake of trying to access the contents of port.
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/drm_dp_mst_topology.c | 59 ++
include/drm/drm_dp_mst_helper.h | 60 +--
2 files changed, 60 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 4336d17ce904..5fa898a8a64d 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -41,6 +41,65 @@
* protocol. The helpers contain a topology manager and bandwidth manager.
* The helpers encapsulate the sending and received of sideband msgs.
*/
+
+/**
+ * struct drm_dp_mst_port - MST port
+ * @kref: reference count for this port.
+ * @port_num: port number
+ * @input: if this port is an input port.
+ * @mcs: message capability status - DP 1.2 spec.
+ * @ddps: DisplayPort Device Plug Status - DP 1.2
+ * @pdt: Peer Device Type
+ * @ldps: Legacy Device Plug Status
+ * @dpcd_rev: DPCD revision of device on this port
+ * @num_sdp_streams: Number of simultaneous streams
+ * @num_sdp_stream_sinks: Number of stream sinks
+ * @available_pbn: Available bandwidth for this port.
+ * @next: link to next port on this branch device
+ * @mstb: branch device attach below this port
+ * @aux: i2c aux transport to talk to device connected to this port.
+ * @parent: branch device parent of this port
+ * @vcpi: Virtual Channel Payload info for this port.
+ * @connector: DRM connector this port is connected to.
+ * @mgr: topology manager this port lives under.
+ *
+ * This structure represents an MST port endpoint on a device somewhere
+ * in the MST topology.
+ */
+struct drm_dp_mst_port {
+ struct kref kref;
+
+ u8 port_num;
+ bool input;
+ bool mcs;
+ bool ddps;
+ u8 pdt;
+ bool ldps;
+ u8 dpcd_rev;
+ u8 num_sdp_streams;
+ u8 num_sdp_stream_sinks;
+ uint16_t available_pbn;
+ struct list_head next;
+ struct drm_dp_mst_branch *mstb; /* pointer to an mstb if this port has
one */
+ struct drm_dp_aux aux; /* i2c bus for this port? */
+ struct drm_dp_mst_branch *parent;
+
+ struct drm_dp_vcpi vcpi;
+ struct drm_connector *connector;
+ struct drm_dp_mst_topology_mgr *mgr;
+
+ /**
+* @cached_edid: for DP logical ports - make tiling work by ensuring
+* that the EDID for all connectors is read immediately.
+*/
+ struct edid *cached_edid;
+ /**
+* @has_audio: Tracks whether the sink connector to this port is
+* audio-capable.
+*/
+ bool has_audio;
+};
+
static bool dump_dp_payload_table(struct drm_dp_mst_topology_mgr *mgr,
char *buf);
static int test_calc_pbn_mode(void);
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 9cc93ea60e7e..3076a45aef4d 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -26,7 +26,7 @@
#include
#include
-struct drm_dp_mst_branch;
+struct drm_dp_mst_port;
/**
* struct drm_dp_vcpi - Virtual Channel Payload Identifier
@@ -42,64 +42,6 @@ struct drm_dp_vcpi {
int num_slots;
};
-/**
- * struct drm_dp_mst_port - MST port
- * @kref: reference count for this port.
- * @port_num: port number
- * @input: if this port is an input port.
- * @mcs: message capability status - DP 1.2 spec.
- * @ddps: DisplayPort Device Plug Status - DP 1.2
- * @pdt: Peer Device Type
- * @ldps: Legacy Device Plug Status
- * @dpcd_rev: DPCD revision of device on this port
- * @num_sdp_streams: Number of simultaneous streams
- * @num_sdp_stream_sinks: Number of stream sinks
- * @available_pbn: Available bandwidth for this port.
- * @next: link to next port on this branch device
- * @mstb: branch device attach below this port
- * @aux: i2c aux transport to talk to device connected to this port.
- * @parent: branch device parent of this port
- * @vcpi: Virtual Channel Payload info for this port.
- * @connector: DRM connector this port is connected to.
- * @mgr: topology manager this port lives under.
- *
- * This structure represents an MST port
[Intel-gfx] [PATCH 4/6] drm/nouveau: Stop reading port->mgr in nv50_mstc_detect()
Same as the previous commit, but for nv50_mstc_detect() this time. Signed-off-by: Lyude Paul Cc: sta...@vger.kernel.org --- drivers/gpu/drm/nouveau/dispnv50/disp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index 66c40b56a0cb..a08dd827e892 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -930,7 +930,7 @@ nv50_mstc_detect(struct drm_connector *connector, bool force) if (ret < 0 && ret != -EACCES) return connector_status_disconnected; - conn_status = drm_dp_mst_detect_port(connector, mstc->port->mgr, + conn_status = drm_dp_mst_detect_port(connector, >mstm->mgr, mstc->port); pm_runtime_mark_last_busy(connector->dev->dev); -- 2.19.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 6/6] drm/i915: Start using struct drm_dp_mst_port again
Originally we started storing pointers to the drm_dp_mst_port struct for
each intel_connector as void* to stop people from trying to dereference
them. Now that we've removed the public struct definition for
drm_dp_mst_port however, it's no longer possible to dereference the port
structure even when using the proper type. So, move back to struct
drm_dp_mst_port from void* for clarity.
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/i915/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 4de247ddf05f..3408efe67694 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -39,7 +39,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder
*encoder,
struct intel_digital_port *intel_dig_port = intel_mst->primary;
struct intel_dp *intel_dp = _dig_port->dp;
struct drm_connector *connector = conn_state->connector;
- void *port = to_intel_connector(connector)->port;
+ struct drm_dp_mst_port *port = to_intel_connector(connector)->port;
struct drm_atomic_state *state = pipe_config->base.state;
int bpp;
int lane_count, slots = 0;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f575ba2a59da..1bb69097d6cb 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -415,7 +415,7 @@ struct intel_connector {
state of connector->polled in case hotplug storm detection changes
it */
u8 polled;
- void *port; /* store this opaque as its illegal to dereference it */
+ struct drm_dp_mst_port *port;
struct intel_dp *mst_port;
--
2.19.1
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[Intel-gfx] [PATCH 2/6] drm/nouveau: Use drm_dp_get_payload_info() for getting payload/vcpi
Currently, nouveau tries to go through the drm_dp_mst_port structures
itself in order to retrieve the relevant payload and VCPI information
that it needs to report to the GPU. This is wrong: mstc->port could be
destroyed at any point, and additionally the payload could be changed at
any point because it doesn't bother trying to grab the payload lock. So;
remove nv50_msto_payload entirely and use the new
drm_dp_get_payload_info() helper.
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 55 ++---
1 file changed, 21 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 6cbbae3f438b..e6f72ca0b1fa 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -665,41 +665,24 @@ struct nv50_msto {
bool disabled;
};
-static struct drm_dp_payload *
-nv50_msto_payload(struct nv50_msto *msto)
-{
- struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
- struct nv50_mstc *mstc = msto->mstc;
- struct nv50_mstm *mstm = mstc->mstm;
- int vcpi = mstc->port->vcpi.vcpi, i;
-
- NV_ATOMIC(drm, "%s: vcpi %d\n", msto->encoder.name, vcpi);
- for (i = 0; i < mstm->mgr.max_payloads; i++) {
- struct drm_dp_payload *payload = >mgr.payloads[i];
- NV_ATOMIC(drm, "%s: %d: vcpi %d start 0x%02x slots 0x%02x\n",
- mstm->outp->base.base.name, i, payload->vcpi,
- payload->start_slot, payload->num_slots);
- }
-
- for (i = 0; i < mstm->mgr.max_payloads; i++) {
- struct drm_dp_payload *payload = >mgr.payloads[i];
- if (payload->vcpi == vcpi)
- return payload;
- }
-
- return NULL;
-}
-
static void
nv50_msto_cleanup(struct nv50_msto *msto)
{
struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
struct nv50_mstc *mstc = msto->mstc;
struct nv50_mstm *mstm = mstc->mstm;
+ struct drm_dp_payload payload;
+ struct drm_dp_vcpi vcpi;
+ int ret;
NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);
- if (mstc->port && mstc->port->vcpi.vcpi > 0 && !nv50_msto_payload(msto))
- drm_dp_mst_deallocate_vcpi(>mgr, mstc->port);
+ if (mstc->port) {
+ ret = drm_dp_get_payload_info(>mgr, mstc->port,
+ , );
+ if (!ret)
+ drm_dp_mst_deallocate_vcpi(>mgr, mstc->port);
+ }
+
if (msto->disabled) {
msto->mstc = NULL;
msto->head = NULL;
@@ -713,6 +696,9 @@ nv50_msto_prepare(struct nv50_msto *msto)
struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
struct nv50_mstc *mstc = msto->mstc;
struct nv50_mstm *mstm = mstc->mstm;
+ struct drm_dp_payload payload;
+ struct drm_dp_vcpi vcpi;
+ int ret;
struct {
struct nv50_disp_mthd_v1 base;
struct nv50_disp_sor_dp_mst_vcpi_v0 vcpi;
@@ -725,13 +711,14 @@ nv50_msto_prepare(struct nv50_msto *msto)
};
NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
- if (mstc->port && mstc->port->vcpi.vcpi > 0) {
- struct drm_dp_payload *payload = nv50_msto_payload(msto);
- if (payload) {
- args.vcpi.start_slot = payload->start_slot;
- args.vcpi.num_slots = payload->num_slots;
- args.vcpi.pbn = mstc->port->vcpi.pbn;
- args.vcpi.aligned_pbn = mstc->port->vcpi.aligned_pbn;
+ if (mstc->port) {
+ ret = drm_dp_get_payload_info(>mgr, mstc->port,
+ , );
+ if (!ret) {
+ args.vcpi.start_slot = payload.start_slot;
+ args.vcpi.num_slots = payload.num_slots;
+ args.vcpi.pbn = vcpi.pbn;
+ args.vcpi.aligned_pbn = vcpi.aligned_pbn;
}
}
--
2.19.1
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 0/6] Remove all bad dp_mst_port uses and hide struct def
So we don't ever have to worry about drivers touching drm_dp_mst_port structs without verifying them and crashing again. Lyude Paul (6): drm/dp_mst: Add drm_dp_get_payload_info() drm/nouveau: Use drm_dp_get_payload_info() for getting payload/vcpi drm/nouveau: Stop reading port->mgr in nv50_mstc_get_modes() drm/nouveau: Stop reading port->mgr in nv50_mstc_detect() drm/dp_mst: Hide drm_dp_mst_port contents from drivers drm/i915: Start using struct drm_dp_mst_port again drivers/gpu/drm/drm_dp_mst_topology.c | 115 drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/intel_drv.h| 2 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 60 + include/drm/drm_dp_mst_helper.h | 65 ++ 5 files changed, 146 insertions(+), 98 deletions(-) -- 2.19.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Hide enable_gvt modparam when not compiled in
== Series Details == Series: drm/i915: Hide enable_gvt modparam when not compiled in URL : https://patchwork.freedesktop.org/series/52616/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5151_full -> Patchwork_10841_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10841_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10841_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10841_full: === IGT changes === Warnings igt@kms_busy@basic-flip-b: shard-snb: SKIP -> PASS igt@tools_test@sysfs_l3_parity: shard-hsw: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10841_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_schedule@pi-ringfull-bsd: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@gem_userptr_blits@readonly-unsync: shard-skl: PASS -> INCOMPLETE (fdo#108074) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107725) igt@kms_cursor_crc@cursor-128x128-random: shard-glk: PASS -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-128x42-random: shard-skl: NOTRUN -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-256x256-dpms: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: NOTRUN -> FAIL (fdo#103232, fdo#103191) igt@kms_cursor_legacy@flip-vs-cursor-legacy: shard-glk: PASS -> FAIL (fdo#102670) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: shard-glk: PASS -> FAIL (fdo#103167) +2 igt@kms_frontbuffer_tracking@fbc-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-suspend: shard-skl: PASS -> INCOMPLETE (fdo#106978, fdo#104108) igt@kms_plane_alpha_blend@pipe-b-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) +3 igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#103166) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) igt@pm_rpm@fences: shard-skl: PASS -> INCOMPLETE (fdo#107807) +2 igt@pm_rpm@pm-caching: shard-skl: NOTRUN -> INCOMPLETE (fdo#107807) Possible fixes igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: FAIL (fdo#106641) -> PASS igt@kms_busy@extended-pageflip-hang-newfb-render-a: shard-glk: DMESG-WARN (fdo#107956) -> PASS igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: shard-hsw: DMESG-WARN (fdo#107956) -> PASS igt@kms_color@pipe-a-gamma: shard-skl: FAIL (fdo#104782) -> PASS igt@kms_color@pipe-b-legacy-gamma: shard-apl: FAIL (fdo#104782) -> PASS igt@kms_cursor_crc@cursor-64x64-onscreen: shard-skl: FAIL (fdo#103232) -> PASS igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-xtiled: shard-skl: FAIL (fdo#103184) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-skl: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: FAIL (fdo#103167) -> PASS +2 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: shard-glk: FAIL (fdo#103167) -> PASS +3 igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu: shard-skl: FAIL (fdo#103167) -> PASS +3 igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: FAIL (fdo#108145, fdo#107815) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-y: shard-glk: FAIL (fdo#103166) -> PASS +2 shard-apl: FAIL (fdo#103166) -> PASS igt@kms_vblank@pipe-a-wait-busy: shard-glk: DMESG-WARN (fdo#106538, fdo#105763) -> PASS +1 igt@kms_vblank@pipe-c-ts-continuation-suspend: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS +1 fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Disable LP3 watermarks on all SNB machines (rev2)
== Series Details == Series: drm/i915: Disable LP3 watermarks on all SNB machines (rev2) URL : https://patchwork.freedesktop.org/series/52440/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5150_full -> Patchwork_10839_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10839_full that come from known issues: === IGT changes === Issues hit igt@drm_import_export@import-close-race-flink: shard-skl: PASS -> TIMEOUT (fdo#108667) igt@gem_exec_schedule@pi-ringfull-bsd: shard-skl: NOTRUN -> FAIL (fdo#103158) +1 igt@gem_exec_schedule@pi-ringfull-render: shard-kbl: NOTRUN -> FAIL (fdo#103158) igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: PASS -> INCOMPLETE (fdo#106023, fdo#106887, fdo#103665) igt@gem_softpin@noreloc-s3: shard-skl: PASS -> INCOMPLETE (fdo#107773, fdo#104108) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-64x21-onscreen: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_flip@flip-vs-expired-vblank: shard-skl: PASS -> FAIL (fdo#105363) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move: shard-apl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: shard-glk: PASS -> FAIL (fdo#103167) +3 igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc: shard-skl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbcpsr-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc: shard-skl: NOTRUN -> FAIL (fdo#103167) +1 igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: shard-skl: PASS -> FAIL (fdo#103166) igt@kms_plane@plane-position-covered-pipe-a-planes: shard-apl: PASS -> FAIL (fdo#103166) +1 igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: shard-skl: NOTRUN -> FAIL (fdo#108145) +4 igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: shard-kbl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) +3 igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-skl: NOTRUN -> FAIL (fdo#103166, fdo#107815) igt@kms_rotation_crc@primary-rotation-90: shard-skl: PASS -> FAIL (fdo#103925, fdo#107815) igt@kms_sysfs_edid_timing: shard-skl: NOTRUN -> FAIL (fdo#100047) igt@pm_backlight@fade_with_suspend: shard-skl: NOTRUN -> FAIL (fdo#107847) Possible fixes igt@drv_suspend@shrink: shard-glk: INCOMPLETE (fdo#106886, k.org#198133, fdo#103359) -> PASS igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-snb: DMESG-WARN (fdo#107956) -> PASS igt@kms_cursor_crc@cursor-256x256-random: shard-apl: FAIL (fdo#103232) -> PASS +2 igt@kms_cursor_crc@cursor-64x64-suspend: shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: FAIL (fdo#105454) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: FAIL (fdo#107815, fdo#108145) -> PASS igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: shard-apl: FAIL (fdo#103166) -> PASS +1 igt@kms_setmode@basic: shard-hsw: FAIL (fdo#99912) -> PASS igt@perf@oa-exponents: shard-kbl: INCOMPLETE (fdo#103665) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103925
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/5] drm/i915: extract fixed point math to i915_fixed.h
== Series Details == Series: series starting with [v2,1/5] drm/i915: extract fixed point math to i915_fixed.h URL : https://patchwork.freedesktop.org/series/52608/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5150_full -> Patchwork_10838_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10838_full that come from known issues: === IGT changes === Issues hit igt@drm_import_export@import-close-race-flink: shard-skl: PASS -> TIMEOUT (fdo#108667) igt@gem_exec_schedule@pi-ringfull-bsd: shard-skl: NOTRUN -> FAIL (fdo#103158) +1 igt@gem_exec_schedule@pi-ringfull-render: shard-kbl: NOTRUN -> FAIL (fdo#103158) igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: PASS -> INCOMPLETE (fdo#106887, fdo#103665, fdo#106023) igt@gem_workarounds@suspend-resume-fd: shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107773) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-256x256-dpms: shard-apl: PASS -> FAIL (fdo#103232) +1 igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: NOTRUN -> INCOMPLETE (fdo#104108) igt@kms_cursor_legacy@cursora-vs-flipa-toggle: shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: shard-apl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-1p-rte: shard-apl: PASS -> DMESG-WARN (fdo#108131, fdo#103558) igt@kms_frontbuffer_tracking@fbcpsr-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@fbcpsr-suspend: shard-skl: NOTRUN -> INCOMPLETE (fdo#106978, fdo#104108) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc: shard-skl: NOTRUN -> FAIL (fdo#103167) +1 igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: shard-skl: PASS -> FAIL (fdo#103166) igt@kms_plane@plane-position-covered-pipe-a-planes: shard-apl: PASS -> FAIL (fdo#103166) +1 igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: shard-kbl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) +3 igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) +3 igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-skl: NOTRUN -> FAIL (fdo#103166, fdo#107815) igt@kms_rotation_crc@primary-rotation-90: shard-skl: PASS -> FAIL (fdo#103925, fdo#107815) igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) igt@kms_sysfs_edid_timing: shard-skl: NOTRUN -> FAIL (fdo#100047) igt@perf@blocking: shard-hsw: PASS -> FAIL (fdo#102252) igt@pm_backlight@fade_with_suspend: shard-skl: NOTRUN -> FAIL (fdo#107847) igt@pm_rpm@dpms-mode-unset-lpsp: shard-skl: NOTRUN -> INCOMPLETE (fdo#107807) igt@pm_rpm@gem-mmap-cpu: shard-apl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) +5 Possible fixes igt@kms_cursor_crc@cursor-256x85-onscreen: shard-apl: FAIL (fdo#103232) -> PASS +2 igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: FAIL (fdo#108145, fdo#107815) -> PASS igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: shard-skl: FAIL (fdo#107815) -> PASS igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: shard-apl: FAIL (fdo#103166) -> PASS +1 igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS igt@perf@oa-exponents: shard-kbl: INCOMPLETE (fdo#103665) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103665
Re: [Intel-gfx] [PATCH 4/5] drm/cma-helper: Add DRM_GEM_CMA_VMAP_DRIVER_OPS
Noralf Trønnes writes: > This adds functionality to the CMA helper which ensures that the kernel > virtual address is set on the CMA GEM object also for imported buffers. > > The drivers have been audited to ensure that none set ->vaddr on imported > buffers, making the conditional dma_buf_vunmap() call in > drm_gem_cma_free_object() safe. > > Signed-off-by: Noralf Trønnes I didn't look through 1-3 much since they had acks, but 4/5 get my: Reviewed-by: Eric Anholt signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)
== Series Details == Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6) URL : https://patchwork.freedesktop.org/series/51412/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5152 -> Patchwork_10843 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51412/revisions/6/mbox/ == Known issues == Here are the changes found in Patchwork_10843 that come from known issues: === IGT changes === Issues hit igt@gem_ctx_create@basic-files: fi-icl-u2: PASS -> DMESG-WARN (fdo#107724) igt@i915_selftest@live_contexts: fi-bsw-kefka: PASS -> DMESG-FAIL (fdo#108626, fdo#108656) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) +1 Possible fixes igt@kms_frontbuffer_tracking@basic: fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS Warnings igt@i915_selftest@live_contexts: fi-icl-u: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315) fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569 fdo#108626 https://bugs.freedesktop.org/show_bug.cgi?id=108626 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 == Participating hosts (51 -> 47) == Missing(4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-hsw-4200u == Build changes == * Linux: CI_DRM_5152 -> Patchwork_10843 CI_DRM_5152: 458538284af8fa513c9d1404a8651931d6c79ddf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4718: 8ac5cfb4db9c7bc593beec18a6be1e2ff163106c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10843: 06eec138d7d531a074fb79592bb9cacbe2302bb7 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 06eec138d7d5 drm/nouveau: Use atomic VCPI helpers for MST 92a67542920b drm/nouveau: Stop unsetting mstc->port, check connector registration b8566f9fea49 drm/dp_mst: Check payload count in drm_dp_mst_atomic_check() 29194b8b74f3 drm/dp_mst: Start tracking per-port VCPI allocations 849758e12551 drm/dp_mst: Return kref_put() result from drm_dp_put_port() cec677f01b2c drm/dp_mst: Add some atomic state iterator macros == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10843/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
On Thu, Nov 15, 2018 at 11:48:06AM -0800, clinton.a.tay...@intel.com wrote: > From: Clint Taylor > > The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv during > driver init. Use this value instead of reading the register again as the > power well for PORTA RCOMP register may not be enabled and will return > 0x instead of the computed value. I have the feeling this is not the right fix for the issue. The function where this is stored is the same function this patch is changing. just a little bit earlier. So if power well is not enabled now it was probably not enabled a few cycles earlier. Also if it is just a matter of power well it is just to make sure that we make sure to grab the right power domain and relase when this is not needed. Thanks, Rodrigo. > > Cc: Ville Syrjälä > Signed-off-by: Clint Taylor > --- > drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c > b/drivers/gpu/drm/i915/intel_dpio_phy.c > index 3c7f10d..7cee57f 100644 > --- a/drivers/gpu/drm/i915/intel_dpio_phy.c > +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c > @@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct drm_i915_private > *dev_priv, >* the corresponding calibrated value from PHY1, and disable >* the automatic calibration on PHY0. >*/ > - val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv, > - phy_info->rcomp_phy); > + if (!dev_priv->bxt_phy_grc) > + val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv, > + > phy_info->rcomp_phy); > + else > + val = dev_priv->bxt_phy_grc; > + > grc_code = val << GRC_CODE_FAST_SHIFT | > val << GRC_CODE_SLOW_SHIFT | > val; > -- > 1.9.1 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
On Thu, Nov 15, 2018 at 11:48:06AM -0800, clinton.a.tay...@intel.com wrote: > From: Clint Taylor > > The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv during > driver init. Use this value instead of reading the register again as the > power well for PORTA RCOMP register may not be enabled and will return > 0x instead of the computed value. PORT_REF_DW6 for both the port A and the port B/C PHYs are in power well #0, which is always on whenever we are runtime resumed (which is always the case during _bxt_ddi_phy_init). Also the PHY for port A always gets enabled before we read out the comp value. What are the other port A PHY registers in the above case? Could it be that the port A PHY power gating in PORT_CL1CM_DW28 causes this? Not sure how good it is to reuse the same comp value across multiple off/on cycles, it could change in theory. There could also be some other issue with the port A PHY init. > > Cc: Ville Syrjälä > Signed-off-by: Clint Taylor > --- > drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c > b/drivers/gpu/drm/i915/intel_dpio_phy.c > index 3c7f10d..7cee57f 100644 > --- a/drivers/gpu/drm/i915/intel_dpio_phy.c > +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c > @@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct drm_i915_private > *dev_priv, >* the corresponding calibrated value from PHY1, and disable >* the automatic calibration on PHY0. >*/ > - val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv, > - phy_info->rcomp_phy); > + if (!dev_priv->bxt_phy_grc) > + val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv, > + > phy_info->rcomp_phy); > + else > + val = dev_priv->bxt_phy_grc; > + > grc_code = val << GRC_CODE_FAST_SHIFT | > val << GRC_CODE_SLOW_SHIFT | > val; > -- > 1.9.1 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 2/5] drm/i915/fixed: prefer kernel types over stdint types
On Fri, Nov 16, 2018 at 02:07:26PM +0200, Jani Nikula wrote:
> While at it, conform to kernel spacing (i.e. no space) after cast. No
> functional changes.
could we do a sed or cocinelle patch for a massive update on this?
>
> Reviewed-by: Joonas Lahtinen
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_fixed.h | 61
> +++
> 1 file changed, 29 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_fixed.h
> b/drivers/gpu/drm/i915/i915_fixed.h
> index c974e51c6d8b..6c914940b4a9 100644
> --- a/drivers/gpu/drm/i915/i915_fixed.h
> +++ b/drivers/gpu/drm/i915/i915_fixed.h
> @@ -7,7 +7,7 @@
> #define _I915_FIXED_H_
>
> typedef struct {
> - uint32_t val;
> + u32 val;
> } uint_fixed_16_16_t;
>
> #define FP_16_16_MAX ({ \
> @@ -23,7 +23,7 @@ static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
> return false;
> }
>
> -static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
> +static inline uint_fixed_16_16_t u32_to_fixed16(u32 val)
> {
> uint_fixed_16_16_t fp;
>
> @@ -33,12 +33,12 @@ static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t
> val)
> return fp;
> }
>
> -static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
> +static inline u32 fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
> {
> return DIV_ROUND_UP(fp.val, 1 << 16);
> }
>
> -static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
> +static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp)
> {
> return fp.val >> 16;
> }
> @@ -61,86 +61,83 @@ static inline uint_fixed_16_16_t
> max_fixed16(uint_fixed_16_16_t max1,
> return max;
> }
>
> -static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
> +static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val)
> {
> uint_fixed_16_16_t fp;
> WARN_ON(val > U32_MAX);
> - fp.val = (uint32_t) val;
> + fp.val = (u32)val;
> return fp;
> }
>
> -static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
> - uint_fixed_16_16_t d)
> +static inline u32 div_round_up_fixed16(uint_fixed_16_16_t val,
> +uint_fixed_16_16_t d)
> {
> return DIV_ROUND_UP(val.val, d.val);
> }
>
> -static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
> - uint_fixed_16_16_t mul)
> +static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul)
> {
> - uint64_t intermediate_val;
> + u64 intermediate_val;
>
> - intermediate_val = (uint64_t) val * mul.val;
> + intermediate_val = (u64)val * mul.val;
> intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
> WARN_ON(intermediate_val > U32_MAX);
> - return (uint32_t) intermediate_val;
> + return (u32)intermediate_val;
> }
>
> static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
>uint_fixed_16_16_t mul)
> {
> - uint64_t intermediate_val;
> + u64 intermediate_val;
>
> - intermediate_val = (uint64_t) val.val * mul.val;
> + intermediate_val = (u64)val.val * mul.val;
> intermediate_val = intermediate_val >> 16;
> return clamp_u64_to_fixed16(intermediate_val);
> }
>
> -static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
> +static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d)
> {
> - uint64_t interm_val;
> + u64 interm_val;
>
> - interm_val = (uint64_t)val << 16;
> + interm_val = (u64)val << 16;
> interm_val = DIV_ROUND_UP_ULL(interm_val, d);
> return clamp_u64_to_fixed16(interm_val);
> }
>
> -static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
> - uint_fixed_16_16_t d)
> +static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d)
> {
> - uint64_t interm_val;
> + u64 interm_val;
>
> - interm_val = (uint64_t)val << 16;
> + interm_val = (u64)val << 16;
> interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
> WARN_ON(interm_val > U32_MAX);
> - return (uint32_t) interm_val;
> + return (u32)interm_val;
> }
>
> -static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
> - uint_fixed_16_16_t mul)
> +static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t
> mul)
> {
> - uint64_t intermediate_val;
> + u64 intermediate_val;
>
> - intermediate_val = (uint64_t) val * mul.val;
> + intermediate_val = (u64)val * mul.val;
> return clamp_u64_to_fixed16(intermediate_val);
> }
>
> static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
>uint_fixed_16_16_t add2)
> {
> - uint64_t interm_sum;
> + u64 interm_sum;
>
> - interm_sum = (uint64_t) add1.val + add2.val;
> +
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/icl: Release TC ports when unloading or suspending driver
== Series Details == Series: series starting with [1/3] drm/i915/icl: Release TC ports when unloading or suspending driver URL : https://patchwork.freedesktop.org/series/52195/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5152 -> Patchwork_10842 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/52195/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10842 that come from known issues: === IGT changes === Issues hit igt@gem_ctx_create@basic-files: fi-icl-u2: PASS -> DMESG-WARN (fdo#107724) igt@gem_exec_suspend@basic-s3: fi-icl-u2: PASS -> DMESG-WARN (fdo#107732, fdo#108070) igt@i915_selftest@live_contexts: fi-bsw-kefka: PASS -> DMESG-FAIL (fdo#108656) igt@i915_selftest@live_hangcheck: fi-icl-u: PASS -> INCOMPLETE (fdo#108315) igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: PASS -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362) igt@prime_vgem@basic-fence-flip: fi-gdg-551: PASS -> DMESG-FAIL (fdo#103182) Possible fixes igt@i915_module_load@reload: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@kms_frontbuffer_tracking@basic: fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103182 https://bugs.freedesktop.org/show_bug.cgi?id=103182 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#107732 https://bugs.freedesktop.org/show_bug.cgi?id=107732 fdo#108070 https://bugs.freedesktop.org/show_bug.cgi?id=108070 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 == Participating hosts (51 -> 47) == Missing(4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-hsw-4200u == Build changes == * Linux: CI_DRM_5152 -> Patchwork_10842 CI_DRM_5152: 458538284af8fa513c9d1404a8651931d6c79ddf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4718: 8ac5cfb4db9c7bc593beec18a6be1e2ff163106c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10842: 717b90b72bc3f8c6e369bdfcf74399204481a380 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 717b90b72bc3 drm/i915/icl: Delay hotplug processing for tc ports dcd4650c2e3b drm/i915: Call intel_hpd_cancel_work() from intel_hpd_suspend() b59497b57993 drm/i915/icl: Release TC ports when unloading or suspending driver == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10842/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3] drm/i915: Remove partial attempt to swizzle on pread/pwrite
On Friday, November 16, 2018 7:02:04 AM PST Joonas Lahtinen wrote:
> Quoting Chris Wilson (2018-10-12 14:56:21)
> > Our attempt to account for bit17 swizzling of pread/pwrite onto tiled
> > objects was flawed due to the simple fact that we do not always know the
> > swizzling for a particular page (due to the swizzling varying based on
> > location in certain unbalanced configurations). Furthermore, the
> > pread/pwrite paths are now unbalanced in that we are required to use the
> > GTT as in some cases we do not have direct CPU access to the backing
> > physical pages (thus some paths trying to account for the swizzle, but
> > others neglecting, chaos ensues).
> >
> > There are no known users who do use pread/pwrite into a tiled object
> > (you need to manually detile anyway, so why now just use mmap and avoid
> > the copy?) and no user bug reports to indicate that it is being used in
> > the wild. As no one is hitting the buggy path, we can just remove the
> > buggy code.
>
> Adding a few Mesa folks for an Ack, they should remember if they've done it
> in the past.
Eheheh...bit17 and 9xx hardware are before my time. :( I've copied Ian
in case he remembers anything from that era.
It looks like the only users of pwrite and pread in Mesa's i915 driver
are for linear buffer objects, not miptrees which could be tiled.
So I think this is fine...(famous last words...)
Acked-by: Kenneth Graunke
> If we have good enough confidence that it was unused in the userspace
> drivers, should be OK to be dropped. And it would have been broken
> anyway, which pretty much automatically means it didn't see use, but
> doesn't hurt to hear from them.
>
> Regards, Joonas
>
> >
> > v2: Just use the fault allowing kmap() + normal copy_(to|from)_user
> > v3: Avoid int overflow in computing 'length' from 'remain' (Tvrtko)
> >
> > References: fe115628d567 ("drm/i915: Implement pwrite without struct-mutex")
> > Signed-off-by: Chris Wilson
> > Cc: Joonas Lahtinen
> > Cc: Tvrtko Ursulin
> > ---
> > drivers/gpu/drm/i915/i915_gem.c | 195
> > 1 file changed, 25 insertions(+), 170 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c
> > b/drivers/gpu/drm/i915/i915_gem.c
> > index 7d45e71100bc..8049458ab6ac 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -859,58 +859,6 @@ flush_write_domain(struct drm_i915_gem_object *obj,
> > unsigned int flush_domains)
> > obj->write_domain = 0;
> > }
> >
> > -static inline int
> > -__copy_to_user_swizzled(char __user *cpu_vaddr,
> > - const char *gpu_vaddr, int gpu_offset,
> > - int length)
> > -{
> > - int ret, cpu_offset = 0;
> > -
> > - while (length > 0) {
> > - int cacheline_end = ALIGN(gpu_offset + 1, 64);
> > - int this_length = min(cacheline_end - gpu_offset, length);
> > - int swizzled_gpu_offset = gpu_offset ^ 64;
> > -
> > - ret = __copy_to_user(cpu_vaddr + cpu_offset,
> > -gpu_vaddr + swizzled_gpu_offset,
> > -this_length);
> > - if (ret)
> > - return ret + length;
> > -
> > - cpu_offset += this_length;
> > - gpu_offset += this_length;
> > - length -= this_length;
> > - }
> > -
> > - return 0;
> > -}
> > -
> > -static inline int
> > -__copy_from_user_swizzled(char *gpu_vaddr, int gpu_offset,
> > - const char __user *cpu_vaddr,
> > - int length)
> > -{
> > - int ret, cpu_offset = 0;
> > -
> > - while (length > 0) {
> > - int cacheline_end = ALIGN(gpu_offset + 1, 64);
> > - int this_length = min(cacheline_end - gpu_offset, length);
> > - int swizzled_gpu_offset = gpu_offset ^ 64;
> > -
> > - ret = __copy_from_user(gpu_vaddr + swizzled_gpu_offset,
> > - cpu_vaddr + cpu_offset,
> > - this_length);
> > - if (ret)
> > - return ret + length;
> > -
> > - cpu_offset += this_length;
> > - gpu_offset += this_length;
> > - length -= this_length;
> > - }
> > -
> > - return 0;
> > -}
> > -
> > /*
> > * Pins the specified object's pages and synchronizes the object with
> > * GPU accesses. Sets needs_clflush to non-zero if the caller should
> > @@ -1030,72 +978,23 @@ int i915_gem_obj_prepare_shmem_write(struct
> > drm_i915_gem_object *obj,
> > return ret;
> > }
> >
> > -static void
> > -shmem_clflush_swizzled_range(char *addr, unsigned long length,
> > -bool swizzled)
> > -{
> > - if (unlikely(swizzled)) {
> > - unsigned long start = (unsigned long) addr;
> > -
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Hide enable_gvt modparam when not compiled in
== Series Details ==
Series: drm/i915: Hide enable_gvt modparam when not compiled in
URL : https://patchwork.freedesktop.org/series/52616/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5151 -> Patchwork_10841 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/52616/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10841:
=== IGT changes ===
Possible regressions
{igt@runner@aborted}:
fi-icl-u: NOTRUN -> FAIL
== Known issues ==
Here are the changes found in Patchwork_10841 that come from known issues:
=== IGT changes ===
Issues hit
igt@gem_exec_suspend@basic-s3:
fi-icl-u2: PASS -> DMESG-WARN (fdo#107724)
Possible fixes
igt@i915_selftest@live_coherency:
fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS
igt@i915_selftest@live_hangcheck:
fi-skl-iommu: INCOMPLETE (fdo#108602) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
fi-byt-clapper: FAIL (fdo#107362) -> PASS
Warnings
igt@i915_selftest@live_contexts:
fi-icl-u: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315
fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569
fdo#108602 https://bugs.freedesktop.org/show_bug.cgi?id=108602
== Participating hosts (48 -> 46) ==
Additional (1): fi-byt-j1900
Missing(3): fi-ilk-m540 fi-byt-squawks fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_5151 -> Patchwork_10841
CI_DRM_5151: 65d1ff82ff3c9c20c78bd66f19f0f20f0fd46c4e @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4718: 8ac5cfb4db9c7bc593beec18a6be1e2ff163106c @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10841: fa91c9f62ba9c96a7b2f86dcd39c7e6617918805 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
fa91c9f62ba9 drm/i915: Hide enable_gvt modparam when not compiled in
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10841/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Downgrade unknown firmware warnings
Quoting Chris Wilson (2018-10-09 14:12:59) > If we have released no firmware yet for a platform, stop scaring the > consumer and merely note its expected absence. > > Signed-off-by: Chris Wilson > Cc: Petri Latvala Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3] drm/i915: Remove partial attempt to swizzle on pread/pwrite
Quoting Chris Wilson (2018-10-12 14:56:21)
> Our attempt to account for bit17 swizzling of pread/pwrite onto tiled
> objects was flawed due to the simple fact that we do not always know the
> swizzling for a particular page (due to the swizzling varying based on
> location in certain unbalanced configurations). Furthermore, the
> pread/pwrite paths are now unbalanced in that we are required to use the
> GTT as in some cases we do not have direct CPU access to the backing
> physical pages (thus some paths trying to account for the swizzle, but
> others neglecting, chaos ensues).
>
> There are no known users who do use pread/pwrite into a tiled object
> (you need to manually detile anyway, so why now just use mmap and avoid
> the copy?) and no user bug reports to indicate that it is being used in
> the wild. As no one is hitting the buggy path, we can just remove the
> buggy code.
Adding a few Mesa folks for an Ack, they should remember if they've done it
in the past.
If we have good enough confidence that it was unused in the userspace
drivers, should be OK to be dropped. And it would have been broken
anyway, which pretty much automatically means it didn't see use, but
doesn't hurt to hear from them.
Regards, Joonas
>
> v2: Just use the fault allowing kmap() + normal copy_(to|from)_user
> v3: Avoid int overflow in computing 'length' from 'remain' (Tvrtko)
>
> References: fe115628d567 ("drm/i915: Implement pwrite without struct-mutex")
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/i915_gem.c | 195
> 1 file changed, 25 insertions(+), 170 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 7d45e71100bc..8049458ab6ac 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -859,58 +859,6 @@ flush_write_domain(struct drm_i915_gem_object *obj,
> unsigned int flush_domains)
> obj->write_domain = 0;
> }
>
> -static inline int
> -__copy_to_user_swizzled(char __user *cpu_vaddr,
> - const char *gpu_vaddr, int gpu_offset,
> - int length)
> -{
> - int ret, cpu_offset = 0;
> -
> - while (length > 0) {
> - int cacheline_end = ALIGN(gpu_offset + 1, 64);
> - int this_length = min(cacheline_end - gpu_offset, length);
> - int swizzled_gpu_offset = gpu_offset ^ 64;
> -
> - ret = __copy_to_user(cpu_vaddr + cpu_offset,
> -gpu_vaddr + swizzled_gpu_offset,
> -this_length);
> - if (ret)
> - return ret + length;
> -
> - cpu_offset += this_length;
> - gpu_offset += this_length;
> - length -= this_length;
> - }
> -
> - return 0;
> -}
> -
> -static inline int
> -__copy_from_user_swizzled(char *gpu_vaddr, int gpu_offset,
> - const char __user *cpu_vaddr,
> - int length)
> -{
> - int ret, cpu_offset = 0;
> -
> - while (length > 0) {
> - int cacheline_end = ALIGN(gpu_offset + 1, 64);
> - int this_length = min(cacheline_end - gpu_offset, length);
> - int swizzled_gpu_offset = gpu_offset ^ 64;
> -
> - ret = __copy_from_user(gpu_vaddr + swizzled_gpu_offset,
> - cpu_vaddr + cpu_offset,
> - this_length);
> - if (ret)
> - return ret + length;
> -
> - cpu_offset += this_length;
> - gpu_offset += this_length;
> - length -= this_length;
> - }
> -
> - return 0;
> -}
> -
> /*
> * Pins the specified object's pages and synchronizes the object with
> * GPU accesses. Sets needs_clflush to non-zero if the caller should
> @@ -1030,72 +978,23 @@ int i915_gem_obj_prepare_shmem_write(struct
> drm_i915_gem_object *obj,
> return ret;
> }
>
> -static void
> -shmem_clflush_swizzled_range(char *addr, unsigned long length,
> -bool swizzled)
> -{
> - if (unlikely(swizzled)) {
> - unsigned long start = (unsigned long) addr;
> - unsigned long end = (unsigned long) addr + length;
> -
> - /* For swizzling simply ensure that we always flush both
> -* channels. Lame, but simple and it works. Swizzled
> -* pwrite/pread is far from a hotpath - current userspace
> -* doesn't use it at all. */
> - start = round_down(start, 128);
> - end = round_up(end, 128);
> -
> - drm_clflush_virt_range((void *)start, end - start);
> - } else {
> - drm_clflush_virt_range(addr, length);
> - }
> -
> -}
> -
> -/* Only difference to the fast-path
Re: [Intel-gfx] [PATCH] drm/i915: Hide enable_gvt modparam when not compiled in
Quoting Joonas Lahtinen (2018-11-16 14:44:47) > Hide the enable_gvt modparam in the default scenario where > support has not been compiled in. > > Cc: Zhenyu Wang > Cc: Zhi Wang > Cc: Chris Wilson > Signed-off-by: Joonas Lahtinen Alternative would be to move the param into a gvt-only file.c Reviewed-by: Chris Wilson Random thought: Also a lot of the error state will be garbage for gvt clients. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Hide enable_gvt modparam when not compiled in
Hide the enable_gvt modparam in the default scenario where support has not been compiled in. Cc: Zhenyu Wang Cc: Zhi Wang Cc: Chris Wilson Signed-off-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_params.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 8d71886b5f03..2e0356561839 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -167,8 +167,10 @@ i915_param_named_unsafe(inject_load_failure, uint, 0400, i915_param_named(enable_dpcd_backlight, bool, 0600, "Enable support for DPCD backlight control (default:false)"); +#if IS_ENABLED(CONFIG_DRM_I915_GVT) i915_param_named(enable_gvt, bool, 0400, "Enable support for Intel GVT-g graphics virtualization host support(default:false)"); +#endif static __always_inline void _print_param(struct drm_printer *p, const char *name, -- 2.17.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [GVT-g] [ANNOUNCE] 2018-Q3 release of KVMGT (Intel GVT-g for KVM)
Quoting Xu, Terrence (2018-10-19 10:04:47) > Platform Support: > > -Server platforms: Intel(r) Xeon(r) E3_v4, E3_v5 and E3_v6 with Intel > Graphics processor > > -Client platforms: Intel(r) Core(tm) 5th generation (code name: > Broadwell), > 6th generation (code name: Skylake), 7th generation (code name: Kabylake) and > 7th SoC generation (code name: Broxton), the Broxton is new supported platform Does this mean that all SKUs from those platforms are supported so that when users report bugs, they will be worked on? Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] Revert "drm/i915/perf: add a parameter to control the size of OA buffer"
== Series Details ==
Series: series starting with [1/2] Revert "drm/i915/perf: add a parameter to
control the size of OA buffer"
URL : https://patchwork.freedesktop.org/series/52612/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5150 -> Patchwork_10840 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10840 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10840, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/52612/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10840:
=== IGT changes ===
Possible regressions
igt@drv_selftest@live_contexts:
fi-kbl-7560u: PASS -> INCOMPLETE
igt@kms_chamelium@hdmi-hpd-fast:
{fi-kbl-7500u}: SKIP -> FAIL +2
Warnings
igt@kms_chamelium@common-hpd-after-suspend:
{fi-kbl-7500u}: DMESG-WARN (fdo#102505, fdo#105079, fdo#105602) ->
FAIL
== Known issues ==
Here are the changes found in Patchwork_10840 that come from known issues:
=== IGT changes ===
Issues hit
igt@gem_ctx_create@basic-files:
fi-bsw-n3050: PASS -> FAIL (fdo#108656)
igt@gem_ctx_switch@basic-default:
fi-icl-u2: PASS -> DMESG-WARN (fdo#107724)
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: PASS -> FAIL (fdo#103167)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) +1
igt@prime_vgem@basic-fence-flip:
fi-gdg-551: PASS -> DMESG-FAIL (fdo#103182)
Possible fixes
igt@drv_selftest@live_coherency:
fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS
igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
fi-snb-2520m: DMESG-FAIL (fdo#103713) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102505 https://bugs.freedesktop.org/show_bug.cgi?id=102505
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103182 https://bugs.freedesktop.org/show_bug.cgi?id=103182
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#105079 https://bugs.freedesktop.org/show_bug.cgi?id=105079
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
== Participating hosts (50 -> 46) ==
Missing(4): fi-ilk-m540 fi-byt-squawks fi-hsw-4200u fi-pnv-d510
== Build changes ==
* Linux: CI_DRM_5150 -> Patchwork_10840
CI_DRM_5150: ab97324c7fb98fc8cadbe5ae4e50f36fb0137308 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4716: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10840: 11e9d279512d627d39c256358323ee8b32eab5e7 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
11e9d279512d Revert "drm/i915/perf: Fix warning in documentation"
b808c374682f Revert "drm/i915/perf: add a parameter to control the size of OA
buffer"
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10840/issues.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] Revert "drm/i915/perf: add a parameter to control the size of OA buffer"
== Series Details == Series: series starting with [1/2] Revert "drm/i915/perf: add a parameter to control the size of OA buffer" URL : https://patchwork.freedesktop.org/series/52612/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: Revert "drm/i915/perf: add a parameter to control the size of OA buffer" -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_perf.c:2665:17: warning:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] Revert "drm/i915/perf: add a parameter to control the size of OA buffer"
== Series Details == Series: series starting with [1/2] Revert "drm/i915/perf: add a parameter to control the size of OA buffer" URL : https://patchwork.freedesktop.org/series/52612/ State : warning == Summary == $ dim checkpatch origin/drm-tip b808c374682f Revert "drm/i915/perf: add a parameter to control the size of OA buffer" -:42: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'tail' may be better as '(tail)' to avoid precedence issues #42: FILE: drivers/gpu/drm/i915/i915_perf.c:221: +#define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1)) -:42: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'head' may be better as '(head)' to avoid precedence issues #42: FILE: drivers/gpu/drm/i915/i915_perf.c:221: +#define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1)) total: 0 errors, 0 warnings, 2 checks, 272 lines checked 11e9d279512d Revert "drm/i915/perf: Fix warning in documentation" ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] Revert "drm/i915/perf: add a parameter to control the size of OA buffer"
Userspace portion is still missing.
This reverts commit cd956bfcd0f58d20485ac0a785415f7d9327a95f.
Cc: Lionel Landwerlin
Cc: Matthew Auld
Signed-off-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/i915_perf.c | 99 +++-
drivers/gpu/drm/i915/i915_reg.h | 2 -
include/uapi/drm/i915_drm.h | 7 ---
4 files changed, 33 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d69b71d368d3..017f851a586a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2004,7 +2004,6 @@ struct drm_i915_private {
u32 last_ctx_id;
int format;
int format_size;
- int size_exponent;
/**
* Locks reads and writes to all head/tail state
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 2c2b63be7a6c..c762418d3b01 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -212,7 +212,13 @@
#include "i915_oa_icl.h"
#include "intel_lrc_reg.h"
-#define OA_TAKEN(tail, head) (((tail) - (head)) &
(dev_priv->perf.oa.oa_buffer.vma->size - 1))
+/* HW requires this to be a power of two, between 128k and 16M, though driver
+ * is currently generally designed assuming the largest 16M size is used such
+ * that the overflow cases are unlikely in normal operation.
+ */
+#define OA_BUFFER_SIZE SZ_16M
+
+#define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1))
/**
* DOC: OA Tail Pointer Race
@@ -356,7 +362,6 @@ struct perf_open_properties {
int oa_format;
bool oa_periodic;
int oa_period_exponent;
- u32 oa_buffer_size_exponent;
};
static void free_oa_config(struct drm_i915_private *dev_priv,
@@ -519,7 +524,7 @@ static bool oa_buffer_check_unlocked(struct
drm_i915_private *dev_priv)
* could put the tail out of bounds...
*/
if (hw_tail >= gtt_offset &&
- hw_tail < (gtt_offset +
dev_priv->perf.oa.oa_buffer.vma->size)) {
+ hw_tail < (gtt_offset + OA_BUFFER_SIZE)) {
dev_priv->perf.oa.oa_buffer.tails[!aged_idx].offset =
aging_tail = hw_tail;
dev_priv->perf.oa.oa_buffer.aging_timestamp = now;
@@ -648,7 +653,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream
*stream,
int report_size = dev_priv->perf.oa.oa_buffer.format_size;
u8 *oa_buf_base = dev_priv->perf.oa.oa_buffer.vaddr;
u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma);
- u32 mask = (dev_priv->perf.oa.oa_buffer.vma->size - 1);
+ u32 mask = (OA_BUFFER_SIZE - 1);
size_t start_offset = *offset;
unsigned long flags;
unsigned int aged_tail_idx;
@@ -688,8 +693,8 @@ static int gen8_append_oa_reports(struct i915_perf_stream
*stream,
* only be incremented by multiples of the report size (notably also
* all a power of two).
*/
- if (WARN_ONCE(head > dev_priv->perf.oa.oa_buffer.vma->size || head %
report_size ||
- tail > dev_priv->perf.oa.oa_buffer.vma->size || tail %
report_size,
+ if (WARN_ONCE(head > OA_BUFFER_SIZE || head % report_size ||
+ tail > OA_BUFFER_SIZE || tail % report_size,
"Inconsistent OA buffer pointers: head = %u, tail = %u\n",
head, tail))
return -EIO;
@@ -712,7 +717,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream
*stream,
* here would imply a driver bug that would result
* in an overrun.
*/
- if (WARN_ON((dev_priv->perf.oa.oa_buffer.vma->size - head) <
report_size)) {
+ if (WARN_ON((OA_BUFFER_SIZE - head) < report_size)) {
DRM_ERROR("Spurious OA head ptr: non-integral report
offset\n");
break;
}
@@ -871,6 +876,11 @@ static int gen8_oa_read(struct i915_perf_stream *stream,
* automatically triggered reports in this condition and so we
* have to assume that old reports are now being trampled
* over.
+*
+* Considering how we don't currently give userspace control
+* over the OA buffer size and always configure a large 16MB
+* buffer, then a buffer overflow does anyway likely indicate
+* that something has gone quite badly wrong.
*/
if (oastatus & GEN8_OASTATUS_OABUFFER_OVERFLOW) {
ret = append_oa_status(stream, buf, count, offset,
@@ -932,7 +942,7 @@ static int gen7_append_oa_reports(struct i915_perf_stream
*stream,
int report_size =
[Intel-gfx] [PATCH 2/2] Revert "drm/i915/perf: Fix warning in documentation"
Userspace portion is still missing.
This reverts commit 9fa6e2f7609fdbb7d6f86be86371a5719bec0376.
Cc: Lionel Landwerlin
Cc: Matthew Auld
Signed-off-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_perf.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index c762418d3b01..4529edfdcfc8 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -345,7 +345,6 @@ static const struct i915_oa_format
gen8_plus_oa_formats[I915_OA_FORMAT_MAX] = {
* @oa_format: An OA unit HW report format
* @oa_periodic: Whether to enable periodic OA unit sampling
* @oa_period_exponent: The OA unit sampling period is derived from this
- * @oa_buffer_size_exponent: The OA buffer size is derived from this
*
* As read_properties_unlocked() enumerates and validates the properties given
* to open a stream of metrics the configuration is built up in the structure
--
2.17.2
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Disable LP3 watermarks on all SNB machines (rev2)
== Series Details == Series: drm/i915: Disable LP3 watermarks on all SNB machines (rev2) URL : https://patchwork.freedesktop.org/series/52440/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5150_full -> Patchwork_10837_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10837_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10837_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10837_full: === IGT changes === Warnings igt@tools_test@tools_test: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10837_full that come from known issues: === IGT changes === Issues hit igt@drm_import_export@import-close-race-flink: shard-skl: PASS -> TIMEOUT (fdo#108667) igt@gem_exec_schedule@pi-ringfull-bsd: shard-skl: NOTRUN -> FAIL (fdo#103158) +1 igt@gem_exec_schedule@pi-ringfull-render: shard-kbl: NOTRUN -> FAIL (fdo#103158) igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@kms_busy@extended-modeset-hang-newfb-render-b: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-128x128-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108) igt@kms_cursor_crc@cursor-64x21-sliding: shard-apl: PASS -> FAIL (fdo#103232) +1 igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363) igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: PASS -> FAIL (fdo#105363) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc: shard-skl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbcpsr-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc: shard-skl: NOTRUN -> FAIL (fdo#103167) +1 igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: shard-skl: NOTRUN -> FAIL (fdo#108145) +2 igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: shard-kbl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) +2 igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-skl: NOTRUN -> FAIL (fdo#103166, fdo#107815) igt@kms_rotation_crc@primary-rotation-90: shard-skl: PASS -> FAIL (fdo#103925, fdo#107815) igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) igt@pm_backlight@fade_with_suspend: shard-skl: NOTRUN -> FAIL (fdo#107847) igt@pm_rpm@system-suspend-modeset: shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107807) igt@syncobj_wait@invalid-signal-one-illegal-handle: shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) +1 Possible fixes igt@drv_suspend@shrink: shard-glk: INCOMPLETE (k.org#198133, fdo#103359, fdo#106886) -> PASS igt@gem_userptr_blits@readonly-unsync: shard-skl: INCOMPLETE (fdo#108074) -> PASS igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: shard-glk: DMESG-WARN (fdo#107956) -> PASS igt@kms_cursor_crc@cursor-256x256-random: shard-apl: FAIL (fdo#103232) -> PASS +2 igt@kms_cursor_crc@cursor-64x64-suspend: shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: FAIL (fdo#108145, fdo#107815) -> PASS igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: shard-skl: FAIL (fdo#107815) -> PASS igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-apl: FAIL (fdo#103166) -> PASS +2 igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-glk: FAIL (fdo#103166) -> PASS igt@perf@oa-exponents: shard-kbl: INCOMPLETE (fdo#103665) -> PASS Warnings
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable LP3 watermarks on all SNB machines (rev2)
== Series Details ==
Series: drm/i915: Disable LP3 watermarks on all SNB machines (rev2)
URL : https://patchwork.freedesktop.org/series/52440/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5150 -> Patchwork_10839 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/52440/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10839:
=== IGT changes ===
Possible regressions
igt@kms_chamelium@hdmi-hpd-fast:
{fi-kbl-7500u}: SKIP -> FAIL +2
Warnings
igt@kms_chamelium@common-hpd-after-suspend:
{fi-kbl-7500u}: DMESG-WARN (fdo#105079, fdo#102505, fdo#105602) ->
FAIL
== Known issues ==
Here are the changes found in Patchwork_10839 that come from known issues:
=== IGT changes ===
Issues hit
igt@kms_pipe_crc_basic@read-crc-pipe-b:
fi-byt-clapper: PASS -> FAIL (fdo#107362)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-icl-u: PASS -> INCOMPLETE (fdo#107713)
Possible fixes
igt@drv_selftest@live_coherency:
fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS
igt@gem_ctx_create@basic-files:
fi-bsw-kefka: FAIL (fdo#108656) -> PASS
igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
fi-snb-2520m: DMESG-FAIL (fdo#103713) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102505 https://bugs.freedesktop.org/show_bug.cgi?id=102505
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#105079 https://bugs.freedesktop.org/show_bug.cgi?id=105079
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713
fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
== Participating hosts (50 -> 47) ==
Missing(3): fi-ilk-m540 fi-byt-squawks fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_5150 -> Patchwork_10839
CI_DRM_5150: ab97324c7fb98fc8cadbe5ae4e50f36fb0137308 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4716: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10839: 659bb5412af212c8320764c4743d8f52bebdf44f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
659bb5412af2 drm/i915: Disable LP3 watermarks on all SNB machines
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10839/issues.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/5] drm/i915: extract fixed point math to i915_fixed.h
== Series Details ==
Series: series starting with [v2,1/5] drm/i915: extract fixed point math to
i915_fixed.h
URL : https://patchwork.freedesktop.org/series/52608/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5150 -> Patchwork_10838 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/52608/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10838:
=== IGT changes ===
Possible regressions
igt@kms_chamelium@hdmi-hpd-fast:
{fi-kbl-7500u}: SKIP -> FAIL +2
Warnings
igt@kms_chamelium@common-hpd-after-suspend:
{fi-kbl-7500u}: DMESG-WARN (fdo#105602, fdo#105079, fdo#102505) ->
FAIL
== Known issues ==
Here are the changes found in Patchwork_10838 that come from known issues:
=== IGT changes ===
Issues hit
igt@gem_ctx_create@basic-files:
fi-bsw-n3050: PASS -> FAIL (fdo#108656)
fi-icl-u2: PASS -> DMESG-WARN (fdo#107724)
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
fi-byt-clapper: PASS -> FAIL (fdo#107362)
Possible fixes
igt@drv_selftest@live_coherency:
fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS
igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
fi-snb-2520m: DMESG-FAIL (fdo#103713) -> PASS
Warnings
igt@drv_selftest@live_contexts:
fi-icl-u: DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102505 https://bugs.freedesktop.org/show_bug.cgi?id=102505
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#105079 https://bugs.freedesktop.org/show_bug.cgi?id=105079
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315
fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569
fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
== Participating hosts (50 -> 46) ==
Missing(4): fi-ilk-m540 fi-byt-squawks fi-hsw-4200u fi-pnv-d510
== Build changes ==
* Linux: CI_DRM_5150 -> Patchwork_10838
CI_DRM_5150: ab97324c7fb98fc8cadbe5ae4e50f36fb0137308 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4716: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10838: 50d2d523f15e654ef6f95c65b1637cf78518d31a @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
50d2d523f15e drm/i915/fixed: cosmetic cleanup
6224a283b3bb drm/i915/fixed: simplify is_fixed16_zero()
a16ca22d5f12 drm/i915/fixed: simplify FP_16_16_MAX definition
6f246d68ba40 drm/i915/fixed: prefer kernel types over stdint types
8b6b415c312d drm/i915: extract fixed point math to i915_fixed.h
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10838/issues.html
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Re: [Intel-gfx] [PATCH v4 4/4] drm/i915/perf: add a parameter to control the size of OA buffer
Quoting Lionel Landwerlin (2018-10-23 13:07:07) > The way our hardware is designed doesn't seem to let us use the > MI_RECORD_PERF_COUNT command without setting up a circular buffer. > > In the case where the user didn't request OA reports to be available > through the i915 perf stream, we can set the OA buffer to the minimum > size to avoid consuming memory which won't be used by the driver. > > v2: Simplify oa buffer size exponent selection (Chris) > Reuse vma size field (Lionel) > > v3: Restrict size opening parameter to values supported by HW (Chris) > > v4: Drop out of date comment (Matt) > Add debug message when buffer size is rejected (Matt) > > Signed-off-by: Lionel Landwerlin > Reviewed-by: Matthew Auld For anything that alters the uAPI, please provide a link to the userspace counterpart. Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/5] drm/i915: extract fixed point math to i915_fixed.h
== Series Details == Series: series starting with [v2,1/5] drm/i915: extract fixed point math to i915_fixed.h URL : https://patchwork.freedesktop.org/series/52608/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: extract fixed point math to i915_fixed.h -O:drivers/gpu/drm/i915/i915_drv.h:172:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:172:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:172:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:172:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:60:19: warning: expression using sizeof(void) -drivers/gpu/drm/i915/selftests/../i915_drv.h:3705:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3568:16: warning: expression using sizeof(void) Commit: drm/i915/fixed: prefer kernel types over stdint types Okay! Commit: drm/i915/fixed: simplify FP_16_16_MAX definition Okay! Commit: drm/i915/fixed: simplify is_fixed16_zero() Okay! Commit: drm/i915/fixed: cosmetic cleanup -O:drivers/gpu/drm/i915/i915_fixed.h:45:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:45:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:45:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:45:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_fixed.h:54:19: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:42:43: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:42:43: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:42:43: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_fixed.h:42:43: warning:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/5] drm/i915: extract fixed point math to i915_fixed.h
== Series Details ==
Series: series starting with [v2,1/5] drm/i915: extract fixed point math to
i915_fixed.h
URL : https://patchwork.freedesktop.org/series/52608/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8b6b415c312d drm/i915: extract fixed point math to i915_fixed.h
-:172: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#172:
new file mode 100644
-:185: WARNING:NEW_TYPEDEFS: do not add new typedefs
#185: FILE: drivers/gpu/drm/i915/i915_fixed.h:9:
+typedef struct {
-:243: WARNING:LINE_SPACING: Missing a blank line after declarations
#243: FILE: drivers/gpu/drm/i915/i915_fixed.h:67:
+ uint_fixed_16_16_t fp;
+ WARN_ON(val > U32_MAX);
-:244: CHECK:SPACING: No space is necessary after a cast
#244: FILE: drivers/gpu/drm/i915/i915_fixed.h:68:
+ fp.val = (uint32_t) val;
-:259: CHECK:SPACING: No space is necessary after a cast
#259: FILE: drivers/gpu/drm/i915/i915_fixed.h:83:
+ intermediate_val = (uint64_t) val * mul.val;
-:262: CHECK:SPACING: No space is necessary after a cast
#262: FILE: drivers/gpu/drm/i915/i915_fixed.h:86:
+ return (uint32_t) intermediate_val;
-:270: CHECK:SPACING: No space is necessary after a cast
#270: FILE: drivers/gpu/drm/i915/i915_fixed.h:94:
+ intermediate_val = (uint64_t) val.val * mul.val;
-:292: CHECK:SPACING: No space is necessary after a cast
#292: FILE: drivers/gpu/drm/i915/i915_fixed.h:116:
+ return (uint32_t) interm_val;
-:300: CHECK:SPACING: No space is necessary after a cast
#300: FILE: drivers/gpu/drm/i915/i915_fixed.h:124:
+ intermediate_val = (uint64_t) val * mul.val;
-:309: CHECK:SPACING: No space is necessary after a cast
#309: FILE: drivers/gpu/drm/i915/i915_fixed.h:133:
+ interm_sum = (uint64_t) add1.val + add2.val;
-:319: CHECK:SPACING: No space is necessary after a cast
#319: FILE: drivers/gpu/drm/i915/i915_fixed.h:143:
+ interm_sum = (uint64_t) add1.val + interm_add2.val;
total: 0 errors, 3 warnings, 8 checks, 298 lines checked
6f246d68ba40 drm/i915/fixed: prefer kernel types over stdint types
a16ca22d5f12 drm/i915/fixed: simplify FP_16_16_MAX definition
6224a283b3bb drm/i915/fixed: simplify is_fixed16_zero()
50d2d523f15e drm/i915/fixed: cosmetic cleanup
___
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[Intel-gfx] [PATCH v2 2/5] drm/i915/fixed: prefer kernel types over stdint types
While at it, conform to kernel spacing (i.e. no space) after cast. No
functional changes.
Reviewed-by: Joonas Lahtinen
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_fixed.h | 61 +++
1 file changed, 29 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_fixed.h
b/drivers/gpu/drm/i915/i915_fixed.h
index c974e51c6d8b..6c914940b4a9 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -7,7 +7,7 @@
#define _I915_FIXED_H_
typedef struct {
- uint32_t val;
+ u32 val;
} uint_fixed_16_16_t;
#define FP_16_16_MAX ({ \
@@ -23,7 +23,7 @@ static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
return false;
}
-static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
+static inline uint_fixed_16_16_t u32_to_fixed16(u32 val)
{
uint_fixed_16_16_t fp;
@@ -33,12 +33,12 @@ static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t
val)
return fp;
}
-static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
+static inline u32 fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
{
return DIV_ROUND_UP(fp.val, 1 << 16);
}
-static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
+static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp)
{
return fp.val >> 16;
}
@@ -61,86 +61,83 @@ static inline uint_fixed_16_16_t
max_fixed16(uint_fixed_16_16_t max1,
return max;
}
-static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
+static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val)
{
uint_fixed_16_16_t fp;
WARN_ON(val > U32_MAX);
- fp.val = (uint32_t) val;
+ fp.val = (u32)val;
return fp;
}
-static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
- uint_fixed_16_16_t d)
+static inline u32 div_round_up_fixed16(uint_fixed_16_16_t val,
+ uint_fixed_16_16_t d)
{
return DIV_ROUND_UP(val.val, d.val);
}
-static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t mul)
+static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul)
{
- uint64_t intermediate_val;
+ u64 intermediate_val;
- intermediate_val = (uint64_t) val * mul.val;
+ intermediate_val = (u64)val * mul.val;
intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
WARN_ON(intermediate_val > U32_MAX);
- return (uint32_t) intermediate_val;
+ return (u32)intermediate_val;
}
static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
uint_fixed_16_16_t mul)
{
- uint64_t intermediate_val;
+ u64 intermediate_val;
- intermediate_val = (uint64_t) val.val * mul.val;
+ intermediate_val = (u64)val.val * mul.val;
intermediate_val = intermediate_val >> 16;
return clamp_u64_to_fixed16(intermediate_val);
}
-static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
+static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d)
{
- uint64_t interm_val;
+ u64 interm_val;
- interm_val = (uint64_t)val << 16;
+ interm_val = (u64)val << 16;
interm_val = DIV_ROUND_UP_ULL(interm_val, d);
return clamp_u64_to_fixed16(interm_val);
}
-static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t d)
+static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d)
{
- uint64_t interm_val;
+ u64 interm_val;
- interm_val = (uint64_t)val << 16;
+ interm_val = (u64)val << 16;
interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
WARN_ON(interm_val > U32_MAX);
- return (uint32_t) interm_val;
+ return (u32)interm_val;
}
-static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
-uint_fixed_16_16_t mul)
+static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t
mul)
{
- uint64_t intermediate_val;
+ u64 intermediate_val;
- intermediate_val = (uint64_t) val * mul.val;
+ intermediate_val = (u64)val * mul.val;
return clamp_u64_to_fixed16(intermediate_val);
}
static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
uint_fixed_16_16_t add2)
{
- uint64_t interm_sum;
+ u64 interm_sum;
- interm_sum = (uint64_t) add1.val + add2.val;
+ interm_sum = (u64)add1.val + add2.val;
return clamp_u64_to_fixed16(interm_sum);
}
static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
-uint32_t add2)
+u32 add2)
{
- uint64_t
[Intel-gfx] [PATCH v2 3/5] drm/i915/fixed: simplify FP_16_16_MAX definition
No need to use a compound statement enclosed in parenthesis where a C99
compound literal will do. No functional changes.
Reviewed-by: Joonas Lahtinen
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_fixed.h | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_fixed.h
b/drivers/gpu/drm/i915/i915_fixed.h
index 6c914940b4a9..da43c930dfa2 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -10,11 +10,7 @@ typedef struct {
u32 val;
} uint_fixed_16_16_t;
-#define FP_16_16_MAX ({ \
- uint_fixed_16_16_t fp; \
- fp.val = UINT_MAX; \
- fp; \
-})
+#define FP_16_16_MAX ((uint_fixed_16_16_t){ .val = UINT_MAX })
static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
{
--
2.11.0
___
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[Intel-gfx] [PATCH v2 5/5] drm/i915/fixed: cosmetic cleanup
Clean up fixed point temp variable initialization, use the more
conventional tmp name for temp variables, add empty lines before
return. No functional changes.
Reviewed-by: Joonas Lahtinen
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_fixed.h | 77 +--
1 file changed, 41 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_fixed.h
b/drivers/gpu/drm/i915/i915_fixed.h
index cb099701a75e..591dd89ba7af 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -19,11 +19,10 @@ static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
static inline uint_fixed_16_16_t u32_to_fixed16(u32 val)
{
- uint_fixed_16_16_t fp;
+ uint_fixed_16_16_t fp = { .val = val << 16 };
WARN_ON(val > U16_MAX);
- fp.val = val << 16;
return fp;
}
@@ -40,26 +39,25 @@ static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp)
static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
uint_fixed_16_16_t min2)
{
- uint_fixed_16_16_t min;
+ uint_fixed_16_16_t min = { .val = min(min1.val, min2.val) };
- min.val = min(min1.val, min2.val);
return min;
}
static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
uint_fixed_16_16_t max2)
{
- uint_fixed_16_16_t max;
+ uint_fixed_16_16_t max = { .val = max(max1.val, max2.val) };
- max.val = max(max1.val, max2.val);
return max;
}
static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val)
{
- uint_fixed_16_16_t fp;
+ uint_fixed_16_16_t fp = { .val = (u32)val };
+
WARN_ON(val > U32_MAX);
- fp.val = (u32)val;
+
return fp;
}
@@ -71,68 +69,75 @@ static inline u32 div_round_up_fixed16(uint_fixed_16_16_t
val,
static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul)
{
- u64 intermediate_val;
+ u64 tmp;
+
+ tmp = (u64)val * mul.val;
+ tmp = DIV_ROUND_UP_ULL(tmp, 1 << 16);
+ WARN_ON(tmp > U32_MAX);
- intermediate_val = (u64)val * mul.val;
- intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
- WARN_ON(intermediate_val > U32_MAX);
- return (u32)intermediate_val;
+ return (u32)tmp;
}
static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
uint_fixed_16_16_t mul)
{
- u64 intermediate_val;
+ u64 tmp;
- intermediate_val = (u64)val.val * mul.val;
- intermediate_val = intermediate_val >> 16;
- return clamp_u64_to_fixed16(intermediate_val);
+ tmp = (u64)val.val * mul.val;
+ tmp = tmp >> 16;
+
+ return clamp_u64_to_fixed16(tmp);
}
static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d)
{
- u64 interm_val;
+ u64 tmp;
+
+ tmp = (u64)val << 16;
+ tmp = DIV_ROUND_UP_ULL(tmp, d);
- interm_val = (u64)val << 16;
- interm_val = DIV_ROUND_UP_ULL(interm_val, d);
- return clamp_u64_to_fixed16(interm_val);
+ return clamp_u64_to_fixed16(tmp);
}
static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d)
{
- u64 interm_val;
+ u64 tmp;
- interm_val = (u64)val << 16;
- interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
- WARN_ON(interm_val > U32_MAX);
- return (u32)interm_val;
+ tmp = (u64)val << 16;
+ tmp = DIV_ROUND_UP_ULL(tmp, d.val);
+ WARN_ON(tmp > U32_MAX);
+
+ return (u32)tmp;
}
static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t
mul)
{
- u64 intermediate_val;
+ u64 tmp;
+
+ tmp = (u64)val * mul.val;
- intermediate_val = (u64)val * mul.val;
- return clamp_u64_to_fixed16(intermediate_val);
+ return clamp_u64_to_fixed16(tmp);
}
static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
uint_fixed_16_16_t add2)
{
- u64 interm_sum;
+ u64 tmp;
- interm_sum = (u64)add1.val + add2.val;
- return clamp_u64_to_fixed16(interm_sum);
+ tmp = (u64)add1.val + add2.val;
+
+ return clamp_u64_to_fixed16(tmp);
}
static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
u32 add2)
{
- u64 interm_sum;
- uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
+ uint_fixed_16_16_t tmp_add2 = u32_to_fixed16(add2);
+ u64 tmp;
+
+ tmp = (u64)add1.val + tmp_add2.val;
- interm_sum = (u64)add1.val + interm_add2.val;
- return clamp_u64_to_fixed16(interm_sum);
+ return clamp_u64_to_fixed16(tmp);
}
#endif /* _I915_FIXED_H_ */
--
2.11.0
___
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[Intel-gfx] [PATCH v2 1/5] drm/i915: extract fixed point math to i915_fixed.h
Reduce bloat in one of the bigger header files. Fix some indentation
while at it. No functional changes.
v2: Add include guards (Joonas)
Reviewed-by: Joonas Lahtinen
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 139 +--
drivers/gpu/drm/i915/i915_fixed.h | 147 ++
2 files changed, 148 insertions(+), 138 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_fixed.h
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d69b71d368d3..9c2597a2784c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -54,6 +54,7 @@
#include
#include
+#include "i915_fixed.h"
#include "i915_params.h"
#include "i915_reg.h"
#include "i915_utils.h"
@@ -127,144 +128,6 @@ bool i915_error_injected(void);
__i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \
fmt, ##__VA_ARGS__)
-typedef struct {
- uint32_t val;
-} uint_fixed_16_16_t;
-
-#define FP_16_16_MAX ({ \
- uint_fixed_16_16_t fp; \
- fp.val = UINT_MAX; \
- fp; \
-})
-
-static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
-{
- if (val.val == 0)
- return true;
- return false;
-}
-
-static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
-{
- uint_fixed_16_16_t fp;
-
- WARN_ON(val > U16_MAX);
-
- fp.val = val << 16;
- return fp;
-}
-
-static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
-{
- return DIV_ROUND_UP(fp.val, 1 << 16);
-}
-
-static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
-{
- return fp.val >> 16;
-}
-
-static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
-uint_fixed_16_16_t min2)
-{
- uint_fixed_16_16_t min;
-
- min.val = min(min1.val, min2.val);
- return min;
-}
-
-static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
-uint_fixed_16_16_t max2)
-{
- uint_fixed_16_16_t max;
-
- max.val = max(max1.val, max2.val);
- return max;
-}
-
-static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
-{
- uint_fixed_16_16_t fp;
- WARN_ON(val > U32_MAX);
- fp.val = (uint32_t) val;
- return fp;
-}
-
-static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
- uint_fixed_16_16_t d)
-{
- return DIV_ROUND_UP(val.val, d.val);
-}
-
-static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t mul)
-{
- uint64_t intermediate_val;
-
- intermediate_val = (uint64_t) val * mul.val;
- intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
- WARN_ON(intermediate_val > U32_MAX);
- return (uint32_t) intermediate_val;
-}
-
-static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
-uint_fixed_16_16_t mul)
-{
- uint64_t intermediate_val;
-
- intermediate_val = (uint64_t) val.val * mul.val;
- intermediate_val = intermediate_val >> 16;
- return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
-{
- uint64_t interm_val;
-
- interm_val = (uint64_t)val << 16;
- interm_val = DIV_ROUND_UP_ULL(interm_val, d);
- return clamp_u64_to_fixed16(interm_val);
-}
-
-static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
- uint_fixed_16_16_t d)
-{
- uint64_t interm_val;
-
- interm_val = (uint64_t)val << 16;
- interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
- WARN_ON(interm_val > U32_MAX);
- return (uint32_t) interm_val;
-}
-
-static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
-uint_fixed_16_16_t mul)
-{
- uint64_t intermediate_val;
-
- intermediate_val = (uint64_t) val * mul.val;
- return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
-uint_fixed_16_16_t add2)
-{
- uint64_t interm_sum;
-
- interm_sum = (uint64_t) add1.val + add2.val;
- return clamp_u64_to_fixed16(interm_sum);
-}
-
-static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
-uint32_t add2)
-{
- uint64_t interm_sum;
- uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
-
- interm_sum = (uint64_t) add1.val + interm_add2.val;
- return clamp_u64_to_fixed16(interm_sum);
-}
-
enum hpd_pin {
HPD_NONE = 0,
HPD_TV = HPD_NONE, /* TV is known to be unreliable */
diff --git
[Intel-gfx] [PATCH v2 4/5] drm/i915/fixed: simplify is_fixed16_zero()
Simply return the condition. No functional changes.
Reviewed-by: Joonas Lahtinen
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_fixed.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_fixed.h
b/drivers/gpu/drm/i915/i915_fixed.h
index da43c930dfa2..cb099701a75e 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -14,9 +14,7 @@ typedef struct {
static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
{
- if (val.val == 0)
- return true;
- return false;
+ return val.val == 0;
}
static inline uint_fixed_16_16_t u32_to_fixed16(u32 val)
--
2.11.0
___
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Re: [Intel-gfx] [PATCH 05/25] drm/i915: Prevent machine hang from Broxton's vtd w/a and error capture
Quoting Chris Wilson (2018-11-02 18:12:12)
> Since capturing the error state requires fiddling around with the GGTT
> to read arbitrary buffers and is itself run under stop_machine(), it
> deadlocks the machine (effectively a hard hang) when run in conjunction
> with Broxton's VTd workaround to serialize GGTT access.
>
> v2: Store the ERR_PTR in first_error so that the error can be reported
> to the user via sysfs.
>
> Fixes: 0ef34ad6222a ("drm/i915: Serialize GTT/Aperture accesses on BXT")
> Signed-off-by: Chris Wilson
> Cc: Jon Bloomfield
> Cc: John Harrison
> Cc: Tvrtko Ursulin
> Cc: Joonas Lahtinen
> Cc: Daniel Vetter
Might be worthy splurting something to the dmesg?
Reviewed-by: Joonas Lahtinen
Regards, Joonas
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/amdgpu: Reorder uvd ring init before uvd resume
== Series Details == Series: drm/amdgpu: Reorder uvd ring init before uvd resume URL : https://patchwork.freedesktop.org/series/52601/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5150_full -> Patchwork_10836_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10836_full that come from known issues: === IGT changes === Issues hit igt@gem_ctx_isolation@bcs0-s3: shard-apl: PASS -> DMESG-WARN (fdo#108566) igt@gem_exec_schedule@pi-ringfull-bsd: shard-skl: NOTRUN -> FAIL (fdo#103158) +1 igt@gem_exec_schedule@pi-ringfull-render: shard-kbl: NOTRUN -> FAIL (fdo#103158) igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: PASS -> INCOMPLETE (fdo#106887, fdo#106023, fdo#103665) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_cursor_crc@cursor-64x21-sliding: shard-apl: PASS -> FAIL (fdo#103232) +2 igt@kms_cursor_crc@cursor-size-change: shard-glk: PASS -> FAIL (fdo#103232) +2 igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen: shard-glk: PASS -> FAIL (fdo#103167) +2 igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt: shard-glk: PASS -> DMESG-FAIL (fdo#105763, fdo#106538) igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc: shard-skl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbcpsr-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: shard-skl: PASS -> FAIL (fdo#103166) igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: shard-skl: NOTRUN -> FAIL (fdo#108145) +3 igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: shard-kbl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) +2 igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) igt@kms_sysfs_edid_timing: shard-skl: NOTRUN -> FAIL (fdo#100047) igt@kms_vblank@pipe-a-ts-continuation-idle-hang: shard-kbl: PASS -> DMESG-WARN (fdo#106107) igt@kms_vblank@pipe-c-ts-continuation-suspend: shard-skl: NOTRUN -> INCOMPLETE (fdo#107773, fdo#104108) +1 igt@pm_backlight@fade_with_suspend: shard-skl: NOTRUN -> FAIL (fdo#107847) igt@pm_rpm@modeset-non-lpsp: shard-skl: NOTRUN -> INCOMPLETE (fdo#107807) Possible fixes igt@drv_suspend@shrink: shard-glk: INCOMPLETE (fdo#106886, fdo#103359, k.org#198133) -> PASS igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: FAIL (fdo#106641) -> PASS igt@kms_color@pipe-c-gamma: shard-skl: FAIL (fdo#104782, fdo#108228) -> PASS igt@kms_cursor_crc@cursor-256x256-random: shard-apl: FAIL (fdo#103232) -> PASS +1 igt@kms_cursor_crc@cursor-64x21-onscreen: shard-glk: FAIL (fdo#103232) -> PASS igt@kms_cursor_crc@cursor-64x64-suspend: shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc: shard-glk: FAIL (fdo#103167) -> PASS +2 igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-glk: FAIL (fdo#103166) -> PASS +1 igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: shard-apl: FAIL (fdo#103166) -> PASS +3 igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS igt@perf@oa-exponents: shard-kbl: INCOMPLETE (fdo#103665) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable LP3 watermarks on all SNB machines (rev2)
== Series Details ==
Series: drm/i915: Disable LP3 watermarks on all SNB machines (rev2)
URL : https://patchwork.freedesktop.org/series/52440/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5150 -> Patchwork_10837 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/52440/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10837:
=== IGT changes ===
Possible regressions
igt@kms_chamelium@hdmi-hpd-fast:
{fi-kbl-7500u}: SKIP -> FAIL +2
Warnings
igt@kms_chamelium@common-hpd-after-suspend:
{fi-kbl-7500u}: DMESG-WARN (fdo#102505, fdo#105079, fdo#105602) ->
FAIL
== Known issues ==
Here are the changes found in Patchwork_10837 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_hangcheck:
fi-kbl-7560u: PASS -> INCOMPLETE (fdo#108044)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362)
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
Possible fixes
igt@drv_selftest@live_coherency:
fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS
igt@gem_ctx_create@basic-files:
fi-bsw-kefka: FAIL (fdo#108656) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102505 https://bugs.freedesktop.org/show_bug.cgi?id=102505
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#105079 https://bugs.freedesktop.org/show_bug.cgi?id=105079
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#108044 https://bugs.freedesktop.org/show_bug.cgi?id=108044
fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
== Participating hosts (50 -> 45) ==
Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-snb-2520m
fi-pnv-d510
== Build changes ==
* Linux: CI_DRM_5150 -> Patchwork_10837
CI_DRM_5150: ab97324c7fb98fc8cadbe5ae4e50f36fb0137308 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4716: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10837: 9bdb6ed0115d596f01584f4e824f125e396f3f34 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9bdb6ed0115d drm/i915: Disable LP3 watermarks on all SNB machines
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10837/issues.html
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Re: [Intel-gfx] [PATCH 36/36] drm/i915: Support per-context user requests for GPU frequency control
On 16/11/2018 11:14, Joonas Lahtinen wrote: Quoting Lionel Landwerlin (2018-11-09 19:51:17) I think we have some interest in reviving this for the performance query use case. How are performance queries related? People want performance measured at a given frequency (usually max). Regards, Joonas Is that on anybody's todo list? Thanks, - Lionel On 14/03/2018 09:37, Chris Wilson wrote: Often, we find ourselves facing a workload where the user knows in advance what GPU frequency they require for it to complete in a timely manner, and using past experience they can outperform the HW assisted RPS autotuning. An example might be kodi (HTPC) where they know that video decoding and compositing require a minimum frequency to avoid ever dropping a frame, or conversely know when they are in a powersaving mode and would rather have slower updates than ramp up the GPU frequency and power consumption. Other workloads may defeat the autotuning entirely and need manual control to meet their performance goals, e.g. bursty applications which require low latency. To accommodate the varying needs of different applications, that may be running concurrently, we want a more flexible system than a global limit supplied by sysfs. To this end, we offer the application the option to set their desired frequency bounds on the context itself, and apply those bounds when we execute commands from the application, switching between bounds just as easily as we switch between the clients themselves. The clients can query the range supported by the HW, or at least the range they are restricted to, and then freely select frequencies within that range that they want to run at. (They can select just a single frequency if they so choose.) As this is subject to the global limit supplied by the user in sysfs, and a client can only reduce the range of frequencies they allow the HW to run at, we allow all clients to adjust their request (and not restrict raising the minimum to privileged CAP_SYS_NICE clients). Testcase: igt/gem_ctx_freq Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin Cc: Praveen Paneri Cc: Sagar A Kamble --- drivers/gpu/drm/i915/i915_debugfs.c| 16 ++- drivers/gpu/drm/i915/i915_drv.h| 5 + drivers/gpu/drm/i915/i915_gem_context.c| 54 + drivers/gpu/drm/i915/i915_gem_context.h| 3 + drivers/gpu/drm/i915/intel_gt_pm.c | 121 --- drivers/gpu/drm/i915/intel_gt_pm.h | 4 + drivers/gpu/drm/i915/intel_guc_submission.c| 16 ++- drivers/gpu/drm/i915/intel_lrc.c | 15 +++ .../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 + drivers/gpu/drm/i915/selftests/intel_gt_pm.c | 130 + include/uapi/drm/i915_drm.h| 20 11 files changed, 368 insertions(+), 17 deletions(-) create mode 100644 drivers/gpu/drm/i915/selftests/intel_gt_pm.c diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 7c7afdac8c8c..a21b9164ade8 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2191,6 +2191,7 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) struct drm_device *dev = _priv->drm; struct intel_rps *rps = _priv->gt_pm.rps; struct drm_file *file; + int n; seq_printf(m, "GPU busy? %s [%d requests]\n", yesno(dev_priv->gt.awake), dev_priv->gt.active_requests); @@ -2198,17 +2199,30 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) seq_printf(m, "CPU waiting? %d\n", count_irq_waiters(dev_priv)); seq_printf(m, "Boosts outstanding? %d\n", atomic_read(>num_waiters)); + seq_printf(m, "Worker pending? %s\n", yesno(work_busy(>work))); seq_printf(m, "Frequency requested %d [%d, %d]\n", intel_gpu_freq(dev_priv, rps->freq), intel_gpu_freq(dev_priv, rps->min), intel_gpu_freq(dev_priv, rps->max)); - seq_printf(m, " min hard:%d, soft:%d user:%d; max user:%d, soft: %d hard:%d\n", + seq_printf(m, " min hard:%d, soft:%d, ctx:%d, user:%d; max user:%d, ctx:%d, soft:%d, hard:%d\n", intel_gpu_freq(dev_priv, rps->min_freq_hw), intel_gpu_freq(dev_priv, rps->min_freq_soft), +intel_gpu_freq(dev_priv, rps->min_freq_context), intel_gpu_freq(dev_priv, rps->min_freq_user), intel_gpu_freq(dev_priv, rps->max_freq_user), +intel_gpu_freq(dev_priv, rps->max_freq_context), intel_gpu_freq(dev_priv, rps->max_freq_soft), intel_gpu_freq(dev_priv, rps->max_freq_hw)); + seq_printf(m, " engines min: ["); + for (n = 0; n < ARRAY_SIZE(rps->min_freq_engine); n++) + seq_printf(m, "%s%d", n ? ", " : "",
Re: [Intel-gfx] [PATCH 36/36] drm/i915: Support per-context user requests for GPU frequency control
Quoting Lionel Landwerlin (2018-11-09 19:51:17) > I think we have some interest in reviving this for the performance query > use case. How are performance queries related? Regards, Joonas > Is that on anybody's todo list? > > Thanks, > > - > Lionel > > On 14/03/2018 09:37, Chris Wilson wrote: > > Often, we find ourselves facing a workload where the user knows in > > advance what GPU frequency they require for it to complete in a timely > > manner, and using past experience they can outperform the HW assisted > > RPS autotuning. An example might be kodi (HTPC) where they know that > > video decoding and compositing require a minimum frequency to avoid ever > > dropping a frame, or conversely know when they are in a powersaving mode > > and would rather have slower updates than ramp up the GPU frequency and > > power consumption. Other workloads may defeat the autotuning entirely > > and need manual control to meet their performance goals, e.g. bursty > > applications which require low latency. > > > > To accommodate the varying needs of different applications, that may be > > running concurrently, we want a more flexible system than a global limit > > supplied by sysfs. To this end, we offer the application the option to > > set their desired frequency bounds on the context itself, and apply those > > bounds when we execute commands from the application, switching between > > bounds just as easily as we switch between the clients themselves. > > > > The clients can query the range supported by the HW, or at least the > > range they are restricted to, and then freely select frequencies within > > that range that they want to run at. (They can select just a single > > frequency if they so choose.) As this is subject to the global limit > > supplied by the user in sysfs, and a client can only reduce the range of > > frequencies they allow the HW to run at, we allow all clients to adjust > > their request (and not restrict raising the minimum to privileged > > CAP_SYS_NICE clients). > > > > Testcase: igt/gem_ctx_freq > > Signed-off-by: Chris Wilson > > Cc: Joonas Lahtinen > > Cc: Tvrtko Ursulin > > Cc: Praveen Paneri > > Cc: Sagar A Kamble > > --- > > drivers/gpu/drm/i915/i915_debugfs.c| 16 ++- > > drivers/gpu/drm/i915/i915_drv.h| 5 + > > drivers/gpu/drm/i915/i915_gem_context.c| 54 + > > drivers/gpu/drm/i915/i915_gem_context.h| 3 + > > drivers/gpu/drm/i915/intel_gt_pm.c | 121 > > --- > > drivers/gpu/drm/i915/intel_gt_pm.h | 4 + > > drivers/gpu/drm/i915/intel_guc_submission.c| 16 ++- > > drivers/gpu/drm/i915/intel_lrc.c | 15 +++ > > .../gpu/drm/i915/selftests/i915_mock_selftests.h | 1 + > > drivers/gpu/drm/i915/selftests/intel_gt_pm.c | 130 > > + > > include/uapi/drm/i915_drm.h| 20 > > 11 files changed, 368 insertions(+), 17 deletions(-) > > create mode 100644 drivers/gpu/drm/i915/selftests/intel_gt_pm.c > > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > > b/drivers/gpu/drm/i915/i915_debugfs.c > > index 7c7afdac8c8c..a21b9164ade8 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -2191,6 +2191,7 @@ static int i915_rps_boost_info(struct seq_file *m, > > void *data) > > struct drm_device *dev = _priv->drm; > > struct intel_rps *rps = _priv->gt_pm.rps; > > struct drm_file *file; > > + int n; > > > > seq_printf(m, "GPU busy? %s [%d requests]\n", > > yesno(dev_priv->gt.awake), dev_priv->gt.active_requests); > > @@ -2198,17 +2199,30 @@ static int i915_rps_boost_info(struct seq_file *m, > > void *data) > > seq_printf(m, "CPU waiting? %d\n", count_irq_waiters(dev_priv)); > > seq_printf(m, "Boosts outstanding? %d\n", > > atomic_read(>num_waiters)); > > + seq_printf(m, "Worker pending? %s\n", yesno(work_busy(>work))); > > seq_printf(m, "Frequency requested %d [%d, %d]\n", > > intel_gpu_freq(dev_priv, rps->freq), > > intel_gpu_freq(dev_priv, rps->min), > > intel_gpu_freq(dev_priv, rps->max)); > > - seq_printf(m, " min hard:%d, soft:%d user:%d; max user:%d, soft: %d > > hard:%d\n", > > + seq_printf(m, " min hard:%d, soft:%d, ctx:%d, user:%d; max user:%d, > > ctx:%d, soft:%d, hard:%d\n", > > intel_gpu_freq(dev_priv, rps->min_freq_hw), > > intel_gpu_freq(dev_priv, rps->min_freq_soft), > > +intel_gpu_freq(dev_priv, rps->min_freq_context), > > intel_gpu_freq(dev_priv, rps->min_freq_user), > > intel_gpu_freq(dev_priv, rps->max_freq_user), > > +intel_gpu_freq(dev_priv, rps->max_freq_context), > > intel_gpu_freq(dev_priv, rps->max_freq_soft), > >
Re: [Intel-gfx] [PATCH] drm/i915: use appropriate integer types for flags
On Fri, Nov 16, 2018 at 10:43:39AM +, Lionel Landwerlin wrote:
> On 14/11/2018 13:22, Ville Syrjälä wrote:
> > On Wed, Nov 14, 2018 at 12:08:06PM +, Lionel Landwerlin wrote:
> >> We've been dealing a number of 32/64 bits flags issues lately :
> >>
> >> - 085603287452fc ("drm/i915: Compare user's 64b GTT offset even on 32b")
> >> - c58281056a8b26 ("drm/i915: Mark up GTT sizes as u64")
> >> - 83b466b1dc5f0b ("drm/i915: Mark pin flags as u64")
> >>
> >> As userspace and in particular Mesa pulls in the uAPI headers and
> >> builds up flags using the uAPI defines we should probably make those
> >> more explicitly 32/64bits aware.
> >>
> >> Signed-off-by: Lionel Landwerlin
> >> ---
> >> include/uapi/drm/i915_drm.h | 90 ++---
> >> 1 file changed, 45 insertions(+), 45 deletions(-)
> >>
> >> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> >> index e477ef8c644e..f562c4239bd8 100644
> >> --- a/include/uapi/drm/i915_drm.h
> >> +++ b/include/uapi/drm/i915_drm.h
> >> @@ -895,12 +895,12 @@ struct drm_i915_gem_exec_object2 {
> >> */
> >>__u64 offset;
> >>
> >> -#define EXEC_OBJECT_NEEDS_FENCE(1<<0)
> >> -#define EXEC_OBJECT_NEEDS_GTT (1<<1)
> >> -#define EXEC_OBJECT_WRITE (1<<2)
> >> -#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3)
> >> -#define EXEC_OBJECT_PINNED (1<<4)
> >> -#define EXEC_OBJECT_PAD_TO_SIZE(1<<5)
> >> +#define EXEC_OBJECT_NEEDS_FENCE(1ULL<<0)
> >> +#define EXEC_OBJECT_NEEDS_GTT (1ULL<<1)
> >> +#define EXEC_OBJECT_WRITE (1ULL<<2)
> >> +#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1ULL<<3)
> >> +#define EXEC_OBJECT_PINNED (1ULL<<4)
> >> +#define EXEC_OBJECT_PAD_TO_SIZE(1ULL<<5)
> >> /* The kernel implicitly tracks GPU activity on all GEM objects, and
> >>* synchronises operations with outstanding rendering. This includes
> >>* rendering on other devices if exported via dma-buf. However, sometimes
> >> @@ -921,14 +921,14 @@ struct drm_i915_gem_exec_object2 {
> >>* explicit tracking to avoid rendering corruption. See, for example,
> >>* I915_PARAM_HAS_EXEC_FENCE to order execbufs and execute them
> >> asynchronously.
> >>*/
> >> -#define EXEC_OBJECT_ASYNC (1<<6)
> >> +#define EXEC_OBJECT_ASYNC (1ULL<<6)
> >> /* Request that the contents of this execobject be copied into the error
> >>* state upon a GPU hang involving this batch for post-mortem debugging.
> >>* These buffers are recorded in no particular order as "user" in
> >>* /sys/class/drm/cardN/error. Query I915_PARAM_HAS_EXEC_CAPTURE to see
> >>* if the kernel supports this flag.
> >>*/
> >> -#define EXEC_OBJECT_CAPTURE (1<<7)
> >> +#define EXEC_OBJECT_CAPTURE (1ULL<<7)
> >> /* All remaining bits are MBZ and RESERVED FOR FUTURE USE */
> >> #define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_CAPTURE<<1)
> >>__u64 flags;
> >> @@ -946,8 +946,8 @@ struct drm_i915_gem_exec_fence {
> >> */
> >>__u32 handle;
> >>
> >> -#define I915_EXEC_FENCE_WAIT(1<<0)
> >> -#define I915_EXEC_FENCE_SIGNAL (1<<1)
> >> +#define I915_EXEC_FENCE_WAIT(1UL<<0)
> >> +#define I915_EXEC_FENCE_SIGNAL (1UL<<1)
> > UL doesn't make much sense to me. It can be 32 or 64 bits depending on
> > the architecture.
> >
> Are you suggesting ULL instead?
What's wrong with a plain u?
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 5/5] drm/i915/fixed: cosmetic cleanup
Quoting Jani Nikula (2018-11-15 14:01:26)
> Clean up fixed point temp variable initialization, use the more
> conventional tmp name for temp variables, add empty lines before
> return. No functional changes.
>
> Signed-off-by: Jani Nikula
> static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val)
> {
> - uint_fixed_16_16_t fp;
> + uint_fixed_16_16_t fp = { .val = (u32)val };
Also a possibility:
.val = lower_32_bits(val)
WARN_ON(upper_32_bits(val))
But your style might be more uniform across other funcs.
> +
> WARN_ON(val > U32_MAX);
> - fp.val = (u32)val;
Reviewed-by: Joonas Lahtinen
Regards, Joonas
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Re: [Intel-gfx] [PATCH 3/5] drm/i915/fixed: simplify FP_16_16_MAX definition
On Fri, 16 Nov 2018, Joonas Lahtinen wrote: > Quoting Jani Nikula (2018-11-15 14:01:24) >> No need to use a compound statement enclosed in parenthesis where a C99 >> compound literal will do. No functional changes. >> >> Signed-off-by: Jani Nikula > > Out of curiosity, did this have an effect on asm generation? > Presumably not. For some reason it caused tons of label etc. changes so it was hard to check, but I didn't spot any functional asm changes. BR, Jani. > > Reviewed-by: Joonas Lahtinen > > Regards, Joonas -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/5] drm/i915/fixed: simplify FP_16_16_MAX definition
Quoting Jani Nikula (2018-11-15 12:01:24)
> No need to use a compound statement enclosed in parenthesis where a C99
> compound literal will do. No functional changes.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_fixed.h | 6 +-
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_fixed.h
> b/drivers/gpu/drm/i915/i915_fixed.h
> index 08316e50167a..927c59395569 100644
> --- a/drivers/gpu/drm/i915/i915_fixed.h
> +++ b/drivers/gpu/drm/i915/i915_fixed.h
> @@ -7,11 +7,7 @@ typedef struct {
> u32 val;
> } uint_fixed_16_16_t;
>
> -#define FP_16_16_MAX ({ \
> - uint_fixed_16_16_t fp; \
> - fp.val = UINT_MAX; \
> - fp; \
> -})
> +#define FP_16_16_MAX ((uint_fixed_16_16_t){ .val = UINT_MAX })
Following the standard set by pgprot_t
#define u16_16(x) ((u16_16_t){ .val = (x) })
#define U16_16_MAX u16_16(U32_MAX)
-Chris
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Re: [Intel-gfx] [PATCH 1/5] drm/i915: extract fixed point math to i915_fixed.h
On Fri, 16 Nov 2018, Joonas Lahtinen wrote: > Quoting Jani Nikula (2018-11-15 14:01:22) >> Reduce bloat in one of the bigger header files. Fix some indentation >> while at it. No functional changes. >> >> Signed-off-by: Jani Nikula > > Do add include guards. Then this is: D'oh! > Reviewed-by: Joonas Lahtinen Thanks for the review. BR, Jani. > > Regards, Joonas -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: use appropriate integer types for flags
On 14/11/2018 13:22, Ville Syrjälä wrote:
On Wed, Nov 14, 2018 at 12:08:06PM +, Lionel Landwerlin wrote:
We've been dealing a number of 32/64 bits flags issues lately :
- 085603287452fc ("drm/i915: Compare user's 64b GTT offset even on 32b")
- c58281056a8b26 ("drm/i915: Mark up GTT sizes as u64")
- 83b466b1dc5f0b ("drm/i915: Mark pin flags as u64")
As userspace and in particular Mesa pulls in the uAPI headers and
builds up flags using the uAPI defines we should probably make those
more explicitly 32/64bits aware.
Signed-off-by: Lionel Landwerlin
---
include/uapi/drm/i915_drm.h | 90 ++---
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index e477ef8c644e..f562c4239bd8 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -895,12 +895,12 @@ struct drm_i915_gem_exec_object2 {
*/
__u64 offset;
-#define EXEC_OBJECT_NEEDS_FENCE (1<<0)
-#define EXEC_OBJECT_NEEDS_GTT (1<<1)
-#define EXEC_OBJECT_WRITE (1<<2)
-#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1<<3)
-#define EXEC_OBJECT_PINNED (1<<4)
-#define EXEC_OBJECT_PAD_TO_SIZE (1<<5)
+#define EXEC_OBJECT_NEEDS_FENCE (1ULL<<0)
+#define EXEC_OBJECT_NEEDS_GTT (1ULL<<1)
+#define EXEC_OBJECT_WRITE (1ULL<<2)
+#define EXEC_OBJECT_SUPPORTS_48B_ADDRESS (1ULL<<3)
+#define EXEC_OBJECT_PINNED (1ULL<<4)
+#define EXEC_OBJECT_PAD_TO_SIZE (1ULL<<5)
/* The kernel implicitly tracks GPU activity on all GEM objects, and
* synchronises operations with outstanding rendering. This includes
* rendering on other devices if exported via dma-buf. However, sometimes
@@ -921,14 +921,14 @@ struct drm_i915_gem_exec_object2 {
* explicit tracking to avoid rendering corruption. See, for example,
* I915_PARAM_HAS_EXEC_FENCE to order execbufs and execute them
asynchronously.
*/
-#define EXEC_OBJECT_ASYNC (1<<6)
+#define EXEC_OBJECT_ASYNC (1ULL<<6)
/* Request that the contents of this execobject be copied into the error
* state upon a GPU hang involving this batch for post-mortem debugging.
* These buffers are recorded in no particular order as "user" in
* /sys/class/drm/cardN/error. Query I915_PARAM_HAS_EXEC_CAPTURE to see
* if the kernel supports this flag.
*/
-#define EXEC_OBJECT_CAPTURE(1<<7)
+#define EXEC_OBJECT_CAPTURE(1ULL<<7)
/* All remaining bits are MBZ and RESERVED FOR FUTURE USE */
#define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_CAPTURE<<1)
__u64 flags;
@@ -946,8 +946,8 @@ struct drm_i915_gem_exec_fence {
*/
__u32 handle;
-#define I915_EXEC_FENCE_WAIT(1<<0)
-#define I915_EXEC_FENCE_SIGNAL (1<<1)
+#define I915_EXEC_FENCE_WAIT(1UL<<0)
+#define I915_EXEC_FENCE_SIGNAL (1UL<<1)
UL doesn't make much sense to me. It can be 32 or 64 bits depending on
the architecture.
Are you suggesting ULL instead?
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Re: [Intel-gfx] [PATCH 4/5] drm/i915/fixed: simplify is_fixed16_zero()
Quoting Jani Nikula (2018-11-15 14:01:25) > Simply return the condition. No functional changes. > > Signed-off-by: Jani Nikula Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/5] drm/i915/fixed: simplify FP_16_16_MAX definition
Quoting Jani Nikula (2018-11-15 14:01:24) > No need to use a compound statement enclosed in parenthesis where a C99 > compound literal will do. No functional changes. > > Signed-off-by: Jani Nikula Out of curiosity, did this have an effect on asm generation? Presumably not. Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/5] drm/i915/fixed: prefer kernel types over stdint types
Quoting Jani Nikula (2018-11-15 14:01:23) > While at it, conform to kernel spacing (i.e. no space) after cast. No > functional changes. > > Signed-off-by: Jani Nikula Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/5] drm/i915: extract fixed point math to i915_fixed.h
Quoting Jani Nikula (2018-11-15 14:01:22) > Reduce bloat in one of the bigger header files. Fix some indentation > while at it. No functional changes. > > Signed-off-by: Jani Nikula Do add include guards. Then this is: Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/amdgpu: Reorder uvd ring init before uvd resume
== Series Details ==
Series: drm/amdgpu: Reorder uvd ring init before uvd resume
URL : https://patchwork.freedesktop.org/series/52601/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5150 -> Patchwork_10836 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/52601/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10836:
=== IGT changes ===
Possible regressions
igt@kms_chamelium@hdmi-hpd-fast:
{fi-kbl-7500u}: SKIP -> FAIL +2
Warnings
igt@kms_busy@basic-flip-c:
{fi-kbl-7500u}: PASS -> SKIP +2
igt@kms_chamelium@common-hpd-after-suspend:
{fi-kbl-7500u}: DMESG-WARN (fdo#105602, fdo#102505, fdo#105079) ->
FAIL
== Known issues ==
Here are the changes found in Patchwork_10836 that come from known issues:
=== IGT changes ===
Issues hit
igt@gem_exec_suspend@basic-s3:
fi-icl-u2: PASS -> DMESG-WARN (fdo#107724)
igt@kms_chamelium@dp-hpd-fast:
{fi-kbl-7500u}: PASS -> DMESG-WARN (fdo#105602, fdo#102505)
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: PASS -> DMESG-WARN (fdo#102614)
Warnings
igt@gem_ctx_create@basic-files:
fi-bsw-kefka: FAIL (fdo#108656) -> INCOMPLETE (fdo#108714)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102505 https://bugs.freedesktop.org/show_bug.cgi?id=102505
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#105079 https://bugs.freedesktop.org/show_bug.cgi?id=105079
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
fdo#108714 https://bugs.freedesktop.org/show_bug.cgi?id=108714
== Participating hosts (50 -> 43) ==
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-snb-2520m
fi-gdg-551 fi-pnv-d510 fi-icl-u
== Build changes ==
* Linux: CI_DRM_5150 -> Patchwork_10836
CI_DRM_5150: ab97324c7fb98fc8cadbe5ae4e50f36fb0137308 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4716: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10836: 1cf7edb048f3aa57ecb5ee5ae62249c6ed0cc034 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1cf7edb048f3 drm/amdgpu: Reorder uvd ring init before uvd resume
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10836/issues.html
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[Intel-gfx] [PATCH] drm/amdgpu: Reorder uvd ring init before uvd resume
As amd_uvd_resume() accesses the uvd ring, it must be initialised first or else we trigger errors like: [5.595963] [drm] Found UVD firmware Version: 1.87 Family ID: 17 [5.595969] [drm] PSP loading UVD firmware [5.596266] [ cut here ] [5.596268] ODEBUG: assert_init not available (active state 0) object type: timer_list hint: (null) [5.596285] WARNING: CPU: 0 PID: 507 at lib/debugobjects.c:329 debug_print_object+0x6a/0x80 [5.596286] Modules linked in: amdgpu(+) hid_logitech_hidpp(+) chash gpu_sched amd_iommu_v2 ttm drm_kms_helper crc32c_intel drm hid_sony ff_memless igb hid_logitech_dj nvme dca i2c_algo_bit nvme_core wmi pinctrl_amd uas usb_storage [5.596299] CPU: 0 PID: 507 Comm: systemd-udevd Tainted: GW 4.20.0-0.rc1.git4.1.fc30.x86_64 #1 [5.596301] Hardware name: System manufacturer System Product Name/ROG STRIX X470-I GAMING, BIOS 0901 07/23/2018 [5.596303] RIP: 0010:debug_print_object+0x6a/0x80 [5.596305] Code: 8b 43 10 83 c2 01 8b 4b 14 4c 89 e6 89 15 e6 82 b0 02 4c 8b 45 00 48 c7 c7 60 fd 34 a6 48 8b 14 c5 a0 da 08 a6 e8 6a 6a b8 ff <0f> 0b 5b 83 05 d0 45 3e 01 01 5d 41 5c c3 83 05 c5 45 3e 01 01 c3 [5.596306] RSP: 0018:a02ac863f8c0 EFLAGS: 00010282 [5.596307] RAX: RBX: a02ac863f8e0 RCX: 0006 [5.596308] RDX: 0007 RSI: 9160e9a7bfe8 RDI: 9160f91d6c60 [5.596310] RBP: a6742740 R08: 0002 R09: [5.596311] R10: R11: R12: a634ff69 [5.596312] R13: 000b79d0 R14: a80f76d8 R15: 00266000 [5.596313] FS: 7f762abf7940() GS:9160f900() knlGS: [5.596314] CS: 0010 DS: ES: CR0: 80050033 [5.596315] CR2: 55fdc593f000 CR3: 0007e999c000 CR4: 003406f0 [5.596317] Call Trace: [5.596321] debug_object_assert_init+0x14a/0x180 [5.596327] del_timer+0x2e/0x90 [5.596383] amdgpu_fence_process+0x47/0x100 [amdgpu] [5.596430] amdgpu_uvd_resume+0xf6/0x120 [amdgpu] [5.596475] uvd_v7_0_sw_init+0xe0/0x280 [amdgpu] [5.596523] amdgpu_device_init.cold.30+0xf97/0x14b6 [amdgpu] [5.596563] ? amdgpu_driver_load_kms+0x53/0x330 [amdgpu] [5.596604] amdgpu_driver_load_kms+0x86/0x330 [amdgpu] [5.596614] drm_dev_register+0x115/0x150 [drm] [5.596654] amdgpu_pci_probe+0xbd/0x120 [amdgpu] [5.596658] local_pci_probe+0x41/0x90 [5.596661] pci_device_probe+0x188/0x1a0 [5.59] really_probe+0xf8/0x3b0 [5.596669] driver_probe_device+0xb3/0xf0 [5.596672] __driver_attach+0xe1/0x110 [5.596674] ? driver_probe_device+0xf0/0xf0 [5.596676] bus_for_each_dev+0x79/0xc0 [5.596679] bus_add_driver+0x155/0x230 [5.596681] ? 0xc07d9000 [5.596683] driver_register+0x6b/0xb0 [5.596685] ? 0xc07d9000 [5.596688] do_one_initcall+0x5d/0x2be [5.596691] ? rcu_read_lock_sched_held+0x79/0x80 [5.596693] ? kmem_cache_alloc_trace+0x264/0x290 [5.596695] ? do_init_module+0x22/0x210 [5.596698] do_init_module+0x5a/0x210 [5.596701] load_module+0x2137/0x2430 [5.596703] ? lockdep_hardirqs_on+0xed/0x180 [5.596714] ? __do_sys_init_module+0x150/0x1a0 [5.596715] __do_sys_init_module+0x150/0x1a0 [5.596722] do_syscall_64+0x60/0x1f0 [5.596725] entry_SYSCALL_64_after_hwframe+0x49/0xbe [5.596726] RIP: 0033:0x7f762b877dee [5.596728] Code: 48 8b 0d 9d 20 0c 00 f7 d8 64 89 01 48 83 c8 ff c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa 49 89 ca b8 af 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 6a 20 0c 00 f7 d8 64 89 01 48 [5.596729] RSP: 002b:7ffc777b8558 EFLAGS: 0246 ORIG_RAX: 00af [5.596730] RAX: ffda RBX: 55fdc48da320 RCX: 7f762b877dee [5.596731] RDX: 7f762b9f284d RSI: 006c5fc6 RDI: 55fdc527a060 [5.596732] RBP: 7f762b9f284d R08: 0003 R09: 0002 [5.596733] R10: 55fdc48ad010 R11: 0246 R12: 55fdc527a060 [5.596734] R13: 55fdc48dca20 R14: 0002 R15: [5.596740] irq event stamp: 134618 [5.596743] hardirqs last enabled at (134617): [] console_unlock+0x45e/0x610 [5.596744] hardirqs last disabled at (134618): [] trace_hardirqs_off_thunk+0x1a/0x1c [5.596746] softirqs last enabled at (133146): [] __do_softirq+0x365/0x47c [5.596748] softirqs last disabled at (133139): [] irq_exit+0x119/0x120 [5.596749] ---[ end trace eaee508abfebccdc ]--- Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108709 Signed-off-by: Chris Wilson Cc: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 8 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 8 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 8 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 8 4 files changed, 16
