[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset?
== Series Details == Series: drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset? URL : https://patchwork.freedesktop.org/series/54768/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363_full -> Patchwork_11193_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11193_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11193_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11193_full: ### IGT changes ### Warnings * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0: - shard-apl: PASS -> SKIP +32 Known issues Here are the changes found in Patchwork_11193_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@gem_softpin@noreloc-s3: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: PASS -> DMESG-WARN [fdo#103558] +2 * igt@i915_suspend@fence-restore-untiled: - shard-skl: NOTRUN -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +3 * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_cursor_crc@cursor-256x256-onscreen: - shard-glk: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x256-random: - shard-apl: PASS -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-skl: PASS -> FAIL [fdo#103232] - shard-iclb: NOTRUN -> FAIL [fdo#103232] +3 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_flip@flip-vs-expired-vblank: - shard-glk: PASS -> FAIL [fdo#102887] / [fdo#105363] * igt@kms_flip@plain-flip-ts-check-interruptible: - shard-skl: PASS -> FAIL [fdo#100368] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +7 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt: - shard-iclb: NOTRUN -> FAIL [fdo#103167] * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c: - shard-skl: PASS -> FAIL [fdo#107362] * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: NOTRUN -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: PASS -> DMESG-WARN [fdo#105763] / [fdo#106538] * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@kms_vblank@pipe-b-ts-continuation-suspend: - shard-kbl: PASS -> DMESG-WARN [fdo#108566] * igt@pm_rpm@gem-idle: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] / [fdo#108840] * igt@pm_rpm@gem-
Re: [Intel-gfx] drm/i915: Watchdog timeout: Include threshold value in error state
Hi Michel,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.20 next-20190103]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Carlos-Santa/drm-i915-Watchdog-timeout-Include-threshold-value-in-error-state/20190105-112649
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-s1-201900 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/gpu//drm/i915/i915_gpu_error.c: In function 'error_print_context':
>> drivers/gpu//drm/i915/i915_gpu_error.c:466:4: error: implicit declaration of
>> function 'watchdog_to_us' [-Werror=implicit-function-declaration]
watchdog_to_us(m->i915, ctx->watchdog_threshold) : 0);
^
drivers/gpu//drm/i915/i915_gpu_error.c:189:49: note: in definition of macro
'err_printf'
#define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
^~~
drivers/gpu//drm/i915/i915_gpu_error.c: In function 'record_context':
drivers/gpu//drm/i915/i915_gpu_error.c:1481:50: error: 'struct
intel_context' has no member named 'watchdog_threshold'
e->watchdog_threshold = ctx->__engine[engine_id].watchdog_threshold;
^
cc1: some warnings being treated as errors
vim +/watchdog_to_us +466 drivers/gpu//drm/i915/i915_gpu_error.c
456
457 static void error_print_context(struct drm_i915_error_state_buf *m,
458 const char *header,
459 const struct drm_i915_error_context
*ctx)
460 {
461 err_printf(m, "%s%s[%d] user_handle %d hw_id %d, prio %d, ban
score %d%s guilty %d active %d, watchdog %dus\n",
462 header, ctx->comm, ctx->pid, ctx->handle, ctx->hw_id,
463 ctx->sched_attr.priority, ctx->ban_score,
bannable(ctx),
464 ctx->guilty, ctx->active,
465 INTEL_GEN(m->i915) >= 8 ?
> 466 watchdog_to_us(m->i915,
> ctx->watchdog_threshold) : 0);
467 }
468
---
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Re: [Intel-gfx] drm/i915: Watchdog timeout: Include threshold value in error state
Hi Michel,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.20 next-20190103]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Carlos-Santa/drm-i915-Watchdog-timeout-Include-threshold-value-in-error-state/20190105-112649
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x019-201900 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_gpu_error.c: In function 'error_print_context':
>> drivers/gpu/drm/i915/i915_gpu_error.c:466:4: error: implicit declaration of
>> function 'watchdog_to_us'; did you mean 'wq_watchdog_touch'?
>> [-Werror=implicit-function-declaration]
watchdog_to_us(m->i915, ctx->watchdog_threshold) : 0);
^
drivers/gpu/drm/i915/i915_gpu_error.c:189:49: note: in definition of macro
'err_printf'
#define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
^~~
drivers/gpu/drm/i915/i915_gpu_error.c: In function 'record_context':
>> drivers/gpu/drm/i915/i915_gpu_error.c:1481:50: error: 'struct intel_context'
>> has no member named 'watchdog_threshold'
e->watchdog_threshold = ctx->__engine[engine_id].watchdog_threshold;
^
cc1: all warnings being treated as errors
vim +466 drivers/gpu/drm/i915/i915_gpu_error.c
456
457 static void error_print_context(struct drm_i915_error_state_buf *m,
458 const char *header,
459 const struct drm_i915_error_context
*ctx)
460 {
461 err_printf(m, "%s%s[%d] user_handle %d hw_id %d, prio %d, ban
score %d%s guilty %d active %d, watchdog %dus\n",
462 header, ctx->comm, ctx->pid, ctx->handle, ctx->hw_id,
463 ctx->sched_attr.priority, ctx->ban_score,
bannable(ctx),
464 ctx->guilty, ctx->active,
465 INTEL_GEN(m->i915) >= 8 ?
> 466 watchdog_to_us(m->i915,
> ctx->watchdog_threshold) : 0);
467 }
468
---
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Re: [Intel-gfx] drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset?
Hi Michel,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.20 next-20190103]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Carlos-Santa/drm-i915-Watchdog-timeout-Blindly-trust-watchdog-timeout-for-reset/20190105-111445
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x012-201900 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/intel_hangcheck.c: In function 'i915_hangcheck_elapsed':
>> drivers/gpu/drm/i915/intel_hangcheck.c:443:24: error: 'struct
>> intel_engine_hangcheck' has no member named 'watchdog'
engine->hangcheck.watchdog == intel_engine_get_seqno(engine)) {
^
vim +443 drivers/gpu/drm/i915/intel_hangcheck.c
400
401 /*
402 * This is called when the chip hasn't reported back with completed
403 * batchbuffers in a long time. We keep track per ring seqno progress
and
404 * if there are no progress, hangcheck score for that ring is increased.
405 * Further, acthd is inspected to see if the ring is stuck. On stuck
case
406 * we kick the ring. If we see no progress on three subsequent calls
407 * we assume chip is wedged and try to fix it by resetting the chip.
408 */
409 static void i915_hangcheck_elapsed(struct work_struct *work)
410 {
411 struct drm_i915_private *dev_priv =
412 container_of(work, typeof(*dev_priv),
413 gpu_error.hangcheck_work.work);
414 struct intel_engine_cs *engine;
415 enum intel_engine_id id;
416 unsigned int hung = 0, stuck = 0, wedged = 0;
417
418 if (!i915_modparams.enable_hangcheck)
419 return;
420
421 if (!READ_ONCE(dev_priv->gt.awake))
422 return;
423
424 if (i915_terminally_wedged(&dev_priv->gpu_error))
425 return;
426
427 /* As enabling the GPU requires fairly extensive mmio access,
428 * periodically arm the mmio checker to see if we are triggering
429 * any invalid access.
430 */
431 intel_uncore_arm_unclaimed_mmio_detection(dev_priv);
432
433 for_each_engine(engine, dev_priv, id) {
434 struct intel_engine_hangcheck hc;
435
436 semaphore_clear_deadlocks(dev_priv);
437
438 hangcheck_load_sample(engine, &hc);
439 hangcheck_accumulate_sample(engine, &hc);
440 hangcheck_store_sample(engine, &hc);
441
442 if (engine->hangcheck.stalled ||
> 443 engine->hangcheck.watchdog ==
> intel_engine_get_seqno(engine)) {
444 hung |= intel_engine_flag(engine);
445 if (hc.action != ENGINE_DEAD)
446 stuck |= intel_engine_flag(engine);
447 }
448
449 if (engine->hangcheck.wedged)
450 wedged |= intel_engine_flag(engine);
451 }
452
453 if (wedged) {
454 dev_err(dev_priv->drm.dev,
455 "GPU recovery timed out,"
456 " cancelling all in-flight rendering.\n");
457 GEM_TRACE_DUMP();
458 i915_gem_set_wedged(dev_priv);
459 }
460
461 if (hung)
462 hangcheck_declare_hang(dev_priv, hung, stuck);
463
464 /* Reset timer in case GPU hangs without another request being
added */
465 i915_queue_hangcheck(dev_priv);
466 }
467
---
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fixup kerneldoc for intel_device_info_runtime_init
== Series Details == Series: drm/i915: Fixup kerneldoc for intel_device_info_runtime_init URL : https://patchwork.freedesktop.org/series/54767/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363_full -> Patchwork_11192_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11192_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11192_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11192_full: ### IGT changes ### Warnings * igt@kms_cursor_crc@cursor-128x42-offscreen: - shard-apl: PASS -> SKIP +49 Known issues Here are the changes found in Patchwork_11192_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_nop@signal-all: - shard-apl: PASS -> INCOMPLETE [fdo#103927] * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-hang-newfb-render-b: - shard-snb: PASS -> INCOMPLETE [fdo#105411] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge: - shard-skl: NOTRUN -> FAIL [fdo#104671] * igt@kms_cursor_crc@cursor-256x256-onscreen: - shard-glk: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-skl: PASS -> FAIL [fdo#103232] - shard-iclb: NOTRUN -> FAIL [fdo#103232] +3 * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: - shard-iclb: NOTRUN -> FAIL [fdo#103355] * igt@kms_draw_crc@draw-method-rgb565-render-xtiled: - shard-skl: PASS -> FAIL [fdo#103184] * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_flip@dpms-vs-vblank-race-interruptible: - shard-apl: PASS -> FAIL [fdo#103060] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +3 * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c: - shard-skl: PASS -> FAIL [fdo#107362] * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-glk: PASS -> FAIL [fdo#103166] +3 * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: NOTRUN -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +1 * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend: - shard-apl: PASS -> DMESG-WARN [fdo#103558] * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@pm_rpm@modeset-lpsp-stress: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@pm_rpm@reg-read-ioctl: - shard-skl: PASS -> INCOMPLETE [fdo#107807] * igt@pm_rps@waitboost: - shard-iclb: NOTRUN -> FAIL [fdo#102250] / [fdo#108059] Possible fixes * igt@gem_userptr_blits@readonly-unsync: - shard-skl: TIMEOUT [fdo#108887] -> PASS * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-glk: FAIL [fdo#108145] -> PASS * igt@kms_color@pipe-c-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-skl: IN
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset?
== Series Details == Series: drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset? URL : https://patchwork.freedesktop.org/series/54768/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363 -> Patchwork_11193 Summary --- **WARNING** Minor unknown changes coming with Patchwork_11193 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11193, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/54768/revisions/1/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11193: ### IGT changes ### Warnings * igt@pm_rpm@basic-pci-d3-state: - fi-bsw-kefka: PASS -> SKIP Known issues Here are the changes found in Patchwork_11193 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@pm_rpm@basic-rte: - fi-bsw-kefka: PASS -> FAIL [fdo#108800] * igt@prime_vgem@basic-fence-flip: - fi-gdg-551: PASS -> FAIL [fdo#103182] Possible fixes * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: FAIL [fdo#108767] -> PASS * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: DMESG-WARN [fdo#102614] -> PASS * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1 [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 Participating hosts (47 -> 41) -- Additional (2): fi-byt-n2820 fi-apl-guc Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u fi-skl-6600u Build changes - * Linux: CI_DRM_5363 -> Patchwork_11193 CI_DRM_5363: f141806c68e4cbd56e3a5a582eb1a6f5b7edfc84 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11193: 285c27ee5aed2b08ced1f906f3363c12f7231a61 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 285c27ee5aed drm/i915: Add engine reset count in get-reset-stats ioctl == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11193/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset?
== Series Details == Series: drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset? URL : https://patchwork.freedesktop.org/series/54768/ State : warning == Summary == $ dim checkpatch origin/drm-tip 285c27ee5aed drm/i915: Add engine reset count in get-reset-stats ioctl -:17: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #17: v2: s/engine_reset/reset_engine/, use union in uapi to not break compatibility. total: 0 errors, 1 warnings, 0 checks, 38 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] drm/i915: Only process VCS2 only when supported
Not checking for BSD2 causes a segfault on GPU revs
with no h/w support for the extra media engines.
Segfault on ULX GT2 (0x591e) follows:
Patch shared by Michel Thierry on IIRC.
[ 468.625970] BUG: unable to handle kernel NULL pointer dereference at
02c0
[ 468.625978] IP: gen8_cs_irq_handler+0x8d/0xcf
[ 468.625979] PGD 0 P4D 0
[ 468.625983] Oops: 0002 [#1] PREEMPT SMP PTI
[ 468.625987] Dumping ftrace buffer:
[ 468.625990](ftrace buffer empty)
[ 468.627877] gsmi: Log Shutdown Reason 0x03
[ 468.627880] Modules linked in: cmac rfcomm uinput joydev snd_soc_hdac_hdmi
snd_soc_dmic snd_soc_skl snd_soc_skl_ipc lzo lzo_compress snd_soc_sst_ipc
snd_soc_sst_dsp snd_soc_acpi snd_hda_ext_core snd_hda_core zram
snd_soc_max98927 ipt_MASQUERADE nf_nat_masquerade_ipv4 hid_multitouch xt_mark
fuse cdc_ether usbnet btusb btrtl btbcm btintel uvcvideo bluetooth
videobuf2_vmalloc videobuf2_memops videobuf2_v4l2 videobuf2_core ecdh_generic
iio_trig_sysfs cros_ec_light_prox cros_ec_sensors_ring cros_ec_sensors
cros_ec_activity cros_ec_sensors_core industrialio_triggered_buffer kfifo_buf
industrialio iwlmvm iwl7000_mac80211 r8152 mii iwlwifi cfg80211
[ 468.627917] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.14.64 #38
[ 468.627919] Hardware name: Google Eve/Eve, BIOS Google_Eve.9584.107.0
11/07/2017
[ 468.627922] task: 96bf35a13c00 task.stack: a7988007
[ 468.627925] RIP: 0010:gen8_cs_irq_handler+0x8d/0xcf
[ 468.627928] RSP: 0018:96bf3ec83df8 EFLAGS: 00010002
[ 468.627931] RAX: 0100 RBX: RCX: 0010
[ 468.627933] RDX: 0010 RSI: 0040 RDI:
[ 468.627936] RBP: 96bf3ec83e20 R08: R09:
[ 468.627938] R10: a79880073dc8 R11: a2a6453d R12: 96bf3ec83e70
[ 468.627940] R13: 0079 R14: R15: 0040
[ 468.627943] FS: () GS:96bf3ec8()
knlGS:
[ 468.627945] CS: 0010 DS: ES: CR0: 80050033
[ 468.627948] CR2: 02c0 CR3: 00016fe12002 CR4: 003606e0
[ 468.627950] DR0: DR1: DR2:
[ 468.627953] DR3: DR6: fffe0ff0 DR7: 0400
[ 468.627955] Call Trace:
[ 468.627959]
[ 468.627963] gen8_gt_irq_handler+0x5e/0xed
[ 468.627968] gen8_irq_handler+0x9f/0x5ce
[ 468.627973] __handle_irq_event_percpu+0xb8/0x1da
[ 468.627977] handle_irq_event_percpu+0x32/0x77
[ 468.627980] handle_irq_event+0x36/0x55
[ 468.627984] handle_edge_irq+0x7d/0xcd
[ 468.627988] handle_irq+0xd9/0x11e
[ 468.627992] do_IRQ+0x4b/0xd0
[ 468.627996] common_interrupt+0x7a/0x7a
[ 468.627999]
[ 468.628003] RIP: 0010:cpuidle_enter_state+0xff/0x177
[ 468.628005] RSP: 0018:a79880073e78 EFLAGS: 0206 ORIG_RAX:
ff5e
[ 468.628008] RAX: 96bf3eca09c0 RBX: 0002b9c3 RCX: 006d1c48c3b5
[ 468.628010] RDX: 0037 RSI: 0001 RDI:
[ 468.628013] RBP: a79880073ec0 R08: 0002 R09: 5000
[ 468.628015] R10: 071c71c71c71c71c R11: a2e42687 R12:
[ 468.628017] R13: 0002 R14: 0002 R15: 96bf3eca7d00
[ 468.628020] ? cpu_idle_poll+0x8e/0x8e
[ 468.628025] ? cpuidle_enter_state+0xe3/0x177
[ 468.628028] do_idle+0x10c/0x19d
[ 468.628033] cpu_startup_entry+0x6d/0x6f
[ 468.628036] start_secondary+0x189/0x1a4
[ 468.628041] secondary_startup_64+0xa5/0xb0
[ 468.628044] Code: c3 84 db 74 20 f0 41 0f ba ae 98 02 00 00 00 0f 92 45 df
80 7d df 00 75 0c 49 8d be 90 02 00 00 e8 3a 7a c6 ff 41 f6 c7 40 74 23 41
0f ba ae c0 02 00 00 00 0f 92 45 de 80 7d de 00 75 0f 49
[ 468.628083] RIP: gen8_cs_irq_handler+0x8d/0xcf RSP: 96bf3ec83df8
[ 468.628085] CR2: 02c0
[ 468.628088] ---[ end trace a7a497ddeb44bcf8 ]---
Tested-by: Carlos Santa
Cc: Tvrtko Ursulin
Cc: Antonio Argenziano
Cc: Michel Thierry
Signed-off-by: Carlos Santa
---
drivers/gpu/drm/i915/i915_irq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 859bbadb752f..953ebe5c85ce 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1554,7 +1554,8 @@ static void gen8_gt_irq_handler(struct drm_i915_private
*i915,
if (master_ctl & (GEN8_GT_VCS1_IRQ | GEN8_GT_VCS2_IRQ)) {
gen8_cs_irq_handler(i915->engine[VCS],
gt_iir[1] >> GEN8_VCS1_IRQ_SHIFT);
- gen8_cs_irq_handler(i915->engine[VCS2],
+ if(HAS_BSD2(i915))
+ gen8_cs_irq_handler(i915->engine[VCS2],
gt_iir[1] >> GEN8_VCS2_IRQ_SHIFT);
}
--
2.17.1
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htt
[Intel-gfx] drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset?
From: Michel Thierry
XXX: What to do when the watchdog irq fired twice but our hangcheck
logic thinks the engine is not hung? For example, what if the
active-head moved since the irq handler?
One option is to just ignore the watchdog, if the engine is really hung,
then the driver will detect the hang by itself later on (I'm inclined to
this).
But the other option is to blindly trust the HW, which is what this patch
does...
CC: Antonio Argenziano
Cc: Tvrtko Ursulin
Signed-off-by: Michel Thierry
Signed-off-by: Carlos Santa
---
drivers/gpu/drm/i915/intel_hangcheck.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_hangcheck.c
b/drivers/gpu/drm/i915/intel_hangcheck.c
index 2906f0ef3d77..1947baa20022 100644
--- a/drivers/gpu/drm/i915/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/intel_hangcheck.c
@@ -281,7 +281,8 @@ static void i915_hangcheck_elapsed(struct work_struct *work)
hangcheck_accumulate_sample(engine, &hc);
hangcheck_store_sample(engine, &hc);
- if (engine->hangcheck.stalled) {
+ if (engine->hangcheck.stalled ||
+ engine->hangcheck.watchdog ==
intel_engine_get_seqno(engine)) {
hung |= intel_engine_flag(engine);
if (hc.action != ENGINE_DEAD)
stuck |= intel_engine_flag(engine);
--
2.17.1
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[Intel-gfx] drm/i915: Watchdog timeout: Include threshold value in error state
From: Michel Thierry
Save the watchdog threshold (in us) as part of the engine state.
v2: Only do it for gen8+ (and prevent a missing-case warn).
v3: use ctx->__engine.
v4: Rebase.
Cc: Antonio Argenziano
Cc: Tvrtko Ursulin
Signed-off-by: Michel Thierry
Signed-off-by: Carlos Santa
---
drivers/gpu/drm/i915/i915_gpu_error.c | 12
drivers/gpu/drm/i915/i915_gpu_error.h | 1 +
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 5533a741abeb..f97379606b1b 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -458,10 +458,12 @@ static void error_print_context(struct
drm_i915_error_state_buf *m,
const char *header,
const struct drm_i915_error_context *ctx)
{
- err_printf(m, "%s%s[%d] user_handle %d hw_id %d, prio %d, ban score
%d%s guilty %d active %d\n",
+ err_printf(m, "%s%s[%d] user_handle %d hw_id %d, prio %d, ban score
%d%s guilty %d active %d, watchdog %dus\n",
header, ctx->comm, ctx->pid, ctx->handle, ctx->hw_id,
ctx->sched_attr.priority, ctx->ban_score, bannable(ctx),
- ctx->guilty, ctx->active);
+ ctx->guilty, ctx->active,
+ INTEL_GEN(m->i915) >= 8 ?
+ watchdog_to_us(m->i915, ctx->watchdog_threshold) : 0);
}
static void error_print_engine(struct drm_i915_error_state_buf *m,
@@ -1451,7 +1453,8 @@ static void error_record_engine_execlists(struct
intel_engine_cs *engine,
}
static void record_context(struct drm_i915_error_context *e,
- struct i915_gem_context *ctx)
+ struct i915_gem_context *ctx,
+ u32 engine_id)
{
if (ctx->pid) {
struct task_struct *task;
@@ -1472,6 +1475,7 @@ static void record_context(struct drm_i915_error_context
*e,
e->bannable = i915_gem_context_is_bannable(ctx);
e->guilty = atomic_read(&ctx->guilty_count);
e->active = atomic_read(&ctx->active_count);
+ e->watchdog_threshold = ctx->__engine[engine_id].watchdog_threshold;
}
static void request_record_user_bo(struct i915_request *request,
@@ -1556,7 +1560,7 @@ static void gem_record_rings(struct i915_gpu_state *error)
ee->vm = ctx->ppgtt ? &ctx->ppgtt->vm : &ggtt->vm;
- record_context(&ee->context, ctx);
+ record_context(&ee->context, ctx, engine->id);
/* We need to copy these to an anonymous buffer
* as the simplest method to avoid being overwritten
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h
b/drivers/gpu/drm/i915/i915_gpu_error.h
index 7130786aa5b4..affd12e17f39 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -129,6 +129,7 @@ struct i915_gpu_state {
int ban_score;
int active;
int guilty;
+ int watchdog_threshold;
bool bannable;
struct i915_sched_attr sched_attr;
} context;
--
2.17.1
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[Intel-gfx] drm/i915: Watchdog timeout: IRQ handler for gen8+
From: Michel Thierry
*** General ***
Watchdog timeout (or "media engine reset") is a feature that allows
userland applications to enable hang detection on individual batch buffers.
The detection mechanism itself is mostly bound to the hardware and the only
thing that the driver needs to do to support this form of hang detection
is to implement the interrupt handling support as well as watchdog command
emission before and after the emitted batch buffer start instruction in the
ring buffer.
The principle of the hang detection mechanism is as follows:
1. Once the decision has been made to enable watchdog timeout for a
particular batch buffer and the driver is in the process of emitting the
batch buffer start instruction into the ring buffer it also emits a
watchdog timer start instruction before and a watchdog timer cancellation
instruction after the batch buffer start instruction in the ring buffer.
2. Once the GPU execution reaches the watchdog timer start instruction
the hardware watchdog counter is started by the hardware. The counter
keeps counting until either reaching a previously configured threshold
value or the timer cancellation instruction is executed.
2a. If the counter reaches the threshold value the hardware fires a
watchdog interrupt that is picked up by the watchdog interrupt handler.
This means that a hang has been detected and the driver needs to deal with
it the same way it would deal with a engine hang detected by the periodic
hang checker. The only difference between the two is that we already blamed
the active request (to ensure an engine reset).
2b. If the batch buffer completes and the execution reaches the watchdog
cancellation instruction before the watchdog counter reaches its
threshold value the watchdog is cancelled and nothing more comes of it.
No hang is detected.
Note about future interaction with preemption: Preemption could happen
in a command sequence prior to watchdog counter getting disabled,
resulting in watchdog being triggered following preemption (e.g. when
watchdog had been enabled in the low priority batch). The driver will
need to explicitly disable the watchdog counter as part of the
preemption sequence.
*** This patch introduces: ***
1. IRQ handler code for watchdog timeout allowing direct hang recovery
based on hardware-driven hang detection, which then integrates directly
with the hang recovery path. This is independent of having per-engine reset
or just full gpu reset.
2. Watchdog specific register information.
Currently the render engine and all available media engines support
watchdog timeout (VECS is only supported in GEN9). The specifications elude
to the BCS engine being supported but that is currently not supported by
this commit.
Note that the value to stop the counter is different between render and
non-render engines in GEN8; GEN9 onwards it's the same.
v2: Move irq handler to tasklet, arm watchdog for a 2nd time to check
against false-positives.
v3: Don't use high priority tasklet, use engine_last_submit while
checking for false-positives. From GEN9 onwards, the stop counter bit is
the same for all engines.
v4: Remove unnecessary brackets, use current_seqno to mark the request
as guilty in the hangcheck/capture code.
v5: Rebased after RESET_ENGINEs flag.
v6: Don't capture error state in case of watchdog timeout. The capture
process is time consuming and this will align to what happens when we
use GuC to handle the watchdog timeout. (Chris)
v7: Rebase.
v8: Rebase, use HZ to reschedule.
v9: Rebase, get forcewake domains in function (no longer in execlists
struct).
v10: Rebase.
Cc: Antonio Argenziano
Cc: Tvrtko Ursulin
Signed-off-by: Michel Thierry
Signed-off-by: Carlos Santa
---
drivers/gpu/drm/i915/i915_gpu_error.h | 4 ++
drivers/gpu/drm/i915/i915_irq.c | 14 +++-
drivers/gpu/drm/i915/i915_reg.h | 6 ++
drivers/gpu/drm/i915/intel_hangcheck.c | 17 +++--
drivers/gpu/drm/i915/intel_lrc.c| 86 +
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++
6 files changed, 126 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h
b/drivers/gpu/drm/i915/i915_gpu_error.h
index 6d9f45468ac1..7130786aa5b4 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -256,6 +256,9 @@ struct i915_gpu_error {
* inspect the bit and do the reset directly, otherwise the worker
* waits for the struct_mutex.
*
+* #I915_RESET_WATCHDOG - When hw detects a hang before us, we can use
+* I915_RESET_WATCHDOG to report the hang detection cause accurately.
+*
* #I915_RESET_ENGINE[num_engines] - Since the driver doesn't need to
* acquire the struct_mutex to reset an engine, we need an explicit
* flag to prevent two concurrent reset attempts in the same engine.
@@ -271,6 +274,7 @@ struct i915_gpu_error {
#define I915_RESET_BACKOFF 0
#define I915_RESET_HANDOFF
[Intel-gfx] drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+
From: Michel Thierry
Emit the required commands into the ring buffer for starting and
stopping the watchdog timer before/after batch buffer start during
batch buffer submission.
v2: Support watchdog threshold per context engine, merge lri commands,
and move watchdog commands emission to emit_bb_start. Request space of
combined start_watchdog, bb_start and stop_watchdog to avoid any error
after emitting bb_start.
v3: There were too many req->engine in emit_bb_start.
Use GEM_BUG_ON instead of returning a very late EINVAL in the remote
case of watchdog misprogramming; set correct LRI cmd size in
emit_stop_watchdog. (Chris)
v4: Rebase.
v5: use to_intel_context instead of ctx->engine.
v6: Rebase.
Cc: Chris Wilson
Cc: Antonio Argenziano
Cc: Tvrtko Ursulin
Signed-off-by: Michel Thierry
Signed-off-by: Carlos Santa
---
drivers/gpu/drm/i915/i915_gem_context.h | 4 ++
drivers/gpu/drm/i915/intel_lrc.c| 80 -
drivers/gpu/drm/i915/intel_ringbuffer.h | 4 ++
3 files changed, 86 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.h
b/drivers/gpu/drm/i915/i915_gem_context.h
index f6d870b1f73e..62f4eb04985b 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/i915_gem_context.h
@@ -169,6 +169,10 @@ struct i915_gem_context {
u32 *lrc_reg_state;
u64 lrc_desc;
int pin_count;
+ /** watchdog_threshold: hw watchdog threshold value,
+* in clock counts
+*/
+ u32 watchdog_threshold;
const struct intel_context_ops *ops;
} __engine[I915_NUM_ENGINES];
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e1dcdf545bee..0ea5a37c3357 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1872,12 +1872,33 @@ static int gen8_emit_bb_start(struct i915_request *rq,
u64 offset, u32 len,
const unsigned int flags)
{
+ struct intel_engine_cs *engine = rq->engine;
u32 *cs;
+ u32 num_dwords;
+ bool watchdog_running = false;
- cs = intel_ring_begin(rq, 6);
+ /* bb_start only */
+ num_dwords = 6;
+
+ /* check if watchdog will be required */
+ if (to_intel_context(rq->gem_context, engine)->watchdog_threshold != 0)
{
+ GEM_BUG_ON(!engine->emit_start_watchdog ||
+ !engine->emit_stop_watchdog);
+
+ /* + start_watchdog (6) + stop_watchdog (4) */
+ num_dwords += 10;
+ watchdog_running = true;
+}
+
+ cs = intel_ring_begin(rq, num_dwords);
if (IS_ERR(cs))
return PTR_ERR(cs);
+ if (watchdog_running) {
+ /* Start watchdog timer */
+ cs = engine->emit_start_watchdog(rq, cs);
+ }
+
/*
* WaDisableCtxRestoreArbitration:bdw,chv
*
@@ -1906,8 +1927,12 @@ static int gen8_emit_bb_start(struct i915_request *rq,
*cs++ = MI_ARB_ON_OFF | MI_ARB_DISABLE;
*cs++ = MI_NOOP;
- intel_ring_advance(rq, cs);
+ if (watchdog_running) {
+ /* Cancel watchdog timer */
+ cs = engine->emit_stop_watchdog(rq, cs);
+ }
+ intel_ring_advance(rq, cs);
return 0;
}
@@ -2091,6 +2116,49 @@ static void gen8_watchdog_irq_handler(unsigned long data)
intel_uncore_forcewake_put(dev_priv, fw_domains);
}
+static u32 *gen8_emit_start_watchdog(struct i915_request *rq, u32 *cs)
+{
+ struct intel_engine_cs *engine = rq->engine;
+ struct i915_gem_context *ctx = rq->gem_context;
+ struct intel_context *ce = to_intel_context(ctx, engine);
+
+ /* XXX: no watchdog support in BCS engine */
+ GEM_BUG_ON(engine->id == BCS);
+
+ /*
+* watchdog register must never be programmed to zero. This would
+* cause the watchdog counter to exceed and not allow the engine to
+* go into IDLE state
+*/
+ GEM_BUG_ON(ce->watchdog_threshold == 0);
+
+ /* Set counter period */
+ *cs++ = MI_LOAD_REGISTER_IMM(2);
+ *cs++ = i915_mmio_reg_offset(RING_THRESH(engine->mmio_base));
+ *cs++ = ce->watchdog_threshold;
+ /* Start counter */
+ *cs++ = i915_mmio_reg_offset(RING_CNTR(engine->mmio_base));
+ *cs++ = GEN8_WATCHDOG_ENABLE;
+ *cs++ = MI_NOOP;
+
+ return cs;
+}
+
+static u32 *gen8_emit_stop_watchdog(struct i915_request *rq, u32 *cs)
+{
+ struct intel_engine_cs *engine = rq->engine;
+
+ /* XXX: no watchdog support in BCS engine */
+ GEM_BUG_ON(engine->id == BCS);
+
+ *cs++ = MI_LOAD_REGISTER_IMM(1);
+ *cs++ = i915_mmio_reg_offset(RING_CNTR(engine->mmio_base));
+ *cs++ = get_watchdog_disable(engine);
+ *cs++ = MI_NOOP;
+
+ return cs;
+}
+
/*
* Reserve space for 2 NOOPs at t
[Intel-gfx] drm/i915/watchdog: move emit_stop_watchdog until the very end of the ring commands
From: Michel Thierry
On command streams that could potentially hang the GPU after a last
flush command, it's best not to cancel the watchdog
until after all commands have executed.
Patch shared by Michel Thierry through IIRC after reproduction on
my local setup.
Tested-by: Carlos Santa
CC: Antonio Argenziano
Cc: Tvrtko Ursulin
Signed-off-by: Michel Thierry
Signed-off-by: Carlos Santa
---
drivers/gpu/drm/i915/intel_lrc.c | 53 +++-
1 file changed, 45 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0afcbeb18329..25ba5fcc9466 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1885,8 +1885,8 @@ static int gen8_emit_bb_start(struct i915_request *rq,
GEM_BUG_ON(!engine->emit_start_watchdog ||
!engine->emit_stop_watchdog);
- /* + start_watchdog (6) + stop_watchdog (4) */
- num_dwords += 10;
+ /* + start_watchdog (6) */
+ num_dwords += 6;
watchdog_running = true;
}
@@ -1927,10 +1927,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
*cs++ = MI_ARB_ON_OFF | MI_ARB_DISABLE;
*cs++ = MI_NOOP;
- if (watchdog_running) {
- /* Cancel watchdog timer */
- cs = engine->emit_stop_watchdog(rq, cs);
- }
+ // XXX: emit_stop_watchdog happens in gen8_emit_breadcrumb_vcs
intel_ring_advance(rq, cs);
return 0;
@@ -2189,6 +2186,37 @@ static void gen8_emit_breadcrumb(struct i915_request
*request, u32 *cs)
}
static const int gen8_emit_breadcrumb_sz = 6 + WA_TAIL_DWORDS;
+static void gen8_emit_breadcrumb_vcs(struct i915_request *request, u32 *cs)
+{
+ /* w/a: bit 5 needs to be zero for MI_FLUSH_DW address. */
+ BUILD_BUG_ON(I915_GEM_HWS_INDEX_ADDR & (1 << 5));
+
+ cs = gen8_emit_ggtt_write(cs, request->global_seqno,
+ intel_hws_seqno_address(request->engine));
+ *cs++ = MI_USER_INTERRUPT;
+ *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
+
+ // stop_watchdog at the very end of the ring commands
+ if (request->gem_context->__engine[VCS].watchdog_threshold != 0)
+ {
+ /* Cancel watchdog timer */
+ GEM_BUG_ON(!request->engine->emit_stop_watchdog);
+ cs = request->engine->emit_stop_watchdog(request, cs);
+ }
+ else
+ {
+ *cs++ = MI_NOOP;
+ *cs++ = MI_NOOP;
+ *cs++ = MI_NOOP;
+ *cs++ = MI_NOOP;
+ }
+
+ request->tail = intel_ring_offset(request, cs);
+ assert_ring_tail_valid(request->ring, request->tail);
+ gen8_emit_wa_tail(request, cs);
+}
+static const int gen8_emit_breadcrumb_vcs_sz = 6 + WA_TAIL_DWORDS + 4; //+4
for optional stop_watchdog
+
static void gen8_emit_breadcrumb_rcs(struct i915_request *request, u32 *cs)
{
/* We're using qword write, seqno should be aligned to 8 bytes. */
@@ -2306,8 +2334,17 @@ logical_ring_default_vfuncs(struct intel_engine_cs
*engine)
engine->request_alloc = execlists_request_alloc;
engine->emit_flush = gen8_emit_flush;
- engine->emit_breadcrumb = gen8_emit_breadcrumb;
- engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_sz;
+
+ if (engine->id == VCS || engine->id == VCS2)
+ {
+ engine->emit_breadcrumb = gen8_emit_breadcrumb_vcs;
+ engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_vcs_sz;
+ }
+ else
+ {
+ engine->emit_breadcrumb = gen8_emit_breadcrumb;
+ engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_sz;
+ }
engine->set_default_submission = intel_execlists_set_default_submission;
--
2.17.1
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[Intel-gfx] drm/i915: Add engine reset count in get-reset-stats ioctl
From: Michel Thierry
Users/tests relying on the total reset count will start seeing a smaller
number since most of the hangs can be handled by engine reset.
Note that if reset engine x, context a running on engine y will be unaware
and unaffected.
To start the discussion, include just a total engine reset count. If it
is deemed useful, it can be extended to report each engine separately.
Our igt's gem_reset_stats test will need changes to ignore the pad field,
since it can now return reset_engine_count.
v2: s/engine_reset/reset_engine/, use union in uapi to not break compatibility.
v3: Keep rejecting attempts to use pad as input (Antonio)
v4: Rebased.
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Antonio Argenziano
Cc: Cc: Tvrtko Ursulin
Signed-off-by: Michel Thierry
Signed-off-by: Carlos Santa
---
drivers/gpu/drm/i915/i915_gem_context.c | 12 ++--
include/uapi/drm/i915_drm.h | 6 +-
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 5905b6d8f291..40fefed8c92f 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -964,6 +964,8 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device
*dev,
struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_i915_reset_stats *args = data;
struct i915_gem_context *ctx;
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
int ret;
if (args->flags || args->pad)
@@ -982,10 +984,16 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device
*dev,
* we should wrap the hangstats with a seqlock.
*/
- if (capable(CAP_SYS_ADMIN))
+ if (capable(CAP_SYS_ADMIN)) {
args->reset_count = i915_reset_count(&dev_priv->gpu_error);
- else
+ for_each_engine(engine, dev_priv, id)
+ args->reset_engine_count +=
+ i915_reset_engine_count(&dev_priv->gpu_error,
+ engine);
+ } else {
args->reset_count = 0;
+ args->reset_engine_count = 0;
+ }
args->batch_active = atomic_read(&ctx->guilty_count);
args->batch_pending = atomic_read(&ctx->active_count);
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 298b2e197744..0bc9e00e66ce 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1456,7 +1456,11 @@ struct drm_i915_reset_stats {
/* Number of batches lost pending for execution, for this context */
__u32 batch_pending;
- __u32 pad;
+ union {
+ __u32 pad;
+ /* Engine resets since boot/module reload, for all contexts */
+ __u32 reset_engine_count;
+ };
};
struct drm_i915_gem_userptr {
--
2.17.1
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[Intel-gfx] Gen8+ engine-reset
This is a rebased on the original patch series from Michel Thierry that can be found here: https://patchwork.freedesktop.org/series/21868 Note that this series is only limited to the GPU Watchdog timeout for execlists as it leaves out support for GuC based submission for a later time. The series was also successfully tested from userspace through the the Intel i965 media driver that is readily found on some Linux based OS including Ubuntu OS and as well as Chromium OS. The changes on the i965 media userspace driver are currently under review at https://github.com/intel/intel-vaapi-driver/pull/429/files The testbed used on this series included a SKL-based NUC with 2 BSD rings as well as a KBL-based Chromebook with a 1 BSD ring. Carlos Santa (1): drm/i915: Only process VCS2 only when supported Michel Thierry (7): drm/i915: Add engine reset count in get-reset-stats ioctl drm/i915: Watchdog timeout: IRQ handler for gen8+ drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+ drm/i915: Watchdog timeout: DRM kernel interface to set the timeout drm/i915: Watchdog timeout: Include threshold value in error state drm/i915/watchdog: move emit_stop_watchdog until the very end of the ring commands drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset? drivers/gpu/drm/i915/i915_drv.h | 56 +++ drivers/gpu/drm/i915/i915_gem_context.c | 103 +++- drivers/gpu/drm/i915/i915_gem_context.h | 4 + drivers/gpu/drm/i915/i915_gpu_error.c | 12 +- drivers/gpu/drm/i915/i915_gpu_error.h | 5 + drivers/gpu/drm/i915/i915_irq.c | 17 +- drivers/gpu/drm/i915/i915_reg.h | 6 + drivers/gpu/drm/i915/intel_hangcheck.c | 20 ++- drivers/gpu/drm/i915/intel_lrc.c| 208 +++- drivers/gpu/drm/i915/intel_ringbuffer.h | 10 ++ include/uapi/drm/i915_drm.h | 7 +- 11 files changed, 428 insertions(+), 20 deletions(-) -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout
From: Michel Thierry
Final enablement patch for GPU hang detection using watchdog timeout.
Using the gem_context_setparam ioctl, users can specify the desired
timeout value in microseconds, and the driver will do the conversion to
'timestamps'.
The recommended default watchdog threshold for video engines is 6 us,
since this has been _empirically determined_ to be a good compromise for
low-latency requirements and low rate of false positives. The default
register value is ~106000us and the theoretical max value (all 1s) is
353 seconds.
Note, UABI engine ids and i915 engine ids are different, and this patch
uses the i915 ones. Some kind of mapping table [1] is required if we
decide to use the UABI engine ids.
[1]
http://patchwork.freedesktop.org/patch/msgid/20170329135831.30254-2-ch...@chris-wilson.co.uk
v2: Fixed get api to return values in microseconds. Threshold updated to
be per context engine. Check for u32 overflow. Capture ctx threshold
value in error state.
v3: Add a way to get array size, short-cut to disable all thresholds,
return EFAULT / EINVAL as needed. Move the capture of the threshold
value in the error state into a new patch. BXT has a different
timestamp base (because why not?).
v4: Checking if watchdog is available should be the first thing to
do, instead of giving false hopes to abi users; remove unnecessary & in
set_watchdog; ignore args->size in getparam.
v5: GEN9-LP platforms have a different crystal clock frequency, use the
right timestamp base for them (magic 8-ball predicts this will change
again later on, so future-proof it). (Daniele)
v6: Rebase, no more mutex BLK in getparam_ioctl.
v7: use to_intel_context instead of ctx->engine.
v8: Rebase, remove extra mutex from i915_gem_context_set_watchdog (Tvrtko),
Update UAPI to use engine class while keeping thresholds per
engine class (Michel).
Cc: Antonio Argenziano
Cc: Tvrtko Ursulin
Cc: Daniele Ceraolo Spurio
Signed-off-by: Michel Thierry
Signed-off-by: Carlos Santa
---
drivers/gpu/drm/i915/i915_drv.h | 56 +++
drivers/gpu/drm/i915/i915_gem_context.c | 91 +
drivers/gpu/drm/i915/intel_lrc.c| 5 +-
include/uapi/drm/i915_drm.h | 1 +
4 files changed, 151 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7fa2a405c5fe..96d59c22e2ba 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1552,6 +1552,9 @@ struct drm_i915_private {
struct drm_i915_fence_reg fence_regs[I915_MAX_NUM_FENCES]; /* assume
965 */
int num_fence_regs; /* 8 on pre-965, 16 otherwise */
+ /* Command stream timestamp base - helps define watchdog threshold */
+ u32 cs_timestamp_base;
+
unsigned int fsb_freq, mem_freq, is_ddr3;
unsigned int skl_preferred_vco_freq;
unsigned int max_cdclk_freq;
@@ -3117,6 +3120,59 @@ i915_gem_context_lookup(struct drm_i915_file_private
*file_priv, u32 id)
return ctx;
}
+/*
+ * BDW, CHV & SKL+ Timestamp timer resolution = 0.080 uSec,
+ * or 1250 counts per second, or ~12 counts per microsecond.
+ *
+ * But BXT/GLK Timestamp timer resolution is different, 0.052 uSec,
+ * or 1920 counts per second, or ~19 counts per microsecond.
+ *
+ * Future-proofing, some day it won't be as simple as just GEN & IS_LP.
+ */
+#define GEN8_TIMESTAMP_CNTS_PER_USEC 12
+#define GEN9_LP_TIMESTAMP_CNTS_PER_USEC 19
+static inline u32 cs_timestamp_in_us(struct drm_i915_private *dev_priv)
+{
+ u32 cs_timestamp_base = dev_priv->cs_timestamp_base;
+
+ if (cs_timestamp_base)
+ return cs_timestamp_base;
+
+ switch (INTEL_GEN(dev_priv)) {
+ default:
+ MISSING_CASE(INTEL_GEN(dev_priv));
+ /* fall through */
+ case 9:
+ cs_timestamp_base = IS_GEN9_LP(dev_priv) ?
+ GEN9_LP_TIMESTAMP_CNTS_PER_USEC :
+ GEN8_TIMESTAMP_CNTS_PER_USEC;
+ break;
+ case 8:
+ cs_timestamp_base = GEN8_TIMESTAMP_CNTS_PER_USEC;
+ break;
+ }
+
+ dev_priv->cs_timestamp_base = cs_timestamp_base;
+ return cs_timestamp_base;
+}
+
+static inline u32
+watchdog_to_us(struct drm_i915_private *dev_priv, u32 value_in_clock_counts)
+{
+ return value_in_clock_counts / cs_timestamp_in_us(dev_priv);
+}
+
+static inline u32
+watchdog_to_clock_counts(struct drm_i915_private *dev_priv, u64 value_in_us)
+{
+ u64 threshold = value_in_us * cs_timestamp_in_us(dev_priv);
+
+ if (overflows_type(threshold, u32))
+ return -EINVAL;
+
+ return threshold;
+}
+
int i915_perf_open_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
int i915_perf_add_config_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i91
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fixup kerneldoc for intel_device_info_runtime_init
== Series Details == Series: drm/i915: Fixup kerneldoc for intel_device_info_runtime_init URL : https://patchwork.freedesktop.org/series/54767/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363 -> Patchwork_11192 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/54767/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_11192 that come from known issues: ### IGT changes ### Possible fixes * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: DMESG-WARN [fdo#102614] -> PASS * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1 [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 Participating hosts (47 -> 42) -- Additional (3): fi-byt-n2820 fi-apl-guc fi-pnv-d510 Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u fi-skl-6600u Build changes - * Linux: CI_DRM_5363 -> Patchwork_11192 CI_DRM_5363: f141806c68e4cbd56e3a5a582eb1a6f5b7edfc84 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11192: fbb82db6246716efbf0e4e410529a6a8330b4d43 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == fbb82db62467 drm/i915: Fixup kerneldoc for intel_device_info_runtime_init == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11192/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for MST refcounting/atomic helpers cleanup (rev4)
== Series Details == Series: MST refcounting/atomic helpers cleanup (rev4) URL : https://patchwork.freedesktop.org/series/54030/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363_full -> Patchwork_11191_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11191_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11191_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11191_full: ### IGT changes ### Warnings * igt@kms_cursor_legacy@cursora-vs-flipa-atomic: - shard-apl: PASS -> SKIP +13 Known issues Here are the changes found in Patchwork_11191_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#109225] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-hang-newfb-render-b: - shard-snb: PASS -> INCOMPLETE [fdo#105411] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_chv_cursor_fail@pipe-a-64x64-top-edge: - shard-apl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +62 * igt@kms_color@pipe-b-ctm-0-25: - shard-skl: PASS -> FAIL [fdo#108682] * igt@kms_color@pipe-b-legacy-gamma: - shard-apl: PASS -> FAIL [fdo#104782] * igt@kms_cursor_crc@cursor-128x128-dpms: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-glk: PASS -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +3 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-untiled: - shard-iclb: PASS -> WARN [fdo#108336] +3 * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-glk: PASS -> FAIL [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-glk: PASS -> FAIL [fdo#103167] +2 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +5 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt: - shard-iclb: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +10 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen: - shard-iclb: PASS -> FAIL [fdo#103167] +2 * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-glk: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-iclb: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: NOTRUN -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538] * igt@kms_sysfs_edid_timing: - shard-iclb: PASS -> FAIL [fdo#100047] - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@perf_pmu@event-wait-rcs0: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +21 * igt@perf_pmu@rc6-runtime-pm-long: - shard-iclb: PASS -> FAIL [fdo#105010] * igt@pm_rpm@gem-evict-pwrite: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@pm_rpm@modeset-non-lpsp-stress: - shard-skl: SKIP -> INCOMPLETE [fdo#107807] * igt@pm_rpm@system-suspend-execbuf: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] +1 * igt@pm_rps@waitboost: - shard-iclb: NOT
[Intel-gfx] [PATCH] drm/i915: Fixup kerneldoc for intel_device_info_runtime_init
CC [M] drivers/gpu/drm/i915/intel_device_info.o drivers/gpu/drm/i915/intel_device_info.c:727: warning: Function parameter or member 'dev_priv' not described in 'intel_device_info_runtime_init' drivers/gpu/drm/i915/intel_device_info.c:727: warning: Excess function parameter 'info' description in 'intel_device_info_runtime_init' Signed-off-by: Chris Wilson Cc: Jani Nikula Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_device_info.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index e0ce0c9791fc..855a5074ad77 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -709,7 +709,7 @@ static u32 read_timestamp_frequency(struct drm_i915_private *dev_priv) /** * intel_device_info_runtime_init - initialize runtime info - * @info: intel device info struct + * @dev_priv: the i915 device * * Determine various intel_device_info fields at runtime. * -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v7 3/4] drm/i915/icl: Define MOCS table for Icelake
On Fri, Dec 21, 2018 at 12:29:41PM +, Tvrtko Ursulin wrote:
>
> On 14/12/2018 18:20, Lucas De Marchi wrote:
> > From: Tomasz Lis
> >
> > The table has been unified across OSes to minimize virtualization overhead.
> >
> > The MOCS table is now published as part of bspec, and versioned. Entries
> > are supposed to never be modified, but new ones can be added. Adding
> > entries increases table version. The patch includes version 1 entries.
> >
> > Meaning of each entry is now explained in bspec, and user mode clients
> > are expected to know what each entry means. The 3 entries used for previous
> > platforms are still compatible with their legacy definitions, but that is
> > not guaranteed to be true for future platforms.
> >
> > v2: Fixed SCC values, improved commit comment (Daniele)
> > v3: Improved MOCS table comment (Daniele)
> > v4: Moved new entries below gen9 ones. Put common entries into
> > definition to be used in multiple arrays. (Lucas)
> > v5: Made defines for or-ing flags. Renamed macros from MOCS_TABLE
> > to MOCS_ENTRIES. Switched LE_CoS to upper case. (Joonas)
> > v6: Removed definitions of reserved entries. (Michal)
> > Increased limit of entries sent to the hardware on gen11+.
> > v7: Simplify table as done for previou gens (Lucas)
> >
> > BSpec: 34007
> > BSpec: 560
> >
> > Signed-off-by: Tomasz Lis
> > Reviewed-by: Daniele Ceraolo Spurio
> > Reviewed-by: Lucas De Marchi
> > Signed-off-by: Lucas De Marchi
> > ---
> > drivers/gpu/drm/i915/intel_mocs.c | 187 ++
> > 1 file changed, 162 insertions(+), 25 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_mocs.c
> > b/drivers/gpu/drm/i915/intel_mocs.c
> > index 577633cefb8a..dfc4edea020f 100644
> > --- a/drivers/gpu/drm/i915/intel_mocs.c
> > +++ b/drivers/gpu/drm/i915/intel_mocs.c
> > @@ -44,6 +44,8 @@ struct drm_i915_mocs_table {
> > #define LE_SCC(value) ((value) << 8)
> > #define LE_PFM(value) ((value) << 11)
> > #define LE_SCF(value) ((value) << 14)
> > +#define LE_COS(value) ((value) << 15)
> > +#define LE_SSE(value) ((value) << 17)
> > /* Defines for the tables (LNCFMOCS0 - LNCFMOCS31) - two entries per word
> > */
> > #define L3_ESC(value) ((value) << 0)
> > @@ -52,6 +54,10 @@ struct drm_i915_mocs_table {
> > /* Helper defines */
> > #define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are
> > reserved. */
> > +#define GEN11_NUM_MOCS_ENTRIES 64 /* 63-64 are reserved, but
> > configured. */
> > +
> > +#define NUM_MOCS_ENTRIES(i915) \
> > + (INTEL_GEN(i915) < 11 ? GEN9_NUM_MOCS_ENTRIES : GEN11_NUM_MOCS_ENTRIES)
> > /* (e)LLC caching options */
> > #define LE_0_PAGETABLE_LE_CACHEABILITY(0)
> > @@ -80,21 +86,21 @@ struct drm_i915_mocs_table {
> >* LNCFCMOCS0 - LNCFCMOCS32 registers.
> >*
> >* These tables are intended to be kept reasonably consistent across
> > - * platforms. However some of the fields are not applicable to all of
> > - * them.
> > + * HW platforms, and for ICL+, be identical across OSes. To achieve
> > + * that, for Icelake and above, list of entries is published as part
> > + * of bspec.
> >*
> >* Entries not part of the following tables are undefined as far as
> > - * userspace is concerned and shouldn't be relied upon. For the time
> > - * being they will be implicitly initialized to the strictest caching
> > - * configuration (uncached) to guarantee forwards compatibility with
> > - * userspace programs written against more recent kernels providing
> > - * additional MOCS entries.
> > + * userspace is concerned and shouldn't be relied upon.
> > + *
> > + * The last two entries are reserved by the hardware. For ICL+ they
> > + * should be initialized according to bspec and never used, for older
> > + * platforms they should never be written to.
> >*
> > - * NOTE: These tables MUST start with being uncached and the length
> > - * MUST be less than 63 as the last two registers are reserved
> > - * by the hardware. These tables are part of the kernel ABI and
> > - * may only be updated incrementally by adding entries at the
> > - * end.
> > + * NOTE: These tables are part of bspec and defined as part of hardware
> > + * interface for ICL+. For older platforms, they are part of kernel
> > + * ABI. It is expected that existing entries will remain constant
> > + * and the tables will only be updated by adding new entries.
> >*/
> > #define GEN9_MOCS_ENTRIES \
> > @@ -132,6 +138,132 @@ static const struct drm_i915_mocs_entry
> > broxton_mocs_table[] = {
> > },
> > };
> > +#define GEN11_MOCS_ENTRIES \
> > + [0] = { \
> > + /* Base - Uncached (Deprecated) */ \
> > + .control_value = LE_1_UC | LE_TC_1_LLC, \
> > + .l3cc_value = L3_1_UC \
> > + }, \
> > + [1] = { \
> > + /* Base - L3 + LeCC:PAT (Deprecated) *
[Intel-gfx] ✓ Fi.CI.BAT: success for MST refcounting/atomic helpers cleanup (rev4)
== Series Details == Series: MST refcounting/atomic helpers cleanup (rev4) URL : https://patchwork.freedesktop.org/series/54030/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363 -> Patchwork_11191 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/54030/revisions/4/mbox/ Known issues Here are the changes found in Patchwork_11191 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-no-display: - fi-byt-clapper: PASS -> WARN [fdo#108688] * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362] Possible fixes * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: FAIL [fdo#108767] -> PASS * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: DMESG-WARN [fdo#102614] -> PASS * igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#108688]: https://bugs.freedesktop.org/show_bug.cgi?id=108688 [fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767 Participating hosts (47 -> 38) -- Additional (3): fi-byt-n2820 fi-apl-guc fi-pnv-d510 Missing(12): fi-kbl-soraka fi-kbl-7567u fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 fi-kbl-7560u fi-skl-6700hq fi-skl-6600u fi-snb-2600 Build changes - * Linux: CI_DRM_5363 -> Patchwork_11191 CI_DRM_5363: f141806c68e4cbd56e3a5a582eb1a6f5b7edfc84 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11191: b2223e97312f7dc451725c1cefbea5785e09078a @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == b2223e97312f drm/nouveau: Use atomic VCPI helpers for MST 7e8e5b7e31ad drm/dp_mst: Check payload count in drm_dp_mst_atomic_check() 31f003c7f24b drm/dp_mst: Start tracking per-port VCPI allocations 42197be73f27 drm/dp_mst: Add some atomic state iterator macros b6f6bbe3d1bc drm/nouveau: Grab payload lock in nv50_msto_payload() 81af58e1850c drm/nouveau: Stop unsetting mstc->port, use malloc refs 0d5dc5d62fd6 drm/nouveau: Keep malloc references to MST ports 03cee9c12c05 drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup() 90a9631dfbe1 drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector() 5dbb33b4a196 drm/amdgpu/display: Keep malloc ref to MST port c9b9ef293e41 drm/i915: Keep malloc references to MST ports 922a91cd84d2 drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs 42483b36cce0 drm/dp_mst: Stop releasing VCPI when removing ports from topology a20c087d93b3 drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref fails 395ddef17891 drm/dp_mst: Introduce new refcounting scheme for mstbs and ports 2a2093f380b0 drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11191/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for MST refcounting/atomic helpers cleanup (rev4)
== Series Details == Series: MST refcounting/atomic helpers cleanup (rev4) URL : https://patchwork.freedesktop.org/series/54030/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends Okay! Commit: drm/dp_mst: Introduce new refcounting scheme for mstbs and ports Okay! Commit: drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref fails Okay! Commit: drm/dp_mst: Stop releasing VCPI when removing ports from topology Okay! Commit: drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs Okay! Commit: drm/i915: Keep malloc references to MST ports Okay! Commit: drm/amdgpu/display: Keep malloc ref to MST port Okay! Commit: drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector() Okay! Commit: drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup() Okay! Commit: drm/nouveau: Keep malloc references to MST ports Okay! Commit: drm/nouveau: Stop unsetting mstc->port, use malloc refs Okay! Commit: drm/nouveau: Grab payload lock in nv50_msto_payload() Okay! Commit: drm/dp_mst: Add some atomic state iterator macros Okay! Commit: drm/dp_mst: Start tracking per-port VCPI allocations +./include/linux/slab.h:332:43: warning: dubious: x & !y Commit: drm/dp_mst: Check payload count in drm_dp_mst_atomic_check() Okay! Commit: drm/nouveau: Use atomic VCPI helpers for MST Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MST refcounting/atomic helpers cleanup (rev4)
== Series Details ==
Series: MST refcounting/atomic helpers cleanup (rev4)
URL : https://patchwork.freedesktop.org/series/54030/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2a2093f380b0 drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and
friends
-:84: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#84: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:990:
+ rmstb = drm_dp_mst_topology_get_mstb_validated_locked(
-:102: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#102: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:1006:
+ rmstb = drm_dp_mst_topology_get_mstb_validated_locked(
-:150: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#150: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:1373:
+ mstb_child = drm_dp_mst_topology_get_mstb_validated(
total: 0 errors, 0 warnings, 3 checks, 399 lines checked
395ddef17891 drm/dp_mst: Introduce new refcounting scheme for mstbs and ports
-:27: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#27:
commit 263efde31f97 ("drm/dp/mst: Get validated port ref in
drm_dp_update_payload_part1()")
-:51: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 9765635b3075 ("Revert
"drm/dp_mst: Skip validating ports during destruction, just ref"")'
#51:
commit 9765635b3075 ("Revert "drm/dp_mst: Skip validating ports during
destruction, just ref"")
-:136: WARNING:BAD_SIGN_OFF: Duplicate signature
#136:
Signed-off-by: Lyude Paul
-:139: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#139:
new file mode 100644
-:844: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#844: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:1329:
+ mport = drm_dp_mst_topology_get_port_validated_locked(
-:858: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#858: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:1346:
+ rport = drm_dp_mst_topology_get_port_validated_locked(
total: 1 errors, 3 warnings, 2 checks, 975 lines checked
a20c087d93b3 drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref
fails
42483b36cce0 drm/dp_mst: Stop releasing VCPI when removing ports from topology
922a91cd84d2 drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs
-:97: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#97: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:2276:
+ port = drm_dp_mst_topology_get_port_validated(
total: 0 errors, 0 warnings, 1 checks, 124 lines checked
c9b9ef293e41 drm/i915: Keep malloc references to MST ports
5dbb33b4a196 drm/amdgpu/display: Keep malloc ref to MST port
90a9631dfbe1 drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector()
03cee9c12c05 drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup()
0d5dc5d62fd6 drm/nouveau: Keep malloc references to MST ports
81af58e1850c drm/nouveau: Stop unsetting mstc->port, use malloc refs
b6f6bbe3d1bc drm/nouveau: Grab payload lock in nv50_msto_payload()
42197be73f27 drm/dp_mst: Add some atomic state iterator macros
-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible
side-effects?
#110: FILE: include/drm/drm_dp_mst_helper.h:710:
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state,
__i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), &(new_state), (__i)))
-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible
side-effects?
#110: FILE: include/drm/drm_dp_mst_helper.h:710:
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state,
__i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), &(new_state), (__i)))
-:112: WARNING:LONG_LINE: line over 100 characters
#112: FILE: include/drm/drm_dp_mst_helper.h:712:
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), &(new_state), (__i)))
-:127: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible
side-effects?
#127: FILE: include/drm/drm_dp_mst_helper.h:727:
+#define for_each_old_mst_mgr_in_state(__state, mgr, old_state, __i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), NULL, (__i)))
-:127: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible
side-effects?
#127: FILE: include/drm/drm_dp_mst_helper.h:727:
+#define for_each_old_mst_mgr_in_state(__state, mgr, old_state, __i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), NULL, (__i))
[Intel-gfx] [PATCH v4 14/16] drm/dp_mst: Start tracking per-port VCPI allocations
There has been a TODO waiting for quite a long time in drm_dp_mst_topology.c: /* We cannot rely on port->vcpi.num_slots to update * topology_state->avail_slots as the port may not exist if the parent * branch device was unplugged. This should be fixed by tracking * per-port slot allocation in drm_dp_mst_topology_state instead of * depending on the caller to tell us how many slots to release. */ That's not the only reason we should fix this: forcing the driver to track the VCPI allocations throughout a state's atomic check is error prone, because it means that extra care has to be taken with the order that drm_dp_atomic_find_vcpi_slots() and drm_dp_atomic_release_vcpi_slots() are called in in order to ensure idempotency. Currently the only driver actually using these helpers, i915, doesn't even do this correctly: multiple ->best_encoder() checks with i915's current implementation would not be idempotent and would over-allocate VCPI slots, something I learned trying to implement fallback retraining in MST. So: simplify this whole mess, and teach drm_dp_atomic_find_vcpi_slots() and drm_dp_atomic_release_vcpi_slots() to track the VCPI allocations for each port. This allows us to ensure idempotency without having to rely on the driver as much. Additionally: the driver doesn't need to do any kind of VCPI slot tracking anymore if it doesn't need it for it's own internal state. Additionally; this adds a new drm_dp_mst_atomic_check() helper which must be used by atomic drivers to perform validity checks for the new VCPI allocations incurred by a state. Also: update the documentation and make it more obvious that these /must/ be called by /all/ atomic drivers supporting MST. Changes since v9: * Add some missing changes that were requested by danvet that I forgot about after I redid all of the kref stuff: * Remove unnecessary state changes in intel_dp_mst_atomic_check * Cleanup atomic check logic for VCPI allocations - all we need to check in compute_config is whether or not this state disables a CRTC, then free VCPI based off that Changes since v8: * Fix compile errors, whoops! Changes since v7: - Don't check for mixed stale/valid VCPI allocations, just rely on connector registration to stop such erroneous modesets Changes since v6: - Keep a kref to all of the ports we have allocations on. This required a good bit of changing to when we call drm_dp_find_vcpi_slots(), mainly that we need to ensure that we only redo VCPI allocations on actual mode or CRTC changes, not crtc_state->active changes. Additionally, we no longer take the registration of the DRM connector for each port into account because so long as we have a kref to the port in the new or previous atomic state, the connector will stay registered. - Use the small changes to drm_dp_put_port() to add even more error checking to make misusage of the helpers more obvious. I added this after having to chase down various use-after-free conditions that started popping up from the new helpers so no one else has to troubleshoot that. - Move some accidental DRM_DEBUG_KMS() calls to DRM_DEBUG_ATOMIC() - Update documentation again, note that find/release() should both not be called on the same port in a single atomic check phase (but multiple calls to one or the other is OK) Changes since v4: - Don't skip the atomic checks for VCPI allocations if no new VCPI allocations happen in a state. This makes the next change I'm about to list here a lot easier to implement. - Don't ignore VCPI allocations on destroyed ports, instead ensure that when ports are destroyed and still have VCPI allocations in the topology state, the only state changes allowed are releasing said ports' VCPI. This prevents a state with a mix of VCPI allocations from destroyed ports, and allocations from valid ports. Changes since v3: - Don't release VCPI allocations in the topology state immediately in drm_dp_atomic_release_vcpi_slots(), instead mark them as 0 and skip over them in drm_dp_mst_duplicate_state(). This makes it so drm_dp_atomic_release_vcpi_slots() is still idempotent while also throwing warnings if the driver messes up it's book keeping and tries to release VCPI slots on a port that doesn't have any pre-existing VCPI allocation - danvet - Change mst_state/state in some debugging messages to "mst state" Changes since v2: - Use kmemdup() for duplicating MST state - danvet - Move port validation out of duplicate state callback - danvet - Handle looping through MST topology states in drm_dp_mst_atomic_check() so the driver doesn't have to do it - Fix documentation in drm_dp_atomic_find_vcpi_slots() - Move the atomic check for each individual topology state into it's own function, reduces indenting - Don't consider "stale" MST ports when calculating the bandwidth requirements. This is needed because originally we rel
[Intel-gfx] [PATCH v4 12/16] drm/nouveau: Grab payload lock in nv50_msto_payload()
Going through the currently programmed payloads isn't safe without
holding mgr->payload_lock, so actually do that and warn if anyone tries
calling nv50_msto_payload() in the future without grabbing the right
locks.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 157d208d37b5..67f7bf97e5d9 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -680,6 +680,8 @@ nv50_msto_payload(struct nv50_msto *msto)
struct nv50_mstm *mstm = mstc->mstm;
int vcpi = mstc->port->vcpi.vcpi, i;
+ WARN_ON(!mutex_is_locked(&mstm->mgr.payload_lock));
+
NV_ATOMIC(drm, "%s: vcpi %d\n", msto->encoder.name, vcpi);
for (i = 0; i < mstm->mgr.max_payloads; i++) {
struct drm_dp_payload *payload = &mstm->mgr.payloads[i];
@@ -733,6 +735,8 @@ nv50_msto_prepare(struct nv50_msto *msto)
(0x0100 << msto->head->base.index),
};
+ mutex_lock(&mstm->mgr.payload_lock);
+
NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
if (mstc->port->vcpi.vcpi > 0) {
struct drm_dp_payload *payload = nv50_msto_payload(msto);
@@ -748,7 +752,9 @@ nv50_msto_prepare(struct nv50_msto *msto)
msto->encoder.name, msto->head->base.base.name,
args.vcpi.start_slot, args.vcpi.num_slots,
args.vcpi.pbn, args.vcpi.aligned_pbn);
+
nvif_mthd(&drm->display->disp.object, 0, &args, sizeof(args));
+ mutex_unlock(&mstm->mgr.payload_lock);
}
static int
--
2.20.1
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 16/16] drm/nouveau: Use atomic VCPI helpers for MST
Currently, nouveau uses the yolo method of setting up MST displays: it
uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the
display configuration. These helpers don't take care to make sure they
take a reference to the mstb port that they're checking, and
additionally don't actually check whether or not the topology still has
enough bandwidth to provide the VCPI tokens required.
So, drop usage of the old helpers and move entirely over to the atomic
helpers.
Changes since v6:
* Cleanup atomic check logic and remove a bunch of unneeded checks -
danvet
Changes since v5:
* Update nv50_msto_atomic_check() and nv50_mstc_atomic_check() to the
new requirements for drm_dp_atomic_find_vcpi_slots() and
drm_dp_atomic_release_vcpi_slots()
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 54 ++---
1 file changed, 48 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 67f7bf97e5d9..53d6c8df8f68 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -762,16 +762,23 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
- struct nv50_mstc *mstc = nv50_mstc(conn_state->connector);
+ struct drm_atomic_state *state = crtc_state->state;
+ struct drm_connector *connector = conn_state->connector;
+ struct nv50_mstc *mstc = nv50_mstc(connector);
struct nv50_mstm *mstm = mstc->mstm;
- int bpp = conn_state->connector->display_info.bpc * 3;
+ int bpp = connector->display_info.bpc * 3;
int slots;
- mstc->pbn = drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock, bpp);
+ mstc->pbn = drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock,
+bpp);
- slots = drm_dp_find_vcpi_slots(&mstm->mgr, mstc->pbn);
- if (slots < 0)
- return slots;
+ if (drm_atomic_crtc_needs_modeset(crtc_state) &&
+ !drm_connector_is_unregistered(connector)) {
+ slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr,
+ mstc->port, mstc->pbn);
+ if (slots < 0)
+ return slots;
+ }
return nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
mstc->native);
@@ -934,12 +941,43 @@ nv50_mstc_get_modes(struct drm_connector *connector)
return ret;
}
+static int
+nv50_mstc_atomic_check(struct drm_connector *connector,
+ struct drm_connector_state *new_conn_state)
+{
+ struct drm_atomic_state *state = new_conn_state->state;
+ struct nv50_mstc *mstc = nv50_mstc(connector);
+ struct drm_dp_mst_topology_mgr *mgr = &mstc->mstm->mgr;
+ struct drm_connector_state *old_conn_state =
+ drm_atomic_get_old_connector_state(state, connector);
+ struct drm_crtc_state *crtc_state;
+ struct drm_crtc *new_crtc = new_conn_state->crtc;
+
+ if (!old_conn_state->crtc)
+ return 0;
+
+ /* We only want to free VCPI if this state disables the CRTC on this
+* connector
+*/
+ if (new_crtc) {
+ crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc);
+
+ if (!crtc_state ||
+ !drm_atomic_crtc_needs_modeset(crtc_state) ||
+ crtc_state->enable)
+ return 0;
+ }
+
+ return drm_dp_atomic_release_vcpi_slots(state, mgr, mstc->port);
+}
+
static const struct drm_connector_helper_funcs
nv50_mstc_help = {
.get_modes = nv50_mstc_get_modes,
.mode_valid = nv50_mstc_mode_valid,
.best_encoder = nv50_mstc_best_encoder,
.atomic_best_encoder = nv50_mstc_atomic_best_encoder,
+ .atomic_check = nv50_mstc_atomic_check,
};
static enum drm_connector_status
@@ -2121,6 +2159,10 @@ nv50_disp_atomic_check(struct drm_device *dev, struct
drm_atomic_state *state)
return ret;
}
+ ret = drm_dp_mst_atomic_check(state);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.20.1
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 13/16] drm/dp_mst: Add some atomic state iterator macros
Changes since v6:
- Move EXPORT_SYMBOL() for drm_dp_mst_topology_state_funcs to this
commit
- Document __drm_dp_mst_state_iter_get() and note that it shouldn't be
called directly
Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 5 +-
include/drm/drm_dp_mst_helper.h | 96 +++
2 files changed, 99 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 769e2c0419c2..f79962759bc4 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3527,10 +3527,11 @@ static void drm_dp_mst_destroy_state(struct
drm_private_obj *obj,
kfree(mst_state);
}
-static const struct drm_private_state_funcs mst_state_funcs = {
+const struct drm_private_state_funcs drm_dp_mst_topology_state_funcs = {
.atomic_duplicate_state = drm_dp_mst_duplicate_state,
.atomic_destroy_state = drm_dp_mst_destroy_state,
};
+EXPORT_SYMBOL(drm_dp_mst_topology_state_funcs);
/**
* drm_atomic_get_mst_topology_state: get MST topology state
@@ -3614,7 +3615,7 @@ int drm_dp_mst_topology_mgr_init(struct
drm_dp_mst_topology_mgr *mgr,
drm_atomic_private_obj_init(dev, &mgr->base,
&mst_state->base,
- &mst_state_funcs);
+ &drm_dp_mst_topology_state_funcs);
return 0;
}
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 8eca5f29242c..581163c8d7d7 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -650,4 +650,100 @@ int drm_dp_send_power_updown_phy(struct
drm_dp_mst_topology_mgr *mgr,
void drm_dp_mst_get_port_malloc(struct drm_dp_mst_port *port);
void drm_dp_mst_put_port_malloc(struct drm_dp_mst_port *port);
+extern const struct drm_private_state_funcs drm_dp_mst_topology_state_funcs;
+
+/**
+ * __drm_dp_mst_state_iter_get - private atomic state iterator function for
+ * macro-internal use
+ * @state: &struct drm_atomic_state pointer
+ * @mgr: pointer to the &struct drm_dp_mst_topology_mgr iteration cursor
+ * @old_state: optional pointer to the old &struct drm_dp_mst_topology_state
+ * iteration cursor
+ * @new_state: optional pointer to the new &struct drm_dp_mst_topology_state
+ * iteration cursor
+ * @i: int iteration cursor, for macro-internal use
+ *
+ * Used by for_each_oldnew_mst_mgr_in_state(),
+ * for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't
+ * call this directly.
+ *
+ * Returns:
+ * True if the current &struct drm_private_obj is a &struct
+ * drm_dp_mst_topology_mgr, false otherwise.
+ */
+static inline bool
+__drm_dp_mst_state_iter_get(struct drm_atomic_state *state,
+ struct drm_dp_mst_topology_mgr **mgr,
+ struct drm_dp_mst_topology_state **old_state,
+ struct drm_dp_mst_topology_state **new_state,
+ int i)
+{
+ struct __drm_private_objs_state *objs_state = &state->private_objs[i];
+
+ if (objs_state->ptr->funcs != &drm_dp_mst_topology_state_funcs)
+ return false;
+
+ *mgr = to_dp_mst_topology_mgr(objs_state->ptr);
+ if (old_state)
+ *old_state = to_dp_mst_topology_state(objs_state->old_state);
+ if (new_state)
+ *new_state = to_dp_mst_topology_state(objs_state->new_state);
+
+ return true;
+}
+
+/**
+ * for_each_oldnew_mst_mgr_in_state - iterate over all DP MST topology
+ * managers in an atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @mgr: &struct drm_dp_mst_topology_mgr iteration cursor
+ * @old_state: &struct drm_dp_mst_topology_state iteration cursor for the old
+ * state
+ * @new_state: &struct drm_dp_mst_topology_state iteration cursor for the new
+ * state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all DRM DP MST topology managers in an atomic update,
+ * tracking both old and new state. This is useful in places where the state
+ * delta needs to be considered, for example in atomic check functions.
+ */
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state,
__i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), &(new_state), (__i)))
+
+/**
+ * for_each_old_mst_mgr_in_state - iterate over all DP MST topology managers
+ * in an atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @mgr: &struct drm_dp_mst_topology_mgr iteration cursor
+ * @old_state: &struct drm_dp_mst_topology_state iteration cursor for the old
+ * state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all DRM DP MST topology managers in
[Intel-gfx] [PATCH v4 15/16] drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()
It occurred to me that we never actually check this! So let's start
doing that.
Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index c33c4a3aec34..fc9bcbb55417 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3647,7 +3647,7 @@ drm_dp_mst_atomic_check_topology_state(struct
drm_dp_mst_topology_mgr *mgr,
struct drm_dp_mst_topology_state
*mst_state)
{
struct drm_dp_vcpi_allocation *vcpi;
- int avail_slots = 63;
+ int avail_slots = 63, payload_count = 0;
list_for_each_entry(vcpi, &mst_state->vcpis, next) {
/* Releasing VCPI is always OK-even if the port is gone */
@@ -3667,6 +3667,12 @@ drm_dp_mst_atomic_check_topology_state(struct
drm_dp_mst_topology_mgr *mgr,
avail_slots + vcpi->vcpi);
return -ENOSPC;
}
+
+ if (++payload_count > mgr->max_payloads) {
+ DRM_DEBUG_ATOMIC("[MST MGR:%p] state %p has too many
payloads (max=%d)\n",
+mgr, mst_state, mgr->max_payloads);
+ return -EINVAL;
+ }
}
DRM_DEBUG_ATOMIC("[MST MGR:%p] mst state %p VCPI avail=%d used=%d\n",
mgr, mst_state, avail_slots,
--
2.20.1
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[Intel-gfx] [PATCH v4 05/16] drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs
Up until now, freeing payloads on remote MST hubs that just had ports
removed has almost never worked because we've been relying on port
validation in order to stop us from accessing ports that have already
been freed from memory, but ports which need their payloads released due
to being removed will never be a valid part of the topology after
they've been removed.
Since we've introduced malloc refs, we can replace all of the validation
logic in payload helpers which are used for deallocation with some
well-placed malloc krefs. This ensures that regardless of whether or not
the ports are still valid and in the topology, any port which has an
allocated payload will remain allocated in memory until it's payloads
have been removed - finally allowing us to actually release said
payloads correctly.
Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 54 +++
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index f10a7edb401e..769e2c0419c2 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2102,10 +2102,6 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
u8 sinks[DRM_DP_MAX_SDP_STREAMS];
int i;
- port = drm_dp_mst_topology_get_port_validated(mgr, port);
- if (!port)
- return -EINVAL;
-
port_num = port->port_num;
mstb = drm_dp_mst_topology_get_mstb_validated(mgr, port->parent);
if (!mstb) {
@@ -2113,10 +2109,8 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
port->parent,
&port_num);
- if (!mstb) {
- drm_dp_mst_topology_put_port(port);
+ if (!mstb)
return -EINVAL;
- }
}
txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
@@ -2153,7 +2147,6 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
kfree(txmsg);
fail_put:
drm_dp_mst_topology_put_mstb(mstb);
- drm_dp_mst_topology_put_port(port);
return ret;
}
@@ -2258,15 +2251,16 @@ static int drm_dp_destroy_payload_step2(struct
drm_dp_mst_topology_mgr *mgr,
*/
int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr)
{
- int i, j;
- int cur_slots = 1;
struct drm_dp_payload req_payload;
struct drm_dp_mst_port *port;
+ int i, j;
+ int cur_slots = 1;
mutex_lock(&mgr->payload_lock);
for (i = 0; i < mgr->max_payloads; i++) {
struct drm_dp_vcpi *vcpi = mgr->proposed_vcpis[i];
struct drm_dp_payload *payload = &mgr->payloads[i];
+ bool put_port = false;
/* solve the current payloads - compare to the hw ones
- update the hw view */
@@ -2274,12 +2268,20 @@ int drm_dp_update_payload_part1(struct
drm_dp_mst_topology_mgr *mgr)
if (vcpi) {
port = container_of(vcpi, struct drm_dp_mst_port,
vcpi);
- port = drm_dp_mst_topology_get_port_validated(mgr,
- port);
- if (!port) {
- mutex_unlock(&mgr->payload_lock);
- return -EINVAL;
+
+ /* Validated ports don't matter if we're releasing
+* VCPI
+*/
+ if (vcpi->num_slots) {
+ port = drm_dp_mst_topology_get_port_validated(
+ mgr, port);
+ if (!port) {
+ mutex_unlock(&mgr->payload_lock);
+ return -EINVAL;
+ }
+ put_port = true;
}
+
req_payload.num_slots = vcpi->num_slots;
req_payload.vcpi = vcpi->vcpi;
} else {
@@ -2311,7 +2313,7 @@ int drm_dp_update_payload_part1(struct
drm_dp_mst_topology_mgr *mgr)
}
cur_slots += req_payload.num_slots;
- if (port)
+ if (put_port)
drm_dp_mst_topology_put_port(port);
}
@@ -3126,6 +3128,8 @@ bool drm_dp_mst_allocate_vcpi(struct
drm_dp_mst_topology_mgr *mgr,
DRM_DEBUG_KMS("initing vcpi for pbn=%d slots=%d\n",
pbn, port->vcpi.num_slots);
+ /* Keep port allocated until it's payload has been removed *
[Intel-gfx] [PATCH v4 09/16] drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup()
There is no need to look at the port's VCPI allocation before calling
drm_dp_mst_deallocate_vcpi(), as we already have msto->disabled to let
us avoid cleaning up an msto more then once. The DP MST core will never
call drm_dp_mst_deallocate_vcpi() on it's own, which is presumably what
these checks are meant to protect against.
More importantly though, we're about to stop clearing mstc->port in the
next commit, which means if we could potentially hit a use-after-free
error if we tried to check mstc->port->vcpi here. So to make life easier
for anyone who bisects this code in the future, use msto->disabled
instead to check whether or not we need to deallocate VCPI instead.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 641252208e67..0f7d72518604 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -704,14 +704,17 @@ nv50_msto_cleanup(struct nv50_msto *msto)
struct nv50_mstc *mstc = msto->mstc;
struct nv50_mstm *mstm = mstc->mstm;
+ if (!msto->disabled)
+ return;
+
NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);
- if (mstc->port && mstc->port->vcpi.vcpi > 0 && !nv50_msto_payload(msto))
+
+ if (mstc->port)
drm_dp_mst_deallocate_vcpi(&mstm->mgr, mstc->port);
- if (msto->disabled) {
- msto->mstc = NULL;
- msto->head = NULL;
- msto->disabled = false;
- }
+
+ msto->mstc = NULL;
+ msto->head = NULL;
+ msto->disabled = false;
}
static void
--
2.20.1
___
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[Intel-gfx] [PATCH v4 10/16] drm/nouveau: Keep malloc references to MST ports
Now that we finally have a sane way to keep port allocations around, use
it to fix the potential unchecked ->port accesses that nouveau makes by
making sure we keep the mst port allocated for as long as it's
drm_connector is accessible.
Additionally, now that we've guaranteed that mstc->port is allocated for
as long as we keep mstc around we can remove the connector registration
checks for codepaths which release payloads, allowing us to release
payloads on active topologies properly. These registration checks were
only required before in order to avoid situations where mstc->port could
technically be pointing at freed memory.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 0f7d72518604..982054bbcc8b 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -964,7 +964,11 @@ static void
nv50_mstc_destroy(struct drm_connector *connector)
{
struct nv50_mstc *mstc = nv50_mstc(connector);
+
drm_connector_cleanup(&mstc->connector);
+ if (mstc->port)
+ drm_dp_mst_put_port_malloc(mstc->port);
+
kfree(mstc);
}
@@ -1012,6 +1016,7 @@ nv50_mstc_new(struct nv50_mstm *mstm, struct
drm_dp_mst_port *port,
drm_object_attach_property(&mstc->connector.base,
dev->mode_config.path_property, 0);
drm_object_attach_property(&mstc->connector.base,
dev->mode_config.tile_property, 0);
drm_connector_set_path_property(&mstc->connector, path);
+ drm_dp_mst_get_port_malloc(port);
return 0;
}
@@ -1077,6 +1082,7 @@ nv50_mstm_destroy_connector(struct
drm_dp_mst_topology_mgr *mgr,
drm_fb_helper_remove_one_connector(&drm->fbcon->helper,
&mstc->connector);
drm_modeset_lock(&drm->dev->mode_config.connection_mutex, NULL);
+ drm_dp_mst_put_port_malloc(mstc->port);
mstc->port = NULL;
drm_modeset_unlock(&drm->dev->mode_config.connection_mutex);
--
2.20.1
___
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[Intel-gfx] [PATCH v4 07/16] drm/amdgpu/display: Keep malloc ref to MST port
Just like i915 and nouveau, it's a good idea for us to hold a malloc
reference to the port here so that we never pass a freed pointer to any
of the DP MST helper functions.
Also, we stop unsetting aconnector->port in
dm_dp_destroy_mst_connector(). There's literally no point to that
assignment that I can see anyway.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 5e7ca1f3a8d1..24632727e127 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -191,6 +191,7 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector)
drm_encoder_cleanup(&amdgpu_encoder->base);
kfree(amdgpu_encoder);
drm_connector_cleanup(connector);
+ drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
kfree(amdgpu_dm_connector);
}
@@ -363,7 +364,9 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
amdgpu_dm_connector_funcs_reset(connector);
DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
- aconnector, connector->base.id, aconnector->mst_port);
+aconnector, connector->base.id, aconnector->mst_port);
+
+ drm_dp_mst_get_port_malloc(port);
DRM_DEBUG_KMS(":%d\n", connector->base.id);
@@ -379,12 +382,12 @@ static void dm_dp_destroy_mst_connector(struct
drm_dp_mst_topology_mgr *mgr,
struct amdgpu_dm_connector *aconnector =
to_amdgpu_dm_connector(connector);
DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
- aconnector, connector->base.id,
aconnector->mst_port);
+aconnector, connector->base.id, aconnector->mst_port);
- aconnector->port = NULL;
if (aconnector->dc_sink) {
amdgpu_dm_update_freesync_caps(connector, NULL);
- dc_link_remove_remote_sink(aconnector->dc_link,
aconnector->dc_sink);
+ dc_link_remove_remote_sink(aconnector->dc_link,
+ aconnector->dc_sink);
dc_sink_release(aconnector->dc_sink);
aconnector->dc_sink = NULL;
}
--
2.20.1
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[Intel-gfx] [PATCH v4 11/16] drm/nouveau: Stop unsetting mstc->port, use malloc refs
Same as we did for i915, but for nouveau this time. Additionally, we
grab a malloc reference to the port that lasts for the entire lifetime
of nv50_mstc, which gives us the guarantee that mstc->port will always
point to valid memory for as long as the mstc stays around.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 18 +-
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 982054bbcc8b..157d208d37b5 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -709,8 +709,7 @@ nv50_msto_cleanup(struct nv50_msto *msto)
NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);
- if (mstc->port)
- drm_dp_mst_deallocate_vcpi(&mstm->mgr, mstc->port);
+ drm_dp_mst_deallocate_vcpi(&mstm->mgr, mstc->port);
msto->mstc = NULL;
msto->head = NULL;
@@ -735,7 +734,7 @@ nv50_msto_prepare(struct nv50_msto *msto)
};
NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
- if (mstc->port && mstc->port->vcpi.vcpi > 0) {
+ if (mstc->port->vcpi.vcpi > 0) {
struct drm_dp_payload *payload = nv50_msto_payload(msto);
if (payload) {
args.vcpi.start_slot = payload->start_slot;
@@ -832,8 +831,7 @@ nv50_msto_disable(struct drm_encoder *encoder)
struct nv50_mstc *mstc = msto->mstc;
struct nv50_mstm *mstm = mstc->mstm;
- if (mstc->port)
- drm_dp_mst_reset_vcpi_slots(&mstm->mgr, mstc->port);
+ drm_dp_mst_reset_vcpi_slots(&mstm->mgr, mstc->port);
mstm->outp->update(mstm->outp, msto->head->base.index, NULL, 0, 0);
mstm->modified = true;
@@ -945,7 +943,7 @@ nv50_mstc_detect(struct drm_connector *connector, bool
force)
enum drm_connector_status conn_status;
int ret;
- if (!mstc->port)
+ if (drm_connector_is_unregistered(connector))
return connector_status_disconnected;
ret = pm_runtime_get_sync(connector->dev->dev);
@@ -966,8 +964,7 @@ nv50_mstc_destroy(struct drm_connector *connector)
struct nv50_mstc *mstc = nv50_mstc(connector);
drm_connector_cleanup(&mstc->connector);
- if (mstc->port)
- drm_dp_mst_put_port_malloc(mstc->port);
+ drm_dp_mst_put_port_malloc(mstc->port);
kfree(mstc);
}
@@ -1081,11 +1078,6 @@ nv50_mstm_destroy_connector(struct
drm_dp_mst_topology_mgr *mgr,
drm_fb_helper_remove_one_connector(&drm->fbcon->helper,
&mstc->connector);
- drm_modeset_lock(&drm->dev->mode_config.connection_mutex, NULL);
- drm_dp_mst_put_port_malloc(mstc->port);
- mstc->port = NULL;
- drm_modeset_unlock(&drm->dev->mode_config.connection_mutex);
-
drm_connector_put(&mstc->connector);
}
--
2.20.1
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[Intel-gfx] [PATCH v4 08/16] drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector()
Trying to destroy the connector using mstc->connector.funcs->destroy()
if connector initialization fails is wrong: there is no possible
codepath in nv50_mstc_new where nv50_mstm_add_connector() would return
<0 and mstc would be non-NULL.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 26af45785939..641252208e67 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1099,11 +1099,8 @@ nv50_mstm_add_connector(struct drm_dp_mst_topology_mgr
*mgr,
int ret;
ret = nv50_mstc_new(mstm, port, path, &mstc);
- if (ret) {
- if (mstc)
- mstc->connector.funcs->destroy(&mstc->connector);
+ if (ret)
return NULL;
- }
return &mstc->connector;
}
--
2.20.1
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[Intel-gfx] [PATCH v4 02/16] drm/dp_mst: Introduce new refcounting scheme for mstbs and ports
The current way of handling refcounting in the DP MST helpers is really
confusing and probably just plain wrong because it's been hacked up many
times over the years without anyone actually going over the code and
seeing if things could be simplified.
To the best of my understanding, the current scheme works like this:
drm_dp_mst_port and drm_dp_mst_branch both have a single refcount. When
this refcount hits 0 for either of the two, they're removed from the
topology state, but not immediately freed. Both ports and branch devices
will reinitialize their kref once it's hit 0 before actually destroying
themselves. The intended purpose behind this is so that we can avoid
problems like not being able to free a remote payload that might still
be active, due to us having removed all of the port/branch device
structures in memory, as per:
commit 91a25e463130 ("drm/dp/mst: deallocate payload on port destruction")
Which may have worked, but then it caused use-after-free errors. Being
new to MST at the time, I tried fixing it;
commit 263efde31f97 ("drm/dp/mst: Get validated port ref in
drm_dp_update_payload_part1()")
But, that was broken: both drm_dp_mst_port and drm_dp_mst_branch structs
are validated in almost every DP MST helper function. Simply put, this
means we go through the topology and try to see if the given
drm_dp_mst_branch or drm_dp_mst_port is still attached to something
before trying to use it in order to avoid dereferencing freed memory
(something that has happened a LOT in the past with this library).
Because of this it doesn't actually matter whether or not we keep keep
the ports and branches around in memory as that's not enough, because
any function that validates the branches and ports passed to it will
still reject them anyway since they're no longer in the topology
structure. So, use-after-free errors were fixed but payload deallocation
was completely broken.
Two years later, AMD informed me about this issue and I attempted to
come up with a temporary fix, pending a long-overdue cleanup of this
library:
commit c54c7374ff44 ("drm/dp_mst: Skip validating ports during destruction,
just ref")
But then that introduced use-after-free errors, so I quickly reverted
it:
commit 9765635b3075 ("Revert "drm/dp_mst: Skip validating ports during
destruction, just ref"")
And in the process, learned that there is just no simple fix for this:
the design is just broken. Unfortuntely, the usage of these helpers are
quite broken as well. Some drivers like i915 have been smart enough to
avoid accessing any kind of information from MST port structures, but
others like nouveau have assumed, understandably so, that
drm_dp_mst_port structures are normal and can just be accessed at any
time without worrying about use-after-free errors.
After a lot of discussion, me and Daniel Vetter came up with a better
idea to replace all of this.
To summarize, since this is documented far more indepth in the
documentation this patch introduces, we make it so that drm_dp_mst_port
and drm_dp_mst_branch structures have two different classes of
refcounts: topology_kref, and malloc_kref. topology_kref corresponds to
the lifetime of the given drm_dp_mst_port or drm_dp_mst_branch in it's
given topology. Once it hits zero, any associated connectors are removed
and the branch or port can no longer be validated. malloc_kref
corresponds to the lifetime of the memory allocation for the actual
structure, and will always be non-zero so long as the topology_kref is
non-zero. This gives us a way to allow callers to hold onto port and
branch device structures past their topology lifetime, and dramatically
simplifies the lifetimes of both structures. This also finally fixes the
port deallocation problem, properly.
Additionally: since this now means that we can keep ports and branch
devices allocated in memory for however long we need, we no longer need
a significant amount of the port validation that we currently do.
Additionally, there is one last scenario that this fixes, which couldn't
have been fixed properly beforehand:
- CPU1 unrefs port from topology (refcount 1->0)
- CPU2 refs port in topology(refcount 0->1)
Since we now can guarantee memory safety for ports and branches
as-needed, we also can make our main reference counting functions fix
this problem by using kref_get_unless_zero() internally so that topology
refcounts can only ever reach 0 once.
Changes since v2:
* Fix commit message - checkpatch
Changes since v1:
* Remove forward declarations - danvet
* Move "Branch device and port refcounting" section from documentation
into kernel-doc comments - danvet
* Export internal topology lifetime functions into their own section in
the kernel-docs - danvet
* s/@/&/g for struct references in kernel-docs - danvet
* Drop the "when they are no longer being used" bits from the kernel
docs - danvet
* Modify diagrams to show how the DRM driver interacts with the topology
and payloads - danvet
* Make suggested documentation cha
[Intel-gfx] [PATCH v4 01/16] drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends
s/drm_dp_get_validated_port_ref/drm_dp_mst_topology_get_port_validated/
s/drm_dp_put_port/drm_dp_mst_topology_put_port/
s/drm_dp_get_validated_mstb_ref/drm_dp_mst_topology_get_mstb_validated/
s/drm_dp_put_mst_branch_device/drm_dp_mst_topology_put_mstb/
This is a much more consistent naming scheme, and will make even more
sense once we redesign how the current refcounting scheme here works.
Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 114 ++
1 file changed, 62 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 2ab16c9e6243..6f9b211069a7 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -46,7 +46,7 @@ static bool dump_dp_payload_table(struct
drm_dp_mst_topology_mgr *mgr,
char *buf);
static int test_calc_pbn_mode(void);
-static void drm_dp_put_port(struct drm_dp_mst_port *port);
+static void drm_dp_mst_topology_put_port(struct drm_dp_mst_port *port);
static int drm_dp_dpcd_write_payload(struct drm_dp_mst_topology_mgr *mgr,
int id,
@@ -888,7 +888,7 @@ static void drm_dp_destroy_mst_branch_device(struct kref
*kref)
*/
list_for_each_entry_safe(port, tmp, &mstb->ports, next) {
list_del(&port->next);
- drm_dp_put_port(port);
+ drm_dp_mst_topology_put_port(port);
}
/* drop any tx slots msg */
@@ -911,7 +911,7 @@ static void drm_dp_destroy_mst_branch_device(struct kref
*kref)
kref_put(kref, drm_dp_free_mst_branch_device);
}
-static void drm_dp_put_mst_branch_device(struct drm_dp_mst_branch *mstb)
+static void drm_dp_mst_topology_put_mstb(struct drm_dp_mst_branch *mstb)
{
kref_put(&mstb->kref, drm_dp_destroy_mst_branch_device);
}
@@ -930,7 +930,7 @@ static void drm_dp_port_teardown_pdt(struct drm_dp_mst_port
*port, int old_pdt)
case DP_PEER_DEVICE_MST_BRANCHING:
mstb = port->mstb;
port->mstb = NULL;
- drm_dp_put_mst_branch_device(mstb);
+ drm_dp_mst_topology_put_mstb(mstb);
break;
}
}
@@ -970,12 +970,14 @@ static void drm_dp_destroy_port(struct kref *kref)
kfree(port);
}
-static void drm_dp_put_port(struct drm_dp_mst_port *port)
+static void drm_dp_mst_topology_put_port(struct drm_dp_mst_port *port)
{
kref_put(&port->kref, drm_dp_destroy_port);
}
-static struct drm_dp_mst_branch
*drm_dp_mst_get_validated_mstb_ref_locked(struct drm_dp_mst_branch *mstb,
struct drm_dp_mst_branch *to_find)
+static struct drm_dp_mst_branch *
+drm_dp_mst_topology_get_mstb_validated_locked(struct drm_dp_mst_branch *mstb,
+ struct drm_dp_mst_branch *to_find)
{
struct drm_dp_mst_port *port;
struct drm_dp_mst_branch *rmstb;
@@ -985,7 +987,8 @@ static struct drm_dp_mst_branch
*drm_dp_mst_get_validated_mstb_ref_locked(struct
}
list_for_each_entry(port, &mstb->ports, next) {
if (port->mstb) {
- rmstb =
drm_dp_mst_get_validated_mstb_ref_locked(port->mstb, to_find);
+ rmstb = drm_dp_mst_topology_get_mstb_validated_locked(
+ port->mstb, to_find);
if (rmstb)
return rmstb;
}
@@ -993,12 +996,15 @@ static struct drm_dp_mst_branch
*drm_dp_mst_get_validated_mstb_ref_locked(struct
return NULL;
}
-static struct drm_dp_mst_branch *drm_dp_get_validated_mstb_ref(struct
drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_branch *mstb)
+static struct drm_dp_mst_branch *
+drm_dp_mst_topology_get_mstb_validated(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_branch *mstb)
{
struct drm_dp_mst_branch *rmstb = NULL;
mutex_lock(&mgr->lock);
if (mgr->mst_primary)
- rmstb =
drm_dp_mst_get_validated_mstb_ref_locked(mgr->mst_primary, mstb);
+ rmstb = drm_dp_mst_topology_get_mstb_validated_locked(
+ mgr->mst_primary, mstb);
mutex_unlock(&mgr->lock);
return rmstb;
}
@@ -1021,7 +1027,9 @@ static struct drm_dp_mst_port
*drm_dp_mst_get_port_ref_locked(struct drm_dp_mst_
return NULL;
}
-static struct drm_dp_mst_port *drm_dp_get_validated_port_ref(struct
drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
+static struct drm_dp_mst_port *
+drm_dp_mst_topology_get_port_validated(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_port *port)
{
struct drm_dp_mst_port *rport = NULL;
mutex_lock(&mgr->lock);
@@ -1210,7 +1218,7 @@ static void drm_dp_add_port(struct drm
[Intel-gfx] [PATCH v4 03/16] drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref fails
While this isn't a complete fix, this will improve the reliability of
drm_dp_get_last_connected_port_and_mstb() pretty significantly during
hotplug events, since there's a chance that the in-memory topology tree
may not be fully updated when drm_dp_get_last_connected_port_and_mstb()
is called and thus might end up causing our search to fail on an mstb
whose topology refcount has reached 0, but has not yet been removed from
it's parent.
Ideally, we should further fix this problem by ensuring that we deal
with the potential for racing with a hotplug event, which would look
like this:
* drm_dp_payload_send_msg() retrieves the last living relative of mstb
with drm_dp_get_last_connected_port_and_mstb()
* drm_dp_payload_send_msg() starts building payload message
At the same time, mstb gets unplugged from the topology and is no
longer the actual last living relative of the original mstb
* drm_dp_payload_send_msg() tries sending the payload message, hub times
out
* Hub timed out, we give up and run away-resulting in the payload being
leaked
This could be fixed by restarting the
drm_dp_get_last_connected_port_and_mstb() search whenever we get a
timeout, sending the payload to the new mstb, then repeating until
either the entire topology is removed from the system or
drm_dp_get_last_connected_port_and_mstb() fails. But since the above
race condition is not terribly likely, we'll address that in a later
patch series once we've improved the recovery handling for VCPI
allocations in the rest of the DP MST helpers.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 54 ++-
1 file changed, 44 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index c0dc20fbd55a..b8a47c795fa9 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2045,24 +2045,50 @@ static struct drm_dp_mst_port
*drm_dp_get_last_connected_port_to_mstb(struct drm
return
drm_dp_get_last_connected_port_to_mstb(mstb->port_parent->parent);
}
-static struct drm_dp_mst_branch
*drm_dp_get_last_connected_port_and_mstb(struct drm_dp_mst_topology_mgr *mgr,
-struct
drm_dp_mst_branch *mstb,
-int
*port_num)
+/**
+ * drm_dp_get_last_connected_port_and_mstb() - Find the last living relatives
+ * in a topology of a given branch device
+ * @mgr: The topology manager to use
+ * @mstb: The disconnected branch device
+ * @port_num: Where to store the number of the last connected port
+ *
+ * Searches upwards in the topology starting from @mstb to try to find the
+ * closest available parent of @mstb that's still connected to the rest of the
+ * topology. This can be used in order to perform operations like releasing
+ * payloads, where the branch device which owned the payload may no longer be
+ * around and thus would require that the payload on the last living relative
+ * be freed instead.
+ *
+ * Returns:
+ * The last connected &drm_dp_mst_branch in the topology that was a parent of
+ * @mstb, if there is one.
+ */
+static struct drm_dp_mst_branch *
+drm_dp_get_last_connected_port_and_mstb(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_branch *mstb,
+ int *port_num)
{
struct drm_dp_mst_branch *rmstb = NULL;
struct drm_dp_mst_port *found_port;
+
mutex_lock(&mgr->lock);
- if (mgr->mst_primary) {
+ if (!mgr->mst_primary)
+ goto out;
+
+ do {
found_port = drm_dp_get_last_connected_port_to_mstb(mstb);
+ if (!found_port)
+ break;
- if (found_port) {
+ if (drm_dp_mst_topology_try_get_mstb(found_port->parent)) {
rmstb = found_port->parent;
- if (drm_dp_mst_topology_try_get_mstb(rmstb))
- *port_num = found_port->port_num;
- else
- rmstb = NULL;
+ *port_num = found_port->port_num;
+ } else {
+ /* Search again, starting from this parent */
+ mstb = found_port->parent;
}
- }
+ } while (!rmstb);
+out:
mutex_unlock(&mgr->lock);
return rmstb;
}
@@ -2111,6 +2137,14 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
drm_dp_queue_down_tx(mgr, txmsg);
+ /*
+* FIXME: there is a small chance that between getting the last
+* connected mstb and sending the payload message, the last connected
+* mstb could also be removed from the topology. In th
[Intel-gfx] [PATCH v4 06/16] drm/i915: Keep malloc references to MST ports
So that the ports stay around until we've destroyed the connectors, in order to ensure that we don't pass an invalid pointer to any MST helpers once we introduce the new MST VCPI helpers. Changes since v1: * Move drm_dp_mst_get_port_malloc() to where we assign intel_connector->port - danvet Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter Cc: David Airlie Cc: Jerry Zuo Cc: Harry Wentland Cc: Juston Li --- drivers/gpu/drm/i915/intel_connector.c | 4 drivers/gpu/drm/i915/intel_dp_mst.c| 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_connector.c b/drivers/gpu/drm/i915/intel_connector.c index 18e370f607bc..37d2c644f4b8 100644 --- a/drivers/gpu/drm/i915/intel_connector.c +++ b/drivers/gpu/drm/i915/intel_connector.c @@ -95,6 +95,10 @@ void intel_connector_destroy(struct drm_connector *connector) intel_panel_fini(&intel_connector->panel); drm_connector_cleanup(connector); + + if (intel_connector->port) + drm_dp_mst_put_port_malloc(intel_connector->port); + kfree(connector); } diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index f05427b74e34..631fd1537252 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -457,6 +457,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo intel_connector->get_hw_state = intel_dp_mst_get_hw_state; intel_connector->mst_port = intel_dp; intel_connector->port = port; + drm_dp_mst_get_port_malloc(port); connector = &intel_connector->base; ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 04/16] drm/dp_mst: Stop releasing VCPI when removing ports from topology
This has never actually worked, and isn't needed anyway: the driver's
always going to try to deallocate VCPI when it tears down the display
that the VCPI belongs to.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index b8a47c795fa9..f10a7edb401e 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1176,8 +1176,6 @@ static void drm_dp_destroy_port(struct kref *kref)
struct drm_dp_mst_topology_mgr *mgr = port->mgr;
if (!port->input) {
- port->vcpi.num_slots = 0;
-
kfree(port->cached_edid);
/*
@@ -3493,12 +3491,6 @@ static void drm_dp_destroy_connector_work(struct
work_struct *work)
drm_dp_port_teardown_pdt(port, port->pdt);
port->pdt = DP_PEER_DEVICE_NONE;
- if (!port->input && port->vcpi.vcpi > 0) {
- drm_dp_mst_reset_vcpi_slots(mgr, port);
- drm_dp_update_payload_part1(mgr);
- drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
- }
-
drm_dp_mst_put_port_malloc(port);
send_hotplug = true;
}
--
2.20.1
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[Intel-gfx] [PATCH v4 00/16] MST refcounting/atomic helpers cleanup
This is the series I've been working on for a while now to get all of the atomic DRM drivers in the tree to use the atomic MST helpers, and to make the atomic MST helpers actually idempotent. Turns out it's a lot more difficult to do that without also fixing how port and branch device refcounting works so that it actually makes sense, since the current upstream implementation requires a ton of magic in the atomic helpers to work around properly and in many situations just plain doesn't work as intended. There's still more cleanup that can be done, but I think this is a good place to start off for now :). This version just contains some changes that I forgot to make that had been requested much earlier, mainly in regards to the atomic checking code I added to i915 and nouveau (but not the helpers). Also, per-request I've made a gitlab branch available for this: https://gitlab.freedesktop.org/lyudess/linux/commits/wip/mst-dual-kref-start-v4 Lyude Paul (16): drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends drm/dp_mst: Introduce new refcounting scheme for mstbs and ports drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref fails drm/dp_mst: Stop releasing VCPI when removing ports from topology drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs drm/i915: Keep malloc references to MST ports drm/amdgpu/display: Keep malloc ref to MST port drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector() drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup() drm/nouveau: Keep malloc references to MST ports drm/nouveau: Stop unsetting mstc->port, use malloc refs drm/nouveau: Grab payload lock in nv50_msto_payload() drm/dp_mst: Add some atomic state iterator macros drm/dp_mst: Start tracking per-port VCPI allocations drm/dp_mst: Check payload count in drm_dp_mst_atomic_check() drm/nouveau: Use atomic VCPI helpers for MST .../gpu/dp-mst/topology-figure-1.dot | 52 + .../gpu/dp-mst/topology-figure-2.dot | 56 ++ .../gpu/dp-mst/topology-figure-3.dot | 59 ++ Documentation/gpu/drm-kms-helpers.rst | 26 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 11 +- drivers/gpu/drm/drm_dp_mst_topology.c | 938 ++ drivers/gpu/drm/i915/intel_connector.c| 4 + drivers/gpu/drm/i915/intel_display.c | 4 + drivers/gpu/drm/i915/intel_dp_mst.c | 55 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 96 +- include/drm/drm_dp_mst_helper.h | 151 ++- 11 files changed, 1203 insertions(+), 249 deletions(-) create mode 100644 Documentation/gpu/dp-mst/topology-figure-1.dot create mode 100644 Documentation/gpu/dp-mst/topology-figure-2.dot create mode 100644 Documentation/gpu/dp-mst/topology-figure-3.dot -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v7 4/4] drm/i915: cache number of MOCS entries
On Fri, Dec 21, 2018 at 11:56:43AM +, Tvrtko Ursulin wrote:
>
> On 14/12/2018 18:20, Lucas De Marchi wrote:
> > Instead of checking the gen number every time we need to know the max
> > number of entries, just save it into the table struct so we don't need
> > extra branches throughout the code.
> >
> > Suggested-by: Tvrtko Ursulin
> > Signed-off-by: Lucas De Marchi
> > ---
> > drivers/gpu/drm/i915/intel_mocs.c | 31 ++-
> > 1 file changed, 14 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_mocs.c
> > b/drivers/gpu/drm/i915/intel_mocs.c
> > index dfc4edea020f..22c5f576a3c2 100644
> > --- a/drivers/gpu/drm/i915/intel_mocs.c
> > +++ b/drivers/gpu/drm/i915/intel_mocs.c
> > @@ -32,6 +32,7 @@ struct drm_i915_mocs_entry {
> > struct drm_i915_mocs_table {
> > u32 size;
> > + u32 n_entries;
>
> While at it I'd convert both counts to normal unsigned int.
>
> Another nitpick: I'd also suggest some more descriptive names since I read
> n_entries and size completely opposite than what they are in the code. Maybe
> just s/n_entries/max_entries/ to keep the diff small, or even consider
> changing s/size/used_entries/ or something?
size = ARRAY_SIZE() -- we use that to track accesses to the table so we
don't access beyond the array size.
n_entries = GEN[X]_NUM_ENTRIES -- we use that to track the number of
entries we will program.
So IMO the names look reasonable to me.
>
> > const struct drm_i915_mocs_entry *table;
> > };
> > @@ -56,9 +57,6 @@ struct drm_i915_mocs_table {
> > #define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are
> > reserved. */
> > #define GEN11_NUM_MOCS_ENTRIES64 /* 63-64 are reserved, but
> > configured. */
> > -#define NUM_MOCS_ENTRIES(i915) \
> > - (INTEL_GEN(i915) < 11 ? GEN9_NUM_MOCS_ENTRIES : GEN11_NUM_MOCS_ENTRIES)
> > -
>
> Do you want to go through patch 3 adds this, patch 4 removes it, or why not
> just squash it into one?
I considered doing that, but then thought the split approach would be
more logical since this patch is about caching the number of entries.
Squashing on the previous patch creates more noise on that patch and
additional headache since I'm not the original author. Not having this
macro in the previous patch basically means squashing this entire patch
there.
So in the end I decided to do it on top. Is that ok to you?
>
> > /* (e)LLC caching options */
> > #define LE_0_PAGETABLE_LE_CACHEABILITY(0)
> > #define LE_1_UC _LE_CACHEABILITY(1)
> > @@ -283,14 +281,17 @@ static bool get_mocs_settings(struct drm_i915_private
> > *dev_priv,
> > if (IS_ICELAKE(dev_priv)) {
> > table->size = ARRAY_SIZE(icelake_mocs_table);
> > + table->n_entries = GEN11_NUM_MOCS_ENTRIES;
> > table->table = icelake_mocs_table;
> > result = true;
> > } else if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {
> > table->size = ARRAY_SIZE(skylake_mocs_table);
> > + table->n_entries = GEN9_NUM_MOCS_ENTRIES;
> > table->table = skylake_mocs_table;
> > result = true;
> > } else if (IS_GEN9_LP(dev_priv)) {
> > table->size = ARRAY_SIZE(broxton_mocs_table);
> > + table->n_entries = GEN9_NUM_MOCS_ENTRIES;
> > table->table = broxton_mocs_table;
> > result = true;
> > } else {
> > @@ -348,8 +349,6 @@ void intel_mocs_init_engine(struct intel_engine_cs
> > *engine)
> > if (!get_mocs_settings(dev_priv, &table))
> > return;
> > - GEM_BUG_ON(table.size > NUM_MOCS_ENTRIES(dev_priv));
> > -
> > for (index = 0; index < table.size; index++)
> > I915_WRITE(mocs_register(engine->id, index),
> >table.table[index].control_value);
> > @@ -362,7 +361,7 @@ void intel_mocs_init_engine(struct intel_engine_cs
> > *engine)
> > * Entry 0 in the table is uncached - so we are just writing
> > * that value to all the used entries.
> > */
> > - for (; index < NUM_MOCS_ENTRIES(dev_priv); index++)
> > + for (; index < table.n_entries; index++)
> > I915_WRITE(mocs_register(engine->id, index),
> >table.table[0].control_value);
> > }
> > @@ -380,19 +379,18 @@ void intel_mocs_init_engine(struct intel_engine_cs
> > *engine)
> > static int emit_mocs_control_table(struct i915_request *rq,
> >const struct drm_i915_mocs_table *table)
> > {
> > - struct drm_i915_private *i915 = rq->i915;
> > enum intel_engine_id engine = rq->engine->id;
> > unsigned int index;
> > u32 *cs;
> > - if (WARN_ON(table->size > NUM_MOCS_ENTRIES(i915)))
> > + if (GEM_WARN_ON(table->size > table->n_entries))
> > return -ENODEV;
>
> This (and another below) could go to get_mocs_settings which is now the
> authority to set things up correctly. So fire a warn from there and say no
> moc
Re: [Intel-gfx] [PATCH i-g-t] igt/drv_missed_irq: Skip if the kernel reports no rings available to test
Quoting Chris Wilson (2018-08-08 11:20:09) > Some setups (e.g. guc and gen10+) can not disable the MI_USER_INTERRUPT > generation and so can not simulate missed interrupts. These tests would > fail, so skip when the kernel reports no tests available. Ping? -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: Apply WaEnablePreemptionGranularityControlByUMD
== Series Details == Series: drm/i915/icl: Apply WaEnablePreemptionGranularityControlByUMD URL : https://patchwork.freedesktop.org/series/54751/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363_full -> Patchwork_11190_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11190_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_cursor_crc@cursor-128x42-onscreen: - shard-glk: PASS -> FAIL [fdo#103232] +4 * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-64x21-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen: - shard-iclb: PASS -> FAIL [fdo#103167] +4 * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-glk: PASS -> FAIL [fdo#108948] * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: NOTRUN -> FAIL [fdo#103166] * igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538] * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] * igt@pm_backlight@fade: - shard-iclb: PASS -> INCOMPLETE [fdo#107820] * igt@pm_rps@min-max-config-loaded: - shard-apl: PASS -> FAIL [fdo#102250] * igt@pm_rps@waitboost: - shard-iclb: NOTRUN -> FAIL [fdo#102250] / [fdo#108059] Possible fixes * igt@kms_atomic_transition@1x-modeset-transitions-fencing: - shard-skl: FAIL [fdo#107815] / [fdo#108470] -> PASS * igt@kms_available_modes_crc@available_mode_test_crc: - shard-apl: FAIL [fdo#106641] -> PASS * igt@kms_color@pipe-c-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS +1 * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_cursor_crc@cursor-256x85-random: - shard-apl: FAIL [fdo#103232] -> PASS +3 * igt@kms_cursor_legacy@flip-vs-cursor-legacy: - shard-apl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +16 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled: - shard-iclb: WARN [fdo#108336] -> PASS +1 * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: FAIL [fdo#105363] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - shard-iclb: DMESG-FAIL [fdo#107720] / [fdo#107724] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-apl: FAIL [fdo#103167] -> PASS +2 * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-iclb: DMESG-FAIL [fdo#107724] -> PASS +7 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS +13 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-onoff: - shard-iclb: FAIL [fdo#103167] -> PASS * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: - shard-skl: FAIL [fdo#103191] / [fdo#107362] -> PASS * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-apl: FAIL [fdo#108948] -> PASS +1 * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-i
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Apply WaEnablePreemptionGranularityControlByUMD
== Series Details == Series: drm/i915/icl: Apply WaEnablePreemptionGranularityControlByUMD URL : https://patchwork.freedesktop.org/series/54751/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363 -> Patchwork_11190 Summary --- **WARNING** Minor unknown changes coming with Patchwork_11190 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11190, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/54751/revisions/1/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11190: ### IGT changes ### Warnings * igt@kms_flip@basic-flip-vs-dpms: - fi-skl-6770hq: PASS -> SKIP +36 * igt@pm_rpm@basic-pci-d3-state: - fi-bsw-kefka: PASS -> SKIP Known issues Here are the changes found in Patchwork_11190 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@kms_frontbuffer_tracking@basic: - fi-byt-clapper: PASS -> FAIL [fdo#103167] * igt@pm_rpm@basic-rte: - fi-byt-n2820: NOTRUN -> FAIL [fdo#108800] - fi-bsw-kefka: PASS -> FAIL [fdo#108800] * igt@prime_vgem@basic-fence-flip: - fi-gdg-551: PASS -> FAIL [fdo#103182] Possible fixes * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 Participating hosts (47 -> 43) -- Additional (3): fi-byt-n2820 fi-apl-guc fi-pnv-d510 Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-whl-u Build changes - * Linux: CI_DRM_5363 -> Patchwork_11190 CI_DRM_5363: f141806c68e4cbd56e3a5a582eb1a6f5b7edfc84 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11190: a24b94693a9ce66399d0f32d40bcc18a5e03c2b5 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == a24b94693a9c drm/i915/icl: Apply WaEnablePreemptionGranularityControlByUMD == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11190/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/icl: Apply WaEnablePreemptionGranularityControlByUMD
According to Workaround database ICL also needs
WaEnablePreemptionGranularityControlByUMD, to allow userspace to do
fine-granularity preemptions per-context.
BSpec: 11348
Cc: Oscar Mateo
Cc: Radhakrishna Sripada
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_workarounds.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index 480c53a2ecb5..bbc5a66faa07 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -1014,7 +1014,7 @@ static void gen9_whitelist_build(struct i915_wa_list *w)
/* WaVFEStateAfterPipeControlwithMediaStateClear:skl,bxt,glk,cfl */
whitelist_reg(w, GEN9_CTX_PREEMPT_REG);
- /* WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,[cnl] */
+ /* WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,[cnl,icl]
*/
whitelist_reg(w, GEN8_CS_CHICKEN1);
/* WaAllowUMDToModifyHDCChicken1:skl,bxt,kbl,glk,cfl */
@@ -1068,6 +1068,9 @@ static void icl_whitelist_build(struct i915_wa_list *w)
/* WaAllowUMDToModifySamplerMode:icl */
whitelist_reg(w, GEN10_SAMPLER_MODE);
+
+ /* WaEnablePreemptionGranularityControlByUMD:icl */
+ whitelist_reg(w, GEN8_CS_CHICKEN1);
}
void intel_engine_init_whitelist(struct intel_engine_cs *engine)
@@ -1186,8 +1189,8 @@ static void rcs_engine_wa_init(struct intel_engine_cs
*engine)
GEN7_DISABLE_SAMPLER_PREFETCH);
}
- if (IS_GEN(i915, 9) || IS_CANNONLAKE(i915)) {
- /*
WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,cnl */
+ if (IS_GEN_RANGE(i915, 9, 11)) {
+ /*
WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,cnl,icl */
wa_masked_en(wal,
GEN7_FF_SLICE_CS_CHICKEN1,
GEN9_FFSC_PERCTX_PREEMPT_CTRL);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/2] drm/i915: Reduce recursive mutex locking from the shrinker (rev2)
== Series Details == Series: series starting with [v3,1/2] drm/i915: Reduce recursive mutex locking from the shrinker (rev2) URL : https://patchwork.freedesktop.org/series/54744/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363_full -> Patchwork_11189_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11189_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_softpin@noreloc-s3: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@kms_atomic_transition@plane-all-transition-nonblocking: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#109225] * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_cursor_crc@cursor-128x128-dpms: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-skl: PASS -> FAIL [fdo#103232] +1 - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-ytiled: - shard-skl: PASS -> FAIL [fdo#103184] * igt@kms_draw_crc@draw-method-xrgb-render-ytiled: - shard-iclb: PASS -> WARN [fdo#108336] +4 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_flip@dpms-vs-vblank-race-interruptible: - shard-glk: PASS -> FAIL [fdo#103060] * igt@kms_flip@flip-vs-fences-interruptible: - shard-apl: PASS -> INCOMPLETE [fdo#103927] * igt@kms_flip@plain-flip-ts-check-interruptible: - shard-skl: PASS -> FAIL [fdo#100368] * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-gtt: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +7 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt: - shard-iclb: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +6 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff: - shard-skl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen: - shard-iclb: PASS -> FAIL [fdo#103167] +3 * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c: - shard-skl: PASS -> FAIL [fdo#107362] * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-iclb: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: NOTRUN -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538] * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@pm_rpm@basic-rte: - shard-skl: PASS -> INCOMPLETE [fdo#107807] * igt@pm_rpm@cursor: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] * igt@pm_rpm@gem-mmap-gtt: - shard-iclb: NOTRUN -> INCOMPLETE [fdo#108840] * igt@pm_rpm@legacy-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] * igt@pm_rpm@modeset-lpsp-stress: - shard-skl: NOTRUN -> INCOMPLETE [fdo#107807] * igt@pm_rpm@reg-read-ioctl: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +14 * igt@pm_rps@min-max-config-loaded: - shard-apl: PASS -> FAIL [fdo#102250] * igt@pm_rps@waitboost: - shard-iclb: NOTRUN -> FAIL [fdo#102250] / [fdo#108059] Possible fixes ###
Re: [Intel-gfx] [PATCH] drm/i915: Fix the HDMI hot plug disconnection failure (v4)
On Fri, 4 Jan 2019 12:02:34 +0800 Chris Chiu wrote: > On Thu, Jan 3, 2019 at 1:50 AM Guang Bai wrote: > > > > On Wed, 2 Jan 2019 17:29:46 +0800 > > Chris Chiu wrote: > > > > > Happy New Year. > > > Sorry for bothering you guys again, I don't really want to make > > > myself a nuisance. > > > Is there any better idea for fixing this issue? > > I've already back ported this change into the kernel 4.18.17 and > > sent it to our customer for integration test - So far so good. > > Thanks, > > -Guang > > Thanks, Guang. > Can I expect to see it in next kernel release? Or we need to wait > until more positive results coming? - I'm not sure if and when my changes will pass the review and merged into the upstream kernel. I'm stuck on re-testing my fix with all those claimed failures from HDMI port live status checking happened sometimes before. I don't have any background info on those failures simply because I stepped into DRM/i915 area in recent one or two years after working on other OS/platform's gfx driver for more than two decades - My customer can't wait for this long, endless review time-period and just go ahead on proactive integration testing. They'll update us the results in a couple of days Thanks, -Guang > > > > > > > Chris > > > > > > On Mon, Dec 3, 2018 at 6:38 PM Chris Chiu > > > wrote: > > > > > > > > On Fri, Nov 30, 2018 at 1:15 AM Guang Bai > > > > wrote: > > > > > > > > > > On Thu, 29 Nov 2018 10:17:49 +0200 > > > > > Jani Nikula wrote: > > > > > > > > > > > On Wed, 28 Nov 2018, Guang Bai > > > > > > wrote: > > > > > > > On some GEN9 platforms, slowly unplugging (wiggling) the > > > > > > > HDMI cable makes the kernel to believe the HDMI display > > > > > > > is still connected. This is because the HDMI DDC lines are > > > > > > > disconnected a little bit later after the hot-plug > > > > > > > interrupt triggered thus an immediate edid fetch can be > > > > > > > made. This problem has been identified by more than one > > > > > > > customer recently. Use digital port live states to > > > > > > > authorize the edid read at HDMI detection point will > > > > > > > ensure most of the display related software states > > > > > > > updated and rest of them will be renewed accordingly when > > > > > > > the port is connected. > > > > > > > > > > > > > > v2: Fix the formatting issue > > > > > > > v3: Use digital port states to authorize the edid read > > > > > > > v4: Add comments on issue histories and rationale of the > > > > > > > fix (Chris W) > > > > > > > > > > > > You're not answering Chris Wilson's question. > > > > > > > > > > > > Why do you think the problems we've historically had with > > > > > > live status are no longer a problem? We've tried and > > > > > > reverted live status checks at least twice before because > > > > > > of regressions. Why do you think this time there won't be > > > > > > regressions? Why do you think this patch makes forward > > > > > > progress? > > > > > Jani, > > > > > I'm still new to kernel developments compared with all of you > > > > > working in this area for many years - Haven't got any > > > > > feedbacks on how exactly the HDMI live statue *not* fit for > > > > > HDMI hot-plug related port status checking, neither had time > > > > > to track all upstream bugzilla, plus not working directly > > > > > with Intel OTC teams > > > > > - What are those failing cases/regressions you mentioned > > > > > above? > > > > > - what were the kernel versions related with those > > > > > developments? > > > > > - Given the fact i915 architecture and implementation are > > > > > constantly evolving - Should we re-visit those issues with > > > > > current kernel implementation? > > > > > - Fundamentally, do you think the edid fetch is still *valid* > > > > > when the HDMI is unplugged (status either from PCH or DE)? Or > > > > > other platform configurations may present more complexities > > > > > such as kvm switches are used along with HDMI? > > > > > Again, if you could provide me more historical issue details, > > > > > I'd like to have some reviews/re-investigation for those > > > > > cases with current 4.20 kernel. > > > > > Thanks, > > > > > -Guang > > > > > > > > Hi Jani, > > > > I don't know the history and what kind of painful regression > > > > that you had run into. Could you maybe provide a test plan or > > > > some test cases for the regression verification? I can follow > > > > steps to try to verify whether if the patch can work on all > > > > cases. > > > > > > > > Chris > > > > > > > > > > > > > > > > I've *repeatedly* said from the beginning that I am very > > > > > > sceptical of using live status because we've been burned by > > > > > > it so many times before. I don't much care to repeat this > > > > > > anymore. > > > > > > > > > > > > > > > > > > BR, > > > > > > Jani. > > > > > > > > > > > > > > > > > > > > > > > > > > Cc: Jani Nikula > > > > > > > Cc: Chris Chiu > > > > > > > Cc: Chris Wilson
Re: [Intel-gfx] [PATCH v2 3/6] drm/i915/psr: Make intel_psr_set_debugfs_mode() only handle PSR mode
On Fri, 2019-01-04 at 15:35 +0100, Maarten Lankhorst wrote:
> Op 04-01-2019 om 14:28 schreef Souza, Jose:
> > On Fri, 2019-01-04 at 07:53 +0100, Maarten Lankhorst wrote:
> > > Op 03-01-2019 om 15:21 schreef José Roberto de Souza:
> > > > intel_psr_set_debugfs_mode() don't just handle the PSR mode but
> > > > it
> > > > is
> > > > also handling input validation, setting the new debug value and
> > > > changing PSR IRQ masks.
> > > > Lets move the roles listed above to the caller to make the
> > > > function
> > > > name and what it does accurate.
> > > >
> > > > Cc: Dhinakaran Pandiyan
> > > > Cc: Rodrigo Vivi
> > > > Cc: Maarten Lankhorst
> > > > Signed-off-by: José Roberto de Souza
> > > > ---
> > > > drivers/gpu/drm/i915/i915_debugfs.c | 22 -
> > > > -
> > > > drivers/gpu/drm/i915/intel_drv.h| 2 +-
> > > > drivers/gpu/drm/i915/intel_psr.c| 26 ++---
> > > >
> > > > -
> > > > 3 files changed, 31 insertions(+), 19 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> > > > b/drivers/gpu/drm/i915/i915_debugfs.c
> > > > index 1a31921598e7..77b097b50fd5 100644
> > > > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > > > @@ -2639,19 +2639,29 @@ i915_edp_psr_debug_set(void *data, u64
> > > > val)
> > > > {
> > > > struct drm_i915_private *dev_priv = data;
> > > > struct drm_modeset_acquire_ctx ctx;
> > > > - int ret;
> > > > + const u32 mode = val & I915_PSR_DEBUG_MODE_MASK;
> > > > + int ret = 0;
> > > >
> > > > if (!CAN_PSR(dev_priv))
> > > > return -ENODEV;
> > > >
> > > > DRM_DEBUG_KMS("Setting PSR debug to %llx\n", val);
> > > >
> > > > + if (val & ~(I915_PSR_DEBUG_IRQ |
> > > > I915_PSR_DEBUG_MODE_MASK) ||
> > > > + mode > I915_PSR_DEBUG_FORCE_PSR1) {
> > > > + DRM_DEBUG_KMS("Invalid debug mask %llx\n",
> > > > val);
> > > > + return -EINVAL;
> > > > + }
> > > This would only work for (psr.debug & MASK) == (val & MASK).
> > >
> > > So you need to take the lock before you can be sure.
> > >
> > > While at it, you probably also need the intel_runtime_pm_get()
> > > reference.. so you really don't complicate locking much.
> > >
> > > I would honestly just grab the extra locks unnecessarily for
> > > simplicity. It's only used from debugfs after all.
> > Thanks for the catch.
> >
> > Something like this?
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> > b/drivers/gpu/drm/i915/i915_debugfs.c
> > index 938ad2107ead..3a6ccf815ee1 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -2656,11 +2656,13 @@ i915_edp_psr_debug_set(void *data, u64 val)
> > return -EINVAL;
> > }
> >
> > - if (!mode)
> > - goto skip_mode;
> > -
> > intel_runtime_pm_get(dev_priv);
> >
> > + mutex_lock(&dev_priv->psr.lock);
> > + if (mode == (dev_priv->psr.debug &
> > I915_PSR_DEBUG_MODE_MASK))
> > + goto skip_mode;
> > + mutex_unlock(&dev_priv->psr.lock);
> > +
> > drm_modeset_acquire_init(&ctx,
> > DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
> >
> > retry:
> > @@ -2674,8 +2676,6 @@ i915_edp_psr_debug_set(void *data, u64 val)
> > drm_modeset_drop_locks(&ctx);
> > drm_modeset_acquire_fini(&ctx);
> >
> > - intel_runtime_pm_put(dev_priv);
> > -
> > skip_mode:
> > if (!ret) {
> > mutex_lock(&dev_priv->psr.lock);
> > @@ -2684,6 +2684,8 @@ i915_edp_psr_debug_set(void *data, u64 val)
> > mutex_unlock(&dev_priv->psr.lock);
> > }
> >
> > + intel_runtime_pm_put(dev_priv);
> > +
> > return ret;
> > }
> >
> >
> >
> >
> > > > +
> > > > + if (!mode)
> > > > + goto skip_mode;
> > > > +
> > > > intel_runtime_pm_get(dev_priv);
> > > >
> > > > drm_modeset_acquire_init(&ctx,
> > > > DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
> > > >
> > > > retry:
> > > > - ret = intel_psr_set_debugfs_mode(dev_priv, &ctx, val);
> > > > + ret = intel_psr_set_debugfs_mode(dev_priv, &ctx, mode);
> > > > if (ret == -EDEADLK) {
> > > > ret = drm_modeset_backoff(&ctx);
> > > > if (!ret)
> > > > @@ -2663,6 +2673,14 @@ i915_edp_psr_debug_set(void *data, u64
> > > > val)
> > > >
> > > > intel_runtime_pm_put(dev_priv);
> > > >
> > > > +skip_mode:
> > > > + if (!ret) {
> > > > + mutex_lock(&dev_priv->psr.lock);
> > > > + dev_priv->psr.debug = val;
> > > > + intel_psr_irq_control(dev_priv, dev_priv-
> > > > >psr.debug);
> > > > + mutex_unlock(&dev_priv->psr.lock);
> > > > + }
> > > > +
> > > > return ret;
> > > > }
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > > > b/drivers/gpu/drm/i915/intel_drv.h
[Intel-gfx] [PATCH i-g-t] tests/gem_shrink: Exercise OOM and other routes to shrinking in reasonable time
From: Tvrtko Ursulin
A set of subtests which exercises different paths to our shrinker code
(including the OOM killer) in predictable and reasonable time budget.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_core.c| 19 ++
lib/igt_core.h| 1 +
tests/i915/gem_shrink.c | 399 ++
tests/intel-ci/blacklist.txt | 1 +
tests/intel-ci/fast-feedback.testlist | 3 +
5 files changed, 423 insertions(+)
diff --git a/lib/igt_core.c b/lib/igt_core.c
index 50d6008f6c82..351da0b4e020 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -1685,6 +1685,25 @@ void igt_stop_helper(struct igt_helper_process *proc)
assert(helper_was_alive(proc, status));
}
+/**
+ * igt_try_stop_helper:
+ * @proc: #igt_helper_process structure
+ *
+ * Terminates a helper process if it is still running and returns true, or
false
+ * if the process wasn't running.
+ */
+bool igt_try_stop_helper(struct igt_helper_process *proc)
+{
+ int status;
+
+ /* failure here means the pid is already dead and so waiting is safe */
+ kill(proc->pid, proc->use_SIGKILL ? SIGKILL : SIGTERM);
+
+ status = igt_wait_helper(proc);
+
+ return helper_was_alive(proc, status);
+}
+
static void children_exit_handler(int sig)
{
int status;
diff --git a/lib/igt_core.h b/lib/igt_core.h
index 6f8c3852a686..ed5ceebf1205 100644
--- a/lib/igt_core.h
+++ b/lib/igt_core.h
@@ -795,6 +795,7 @@ bool __igt_fork_helper(struct igt_helper_process *proc);
for (; __igt_fork_helper(proc); exit(0))
int igt_wait_helper(struct igt_helper_process *proc);
void igt_stop_helper(struct igt_helper_process *proc);
+bool igt_try_stop_helper(struct igt_helper_process *proc);
/* exit handler code */
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index c8e05814ee70..7c002de0ef1f 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -26,6 +26,10 @@
*
* Exercise the shrinker by overallocating GEM objects
*/
+#include
+#include
+#include
+#include
#include "igt.h"
#include "igt_gt.h"
@@ -366,6 +370,376 @@ static void reclaim(unsigned engine, int timeout)
close(fd);
}
+static unsigned long get_meminfo(const char *info, const char *tag)
+{
+ const char *str;
+ unsigned long val;
+
+ str = strstr(info, tag);
+ if (str && sscanf(str + strlen(tag), " %lu", &val) == 1)
+ return val >> 10;
+
+ igt_warn("Unrecognised /proc/meminfo field: '%s'\n", tag);
+ return 0;
+}
+
+static unsigned long get_avail_ram_mb(void)
+{
+ int fd;
+ int ret;
+ char buf[4096];
+ unsigned long ram;
+
+ fd = open("/proc/meminfo", O_RDONLY);
+ igt_assert_fd(fd);
+
+ ret = read(fd, buf, sizeof(buf));
+ igt_assert(ret >= 0);
+
+ close(fd);
+
+ ram = get_meminfo(buf, "MemAvailable:");
+ ram += get_meminfo(buf, "Buffers:");
+ ram += get_meminfo(buf, "Cached:");
+ ram += get_meminfo(buf, "SwapCached:");
+
+ return ram;
+}
+
+struct test {
+#define TEST_BO(1)
+#define TEST_USERPTR (2)
+ unsigned int flags;
+ int fd;
+};
+
+static uint32_t __get_pages(int fd, unsigned long alloc)
+{
+ uint32_t handle = gem_create(fd, alloc);
+
+ gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, 0);
+ gem_madvise(fd, handle, I915_MADV_DONTNEED);
+
+ return handle;
+}
+
+struct test_obj {
+ void *ptr;
+ uint32_t handle;
+};
+
+#define PAGE_SIZE 4096
+static void
+__get_userptr(int fd, struct test_obj *obj, unsigned long sz)
+{
+ struct local_i915_gem_userptr userptr = { };
+ void *ptr;
+
+ igt_assert_eq(sz & 4095, 0);
+
+ ptr = mmap(NULL, sz, PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+ assert(ptr != MAP_FAILED);
+
+ for (size_t page = 0; page < sz; page += PAGE_SIZE)
+ *(volatile uint32_t *)((unsigned char *)ptr + page) = 0;
+
+ userptr.user_size = sz;
+ userptr.user_ptr = to_user_pointer(ptr);
+ do_ioctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr);
+
+ gem_set_domain(fd, userptr.handle, I915_GEM_DOMAIN_GTT, 0);
+ gem_madvise(fd, userptr.handle, I915_MADV_DONTNEED);
+
+ obj->ptr = ptr;
+ obj->handle = userptr.handle;
+}
+
+/*
+ * Use a specific way of using up memory until we are below a certain
threshold.
+ */
+static void *mempressure(void *arg)
+{
+ const unsigned int free_threshold_mb = 256;
+ struct test_obj *list = NULL;
+ struct test *test = arg;
+ const unsigned int sz_mb = 2;
+ const unsigned int sz = sz_mb << 20;
+ unsigned int n = 0, max = 0;
+ unsigned int blocks;
+
+ for (;;) {
+ unsigned long ram_mb = get_avail_ram_mb();
+
+ if (!list) {
+ /*
+* On first pass estimate how many sz_mb sized blocks
+
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Reduce recursive mutex locking from the shrinker
== Series Details == Series: series starting with [1/2] drm/i915: Reduce recursive mutex locking from the shrinker URL : https://patchwork.freedesktop.org/series/54744/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363_full -> Patchwork_11188_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11188_full that come from known issues: ### IGT changes ### Issues hit * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-hang-newfb-render-b: - shard-snb: PASS -> INCOMPLETE [fdo#105411] * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_cursor_crc@cursor-128x128-dpms: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-128x42-sliding: - shard-glk: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +3 * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: - shard-iclb: NOTRUN -> FAIL [fdo#103355] * igt@kms_fbcon_fbt@fbc-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_flip@modeset-vs-vblank-race-interruptible: - shard-glk: PASS -> FAIL [fdo#103060] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +3 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-glk: PASS -> FAIL [fdo#103166] +3 * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-apl: PASS -> FAIL [fdo#103166] - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: NOTRUN -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: PASS -> DMESG-WARN [fdo#105763] / [fdo#106538] * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@pm_backlight@basic-brightness: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] +1 * igt@pm_rpm@fences-dpms: - shard-skl: PASS -> INCOMPLETE [fdo#107807] * igt@pm_rps@waitboost: - shard-iclb: NOTRUN -> FAIL [fdo#102250] / [fdo#108059] Possible fixes * igt@gem_userptr_blits@readonly-unsync: - shard-skl: TIMEOUT [fdo#108887] -> PASS * igt@kms_atomic_transition@1x-modeset-transitions-fencing: - shard-skl: FAIL [fdo#107815] / [fdo#108470] -> PASS * igt@kms_color@pipe-c-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS +1 * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_cursor_crc@cursor-256x85-random: - shard-apl: FAIL [fdo#103232] -> PASS +3 * igt@kms_cursor_legacy@flip-vs-cursor-legacy: - shard-apl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +16 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled: - shard-iclb: WARN [fdo#108336] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt: - shard-glk: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - shard-iclb: DMESG-FAIL [fdo#107720] / [fdo#107724] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-apl: FAIL [fdo#103167] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt: - shard-kbl: DMESG-WARN [fdo#103313] / [fdo#103558] / [fdo#105602] -> PASS +1 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt: - shard-iclb: DMESG-FAIL [fdo#107724] -> PASS +3 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu: - sh
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915: Reduce recursive mutex locking from the shrinker (rev2)
== Series Details == Series: series starting with [v3,1/2] drm/i915: Reduce recursive mutex locking from the shrinker (rev2) URL : https://patchwork.freedesktop.org/series/54744/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363 -> Patchwork_11189 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/54744/revisions/2/mbox/ Known issues Here are the changes found in Patchwork_11189 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@userptr: - fi-kbl-8809g: PASS -> DMESG-WARN [fdo#108965] * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@kms_pipe_crc_basic@read-crc-pipe-a: - fi-byt-clapper: PASS -> FAIL [fdo#107362] * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - fi-apl-guc: NOTRUN -> DMESG-WARN [fdo#108566] Possible fixes * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: FAIL [fdo#108767] -> PASS * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: DMESG-WARN [fdo#102614] -> PASS * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1 [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767 [fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965 Participating hosts (47 -> 43) -- Additional (3): fi-byt-n2820 fi-apl-guc fi-pnv-d510 Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 Build changes - * Linux: CI_DRM_5363 -> Patchwork_11189 CI_DRM_5363: f141806c68e4cbd56e3a5a582eb1a6f5b7edfc84 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11189: 1324927312a6099dd1790120081927859e4ba762 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 1324927312a6 drm/i915: Fix timeout handling in i915_gem_shrinker_vmap 35daca92dc70 drm/i915: Reduce recursive mutex locking from the shrinker == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11189/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 1/2] drm/i915: Reduce recursive mutex locking from the shrinker
From: Tvrtko Ursulin
In two codepaths internal to the shrinker we know we will end up taking
the resursive mutex path.
It instead feels more elegant to avoid this altogether and not call
mutex_trylock_recursive in those cases.
We achieve this by extracting the shrinking part to __i915_gem_shrink,
wrapped by struct mutex taking i915_gem_shrink.
At the same time move the runtime pm reference taking to always be in the
usual, before struct mutex, order.
v2:
* Don't use flags but split i915_gem_shrink into locked and unlocked.
v3:
* Whitespace and checkpatch reported errors.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem_shrinker.c | 154 ---
2 files changed, 85 insertions(+), 71 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7fa2a405c5fe..e8514c4afbb2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3178,7 +3178,7 @@ i915_gem_object_create_internal(struct drm_i915_private
*dev_priv,
unsigned long i915_gem_shrink(struct drm_i915_private *i915,
unsigned long target,
unsigned long *nr_scanned,
- unsigned flags);
+ unsigned int flags);
#define I915_SHRINK_PURGEABLE 0x1
#define I915_SHRINK_UNBOUND 0x2
#define I915_SHRINK_BOUND 0x4
diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/i915_gem_shrinker.c
index ea90d3a0d511..ba0e0ca31d30 100644
--- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
@@ -117,36 +117,11 @@ static bool unsafe_drop_pages(struct drm_i915_gem_object
*obj)
return !i915_gem_object_has_pages(obj);
}
-/**
- * i915_gem_shrink - Shrink buffer object caches
- * @i915: i915 device
- * @target: amount of memory to make available, in pages
- * @nr_scanned: optional output for number of pages scanned (incremental)
- * @flags: control flags for selecting cache types
- *
- * This function is the main interface to the shrinker. It will try to release
- * up to @target pages of main memory backing storage from buffer objects.
- * Selection of the specific caches can be done with @flags. This is e.g.
useful
- * when purgeable objects should be removed from caches preferentially.
- *
- * Note that it's not guaranteed that released amount is actually available as
- * free system memory - the pages might still be in-used to due to other
reasons
- * (like cpu mmaps) or the mm core has reused them before we could grab them.
- * Therefore code that needs to explicitly shrink buffer objects caches (e.g.
to
- * avoid deadlocks in memory reclaim) must fall back to i915_gem_shrink_all().
- *
- * Also note that any kind of pinning (both per-vma address space pins and
- * backing storage pins at the buffer object level) result in the shrinker code
- * having to skip the object.
- *
- * Returns:
- * The number of pages of backing storage actually released.
- */
-unsigned long
-i915_gem_shrink(struct drm_i915_private *i915,
- unsigned long target,
- unsigned long *nr_scanned,
- unsigned flags)
+static unsigned long
+__i915_gem_shrink(struct drm_i915_private *i915,
+ unsigned long target,
+ unsigned long *nr_scanned,
+ unsigned int flags)
{
const struct {
struct list_head *list;
@@ -158,10 +133,8 @@ i915_gem_shrink(struct drm_i915_private *i915,
}, *phase;
unsigned long count = 0;
unsigned long scanned = 0;
- bool unlock;
- if (!shrinker_lock(i915, &unlock))
- return 0;
+ lockdep_assert_held(&i915->drm.struct_mutex);
/*
* When shrinking the active list, also consider active contexts.
@@ -177,18 +150,8 @@ i915_gem_shrink(struct drm_i915_private *i915,
I915_WAIT_LOCKED,
MAX_SCHEDULE_TIMEOUT);
- trace_i915_gem_shrink(i915, target, flags);
i915_retire_requests(i915);
- /*
-* Unbinding of objects will require HW access; Let us not wake the
-* device just to recover a little memory. If absolutely necessary,
-* we will force the wake during oom-notifier.
-*/
- if ((flags & I915_SHRINK_BOUND) &&
- !intel_runtime_pm_get_if_in_use(i915))
- flags &= ~I915_SHRINK_BOUND;
-
/*
* As we may completely rewrite the (un)bound list whilst unbinding
* (due to retiring requests) we have to strictly process only
@@ -267,15 +230,70 @@ i915_gem_shrink(struct drm_i915_private *i915,
spin_unlock(&i915->mm.obj_lock);
}
- if (flags & I915_SHRINK_BOUND)
- intel_runtime_pm_put(i915);
-
i915_retire_requests(i915);
- shrinker_unlock(i9
Re: [Intel-gfx] [PATCH v2 3/6] drm/i915/psr: Make intel_psr_set_debugfs_mode() only handle PSR mode
Op 04-01-2019 om 14:28 schreef Souza, Jose:
> On Fri, 2019-01-04 at 07:53 +0100, Maarten Lankhorst wrote:
>> Op 03-01-2019 om 15:21 schreef José Roberto de Souza:
>>> intel_psr_set_debugfs_mode() don't just handle the PSR mode but it
>>> is
>>> also handling input validation, setting the new debug value and
>>> changing PSR IRQ masks.
>>> Lets move the roles listed above to the caller to make the function
>>> name and what it does accurate.
>>>
>>> Cc: Dhinakaran Pandiyan
>>> Cc: Rodrigo Vivi
>>> Cc: Maarten Lankhorst
>>> Signed-off-by: José Roberto de Souza
>>> ---
>>> drivers/gpu/drm/i915/i915_debugfs.c | 22 --
>>> drivers/gpu/drm/i915/intel_drv.h| 2 +-
>>> drivers/gpu/drm/i915/intel_psr.c| 26 ++---
>>> -
>>> 3 files changed, 31 insertions(+), 19 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
>>> b/drivers/gpu/drm/i915/i915_debugfs.c
>>> index 1a31921598e7..77b097b50fd5 100644
>>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>>> @@ -2639,19 +2639,29 @@ i915_edp_psr_debug_set(void *data, u64 val)
>>> {
>>> struct drm_i915_private *dev_priv = data;
>>> struct drm_modeset_acquire_ctx ctx;
>>> - int ret;
>>> + const u32 mode = val & I915_PSR_DEBUG_MODE_MASK;
>>> + int ret = 0;
>>>
>>> if (!CAN_PSR(dev_priv))
>>> return -ENODEV;
>>>
>>> DRM_DEBUG_KMS("Setting PSR debug to %llx\n", val);
>>>
>>> + if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_MODE_MASK) ||
>>> + mode > I915_PSR_DEBUG_FORCE_PSR1) {
>>> + DRM_DEBUG_KMS("Invalid debug mask %llx\n", val);
>>> + return -EINVAL;
>>> + }
>> This would only work for (psr.debug & MASK) == (val & MASK).
>>
>> So you need to take the lock before you can be sure.
>>
>> While at it, you probably also need the intel_runtime_pm_get()
>> reference.. so you really don't complicate locking much.
>>
>> I would honestly just grab the extra locks unnecessarily for
>> simplicity. It's only used from debugfs after all.
> Thanks for the catch.
>
> Something like this?
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 938ad2107ead..3a6ccf815ee1 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2656,11 +2656,13 @@ i915_edp_psr_debug_set(void *data, u64 val)
> return -EINVAL;
> }
>
> - if (!mode)
> - goto skip_mode;
> -
> intel_runtime_pm_get(dev_priv);
>
> + mutex_lock(&dev_priv->psr.lock);
> + if (mode == (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK))
> + goto skip_mode;
> + mutex_unlock(&dev_priv->psr.lock);
> +
> drm_modeset_acquire_init(&ctx,
> DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
>
> retry:
> @@ -2674,8 +2676,6 @@ i915_edp_psr_debug_set(void *data, u64 val)
> drm_modeset_drop_locks(&ctx);
> drm_modeset_acquire_fini(&ctx);
>
> - intel_runtime_pm_put(dev_priv);
> -
> skip_mode:
> if (!ret) {
> mutex_lock(&dev_priv->psr.lock);
> @@ -2684,6 +2684,8 @@ i915_edp_psr_debug_set(void *data, u64 val)
> mutex_unlock(&dev_priv->psr.lock);
> }
>
> + intel_runtime_pm_put(dev_priv);
> +
> return ret;
> }
>
>
>
>
>>> +
>>> + if (!mode)
>>> + goto skip_mode;
>>> +
>>> intel_runtime_pm_get(dev_priv);
>>>
>>> drm_modeset_acquire_init(&ctx,
>>> DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
>>>
>>> retry:
>>> - ret = intel_psr_set_debugfs_mode(dev_priv, &ctx, val);
>>> + ret = intel_psr_set_debugfs_mode(dev_priv, &ctx, mode);
>>> if (ret == -EDEADLK) {
>>> ret = drm_modeset_backoff(&ctx);
>>> if (!ret)
>>> @@ -2663,6 +2673,14 @@ i915_edp_psr_debug_set(void *data, u64 val)
>>>
>>> intel_runtime_pm_put(dev_priv);
>>>
>>> +skip_mode:
>>> + if (!ret) {
>>> + mutex_lock(&dev_priv->psr.lock);
>>> + dev_priv->psr.debug = val;
>>> + intel_psr_irq_control(dev_priv, dev_priv->psr.debug);
>>> + mutex_unlock(&dev_priv->psr.lock);
>>> + }
>>> +
>>> return ret;
>>> }
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_drv.h
>>> b/drivers/gpu/drm/i915/intel_drv.h
>>> index 1a11c2beb7f3..2367f07ba29e 100644
>>> --- a/drivers/gpu/drm/i915/intel_drv.h
>>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>>> @@ -2063,7 +2063,7 @@ void intel_psr_disable(struct intel_dp
>>> *intel_dp,
>>> const struct intel_crtc_state *old_crtc_state);
>>> int intel_psr_set_debugfs_mode(struct drm_i915_private *dev_priv,
>>>struct drm_modeset_acquire_ctx *ctx,
>>> - u64 value);
>>> + u32 mode);
>>> void intel_psr_invalidate(struct drm_i915_private *dev_priv,
>>> unsigned frontbuffer_bits,
>>> enum fb_op_origin origin);
>>> diff --git a/dri
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Reduce recursive mutex locking from the shrinker
== Series Details == Series: series starting with [1/2] drm/i915: Reduce recursive mutex locking from the shrinker URL : https://patchwork.freedesktop.org/series/54744/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363 -> Patchwork_11188 Summary --- **WARNING** Minor unknown changes coming with Patchwork_11188 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11188, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/54744/revisions/1/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11188: ### IGT changes ### Warnings * igt@pm_rpm@basic-pci-d3-state: - fi-byt-j1900: PASS -> SKIP Known issues Here are the changes found in Patchwork_11188 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live_hangcheck: - fi-bwr-2160:PASS -> DMESG-FAIL [fdo#108735] * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c-frame-sequence: - fi-glk-dsi: PASS -> DMESG-WARN [fdo#107732] +1 * igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence: - fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362] * igt@pm_rpm@basic-rte: - fi-byt-j1900: PASS -> FAIL [fdo#108800] * igt@prime_vgem@basic-fence-flip: - fi-skl-guc: PASS -> FAIL [fdo#104008] Possible fixes * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: DMESG-WARN [fdo#102614] -> PASS [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#104008]: https://bugs.freedesktop.org/show_bug.cgi?id=104008 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107732]: https://bugs.freedesktop.org/show_bug.cgi?id=107732 [fdo#108735]: https://bugs.freedesktop.org/show_bug.cgi?id=108735 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 Participating hosts (47 -> 44) -- Additional (3): fi-byt-n2820 fi-apl-guc fi-pnv-d510 Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 Build changes - * Linux: CI_DRM_5363 -> Patchwork_11188 CI_DRM_5363: f141806c68e4cbd56e3a5a582eb1a6f5b7edfc84 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11188: 2c7b3c9ab72bce47af22df919991474b186d974e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 2c7b3c9ab72b drm/i915: Fix timeout handling in i915_gem_shrinker_vmap 30228d4da273 drm/i915: Reduce recursive mutex locking from the shrinker == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11188/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Move workaround infrastructure code up
== Series Details == Series: series starting with [1/2] drm/i915: Move workaround infrastructure code up URL : https://patchwork.freedesktop.org/series/54739/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363_full -> Patchwork_11186_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11186_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@gem_tiled_blits@normal: - shard-apl: PASS -> INCOMPLETE [fdo#103927] * igt@gem_workarounds@suspend-resume-fd: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@i915_suspend@sysfs-reader: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_color@pipe-b-ctm-0-25: - shard-skl: PASS -> FAIL [fdo#108682] * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-skl: PASS -> FAIL [fdo#103232] +1 - shard-iclb: NOTRUN -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: PASS -> FAIL [fdo#103232] +1 - shard-glk: PASS -> FAIL [fdo#103232] +3 * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: - shard-iclb: NOTRUN -> FAIL [fdo#103355] * igt@kms_draw_crc@draw-method-rgb565-render-xtiled: - shard-skl: PASS -> FAIL [fdo#103184] +1 * igt@kms_draw_crc@draw-method-xrgb-blt-xtiled: - shard-iclb: PASS -> WARN [fdo#108336] +3 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: PASS -> FAIL [fdo#102887] / [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-gtt: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +3 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +5 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move: - shard-iclb: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff: - shard-skl: PASS -> FAIL [fdo#103167] * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c: - shard-skl: PASS -> FAIL [fdo#107362] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-glk: PASS -> FAIL [fdo#103166] +1 - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: NOTRUN -> FAIL [fdo#103166] +1 * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538] * igt@kms_rotation_crc@primary-rotation-180: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +6 * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@pm_rpm@cursor: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] * igt@pm_rpm@dpms-lpsp: - shard-skl: PASS -> INCOMPLETE [fdo#107807] +1 * igt@pm_rpm@reg-read-ioctl: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +14 * igt@pm_rps@waitboost: - shard-iclb: NOTRUN -> FAIL [fdo#102250] / [fdo#108059] Possible fixes * igt@kms_color@pipe-c-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-128x42-sliding: - shard-apl: FAIL [fdo#103232] -> PASS * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Reduce recursive mutex locking from the shrinker
== Series Details == Series: series starting with [1/2] drm/i915: Reduce recursive mutex locking from the shrinker URL : https://patchwork.freedesktop.org/series/54744/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Reduce recursive mutex locking from the shrinker +drivers/gpu/drm/i915/i915_gem_shrinker.c:121:1: warning: symbol '__i915_gem_shrink' was not declared. Should it be static? Commit: drm/i915: Fix timeout handling in i915_gem_shrinker_vmap Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Reduce recursive mutex locking from the shrinker
== Series Details == Series: series starting with [1/2] drm/i915: Reduce recursive mutex locking from the shrinker URL : https://patchwork.freedesktop.org/series/54744/ State : warning == Summary == $ dim checkpatch origin/drm-tip 30228d4da273 drm/i915: Reduce recursive mutex locking from the shrinker -:64: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #64: FILE: drivers/gpu/drm/i915/i915_gem_shrinker.c:124: + unsigned flags) -:145: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #145: FILE: drivers/gpu/drm/i915/i915_gem_shrinker.c:270: + unsigned flags) -:232: ERROR:CODE_INDENT: code indent should use tabs where possible #232: FILE: drivers/gpu/drm/i915/i915_gem_shrinker.c:495: +^I^I^I^I I915_SHRINK_BOUND |$ -:233: ERROR:CODE_INDENT: code indent should use tabs where possible #233: FILE: drivers/gpu/drm/i915/i915_gem_shrinker.c:496: +^I^I^I^I I915_SHRINK_UNBOUND |$ -:234: ERROR:CODE_INDENT: code indent should use tabs where possible #234: FILE: drivers/gpu/drm/i915/i915_gem_shrinker.c:497: +^I^I^I^I I915_SHRINK_ACTIVE |$ -:235: ERROR:CODE_INDENT: code indent should use tabs where possible #235: FILE: drivers/gpu/drm/i915/i915_gem_shrinker.c:498: +^I^I^I^I I915_SHRINK_VMAPS);$ total: 4 errors, 2 warnings, 0 checks, 205 lines checked 2c7b3c9ab72b drm/i915: Fix timeout handling in i915_gem_shrinker_vmap ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: Reduce recursive mutex locking from the shrinker
From: Tvrtko Ursulin
In two codepaths internal to the shrinker we know we will end up taking
the resursive mutex path.
It instead feels more elegant to avoid this altogether and not call
mutex_trylock_recursive in those cases.
We achieve this by extracting the shrinking part to __i915_gem_shrink,
wrapped by struct mutex taking i915_gem_shrink.
At the same time move the runtime pm reference taking to always be in the
usual, before struct mutex, order.
v2:
* Don't use flags but split i915_gem_shrink into locked and unlocked.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_shrinker.c | 152 +--
1 file changed, 83 insertions(+), 69 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/i915_gem_shrinker.c
index ea90d3a0d511..1ee5b08dab1b 100644
--- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
@@ -117,36 +117,11 @@ static bool unsafe_drop_pages(struct drm_i915_gem_object
*obj)
return !i915_gem_object_has_pages(obj);
}
-/**
- * i915_gem_shrink - Shrink buffer object caches
- * @i915: i915 device
- * @target: amount of memory to make available, in pages
- * @nr_scanned: optional output for number of pages scanned (incremental)
- * @flags: control flags for selecting cache types
- *
- * This function is the main interface to the shrinker. It will try to release
- * up to @target pages of main memory backing storage from buffer objects.
- * Selection of the specific caches can be done with @flags. This is e.g.
useful
- * when purgeable objects should be removed from caches preferentially.
- *
- * Note that it's not guaranteed that released amount is actually available as
- * free system memory - the pages might still be in-used to due to other
reasons
- * (like cpu mmaps) or the mm core has reused them before we could grab them.
- * Therefore code that needs to explicitly shrink buffer objects caches (e.g.
to
- * avoid deadlocks in memory reclaim) must fall back to i915_gem_shrink_all().
- *
- * Also note that any kind of pinning (both per-vma address space pins and
- * backing storage pins at the buffer object level) result in the shrinker code
- * having to skip the object.
- *
- * Returns:
- * The number of pages of backing storage actually released.
- */
unsigned long
-i915_gem_shrink(struct drm_i915_private *i915,
- unsigned long target,
- unsigned long *nr_scanned,
- unsigned flags)
+__i915_gem_shrink(struct drm_i915_private *i915,
+ unsigned long target,
+ unsigned long *nr_scanned,
+ unsigned flags)
{
const struct {
struct list_head *list;
@@ -158,10 +133,8 @@ i915_gem_shrink(struct drm_i915_private *i915,
}, *phase;
unsigned long count = 0;
unsigned long scanned = 0;
- bool unlock;
- if (!shrinker_lock(i915, &unlock))
- return 0;
+ lockdep_assert_held(&i915->drm.struct_mutex);
/*
* When shrinking the active list, also consider active contexts.
@@ -177,18 +150,8 @@ i915_gem_shrink(struct drm_i915_private *i915,
I915_WAIT_LOCKED,
MAX_SCHEDULE_TIMEOUT);
- trace_i915_gem_shrink(i915, target, flags);
i915_retire_requests(i915);
- /*
-* Unbinding of objects will require HW access; Let us not wake the
-* device just to recover a little memory. If absolutely necessary,
-* we will force the wake during oom-notifier.
-*/
- if ((flags & I915_SHRINK_BOUND) &&
- !intel_runtime_pm_get_if_in_use(i915))
- flags &= ~I915_SHRINK_BOUND;
-
/*
* As we may completely rewrite the (un)bound list whilst unbinding
* (due to retiring requests) we have to strictly process only
@@ -267,15 +230,70 @@ i915_gem_shrink(struct drm_i915_private *i915,
spin_unlock(&i915->mm.obj_lock);
}
- if (flags & I915_SHRINK_BOUND)
- intel_runtime_pm_put(i915);
-
i915_retire_requests(i915);
- shrinker_unlock(i915, unlock);
-
if (nr_scanned)
*nr_scanned += scanned;
+
+ return count;
+}
+
+/**
+ * i915_gem_shrink - Shrink buffer object caches
+ * @i915: i915 device
+ * @target: amount of memory to make available, in pages
+ * @nr_scanned: optional output for number of pages scanned (incremental)
+ * @flags: control flags for selecting cache types
+ *
+ * This function is the main interface to the shrinker. It will try to release
+ * up to @target pages of main memory backing storage from buffer objects.
+ * Selection of the specific caches can be done with @flags. This is e.g.
useful
+ * when purgeable objects should be removed from caches preferentially.
+ *
+ * Note that it's not guaranteed that released amount is actually available as
+ * free sy
[Intel-gfx] [PATCH 2/2] drm/i915: Fix timeout handling in i915_gem_shrinker_vmap
From: Tvrtko Ursulin
The code tries to grab struct mutex for 5ms every time the unlocked GPU
idle wait succeeds. But the GPU idle wait itself is practically unbound
which means the 5ms timeout might not be honoured.
Cap the GPU idle wait to 5ms as well to fix this.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_shrinker.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/i915_gem_shrinker.c
index 1ee5b08dab1b..e848f38223d6 100644
--- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
@@ -404,13 +404,12 @@ i915_gem_shrinker_scan(struct shrinker *shrinker, struct
shrink_control *sc)
static bool
shrinker_lock_uninterruptible(struct drm_i915_private *i915, bool *unlock,
- int timeout_ms)
+ unsigned long timeout)
{
- unsigned long timeout = jiffies + msecs_to_jiffies_timeout(timeout_ms);
+ const unsigned long timeout_end = jiffies + timeout;
do {
- if (i915_gem_wait_for_idle(i915,
- 0, MAX_SCHEDULE_TIMEOUT) == 0 &&
+ if (i915_gem_wait_for_idle(i915, 0, timeout) == 0 &&
shrinker_lock(i915, unlock))
break;
@@ -418,7 +417,7 @@ shrinker_lock_uninterruptible(struct drm_i915_private
*i915, bool *unlock,
if (fatal_signal_pending(current))
return false;
- if (time_after(jiffies, timeout)) {
+ if (time_after(jiffies, timeout_end)) {
pr_err("Unable to lock GPU to purge memory.\n");
return false;
}
@@ -476,11 +475,12 @@ i915_gem_shrinker_vmap(struct notifier_block *nb,
unsigned long event, void *ptr
struct drm_i915_private *i915 =
container_of(nb, struct drm_i915_private, mm.vmap_notifier);
struct i915_vma *vma, *next;
+ const unsigned long timeout = msecs_to_jiffies_timeout(5000);
unsigned long freed_pages = 0;
bool unlock;
int ret;
- if (!shrinker_lock_uninterruptible(i915, &unlock, 5000))
+ if (!shrinker_lock_uninterruptible(i915, &unlock, timeout))
return NOTIFY_DONE;
/* Force everything onto the inactive lists */
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 07/39] drm/i915: Report the number of closed vma held by each context in debugfs
Chris Wilson writes:
> Include the total size of closed vma when reporting the per_ctx_stats of
> debugfs/i915_gem_objects.
>
> Whilst adjusting the context tracking, note that we can simply use our
> list of contexts in i915->contexts rather than circumlocute via
> dev->filelist and the per-file context idr, with the result that we can
> show objects allocated to different vm (i.e. contexts within a file).
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 124 +++-
> 1 file changed, 47 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index b89abbba4604..c2f56c1c8199 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -297,11 +297,12 @@ static int i915_gem_stolen_list_info(struct seq_file
> *m, void *data)
> }
>
> struct file_stats {
> - struct drm_i915_file_private *file_priv;
> + struct i915_address_space *vm;
> unsigned long count;
> u64 total, unbound;
> u64 global, shared;
> u64 active, inactive;
> + u64 closed;
> };
>
> static int per_file_stats(int id, void *ptr, void *data)
> @@ -326,9 +327,7 @@ static int per_file_stats(int id, void *ptr, void *data)
> if (i915_vma_is_ggtt(vma)) {
> stats->global += vma->node.size;
> } else {
> - struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vma->vm);
> -
> - if (ppgtt->vm.file != stats->file_priv)
> + if (vma->vm != stats->vm)
> continue;
> }
>
> @@ -336,6 +335,9 @@ static int per_file_stats(int id, void *ptr, void *data)
> stats->active += vma->node.size;
> else
> stats->inactive += vma->node.size;
> +
> + if (i915_vma_is_closed(vma))
> + stats->closed += vma->node.size;
> }
>
> return 0;
> @@ -343,7 +345,7 @@ static int per_file_stats(int id, void *ptr, void *data)
>
> #define print_file_stats(m, name, stats) do { \
> if (stats.count) \
> - seq_printf(m, "%s: %lu objects, %llu bytes (%llu active, %llu
> inactive, %llu global, %llu shared, %llu unbound)\n", \
> + seq_printf(m, "%s: %lu objects, %llu bytes (%llu active, %llu
> inactive, %llu global, %llu shared, %llu unbound, %llu closed)\n", \
> name, \
> stats.count, \
> stats.total, \
> @@ -351,20 +353,19 @@ static int per_file_stats(int id, void *ptr, void *data)
> stats.inactive, \
> stats.global, \
> stats.shared, \
> -stats.unbound); \
> +stats.unbound, \
> +stats.closed); \
> } while (0)
>
> static void print_batch_pool_stats(struct seq_file *m,
> struct drm_i915_private *dev_priv)
> {
> struct drm_i915_gem_object *obj;
> - struct file_stats stats;
> struct intel_engine_cs *engine;
> + struct file_stats stats = {};
> enum intel_engine_id id;
> int j;
>
> - memset(&stats, 0, sizeof(stats));
> -
> for_each_engine(engine, dev_priv, id) {
> for (j = 0; j < ARRAY_SIZE(engine->batch_pool.cache_list); j++)
> {
> list_for_each_entry(obj,
> @@ -377,44 +378,47 @@ static void print_batch_pool_stats(struct seq_file *m,
> print_file_stats(m, "[k]batch pool", stats);
> }
>
> -static int per_file_ctx_stats(int idx, void *ptr, void *data)
> +static void print_context_stats(struct seq_file *m,
> + struct drm_i915_private *i915)
> {
> - struct i915_gem_context *ctx = ptr;
> - struct intel_engine_cs *engine;
> - enum intel_engine_id id;
> + struct file_stats kstats = {};
> + struct i915_gem_context *ctx;
>
> - for_each_engine(engine, ctx->i915, id) {
> - struct intel_context *ce = to_intel_context(ctx, engine);
> + list_for_each_entry(ctx, &i915->contexts.list, link) {
> + struct intel_engine_cs *engine;
> + enum intel_engine_id id;
>
> - if (ce->state)
> - per_file_stats(0, ce->state->obj, data);
> - if (ce->ring)
> - per_file_stats(0, ce->ring->vma->obj, data);
> - }
> + for_each_engine(engine, i915, id) {
> + struct intel_context *ce = to_intel_context(ctx,
> engine);
>
> - return 0;
> -}
> + if (ce->state)
> + per_file_stats(0, ce->state->obj, &kstats);
> + if (ce->ring)
> + per_file_stats(0, ce->ring->vma->obj, &kstats);
> + }
>
> -static void print_conte
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/6] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks (rev3)
== Series Details == Series: series starting with [v2,1/6] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks (rev3) URL : https://patchwork.freedesktop.org/series/54692/ State : failure == Summary == Applying: drm/i915/psr: Allow PSR2 to be enabled when debugfs asks Applying: drm/i915: Refactor PSR status debugfs error: corrupt patch at line 10 error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0002 drm/i915: Refactor PSR status debugfs When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 3/6] drm/i915/psr: Make intel_psr_set_debugfs_mode() only handle PSR mode
On Fri, 2019-01-04 at 07:53 +0100, Maarten Lankhorst wrote:
> Op 03-01-2019 om 15:21 schreef José Roberto de Souza:
> > intel_psr_set_debugfs_mode() don't just handle the PSR mode but it
> > is
> > also handling input validation, setting the new debug value and
> > changing PSR IRQ masks.
> > Lets move the roles listed above to the caller to make the function
> > name and what it does accurate.
> >
> > Cc: Dhinakaran Pandiyan
> > Cc: Rodrigo Vivi
> > Cc: Maarten Lankhorst
> > Signed-off-by: José Roberto de Souza
> > ---
> > drivers/gpu/drm/i915/i915_debugfs.c | 22 --
> > drivers/gpu/drm/i915/intel_drv.h| 2 +-
> > drivers/gpu/drm/i915/intel_psr.c| 26 ++---
> > -
> > 3 files changed, 31 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> > b/drivers/gpu/drm/i915/i915_debugfs.c
> > index 1a31921598e7..77b097b50fd5 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -2639,19 +2639,29 @@ i915_edp_psr_debug_set(void *data, u64 val)
> > {
> > struct drm_i915_private *dev_priv = data;
> > struct drm_modeset_acquire_ctx ctx;
> > - int ret;
> > + const u32 mode = val & I915_PSR_DEBUG_MODE_MASK;
> > + int ret = 0;
> >
> > if (!CAN_PSR(dev_priv))
> > return -ENODEV;
> >
> > DRM_DEBUG_KMS("Setting PSR debug to %llx\n", val);
> >
> > + if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_MODE_MASK) ||
> > + mode > I915_PSR_DEBUG_FORCE_PSR1) {
> > + DRM_DEBUG_KMS("Invalid debug mask %llx\n", val);
> > + return -EINVAL;
> > + }
>
> This would only work for (psr.debug & MASK) == (val & MASK).
>
> So you need to take the lock before you can be sure.
>
> While at it, you probably also need the intel_runtime_pm_get()
> reference.. so you really don't complicate locking much.
>
> I would honestly just grab the extra locks unnecessarily for
> simplicity. It's only used from debugfs after all.
Thanks for the catch.
Something like this?
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 938ad2107ead..3a6ccf815ee1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2656,11 +2656,13 @@ i915_edp_psr_debug_set(void *data, u64 val)
return -EINVAL;
}
- if (!mode)
- goto skip_mode;
-
intel_runtime_pm_get(dev_priv);
+ mutex_lock(&dev_priv->psr.lock);
+ if (mode == (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK))
+ goto skip_mode;
+ mutex_unlock(&dev_priv->psr.lock);
+
drm_modeset_acquire_init(&ctx,
DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
retry:
@@ -2674,8 +2676,6 @@ i915_edp_psr_debug_set(void *data, u64 val)
drm_modeset_drop_locks(&ctx);
drm_modeset_acquire_fini(&ctx);
- intel_runtime_pm_put(dev_priv);
-
skip_mode:
if (!ret) {
mutex_lock(&dev_priv->psr.lock);
@@ -2684,6 +2684,8 @@ i915_edp_psr_debug_set(void *data, u64 val)
mutex_unlock(&dev_priv->psr.lock);
}
+ intel_runtime_pm_put(dev_priv);
+
return ret;
}
>
> > +
> > + if (!mode)
> > + goto skip_mode;
> > +
> > intel_runtime_pm_get(dev_priv);
> >
> > drm_modeset_acquire_init(&ctx,
> > DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
> >
> > retry:
> > - ret = intel_psr_set_debugfs_mode(dev_priv, &ctx, val);
> > + ret = intel_psr_set_debugfs_mode(dev_priv, &ctx, mode);
> > if (ret == -EDEADLK) {
> > ret = drm_modeset_backoff(&ctx);
> > if (!ret)
> > @@ -2663,6 +2673,14 @@ i915_edp_psr_debug_set(void *data, u64 val)
> >
> > intel_runtime_pm_put(dev_priv);
> >
> > +skip_mode:
> > + if (!ret) {
> > + mutex_lock(&dev_priv->psr.lock);
> > + dev_priv->psr.debug = val;
> > + intel_psr_irq_control(dev_priv, dev_priv->psr.debug);
> > + mutex_unlock(&dev_priv->psr.lock);
> > + }
> > +
> > return ret;
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 1a11c2beb7f3..2367f07ba29e 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -2063,7 +2063,7 @@ void intel_psr_disable(struct intel_dp
> > *intel_dp,
> > const struct intel_crtc_state *old_crtc_state);
> > int intel_psr_set_debugfs_mode(struct drm_i915_private *dev_priv,
> >struct drm_modeset_acquire_ctx *ctx,
> > - u64 value);
> > + u32 mode);
> > void intel_psr_invalidate(struct drm_i915_private *dev_priv,
> > unsigned frontbuffer_bits,
> > enum fb_op_origin origin);
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 0ef6c5f8c298..bba4f7da68b3 100644
> > --- a/driver
Re: [Intel-gfx] [PATCH 29/39] drm/i915: Use b->irq_enable() as predicate for mock engine
On 04/01/2019 12:13, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-01-02 15:21:21) diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index 36177546f68b..7b80a087cc32 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -917,6 +917,9 @@ static bool ring_is_idle(struct intel_engine_cs *engine) intel_wakeref_t wakeref; bool idle = true; + if (I915_SELFTEST_ONLY(!engine->mmio_base)) + return true; Seems to make sense, but shouldn't the patch title be "Use engine->mmio_base as predicate for mock engine hw access"? But we use b->irq_enable for the important bit. You mean in irq_enable/disable helpers? But that's the same before and after the patch. The change seems to be dropping of selftests specific variable in favour of engine->mmio_base. Am I blind again? Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb (rev2)
== Series Details == Series: drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb (rev2) URL : https://patchwork.freedesktop.org/series/54721/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363_full -> Patchwork_11185_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11185_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11185_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11185_full: ### IGT changes ### Warnings * igt@kms_atomic_transition@2x-modeset-transitions-fencing: - shard-hsw: PASS -> SKIP Known issues Here are the changes found in Patchwork_11185_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge: - shard-skl: NOTRUN -> FAIL [fdo#104671] * igt@kms_color@pipe-a-ctm-0-5: - shard-apl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +4 * igt@kms_cursor_crc@cursor-128x128-dpms: - shard-glk: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-64x21-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_legacy@all-pipes-torture-bo: - shard-hsw: PASS -> DMESG-WARN [fdo#107122] * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-glk: PASS -> FAIL [fdo#103167] +2 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +6 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes: - shard-skl: NOTRUN -> FAIL [fdo#103166] * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-glk: PASS -> FAIL [fdo#103166] +1 - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: NOTRUN -> FAIL [fdo#103166] * igt@kms_psr@no_drrs: - shard-iclb: PASS -> FAIL [fdo#108341] * igt@kms_rmfb@close-fd: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +1 * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: PASS -> DMESG-WARN [fdo#105763] / [fdo#106538] * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@kms_vblank@pipe-b-ts-continuation-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@perf_pmu@rc6-runtime-pm-long: - shard-iclb: PASS -> FAIL [fdo#105010] * igt@pm_rpm@fences-dpms: - shard-skl: PASS -> INCOMPLETE [fdo#107807] * igt@pm_rpm@legacy-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] * igt@pm_rpm@modeset-non-lpsp-stress-no-wait: - shard-iclb: SKIP -> INCOMPLETE [fdo#108840] * igt@pm_rpm@universal-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] / [fdo#108756] * igt@pm_rps@min-max-config-loaded: - shard-apl: PASS -> FAIL [fdo#102250] - shard-skl: PASS -> FAIL [fdo#102250] * igt@pm_rps@waitboost: - shard-iclb: NOTRUN -> FAIL [fdo#102250] / [fdo#108059] Possible fixes * igt@gem_userptr_blits@readonly-unsync: -
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Save some lines of source code in workarounds
On 04/01/2019 12:01, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-01-04 11:40:53) From: Tvrtko Ursulin No functional or code size change - just notice we can compact the source by re-using a single helper for adding workarounds. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_workarounds.c | 32 +--- 1 file changed, 6 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index ffc96c8b849b..a8161324108d 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -142,7 +142,8 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa) } static void -__wa_add(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, u32 val) +wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) This looked odd, since I was thinking that __wa_add() remained the better name for adding the actual i915_wa_list, but __wa_add() is just perplexingly the wrapper for _wa_add() For both, Reviewed-by: Chris Wilson I am not too proud with my used of single and double underscores here. :I And I was also thinking about why not just keep __wa_add as the common adder. Even had a version with _wa_add renamed to __wa_add, and then _wa_add etc. Maybe I need to have another go at it. Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move workaround infrastructure code up
== Series Details == Series: series starting with [1/2] drm/i915: Move workaround infrastructure code up URL : https://patchwork.freedesktop.org/series/54739/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363 -> Patchwork_11186 Summary --- **WARNING** Minor unknown changes coming with Patchwork_11186 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11186, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/54739/revisions/1/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11186: ### IGT changes ### Warnings * igt@prime_vgem@basic-fence-flip: - fi-hsw-4770:PASS -> SKIP +2 Known issues Here are the changes found in Patchwork_11186 that come from known issues: ### IGT changes ### Possible fixes * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: DMESG-WARN [fdo#102614] -> PASS * igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 Participating hosts (47 -> 44) -- Additional (3): fi-byt-n2820 fi-apl-guc fi-pnv-d510 Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 Build changes - * Linux: CI_DRM_5363 -> Patchwork_11186 CI_DRM_5363: f141806c68e4cbd56e3a5a582eb1a6f5b7edfc84 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11186: 93258f9d34890d3d299ec90efdb483c3ed21a6ef @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 93258f9d3489 drm/i915: Save some lines of source code in workarounds 0774a950e1ef drm/i915: Move workaround infrastructure code up == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11186/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb (rev2)
== Series Details == Series: drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb (rev2) URL : https://patchwork.freedesktop.org/series/54721/ State : success == Summary == CI Bug Log - changes from CI_DRM_5363 -> Patchwork_11185 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/54721/revisions/2/mbox/ Known issues Here are the changes found in Patchwork_11185 that come from known issues: ### IGT changes ### Issues hit * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362] Possible fixes * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: FAIL [fdo#108767] -> PASS * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767 Participating hosts (47 -> 44) -- Additional (3): fi-byt-n2820 fi-apl-guc fi-pnv-d510 Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 Build changes - * Linux: CI_DRM_5363 -> Patchwork_11185 CI_DRM_5363: f141806c68e4cbd56e3a5a582eb1a6f5b7edfc84 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11185: d50ab641c85ae60d8335e484eb2170202361053e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == d50ab641c85a drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11185/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 29/39] drm/i915: Use b->irq_enable() as predicate for mock engine
Quoting Tvrtko Ursulin (2019-01-02 15:21:21) > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c > > b/drivers/gpu/drm/i915/intel_engine_cs.c > > index 36177546f68b..7b80a087cc32 100644 > > --- a/drivers/gpu/drm/i915/intel_engine_cs.c > > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c > > @@ -917,6 +917,9 @@ static bool ring_is_idle(struct intel_engine_cs *engine) > > intel_wakeref_t wakeref; > > bool idle = true; > > > > + if (I915_SELFTEST_ONLY(!engine->mmio_base)) > > + return true; > > Seems to make sense, but shouldn't the patch title be "Use > engine->mmio_base as predicate for mock engine hw access"? But we use b->irq_enable for the important bit. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Save some lines of source code in workarounds
Quoting Tvrtko Ursulin (2019-01-04 11:40:53) > From: Tvrtko Ursulin > > No functional or code size change - just notice we can compact the source > by re-using a single helper for adding workarounds. > > Signed-off-by: Tvrtko Ursulin > --- > drivers/gpu/drm/i915/intel_workarounds.c | 32 +--- > 1 file changed, 6 insertions(+), 26 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c > b/drivers/gpu/drm/i915/intel_workarounds.c > index ffc96c8b849b..a8161324108d 100644 > --- a/drivers/gpu/drm/i915/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > @@ -142,7 +142,8 @@ static void _wa_add(struct i915_wa_list *wal, const > struct i915_wa *wa) > } > > static void > -__wa_add(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, u32 val) > +wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > + u32 val) This looked odd, since I was thinking that __wa_add() remained the better name for adding the actual i915_wa_list, but __wa_add() is just perplexingly the wrapper for _wa_add() For both, Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb (rev2)
== Series Details ==
Series: drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb (rev2)
URL : https://patchwork.freedesktop.org/series/54721/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d50ab641c85a drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb
-:7: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#7:
more efficacious workaround seems to be commit 476af9c26063 ("drm/i915/gen6:
-:12: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 476af9c26063 ("drm/i915/gen6:
Flush RING_IMR changes before changing the global GT IMR")'
#12:
References: 476af9c26063 ("drm/i915/gen6: Flush RING_IMR changes before
changing the global GT IMR")
total: 1 errors, 1 warnings, 0 checks, 84 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: Move workaround infrastructure code up
From: Tvrtko Ursulin
Top comment in intel_workarounds.c says common code should come first so
lets respect that. Also, by moving the common code together opportunities
to reduce duplication will become more obvious.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_workarounds.c | 74
1 file changed, 37 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index 480c53a2ecb5..ffc96c8b849b 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -153,6 +153,43 @@ __wa_add(struct i915_wa_list *wal, i915_reg_t reg, u32
mask, u32 val)
_wa_add(wal, &wa);
}
+static void
+wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
+{
+ struct i915_wa wa = {
+ .reg = reg,
+ .mask = val,
+ .val = _MASKED_BIT_ENABLE(val)
+ };
+
+ _wa_add(wal, &wa);
+}
+
+static void
+wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask,
+ u32 val)
+{
+ struct i915_wa wa = {
+ .reg = reg,
+ .mask = mask,
+ .val = val
+ };
+
+ _wa_add(wal, &wa);
+}
+
+static void
+wa_write(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
+{
+ wa_write_masked_or(wal, reg, ~0, val);
+}
+
+static void
+wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
+{
+ wa_write_masked_or(wal, reg, val, val);
+}
+
#define WA_REG(addr, mask, val) __wa_add(wal, (addr), (mask), (val))
#define WA_SET_BIT_MASKED(addr, mask) \
@@ -602,43 +639,6 @@ int intel_engine_emit_ctx_wa(struct i915_request *rq)
return 0;
}
-static void
-wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
-{
- struct i915_wa wa = {
- .reg = reg,
- .mask = val,
- .val = _MASKED_BIT_ENABLE(val)
- };
-
- _wa_add(wal, &wa);
-}
-
-static void
-wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask,
- u32 val)
-{
- struct i915_wa wa = {
- .reg = reg,
- .mask = mask,
- .val = val
- };
-
- _wa_add(wal, &wa);
-}
-
-static void
-wa_write(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
-{
- wa_write_masked_or(wal, reg, ~0, val);
-}
-
-static void
-wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
-{
- wa_write_masked_or(wal, reg, val, val);
-}
-
static void gen9_gt_workarounds_init(struct drm_i915_private *i915)
{
struct i915_wa_list *wal = &i915->gt_wa_list;
--
2.19.1
___
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[Intel-gfx] [PATCH 2/2] drm/i915: Save some lines of source code in workarounds
From: Tvrtko Ursulin
No functional or code size change - just notice we can compact the source
by re-using a single helper for adding workarounds.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_workarounds.c | 32 +---
1 file changed, 6 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index ffc96c8b849b..a8161324108d 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -142,7 +142,8 @@ static void _wa_add(struct i915_wa_list *wal, const struct
i915_wa *wa)
}
static void
-__wa_add(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, u32 val)
+wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask,
+ u32 val)
{
struct i915_wa wa = {
.reg = reg,
@@ -156,26 +157,7 @@ __wa_add(struct i915_wa_list *wal, i915_reg_t reg, u32
mask, u32 val)
static void
wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val)
{
- struct i915_wa wa = {
- .reg = reg,
- .mask = val,
- .val = _MASKED_BIT_ENABLE(val)
- };
-
- _wa_add(wal, &wa);
-}
-
-static void
-wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask,
- u32 val)
-{
- struct i915_wa wa = {
- .reg = reg,
- .mask = mask,
- .val = val
- };
-
- _wa_add(wal, &wa);
+ wa_write_masked_or(wal, reg, val, _MASKED_BIT_ENABLE(val));
}
static void
@@ -190,16 +172,14 @@ wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32
val)
wa_write_masked_or(wal, reg, val, val);
}
-#define WA_REG(addr, mask, val) __wa_add(wal, (addr), (mask), (val))
-
#define WA_SET_BIT_MASKED(addr, mask) \
- WA_REG(addr, (mask), _MASKED_BIT_ENABLE(mask))
+ wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_ENABLE(mask))
#define WA_CLR_BIT_MASKED(addr, mask) \
- WA_REG(addr, (mask), _MASKED_BIT_DISABLE(mask))
+ wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_DISABLE(mask))
#define WA_SET_FIELD_MASKED(addr, mask, value) \
- WA_REG(addr, (mask), _MASKED_FIELD(mask, value))
+ wa_write_masked_or(wal, (addr), (mask), _MASKED_FIELD((mask), (value)))
static void gen8_ctx_workarounds_init(struct intel_engine_cs *engine)
{
--
2.19.1
___
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Re: [Intel-gfx] [PATCH] drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb
Quoting Mika Kuoppala (2019-01-04 09:36:05)
> Chris Wilson writes:
>
> > The additional flushes for gen7 appear to have been a red herring as the
> > more efficacious workaround seems to be commit 476af9c26063 ("drm/i915/gen6:
> > Flush RING_IMR changes before changing the global GT IMR"). Trusting the
> > updated results means we can remove the special casing for gen7_xcs and
> > reduce it to the gen6_xcs_emit_breadcrumb.
> >
> > References: 476af9c26063 ("drm/i915/gen6: Flush RING_IMR changes before
> > changing the global GT IMR")
> > Fixes: 1212bd821de8 ("drm/i915/ringbuffer: Move irq seqno barrier to the
> > GPU for gen7")
> > Testcase: igt/gem_sync
>
> This would be nice simplification but gem_sync failed on hsw. I tried to
> look at the details but the web page on shards says it has not run yet (?)
Confidence is high that's it just an aberration. Completed a clean run
on ivb, byt and now hsw (i5-4210H, gt1):
./intel-gpu-tools/tests/gem_sync
IGT-Version: 1.22-gb82dbb2 (x86_64) (Linux: 4.20.0+ x86_64)
Using Legacy submission
Completed 33717248 cycles: 4.449 us
Subtest default: SUCCESS (150.011s)
Completed 1645568 cycles: 91.193 us
Subtest idle-default: SUCCESS (150.064s)
Completed 1778688 cycles: 84.360 us
Subtest store-default: SUCCESS (150.084s)
Completed 32429 cycles
Subtest many-default: SUCCESS (161.083s)
Completed 8797184 cycles: 17.051 us
Completed 10115072 cycles: 14.830 us
Completed 9020416 cycles: 16.630 us
Completed 882 cycles: 16.940 us
Subtest forked-default: SUCCESS (150.023s)
Completed 541696 cycles: 277.192 us
Completed 541696 cycles: 277.193 us
Completed 541696 cycles: 277.193 us
Completed 541696 cycles: 277.194 us
Subtest forked-store-default: SUCCESS (150.171s)
Completed 33402880 cycles: 4.491 us
Subtest render: SUCCESS (150.018s)
Completed 1648640 cycles: 90.988 us
Subtest idle-render: SUCCESS (150.007s)
Completed 1753088 cycles: 85.574 us
Subtest store-render: SUCCESS (150.060s)
Completed 32424 cycles
Subtest many-render: SUCCESS (161.089s)
Completed 6104064 cycles: 24.574 us
Completed 10889216 cycles: 13.776 us
Completed 10352640 cycles: 14.490 us
Completed 9607168 cycles: 15.615 us
Subtest forked-render: SUCCESS (150.029s)
Completed 541696 cycles: 277.036 us
Completed 541696 cycles: 277.042 us
Completed 541696 cycles: 277.041 us
Completed 541696 cycles: 277.041 us
Subtest forked-store-render: SUCCESS (150.092s)
Completed 54293504 cycles: 2.763 us
Subtest bsd: SUCCESS (150.015s)
Completed 3308544 cycles: 45.346 us
Subtest idle-bsd: SUCCESS (150.028s)
Completed 1852416 cycles: 81.008 us
Subtest store-bsd: SUCCESS (150.090s)
Completed 33210 cycles
Subtest many-bsd: SUCCESS (161.081s)
Completed 19262464 cycles: 7.787 us
Completed 19212288 cycles: 7.808 us
Completed 19230720 cycles: 7.800 us
Completed 19190784 cycles: 7.816 us
Subtest forked-bsd: SUCCESS (150.010s)
Completed 556032 cycles: 269.790 us
Completed 556032 cycles: 269.791 us
Completed 556032 cycles: 269.791 us
Completed 556032 cycles: 269.792 us
Subtest forked-store-bsd: SUCCESS (150.027s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest bsd1: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest idle-bsd1: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest store-bsd1: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest many-bsd1: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest forked-bsd1: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest forked-store-bsd1: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest bsd2: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest idle-bsd2: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest store-bsd2: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest many-bsd2: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest forked-bsd2: SKIP (0.000s)
Test requirement not met in function gem_require_ring, file
ioctl_wrappers.c:1493:
Test requirement: gem_has_ring(fd, ring)
Subtest forked-store-bsd2: SKIP (0.000s)
Completed 53180416 cycles: 2.821 us
Subtest blt: SUC
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb
== Series Details == Series: drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb URL : https://patchwork.freedesktop.org/series/54721/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5361_full -> Patchwork_11184_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_11184_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11184_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11184_full: ### IGT changes ### Possible regressions * igt@gem_sync@basic-each: - shard-hsw: PASS -> FAIL Known issues Here are the changes found in Patchwork_11184_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_suspend@shrink: - shard-snb: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_atomic_transition@1x-modeset-transitions-fencing: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108470] * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] +2 * igt@kms_available_modes_crc@available_mode_test_crc: - shard-iclb: NOTRUN -> FAIL [fdo#106641] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_ccs@pipe-b-crc-primary-rotation-180: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_cursor_crc@cursor-128x128-random: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-128x42-sliding: - shard-apl: PASS -> FAIL [fdo#103232] - shard-glk: PASS -> FAIL [fdo#103232] * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: PASS -> FAIL [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: PASS -> FAIL [fdo#103167] +9 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: NOTRUN -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-glk: PASS -> FAIL [fdo#103167] +5 * igt@kms_frontbuffer_tracking@fbcpsr-stridechange: - shard-skl: NOTRUN -> FAIL [fdo#105683] * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: - shard-skl: NOTRUN -> FAIL [fdo#103191] / [fdo#107362] * igt@kms_plane@pixel-format-pipe-c-planes: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-apl: PASS -> FAIL [fdo#108948] * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] / [fdo#108336] +1 * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: - shard-iclb: NOTRUN -> DMESG-FAIL [fdo#107724] * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_scaling@pipe-a-scaler-with-rotation: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] * igt@kms_setmode@basic: - shard-hsw: PASS -> FAIL [fdo#99912] - shard-kbl: PASS -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-iclb: NOTRUN -> FAIL [fdo#100047] * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@perf_pmu@rc6-runtime-pm-long: - shard-iclb: NOTRUN -> FAIL [fdo#105010] * igt@pm_backlight@fade_with_dpms: - shard-iclb: NOTRUN -> INCOMPLETE [fdo#107820] * igt@pm_rpm@gem-execbuf-stress-extra-wait: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@pm_rps@min-max-config-loaded: - shard-skl: PASS -> FAIL [fdo#102250] Possible fixes * igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge: - shard-skl: FAIL [fdo#104671] -> PASS * igt@kms_color@pipe-b-ctm-max: - sha
Re: [Intel-gfx] [PATCH] drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb
Chris Wilson writes:
> The additional flushes for gen7 appear to have been a red herring as the
> more efficacious workaround seems to be commit 476af9c26063 ("drm/i915/gen6:
> Flush RING_IMR changes before changing the global GT IMR"). Trusting the
> updated results means we can remove the special casing for gen7_xcs and
> reduce it to the gen6_xcs_emit_breadcrumb.
>
> References: 476af9c26063 ("drm/i915/gen6: Flush RING_IMR changes before
> changing the global GT IMR")
> Fixes: 1212bd821de8 ("drm/i915/ringbuffer: Move irq seqno barrier to the GPU
> for gen7")
> Testcase: igt/gem_sync
This would be nice simplification but gem_sync failed on hsw. I tried to
look at the details but the web page on shards says it has not run yet (?)
-Mika
> Testcase: igt/gem_exec_whisper
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 54 -
> 1 file changed, 8 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 3d5d6b908148..2ac0c3a0d473 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -433,8 +433,8 @@ static const int gen7_rcs_emit_breadcrumb_sz = 6;
>
> static void gen6_xcs_emit_breadcrumb(struct i915_request *rq, u32 *cs)
> {
> - *cs++ = MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW;
> - *cs++ = intel_hws_seqno_address(rq->engine) | MI_FLUSH_DW_USE_GTT;
> + *cs++ = MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_STORE_INDEX;
> + *cs++ = I915_GEM_HWS_INDEX_ADDR | MI_FLUSH_DW_USE_GTT;
> *cs++ = rq->global_seqno;
> *cs++ = MI_USER_INTERRUPT;
>
> @@ -443,34 +443,6 @@ static void gen6_xcs_emit_breadcrumb(struct i915_request
> *rq, u32 *cs)
> }
> static const int gen6_xcs_emit_breadcrumb_sz = 4;
>
> -#define GEN7_XCS_WA 32
> -static void gen7_xcs_emit_breadcrumb(struct i915_request *rq, u32 *cs)
> -{
> - int i;
> -
> - *cs++ = MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW;
> - *cs++ = intel_hws_seqno_address(rq->engine) | MI_FLUSH_DW_USE_GTT;
> - *cs++ = rq->global_seqno;
> -
> - for (i = 0; i < GEN7_XCS_WA; i++) {
> - *cs++ = MI_STORE_DWORD_INDEX;
> - *cs++ = I915_GEM_HWS_INDEX_ADDR;
> - *cs++ = rq->global_seqno;
> - }
> -
> - *cs++ = MI_FLUSH_DW;
> - *cs++ = 0;
> - *cs++ = 0;
> -
> - *cs++ = MI_USER_INTERRUPT;
> - *cs++ = MI_NOOP;
> -
> - rq->tail = intel_ring_offset(rq, cs);
> - assert_ring_tail_valid(rq->ring, rq->tail);
> -}
> -static const int gen7_xcs_emit_breadcrumb_sz = 8 + GEN7_XCS_WA * 3;
> -#undef GEN7_XCS_WA
> -
> static void set_hwstam(struct intel_engine_cs *engine, u32 mask)
> {
> /*
> @@ -2267,13 +2239,8 @@ int intel_init_bsd_ring_buffer(struct intel_engine_cs
> *engine)
> engine->emit_flush = gen6_bsd_ring_flush;
> engine->irq_enable_mask = GT_BSD_USER_INTERRUPT;
>
> - if (IS_GEN(dev_priv, 6)) {
> - engine->emit_breadcrumb = gen6_xcs_emit_breadcrumb;
> - engine->emit_breadcrumb_sz =
> gen6_xcs_emit_breadcrumb_sz;
> - } else {
> - engine->emit_breadcrumb = gen7_xcs_emit_breadcrumb;
> - engine->emit_breadcrumb_sz =
> gen7_xcs_emit_breadcrumb_sz;
> - }
> + engine->emit_breadcrumb = gen6_xcs_emit_breadcrumb;
> + engine->emit_breadcrumb_sz = gen6_xcs_emit_breadcrumb_sz;
> } else {
> engine->emit_flush = bsd_ring_flush;
> if (IS_GEN(dev_priv, 5))
> @@ -2296,13 +2263,8 @@ int intel_init_blt_ring_buffer(struct intel_engine_cs
> *engine)
> engine->emit_flush = gen6_ring_flush;
> engine->irq_enable_mask = GT_BLT_USER_INTERRUPT;
>
> - if (IS_GEN(dev_priv, 6)) {
> - engine->emit_breadcrumb = gen6_xcs_emit_breadcrumb;
> - engine->emit_breadcrumb_sz = gen6_xcs_emit_breadcrumb_sz;
> - } else {
> - engine->emit_breadcrumb = gen7_xcs_emit_breadcrumb;
> - engine->emit_breadcrumb_sz = gen7_xcs_emit_breadcrumb_sz;
> - }
> + engine->emit_breadcrumb = gen6_xcs_emit_breadcrumb;
> + engine->emit_breadcrumb_sz = gen6_xcs_emit_breadcrumb_sz;
>
> return intel_init_ring_buffer(engine);
> }
> @@ -2320,8 +2282,8 @@ int intel_init_vebox_ring_buffer(struct intel_engine_cs
> *engine)
> engine->irq_enable = hsw_vebox_irq_enable;
> engine->irq_disable = hsw_vebox_irq_disable;
>
> - engine->emit_breadcrumb = gen7_xcs_emit_breadcrumb;
> - engine->emit_breadcrumb_sz = gen7_xcs_emit_breadcrumb_sz;
> + engine->emit_breadcrumb = gen6_xcs_emit_breadcrumb;
> + engine->emit_breadcrumb_sz = gen6_xcs_emit_breadcrumb_sz;
>
> return intel_init_ring_buffer(engine);
> }
> --
> 2.20.1
>
> ___
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> Intel-gfx@lists.freedesktop.org
> http
Re: [Intel-gfx] [PATCH] drm/i915: Do not allow unwedging following a failed driver initialisation
Chris Wilson writes:
> If we declare the driver wedged during early initialisation, we leave
> the driver in an undefined state (with respect to GEM execution). As
> this leads to unexpected behaviour if we allow the user to unwedge the
> device (through debugfs, and performed by igt at test start), do not.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 943569487687..a08d70752cb2 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3380,6 +3380,9 @@ bool i915_gem_unset_wedged(struct drm_i915_private
> *i915)
> if (!test_bit(I915_WEDGED, &i915->gpu_error.flags))
> return true;
>
> + if (!i915->gt.scratch) /* Never full initialised, recovery impossible */
> + return false;
> +
> GEM_TRACE("start\n");
>
> /*
> --
> 2.20.1
>
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Re: [Intel-gfx] iommu_intel or i915 regression in 4.18, 4.19.12 and drm-tip
Quoting Eric Wong (2019-01-04 03:06:26)
> Joonas Lahtinen wrote:
> > Quoting Eric Wong (2018-12-27 13:49:48)
> > > I just got a used Thinkpad X201 (Core i5 M 520, Intel QM57
> > > chipset) and hit some kernel panics while trying to view
> > > image/animation-intensive stuff in Firefox (X11) unless I use
> > > "iommu_intel=igfx_off".
> > >
> > > With Debian stable backport kernels, "linux-image-4.17.0-0.bpo.3-amd64"
> > > (4.17.17-1~bpo9+1) has no problems. But
> > > "linux-image-4.18.0-0.bpo.3-amd64"
> > > (4.18.20-2~bpo9+1) gives a blank screen before I can login via agetty
> > > and run startx.
>
> > Most confusing about this is that 4.17 would have worked to begin with,
> > without intel_iommu=igfx_off (unless it was the default for older
> > kernel?)
>
> Yeah, so the Debian bpo 4.17(.17) kernel did not set
> CONFIG_INTEL_IOMMU_DEFAULT_ON, so I didn't encounter problems.
> My self-built kernels all set CONFIG_INTEL_IOMMU_DEFAULT_ON.
So it's the case that IOMMU never worked on your machine.
My recommendation would be to simply use intel_iommu=igfx_off if you
need IOMMU.
Old hardware is known to have issues with IOMMU, and retroactively
enabling IOMMU on those machines just brings them up :/
Regards, Joonas
> Booting the Debian 4.17 kernel with "intel_iommu=on" gives the
> same hanging problem I hit with self-built 4.19.{12,13} kernels.
>
> I'm not sure how far back the problem goes (maybe forever),
> since I only got this hardware. Not sure what's the problem
> with Debian 4.18, either; but (self-built) 4.19.13 is fine w/o
> CONFIG_INTEL_IOMMU_DEFAULT_ON.
>
> Debian backports doesn't have kernels for 4.19 or 4.20, yet.
>
> > Did you maybe update other parts of the system while updating the
> > kernel?
>
> Definitely not; just the kernel + headers ("make bindeb-pkg)".
>
> > If you could attach full boot dmesg from working and non-working kernel +
> > have config file of both kernel's in Bugzilla. That'd be a good start!
>
> Sorry, I get anxiety attacks when it comes to logins and forms.
> Anyways, I managed to get the Debian kernel dmesg output uploaded
> with and without iommu_intel=on:
> https://bugs.freedesktop.org/attachment.cgi?bugid=109219
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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb
== Series Details == Series: drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb URL : https://patchwork.freedesktop.org/series/54721/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5361_full -> Patchwork_11184_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_11184_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11184_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11184_full: ### IGT changes ### Possible regressions * igt@gem_sync@basic-each: - shard-hsw: PASS -> FAIL Known issues Here are the changes found in Patchwork_11184_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_suspend@shrink: - shard-snb: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_atomic_transition@1x-modeset-transitions-fencing: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108470] * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] +2 * igt@kms_available_modes_crc@available_mode_test_crc: - shard-iclb: NOTRUN -> FAIL [fdo#106641] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_ccs@pipe-b-crc-primary-rotation-180: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_cursor_crc@cursor-128x128-random: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-128x42-sliding: - shard-apl: PASS -> FAIL [fdo#103232] - shard-glk: PASS -> FAIL [fdo#103232] * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: PASS -> FAIL [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: PASS -> FAIL [fdo#103167] +9 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: NOTRUN -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-glk: PASS -> FAIL [fdo#103167] +5 * igt@kms_frontbuffer_tracking@fbcpsr-stridechange: - shard-skl: NOTRUN -> FAIL [fdo#105683] * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: - shard-skl: NOTRUN -> FAIL [fdo#103191] / [fdo#107362] * igt@kms_plane@pixel-format-pipe-c-planes: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-apl: PASS -> FAIL [fdo#108948] * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] / [fdo#108336] +1 * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: - shard-iclb: NOTRUN -> DMESG-FAIL [fdo#107724] * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_scaling@pipe-a-scaler-with-rotation: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] * igt@kms_setmode@basic: - shard-hsw: PASS -> FAIL [fdo#99912] - shard-kbl: PASS -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-iclb: NOTRUN -> FAIL [fdo#100047] * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@perf_pmu@rc6-runtime-pm-long: - shard-iclb: NOTRUN -> FAIL [fdo#105010] * igt@pm_backlight@fade_with_dpms: - shard-iclb: NOTRUN -> INCOMPLETE [fdo#107820] * igt@pm_rpm@gem-execbuf-stress-extra-wait: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@pm_rps@min-max-config-loaded: - shard-skl: PASS -> FAIL [fdo#102250] Possible fixes * igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge: - shard-skl: FAIL [fdo#104671] -> PASS * igt@kms_color@pipe-b-ctm-max: - sha
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb
== Series Details == Series: drm/i915/ringbuffer: Drop gen7_xcs_emit_breadcrumb URL : https://patchwork.freedesktop.org/series/54721/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5361_full -> Patchwork_11184_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_11184_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11184_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11184_full: ### IGT changes ### Possible regressions * igt@gem_sync@basic-each: - shard-hsw: PASS -> FAIL Known issues Here are the changes found in Patchwork_11184_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_suspend@shrink: - shard-snb: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_atomic_transition@1x-modeset-transitions-fencing: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108470] * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] +2 * igt@kms_available_modes_crc@available_mode_test_crc: - shard-iclb: NOTRUN -> FAIL [fdo#106641] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_ccs@pipe-b-crc-primary-rotation-180: - shard-iclb: NOTRUN -> FAIL [fdo#107725] * igt@kms_cursor_crc@cursor-128x128-random: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-128x42-sliding: - shard-apl: PASS -> FAIL [fdo#103232] - shard-glk: PASS -> FAIL [fdo#103232] * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: PASS -> FAIL [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: PASS -> FAIL [fdo#103167] +9 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: NOTRUN -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-glk: PASS -> FAIL [fdo#103167] +5 * igt@kms_frontbuffer_tracking@fbcpsr-stridechange: - shard-skl: NOTRUN -> FAIL [fdo#105683] * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: - shard-skl: NOTRUN -> FAIL [fdo#103191] / [fdo#107362] * igt@kms_plane@pixel-format-pipe-c-planes: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-apl: PASS -> FAIL [fdo#108948] * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] / [fdo#108336] +1 * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: - shard-iclb: NOTRUN -> DMESG-FAIL [fdo#107724] * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_scaling@pipe-a-scaler-with-rotation: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] * igt@kms_setmode@basic: - shard-hsw: PASS -> FAIL [fdo#99912] - shard-kbl: PASS -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-iclb: NOTRUN -> FAIL [fdo#100047] * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@perf_pmu@rc6-runtime-pm-long: - shard-iclb: NOTRUN -> FAIL [fdo#105010] * igt@pm_backlight@fade_with_dpms: - shard-iclb: NOTRUN -> INCOMPLETE [fdo#107820] * igt@pm_rpm@gem-execbuf-stress-extra-wait: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@pm_rps@min-max-config-loaded: - shard-skl: PASS -> FAIL [fdo#102250] Possible fixes * igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge: - shard-skl: FAIL [fdo#104671] -> PASS * igt@kms_color@pipe-b-ctm-max: - sha
