Re: [Intel-gfx] [v4 07/12] drm: Enable HDR infoframe support
Hi Uma, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on v5.0-rc1 next-20190108] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Uma-Shankar/Add-HDR-Metadata-Parsing-and-handling-in-DRM-layer/20190109-051130 reproduce: make htmldocs All warnings (new ones prefixed by >>): include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.active' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.active' not described in 'dma_buf' include/linux/dma-fence-array.h:54: warning: Function parameter or member 'work' not described in 'dma_fence_array' include/linux/firmware/intel/stratix10-svc-client.h:1: warning: no structured comments found include/linux/gpio/driver.h:371: warning: Function parameter or member 'init_valid_mask' not described in 'gpio_chip' include/linux/iio/hw-consumer.h:1: warning: no structured comments found include/linux/input/sparse-keymap.h:46: warning: Function parameter or member 'sw' not described in 'key_entry' drivers/mtd/nand/raw/nand_base.c:420: warning: Function parameter or member 'chip' not described in 'nand_fill_oob' drivers/mtd/nand/raw/nand_bbt.c:173: warning: Function parameter or member 'this' not described in 'read_bbt' drivers/mtd/nand/raw/nand_bbt.c:173: warning: Excess function parameter 'chip' description in 'read_bbt' include/linux/regulator/machine.h:199: warning: Function parameter or member 'max_uV_step' not described in 'regulation_constraints' include/linux/regulator/driver.h:228: warning: Function parameter or member 'resume' not described in 'regulator_ops' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw0' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw1' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw2' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw3' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.eadm' not described in 'irb' drivers/slimbus/stream.c:1: warning: no structured comments found include/linux/spi/spi.h:180: warning: Function parameter or member 'driver_override' not described in 'spi_device' drivers/target/target_core_device.c:1: warning: no structured comments found drivers/usb/typec/bus.c:1: warning: no structured comments found drivers/usb/typec/class.c:1: warning: no structured comments found include/linux/w1.h:281: warning: Function parameter or member 'of_match_table' not described in 'w1_family' fs/direct-io.c:257: warning: Excess function parameter 'offset' description in 'dio_complete' fs/file_table.c:1: warning: no structured comments found fs/libfs.c:477: warning: Excess function parameter 'available' description in 'simple_write_end' fs/posix_acl.c:646: warning: Function parameter or member 'inode' not described in 'posix_acl_update_mode' fs/posix_acl.c:646: warning: Function parameter or member 'mode_p' not described in 'posix_acl_update_mode' fs/posix_acl.c:646: warning: Function parameter or member 'acl' not described in 'posix_acl_update_mode' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:294: warning: Excess function parameter 'mm' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:294: warning: Excess function parameter 'start' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:294: warning: Excess function parameter 'end' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:343: warning: Excess function parameter 'mm' description in 'amdgpu_mn_invalidate_range_end' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:343: warning: Excess function parameter 'start' description in 'amdgpu_mn_invalidate_range_end'
[Intel-gfx] [PULL] gvt-fixes for 5.0-rc2
Hi, Here's one race fix for gvt to handle request properly between pre-scan of workload and submission. Thanks. -- The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c: Linux 5.0-rc1 (2019-01-06 17:08:20 -0800) are available in the Git repository at: https://github.com/intel/gvt-linux.git tags/gvt-fixes-2019-01-09 for you to fetch changes up to f0e9943725186ddbdc9718a559c26c5f507262f2: drm/i915/gvt: Fix workload request allocation before request add (2019-01-09 12:59:09 +0800) gvt-fixes-2019-01-09 - Fix one race issue between pre-scan of guest workload with submission Zhenyu Wang (1): drm/i915/gvt: Fix workload request allocation before request add drivers/gpu/drm/i915/gvt/scheduler.c | 64 +++- drivers/gpu/drm/i915/gvt/scheduler.h | 1 + 2 files changed, 43 insertions(+), 22 deletions(-) -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [v4 05/12] drm: Add HDR capability field to plane structure
Hi Uma, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on v5.0-rc1 next-20190108] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Uma-Shankar/Add-HDR-Metadata-Parsing-and-handling-in-DRM-layer/20190109-051130 reproduce: make htmldocs All warnings (new ones prefixed by >>): net/mac80211/sta_info.h:590: warning: Function parameter or member 'status_stats.avg_ack_signal' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.packets' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.bytes' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.last_rate' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.msdu' not described in 'sta_info' kernel/rcu/tree.c:711: warning: Excess function parameter 'irq' description in 'rcu_nmi_exit' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.active' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.active' not described in 'dma_buf' include/linux/dma-fence-array.h:54: warning: Function parameter or member 'work' not described in 'dma_fence_array' include/linux/firmware/intel/stratix10-svc-client.h:1: warning: no structured comments found include/linux/gpio/driver.h:371: warning: Function parameter or member 'init_valid_mask' not described in 'gpio_chip' include/linux/iio/hw-consumer.h:1: warning: no structured comments found include/linux/input/sparse-keymap.h:46: warning: Function parameter or member 'sw' not described in 'key_entry' drivers/mtd/nand/raw/nand_base.c:420: warning: Function parameter or member 'chip' not described in 'nand_fill_oob' drivers/mtd/nand/raw/nand_bbt.c:173: warning: Function parameter or member 'this' not described in 'read_bbt' drivers/mtd/nand/raw/nand_bbt.c:173: warning: Excess function parameter 'chip' description in 'read_bbt' include/linux/regulator/machine.h:199: warning: Function parameter or member 'max_uV_step' not described in 'regulation_constraints' include/linux/regulator/driver.h:228: warning: Function parameter or member 'resume' not described in 'regulator_ops' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw0' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw1' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw2' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw3' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.eadm' not described in 'irb' drivers/slimbus/stream.c:1: warning: no structured comments found include/linux/spi/spi.h:180: warning: Function parameter or member 'driver_override' not described in 'spi_device' drivers/target/target_core_device.c:1: warning: no structured comments found drivers/usb/typec/bus.c:1: warning: no structured comments found drivers/usb/typec/class.c:1: warning: no structured comments found include/linux/w1.h:281: warning: Function parameter or member 'of_match_table' not described in 'w1_family' fs/direct-io.c:257: warning: Excess function parameter 'offset' description in 'dio_complete' fs/file_table.c:1: warning: no structured comments found fs/libfs.c:477: warning: Excess function parameter 'available' description in 'simple_write_end' fs/posix_acl.c:646: warning: Function parameter or member 'inode' not described in 'posix_acl_update_
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915/backlight: Restore backlight on resume, v3.
== Series Details == Series: series starting with [1/5] drm/i915/backlight: Restore backlight on resume, v3. URL : https://patchwork.freedesktop.org/series/54896/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5378_full -> Patchwork_11255_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_11255_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11255_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11255_full: ### IGT changes ### Possible regressions * igt@gem_exec_whisper@normal: - shard-skl: PASS -> INCOMPLETE * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb: - shard-iclb: PASS -> FAIL Known issues Here are the changes found in Patchwork_11255_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +3 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_cursor_crc@cursor-256x85-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] +3 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +5 * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-skl: NOTRUN -> FAIL [fdo#105683] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-skl: NOTRUN -> FAIL [fdo#103167] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: - shard-skl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-x: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-kbl: NOTRUN -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] * igt@kms_setmode@basic: - shard-kbl: NOTRUN -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-iclb: PASS -> FAIL [fdo#100047] * igt@perf_pmu@rc6-runtime-pm-long: - shard-skl: PASS -> FAIL [fdo#105010] * igt@pm_rpm@fences-dpms: - shard-skl: PASS -> INCOMPLETE [fdo#107807] +1 * igt@pm_rpm@universal-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] Possible fixes * igt@i915_selftest@live_workarounds: - shard-iclb: DMESG-FAIL [fdo#108954] -> PASS * igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#109225] -> PASS +1 * igt@kms_available_modes_crc@available_mode_test_crc: - shard-apl: FAIL [fdo#106641] -> PASS * igt@kms_color@pipe-c-legacy-gamma: - shard-apl: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS * igt@kms_cursor_crc@cursor-256x85-random: - shard-apl: FAIL [fdo#103232] -> PASS +2 * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-glk: FAIL [fdo#103232] -> PASS +2 * igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: - shard-iclb: WARN [fdo#108336] -> PASS +4 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: DMESG-FAIL [fdo#107724] -> PASS +5 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-iclb: DMESG-FAIL [fdo#107720] / [fdo#107724] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: FAIL [fdo#103167] -> PASS +4 - shard-glk: FAIL [fdo#103167] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb
Re: [Intel-gfx] [v4 03/12] drm: Parse Colorimetry data block from EDID
Hi Uma, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on v5.0-rc1 next-20190108] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Uma-Shankar/Add-HDR-Metadata-Parsing-and-handling-in-DRM-layer/20190109-051130 reproduce: make htmldocs All warnings (new ones prefixed by >>): net/mac80211/sta_info.h:590: warning: Function parameter or member 'status_stats.avg_ack_signal' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.packets' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.bytes' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.last_rate' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.msdu' not described in 'sta_info' kernel/rcu/tree.c:711: warning: Excess function parameter 'irq' description in 'rcu_nmi_exit' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.active' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.active' not described in 'dma_buf' include/linux/dma-fence-array.h:54: warning: Function parameter or member 'work' not described in 'dma_fence_array' include/linux/firmware/intel/stratix10-svc-client.h:1: warning: no structured comments found include/linux/gpio/driver.h:371: warning: Function parameter or member 'init_valid_mask' not described in 'gpio_chip' include/linux/iio/hw-consumer.h:1: warning: no structured comments found include/linux/input/sparse-keymap.h:46: warning: Function parameter or member 'sw' not described in 'key_entry' drivers/mtd/nand/raw/nand_base.c:420: warning: Function parameter or member 'chip' not described in 'nand_fill_oob' drivers/mtd/nand/raw/nand_bbt.c:173: warning: Function parameter or member 'this' not described in 'read_bbt' drivers/mtd/nand/raw/nand_bbt.c:173: warning: Excess function parameter 'chip' description in 'read_bbt' include/linux/regulator/machine.h:199: warning: Function parameter or member 'max_uV_step' not described in 'regulation_constraints' include/linux/regulator/driver.h:228: warning: Function parameter or member 'resume' not described in 'regulator_ops' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw0' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw1' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw2' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw3' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.eadm' not described in 'irb' drivers/slimbus/stream.c:1: warning: no structured comments found include/linux/spi/spi.h:180: warning: Function parameter or member 'driver_override' not described in 'spi_device' drivers/target/target_core_device.c:1: warning: no structured comments found drivers/usb/typec/bus.c:1: warning: no structured comments found drivers/usb/typec/class.c:1: warning: no structured comments found include/linux/w1.h:281: warning: Function parameter or member 'of_match_table' not described in 'w1_family' fs/direct-io.c:257: warning: Excess function parameter 'offset' description in 'dio_complete' fs/file_table.c:1: warning: no structured comments found fs/libfs.c:477: warning: Excess function parameter 'available' description in 'simple_write_end' fs/posix_acl.c:646: warning: Function parameter or member 'inode' not described in 'posix_acl_update_
Re: [Intel-gfx] [v4 07/12] drm: Enable HDR infoframe support
Hi Uma,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v5.0-rc1 next-20190108]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Uma-Shankar/Add-HDR-Metadata-Parsing-and-handling-in-DRM-layer/20190109-051130
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm64
All warnings (new ones prefixed by >>):
drivers/gpu//drm/mediatek/mtk_hdmi.c: In function
'mtk_hdmi_hw_send_info_frame':
>> drivers/gpu//drm/mediatek/mtk_hdmi.c:327:2: warning: enumeration value
>> 'HDMI_INFOFRAME_TYPE_DRM' not handled in switch [-Wswitch]
switch (frame_type) {
^~
vim +/HDMI_INFOFRAME_TYPE_DRM +327 drivers/gpu//drm/mediatek/mtk_hdmi.c
8f83f268 Jie Qiu 2016-01-04 300
8f83f268 Jie Qiu 2016-01-04 301 static void
mtk_hdmi_hw_send_info_frame(struct mtk_hdmi *hdmi, u8 *buffer,
8f83f268 Jie Qiu 2016-01-04 302u8 len)
8f83f268 Jie Qiu 2016-01-04 303 {
8f83f268 Jie Qiu 2016-01-04 304u32 ctrl_reg = GRL_CTRL;
8f83f268 Jie Qiu 2016-01-04 305int i;
8f83f268 Jie Qiu 2016-01-04 306u8 *frame_data;
8f83f268 Jie Qiu 2016-01-04 307enum hdmi_infoframe_type frame_type;
8f83f268 Jie Qiu 2016-01-04 308u8 frame_ver;
8f83f268 Jie Qiu 2016-01-04 309u8 frame_len;
8f83f268 Jie Qiu 2016-01-04 310u8 checksum;
8f83f268 Jie Qiu 2016-01-04 311int ctrl_frame_en = 0;
8f83f268 Jie Qiu 2016-01-04 312
8f83f268 Jie Qiu 2016-01-04 313frame_type = *buffer;
8f83f268 Jie Qiu 2016-01-04 314buffer += 1;
8f83f268 Jie Qiu 2016-01-04 315frame_ver = *buffer;
8f83f268 Jie Qiu 2016-01-04 316buffer += 1;
8f83f268 Jie Qiu 2016-01-04 317frame_len = *buffer;
8f83f268 Jie Qiu 2016-01-04 318buffer += 1;
8f83f268 Jie Qiu 2016-01-04 319checksum = *buffer;
8f83f268 Jie Qiu 2016-01-04 320buffer += 1;
8f83f268 Jie Qiu 2016-01-04 321frame_data = buffer;
8f83f268 Jie Qiu 2016-01-04 322
8f83f268 Jie Qiu 2016-01-04 323dev_dbg(hdmi->dev,
8f83f268 Jie Qiu 2016-01-04 324
"frame_type:0x%x,frame_ver:0x%x,frame_len:0x%x,checksum:0x%x\n",
8f83f268 Jie Qiu 2016-01-04 325frame_type, frame_ver,
frame_len, checksum);
8f83f268 Jie Qiu 2016-01-04 326
8f83f268 Jie Qiu 2016-01-04 @327switch (frame_type) {
8f83f268 Jie Qiu 2016-01-04 328case HDMI_INFOFRAME_TYPE_AVI:
8f83f268 Jie Qiu 2016-01-04 329ctrl_frame_en = CTRL_AVI_EN;
8f83f268 Jie Qiu 2016-01-04 330ctrl_reg = GRL_CTRL;
8f83f268 Jie Qiu 2016-01-04 331break;
8f83f268 Jie Qiu 2016-01-04 332case HDMI_INFOFRAME_TYPE_SPD:
8f83f268 Jie Qiu 2016-01-04 333ctrl_frame_en = CTRL_SPD_EN;
8f83f268 Jie Qiu 2016-01-04 334ctrl_reg = GRL_CTRL;
8f83f268 Jie Qiu 2016-01-04 335break;
8f83f268 Jie Qiu 2016-01-04 336case HDMI_INFOFRAME_TYPE_AUDIO:
8f83f268 Jie Qiu 2016-01-04 337ctrl_frame_en = CTRL_AUDIO_EN;
8f83f268 Jie Qiu 2016-01-04 338ctrl_reg = GRL_CTRL;
8f83f268 Jie Qiu 2016-01-04 339break;
8f83f268 Jie Qiu 2016-01-04 340case HDMI_INFOFRAME_TYPE_VENDOR:
8f83f268 Jie Qiu 2016-01-04 341ctrl_frame_en = VS_EN;
8f83f268 Jie Qiu 2016-01-04 342ctrl_reg = GRL_ACP_ISRC_CTRL;
8f83f268 Jie Qiu 2016-01-04 343break;
8f83f268 Jie Qiu 2016-01-04 344}
8f83f268 Jie Qiu 2016-01-04 345mtk_hdmi_clear_bits(hdmi, ctrl_reg,
ctrl_frame_en);
8f83f268 Jie Qiu 2016-01-04 346mtk_hdmi_write(hdmi, GRL_INFOFRM_TYPE,
frame_type);
8f83f268 Jie Qiu 2016-01-04 347mtk_hdmi_write(hdmi, GRL_INFOFRM_VER,
frame_ver);
8f83f268 Jie Qiu 2016-01-04 348mtk_hdmi_write(hdmi, GRL_INFOFRM_LNG,
frame_len);
8f83f268 Jie Qiu 2016-01-04 349
8f83f268 Jie Qiu 2016-01-04 350mtk_hdmi_write(hdmi, GRL_IFM_PORT,
checksum);
8f83f268 Jie Qiu 2016-01-04 351for (i = 0; i < frame_len; i++)
8f83f268 Jie Qiu 2016-01-04 352mtk_hdmi_write(hdmi,
GRL_IFM_PORT, frame_data[i]);
8f83f268 Jie Qiu 2016-01-04 353
8f83f268 Jie Qiu 2016-01-04 354mtk_hdmi_set_bits(hdmi, ctrl_reg,
ctrl_frame_en);
8f83f268 Jie Qiu 2016-01-04 355 }
8f83f268 Jie Qiu 2016-01-04 356
:: The code at line 327 was first introduced by commit
:: 8f83f26891e12570780dcfc8ae376b655915ff6d drm/mediatek: Add HDMI support
[Intel-gfx] ✓ Fi.CI.BAT: success for MST refcounting/atomic helpers cleanup (rev5)
== Series Details ==
Series: MST refcounting/atomic helpers cleanup (rev5)
URL : https://patchwork.freedesktop.org/series/54030/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5380 -> Patchwork_11258
Summary
---
**WARNING**
Minor unknown changes coming with Patchwork_11258 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_11258, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/54030/revisions/5/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_11258:
### IGT changes ###
Warnings
* igt@kms_flip@basic-flip-vs-dpms:
- fi-skl-6770hq: SKIP -> PASS +36
Known issues
Here are the changes found in Patchwork_11258 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: PASS -> DMESG-WARN [fdo#108965]
* igt@i915_selftest@live_hangcheck:
- fi-skl-guc: PASS -> DMESG-FAIL [fdo#108593]
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: PASS -> FAIL [fdo#108767]
* igt@kms_pipe_crc_basic@read-crc-pipe-b:
- fi-byt-clapper: PASS -> FAIL [fdo#107362]
* igt@pm_rpm@module-reload:
- fi-icl-u2: PASS -> DMESG-WARN [fdo#108654]
Possible fixes
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108593]: https://bugs.freedesktop.org/show_bug.cgi?id=108593
[fdo#108654]: https://bugs.freedesktop.org/show_bug.cgi?id=108654
[fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
[fdo#109241]: https://bugs.freedesktop.org/show_bug.cgi?id=109241
Participating hosts (49 -> 44)
--
Missing(5): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-y fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5380 -> Patchwork_11258
CI_DRM_5380: f7836843c875734c42d61d755d822635390ab097 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4757: 738f43a54d626f08e250c926a5aeec53458fbd3c @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11258: d6b0067e30e569204fbf1adab5df2e552713fefc @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d6b0067e30e5 drm/nouveau: Use atomic VCPI helpers for MST
1acb8253f5b7 drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()
9077cacf44e8 drm/dp_mst: Start tracking per-port VCPI allocations
d1f83b76bee9 drm/dp_mst: Add some atomic state iterator macros
01a9632ebf65 drm/nouveau: Grab payload lock in nv50_msto_payload()
916a684cd19b drm/nouveau: Stop unsetting mstc->port, use malloc refs
a7f4c8e68b5d drm/nouveau: Keep malloc references to MST ports
171456c757e5 drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup()
523545b36c93 drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector()
f0300e01a8cf drm/amdgpu/display: Keep malloc ref to MST port
89d20c7c627b drm/i915: Keep malloc references to MST ports
33e82d971527 drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs
11a9df239381 drm/dp_mst: Stop releasing VCPI when removing ports from topology
a1f9438797bb drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref
fails
f212460470bf drm/dp_mst: Introduce new refcounting scheme for mstbs and ports
bc368b90cb12 drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and
friends
0b7daea7eab8 drm/dp_mst: Fix some formatting in drm_dp_mst_deallocate_vcpi()
f7a476bd0e0f drm/dp_mst: Fix some formatting in drm_dp_mst_allocate_vcpi()
2fd355b3a9aa drm/dp_mst: Fix some formatting in drm_dp_payload_send_msg()
5778d100cac7 drm/dp_mst: Fix some formatting in drm_dp_add_port()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11258/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Enable render context support for Ironlake (gen5) (rev2)
== Series Details == Series: series starting with [1/2] drm/i915: Enable render context support for Ironlake (gen5) (rev2) URL : https://patchwork.freedesktop.org/series/54876/ State : failure == Summary == Applying: drm/i915: Enable render context support for Ironlake (gen5) Applying: drm/i915: Enable render context support for gen4 (Broadwater to Cantiga) error: corrupt patch at line 21 error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0002 drm/i915: Enable render context support for gen4 (Broadwater to Cantiga) When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)
Quoting Chris Wilson (2019-01-08 12:28:18) > Broadwater and the rest of gen4 do support being able to saving and > reloading context specific registers between contexts, providing isolation > of the basic GPU state (as programmable by userspace). This allows > userspace to assume that the GPU retains their state from one batch to the > next, minimising the amount of state it needs to reload and manually save > across batches. Well Crestline's render context contains a nasty booby trap. [ 152.065764] hangcheck rcs0 [ 152.065770] hangcheckcurrent seqno 1b89, last 1bc5, hangcheck 1b89 [5984 ms] [ 152.065773] hangcheckReset count: 0 (global 0) [ 152.065774] hangcheckRequests: [ 152.065779] hangcheckfirst 1b8a* [5:1b8a] @ 7376ms: rcs0 [ 152.065783] hangchecklast 1bc5+ [5:1bc5] @ 7328ms: rcs0 [ 152.065786] hangcheckactive 1b8a* [5:1b8a] @ 7376ms: rcs0 [ 152.065789] hangcheckring->start: 0x4000 [ 152.065792] hangcheckring->head: 0x00017dd0 [ 152.065794] hangcheckring->tail: 0x00019fb0 [ 152.065795] hangcheckring->emit: 0x00019fb0 [ 152.065797] hangcheckring->space: 0x50a0 [ 152.065801] hangcheck [head 17df0, postfix 17e60, tail 17e80, batch 0x_00335000]: [ 152.065809] hangcheck [] 0202 7a004002 1fffe004 0200 0200 0200 [ 152.065813] hangcheck [0020] 0200 0200 0200 0200 0200 0200 0200 0200 [ 152.065817] hangcheck [0040] 0200 7a004002 1fffe004 0202 0c00 [ 152.065821] hangcheck [0060] 0032f10c 18800180 00335000 0200 1081 0100 1b8a [ 152.065825] hangcheck [0080] 1081 00c0 1b8a 0100 [ 152.065829] hangcheckCCID: 0x0003210d [ 152.065831] hangcheckRING_START: 0x4000 [ 152.065834] hangcheckRING_HEAD: 0x00017e54 [ 152.065836] hangcheckRING_TAIL: 0x00019fb0 [ 152.065839] hangcheckRING_CTL: 0x0001f001 [ 152.065841] hangcheckRING_MODE: 0x0040 [ 152.065844] hangcheckACTHD: 0x_00e17e54 [ 152.065847] hangcheckBBADDR: 0x_002f81e0 [ 152.065849] hangcheckDMA_FADDR: 0x_0001be50 [ 152.065851] hangcheckIPEIR: 0x [ 152.065853] hangcheckIPEHR: 0x60020100 # CONSTANT_BUFFER see 0x1d4 [ 152.065860] hangcheckE 1b8a* [5:1b8a] @ 7376ms: rcs0 [ 152.065864] hangcheckE 1b8b+ [5:1b8b] @ 7376ms: rcs0 [ 152.065867] hangcheckE 1b8c [5:1b8c] @ 7376ms: rcs0 [ 152.065870] hangcheckE 1b8d [5:1b8d] @ 7376ms: rcs0 [ 152.065873] hangcheckE 1b8e [5:1b8e] @ 7376ms: rcs0 [ 152.065877] hangcheckE 1b8f [5:1b8f] @ 7376ms: rcs0 [ 152.065880] hangcheckE 1b90 [5:1b90] @ 7372ms: rcs0 [ 152.065888] hangcheck...skipping 52 executing requests... [ 152.065891] hangcheckE 1bc5+ [5:1bc5] @ 7328ms: rcs0 [ 152.065893] hangcheckQueue priority: -2147483648 [ 152.065909] hangcheck HWSP: [ 152.065913] hangcheck [] [ 152.065915] hangcheck * [ 152.065919] hangcheck [00c0] 1b89 [ 152.065923] hangcheck [00e0] [ 152.065927] hangcheck [0100] 1b89 [ 152.065931] hangcheck [0120] [ 152.065933] hangcheck * [ 152.065945] hangcheck Context: [ 152.065960] hangcheck [] 112b 2120 6800 2124 0180 20e4 0044 [ 152.065966] hangcheck [0020] 20c0 2310 0010 2314 2318 0008 [ 152.065970] hangcheck [0040] 231c 2320 2324 2328 [ 152.065975] hangcheck [0060] 232c 2330 2334 2338 [ 152.065980] hangcheck [0080] 233c 2340 2344 2348 [ 152.065985] hangcheck [00a0] 234c 2350 2354 [ 152.065990] hangcheck [00c0] 6104 6001 0014 60003f01 0320a020 1042 6002 0001 [ 152.065994] hangcheck [00e0] 61010004 0001 00316001 0001 0001 0001 6102 [ 152.065999] hangcheck [0100] 7902 79050003 2c08007f 00035000 [ 152.066004] hangcheck [0120] 79040002 f792ec01 0f9fa8a6 79040002 4000 f7bdfd51 [ 152.066009] hangcheck [0140] 2fdfb8e7 79040002 8000 7392fc15 efdfacb6 79040002 c000 b5d2ec4
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MST refcounting/atomic helpers cleanup (rev5)
== Series Details ==
Series: MST refcounting/atomic helpers cleanup (rev5)
URL : https://patchwork.freedesktop.org/series/54030/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5778d100cac7 drm/dp_mst: Fix some formatting in drm_dp_add_port()
2fd355b3a9aa drm/dp_mst: Fix some formatting in drm_dp_payload_send_msg()
f7a476bd0e0f drm/dp_mst: Fix some formatting in drm_dp_mst_allocate_vcpi()
0b7daea7eab8 drm/dp_mst: Fix some formatting in drm_dp_mst_deallocate_vcpi()
bc368b90cb12 drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and
friends
-:84: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#84: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:990:
+ rmstb = drm_dp_mst_topology_get_mstb_validated_locked(
-:102: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#102: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:1006:
+ rmstb = drm_dp_mst_topology_get_mstb_validated_locked(
-:150: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#150: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:1379:
+ mstb_child = drm_dp_mst_topology_get_mstb_validated(
total: 0 errors, 0 warnings, 3 checks, 401 lines checked
f212460470bf drm/dp_mst: Introduce new refcounting scheme for mstbs and ports
-:27: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#27:
commit 263efde31f97 ("drm/dp/mst: Get validated port ref in
drm_dp_update_payload_part1()")
-:51: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 9765635b3075 ("Revert
"drm/dp_mst: Skip validating ports during destruction, just ref"")'
#51:
commit 9765635b3075 ("Revert "drm/dp_mst: Skip validating ports during
destruction, just ref"")
-:137: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#137:
new file mode 100644
-:842: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#842: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:1329:
+ mport = drm_dp_mst_topology_get_port_validated_locked(
-:856: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#856: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:1346:
+ rport = drm_dp_mst_topology_get_port_validated_locked(
total: 1 errors, 2 warnings, 2 checks, 915 lines checked
a1f9438797bb drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref
fails
11a9df239381 drm/dp_mst: Stop releasing VCPI when removing ports from topology
33e82d971527 drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs
-:97: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#97: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:2278:
+ port = drm_dp_mst_topology_get_port_validated(
total: 0 errors, 0 warnings, 1 checks, 124 lines checked
89d20c7c627b drm/i915: Keep malloc references to MST ports
f0300e01a8cf drm/amdgpu/display: Keep malloc ref to MST port
523545b36c93 drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector()
171456c757e5 drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup()
a7f4c8e68b5d drm/nouveau: Keep malloc references to MST ports
916a684cd19b drm/nouveau: Stop unsetting mstc->port, use malloc refs
01a9632ebf65 drm/nouveau: Grab payload lock in nv50_msto_payload()
d1f83b76bee9 drm/dp_mst: Add some atomic state iterator macros
-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible
side-effects?
#110: FILE: include/drm/drm_dp_mst_helper.h:711:
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state,
__i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), &(new_state), (__i)))
-:110: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible
side-effects?
#110: FILE: include/drm/drm_dp_mst_helper.h:711:
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state,
__i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), &(new_state), (__i)))
-:112: WARNING:LONG_LINE: line over 100 characters
#112: FILE: include/drm/drm_dp_mst_helper.h:713:
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), &(new_state), (__i)))
-:127: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible
side-effects?
#127: FILE: include/drm/drm_dp_mst_helper.h:728:
+#define for_each_old_mst_mgr_in_state(__state, mgr, old_state, __i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), NULL, (__i)))
-:127: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible
side-effects?
#127: FILE: include/drm/drm_dp_mst_helper.h:728:
+#define for_each_old_mst_mgr_in_stat
Re: [Intel-gfx] [v4 01/12] drm: Add HDR source metadata property
Hi Uma, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on v5.0-rc1 next-20190108] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Uma-Shankar/Add-HDR-Metadata-Parsing-and-handling-in-DRM-layer/20190109-051130 reproduce: make htmldocs All warnings (new ones prefixed by >>): net/mac80211/sta_info.h:590: warning: Function parameter or member 'status_stats.ack_signal_filled' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'status_stats.avg_ack_signal' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.packets' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.bytes' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.last_rate' not described in 'sta_info' net/mac80211/sta_info.h:590: warning: Function parameter or member 'tx_stats.msdu' not described in 'sta_info' kernel/rcu/tree.c:711: warning: Excess function parameter 'irq' description in 'rcu_nmi_exit' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.active' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.active' not described in 'dma_buf' include/linux/dma-fence-array.h:54: warning: Function parameter or member 'work' not described in 'dma_fence_array' include/linux/firmware/intel/stratix10-svc-client.h:1: warning: no structured comments found include/linux/gpio/driver.h:371: warning: Function parameter or member 'init_valid_mask' not described in 'gpio_chip' include/linux/iio/hw-consumer.h:1: warning: no structured comments found include/linux/input/sparse-keymap.h:46: warning: Function parameter or member 'sw' not described in 'key_entry' drivers/mtd/nand/raw/nand_base.c:420: warning: Function parameter or member 'chip' not described in 'nand_fill_oob' drivers/mtd/nand/raw/nand_bbt.c:173: warning: Function parameter or member 'this' not described in 'read_bbt' drivers/mtd/nand/raw/nand_bbt.c:173: warning: Excess function parameter 'chip' description in 'read_bbt' include/linux/regulator/machine.h:199: warning: Function parameter or member 'max_uV_step' not described in 'regulation_constraints' include/linux/regulator/driver.h:228: warning: Function parameter or member 'resume' not described in 'regulator_ops' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw0' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw1' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw2' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw3' not described in 'irb' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.eadm' not described in 'irb' drivers/slimbus/stream.c:1: warning: no structured comments found include/linux/spi/spi.h:180: warning: Function parameter or member 'driver_override' not described in 'spi_device' drivers/target/target_core_device.c:1: warning: no structured comments found drivers/usb/typec/bus.c:1: warning: no structured comments found drivers/usb/typec/class.c:1: warning: no structured comments found include/linux/w1.h:281: warning: Function parameter or member 'of_match_table' not described in 'w1_family' fs/direct-io.c:257: warning: Excess function parameter 'offset' description in 'dio_complete' fs/file_table.c:1: warning: no structured comments found fs/libfs.c:477: warning: Excess function parameter 'available' de
[Intel-gfx] [PATCH v5 18/20] drm/dp_mst: Start tracking per-port VCPI allocations
There has been a TODO waiting for quite a long time in drm_dp_mst_topology.c: /* We cannot rely on port->vcpi.num_slots to update * topology_state->avail_slots as the port may not exist if the parent * branch device was unplugged. This should be fixed by tracking * per-port slot allocation in drm_dp_mst_topology_state instead of * depending on the caller to tell us how many slots to release. */ That's not the only reason we should fix this: forcing the driver to track the VCPI allocations throughout a state's atomic check is error prone, because it means that extra care has to be taken with the order that drm_dp_atomic_find_vcpi_slots() and drm_dp_atomic_release_vcpi_slots() are called in in order to ensure idempotency. Currently the only driver actually using these helpers, i915, doesn't even do this correctly: multiple ->best_encoder() checks with i915's current implementation would not be idempotent and would over-allocate VCPI slots, something I learned trying to implement fallback retraining in MST. So: simplify this whole mess, and teach drm_dp_atomic_find_vcpi_slots() and drm_dp_atomic_release_vcpi_slots() to track the VCPI allocations for each port. This allows us to ensure idempotency without having to rely on the driver as much. Additionally: the driver doesn't need to do any kind of VCPI slot tracking anymore if it doesn't need it for it's own internal state. Additionally; this adds a new drm_dp_mst_atomic_check() helper which must be used by atomic drivers to perform validity checks for the new VCPI allocations incurred by a state. Also: update the documentation and make it more obvious that these /must/ be called by /all/ atomic drivers supporting MST. Changes since v9: * Add some missing changes that were requested by danvet that I forgot about after I redid all of the kref stuff: * Remove unnecessary state changes in intel_dp_mst_atomic_check * Cleanup atomic check logic for VCPI allocations - all we need to check in compute_config is whether or not this state disables a CRTC, then free VCPI based off that Changes since v8: * Fix compile errors, whoops! Changes since v7: - Don't check for mixed stale/valid VCPI allocations, just rely on connector registration to stop such erroneous modesets Changes since v6: - Keep a kref to all of the ports we have allocations on. This required a good bit of changing to when we call drm_dp_find_vcpi_slots(), mainly that we need to ensure that we only redo VCPI allocations on actual mode or CRTC changes, not crtc_state->active changes. Additionally, we no longer take the registration of the DRM connector for each port into account because so long as we have a kref to the port in the new or previous atomic state, the connector will stay registered. - Use the small changes to drm_dp_put_port() to add even more error checking to make misusage of the helpers more obvious. I added this after having to chase down various use-after-free conditions that started popping up from the new helpers so no one else has to troubleshoot that. - Move some accidental DRM_DEBUG_KMS() calls to DRM_DEBUG_ATOMIC() - Update documentation again, note that find/release() should both not be called on the same port in a single atomic check phase (but multiple calls to one or the other is OK) Changes since v4: - Don't skip the atomic checks for VCPI allocations if no new VCPI allocations happen in a state. This makes the next change I'm about to list here a lot easier to implement. - Don't ignore VCPI allocations on destroyed ports, instead ensure that when ports are destroyed and still have VCPI allocations in the topology state, the only state changes allowed are releasing said ports' VCPI. This prevents a state with a mix of VCPI allocations from destroyed ports, and allocations from valid ports. Changes since v3: - Don't release VCPI allocations in the topology state immediately in drm_dp_atomic_release_vcpi_slots(), instead mark them as 0 and skip over them in drm_dp_mst_duplicate_state(). This makes it so drm_dp_atomic_release_vcpi_slots() is still idempotent while also throwing warnings if the driver messes up it's book keeping and tries to release VCPI slots on a port that doesn't have any pre-existing VCPI allocation - danvet - Change mst_state/state in some debugging messages to "mst state" Changes since v2: - Use kmemdup() for duplicating MST state - danvet - Move port validation out of duplicate state callback - danvet - Handle looping through MST topology states in drm_dp_mst_atomic_check() so the driver doesn't have to do it - Fix documentation in drm_dp_atomic_find_vcpi_slots() - Move the atomic check for each individual topology state into it's own function, reduces indenting - Don't consider "stale" MST ports when calculating the bandwidth requirements. This is needed because originally we reli
[Intel-gfx] [PATCH v5 09/20] drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs
Up until now, freeing payloads on remote MST hubs that just had ports
removed has almost never worked because we've been relying on port
validation in order to stop us from accessing ports that have already
been freed from memory, but ports which need their payloads released due
to being removed will never be a valid part of the topology after
they've been removed.
Since we've introduced malloc refs, we can replace all of the validation
logic in payload helpers which are used for deallocation with some
well-placed malloc krefs. This ensures that regardless of whether or not
the ports are still valid and in the topology, any port which has an
allocated payload will remain allocated in memory until it's payloads
have been removed - finally allowing us to actually release said
payloads correctly.
Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
Reviewed-by: Harry Wentland
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 54 +++
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 8088527a7aea..efd8fa29fff6 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2104,10 +2104,6 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
u8 sinks[DRM_DP_MAX_SDP_STREAMS];
int i;
- port = drm_dp_mst_topology_get_port_validated(mgr, port);
- if (!port)
- return -EINVAL;
-
port_num = port->port_num;
mstb = drm_dp_mst_topology_get_mstb_validated(mgr, port->parent);
if (!mstb) {
@@ -2115,10 +2111,8 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
port->parent,
&port_num);
- if (!mstb) {
- drm_dp_mst_topology_put_port(port);
+ if (!mstb)
return -EINVAL;
- }
}
txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
@@ -2155,7 +2149,6 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
kfree(txmsg);
fail_put:
drm_dp_mst_topology_put_mstb(mstb);
- drm_dp_mst_topology_put_port(port);
return ret;
}
@@ -2260,15 +2253,16 @@ static int drm_dp_destroy_payload_step2(struct
drm_dp_mst_topology_mgr *mgr,
*/
int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr)
{
- int i, j;
- int cur_slots = 1;
struct drm_dp_payload req_payload;
struct drm_dp_mst_port *port;
+ int i, j;
+ int cur_slots = 1;
mutex_lock(&mgr->payload_lock);
for (i = 0; i < mgr->max_payloads; i++) {
struct drm_dp_vcpi *vcpi = mgr->proposed_vcpis[i];
struct drm_dp_payload *payload = &mgr->payloads[i];
+ bool put_port = false;
/* solve the current payloads - compare to the hw ones
- update the hw view */
@@ -2276,12 +2270,20 @@ int drm_dp_update_payload_part1(struct
drm_dp_mst_topology_mgr *mgr)
if (vcpi) {
port = container_of(vcpi, struct drm_dp_mst_port,
vcpi);
- port = drm_dp_mst_topology_get_port_validated(mgr,
- port);
- if (!port) {
- mutex_unlock(&mgr->payload_lock);
- return -EINVAL;
+
+ /* Validated ports don't matter if we're releasing
+* VCPI
+*/
+ if (vcpi->num_slots) {
+ port = drm_dp_mst_topology_get_port_validated(
+ mgr, port);
+ if (!port) {
+ mutex_unlock(&mgr->payload_lock);
+ return -EINVAL;
+ }
+ put_port = true;
}
+
req_payload.num_slots = vcpi->num_slots;
req_payload.vcpi = vcpi->vcpi;
} else {
@@ -2313,7 +2315,7 @@ int drm_dp_update_payload_part1(struct
drm_dp_mst_topology_mgr *mgr)
}
cur_slots += req_payload.num_slots;
- if (port)
+ if (put_port)
drm_dp_mst_topology_put_port(port);
}
@@ -3129,6 +3131,8 @@ bool drm_dp_mst_allocate_vcpi(struct
drm_dp_mst_topology_mgr *mgr,
DRM_DEBUG_KMS("initing vcpi for pbn=%d slots=%d\n",
pbn, port->vcpi.num_slots);
+ /* Keep port allocated until it's payload has been
[Intel-gfx] [PATCH v5 17/20] drm/dp_mst: Add some atomic state iterator macros
Changes since v6:
- Move EXPORT_SYMBOL() for drm_dp_mst_topology_state_funcs to this
commit
- Document __drm_dp_mst_state_iter_get() and note that it shouldn't be
called directly
Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 5 +-
include/drm/drm_dp_mst_helper.h | 96 +++
2 files changed, 99 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index efd8fa29fff6..370371145cdd 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3530,10 +3530,11 @@ static void drm_dp_mst_destroy_state(struct
drm_private_obj *obj,
kfree(mst_state);
}
-static const struct drm_private_state_funcs mst_state_funcs = {
+const struct drm_private_state_funcs drm_dp_mst_topology_state_funcs = {
.atomic_duplicate_state = drm_dp_mst_duplicate_state,
.atomic_destroy_state = drm_dp_mst_destroy_state,
};
+EXPORT_SYMBOL(drm_dp_mst_topology_state_funcs);
/**
* drm_atomic_get_mst_topology_state: get MST topology state
@@ -3617,7 +3618,7 @@ int drm_dp_mst_topology_mgr_init(struct
drm_dp_mst_topology_mgr *mgr,
drm_atomic_private_obj_init(dev, &mgr->base,
&mst_state->base,
- &mst_state_funcs);
+ &drm_dp_mst_topology_state_funcs);
return 0;
}
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 8eca5f29242c..581163c8d7d7 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -650,4 +650,100 @@ int drm_dp_send_power_updown_phy(struct
drm_dp_mst_topology_mgr *mgr,
void drm_dp_mst_get_port_malloc(struct drm_dp_mst_port *port);
void drm_dp_mst_put_port_malloc(struct drm_dp_mst_port *port);
+extern const struct drm_private_state_funcs drm_dp_mst_topology_state_funcs;
+
+/**
+ * __drm_dp_mst_state_iter_get - private atomic state iterator function for
+ * macro-internal use
+ * @state: &struct drm_atomic_state pointer
+ * @mgr: pointer to the &struct drm_dp_mst_topology_mgr iteration cursor
+ * @old_state: optional pointer to the old &struct drm_dp_mst_topology_state
+ * iteration cursor
+ * @new_state: optional pointer to the new &struct drm_dp_mst_topology_state
+ * iteration cursor
+ * @i: int iteration cursor, for macro-internal use
+ *
+ * Used by for_each_oldnew_mst_mgr_in_state(),
+ * for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't
+ * call this directly.
+ *
+ * Returns:
+ * True if the current &struct drm_private_obj is a &struct
+ * drm_dp_mst_topology_mgr, false otherwise.
+ */
+static inline bool
+__drm_dp_mst_state_iter_get(struct drm_atomic_state *state,
+ struct drm_dp_mst_topology_mgr **mgr,
+ struct drm_dp_mst_topology_state **old_state,
+ struct drm_dp_mst_topology_state **new_state,
+ int i)
+{
+ struct __drm_private_objs_state *objs_state = &state->private_objs[i];
+
+ if (objs_state->ptr->funcs != &drm_dp_mst_topology_state_funcs)
+ return false;
+
+ *mgr = to_dp_mst_topology_mgr(objs_state->ptr);
+ if (old_state)
+ *old_state = to_dp_mst_topology_state(objs_state->old_state);
+ if (new_state)
+ *new_state = to_dp_mst_topology_state(objs_state->new_state);
+
+ return true;
+}
+
+/**
+ * for_each_oldnew_mst_mgr_in_state - iterate over all DP MST topology
+ * managers in an atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @mgr: &struct drm_dp_mst_topology_mgr iteration cursor
+ * @old_state: &struct drm_dp_mst_topology_state iteration cursor for the old
+ * state
+ * @new_state: &struct drm_dp_mst_topology_state iteration cursor for the new
+ * state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all DRM DP MST topology managers in an atomic update,
+ * tracking both old and new state. This is useful in places where the state
+ * delta needs to be considered, for example in atomic check functions.
+ */
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state,
__i) \
+ for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+ for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr),
&(old_state), &(new_state), (__i)))
+
+/**
+ * for_each_old_mst_mgr_in_state - iterate over all DP MST topology managers
+ * in an atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @mgr: &struct drm_dp_mst_topology_mgr iteration cursor
+ * @old_state: &struct drm_dp_mst_topology_state iteration cursor for the old
+ * state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all DRM DP MST topology managers in
[Intel-gfx] [PATCH v5 11/20] drm/amdgpu/display: Keep malloc ref to MST port
Just like i915 and nouveau, it's a good idea for us to hold a malloc
reference to the port here so that we never pass a freed pointer to any
of the DP MST helper functions.
Also, we stop unsetting aconnector->port in
dm_dp_destroy_mst_connector(). There's literally no point to that
assignment that I can see anyway.
Signed-off-by: Lyude Paul
Reviewed-by: Harry Wentland
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 5e7ca1f3a8d1..24632727e127 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -191,6 +191,7 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector)
drm_encoder_cleanup(&amdgpu_encoder->base);
kfree(amdgpu_encoder);
drm_connector_cleanup(connector);
+ drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
kfree(amdgpu_dm_connector);
}
@@ -363,7 +364,9 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
amdgpu_dm_connector_funcs_reset(connector);
DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
- aconnector, connector->base.id, aconnector->mst_port);
+aconnector, connector->base.id, aconnector->mst_port);
+
+ drm_dp_mst_get_port_malloc(port);
DRM_DEBUG_KMS(":%d\n", connector->base.id);
@@ -379,12 +382,12 @@ static void dm_dp_destroy_mst_connector(struct
drm_dp_mst_topology_mgr *mgr,
struct amdgpu_dm_connector *aconnector =
to_amdgpu_dm_connector(connector);
DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
- aconnector, connector->base.id,
aconnector->mst_port);
+aconnector, connector->base.id, aconnector->mst_port);
- aconnector->port = NULL;
if (aconnector->dc_sink) {
amdgpu_dm_update_freesync_caps(connector, NULL);
- dc_link_remove_remote_sink(aconnector->dc_link,
aconnector->dc_sink);
+ dc_link_remove_remote_sink(aconnector->dc_link,
+ aconnector->dc_sink);
dc_sink_release(aconnector->dc_sink);
aconnector->dc_sink = NULL;
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 14/20] drm/nouveau: Keep malloc references to MST ports
Now that we finally have a sane way to keep port allocations around, use
it to fix the potential unchecked ->port accesses that nouveau makes by
making sure we keep the mst port allocated for as long as it's
drm_connector is accessible.
Additionally, now that we've guaranteed that mstc->port is allocated for
as long as we keep mstc around we can remove the connector registration
checks for codepaths which release payloads, allowing us to release
payloads on active topologies properly. These registration checks were
only required before in order to avoid situations where mstc->port could
technically be pointing at freed memory.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 0f7d72518604..982054bbcc8b 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -964,7 +964,11 @@ static void
nv50_mstc_destroy(struct drm_connector *connector)
{
struct nv50_mstc *mstc = nv50_mstc(connector);
+
drm_connector_cleanup(&mstc->connector);
+ if (mstc->port)
+ drm_dp_mst_put_port_malloc(mstc->port);
+
kfree(mstc);
}
@@ -1012,6 +1016,7 @@ nv50_mstc_new(struct nv50_mstm *mstm, struct
drm_dp_mst_port *port,
drm_object_attach_property(&mstc->connector.base,
dev->mode_config.path_property, 0);
drm_object_attach_property(&mstc->connector.base,
dev->mode_config.tile_property, 0);
drm_connector_set_path_property(&mstc->connector, path);
+ drm_dp_mst_get_port_malloc(port);
return 0;
}
@@ -1077,6 +1082,7 @@ nv50_mstm_destroy_connector(struct
drm_dp_mst_topology_mgr *mgr,
drm_fb_helper_remove_one_connector(&drm->fbcon->helper,
&mstc->connector);
drm_modeset_lock(&drm->dev->mode_config.connection_mutex, NULL);
+ drm_dp_mst_put_port_malloc(mstc->port);
mstc->port = NULL;
drm_modeset_unlock(&drm->dev->mode_config.connection_mutex);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 08/20] drm/dp_mst: Stop releasing VCPI when removing ports from topology
This has never actually worked, and isn't needed anyway: the driver's
always going to try to deallocate VCPI when it tears down the display
that the VCPI belongs to.
Signed-off-by: Lyude Paul
Reviewed-by: Harry Wentland
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index bafc85f08606..8088527a7aea 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1176,8 +1176,6 @@ static void drm_dp_destroy_port(struct kref *kref)
struct drm_dp_mst_topology_mgr *mgr = port->mgr;
if (!port->input) {
- port->vcpi.num_slots = 0;
-
kfree(port->cached_edid);
/*
@@ -3496,12 +3494,6 @@ static void drm_dp_destroy_connector_work(struct
work_struct *work)
drm_dp_port_teardown_pdt(port, port->pdt);
port->pdt = DP_PEER_DEVICE_NONE;
- if (!port->input && port->vcpi.vcpi > 0) {
- drm_dp_mst_reset_vcpi_slots(mgr, port);
- drm_dp_update_payload_part1(mgr);
- drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
- }
-
drm_dp_mst_put_port_malloc(port);
send_hotplug = true;
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 20/20] drm/nouveau: Use atomic VCPI helpers for MST
Currently, nouveau uses the yolo method of setting up MST displays: it
uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the
display configuration. These helpers don't take care to make sure they
take a reference to the mstb port that they're checking, and
additionally don't actually check whether or not the topology still has
enough bandwidth to provide the VCPI tokens required.
So, drop usage of the old helpers and move entirely over to the atomic
helpers.
Changes since v6:
* Cleanup atomic check logic and remove a bunch of unneeded checks -
danvet
Changes since v5:
* Update nv50_msto_atomic_check() and nv50_mstc_atomic_check() to the
new requirements for drm_dp_atomic_find_vcpi_slots() and
drm_dp_atomic_release_vcpi_slots()
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 54 ++---
1 file changed, 48 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 67f7bf97e5d9..53d6c8df8f68 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -762,16 +762,23 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
- struct nv50_mstc *mstc = nv50_mstc(conn_state->connector);
+ struct drm_atomic_state *state = crtc_state->state;
+ struct drm_connector *connector = conn_state->connector;
+ struct nv50_mstc *mstc = nv50_mstc(connector);
struct nv50_mstm *mstm = mstc->mstm;
- int bpp = conn_state->connector->display_info.bpc * 3;
+ int bpp = connector->display_info.bpc * 3;
int slots;
- mstc->pbn = drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock, bpp);
+ mstc->pbn = drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock,
+bpp);
- slots = drm_dp_find_vcpi_slots(&mstm->mgr, mstc->pbn);
- if (slots < 0)
- return slots;
+ if (drm_atomic_crtc_needs_modeset(crtc_state) &&
+ !drm_connector_is_unregistered(connector)) {
+ slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr,
+ mstc->port, mstc->pbn);
+ if (slots < 0)
+ return slots;
+ }
return nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
mstc->native);
@@ -934,12 +941,43 @@ nv50_mstc_get_modes(struct drm_connector *connector)
return ret;
}
+static int
+nv50_mstc_atomic_check(struct drm_connector *connector,
+ struct drm_connector_state *new_conn_state)
+{
+ struct drm_atomic_state *state = new_conn_state->state;
+ struct nv50_mstc *mstc = nv50_mstc(connector);
+ struct drm_dp_mst_topology_mgr *mgr = &mstc->mstm->mgr;
+ struct drm_connector_state *old_conn_state =
+ drm_atomic_get_old_connector_state(state, connector);
+ struct drm_crtc_state *crtc_state;
+ struct drm_crtc *new_crtc = new_conn_state->crtc;
+
+ if (!old_conn_state->crtc)
+ return 0;
+
+ /* We only want to free VCPI if this state disables the CRTC on this
+* connector
+*/
+ if (new_crtc) {
+ crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc);
+
+ if (!crtc_state ||
+ !drm_atomic_crtc_needs_modeset(crtc_state) ||
+ crtc_state->enable)
+ return 0;
+ }
+
+ return drm_dp_atomic_release_vcpi_slots(state, mgr, mstc->port);
+}
+
static const struct drm_connector_helper_funcs
nv50_mstc_help = {
.get_modes = nv50_mstc_get_modes,
.mode_valid = nv50_mstc_mode_valid,
.best_encoder = nv50_mstc_best_encoder,
.atomic_best_encoder = nv50_mstc_atomic_best_encoder,
+ .atomic_check = nv50_mstc_atomic_check,
};
static enum drm_connector_status
@@ -2121,6 +2159,10 @@ nv50_disp_atomic_check(struct drm_device *dev, struct
drm_atomic_state *state)
return ret;
}
+ ret = drm_dp_mst_atomic_check(state);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 15/20] drm/nouveau: Stop unsetting mstc->port, use malloc refs
Same as we did for i915, but for nouveau this time. Additionally, we
grab a malloc reference to the port that lasts for the entire lifetime
of nv50_mstc, which gives us the guarantee that mstc->port will always
point to valid memory for as long as the mstc stays around.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 18 +-
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 982054bbcc8b..157d208d37b5 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -709,8 +709,7 @@ nv50_msto_cleanup(struct nv50_msto *msto)
NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);
- if (mstc->port)
- drm_dp_mst_deallocate_vcpi(&mstm->mgr, mstc->port);
+ drm_dp_mst_deallocate_vcpi(&mstm->mgr, mstc->port);
msto->mstc = NULL;
msto->head = NULL;
@@ -735,7 +734,7 @@ nv50_msto_prepare(struct nv50_msto *msto)
};
NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
- if (mstc->port && mstc->port->vcpi.vcpi > 0) {
+ if (mstc->port->vcpi.vcpi > 0) {
struct drm_dp_payload *payload = nv50_msto_payload(msto);
if (payload) {
args.vcpi.start_slot = payload->start_slot;
@@ -832,8 +831,7 @@ nv50_msto_disable(struct drm_encoder *encoder)
struct nv50_mstc *mstc = msto->mstc;
struct nv50_mstm *mstm = mstc->mstm;
- if (mstc->port)
- drm_dp_mst_reset_vcpi_slots(&mstm->mgr, mstc->port);
+ drm_dp_mst_reset_vcpi_slots(&mstm->mgr, mstc->port);
mstm->outp->update(mstm->outp, msto->head->base.index, NULL, 0, 0);
mstm->modified = true;
@@ -945,7 +943,7 @@ nv50_mstc_detect(struct drm_connector *connector, bool
force)
enum drm_connector_status conn_status;
int ret;
- if (!mstc->port)
+ if (drm_connector_is_unregistered(connector))
return connector_status_disconnected;
ret = pm_runtime_get_sync(connector->dev->dev);
@@ -966,8 +964,7 @@ nv50_mstc_destroy(struct drm_connector *connector)
struct nv50_mstc *mstc = nv50_mstc(connector);
drm_connector_cleanup(&mstc->connector);
- if (mstc->port)
- drm_dp_mst_put_port_malloc(mstc->port);
+ drm_dp_mst_put_port_malloc(mstc->port);
kfree(mstc);
}
@@ -1081,11 +1078,6 @@ nv50_mstm_destroy_connector(struct
drm_dp_mst_topology_mgr *mgr,
drm_fb_helper_remove_one_connector(&drm->fbcon->helper,
&mstc->connector);
- drm_modeset_lock(&drm->dev->mode_config.connection_mutex, NULL);
- drm_dp_mst_put_port_malloc(mstc->port);
- mstc->port = NULL;
- drm_modeset_unlock(&drm->dev->mode_config.connection_mutex);
-
drm_connector_put(&mstc->connector);
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 03/20] drm/dp_mst: Fix some formatting in drm_dp_mst_allocate_vcpi()
Fix some indenting, split some stuff across multiple lines.
Signed-off-by: Lyude Paul
Reviewed-by: Harry Wentland
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index fc93a71c42b0..a63a4d32962a 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2731,7 +2731,8 @@ bool drm_dp_mst_allocate_vcpi(struct
drm_dp_mst_topology_mgr *mgr,
return false;
if (port->vcpi.vcpi > 0) {
- DRM_DEBUG_KMS("payload: vcpi %d already allocated for pbn %d -
requested pbn %d\n", port->vcpi.vcpi, port->vcpi.pbn, pbn);
+ DRM_DEBUG_KMS("payload: vcpi %d already allocated for pbn %d -
requested pbn %d\n",
+ port->vcpi.vcpi, port->vcpi.pbn, pbn);
if (pbn == port->vcpi.pbn) {
drm_dp_put_port(port);
return true;
@@ -2741,11 +2742,11 @@ bool drm_dp_mst_allocate_vcpi(struct
drm_dp_mst_topology_mgr *mgr,
ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn, slots);
if (ret) {
DRM_DEBUG_KMS("failed to init vcpi slots=%d max=63 ret=%d\n",
- DIV_ROUND_UP(pbn, mgr->pbn_div), ret);
+ DIV_ROUND_UP(pbn, mgr->pbn_div), ret);
goto out;
}
DRM_DEBUG_KMS("initing vcpi for pbn=%d slots=%d\n",
- pbn, port->vcpi.num_slots);
+ pbn, port->vcpi.num_slots);
drm_dp_put_port(port);
return true;
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 19/20] drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()
It occurred to me that we never actually check this! So let's start
doing that.
Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index fc778c6d487e..41cf814207bf 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3650,7 +3650,7 @@ drm_dp_mst_atomic_check_topology_state(struct
drm_dp_mst_topology_mgr *mgr,
struct drm_dp_mst_topology_state
*mst_state)
{
struct drm_dp_vcpi_allocation *vcpi;
- int avail_slots = 63;
+ int avail_slots = 63, payload_count = 0;
list_for_each_entry(vcpi, &mst_state->vcpis, next) {
/* Releasing VCPI is always OK-even if the port is gone */
@@ -3670,6 +3670,12 @@ drm_dp_mst_atomic_check_topology_state(struct
drm_dp_mst_topology_mgr *mgr,
avail_slots + vcpi->vcpi);
return -ENOSPC;
}
+
+ if (++payload_count > mgr->max_payloads) {
+ DRM_DEBUG_ATOMIC("[MST MGR:%p] state %p has too many
payloads (max=%d)\n",
+mgr, mst_state, mgr->max_payloads);
+ return -EINVAL;
+ }
}
DRM_DEBUG_ATOMIC("[MST MGR:%p] mst state %p VCPI avail=%d used=%d\n",
mgr, mst_state, avail_slots,
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 04/20] drm/dp_mst: Fix some formatting in drm_dp_mst_deallocate_vcpi()
Split some stuff across multiple lines
Signed-off-by: Lyude Paul
Reviewed-by: Harry Wentland
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index a63a4d32962a..75cca6a843fb 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2790,7 +2790,8 @@ EXPORT_SYMBOL(drm_dp_mst_reset_vcpi_slots);
* @mgr: manager for this port
* @port: unverified port to deallocate vcpi for
*/
-void drm_dp_mst_deallocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct
drm_dp_mst_port *port)
+void drm_dp_mst_deallocate_vcpi(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_port *port)
{
port = drm_dp_get_validated_port_ref(mgr, port);
if (!port)
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 05/20] drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends
s/drm_dp_get_validated_port_ref/drm_dp_mst_topology_get_port_validated/
s/drm_dp_put_port/drm_dp_mst_topology_put_port/
s/drm_dp_get_validated_mstb_ref/drm_dp_mst_topology_get_mstb_validated/
s/drm_dp_put_mst_branch_device/drm_dp_mst_topology_put_mstb/
This is a much more consistent naming scheme, and will make even more
sense once we redesign how the current refcounting scheme here works.
Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
Reviewed-by: Harry Wentland
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 114 ++
1 file changed, 62 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 75cca6a843fb..074e985093ca 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -46,7 +46,7 @@ static bool dump_dp_payload_table(struct
drm_dp_mst_topology_mgr *mgr,
char *buf);
static int test_calc_pbn_mode(void);
-static void drm_dp_put_port(struct drm_dp_mst_port *port);
+static void drm_dp_mst_topology_put_port(struct drm_dp_mst_port *port);
static int drm_dp_dpcd_write_payload(struct drm_dp_mst_topology_mgr *mgr,
int id,
@@ -888,7 +888,7 @@ static void drm_dp_destroy_mst_branch_device(struct kref
*kref)
*/
list_for_each_entry_safe(port, tmp, &mstb->ports, next) {
list_del(&port->next);
- drm_dp_put_port(port);
+ drm_dp_mst_topology_put_port(port);
}
/* drop any tx slots msg */
@@ -911,7 +911,7 @@ static void drm_dp_destroy_mst_branch_device(struct kref
*kref)
kref_put(kref, drm_dp_free_mst_branch_device);
}
-static void drm_dp_put_mst_branch_device(struct drm_dp_mst_branch *mstb)
+static void drm_dp_mst_topology_put_mstb(struct drm_dp_mst_branch *mstb)
{
kref_put(&mstb->kref, drm_dp_destroy_mst_branch_device);
}
@@ -930,7 +930,7 @@ static void drm_dp_port_teardown_pdt(struct drm_dp_mst_port
*port, int old_pdt)
case DP_PEER_DEVICE_MST_BRANCHING:
mstb = port->mstb;
port->mstb = NULL;
- drm_dp_put_mst_branch_device(mstb);
+ drm_dp_mst_topology_put_mstb(mstb);
break;
}
}
@@ -970,12 +970,14 @@ static void drm_dp_destroy_port(struct kref *kref)
kfree(port);
}
-static void drm_dp_put_port(struct drm_dp_mst_port *port)
+static void drm_dp_mst_topology_put_port(struct drm_dp_mst_port *port)
{
kref_put(&port->kref, drm_dp_destroy_port);
}
-static struct drm_dp_mst_branch
*drm_dp_mst_get_validated_mstb_ref_locked(struct drm_dp_mst_branch *mstb,
struct drm_dp_mst_branch *to_find)
+static struct drm_dp_mst_branch *
+drm_dp_mst_topology_get_mstb_validated_locked(struct drm_dp_mst_branch *mstb,
+ struct drm_dp_mst_branch *to_find)
{
struct drm_dp_mst_port *port;
struct drm_dp_mst_branch *rmstb;
@@ -985,7 +987,8 @@ static struct drm_dp_mst_branch
*drm_dp_mst_get_validated_mstb_ref_locked(struct
}
list_for_each_entry(port, &mstb->ports, next) {
if (port->mstb) {
- rmstb =
drm_dp_mst_get_validated_mstb_ref_locked(port->mstb, to_find);
+ rmstb = drm_dp_mst_topology_get_mstb_validated_locked(
+ port->mstb, to_find);
if (rmstb)
return rmstb;
}
@@ -993,12 +996,15 @@ static struct drm_dp_mst_branch
*drm_dp_mst_get_validated_mstb_ref_locked(struct
return NULL;
}
-static struct drm_dp_mst_branch *drm_dp_get_validated_mstb_ref(struct
drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_branch *mstb)
+static struct drm_dp_mst_branch *
+drm_dp_mst_topology_get_mstb_validated(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_branch *mstb)
{
struct drm_dp_mst_branch *rmstb = NULL;
mutex_lock(&mgr->lock);
if (mgr->mst_primary)
- rmstb =
drm_dp_mst_get_validated_mstb_ref_locked(mgr->mst_primary, mstb);
+ rmstb = drm_dp_mst_topology_get_mstb_validated_locked(
+ mgr->mst_primary, mstb);
mutex_unlock(&mgr->lock);
return rmstb;
}
@@ -1021,7 +1027,9 @@ static struct drm_dp_mst_port
*drm_dp_mst_get_port_ref_locked(struct drm_dp_mst_
return NULL;
}
-static struct drm_dp_mst_port *drm_dp_get_validated_port_ref(struct
drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)
+static struct drm_dp_mst_port *
+drm_dp_mst_topology_get_port_validated(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_port *port)
{
struct drm_dp_mst_port *rport = NULL;
mutex_lock(&mgr->lock);
@@ -1215,7 +1223,7 @@ static void drm_dp_add_port(s
[Intel-gfx] [PATCH v5 16/20] drm/nouveau: Grab payload lock in nv50_msto_payload()
Going through the currently programmed payloads isn't safe without
holding mgr->payload_lock, so actually do that and warn if anyone tries
calling nv50_msto_payload() in the future without grabbing the right
locks.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 157d208d37b5..67f7bf97e5d9 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -680,6 +680,8 @@ nv50_msto_payload(struct nv50_msto *msto)
struct nv50_mstm *mstm = mstc->mstm;
int vcpi = mstc->port->vcpi.vcpi, i;
+ WARN_ON(!mutex_is_locked(&mstm->mgr.payload_lock));
+
NV_ATOMIC(drm, "%s: vcpi %d\n", msto->encoder.name, vcpi);
for (i = 0; i < mstm->mgr.max_payloads; i++) {
struct drm_dp_payload *payload = &mstm->mgr.payloads[i];
@@ -733,6 +735,8 @@ nv50_msto_prepare(struct nv50_msto *msto)
(0x0100 << msto->head->base.index),
};
+ mutex_lock(&mstm->mgr.payload_lock);
+
NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
if (mstc->port->vcpi.vcpi > 0) {
struct drm_dp_payload *payload = nv50_msto_payload(msto);
@@ -748,7 +752,9 @@ nv50_msto_prepare(struct nv50_msto *msto)
msto->encoder.name, msto->head->base.base.name,
args.vcpi.start_slot, args.vcpi.num_slots,
args.vcpi.pbn, args.vcpi.aligned_pbn);
+
nvif_mthd(&drm->display->disp.object, 0, &args, sizeof(args));
+ mutex_unlock(&mstm->mgr.payload_lock);
}
static int
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 13/20] drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup()
There is no need to look at the port's VCPI allocation before calling
drm_dp_mst_deallocate_vcpi(), as we already have msto->disabled to let
us avoid cleaning up an msto more then once. The DP MST core will never
call drm_dp_mst_deallocate_vcpi() on it's own, which is presumably what
these checks are meant to protect against.
More importantly though, we're about to stop clearing mstc->port in the
next commit, which means if we could potentially hit a use-after-free
error if we tried to check mstc->port->vcpi here. So to make life easier
for anyone who bisects this code in the future, use msto->disabled
instead to check whether or not we need to deallocate VCPI instead.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 641252208e67..0f7d72518604 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -704,14 +704,17 @@ nv50_msto_cleanup(struct nv50_msto *msto)
struct nv50_mstc *mstc = msto->mstc;
struct nv50_mstm *mstm = mstc->mstm;
+ if (!msto->disabled)
+ return;
+
NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);
- if (mstc->port && mstc->port->vcpi.vcpi > 0 && !nv50_msto_payload(msto))
+
+ if (mstc->port)
drm_dp_mst_deallocate_vcpi(&mstm->mgr, mstc->port);
- if (msto->disabled) {
- msto->mstc = NULL;
- msto->head = NULL;
- msto->disabled = false;
- }
+
+ msto->mstc = NULL;
+ msto->head = NULL;
+ msto->disabled = false;
}
static void
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 12/20] drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector()
Trying to destroy the connector using mstc->connector.funcs->destroy()
if connector initialization fails is wrong: there is no possible
codepath in nv50_mstc_new where nv50_mstm_add_connector() would return
<0 and mstc would be non-NULL.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Harry Wentland
Cc: Juston Li
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 26af45785939..641252208e67 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1099,11 +1099,8 @@ nv50_mstm_add_connector(struct drm_dp_mst_topology_mgr
*mgr,
int ret;
ret = nv50_mstc_new(mstm, port, path, &mstc);
- if (ret) {
- if (mstc)
- mstc->connector.funcs->destroy(&mstc->connector);
+ if (ret)
return NULL;
- }
return &mstc->connector;
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 10/20] drm/i915: Keep malloc references to MST ports
So that the ports stay around until we've destroyed the connectors, in order to ensure that we don't pass an invalid pointer to any MST helpers once we introduce the new MST VCPI helpers. Changes since v1: * Move drm_dp_mst_get_port_malloc() to where we assign intel_connector->port - danvet Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter Cc: David Airlie Cc: Jerry Zuo Cc: Harry Wentland Cc: Juston Li --- drivers/gpu/drm/i915/intel_connector.c | 4 drivers/gpu/drm/i915/intel_dp_mst.c| 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_connector.c b/drivers/gpu/drm/i915/intel_connector.c index 18e370f607bc..37d2c644f4b8 100644 --- a/drivers/gpu/drm/i915/intel_connector.c +++ b/drivers/gpu/drm/i915/intel_connector.c @@ -95,6 +95,10 @@ void intel_connector_destroy(struct drm_connector *connector) intel_panel_fini(&intel_connector->panel); drm_connector_cleanup(connector); + + if (intel_connector->port) + drm_dp_mst_put_port_malloc(intel_connector->port); + kfree(connector); } diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index f05427b74e34..631fd1537252 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -457,6 +457,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo intel_connector->get_hw_state = intel_dp_mst_get_hw_state; intel_connector->mst_port = intel_dp; intel_connector->port = port; + drm_dp_mst_get_port_malloc(port); connector = &intel_connector->base; ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 06/20] drm/dp_mst: Introduce new refcounting scheme for mstbs and ports
The current way of handling refcounting in the DP MST helpers is really
confusing and probably just plain wrong because it's been hacked up many
times over the years without anyone actually going over the code and
seeing if things could be simplified.
To the best of my understanding, the current scheme works like this:
drm_dp_mst_port and drm_dp_mst_branch both have a single refcount. When
this refcount hits 0 for either of the two, they're removed from the
topology state, but not immediately freed. Both ports and branch devices
will reinitialize their kref once it's hit 0 before actually destroying
themselves. The intended purpose behind this is so that we can avoid
problems like not being able to free a remote payload that might still
be active, due to us having removed all of the port/branch device
structures in memory, as per:
commit 91a25e463130 ("drm/dp/mst: deallocate payload on port destruction")
Which may have worked, but then it caused use-after-free errors. Being
new to MST at the time, I tried fixing it;
commit 263efde31f97 ("drm/dp/mst: Get validated port ref in
drm_dp_update_payload_part1()")
But, that was broken: both drm_dp_mst_port and drm_dp_mst_branch structs
are validated in almost every DP MST helper function. Simply put, this
means we go through the topology and try to see if the given
drm_dp_mst_branch or drm_dp_mst_port is still attached to something
before trying to use it in order to avoid dereferencing freed memory
(something that has happened a LOT in the past with this library).
Because of this it doesn't actually matter whether or not we keep keep
the ports and branches around in memory as that's not enough, because
any function that validates the branches and ports passed to it will
still reject them anyway since they're no longer in the topology
structure. So, use-after-free errors were fixed but payload deallocation
was completely broken.
Two years later, AMD informed me about this issue and I attempted to
come up with a temporary fix, pending a long-overdue cleanup of this
library:
commit c54c7374ff44 ("drm/dp_mst: Skip validating ports during destruction,
just ref")
But then that introduced use-after-free errors, so I quickly reverted
it:
commit 9765635b3075 ("Revert "drm/dp_mst: Skip validating ports during
destruction, just ref"")
And in the process, learned that there is just no simple fix for this:
the design is just broken. Unfortunately, the usage of these helpers are
quite broken as well. Some drivers like i915 have been smart enough to
avoid accessing any kind of information from MST port structures, but
others like nouveau have assumed, understandably so, that
drm_dp_mst_port structures are normal and can just be accessed at any
time without worrying about use-after-free errors.
After a lot of discussion, me and Daniel Vetter came up with a better
idea to replace all of this.
To summarize, since this is documented far more indepth in the
documentation this patch introduces, we make it so that drm_dp_mst_port
and drm_dp_mst_branch structures have two different classes of
refcounts: topology_kref, and malloc_kref. topology_kref corresponds to
the lifetime of the given drm_dp_mst_port or drm_dp_mst_branch in it's
given topology. Once it hits zero, any associated connectors are removed
and the branch or port can no longer be validated. malloc_kref
corresponds to the lifetime of the memory allocation for the actual
structure, and will always be non-zero so long as the topology_kref is
non-zero. This gives us a way to allow callers to hold onto port and
branch device structures past their topology lifetime, and dramatically
simplifies the lifetimes of both structures. This also finally fixes the
port deallocation problem, properly.
Additionally: since this now means that we can keep ports and branch
devices allocated in memory for however long we need, we no longer need
a significant amount of the port validation that we currently do.
Additionally, there is one last scenario that this fixes, which couldn't
have been fixed properly beforehand:
- CPU1 unrefs port from topology (refcount 1->0)
- CPU2 refs port in topology(refcount 0->1)
Since we now can guarantee memory safety for ports and branches
as-needed, we also can make our main reference counting functions fix
this problem by using kref_get_unless_zero() internally so that topology
refcounts can only ever reach 0 once.
Changes since v3:
* Remove rebase detritus - danvet
* Split out purely style changes into separate patches - hwentlan
Changes since v2:
* Fix commit message - checkpatch
* s/)-1/) - 1/g - checkpatch
Changes since v1:
* Remove forward declarations - danvet
* Move "Branch device and port refcounting" section from documentation
into kernel-doc comments - danvet
* Export internal topology lifetime functions into their own section in
the kernel-docs - danvet
* s/@/&/g for struct references in kernel-docs - danvet
* Drop the "when they are no longer being used" bits from the kern
[Intel-gfx] [PATCH v5 07/20] drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref fails
While this isn't a complete fix, this will improve the reliability of
drm_dp_get_last_connected_port_and_mstb() pretty significantly during
hotplug events, since there's a chance that the in-memory topology tree
may not be fully updated when drm_dp_get_last_connected_port_and_mstb()
is called and thus might end up causing our search to fail on an mstb
whose topology refcount has reached 0, but has not yet been removed from
it's parent.
Ideally, we should further fix this problem by ensuring that we deal
with the potential for racing with a hotplug event, which would look
like this:
* drm_dp_payload_send_msg() retrieves the last living relative of mstb
with drm_dp_get_last_connected_port_and_mstb()
* drm_dp_payload_send_msg() starts building payload message
At the same time, mstb gets unplugged from the topology and is no
longer the actual last living relative of the original mstb
* drm_dp_payload_send_msg() tries sending the payload message, hub times
out
* Hub timed out, we give up and run away-resulting in the payload being
leaked
This could be fixed by restarting the
drm_dp_get_last_connected_port_and_mstb() search whenever we get a
timeout, sending the payload to the new mstb, then repeating until
either the entire topology is removed from the system or
drm_dp_get_last_connected_port_and_mstb() fails. But since the above
race condition is not terribly likely, we'll address that in a later
patch series once we've improved the recovery handling for VCPI
allocations in the rest of the DP MST helpers.
Signed-off-by: Lyude Paul
Reviewed-by: Harry Wentland
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 54 ++-
1 file changed, 44 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index c53cf7eb1dbc..bafc85f08606 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2047,24 +2047,50 @@ static struct drm_dp_mst_port
*drm_dp_get_last_connected_port_to_mstb(struct drm
return
drm_dp_get_last_connected_port_to_mstb(mstb->port_parent->parent);
}
-static struct drm_dp_mst_branch
*drm_dp_get_last_connected_port_and_mstb(struct drm_dp_mst_topology_mgr *mgr,
-struct
drm_dp_mst_branch *mstb,
-int
*port_num)
+/**
+ * drm_dp_get_last_connected_port_and_mstb() - Find the last living relatives
+ * in a topology of a given branch device
+ * @mgr: The topology manager to use
+ * @mstb: The disconnected branch device
+ * @port_num: Where to store the number of the last connected port
+ *
+ * Searches upwards in the topology starting from @mstb to try to find the
+ * closest available parent of @mstb that's still connected to the rest of the
+ * topology. This can be used in order to perform operations like releasing
+ * payloads, where the branch device which owned the payload may no longer be
+ * around and thus would require that the payload on the last living relative
+ * be freed instead.
+ *
+ * Returns:
+ * The last connected &drm_dp_mst_branch in the topology that was a parent of
+ * @mstb, if there is one.
+ */
+static struct drm_dp_mst_branch *
+drm_dp_get_last_connected_port_and_mstb(struct drm_dp_mst_topology_mgr *mgr,
+ struct drm_dp_mst_branch *mstb,
+ int *port_num)
{
struct drm_dp_mst_branch *rmstb = NULL;
struct drm_dp_mst_port *found_port;
+
mutex_lock(&mgr->lock);
- if (mgr->mst_primary) {
+ if (!mgr->mst_primary)
+ goto out;
+
+ do {
found_port = drm_dp_get_last_connected_port_to_mstb(mstb);
+ if (!found_port)
+ break;
- if (found_port) {
+ if (drm_dp_mst_topology_try_get_mstb(found_port->parent)) {
rmstb = found_port->parent;
- if (drm_dp_mst_topology_try_get_mstb(rmstb))
- *port_num = found_port->port_num;
- else
- rmstb = NULL;
+ *port_num = found_port->port_num;
+ } else {
+ /* Search again, starting from this parent */
+ mstb = found_port->parent;
}
- }
+ } while (!rmstb);
+out:
mutex_unlock(&mgr->lock);
return rmstb;
}
@@ -2113,6 +2139,14 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
drm_dp_queue_down_tx(mgr, txmsg);
+ /*
+* FIXME: there is a small chance that between getting the last
+* connected mstb and sending the payload message, the last connected
+* mstb could also be removed from the topolo
[Intel-gfx] [PATCH v5 01/20] drm/dp_mst: Fix some formatting in drm_dp_add_port()
Reindent some stuff, and split some stuff across multiple lines so we
aren't going over the text width limit.
Signed-off-by: Lyude Paul
Reviewed-by: Harry Wentland
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 2ab16c9e6243..c93bff5527fd 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1184,11 +1184,13 @@ static void drm_dp_add_port(struct drm_dp_mst_branch
*mstb,
if (old_ddps != port->ddps) {
if (port->ddps) {
- if (!port->input)
- drm_dp_send_enum_path_resources(mstb->mgr,
mstb, port);
+ if (!port->input) {
+ drm_dp_send_enum_path_resources(mstb->mgr,
+ mstb, port);
+ }
} else {
port->available_pbn = 0;
- }
+ }
}
if (old_pdt != port->pdt && !port->input) {
@@ -1202,8 +1204,11 @@ static void drm_dp_add_port(struct drm_dp_mst_branch
*mstb,
if (created && !port->input) {
char proppath[255];
- build_mst_prop_path(mstb, port->port_num, proppath,
sizeof(proppath));
- port->connector = (*mstb->mgr->cbs->add_connector)(mstb->mgr,
port, proppath);
+ build_mst_prop_path(mstb, port->port_num, proppath,
+ sizeof(proppath));
+ port->connector = (*mstb->mgr->cbs->add_connector)(mstb->mgr,
+ port,
+ proppath);
if (!port->connector) {
/* remove it from the port list */
mutex_lock(&mstb->mgr->lock);
@@ -1216,7 +1221,8 @@ static void drm_dp_add_port(struct drm_dp_mst_branch
*mstb,
if ((port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV ||
port->pdt == DP_PEER_DEVICE_SST_SINK) &&
port->port_num >= DP_MST_LOGICAL_PORT_0) {
- port->cached_edid = drm_get_edid(port->connector,
&port->aux.ddc);
+ port->cached_edid = drm_get_edid(port->connector,
+&port->aux.ddc);
drm_connector_set_tile_property(port->connector);
}
(*mstb->mgr->cbs->register_connector)(port->connector);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 02/20] drm/dp_mst: Fix some formatting in drm_dp_payload_send_msg()
Split some stuff across multiple lines, remove some unnecessary braces
Signed-off-by: Lyude Paul
Reviewed-by: Harry Wentland
Cc: Daniel Vetter
Cc: David Airlie
Cc: Jerry Zuo
Cc: Juston Li
---
drivers/gpu/drm/drm_dp_mst_topology.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index c93bff5527fd..fc93a71c42b0 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1331,9 +1331,9 @@ static struct drm_dp_mst_branch
*get_mst_branch_device_by_guid_helper(
return NULL;
}
-static struct drm_dp_mst_branch *drm_dp_get_mst_branch_device_by_guid(
- struct drm_dp_mst_topology_mgr *mgr,
- uint8_t *guid)
+static struct drm_dp_mst_branch *
+drm_dp_get_mst_branch_device_by_guid(struct drm_dp_mst_topology_mgr *mgr,
+uint8_t *guid)
{
struct drm_dp_mst_branch *mstb;
@@ -1739,7 +1739,9 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
port_num = port->port_num;
mstb = drm_dp_get_validated_mstb_ref(mgr, port->parent);
if (!mstb) {
- mstb = drm_dp_get_last_connected_port_and_mstb(mgr,
port->parent, &port_num);
+ mstb = drm_dp_get_last_connected_port_and_mstb(mgr,
+ port->parent,
+ &port_num);
if (!mstb) {
drm_dp_put_port(port);
@@ -1765,9 +1767,9 @@ static int drm_dp_payload_send_msg(struct
drm_dp_mst_topology_mgr *mgr,
ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
if (ret > 0) {
- if (txmsg->reply.reply_type == 1) {
+ if (txmsg->reply.reply_type == 1)
ret = -EINVAL;
- } else
+ else
ret = 0;
}
kfree(txmsg);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 00/20] MST refcounting/atomic helpers cleanup
This is the series I've been working on for a while now to get all of the atomic DRM drivers in the tree to use the atomic MST helpers, and to make the atomic MST helpers actually idempotent. Turns out it's a lot more difficult to do that without also fixing how port and branch device refcounting works so that it actually makes sense, since the current upstream implementation requires a ton of magic in the atomic helpers to work around properly and in many situations just plain doesn't work as intended. There's still more cleanup that can be done, but I think this is a good place to start off for now :). Also available on gitlab: https://gitlab.freedesktop.org/lyudess/linux/commits/wip/mst-dual-kref-start-v5 Cc: Harry Wentland Cc: Daniel Vetter Cc: David Airlie Cc: Jerry Zuo Cc: Juston Li Lyude Paul (20): drm/dp_mst: Fix some formatting in drm_dp_add_port() drm/dp_mst: Fix some formatting in drm_dp_payload_send_msg() drm/dp_mst: Fix some formatting in drm_dp_mst_allocate_vcpi() drm/dp_mst: Fix some formatting in drm_dp_mst_deallocate_vcpi() drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends drm/dp_mst: Introduce new refcounting scheme for mstbs and ports drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref fails drm/dp_mst: Stop releasing VCPI when removing ports from topology drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs drm/i915: Keep malloc references to MST ports drm/amdgpu/display: Keep malloc ref to MST port drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector() drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup() drm/nouveau: Keep malloc references to MST ports drm/nouveau: Stop unsetting mstc->port, use malloc refs drm/nouveau: Grab payload lock in nv50_msto_payload() drm/dp_mst: Add some atomic state iterator macros drm/dp_mst: Start tracking per-port VCPI allocations drm/dp_mst: Check payload count in drm_dp_mst_atomic_check() drm/nouveau: Use atomic VCPI helpers for MST .../gpu/dp-mst/topology-figure-1.dot | 52 + .../gpu/dp-mst/topology-figure-2.dot | 56 + .../gpu/dp-mst/topology-figure-3.dot | 59 ++ Documentation/gpu/drm-kms-helpers.rst | 26 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 11 +- drivers/gpu/drm/drm_dp_mst_topology.c | 955 ++ drivers/gpu/drm/i915/intel_connector.c| 4 + drivers/gpu/drm/i915/intel_display.c | 4 + drivers/gpu/drm/i915/intel_dp_mst.c | 55 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 96 +- include/drm/drm_dp_mst_helper.h | 151 ++- 11 files changed, 1213 insertions(+), 256 deletions(-) create mode 100644 Documentation/gpu/dp-mst/topology-figure-1.dot create mode 100644 Documentation/gpu/dp-mst/topology-figure-2.dot create mode 100644 Documentation/gpu/dp-mst/topology-figure-3.dot -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree
Hi Daniel, On Tue, 8 Jan 2019 09:37:22 +0100 Daniel Vetter wrote: > > > https://cgit.freedesktop.org/drm-tip/tree/fixups/drm-misc-next.patch?h=rerere-cache > > is the fixup you want. Should get baked into drm-next any moment, since > the first drm-misc-next pull is already out. I added that resolution for today, thanks. -- Cheers, Stephen Rothwell pgpYygTl1eIdv.pgp Description: OpenPGP digital signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v4] drm/i915: Downgrade scare message for unknown HuC firmware
Quoting Michal Wajdeczko (2019-01-08 22:33:18) > On Tue, 08 Jan 2019 16:02:46 +0100, Chris Wilson > wrote: > > > If we haven't shipped and enabled firmware for a particular platform, > > there is nothing the user can do about it. Don't scare the user with an > > unactionable, unidentifiable warning! > > > > <6> [310.769452] i915 :00:02.0: GuC: No firmware known for this > > platform! > > <4> [310.769458] [drm] HuC: No firmware known for this platform! > > > > Unify both GuC/HuC messages to include the device for which we lack the > > firmware, and provide the platform name as an aide-memoire. > > > > v2: Move and refine the message to common site of intel_uc_fw_fetch. > > > > Signed-off-by: Chris Wilson > > Cc: Michal Wajdeczko > > --- > Reviewed-by: Michal Wajdeczko Ta, fwiw this brings us one step closer to turning off dmesg filtering ala https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2194/ -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Downgrade scare message for unknwown HuC firmware (rev4)
== Series Details == Series: drm/i915: Downgrade scare message for unknwown HuC firmware (rev4) URL : https://patchwork.freedesktop.org/series/54868/ State : success == Summary == CI Bug Log - changes from CI_DRM_5378_full -> Patchwork_11253_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11253_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@kms_atomic@plane_primary_legacy: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +8 * igt@kms_atomic_transition@1x-modeset-transitions-fencing: - shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108470] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +3 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge: - shard-skl: NOTRUN -> FAIL [fdo#104671] * igt@kms_color@pipe-a-ctm-0-5: - shard-apl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +3 * igt@kms_cursor_crc@cursor-256x85-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232] * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +5 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-skl: NOTRUN -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-tilingchange: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +3 * igt@kms_frontbuffer_tracking@fbcpsr-stridechange: - shard-iclb: PASS -> FAIL [fdo#105683] / [fdo#108040] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt: - shard-iclb: PASS -> FAIL [fdo#103167] * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: - shard-skl: PASS -> FAIL [fdo#103191] / [fdo#107362] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@pixel-format-pipe-c-planes: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes: - shard-skl: NOTRUN -> FAIL [fdo#103166] * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] +1 * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: - shard-skl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-a-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-kbl: NOTRUN -> FAIL [fdo#103166] * igt@kms_setmode@basic: - shard-kbl: NOTRUN -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-iclb: PASS -> FAIL [fdo#100047] * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@pm_rpm@modeset-lpsp-stress-no-wait: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@pm_rpm@universal-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] / [fdo#108756] * igt@sw_sync@sync_busy_fork: - shard-hsw: PASS -> INCOMPLETE [fdo#103540] Possible fixes * igt@i915_selftest@live_workarounds: - shard-iclb: DMESG-FAIL [fdo#108954] -> PASS * igt@kms_busy@extended-pageflip-hang-newfb-render-c: - shard-glk: DMESG-WARN [fdo#107956] -> PASS * igt@kms_color@pipe-c-legacy-gamma: - shard-apl: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-128x128-sliding: - shard-skl: FAIL [fdo#103232] -> PASS * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS +1 * igt@kms_cursor_crc@cursor-256x85-random: - shard-apl: FAIL [fdo#103232] -> PASS +4 * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-glk: FAIL [fdo#103232] -> PASS +2 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-ytiled: - shard-skl: FAIL [fdo#103184] -> PASS * igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: - shard-iclb: WARN [fdo#108336] -> PASS +3 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cu
Re: [Intel-gfx] [PATCH v4] drm/i915: Downgrade scare message for unknown HuC firmware
On Tue, 08 Jan 2019 16:02:46 +0100, Chris Wilson wrote: If we haven't shipped and enabled firmware for a particular platform, there is nothing the user can do about it. Don't scare the user with an unactionable, unidentifiable warning! <6> [310.769452] i915 :00:02.0: GuC: No firmware known for this platform! <4> [310.769458] [drm] HuC: No firmware known for this platform! Unify both GuC/HuC messages to include the device for which we lack the firmware, and provide the platform name as an aide-memoire. v2: Move and refine the message to common site of intel_uc_fw_fetch. Signed-off-by: Chris Wilson Cc: Michal Wajdeczko --- Reviewed-by: Michal Wajdeczko Thanks, Michal ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/gvt: give the cmd parser decode_info a const treatment
== Series Details == Series: series starting with [1/2] drm/i915/gvt: give the cmd parser decode_info a const treatment URL : https://patchwork.freedesktop.org/series/54884/ State : success == Summary == CI Bug Log - changes from CI_DRM_5378_full -> Patchwork_11252_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11252_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@gem_workarounds@suspend-resume-context: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@i915_suspend@sysfs-reader: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +3 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-skl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x85-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] +4 * igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +4 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-untiled: - shard-iclb: PASS -> WARN [fdo#108336] +1 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-apl: PASS -> FAIL [fdo#102887] / [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-render: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-skl: NOTRUN -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-skl: NOTRUN -> FAIL [fdo#105683] * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c: - shard-skl: PASS -> FAIL [fdo#107362] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@pixel-format-pipe-c-planes: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] +2 * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: - shard-skl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-kbl: NOTRUN -> FAIL [fdo#103166] * igt@kms_setmode@basic: - shard-kbl: NOTRUN -> FAIL [fdo#99912] * igt@perf_pmu@rc6-runtime-pm-long: - shard-skl: PASS -> FAIL [fdo#105010] * igt@pm_rpm@debugfs-read: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +9 * igt@pm_rpm@fences-dpms: - shard-skl: PASS -> INCOMPLETE [fdo#107807] * igt@pm_rpm@legacy-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] Possible fixes * igt@gem_userptr_blits@readonly-unsync: - shard-skl: TIMEOUT [fdo#108887] -> PASS * igt@i915_selftest@live_workarounds: - shard-iclb: DMESG-FAIL [fdo#108954] -> PASS * igt@kms_atomic_transition@plane-all-transition: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#109225] -> PASS * igt@kms_available_modes_crc@available_mode_test_crc: - shard-apl: FAIL [fdo#106641] -> PASS * igt@kms_color@pipe-c-legacy-gamma: - shard-apl: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS * igt@kms_cursor_crc@cursor-256x85-random: - shard-apl: FAIL [fdo#103232] -> PASS +4 * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-glk: FAIL [fdo#103232] -> PASS +2 * igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +9 * igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: - shard-iclb: WARN [fdo#108336] -> PASS +2 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: DMESG-FAIL [fdo#107724] -> PASS +2 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-glk: FAIL [fdo#103167] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-apl: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fb
Re: [Intel-gfx] [PATCH v4 00/16] MST refcounting/atomic helpers cleanup
On Tue, 2019-01-08 at 19:57 +, Wentland, Harry wrote: > On 2019-01-04 7:14 p.m., Lyude Paul wrote: > > This is the series I've been working on for a while now to get all of > > the atomic DRM drivers in the tree to use the atomic MST helpers, and to > > make the atomic MST helpers actually idempotent. Turns out it's a lot > > more difficult to do that without also fixing how port and branch device > > refcounting works so that it actually makes sense, since the current > > upstream implementation requires a ton of magic in the atomic helpers to > > work around properly and in many situations just plain doesn't work as > > intended. > > > > There's still more cleanup that can be done, but I think this is a good > > place to start off for now :). > > > > This version just contains some changes that I forgot to make that had > > been requested much earlier, mainly in regards to the atomic checking > > code I added to i915 and nouveau (but not the helpers). > > > > Also, per-request I've made a gitlab branch available for this: > > > > https://gitlab.freedesktop.org/lyudess/linux/commits/wip/mst-dual-kref-start-v4 > > > > Lyude Paul (16): > > drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and > > friends > > drm/dp_mst: Introduce new refcounting scheme for mstbs and ports > > drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref > > fails > > drm/dp_mst: Stop releasing VCPI when removing ports from topology > > drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs > > drm/i915: Keep malloc references to MST ports > > drm/amdgpu/display: Keep malloc ref to MST port > > drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector() > > drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup() > > drm/nouveau: Keep malloc references to MST ports > > drm/nouveau: Stop unsetting mstc->port, use malloc refs > > drm/nouveau: Grab payload lock in nv50_msto_payload() > > drm/dp_mst: Add some atomic state iterator macros > > drm/dp_mst: Start tracking per-port VCPI allocations > > drm/dp_mst: Check payload count in drm_dp_mst_atomic_check() > > drm/nouveau: Use atomic VCPI helpers for MST > > > > Somehow I left my RB on v2 for a while. Either way patches 2-5, and 7 are > Reviewed-by: Harry Wentland > > Haven't had a chance to take a look at 13-15 but noticed the "Changes since > v" mention versions that either aren't on the mailing list or don't line up > with the patch versioning. That's intentional! Those were patches that were part of a different series that got replaced by this one, so the older versions are from the previous series > > Harry > > > .../gpu/dp-mst/topology-figure-1.dot | 52 + > > .../gpu/dp-mst/topology-figure-2.dot | 56 ++ > > .../gpu/dp-mst/topology-figure-3.dot | 59 ++ > > Documentation/gpu/drm-kms-helpers.rst | 26 +- > > .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 11 +- > > drivers/gpu/drm/drm_dp_mst_topology.c | 938 ++ > > drivers/gpu/drm/i915/intel_connector.c| 4 + > > drivers/gpu/drm/i915/intel_display.c | 4 + > > drivers/gpu/drm/i915/intel_dp_mst.c | 55 +- > > drivers/gpu/drm/nouveau/dispnv50/disp.c | 96 +- > > include/drm/drm_dp_mst_helper.h | 151 ++- > > 11 files changed, 1203 insertions(+), 249 deletions(-) > > create mode 100644 Documentation/gpu/dp-mst/topology-figure-1.dot > > create mode 100644 Documentation/gpu/dp-mst/topology-figure-2.dot > > create mode 100644 Documentation/gpu/dp-mst/topology-figure-3.dot > > -- Cheers, Lyude Paul ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/icl: Apply WaEnablePreemptionGranularityControlByUMD
On Tuesday, January 8, 2019 7:53:05 AM PST Joonas Lahtinen wrote: > + Ken/Jason for Mesa > Quoting Matt Roper (2019-01-07 21:19:31) > > On Mon, Jan 07, 2019 at 01:23:50PM +0100, Michał Winiarski wrote: > > > On Mon, Jan 07, 2019 at 01:01:16PM +0200, Joonas Lahtinen wrote: > > > > Quoting José Roberto de Souza (2019-01-04 19:37:00) > > > > > According to Workaround database ICL also needs > > > > > WaEnablePreemptionGranularityControlByUMD, to allow userspace to do > > > > > fine-granularity preemptions per-context. > > > > > > > > I must wonder where is the userspace component that needs this, and why > > > > it hasn't been noticed earlier? > > > > > > > > Or is this one more of the cases when no userspace actually uses the > > > > register? > > > > > > It's used: > > > https://gitlab.freedesktop.org/mesa/mesa/blob/master/src/mesa/drivers/dri/i965/brw_state_upload.c#L64 > > > > > > -Michał > > > > Wasn't this just an artificial i915-only workaround that was added to > > prevent breakage of pre-preemption UMD's? Initial gen9 driver releases > > didn't support preemption, so when preemption support did get added to > > i915, the kernel had to force object-level off by default at context > > creation to avoid breaking old userspace that didn't build batch buffers > > with all the necessary preemption workarounds. This CS_CHICKEN1 > > register was then exposed to userspace so that newer, preemption-aware > > userspace could opt back in if it properly supported preemption. > > > > For gen11, there shouldn't be any "old" userspace around that doesn't > > support preemption, so shouldn't the kernel just leave object-level > > preemption enabled by default (meaning there's no need to expose this > > register to userspace to allow it to explicitly opt-in)? > > Makes sense to me. We should have known by know if somebody expects to > control the register, because they would be failing to do so. > > Mesa could also drop the register load for Gen11+ > > Regards, Joonas + Rafael, as he's done all the preemption work in Mesa. That seems reasonable to me. It looks like i965 always enables mid-object preemption (sets CS_CHICKEN1 bit 0) on Gen10+, and never disables it. You can probably safely turn it on by default, and we can stop writing the register altogether. Thanks for the heads up! --Ken signature.asc Description: This is a digitally signed message part. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3] drm/i915: Track all held rpm wakerefs
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.0-rc1 next-20190108]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Track-all-held-rpm-wakerefs/20190108-233439
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-s5-01090236 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/intel_runtime_pm.o: In function
`__print_intel_runtime_pm_wakeref':
>> drivers/gpu/drm/i915/intel_runtime_pm.c:154: undefined reference to
>> `depot_fetch_stack'
>> drivers/gpu/drm/i915/intel_runtime_pm.c:154: undefined reference to
>> `depot_fetch_stack'
>> drivers/gpu/drm/i915/intel_runtime_pm.c:154: undefined reference to
>> `depot_fetch_stack'
>> drivers/gpu/drm/i915/intel_runtime_pm.c:154: undefined reference to
>> `depot_fetch_stack'
drivers/gpu/drm/i915/intel_runtime_pm.o: In function
`track_intel_runtime_pm_wakeref':
>> drivers/gpu/drm/i915/intel_runtime_pm.c:86: undefined reference to
>> `depot_save_stack'
vim +154 drivers/gpu/drm/i915/intel_runtime_pm.c
64
65 static noinline void
66 track_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
67 {
68 struct i915_runtime_pm *rpm = &i915->runtime_pm;
69 unsigned long entries[STACKDEPTH];
70 struct stack_trace trace = {
71 .entries = entries,
72 .max_entries = ARRAY_SIZE(entries),
73 .skip = 0 /* gcc is ignoring noinline for tail calls? */
74 };
75 unsigned long flags;
76 depot_stack_handle_t stack, *stacks;
77
78 if (!HAS_RUNTIME_PM(i915))
79 return;
80
81 save_stack_trace(&trace);
82 if (trace.nr_entries &&
83 trace.entries[trace.nr_entries - 1] == ULONG_MAX)
84 trace.nr_entries--;
85
> 86 stack = depot_save_stack(&trace, GFP_NOWAIT | __GFP_NOWARN);
87 if (!stack)
88 return;
89
90 spin_lock_irqsave(&rpm->debug_lock, flags);
91 stacks = krealloc(rpm->debug_owners,
92(rpm->debug_count + 1) * sizeof(*stacks),
93GFP_NOWAIT | __GFP_NOWARN);
94 if (stacks) {
95 stacks[rpm->debug_count++] = stack;
96 rpm->debug_owners = stacks;
97 }
98 spin_unlock_irqrestore(&rpm->debug_lock, flags);
99 }
100
101 static void untrack_intel_runtime_pm_wakeref(struct drm_i915_private
*i915)
102 {
103 struct i915_runtime_pm *rpm = &i915->runtime_pm;
104 depot_stack_handle_t *stacks;
105 unsigned long flags;
106
107 spin_lock_irqsave(&rpm->debug_lock, flags);
108 stacks = fetch_and_zero(&rpm->debug_owners);
109 rpm->debug_count = 0;
110 spin_unlock_irqrestore(&rpm->debug_lock, flags);
111
112 kfree(stacks);
113 }
114
115 static int cmphandle(const void *_a, const void *_b)
116 {
117 const depot_stack_handle_t * const a = _a, * const b = _b;
118
119 if (*a < *b)
120 return -1;
121 else if (*a > *b)
122 return 1;
123 else
124 return 0;
125 }
126
127 static void __print_intel_runtime_pm_wakeref(struct drm_printer *p,
128 depot_stack_handle_t
*stacks,
129 unsigned long count)
130 {
131 unsigned long entries[STACKDEPTH];
132 unsigned long i;
133 char *buf;
134
135 drm_printf(p, "Wakeref count: %lu\n", count);
136
137 buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
138 if (!buf)
139 return;
140
141 sort(stacks, count, sizeof(*stacks), cmphandle, NULL);
142
143 for (i = 0; i < count; i++) {
144 struct stack_trace trace = {
145 .entries = entries,
146 .max_entries = ARRAY_SIZE(entries),
147 };
148 depot_stack_handle_t stack = stacks[i];
149 unsigned long rep;
150
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start (rev2)
== Series Details == Series: series starting with [1/2] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start (rev2) URL : https://patchwork.freedesktop.org/series/54869/ State : success == Summary == CI Bug Log - changes from CI_DRM_5378_full -> Patchwork_11251_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11251_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +4 * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +3 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_color@pipe-b-ctm-0-25: - shard-skl: PASS -> FAIL [fdo#108682] * igt@kms_cursor_crc@cursor-256x85-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] +4 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_flip@2x-flip-vs-modeset: - shard-hsw: PASS -> DMESG-WARN [fdo#102614] * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: PASS -> FAIL [fdo#105363] * igt@kms_frontbuffer_tracking@fbcpsr-suspend: - shard-iclb: PASS -> INCOMPLETE [fdo#106978] / [fdo#107713] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-skl: NOTRUN -> FAIL [fdo#103167] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] +2 * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1 * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: - shard-skl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-a-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-kbl: NOTRUN -> FAIL [fdo#103166] * igt@pm_rpm@dpms-mode-unset-lpsp: - shard-skl: PASS -> INCOMPLETE [fdo#107807] * igt@pm_rpm@modeset-lpsp-stress-no-wait: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] * igt@sw_sync@sync_busy_fork_unixsocket: - shard-apl: PASS -> INCOMPLETE [fdo#103927] Possible fixes * igt@i915_selftest@live_workarounds: - shard-iclb: DMESG-FAIL [fdo#108954] -> PASS * igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#109225] -> PASS +1 * igt@kms_available_modes_crc@available_mode_test_crc: - shard-apl: FAIL [fdo#106641] -> PASS * igt@kms_color@pipe-c-legacy-gamma: - shard-apl: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-128x128-sliding: - shard-skl: FAIL [fdo#103232] -> PASS * igt@kms_cursor_crc@cursor-256x256-suspend: - shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS * igt@kms_cursor_crc@cursor-256x85-random: - shard-apl: FAIL [fdo#103232] -> PASS +4 * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-glk: FAIL [fdo#103232] -> PASS +2 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-ytiled: - shard-skl: FAIL [fdo#103184] -> PASS * igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: - shard-iclb: WARN [fdo#108336] -> PASS +4 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: DMESG-FAIL [fdo#107724] -> PASS +4 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-iclb: DMESG-FAIL [fdo#107720] / [fdo#107724] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-glk: FAIL [fdo#103167] -> PASS +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-apl: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-onoff: - shard-iclb: FAIL [fdo#103167] -> PASS +3 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS +13 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff: - shard-skl: FAIL [fdo#103167] -> PASS * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
Re: [Intel-gfx] [PATCH v3] drm/i915: Downgrade scare message for unknown HuC firmware
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.0-rc1 next-20190108]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Downgrade-scare-message-for-unknown-HuC-firmware/20190109-020625
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-rhel-7.2-clear (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
In file included from include/drm/drm_print.h:32:0,
from drivers/gpu/drm/i915/intel_uc_fw.c:26:
drivers/gpu/drm/i915/intel_uc_fw.c: In function 'intel_uc_fw_fetch':
>> drivers/gpu/drm/i915/intel_uc_fw.c:52:29: error: 'const struct firmware' has
>> no member named 'type'
intel_uc_fw_type_repr(fw->type),
^
include/linux/device.h:1469:33: note: in definition of macro 'dev_info'
_dev_info(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~
vim +52 drivers/gpu/drm/i915/intel_uc_fw.c
> 26 #include
27
28 #include "intel_uc_fw.h"
29 #include "i915_drv.h"
30
31 /**
32 * intel_uc_fw_fetch - fetch uC firmware
33 *
34 * @dev_priv: device private
35 * @uc_fw: uC firmware
36 *
37 * Fetch uC firmware into GEM obj.
38 */
39 void intel_uc_fw_fetch(struct drm_i915_private *dev_priv,
40 struct intel_uc_fw *uc_fw)
41 {
42 struct pci_dev *pdev = dev_priv->drm.pdev;
43 struct drm_i915_gem_object *obj;
44 const struct firmware *fw = NULL;
45 struct uc_css_header *css;
46 size_t size;
47 int err;
48
49 if (!uc_fw->path) {
50 dev_info(dev_priv->drm.dev,
51 "%s: No firmware was defined for %s!\n",
> 52 intel_uc_fw_type_repr(fw->type),
53
intel_platform_name(INTEL_INFO(dev_priv)->platform));
54 return;
55 }
56
57 DRM_DEBUG_DRIVER("%s fw fetch %s\n",
58 intel_uc_fw_type_repr(uc_fw->type),
uc_fw->path);
59
60 uc_fw->fetch_status = INTEL_UC_FIRMWARE_PENDING;
61 DRM_DEBUG_DRIVER("%s fw fetch %s\n",
62 intel_uc_fw_type_repr(uc_fw->type),
63 intel_uc_fw_status_repr(uc_fw->fetch_status));
64
65 err = request_firmware(&fw, uc_fw->path, &pdev->dev);
66 if (err) {
67 DRM_DEBUG_DRIVER("%s fw request_firmware err=%d\n",
68 intel_uc_fw_type_repr(uc_fw->type),
err);
69 goto fail;
70 }
71
72 DRM_DEBUG_DRIVER("%s fw size %zu ptr %p\n",
73 intel_uc_fw_type_repr(uc_fw->type), fw->size,
fw);
74
75 /* Check the size of the blob before examining buffer contents
*/
76 if (fw->size < sizeof(struct uc_css_header)) {
77 DRM_WARN("%s: Unexpected firmware size (%zu, min
%zu)\n",
78 intel_uc_fw_type_repr(uc_fw->type),
79 fw->size, sizeof(struct uc_css_header));
80 err = -ENODATA;
81 goto fail;
82 }
83
84 css = (struct uc_css_header *)fw->data;
85
86 /* Firmware bits always start from header */
87 uc_fw->header_offset = 0;
88 uc_fw->header_size = (css->header_size_dw -
css->modulus_size_dw -
89css->key_size_dw - css->exponent_size_dw)
*
90 sizeof(u32);
91
92 if (uc_fw->header_size != sizeof(struct uc_css_header)) {
93 DRM_WARN("%s: Mismatched firmware header definition\n",
94 intel_uc_fw_type_repr(uc_fw->type));
95 err = -ENOEXEC;
96 goto fail;
97 }
98
99 /* then, uCode */
100 uc_fw->ucode_offset = uc_fw->header_offset + uc_fw->header_size;
101 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) *
sizeof(u32);
102
103 /* now RSA */
104 if (css->key_size_dw
Re: [Intel-gfx] [PATCH v4 00/16] MST refcounting/atomic helpers cleanup
On 2019-01-04 7:14 p.m., Lyude Paul wrote: > This is the series I've been working on for a while now to get all of > the atomic DRM drivers in the tree to use the atomic MST helpers, and to > make the atomic MST helpers actually idempotent. Turns out it's a lot > more difficult to do that without also fixing how port and branch device > refcounting works so that it actually makes sense, since the current > upstream implementation requires a ton of magic in the atomic helpers to > work around properly and in many situations just plain doesn't work as > intended. > > There's still more cleanup that can be done, but I think this is a good > place to start off for now :). > > This version just contains some changes that I forgot to make that had > been requested much earlier, mainly in regards to the atomic checking > code I added to i915 and nouveau (but not the helpers). > > Also, per-request I've made a gitlab branch available for this: > > https://gitlab.freedesktop.org/lyudess/linux/commits/wip/mst-dual-kref-start-v4 > > Lyude Paul (16): > drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and > friends > drm/dp_mst: Introduce new refcounting scheme for mstbs and ports > drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref > fails > drm/dp_mst: Stop releasing VCPI when removing ports from topology > drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs > drm/i915: Keep malloc references to MST ports > drm/amdgpu/display: Keep malloc ref to MST port > drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector() > drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup() > drm/nouveau: Keep malloc references to MST ports > drm/nouveau: Stop unsetting mstc->port, use malloc refs > drm/nouveau: Grab payload lock in nv50_msto_payload() > drm/dp_mst: Add some atomic state iterator macros > drm/dp_mst: Start tracking per-port VCPI allocations > drm/dp_mst: Check payload count in drm_dp_mst_atomic_check() > drm/nouveau: Use atomic VCPI helpers for MST > Somehow I left my RB on v2 for a while. Either way patches 2-5, and 7 are Reviewed-by: Harry Wentland Haven't had a chance to take a look at 13-15 but noticed the "Changes since v" mention versions that either aren't on the mailing list or don't line up with the patch versioning. Harry > .../gpu/dp-mst/topology-figure-1.dot | 52 + > .../gpu/dp-mst/topology-figure-2.dot | 56 ++ > .../gpu/dp-mst/topology-figure-3.dot | 59 ++ > Documentation/gpu/drm-kms-helpers.rst | 26 +- > .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 11 +- > drivers/gpu/drm/drm_dp_mst_topology.c | 938 ++ > drivers/gpu/drm/i915/intel_connector.c| 4 + > drivers/gpu/drm/i915/intel_display.c | 4 + > drivers/gpu/drm/i915/intel_dp_mst.c | 55 +- > drivers/gpu/drm/nouveau/dispnv50/disp.c | 96 +- > include/drm/drm_dp_mst_helper.h | 151 ++- > 11 files changed, 1203 insertions(+), 249 deletions(-) > create mode 100644 Documentation/gpu/dp-mst/topology-figure-1.dot > create mode 100644 Documentation/gpu/dp-mst/topology-figure-2.dot > create mode 100644 Documentation/gpu/dp-mst/topology-figure-3.dot > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [v4 10/12] drm/i915: Add HLG EOTF
On Tue, Jan 08, 2019 at 02:41:25PM +0530, Uma Shankar wrote:
> From: Ville Syrjälä
>
> ADD HLG EOTF to the list of EOTF transfer functions supported.
> Hybrid Log-Gamma (HLG) is a high dynamic range (HDR) standard.
> HLG defines a nonlinear transfer function in which the lower
> half of the signal values use a gamma curve and the upper half
> of the signal values use a logarithmic curve.
>
> v2: Rebase
>
> v3: Fixed a warning message
>
> v4: Addressed Shashank's review comments
>
> Signed-off-by: Ville Syrjälä
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/drm_edid.c | 4 ++--
> include/linux/hdmi.h | 1 +
> 2 files changed, 3 insertions(+), 2 deletions(-)
I haven't really looked at this series in depth, but just a quick
drive-by comment: it doesn't look like this patch touches i915, so the
"drm/i915:" headline prefix should probably just be "drm:" and you might
want to move it earlier in the series so that all the core patches come
before all the i915 patches.
Matt
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index df27012..5592c9b 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -3850,8 +3850,8 @@ static uint8_t eotf_supported(const u8 *edid_ext)
> return edid_ext[2] &
> (BIT(HDMI_EOTF_TRADITIONAL_GAMMA_SDR) |
>BIT(HDMI_EOTF_TRADITIONAL_GAMMA_HDR) |
> - BIT(HDMI_EOTF_SMPTE_ST2084));
> -
> + BIT(HDMI_EOTF_SMPTE_ST2084) |
> + BIT(HDMI_EOTF_BT_2100_HLG));
> }
>
> static uint8_t hdr_metadata_type(const u8 *edid_ext)
> diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
> index ce00e1e..b5346c3 100644
> --- a/include/linux/hdmi.h
> +++ b/include/linux/hdmi.h
> @@ -146,6 +146,7 @@ enum hdmi_eotf {
> HDMI_EOTF_TRADITIONAL_GAMMA_SDR,
> HDMI_EOTF_TRADITIONAL_GAMMA_HDR,
> HDMI_EOTF_SMPTE_ST2084,
> + HDMI_EOTF_BT_2100_HLG,
> };
>
> struct hdmi_avi_infoframe {
> --
> 1.9.1
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 07/16] drm/amdgpu/display: Keep malloc ref to MST port
On 2018-12-19 7:19 p.m., Lyude Paul wrote:
> Just like i915 and nouveau, it's a good idea for us to hold a malloc
> reference to the port here so that we never pass a freed pointer to any
> of the DP MST helper functions.
>
> Also, we stop unsetting aconnector->port in
> dm_dp_destroy_mst_connector(). There's literally no point to that
> assignment that I can see anyway.
>
> Signed-off-by: Lyude Paul
> Cc: Daniel Vetter
> Cc: David Airlie
> Cc: Jerry Zuo
> Cc: Harry Wentland
> Cc: Juston Li
Reviewed-by: Harry Wentland
Harry
> ---
> .../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 11 +++
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 5e7ca1f3a8d1..24632727e127 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@ -191,6 +191,7 @@ dm_dp_mst_connector_destroy(struct drm_connector
> *connector)
> drm_encoder_cleanup(&amdgpu_encoder->base);
> kfree(amdgpu_encoder);
> drm_connector_cleanup(connector);
> + drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
> kfree(amdgpu_dm_connector);
> }
>
> @@ -363,7 +364,9 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr
> *mgr,
> amdgpu_dm_connector_funcs_reset(connector);
>
> DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
> - aconnector, connector->base.id, aconnector->mst_port);
> + aconnector, connector->base.id, aconnector->mst_port);
> +
> + drm_dp_mst_get_port_malloc(port);
>
> DRM_DEBUG_KMS(":%d\n", connector->base.id);
>
> @@ -379,12 +382,12 @@ static void dm_dp_destroy_mst_connector(struct
> drm_dp_mst_topology_mgr *mgr,
> struct amdgpu_dm_connector *aconnector =
> to_amdgpu_dm_connector(connector);
>
> DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
> - aconnector, connector->base.id,
> aconnector->mst_port);
> + aconnector, connector->base.id, aconnector->mst_port);
>
> - aconnector->port = NULL;
> if (aconnector->dc_sink) {
> amdgpu_dm_update_freesync_caps(connector, NULL);
> - dc_link_remove_remote_sink(aconnector->dc_link,
> aconnector->dc_sink);
> + dc_link_remove_remote_sink(aconnector->dc_link,
> +aconnector->dc_sink);
> dc_sink_release(aconnector->dc_sink);
> aconnector->dc_sink = NULL;
> }
>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 04/16] drm/dp_mst: Stop releasing VCPI when removing ports from topology
On 2018-12-19 7:19 p.m., Lyude Paul wrote:
> This has never actually worked, and isn't needed anyway: the driver's
> always going to try to deallocate VCPI when it tears down the display
> that the VCPI belongs to.
>
> Signed-off-by: Lyude Paul
> Reviewed-by: Daniel Vetter
> Cc: David Airlie
> Cc: Jerry Zuo
> Cc: Harry Wentland
> Cc: Juston Li
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 8
> 1 file changed, 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 356a95aba2d8..ef8637f37564 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -1175,8 +1175,6 @@ static void drm_dp_destroy_port(struct kref *kref)
> struct drm_dp_mst_topology_mgr *mgr = port->mgr;
>
> if (!port->input) {
> - port->vcpi.num_slots = 0;
> -
> kfree(port->cached_edid);
>
> /*
> @@ -3491,12 +3489,6 @@ static void drm_dp_destroy_connector_work(struct
> work_struct *work)
> drm_dp_port_teardown_pdt(port, port->pdt);
> port->pdt = DP_PEER_DEVICE_NONE;
>
> - if (!port->input && port->vcpi.vcpi > 0) {
> - drm_dp_mst_reset_vcpi_slots(mgr, port);
> - drm_dp_update_payload_part1(mgr);
> - drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
> - }
> -
> drm_dp_mst_put_port_malloc(port);
> send_hotplug = true;
> }
>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 05/16] drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs
On 2018-12-19 7:19 p.m., Lyude Paul wrote:
> Up until now, freeing payloads on remote MST hubs that just had ports
> removed has almost never worked because we've been relying on port
> validation in order to stop us from accessing ports that have already
> been freed from memory, but ports which need their payloads released due
> to being removed will never be a valid part of the topology after
> they've been removed.
>
> Since we've introduced malloc refs, we can replace all of the validation
> logic in payload helpers which are used for deallocation with some
> well-placed malloc krefs. This ensures that regardless of whether or not
> the ports are still valid and in the topology, any port which has an
> allocated payload will remain allocated in memory until it's payloads
> have been removed - finally allowing us to actually release said
> payloads correctly.
>
> Signed-off-by: Lyude Paul
> Reviewed-by: Daniel Vetter
> Cc: David Airlie
> Cc: Jerry Zuo
> Cc: Harry Wentland
> Cc: Juston Li
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 54 +++
> 1 file changed, 30 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index ef8637f37564..11dd3ede7b7d 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -2100,10 +2100,6 @@ static int drm_dp_payload_send_msg(struct
> drm_dp_mst_topology_mgr *mgr,
> u8 sinks[DRM_DP_MAX_SDP_STREAMS];
> int i;
>
> - port = drm_dp_mst_topology_get_port_validated(mgr, port);
> - if (!port)
> - return -EINVAL;
> -
> port_num = port->port_num;
> mstb = drm_dp_mst_topology_get_mstb_validated(mgr, port->parent);
> if (!mstb) {
> @@ -2111,10 +2107,8 @@ static int drm_dp_payload_send_msg(struct
> drm_dp_mst_topology_mgr *mgr,
> port->parent,
> &port_num);
>
> - if (!mstb) {
> - drm_dp_mst_topology_put_port(port);
> + if (!mstb)
> return -EINVAL;
> - }
> }
>
> txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
> @@ -2151,7 +2145,6 @@ static int drm_dp_payload_send_msg(struct
> drm_dp_mst_topology_mgr *mgr,
> kfree(txmsg);
> fail_put:
> drm_dp_mst_topology_put_mstb(mstb);
> - drm_dp_mst_topology_put_port(port);
> return ret;
> }
>
> @@ -2256,15 +2249,16 @@ static int drm_dp_destroy_payload_step2(struct
> drm_dp_mst_topology_mgr *mgr,
> */
> int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr)
> {
> - int i, j;
> - int cur_slots = 1;
> struct drm_dp_payload req_payload;
> struct drm_dp_mst_port *port;
> + int i, j;
> + int cur_slots = 1;
>
> mutex_lock(&mgr->payload_lock);
> for (i = 0; i < mgr->max_payloads; i++) {
> struct drm_dp_vcpi *vcpi = mgr->proposed_vcpis[i];
> struct drm_dp_payload *payload = &mgr->payloads[i];
> + bool put_port = false;
>
> /* solve the current payloads - compare to the hw ones
> - update the hw view */
> @@ -2272,12 +2266,20 @@ int drm_dp_update_payload_part1(struct
> drm_dp_mst_topology_mgr *mgr)
> if (vcpi) {
> port = container_of(vcpi, struct drm_dp_mst_port,
> vcpi);
> - port = drm_dp_mst_topology_get_port_validated(mgr,
> - port);
> - if (!port) {
> - mutex_unlock(&mgr->payload_lock);
> - return -EINVAL;
> +
> + /* Validated ports don't matter if we're releasing
> + * VCPI
> + */
> + if (vcpi->num_slots) {
> + port = drm_dp_mst_topology_get_port_validated(
> + mgr, port);
> + if (!port) {
> + mutex_unlock(&mgr->payload_lock);
> + return -EINVAL;
> + }
> + put_port = true;
> }
> +
> req_payload.num_slots = vcpi->num_slots;
> req_payload.vcpi = vcpi->vcpi;
> } else {
> @@ -2309,7 +2311,7 @@ int drm_dp_update_payload_part1(struct
> drm_dp_mst_topology_mgr *mgr)
> }
> cur_slots += req_payload.num_slots;
>
> - if (port)
> + if (put_port)
> drm_dp_mst_topology_put_port(port);
> }
>
> @@ -3124,6 +3126,8 @@ bool drm_dp_mst_allocate_vcpi(struct
> drm_dp_ms
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/edid: Pass connector to AVI infoframe functions
== Series Details == Series: series starting with [1/4] drm/edid: Pass connector to AVI infoframe functions URL : https://patchwork.freedesktop.org/series/54903/ State : success == Summary == CI Bug Log - changes from CI_DRM_5379 -> Patchwork_11257 Summary --- **WARNING** Minor unknown changes coming with Patchwork_11257 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11257, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/54903/revisions/1/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11257: ### IGT changes ### Warnings * igt@pm_rpm@basic-pci-d3-state: - fi-byt-j1900: SKIP -> PASS Known issues Here are the changes found in Patchwork_11257 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: - fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362] * igt@kms_pipe_crc_basic@read-crc-pipe-a: - fi-byt-clapper: PASS -> FAIL [fdo#107362] Possible fixes * igt@gem_exec_basic@gtt-bsd2: - fi-skl-6770hq: DMESG-WARN [fdo#105541] -> PASS * igt@i915_selftest@live_execlists: - fi-apl-guc: INCOMPLETE [fdo#103927] -> PASS * igt@i915_selftest@live_hangcheck: - fi-bwr-2160:DMESG-FAIL [fdo#108735] -> PASS * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS * igt@pm_rpm@basic-rte: - fi-byt-j1900: FAIL [fdo#108800] -> PASS [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108735]: https://bugs.freedesktop.org/show_bug.cgi?id=108735 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 Participating hosts (49 -> 44) -- Missing(5): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-y fi-bdw-samus Build changes - * Linux: CI_DRM_5379 -> Patchwork_11257 CI_DRM_5379: cae04ddb2142baf68abdf7855e28c00a34b721b7 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11257: 1160986b9124f6ab4a272a02b0c86fb21c50e8ce @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 1160986b9124 drm/edid: Add display_info.rgb_quant_range_selectable 5c26d3c8456c drm/radeon: Use drm_hdmi_avi_infoframe_quant_range() 2fdd63b04109 drm/i915: Use drm_hdmi_avi_infoframe_quant_range() for SDVO HDMI as well fc4e6824a03c drm/edid: Pass connector to AVI infoframe functions == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11257/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 03/16] drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref fails
On 2018-12-19 7:19 p.m., Lyude Paul wrote:
> While this isn't a complete fix, this will improve the reliability of
> drm_dp_get_last_connected_port_and_mstb() pretty significantly during
> hotplug events, since there's a chance that the in-memory topology tree
> may not be fully updated when drm_dp_get_last_connected_port_and_mstb()
> is called and thus might end up causing our search to fail on an mstb
> whose topology refcount has reached 0, but has not yet been removed from
> it's parent.
>
> Ideally, we should further fix this problem by ensuring that we deal
> with the potential for racing with a hotplug event, which would look
> like this:
>
> * drm_dp_payload_send_msg() retrieves the last living relative of mstb
> with drm_dp_get_last_connected_port_and_mstb()
> * drm_dp_payload_send_msg() starts building payload message
> At the same time, mstb gets unplugged from the topology and is no
> longer the actual last living relative of the original mstb
> * drm_dp_payload_send_msg() tries sending the payload message, hub times
> out
> * Hub timed out, we give up and run away-resulting in the payload being
> leaked
>
> This could be fixed by restarting the
> drm_dp_get_last_connected_port_and_mstb() search whenever we get a
> timeout, sending the payload to the new mstb, then repeating until
> either the entire topology is removed from the system or
> drm_dp_get_last_connected_port_and_mstb() fails. But since the above
> race condition is not terribly likely, we'll address that in a later
> patch series once we've improved the recovery handling for VCPI
> allocations in the rest of the DP MST helpers.
>
> Signed-off-by: Lyude Paul
> Cc: Daniel Vetter
> Cc: David Airlie
> Cc: Jerry Zuo
> Cc: Harry Wentland
> Cc: Juston Li
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 55 +--
> 1 file changed, 44 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index b380ada09e90..356a95aba2d8 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -2043,25 +2043,50 @@ static struct drm_dp_mst_port
> *drm_dp_get_last_connected_port_to_mstb(struct drm
> return
> drm_dp_get_last_connected_port_to_mstb(mstb->port_parent->parent);
> }
>
> -static struct drm_dp_mst_branch
> *drm_dp_get_last_connected_port_and_mstb(struct drm_dp_mst_topology_mgr *mgr,
> - struct
> drm_dp_mst_branch *mstb,
> - int
> *port_num)
> +/**
> + * drm_dp_get_last_connected_port_and_mstb() - Find the last living relatives
> + * in a topology of a given branch device
> + * @mgr: The topology manager to use
> + * @mstb: The disconnected branch device
> + * @port_num: Where to store the number of the last connected port
> + *
> + * Searches upwards in the topology starting from @mstb to try to find the
> + * closest available parent of @mstb that's still connected to the rest of
> the
> + * topology. This can be used in order to perform operations like releasing
> + * payloads, where the branch device which owned the payload may no longer be
> + * around and thus would require that the payload on the last living relative
> + * be freed instead.
> + *
> + * Returns:
> + * The last connected &drm_dp_mst_branch in the topology that was a parent of
> + * @mstb, if there is one.
> + */
> +static struct drm_dp_mst_branch *
> +drm_dp_get_last_connected_port_and_mstb(struct drm_dp_mst_topology_mgr *mgr,
> + struct drm_dp_mst_branch *mstb,
> + int *port_num)
> {
> struct drm_dp_mst_branch *rmstb = NULL;
> struct drm_dp_mst_port *found_port;
> +
> mutex_lock(&mgr->lock);
> - if (mgr->mst_primary) {
> + if (!mgr->mst_primary)
> + goto out;
> +
> + do {
> found_port = drm_dp_get_last_connected_port_to_mstb(mstb);
> + if (!found_port)
> + break;
>
> - if (found_port) {
> + if (drm_dp_mst_topology_try_get_mstb(found_port->parent)) {
> rmstb = found_port->parent;
> - if (drm_dp_mst_topology_try_get_mstb(rmstb)) {
> - *port_num = found_port->port_num;
> - } else {
> - rmstb = NULL;
> - }
> + *port_num = found_port->port_num;
> + } else {
> + /* Search again, starting from this parent */
> + mstb = found_port->parent;
> }
> - }
> + } while (!rmstb);
> +out:
> mutex_unlock(&mgr->lock);
> return rmstb;
> }
> @@ -2110,6 +2135,14 @@ static int drm_dp_payload_send_msg(struct
> drm_dp_mst_topolo
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Enable render context support for Ironlake (gen5)
== Series Details == Series: series starting with [1/2] drm/i915: Enable render context support for Ironlake (gen5) URL : https://patchwork.freedesktop.org/series/54876/ State : success == Summary == CI Bug Log - changes from CI_DRM_5378_full -> Patchwork_11249_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11249_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@gem_userptr_blits@readonly-unsync: - shard-apl: PASS -> INCOMPLETE [fdo#103927] * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +4 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-kbl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_color@pipe-b-ctm-0-25: - shard-skl: PASS -> FAIL [fdo#108682] * igt@kms_cursor_crc@cursor-128x42-sliding: - shard-apl: PASS -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-skl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] * igt@kms_draw_crc@draw-method-rgb565-render-xtiled: - shard-skl: PASS -> FAIL [fdo#103184] * igt@kms_flip@dpms-vs-vblank-race-interruptible: - shard-kbl: PASS -> FAIL [fdo#103060] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-skl: NOTRUN -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-glk: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> FAIL [fdo#103167] +5 * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c: - shard-skl: PASS -> FAIL [fdo#107362] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1 * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-a-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-kbl: NOTRUN -> FAIL [fdo#103166] * igt@pm_rpm@dpms-lpsp: - shard-skl: PASS -> INCOMPLETE [fdo#107807] * igt@pm_rpm@legacy-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] * igt@pm_rpm@modeset-stress-extra-wait: - shard-skl: NOTRUN -> INCOMPLETE [fdo#107807] * igt@pm_rps@min-max-config-loaded: - shard-skl: PASS -> FAIL [fdo#102250] Possible fixes * igt@i915_selftest@live_workarounds: - shard-iclb: DMESG-FAIL [fdo#108954] -> PASS * igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#109225] -> PASS +1 * igt@kms_color@pipe-c-legacy-gamma: - shard-apl: FAIL [fdo#104782] -> PASS * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: FAIL [fdo#103232] -> PASS +2 - shard-glk: FAIL [fdo#103232] -> PASS +2 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-ytiled: - shard-skl: FAIL [fdo#103184] -> PASS * igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: - shard-iclb: WARN [fdo#108336] -> PASS +4 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: DMESG-FAIL [fdo#107724] -> PASS +5 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-iclb: DMESG-FAIL [fdo#107720] / [fdo#107724] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: FAIL [fdo#103167] -> PASS +5 - shard-glk: FAIL [fdo#103167] -> PASS +1 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#108336] -> P
[Intel-gfx] Clang warning in drivers/gpu/drm/i915/i915_debugfs.c
Hi all,
Commit e845f099f1c6 ("drm/i915/dsc: Add Per connector debugfs node for
DSC support/enable") causes a Clang warning:
drivers/gpu/drm/i915/i915_debugfs.c:4961:17: warning: address of array
'intel_dp->dsc_dpcd' will always evaluate to 'true' [-Wpointer-bool-conversion]
if (intel_dp->dsc_dpcd)
~~ ~~^~~~
1 warning generated.
Did you mean to dereference it or should that print statement just
always show? I normally would send a patch myself but since I'm not
familiar with this code, I'd rather not shoot in the dark :) especially
since it's for a trivial logging statement.
Thanks,
Nathan
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/edid: Pass connector to AVI infoframe functions
== Series Details == Series: series starting with [1/4] drm/edid: Pass connector to AVI infoframe functions URL : https://patchwork.freedesktop.org/series/54903/ State : warning == Summary == $ dim checkpatch origin/drm-tip fc4e6824a03c drm/edid: Pass connector to AVI infoframe functions 2fdd63b04109 drm/i915: Use drm_hdmi_avi_infoframe_quant_range() for SDVO HDMI as well 5c26d3c8456c drm/radeon: Use drm_hdmi_avi_infoframe_quant_range() -:43: WARNING:LONG_LINE: line over 100 characters #43: FILE: drivers/gpu/drm/radeon/radeon_audio.c:527: + radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB ? -:46: WARNING:LONG_LINE: line over 100 characters #46: FILE: drivers/gpu/drm/radeon/radeon_audio.c:530: + drm_rgb_quant_range_selectable(radeon_connector_edid(connector))); total: 0 errors, 2 warnings, 0 checks, 19 lines checked 1160986b9124 drm/edid: Add display_info.rgb_quant_range_selectable -:316: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #316: FILE: include/drm/drm_connector.h:372: + bool rgb_quant_range_selectable; total: 0 errors, 0 warnings, 1 checks, 261 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v4 02/16] drm/dp_mst: Introduce new refcounting scheme for mstbs and ports
On 2019-01-04 7:14 p.m., Lyude Paul wrote:
> The current way of handling refcounting in the DP MST helpers is really
> confusing and probably just plain wrong because it's been hacked up many
> times over the years without anyone actually going over the code and
> seeing if things could be simplified.
>
> To the best of my understanding, the current scheme works like this:
> drm_dp_mst_port and drm_dp_mst_branch both have a single refcount. When
> this refcount hits 0 for either of the two, they're removed from the
> topology state, but not immediately freed. Both ports and branch devices
> will reinitialize their kref once it's hit 0 before actually destroying
> themselves. The intended purpose behind this is so that we can avoid
> problems like not being able to free a remote payload that might still
> be active, due to us having removed all of the port/branch device
> structures in memory, as per:
>
> commit 91a25e463130 ("drm/dp/mst: deallocate payload on port destruction")
>
> Which may have worked, but then it caused use-after-free errors. Being
> new to MST at the time, I tried fixing it;
>
> commit 263efde31f97 ("drm/dp/mst: Get validated port ref in
> drm_dp_update_payload_part1()")
>
> But, that was broken: both drm_dp_mst_port and drm_dp_mst_branch structs
> are validated in almost every DP MST helper function. Simply put, this
> means we go through the topology and try to see if the given
> drm_dp_mst_branch or drm_dp_mst_port is still attached to something
> before trying to use it in order to avoid dereferencing freed memory
> (something that has happened a LOT in the past with this library).
> Because of this it doesn't actually matter whether or not we keep keep
> the ports and branches around in memory as that's not enough, because
> any function that validates the branches and ports passed to it will
> still reject them anyway since they're no longer in the topology
> structure. So, use-after-free errors were fixed but payload deallocation
> was completely broken.
>
> Two years later, AMD informed me about this issue and I attempted to
> come up with a temporary fix, pending a long-overdue cleanup of this
> library:
>
> commit c54c7374ff44 ("drm/dp_mst: Skip validating ports during destruction,
> just ref")
>
> But then that introduced use-after-free errors, so I quickly reverted
> it:
>
> commit 9765635b3075 ("Revert "drm/dp_mst: Skip validating ports during
> destruction, just ref"")
>
> And in the process, learned that there is just no simple fix for this:
> the design is just broken. Unfortuntely, the usage of these helpers are
> quite broken as well. Some drivers like i915 have been smart enough to
> avoid accessing any kind of information from MST port structures, but
> others like nouveau have assumed, understandably so, that
> drm_dp_mst_port structures are normal and can just be accessed at any
> time without worrying about use-after-free errors.
>
> After a lot of discussion, me and Daniel Vetter came up with a better
> idea to replace all of this.
>
> To summarize, since this is documented far more indepth in the
> documentation this patch introduces, we make it so that drm_dp_mst_port
> and drm_dp_mst_branch structures have two different classes of
> refcounts: topology_kref, and malloc_kref. topology_kref corresponds to
> the lifetime of the given drm_dp_mst_port or drm_dp_mst_branch in it's
> given topology. Once it hits zero, any associated connectors are removed
> and the branch or port can no longer be validated. malloc_kref
> corresponds to the lifetime of the memory allocation for the actual
> structure, and will always be non-zero so long as the topology_kref is
> non-zero. This gives us a way to allow callers to hold onto port and
> branch device structures past their topology lifetime, and dramatically
> simplifies the lifetimes of both structures. This also finally fixes the
> port deallocation problem, properly.
>
> Additionally: since this now means that we can keep ports and branch
> devices allocated in memory for however long we need, we no longer need
> a significant amount of the port validation that we currently do.
>
> Additionally, there is one last scenario that this fixes, which couldn't
> have been fixed properly beforehand:
>
> - CPU1 unrefs port from topology (refcount 1->0)
> - CPU2 refs port in topology(refcount 0->1)
>
> Since we now can guarantee memory safety for ports and branches
> as-needed, we also can make our main reference counting functions fix
> this problem by using kref_get_unless_zero() internally so that topology
> refcounts can only ever reach 0 once.
>
> Changes since v2:
> * Fix commit message - checkpatch
> Changes since v1:
> * Remove forward declarations - danvet
> * Move "Branch device and port refcounting" section from documentation
> into kernel-doc comments - danvet
> * Export internal topology lifetime functions into their own section in
> the kernel-docs - danvet
> * s/@/&/g for struct references
[Intel-gfx] ✓ Fi.CI.BAT: success for Per context dynamic (sub)slice power-gating (rev12)
== Series Details == Series: Per context dynamic (sub)slice power-gating (rev12) URL : https://patchwork.freedesktop.org/series/48194/ State : success == Summary == CI Bug Log - changes from CI_DRM_5379 -> Patchwork_11256 Summary --- **WARNING** Minor unknown changes coming with Patchwork_11256 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11256, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/48194/revisions/12/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11256: ### IGT changes ### Warnings * igt@pm_rpm@basic-pci-d3-state: - fi-byt-j1900: SKIP -> PASS Known issues Here are the changes found in Patchwork_11256 that come from known issues: ### IGT changes ### Issues hit * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-kbl-7567u: PASS -> INCOMPLETE [fdo#103665] Possible fixes * igt@gem_exec_basic@gtt-bsd2: - fi-skl-6770hq: DMESG-WARN [fdo#105541] -> PASS * igt@i915_selftest@live_execlists: - fi-apl-guc: INCOMPLETE [fdo#103927] -> PASS * igt@i915_selftest@live_hangcheck: - fi-bwr-2160:DMESG-FAIL [fdo#108735] -> PASS * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: DMESG-WARN [fdo#102614] -> PASS * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS * igt@pm_rpm@basic-rte: - fi-byt-j1900: FAIL [fdo#108800] -> PASS [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#108735]: https://bugs.freedesktop.org/show_bug.cgi?id=108735 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 Participating hosts (49 -> 45) -- Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-bdw-samus Build changes - * Linux: CI_DRM_5379 -> Patchwork_11256 CI_DRM_5379: cae04ddb2142baf68abdf7855e28c00a34b721b7 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11256: 625fca5d7b43de1374e10cebeffd5a354cb57180 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 625fca5d7b43 drm/i915/selftests: Context SSEU reconfiguration tests 509b28e8038e drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) 823fb1c4bf8f drm/i915: Add timeline barrier support 557c7dad1ad9 drm/i915/perf: lock powergating configuration to default when active 65954284c0af drm/i915: Record the sseu configuration per-context & engine c919f2ba4d24 drm/i915/execlists: Move RPCS setup to context pin == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11256/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Per context dynamic (sub)slice power-gating (rev12)
== Series Details == Series: Per context dynamic (sub)slice power-gating (rev12) URL : https://patchwork.freedesktop.org/series/48194/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/execlists: Move RPCS setup to context pin Okay! Commit: drm/i915: Record the sseu configuration per-context & engine -drivers/gpu/drm/i915/selftests/../i915_drv.h:3546:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3560:16: warning: expression using sizeof(void) Commit: drm/i915/perf: lock powergating configuration to default when active Okay! Commit: drm/i915: Add timeline barrier support Okay! Commit: drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) +drivers/gpu/drm/i915/intel_lrc.c:2397:25: warning: expression using sizeof(void) Commit: drm/i915/selftests: Context SSEU reconfiguration tests +drivers/gpu/drm/i915/selftests/i915_gem_context.c:1220:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/i915_gem_context.c:1220:25: warning: expression using sizeof(void) -drivers/gpu/drm/i915/selftests/i915_gem_context.c:1220:25: warning: expression using sizeof(void) -drivers/gpu/drm/i915/selftests/i915_gem_context.c:1220:25: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Per context dynamic (sub)slice power-gating (rev12)
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev12)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c919f2ba4d24 drm/i915/execlists: Move RPCS setup to context pin
65954284c0af drm/i915: Record the sseu configuration per-context & engine
557c7dad1ad9 drm/i915/perf: lock powergating configuration to default when
active
-:72: WARNING:BAD_SIGN_OFF: 'Co-developed-by:' is the preferred signature form
#72:
Co-Developed-by: Tvrtko Ursulin
total: 0 errors, 1 warnings, 0 checks, 126 lines checked
823fb1c4bf8f drm/i915: Add timeline barrier support
509b28e8038e drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11
only)
-:47: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#47:
v2: Fix offset of CTX_R_PWR_CLK_STATE in intel_lr_context_set_sseu() (Lionel)
-:509: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around
'user->min_eus_per_subslice !=
device->max_eus_per_subslice'
#509: FILE: drivers/gpu/drm/i915/i915_gem_context.c:1171:
+ if ((user->min_eus_per_subslice !=
+device->max_eus_per_subslice) ||
+ (user->max_eus_per_subslice !=
+device->max_eus_per_subslice))
-:509: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around
'user->max_eus_per_subslice !=
device->max_eus_per_subslice'
#509: FILE: drivers/gpu/drm/i915/i915_gem_context.c:1171:
+ if ((user->min_eus_per_subslice !=
+device->max_eus_per_subslice) ||
+ (user->max_eus_per_subslice !=
+device->max_eus_per_subslice))
total: 0 errors, 1 warnings, 2 checks, 500 lines checked
625fca5d7b43 drm/i915/selftests: Context SSEU reconfiguration tests
-:407: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or
return
#407: FILE: drivers/gpu/drm/i915/selftests/i915_gem_context.c:961:
+ return -EINVAL;
+ } else {
-:414: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#414: FILE: drivers/gpu/drm/i915/selftests/i915_gem_context.c:968:
+
+}
total: 0 errors, 1 warnings, 1 checks, 550 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/backlight: Restore backlight on resume, v3.
== Series Details == Series: series starting with [1/5] drm/i915/backlight: Restore backlight on resume, v3. URL : https://patchwork.freedesktop.org/series/54896/ State : success == Summary == CI Bug Log - changes from CI_DRM_5378 -> Patchwork_11255 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/54896/revisions/1/ Known issues Here are the changes found in Patchwork_11255 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@cs-compute: - fi-kbl-8809g: NOTRUN -> FAIL [fdo#108094] * igt@amdgpu/amd_prime@amd-to-i915: - fi-kbl-8809g: NOTRUN -> FAIL [fdo#107341] * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: PASS -> FAIL [fdo#108767] * igt@kms_flip@basic-flip-vs-modeset: - fi-skl-6700hq: PASS -> DMESG-WARN [fdo#105998] * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: PASS -> DMESG-FAIL [fdo#102614] * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - fi-blb-e6850: NOTRUN -> INCOMPLETE [fdo#107718] Possible fixes * igt@amdgpu/amd_basic@userptr: - fi-kbl-8809g: DMESG-WARN [fdo#108965] -> PASS * igt@gem_exec_suspend@basic-s4-devices: - fi-bsw-kefka: DMESG-WARN -> PASS - fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS * igt@i915_selftest@live_hangcheck: - fi-apl-guc: DMESG-FAIL [fdo#109228] -> PASS * igt@kms_frontbuffer_tracking@basic: - fi-byt-clapper: FAIL [fdo#103167] -> PASS * igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - fi-byt-clapper: INCOMPLETE [fdo#102657] -> PASS * igt@kms_psr@sprite_plane_onoff: - fi-skl-6700hq: FAIL [fdo#107383] -> PASS +3 [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#102657]: https://bugs.freedesktop.org/show_bug.cgi?id=102657 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#105998]: https://bugs.freedesktop.org/show_bug.cgi?id=105998 [fdo#107341]: https://bugs.freedesktop.org/show_bug.cgi?id=107341 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108094]: https://bugs.freedesktop.org/show_bug.cgi?id=108094 [fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767 [fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965 [fdo#109228]: https://bugs.freedesktop.org/show_bug.cgi?id=109228 Participating hosts (48 -> 43) -- Missing(5): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-glk-j4005 Build changes - * Linux: CI_DRM_5378 -> Patchwork_11255 CI_DRM_5378: 96b07848e43c024bd6a5a44970371c4866140a1c @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11255: 3d1540509b3c003c691c1937c80111c0946e1a9a @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 3d1540509b3c drm/i915: Re-enable fastset by default 03101c92e0e0 drm/i915: Make HW readout mark CRTC scaler as in use. 333cb43bd431 drm/i915: Enable fastset for non-boot modesets. 3d64968ecaff drm/i915/backlight: Fix backlight takeover on LPT, v3. 166eabf8e961 drm/i915/backlight: Restore backlight on resume, v3. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11255/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915/backlight: Restore backlight on resume, v3.
== Series Details == Series: series starting with [1/5] drm/i915/backlight: Restore backlight on resume, v3. URL : https://patchwork.freedesktop.org/series/54896/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/backlight: Restore backlight on resume, v3. Okay! Commit: drm/i915/backlight: Fix backlight takeover on LPT, v3. -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_panel.c:1521:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_panel.c:1531:34: warning: expression using sizeof(void) Commit: drm/i915: Enable fastset for non-boot modesets. Okay! Commit: drm/i915: Make HW readout mark CRTC scaler as in use. Okay! Commit: drm/i915: Re-enable fastset by default Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/backlight: Restore backlight on resume, v3.
== Series Details == Series: series starting with [1/5] drm/i915/backlight: Restore backlight on resume, v3. URL : https://patchwork.freedesktop.org/series/54896/ State : warning == Summary == $ dim checkpatch origin/drm-tip 166eabf8e961 drm/i915/backlight: Restore backlight on resume, v3. -:25: WARNING:BAD_SIGN_OFF: Duplicate signature #25: Signed-off-by: Maarten Lankhorst total: 0 errors, 1 warnings, 0 checks, 115 lines checked 3d64968ecaff drm/i915/backlight: Fix backlight takeover on LPT, v3. 333cb43bd431 drm/i915: Enable fastset for non-boot modesets. -:44: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #44: FILE: drivers/gpu/drm/i915/intel_display.c:12703: + if (intel_pipe_config_compare(dev_priv, to_intel_crtc_state(old_crtc_state), total: 0 errors, 0 warnings, 1 checks, 20 lines checked 03101c92e0e0 drm/i915: Make HW readout mark CRTC scaler as in use. 3d1540509b3c drm/i915: Re-enable fastset by default ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v6 3/4] ACPI / PMIC: Add generic intel_soc_pmic_exec_mipi_pmic_seq_element handling
On Tue, Jan 08, 2019 at 04:35:45PM +0100, Hans de Goede wrote:
> Hi,
>
> On 08-01-19 15:51, Andy Shevchenko wrote:
> > On Tue, Jan 08, 2019 at 02:45:39PM +0100, Hans de Goede wrote:
> > > On 07-01-19 16:46, Andy Shevchenko wrote:
> > > > On Mon, Jan 07, 2019 at 12:15:55PM +0100, Hans de Goede wrote:
> >
> > > > > + } else if (d->pmic_i2c_address) {
> > > > > + if (i2c_address == d->pmic_i2c_address) {
> > > > > + ret =
> > > > > regmap_update_bits(intel_pmic_opregion->regmap,
> > > > > + reg_address, mask,
> > > > > value);
> > > > > + } else {
> > > > > + pr_err("%s: Unexpected i2c-addr: 0x%02x
> > > > > (reg-addr 0x%x value 0x%x mask 0x%x)\n",
> > > > > +__func__, i2c_address, reg_address,
> > > > > value, mask);
> > > > > + ret = -ENXIO;
> > > > > + }
> > > >
> > > > > --- a/drivers/acpi/pmic/intel_pmic_xpower.c
> > > > > +++ b/drivers/acpi/pmic/intel_pmic_xpower.c
> > > > > + .pmic_i2c_address = 0x34,
> > > >
> > > > Can we just have a hook here instead of exposing PMIC I2C address?
> > > > Am I missing something in case it's not possible?
> > >
> > > We already have a hook, but it isn't really necessary to implement
> > > that for each model PMIC. The MFD device which is the PMIC's parent
> > > in most cases will give us a regmap to access the PMIC registers and
> > > that allows us to do a generic implementation.
> > >
> > > But the MIPI PMIC sequence includes an i2c-address as some PMICs
> > > span multiple i2c-addresses. For the simple single i2c-address case
> > > the regmap gives us access to the registers behind that single address
> > > and we can use a generic solution. In this case we should verify the
> > > i2c-addr is what we expect, which is where the pmic_i2c_address comes in.
> >
> > But we also can have a generic hook in intel_pmic.c and assign it whenever
> > it's the case?
>
> We could, but then we still need the pmic_i2c_address member and now the
> hook would need to passed both the regmap and the intel_pmic_opregion_data
> pointer so that it can verify the i2c address so handling the generic case
> directly inside intel_soc_pmic_exec_mipi_pmic_seq_element is easier.
I see.
One more question, can we unify somehow error messages and do something like
if (...) {
...
} else if (pmic_i2c_address && i2c_address == pmic_i2c_address) {
ret = regmap_update_bits(...);
} else {
...
}
?
--
With Best Regards,
Andy Shevchenko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Downgrade scare message for unknown HuC firmware
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.0-rc1 next-20190108]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Downgrade-scare-message-for-unknown-HuC-firmware/20190108-232025
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-s3-201901 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
In file included from include/drm/drm_print.h:32:0,
from drivers/gpu/drm/i915/intel_uc_fw.c:26:
drivers/gpu/drm/i915/intel_uc_fw.c: In function 'intel_uc_fw_fetch':
>> drivers/gpu/drm/i915/intel_uc_fw.c:50:12: error: 'i915' undeclared (first
>> use in this function)
dev_info(i915->drm.dev,
^
include/linux/device.h:1469:12: note: in definition of macro 'dev_info'
_dev_info(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~
drivers/gpu/drm/i915/intel_uc_fw.c:50:12: note: each undeclared identifier
is reported only once for each function it appears in
dev_info(i915->drm.dev,
^
include/linux/device.h:1469:12: note: in definition of macro 'dev_info'
_dev_info(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~
drivers/gpu/drm/i915/intel_uc_fw.c:52:29: error: 'const struct firmware' has
no member named 'type'
intel_uc_fw_type_repr(fw->type),
^
include/linux/device.h:1469:33: note: in definition of macro 'dev_info'
_dev_info(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~
vim +/i915 +50 drivers/gpu/drm/i915/intel_uc_fw.c
> 26 #include
27
28 #include "intel_uc_fw.h"
29 #include "i915_drv.h"
30
31 /**
32 * intel_uc_fw_fetch - fetch uC firmware
33 *
34 * @dev_priv: device private
35 * @uc_fw: uC firmware
36 *
37 * Fetch uC firmware into GEM obj.
38 */
39 void intel_uc_fw_fetch(struct drm_i915_private *dev_priv,
40 struct intel_uc_fw *uc_fw)
41 {
42 struct pci_dev *pdev = dev_priv->drm.pdev;
43 struct drm_i915_gem_object *obj;
44 const struct firmware *fw = NULL;
45 struct uc_css_header *css;
46 size_t size;
47 int err;
48
49 if (!uc_fw->path) {
> 50 dev_info(i915->drm.dev,
51 "%s: No firmware was defined for %s!\n",
52 intel_uc_fw_type_repr(fw->type),
53
intel_platform_name(INTEL_INFO(i915)->platform));
54 return;
55 }
56
57 DRM_DEBUG_DRIVER("%s fw fetch %s\n",
58 intel_uc_fw_type_repr(uc_fw->type),
uc_fw->path);
59
60 uc_fw->fetch_status = INTEL_UC_FIRMWARE_PENDING;
61 DRM_DEBUG_DRIVER("%s fw fetch %s\n",
62 intel_uc_fw_type_repr(uc_fw->type),
63 intel_uc_fw_status_repr(uc_fw->fetch_status));
64
65 err = request_firmware(&fw, uc_fw->path, &pdev->dev);
66 if (err) {
67 DRM_DEBUG_DRIVER("%s fw request_firmware err=%d\n",
68 intel_uc_fw_type_repr(uc_fw->type),
err);
69 goto fail;
70 }
71
72 DRM_DEBUG_DRIVER("%s fw size %zu ptr %p\n",
73 intel_uc_fw_type_repr(uc_fw->type), fw->size,
fw);
74
75 /* Check the size of the blob before examining buffer contents
*/
76 if (fw->size < sizeof(struct uc_css_header)) {
77 DRM_WARN("%s: Unexpected firmware size (%zu, min
%zu)\n",
78 intel_uc_fw_type_repr(uc_fw->type),
79 fw->size, sizeof(struct uc_css_header));
80 err = -ENODATA;
81 goto fail;
82 }
83
84 css = (struct uc_css_header *)fw->data;
85
86 /* Firmware bits always start from header */
87 uc_fw->header_offset = 0;
88 uc_fw->header_size = (css->header_size_dw -
css->modulus_size_dw -
89css->key_size_dw - css->exponent_size_dw)
*
90 size
[Intel-gfx] [PATCH 3/4] drm/radeon: Use drm_hdmi_avi_infoframe_quant_range()
From: Ville Syrjälä
Fill out the AVI infoframe quantization range bits using
drm_hdmi_avi_infoframe_quant_range() instead of hand rolling it.
This changes the behaviour slightly as
drm_hdmi_avi_infoframe_quant_range() will set a non-zero Q bit
even when QS==0 iff the Q bit matched the default quantization
range for the given mode. This matches the recommendation in
HDMI 2.0 and is allowed even before that.
Cc: Alex Deucher
Cc: "Christian König"
Cc: "David (ChunMing) Zhou"
Cc: amd-...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
Acked-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_audio.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_audio.c
b/drivers/gpu/drm/radeon/radeon_audio.c
index 5a7d48339b32..708765bf9e66 100644
--- a/drivers/gpu/drm/radeon/radeon_audio.c
+++ b/drivers/gpu/drm/radeon/radeon_audio.c
@@ -523,14 +523,11 @@ static int radeon_audio_set_avi_packet(struct drm_encoder
*encoder,
}
if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) {
- if
(drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) {
- if (radeon_encoder->output_csc ==
RADEON_OUTPUT_CSC_TVRGB)
- frame.quantization_range =
HDMI_QUANTIZATION_RANGE_LIMITED;
- else
- frame.quantization_range =
HDMI_QUANTIZATION_RANGE_FULL;
- } else {
- frame.quantization_range =
HDMI_QUANTIZATION_RANGE_DEFAULT;
- }
+ drm_hdmi_avi_infoframe_quant_range(&frame, connector, mode,
+ radeon_encoder->output_csc
== RADEON_OUTPUT_CSC_TVRGB ?
+
HDMI_QUANTIZATION_RANGE_LIMITED :
+ HDMI_QUANTIZATION_RANGE_FULL,
+
drm_rgb_quant_range_selectable(radeon_connector_edid(connector)));
}
err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
--
2.19.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/4] drm/edid: Add display_info.rgb_quant_range_selectable
From: Ville Syrjälä
Move the CEA-861 QS bit handling entirely into the edid code. No
need to bother the drivers with this.
Cc: Alex Deucher
Cc: "Christian König"
Cc: "David (ChunMing) Zhou"
Cc: amd-...@lists.freedesktop.org
Cc: Eric Anholt (supporter:DRM DRIVERS FOR VC4)
Signed-off-by: Ville Syrjälä
Acked-by: Alex Deucher
Acked-by: Eric Anholt
---
drivers/gpu/drm/drm_edid.c| 70 ---
drivers/gpu/drm/i915/intel_drv.h | 1 -
drivers/gpu/drm/i915/intel_hdmi.c | 8 +--
drivers/gpu/drm/i915/intel_lspcon.c | 3 +-
drivers/gpu/drm/i915/intel_sdvo.c | 7 +--
drivers/gpu/drm/radeon/radeon_audio.c | 3 +-
drivers/gpu/drm/vc4/vc4_hdmi.c| 9 +---
include/drm/drm_connector.h | 6 +++
include/drm/drm_edid.h| 4 +-
9 files changed, 43 insertions(+), 68 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index cd25bd08bf53..990b1909f9d7 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3641,6 +3641,20 @@ static bool cea_db_is_hdmi_forum_vsdb(const u8 *db)
return oui == HDMI_FORUM_IEEE_OUI;
}
+static bool cea_db_is_vcdb(const u8 *db)
+{
+ if (cea_db_tag(db) != USE_EXTENDED_TAG)
+ return false;
+
+ if (cea_db_payload_len(db) != 2)
+ return false;
+
+ if (cea_db_extended_tag(db) != EXT_VIDEO_CAPABILITY_BLOCK)
+ return false;
+
+ return true;
+}
+
static bool cea_db_is_y420cmdb(const u8 *db)
{
if (cea_db_tag(db) != USE_EXTENDED_TAG)
@@ -4223,41 +4237,6 @@ bool drm_detect_monitor_audio(struct edid *edid)
}
EXPORT_SYMBOL(drm_detect_monitor_audio);
-/**
- * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
- * @edid: EDID block to scan
- *
- * Check whether the monitor reports the RGB quantization range selection
- * as supported. The AVI infoframe can then be used to inform the monitor
- * which quantization range (full or limited) is used.
- *
- * Return: True if the RGB quantization range is selectable, false otherwise.
- */
-bool drm_rgb_quant_range_selectable(struct edid *edid)
-{
- u8 *edid_ext;
- int i, start, end;
-
- edid_ext = drm_find_cea_extension(edid);
- if (!edid_ext)
- return false;
-
- if (cea_db_offsets(edid_ext, &start, &end))
- return false;
-
- for_each_cea_db(edid_ext, i, start, end) {
- if (cea_db_tag(&edid_ext[i]) == USE_EXTENDED_TAG &&
- cea_db_payload_len(&edid_ext[i]) == 2 &&
- cea_db_extended_tag(&edid_ext[i]) ==
- EXT_VIDEO_CAPABILITY_BLOCK) {
- DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
- return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
- }
- }
-
- return false;
-}
-EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
/**
* drm_default_rgb_quant_range - default RGB quantization range
@@ -4278,6 +4257,16 @@ drm_default_rgb_quant_range(const struct
drm_display_mode *mode)
}
EXPORT_SYMBOL(drm_default_rgb_quant_range);
+static void drm_parse_vcdb(struct drm_connector *connector, const u8 *db)
+{
+ struct drm_display_info *info = &connector->display_info;
+
+ DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", db[2]);
+
+ if (db[2] & EDID_CEA_VCDB_QS)
+ info->rgb_quant_range_selectable = true;
+}
+
static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
const u8 *db)
{
@@ -4452,6 +4441,8 @@ static void drm_parse_cea_ext(struct drm_connector
*connector,
drm_parse_hdmi_forum_vsdb(connector, db);
if (cea_db_is_y420cmdb(db))
drm_parse_y420cmdb_bitmap(connector, db);
+ if (cea_db_is_vcdb(db))
+ drm_parse_vcdb(connector, db);
}
}
@@ -4472,6 +4463,7 @@ drm_reset_display_info(struct drm_connector *connector)
info->max_tmds_clock = 0;
info->dvi_dual = false;
info->has_hdmi_infoframe = false;
+ info->rgb_quant_range_selectable = false;
memset(&info->hdmi, 0, sizeof(info->hdmi));
info->non_desktop = 0;
@@ -4939,15 +4931,15 @@ EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
* @connector: the connector
* @mode: DRM display mode
* @rgb_quant_range: RGB quantization range (Q)
- * @rgb_quant_range_selectable: Sink support selectable RGB quantization range
(QS)
*/
void
drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
struct drm_connector *connector,
const struct drm_display_mode *mode,
- enum hdmi_quantization_range rgb_quant_range,
- bool rgb_quant_range_selectable)
+ enum hdmi_quantization_ran
[Intel-gfx] [PATCH 2/4] drm/i915: Use drm_hdmi_avi_infoframe_quant_range() for SDVO HDMI as well
From: Ville Syrjälä
Fill out the AVI infoframe quantization range bits using
drm_hdmi_avi_infoframe_quant_range() for SDVO HDMI encoder as well.
This changes the behaviour slightly as
drm_hdmi_avi_infoframe_quant_range() will set a non-zero Q bit
even when QS==0 iff the Q bit matched the default quantization
range for the given mode. This matches the recommendation in
HDMI 2.0 and is allowed even before that.
v2: Pimp commit msg (DK)
Signed-off-by: Ville Syrjälä
Reviewed-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_sdvo.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index 1277d31adb54..9c16e273fb8d 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -984,6 +984,8 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo
*intel_sdvo,
const struct intel_crtc_state
*pipe_config,
const struct drm_connector_state
*conn_state)
{
+ const struct drm_display_mode *adjusted_mode =
+ &pipe_config->base.adjusted_mode;
uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
union hdmi_infoframe frame;
int ret;
@@ -991,20 +993,19 @@ static bool intel_sdvo_set_avi_infoframe(struct
intel_sdvo *intel_sdvo,
ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
conn_state->connector,
-
&pipe_config->base.adjusted_mode);
+ adjusted_mode);
if (ret < 0) {
DRM_ERROR("couldn't fill AVI infoframe\n");
return false;
}
- if (intel_sdvo->rgb_quant_range_selectable) {
- if (pipe_config->limited_color_range)
- frame.avi.quantization_range =
- HDMI_QUANTIZATION_RANGE_LIMITED;
- else
- frame.avi.quantization_range =
- HDMI_QUANTIZATION_RANGE_FULL;
- }
+ drm_hdmi_avi_infoframe_quant_range(&frame.avi,
+ conn_state->connector,
+ adjusted_mode,
+ pipe_config->limited_color_range ?
+ HDMI_QUANTIZATION_RANGE_LIMITED :
+ HDMI_QUANTIZATION_RANGE_FULL,
+
intel_sdvo->rgb_quant_range_selectable);
len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
if (len < 0)
--
2.19.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/4] drm/edid: Pass connector to AVI infoframe functions
From: Ville Syrjälä
Make life easier for drivers by simply passing the connector
to drm_hdmi_avi_infoframe_from_display_mode() and
drm_hdmi_avi_infoframe_quant_range(). That way drivers don't
need to worry about is_hdmi2_sink mess.
v2: Make is_hdmi2_sink() return true for sil-sii8620
Adapt to omap/vc4 changes
Cc: Alex Deucher
Cc: "Christian König"
Cc: "David (ChunMing) Zhou"
Cc: Archit Taneja
Cc: Andrzej Hajda
Cc: Laurent Pinchart
Cc: Inki Dae
Cc: Joonyoung Shim
Cc: Seung-Woo Kim
Cc: Kyungmin Park
Cc: Russell King
Cc: CK Hu
Cc: Philipp Zabel
Cc: Rob Clark
Cc: Ben Skeggs
Cc: Tomi Valkeinen
Cc: Sandy Huang
Cc: "Heiko Stübner"
Cc: Benjamin Gaignard
Cc: Vincent Abriou
Cc: Thierry Reding
Cc: Eric Anholt
Cc: Shawn Guo
Cc: Ilia Mirkin
Cc: amd-...@lists.freedesktop.org
Cc: linux-arm-...@vger.kernel.org
Cc: freedr...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: linux-te...@vger.kernel.org
Signed-off-by: Ville Syrjälä
Acked-by: Thierry Reding
Acked-by: Russell King
Reviewed-by: Laurent Pinchart
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 2 +-
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 2 +-
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 +-
drivers/gpu/drm/bridge/analogix-anx78xx.c | 5 ++--
drivers/gpu/drm/bridge/sii902x.c | 3 ++-
drivers/gpu/drm/bridge/sil-sii8620.c | 3 +--
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 3 ++-
drivers/gpu/drm/drm_edid.c| 33 ++-
drivers/gpu/drm/exynos/exynos_hdmi.c | 3 ++-
drivers/gpu/drm/i2c/tda998x_drv.c | 3 ++-
drivers/gpu/drm/i915/intel_hdmi.c | 14 +-
drivers/gpu/drm/i915/intel_lspcon.c | 15 ++-
drivers/gpu/drm/i915/intel_sdvo.c | 10 ---
drivers/gpu/drm/mediatek/mtk_hdmi.c | 3 ++-
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c| 3 ++-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 7 +++--
drivers/gpu/drm/omapdrm/omap_encoder.c| 4 +--
drivers/gpu/drm/radeon/radeon_audio.c | 2 +-
drivers/gpu/drm/rockchip/inno_hdmi.c | 4 ++-
drivers/gpu/drm/sti/sti_hdmi.c| 3 ++-
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c| 3 ++-
drivers/gpu/drm/tegra/hdmi.c | 3 ++-
drivers/gpu/drm/tegra/sor.c | 3 ++-
drivers/gpu/drm/vc4/vc4_hdmi.c| 9 ---
drivers/gpu/drm/zte/zx_hdmi.c | 4 ++-
include/drm/drm_edid.h| 8 +++---
27 files changed, 91 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 4cfecdce29a3..1f0426d2fc2a 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -1682,7 +1682,7 @@ static void dce_v10_0_afmt_setmode(struct drm_encoder
*encoder,
dce_v10_0_audio_write_sad_regs(encoder);
dce_v10_0_audio_write_latency_fields(encoder, mode);
- err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);
+ err = drm_hdmi_avi_infoframe_from_display_mode(&frame, connector, mode);
if (err < 0) {
DRM_ERROR("failed to setup AVI infoframe: %zd\n", err);
return;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 7c868916d90f..2280b971d758 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -1724,7 +1724,7 @@ static void dce_v11_0_afmt_setmode(struct drm_encoder
*encoder,
dce_v11_0_audio_write_sad_regs(encoder);
dce_v11_0_audio_write_latency_fields(encoder, mode);
- err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);
+ err = drm_hdmi_avi_infoframe_from_display_mode(&frame, connector, mode);
if (err < 0) {
DRM_ERROR("failed to setup AVI infoframe: %zd\n", err);
return;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 17eaaba36017..db443ec53d3a 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -1423,6 +1423,7 @@ static void dce_v6_0_audio_set_avi_infoframe(struct
drm_encoder *encoder,
struct amdgpu_device *adev = dev->dev_private;
struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
+ struct drm_connector *connector =
amdgpu_get_connector_for_encoder(encoder);
struct hdmi_avi_infoframe frame;
u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
uint8_t *payload = buffer + 3;
@@ -1430,7 +1431,7 @@ static void dce_v6_0_audio_set_avi_infoframe(struct
drm_encoder *encoder,
ssize_t err;
u32 tmp;
- err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false);
+ err = drm_hdmi_avi_infoframe_from_
Re: [Intel-gfx] [PATCH] drm/i915: drop all drmP.h includes
Hi Jani. Nice cleanup. On Tue, Jan 08, 2019 at 10:27:09AM +0200, Jani Nikula wrote: > Needs just a few additional includes here and there. > > Cc: Sam Ravnborg > Cc: Daniel Vetter > Cc: Laurent Pinchart > Acked-by: Daniel Vetter > Signed-off-by: Jani Nikula Acked-by: Sam Ravnborg ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 04/46] drm/i915: Markup paired operations on wakerefs
Quoting Mika Kuoppala (2019-01-08 16:23:18)
> > @@ -3965,7 +4014,7 @@ void intel_power_domains_init_hw(struct
> > drm_i915_private *dev_priv, bool resume)
> > void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv)
> > {
> > /* Keep the power well enabled, but cancel its rpm wakeref. */
> > - intel_runtime_pm_put(dev_priv);
> > + intel_runtime_pm_put_unchecked(dev_priv);
> >
> > /* Remove the refcount we took to keep power well support disabled. */
> > if (!i915_modparams.disable_power_well)
> > @@ -4179,7 +4228,7 @@ static void intel_power_domains_verify_state(struct
> > drm_i915_private *dev_priv)
> > * Any runtime pm reference obtained by this function must have a symmetric
> > * call to intel_runtime_pm_put() to release the reference again.
> > */
>
> Need to update the documentation.
No. You are expected to pair intel_runtime_pm_get with intel_runtime_pm_put.
The _unchecked version is temporary and not expected to be used in new code.
Once the dust has settled it will be gone.
* Any runtime pm reference obtained by this function must have a symmetric
* call to intel_runtime_pm_put() to release the reference again.
is accurate.
> > -void intel_runtime_pm_get(struct drm_i915_private *i915)
> > +intel_wakeref_t intel_runtime_pm_get(struct drm_i915_private *i915)
> > {
> > struct pci_dev *pdev = i915->drm.pdev;
> > struct device *kdev = &pdev->dev;
> > @@ -4191,7 +4240,7 @@ void intel_runtime_pm_get(struct drm_i915_private
> > *i915)
> > atomic_inc(&i915->runtime_pm.wakeref_count);
> > assert_rpm_wakelock_held(i915);
> >
> > - track_intel_runtime_pm_wakeref(i915);
> > + return track_intel_runtime_pm_wakeref(i915);
> > }
> >
> > /**
> > @@ -4207,7 +4256,7 @@ void intel_runtime_pm_get(struct drm_i915_private
> > *i915)
> > *
> > * Returns: True if the wakeref was acquired, or False otherwise.
>
> For practical purposes this could still be the case but please update
> the return value type.
Still should be used as a boolean (true/false) though.
> > */
> > -bool intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915)
> > +intel_wakeref_t intel_runtime_pm_get_if_in_use(struct drm_i915_private
> > *i915)
> > {
> > if (IS_ENABLED(CONFIG_PM)) {
> > struct pci_dev *pdev = i915->drm.pdev;
> > @@ -4220,15 +4269,13 @@ bool intel_runtime_pm_get_if_in_use(struct
> > drm_i915_private *i915)
> >* atm to the late/early system suspend/resume handlers.
> >*/
> > if (pm_runtime_get_if_in_use(kdev) <= 0)
> > - return false;
> > + return 0;
> > }
> >
> > atomic_inc(&i915->runtime_pm.wakeref_count);
> > assert_rpm_wakelock_held(i915);
> >
> > - track_intel_runtime_pm_wakeref(i915);
> > -
> > - return true;
> > + return track_intel_runtime_pm_wakeref(i915);
> > }
> >
> > /**
> > @@ -4248,7 +4295,7 @@ bool intel_runtime_pm_get_if_in_use(struct
> > drm_i915_private *i915)
> > * Any runtime pm reference obtained by this function must have a symmetric
> > * call to intel_runtime_pm_put() to release the reference again.
> > */
>
> Document update needed here also.
Nope.
> > -void intel_runtime_pm_get_noresume(struct drm_i915_private *i915)
> > +intel_wakeref_t intel_runtime_pm_get_noresume(struct drm_i915_private
> > *i915)
> > {
> > struct pci_dev *pdev = i915->drm.pdev;
> > struct device *kdev = &pdev->dev;
> > @@ -4258,7 +4305,7 @@ void intel_runtime_pm_get_noresume(struct
> > drm_i915_private *i915)
> >
> > atomic_inc(&i915->runtime_pm.wakeref_count);
> >
> > - track_intel_runtime_pm_wakeref(i915);
> > + return track_intel_runtime_pm_wakeref(i915);
> > }
> >
> > /**
> > @@ -4269,7 +4316,7 @@ void intel_runtime_pm_get_noresume(struct
> > drm_i915_private *i915)
> > * intel_runtime_pm_get() and might power down the corresponding
> > * hardware block right away if this is the last reference.
> > */
>
> Documentation part needs updating.
I either don't get your point, or you missed the point of the wakeref
tracking? :)
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v24 5/6] drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)
From: Tvrtko Ursulin
We want to allow userspace to reconfigure the subslice configuration on a
per context basis.
This is required for the functional requirement of shutting down non-VME
enabled sub-slices on Gen11 parts.
To do so, we expose a context parameter to allow adjustment of the RPCS
register stored within the context image (and currently not accessible via
LRI).
If the context is adjusted before first use or whilst idle, the adjustment
is for "free"; otherwise if the context is active we queue a request to do
so (using the kernel context), following all other activity by that
context, which is also marked as barrier for all following submission
against the same context.
Since the overhead of device re-configuration during context switching can
be significant, especially in multi-context workloads, we limit this new
uAPI to only support the Gen11 VME use case. In this use case either the
device is fully enabled, and exactly one slice and half of the subslices
are enabled.
Example usage:
struct drm_i915_gem_context_param_sseu sseu = { };
struct drm_i915_gem_context_param arg =
{ .param = I915_CONTEXT_PARAM_SSEU,
.ctx_id = gem_context_create(fd),
.size = sizeof(sseu),
.value = to_user_pointer(&sseu)
};
/* Query device defaults. */
gem_context_get_param(fd, &arg);
/* Set VME configuration on a 1x6x8 part. */
sseu.slice_mask = 0x1;
sseu.subslice_mask = 0xe0;
gem_context_set_param(fd, &arg);
v2: Fix offset of CTX_R_PWR_CLK_STATE in intel_lr_context_set_sseu() (Lionel)
v3: Add ability to program this per engine (Chris)
v4: Move most get_sseu() into i915_gem_context.c (Lionel)
v5: Validate sseu configuration against the device's capabilities (Lionel)
v6: Change context powergating settings through MI_SDM on kernel context (Chris)
v7: Synchronize the requests following a powergating setting change using a
global
dependency (Chris)
Iterate timelines through dev_priv.gt.active_rings (Tvrtko)
Disable RPCS configuration setting for non capable users (Lionel/Tvrtko)
v8: s/union intel_sseu/struct intel_sseu/ (Lionel)
s/dev_priv/i915/ (Tvrtko)
Change uapi class/instance fields to u16 (Tvrtko)
Bump mask fields to 64bits (Lionel)
Don't return EPERM when dynamic sseu is disabled (Tvrtko)
v9: Import context image into kernel context's ppgtt only when
reconfiguring powergated slice/subslices (Chris)
Use aliasing ppgtt when needed (Michel)
Tvrtko Ursulin:
v10:
* Update for upstream changes.
* Request submit needs a RPM reference.
* Reject on !FULL_PPGTT for simplicity.
* Pull out get/set param to helpers for readability and less indent.
* Use i915_request_await_dma_fence in add_global_barrier to skip waits
on the same timeline and avoid GEM_BUG_ON.
* No need to explicitly assign a NULL pointer to engine in legacy mode.
* No need to move gen8_make_rpcs up.
* Factored out global barrier as prep patch.
* Allow to only CAP_SYS_ADMIN if !Gen11.
v11:
* Remove engine vfunc in favour of local helper. (Chris Wilson)
* Stop retiring requests before updates since it is not needed
(Chris Wilson)
* Implement direct CPU update path for idle contexts. (Chris Wilson)
* Left side dependency needs only be on the same context timeline.
(Chris Wilson)
* It is sufficient to order the timeline. (Chris Wilson)
* Reject !RCS configuration attempts with -ENODEV for now.
v12:
* Rebase for make_rpcs.
v13:
* Centralize SSEU normalization to make_rpcs.
* Type width checking (uAPI <-> implementation).
* Gen11 restrictions uAPI checks.
* Gen11 subslice count differences handling.
Chris Wilson:
* args->size handling fixes.
* Update context image from GGTT.
* Postpone context image update to pinning.
* Use i915_gem_active_raw instead of last_request_on_engine.
v14:
* Add activity tracker on intel_context to fix the lifetime issues
and simplify the code. (Chris Wilson)
v15:
* Fix context pin leak if no space in ring by simplifying the
context pinning sequence.
v16:
* Rebase for context get/set param locking changes.
* Just -ENODEV on !Gen11. (Joonas)
v17:
* Fix one Gen11 subslice enablement rule.
* Handle error from i915_sw_fence_await_sw_fence_gfp. (Chris Wilson)
v18:
* Update commit message. (Joonas)
* Restrict uAPI to VME use case. (Joonas)
v19:
* Rebase.
v20:
* Rebase for ce->active_tracker.
v21:
* Rebase for IS_GEN changes.
v22:
* Reserve uAPI for flags straight away. (Chris Wilson)
v23:
* Rebase for RUNTIME_INFO.
v24:
* Added some headline docs for the uapi usage. (Joonas/Chris)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100899
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107634
Issue: https://github.com/intel/media-driver/issues/267
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Cc: Dmitry Rogozhkin
Cc: Tvrtko Ursulin
Cc: Zhipeng Gong
Re: [Intel-gfx] [PATCH 04/46] drm/i915: Markup paired operations on wakerefs
Chris Wilson writes:
> The majority of runtime-pm operations are bounded and scoped within a
> function; these are easy to verify that the wakeref are handled
> correctly. We can employ the compiler to help us, and reduce the number
> of wakerefs tracked when debugging, by passing around cookies provided
> by the various rpm_get functions to their rpm_put counterpart. This
> makes the pairing explicit, and given the required wakeref cookie the
> compiler can verify that we pass an initialised value to the rpm_put
> (quite handy for double checking error paths).
>
> For regular builds, the compiler should be able to eliminate the unused
> local variables and the program growth should be minimal. Fwiw, it came
> out as a net improvement as gcc was able to refactor rpm_get and
> rpm_get_if_in_use together,
>
> v2: Just s/rpm_put/rpm_put_unchecked/ everywhere, leaving the manual
> mark up for smaller more targeted patches.
>
> Signed-off-by: Chris Wilson
> Cc: Jani Nikula
> ---
> drivers/gpu/drm/i915/Kconfig.debug| 1 +
> drivers/gpu/drm/i915/gvt/aperture_gm.c| 8 +-
> drivers/gpu/drm/i915/gvt/gvt.h| 2 +-
> drivers/gpu/drm/i915/gvt/sched_policy.c | 2 +-
> drivers/gpu/drm/i915/gvt/scheduler.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 54 +--
> drivers/gpu/drm/i915/i915_drv.h | 2 +
> drivers/gpu/drm/i915/i915_gem.c | 20 ++---
> drivers/gpu/drm/i915/i915_gem_execbuffer.c| 2 +-
> drivers/gpu/drm/i915/i915_gem_fence_reg.c | 2 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +-
> drivers/gpu/drm/i915/i915_gem_shrinker.c | 10 +--
> drivers/gpu/drm/i915/i915_irq.c | 2 +-
> drivers/gpu/drm/i915/i915_perf.c | 4 +-
> drivers/gpu/drm/i915/i915_pmu.c | 6 +-
> drivers/gpu/drm/i915/i915_sysfs.c | 12 +--
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> drivers/gpu/drm/i915/intel_drv.h | 15 +++-
> drivers/gpu/drm/i915/intel_engine_cs.c| 4 +-
> drivers/gpu/drm/i915/intel_fbdev.c| 4 +-
> drivers/gpu/drm/i915/intel_guc_log.c | 6 +-
> drivers/gpu/drm/i915/intel_hotplug.c | 2 +-
> drivers/gpu/drm/i915/intel_huc.c | 2 +-
> drivers/gpu/drm/i915/intel_panel.c| 2 +-
> drivers/gpu/drm/i915/intel_runtime_pm.c | 89 +++
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> drivers/gpu/drm/i915/selftests/huge_pages.c | 2 +-
> drivers/gpu/drm/i915/selftests/i915_gem.c | 10 +--
> .../drm/i915/selftests/i915_gem_coherency.c | 2 +-
> .../gpu/drm/i915/selftests/i915_gem_context.c | 10 +--
> .../gpu/drm/i915/selftests/i915_gem_evict.c | 2 +-
> drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 +-
> .../gpu/drm/i915/selftests/i915_gem_object.c | 6 +-
> drivers/gpu/drm/i915/selftests/i915_request.c | 8 +-
> drivers/gpu/drm/i915/selftests/intel_guc.c| 4 +-
> .../gpu/drm/i915/selftests/intel_hangcheck.c | 6 +-
> drivers/gpu/drm/i915/selftests/intel_lrc.c| 10 +--
> .../drm/i915/selftests/intel_workarounds.c| 10 +--
> 38 files changed, 203 insertions(+), 138 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/Kconfig.debug
> b/drivers/gpu/drm/i915/Kconfig.debug
> index a97929c47466..ad4d71161dda 100644
> --- a/drivers/gpu/drm/i915/Kconfig.debug
> +++ b/drivers/gpu/drm/i915/Kconfig.debug
> @@ -173,6 +173,7 @@ config DRM_I915_DEBUG_RUNTIME_PM
> bool "Enable extra state checking for runtime PM"
> depends on DRM_I915
> default n
> + select STACKDEPOT
> help
> Choose this option to turn on extra state checking for the
> runtime PM functionality. This may introduce overhead during
> diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
> b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> index 359d37d5c958..1fa2f65c3cd1 100644
> --- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
> +++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> @@ -180,7 +180,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
> }
> mutex_unlock(&dev_priv->drm.struct_mutex);
>
> - intel_runtime_pm_put(dev_priv);
> + intel_runtime_pm_put_unchecked(dev_priv);
> }
>
> static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
> @@ -206,7 +206,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
> _clear_vgpu_fence(vgpu);
>
> mutex_unlock(&dev_priv->drm.struct_mutex);
> - intel_runtime_pm_put(dev_priv);
> + intel_runtime_pm_put_unchecked(dev_priv);
> return 0;
> out_free_fence:
> gvt_vgpu_err("Failed to alloc fences\n");
> @@ -219,7 +219,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
> vgpu->fence.regs[i] = NULL;
> }
> mutex_unlock(&dev_priv->drm.struct_mutex);
> - intel_runtime_pm_put(dev_priv);
> + intel_runtime_pm_put_unchecked(dev_priv);
> return -ENOSPC;
> }
>
> @@ -317,7 +317,7
Re: [Intel-gfx] [PATCH v2] drm/i915: Downgrade scare message for unknown HuC firmware
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.0-rc1 next-20190108]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Downgrade-scare-message-for-unknown-HuC-firmware/20190108-232025
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x073-201901 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
In file included from include/drm/drm_print.h:32:0,
from drivers/gpu//drm/i915/intel_uc_fw.c:26:
drivers/gpu//drm/i915/intel_uc_fw.c: In function 'intel_uc_fw_fetch':
>> drivers/gpu//drm/i915/intel_uc_fw.c:50:12: error: 'i915' undeclared (first
>> use in this function); did you mean 'to_i915'?
dev_info(i915->drm.dev,
^
include/linux/device.h:1469:12: note: in definition of macro 'dev_info'
_dev_info(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~
drivers/gpu//drm/i915/intel_uc_fw.c:50:12: note: each undeclared identifier
is reported only once for each function it appears in
dev_info(i915->drm.dev,
^
include/linux/device.h:1469:12: note: in definition of macro 'dev_info'
_dev_info(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~
>> drivers/gpu//drm/i915/intel_uc_fw.c:52:29: error: 'const struct firmware'
>> has no member named 'type'
intel_uc_fw_type_repr(fw->type),
^
include/linux/device.h:1469:33: note: in definition of macro 'dev_info'
_dev_info(dev, dev_fmt(fmt), ##__VA_ARGS__)
^~~
vim +50 drivers/gpu//drm/i915/intel_uc_fw.c
> 26 #include
27
28 #include "intel_uc_fw.h"
29 #include "i915_drv.h"
30
31 /**
32 * intel_uc_fw_fetch - fetch uC firmware
33 *
34 * @dev_priv: device private
35 * @uc_fw: uC firmware
36 *
37 * Fetch uC firmware into GEM obj.
38 */
39 void intel_uc_fw_fetch(struct drm_i915_private *dev_priv,
40 struct intel_uc_fw *uc_fw)
41 {
42 struct pci_dev *pdev = dev_priv->drm.pdev;
43 struct drm_i915_gem_object *obj;
44 const struct firmware *fw = NULL;
45 struct uc_css_header *css;
46 size_t size;
47 int err;
48
49 if (!uc_fw->path) {
> 50 dev_info(i915->drm.dev,
51 "%s: No firmware was defined for %s!\n",
> 52 intel_uc_fw_type_repr(fw->type),
53
intel_platform_name(INTEL_INFO(i915)->platform));
54 return;
55 }
56
57 DRM_DEBUG_DRIVER("%s fw fetch %s\n",
58 intel_uc_fw_type_repr(uc_fw->type),
uc_fw->path);
59
60 uc_fw->fetch_status = INTEL_UC_FIRMWARE_PENDING;
61 DRM_DEBUG_DRIVER("%s fw fetch %s\n",
62 intel_uc_fw_type_repr(uc_fw->type),
63 intel_uc_fw_status_repr(uc_fw->fetch_status));
64
65 err = request_firmware(&fw, uc_fw->path, &pdev->dev);
66 if (err) {
67 DRM_DEBUG_DRIVER("%s fw request_firmware err=%d\n",
68 intel_uc_fw_type_repr(uc_fw->type),
err);
69 goto fail;
70 }
71
72 DRM_DEBUG_DRIVER("%s fw size %zu ptr %p\n",
73 intel_uc_fw_type_repr(uc_fw->type), fw->size,
fw);
74
75 /* Check the size of the blob before examining buffer contents
*/
76 if (fw->size < sizeof(struct uc_css_header)) {
77 DRM_WARN("%s: Unexpected firmware size (%zu, min
%zu)\n",
78 intel_uc_fw_type_repr(uc_fw->type),
79 fw->size, sizeof(struct uc_css_header));
80 err = -ENODATA;
81 goto fail;
82 }
83
84 css = (struct uc_css_header *)fw->data;
85
86 /* Firmware bits always start from header */
87 uc_fw->header_offset = 0;
88 uc_fw->header_size = (css->header_size_dw -
css->modulus_size_dw -
89css->key_size_dw - css->exponent_size_dw
[Intel-gfx] ✓ Fi.CI.BAT: success for Per context dynamic (sub)slice power-gating (rev11)
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev11)
URL : https://patchwork.freedesktop.org/series/48194/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5378 -> Patchwork_11254
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/48194/revisions/11/
Known issues
Here are the changes found in Patchwork_11254 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@cs-compute:
- fi-kbl-8809g: NOTRUN -> FAIL [fdo#108094]
* igt@amdgpu/amd_prime@amd-to-i915:
- fi-kbl-8809g: NOTRUN -> FAIL [fdo#107341]
* igt@i915_module_load@reload:
- fi-kbl-7567u: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602]
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: PASS -> DMESG-WARN [fdo#105602]
* igt@i915_selftest@live_hangcheck:
- fi-bwr-2160:PASS -> DMESG-FAIL [fdo#108735]
* igt@prime_vgem@basic-fence-flip:
- fi-gdg-551: PASS -> FAIL [fdo#103182]
Possible fixes
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: DMESG-WARN [fdo#108965] -> PASS
* igt@gem_exec_suspend@basic-s4-devices:
- fi-bsw-kefka: DMESG-WARN -> PASS
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@i915_selftest@live_hangcheck:
- fi-apl-guc: DMESG-FAIL [fdo#109228] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-byt-clapper: FAIL [fdo#103167] -> PASS
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
* igt@kms_psr@sprite_plane_onoff:
- fi-skl-6700hq: FAIL [fdo#107383] -> PASS +3
Warnings
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-byt-clapper: INCOMPLETE [fdo#102657] -> FAIL [fdo#103191] /
[fdo#107362]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102657]: https://bugs.freedesktop.org/show_bug.cgi?id=102657
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#107341]: https://bugs.freedesktop.org/show_bug.cgi?id=107341
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108094]: https://bugs.freedesktop.org/show_bug.cgi?id=108094
[fdo#108735]: https://bugs.freedesktop.org/show_bug.cgi?id=108735
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
[fdo#109228]: https://bugs.freedesktop.org/show_bug.cgi?id=109228
[fdo#109241]: https://bugs.freedesktop.org/show_bug.cgi?id=109241
Participating hosts (48 -> 45)
--
Additional (1): fi-icl-y
Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-glk-j4005
Build changes
-
* Linux: CI_DRM_5378 -> Patchwork_11254
CI_DRM_5378: 96b07848e43c024bd6a5a44970371c4866140a1c @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11254: 93a3f1fd397c89dbdf32aa9ed034bd1d2550a735 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
93a3f1fd397c drm/i915/selftests: Context SSEU reconfiguration tests
d9a1551457de drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11
only)
f2b12bcf0ca7 drm/i915: Add timeline barrier support
37c8e6fcbba7 drm/i915/perf: lock powergating configuration to default when
active
961bc57575da drm/i915: Record the sseu configuration per-context & engine
3350b5e6ed18 drm/i915/execlists: Move RPCS setup to context pin
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11254/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/5] drm/i915: Re-enable fastset by default
Now that we've solved the backlight issue, I think it's time to enable this again by default. We've enabled it in the past, but backlight issues prevented us from enabling it by default. Our hardware readout is pretty complete, and with all of the connector state moved to atomic I'm hoping we finally have enough capability to re-enable fastset by default. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 6efcf330bdab..7dd71bc85106 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -66,7 +66,7 @@ struct drm_printer; /* leave bools at the end to not create holes */ \ param(bool, alpha_support, IS_ENABLED(CONFIG_DRM_I915_ALPHA_SUPPORT)) \ param(bool, enable_hangcheck, true) \ - param(bool, fastboot, false) \ + param(bool, fastboot, true) \ param(bool, prefault_disable, false) \ param(bool, load_detect_test, false) \ param(bool, force_reset_modeset_test, false) \ -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/5] drm/i915/backlight: Fix backlight takeover on LPT, v3.
On lynxpoint the bios sometimes sets up the backlight using the CPU
display, but the driver expects using the PWM PCH override register.
Read the value from the CPU register, then convert it to the other
units by converting from the old duty cycle, to freq, to the new units.
This value is then programmed in the override register, after which
we set the override and disable the CPU display control. This allows
us to switch the source without flickering, and make the backlight
controls work in the driver.
Changes since v1:
- Read BLC_PWM_CPU_CTL2 to cpu_ctl2.
- Clean up cpu_mode if slightly.
- Always disable BLM_PWM_ENABLE in cpu_ctl2.
Changes since v2:
- Simplify cpu_mode handling (Jani)
Signed-off-by: Maarten Lankhorst
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108225
Cc: Basil Eric Rabi
Cc: Hans de Goede
Cc: Tolga Cakir
Cc: Ville Syrjälä
Tested-by: Tolga Cakir
Cc: Jani Nikula
---
drivers/gpu/drm/i915/intel_panel.c | 26 ++
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index f71b33cf1c97..1c9ef54d58fe 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1493,8 +1493,8 @@ static int lpt_setup_backlight(struct intel_connector
*connector, enum pipe unus
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_panel *panel = &connector->panel;
- u32 pch_ctl1, pch_ctl2, val;
- bool alt;
+ u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
+ bool alt, cpu_mode;
if (HAS_PCH_LPT(dev_priv))
alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
@@ -1508,6 +1508,8 @@ static int lpt_setup_backlight(struct intel_connector
*connector, enum pipe unus
pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
panel->backlight.max = pch_ctl2 >> 16;
+ cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
+
if (!panel->backlight.max)
panel->backlight.max = get_backlight_max_vbt(connector);
@@ -1516,12 +1518,28 @@ static int lpt_setup_backlight(struct intel_connector
*connector, enum pipe unus
panel->backlight.min = get_backlight_min_vbt(connector);
- val = lpt_get_backlight(connector);
+ panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
+
+ cpu_mode = panel->backlight.enabled && HAS_PCH_LPT(dev_priv) &&
+ !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&
+ (cpu_ctl2 & BLM_PWM_ENABLE);
+ if (cpu_mode)
+ val = pch_get_backlight(connector);
+ else
+ val = lpt_get_backlight(connector);
val = intel_panel_compute_brightness(connector, val);
panel->backlight.level = clamp(val, panel->backlight.min,
panel->backlight.max);
- panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
+ if (cpu_mode) {
+ DRM_DEBUG_KMS("CPU backlight register was enabled, switching to
PCH override\n");
+
+ /* Write converted CPU PWM value to PCH override register */
+ lpt_set_backlight(connector->base.state,
panel->backlight.level);
+ I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 |
BLM_PCH_OVERRIDE_ENABLE);
+
+ I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 & ~BLM_PWM_ENABLE);
+ }
return 0;
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/5] drm/i915: Enable fastset for non-boot modesets.
Now that our state comparison functions are pretty complete, we should
enable fastset by default when a modeset can be avoided. Even if we're
not completely certain about the inherited state, we can be certain
after the first modeset that our sw state matches the hw state.
There is one testcase explicitly testing fastset,
kms_panel_fitting.atomic-fastset but other testcases do so indirectly
because most tests don't clean up the display during exit, or otherwise
indirectly preserve mode by doing igt_display_reset or inheriting during
init.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Hans de Goede
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 696e6f5680df..f8cbdd50fa38 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11671,6 +11671,11 @@ intel_pipe_config_compare(struct drm_i915_private
*dev_priv,
(current_config->base.mode.private_flags &
I915_MODE_FLAG_INHERITED) &&
!(pipe_config->base.mode.private_flags &
I915_MODE_FLAG_INHERITED);
+ if (fixup_inherited && !i915_modparams.fastboot) {
+ drm_dbg(DRM_UT_KMS, "initial modeset and fastboot not set\n");
+ ret = false;
+ }
+
#define PIPE_CONF_CHECK_X(name) do { \
if (current_config->name != pipe_config->name) { \
pipe_config_err(adjust, __stringify(name), \
@@ -12694,8 +12699,7 @@ static int intel_atomic_check(struct drm_device *dev,
return ret;
}
- if (i915_modparams.fastboot &&
- intel_pipe_config_compare(dev_priv,
+ if (intel_pipe_config_compare(dev_priv,
to_intel_crtc_state(old_crtc_state),
pipe_config, true)) {
crtc_state->mode_changed = false;
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/5] drm/i915: Make HW readout mark CRTC scaler as in use.
This way we don't accidentally double allocate it. Noticed this when I wrote a patch to sanity check all of the scaler state. Signed-off-by: Maarten Lankhorst Reviewed-by: Hans de Goede --- drivers/gpu/drm/i915/intel_display.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f8cbdd50fa38..f902f720a3fb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -8869,6 +8869,7 @@ static void skylake_get_pfit_config(struct intel_crtc *crtc, pipe_config->pch_pfit.enabled = true; pipe_config->pch_pfit.pos = I915_READ(SKL_PS_WIN_POS(crtc->pipe, i)); pipe_config->pch_pfit.size = I915_READ(SKL_PS_WIN_SZ(crtc->pipe, i)); + scaler_state->scalers[i].in_use = true; break; } } -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/5] drm/i915/backlight: Restore backlight on resume, v3.
Restore our saved values for backlight. This way even with fastset on
S4 resume we will correctly restore the backlight to the active values.
Changes since v1:
- Call enable_backlight() when backlight.level is set. On suspend
backlight.enabled is always cleared, this makes it not a good
indicator. Also check for crtc->state->active.
Changes since v2:
- Use the new update_pipe() callback to run this on resume as well.
Signed-off-by: Maarten Lankhorst
Cc: Tolga Cakir
Cc: Basil Eric Rabi
Cc: Hans de Goede
Cc: Ville Syrjälä
Reported-by: Ville Syrjälä
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/icl_dsi.c | 1 +
drivers/gpu/drm/i915/intel_ddi.c | 2 ++
drivers/gpu/drm/i915/intel_dp.c| 1 +
drivers/gpu/drm/i915/intel_drv.h | 3 ++
drivers/gpu/drm/i915/intel_lvds.c | 1 +
drivers/gpu/drm/i915/intel_panel.c | 49 +++---
drivers/gpu/drm/i915/vlv_dsi.c | 1 +
7 files changed, 47 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index 4dd793b78996..3f92881600c5 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -1378,6 +1378,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
encoder->disable = gen11_dsi_disable;
encoder->port = port;
encoder->get_config = gen11_dsi_get_config;
+ encoder->update_pipe = intel_panel_update_backlight;
encoder->compute_config = gen11_dsi_compute_config;
encoder->get_hw_state = gen11_dsi_get_hw_state;
encoder->type = INTEL_OUTPUT_DSI;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 2d6ed990a232..d32865dc44e8 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3548,6 +3548,8 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder
*encoder,
intel_psr_enable(intel_dp, crtc_state);
intel_edp_drrs_enable(intel_dp, crtc_state);
+
+ intel_panel_update_backlight(encoder, crtc_state, conn_state);
}
static void intel_ddi_update_pipe(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 62fd11540942..0cbacdc70b07 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6981,6 +6981,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
intel_encoder->compute_config = intel_dp_compute_config;
intel_encoder->get_hw_state = intel_dp_get_hw_state;
intel_encoder->get_config = intel_dp_get_config;
+ intel_encoder->update_pipe = intel_panel_update_backlight;
intel_encoder->suspend = intel_dp_encoder_suspend;
if (IS_CHERRYVIEW(dev_priv)) {
intel_encoder->pre_pll_enable = chv_dp_pre_pll_enable;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1a11c2beb7f3..0a6fb42e2086 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2023,6 +2023,9 @@ int intel_panel_setup_backlight(struct drm_connector
*connector,
enum pipe pipe);
void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
+void intel_panel_update_backlight(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state);
void intel_panel_disable_backlight(const struct drm_connector_state
*old_conn_state);
extern struct drm_display_mode *intel_find_panel_downclock(
struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
index b85e195f7c8a..189693b4c5e8 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -909,6 +909,7 @@ void intel_lvds_init(struct drm_i915_private *dev_priv)
}
intel_encoder->get_hw_state = intel_lvds_get_hw_state;
intel_encoder->get_config = intel_lvds_get_config;
+ intel_encoder->update_pipe = intel_panel_update_backlight;
intel_connector->get_hw_state = intel_connector_get_hw_state;
intel_connector_attach_encoder(intel_connector, intel_encoder);
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index ee3e0842d542..f71b33cf1c97 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1087,20 +1087,11 @@ static void pwm_enable_backlight(const struct
intel_crtc_state *crtc_state,
intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
}
-void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state)
+static void __intel_panel_enable_backlight(const struct inte
Re: [Intel-gfx] [PATCH] drm/i915/icl: Apply WaEnablePreemptionGranularityControlByUMD
+ Ken/Jason for Mesa
Quoting Matt Roper (2019-01-07 21:19:31)
> On Mon, Jan 07, 2019 at 01:23:50PM +0100, Michał Winiarski wrote:
> > On Mon, Jan 07, 2019 at 01:01:16PM +0200, Joonas Lahtinen wrote:
> > > Quoting José Roberto de Souza (2019-01-04 19:37:00)
> > > > According to Workaround database ICL also needs
> > > > WaEnablePreemptionGranularityControlByUMD, to allow userspace to do
> > > > fine-granularity preemptions per-context.
> > >
> > > I must wonder where is the userspace component that needs this, and why
> > > it hasn't been noticed earlier?
> > >
> > > Or is this one more of the cases when no userspace actually uses the
> > > register?
> >
> > It's used:
> > https://gitlab.freedesktop.org/mesa/mesa/blob/master/src/mesa/drivers/dri/i965/brw_state_upload.c#L64
> >
> > -Michał
>
> Wasn't this just an artificial i915-only workaround that was added to
> prevent breakage of pre-preemption UMD's? Initial gen9 driver releases
> didn't support preemption, so when preemption support did get added to
> i915, the kernel had to force object-level off by default at context
> creation to avoid breaking old userspace that didn't build batch buffers
> with all the necessary preemption workarounds. This CS_CHICKEN1
> register was then exposed to userspace so that newer, preemption-aware
> userspace could opt back in if it properly supported preemption.
>
> For gen11, there shouldn't be any "old" userspace around that doesn't
> support preemption, so shouldn't the kernel just leave object-level
> preemption enabled by default (meaning there's no need to expose this
> register to userspace to allow it to explicitly opt-in)?
Makes sense to me. We should have known by know if somebody expects to
control the register, because they would be failing to do so.
Mesa could also drop the register load for Gen11+
Regards, Joonas
>
> Matt
>
> >
> > > Regards, Joonas
> > >
> > > >
> > > > BSpec: 11348
> > > > Cc: Oscar Mateo
> > > > Cc: Radhakrishna Sripada
> > > > Signed-off-by: José Roberto de Souza
> > > > ---
> > > > drivers/gpu/drm/i915/intel_workarounds.c | 9 ++---
> > > > 1 file changed, 6 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
> > > > b/drivers/gpu/drm/i915/intel_workarounds.c
> > > > index 480c53a2ecb5..bbc5a66faa07 100644
> > > > --- a/drivers/gpu/drm/i915/intel_workarounds.c
> > > > +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> > > > @@ -1014,7 +1014,7 @@ static void gen9_whitelist_build(struct
> > > > i915_wa_list *w)
> > > > /*
> > > > WaVFEStateAfterPipeControlwithMediaStateClear:skl,bxt,glk,cfl */
> > > > whitelist_reg(w, GEN9_CTX_PREEMPT_REG);
> > > >
> > > > - /*
> > > > WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,[cnl] */
> > > > + /*
> > > > WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,[cnl,icl] */
> > > > whitelist_reg(w, GEN8_CS_CHICKEN1);
> > > >
> > > > /* WaAllowUMDToModifyHDCChicken1:skl,bxt,kbl,glk,cfl */
> > > > @@ -1068,6 +1068,9 @@ static void icl_whitelist_build(struct
> > > > i915_wa_list *w)
> > > >
> > > > /* WaAllowUMDToModifySamplerMode:icl */
> > > > whitelist_reg(w, GEN10_SAMPLER_MODE);
> > > > +
> > > > + /* WaEnablePreemptionGranularityControlByUMD:icl */
> > > > + whitelist_reg(w, GEN8_CS_CHICKEN1);
> > > > }
> > > >
> > > > void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> > > > @@ -1186,8 +1189,8 @@ static void rcs_engine_wa_init(struct
> > > > intel_engine_cs *engine)
> > > > GEN7_DISABLE_SAMPLER_PREFETCH);
> > > > }
> > > >
> > > > - if (IS_GEN(i915, 9) || IS_CANNONLAKE(i915)) {
> > > > - /*
> > > > WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,cnl */
> > > > + if (IS_GEN_RANGE(i915, 9, 11)) {
> > > > + /*
> > > > WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,cnl,icl */
> > > > wa_masked_en(wal,
> > > > GEN7_FF_SLICE_CS_CHICKEN1,
> > > > GEN9_FFSC_PERCTX_PREEMPT_CTRL);
> > > > --
> > > > 2.20.1
> > > >
> > > > ___
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > > ___
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Per context dynamic (sub)slice power-gating (rev11)
== Series Details == Series: Per context dynamic (sub)slice power-gating (rev11) URL : https://patchwork.freedesktop.org/series/48194/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/execlists: Move RPCS setup to context pin Okay! Commit: drm/i915: Record the sseu configuration per-context & engine -drivers/gpu/drm/i915/selftests/../i915_drv.h:3546:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3560:16: warning: expression using sizeof(void) Commit: drm/i915/perf: lock powergating configuration to default when active Okay! Commit: drm/i915: Add timeline barrier support Okay! Commit: drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) +drivers/gpu/drm/i915/intel_lrc.c:2397:25: warning: expression using sizeof(void) Commit: drm/i915/selftests: Context SSEU reconfiguration tests +drivers/gpu/drm/i915/selftests/i915_gem_context.c:1220:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/i915_gem_context.c:1220:25: warning: expression using sizeof(void) -drivers/gpu/drm/i915/selftests/i915_gem_context.c:1220:25: warning: expression using sizeof(void) -drivers/gpu/drm/i915/selftests/i915_gem_context.c:1220:25: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Per context dynamic (sub)slice power-gating (rev11)
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev11)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3350b5e6ed18 drm/i915/execlists: Move RPCS setup to context pin
961bc57575da drm/i915: Record the sseu configuration per-context & engine
37c8e6fcbba7 drm/i915/perf: lock powergating configuration to default when
active
-:72: WARNING:BAD_SIGN_OFF: 'Co-developed-by:' is the preferred signature form
#72:
Co-Developed-by: Tvrtko Ursulin
total: 0 errors, 1 warnings, 0 checks, 126 lines checked
f2b12bcf0ca7 drm/i915: Add timeline barrier support
d9a1551457de drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11
only)
-:47: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#47:
v2: Fix offset of CTX_R_PWR_CLK_STATE in intel_lr_context_set_sseu() (Lionel)
-:506: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around
'user->min_eus_per_subslice !=
device->max_eus_per_subslice'
#506: FILE: drivers/gpu/drm/i915/i915_gem_context.c:1171:
+ if ((user->min_eus_per_subslice !=
+device->max_eus_per_subslice) ||
+ (user->max_eus_per_subslice !=
+device->max_eus_per_subslice))
-:506: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around
'user->max_eus_per_subslice !=
device->max_eus_per_subslice'
#506: FILE: drivers/gpu/drm/i915/i915_gem_context.c:1171:
+ if ((user->min_eus_per_subslice !=
+device->max_eus_per_subslice) ||
+ (user->max_eus_per_subslice !=
+device->max_eus_per_subslice))
total: 0 errors, 1 warnings, 2 checks, 479 lines checked
93a3f1fd397c drm/i915/selftests: Context SSEU reconfiguration tests
-:407: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or
return
#407: FILE: drivers/gpu/drm/i915/selftests/i915_gem_context.c:961:
+ return -EINVAL;
+ } else {
-:414: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#414: FILE: drivers/gpu/drm/i915/selftests/i915_gem_context.c:968:
+
+}
total: 0 errors, 1 warnings, 1 checks, 550 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v6 3/4] ACPI / PMIC: Add generic intel_soc_pmic_exec_mipi_pmic_seq_element handling
Hi,
On 08-01-19 15:51, Andy Shevchenko wrote:
On Tue, Jan 08, 2019 at 02:45:39PM +0100, Hans de Goede wrote:
On 07-01-19 16:46, Andy Shevchenko wrote:
On Mon, Jan 07, 2019 at 12:15:55PM +0100, Hans de Goede wrote:
+ } else if (d->pmic_i2c_address) {
+ if (i2c_address == d->pmic_i2c_address) {
+ ret = regmap_update_bits(intel_pmic_opregion->regmap,
+reg_address, mask, value);
+ } else {
+ pr_err("%s: Unexpected i2c-addr: 0x%02x (reg-addr 0x%x value
0x%x mask 0x%x)\n",
+ __func__, i2c_address, reg_address, value, mask);
+ ret = -ENXIO;
+ }
--- a/drivers/acpi/pmic/intel_pmic_xpower.c
+++ b/drivers/acpi/pmic/intel_pmic_xpower.c
+ .pmic_i2c_address = 0x34,
Can we just have a hook here instead of exposing PMIC I2C address?
Am I missing something in case it's not possible?
We already have a hook, but it isn't really necessary to implement
that for each model PMIC. The MFD device which is the PMIC's parent
in most cases will give us a regmap to access the PMIC registers and
that allows us to do a generic implementation.
But the MIPI PMIC sequence includes an i2c-address as some PMICs
span multiple i2c-addresses. For the simple single i2c-address case
the regmap gives us access to the registers behind that single address
and we can use a generic solution. In this case we should verify the
i2c-addr is what we expect, which is where the pmic_i2c_address comes in.
But we also can have a generic hook in intel_pmic.c and assign it whenever
it's the case?
We could, but then we still need the pmic_i2c_address member and now the
hook would need to passed both the regmap and the intel_pmic_opregion_data
pointer so that it can verify the i2c address so handling the generic case
directly inside intel_soc_pmic_exec_mipi_pmic_seq_element is easier.
Regards,
Hans
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Downgrade scare message for unknwown HuC firmware (rev4)
== Series Details ==
Series: drm/i915: Downgrade scare message for unknwown HuC firmware (rev4)
URL : https://patchwork.freedesktop.org/series/54868/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5378 -> Patchwork_11253
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/54868/revisions/4/
Known issues
Here are the changes found in Patchwork_11253 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@cs-compute:
- fi-kbl-8809g: NOTRUN -> FAIL [fdo#108094]
* igt@amdgpu/amd_prime@amd-to-i915:
- fi-kbl-8809g: NOTRUN -> FAIL [fdo#107341]
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: PASS -> FAIL [fdo#108767]
* igt@kms_flip@basic-flip-vs-modeset:
- fi-skl-6700hq: PASS -> DMESG-WARN [fdo#105998]
Possible fixes
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: DMESG-WARN [fdo#108965] -> PASS
* igt@gem_exec_suspend@basic-s4-devices:
- fi-bsw-kefka: DMESG-WARN -> PASS
* igt@i915_selftest@live_hangcheck:
- fi-apl-guc: DMESG-FAIL [fdo#109228] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-byt-clapper: FAIL [fdo#103167] -> PASS
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-byt-clapper: INCOMPLETE [fdo#102657] -> PASS
* igt@kms_psr@sprite_plane_onoff:
- fi-skl-6700hq: FAIL [fdo#107383] -> PASS +3
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102657]: https://bugs.freedesktop.org/show_bug.cgi?id=102657
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#105998]: https://bugs.freedesktop.org/show_bug.cgi?id=105998
[fdo#107341]: https://bugs.freedesktop.org/show_bug.cgi?id=107341
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#108094]: https://bugs.freedesktop.org/show_bug.cgi?id=108094
[fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
[fdo#109228]: https://bugs.freedesktop.org/show_bug.cgi?id=109228
[fdo#109241]: https://bugs.freedesktop.org/show_bug.cgi?id=109241
Participating hosts (48 -> 45)
--
Additional (1): fi-icl-y
Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-glk-j4005
Build changes
-
* Linux: CI_DRM_5378 -> Patchwork_11253
CI_DRM_5378: 96b07848e43c024bd6a5a44970371c4866140a1c @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11253: 010a74bc116c4fb15c1dd8682c2db0c4eab6645f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
010a74bc116c drm/i915: Downgrade scare message for unknown HuC firmware
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11253/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/6] drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)
From: Tvrtko Ursulin
We want to allow userspace to reconfigure the subslice configuration on a
per context basis.
This is required for the functional requirement of shutting down non-VME
enabled sub-slices on Gen11 parts.
To do so, we expose a context parameter to allow adjustment of the RPCS
register stored within the context image (and currently not accessible via
LRI).
If the context is adjusted before first use or whilst idle, the adjustment
is for "free"; otherwise if the context is active we queue a request to do
so (using the kernel context), following all other activity by that
context, which is also marked as barrier for all following submission
against the same context.
Since the overhead of device re-configuration during context switching can
be significant, especially in multi-context workloads, we limit this new
uAPI to only support the Gen11 VME use case. In this use case either the
device is fully enabled, and exactly one slice and half of the subslices
are enabled.
Example usage:
struct drm_i915_gem_context_param_sseu sseu = { };
struct drm_i915_gem_context_param arg =
{ .param = I915_CONTEXT_PARAM_SSEU,
.ctx_id = gem_context_create(fd),
.size = sizeof(sseu),
.value = to_user_pointer(&sseu)
};
/* Query device defaults. */
gem_context_get_param(fd, &arg);
/* Set VME configuration on a 1x6x8 part. */
sseu.slice_mask = 0x1;
sseu.subslice_mask = 0xe0;
gem_context_set_param(fd, &arg);
v2: Fix offset of CTX_R_PWR_CLK_STATE in intel_lr_context_set_sseu() (Lionel)
v3: Add ability to program this per engine (Chris)
v4: Move most get_sseu() into i915_gem_context.c (Lionel)
v5: Validate sseu configuration against the device's capabilities (Lionel)
v6: Change context powergating settings through MI_SDM on kernel context (Chris)
v7: Synchronize the requests following a powergating setting change using a
global
dependency (Chris)
Iterate timelines through dev_priv.gt.active_rings (Tvrtko)
Disable RPCS configuration setting for non capable users (Lionel/Tvrtko)
v8: s/union intel_sseu/struct intel_sseu/ (Lionel)
s/dev_priv/i915/ (Tvrtko)
Change uapi class/instance fields to u16 (Tvrtko)
Bump mask fields to 64bits (Lionel)
Don't return EPERM when dynamic sseu is disabled (Tvrtko)
v9: Import context image into kernel context's ppgtt only when
reconfiguring powergated slice/subslices (Chris)
Use aliasing ppgtt when needed (Michel)
Tvrtko Ursulin:
v10:
* Update for upstream changes.
* Request submit needs a RPM reference.
* Reject on !FULL_PPGTT for simplicity.
* Pull out get/set param to helpers for readability and less indent.
* Use i915_request_await_dma_fence in add_global_barrier to skip waits
on the same timeline and avoid GEM_BUG_ON.
* No need to explicitly assign a NULL pointer to engine in legacy mode.
* No need to move gen8_make_rpcs up.
* Factored out global barrier as prep patch.
* Allow to only CAP_SYS_ADMIN if !Gen11.
v11:
* Remove engine vfunc in favour of local helper. (Chris Wilson)
* Stop retiring requests before updates since it is not needed
(Chris Wilson)
* Implement direct CPU update path for idle contexts. (Chris Wilson)
* Left side dependency needs only be on the same context timeline.
(Chris Wilson)
* It is sufficient to order the timeline. (Chris Wilson)
* Reject !RCS configuration attempts with -ENODEV for now.
v12:
* Rebase for make_rpcs.
v13:
* Centralize SSEU normalization to make_rpcs.
* Type width checking (uAPI <-> implementation).
* Gen11 restrictions uAPI checks.
* Gen11 subslice count differences handling.
Chris Wilson:
* args->size handling fixes.
* Update context image from GGTT.
* Postpone context image update to pinning.
* Use i915_gem_active_raw instead of last_request_on_engine.
v14:
* Add activity tracker on intel_context to fix the lifetime issues
and simplify the code. (Chris Wilson)
v15:
* Fix context pin leak if no space in ring by simplifying the
context pinning sequence.
v16:
* Rebase for context get/set param locking changes.
* Just -ENODEV on !Gen11. (Joonas)
v17:
* Fix one Gen11 subslice enablement rule.
* Handle error from i915_sw_fence_await_sw_fence_gfp. (Chris Wilson)
v18:
* Update commit message. (Joonas)
* Restrict uAPI to VME use case. (Joonas)
v19:
* Rebase.
v20:
* Rebase for ce->active_tracker.
v21:
* Rebase for IS_GEN changes.
v22:
* Reserve uAPI for flags straight away. (Chris Wilson)
v23:
* Rebase for RUNTIME_INFO.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100899
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107634
Issue: https://github.com/intel/media-driver/issues/267
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Cc: Dmitry Rogozhkin
Cc: Tvrtko Ursulin
Cc: Zhipeng Gong
Cc: Joonas Lahtinen
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Ch
[Intel-gfx] [PATCH i-g-t 4/4] tests/gem_media_vme: Shut down half of subslices to avoid gpu hang on ICL
From: Tony Ye
On Icelake we need to turn off subslices not containing the VME block or
the VME kernel will hang.
v2: (Tvrtko Ursulin)
* Remove libdrm usage for setting context param.
* Cleanup bitmask operation.
* Only apply the workaround for ICL.
v3: (Tvrtko Ursulin)
* Added hang detector. (Chris Wilson)
v4: (Tvrtko Ursulin)
* Rebase for hang detector moved to previous patch.
* Tidy curly braces.
v5: (Tvrtko Ursulin)
* Whitespace tidy. (Joonas)
Signed-off-by: Tony Ye
Signed-off-by: Tvrtko Ursulin
Cc: Tony Ye
Reviewed-by: Joonas Lahtinen
---
lib/gpu_cmds.c | 12
lib/gpu_cmds.h | 3 ++
lib/media_fill.c | 2 +-
tests/i915/gem_media_vme.c | 60 ++
4 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c
index b490a63bdfef..8d270ee86229 100644
--- a/lib/gpu_cmds.c
+++ b/lib/gpu_cmds.c
@@ -36,6 +36,18 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t
batch_end)
igt_assert(ret == 0);
}
+void
+gen7_render_context_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
+{
+ int ret;
+
+ ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
+ if (ret == 0)
+ ret = drm_intel_gem_bo_context_exec(batch->bo, batch->ctx,
+ batch_end, 0);
+ igt_assert(ret == 0);
+}
+
uint32_t
gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
uint8_t color)
diff --git a/lib/gpu_cmds.h b/lib/gpu_cmds.h
index ca671fb52daf..1321af446161 100644
--- a/lib/gpu_cmds.h
+++ b/lib/gpu_cmds.h
@@ -40,6 +40,9 @@
void
gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
+void
+gen7_render_context_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
+
uint32_t
gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
uint8_t color);
diff --git a/lib/media_fill.c b/lib/media_fill.c
index b1e84727394a..03b5e71e101b 100644
--- a/lib/media_fill.c
+++ b/lib/media_fill.c
@@ -338,7 +338,7 @@ __gen11_media_vme_func(struct intel_batchbuffer *batch,
batch_end = intel_batchbuffer_align(batch, 8);
assert(batch_end < BATCH_STATE_SPLIT);
- gen7_render_flush(batch, batch_end);
+ gen7_render_context_flush(batch, batch_end);
intel_batchbuffer_reset(batch);
}
diff --git a/tests/i915/gem_media_vme.c b/tests/i915/gem_media_vme.c
index 8d9fd822b2ee..d5045ad1d785 100644
--- a/tests/i915/gem_media_vme.c
+++ b/tests/i915/gem_media_vme.c
@@ -81,6 +81,52 @@ static void scratch_buf_init_dst(drm_intel_bufmgr *bufmgr,
struct igt_buf *buf)
buf->stride = 1;
}
+static uint64_t switch_off_n_bits(uint64_t mask, unsigned int n)
+{
+ unsigned int i;
+
+ igt_assert(n > 0 && n <= (sizeof(mask) * 8));
+ igt_assert(n <= __builtin_popcount(mask));
+
+ for (i = 0; n && i < (sizeof(mask) * 8); i++) {
+ uint64_t bit = 1ULL << i;
+
+ if (bit & mask) {
+ mask &= ~bit;
+ n--;
+ }
+ }
+
+ return mask;
+}
+
+static void shut_non_vme_subslices(int drm_fd, uint32_t ctx)
+{
+ struct drm_i915_gem_context_param_sseu sseu = { };
+ struct drm_i915_gem_context_param arg = {
+ .param = I915_CONTEXT_PARAM_SSEU,
+ .ctx_id = ctx,
+ .size = sizeof(sseu),
+ .value = to_user_pointer(&sseu),
+ };
+ int ret;
+
+ if (__gem_context_get_param(drm_fd, &arg))
+ return; /* no sseu support */
+
+ ret = __gem_context_set_param(drm_fd, &arg);
+ igt_assert(ret == 0 || ret == -ENODEV || ret == -EINVAL);
+ if (ret)
+ return; /* no sseu support */
+
+ /* shutdown half subslices */
+ sseu.subslice_mask =
+ switch_off_n_bits(sseu.subslice_mask,
+ __builtin_popcount(sseu.subslice_mask) / 2);
+
+ gem_context_set_param(drm_fd, &arg);
+}
+
igt_simple_main
{
int drm_fd;
@@ -107,6 +153,20 @@ igt_simple_main
scratch_buf_init_src(bufmgr, &src);
scratch_buf_init_dst(bufmgr, &dst);
+ batch->ctx = drm_intel_gem_context_create(bufmgr);
+ igt_assert(batch->ctx);
+
+ /* ICL hangs if non-VME enabled slices are enabled with a VME kernel. */
+ if (intel_gen(devid) == 11) {
+ uint32_t ctx_id;
+ int ret;
+
+ ret = drm_intel_gem_context_get_id(batch->ctx, &ctx_id);
+ igt_assert_eq(ret, 0);
+
+ shut_non_vme_subslices(drm_fd, ctx_id);
+ }
+
igt_fork_hang_detector(drm_fd);
media_vme(batch, &src, WIDTH, HEIGHT, &dst);
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/6] drm/i915: Record the sseu configuration per-context & engine
From: Lionel Landwerlin
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine, which is initially set
to the device default upon creation.
v2: record sseu configuration per context & engine (Chris)
v3: introduce the i915_gem_context_sseu to store powergating
programming, sseu_dev_info has grown quite a bit (Lionel)
v4: rename i915_gem_sseu into intel_sseu (Chris)
use to_intel_context() (Chris)
v5: More to_intel_context() (Tvrtko)
Switch intel_sseu from union to struct (Tvrtko)
Move context default sseu in existing loop (Chris)
v6: s/intel_sseu_from_device_sseu/intel_device_default_sseu/ (Tvrtko)
Tvrtko Ursulin:
v7:
* Pass intel_sseu by pointer instead of value to make_rpcs.
* Rebase for make_rpcs changes.
v8:
* Rebase for RPCS edit on pin.
v9:
* Rebase for context image setup changes.
v10:
* Rename dev_priv to i915. (Chris Wilson)
v11:
* Rebase.
v12:
* Rebase for IS_GEN changes.
v13:
* Rebase for RUNTIME_INFO.
Signed-off-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.h | 14 +++
drivers/gpu/drm/i915/i915_gem_context.c | 2 ++
drivers/gpu/drm/i915/i915_gem_context.h | 4
drivers/gpu/drm/i915/i915_request.h | 10
drivers/gpu/drm/i915/intel_lrc.c| 31 +
5 files changed, 46 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 17a017645c5d..d57438d87bc0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3300,6 +3300,20 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
return (struct intel_device_info *)INTEL_INFO(dev_priv);
}
+static inline struct intel_sseu
+intel_device_default_sseu(struct drm_i915_private *i915)
+{
+ const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
+ struct intel_sseu value = {
+ .slice_mask = sseu->slice_mask,
+ .subslice_mask = sseu->subslice_mask[0],
+ .min_eus_per_subslice = sseu->max_eus_per_subslice,
+ .max_eus_per_subslice = sseu->max_eus_per_subslice,
+ };
+
+ return value;
+}
+
/* modesetting */
extern void intel_modeset_init_hw(struct drm_device *dev);
extern int intel_modeset_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 5905b6d8f291..a565643e9a26 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -343,6 +343,8 @@ __create_hw_context(struct drm_i915_private *dev_priv,
struct intel_context *ce = &ctx->__engine[n];
ce->gem_context = ctx;
+ /* Use the whole device by default */
+ ce->sseu = intel_device_default_sseu(dev_priv);
}
INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.h
b/drivers/gpu/drm/i915/i915_gem_context.h
index f6d870b1f73e..ef04e422cf9a 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/i915_gem_context.h
@@ -31,6 +31,7 @@
#include "i915_gem.h"
#include "i915_scheduler.h"
+#include "intel_device_info.h"
struct pid;
@@ -171,6 +172,9 @@ struct i915_gem_context {
int pin_count;
const struct intel_context_ops *ops;
+
+ /** sseu: Control eu/slice partitioning */
+ struct intel_sseu sseu;
} __engine[I915_NUM_ENGINES];
/** ring_size: size for allocating the per-engine ring buffer */
diff --git a/drivers/gpu/drm/i915/i915_request.h
b/drivers/gpu/drm/i915/i915_request.h
index d014b0605445..907bd8f11aeb 100644
--- a/drivers/gpu/drm/i915/i915_request.h
+++ b/drivers/gpu/drm/i915/i915_request.h
@@ -38,6 +38,16 @@ struct drm_i915_gem_object;
struct i915_request;
struct i915_timeline;
+/*
+ * Powergating configuration for a particular (context,engine).
+ */
+struct intel_sseu {
+ u8 slice_mask;
+ u8 subslice_mask;
+ u8 min_eus_per_subslice;
+ u8 max_eus_per_subslice;
+};
+
struct intel_wait {
struct rb_node node;
struct task_struct *tsk;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 229d620cf157..6df792bc5067 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1170,7 +1170,8 @@ static int __context_pin(struct i915_gem_context *ctx,
struct i915_vma *vma)
return i915_vma_pin(vma, 0, 0, flags);
}
-static u32 make_rpcs(struct drm_i915_private *dev_priv);
+static u32
+make_rpcs(struct drm_i915_private *i915, struct intel_sseu *ctx_sseu);
static void
__execlists_update_reg_state(struct intel_engine_cs
[Intel-gfx] [PATCH 4/6] drm/i915: Add timeline barrier support
From: Tvrtko Ursulin
Timeline barrier allows serialization between different timelines.
After calling i915_timeline_set_barrier with a request, all following
submissions on this timeline will be set up as depending on this request,
or barrier. Once the barrier has been completed it automatically gets
cleared and things continue as normal.
This facility will be used by the upcoming context SSEU code.
v2:
* Assert barrier has been retired on timeline_fini. (Chris Wilson)
* Fix mock_timeline.
v3:
* Improved comment language. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Suggested-by: Chris Wilson
Cc: Chris Wilson
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c | 13 +
drivers/gpu/drm/i915/i915_timeline.c | 3 +++
drivers/gpu/drm/i915/i915_timeline.h | 27 +++
.../gpu/drm/i915/selftests/mock_timeline.c| 2 ++
4 files changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 1e158eb8cb97..b0bbaecac744 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -477,6 +477,15 @@ submit_notify(struct i915_sw_fence *fence, enum
i915_sw_fence_notify state)
return NOTIFY_DONE;
}
+static int add_timeline_barrier(struct i915_request *rq)
+{
+ struct i915_request *barrier =
+ i915_gem_active_raw(&rq->timeline->barrier,
+ &rq->i915->drm.struct_mutex);
+
+ return barrier ? i915_request_await_dma_fence(rq, &barrier->fence) : 0;
+}
+
/**
* i915_request_alloc - allocate a request structure
*
@@ -628,6 +637,10 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
*/
rq->head = rq->ring->emit;
+ ret = add_timeline_barrier(rq);
+ if (ret)
+ goto err_unwind;
+
ret = engine->request_alloc(rq);
if (ret)
goto err_unwind;
diff --git a/drivers/gpu/drm/i915/i915_timeline.c
b/drivers/gpu/drm/i915/i915_timeline.c
index 4667cc08c416..5a87c5bd5154 100644
--- a/drivers/gpu/drm/i915/i915_timeline.c
+++ b/drivers/gpu/drm/i915/i915_timeline.c
@@ -37,6 +37,8 @@ void i915_timeline_init(struct drm_i915_private *i915,
INIT_LIST_HEAD(&timeline->requests);
i915_syncmap_init(&timeline->sync);
+
+ init_request_active(&timeline->barrier, NULL);
}
/**
@@ -69,6 +71,7 @@ void i915_timelines_park(struct drm_i915_private *i915)
void i915_timeline_fini(struct i915_timeline *timeline)
{
GEM_BUG_ON(!list_empty(&timeline->requests));
+ GEM_BUG_ON(i915_gem_active_isset(&timeline->barrier));
i915_syncmap_free(&timeline->sync);
diff --git a/drivers/gpu/drm/i915/i915_timeline.h
b/drivers/gpu/drm/i915/i915_timeline.h
index 38c1e15e927a..af6c05333d76 100644
--- a/drivers/gpu/drm/i915/i915_timeline.h
+++ b/drivers/gpu/drm/i915/i915_timeline.h
@@ -64,6 +64,16 @@ struct i915_timeline {
*/
struct i915_syncmap *sync;
+ /**
+* Barrier provides the ability to serialize ordering between different
+* timelines.
+*
+* Users can call i915_timeline_set_barrier which will make all
+* subsequent submissions to this timeline be executed only after the
+* barrier has been completed.
+*/
+ struct i915_gem_active barrier;
+
struct list_head link;
const char *name;
@@ -136,4 +146,21 @@ static inline bool i915_timeline_sync_is_later(struct
i915_timeline *tl,
void i915_timelines_park(struct drm_i915_private *i915);
+/**
+ * i915_timeline_set_barrier - orders submission between different timelines
+ * @timeline: timeline to set the barrier on
+ * @rq: request after which new submissions can proceed
+ *
+ * Sets the passed in request as the serialization point for all subsequent
+ * submissions on @timeline. Subsequent requests will not be submitted to GPU
+ * until the barrier has been completed.
+ */
+static inline void
+i915_timeline_set_barrier(struct i915_timeline *timeline,
+ struct i915_request *rq)
+{
+ GEM_BUG_ON(timeline->fence_context == rq->timeline->fence_context);
+ i915_gem_active_set(&timeline->barrier, rq);
+}
+
#endif
diff --git a/drivers/gpu/drm/i915/selftests/mock_timeline.c
b/drivers/gpu/drm/i915/selftests/mock_timeline.c
index dcf3b16f5a07..a718b64c988e 100644
--- a/drivers/gpu/drm/i915/selftests/mock_timeline.c
+++ b/drivers/gpu/drm/i915/selftests/mock_timeline.c
@@ -19,6 +19,8 @@ void mock_timeline_init(struct i915_timeline *timeline, u64
context)
i915_syncmap_init(&timeline->sync);
+ init_request_active(&timeline->barrier, NULL);
+
INIT_LIST_HEAD(&timeline->link);
}
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 2/4] tests/gem_ctx_sseu: Dynamic (sub)slice programming tests
From: Lionel Landwerlin
Verify that the per-context dynamic SSEU uAPI works as expected.
v2: Add subslice tests (Lionel)
Use MI_SET_PREDICATE for further verification when available (Lionel)
v3: Rename to gem_ctx_rpcs (Lionel)
v4: Update kernel API (Lionel)
Add 0 value test (Lionel)
Exercise invalid values (Lionel)
v5: Add perf tests (Lionel)
v6: Add new sysfs entry tests (Lionel)
v7: Test rsvd fields
Update for kernel series changes
v8: Drop test_no_sseu_support() test (Kelvin)
Drop drm_intel_*() apis (Chris)
v9: by Chris:
Drop all do_ioctl/do_ioctl_err()
Use gem_context_[gs]et_param()
Use gem_read() instead of mapping memory
by Lionel:
Test dynamic sseu on/off more
Tvrtko Ursulin:
v10:
* Various style tweaks and refactorings.
* New test coverage.
v11:
* Change platform support to just Gen11.
* Simplify availability test. (Chris Wilson)
* More invalid pointer tests. (Chris Wilson)
v12:
* Fix MAP_FIXED use (doh!).
* Fix get/set copy&paste errors.
* Drop supported platform test. (Chris Wilson)
* Add mmap__gtt test. (Chris Wilson)
v13:
* Commit message tweaks.
* Added reset/hang/suspend tests. (Chris Wilson)
* Assert spinner is busy. (Chris Wilson)
* Remove some more ABI assumptions. (Chris Wilson)
v14:
* Use default resume time. (Chris Wilson)
* Trigger hang after rpcs read batch has been submitted. (Chris Wilson)
v15:
* Adjust for uAPI restrictions.
v16:
* Build system changes.
v17:
* Remove all subtests which read the RPCS register. (Joonas Lahtinen)
v18:
* Tidy curly braces. (Joonas Lahtinen)
v19:
* Check flags/rsvd MBZ.
Signed-off-by: Lionel Landwerlin
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson # v14
Reviewed-by: Joonas Lahtinen
---
tests/Makefile.am | 1 +
tests/Makefile.sources | 3 +
tests/i915/gem_ctx_param.c | 4 +-
tests/i915/gem_ctx_sseu.c | 541 +
tests/meson.build | 8 +
5 files changed, 556 insertions(+), 1 deletion(-)
create mode 100644 tests/i915/gem_ctx_sseu.c
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 48d77535b6bd..42463bde7f30 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -111,6 +111,7 @@ gem_close_race_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_close_race_LDADD = $(LDADD) -lpthread
gem_ctx_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_ctx_thrash_LDADD = $(LDADD) -lpthread
+gem_ctx_sseu_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
gem_exec_capture_LDADD = $(LDADD) -lz
gem_exec_parallel_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_exec_parallel_LDADD = $(LDADD) -lpthread
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index eedde1e817cb..3dfeb5b67274 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -161,6 +161,9 @@ gem_ctx_isolation_SOURCES = i915/gem_ctx_isolation.c
TESTS_progs += gem_ctx_param
gem_ctx_param_SOURCES = i915/gem_ctx_param.c
+TESTS_progs += gem_ctx_sseu
+gem_ctx_sseu_SOURCES = i915/gem_ctx_sseu.c
+
TESTS_progs += gem_ctx_switch
gem_ctx_switch_SOURCES = i915/gem_ctx_switch.c
diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
index 0bbc5effbf9f..acc1e6297750 100644
--- a/tests/i915/gem_ctx_param.c
+++ b/tests/i915/gem_ctx_param.c
@@ -294,11 +294,13 @@ igt_main
set_priority(fd);
}
+ /* I915_CONTEXT_PARAM_SSEU tests are located in gem_ctx_sseu.c */
+
/* NOTE: This testcase intentionally tests for the next free parameter
* to catch ABI extensions. Don't "fix" this testcase without adding all
* the tests for the new param first.
*/
- arg.param = I915_CONTEXT_PARAM_PRIORITY + 1;
+ arg.param = I915_CONTEXT_PARAM_SSEU + 1;
igt_subtest("invalid-param-get") {
arg.ctx_id = ctx;
diff --git a/tests/i915/gem_ctx_sseu.c b/tests/i915/gem_ctx_sseu.c
new file mode 100644
index ..52600a928693
--- /dev/null
+++ b/tests/i915/gem_ctx_sseu.c
@@ -0,0 +1,541 @@
+/*
+ * Copyright © 2017-2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR A
[Intel-gfx] [PATCH i-g-t 1/4] headers: bump
From: Tvrtko Ursulin
Sync with latest drm headers from drm-tip.
Acked-by: Chris Wilson
---
include/drm-uapi/drm_fourcc.h | 2 +-
include/drm-uapi/drm_mode.h | 19
include/drm-uapi/i915_drm.h | 43 +++
include/drm-uapi/msm_drm.h| 25 +++-
include/drm-uapi/v3d_drm.h| 33 +++
5 files changed, 115 insertions(+), 7 deletions(-)
diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h
index 4ddf754bab09..0b44260a5ee9 100644
--- a/include/drm-uapi/drm_fourcc.h
+++ b/include/drm-uapi/drm_fourcc.h
@@ -151,7 +151,7 @@ extern "C" {
#define DRM_FORMAT_VYUYfourcc_code('V', 'Y', 'U', 'Y') /*
[31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUVfourcc_code('A', 'Y', 'U', 'V') /*
[31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
-#define DRM_FORMAT_XYUVfourcc_code('X', 'Y', 'U', 'V') /* [31:0]
X:Y:Cb:Cr 8:8:8:8 little endian */
+#define DRM_FORMAT_XYUVfourcc_code('X', 'Y', 'U', 'V') /*
[31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
/*
* packed YCbCr420 2x2 tiled formats
diff --git a/include/drm-uapi/drm_mode.h b/include/drm-uapi/drm_mode.h
index d3e0fe31efc5..a439c2e67896 100644
--- a/include/drm-uapi/drm_mode.h
+++ b/include/drm-uapi/drm_mode.h
@@ -888,6 +888,25 @@ struct drm_mode_revoke_lease {
__u32 lessee_id;
};
+/**
+ * struct drm_mode_rect - Two dimensional rectangle.
+ * @x1: Horizontal starting coordinate (inclusive).
+ * @y1: Vertical starting coordinate (inclusive).
+ * @x2: Horizontal ending coordinate (exclusive).
+ * @y2: Vertical ending coordinate (exclusive).
+ *
+ * With drm subsystem using struct drm_rect to manage rectangular area this
+ * export it to user-space.
+ *
+ * Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS.
+ */
+struct drm_mode_rect {
+ __s32 x1;
+ __s32 y1;
+ __s32 x2;
+ __s32 y2;
+};
+
#if defined(__cplusplus)
}
#endif
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index e39b26d4bb3d..bc658583a2b1 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -1486,9 +1486,52 @@ struct drm_i915_gem_context_param {
#define I915_CONTEXT_MAX_USER_PRIORITY 1023 /* inclusive */
#define I915_CONTEXT_DEFAULT_PRIORITY0
#define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */
+ /*
+* When using the following param, value should be a pointer to
+* drm_i915_gem_context_param_sseu.
+*/
+#define I915_CONTEXT_PARAM_SSEU0x7
__u64 value;
};
+struct drm_i915_gem_context_param_sseu {
+ /*
+* Engine class & instance to be configured or queried.
+*/
+ __u16 class;
+ __u16 instance;
+
+ /*
+* Unused for now. Must be cleared to zero.
+*/
+ __u32 flags;
+
+ /*
+* Mask of slices to enable for the context. Valid values are a subset
+* of the bitmask value returned for I915_PARAM_SLICE_MASK.
+*/
+ __u64 slice_mask;
+
+ /*
+* Mask of subslices to enable for the context. Valid values are a
+* subset of the bitmask value return by I915_PARAM_SUBSLICE_MASK.
+*/
+ __u64 subslice_mask;
+
+ /*
+* Minimum/Maximum number of EUs to enable per subslice for the
+* context. min_eus_per_subslice must be inferior or equal to
+* max_eus_per_subslice.
+*/
+ __u16 min_eus_per_subslice;
+ __u16 max_eus_per_subslice;
+
+ /*
+* Unused for now. Must be cleared to zero.
+*/
+ __u32 rsvd;
+};
+
enum drm_i915_oa_format {
I915_OA_FORMAT_A13 = 1, /* HSW only */
I915_OA_FORMAT_A29, /* HSW only */
diff --git a/include/drm-uapi/msm_drm.h b/include/drm-uapi/msm_drm.h
index c06d0a5bdd80..91a16b333c69 100644
--- a/include/drm-uapi/msm_drm.h
+++ b/include/drm-uapi/msm_drm.h
@@ -105,14 +105,24 @@ struct drm_msm_gem_new {
__u32 handle; /* out */
};
-#define MSM_INFO_IOVA 0x01
-
-#define MSM_INFO_FLAGS (MSM_INFO_IOVA)
+/* Get or set GEM buffer info. The requested value can be passed
+ * directly in 'value', or for data larger than 64b 'value' is a
+ * pointer to userspace buffer, with 'len' specifying the number of
+ * bytes copied into that buffer. For info returned by pointer,
+ * calling the GEM_INFO ioctl with null 'value' will return the
+ * required buffer size in 'len'
+ */
+#define MSM_INFO_GET_OFFSET0x00 /* get mmap() offset, returned by value
*/
+#define MSM_INFO_GET_IOVA 0x01 /* get iova, returned by value */
+#define MSM_INFO_SET_NAME 0x02 /* set the debug name (by pointer) */
+#define MSM_INFO_GET_NAME 0x03 /* get debug name, returned by pointer */
struct drm_msm_gem_info {
__u32 handle; /* in */
- __u32 flags; /* in - combination of MSM
[Intel-gfx] [PATCH 6/6] drm/i915/selftests: Context SSEU reconfiguration tests
From: Tvrtko Ursulin
Exercise the context image reconfiguration logic for idle and busy
contexts, with the resets thrown into the mix as well.
Free from the uAPI restrictions this test runs on all Gen9+ platforms
with slice power gating.
v2:
* Rename some helpers for clarity.
* Include subtest names in error logs.
* Remove unnecessary function export.
v3:
* Rebase for RUNTIME_INFO.
v4:
* Fix incomplete unexport from v2. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_gem_context.c | 31 +-
.../gpu/drm/i915/selftests/i915_gem_context.c | 481 ++
2 files changed, 502 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 1ab7d6980c36..c395141e26b5 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -1043,23 +1043,19 @@ gen8_modify_rpcs_gpu(struct intel_context *ce,
}
static int
-i915_gem_context_reconfigure_sseu(struct i915_gem_context *ctx,
- struct intel_engine_cs *engine,
- struct intel_sseu sseu)
+__i915_gem_context_reconfigure_sseu(struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+ struct intel_sseu sseu)
{
struct intel_context *ce = to_intel_context(ctx, engine);
- int ret;
+ int ret = 0;
GEM_BUG_ON(INTEL_GEN(ctx->i915) < 8);
GEM_BUG_ON(engine->id != RCS);
- ret = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex);
- if (ret)
- return ret;
-
/* Nothing to do if unmodified. */
if (!memcmp(&ce->sseu, &sseu, sizeof(sseu)))
- goto out;
+ return 0;
/*
* If context is not idle we have to submit an ordered request to modify
@@ -1072,7 +1068,22 @@ i915_gem_context_reconfigure_sseu(struct
i915_gem_context *ctx,
if (!ret)
ce->sseu = sseu;
-out:
+ return ret;
+}
+
+static int
+i915_gem_context_reconfigure_sseu(struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+ struct intel_sseu sseu)
+{
+ int ret;
+
+ ret = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex);
+ if (ret)
+ return ret;
+
+ ret = __i915_gem_context_reconfigure_sseu(ctx, engine, sseu);
+
mutex_unlock(&ctx->i915->drm.struct_mutex);
return ret;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index d00cdf3c2939..c940381e2c66 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
@@ -27,6 +27,8 @@
#include "../i915_selftest.h"
#include "i915_random.h"
#include "igt_flush_test.h"
+#include "igt_reset.h"
+#include "igt_spinner.h"
#include "mock_drm.h"
#include "mock_gem_device.h"
@@ -650,6 +652,484 @@ static int igt_ctx_exec(void *arg)
return err;
}
+static struct i915_vma *rpcs_query_batch(struct i915_vma *vma)
+{
+ struct drm_i915_gem_object *obj;
+ u32 *cmd;
+ int err;
+
+ if (INTEL_GEN(vma->vm->i915) < 8)
+ return ERR_PTR(-EINVAL);
+
+ obj = i915_gem_object_create_internal(vma->vm->i915, PAGE_SIZE);
+ if (IS_ERR(obj))
+ return ERR_CAST(obj);
+
+ cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ if (IS_ERR(cmd)) {
+ err = PTR_ERR(cmd);
+ goto err;
+ }
+
+ *cmd++ = MI_STORE_REGISTER_MEM_GEN8;
+ *cmd++ = i915_mmio_reg_offset(GEN8_R_PWR_CLK_STATE);
+ *cmd++ = lower_32_bits(vma->node.start);
+ *cmd++ = upper_32_bits(vma->node.start);
+ *cmd = MI_BATCH_BUFFER_END;
+
+ i915_gem_object_unpin_map(obj);
+
+ err = i915_gem_object_set_to_gtt_domain(obj, false);
+ if (err)
+ goto err;
+
+ vma = i915_vma_instance(obj, vma->vm, NULL);
+ if (IS_ERR(vma)) {
+ err = PTR_ERR(vma);
+ goto err;
+ }
+
+ err = i915_vma_pin(vma, 0, 0, PIN_USER);
+ if (err)
+ goto err;
+
+ return vma;
+
+err:
+ i915_gem_object_put(obj);
+ return ERR_PTR(err);
+}
+
+static int
+emit_rpcs_query(struct drm_i915_gem_object *obj,
+ struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+ struct i915_request **rq_out)
+{
+ struct i915_address_space *vm;
+ struct i915_request *rq;
+ struct i915_vma *batch;
+ struct i915_vma *vma;
+ int err;
+
+ GEM_BUG_ON(!ctx->ppgtt);
+ GEM_BUG_ON(!intel_engine_can_store_dword(engine));
+
+ vm = &ctx->ppgtt->vm;
+
+ vma = i915_vma_instance(obj, vm, NULL);
+ if
[Intel-gfx] [PATCH i-g-t 0/4] Per context dynamic (sub)slice power-gating
From: Tvrtko Ursulin New in this version: * Final tweaks based on review feedback. Lionel Landwerlin (1): tests/gem_ctx_sseu: Dynamic (sub)slice programming tests Tony Ye (2): tests/gem_media_vme: Simple test to exercise the VME block tests/gem_media_vme: Shut down half of subslices to avoid gpu hang on ICL Tvrtko Ursulin (1): headers: bump include/drm-uapi/drm_fourcc.h | 2 +- include/drm-uapi/drm_mode.h | 19 + include/drm-uapi/i915_drm.h | 43 ++ include/drm-uapi/msm_drm.h | 25 +- include/drm-uapi/v3d_drm.h | 33 ++ lib/gpu_cmds.c | 148 ++ lib/gpu_cmds.h | 23 +- lib/i915/shaders/media/README_media_vme.txt | 65 +++ lib/i915/shaders/media/media_vme.gxa| 51 ++ lib/intel_batchbuffer.c | 9 + lib/intel_batchbuffer.h | 7 + lib/media_fill.c| 110 lib/media_fill.h| 6 + lib/surfaceformat.h | 2 + tests/Makefile.am | 1 + tests/Makefile.sources | 6 + tests/i915/gem_ctx_param.c | 4 +- tests/i915/gem_ctx_sseu.c | 541 tests/i915/gem_media_vme.c | 177 +++ tests/meson.build | 9 + 20 files changed, 1271 insertions(+), 10 deletions(-) create mode 100755 lib/i915/shaders/media/README_media_vme.txt create mode 100755 lib/i915/shaders/media/media_vme.gxa create mode 100644 tests/i915/gem_ctx_sseu.c create mode 100644 tests/i915/gem_media_vme.c -- 2.19.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 3/4] tests/gem_media_vme: Simple test to exercise the VME block
From: Tony Ye
Simple test which exercises the VME fixed function block.
v2: (Tvrtko Ursulin)
* Small cleanups like copyright date, tabs, remove unused bits.
v3: (Tony Ye)
* Added curbe data entry for dst surface.
* Read the dst surface after the VME kernel being executed.
v4: (Tony Ye)
* Added the media_vme.gxa kernel source code and compile instructions.
v5: (Tvrtko Ursulin)
* Added hang detector.
v6: (Tvrtko Ursulin)
* Replace gem_read with gem_sync. (Chris Wilson)
Signed-off-by: Tony Ye
Signed-off-by: Tvrtko Ursulin
Cc: Tony Ye
Reviewed-by: Joonas Lahtinen
---
lib/gpu_cmds.c | 136
lib/gpu_cmds.h | 20 ++-
lib/i915/shaders/media/README_media_vme.txt | 65 ++
lib/i915/shaders/media/media_vme.gxa| 51
lib/intel_batchbuffer.c | 9 ++
lib/intel_batchbuffer.h | 7 +
lib/media_fill.c| 110
lib/media_fill.h| 6 +
lib/surfaceformat.h | 2 +
tests/Makefile.sources | 3 +
tests/i915/gem_media_vme.c | 117 +
tests/meson.build | 1 +
12 files changed, 525 insertions(+), 2 deletions(-)
create mode 100755 lib/i915/shaders/media/README_media_vme.txt
create mode 100755 lib/i915/shaders/media/media_vme.gxa
create mode 100644 tests/i915/gem_media_vme.c
diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c
index 556a94c6f0b6..b490a63bdfef 100644
--- a/lib/gpu_cmds.c
+++ b/lib/gpu_cmds.c
@@ -52,6 +52,22 @@ gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
return offset;
}
+uint32_t
+gen11_fill_curbe_buffer_data(struct intel_batchbuffer *batch)
+{
+ uint32_t *curbe_buffer;
+ uint32_t offset;
+
+ curbe_buffer = intel_batchbuffer_subdata_alloc(batch,
+ sizeof(uint32_t) * 8,
+ 64);
+ offset = intel_batchbuffer_subdata_offset(batch, curbe_buffer);
+ *curbe_buffer++ = 0;
+ *curbe_buffer = 1;
+
+ return offset;
+}
+
uint32_t
gen7_fill_surface_state(struct intel_batchbuffer *batch,
const struct igt_buf *buf,
@@ -119,6 +135,26 @@ gen7_fill_binding_table(struct intel_batchbuffer *batch,
return offset;
}
+uint32_t
+gen11_fill_binding_table(struct intel_batchbuffer *batch,
+ const struct igt_buf *src,const struct igt_buf *dst)
+{
+ uint32_t *binding_table, offset;
+
+ binding_table = intel_batchbuffer_subdata_alloc(batch, 64, 64);
+ offset = intel_batchbuffer_subdata_offset(batch, binding_table);
+ binding_table[0] = gen11_fill_surface_state(batch, src,
+
SURFACE_1D,SURFACEFORMAT_R32G32B32A32_FLOAT,
+ 0,0,
+ 0);
+ binding_table[1] = gen11_fill_surface_state(batch, dst,
+ SURFACE_BUFFER,
SURFACEFORMAT_RAW,
+ 1,1,
+ 1);
+
+ return offset;
+}
+
uint32_t
gen7_fill_kernel(struct intel_batchbuffer *batch,
const uint32_t kernel[][4],
@@ -384,6 +420,71 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
return offset;
}
+uint32_t
+gen11_fill_surface_state(struct intel_batchbuffer *batch,
+ const struct igt_buf *buf,
+ uint32_t surface_type,
+ uint32_t format,
+ uint32_t vertical_alignment,
+ uint32_t horizontal_alignment,
+ int is_dst)
+{
+ struct gen8_surface_state *ss;
+ uint32_t write_domain, read_domain, offset;
+ int ret;
+
+ if (is_dst) {
+ write_domain = read_domain = I915_GEM_DOMAIN_RENDER;
+ } else {
+ write_domain = 0;
+ read_domain = I915_GEM_DOMAIN_SAMPLER;
+ }
+
+ ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 64);
+ offset = intel_batchbuffer_subdata_offset(batch, ss);
+
+ ss->ss0.surface_type = surface_type;
+ ss->ss0.surface_format = format;
+ ss->ss0.render_cache_read_write = 1;
+ ss->ss0.vertical_alignment = vertical_alignment; /* align 4 */
+ ss->ss0.horizontal_alignment = horizontal_alignment; /* align 4 */
+
+ if (buf->tiling == I915_TILING_X)
+ ss->ss0.tiled_mode = 2;
+ else if (buf->tiling == I915_TILING_Y)
+ ss->ss0.tiled_mode = 3;
+ else
+ ss->ss0.tiled_mode = 0;
+
+ ss->ss8.base_addr = buf->bo->offset;
+
+ ret = drm_intel_bo_emit_reloc(batch->bo,
+
[Intel-gfx] [PATCH 1/6] drm/i915/execlists: Move RPCS setup to context pin
From: Tvrtko Ursulin
Configuring RPCS in context image just before pin is sufficient and will
come extra handy in one of the following patches.
v2:
* Split image setup a bit differently. (Chris Wilson)
v3:
* Update context image after reset as well - otherwise the application
of pinned default state clears the RPCS.
v4:
* Use local variable throughout the function. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Suggested-by: Chris Wilson
Cc: Chris Wilson
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_lrc.c | 45
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 6c98fb7cebf2..229d620cf157 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1170,6 +1170,24 @@ static int __context_pin(struct i915_gem_context *ctx,
struct i915_vma *vma)
return i915_vma_pin(vma, 0, 0, flags);
}
+static u32 make_rpcs(struct drm_i915_private *dev_priv);
+
+static void
+__execlists_update_reg_state(struct intel_engine_cs *engine,
+struct intel_context *ce)
+{
+ u32 *regs = ce->lrc_reg_state;
+ struct intel_ring *ring = ce->ring;
+
+ regs[CTX_RING_BUFFER_START + 1] = i915_ggtt_offset(ring->vma);
+ regs[CTX_RING_HEAD + 1] = ring->head;
+ regs[CTX_RING_TAIL + 1] = ring->tail;
+
+ /* RPCS */
+ if (engine->class == RENDER_CLASS)
+ regs[CTX_R_PWR_CLK_STATE + 1] = make_rpcs(engine->i915);
+}
+
static struct intel_context *
__execlists_context_pin(struct intel_engine_cs *engine,
struct i915_gem_context *ctx,
@@ -1208,10 +1226,8 @@ __execlists_context_pin(struct intel_engine_cs *engine,
GEM_BUG_ON(!intel_ring_offset_valid(ce->ring, ce->ring->head));
ce->lrc_reg_state = vaddr + LRC_STATE_PN * PAGE_SIZE;
- ce->lrc_reg_state[CTX_RING_BUFFER_START+1] =
- i915_ggtt_offset(ce->ring->vma);
- ce->lrc_reg_state[CTX_RING_HEAD + 1] = ce->ring->head;
- ce->lrc_reg_state[CTX_RING_TAIL + 1] = ce->ring->tail;
+
+ __execlists_update_reg_state(engine, ce);
ce->state->obj->pin_global++;
i915_gem_context_get(ctx);
@@ -1835,14 +1851,14 @@ static void execlists_reset(struct intel_engine_cs
*engine,
engine->pinned_default_state + LRC_STATE_PN * PAGE_SIZE,
engine->context_size - PAGE_SIZE);
}
- execlists_init_reg_state(regs,
-request->gem_context, engine, request->ring);
/* Move the RING_HEAD onto the breadcrumb, past the hanging batch */
- regs[CTX_RING_BUFFER_START + 1] = i915_ggtt_offset(request->ring->vma);
-
request->ring->head = intel_ring_wrap(request->ring, request->postfix);
- regs[CTX_RING_HEAD + 1] = request->ring->head;
+
+ execlists_init_reg_state(regs, request->gem_context, engine,
+request->ring);
+
+ __execlists_update_reg_state(engine, request->hw_context);
intel_ring_update_space(request->ring);
@@ -2534,8 +2550,7 @@ static void execlists_init_reg_state(u32 *regs,
if (rcs) {
regs[CTX_LRI_HEADER_2] = MI_LOAD_REGISTER_IMM(1);
- CTX_REG(regs, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE,
- make_rpcs(dev_priv));
+ CTX_REG(regs, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE, 0);
i915_oa_init_reg_state(engine, ctx, regs);
}
@@ -2696,12 +2711,8 @@ void intel_lr_context_resume(struct drm_i915_private
*i915)
intel_ring_reset(ce->ring, 0);
- if (ce->pin_count) { /* otherwise done in context_pin */
- u32 *regs = ce->lrc_reg_state;
-
- regs[CTX_RING_HEAD + 1] = ce->ring->head;
- regs[CTX_RING_TAIL + 1] = ce->ring->tail;
- }
+ if (ce->pin_count) /* otherwise done in context_pin */
+ __execlists_update_reg_state(engine, ce);
}
}
}
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 0/6] Per context dynamic (sub)slice power-gating
From: Tvrtko Ursulin Changes since last version: * Squashed OA interaction patches into a single patch. * Small tidy in selftest. Lionel Landwerlin (2): drm/i915: Record the sseu configuration per-context & engine drm/i915/perf: lock powergating configuration to default when active Tvrtko Ursulin (4): drm/i915/execlists: Move RPCS setup to context pin drm/i915: Add timeline barrier support drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) drm/i915/selftests: Context SSEU reconfiguration tests drivers/gpu/drm/i915/i915_drv.h | 14 + drivers/gpu/drm/i915/i915_gem_context.c | 354 - drivers/gpu/drm/i915/i915_gem_context.h | 10 + drivers/gpu/drm/i915/i915_perf.c | 13 +- drivers/gpu/drm/i915/i915_request.c | 13 + drivers/gpu/drm/i915/i915_request.h | 10 + drivers/gpu/drm/i915/i915_timeline.c | 3 + drivers/gpu/drm/i915/i915_timeline.h | 27 + drivers/gpu/drm/i915/intel_lrc.c | 100 ++-- drivers/gpu/drm/i915/intel_lrc.h | 2 + .../gpu/drm/i915/selftests/i915_gem_context.c | 481 ++ .../gpu/drm/i915/selftests/mock_timeline.c| 2 + include/uapi/drm/i915_drm.h | 43 ++ 13 files changed, 1035 insertions(+), 37 deletions(-) -- 2.19.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/6] drm/i915/perf: lock powergating configuration to default when active
From: Lionel Landwerlin
If some of the contexts submitting workloads to the GPU have been
configured to shutdown slices/subslices, we might loose the NOA
configurations written in the NOA muxes.
One possible solution to this problem is to reprogram the NOA muxes
when we switch to a new context. We initially tried this in the
workaround batchbuffer but some concerns where raised about the cost
of reprogramming at every context switch. This solution is also not
without consequences from the userspace point of view. Reprogramming
of the muxes can only happen once the powergating configuration has
changed (which happens after context switch). This means for a window
of time during the recording, counters recorded by the OA unit might
be invalid. This requires userspace dealing with OA reports to discard
the invalid values.
Minimizing the reprogramming could be implemented by tracking of the
last programmed configuration somewhere in GGTT and use MI_PREDICATE
to discard some of the programming commands, but the command streamer
would still have to parse all the MI_LRI instructions in the
workaround batchbuffer.
Another solution, which this change implements, is to simply disregard
the user requested configuration for the period of time when i915/perf
is active.
On most platforms there are no issues with this apart from a performance
penality for some media workloads that benefit from running on a partially
powergated GPU. We already prevent RC6 from affecting the programming so
it doesn't sound completely unreasonable to hold on powergating for the
same reason.
On Icelake however there would a functional problem if the slices not-
containing the VME block were left enabled with a running media workload
which explicitly disabled them. To avoid a GPU hang in this case, on
Icelake we lock the enablement to only slices which contain VME blocks.
Downside is that it means degraded GPU performance when OA is active but
there is no known alternative solution for this.
v2: Leave RPCS programming in intel_lrc.c (Lionel)
v3: Update for s/union intel_sseu/struct intel_sseu/ (Lionel)
More to_intel_context() (Tvrtko)
s/dev_priv/i915/ (Tvrtko)
Tvrtko Ursulin:
v4:
* Rebase for make_rpcs changes.
v5:
* Apply OA restriction from make_rpcs directly.
v6:
* Rebase for context image setup changes.
v7:
* Move stream assignment before metric enable.
v8-9:
* Rebase.
v10:
* Squashed with ICL support patch.
Bspec: 21140
Co-Developed-by: Tvrtko Ursulin
Signed-off-by: Lionel Landwerlin
Signed-off-by: Tvrtko Ursulin
Cc: Lionel Landwerlin
Reviewed-by: Chris Wilson # v9
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_perf.c | 13 ++---
drivers/gpu/drm/i915/intel_lrc.c | 46
drivers/gpu/drm/i915/intel_lrc.h | 2 ++
3 files changed, 46 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 5b1ae5ed97b3..67e3fc12e84c 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1677,6 +1677,11 @@ static void gen8_update_reg_state_unlocked(struct
i915_gem_context *ctx,
CTX_REG(reg_state, state_offset, flex_regs[i], value);
}
+
+ CTX_REG(reg_state, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE,
+ gen8_make_rpcs(dev_priv,
+ &to_intel_context(ctx,
+dev_priv->engine[RCS])->sseu));
}
/*
@@ -2098,21 +2103,21 @@ static int i915_oa_stream_init(struct i915_perf_stream
*stream,
if (ret)
goto err_lock;
+ stream->ops = &i915_oa_stream_ops;
+ dev_priv->perf.oa.exclusive_stream = stream;
+
ret = dev_priv->perf.oa.ops.enable_metric_set(stream);
if (ret) {
DRM_DEBUG("Unable to enable metric set\n");
goto err_enable;
}
- stream->ops = &i915_oa_stream_ops;
-
- dev_priv->perf.oa.exclusive_stream = stream;
-
mutex_unlock(&dev_priv->drm.struct_mutex);
return 0;
err_enable:
+ dev_priv->perf.oa.exclusive_stream = NULL;
dev_priv->perf.oa.ops.disable_metric_set(dev_priv);
mutex_unlock(&dev_priv->drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 6df792bc5067..bca09a497f27 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1170,9 +1170,6 @@ static int __context_pin(struct i915_gem_context *ctx,
struct i915_vma *vma)
return i915_vma_pin(vma, 0, 0, flags);
}
-static u32
-make_rpcs(struct drm_i915_private *i915, struct intel_sseu *ctx_sseu);
-
static void
__execlists_update_reg_state(struct intel_engine_cs *engine,
struct intel_context *ce)
@@ -1186,8 +1183,8 @@ __execlists_update_reg_state(struct intel_engine_cs
*engine,
/* RPCS */
if (engine->class == RENDER_CLASS)
-
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Downgrade scare message for unknwown HuC firmware (rev4)
== Series Details == Series: drm/i915: Downgrade scare message for unknwown HuC firmware (rev4) URL : https://patchwork.freedesktop.org/series/54868/ State : warning == Summary == $ dim checkpatch origin/drm-tip 010a74bc116c drm/i915: Downgrade scare message for unknown HuC firmware -:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #10: <6> [310.769452] i915 :00:02.0: GuC: No firmware known for this platform! total: 0 errors, 1 warnings, 0 checks, 39 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gvt: give the cmd parser decode_info a const treatment
== Series Details ==
Series: series starting with [1/2] drm/i915/gvt: give the cmd parser
decode_info a const treatment
URL : https://patchwork.freedesktop.org/series/54884/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5378 -> Patchwork_11252
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/54884/revisions/1/
Known issues
Here are the changes found in Patchwork_11252 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@cs-compute:
- fi-kbl-8809g: NOTRUN -> FAIL [fdo#108094]
* igt@amdgpu/amd_prime@amd-to-i915:
- fi-kbl-8809g: NOTRUN -> FAIL [fdo#107341]
* igt@pm_rpm@basic-rte:
- fi-bsw-kefka: NOTRUN -> FAIL [fdo#108800]
Possible fixes
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: DMESG-WARN [fdo#108965] -> PASS
* igt@gem_exec_suspend@basic-s4-devices:
- fi-bsw-kefka: DMESG-WARN -> PASS
- fi-blb-e6850: INCOMPLETE [fdo#107718] -> PASS
* igt@i915_selftest@live_hangcheck:
- fi-apl-guc: DMESG-FAIL [fdo#109228] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-byt-clapper: FAIL [fdo#103167] -> PASS
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-byt-clapper: INCOMPLETE [fdo#102657] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102657]: https://bugs.freedesktop.org/show_bug.cgi?id=102657
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107341]: https://bugs.freedesktop.org/show_bug.cgi?id=107341
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108094]: https://bugs.freedesktop.org/show_bug.cgi?id=108094
[fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
[fdo#109228]: https://bugs.freedesktop.org/show_bug.cgi?id=109228
[fdo#109241]: https://bugs.freedesktop.org/show_bug.cgi?id=109241
Participating hosts (48 -> 45)
--
Additional (1): fi-icl-y
Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-glk-j4005
Build changes
-
* Linux: CI_DRM_5378 -> Patchwork_11252
CI_DRM_5378: 96b07848e43c024bd6a5a44970371c4866140a1c @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4756: 75081c6bfb9998bd7cbf35a7ac0578c683fe55a8 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11252: d503188b902114a32b55fe95da80799a34eed062 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d503188b9021 drm/i915/gvt: give the cmd parser cmd_info a const treatment
52fd4ad1e302 drm/i915/gvt: give the cmd parser decode_info a const treatment
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11252/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4] drm/i915: Downgrade scare message for unknown HuC firmware
If we haven't shipped and enabled firmware for a particular platform,
there is nothing the user can do about it. Don't scare the user with an
unactionable, unidentifiable warning!
<6> [310.769452] i915 :00:02.0: GuC: No firmware known for this platform!
<4> [310.769458] [drm] HuC: No firmware known for this platform!
Unify both GuC/HuC messages to include the device for which we lack the
firmware, and provide the platform name as an aide-memoire.
v2: Move and refine the message to common site of intel_uc_fw_fetch.
Signed-off-by: Chris Wilson
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/intel_guc_fw.c | 4
drivers/gpu/drm/i915/intel_huc_fw.c | 3 ---
drivers/gpu/drm/i915/intel_uc_fw.c | 11 ---
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
b/drivers/gpu/drm/i915/intel_guc_fw.c
index 4b437e05e2cd..13ff7003c6be 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -77,10 +77,6 @@ static void guc_fw_select(struct intel_uc_fw *guc_fw)
guc_fw->path = I915_KBL_GUC_UCODE;
guc_fw->major_ver_wanted = KBL_FW_MAJOR;
guc_fw->minor_ver_wanted = KBL_FW_MINOR;
- } else {
- dev_info(dev_priv->drm.dev,
-"%s: No firmware known for this platform!\n",
-intel_uc_fw_type_repr(guc_fw->type));
}
}
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu/drm/i915/intel_huc_fw.c
index 9612227b3c44..7d7bfc7f7ca7 100644
--- a/drivers/gpu/drm/i915/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/intel_huc_fw.c
@@ -76,9 +76,6 @@ static void huc_fw_select(struct intel_uc_fw *huc_fw)
huc_fw->path = I915_KBL_HUC_UCODE;
huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR;
huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR;
- } else {
- DRM_WARN("%s: No firmware known for this platform!\n",
-intel_uc_fw_type_repr(huc_fw->type));
}
}
diff --git a/drivers/gpu/drm/i915/intel_uc_fw.c
b/drivers/gpu/drm/i915/intel_uc_fw.c
index fd496416087c..becf05ebae4d 100644
--- a/drivers/gpu/drm/i915/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/intel_uc_fw.c
@@ -46,12 +46,17 @@ void intel_uc_fw_fetch(struct drm_i915_private *dev_priv,
size_t size;
int err;
+ if (!uc_fw->path) {
+ dev_info(dev_priv->drm.dev,
+"%s: No firmware was defined for %s!\n",
+intel_uc_fw_type_repr(uc_fw->type),
+intel_platform_name(INTEL_INFO(dev_priv)->platform));
+ return;
+ }
+
DRM_DEBUG_DRIVER("%s fw fetch %s\n",
intel_uc_fw_type_repr(uc_fw->type), uc_fw->path);
- if (!uc_fw->path)
- return;
-
uc_fw->fetch_status = INTEL_UC_FIRMWARE_PENDING;
DRM_DEBUG_DRIVER("%s fw fetch %s\n",
intel_uc_fw_type_repr(uc_fw->type),
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Downgrade scare message for unknwown HuC firmware
== Series Details == Series: drm/i915: Downgrade scare message for unknwown HuC firmware URL : https://patchwork.freedesktop.org/series/54868/ State : success == Summary == CI Bug Log - changes from CI_DRM_5374_full -> Patchwork_11209_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11209_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s3: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-skl: NOTRUN -> TIMEOUT [fdo#108039] * igt@gem_userptr_blits@readonly-unsync: - shard-skl: NOTRUN -> TIMEOUT [fdo#108887] * igt@kms_atomic_transition@1x-modeset-transitions: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108470] * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +4 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +4 * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_chv_cursor_fail@pipe-b-128x128-top-edge: - shard-skl: NOTRUN -> FAIL [fdo#104671] * igt@kms_color@pipe-b-legacy-gamma: - shard-apl: PASS -> FAIL [fdo#104782] * igt@kms_cursor_crc@cursor-128x128-random: - shard-iclb: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-128x42-onscreen: - shard-glk: PASS -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-128x42-sliding: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x85-random: - shard-glk: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-64x21-offscreen: - shard-skl: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic: - shard-glk: PASS -> FAIL [fdo#106509] / [fdo#107409] * igt@kms_draw_crc@draw-method-rgb565-render-xtiled: - shard-skl: NOTRUN -> FAIL [fdo#103184] * igt@kms_fbcon_fbt@psr-suspend: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_frontbuffer_tracking@fbcpsr-stridechange: - shard-skl: NOTRUN -> FAIL [fdo#105683] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite: - shard-iclb: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc: - shard-skl: NOTRUN -> FAIL [fdo#103167] +3 * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-skl: NOTRUN -> FAIL [fdo#103191] / [fdo#107362] * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +2 * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-glk: PASS -> FAIL [fdo#108948] * igt@kms_plane@plane-panning-top-left-pipe-a-planes: - shard-skl: NOTRUN -> FAIL [fdo#103166] * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb: - shard-skl: NOTRUN -> FAIL [fdo#108145] +4 * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-skl: NOTRUN -> FAIL [fdo#103166] / [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_setmode@basic: - shard-skl: NOTRUN -> FAIL [fdo#99912] - shard-hsw: PASS -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@pm_backlight@fade_with_suspend: - shard-skl: NOTRUN -> FAIL [fdo#107847] * igt@pm_rpm@modeset-lpsp-stress-no-wait: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] Possible fixes * igt@kms_atomic_transition@plane-all-transition-fencing: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#109225] -> PASS * igt@kms_busy@extended-modeset-hang-oldfb-render-c: - shard-glk: INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: - shard-iclb: DMESG-WARN [fdo#107956] -> PASS * igt@kms_color@pipe-b-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS +1 * igt@kms_concurrent@pipe-b: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +15 * igt@kms_cursor_crc@cursor-256x85-onscreen: - shard-apl: FAIL [f
Re: [Intel-gfx] [PATCH 5/7] drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)
Quoting Tvrtko Ursulin (2019-01-08 14:35:45)
>
> On 08/01/2019 14:22, Joonas Lahtinen wrote:
> > Quoting Tvrtko Ursulin (2019-01-08 13:22:50)
> >> +++ b/include/uapi/drm/i915_drm.h
> >> @@ -1486,9 +1486,52 @@ struct drm_i915_gem_context_param {
> >> #define I915_CONTEXT_MAX_USER_PRIORITY 1023 /* inclusive */
> >> #define I915_CONTEXT_DEFAULT_PRIORITY0
> >> #define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */
> >> + /*
> >> +* When using the following param, value should be a pointer to
> >> +* drm_i915_gem_context_param_sseu.
> >> +*/
> >> +#define I915_CONTEXT_PARAM_SSEU0x7
> >> __u64 value;
> >> };
> >
> > Maybe we should amend some comments?
> >
> > /*
> > * NOTE: Can currently only be used to switch between VME enabled
> > * slice configuration vs. full on Icelake (Gen11)
> > *
> > * NOTE: Slice configuration requests are ignored when perf is enabled.
> > */
>
> At first I thought a good idea but on second thought do we want to put
> such implementation details into uapi headers? Second note maybe, but
> first I have a feeling is best left out since headers and kernel are not
> strictly tied up in deployment. Don't know, third opinion from Chris?
If it affects uAPI, then document it in the headers. I would say that
OA/i915_perf overriding the values specified by the user deserves the
strong mention. The current set of accepted values, not so strong but we
should say what happens as a result of PARAM_SSEU. Something along the
lines of it setting the RPCS register for the subslice configuration as
specified (bonus points for layman terms of what that entails in usage).
"Acceptable values are:"
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t 3/4] tests/gem_media_vme: Simple test to exercise the VME block
Quoting Tvrtko Ursulin (2019-01-08 13:24:49) > From: Tony Ye > > Simple test which exercises the VME fixed function block. > > v2: (Tvrtko Ursulin) > * Small cleanups like copyright date, tabs, remove unused bits. > > v3: (Tony Ye) > * Added curbe data entry for dst surface. > * Read the dst surface after the VME kernel being executed. > > v4: (Tony Ye) > * Added the media_vme.gxa kernel source code and compile instructions. > > v5: (Tvrtko Ursulin) > * Added hang detector. > > Signed-off-by: Tony Ye > Signed-off-by: Tvrtko Ursulin > Cc: Tony Ye One could further improve this by checking some effect of the shader kernel on the output surface, just to double check that it both executed and didn't hang as suggested by Chris Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 4/4] tests/gem_media_vme: Shut down half of subslices to avoid gpu hang on ICL
Quoting Tvrtko Ursulin (2019-01-08 13:24:50)
> From: Tony Ye
>
> On Icelake we need to turn off subslices not containing the VME block or
> the VME kernel will hang.
>
> v2: (Tvrtko Ursulin)
> * Remove libdrm usage for setting context param.
> * Cleanup bitmask operation.
> * Only apply the workaround for ICL.
>
> v3: (Tvrtko Ursulin)
> * Added hang detector. (Chris Wilson)
>
> v4: (Tvrtko Ursulin)
> * Rebase for hang detector moved to previous patch.
> * Tidy curly braces.
>
> Signed-off-by: Tony Ye
> Signed-off-by: Tvrtko Ursulin
> Cc: Tony Ye
> ---
> lib/gpu_cmds.c | 12
> lib/gpu_cmds.h | 3 ++
> lib/media_fill.c | 2 +-
> tests/i915/gem_media_vme.c | 60 ++
> 4 files changed, 76 insertions(+), 1 deletion(-)
>
> diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c
> index b490a63bdfef..8d270ee86229 100644
> --- a/lib/gpu_cmds.c
> +++ b/lib/gpu_cmds.c
> @@ -36,6 +36,18 @@ gen7_render_flush(struct intel_batchbuffer *batch,
> uint32_t batch_end)
> igt_assert(ret == 0);
> }
>
> +void
> +gen7_render_context_flush(struct intel_batchbuffer *batch, uint32_t
> batch_end)
> +{
> + int ret;
> +
> + ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
> + if (ret == 0)
> + ret = drm_intel_gem_bo_context_exec(batch->bo, batch->ctx,
> + batch_end, 0);
> + igt_assert(ret == 0);
> +}
> +
> uint32_t
> gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
> uint8_t color)
> diff --git a/lib/gpu_cmds.h b/lib/gpu_cmds.h
> index ca671fb52daf..1321af446161 100644
> --- a/lib/gpu_cmds.h
> +++ b/lib/gpu_cmds.h
> @@ -40,6 +40,9 @@
> void
> gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
>
> +void
> +gen7_render_context_flush(struct intel_batchbuffer *batch, uint32_t
> batch_end);
> +
> uint32_t
> gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
> uint8_t color);
> diff --git a/lib/media_fill.c b/lib/media_fill.c
> index b1e84727394a..03b5e71e101b 100644
> --- a/lib/media_fill.c
> +++ b/lib/media_fill.c
> @@ -338,7 +338,7 @@ __gen11_media_vme_func(struct intel_batchbuffer *batch,
> batch_end = intel_batchbuffer_align(batch, 8);
> assert(batch_end < BATCH_STATE_SPLIT);
>
> - gen7_render_flush(batch, batch_end);
> + gen7_render_context_flush(batch, batch_end);
> intel_batchbuffer_reset(batch);
> }
Above hunks could be in the previous patch, too?
> +static void shut_non_vme_subslices(int drm_fd, uint32_t ctx)
> +{
> + struct drm_i915_gem_context_param_sseu sseu = { };
> + struct drm_i915_gem_context_param arg = {
> + .param = I915_CONTEXT_PARAM_SSEU,
> + .ctx_id = ctx,
> + .size = sizeof(sseu),
> + .value = to_user_pointer(&sseu),
> + };
> + int ret;
> +
> + if (__gem_context_get_param(drm_fd, &arg))
> + return; /* no sseu support */
I guess we could fail at this point already, but maybe there will be a
surprise ICL stepping to prove me wrong :)
> +
> + ret = __gem_context_set_param(drm_fd, &arg);
> + igt_assert(ret == 0 || ret == -ENODEV || ret == -EINVAL);
> + if (ret)
> + return; /* no sseu support */
> +
> + /* shutdown half subslices*/
space before */
With the hunk moved or not.
Reviewed-by: Joonas Lahtinen
Regards, Joonas
> + sseu.subslice_mask =
> + switch_off_n_bits(sseu.subslice_mask,
> + __builtin_popcount(sseu.subslice_mask) / 2);
> +
> + gem_context_set_param(drm_fd, &arg);
> +}
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
