[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Move the PIPEMISC write the correct place
== Series Details == Series: series starting with [1/2] drm/i915: Move the PIPEMISC write the correct place URL : https://patchwork.freedesktop.org/series/60233/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031_full -> Patchwork_12951_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12951_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_eio@reset-stress: - shard-skl: [PASS][1] -> [FAIL][2] ([fdo#105957]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-skl2/igt@gem_...@reset-stress.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-skl4/igt@gem_...@reset-stress.html * igt@i915_pm_rpm@i2c: - shard-iclb: [PASS][3] -> [FAIL][4] ([fdo#104097]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-iclb3/igt@i915_pm_...@i2c.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-iclb8/igt@i915_pm_...@i2c.html * igt@i915_pm_rpm@pm-tiling: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#107807] / [fdo#110581]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-skl7/igt@i915_pm_...@pm-tiling.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-skl5/igt@i915_pm_...@pm-tiling.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: [PASS][7] -> [FAIL][8] ([fdo#105363]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-glk3/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-glk1/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite: - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-iclb7/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-indfb-draw-pwrite.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-iclb5/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-indfb-draw-pwrite.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#104108] / [fdo#110581]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-skl8/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-skl10/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-skl: [PASS][13] -> [INCOMPLETE][14] ([fdo#104108] / [fdo#107773] / [fdo#110581]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-skl5/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-c-planes.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-skl4/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-c-planes.html - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-apl3/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-c-planes.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-apl6/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-c-planes.html * igt@kms_psr@psr2_sprite_mmap_gtt: - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-iclb5/igt@kms_psr@psr2_sprite_mmap_gtt.html * igt@perf_pmu@init-busy-bcs0: - shard-apl: [PASS][19] -> [INCOMPLETE][20] ([fdo#103927] / [fdo#110581]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-apl4/igt@perf_...@init-busy-bcs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-apl7/igt@perf_...@init-busy-bcs0.html * igt@perf_pmu@rc6: - shard-kbl: [PASS][21] -> [SKIP][22] ([fdo#109271]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-kbl3/igt@perf_...@rc6.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-kbl2/igt@perf_...@rc6.html Possible fixes * igt@gem_tiled_swapping@non-threaded: - shard-hsw: [DMESG-WARN][23] ([fdo#108686]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/shard-hsw5/igt@gem_tiled_swapp...@non-threaded.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/shard-hsw1/igt@gem_tiled_swapp...@non-threaded.html * igt@i915_suspend@sysfs-reader: - shard-apl:
[Intel-gfx] [drm-tip:drm-tip 4/9] htmldocs: drivers/gpu/drm/scheduler/sched_main.c:364: warning: Function parameter or member 'bad' not described in 'drm_sched_stop'
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: 6f67b24f2fc7b90a94e4163ae4cd01bc2783fbfd commit: fb4f0930305e60c480c86c0e2ba9bc8683179bd9 [4/9] Merge remote-tracking branch 'origin/drm-misc-next' into drm-tip reproduce: make htmldocs If you fix the issue, kindly add following tag Reported-by: kbuild test robot All warnings (new ones prefixed by >>): WARNING: convert(1) not found, for SVG to PDF conversion install ImageMagick (https://www.imagemagick.org) include/linux/generic-radix-tree.h:1: warning: no structured comments found kernel/rcu/tree_plugin.h:1: warning: no structured comments found kernel/rcu/tree_plugin.h:1: warning: no structured comments found include/linux/firmware/intel/stratix10-svc-client.h:1: warning: no structured comments found include/linux/gpio/driver.h:371: warning: Function parameter or member 'init_valid_mask' not described in 'gpio_chip' include/linux/i2c.h:343: warning: Function parameter or member 'init_irq' not described in 'i2c_client' include/linux/iio/hw-consumer.h:1: warning: no structured comments found include/linux/input/sparse-keymap.h:46: warning: Function parameter or member 'sw' not described in 'key_entry' include/linux/regulator/machine.h:199: warning: Function parameter or member 'max_uV_step' not described in 'regulation_constraints' include/linux/regulator/driver.h:228: warning: Function parameter or member 'resume' not described in 'regulator_ops' drivers/slimbus/stream.c:1: warning: no structured comments found include/linux/spi/spi.h:188: warning: Function parameter or member 'driver_override' not described in 'spi_device' drivers/target/target_core_device.c:1: warning: no structured comments found drivers/usb/typec/bus.c:1: warning: no structured comments found drivers/usb/typec/class.c:1: warning: no structured comments found include/linux/w1.h:281: warning: Function parameter or member 'of_match_table' not described in 'w1_family' fs/direct-io.c:257: warning: Excess function parameter 'offset' description in 'dio_complete' fs/file_table.c:1: warning: no structured comments found fs/libfs.c:477: warning: Excess function parameter 'available' description in 'simple_write_end' fs/posix_acl.c:646: warning: Function parameter or member 'inode' not described in 'posix_acl_update_mode' fs/posix_acl.c:646: warning: Function parameter or member 'mode_p' not described in 'posix_acl_update_mode' fs/posix_acl.c:646: warning: Function parameter or member 'acl' not described in 'posix_acl_update_mode' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:294: warning: Excess function parameter 'mm' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:294: warning: Excess function parameter 'start' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:294: warning: Excess function parameter 'end' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:343: warning: Excess function parameter 'mm' description in 'amdgpu_mn_invalidate_range_end' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:343: warning: Excess function parameter 'start' description in 'amdgpu_mn_invalidate_range_end' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:343: warning: Excess function parameter 'end' description in 'amdgpu_mn_invalidate_range_end' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:183: warning: Function parameter or member 'blockable' not described in 'amdgpu_mn_read_lock' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:295: warning: Function parameter or member 'range' not described in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:295: warning: Excess function parameter 'mm' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:295: warning: Excess function parameter 'start' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:295: warning: Excess function parameter 'end' description in 'amdgpu_mn_invalidate_range_start_hsa' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:344: warning: Function parameter or member 'range' not described in 'amdgpu_mn_invalidate_range_end' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:344: warning: Excess function parameter 'mm' description in 'amdgpu_mn_invalidate_range_end' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:344: warning: Excess function parameter 'start' description in 'amdgpu_mn_invalidate_range_end' drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c:344: warning: Excess function parameter 'end' description in 'amdgpu_mn_invalidate_range_end' drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:347: warning: cannot understand function prototype: 'struct amdgpu_vm_pt_cursor ' drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:348: warning: cannot understand function prototype: 'struct amdgpu_vm_pt_cursor '
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings
== Series Details == Series: series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings URL : https://patchwork.freedesktop.org/series/60218/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12949_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12949_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_pm_rpm@dpms-lpsp: - shard-skl: [PASS][1] -> [INCOMPLETE][2] ([fdo#107807] / [fdo#110581]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl2/igt@i915_pm_...@dpms-lpsp.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-skl7/igt@i915_pm_...@dpms-lpsp.html * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-snb: [PASS][3] -> [SKIP][4] ([fdo#109271]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-snb4/igt@kms_cursor_...@cursor-128x128-onscreen.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-snb4/igt@kms_cursor_...@cursor-128x128-onscreen.html * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108] / [fdo#110581]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl2/igt@kms_cursor_...@cursor-128x128-suspend.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-skl8/igt@kms_cursor_...@cursor-128x128-suspend.html * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-glk: [PASS][7] -> [FAIL][8] ([fdo#105363]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk2/igt@kms_f...@2x-flip-vs-expired-vblank.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-glk7/igt@kms_f...@2x-flip-vs-expired-vblank.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw: - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) +6 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb4/igt@kms_frontbuffer_track...@fbcpsr-1p-pri-indfb-multidraw.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-iclb1/igt@kms_frontbuffer_track...@fbcpsr-1p-pri-indfb-multidraw.html * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-glk: [PASS][11] -> [SKIP][12] ([fdo#109271]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk9/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-glk3/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl5/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-a-planes.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-apl4/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-a-planes.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#108145]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl10/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-skl5/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +3 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-iclb5/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@kms_setmode@basic: - shard-kbl: [PASS][19] -> [FAIL][20] ([fdo#99912]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-kbl3/igt@kms_setm...@basic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-kbl2/igt@kms_setm...@basic.html * igt@kms_sysfs_edid_timing: - shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#100047]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb4/igt@kms_sysfs_edid_timing.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/shard-iclb2/igt@kms_sysfs_edid_timing.html Possible fixes * igt@gem_workarounds@suspend-resume-context: - shard-apl: [DMESG-WARN][23] ([fdo#108566]) -> [PASS][24] +7 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl8/igt@gem_workarou...@suspend-resume-context.html [24]:
Re: [Intel-gfx] [PATCH] RFC: hung_task: taint kernel
On 2019/05/03 5:46, Daniel Vetter wrote: > There's the hung_task_panic sysctl, but that's a bit an extreme measure. > As a fallback taint at least the machine. > > Our CI uses this to decide when a reboot is necessary, plus to figure > out whether the kernel is still happy. Why your CI can't watch for "blocked for more than" message instead of setting the taint flag? How does your CI decide a reboot is necessary? There is no need to set the tainted flag when some task was just blocked for a while. It might be due to memory pressure, it might be due to setting very short timeout (e.g. a few seconds), it might be due to busy CPUs doing something else... ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add support for asynchronous display power disabling
== Series Details == Series: drm/i915: Add support for asynchronous display power disabling URL : https://patchwork.freedesktop.org/series/60242/ State : success == Summary == CI Bug Log - changes from CI_DRM_6032 -> Patchwork_12955 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60242/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12955 that come from known issues: ### IGT changes ### Possible fixes * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [FAIL][1] ([fdo#108511]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6032/fi-skl-6770hq/igt@i915_pm_...@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12955/fi-skl-6770hq/igt@i915_pm_...@module-reload.html [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 Participating hosts (49 -> 43) -- Additional (2): fi-bxt-dsi fi-icl-dsi Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6032 -> Patchwork_12955 CI_DRM_6032: 6ad93073ac75c314e859cfe1020b569d0c63ccf5 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12955: ba990253d5d8234db983bd54d29ed627c9a613c8 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == ba990253d5d8 drm/i915: Assert that TypeC ports are not used for eDP 08ce0f3433d1 drm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV e597618a7634 drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain 5ed3bacef970 drm/i915: Remove the unneeded AUX power ref from intel_dp_hpd_pulse() 032d4c40cffe drm/i915: Remove the unneeded AUX power ref from intel_dp_detect() 46a227a6cb90 drm/i915: WARN for eDP encoders in intel_dp_detect_dpcd() 5973f78ce699 drm/i915: Disable power asynchronously during DP AUX transfers e96c9522db7b drm/i915: Add support for asynchronous display power disabling 105dea8ad0dc drm/i915: Verify power domains state during suspend in all cases 51d597ed4135 drm/i915: Add support for tracking wakerefs w/o power-on guarantee == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12955/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers (rev2)
== Series Details == Series: drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers (rev2) URL : https://patchwork.freedesktop.org/series/60195/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12948_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12948_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_pm_rpm@dpms-lpsp: - shard-skl: [PASS][1] -> [INCOMPLETE][2] ([fdo#107807] / [fdo#110581]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl2/igt@i915_pm_...@dpms-lpsp.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-skl9/igt@i915_pm_...@dpms-lpsp.html * igt@i915_suspend@fence-restore-untiled: - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl2/igt@i915_susp...@fence-restore-untiled.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-apl7/igt@i915_susp...@fence-restore-untiled.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: [PASS][5] -> [FAIL][6] ([fdo#103167]) +5 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb6/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-blt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-iclb2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-glk: [PASS][7] -> [SKIP][8] ([fdo#109271]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk9/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-glk1/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: [PASS][9] -> [FAIL][10] ([fdo#108145]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl10/igt@kms_plane_alpha_bl...@pipe-b-constant-alpha-min.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-skl3/igt@kms_plane_alpha_bl...@pipe-b-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103166]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-y.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-y.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109441]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@kms_setmode@basic: - shard-kbl: [PASS][15] -> [FAIL][16] ([fdo#99912]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-kbl3/igt@kms_setm...@basic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-kbl6/igt@kms_setm...@basic.html Possible fixes * igt@gem_workarounds@suspend-resume-context: - shard-apl: [DMESG-WARN][17] ([fdo#108566]) -> [PASS][18] +9 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl8/igt@gem_workarou...@suspend-resume-context.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-apl5/igt@gem_workarou...@suspend-resume-context.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions: - shard-hsw: [FAIL][19] ([fdo#103355]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-hsw6/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-hsw7/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions.html * igt@kms_draw_crc@draw-method-xrgb-render-xtiled: - shard-skl: [FAIL][21] ([fdo#103184] / [fdo#103232]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl4/igt@kms_draw_...@draw-method-xrgb-render-xtiled.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/shard-skl8/igt@kms_draw_...@draw-method-xrgb-render-xtiled.html * igt@kms_flip@2x-flip-vs-suspend-interruptible: - shard-glk: [INCOMPLETE][23] ([fdo#103359] / [fdo#110581] / [k.org#198133]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk4/igt@kms_f...@2x-flip-vs-suspend-interruptible.html [24]:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add support for asynchronous display power disabling
== Series Details == Series: drm/i915: Add support for asynchronous display power disabling URL : https://patchwork.freedesktop.org/series/60242/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Add support for tracking wakerefs w/o power-on guarantee -drivers/gpu/drm/i915/selftests/../i915_drv.h:3448:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3449:16: warning: expression using sizeof(void) Commit: drm/i915: Verify power domains state during suspend in all cases Okay! Commit: drm/i915: Add support for asynchronous display power disabling -drivers/gpu/drm/i915/selftests/../i915_drv.h:3449:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3454:16: warning: expression using sizeof(void) Commit: drm/i915: Disable power asynchronously during DP AUX transfers Okay! Commit: drm/i915: WARN for eDP encoders in intel_dp_detect_dpcd() Okay! Commit: drm/i915: Remove the unneeded AUX power ref from intel_dp_detect() Okay! Commit: drm/i915: Remove the unneeded AUX power ref from intel_dp_hpd_pulse() Okay! Commit: drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain Okay! Commit: drm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV Okay! Commit: drm/i915: Assert that TypeC ports are not used for eDP Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for asynchronous display power disabling
== Series Details ==
Series: drm/i915: Add support for asynchronous display power disabling
URL : https://patchwork.freedesktop.org/series/60242/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
51d597ed4135 drm/i915: Add support for tracking wakerefs w/o power-on guarantee
105dea8ad0dc drm/i915: Verify power domains state during suspend in all cases
e96c9522db7b drm/i915: Add support for asynchronous display power disabling
5973f78ce699 drm/i915: Disable power asynchronously during DP AUX transfers
46a227a6cb90 drm/i915: WARN for eDP encoders in intel_dp_detect_dpcd()
032d4c40cffe drm/i915: Remove the unneeded AUX power ref from intel_dp_detect()
5ed3bacef970 drm/i915: Remove the unneeded AUX power ref from
intel_dp_hpd_pulse()
-:12: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 1c767b339b39 ("drm/i915: take
display port power domain in DP HPD handler")'
#12:
commit 1c767b339b3938b19076ffdc9d70aa1e4235a45b
-:21: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 7d23e3c37bb3 ("drm/i915:
Cleaning up intel_dp_hpd_pulse")'
#21:
commit 7d23e3c37bb3fc6952dc84007ee60cb533fd2d5c
total: 2 errors, 0 warnings, 0 checks, 68 lines checked
e597618a7634 drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain
08ce0f3433d1 drm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV
ba990253d5d8 drm/i915: Assert that TypeC ports are not used for eDP
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: the great header refactoring, part three
== Series Details == Series: drm/i915: the great header refactoring, part three URL : https://patchwork.freedesktop.org/series/60215/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12947_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12947_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_pm_backlight@fade_with_suspend: - shard-iclb: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#107820] / [fdo#110581]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb4/igt@i915_pm_backlight@fade_with_suspend.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-iclb1/igt@i915_pm_backlight@fade_with_suspend.html * igt@i915_pm_rpm@pm-tiling: - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#107807] / [fdo#110581]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl8/igt@i915_pm_...@pm-tiling.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-skl8/igt@i915_pm_...@pm-tiling.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [PASS][5] -> [FAIL][6] ([fdo#104873]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk5/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-glk9/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html * igt@kms_flip@2x-flip-vs-suspend-interruptible: - shard-hsw: [PASS][7] -> [INCOMPLETE][8] ([fdo#103540] / [fdo#110581]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-hsw2/igt@kms_f...@2x-flip-vs-suspend-interruptible.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-hsw6/igt@kms_f...@2x-flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) +5 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb5/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-iclb2/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-glk: [PASS][11] -> [SKIP][12] ([fdo#109271]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk9/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-glk3/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl10/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-skl5/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109441]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@kms_setmode@basic: - shard-kbl: [PASS][17] -> [FAIL][18] ([fdo#99912]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-kbl3/igt@kms_setm...@basic.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-kbl7/igt@kms_setm...@basic.html * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl5/igt@kms_vbl...@pipe-c-ts-continuation-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-apl7/igt@kms_vbl...@pipe-c-ts-continuation-suspend.html Possible fixes * igt@i915_suspend@sysfs-reader: - shard-apl: [DMESG-WARN][21] ([fdo#108566]) -> [PASS][22] +6 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl6/igt@i915_susp...@sysfs-reader.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/shard-apl1/igt@i915_susp...@sysfs-reader.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions: - shard-hsw: [FAIL][23] ([fdo#103355]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-hsw6/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions.html [24]:
Re: [Intel-gfx] [PATCH] drm/i915/guc: Fix runtime suspend
On 5/2/19 1:30 PM, Chris Wilson wrote:
We are not allowed to rpm_get() inside the runtime-suspend callback, so
split the intel_uc_suspend() into the core that assumes the caller holds
the wakeref (intel_uc_runtime_suspend), and one acquires the wakeref as
necessary (intel_uc_suspend).
Reported-by: Daniele Ceraolo Spurio
Fixes: 79ffac8599c4 ("drm/i915: Invert the GEM wakeref hierarchy")
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
Reviewed-by: Daniele Ceraolo Spurio
And we now have a new failure to look at that we weren't seeing before
because the execution was cut short... :(
Daniele
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 25 +
drivers/gpu/drm/i915/intel_uc.h | 1 +
3 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 21dac5a09fbe..74e46d129e6c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2886,7 +2886,7 @@ static int intel_runtime_suspend(struct device *kdev)
*/
i915_gem_runtime_suspend(dev_priv);
- intel_uc_suspend(dev_priv);
+ intel_uc_runtime_suspend(dev_priv);
intel_runtime_pm_disable_interrupts(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 01ea36e3150c..1ee70df51627 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -481,22 +481,31 @@ void intel_uc_reset_prepare(struct drm_i915_private *i915)
intel_uc_sanitize(i915);
}
-void intel_uc_suspend(struct drm_i915_private *i915)
+void intel_uc_runtime_suspend(struct drm_i915_private *i915)
{
struct intel_guc *guc = >guc;
- intel_wakeref_t wakeref;
int err;
if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
return;
- with_intel_runtime_pm(i915, wakeref) {
- err = intel_guc_suspend(guc);
- if (err)
- DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
+ err = intel_guc_suspend(guc);
+ if (err)
+ DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
- guc_disable_communication(guc);
- }
+ guc_disable_communication(guc);
+}
+
+void intel_uc_suspend(struct drm_i915_private *i915)
+{
+ struct intel_guc *guc = >guc;
+ intel_wakeref_t wakeref;
+
+ if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
+ return;
+
+ with_intel_runtime_pm(i915, wakeref)
+ intel_uc_runtime_suspend(i915);
}
int intel_uc_resume(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index c92436b1f1c5..3ea06c87dfcd 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -40,6 +40,7 @@ int intel_uc_init(struct drm_i915_private *dev_priv);
void intel_uc_fini(struct drm_i915_private *dev_priv);
void intel_uc_reset_prepare(struct drm_i915_private *i915);
void intel_uc_suspend(struct drm_i915_private *i915);
+void intel_uc_runtime_suspend(struct drm_i915_private *i915);
int intel_uc_resume(struct drm_i915_private *dev_priv);
static inline bool intel_uc_is_using_guc(struct drm_i915_private *i915)
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: Refactor oa object to better manage resources (rev2)
== Series Details == Series: drm/i915/perf: Refactor oa object to better manage resources (rev2) URL : https://patchwork.freedesktop.org/series/60176/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031 -> Patchwork_12954 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60176/revisions/2/mbox/ Known issues Here are the changes found in Patchwork_12954 that come from known issues: ### IGT changes ### Possible fixes * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [FAIL][1] ([fdo#108511]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-skl-6770hq/igt@i915_pm_...@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12954/fi-skl-6770hq/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live_contexts: - fi-skl-gvtdvm: [DMESG-FAIL][3] ([fdo#110235]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12954/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 Participating hosts (48 -> 43) -- Additional (2): fi-blb-e6850 fi-icl-u3 Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6031 -> Patchwork_12954 CI_DRM_6031: 6f67b24f2fc7b90a94e4163ae4cd01bc2783fbfd @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12954: e5599fdc53eb2805c3155cdee904dd82859863d7 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == e5599fdc53eb drm/i915/perf: Refactor oa object to better manage resources == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12954/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] RFC: soft/hardlookup: taint kernel
On Thu, 2019-05-02 at 21:42 +0200, Daniel Vetter wrote:
> There's the soft/hardlookup_panic sysctls, but that's a bit an
> extreme
> measure. As a fallback taint at least the machine.
>
> Our CI uses this to decide when a reboot is necessary, plus to figure
> out whether the kernel is still happy.
>
> Signed-off-by: Daniel Vetter
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Peter Zijlstra
> Cc: Valdis Kletnieks
> Cc: Laurence Oberman
> Cc: Vincent Whitchurch
> Cc: Don Zickus
> Cc: Andrew Morton
> Cc: Sergey Senozhatsky
> Cc: Sinan Kaya
> Cc: Daniel Vetter
> ---
> kernel/watchdog.c | 2 ++
> kernel/watchdog_hld.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/kernel/watchdog.c b/kernel/watchdog.c
> index 6a5787233113..de7a60503517 100644
> --- a/kernel/watchdog.c
> +++ b/kernel/watchdog.c
> @@ -469,6 +469,8 @@ static enum hrtimer_restart
> watchdog_timer_fn(struct hrtimer *hrtimer)
> add_taint(TAINT_SOFTLOCKUP, LOCKDEP_STILL_OK);
> if (softlockup_panic)
> panic("softlockup: hung tasks");
> + else
> + add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
> __this_cpu_write(soft_watchdog_warn, true);
> } else
> __this_cpu_write(soft_watchdog_warn, false);
> diff --git a/kernel/watchdog_hld.c b/kernel/watchdog_hld.c
> index 247bf0b1582c..cce46cf75d76 100644
> --- a/kernel/watchdog_hld.c
> +++ b/kernel/watchdog_hld.c
> @@ -154,6 +154,8 @@ static void watchdog_overflow_callback(struct
> perf_event *event,
>
> if (hardlockup_panic)
> nmi_panic(regs, "Hard LOCKUP");
> + else
> + add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
>
> __this_cpu_write(hard_watchdog_warn, true);
> return;
This looks OK to me, could be useful to know we would have triggered
had the flags been set.
Reviewed-by: Laurence Oberman
___
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Intel-gfx@lists.freedesktop.org
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with RFC: hung_task: taint kernel (rev2)
== Series Details == Series: series starting with RFC: hung_task: taint kernel (rev2) URL : https://patchwork.freedesktop.org/series/60228/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031 -> Patchwork_12953 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60228/revisions/2/mbox/ Known issues Here are the changes found in Patchwork_12953 that come from known issues: ### IGT changes ### Possible fixes * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [FAIL][1] ([fdo#108511]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-skl-6770hq/igt@i915_pm_...@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12953/fi-skl-6770hq/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live_contexts: - fi-skl-gvtdvm: [DMESG-FAIL][3] ([fdo#110235]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12953/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 Participating hosts (48 -> 42) -- Additional (2): fi-blb-e6850 fi-icl-u3 Missing(8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-whl-u fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6031 -> Patchwork_12953 CI_DRM_6031: 6f67b24f2fc7b90a94e4163ae4cd01bc2783fbfd @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12953: 1b7921825c1b6d3e728f8551e6108d7efbb0dbd6 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 1b7921825c1b RFC: soft/hardlookup: taint kernel fb98bc124cb7 RFC: hung_task: taint kernel == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12953/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/perf: Refactor oa object to better manage resources (rev2)
== Series Details == Series: drm/i915/perf: Refactor oa object to better manage resources (rev2) URL : https://patchwork.freedesktop.org/series/60176/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/perf: Refactor oa object to better manage resources -O:drivers/gpu/drm/i915/i915_perf.c:1430:15: warning: memset with byte count of 16777216 -O:drivers/gpu/drm/i915/i915_perf.c:1488:15: warning: memset with byte count of 16777216 +drivers/gpu/drm/i915/i915_perf.c:1438:15: warning: memset with byte count of 16777216 +drivers/gpu/drm/i915/i915_perf.c:1497:15: warning: memset with byte count of 16777216 -drivers/gpu/drm/i915/selftests/../i915_drv.h:3448:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3443:16: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/execlists: Flush the tasklet on parking
== Series Details == Series: series starting with [1/2] drm/i915/execlists: Flush the tasklet on parking URL : https://patchwork.freedesktop.org/series/60216/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12946_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_12946_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_12946_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_12946_full: ### IGT changes ### Possible regressions * igt@gem_exec_capture@capture-vebox: - shard-kbl: [PASS][1] -> [DMESG-WARN][2] +23 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-kbl7/igt@gem_exec_capt...@capture-vebox.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl5/igt@gem_exec_capt...@capture-vebox.html * igt@gem_exec_schedule@preemptive-hang-bsd: - shard-skl: [PASS][3] -> [DMESG-WARN][4] +19 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl6/igt@gem_exec_sched...@preemptive-hang-bsd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-skl10/igt@gem_exec_sched...@preemptive-hang-bsd.html * igt@kms_flip@flip-vs-modeset-vs-hang: - shard-apl: [PASS][5] -> [DMESG-WARN][6] +17 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl5/igt@kms_f...@flip-vs-modeset-vs-hang.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-apl3/igt@kms_f...@flip-vs-modeset-vs-hang.html * igt@kms_vblank@pipe-a-wait-idle-hang: - shard-skl: NOTRUN -> [DMESG-WARN][7] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-skl9/igt@kms_vbl...@pipe-a-wait-idle-hang.html * igt@prime_busy@wait-hang-bsd: - shard-iclb: [PASS][8] -> [DMESG-WARN][9] +19 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb1/igt@prime_b...@wait-hang-bsd.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-iclb7/igt@prime_b...@wait-hang-bsd.html - shard-glk: [PASS][10] -> [DMESG-WARN][11] +13 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk7/igt@prime_b...@wait-hang-bsd.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-glk4/igt@prime_b...@wait-hang-bsd.html * igt@runner@aborted: - shard-kbl: NOTRUN -> ([FAIL][12], [FAIL][13], [FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17], [FAIL][18], [FAIL][19], [FAIL][20], [FAIL][21], [FAIL][22], [FAIL][23], [FAIL][24], [FAIL][25], [FAIL][26], [FAIL][27], [FAIL][28], [FAIL][29], [FAIL][30], [FAIL][31], [FAIL][32], [FAIL][33], [FAIL][34], [FAIL][35], [FAIL][36], [FAIL][37], [FAIL][38], [FAIL][39]) ([fdo#103841]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl4/igt@run...@aborted.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl6/igt@run...@aborted.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl3/igt@run...@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl4/igt@run...@aborted.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl6/igt@run...@aborted.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl6/igt@run...@aborted.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl4/igt@run...@aborted.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl7/igt@run...@aborted.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl6/igt@run...@aborted.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl4/igt@run...@aborted.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl7/igt@run...@aborted.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl5/igt@run...@aborted.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl6/igt@run...@aborted.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl3/igt@run...@aborted.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl5/igt@run...@aborted.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl7/igt@run...@aborted.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/shard-kbl5/igt@run...@aborted.html [29]:
[Intel-gfx] [PATCH 08/10] drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain
There isn't a separate power domain specific to PLLs. When programming
them we require the same power domain to be enabled which is needed when
accessing other display core parts (not specific to any
pipe/port/transcoder). This corresponds to the DISPLAY_CORE domain added
previously in this patchset, so use that instead to save bits in the
power domain mask.
Cc: Ville Syrjala
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_display.c| 2 +-
drivers/gpu/drm/i915/intel_display.h| 1 -
drivers/gpu/drm/i915/intel_dpll_mgr.c | 36 -
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 --
4 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index dd65d7c521c1..45c9d3e10c97 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6349,7 +6349,7 @@ static u64 get_crtc_power_domains(struct drm_crtc *crtc,
mask |= BIT_ULL(POWER_DOMAIN_AUDIO);
if (crtc_state->shared_dpll)
- mask |= BIT_ULL(POWER_DOMAIN_PLLS);
+ mask |= BIT_ULL(POWER_DOMAIN_DISPLAY_CORE);
return mask;
}
diff --git a/drivers/gpu/drm/i915/intel_display.h
b/drivers/gpu/drm/i915/intel_display.h
index fd62a6f40d22..e1324c3b2b52 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -249,7 +249,6 @@ enum intel_display_power_domain {
POWER_DOMAIN_PORT_OTHER,
POWER_DOMAIN_VGA,
POWER_DOMAIN_AUDIO,
- POWER_DOMAIN_PLLS,
POWER_DOMAIN_AUX_A,
POWER_DOMAIN_AUX_B,
POWER_DOMAIN_AUX_C,
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index dda5ddb49b34..0d029ffb8ce0 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -350,7 +350,7 @@ static bool ibx_pch_dpll_get_hw_state(struct
drm_i915_private *dev_priv,
u32 val;
wakeref = intel_display_power_get_if_enabled(dev_priv,
-POWER_DOMAIN_PLLS);
+POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -359,7 +359,7 @@ static bool ibx_pch_dpll_get_hw_state(struct
drm_i915_private *dev_priv,
hw_state->fp0 = I915_READ(PCH_FP0(id));
hw_state->fp1 = I915_READ(PCH_FP1(id));
- intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
+ intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return val & DPLL_VCO_ENABLE;
}
@@ -518,14 +518,14 @@ static bool hsw_ddi_wrpll_get_hw_state(struct
drm_i915_private *dev_priv,
u32 val;
wakeref = intel_display_power_get_if_enabled(dev_priv,
-POWER_DOMAIN_PLLS);
+POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
val = I915_READ(WRPLL_CTL(id));
hw_state->wrpll = val;
- intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
+ intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return val & WRPLL_PLL_ENABLE;
}
@@ -538,14 +538,14 @@ static bool hsw_ddi_spll_get_hw_state(struct
drm_i915_private *dev_priv,
u32 val;
wakeref = intel_display_power_get_if_enabled(dev_priv,
-POWER_DOMAIN_PLLS);
+POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
val = I915_READ(SPLL_CTL);
hw_state->spll = val;
- intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
+ intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return val & SPLL_PLL_ENABLE;
}
@@ -1003,7 +1003,7 @@ static bool skl_ddi_pll_get_hw_state(struct
drm_i915_private *dev_priv,
bool ret;
wakeref = intel_display_power_get_if_enabled(dev_priv,
-POWER_DOMAIN_PLLS);
+POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -1024,7 +1024,7 @@ static bool skl_ddi_pll_get_hw_state(struct
drm_i915_private *dev_priv,
ret = true;
out:
- intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS, wakeref);
+ intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return ret;
}
@@ -1040,7 +1040,7 @@ static bool skl_ddi_dpll0_get_hw_state(struct
drm_i915_private *dev_priv,
bool ret;
wakeref = intel_display_power_get_if_enabled(dev_priv,
-POWER_DOMAIN_PLLS);
+POWER_DOMAIN_DISPLAY_CORE);
if
[Intel-gfx] [PATCH 06/10] drm/i915: Remove the unneeded AUX power ref from intel_dp_detect()
We don't need the AUX power for the whole duration of the detect, only
when we're doing AUX transfers. The AUX transfer function takes its own
reference on the AUX power domain already. The two places during detect
which access display core registers (not specific to a
pipe/port/transcoder) only need the power domain that is required for
that access. That power domain is equivalent to the device global power
domain on most platforms (enabled whenever we hold a runtime PM
reference) except on CHV/VLV where it's equivalent to the display power
well.
Add a new power domain that reflects the above, and use this at the two
spots accessing registers. With that we can avoid taking the AUX
reference for the whole duration of the detect function.
Put the domains asynchronously to avoid the unneeded on-off-on toggling.
Cc: Ville Syrjala
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_display.h| 1 +
drivers/gpu/drm/i915/intel_dp.c | 32 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 4
3 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.h
b/drivers/gpu/drm/i915/intel_display.h
index 2220588e86ac..fd62a6f40d22 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -218,6 +218,7 @@ enum aux_ch {
#define aux_ch_name(a) ((a) + 'A')
enum intel_display_power_domain {
+ POWER_DOMAIN_DISPLAY_CORE,
POWER_DOMAIN_PIPE_A,
POWER_DOMAIN_PIPE_B,
POWER_DOMAIN_PIPE_C,
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1865286eacae..fee1f291aba8 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -214,15 +214,21 @@ static int intel_dp_get_fia_supported_lane_count(struct
intel_dp *intel_dp)
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
+ intel_wakeref_t wakeref;
u32 lane_info;
if (tc_port == PORT_TC_NONE || dig_port->tc_type != TC_PORT_TYPEC)
return 4;
+ wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
+
lane_info = (I915_READ(PORT_TX_DFLEXDPSP) &
DP_LANE_ASSIGNMENT_MASK(tc_port)) >>
DP_LANE_ASSIGNMENT_SHIFT(tc_port);
+ intel_display_power_put_async(dev_priv, POWER_DOMAIN_DISPLAY_CORE,
+ wakeref);
+
switch (lane_info) {
default:
MISSING_CASE(lane_info);
@@ -5292,7 +5298,7 @@ static bool icl_digital_port_connected(struct
intel_encoder *encoder)
*
* Return %true if port is connected, %false otherwise.
*/
-bool intel_digital_port_connected(struct intel_encoder *encoder)
+static bool __intel_digital_port_connected(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -5322,6 +5328,20 @@ bool intel_digital_port_connected(struct intel_encoder
*encoder)
return false;
}
+bool intel_digital_port_connected(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ intel_wakeref_t wakeref;
+ bool res;
+
+ wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
+ res = __intel_digital_port_connected(encoder);
+ intel_display_power_put_async(dev_priv, POWER_DOMAIN_DISPLAY_CORE,
+ wakeref);
+
+ return res;
+}
+
static struct edid *
intel_dp_get_edid(struct intel_dp *intel_dp)
{
@@ -5375,16 +5395,11 @@ intel_dp_detect(struct drm_connector *connector,
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct intel_encoder *encoder = _port->base;
enum drm_connector_status status;
- enum intel_display_power_domain aux_domain =
- intel_aux_power_domain(dig_port);
- intel_wakeref_t wakeref;
DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
connector->base.id, connector->name);
WARN_ON(!drm_modeset_is_locked(_priv->drm.mode_config.connection_mutex));
- wakeref = intel_display_power_get(dev_priv, aux_domain);
-
/* Can't disconnect eDP */
if (intel_dp_is_edp(intel_dp))
status = edp_detect(intel_dp);
@@ -5448,10 +5463,8 @@ intel_dp_detect(struct drm_connector *connector,
int ret;
ret = intel_dp_retrain_link(encoder, ctx);
- if (ret) {
- intel_display_power_put(dev_priv, aux_domain, wakeref);
+ if (ret)
return ret;
- }
}
/*
@@ -5473,7 +5486,6 @@ intel_dp_detect(struct drm_connector *connector,
if (status != connector_status_connected && !intel_dp->is_mst)
[Intel-gfx] [PATCH 03/10] drm/i915: Add support for asynchronous display power disabling
By disabling a power domain asynchronously we can restrict holding a
reference on that power domain to the actual code sequence that
requires the power to be on for the HW access it's doing, by also
avoiding unneeded on-off-on togglings of the power domain (since the
disabling happens with a delay).
One benefit is potential power saving if the delay is chosen properly.
In the case of the AUX power domain holding the reference on the domain
for the minimal amount of time at defined spots is also a requirement:
on ICL we need a stricter control of when either kind of AUX power
domain (TBT-alt or DP-alt) can be enabled and the locking we need for
that becomes problematic (due to dependencies on other locks) if we
allow the reference to be held for arbitrarily long periods/places in
the code.
I chose the disabling delay to be 100msec for now to avoid the unneeded
toggling (and so not to introduce dmesg spamming) in the DP MST sideband
signaling code. We could optimize this delay later.
Cc: Chris Wilson
Cc: Ville Syrjala
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_drv.h | 5 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 316 +++-
drivers/gpu/drm/i915/intel_runtime_pm.h | 4 +
3 files changed, 315 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9fb26634a6be..53a6b0da3571 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -839,6 +839,11 @@ struct i915_power_domains {
struct mutex lock;
int domain_use_count[POWER_DOMAIN_NUM];
+
+ struct delayed_work async_put_work;
+ intel_wakeref_t async_put_wakeref;
+ u64 async_put_domains[2];
+
struct i915_power_well *power_wells;
};
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index cc45cbcb43cb..bc0693e3614e 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1883,6 +1883,130 @@ static void chv_pipe_power_well_disable(struct
drm_i915_private *dev_priv,
chv_set_pipe_power_well(dev_priv, power_well, false);
}
+static intel_wakeref_t
+intel_runtime_pm_get_raw(struct drm_i915_private *i915);
+static void
+intel_runtime_pm_put_raw(struct drm_i915_private *i915, intel_wakeref_t wref);
+
+static u64 __async_put_domains_mask(struct i915_power_domains *power_domains)
+{
+ return power_domains->async_put_domains[0] |
+ power_domains->async_put_domains[1];
+}
+
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
+
+static bool
+assert_async_put_domain_masks_disjoint(struct i915_power_domains
*power_domains)
+{
+ return !WARN_ON(power_domains->async_put_domains[0] &
+ power_domains->async_put_domains[1]);
+}
+
+static bool
+__async_put_domains_state_ok(struct i915_power_domains *power_domains)
+{
+ enum intel_display_power_domain domain;
+ bool err = false;
+
+ err |= !assert_async_put_domain_masks_disjoint(power_domains);
+ err |= WARN_ON(!!power_domains->async_put_wakeref !=
+ !!__async_put_domains_mask(power_domains));
+
+ for_each_power_domain(domain, __async_put_domains_mask(power_domains))
+ err |= WARN_ON(power_domains->domain_use_count[domain] != 1);
+
+ return !err;
+}
+
+static void print_power_domains(struct i915_power_domains *power_domains,
+ const char *prefix, u64 mask)
+{
+ enum intel_display_power_domain domain;
+
+ DRM_DEBUG_DRIVER("%s (%lu):\n", prefix, hweight64(mask));
+ for_each_power_domain(domain, mask)
+ DRM_DEBUG_DRIVER("%s use_count %d\n",
+intel_display_power_domain_str(domain),
+power_domains->domain_use_count[domain]);
+}
+
+static void
+print_async_put_domains_state(struct i915_power_domains *power_domains)
+{
+ DRM_DEBUG_DRIVER("async_put_wakeref %u\n",
+power_domains->async_put_wakeref);
+
+ print_power_domains(power_domains, "async_put_domains[0]",
+ power_domains->async_put_domains[0]);
+ print_power_domains(power_domains, "async_put_domains[1]",
+ power_domains->async_put_domains[1]);
+}
+
+static void
+verify_async_put_domains_state(struct i915_power_domains *power_domains)
+{
+ if (!__async_put_domains_state_ok(power_domains))
+ print_async_put_domains_state(power_domains);
+}
+
+#else
+
+static void
+assert_async_put_domain_masks_disjoint(struct i915_power_domains
*power_domains)
+{
+}
+
+static void
+verify_async_put_domains_state(struct i915_power_domains *power_domains)
+{
+}
+
+#endif /* CONFIG_DRM_I915_DEBUG_RUNTIME_PM */
+
+static u64 async_put_domains_mask(struct i915_power_domains *power_domains)
+{
+ assert_async_put_domain_masks_disjoint(power_domains);
+
+ return
[Intel-gfx] [PATCH 10/10] drm/i915: Assert that TypeC ports are not used for eDP
Add an assert that we don't use TypeC ports for eDP. That may in theory
be possible on TypeC legacy ports, but I'm not sure if that's a
practical scenario, so let's deal with that only if there's a use case.
Adding support for that wouldn't be too difficult, since TypeC mode
switching is not possible on TypeC legacy ports.
Cc: Ville Syrjala
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_dp.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1ee9b7ebd801..f8b384cb04d6 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -7210,10 +7210,16 @@ intel_dp_init_connector(struct intel_digital_port
*intel_dig_port,
intel_dp->DP = I915_READ(intel_dp->output_reg);
intel_dp->attached_connector = intel_connector;
- if (intel_dp_is_port_edp(dev_priv, port))
+ if (intel_dp_is_port_edp(dev_priv, port)) {
+ /*
+* Currently we don't support eDP on TypeC ports, although in
+* theory it could work on TypeC legacy ports.
+*/
+ WARN_ON(intel_port_is_tc(dev_priv, port));
type = DRM_MODE_CONNECTOR_eDP;
- else
+ } else {
type = DRM_MODE_CONNECTOR_DisplayPort;
+ }
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
intel_dp->active_pipe = vlv_active_pipe(intel_dp);
--
2.17.1
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[Intel-gfx] [PATCH 02/10] drm/i915: Verify power domains state during suspend in all cases
There is no reason why we couldn't verify the power domains state during
suspend in all cases, so do that. I overlooked this when originally
adding the check.
Cc: Chris Wilson
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 4a7bfc945322..cc45cbcb43cb 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -4251,10 +4251,10 @@ void intel_power_domains_suspend(struct
drm_i915_private *i915,
* Even if power well support was disabled we still want to disable
* power wells if power domains must be deinitialized for suspend.
*/
- if (!i915_modparams.disable_power_well) {
+ if (!i915_modparams.disable_power_well)
intel_display_power_put_unchecked(i915, POWER_DOMAIN_INIT);
- intel_power_domains_verify_state(i915);
- }
+
+ intel_power_domains_verify_state(i915);
if (INTEL_GEN(i915) >= 11)
icl_display_core_uninit(i915);
--
2.17.1
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[Intel-gfx] [PATCH 05/10] drm/i915: WARN for eDP encoders in intel_dp_detect_dpcd()
We are not calling this function for eDP, so add an early assert about this for clarity. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/intel_dp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0475601c2f33..1865286eacae 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4842,15 +4842,15 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) u8 *dpcd = intel_dp->dpcd; u8 type; + if (WARN_ON(intel_dp_is_edp(intel_dp))) + return connector_status_connected; + if (lspcon->active) lspcon_resume(lspcon); if (!intel_dp_get_dpcd(intel_dp)) return connector_status_disconnected; - if (intel_dp_is_edp(intel_dp)) - return connector_status_connected; - /* if there's no downstream port, we're done */ if (!drm_dp_is_branch(dpcd)) return connector_status_connected; -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 07/10] drm/i915: Remove the unneeded AUX power ref from intel_dp_hpd_pulse()
The power get/put was added in
commit 1c767b339b3938b19076ffdc9d70aa1e4235a45b
Author: Imre Deak
Date: Mon Aug 18 14:42:42 2014 +0300
drm/i915: take display port power domain in DP HPD handle
to account for the HW access in ibx_digital_port_connected(). This
latter call was in turn removed in
commit 7d23e3c37bb3fc6952dc84007ee60cb533fd2d5c
Author: Shubhangi Shrivastava
Date: Wed Mar 30 18:05:23 2016 +0530
drm/i915: Cleaning up intel_dp_hpd_pulse
after which we didn't actually need the power reference.
One way we are accessing the HW during HPD pulse handling is via DP AUX
transfers, but the transfer function takes its own reference, so doesn't
need the reference in intel_dp_hpd_pulse().
The other spot is in the PSR code doing register access, for that we can
use the DISPLAY_CORE power domain in a similar way done in the previous
patch.
Cc: Ville Syrjala
Cc: Rodrigo Vivi
Cc: José Roberto de Souza
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_dp.c | 20
drivers/gpu/drm/i915/intel_psr.c | 6 ++
2 files changed, 10 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index fee1f291aba8..f56cbda59fb3 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6306,9 +6306,6 @@ enum irqreturn
intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
{
struct intel_dp *intel_dp = _dig_port->dp;
- struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- enum irqreturn ret = IRQ_NONE;
- intel_wakeref_t wakeref;
if (long_hpd && intel_dig_port->base.type == INTEL_OUTPUT_EDP) {
/*
@@ -6331,9 +6328,6 @@ intel_dp_hpd_pulse(struct intel_digital_port
*intel_dig_port, bool long_hpd)
return IRQ_NONE;
}
- wakeref = intel_display_power_get(dev_priv,
-
intel_aux_power_domain(intel_dig_port));
-
if (intel_dp->is_mst) {
if (intel_dp_check_mst_status(intel_dp) == -EINVAL) {
/*
@@ -6345,7 +6339,8 @@ intel_dp_hpd_pulse(struct intel_digital_port
*intel_dig_port, bool long_hpd)
intel_dp->is_mst = false;
drm_dp_mst_topology_mgr_set_mst(_dp->mst_mgr,
intel_dp->is_mst);
- goto put_power;
+
+ return IRQ_NONE;
}
}
@@ -6355,17 +6350,10 @@ intel_dp_hpd_pulse(struct intel_digital_port
*intel_dig_port, bool long_hpd)
handled = intel_dp_short_pulse(intel_dp);
if (!handled)
- goto put_power;
+ return IRQ_NONE;
}
- ret = IRQ_HANDLED;
-
-put_power:
- intel_display_power_put(dev_priv,
- intel_aux_power_domain(intel_dig_port),
- wakeref);
-
- return ret;
+ return IRQ_HANDLED;
}
/* check the VBT to see whether the eDP is on another port */
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 963663ba0edf..856a39c7ee77 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -1251,10 +1251,13 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
const u8 errors = DP_PSR_RFB_STORAGE_ERROR |
DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
DP_PSR_LINK_CRC_ERROR;
+ intel_wakeref_t wakeref;
if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp))
return;
+ wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
+
mutex_lock(>lock);
if (!psr->enabled || psr->dp != intel_dp)
@@ -1294,6 +1297,9 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
drm_dp_dpcd_writeb(_dp->aux, DP_PSR_ERROR_STATUS, val);
exit:
mutex_unlock(>lock);
+
+ intel_display_power_put_async(dev_priv, POWER_DOMAIN_DISPLAY_CORE,
+ wakeref);
}
bool intel_psr_enabled(struct intel_dp *intel_dp)
--
2.17.1
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[Intel-gfx] [PATCH 01/10] drm/i915: Add support for tracking wakerefs w/o power-on guarantee
It's useful to track runtime PM refs that don't guarantee a device
power-on state to the rest of the driver. One such case is holding a
reference that will be put asynchronously, during which normal users
without their own reference shouldn't access the HW. A follow-up patch
will add support for disabling display power domains asynchronously
which needs this.
For this we can track all references with a separate wakeref_track_count
and references guaranteeing a power-on state with the current
wakeref_count.
Follow-up patches will make use of the API added here, so add a
__used__ attribute quirk to keep git bisect working.
No functional changes.
Cc: Chris Wilson
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 121
2 files changed, 102 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9a634ba57ff9..9fb26634a6be 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1177,6 +1177,7 @@ struct skl_wm_params {
*/
struct i915_runtime_pm {
atomic_t wakeref_count;
+ atomic_t wakeref_track_count;
bool suspended;
bool irqs_enabled;
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 30e7cb9d5801..4a7bfc945322 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -59,6 +59,12 @@
* present for a given platform.
*/
+static void
+assert_raw_rpm_wakelock_held(struct drm_i915_private *i915)
+{
+ WARN_ON(!atomic_read(>runtime_pm.wakeref_track_count));
+}
+
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
#include
@@ -100,17 +106,18 @@ static void init_intel_runtime_pm_wakeref(struct
drm_i915_private *i915)
struct i915_runtime_pm *rpm = >runtime_pm;
spin_lock_init(>debug.lock);
+ atomic_set(>wakeref_track_count, 0);
}
static noinline depot_stack_handle_t
-track_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+track_intel_runtime_pm_wakeref_raw(struct drm_i915_private *i915)
{
struct i915_runtime_pm *rpm = >runtime_pm;
depot_stack_handle_t stack, *stacks;
unsigned long flags;
- atomic_inc(>wakeref_count);
- assert_rpm_wakelock_held(i915);
+ atomic_inc(>wakeref_track_count);
+ assert_raw_rpm_wakelock_held(i915);
if (!HAS_RUNTIME_PM(i915))
return -1;
@@ -139,6 +146,15 @@ track_intel_runtime_pm_wakeref(struct drm_i915_private
*i915)
return stack;
}
+static noinline depot_stack_handle_t
+track_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+{
+ atomic_inc(>runtime_pm.wakeref_count);
+ assert_rpm_wakelock_held(i915);
+
+ return track_intel_runtime_pm_wakeref_raw(i915);
+}
+
static void cancel_intel_runtime_pm_wakeref(struct drm_i915_private *i915,
depot_stack_handle_t stack)
{
@@ -163,7 +179,7 @@ static void cancel_intel_runtime_pm_wakeref(struct
drm_i915_private *i915,
if (WARN(!found,
"Unmatched wakeref (tracking %lu), count %u\n",
-rpm->debug.count, atomic_read(>wakeref_count))) {
+rpm->debug.count, atomic_read(>wakeref_track_count))) {
char *buf;
buf = kmalloc(PAGE_SIZE, GFP_NOWAIT | __GFP_NOWARN);
@@ -235,15 +251,15 @@ __print_intel_runtime_pm_wakeref(struct drm_printer *p,
}
static noinline void
-untrack_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+untrack_intel_runtime_pm_wakeref_raw(struct drm_i915_private *i915)
{
struct i915_runtime_pm *rpm = >runtime_pm;
struct intel_runtime_pm_debug dbg = {};
struct drm_printer p;
unsigned long flags;
- assert_rpm_wakelock_held(i915);
- if (atomic_dec_and_lock_irqsave(>wakeref_count,
+ assert_raw_rpm_wakelock_held(i915);
+ if (atomic_dec_and_lock_irqsave(>wakeref_track_count,
>debug.lock,
flags)) {
dbg = rpm->debug;
@@ -263,6 +279,15 @@ untrack_intel_runtime_pm_wakeref(struct drm_i915_private
*i915)
kfree(dbg.owners);
}
+static noinline void
+untrack_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+{
+ untrack_intel_runtime_pm_wakeref_raw(i915);
+
+ assert_rpm_wakelock_held(i915);
+ atomic_dec(>runtime_pm.wakeref_count);
+}
+
void print_intel_runtime_pm_wakeref(struct drm_i915_private *i915,
struct drm_printer *p)
{
@@ -308,15 +333,33 @@ static void init_intel_runtime_pm_wakeref(struct
drm_i915_private *i915)
}
static depot_stack_handle_t
-track_intel_runtime_pm_wakeref(struct drm_i915_private *i915)
+track_intel_runtime_pm_wakeref_raw(struct drm_i915_private *i915)
{
-
[Intel-gfx] [PATCH 04/10] drm/i915: Disable power asynchronously during DP AUX transfers
In a follow-up patch we will restrict holding the reference on the AUX power domain to the AUX transfer function. To avoid the unnecessary on-off-on power togglings drop the reference asynchronously. There is no reason we couldn't do this in general and also put the reference asynchronously in pps_unlock(); but that's a separate change that can be done as a follow-up. Cc: Ville Syrjala Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/intel_dp.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 42a880e0b392..0475601c2f33 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1219,7 +1219,10 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, to_i915(intel_dig_port->base.base.dev); i915_reg_t ch_ctl, ch_data[5]; u32 aux_clock_divider; - intel_wakeref_t wakeref; + enum intel_display_power_domain aux_domain = + intel_aux_power_domain(intel_dig_port); + intel_wakeref_t aux_wakeref; + intel_wakeref_t pps_wakeref; int i, ret, recv_bytes; int try, clock = 0; u32 status; @@ -1229,7 +1232,8 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, for (i = 0; i < ARRAY_SIZE(ch_data); i++) ch_data[i] = intel_dp->aux_ch_data_reg(intel_dp, i); - wakeref = pps_lock(intel_dp); + aux_wakeref = intel_display_power_get(dev_priv, aux_domain); + pps_wakeref = pps_lock(intel_dp); /* * We will be called with VDD already enabled for dpcd/edid/oui reads. @@ -1375,7 +1379,8 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, if (vdd) edp_panel_vdd_off(intel_dp, false); - pps_unlock(intel_dp, wakeref); + pps_unlock(intel_dp, pps_wakeref); + intel_display_power_put_async(dev_priv, aux_domain, aux_wakeref); return ret; } -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 09/10] drm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV
On ICL we have to make sure that we enable the AUX power domain in a
controlled way (corresponding to the port's actual TypeC mode). Since
the PPS lock - which takes an AUX power ref - is only needed on
eDP/VLV/CHV avoid taking it in other cases.
Cc: Ville Syrjala
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_dp.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f56cbda59fb3..1ee9b7ebd801 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6263,6 +6263,10 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
intel_dp->reset_link_params = true;
+ if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) &&
+ !intel_dp_is_edp(intel_dp))
+ return;
+
with_pps_lock(intel_dp, wakeref) {
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
intel_dp->active_pipe = vlv_active_pipe(intel_dp);
--
2.17.1
___
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[Intel-gfx] [PATCH 00/10] drm/i915: Add support for asynchronous display power disabling
This is a preparation for making hotplug useable on ICL TypeC ports. On ICL we need a stricter control on when either kind of AUX power domain (TBT-alt or DP-alt) is enabled. That control becomes unfeasible if the reference can be held for arbitratry periods due to locking dependencies. OTOH it makes sense to restrict holding the reference only for the duration when it's actually needed. One result of that would be the unnecessary on-off-on power togglings when the reference is dropped and reacquired quickly. This patchset adds support for dropping display power domain references asynchronously with a delay to avoid the unecessary power togglings, and restricts holding the AUX power domain reference to the sequence where it's required during detection and HPD pulse handling. Cc: Ville Syrjala Cc: Chris Wilson Cc: Rodrigo Vivi Cc: José Roberto de Souza Imre Deak (10): drm/i915: Add support for tracking wakerefs w/o power-on guarantee drm/i915: Verify power domains state during suspend in all cases drm/i915: Add support for asynchronous display power disabling drm/i915: Disable power asynchronously during DP AUX transfers drm/i915: WARN for eDP encoders in intel_dp_detect_dpcd() drm/i915: Remove the unneeded AUX power ref from intel_dp_detect() drm/i915: Remove the unneeded AUX power ref from intel_dp_hpd_pulse() drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain drm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV drm/i915: Assert that TypeC ports are not used for eDP drivers/gpu/drm/i915/i915_drv.h | 6 + drivers/gpu/drm/i915/intel_display.c| 2 +- drivers/gpu/drm/i915/intel_display.h| 2 +- drivers/gpu/drm/i915/intel_dp.c | 76 ++-- drivers/gpu/drm/i915/intel_dpll_mgr.c | 36 +- drivers/gpu/drm/i915/intel_psr.c| 6 + drivers/gpu/drm/i915/intel_runtime_pm.c | 443 ++-- drivers/gpu/drm/i915/intel_runtime_pm.h | 4 + 8 files changed, 491 insertions(+), 84 deletions(-) -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/perf: Refactor oa object to better manage resources
The oa object manages the oa buffer and must be allocated when the user
intends to read performance counter snapshots. This can be achieved by
making the oa object part of the stream object which is allocated when a
stream is opened by the user.
Attributes in the oa object that are gen-specific are moved to the perf
object so that they can be initialized on driver load.
The split provides a better separation of the objects used in perf
implementation of i915 driver so that resources are allocated and
initialized only when needed.
v2: Fix checkpatch warnings
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/gt/intel_sseu.c | 2 +-
drivers/gpu/drm/i915/gvt/scheduler.c | 4 +-
drivers/gpu/drm/i915/i915_drv.h | 219 +-
drivers/gpu/drm/i915/i915_oa_bdw.c| 30 +-
drivers/gpu/drm/i915/i915_oa_bxt.c| 30 +-
drivers/gpu/drm/i915/i915_oa_cflgt2.c | 30 +-
drivers/gpu/drm/i915/i915_oa_cflgt3.c | 30 +-
drivers/gpu/drm/i915/i915_oa_chv.c| 30 +-
drivers/gpu/drm/i915/i915_oa_cnl.c| 30 +-
drivers/gpu/drm/i915/i915_oa_glk.c| 30 +-
drivers/gpu/drm/i915/i915_oa_hsw.c| 30 +-
drivers/gpu/drm/i915/i915_oa_icl.c| 30 +-
drivers/gpu/drm/i915/i915_oa_kblgt2.c | 30 +-
drivers/gpu/drm/i915/i915_oa_kblgt3.c | 30 +-
drivers/gpu/drm/i915/i915_oa_sklgt2.c | 30 +-
drivers/gpu/drm/i915/i915_oa_sklgt3.c | 30 +-
drivers/gpu/drm/i915/i915_oa_sklgt4.c | 30 +-
drivers/gpu/drm/i915/i915_perf.c | 586 ++
18 files changed, 632 insertions(+), 599 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c
b/drivers/gpu/drm/i915/gt/intel_sseu.c
index 7f448f3bea0b..fa78df39521a 100644
--- a/drivers/gpu/drm/i915/gt/intel_sseu.c
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.c
@@ -32,7 +32,7 @@ u32 intel_sseu_make_rpcs(struct drm_i915_private *i915,
* cases which disable slices for functional, apart for performance
* reasons. So in this case we select a known stable subset.
*/
- if (!i915->perf.oa.exclusive_stream) {
+ if (!i915->perf.exclusive_stream) {
ctx_sseu = *req_sseu;
} else {
ctx_sseu = intel_sseu_from_device_info(sseu);
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c
b/drivers/gpu/drm/i915/gvt/scheduler.c
index 7ae42f2ebfe8..878e71a927de 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -81,8 +81,8 @@ static void sr_oa_regs(struct intel_vgpu_workload *workload,
u32 *reg_state, bool save)
{
struct drm_i915_private *dev_priv = workload->vgpu->gvt->dev_priv;
- u32 ctx_oactxctrl = dev_priv->perf.oa.ctx_oactxctrl_offset;
- u32 ctx_flexeu0 = dev_priv->perf.oa.ctx_flexeu0_offset;
+ u32 ctx_oactxctrl = dev_priv->perf.ctx_oactxctrl_offset;
+ u32 ctx_flexeu0 = dev_priv->perf.ctx_flexeu0_offset;
int i = 0;
u32 flex_mmio[] = {
i915_mmio_reg_offset(EU_PERF_CNTL0),
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9a634ba57ff9..23778f6299de 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1400,6 +1400,86 @@ struct i915_perf_stream {
* @oa_config: The OA configuration used by the stream.
*/
struct i915_oa_config *oa_config;
+
+ /**
+* The OA context specific information.
+*/
+ struct intel_context *pinned_ctx;
+ u32 specific_ctx_id;
+ u32 specific_ctx_id_mask;
+
+ struct hrtimer poll_check_timer;
+ wait_queue_head_t poll_wq;
+ bool pollin;
+
+ bool periodic;
+ int period_exponent;
+
+ /**
+* State of the OA buffer.
+*/
+ struct {
+ struct i915_vma *vma;
+ u8 *vaddr;
+ u32 last_ctx_id;
+ int format;
+ int format_size;
+ int size_exponent;
+
+ /**
+* Locks reads and writes to all head/tail state
+*
+* Consider: the head and tail pointer state needs to be read
+* consistently from a hrtimer callback (atomic context) and
+* read() fop (user context) with tail pointer updates happening
+* in atomic context and head updates in user context and the
+* (unlikely) possibility of read() errors needing to reset all
+* head/tail state.
+*
+* Note: Contention/performance aren't currently a significant
+* concern here considering the relatively low frequency of
+* hrtimer callbacks (5ms period) and that reads typically only
+* happen in response to a hrtimer event and likely complete
+* before the next callback.
+*
+* Note: This lock is not held *while* reading and copying data
+* to
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with RFC: hung_task: taint kernel (rev2)
== Series Details == Series: series starting with RFC: hung_task: taint kernel (rev2) URL : https://patchwork.freedesktop.org/series/60228/ State : warning == Summary == $ dim checkpatch origin/drm-tip fb98bc124cb7 RFC: hung_task: taint kernel -:37: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Daniel Vetter ' total: 0 errors, 1 warnings, 0 checks, 8 lines checked 1b7921825c1b RFC: soft/hardlookup: taint kernel -:50: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Daniel Vetter ' total: 0 errors, 1 warnings, 0 checks, 16 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Fix runtime suspend
== Series Details ==
Series: drm/i915/guc: Fix runtime suspend
URL : https://patchwork.freedesktop.org/series/60236/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6031 -> Patchwork_12952
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_12952 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12952, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/60236/revisions/1/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_12952:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_hangcheck:
- fi-apl-guc: NOTRUN -> [DMESG-FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12952/fi-apl-guc/igt@i915_selftest@live_hangcheck.html
* igt@runner@aborted:
- fi-apl-guc: NOTRUN -> [FAIL][2]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12952/fi-apl-guc/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_12952 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: [PASS][3] -> [INCOMPLETE][4] ([fdo#108602] /
[fdo#108744] / [fdo#110581])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12952/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#109485])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12952/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-apl-guc: [SKIP][7] ([fdo#109271]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-apl-guc/igt@i915_pm_...@basic-pci-d3-state.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12952/fi-apl-guc/igt@i915_pm_...@basic-pci-d3-state.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [FAIL][9] ([fdo#108511]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12952/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
* igt@i915_selftest@live_contexts:
- fi-skl-gvtdvm: [DMESG-FAIL][11] ([fdo#110235]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12952/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
[fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581
Participating hosts (48 -> 43)
--
Additional (2): fi-blb-e6850 fi-icl-u3
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6031 -> Patchwork_12952
CI_DRM_6031: 6f67b24f2fc7b90a94e4163ae4cd01bc2783fbfd @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12952: 47a877465517c5f51a6ca09ac6bc893c3bb68fa5 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
47a877465517 drm/i915/guc: Fix runtime suspend
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12952/
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: add single combo phy init/unit functions (rev3)
== Series Details == Series: drm/i915: add single combo phy init/unit functions (rev3) URL : https://patchwork.freedesktop.org/series/60112/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12945_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12945_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap_gtt@medium-copy: - shard-apl: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927] / [fdo#110581]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl3/igt@gem_mmap_...@medium-copy.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-apl6/igt@gem_mmap_...@medium-copy.html * igt@gem_softpin@noreloc-s3: - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#104108] / [fdo#107773] / [fdo#110581]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl6/igt@gem_soft...@noreloc-s3.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-skl9/igt@gem_soft...@noreloc-s3.html * igt@i915_pm_rpm@dpms-mode-unset-lpsp: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#107807] / [fdo#110581]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl1/igt@i915_pm_...@dpms-mode-unset-lpsp.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-skl10/igt@i915_pm_...@dpms-mode-unset-lpsp.html * igt@kms_flip@2x-flip-vs-suspend: - shard-hsw: [PASS][7] -> [INCOMPLETE][8] ([fdo#103540] / [fdo#110581]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-hsw6/igt@kms_f...@2x-flip-vs-suspend.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-hsw5/igt@kms_f...@2x-flip-vs-suspend.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: [PASS][9] -> [FAIL][10] ([fdo#105363]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk6/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-glk6/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: - shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +4 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb3/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-iclb2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-snb: [PASS][13] -> [DMESG-WARN][14] ([fdo#102365]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-snb1/igt@kms_frontbuffer_track...@fbc-suspend.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-snb1/igt@kms_frontbuffer_track...@fbc-suspend.html * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-glk: [PASS][15] -> [SKIP][16] ([fdo#109271]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk9/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-glk6/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl10/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-skl5/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103166]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-y.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-iclb1/igt@kms_plane_low...@pipe-a-tiling-y.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#108341]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb8/igt@kms_psr@no_drrs.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +3 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@kms_setmode@basic: -
Re: [Intel-gfx] [RFC PATCH 0/5] cgroup support for GPU devices
> Count us (Mellanox) too, our RDMA devices are exposing special and > limited in size device memory to the users and we would like to provide > an option to use cgroup to control its exposure. Doesn't RDMA already has a separate cgroup? Why not implement it there? > > and with future work, we could extend to: > > * track and control share of GPU time (reuse of cpu/cpuacct) > > * apply mask of allowed execution engines (reuse of cpusets) > > > > Instead of introducing a new cgroup subsystem for GPU devices, a new > > framework is proposed to allow devices to register with existing cgroup > > controllers, which creates per-device cgroup_subsys_state within the > > cgroup. This gives device drivers their own private cgroup controls > > (such as memory limits or other parameters) to be applied to device > > resources instead of host system resources. > > Device drivers (GPU or other) are then able to reuse the existing cgroup > > controls, instead of inventing similar ones. > > > > Per-device controls would be exposed in cgroup filesystem as: > > mount//.devices// > > such as (for example): > > mount//memory.devices//memory.max > > mount//memory.devices//memory.current > > mount//cpu.devices//cpu.stat > > mount//cpu.devices//cpu.weight > > > > The drm/i915 patch in this series is based on top of other RFC work [1] > > for i915 device memory support. > > > > AMD [2] and Intel [3] have proposed related work in this area within the > > last few years, listed below as reference. This new RFC reuses existing > > cgroup controllers and takes a different approach than prior work. > > > > Finally, some potential discussion points for this series: > > * merge proposed .devices into a single devices directory? > > * allow devices to have multiple registrations for subsets of resources? > > * document a 'common charging policy' for device drivers to follow? > > > > [1] https://patchwork.freedesktop.org/series/56683/ > > [2] > > https://lists.freedesktop.org/archives/dri-devel/2018-November/197106.html > > [3] > > https://lists.freedesktop.org/archives/intel-gfx/2018-January/153156.html > > > > > > Brian Welty (5): > > cgroup: Add cgroup_subsys per-device registration framework > > cgroup: Change kernfs_node for directories to store > > cgroup_subsys_state > > memcg: Add per-device support to memory cgroup subsystem > > drm: Add memory cgroup registration and DRIVER_CGROUPS feature bit > > drm/i915: Use memory cgroup for enforcing device memory limit > > > > drivers/gpu/drm/drm_drv.c | 12 + > > drivers/gpu/drm/drm_gem.c | 7 + > > drivers/gpu/drm/i915/i915_drv.c| 2 +- > > drivers/gpu/drm/i915/intel_memory_region.c | 24 +- > > include/drm/drm_device.h | 3 + > > include/drm/drm_drv.h | 8 + > > include/drm/drm_gem.h | 11 + > > include/linux/cgroup-defs.h| 28 ++ > > include/linux/cgroup.h | 3 + > > include/linux/memcontrol.h | 10 + > > kernel/cgroup/cgroup-v1.c | 10 +- > > kernel/cgroup/cgroup.c | 310 ++--- > > mm/memcontrol.c| 183 +++- > > 13 files changed, 552 insertions(+), 59 deletions(-) > > > > -- > > 2.21.0 > > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move the PIPEMISC write the correct place
== Series Details == Series: series starting with [1/2] drm/i915: Move the PIPEMISC write the correct place URL : https://patchwork.freedesktop.org/series/60233/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031 -> Patchwork_12951 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60233/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12951 that come from known issues: ### IGT changes ### Issues hit * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][1] -> [FAIL][2] ([fdo#109485]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html Possible fixes * igt@i915_selftest@live_contexts: - fi-skl-gvtdvm: [DMESG-FAIL][3] ([fdo#110235]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6031/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 Participating hosts (48 -> 42) -- Additional (2): fi-blb-e6850 fi-icl-u3 Missing(8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6031 -> Patchwork_12951 CI_DRM_6031: 6f67b24f2fc7b90a94e4163ae4cd01bc2783fbfd @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12951: 7537a5641e8af060661291f11b4dfb2509b9fa37 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 7537a5641e8a drm/i915: Allow ICL pipe "HDR mode" when the cursor is visible 447523598ae0 drm/i915: Move the PIPEMISC write the correct place == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12951/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Unshadow MI_USER_INTERRUPT (rev2)
== Series Details == Series: drm/i915/execlists: Unshadow MI_USER_INTERRUPT (rev2) URL : https://patchwork.freedesktop.org/series/60192/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12942_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12942_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_suspend@fence-restore-untiled: - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl2/igt@i915_susp...@fence-restore-untiled.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-apl3/igt@i915_susp...@fence-restore-untiled.html * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-snb: [PASS][3] -> [SKIP][4] ([fdo#109271]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-snb4/igt@kms_cursor_...@cursor-128x128-onscreen.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-snb6/igt@kms_cursor_...@cursor-128x128-onscreen.html * igt@kms_flip@2x-flip-vs-suspend-interruptible: - shard-hsw: [PASS][5] -> [INCOMPLETE][6] ([fdo#103540] / [fdo#110581]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-hsw2/igt@kms_f...@2x-flip-vs-suspend-interruptible.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-hsw2/igt@kms_f...@2x-flip-vs-suspend-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-glk: [PASS][7] -> [INCOMPLETE][8] ([fdo#103359] / [fdo#110581] / [k.org#198133]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk2/igt@kms_f...@flip-vs-suspend-interruptible.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-glk2/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render: - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) +4 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb3/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-draw-render.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-iclb2/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-draw-render.html * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-glk: [PASS][11] -> [SKIP][12] ([fdo#109271]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk9/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-glk3/igt@kms_pl...@pixel-format-pipe-a-planes-source-clamping.html * igt@kms_psr@psr2_suspend: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109441]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-iclb2/igt@kms_psr@psr2_suspend.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-iclb6/igt@kms_psr@psr2_suspend.html Possible fixes * igt@gem_workarounds@suspend-resume-context: - shard-apl: [DMESG-WARN][15] ([fdo#108566]) -> [PASS][16] +7 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-apl8/igt@gem_workarou...@suspend-resume-context.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-apl7/igt@gem_workarou...@suspend-resume-context.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions: - shard-hsw: [FAIL][17] ([fdo#103355]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-hsw6/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-hsw1/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions.html * igt@kms_flip@2x-flip-vs-suspend-interruptible: - shard-glk: [INCOMPLETE][19] ([fdo#103359] / [fdo#110581] / [k.org#198133]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-glk4/igt@kms_f...@2x-flip-vs-suspend-interruptible.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-glk8/igt@kms_f...@2x-flip-vs-suspend-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [FAIL][21] ([fdo#105363]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/shard-skl7/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/shard-skl5/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt: - shard-iclb: [FAIL][23] ([fdo#103167]) -> [PASS][24] +1 similar issue
[Intel-gfx] [PATCH] RFC: hung_task: taint kernel
There's the hung_task_panic sysctl, but that's a bit an extreme measure.
As a fallback taint at least the machine.
Our CI uses this to decide when a reboot is necessary, plus to figure
out whether the kernel is still happy.
v2: Works much better when I put the else { add_taint() } at the right
place.
Signed-off-by: Daniel Vetter
Cc: Andrew Morton
Cc: Tetsuo Handa
Cc: Dmitry Vyukov
Cc: "Paul E. McKenney"
Cc: Valdis Kletnieks
Cc: Daniel Vetter
Cc: Vitaly Kuznetsov
Cc: "Liu, Chuansheng"
---
kernel/hung_task.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/kernel/hung_task.c b/kernel/hung_task.c
index f108a95882c6..d90d98f53ccb 100644
--- a/kernel/hung_task.c
+++ b/kernel/hung_task.c
@@ -117,6 +117,8 @@ static void check_hung_task(struct task_struct *t, unsigned
long timeout)
console_verbose();
hung_task_show_lock = true;
hung_task_call_panic = true;
+ } else {
+ add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
}
/*
--
2.20.1
___
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[Intel-gfx] [PATCH] drm/i915/guc: Fix runtime suspend
We are not allowed to rpm_get() inside the runtime-suspend callback, so
split the intel_uc_suspend() into the core that assumes the caller holds
the wakeref (intel_uc_runtime_suspend), and one acquires the wakeref as
necessary (intel_uc_suspend).
Reported-by: Daniele Ceraolo Spurio
Fixes: 79ffac8599c4 ("drm/i915: Invert the GEM wakeref hierarchy")
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 25 +
drivers/gpu/drm/i915/intel_uc.h | 1 +
3 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 21dac5a09fbe..74e46d129e6c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2886,7 +2886,7 @@ static int intel_runtime_suspend(struct device *kdev)
*/
i915_gem_runtime_suspend(dev_priv);
- intel_uc_suspend(dev_priv);
+ intel_uc_runtime_suspend(dev_priv);
intel_runtime_pm_disable_interrupts(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 01ea36e3150c..1ee70df51627 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -481,22 +481,31 @@ void intel_uc_reset_prepare(struct drm_i915_private *i915)
intel_uc_sanitize(i915);
}
-void intel_uc_suspend(struct drm_i915_private *i915)
+void intel_uc_runtime_suspend(struct drm_i915_private *i915)
{
struct intel_guc *guc = >guc;
- intel_wakeref_t wakeref;
int err;
if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
return;
- with_intel_runtime_pm(i915, wakeref) {
- err = intel_guc_suspend(guc);
- if (err)
- DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
+ err = intel_guc_suspend(guc);
+ if (err)
+ DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
- guc_disable_communication(guc);
- }
+ guc_disable_communication(guc);
+}
+
+void intel_uc_suspend(struct drm_i915_private *i915)
+{
+ struct intel_guc *guc = >guc;
+ intel_wakeref_t wakeref;
+
+ if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
+ return;
+
+ with_intel_runtime_pm(i915, wakeref)
+ intel_uc_runtime_suspend(i915);
}
int intel_uc_resume(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index c92436b1f1c5..3ea06c87dfcd 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -40,6 +40,7 @@ int intel_uc_init(struct drm_i915_private *dev_priv);
void intel_uc_fini(struct drm_i915_private *dev_priv);
void intel_uc_reset_prepare(struct drm_i915_private *i915);
void intel_uc_suspend(struct drm_i915_private *i915);
+void intel_uc_runtime_suspend(struct drm_i915_private *i915);
int intel_uc_resume(struct drm_i915_private *dev_priv);
static inline bool intel_uc_is_using_guc(struct drm_i915_private *i915)
--
2.20.1
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] RFC: hung_task: taint kernel
== Series Details == Series: series starting with [1/2] RFC: hung_task: taint kernel URL : https://patchwork.freedesktop.org/series/60228/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12950 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_12950 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_12950, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/60228/revisions/1/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_12950: ### IGT changes ### Possible regressions * igt@runner@aborted: - fi-ilk-650: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-ilk-650/igt@run...@aborted.html - fi-pnv-d510:NOTRUN -> [FAIL][2] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-pnv-d510/igt@run...@aborted.html - fi-bdw-gvtdvm: NOTRUN -> [FAIL][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-bdw-gvtdvm/igt@run...@aborted.html - fi-cfl-8109u: NOTRUN -> [FAIL][4] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-cfl-8109u/igt@run...@aborted.html - fi-hsw-peppy: NOTRUN -> [FAIL][5] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-hsw-peppy/igt@run...@aborted.html - fi-gdg-551: NOTRUN -> [FAIL][6] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-gdg-551/igt@run...@aborted.html - fi-snb-2520m: NOTRUN -> [FAIL][7] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-snb-2520m/igt@run...@aborted.html - fi-hsw-4770:NOTRUN -> [FAIL][8] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-hsw-4770/igt@run...@aborted.html - fi-kbl-7500u: NOTRUN -> [FAIL][9] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-kbl-7500u/igt@run...@aborted.html - fi-bxt-j4205: NOTRUN -> [FAIL][10] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-bxt-j4205/igt@run...@aborted.html - fi-whl-u: NOTRUN -> [FAIL][11] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-whl-u/igt@run...@aborted.html - fi-icl-u3: NOTRUN -> [FAIL][12] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-icl-u3/igt@run...@aborted.html - fi-ivb-3770:NOTRUN -> [FAIL][13] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-ivb-3770/igt@run...@aborted.html - fi-byt-j1900: NOTRUN -> [FAIL][14] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-byt-j1900/igt@run...@aborted.html - fi-cfl-guc: NOTRUN -> [FAIL][15] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-cfl-guc/igt@run...@aborted.html - fi-kbl-7567u: NOTRUN -> [FAIL][16] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-kbl-7567u/igt@run...@aborted.html - fi-blb-e6850: NOTRUN -> [FAIL][17] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-blb-e6850/igt@run...@aborted.html - fi-kbl-x1275: NOTRUN -> [FAIL][18] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-kbl-x1275/igt@run...@aborted.html - fi-cfl-8700k: NOTRUN -> [FAIL][19] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-cfl-8700k/igt@run...@aborted.html - fi-hsw-4770r: NOTRUN -> [FAIL][20] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-hsw-4770r/igt@run...@aborted.html - fi-kbl-8809g: NOTRUN -> [FAIL][21] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-kbl-8809g/igt@run...@aborted.html - fi-apl-guc: NOTRUN -> [FAIL][22] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-apl-guc/igt@run...@aborted.html - fi-bdw-5557u: NOTRUN -> [FAIL][23] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-bdw-5557u/igt@run...@aborted.html - fi-bwr-2160:NOTRUN -> [FAIL][24] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-bwr-2160/igt@run...@aborted.html - fi-byt-n2820: NOTRUN -> [FAIL][25] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-byt-n2820/igt@run...@aborted.html - fi-elk-e7500: NOTRUN -> [FAIL][26] [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12950/fi-elk-e7500/igt@run...@aborted.html Suppressed The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@runner@aborted: -
[Intel-gfx] ✓ Fi.CI.IGT: success for RFC: console: hack up console_trylock more
== Series Details == Series: RFC: console: hack up console_trylock more URL : https://patchwork.freedesktop.org/series/60212/ State : success == Summary == CI Bug Log - changes from CI_DRM_6028_full -> Patchwork_12941_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12941_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@vecs0-s3: - shard-skl: [PASS][1] -> [INCOMPLETE][2] ([fdo#104108] / [fdo#107773] / [fdo#110581]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-skl2/igt@gem_ctx_isolat...@vecs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-skl6/igt@gem_ctx_isolat...@vecs0-s3.html * igt@i915_pm_rpm@gem-execbuf: - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#107803] / [fdo#107807] / [fdo#110581]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-skl6/igt@i915_pm_...@gem-execbuf.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-skl5/igt@i915_pm_...@gem-execbuf.html * igt@i915_suspend@fence-restore-untiled: - shard-apl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +6 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-apl8/igt@i915_susp...@fence-restore-untiled.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-apl7/igt@i915_susp...@fence-restore-untiled.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions: - shard-hsw: [PASS][7] -> [FAIL][8] ([fdo#103355]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-hsw2/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-hsw6/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions.html * igt@kms_flip@flip-vs-expired-vblank: - shard-apl: [PASS][9] -> [FAIL][10] ([fdo#102887] / [fdo#105363]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-apl1/igt@kms_f...@flip-vs-expired-vblank.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-apl8/igt@kms_f...@flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#107773] / [fdo#109507] / [fdo#110581]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-skl4/igt@kms_f...@flip-vs-suspend-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-skl9/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-iclb7/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-move.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-iclb2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-move.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103166]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-iclb3/igt@kms_plane_low...@pipe-a-tiling-x.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-iclb5/igt@kms_plane_low...@pipe-a-tiling-x.html * igt@kms_psr2_su@page_flip: - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109642]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-iclb2/igt@kms_psr2_su@page_flip.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-iclb1/igt@kms_psr2_su@page_flip.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#108341]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-iclb2/igt@kms_psr@no_drrs.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-iclb2/igt@kms_psr@psr2_no_drrs.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-iclb7/igt@kms_psr@psr2_no_drrs.html * igt@kms_sysfs_edid_timing: - shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#100047]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-iclb1/igt@kms_sysfs_edid_timing.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/shard-iclb3/igt@kms_sysfs_edid_timing.html * igt@tools_test@tools_test: - shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109352]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/shard-iclb8/igt@tools_test@tools_test.html [26]:
[Intel-gfx] [PATCH 2/2] drm/i915: Allow ICL pipe "HDR mode" when the cursor is visible
From: Ville Syrjälä
Turns out the cursor is compatible with the pipe "HDR mode". It's
only the actual SDR planes that get entirely bypassed during
blending. So let's ignore the cursor when checking if we have
any planes active that aren't HDR compatible. This fixes the
regressions in the kms_cursor_crc and kms_plane_cursor tests.
Cc: Uma Shankar
Cc: Shashank Sharma
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110579
Fixes: 09b25812db10 ("drm/i915: Enable pipe HDR mode on ICL if only HDR planes
are used")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 28042a16084d..cc1203901ef4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8927,7 +8927,8 @@ static void bdw_set_pipemisc(const struct
intel_crtc_state *crtc_state)
PIPEMISC_YUV420_MODE_FULL_BLEND;
if (INTEL_GEN(dev_priv) >= 11 &&
- (crtc_state->active_planes & ~icl_hdr_plane_mask()) == 0)
+ (crtc_state->active_planes & ~(icl_hdr_plane_mask() |
+ BIT(PLANE_CURSOR))) == 0)
val |= PIPEMISC_HDR_MODE_PRECISION;
I915_WRITE(PIPEMISC(crtc->pipe), val);
--
2.21.0
___
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Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Tune down WARN about incorrect VBT TC legacy flag
On Thu, May 02, 2019 at 04:57:24PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Tune down WARN about incorrect VBT TC legacy flag > URL : https://patchwork.freedesktop.org/series/60197/ > State : success Thanks for the review, pushed to -dinq with the code comment updated. > > == Summary == > > CI Bug Log - changes from CI_DRM_6026_full -> Patchwork_12938_full > > > Summary > --- > > **SUCCESS** > > No regressions found. > > > > Known issues > > > Here are the changes found in Patchwork_12938_full that come from known > issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_eio@reset-stress: > - shard-skl: [PASS][1] -> [FAIL][2] ([fdo#105957]) >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl8/igt@gem_...@reset-stress.html >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-skl8/igt@gem_...@reset-stress.html > > * igt@gem_mmap_gtt@forked-basic-small-copy: > - shard-hsw: [PASS][3] -> [INCOMPLETE][4] ([fdo#103540] / > [fdo#110581]) >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-hsw2/igt@gem_mmap_...@forked-basic-small-copy.html >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-hsw1/igt@gem_mmap_...@forked-basic-small-copy.html > > * igt@i915_pm_rpm@i2c: > - shard-iclb: [PASS][5] -> [DMESG-WARN][6] ([fdo#109982]) >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-iclb5/igt@i915_pm_...@i2c.html >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-iclb2/igt@i915_pm_...@i2c.html > > * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: > - shard-iclb: [PASS][7] -> [FAIL][8] ([fdo#103167]) +3 similar > issues >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-iclb3/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html > > * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-cpu: > - shard-skl: [PASS][9] -> [FAIL][10] ([fdo#103167] / > [fdo#110379]) >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl8/igt@kms_frontbuffer_track...@fbc-rgb101010-draw-mmap-cpu.html >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-skl8/igt@kms_frontbuffer_track...@fbc-rgb101010-draw-mmap-cpu.html > > * igt@kms_frontbuffer_tracking@fbc-suspend: > - shard-apl: [PASS][11] -> [DMESG-WARN][12] ([fdo#108566]) +1 > similar issue >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-apl8/igt@kms_frontbuffer_track...@fbc-suspend.html >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-apl6/igt@kms_frontbuffer_track...@fbc-suspend.html > > * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: > - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145]) >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl1/igt@kms_plane_alpha_bl...@pipe-a-coverage-7efc.html >[14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-skl4/igt@kms_plane_alpha_bl...@pipe-a-coverage-7efc.html > > * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping: > - shard-glk: [PASS][15] -> [SKIP][16] ([fdo#109271] / > [fdo#109278]) +1 similar issue >[15]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-glk9/igt@kms_plane_scal...@pipe-a-scaler-with-clipping-clamping.html >[16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-glk4/igt@kms_plane_scal...@pipe-a-scaler-with-clipping-clamping.html > > * igt@kms_psr@psr2_sprite_plane_move: > - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +2 similar > issues >[17]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html >[18]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-iclb1/igt@kms_psr@psr2_sprite_plane_move.html > > * igt@kms_sysfs_edid_timing: > - shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#100047]) >[19]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-iclb1/igt@kms_sysfs_edid_timing.html >[20]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-iclb3/igt@kms_sysfs_edid_timing.html > > > Possible fixes > > * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: > - shard-glk: [FAIL][21] ([fdo#104873]) -> [PASS][22] >[21]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-glk9/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html >[22]: >
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] RFC: hung_task: taint kernel
== Series Details == Series: series starting with [1/2] RFC: hung_task: taint kernel URL : https://patchwork.freedesktop.org/series/60228/ State : warning == Summary == $ dim checkpatch origin/drm-tip 71eca6313419 RFC: hung_task: taint kernel -:34: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Daniel Vetter ' total: 0 errors, 1 warnings, 0 checks, 8 lines checked 3adccbe564af RFC: soft/hardlookup: taint kernel -:50: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Daniel Vetter ' total: 0 errors, 1 warnings, 0 checks, 16 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: Move the PIPEMISC write the correct place
From: Ville Syrjälä
I fumbled the PIPEMISC write into the wrong place. It only gets
called for fastsets, but since value needs to be updated based on
the set of active planes it needs to be done for all plane updates.
Move it to the correct spot.
The symptoms include SDR planes never showing up if a previous
modeset/fastset left the pipe in HDR mode. This was immediately
obvious when running the kms_plane pixel format tests. Unfortunately
the test didn't realize it was scanning out pure black all the time
and declared success anyway.
Cc: Uma Shankar
Cc: Shashank Sharma
Fixes: 09b25812db10 ("drm/i915: Enable pipe HDR mode on ICL if only HDR planes
are used")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index dd65d7c521c1..28042a16084d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4099,9 +4099,6 @@ static void intel_update_pipe_config(const struct
intel_crtc_state *old_crtc_sta
ironlake_pfit_disable(old_crtc_state);
}
- if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
- bdw_set_pipemisc(new_crtc_state);
-
if (INTEL_GEN(dev_priv) >= 11)
icl_set_pipe_chicken(crtc);
}
@@ -14156,6 +14153,9 @@ static void intel_begin_crtc_commit(struct
intel_atomic_state *state,
else if (INTEL_GEN(dev_priv) >= 9)
skl_detach_scalers(new_crtc_state);
+ if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
+ bdw_set_pipemisc(new_crtc_state);
+
out:
if (dev_priv->display.atomic_update_watermarks)
dev_priv->display.atomic_update_watermarks(state,
--
2.21.0
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings
== Series Details ==
Series: series starting with [v5,1/4] drm/i915: Fix the pipe state timing
mismatch warnings
URL : https://patchwork.freedesktop.org/series/60218/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12949
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/60218/revisions/1/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_12949:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_chamelium@dp-crc-fast:
- {fi-icl-dsi}: NOTRUN -> [SKIP][1] +12 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/fi-icl-dsi/igt@kms_chamel...@dp-crc-fast.html
Known issues
Here are the changes found in Patchwork_12949 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][2] -> [INCOMPLETE][3] ([fdo#107718] /
[fdo#110581])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
* igt@gem_ringfill@basic-default-fd:
- fi-icl-y: [PASS][4] -> [INCOMPLETE][5] ([fdo#107713] /
[fdo#110581])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-icl-y/igt@gem_ringf...@basic-default-fd.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/fi-icl-y/igt@gem_ringf...@basic-default-fd.html
Warnings
* igt@runner@aborted:
- fi-skl-iommu: [FAIL][6] ([fdo#104108]) -> [FAIL][7] ([fdo#104108] /
[fdo#108602])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-skl-iommu/igt@run...@aborted.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/fi-skl-iommu/igt@run...@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581
Participating hosts (54 -> 43)
--
Missing(11): fi-kbl-soraka fi-ilk-m540 fi-bdw-5557u fi-hsw-4200u
fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-byt-clapper
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6029 -> Patchwork_12949
CI_DRM_6029: 0548213ff6d52d4638778a95a4b3a7900e683ac3 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12949: ad63c51d1394b6cd4bc5d134a10dbfffc307448f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ad63c51d1394 drm/i915: Fix pixel clock and crtc clock config mismatch
38eb90b2c673 drm/i915: Fix pipe config mismatch for bpp, output format
a28cace108e0 drm/i915: Refactor bdw_get_pipemisc_bpp
91207cbf0ccb drm/i915: Fix the pipe state timing mismatch warnings
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12949/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 04/10] drm: Convert connector_helper_funcs->atomic_check to accept drm_atomic_state
From: Sean Paul
Everyone who implements connector_helper_funcs->atomic_check reaches
into the connector state to get the atomic state. Instead of continuing
this pattern, change the callback signature to just give atomic state
and let the driver determine what it does and does not need from it.
Eventually all atomic functions should do this, but that's just too much
busy work for me.
Changes in v3:
- Added to the set
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Ben Skeggs
Cc: Laurent Pinchart
Cc: Kieran Bingham
Cc: Eric Anholt
Signed-off-by: Sean Paul
---
drivers/gpu/drm/drm_atomic_helper.c | 4 ++--
drivers/gpu/drm/i915/intel_atomic.c | 8 +---
drivers/gpu/drm/i915/intel_dp_mst.c | 7 ---
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i915/intel_sdvo.c| 9 +
drivers/gpu/drm/i915/intel_tv.c | 8 +---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 +++--
drivers/gpu/drm/rcar-du/rcar_lvds.c | 12 +++-
drivers/gpu/drm/vc4/vc4_txp.c| 7 ---
include/drm/drm_modeset_helper_vtables.h | 2 +-
10 files changed, 37 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 9d9e47276839..fa5a367507c1 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -683,7 +683,7 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
}
if (funcs->atomic_check)
- ret = funcs->atomic_check(connector,
new_connector_state);
+ ret = funcs->atomic_check(connector, state);
if (ret)
return ret;
@@ -725,7 +725,7 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
continue;
if (funcs->atomic_check)
- ret = funcs->atomic_check(connector,
new_connector_state);
+ ret = funcs->atomic_check(connector, state);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index b844e8840c6f..e8a5b82e9242 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -103,12 +103,14 @@ int intel_digital_connector_atomic_set_property(struct
drm_connector *connector,
}
int intel_digital_connector_atomic_check(struct drm_connector *conn,
-struct drm_connector_state *new_state)
+struct drm_atomic_state *state)
{
+ struct drm_connector_state *new_state =
+ drm_atomic_get_new_connector_state(state, conn);
struct intel_digital_connector_state *new_conn_state =
to_intel_digital_connector_state(new_state);
struct drm_connector_state *old_state =
- drm_atomic_get_old_connector_state(new_state->state, conn);
+ drm_atomic_get_old_connector_state(state, conn);
struct intel_digital_connector_state *old_conn_state =
to_intel_digital_connector_state(old_state);
struct drm_crtc_state *crtc_state;
@@ -118,7 +120,7 @@ int intel_digital_connector_atomic_check(struct
drm_connector *conn,
if (!new_state->crtc)
return 0;
- crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
new_state->crtc);
+ crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
/*
* These properties are handled by fastset, and might not end
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 19d81cef2ab6..89cfec128ba0 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -143,9 +143,10 @@ static int intel_dp_mst_compute_config(struct
intel_encoder *encoder,
static int
intel_dp_mst_atomic_check(struct drm_connector *connector,
- struct drm_connector_state *new_conn_state)
+ struct drm_atomic_state *state)
{
- struct drm_atomic_state *state = new_conn_state->state;
+ struct drm_connector_state *new_conn_state =
+ drm_atomic_get_new_connector_state(state, connector);
struct drm_connector_state *old_conn_state =
drm_atomic_get_old_connector_state(state, connector);
struct intel_connector *intel_connector =
@@ -155,7 +156,7 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
struct drm_dp_mst_topology_mgr *mgr;
int ret;
- ret = intel_digital_connector_atomic_check(connector, new_conn_state);
+ ret = intel_digital_connector_atomic_check(connector, state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers (rev2)
== Series Details == Series: drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers (rev2) URL : https://patchwork.freedesktop.org/series/60195/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12948 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60195/revisions/2/mbox/ Known issues Here are the changes found in Patchwork_12948 that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_switch@basic-default: - fi-icl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108569] / [fdo#110581]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-icl-y/igt@gem_ctx_swi...@basic-default.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/fi-icl-y/igt@gem_ctx_swi...@basic-default.html Possible fixes * igt@i915_selftest@live_hangcheck: - fi-skl-iommu: [INCOMPLETE][3] ([fdo#108602] / [fdo#108744] / [fdo#110581]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602 [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744 [fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581 Participating hosts (54 -> 44) -- Missing(10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6029 -> Patchwork_12948 CI_DRM_6029: 0548213ff6d52d4638778a95a4b3a7900e683ac3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12948: 4ee3f21b0b1aa6dd3df3a96714d51dcaff4a94bd @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4ee3f21b0b1a drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12948/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] RFC: soft/hardlookup: taint kernel
There's the soft/hardlookup_panic sysctls, but that's a bit an extreme
measure. As a fallback taint at least the machine.
Our CI uses this to decide when a reboot is necessary, plus to figure
out whether the kernel is still happy.
Signed-off-by: Daniel Vetter
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Peter Zijlstra
Cc: Valdis Kletnieks
Cc: Laurence Oberman
Cc: Vincent Whitchurch
Cc: Don Zickus
Cc: Andrew Morton
Cc: Sergey Senozhatsky
Cc: Sinan Kaya
Cc: Daniel Vetter
---
kernel/watchdog.c | 2 ++
kernel/watchdog_hld.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/kernel/watchdog.c b/kernel/watchdog.c
index 6a5787233113..de7a60503517 100644
--- a/kernel/watchdog.c
+++ b/kernel/watchdog.c
@@ -469,6 +469,8 @@ static enum hrtimer_restart watchdog_timer_fn(struct
hrtimer *hrtimer)
add_taint(TAINT_SOFTLOCKUP, LOCKDEP_STILL_OK);
if (softlockup_panic)
panic("softlockup: hung tasks");
+ else
+ add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
__this_cpu_write(soft_watchdog_warn, true);
} else
__this_cpu_write(soft_watchdog_warn, false);
diff --git a/kernel/watchdog_hld.c b/kernel/watchdog_hld.c
index 247bf0b1582c..cce46cf75d76 100644
--- a/kernel/watchdog_hld.c
+++ b/kernel/watchdog_hld.c
@@ -154,6 +154,8 @@ static void watchdog_overflow_callback(struct perf_event
*event,
if (hardlockup_panic)
nmi_panic(regs, "Hard LOCKUP");
+ else
+ add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
__this_cpu_write(hard_watchdog_warn, true);
return;
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] RFC: hung_task: taint kernel
There's the hung_task_panic sysctl, but that's a bit an extreme measure.
As a fallback taint at least the machine.
Our CI uses this to decide when a reboot is necessary, plus to figure
out whether the kernel is still happy.
Signed-off-by: Daniel Vetter
Cc: Andrew Morton
Cc: Tetsuo Handa
Cc: Dmitry Vyukov
Cc: "Paul E. McKenney"
Cc: Valdis Kletnieks
Cc: Daniel Vetter
Cc: Vitaly Kuznetsov
Cc: "Liu, Chuansheng"
---
kernel/hung_task.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/kernel/hung_task.c b/kernel/hung_task.c
index f108a95882c6..7fae16f1b49c 100644
--- a/kernel/hung_task.c
+++ b/kernel/hung_task.c
@@ -203,6 +203,8 @@ static void check_hung_uninterruptible_tasks(unsigned long
timeout)
if (hung_task_call_panic) {
trigger_all_cpu_backtrace();
panic("hung_task: blocked tasks");
+ } else {
+ add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
}
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings
== Series Details == Series: series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings URL : https://patchwork.freedesktop.org/series/60218/ State : warning == Summary == $ dim checkpatch origin/drm-tip 91207cbf0ccb drm/i915: Fix the pipe state timing mismatch warnings -:52: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #52: FILE: drivers/gpu/drm/i915/icl_dsi.c:1204: + +} total: 0 errors, 0 warnings, 1 checks, 75 lines checked a28cace108e0 drm/i915: Refactor bdw_get_pipemisc_bpp 38eb90b2c673 drm/i915: Fix pipe config mismatch for bpp, output format ad63c51d1394 drm/i915: Fix pixel clock and crtc clock config mismatch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: the great header refactoring, part three
== Series Details == Series: drm/i915: the great header refactoring, part three URL : https://patchwork.freedesktop.org/series/60215/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12947 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60215/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12947 that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_create@basic-files: - fi-icl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#109100] / [fdo#110581]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-icl-y/igt@gem_ctx_cre...@basic-files.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/fi-icl-y/igt@gem_ctx_cre...@basic-files.html * igt@i915_selftest@live_contexts: - fi-bdw-gvtdvm: [PASS][3] -> [DMESG-FAIL][4] ([fdo#110235]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html Possible fixes * igt@i915_selftest@live_hangcheck: - fi-skl-iommu: [INCOMPLETE][5] ([fdo#108602] / [fdo#108744] / [fdo#110581]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602 [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744 [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 [fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581 Participating hosts (54 -> 43) -- Missing(11): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-byt-clapper fi-bdw-samus fi-cml-u Build changes - * Linux: CI_DRM_6029 -> Patchwork_12947 CI_DRM_6029: 0548213ff6d52d4638778a95a4b3a7900e683ac3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12947: df6c90b06bffe88976d785385e504b43356ab061 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == df6c90b06bff drm/i915: extract intel_gmbus.h from i915_drv.h and rename intel_i2c.c 5204035ef050 drm/i915: move more generic utils to i915_utils.h e897718d1a6e drm/i915: make i915_utils.h self-contained 4cbadf6de15f drm/i915: move i915_vgacntrl_reg() where needed 50ea3b222b58 drm/i915: extract i915_debugfs.h from i915_drv.h cf9b5978fcef drm/i915: extract intel_acpi.h from i915_drv.h a23255f00364 drm/i915: extract intel_lpe_audio.h from i915_drv.h aac80847f4f3 drm/i915: extract intel_dpio_phy.h from i915_drv.h 81d05aed68fb drm/i915/csr: move CSR version macros to intel_csr.h e368306364d2 drm/i915: remove unused/stale macros and comments from intel_drv.h 552591452252 drm/i915: move ranges to intel_display.c ecb082b73857 drm/i915/dsi: move operation mode types to intel_dsi.h ac0fcd25f9fa drm/i915/dvo: move DVO chip types to intel_dvo.c == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12947/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: the great header refactoring, part three
== Series Details == Series: drm/i915: the great header refactoring, part three URL : https://patchwork.freedesktop.org/series/60215/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/dvo: move DVO chip types to intel_dvo.c Okay! Commit: drm/i915/dsi: move operation mode types to intel_dsi.h Okay! Commit: drm/i915: move ranges to intel_display.c Okay! Commit: drm/i915: remove unused/stale macros and comments from intel_drv.h Okay! Commit: drm/i915/csr: move CSR version macros to intel_csr.h -drivers/gpu/drm/i915/selftests/../i915_drv.h:3448:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3444:16: warning: expression using sizeof(void) Commit: drm/i915: extract intel_dpio_phy.h from i915_drv.h -drivers/gpu/drm/i915/selftests/../i915_drv.h:3444:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3403:16: warning: expression using sizeof(void) Commit: drm/i915: extract intel_lpe_audio.h from i915_drv.h +drivers/gpu/drm/i915/i915_irq.c:1000:20: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_irq.c:1000:20: warning: expression using sizeof(void) -drivers/gpu/drm/i915/i915_irq.c:1000:20: warning: expression using sizeof(void) -drivers/gpu/drm/i915/i915_irq.c:1000:20: warning: expression using sizeof(void) -drivers/gpu/drm/i915/selftests/../i915_drv.h:3403:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3395:16: warning: expression using sizeof(void) Commit: drm/i915: extract intel_acpi.h from i915_drv.h -drivers/gpu/drm/i915/selftests/../i915_drv.h:3395:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3386:16: warning: expression using sizeof(void) Commit: drm/i915: extract i915_debugfs.h from i915_drv.h -drivers/gpu/drm/i915/selftests/../i915_drv.h:3386:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3374:16: warning: expression using sizeof(void) Commit: drm/i915: move i915_vgacntrl_reg() where needed -drivers/gpu/drm/i915/selftests/../i915_drv.h:3374:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3364:16: warning: expression using sizeof(void) Commit: drm/i915: make i915_utils.h self-contained Okay! Commit: drm/i915: move more generic utils to i915_utils.h -O:drivers/gpu/drm/i915/i915_drv.h:3364:16: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:3364:16: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:3364:16: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:3364:16: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:3364:16: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:3364:16: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:3364:16: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_drv.h:3374:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:184:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:184:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:184:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:184:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:184:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:184:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:184:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_utils.h:194:16: warning: expression using sizeof(void) -drivers/gpu/drm/i915/selftests/../i915_drv.h:3364:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_utils.h:184:16: warning: expression using sizeof(void) Commit: drm/i915: extract intel_gmbus.h from i915_drv.h and rename intel_i2c.c +drivers/gpu/drm/i915/intel_gmbus.c:446:31: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_gmbus.c:448:31: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_gmbus.c:448:31: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_gmbus.c:510:23: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_gmbus.c:510:23: warning: expression using sizeof(void) -drivers/gpu/drm/i915/intel_gmbus.c:446:31: warning: expression using sizeof(void) -drivers/gpu/drm/i915/intel_gmbus.c:448:31: warning: expression using sizeof(void) -drivers/gpu/drm/i915/intel_gmbus.c:448:31: warning: expression using sizeof(void) -drivers/gpu/drm/i915/intel_gmbus.c:510:23: warning: expression using sizeof(void) -drivers/gpu/drm/i915/intel_gmbus.c:510:23: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: the great header refactoring, part three
== Series Details ==
Series: drm/i915: the great header refactoring, part three
URL : https://patchwork.freedesktop.org/series/60215/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ac0fcd25f9fa drm/i915/dvo: move DVO chip types to intel_dvo.c
ecb082b73857 drm/i915/dsi: move operation mode types to intel_dsi.h
552591452252 drm/i915: move ranges to intel_display.c
e368306364d2 drm/i915: remove unused/stale macros and comments from intel_drv.h
81d05aed68fb drm/i915/csr: move CSR version macros to intel_csr.h
aac80847f4f3 drm/i915: extract intel_dpio_phy.h from i915_drv.h
-:133: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#133:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 161 lines checked
a23255f00364 drm/i915: extract intel_lpe_audio.h from i915_drv.h
-:107: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#107:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 83 lines checked
cf9b5978fcef drm/i915: extract intel_acpi.h from i915_drv.h
-:82: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#82:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 65 lines checked
50ea3b222b58 drm/i915: extract i915_debugfs.h from i915_drv.h
-:45: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#45:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 98 lines checked
4cbadf6de15f drm/i915: move i915_vgacntrl_reg() where needed
e897718d1a6e drm/i915: make i915_utils.h self-contained
5204035ef050 drm/i915: move more generic utils to i915_utils.h
-:96: ERROR:CODE_INDENT: code indent should use tabs where possible
#96: FILE: drivers/gpu/drm/i915/i915_utils.h:194:
+return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1);$
-:96: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#96: FILE: drivers/gpu/drm/i915/i915_utils.h:194:
+return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1);$
-:134: CHECK:CAMELCASE: Avoid CamelCase:
#134: FILE: drivers/gpu/drm/i915/i915_utils.h:232:
+#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \
-:134: CHECK:CAMELCASE: Avoid CamelCase:
#134: FILE: drivers/gpu/drm/i915/i915_utils.h:232:
+#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \
-:165: ERROR:IN_ATOMIC: do not use in_atomic in drivers
#165: FILE: drivers/gpu/drm/i915/i915_utils.h:263:
+# define _WAIT_FOR_ATOMIC_CHECK(ATOMIC) WARN_ON_ONCE((ATOMIC) && !in_atomic())
-:170: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'ATOMIC' - possible
side-effects?
#170: FILE: drivers/gpu/drm/i915/i915_utils.h:268:
+#define _wait_for_atomic(COND, US, ATOMIC) \
+({ \
+ int cpu, ret, timeout = (US) * 1000; \
+ u64 base; \
+ _WAIT_FOR_ATOMIC_CHECK(ATOMIC); \
+ if (!(ATOMIC)) { \
+ preempt_disable(); \
+ cpu = smp_processor_id(); \
+ } \
+ base = local_clock(); \
+ for (;;) { \
+ u64 now = local_clock(); \
+ if (!(ATOMIC)) \
+ preempt_enable(); \
+ /* Guarantee COND check prior to timeout */ \
+ barrier(); \
+ if (COND) { \
+ ret = 0; \
+ break; \
+ } \
+ if (now - base >= timeout) { \
+ ret = -ETIMEDOUT; \
+ break; \
+ } \
+ cpu_relax(); \
+ if (!(ATOMIC)) { \
+ preempt_disable(); \
+ if (unlikely(cpu != smp_processor_id())) { \
+ timeout -= now - base; \
+ cpu = smp_processor_id(); \
+ base = local_clock(); \
+ } \
+ } \
+ } \
+ ret; \
+})
-:207: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'COND' - possible
side-effects?
#207: FILE: drivers/gpu/drm/i915/i915_utils.h:305:
+#define wait_for_us(COND, US) \
+({ \
+ int ret__; \
+ BUILD_BUG_ON(!__builtin_constant_p(US)); \
+ if ((US) > 10) \
+ ret__ = _wait_for((COND), (US), 10, 10); \
+ else \
+ ret__ = _wait_for_atomic((COND), (US), 0); \
+ ret__; \
+})
-:207: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'US' - possible side-effects?
#207: FILE: drivers/gpu/drm/i915/i915_utils.h:305:
+#define wait_for_us(COND, US) \
+({ \
+ int ret__; \
+ BUILD_BUG_ON(!__builtin_constant_p(US)); \
+ if ((US) > 10) \
+ ret__ = _wait_for((COND), (US), 10, 10); \
+ else \
+ ret__ = _wait_for_atomic((COND), (US), 0); \
+ ret__; \
+})
-:218: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'US' - possible side-effects?
#218: FILE: drivers/gpu/drm/i915/i915_utils.h:316:
+#define wait_for_atomic_us(COND, US) \
+({ \
+
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/execlists: Flush the tasklet on parking
== Series Details == Series: series starting with [1/2] drm/i915/execlists: Flush the tasklet on parking URL : https://patchwork.freedesktop.org/series/60216/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12946 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60216/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12946 that come from known issues: ### IGT changes ### Possible fixes * igt@i915_selftest@live_hangcheck: - fi-skl-iommu: [INCOMPLETE][1] ([fdo#108602] / [fdo#108744] / [fdo#110581]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602 [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744 [fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581 Participating hosts (54 -> 41) -- Missing(13): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-gdg-551 fi-pnv-d510 fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6029 -> Patchwork_12946 CI_DRM_6029: 0548213ff6d52d4638778a95a4b3a7900e683ac3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12946: 2b2c8ab61486a4c91e69ffc208cbdac21e20eff0 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 2b2c8ab61486 drm/i915: Leave engine parking to the engines af6c2933c230 drm/i915/execlists: Flush the tasklet on parking == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12946/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add single combo phy init/unit functions (rev3)
== Series Details == Series: drm/i915: add single combo phy init/unit functions (rev3) URL : https://patchwork.freedesktop.org/series/60112/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12945 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60112/revisions/3/mbox/ Known issues Here are the changes found in Patchwork_12945 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live_contexts: - fi-icl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108569] / [fdo#110581]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-icl-y/igt@i915_selftest@live_contexts.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/fi-icl-y/igt@i915_selftest@live_contexts.html Possible fixes * igt@i915_selftest@live_hangcheck: - fi-skl-iommu: [INCOMPLETE][3] ([fdo#108602] / [fdo#108744] / [fdo#110581]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602 [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744 [fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581 Participating hosts (54 -> 44) -- Missing(10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6029 -> Patchwork_12945 CI_DRM_6029: 0548213ff6d52d4638778a95a4b3a7900e683ac3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12945: 23a7b80b86d280cbf7148a3fc65fbd95bef52a32 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 23a7b80b86d2 drm/i915: add single combo phy init/unit functions == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12945/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for HDCP2.2 Phase II (rev8)
== Series Details ==
Series: HDCP2.2 Phase II (rev8)
URL : https://patchwork.freedesktop.org/series/57232/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6026_full -> Patchwork_12939_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_12939_full:
### IGT changes ###
Possible regressions
* {igt@kms_content_protection@uevent} (NEW):
- shard-kbl: NOTRUN -> [FAIL][1] +2 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-kbl6/igt@kms_content_protect...@uevent.html
- shard-iclb: NOTRUN -> [SKIP][2] +5 similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-iclb6/igt@kms_content_protect...@uevent.html
- shard-apl: NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-apl7/igt@kms_content_protect...@uevent.html
New tests
-
New tests have been introduced between CI_DRM_6026_full and
Patchwork_12939_full:
### New IGT tests (6) ###
* igt@kms_content_protection@content_type_change:
- Statuses : 7 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_content_protection@lic:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.0, 120.80] s
* igt@kms_content_protection@mei_interface:
- Statuses : 6 skip(s)
- Exec time: [0.00, 0.01] s
* igt@kms_content_protection@srm:
- Statuses : 1 fail(s) 5 skip(s)
- Exec time: [0.00, 121.50] s
* igt@kms_content_protection@type1:
- Statuses : 7 skip(s)
- Exec time: [0.0, 0.01] s
* igt@kms_content_protection@uevent:
- Statuses : 2 fail(s) 5 skip(s)
- Exec time: [0.0, 106.95] s
Known issues
Here are the changes found in Patchwork_12939_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_workarounds@suspend-resume:
- shard-apl: [PASS][4] -> [DMESG-WARN][5] ([fdo#108566]) +2
similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-apl8/igt@gem_workarou...@suspend-resume.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-apl8/igt@gem_workarou...@suspend-resume.html
* igt@kms_color@pipe-c-degamma:
- shard-glk: [PASS][6] -> [FAIL][7] ([fdo#104782])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-glk4/igt@kms_co...@pipe-c-degamma.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-glk9/igt@kms_co...@pipe-c-degamma.html
- shard-kbl: [PASS][8] -> [FAIL][9] ([fdo#104782])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-kbl5/igt@kms_co...@pipe-c-degamma.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-kbl5/igt@kms_co...@pipe-c-degamma.html
- shard-skl: [PASS][10] -> [FAIL][11] ([fdo#104782])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl1/igt@kms_co...@pipe-c-degamma.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-skl3/igt@kms_co...@pipe-c-degamma.html
- shard-apl: [PASS][12] -> [FAIL][13] ([fdo#104782])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-apl8/igt@kms_co...@pipe-c-degamma.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-apl4/igt@kms_co...@pipe-c-degamma.html
* igt@kms_cursor_crc@cursor-128x42-random:
- shard-skl: [PASS][14] -> [FAIL][15] ([fdo#103232])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl4/igt@kms_cursor_...@cursor-128x42-random.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-skl2/igt@kms_cursor_...@cursor-128x42-random.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [PASS][16] -> [INCOMPLETE][17] ([fdo#104108] /
[fdo#107773] / [fdo#110581])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl8/igt@kms_fbcon_...@psr-suspend.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-skl2/igt@kms_fbcon_...@psr-suspend.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][18] -> [FAIL][19] ([fdo#105363])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl3/igt@kms_f...@flip-vs-expired-vblank.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12939/shard-skl5/igt@kms_f...@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
- shard-skl: [PASS][20] -> [FAIL][21] ([fdo#108040])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl10/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-pwrite.html
[21]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: use logical operators with boolean type (rev2)
== Series Details == Series: drm/i915/dp: use logical operators with boolean type (rev2) URL : https://patchwork.freedesktop.org/series/60190/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12944 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_12944 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_12944, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/60190/revisions/2/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_12944: ### IGT changes ### Possible regressions * igt@runner@aborted: - fi-icl-u3: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12944/fi-icl-u3/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_12944 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: [PASS][2] -> [INCOMPLETE][3] ([fdo#107718] / [fdo#110581]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12944/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html * igt@i915_selftest@live_evict: - fi-bsw-kefka: [PASS][4] -> [DMESG-WARN][5] ([fdo#107709]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-bsw-kefka/igt@i915_selftest@live_evict.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12944/fi-bsw-kefka/igt@i915_selftest@live_evict.html * igt@i915_selftest@live_hangcheck: - fi-icl-y: [PASS][6] -> [INCOMPLETE][7] ([fdo#107713] / [fdo#108569] / [fdo#110581]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-icl-y/igt@i915_selftest@live_hangcheck.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12944/fi-icl-y/igt@i915_selftest@live_hangcheck.html Possible fixes * igt@i915_selftest@live_hangcheck: - fi-skl-iommu: [INCOMPLETE][8] ([fdo#108602] / [fdo#108744] / [fdo#110581]) -> [PASS][9] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12944/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602 [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744 [fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581 Participating hosts (54 -> 44) -- Missing(10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus fi-byt-clapper fi-skl-6600u Build changes - * Linux: CI_DRM_6029 -> Patchwork_12944 CI_DRM_6029: 0548213ff6d52d4638778a95a4b3a7900e683ac3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12944: f93b4413e5038b02f3af44a46ce4a5e188f2906e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == f93b4413e503 drm/i915/dp: use logical operators with boolean type == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12944/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Unshadow MI_USER_INTERRUPT (rev2)
== Series Details == Series: drm/i915/execlists: Unshadow MI_USER_INTERRUPT (rev2) URL : https://patchwork.freedesktop.org/series/60192/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12942 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60192/revisions/2/mbox/ Known issues Here are the changes found in Patchwork_12942 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s3: - fi-kbl-7567u: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-kbl-7567u/igt@gem_exec_susp...@basic-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/fi-kbl-7567u/igt@gem_exec_susp...@basic-s3.html * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [PASS][3] -> [FAIL][4] ([fdo#108511]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-skl-6770hq/igt@i915_pm_...@module-reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/fi-skl-6770hq/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live_evict: - fi-bsw-kefka: [PASS][5] -> [DMESG-WARN][6] ([fdo#107709]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-bsw-kefka/igt@i915_selftest@live_evict.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/fi-bsw-kefka/igt@i915_selftest@live_evict.html Possible fixes * igt@i915_selftest@live_hangcheck: - fi-skl-iommu: [INCOMPLETE][7] ([fdo#108602] / [fdo#108744] / [fdo#110581]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/fi-skl-iommu/igt@i915_selftest@live_hangcheck.html Warnings * igt@i915_pm_rpm@basic-pci-d3-state: - fi-kbl-guc: [INCOMPLETE][9] ([fdo#107807] / [fdo#110581]) -> [SKIP][10] ([fdo#109271]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6029/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709 [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602 [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581 Participating hosts (54 -> 46) -- Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6029 -> Patchwork_12942 CI_DRM_6029: 0548213ff6d52d4638778a95a4b3a7900e683ac3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12942: 4a0682aa8c27a87a40512431fe7c62476ee43e27 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4a0682aa8c27 drm/i915/execlists: Ensure arbitration is disabled for the breadcrumb == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12942/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Tune down WARN about incorrect VBT TC legacy flag
== Series Details == Series: drm/i915: Tune down WARN about incorrect VBT TC legacy flag URL : https://patchwork.freedesktop.org/series/60197/ State : success == Summary == CI Bug Log - changes from CI_DRM_6026_full -> Patchwork_12938_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_12938_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_eio@reset-stress: - shard-skl: [PASS][1] -> [FAIL][2] ([fdo#105957]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl8/igt@gem_...@reset-stress.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-skl8/igt@gem_...@reset-stress.html * igt@gem_mmap_gtt@forked-basic-small-copy: - shard-hsw: [PASS][3] -> [INCOMPLETE][4] ([fdo#103540] / [fdo#110581]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-hsw2/igt@gem_mmap_...@forked-basic-small-copy.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-hsw1/igt@gem_mmap_...@forked-basic-small-copy.html * igt@i915_pm_rpm@i2c: - shard-iclb: [PASS][5] -> [DMESG-WARN][6] ([fdo#109982]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-iclb5/igt@i915_pm_...@i2c.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-iclb2/igt@i915_pm_...@i2c.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: - shard-iclb: [PASS][7] -> [FAIL][8] ([fdo#103167]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-iclb3/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-cpu: - shard-skl: [PASS][9] -> [FAIL][10] ([fdo#103167] / [fdo#110379]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl8/igt@kms_frontbuffer_track...@fbc-rgb101010-draw-mmap-cpu.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-skl8/igt@kms_frontbuffer_track...@fbc-rgb101010-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-apl: [PASS][11] -> [DMESG-WARN][12] ([fdo#108566]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-apl8/igt@kms_frontbuffer_track...@fbc-suspend.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-apl6/igt@kms_frontbuffer_track...@fbc-suspend.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl1/igt@kms_plane_alpha_bl...@pipe-a-coverage-7efc.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-skl4/igt@kms_plane_alpha_bl...@pipe-a-coverage-7efc.html * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping: - shard-glk: [PASS][15] -> [SKIP][16] ([fdo#109271] / [fdo#109278]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-glk9/igt@kms_plane_scal...@pipe-a-scaler-with-clipping-clamping.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-glk4/igt@kms_plane_scal...@pipe-a-scaler-with-clipping-clamping.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-iclb1/igt@kms_psr@psr2_sprite_plane_move.html * igt@kms_sysfs_edid_timing: - shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#100047]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-iclb1/igt@kms_sysfs_edid_timing.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-iclb3/igt@kms_sysfs_edid_timing.html Possible fixes * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [FAIL][21] ([fdo#104873]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-glk9/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12938/shard-glk4/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html * igt@kms_draw_crc@draw-method-xrgb-render-xtiled: - shard-skl: [FAIL][23] ([fdo#103184] / [fdo#103232]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6026/shard-skl8/igt@kms_draw_...@draw-method-xrgb-render-xtiled.html [24]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/14] drm/i915/hangcheck: Track context changes (rev5)
== Series Details == Series: series starting with [01/14] drm/i915/hangcheck: Track context changes (rev5) URL : https://patchwork.freedesktop.org/series/60153/ State : failure == Summary == Applying: drm/i915/hangcheck: Track context changes Applying: drm/i915: Include fence signaled bit in print_request() Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/gt/intel_engine_cs.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/gt/intel_engine_cs.c CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gt/intel_engine_cs.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0002 drm/i915: Include fence signaled bit in print_request() When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915/execlists: Ensure arbitration is disabled for the breadcrumb
Quoting Chris Wilson (2019-05-02 15:17:01) > If we interrupt building of the request, we may emit a request with no > payload at all, with the consequence that we never disable arbitration > prior to the breadcrumb. If we get preempted during the breadcrumb, it > appears possible to lose the association of the interrupt with > breadcrumb, and under the right conditions miss the breadcrumb interrupt > entirely, leaving the request's waiters dangling. > > Now that we always disable the arbitration in the breadcrumb, we can > remove the redundant command to disable it after emitting the batch. > > Testcase: igt/gem_concurrent_blit > Signed-off-by: Chris Wilson That's not it either. Next idea? -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for RFC: console: hack up console_trylock more
== Series Details == Series: RFC: console: hack up console_trylock more URL : https://patchwork.freedesktop.org/series/60212/ State : success == Summary == CI Bug Log - changes from CI_DRM_6028 -> Patchwork_12941 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/60212/revisions/1/mbox/ Known issues Here are the changes found in Patchwork_12941 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live_contexts: - fi-icl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108569] / [fdo#110581]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/fi-icl-y/igt@i915_selftest@live_contexts.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/fi-icl-y/igt@i915_selftest@live_contexts.html Possible fixes * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: [INCOMPLETE][3] ([fdo#107718] / [fdo#110581]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [FAIL][5] ([fdo#108511]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6028/fi-skl-6770hq/igt@i915_pm_...@module-reload.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/fi-skl-6770hq/igt@i915_pm_...@module-reload.html [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#110581]: https://bugs.freedesktop.org/show_bug.cgi?id=110581 Participating hosts (54 -> 46) -- Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6028 -> Patchwork_12941 CI_DRM_6028: dbaec229490d7a786375739370f757b7e70d0251 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4972: f052e49a43cc9704ea5f240df15dd9d3dfed68ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12941: 5a15dd2f624bd37232f5e349e4b3416ebad9845d @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 5a15dd2f624b RFC: console: hack up console_trylock more == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12941/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper
On Thu, May 02, 2019 at 05:45:45PM +0300, Jani Nikula wrote: > On Thu, 02 May 2019, Imre Deak wrote: > > On Fri, Apr 26, 2019 at 08:39:12AM +, Patchwork wrote: > >> == Series Details == > >> > >> Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY > >> lane power setup helper > >> URL : https://patchwork.freedesktop.org/series/59954/ > >> State : success > > > > Thanks for the review, series pushed to -dinq, with the s/icl_/intel_/ > > change and adding the headers to intel_combo_phy.h required by the > > recent header refactoring. > > Hey, I expected a resend. Please always resend the the rebased patches > for CI, and only push patches that have gone through CI! Ok, will do so. I assume though that trivial changes only in the commit message and/or code comments - if the reviewer has agreed to them - don't need a resend. That would only result in in an unecessary run through CI with unchanged code. > > BR, > Jani. > > > > > >> > >> == Summary == > >> > >> CI Bug Log - changes from CI_DRM_6000_full -> Patchwork_12877_full > >> > >> > >> Summary > >> --- > >> > >> **SUCCESS** > >> > >> No regressions found. > >> > >> > >> > >> Known issues > >> > >> > >> Here are the changes found in Patchwork_12877_full that come from known > >> issues: > >> > >> ### IGT changes ### > >> > >> Issues hit > >> > >> * igt@gem_tiled_swapping@non-threaded: > >> - shard-iclb: [PASS][1] -> [DMESG-WARN][2] ([fdo#108686]) > >>[1]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb6/igt@gem_tiled_swapp...@non-threaded.html > >>[2]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb3/igt@gem_tiled_swapp...@non-threaded.html > >> > >> * igt@i915_pm_rpm@legacy-planes: > >> - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#107807]) > >>[3]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@i915_pm_...@legacy-planes.html > >>[4]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl6/igt@i915_pm_...@legacy-planes.html > >> > >> * igt@kms_cursor_crc@cursor-64x64-dpms: > >> - shard-skl: [PASS][5] -> [FAIL][6] ([fdo#103232]) > >>[5]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_cursor_...@cursor-64x64-dpms.html > >>[6]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_cursor_...@cursor-64x64-dpms.html > >> > >> * igt@kms_flip@flip-vs-expired-vblank-interruptible: > >> - shard-skl: [PASS][7] -> [FAIL][8] ([fdo#105363]) > >>[7]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_f...@flip-vs-expired-vblank-interruptible.html > >>[8]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html > >> > >> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt: > >> - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) > >>[9]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-indfb-pgflip-blt.html > >>[10]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-indfb-pgflip-blt.html > >> > >> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: > >> - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#104108]) > >>[11]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl2/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-b.html > >>[12]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl3/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-b.html > >> > >> * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: > >> - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145] / > >> [fdo#110403]) > >>[13]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html > >>[14]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html > >> > >> * igt@kms_psr2_su@frontbuffer: > >> - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109642]) > >>[15]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr2...@frontbuffer.html > >>[16]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_psr2...@frontbuffer.html > >> > >> * igt@kms_psr@psr2_sprite_render: > >> - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +2 > >> similar issues > >>[17]: > >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr@psr2_sprite_render.html > >>[18]: > >>
[Intel-gfx] [v5 1/4] drm/i915: Fix the pipe state timing mismatch warnings
Adjust the get transcoder timings for mipi dsi as per the
set timing calculations.
v2: Use the existing intel_get_pipe_timings and do the dsi
specific adjustments in the encoder get_config hook.(Ville, Jani)
v3: Exclude VBLANK and HBLANK registers for dsi transcoder.
v4: Fix the incomplete conditional logic.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/icl_dsi.c | 29 +
drivers/gpu/drm/i915/intel_display.c | 22 --
2 files changed, 45 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index c6ecc00..45fe69c 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -1194,6 +1194,34 @@ static void gen11_dsi_disable(struct intel_encoder
*encoder,
gen11_dsi_disable_io_power(encoder);
}
+static void gen11_dsi_get_timings(struct intel_encoder *encoder,
+ struct intel_crtc_state *pipe_config)
+{
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(>base);
+ struct drm_display_mode *adjusted_mode =
+ _config->base.adjusted_mode;
+
+ if (intel_dsi->dual_link) {
+ adjusted_mode->crtc_hdisplay *= 2;
+ if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK)
+ adjusted_mode->crtc_hdisplay -=
+ intel_dsi->pixel_overlap;
+ adjusted_mode->crtc_htotal *= 2;
+ }
+ adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hdisplay;
+ adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_htotal;
+
+ if (intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE) {
+ if (intel_dsi->dual_link) {
+ adjusted_mode->crtc_hsync_start *= 2;
+ adjusted_mode->crtc_hsync_end *= 2;
+ }
+ }
+ adjusted_mode->crtc_vblank_start = adjusted_mode->crtc_vdisplay;
+ adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal;
+
+}
+
static void gen11_dsi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
@@ -1204,6 +1232,7 @@ static void gen11_dsi_get_config(struct intel_encoder
*encoder,
pipe_config->port_clock =
cnl_calc_wrpll_link(dev_priv, _config->dpll_hw_state);
pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk;
+ gen11_dsi_get_timings(encoder, pipe_config);
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
}
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index dd65d7c..c8cfddc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7736,9 +7736,14 @@ static void intel_get_pipe_timings(struct intel_crtc
*crtc,
tmp = I915_READ(HTOTAL(cpu_transcoder));
pipe_config->base.adjusted_mode.crtc_hdisplay = (tmp & 0x) + 1;
pipe_config->base.adjusted_mode.crtc_htotal = ((tmp >> 16) & 0x) +
1;
- tmp = I915_READ(HBLANK(cpu_transcoder));
- pipe_config->base.adjusted_mode.crtc_hblank_start = (tmp & 0x) + 1;
- pipe_config->base.adjusted_mode.crtc_hblank_end = ((tmp >> 16) &
0x) + 1;
+
+ if (!transcoder_is_dsi(cpu_transcoder)) {
+ tmp = I915_READ(HBLANK(cpu_transcoder));
+ pipe_config->base.adjusted_mode.crtc_hblank_start =
+ (tmp & 0x) + 1;
+ pipe_config->base.adjusted_mode.crtc_hblank_end =
+ ((tmp >> 16) & 0x) + 1;
+ }
tmp = I915_READ(HSYNC(cpu_transcoder));
pipe_config->base.adjusted_mode.crtc_hsync_start = (tmp & 0x) + 1;
pipe_config->base.adjusted_mode.crtc_hsync_end = ((tmp >> 16) & 0x)
+ 1;
@@ -7746,9 +7751,14 @@ static void intel_get_pipe_timings(struct intel_crtc
*crtc,
tmp = I915_READ(VTOTAL(cpu_transcoder));
pipe_config->base.adjusted_mode.crtc_vdisplay = (tmp & 0x) + 1;
pipe_config->base.adjusted_mode.crtc_vtotal = ((tmp >> 16) & 0x) +
1;
- tmp = I915_READ(VBLANK(cpu_transcoder));
- pipe_config->base.adjusted_mode.crtc_vblank_start = (tmp & 0x) + 1;
- pipe_config->base.adjusted_mode.crtc_vblank_end = ((tmp >> 16) &
0x) + 1;
+
+ if (!transcoder_is_dsi(cpu_transcoder)) {
+ tmp = I915_READ(VBLANK(cpu_transcoder));
+ pipe_config->base.adjusted_mode.crtc_vblank_start =
+ (tmp & 0x) + 1;
+ pipe_config->base.adjusted_mode.crtc_vblank_end =
+ ((tmp >> 16) & 0x) + 1;
+ }
tmp = I915_READ(VSYNC(cpu_transcoder));
pipe_config->base.adjusted_mode.crtc_vsync_start = (tmp & 0x) + 1;
[Intel-gfx] [v5 2/4] drm/i915: Refactor bdw_get_pipemisc_bpp
Move bdw_get_pipemisc_bpp alongside bdw_set_pipemisc
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/intel_display.c | 22 ++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/vlv_dsi.c | 22 --
3 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index c8cfddc..bbdb1ff 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8946,6 +8946,28 @@ static void bdw_set_pipemisc(const struct
intel_crtc_state *crtc_state)
I915_WRITE(PIPEMISC(crtc->pipe), val);
}
+int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
+{
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ u32 tmp;
+
+ tmp = I915_READ(PIPEMISC(crtc->pipe));
+
+ switch (tmp & PIPEMISC_DITHER_BPC_MASK) {
+ case PIPEMISC_DITHER_6_BPC:
+ return 18;
+ case PIPEMISC_DITHER_8_BPC:
+ return 24;
+ case PIPEMISC_DITHER_10_BPC:
+ return 30;
+ case PIPEMISC_DITHER_12_BPC:
+ return 36;
+ default:
+ MISSING_CASE(tmp);
+ return 0;
+ }
+}
+
int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp)
{
/*
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 57ae396..ba75842 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1759,6 +1759,7 @@ u32 skl_plane_stride(const struct intel_plane_state
*plane_state,
unsigned int i9xx_plane_max_stride(struct intel_plane *plane,
u32 pixel_format, u64 modifier,
unsigned int rotation);
+int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);
/* intel_runtime_pm.c */
static inline void
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index bc5b782..895ea1a 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -262,28 +262,6 @@ static void band_gap_reset(struct drm_i915_private
*dev_priv)
vlv_flisdsi_put(dev_priv);
}
-static int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
-{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 tmp;
-
- tmp = I915_READ(PIPEMISC(crtc->pipe));
-
- switch (tmp & PIPEMISC_DITHER_BPC_MASK) {
- case PIPEMISC_DITHER_6_BPC:
- return 18;
- case PIPEMISC_DITHER_8_BPC:
- return 24;
- case PIPEMISC_DITHER_10_BPC:
- return 30;
- case PIPEMISC_DITHER_12_BPC:
- return 36;
- default:
- MISSING_CASE(tmp);
- return 0;
- }
-}
-
static int intel_dsi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
--
1.9.1
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[Intel-gfx] [v5 3/4] drm/i915: Fix pipe config mismatch for bpp, output format
Read back the pixel fomrat register and get the bpp.
v2: Read the PIPE_MISC register (Jani).
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/icl_dsi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index 45fe69c..cd6a4f3 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -1226,6 +1226,7 @@ static void gen11_dsi_get_config(struct intel_encoder
*encoder,
struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(>base);
/* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */
@@ -1234,6 +1235,7 @@ static void gen11_dsi_get_config(struct intel_encoder
*encoder,
pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk;
gen11_dsi_get_timings(encoder, pipe_config);
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
+ pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
}
static int gen11_dsi_compute_config(struct intel_encoder *encoder,
@@ -1249,6 +1251,7 @@ static int gen11_dsi_compute_config(struct intel_encoder
*encoder,
struct drm_display_mode *adjusted_mode =
_config->base.adjusted_mode;
+ pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
intel_pch_panel_fitting(crtc, pipe_config, conn_state->scaling_mode);
--
1.9.1
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[Intel-gfx] [v5 4/4] drm/i915: Fix pixel clock and crtc clock config mismatch
In case of dual link mode, the mode clock that we get from the VBT is halved. v2: Simplify the calculation (Jani). Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/icl_dsi.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index cd6a4f3..46b3d30 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -1232,7 +1232,11 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, /* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */ pipe_config->port_clock = cnl_calc_wrpll_link(dev_priv, _config->dpll_hw_state); + pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk; + if (intel_dsi->dual_link) + pipe_config->base.adjusted_mode.crtc_clock *= 2; + gen11_dsi_get_timings(encoder, pipe_config); pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/dp: use logical operators with boolean type
Em qui, 2019-05-02 às 11:29 +0300, Jani Nikula escreveu: > Using arithmetic operators with booleans is confusing. Switch to logical > operators. > > Cc: Paulo Zanoni > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_dp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 4e7b8d..ef4992f 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -5094,7 +5094,7 @@ static void icl_update_tc_port_type(struct > drm_i915_private *dev_priv, > enum port port = intel_dig_port->base.port; > enum tc_port_type old_type = intel_dig_port->tc_type; > > - WARN_ON(is_legacy + is_typec + is_tbt != 1); > + WARN_ON(is_legacy || is_typec || !is_tbt); This changes the meaning. You're interpreting this as: WARN_ON(is_legacy + is_typec + (is_tbt != 1)) while the original intent of the code is to be: WARN_ON((is_legacy + is_typec + is_tbt) != 1) and a quick check on operator precedence tables leads me to think the original code is indeed correct. We're asserting exactly one of these bools enabled, so the logic operation would be something like: WARN_ON((is_legacy && (is_typec || is_tbt)) || (is_typec && (is_legacy || is_tbt)) || (is_tbt && (is_legacy || is_typec)) || (!is_legacy && !is_typec && !is_tbt)) I would still prefer the arithmetic operation. > > if (is_legacy) > intel_dig_port->tc_type = TC_PORT_LEGACY; ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for RFC: console: hack up console_trylock more
== Series Details == Series: RFC: console: hack up console_trylock more URL : https://patchwork.freedesktop.org/series/60212/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5a15dd2f624b RFC: console: hack up console_trylock more -:73: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files #73: FILE: include/linux/semaphore.h:43: +extern int __must_check __down_trylock(struct semaphore *sem); -:133: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Daniel Vetter ' total: 0 errors, 1 warnings, 1 checks, 54 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers
Framebuffer formats P01x are supported by GLK, but the function which
handles CSC on plane color control register, still expectes the input
buffer to be REC709. This can cause inaccurate output for direct P01x
flips.
This patch checks if the color_encoding property is set to YCBCR_2020,
and enables the corresponding color conversion mode on plane CSC.
PS: renamed variable plane_color_ctl to color_ctl for 80 char stuff.
V2: Expose the YCBCR_BT2020 value in enum values of supported encoding
formats.
Cc: Ville Syrjala
Cc: Maarten Lankhorst
Cc: Uma Shankar
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/i915/intel_display.c | 26 --
drivers/gpu/drm/i915/intel_sprite.c | 10 --
2 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index dd65d7c521c1..2d4d3128bf1f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3868,24 +3868,30 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state
*crtc_state,
to_i915(plane_state->base.plane->dev);
const struct drm_framebuffer *fb = plane_state->base.fb;
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
- u32 plane_color_ctl = 0;
+ u32 color_ctl = 0;
- plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
- plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
+ color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
+ color_ctl |= glk_plane_color_ctl_alpha(plane_state);
if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv, plane->id)) {
- if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
- plane_color_ctl |=
PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
- else
- plane_color_ctl |=
PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709;
+ switch (plane_state->base.color_encoding) {
+ case DRM_COLOR_YCBCR_BT709:
+ color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+ break;
+ case DRM_COLOR_YCBCR_BT2020:
+ color_ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+ break;
+ default:
+ color_ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709;
+ }
if (plane_state->base.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- plane_color_ctl |=
PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+ color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
} else if (fb->format->is_yuv) {
- plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
+ color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
}
- return plane_color_ctl;
+ return color_ctl;
}
static int
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
index 2913e89280d7..f1024c2f47cb 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -2238,6 +2238,7 @@ skl_universal_plane_create(struct drm_i915_private
*dev_priv,
struct intel_plane *plane;
enum drm_plane_type plane_type;
unsigned int supported_rotations;
+ unsigned int supported_encodings;
unsigned int possible_crtcs;
const u64 *modifiers;
const u32 *formats;
@@ -2325,9 +2326,14 @@ skl_universal_plane_create(struct drm_i915_private
*dev_priv,
DRM_MODE_ROTATE_0,
supported_rotations);
+ supported_encodings = BIT(DRM_COLOR_YCBCR_BT601) |
+ BIT(DRM_COLOR_YCBCR_BT709);
+
+ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+ supported_encodings |= DRM_COLOR_YCBCR_BT2020;
+
drm_plane_create_color_properties(>base,
- BIT(DRM_COLOR_YCBCR_BT601) |
- BIT(DRM_COLOR_YCBCR_BT709),
+ supported_encodings,
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
BIT(DRM_COLOR_YCBCR_FULL_RANGE),
DRM_COLOR_YCBCR_BT709,
--
2.17.1
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Re: [Intel-gfx] [PATCH 00/13] drm/i915: the great header refactoring, part three
Quoting Jani Nikula (2019-05-02 16:02:34) > Continue the header refactoring started in [1] and [2]. > > BR, > Jani. > > [1] https://patchwork.freedesktop.org/series/59022/ > [2] https://patchwork.freedesktop.org/series/60060/ > > Jani Nikula (13): > drm/i915/dvo: move DVO chip types to intel_dvo.c > drm/i915/dsi: move operation mode types to intel_dsi.h > drm/i915: move ranges to intel_display.c > drm/i915: remove unused/stale macros and comments from intel_drv.h > drm/i915/csr: move CSR version macros to intel_csr.h > drm/i915: extract intel_dpio_phy.h from i915_drv.h > drm/i915: extract intel_lpe_audio.h from i915_drv.h > drm/i915: extract intel_acpi.h from i915_drv.h > drm/i915: extract i915_debugfs.h from i915_drv.h > drm/i915: move i915_vgacntrl_reg() where needed > drm/i915: make i915_utils.h self-contained > drm/i915: move more generic utils to i915_utils.h > drm/i915: extract intel_gmbus.h from i915_drv.h and rename intel_i2c.c Lots of small changes that look good. Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 12/13] drm/i915: move more generic utils to i915_utils.h
Quoting Jani Nikula (2019-05-02 16:02:46) > Reduce clutter from i915_drv.h and intel_drv.h. > > Signed-off-by: Jani Nikula Makes sense. Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v4,1/4] drm/i915: Fix the pipe state timing mismatch warnings
== Series Details == Series: series starting with [v4,1/4] drm/i915: Fix the pipe state timing mismatch warnings URL : https://patchwork.freedesktop.org/series/60210/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/i915/header_test_intel_sideband.o CC [M] drivers/gpu/drm/i915/header_test_intel_sprite.o CC [M] drivers/gpu/drm/i915/header_test_intel_tv.o CC [M] drivers/gpu/drm/i915/header_test_intel_uncore.o CC [M] drivers/gpu/drm/i915/header_test_intel_vdsc.o CC [M] drivers/gpu/drm/i915/header_test_intel_wakeref.o CC [M] drivers/gpu/drm/i915/intel_display.o drivers/gpu/drm/i915/intel_display.c: In function ‘intel_get_pipe_timings’: drivers/gpu/drm/i915/intel_display.c:7740:2: error: this ‘if’ clause does not guard... [-Werror=misleading-indentation] if (!transcoder_is_dsi(cpu_transcoder)) ^~ drivers/gpu/drm/i915/intel_display.c:7742:3: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’ pipe_config->base.adjusted_mode.crtc_hblank_start = ^~~ drivers/gpu/drm/i915/intel_display.c:7754:2: error: this ‘if’ clause does not guard... [-Werror=misleading-indentation] if (!transcoder_is_dsi(cpu_transcoder)) ^~ drivers/gpu/drm/i915/intel_display.c:7756:3: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’ pipe_config->base.adjusted_mode.crtc_vblank_start = ^~~ cc1: all warnings being treated as errors scripts/Makefile.build:275: recipe for target 'drivers/gpu/drm/i915/intel_display.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_display.o] Error 1 scripts/Makefile.build:486: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:486: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:486: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1051: recipe for target 'drivers' failed make: *** [drivers] Error 2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 13/13] drm/i915: extract intel_gmbus.h from i915_drv.h and rename intel_i2c.c
It used to be handy that we only had a couple of headers, but over time
i915_drv.h has become unwieldy. Extract declarations to a separate
header file corresponding to the implementation module, clarifying the
modularity of the driver.
Ensure the new header is self-contained, and do so with minimal further
includes, using forward declarations as needed. Include the new header
only where needed, and sort the modified include directives while at it
and as needed.
While at it, rename intel_i2c.c to intel_gmbus.c and the functions to
intel_gmbus_*.
No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/Makefile.header-test | 1 +
drivers/gpu/drm/i915/i915_drv.c | 5 ++--
drivers/gpu/drm/i915/i915_drv.h | 17
drivers/gpu/drm/i915/i915_suspend.c | 3 ++-
drivers/gpu/drm/i915/intel_bios.c | 2 ++
drivers/gpu/drm/i915/intel_crt.c | 1 +
drivers/gpu/drm/i915/intel_ddi.c | 1 +
drivers/gpu/drm/i915/intel_display.c | 3 ++-
drivers/gpu/drm/i915/intel_dvo.c | 1 +
.../drm/i915/{intel_i2c.c => intel_gmbus.c} | 27 +--
drivers/gpu/drm/i915/intel_gmbus.h| 27 +++
drivers/gpu/drm/i915/intel_hdmi.c | 1 +
drivers/gpu/drm/i915/intel_lvds.c | 1 +
drivers/gpu/drm/i915/intel_sdvo.c | 1 +
15 files changed, 63 insertions(+), 30 deletions(-)
rename drivers/gpu/drm/i915/{intel_i2c.c => intel_gmbus.c} (98%)
create mode 100644 drivers/gpu/drm/i915/intel_gmbus.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 586433..68106f 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -176,8 +176,8 @@ i915-y += dvo_ch7017.o \
intel_dsi_dcs_backlight.o \
intel_dsi_vbt.o \
intel_dvo.o \
+ intel_gmbus.o \
intel_hdmi.o \
- intel_i2c.o \
intel_lspcon.o \
intel_lvds.o \
intel_panel.o \
diff --git a/drivers/gpu/drm/i915/Makefile.header-test
b/drivers/gpu/drm/i915/Makefile.header-test
index f71ea7..2ca4a5f 100644
--- a/drivers/gpu/drm/i915/Makefile.header-test
+++ b/drivers/gpu/drm/i915/Makefile.header-test
@@ -42,6 +42,7 @@ header_test := \
intel_fbdev.h \
intel_fifo_underrun.h \
intel_frontbuffer.h \
+ intel_gmbus.h \
intel_hdcp.h \
intel_hdmi.h \
intel_hotplug.h \
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 57060a6..e6ce530 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -65,6 +65,7 @@
#include "intel_dp.h"
#include "intel_drv.h"
#include "intel_fbdev.h"
+#include "intel_gmbus.h"
#include "intel_hotplug.h"
#include "intel_overlay.h"
#include "intel_pipe_crc.h"
@@ -705,7 +706,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
if (ret)
goto cleanup_csr;
- intel_setup_gmbus(dev_priv);
+ intel_gmbus_setup(dev_priv);
/* Important: The output setup functions called by modeset_init need
* working irqs for e.g. gmbus and dp aux transfers. */
@@ -740,7 +741,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
intel_modeset_cleanup(dev);
cleanup_irq:
drm_irq_uninstall(dev);
- intel_teardown_gmbus(dev_priv);
+ intel_gmbus_teardown(dev_priv);
cleanup_csr:
intel_csr_ucode_fini(dev_priv);
intel_power_domains_fini_hw(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d16705..64fa35 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3235,23 +3235,6 @@ extern int i915_restore_state(struct drm_i915_private
*dev_priv);
void i915_setup_sysfs(struct drm_i915_private *dev_priv);
void i915_teardown_sysfs(struct drm_i915_private *dev_priv);
-/* intel_i2c.c */
-extern int intel_setup_gmbus(struct drm_i915_private *dev_priv);
-extern void intel_teardown_gmbus(struct drm_i915_private *dev_priv);
-extern bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
-unsigned int pin);
-extern int intel_gmbus_output_aksv(struct i2c_adapter *adapter);
-
-extern struct i2c_adapter *
-intel_gmbus_get_adapter(struct drm_i915_private *dev_priv, unsigned int pin);
-extern void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed);
-extern void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit);
-static inline bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter)
-{
- return container_of(adapter, struct intel_gmbus, adapter)->force_bit;
-}
-extern void intel_i2c_reset(struct drm_i915_private *dev_priv);
-
/* intel_device_info.c */
static inline struct intel_device_info *
mkwrite_device_info(struct drm_i915_private *dev_priv)
[Intel-gfx] [PATCH 11/13] drm/i915: make i915_utils.h self-contained
And ensure it stays that way.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile.header-test | 1 +
drivers/gpu/drm/i915/i915_utils.h | 6 --
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Makefile.header-test
b/drivers/gpu/drm/i915/Makefile.header-test
index b61fd8..f71ea7 100644
--- a/drivers/gpu/drm/i915/Makefile.header-test
+++ b/drivers/gpu/drm/i915/Makefile.header-test
@@ -14,6 +14,7 @@ header_test := \
i915_reg.h \
i915_scheduler_types.h \
i915_timeline_types.h \
+ i915_utils.h \
intel_acpi.h \
intel_atomic.h \
intel_atomic_plane.h \
diff --git a/drivers/gpu/drm/i915/i915_utils.h
b/drivers/gpu/drm/i915/i915_utils.h
index 2dbe89..26117b 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -25,6 +25,10 @@
#ifndef __I915_UTILS_H
#define __I915_UTILS_H
+#include
+#include
+#include
+
#undef WARN_ON
/* Many gcc seem to no see through this and fall over :( */
#if 0
@@ -152,8 +156,6 @@ static inline u64 ptr_to_u64(const void *ptr)
__idx; \
})
-#include
-
static inline void __list_del_many(struct list_head *head,
struct list_head *first)
{
--
2.20.1
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[Intel-gfx] [PATCH 10/13] drm/i915: move i915_vgacntrl_reg() where needed
Reduce clutter from i915_drv.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 10 --
drivers/gpu/drm/i915/intel_display.c | 10 ++
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a4ae6e..5f65c7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3357,16 +3357,6 @@ extern void intel_display_print_error_state(struct
drm_i915_error_state_buf *e,
#define INTEL_BROADCAST_RGB_FULL 1
#define INTEL_BROADCAST_RGB_LIMITED 2
-static inline i915_reg_t i915_vgacntrl_reg(struct drm_i915_private *dev_priv)
-{
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- return VLV_VGACNTRL;
- else if (INTEL_GEN(dev_priv) >= 5)
- return CPU_VGACNTRL;
- else
- return VGACNTRL;
-}
-
static inline unsigned long msecs_to_jiffies_timeout(const unsigned int m)
{
unsigned long j = msecs_to_jiffies(m);
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 019eccf..b542371 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15485,6 +15485,16 @@ void intel_init_display_hooks(struct drm_i915_private
*dev_priv)
dev_priv->display.update_crtcs = intel_update_crtcs;
}
+static i915_reg_t i915_vgacntrl_reg(struct drm_i915_private *dev_priv)
+{
+ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ return VLV_VGACNTRL;
+ else if (INTEL_GEN(dev_priv) >= 5)
+ return CPU_VGACNTRL;
+ else
+ return VGACNTRL;
+}
+
/* Disable the VGA plane that we never use */
static void i915_disable_vga(struct drm_i915_private *dev_priv)
{
--
2.20.1
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[Intel-gfx] [PATCH 12/13] drm/i915: move more generic utils to i915_utils.h
Reduce clutter from i915_drv.h and intel_drv.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 44 -
drivers/gpu/drm/i915/i915_utils.h | 153 ++
drivers/gpu/drm/i915/intel_drv.h | 108 -
3 files changed, 153 insertions(+), 152 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5f65c7..d16705 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3357,50 +3357,6 @@ extern void intel_display_print_error_state(struct
drm_i915_error_state_buf *e,
#define INTEL_BROADCAST_RGB_FULL 1
#define INTEL_BROADCAST_RGB_LIMITED 2
-static inline unsigned long msecs_to_jiffies_timeout(const unsigned int m)
-{
- unsigned long j = msecs_to_jiffies(m);
-
- return min_t(unsigned long, MAX_JIFFY_OFFSET, j + 1);
-}
-
-static inline unsigned long nsecs_to_jiffies_timeout(const u64 n)
-{
- /* nsecs_to_jiffies64() does not guard against overflow */
- if (NSEC_PER_SEC % HZ &&
- div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ)
- return MAX_JIFFY_OFFSET;
-
-return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1);
-}
-
-/*
- * If you need to wait X milliseconds between events A and B, but event B
- * doesn't happen exactly after event A, you record the timestamp (jiffies) of
- * when event A happened, then just before event B you call this function and
- * pass the timestamp as the first argument, and X as the second argument.
- */
-static inline void
-wait_remaining_ms_from_jiffies(unsigned long timestamp_jiffies, int to_wait_ms)
-{
- unsigned long target_jiffies, tmp_jiffies, remaining_jiffies;
-
- /*
-* Don't re-read the value of "jiffies" every time since it may change
-* behind our back and break the math.
-*/
- tmp_jiffies = jiffies;
- target_jiffies = timestamp_jiffies +
-msecs_to_jiffies_timeout(to_wait_ms);
-
- if (time_after(target_jiffies, tmp_jiffies)) {
- remaining_jiffies = target_jiffies - tmp_jiffies;
- while (remaining_jiffies)
- remaining_jiffies =
- schedule_timeout_uninterruptible(remaining_jiffies);
- }
-}
-
void i915_memcpy_init_early(struct drm_i915_private *dev_priv);
bool i915_memcpy_from_wc(void *dst, const void *src, unsigned long len);
diff --git a/drivers/gpu/drm/i915/i915_utils.h
b/drivers/gpu/drm/i915/i915_utils.h
index 26117b..c849cfa 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -26,6 +26,7 @@
#define __I915_UTILS_H
#include
+#include
#include
#include
@@ -176,6 +177,158 @@ static inline void drain_delayed_work(struct delayed_work
*dw)
} while (delayed_work_pending(dw));
}
+static inline unsigned long msecs_to_jiffies_timeout(const unsigned int m)
+{
+ unsigned long j = msecs_to_jiffies(m);
+
+ return min_t(unsigned long, MAX_JIFFY_OFFSET, j + 1);
+}
+
+static inline unsigned long nsecs_to_jiffies_timeout(const u64 n)
+{
+ /* nsecs_to_jiffies64() does not guard against overflow */
+ if (NSEC_PER_SEC % HZ &&
+ div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ)
+ return MAX_JIFFY_OFFSET;
+
+return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1);
+}
+
+/*
+ * If you need to wait X milliseconds between events A and B, but event B
+ * doesn't happen exactly after event A, you record the timestamp (jiffies) of
+ * when event A happened, then just before event B you call this function and
+ * pass the timestamp as the first argument, and X as the second argument.
+ */
+static inline void
+wait_remaining_ms_from_jiffies(unsigned long timestamp_jiffies, int to_wait_ms)
+{
+ unsigned long target_jiffies, tmp_jiffies, remaining_jiffies;
+
+ /*
+* Don't re-read the value of "jiffies" every time since it may change
+* behind our back and break the math.
+*/
+ tmp_jiffies = jiffies;
+ target_jiffies = timestamp_jiffies +
+msecs_to_jiffies_timeout(to_wait_ms);
+
+ if (time_after(target_jiffies, tmp_jiffies)) {
+ remaining_jiffies = target_jiffies - tmp_jiffies;
+ while (remaining_jiffies)
+ remaining_jiffies =
+ schedule_timeout_uninterruptible(remaining_jiffies);
+ }
+}
+
+/**
+ * __wait_for - magic wait macro
+ *
+ * Macro to help avoid open coding check/wait/timeout patterns. Note that it's
+ * important that we check the condition again after having timed out, since
the
+ * timeout could be due to preemption or similar and we've never had a chance
to
+ * check the condition before the timeout.
+ */
+#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \
+ const ktime_t end__ = ktime_add_ns(ktime_get_raw(), 1000ll * (US)); \
+ long
[Intel-gfx] [PATCH 09/13] drm/i915: extract i915_debugfs.h from i915_drv.h
It used to be handy that we only had a couple of headers, but over time
i915_drv.h has become unwieldy. Extract declarations to a separate
header file corresponding to the implementation module, clarifying the
modularity of the driver.
Ensure the new header is self-contained, and do so with minimal further
includes, using forward declarations as needed. Include the new header
only where needed, and sort the modified include directives while at it
and as needed.
No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile.header-test | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 1 +
drivers/gpu/drm/i915/i915_debugfs.h | 20
drivers/gpu/drm/i915/i915_drv.c | 2 ++
drivers/gpu/drm/i915/i915_drv.h | 12
drivers/gpu/drm/i915/intel_dp.c | 1 +
drivers/gpu/drm/i915/intel_hdmi.c | 1 +
drivers/gpu/drm/i915/intel_pipe_crc.h | 3 +++
8 files changed, 29 insertions(+), 12 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_debugfs.h
diff --git a/drivers/gpu/drm/i915/Makefile.header-test
b/drivers/gpu/drm/i915/Makefile.header-test
index c1fa85..b61fd8 100644
--- a/drivers/gpu/drm/i915/Makefile.header-test
+++ b/drivers/gpu/drm/i915/Makefile.header-test
@@ -4,6 +4,7 @@
# Test the headers are compilable as standalone units
header_test := \
i915_active_types.h \
+ i915_debugfs.h \
i915_drv.h \
i915_gem_context_types.h \
i915_gem_pm.h \
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 0d7d19..14cd83 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -34,6 +34,7 @@
#include "gt/intel_reset.h"
+#include "i915_debugfs.h"
#include "i915_gem_context.h"
#include "i915_irq.h"
#include "intel_csr.h"
diff --git a/drivers/gpu/drm/i915/i915_debugfs.h
b/drivers/gpu/drm/i915/i915_debugfs.h
new file mode 100644
index 00..c0cd22e
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_debugfs.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef __I915_DEBUGFS_H__
+#define __I915_DEBUGFS_H__
+
+struct drm_i915_private;
+struct drm_connector;
+
+#ifdef CONFIG_DEBUG_FS
+int i915_debugfs_register(struct drm_i915_private *dev_priv);
+int i915_debugfs_connector_add(struct drm_connector *connector);
+#else
+static inline int i915_debugfs_register(struct drm_i915_private *dev_priv) {
return 0; }
+static inline int i915_debugfs_connector_add(struct drm_connector *connector)
{ return 0; }
+#endif
+
+#endif /* __I915_DEBUGFS_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c011a1b..57060a6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -51,6 +51,7 @@
#include "gt/intel_reset.h"
#include "gt/intel_workarounds.h"
+#include "i915_debugfs.h"
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_pmu.h"
@@ -66,6 +67,7 @@
#include "intel_fbdev.h"
#include "intel_hotplug.h"
#include "intel_overlay.h"
+#include "intel_pipe_crc.h"
#include "intel_pm.h"
#include "intel_sprite.h"
#include "intel_uc.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6ddc3d..a4ae6e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3208,18 +3208,6 @@ u32 i915_gem_fence_size(struct drm_i915_private
*dev_priv, u32 size,
u32 i915_gem_fence_alignment(struct drm_i915_private *dev_priv, u32 size,
unsigned int tiling, unsigned int stride);
-/* i915_debugfs.c */
-#ifdef CONFIG_DEBUG_FS
-int i915_debugfs_register(struct drm_i915_private *dev_priv);
-int i915_debugfs_connector_add(struct drm_connector *connector);
-void intel_display_crc_init(struct drm_i915_private *dev_priv);
-#else
-static inline int i915_debugfs_register(struct drm_i915_private *dev_priv)
{return 0;}
-static inline int i915_debugfs_connector_add(struct drm_connector *connector)
-{ return 0; }
-static inline void intel_display_crc_init(struct drm_i915_private *dev_priv) {}
-#endif
-
const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
/* i915_cmd_parser.c */
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 04d64b..91380c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -42,6 +42,7 @@
#include
#include
+#include "i915_debugfs.h"
#include "i915_drv.h"
#include "intel_atomic.h"
#include "intel_audio.h"
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 571e6b..f76327 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -39,6 +39,7 @@
#include
#include
+#include "i915_debugfs.h"
#include "i915_drv.h"
#include "intel_atomic.h"
#include "intel_audio.h"
diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.h
[Intel-gfx] [PATCH 07/13] drm/i915: extract intel_lpe_audio.h from i915_drv.h
It used to be handy that we only had a couple of headers, but over time i915_drv.h has become unwieldy. Extract declarations to a separate header file corresponding to the implementation module, clarifying the modularity of the driver. Ensure the new header is self-contained, and do so with minimal further includes, using forward declarations as needed. Include the new header only where needed, and sort the modified include directives while at it and as needed. No functional changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/i915_drv.h | 8 drivers/gpu/drm/i915/i915_irq.c | 1 + drivers/gpu/drm/i915/intel_audio.c| 2 +- drivers/gpu/drm/i915/intel_lpe_audio.c| 8 +--- drivers/gpu/drm/i915/intel_lpe_audio.h| 22 ++ 6 files changed, 30 insertions(+), 12 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_lpe_audio.h diff --git a/drivers/gpu/drm/i915/Makefile.header-test b/drivers/gpu/drm/i915/Makefile.header-test index 459b84..4375ff4 100644 --- a/drivers/gpu/drm/i915/Makefile.header-test +++ b/drivers/gpu/drm/i915/Makefile.header-test @@ -42,6 +42,7 @@ header_test := \ intel_hdcp.h \ intel_hdmi.h \ intel_hotplug.h \ + intel_lpe_audio.h \ intel_lspcon.h \ intel_lvds.h \ intel_overlay.h \ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 85cc5e1..91efe28 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3247,14 +3247,6 @@ extern int i915_restore_state(struct drm_i915_private *dev_priv); void i915_setup_sysfs(struct drm_i915_private *dev_priv); void i915_teardown_sysfs(struct drm_i915_private *dev_priv); -/* intel_lpe_audio.c */ -int intel_lpe_audio_init(struct drm_i915_private *dev_priv); -void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv); -void intel_lpe_audio_irq_handler(struct drm_i915_private *dev_priv); -void intel_lpe_audio_notify(struct drm_i915_private *dev_priv, - enum pipe pipe, enum port port, - const void *eld, int ls_clock, bool dp_output); - /* intel_i2c.c */ extern int intel_setup_gmbus(struct drm_i915_private *dev_priv); extern void intel_teardown_gmbus(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index e31137b..233211 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -43,6 +43,7 @@ #include "intel_drv.h" #include "intel_fifo_underrun.h" #include "intel_hotplug.h" +#include "intel_lpe_audio.h" #include "intel_psr.h" /** diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 5c0b73..840daff12 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c @@ -26,11 +26,11 @@ #include #include -#include #include "i915_drv.h" #include "intel_audio.h" #include "intel_drv.h" +#include "intel_lpe_audio.h" /** * DOC: High Definition Audio over HDMI and Display Port diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c b/drivers/gpu/drm/i915/intel_lpe_audio.c index f8239bca..b19800 100644 --- a/drivers/gpu/drm/i915/intel_lpe_audio.c +++ b/drivers/gpu/drm/i915/intel_lpe_audio.c @@ -61,16 +61,18 @@ */ #include +#include #include #include #include -#include #include +#include -#include "i915_drv.h" -#include #include +#include "i915_drv.h" +#include "intel_lpe_audio.h" + #define HAS_LPE_AUDIO(dev_priv) ((dev_priv)->lpe_audio.platdev != NULL) static struct platform_device * diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.h b/drivers/gpu/drm/i915/intel_lpe_audio.h new file mode 100644 index 00..f848c5 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_lpe_audio.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2019 Intel Corporation + */ + +#ifndef __INTEL_LPE_AUDIO_H__ +#define __INTEL_LPE_AUDIO_H__ + +#include + +enum pipe; +enum port; +struct drm_i915_private; + +int intel_lpe_audio_init(struct drm_i915_private *dev_priv); +void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv); +void intel_lpe_audio_irq_handler(struct drm_i915_private *dev_priv); +void intel_lpe_audio_notify(struct drm_i915_private *dev_priv, + enum pipe pipe, enum port port, + const void *eld, int ls_clock, bool dp_output); + +#endif /* __INTEL_LPE_AUDIO_H__ */ -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 08/13] drm/i915: extract intel_acpi.h from i915_drv.h
It used to be handy that we only had a couple of headers, but over time
i915_drv.h has become unwieldy. Extract declarations to a separate
header file corresponding to the implementation module, clarifying the
modularity of the driver.
Ensure the new header is self-contained, and do so with minimal further
includes, using forward declarations as needed. Include the new header
only where needed, and sort the modified include directives while at it
and as needed.
No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile.header-test | 1 +
drivers/gpu/drm/i915/i915_drv.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 9 -
drivers/gpu/drm/i915/intel_acpi.c | 3 +++
drivers/gpu/drm/i915/intel_acpi.h | 17 +
drivers/gpu/drm/i915/intel_display.c | 1 +
6 files changed, 23 insertions(+), 9 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_acpi.h
diff --git a/drivers/gpu/drm/i915/Makefile.header-test
b/drivers/gpu/drm/i915/Makefile.header-test
index 4375ff4..c1fa85 100644
--- a/drivers/gpu/drm/i915/Makefile.header-test
+++ b/drivers/gpu/drm/i915/Makefile.header-test
@@ -13,6 +13,7 @@ header_test := \
i915_reg.h \
i915_scheduler_types.h \
i915_timeline_types.h \
+ intel_acpi.h \
intel_atomic.h \
intel_atomic_plane.h \
intel_audio.h \
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 21dac5..c011a1b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -57,6 +57,7 @@
#include "i915_query.h"
#include "i915_trace.h"
#include "i915_vgpu.h"
+#include "intel_acpi.h"
#include "intel_audio.h"
#include "intel_cdclk.h"
#include "intel_csr.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 91efe28..6ddc3d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3264,15 +3264,6 @@ static inline bool intel_gmbus_is_forced_bit(struct
i2c_adapter *adapter)
}
extern void intel_i2c_reset(struct drm_i915_private *dev_priv);
-/* intel_acpi.c */
-#ifdef CONFIG_ACPI
-extern void intel_register_dsm_handler(void);
-extern void intel_unregister_dsm_handler(void);
-#else
-static inline void intel_register_dsm_handler(void) { return; }
-static inline void intel_unregister_dsm_handler(void) { return; }
-#endif /* CONFIG_ACPI */
-
/* intel_device_info.c */
static inline struct intel_device_info *
mkwrite_device_info(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_acpi.c
b/drivers/gpu/drm/i915/intel_acpi.c
index 9d142d..3456d33 100644
--- a/drivers/gpu/drm/i915/intel_acpi.c
+++ b/drivers/gpu/drm/i915/intel_acpi.c
@@ -4,9 +4,12 @@
*
* _DSM related code stolen from nouveau_acpi.c.
*/
+
#include
#include
+
#include "i915_drv.h"
+#include "intel_acpi.h"
#define INTEL_DSM_REVISION_ID 1 /* For Calpella anyway... */
#define INTEL_DSM_FN_PLATFORM_MUX_INFO 1 /* No args */
diff --git a/drivers/gpu/drm/i915/intel_acpi.h
b/drivers/gpu/drm/i915/intel_acpi.h
new file mode 100644
index 00..1c576b
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_acpi.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef __INTEL_ACPI_H__
+#define __INTEL_ACPI_H__
+
+#ifdef CONFIG_ACPI
+void intel_register_dsm_handler(void);
+void intel_unregister_dsm_handler(void);
+#else
+static inline void intel_register_dsm_handler(void) { return; }
+static inline void intel_unregister_dsm_handler(void) { return; }
+#endif /* CONFIG_ACPI */
+
+#endif /* __INTEL_ACPI_H__ */
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 6ebe000..019eccf 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -47,6 +47,7 @@
#include "i915_drv.h"
#include "i915_gem_clflush.h"
#include "i915_trace.h"
+#include "intel_acpi.h"
#include "intel_atomic.h"
#include "intel_atomic_plane.h"
#include "intel_color.h"
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 04/13] drm/i915: remove unused/stale macros and comments from intel_drv.h
Reduce clutter from intel_drv.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_drv.h | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 709647..addf6f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -158,15 +158,6 @@ struct drm_printer;
* Display related stuff
*/
-/* store information about an Ixxx DVO */
-/* The i830->i865 use multiple DVOs with multiple i2cs */
-/* the i915, i945 have a single sDVO i2c bus - which is different */
-#define MAX_OUTPUTS 6
-/* maximum connectors per crtcs in the mode set */
-
-#define INTEL_I2C_BUS_DVO 1
-#define INTEL_I2C_BUS_SDVO 2
-
/* these are outputs from the chip - integrated only
external chips are via DVO or SDVO output */
enum intel_output_type {
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 06/13] drm/i915: extract intel_dpio_phy.h from i915_drv.h
It used to be handy that we only had a couple of headers, but over time i915_drv.h has become unwieldy. Extract declarations to a separate header file corresponding to the implementation module, clarifying the modularity of the driver. Ensure the new header is self-contained, and do so with minimal further includes, using forward declarations as needed. Include the new header only where needed, and sort the modified include directives while at it and as needed. No functional changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/i915_drv.h | 41 drivers/gpu/drm/i915/intel_ddi.c | 1 + drivers/gpu/drm/i915/intel_dp.c | 1 + drivers/gpu/drm/i915/intel_dp_mst.c | 1 + drivers/gpu/drm/i915/intel_dpio_phy.c | 1 + drivers/gpu/drm/i915/intel_dpio_phy.h | 58 +++ drivers/gpu/drm/i915/intel_dpll_mgr.c | 1 + drivers/gpu/drm/i915/intel_hdmi.c | 1 + drivers/gpu/drm/i915/intel_runtime_pm.c | 1 + 10 files changed, 66 insertions(+), 41 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_dpio_phy.h diff --git a/drivers/gpu/drm/i915/Makefile.header-test b/drivers/gpu/drm/i915/Makefile.header-test index 95e4ee..459b84 100644 --- a/drivers/gpu/drm/i915/Makefile.header-test +++ b/drivers/gpu/drm/i915/Makefile.header-test @@ -28,6 +28,7 @@ header_test := \ intel_dp_aux_backlight.h \ intel_dp_link_training.h \ intel_dp_mst.h \ + intel_dpio_phy.h \ intel_dpll_mgr.h \ intel_drv.h \ intel_dsi.h \ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9e701d..85cc5e1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3313,47 +3313,6 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv); extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e, struct intel_display_error_state *error); -/* intel_dpio_phy.c */ -void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port, -enum dpio_phy *phy, enum dpio_channel *ch); -void bxt_ddi_phy_set_signal_level(struct drm_i915_private *dev_priv, - enum port port, u32 margin, u32 scale, - u32 enable, u32 deemphasis); -void bxt_ddi_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy); -void bxt_ddi_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy); -bool bxt_ddi_phy_is_enabled(struct drm_i915_private *dev_priv, - enum dpio_phy phy); -bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv, - enum dpio_phy phy); -u8 bxt_ddi_phy_calc_lane_lat_optim_mask(u8 lane_count); -void bxt_ddi_phy_set_lane_optim_mask(struct intel_encoder *encoder, -u8 lane_lat_optim_mask); -u8 bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder); - -void chv_set_phy_signal_level(struct intel_encoder *encoder, - u32 deemph_reg_value, u32 margin_reg_value, - bool uniq_trans_scale); -void chv_data_lane_soft_reset(struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state, - bool reset); -void chv_phy_pre_pll_enable(struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state); -void chv_phy_pre_encoder_enable(struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state); -void chv_phy_release_cl2_override(struct intel_encoder *encoder); -void chv_phy_post_pll_disable(struct intel_encoder *encoder, - const struct intel_crtc_state *old_crtc_state); - -void vlv_set_phy_signal_level(struct intel_encoder *encoder, - u32 demph_reg_value, u32 preemph_reg_value, - u32 uniqtranscale_reg_value, u32 tx3_demph); -void vlv_phy_pre_pll_enable(struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state); -void vlv_phy_pre_encoder_enable(struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state); -void vlv_phy_reset_lanes(struct intel_encoder *encoder, -const struct intel_crtc_state *old_crtc_state); - #define __I915_REG_OP(op__, dev_priv__, ...) \ intel_uncore_##op__(&(dev_priv__)->uncore, __VA_ARGS__) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index f5f58f..ec6ed93 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -34,6 +34,7 @@ #include "intel_ddi.h" #include "intel_dp.h" #include "intel_dp_link_training.h" +#include
[Intel-gfx] [PATCH 2/2] drm/i915: Leave engine parking to the engines
Drop the check in GEM parking that the engines were already parked. The
intention here was that before we dropped the GT wakeref, we were sure
that no more interrupts could be raised -- however, we have already
dropped the wakeref by this point and the warning is no longer valid.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_pm.c | 18 +-
1 file changed, 1 insertion(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_pm.c
b/drivers/gpu/drm/i915/i915_gem_pm.c
index 3b6e8d5be8e1..49b0ce594f20 100644
--- a/drivers/gpu/drm/i915/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/i915_gem_pm.c
@@ -17,24 +17,8 @@ static void i915_gem_park(struct drm_i915_private *i915)
lockdep_assert_held(>drm.struct_mutex);
- for_each_engine(engine, i915, id) {
- /*
-* We are committed now to parking the engines, make sure there
-* will be no more interrupts arriving later and the engines
-* are truly idle.
-*/
- if (wait_for(intel_engine_is_idle(engine), 10)) {
- struct drm_printer p = drm_debug_printer(__func__);
-
- dev_err(i915->drm.dev,
- "%s is not idle before parking\n",
- engine->name);
- intel_engine_dump(engine, , NULL);
- }
- tasklet_kill(>execlists.tasklet);
-
+ for_each_engine(engine, i915, id)
i915_gem_batch_pool_fini(>batch_pool);
- }
i915_timelines_park(i915);
i915_vma_parked(i915);
--
2.20.1
___
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[Intel-gfx] [PATCH 1/2] drm/i915/execlists: Flush the tasklet on parking
Tidy up the cleanup sequence by always ensure that the tasklet is
flushed on parking (before we cleanup). The parking provides a
convenient point to ensure that the backend is truly idle.
v2: Do the full check for idleness before parking, to be sure we flush
any residual interrupt.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 ++
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 27 +
drivers/gpu/drm/i915/gt/intel_engine_pm.h | 2 ++
drivers/gpu/drm/i915/gt/intel_lrc.c | 16 ++--
drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++
5 files changed, 35 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 763f34af55eb..797d8f0d0a6e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1097,6 +1097,8 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine)
if (READ_ONCE(engine->execlists.active)) {
struct tasklet_struct *t = >execlists.tasklet;
+ synchronize_irq(engine->i915->drm.irq);
+
local_bh_disable();
if (tasklet_trylock(t)) {
/* Must wait for any GPU reset in progress. */
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 3976aea3c1d1..ccf034764741 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -10,7 +10,7 @@
#include "intel_engine_pm.h"
#include "intel_gt_pm.h"
-static int intel_engine_unpark(struct intel_wakeref *wf)
+static int __engine_unpark(struct intel_wakeref *wf)
{
struct intel_engine_cs *engine =
container_of(wf, typeof(*engine), wakeref);
@@ -37,7 +37,24 @@ static int intel_engine_unpark(struct intel_wakeref *wf)
void intel_engine_pm_get(struct intel_engine_cs *engine)
{
- intel_wakeref_get(engine->i915, >wakeref, intel_engine_unpark);
+ intel_wakeref_get(engine->i915, >wakeref, __engine_unpark);
+}
+
+void intel_engine_park(struct intel_engine_cs *engine)
+{
+ /*
+* We are committed now to parking this engine, make sure there
+* will be no more interrupts arriving later and the engine
+* is truly idle.
+*/
+ if (wait_for(intel_engine_is_idle(engine), 10)) {
+ struct drm_printer p = drm_debug_printer(__func__);
+
+ dev_err(engine->i915->drm.dev,
+ "%s is not idle before parking\n",
+ engine->name);
+ intel_engine_dump(engine, , NULL);
+ }
}
static bool switch_to_kernel_context(struct intel_engine_cs *engine)
@@ -56,7 +73,7 @@ static bool switch_to_kernel_context(struct intel_engine_cs
*engine)
* Note, we do this without taking the timeline->mutex. We cannot
* as we may be called while retiring the kernel context and so
* already underneath the timeline->mutex. Instead we rely on the
-* exclusive property of the intel_engine_park that prevents anyone
+* exclusive property of the __engine_park that prevents anyone
* else from creating a request on this engine. This also requires
* that the ring is empty and we avoid any waits while constructing
* the context, as they assume protection by the timeline->mutex.
@@ -76,7 +93,7 @@ static bool switch_to_kernel_context(struct intel_engine_cs
*engine)
return false;
}
-static int intel_engine_park(struct intel_wakeref *wf)
+static int __engine_park(struct intel_wakeref *wf)
{
struct intel_engine_cs *engine =
container_of(wf, typeof(*engine), wakeref);
@@ -114,7 +131,7 @@ static int intel_engine_park(struct intel_wakeref *wf)
void intel_engine_pm_put(struct intel_engine_cs *engine)
{
- intel_wakeref_put(engine->i915, >wakeref, intel_engine_park);
+ intel_wakeref_put(engine->i915, >wakeref, __engine_park);
}
void intel_engine_init__pm(struct intel_engine_cs *engine)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.h
b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
index 143ac90ba117..b326cd993d60 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
@@ -13,6 +13,8 @@ struct intel_engine_cs;
void intel_engine_pm_get(struct intel_engine_cs *engine);
void intel_engine_pm_put(struct intel_engine_cs *engine);
+void intel_engine_park(struct intel_engine_cs *engine);
+
void intel_engine_init__pm(struct intel_engine_cs *engine);
int intel_engines_resume(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 22cc895aca1b..c4684bdfae07 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -136,6 +136,7 @@
#include "i915_drv.h"
#include
[Intel-gfx] [PATCH 05/13] drm/i915/csr: move CSR version macros to intel_csr.h
Reduce clutter from i915_drv.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 4
drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
drivers/gpu/drm/i915/intel_csr.h | 4
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 0e4dff..0d7d19 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -36,6 +36,7 @@
#include "i915_gem_context.h"
#include "i915_irq.h"
+#include "intel_csr.h"
#include "intel_dp.h"
#include "intel_drv.h"
#include "intel_fbc.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9a634b..9e701d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -345,10 +345,6 @@ struct drm_i915_display_funcs {
void (*load_luts)(const struct intel_crtc_state *crtc_state);
};
-#define CSR_VERSION(major, minor) ((major) << 16 | (minor))
-#define CSR_VERSION_MAJOR(version) ((version) >> 16)
-#define CSR_VERSION_MINOR(version) ((version) & 0x)
-
struct intel_csr {
struct work_struct work;
const char *fw_path;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index e1b858..4f85cbd 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -39,6 +39,7 @@
#include "i915_drv.h"
#include "i915_gpu_error.h"
#include "intel_atomic.h"
+#include "intel_csr.h"
#include "intel_overlay.h"
static inline const struct intel_engine_cs *
diff --git a/drivers/gpu/drm/i915/intel_csr.h b/drivers/gpu/drm/i915/intel_csr.h
index 17a32c..03c64f8 100644
--- a/drivers/gpu/drm/i915/intel_csr.h
+++ b/drivers/gpu/drm/i915/intel_csr.h
@@ -8,6 +8,10 @@
struct drm_i915_private;
+#define CSR_VERSION(major, minor) ((major) << 16 | (minor))
+#define CSR_VERSION_MAJOR(version) ((version) >> 16)
+#define CSR_VERSION_MINOR(version) ((version) & 0x)
+
void intel_csr_ucode_init(struct drm_i915_private *i915);
void intel_csr_load_program(struct drm_i915_private *i915);
void intel_csr_ucode_fini(struct drm_i915_private *i915);
--
2.20.1
___
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[Intel-gfx] [PATCH 03/13] drm/i915: move ranges to intel_display.c
Reduce clutter from intel_drv.h with the minimal change.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_display.c | 15 +++
drivers/gpu/drm/i915/intel_drv.h | 15 ---
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index dd65d7..6ebe000 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5062,6 +5062,21 @@ u16 skl_scaler_calc_phase(int sub, int scale, bool
chroma_cosited)
return ((phase >> 2) & PS_PHASE_MASK) | trip;
}
+#define SKL_MIN_SRC_W 8
+#define SKL_MAX_SRC_W 4096
+#define SKL_MIN_SRC_H 8
+#define SKL_MAX_SRC_H 4096
+#define SKL_MIN_DST_W 8
+#define SKL_MAX_DST_W 4096
+#define SKL_MIN_DST_H 8
+#define SKL_MAX_DST_H 4096
+#define ICL_MAX_SRC_W 5120
+#define ICL_MAX_SRC_H 4096
+#define ICL_MAX_DST_W 5120
+#define ICL_MAX_DST_H 4096
+#define SKL_MIN_YUV_420_SRC_W 16
+#define SKL_MIN_YUV_420_SRC_H 16
+
static int
skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
unsigned int scaler_user, int *scaler_id,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 25a5fb..709647 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -668,21 +668,6 @@ struct intel_initial_plane_config {
u8 rotation;
};
-#define SKL_MIN_SRC_W 8
-#define SKL_MAX_SRC_W 4096
-#define SKL_MIN_SRC_H 8
-#define SKL_MAX_SRC_H 4096
-#define SKL_MIN_DST_W 8
-#define SKL_MAX_DST_W 4096
-#define SKL_MIN_DST_H 8
-#define SKL_MAX_DST_H 4096
-#define ICL_MAX_SRC_W 5120
-#define ICL_MAX_SRC_H 4096
-#define ICL_MAX_DST_W 5120
-#define ICL_MAX_DST_H 4096
-#define SKL_MIN_YUV_420_SRC_W 16
-#define SKL_MIN_YUV_420_SRC_H 16
-
struct intel_scaler {
int in_use;
u32 mode;
--
2.20.1
___
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[Intel-gfx] [PATCH 01/13] drm/i915/dvo: move DVO chip types to intel_dvo.c
Reduce clutter from intel_drv.h with the minimal change.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_drv.h | 5 -
drivers/gpu/drm/i915/intel_dvo.c | 5 +
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 57ae396..ab11c3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -184,11 +184,6 @@ enum intel_output_type {
INTEL_OUTPUT_DP_MST = 11,
};
-#define INTEL_DVO_CHIP_NONE 0
-#define INTEL_DVO_CHIP_LVDS 1
-#define INTEL_DVO_CHIP_TMDS 2
-#define INTEL_DVO_CHIP_TVOUT 4
-
#define INTEL_DSI_VIDEO_MODE 0
#define INTEL_DSI_COMMAND_MODE 1
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 930013..79a43f 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -39,6 +39,11 @@
#include "intel_dvo_dev.h"
#include "intel_panel.h"
+#define INTEL_DVO_CHIP_NONE0
+#define INTEL_DVO_CHIP_LVDS1
+#define INTEL_DVO_CHIP_TMDS2
+#define INTEL_DVO_CHIP_TVOUT 4
+
#define SIL164_ADDR0x38
#define CH7xxx_ADDR0x76
#define TFP410_ADDR0x38
--
2.20.1
___
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[Intel-gfx] [PATCH 00/13] drm/i915: the great header refactoring, part three
Continue the header refactoring started in [1] and [2].
BR,
Jani.
[1] https://patchwork.freedesktop.org/series/59022/
[2] https://patchwork.freedesktop.org/series/60060/
Jani Nikula (13):
drm/i915/dvo: move DVO chip types to intel_dvo.c
drm/i915/dsi: move operation mode types to intel_dsi.h
drm/i915: move ranges to intel_display.c
drm/i915: remove unused/stale macros and comments from intel_drv.h
drm/i915/csr: move CSR version macros to intel_csr.h
drm/i915: extract intel_dpio_phy.h from i915_drv.h
drm/i915: extract intel_lpe_audio.h from i915_drv.h
drm/i915: extract intel_acpi.h from i915_drv.h
drm/i915: extract i915_debugfs.h from i915_drv.h
drm/i915: move i915_vgacntrl_reg() where needed
drm/i915: make i915_utils.h self-contained
drm/i915: move more generic utils to i915_utils.h
drm/i915: extract intel_gmbus.h from i915_drv.h and rename intel_i2c.c
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/Makefile.header-test | 6 +
drivers/gpu/drm/i915/i915_debugfs.c | 2 +
drivers/gpu/drm/i915/i915_debugfs.h | 20 +++
drivers/gpu/drm/i915/i915_drv.c | 8 +-
drivers/gpu/drm/i915/i915_drv.h | 145
drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
drivers/gpu/drm/i915/i915_irq.c | 1 +
drivers/gpu/drm/i915/i915_suspend.c | 3 +-
drivers/gpu/drm/i915/i915_utils.h | 159 +-
drivers/gpu/drm/i915/intel_acpi.c | 3 +
drivers/gpu/drm/i915/intel_acpi.h | 17 ++
drivers/gpu/drm/i915/intel_audio.c| 2 +-
drivers/gpu/drm/i915/intel_bios.c | 2 +
drivers/gpu/drm/i915/intel_crt.c | 1 +
drivers/gpu/drm/i915/intel_csr.h | 4 +
drivers/gpu/drm/i915/intel_ddi.c | 2 +
drivers/gpu/drm/i915/intel_display.c | 29 +++-
drivers/gpu/drm/i915/intel_dp.c | 2 +
drivers/gpu/drm/i915/intel_dp_mst.c | 1 +
drivers/gpu/drm/i915/intel_dpio_phy.c | 1 +
drivers/gpu/drm/i915/intel_dpio_phy.h | 58 +++
drivers/gpu/drm/i915/intel_dpll_mgr.c | 1 +
drivers/gpu/drm/i915/intel_drv.h | 140 ---
drivers/gpu/drm/i915/intel_dsi.h | 3 +
drivers/gpu/drm/i915/intel_dvo.c | 6 +
.../drm/i915/{intel_i2c.c => intel_gmbus.c} | 27 ++-
drivers/gpu/drm/i915/intel_gmbus.h| 27 +++
drivers/gpu/drm/i915/intel_hdmi.c | 3 +
drivers/gpu/drm/i915/intel_lpe_audio.c| 8 +-
drivers/gpu/drm/i915/intel_lpe_audio.h| 22 +++
drivers/gpu/drm/i915/intel_lvds.c | 1 +
drivers/gpu/drm/i915/intel_pipe_crc.h | 3 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
drivers/gpu/drm/i915/intel_sdvo.c | 1 +
35 files changed, 408 insertions(+), 304 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_debugfs.h
create mode 100644 drivers/gpu/drm/i915/intel_acpi.h
create mode 100644 drivers/gpu/drm/i915/intel_dpio_phy.h
rename drivers/gpu/drm/i915/{intel_i2c.c => intel_gmbus.c} (98%)
create mode 100644 drivers/gpu/drm/i915/intel_gmbus.h
create mode 100644 drivers/gpu/drm/i915/intel_lpe_audio.h
--
2.20.1
___
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[Intel-gfx] [PATCH 02/13] drm/i915/dsi: move operation mode types to intel_dsi.h
Reduce clutter from intel_drv.h with the minimal change.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_drv.h | 3 ---
drivers/gpu/drm/i915/intel_dsi.h | 3 +++
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index ab11c3..25a5fb 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -184,9 +184,6 @@ enum intel_output_type {
INTEL_OUTPUT_DP_MST = 11,
};
-#define INTEL_DSI_VIDEO_MODE 0
-#define INTEL_DSI_COMMAND_MODE 1
-
struct intel_framebuffer {
struct drm_framebuffer base;
struct intel_rotation_info rot_info;
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 1d1e6b..f9b9006 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -28,6 +28,9 @@
#include
#include "intel_drv.h"
+#define INTEL_DSI_VIDEO_MODE 0
+#define INTEL_DSI_COMMAND_MODE 1
+
/* Dual Link support */
#define DSI_DUAL_LINK_NONE 0
#define DSI_DUAL_LINK_FRONT_BACK 1
--
2.20.1
___
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Re: [Intel-gfx] [PATCH 5/6] drm/i915: Remove inline from sseu helper functions
On Thu, 2019-05-02 at 17:58 +0300, Jani Nikula wrote: > On Thu, 02 May 2019, "Summers, Stuart" > wrote: > > On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote: > > > Acked-by: Jani Nikula > > > > Jani, based on Daniele's feedback, I'm planning on squashing this > > patch > > with the patch that moves these helper functions to intel_sseu.h. > > Any > > issue keeping your Ack here? > > None. Thanks for the Ack! -Stuart > > BR, > Jani. > smime.p7s Description: S/MIME cryptographic signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 5/6] drm/i915: Remove inline from sseu helper functions
On Thu, 02 May 2019, "Summers, Stuart" wrote: > On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote: >> Acked-by: Jani Nikula > > Jani, based on Daniele's feedback, I'm planning on squashing this patch > with the patch that moves these helper functions to intel_sseu.h. Any > issue keeping your Ack here? None. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 5/6] drm/i915: Remove inline from sseu helper functions
On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote: > On Wed, 01 May 2019, "Summers, Stuart" > wrote: > > On Wed, 2019-05-01 at 14:19 -0700, Daniele Ceraolo Spurio wrote: > > > > > > On 5/1/19 2:04 PM, Summers, Stuart wrote: > > > > On Wed, 2019-05-01 at 13:04 -0700, Daniele Ceraolo Spurio > > > > wrote: > > > > > Can you elaborate a bit more on what's the rationale for > > > > > this? do > > > > > you just want to avoid having too many inlines since the > > > > > paths > > > > > they're used in are not critical, or do you have some more > > > > > functional reason? This is not a critic to the patch, I just > > > > > want to understand where you're coming from ;) > > > > > > > > This was a request from Jani Nikula in a previous series > > > > update. I > > > > don't have a strong preference either way personally. If you > > > > don't > > > > have any major concerns, I'd prefer to keep the series as-is to > > > > prevent too much thrash here, but let me know. > > > > > > > > > > No concerns, just please update the commit message to explain > > > that > > > we're moving them because there is no need for them to be inline > > > since they're not on a critical path where we need preformance. > > > > Sounds great. > > I've become critical of superfluous inlines. They break the > abstraction > by exposing the internals in the header, and make the > interdependencies > of headers harder to resolve. > > As the driver keeps growing and more people contribute to it, I think > we > need to pay more attention on how we structure the source. To this > end > we've added new gt/ subdir, are about to add gem/ and likely display/ > too before long, and we've significantly split off the monster > i915_drv.h and intel_drv.h headers. > > Obviously inlines have their place and purpose, but I think we > sprinkle > them a bit too eagerly without paying attention. > > I like the patch. > > Acked-by: Jani Nikula Jani, based on Daniele's feedback, I'm planning on squashing this patch with the patch that moves these helper functions to intel_sseu.h. Any issue keeping your Ack here? -Stuart > > smime.p7s Description: S/MIME cryptographic signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3] drm/i915: add single combo phy init/unit functions
Work on the principle that files should prefer not to expose platform
specific functions.
v2, v3: Rebase
Cc: Imre Deak
Reviewed-by: Chris Wilson
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_combo_phy.c | 24
drivers/gpu/drm/i915/intel_combo_phy.h | 6 ++
drivers/gpu/drm/i915/intel_runtime_pm.c | 10 +-
3 files changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_combo_phy.c
b/drivers/gpu/drm/i915/intel_combo_phy.c
index f1b883..19a933 100644
--- a/drivers/gpu/drm/i915/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/intel_combo_phy.c
@@ -148,7 +148,7 @@ static bool cnl_combo_phy_verify_state(struct
drm_i915_private *dev_priv)
return ret;
}
-void cnl_combo_phys_init(struct drm_i915_private *dev_priv)
+static void cnl_combo_phys_init(struct drm_i915_private *dev_priv)
{
u32 val;
@@ -168,7 +168,7 @@ void cnl_combo_phys_init(struct drm_i915_private *dev_priv)
I915_WRITE(CNL_PORT_CL1CM_DW5, val);
}
-void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv)
+static void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv)
{
u32 val;
@@ -256,7 +256,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private
*dev_priv,
I915_WRITE(ICL_PORT_CL_DW10(port), val);
}
-void icl_combo_phys_init(struct drm_i915_private *dev_priv)
+static void icl_combo_phys_init(struct drm_i915_private *dev_priv)
{
enum port port;
@@ -285,7 +285,7 @@ void icl_combo_phys_init(struct drm_i915_private *dev_priv)
}
}
-void icl_combo_phys_uninit(struct drm_i915_private *dev_priv)
+static void icl_combo_phys_uninit(struct drm_i915_private *dev_priv)
{
enum port port;
@@ -306,3 +306,19 @@ void icl_combo_phys_uninit(struct drm_i915_private
*dev_priv)
I915_WRITE(ICL_PORT_COMP_DW0(port), val);
}
}
+
+void intel_combo_phy_init(struct drm_i915_private *i915)
+{
+ if (INTEL_GEN(i915) >= 11)
+ icl_combo_phys_init(i915);
+ else if (IS_CANNONLAKE(i915))
+ cnl_combo_phys_init(i915);
+}
+
+void intel_combo_phy_uninit(struct drm_i915_private *i915)
+{
+ if (INTEL_GEN(i915) >= 11)
+ icl_combo_phys_uninit(i915);
+ else if (IS_CANNONLAKE(i915))
+ cnl_combo_phys_uninit(i915);
+}
diff --git a/drivers/gpu/drm/i915/intel_combo_phy.h
b/drivers/gpu/drm/i915/intel_combo_phy.h
index 749b644..e6e195 100644
--- a/drivers/gpu/drm/i915/intel_combo_phy.h
+++ b/drivers/gpu/drm/i915/intel_combo_phy.h
@@ -11,10 +11,8 @@
struct drm_i915_private;
-void icl_combo_phys_init(struct drm_i915_private *dev_priv);
-void icl_combo_phys_uninit(struct drm_i915_private *dev_priv);
-void cnl_combo_phys_init(struct drm_i915_private *dev_priv);
-void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv);
+void intel_combo_phy_init(struct drm_i915_private *dev_priv);
+void intel_combo_phy_uninit(struct drm_i915_private *dev_priv);
void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
enum port port, bool is_dsi,
int lane_count, bool lane_reversal);
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 30e7cb..be7119 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1140,7 +1140,7 @@ static void gen9_dc_off_power_well_enable(struct
drm_i915_private *dev_priv,
* PHY's HW context for port B is lost after DC transitions,
* so we need to restore it manually.
*/
- icl_combo_phys_init(dev_priv);
+ intel_combo_phy_init(dev_priv);
}
static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
@@ -3779,7 +3779,7 @@ static void cnl_display_core_init(struct drm_i915_private
*dev_priv, bool resume
intel_pch_reset_handshake(dev_priv, !HAS_PCH_NOP(dev_priv));
/* 2-3. */
- cnl_combo_phys_init(dev_priv);
+ intel_combo_phy_init(dev_priv);
/*
* 4. Enable Power Well 1 (PG1).
@@ -3828,7 +3828,7 @@ static void cnl_display_core_uninit(struct
drm_i915_private *dev_priv)
usleep_range(10, 30); /* 10 us delay per Bspec */
/* 5. */
- cnl_combo_phys_uninit(dev_priv);
+ intel_combo_phy_uninit(dev_priv);
}
void icl_display_core_init(struct drm_i915_private *dev_priv,
@@ -3843,7 +3843,7 @@ void icl_display_core_init(struct drm_i915_private
*dev_priv,
intel_pch_reset_handshake(dev_priv, !HAS_PCH_NOP(dev_priv));
/* 2. Initialize all combo phys */
- icl_combo_phys_init(dev_priv);
+ intel_combo_phy_init(dev_priv);
/*
* 3. Enable Power Well 1 (PG1).
@@ -3893,7 +3893,7 @@ void icl_display_core_uninit(struct drm_i915_private
*dev_priv)
mutex_unlock(_domains->lock);
/* 5. */
-
Re: [Intel-gfx] [PATCH 6/6] drm/i915: Expand subslice mask
On Wed, 2019-05-01 at 15:04 -0700, Daniele Ceraolo Spurio wrote:
>
> On 5/1/19 8:34 AM, Stuart Summers wrote:
> > Currently, the subslice_mask runtime parameter is stored as an
> > array of subslices per slice. Expand the subslice mask array to
> > better match what is presented to userspace through the
> > I915_QUERY_TOPOLOGY_INFO ioctl. The index into this array is
> > then calculated:
> >slice * subslice stride + subslice index / 8
> >
> > v2: fix spacing in set_sseu_info args
> > use set_sseu_info to initialize sseu data when building
> > device status in debugfs
> > rename variables in intel_engine_types.h to avoid checkpatch
> > warnings
> > v3: update headers in intel_sseu.h
> > v4: add const to some sseu_dev_info variables
> > use sseu->eu_stride for EU stride calculations
> >
> > Cc: Daniele Ceraolo Spurio
> > Signed-off-by: Stuart Summers
>
> Can you also get an ack from Lionel, to make sure this all fits with
> the
> expected reporting?
Cc: Lionel Landwerlin
>
> > ---
> > drivers/gpu/drm/i915/gt/intel_engine_cs.c| 6 +-
> > drivers/gpu/drm/i915/gt/intel_engine_types.h | 32 +++--
> > drivers/gpu/drm/i915/gt/intel_hangcheck.c| 3 +-
> > drivers/gpu/drm/i915/gt/intel_sseu.c | 49 +--
> > drivers/gpu/drm/i915/gt/intel_sseu.h | 16 ++-
> > drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
> > drivers/gpu/drm/i915/i915_debugfs.c | 44 +++---
> > drivers/gpu/drm/i915/i915_drv.c | 6 +-
> > drivers/gpu/drm/i915/i915_gpu_error.c| 5 +-
> > drivers/gpu/drm/i915/i915_query.c| 10 +-
> > drivers/gpu/drm/i915/intel_device_info.c | 142 +++---
> > -
> > 11 files changed, 198 insertions(+), 117 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > index 6e40f8ea9a6a..8f7967cc9a50 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > @@ -914,7 +914,7 @@ u32 intel_calculate_mcr_s_ss_select(struct
> > drm_i915_private *dev_priv)
> > const struct sseu_dev_info *sseu = _INFO(dev_priv)-
> > >sseu;
> > u32 mcr_s_ss_select;
> > u32 slice = fls(sseu->slice_mask);
> > - u32 subslice = fls(sseu->subslice_mask[slice]);
> > + u32 subslice = fls(sseu->subslice_mask[slice * sseu-
> > >ss_stride]);
>
> This (and the registers we use below) only works if ss_stride = 1.
> Can
> we add a:
>
> GEM_BUG_ON(sseu->ss_stride > 1);
>
> to catch the fact that this function will need updating to handle
> that
> case if/when we get it?
I'll rework this and post an update.
>
> >
> > if (IS_GEN(dev_priv, 10))
> > mcr_s_ss_select = GEN8_MCR_SLICE(slice) |
> > @@ -990,6 +990,7 @@ void intel_engine_get_instdone(struct
> > intel_engine_cs *engine,
> >struct intel_instdone *instdone)
> > {
> > struct drm_i915_private *dev_priv = engine->i915;
> > + const struct sseu_dev_info *sseu = _INFO(dev_priv)-
> > >sseu;
> > struct intel_uncore *uncore = engine->uncore;
> > u32 mmio_base = engine->mmio_base;
> > int slice;
> > @@ -1007,7 +1008,8 @@ void intel_engine_get_instdone(struct
> > intel_engine_cs *engine,
> >
> > instdone->slice_common =
> > intel_uncore_read(uncore, GEN7_SC_INSTDONE);
> > - for_each_instdone_slice_subslice(dev_priv, slice,
> > subslice) {
> > + for_each_instdone_slice_subslice(dev_priv, sseu, slice,
> > +subslice) {
> > instdone->sampler[slice][subslice] =
> > read_subslice_reg(dev_priv, slice,
> > subslice,
> > GEN7_SAMPLER_INSTDONE
> > );
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> > b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> > index 9d64e33f8427..1710546a2446 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> > @@ -534,20 +534,22 @@ intel_engine_needs_breadcrumb_tasklet(const
> > struct intel_engine_cs *engine)
> > return engine->flags & I915_ENGINE_NEEDS_BREADCRUMB_TASKLET;
> > }
> >
> > -#define instdone_slice_mask(dev_priv__) \
> > - (IS_GEN(dev_priv__, 7) ? \
> > -1 : RUNTIME_INFO(dev_priv__)->sseu.slice_mask)
> > -
> > -#define instdone_subslice_mask(dev_priv__) \
> > - (IS_GEN(dev_priv__, 7) ? \
> > -1 : RUNTIME_INFO(dev_priv__)->sseu.subslice_mask[0])
> > -
> > -#define for_each_instdone_slice_subslice(dev_priv__, slice__,
> > subslice__) \
> > - for ((slice__) = 0, (subslice__) = 0; \
> > -(slice__) < I915_MAX_SLICES; \
> > -(subslice__) = ((subslice__) + 1) < I915_MAX_SUBSLICES ?
> > (subslice__) + 1 : 0, \
> > - (slice__) += ((subslice__) == 0)) \
> > - for_each_if((BIT(slice__) &
> >
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper
On Thu, 02 May 2019, Imre Deak wrote: > On Fri, Apr 26, 2019 at 08:39:12AM +, Patchwork wrote: >> == Series Details == >> >> Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY >> lane power setup helper >> URL : https://patchwork.freedesktop.org/series/59954/ >> State : success > > Thanks for the review, series pushed to -dinq, with the s/icl_/intel_/ > change and adding the headers to intel_combo_phy.h required by the > recent header refactoring. Hey, I expected a resend. Please always resend the the rebased patches for CI, and only push patches that have gone through CI! BR, Jani. > >> >> == Summary == >> >> CI Bug Log - changes from CI_DRM_6000_full -> Patchwork_12877_full >> >> >> Summary >> --- >> >> **SUCCESS** >> >> No regressions found. >> >> >> >> Known issues >> >> >> Here are the changes found in Patchwork_12877_full that come from known >> issues: >> >> ### IGT changes ### >> >> Issues hit >> >> * igt@gem_tiled_swapping@non-threaded: >> - shard-iclb: [PASS][1] -> [DMESG-WARN][2] ([fdo#108686]) >>[1]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb6/igt@gem_tiled_swapp...@non-threaded.html >>[2]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb3/igt@gem_tiled_swapp...@non-threaded.html >> >> * igt@i915_pm_rpm@legacy-planes: >> - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#107807]) >>[3]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@i915_pm_...@legacy-planes.html >>[4]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl6/igt@i915_pm_...@legacy-planes.html >> >> * igt@kms_cursor_crc@cursor-64x64-dpms: >> - shard-skl: [PASS][5] -> [FAIL][6] ([fdo#103232]) >>[5]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_cursor_...@cursor-64x64-dpms.html >>[6]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_cursor_...@cursor-64x64-dpms.html >> >> * igt@kms_flip@flip-vs-expired-vblank-interruptible: >> - shard-skl: [PASS][7] -> [FAIL][8] ([fdo#105363]) >>[7]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_f...@flip-vs-expired-vblank-interruptible.html >>[8]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html >> >> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt: >> - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) >>[9]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-indfb-pgflip-blt.html >>[10]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-indfb-pgflip-blt.html >> >> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: >> - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#104108]) >>[11]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl2/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-b.html >>[12]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl3/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-b.html >> >> * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: >> - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145] / >> [fdo#110403]) >>[13]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html >>[14]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html >> >> * igt@kms_psr2_su@frontbuffer: >> - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109642]) >>[15]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr2...@frontbuffer.html >>[16]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_psr2...@frontbuffer.html >> >> * igt@kms_psr@psr2_sprite_render: >> - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +2 similar >> issues >>[17]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr@psr2_sprite_render.html >>[18]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb8/igt@kms_psr@psr2_sprite_render.html >> >> * igt@kms_psr@suspend: >> - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#107773]) >>[19]: >> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_...@suspend.html >>[20]: >> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_...@suspend.html >> >> * igt@kms_rotation_crc@multiplane-rotation: >> - shard-kbl: [PASS][21] -> [INCOMPLETE][22] ([fdo#103665]) >>[21]: >>
Re: [Intel-gfx] [PATCH 03/14] drm/i915/execlists: Flush the tasklet on parking
Quoting Tvrtko Ursulin (2019-05-02 15:24:16)
>
> On 02/05/2019 15:21, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-02 15:14:08)
> >>
> >> On 02/05/2019 14:53, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2019-05-02 14:48:18)
>
> On 01/05/2019 12:45, Chris Wilson wrote:
> > Tidy up the cleanup sequence by always ensure that the tasklet is
> > flushed on parking (before we cleanup). The parking provides a
> > convenient point to ensure that the backend is truly idle.
> >
> > Signed-off-by: Chris Wilson
> > ---
> > drivers/gpu/drm/i915/gt/intel_lrc.c | 7 ++-
> > drivers/gpu/drm/i915/intel_guc_submission.c | 1 +
> > 2 files changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
> > b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > index 851e62ddcb87..7be54b868d8e 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > @@ -2331,6 +2331,11 @@ static int gen8_init_rcs_context(struct
> > i915_request *rq)
> > return i915_gem_render_state_emit(rq);
> > }
> >
> > +static void execlists_park(struct intel_engine_cs *engine)
> > +{
> > + tasklet_kill(>execlists.tasklet);
>
> Isn't it actually a problem if tasklet is scheduled and unstarted, or
> even in progress at the point of engine getting parked?
> >>>
> >>> That would be a broken driver. :|
> >>>
> >>> We must be quite sure that engine isn't going to send an interrupt as we
> >>> are just about to drop the wakeref we need to service that interrupt.
> >>>
> >>> tasklet_kill()
> >>> GEM_BUG_ON(engine->execlists.active);
> >>
> >> Or instead of both:
> >>
> >> /* Tasklet must not be running or scheduled at this point. */
> >> GEM_BUG_ON(engine->execlists.tasklet.state);
> >
> > There's the dilemma that we start parking based on retirement not
> > final CS event.
>
> But engine->park() is called once the last engine pm reference is
> dropped. Are we dropping the last reference with a CS event pending?
Potentially we are.
i915_request_retire() -> context->exit() -> engine->park()
At no point along that chain do we actually check we have flushed the
backend. The tasklet_kill() would flush if the interrupt had already
been sent, but that's not very strict.
Oh well, you've talked me into to re-adding the wait loop here.
-Chris
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Re: [Intel-gfx] [PATCH] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers
tor 2019-05-02 klockan 14:51 +0300 skrev Ville Syrjälä:
> On Thu, May 02, 2019 at 10:40:39AM +, Sharma, Shashank wrote:
> >
> >
> > > -Original Message-
> > > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > > Sent: Thursday, May 2, 2019 3:45 PM
> > > To: Sharma, Shashank
> > > Cc: intel-gfx@lists.freedesktop.org; Syrjala, Ville > > a...@intel.com>; Lankhorst,
> > > Maarten
> > > Subject: Re: [Intel-gfx] [PATCH] drm/i915/GLK: Properly handle
> > > plane CSC for
> > > BT2020 framebuffers
> > >
> > > On Thu, May 02, 2019 at 03:19:42PM +0530, Shashank Sharma wrote:
> > > > Framebuffer formats P01x are supported by GLK, but the function
> > > > which
> > > > handles CSC on plane color control register, still expectes the
> > > > input
> > > > buffer to be REC709. This can cause inaccurate output for
> > > > direct P01x
> > > > flips.
> > > >
> > > > This patch checks if the color_encoding property is set to
> > > > YCBCR_2020,
> > > > and enables the corresponding color conversion mode on plane
> > > > CSC.
> > > >
> > > > PS: renamed variable plane_color_ctl to color_ctl for 80 char
> > > > stuff.
> > > >
> > > > Cc: Ville Syrjala
> > > > Cc: Maarten Lankhorst
> > > > Cc: Uma Shankar
> > > > Signed-off-by: Shashank Sharma
> > > > ---
> > > > drivers/gpu/drm/i915/intel_display.c | 26 --
> > > >
> > > > 1 file changed, 16 insertions(+), 10 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > index dd65d7c521c1..2d4d3128bf1f 100644
> > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > @@ -3868,24 +3868,30 @@ u32 glk_plane_color_ctl(const struct
> > > > intel_crtc_state
> > >
> > > *crtc_state,
> > > > to_i915(plane_state->base.plane->dev);
> > > > const struct drm_framebuffer *fb = plane_state-
> > > > >base.fb;
> > > > struct intel_plane *plane =
> > > > to_intel_plane(plane_state->base.plane);
> > > > - u32 plane_color_ctl = 0;
> > > > + u32 color_ctl = 0;
> > > >
> > > > - plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
> > > > - plane_color_ctl |=
> > > > glk_plane_color_ctl_alpha(plane_state);
> > > > + color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
> > > > + color_ctl |= glk_plane_color_ctl_alpha(plane_state);
> > > >
> > > > if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv,
> > > > plane->id)) {
> > > > - if (plane_state->base.color_encoding ==
> > > > DRM_COLOR_YCBCR_BT709)
> > > > - plane_color_ctl |=
> > >
> > > PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> > > > - else
> > > > - plane_color_ctl |=
> > >
> > > PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709;
> > > > + switch (plane_state->base.color_encoding) {
> > > > + case DRM_COLOR_YCBCR_BT709:
> > > > + color_ctl |=
> > >
> > > PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> > > > + break;
> > > > + case DRM_COLOR_YCBCR_BT2020:
> > > > + color_ctl |=
> > >
> > > PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
> > > > + break;
> > > > + default:
> > > > + color_ctl |=
> > >
> > > PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709;
> > > > + }
> > >
> > > This isn't going to do anything without adjusting the property
> > > supported encodings as
> > > well.
> > >
> >
> > I might have not understood this comment properly, but, AFAIK, if
> > userspace sets this property well, and we set this color_ctl bit
> > properly, driver is setting PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020
> > bits in GLK color control register. As GLK has a fix function plane
> > CSC, HW will apply a different matrix internally to convert input
> > buffer to RGB_2020 from YCBCR_2020 (earlier this would have been
> > YCBCR_709). So I think we should see visible changes in output. Do
> > you think otherwise ?
>
> The property won't accept the BT2020 value. Or if it does we have a
> bug
> somewhere.
>
> I guess tests would be nice. Maybe we should extend the kms_plane
> pixel
> format tests to check different YCbCr encodings as well? Or maybe
> Maarten's kms_yuv already tests this?
Not yet, unfortunately we have no way to set CSC in igt yet. :(
Best way to do so would be to add a igt_create_fb_yuv() which would a
igt_create_fb that accepts igt color encoding and range as arguments.
~Maarten
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[Intel-gfx] [PATCH v2] drm/i915: Cancel retire_worker on parking
Replace the racy continuation check within retire_work with a definite
kill-switch on idling. The race was being exposed by gem_concurrent_blit
where the retire_worker would be terminated too early leaving us
spinning in debugfs/i915_drop_caches with nothing flushing the
retirement queue.
Although that the igt is trying to idle from one child while submitting
from another may be a contributing factor as to why it runs so slowly...
v2: Use the non-sync version of cancel_delayed_work(), we only need to
stop it from being scheduled as we independently check whether now is
the right time to be parking.
Testcase: igt/gem_concurrent_blit
Fixes: 79ffac8599c4 ("drm/i915: Invert the GEM wakeref hierarchy")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_pm.c | 18 --
.../gpu/drm/i915/selftests/mock_gem_device.c | 1 -
2 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_pm.c
b/drivers/gpu/drm/i915/i915_gem_pm.c
index ae91ad7cb31e..fa9c2ebd966a 100644
--- a/drivers/gpu/drm/i915/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/i915_gem_pm.c
@@ -30,15 +30,23 @@ static void idle_work_handler(struct work_struct *work)
{
struct drm_i915_private *i915 =
container_of(work, typeof(*i915), gem.idle_work);
+ bool restart = true;
+ cancel_delayed_work(>gem.retire_work);
mutex_lock(>drm.struct_mutex);
intel_wakeref_lock(>gt.wakeref);
- if (!intel_wakeref_active(>gt.wakeref) && !work_pending(work))
+ if (!intel_wakeref_active(>gt.wakeref) && !work_pending(work)) {
i915_gem_park(i915);
+ restart = false;
+ }
intel_wakeref_unlock(>gt.wakeref);
mutex_unlock(>drm.struct_mutex);
+ if (restart)
+ queue_delayed_work(i915->wq,
+ >gem.retire_work,
+ round_jiffies_up_relative(HZ));
}
static void retire_work_handler(struct work_struct *work)
@@ -52,10 +60,9 @@ static void retire_work_handler(struct work_struct *work)
mutex_unlock(>drm.struct_mutex);
}
- if (intel_wakeref_active(>gt.wakeref))
- queue_delayed_work(i915->wq,
- >gem.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915->wq,
+ >gem.retire_work,
+ round_jiffies_up_relative(HZ));
}
static int pm_notifier(struct notifier_block *nb,
@@ -140,7 +147,6 @@ void i915_gem_suspend(struct drm_i915_private *i915)
* Assert that we successfully flushed all the work and
* reset the GPU back to its idle, low power state.
*/
- drain_delayed_work(>gem.retire_work);
GEM_BUG_ON(i915->gt.awake);
flush_work(>gem.idle_work);
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index d919f512042c..9fd02025d382 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -58,7 +58,6 @@ static void mock_device_release(struct drm_device *dev)
i915_gem_contexts_lost(i915);
mutex_unlock(>drm.struct_mutex);
- drain_delayed_work(>gem.retire_work);
flush_work(>gem.idle_work);
i915_gem_drain_workqueue(i915);
--
2.20.1
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Re: [Intel-gfx] [PATCH 06/14] drm/i915: Cancel retire_worker on parking
Quoting Tvrtko Ursulin (2019-05-02 15:20:52)
>
> On 02/05/2019 14:33, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-02 14:29:50)
> >>
> >> On 01/05/2019 12:45, Chris Wilson wrote:
> >>> Replace the racy continuation check within retire_work with a definite
> >>> kill-switch on idling. The race was being exposed by gem_concurrent_blit
> >>> where the retire_worker would be terminated too early leaving us
> >>> spinning in debugfs/i915_drop_caches with nothing flushing the
> >>> retirement queue.
> >>>
> >>> Although that the igt is trying to idle from one child while submitting
> >>> from another may be a contributing factor as to why it runs so slowly...
> >>>
> >>> Testcase: igt/gem_concurrent_blit
> >>> Fixes: 79ffac8599c4 ("drm/i915: Invert the GEM wakeref hierarchy")
> >>> Signed-off-by: Chris Wilson
> >>> Cc: Tvrtko Ursulin
> >>> ---
> >>>drivers/gpu/drm/i915/i915_gem_pm.c | 18 --
> >>>.../gpu/drm/i915/selftests/mock_gem_device.c | 1 -
> >>>2 files changed, 12 insertions(+), 7 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> b/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> index ae91ad7cb31e..b239b55f84cd 100644
> >>> --- a/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> +++ b/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> @@ -30,15 +30,23 @@ static void idle_work_handler(struct work_struct
> >>> *work)
> >>>{
> >>>struct drm_i915_private *i915 =
> >>>container_of(work, typeof(*i915), gem.idle_work);
> >>> + bool restart = true;
> >>>
> >>> + cancel_delayed_work_sync(>gem.retire_work);
> >>>mutex_lock(>drm.struct_mutex);
> >>>
> >>
> >> You don't want to run another retire here? Since the retire worker might
> >> have just been canceled I thought you should.
> >
> > Why though? If there are retires outstanding, we won't sleep and want to
> > defer parking until after the next cycle.
>
> In this case what is the point of cancel_delayed_work_*sync* and not
> just the async cancel?
There's an non-sync version? Ah ha!
-Chris
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Re: [Intel-gfx] [PATCH 03/14] drm/i915/execlists: Flush the tasklet on parking
On 02/05/2019 15:21, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 15:14:08)
On 02/05/2019 14:53, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 14:48:18)
On 01/05/2019 12:45, Chris Wilson wrote:
Tidy up the cleanup sequence by always ensure that the tasklet is
flushed on parking (before we cleanup). The parking provides a
convenient point to ensure that the backend is truly idle.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 7 ++-
drivers/gpu/drm/i915/intel_guc_submission.c | 1 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 851e62ddcb87..7be54b868d8e 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2331,6 +2331,11 @@ static int gen8_init_rcs_context(struct i915_request *rq)
return i915_gem_render_state_emit(rq);
}
+static void execlists_park(struct intel_engine_cs *engine)
+{
+ tasklet_kill(>execlists.tasklet);
Isn't it actually a problem if tasklet is scheduled and unstarted, or
even in progress at the point of engine getting parked?
That would be a broken driver. :|
We must be quite sure that engine isn't going to send an interrupt as we
are just about to drop the wakeref we need to service that interrupt.
tasklet_kill()
GEM_BUG_ON(engine->execlists.active);
Or instead of both:
/* Tasklet must not be running or scheduled at this point. */
GEM_BUG_ON(engine->execlists.tasklet.state);
There's the dilemma that we start parking based on retirement not
final CS event.
But engine->park() is called once the last engine pm reference is
dropped. Are we dropping the last reference with a CS event pending?
Regards,
Tvrtko
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Re: [Intel-gfx] [PATCH 05/14] drm/i915: Remove delay for idle_work
Quoting Tvrtko Ursulin (2019-05-02 14:51:31)
>
> On 02/05/2019 14:22, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-02 14:19:38)
> >>
> >> On 01/05/2019 12:45, Chris Wilson wrote:
> >>> diff --git a/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> b/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> index 49b0ce594f20..ae91ad7cb31e 100644
> >>> --- a/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> +++ b/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> @@ -29,12 +29,12 @@ static void i915_gem_park(struct drm_i915_private
> >>> *i915)
> >>>static void idle_work_handler(struct work_struct *work)
> >>>{
> >>>struct drm_i915_private *i915 =
> >>> - container_of(work, typeof(*i915), gem.idle_work.work);
> >>> + container_of(work, typeof(*i915), gem.idle_work);
> >>>
> >>>mutex_lock(>drm.struct_mutex);
> >>>
> >>>intel_wakeref_lock(>gt.wakeref);
> >>> - if (!intel_wakeref_active(>gt.wakeref))
> >>> + if (!intel_wakeref_active(>gt.wakeref) && !work_pending(work))
> >>
> >> What is the reason for the !work_pending check?
> >
> > Just that we are going to be called again, so wait until the next time to
> > see if we still need to park.
>
> When does it get called again? If a whole new cycle of unpark-park
> happened before the previous park was able to finish?
work_pending() implies that we've done at least one cycle while we
waited for the locks and the work is already queued to be rerun.
-Chris
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Re: [Intel-gfx] [PATCH 06/14] drm/i915: Cancel retire_worker on parking
On 02/05/2019 14:33, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 14:29:50)
On 01/05/2019 12:45, Chris Wilson wrote:
Replace the racy continuation check within retire_work with a definite
kill-switch on idling. The race was being exposed by gem_concurrent_blit
where the retire_worker would be terminated too early leaving us
spinning in debugfs/i915_drop_caches with nothing flushing the
retirement queue.
Although that the igt is trying to idle from one child while submitting
from another may be a contributing factor as to why it runs so slowly...
Testcase: igt/gem_concurrent_blit
Fixes: 79ffac8599c4 ("drm/i915: Invert the GEM wakeref hierarchy")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_pm.c | 18 --
.../gpu/drm/i915/selftests/mock_gem_device.c | 1 -
2 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_pm.c
b/drivers/gpu/drm/i915/i915_gem_pm.c
index ae91ad7cb31e..b239b55f84cd 100644
--- a/drivers/gpu/drm/i915/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/i915_gem_pm.c
@@ -30,15 +30,23 @@ static void idle_work_handler(struct work_struct *work)
{
struct drm_i915_private *i915 =
container_of(work, typeof(*i915), gem.idle_work);
+ bool restart = true;
+ cancel_delayed_work_sync(>gem.retire_work);
mutex_lock(>drm.struct_mutex);
You don't want to run another retire here? Since the retire worker might
have just been canceled I thought you should.
Why though? If there are retires outstanding, we won't sleep and want to
defer parking until after the next cycle.
In this case what is the point of cancel_delayed_work_*sync* and not
just the async cancel?
Regards,
Tvrtko
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Re: [Intel-gfx] [PATCH 03/14] drm/i915/execlists: Flush the tasklet on parking
Quoting Tvrtko Ursulin (2019-05-02 15:14:08)
>
> On 02/05/2019 14:53, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-02 14:48:18)
> >>
> >> On 01/05/2019 12:45, Chris Wilson wrote:
> >>> Tidy up the cleanup sequence by always ensure that the tasklet is
> >>> flushed on parking (before we cleanup). The parking provides a
> >>> convenient point to ensure that the backend is truly idle.
> >>>
> >>> Signed-off-by: Chris Wilson
> >>> ---
> >>>drivers/gpu/drm/i915/gt/intel_lrc.c | 7 ++-
> >>>drivers/gpu/drm/i915/intel_guc_submission.c | 1 +
> >>>2 files changed, 7 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
> >>> b/drivers/gpu/drm/i915/gt/intel_lrc.c
> >>> index 851e62ddcb87..7be54b868d8e 100644
> >>> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> >>> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> >>> @@ -2331,6 +2331,11 @@ static int gen8_init_rcs_context(struct
> >>> i915_request *rq)
> >>>return i915_gem_render_state_emit(rq);
> >>>}
> >>>
> >>> +static void execlists_park(struct intel_engine_cs *engine)
> >>> +{
> >>> + tasklet_kill(>execlists.tasklet);
> >>
> >> Isn't it actually a problem if tasklet is scheduled and unstarted, or
> >> even in progress at the point of engine getting parked?
> >
> > That would be a broken driver. :|
> >
> > We must be quite sure that engine isn't going to send an interrupt as we
> > are just about to drop the wakeref we need to service that interrupt.
> >
> > tasklet_kill()
> > GEM_BUG_ON(engine->execlists.active);
>
> Or instead of both:
>
> /* Tasklet must not be running or scheduled at this point. */
> GEM_BUG_ON(engine->execlists.tasklet.state);
There's the dilemma that we start parking based on retirement not
final CS event.
-Chris
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