[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Deal with machines that expose less than three QGV points
== Series Details == Series: drm/i915: Deal with machines that expose less than three QGV points URL : https://patchwork.freedesktop.org/series/61713/ State : success == Summary == CI Bug Log - changes from CI_DRM_6206_full -> Patchwork_13193_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13193_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap_gtt@forked-big-copy: - shard-iclb: [PASS][1] -> [TIMEOUT][2] ([fdo#109673]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-iclb1/igt@gem_mmap_...@forked-big-copy.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-iclb3/igt@gem_mmap_...@forked-big-copy.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-apl1/igt@kms_f...@flip-vs-suspend-interruptible.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-apl3/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: [PASS][5] -> [FAIL][6] ([fdo#103167]) +6 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-iclb3/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-blt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-iclb4/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu: - shard-skl: [PASS][7] -> [FAIL][8] ([fdo#103167] / [fdo#110379]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-skl6/igt@kms_frontbuffer_track...@fbcpsr-rgb101010-draw-mmap-cpu.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-skl7/igt@kms_frontbuffer_track...@fbcpsr-rgb101010-draw-mmap-cpu.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][9] -> [FAIL][10] ([fdo#108145] / [fdo#110403]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-skl6/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-skl5/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103166]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-iclb4/igt@kms_plane_low...@pipe-a-tiling-x.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-iclb6/igt@kms_plane_low...@pipe-a-tiling-x.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109441]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-iclb1/igt@kms_psr@psr2_sprite_plane_move.html Possible fixes * igt@gem_tiled_swapping@non-threaded: - shard-kbl: [DMESG-WARN][15] ([fdo#108686]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-kbl3/igt@gem_tiled_swapp...@non-threaded.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-kbl7/igt@gem_tiled_swapp...@non-threaded.html * igt@i915_pm_rpm@universal-planes: - shard-iclb: [INCOMPLETE][17] ([fdo#107713] / [fdo#108840]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-iclb5/igt@i915_pm_...@universal-planes.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-iclb7/igt@i915_pm_...@universal-planes.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: [DMESG-WARN][19] ([fdo#108566]) -> [PASS][20] +5 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-apl5/igt@i915_susp...@fence-restore-tiled2untiled.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-apl5/igt@i915_susp...@fence-restore-tiled2untiled.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [FAIL][21] ([fdo#105363]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-skl5/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13193/shard-skl10/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbc-farfromfence: - shard-skl: [FAIL][23] ([fdo#103167]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6206/shard-skl3/igt@kms_frontbuffer_track...@fbc-farfromfence.html [24]:
[Intel-gfx] ✓ Fi.CI.BAT: success for linux-next: manual merge of the drm-misc tree with the drm tree
== Series Details ==
Series: linux-next: manual merge of the drm-misc tree with the drm tree
URL : https://patchwork.freedesktop.org/series/61878/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13233
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13233/
Known issues
Here are the changes found in Patchwork_13233 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13233/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@kms_cursor_leg...@basic-flip-before-cursor-varying-size.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13233/fi-icl-u3/igt@kms_cursor_leg...@basic-flip-before-cursor-varying-size.html
Possible fixes
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][5] ([fdo#107713] / [fdo#108569]) ->
[PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13233/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +2
similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13233/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][9] ([fdo#110235]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13233/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 47)
--
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13233
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13233: e0a1e1173fb026e2ee5dd8133a465ee06fe1e594 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e0a1e1173fb0 linux-next: manual merge of the drm-misc tree with the drm tree
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13233/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for Panel rotation patches (rev2)
== Series Details == Series: Panel rotation patches (rev2) URL : https://patchwork.freedesktop.org/series/61870/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o AR init/built-in.a LD vmlinux.o drivers/gpu/drm/drm_panel.o: In function `of_drm_get_panel_orientation': /home/cidrm/kernel/./include/drm/drm_panel.h:215: multiple definition of `of_drm_get_panel_orientation' drivers/gpu/drm/bridge/panel.o:/home/cidrm/kernel/./include/drm/drm_panel.h:215: first defined here Makefile:1052: recipe for target 'vmlinux' failed make: *** [vmlinux] Error 1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/5] drm/mtk: add panel orientation property
This inits the panel orientation property for the mediatek dsi driver
if the panel orientation (connector.display_info.panel_orientation) is
not DRM_MODE_PANEL_ORIENTATION_UNKNOWN.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 4a0b9150a7bb..08ffdc7526dd 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -782,10 +782,18 @@ static int mtk_dsi_create_connector(struct drm_device
*drm, struct mtk_dsi *dsi)
DRM_ERROR("Failed to attach panel to drm\n");
goto err_connector_cleanup;
}
+
+ ret = drm_connector_init_panel_orientation_property(>conn);
+ if (ret) {
+ DRM_ERROR("Failed to init panel orientation\n");
+ goto err_panel_detach;
+ }
}
return 0;
+err_panel_detach:
+ drm_panel_detach(dsi->panel);
err_connector_cleanup:
drm_connector_cleanup(>conn);
return ret;
--
2.22.0.rc2.383.gf4fbbf30c2-goog
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[Intel-gfx] [PATCH 1/5] drm/panel: Add helper for reading DT rotation
This adds a helper function for reading the rotation (panel
orientation) from the device tree.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/drm_panel.c | 41 +
include/drm/drm_panel.h | 7 +++
2 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
index dbd5b873e8f2..3b689ce4a51a 100644
--- a/drivers/gpu/drm/drm_panel.c
+++ b/drivers/gpu/drm/drm_panel.c
@@ -172,6 +172,47 @@ struct drm_panel *of_drm_find_panel(const struct
device_node *np)
return ERR_PTR(-EPROBE_DEFER);
}
EXPORT_SYMBOL(of_drm_find_panel);
+
+/**
+ * of_drm_get_panel_orientation - look up the rotation of the panel using a
+ * device tree node
+ * @np: device tree node of the panel
+ * @orientation: orientation enum to be filled in
+ *
+ * Looks up the rotation of a panel in the device tree. The rotation in the
+ * device tree is counter clockwise.
+ *
+ * Return: 0 when a valid rotation value (0, 90, 180, or 270) is read or the
+ * rotation property doesn't exist. -EERROR otherwise.
+ */
+int of_drm_get_panel_orientation(const struct device_node *np, int
*orientation)
+{
+ int rotation, ret;
+
+ ret = of_property_read_u32(np, "rotation", );
+ if (ret == -EINVAL) {
+ /* Don't return an error if there's no rotation property. */
+ *orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
+ return 0;
+ }
+
+ if (ret < 0)
+ return ret;
+
+ if (rotation == 0)
+ *orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
+ else if (rotation == 90)
+ *orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
+ else if (rotation == 180)
+ *orientation = DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
+ else if (rotation == 270)
+ *orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
+ else
+ return -EINVAL;
+
+ return 0;
+}
+EXPORT_SYMBOL(of_drm_get_panel_orientation);
#endif
MODULE_AUTHOR("Thierry Reding ");
diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
index 8c738c0e6e9f..13631b2efbaa 100644
--- a/include/drm/drm_panel.h
+++ b/include/drm/drm_panel.h
@@ -197,11 +197,18 @@ int drm_panel_detach(struct drm_panel *panel);
#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL)
struct drm_panel *of_drm_find_panel(const struct device_node *np);
+int of_drm_get_panel_orientation(const struct device_node *np,
+int *orientation);
#else
static inline struct drm_panel *of_drm_find_panel(const struct device_node *np)
{
return ERR_PTR(-ENODEV);
}
+int of_drm_get_panel_orientation(const struct device_node *np,
+int *orientation)
+{
+ return -ENODEV;
+}
#endif
#endif
--
2.22.0.rc2.383.gf4fbbf30c2-goog
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[Intel-gfx] [PATCH 4/5] drm/connector: Split out orientation quirk detection
This removes the orientation quirk detection from the code to add
an orientation property to a panel. This is used only for legacy x86
systems, yet we'd like to start using this on devicetree systems where
quirk detection like this is not needed.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/drm_connector.c | 16
drivers/gpu/drm/i915/intel_dp.c | 14 +++---
drivers/gpu/drm/i915/vlv_dsi.c | 14 ++
include/drm/drm_connector.h | 2 +-
4 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index e17586aaa80f..58a09b65028b 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1894,31 +1894,23 @@ EXPORT_SYMBOL(drm_connector_set_vrr_capable_property);
* drm_connector_init_panel_orientation_property -
* initialize the connecters panel_orientation property
* @connector: connector for which to init the panel-orientation property.
- * @width: width in pixels of the panel, used for panel quirk detection
- * @height: height in pixels of the panel, used for panel quirk detection
*
* This function should only be called for built-in panels, after setting
* connector->display_info.panel_orientation first (if known).
*
- * This function will check for platform specific (e.g. DMI based) quirks
- * overriding display_info.panel_orientation first, then if panel_orientation
- * is not DRM_MODE_PANEL_ORIENTATION_UNKNOWN it will attach the
- * "panel orientation" property to the connector.
+ * This function will check if the panel_orientation is not
+ * DRM_MODE_PANEL_ORIENTATION_UNKNOWN. If not, it will attach the "panel
+ * orientation" property to the connector.
*
* Returns:
* Zero on success, negative errno on failure.
*/
int drm_connector_init_panel_orientation_property(
- struct drm_connector *connector, int width, int height)
+ struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
struct drm_display_info *info = >display_info;
struct drm_property *prop;
- int orientation_quirk;
-
- orientation_quirk = drm_get_panel_orientation_quirk(width, height);
- if (orientation_quirk != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
- info->panel_orientation = orientation_quirk;
if (info->panel_orientation == DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
return 0;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b099a9dc28fd..72ab090ea97a 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -40,6 +40,7 @@
#include
#include
#include
+#include
#include
#include "i915_debugfs.h"
@@ -7281,9 +7282,16 @@ static bool intel_edp_init_connector(struct intel_dp
*intel_dp,
intel_connector->panel.backlight.power = intel_edp_backlight_power;
intel_panel_setup_backlight(connector, pipe);
- if (fixed_mode)
- drm_connector_init_panel_orientation_property(
- connector, fixed_mode->hdisplay, fixed_mode->vdisplay);
+ if (fixed_mode) {
+ int orientation = drm_get_panel_orientation_quirk(
+ fixed_mode->hdisplay, fixed_mode->vdisplay);
+
+ if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
+ connector->display_info.panel_orientation =
+ orientation;
+
+ drm_connector_init_panel_orientation_property(connector);
+ }
return true;
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index bfe2891eac37..27f86a787f60 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -30,6 +30,7 @@
#include
#include
#include
+#include
#include "i915_drv.h"
#include "intel_atomic.h"
@@ -1650,6 +1651,7 @@ static void intel_dsi_add_properties(struct
intel_connector *connector)
if (connector->panel.fixed_mode) {
u32 allowed_scalers;
+ int orientation;
allowed_scalers = BIT(DRM_MODE_SCALE_ASPECT) |
BIT(DRM_MODE_SCALE_FULLSCREEN);
if (!HAS_GMCH(dev_priv))
@@ -1660,12 +1662,16 @@ static void intel_dsi_add_properties(struct
intel_connector *connector)
connector->base.state->scaling_mode = DRM_MODE_SCALE_ASPECT;
- connector->base.display_info.panel_orientation =
- vlv_dsi_get_panel_orientation(connector);
- drm_connector_init_panel_orientation_property(
- >base,
+ orientation = drm_get_panel_orientation_quirk(
connector->panel.fixed_mode->hdisplay,
connector->panel.fixed_mode->vdisplay);
+ if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
+
[Intel-gfx] [PATCH 3/5] drm/panel: Add attach/detach callbacks
This adds the attach/detach callbacks. These are for setting up
internal state for the connector/panel pair that can't be done at
probe (since the connector doesn't exist) and which don't need to be
repeatedly done for every get/modes, prepare, or enable callback.
Values such as the panel orientation, and display size can be filled
in for the connector.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/drm_panel.c | 14 ++
include/drm/drm_panel.h | 4
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
index 3b689ce4a51a..72f67678d9d5 100644
--- a/drivers/gpu/drm/drm_panel.c
+++ b/drivers/gpu/drm/drm_panel.c
@@ -104,12 +104,23 @@ EXPORT_SYMBOL(drm_panel_remove);
*/
int drm_panel_attach(struct drm_panel *panel, struct drm_connector *connector)
{
+ int ret;
+
if (panel->connector)
return -EBUSY;
panel->connector = connector;
panel->drm = connector->dev;
+ if (panel->funcs->attach) {
+ ret = panel->funcs->attach(panel);
+ if (ret < 0) {
+ panel->connector = NULL;
+ panel->drm = NULL;
+ return ret;
+ }
+ }
+
return 0;
}
EXPORT_SYMBOL(drm_panel_attach);
@@ -128,6 +139,9 @@ EXPORT_SYMBOL(drm_panel_attach);
*/
int drm_panel_detach(struct drm_panel *panel)
{
+ if (panel->funcs->detach)
+ panel->funcs->detach(panel);
+
panel->connector = NULL;
panel->drm = NULL;
diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
index 13631b2efbaa..e136e3a3c996 100644
--- a/include/drm/drm_panel.h
+++ b/include/drm/drm_panel.h
@@ -37,6 +37,8 @@ struct display_timing;
* struct drm_panel_funcs - perform operations on a given panel
* @disable: disable panel (turn off back light, etc.)
* @unprepare: turn off panel
+ * @detach: detach panel->connector (clear internal state, etc.)
+ * @attach: attach panel->connector (update internal state, etc.)
* @prepare: turn on panel and perform set up
* @enable: enable panel (turn on back light, etc.)
* @get_modes: add modes to the connector that the panel is attached to and
@@ -70,6 +72,8 @@ struct display_timing;
struct drm_panel_funcs {
int (*disable)(struct drm_panel *panel);
int (*unprepare)(struct drm_panel *panel);
+ void (*detach)(struct drm_panel *panel);
+ int (*attach)(struct drm_panel *panel);
int (*prepare)(struct drm_panel *panel);
int (*enable)(struct drm_panel *panel);
int (*get_modes)(struct drm_panel *panel);
--
2.22.0.rc2.383.gf4fbbf30c2-goog
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[Intel-gfx] [PATCH v2 0/5] Panel rotation patches
This adds the plumbing for reading panel rotation from the devicetree and sets up adding a panel property for the panel orientation on Mediatek SoCs when a rotation is present. v2 changes: fixed build errors in i915 Derek Basehore (5): drm/panel: Add helper for reading DT rotation dt-bindings: display/panel: Expand rotation documentation drm/panel: Add attach/detach callbacks drm/connector: Split out orientation quirk detection drm/mtk: add panel orientation property .../bindings/display/panel/panel.txt | 32 +++ drivers/gpu/drm/drm_connector.c | 16 ++ drivers/gpu/drm/drm_panel.c | 55 +++ drivers/gpu/drm/i915/vlv_dsi.c| 13 +++-- drivers/gpu/drm/mediatek/mtk_dsi.c| 8 +++ include/drm/drm_connector.h | 2 +- include/drm/drm_panel.h | 11 7 files changed, 120 insertions(+), 17 deletions(-) -- 2.22.0.rc2.383.gf4fbbf30c2-goog ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/5] dt-bindings: display/panel: Expand rotation documentation
This adds to the rotation documentation to explain how drivers should
use the property and gives an example of the property in a devicetree
node.
Signed-off-by: Derek Basehore
---
.../bindings/display/panel/panel.txt | 32 +++
1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel.txt
b/Documentation/devicetree/bindings/display/panel/panel.txt
index e2e6867852b8..f35d62d933fc 100644
--- a/Documentation/devicetree/bindings/display/panel/panel.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel.txt
@@ -2,3 +2,35 @@ Common display properties
-
- rotation:Display rotation in degrees counter clockwise (0,90,180,270)
+
+Property read from the device tree using of of_drm_get_panel_orientation
+
+The panel driver may apply the rotation at the TCON level, which will
+make the panel look like it isn't rotated to the kernel and any other
+software.
+
+If not, a panel orientation property should be added through the SoC
+vendor DRM code using the drm_connector_init_panel_orientation_property
+function.
+
+Example:
+ panel: panel@0 {
+ compatible = "boe,himax8279d8p";
+ reg = <0>;
+ enable-gpios = < 45 0>;
+ pp33-gpios = < 35 0>;
+ pp18-gpios = < 36 0>;
+ pinctrl-names = "default", "state_3300mv", "state_1800mv";
+ pinctrl-0 = <_pins_default>;
+ pinctrl-1 = <_pins_3300mv>;
+ pinctrl-2 = <_pins_1800mv>;
+ backlight = <_lcd0>;
+ rotation = <180>;
+ status = "okay";
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+ };
--
2.22.0.rc2.383.gf4fbbf30c2-goog
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: fix ICL perf register offsets
== Series Details == Series: drm/i915/perf: fix ICL perf register offsets URL : https://patchwork.freedesktop.org/series/61826/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13216_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13216_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_engines@execute-one: - shard-skl: [PASS][1] -> [DMESG-WARN][2] ([fdo#110869]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl4/igt@gem_ctx_engi...@execute-one.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl4/igt@gem_ctx_engi...@execute-one.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl2/igt@kms_cursor_...@pipe-b-cursor-suspend.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-apl4/igt@kms_cursor_...@pipe-b-cursor-suspend.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#110741]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl6/igt@kms_cursor_...@pipe-c-cursor-suspend.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl8/igt@kms_cursor_...@pipe-c-cursor-suspend.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic: - shard-hsw: [PASS][7] -> [FAIL][8] ([fdo#103355]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw1/igt@kms_cursor_leg...@cursor-vs-flip-atomic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-hsw6/igt@kms_cursor_leg...@cursor-vs-flip-atomic.html * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: [PASS][9] -> [FAIL][10] ([fdo#105363]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl2/igt@kms_f...@flip-vs-expired-vblank.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl2/igt@kms_f...@flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-modeset-vs-hang: - shard-iclb: [PASS][11] -> [INCOMPLETE][12] ([fdo#107713]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb4/igt@kms_f...@flip-vs-modeset-vs-hang.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-iclb8/igt@kms_f...@flip-vs-modeset-vs-hang.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-primscrn-shrfb-msflip-blt.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-iclb5/igt@kms_frontbuffer_track...@fbc-1p-primscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: - shard-apl: [PASS][15] -> [FAIL][16] ([fdo#103167]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-pwrite.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-apl1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite: - shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +16 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw8/igt@kms_frontbuffer_track...@fbc-2p-scndscrn-cur-indfb-draw-pwrite.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-scndscrn-cur-indfb-draw-pwrite.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl2/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html * igt@kms_sysfs_edid_timing: - shard-hsw: [PASS][21] -> [FAIL][22] ([fdo#100047]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw5/igt@kms_sysfs_edid_timing.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-hsw1/igt@kms_sysfs_edid_timing.html * igt@perf@blocking: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#110728]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl10/igt@p...@blocking.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl8/igt@p...@blocking.html * igt@perf@short-reads: - shard-skl: [PASS][25] ->
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for linux-next: manual merge of the drm-misc tree with the drm tree
== Series Details ==
Series: linux-next: manual merge of the drm-misc tree with the drm tree
URL : https://patchwork.freedesktop.org/series/61878/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e0a1e1173fb0 linux-next: manual merge of the drm-misc tree with the drm tree
-:15: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 9b93eb475aa9 ("drm/amd/display:
move clk_mgr files to right place")'
#15:
9b93eb475aa9 ("drm/amd/display: move clk_mgr files to right place")
-:35: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#35:
Subject: [PATCH] drm/amd/display: merge fix for "drm/amd: drop use of drmp.h in
os_types.h"
total: 1 errors, 1 warnings, 0 checks, 8 lines checked
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[Intel-gfx] linux-next: manual merge of the drm-misc tree with the drm tree
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
between commit:
9b93eb475aa9 ("drm/amd/display: move clk_mgr files to right place")
from the drm tree and commit:
4fc4dca8320e ("drm/amd: drop use of drmp.h in os_types.h")
from the drm-misc tree.
I fixed it up (I deleted the file and added the following patch) and
can carry the fix as necessary. This is now fixed as far as linux-next
is concerned, but any non trivial conflicts should be mentioned to your
upstream maintainer when your tree is submitted for merging. You may
also want to consider cooperating with the maintainer of the conflicting
tree to minimise any particularly complex conflicts.
I am not sure if this is actually needed but it seemed prudent with the
addition of the kzalloc/kfree calls in this file.
From: Stephen Rothwell
Date: Tue, 11 Jun 2019 13:48:08 +1000
Subject: [PATCH] drm/amd/display: merge fix for "drm/amd: drop use of drmp.h in
os_types.h"
Signed-off-by: Stephen Rothwell
---
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
index eb2204d42337..cb3f6a74d9e3 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
@@ -23,6 +23,8 @@
*
*/
+#include
+
#include "dal_asic_id.h"
#include "dc_types.h"
#include "dccg.h"
--
2.20.1
--
Cheers,
Stephen Rothwell
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[Intel-gfx] linux-next: manual merge of the drm-misc tree with the drm tree
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
between commit:
899fbde14646 ("drm/amdgpu: replace get_user_pages with HMM mirror helpers")
from the drm tree and commit:
c366be543c5e ("drm/amd: drop dependencies on drm_os_linux.h")
from the drm-misc tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 7138dc1dd1f4,a8a1fcab299b..
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@@ -34,16 -44,9 +44,10 @@@
#include
#include
#include
- #include
+
+ #include
#include
- #include
- #include
- #include
- #include
- #include
- #include
- #include
+#include
#include "amdgpu.h"
#include "amdgpu_object.h"
#include "amdgpu_trace.h"
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Backlight control via VESA eDP aux interface
== Series Details ==
Series: drm/i915: Backlight control via VESA eDP aux interface
URL : https://patchwork.freedesktop.org/series/61825/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13215_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_13215_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_ctx_engines@independent}:
- shard-hsw: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw1/igt@gem_ctx_engi...@independent.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-hsw4/igt@gem_ctx_engi...@independent.html
Known issues
Here are the changes found in Patchwork_13215_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_engines@execute-one:
- shard-glk: [PASS][3] -> [DMESG-WARN][4] ([fdo#110869])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk5/igt@gem_ctx_engi...@execute-one.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-glk8/igt@gem_ctx_engi...@execute-one.html
* igt@gem_tiled_swapping@non-threaded:
- shard-glk: [PASS][5] -> [DMESG-WARN][6] ([fdo#108686])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk5/igt@gem_tiled_swapp...@non-threaded.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-glk8/igt@gem_tiled_swapp...@non-threaded.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [PASS][7] -> [INCOMPLETE][8] ([fdo#104108])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl9/igt@kms_fbcon_...@psr-suspend.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-skl4/igt@kms_fbcon_...@psr-suspend.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-hsw: [PASS][9] -> [SKIP][10] ([fdo#109271])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw4/igt@kms_flip@2x-wf_vblank-ts-check.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-hsw1/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@flip-vs-suspend:
- shard-hsw: [PASS][11] -> [INCOMPLETE][12] ([fdo#103540])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw5/igt@kms_f...@flip-vs-suspend.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-hsw5/igt@kms_f...@flip-vs-suspend.html
* igt@kms_flip_tiling@flip-changes-tiling:
- shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108303])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_flip_til...@flip-changes-tiling.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-skl10/igt@kms_flip_til...@flip-changes-tiling.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-render:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-render.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-iclb5/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-apl: [PASS][17] -> [FAIL][18] ([fdo#103167])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-pwrite.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-apl3/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-apl: [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +2
similar issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-c-planes.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-apl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/shard-skl10/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103166]) +1 similar
issue
[23]:
Re: [Intel-gfx] [PATCH 5/5] drm/mtk: add panel orientation property
Hi, Derek:
On Mon, 2019-06-10 at 17:22 -0700, Derek Basehore wrote:
> This inits the panel orientation property for the mediatek dsi driver
> if the panel orientation (connector.display_info.panel_orientation) is
> not DRM_MODE_PANEL_ORIENTATION_UNKNOWN.
>
Looks good to me,
Acked-by: CK Hu
> Signed-off-by: Derek Basehore
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 4a0b9150a7bb..08ffdc7526dd 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -782,10 +782,18 @@ static int mtk_dsi_create_connector(struct drm_device
> *drm, struct mtk_dsi *dsi)
> DRM_ERROR("Failed to attach panel to drm\n");
> goto err_connector_cleanup;
> }
> +
> + ret = drm_connector_init_panel_orientation_property(>conn);
> + if (ret) {
> + DRM_ERROR("Failed to init panel orientation\n");
> + goto err_panel_detach;
> + }
> }
>
> return 0;
>
> +err_panel_detach:
> + drm_panel_detach(dsi->panel);
> err_connector_cleanup:
> drm_connector_cleanup(>conn);
> return ret;
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[Intel-gfx] ✗ Fi.CI.BAT: failure for Panel rotation patches
== Series Details == Series: Panel rotation patches URL : https://patchwork.freedesktop.org/series/61870/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h AR drivers/gpu/drm/i915/built-in.a CC [M] drivers/gpu/drm/i915/header_test_i915_active_types.o CC [M] drivers/gpu/drm/i915/header_test_i915_debugfs.o CC [M] drivers/gpu/drm/i915/header_test_i915_drv.o CC [M] drivers/gpu/drm/i915/header_test_i915_irq.o CC [M] drivers/gpu/drm/i915/header_test_i915_params.o CC [M] drivers/gpu/drm/i915/header_test_i915_priolist_types.o CC [M] drivers/gpu/drm/i915/header_test_i915_reg.o CC [M] drivers/gpu/drm/i915/header_test_i915_scheduler_types.o CC [M] drivers/gpu/drm/i915/header_test_i915_timeline_types.o CC [M] drivers/gpu/drm/i915/header_test_i915_utils.o CC [M] drivers/gpu/drm/i915/header_test_intel_acpi.o CC [M] drivers/gpu/drm/i915/header_test_intel_atomic.o CC [M] drivers/gpu/drm/i915/header_test_intel_atomic_plane.o CC [M] drivers/gpu/drm/i915/header_test_intel_audio.o CC [M] drivers/gpu/drm/i915/header_test_intel_bios.o CC [M] drivers/gpu/drm/i915/header_test_intel_cdclk.o CC [M] drivers/gpu/drm/i915/header_test_intel_color.o CC [M] drivers/gpu/drm/i915/header_test_intel_combo_phy.o CC [M] drivers/gpu/drm/i915/header_test_intel_connector.o CC [M] drivers/gpu/drm/i915/header_test_intel_crt.o CC [M] drivers/gpu/drm/i915/header_test_intel_csr.o CC [M] drivers/gpu/drm/i915/header_test_intel_ddi.o CC [M] drivers/gpu/drm/i915/header_test_intel_display_power.o CC [M] drivers/gpu/drm/i915/header_test_intel_dp.o CC [M] drivers/gpu/drm/i915/header_test_intel_dp_aux_backlight.o CC [M] drivers/gpu/drm/i915/header_test_intel_dp_link_training.o CC [M] drivers/gpu/drm/i915/header_test_intel_dp_mst.o CC [M] drivers/gpu/drm/i915/header_test_intel_dpio_phy.o CC [M] drivers/gpu/drm/i915/header_test_intel_dpll_mgr.o CC [M] drivers/gpu/drm/i915/header_test_intel_drv.o CC [M] drivers/gpu/drm/i915/header_test_intel_dsi.o CC [M] drivers/gpu/drm/i915/header_test_intel_dsi_dcs_backlight.o CC [M] drivers/gpu/drm/i915/header_test_intel_dvo.o CC [M] drivers/gpu/drm/i915/header_test_intel_dvo_dev.o CC [M] drivers/gpu/drm/i915/header_test_intel_fbc.o CC [M] drivers/gpu/drm/i915/header_test_intel_fbdev.o CC [M] drivers/gpu/drm/i915/header_test_intel_fifo_underrun.o CC [M] drivers/gpu/drm/i915/header_test_intel_frontbuffer.o CC [M] drivers/gpu/drm/i915/header_test_intel_gmbus.o CC [M] drivers/gpu/drm/i915/header_test_intel_hdcp.o CC [M] drivers/gpu/drm/i915/header_test_intel_hdmi.o CC [M] drivers/gpu/drm/i915/header_test_intel_hotplug.o CC [M] drivers/gpu/drm/i915/header_test_intel_lpe_audio.o CC [M] drivers/gpu/drm/i915/header_test_intel_lspcon.o CC [M] drivers/gpu/drm/i915/header_test_intel_lvds.o CC [M] drivers/gpu/drm/i915/header_test_intel_overlay.o CC [M] drivers/gpu/drm/i915/header_test_intel_panel.o CC [M] drivers/gpu/drm/i915/header_test_intel_pipe_crc.o CC [M] drivers/gpu/drm/i915/header_test_intel_pm.o CC [M] drivers/gpu/drm/i915/header_test_intel_psr.o CC [M] drivers/gpu/drm/i915/header_test_intel_quirks.o CC [M] drivers/gpu/drm/i915/header_test_intel_runtime_pm.o CC [M] drivers/gpu/drm/i915/header_test_intel_sdvo.o CC [M] drivers/gpu/drm/i915/header_test_intel_sideband.o CC [M] drivers/gpu/drm/i915/header_test_intel_sprite.o CC [M] drivers/gpu/drm/i915/header_test_intel_tv.o CC [M] drivers/gpu/drm/i915/header_test_intel_uncore.o CC [M] drivers/gpu/drm/i915/header_test_intel_vdsc.o CC [M] drivers/gpu/drm/i915/header_test_intel_wakeref.o CC [M] drivers/gpu/drm/i915/intel_dp.o drivers/gpu/drm/i915/intel_dp.c: In function ‘intel_edp_init_connector’: drivers/gpu/drm/i915/intel_dp.c:7282:3: error: too many arguments to function ‘drm_connector_init_panel_orientation_property’ drm_connector_init_panel_orientation_property( ^ In file included from ./include/drm/drm_modes.h:33:0, from ./include/drm/drm_crtc.h:40, from ./include/drm/drm_atomic_helper.h:31, from drivers/gpu/drm/i915/intel_dp.c:37: ./include/drm/drm_connector.h:1372:5: note: declared here int drm_connector_init_panel_orientation_property( ^ scripts/Makefile.build:278: recipe for target 'drivers/gpu/drm/i915/intel_dp.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_dp.o] Error 1 scripts/Makefile.build:489: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:489: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:489: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1071: recipe
[Intel-gfx] [PATCH 1/5] drm/panel: Add helper for reading DT rotation
This adds a helper function for reading the rotation (panel
orientation) from the device tree.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/drm_panel.c | 41 +
include/drm/drm_panel.h | 7 +++
2 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
index dbd5b873e8f2..3b689ce4a51a 100644
--- a/drivers/gpu/drm/drm_panel.c
+++ b/drivers/gpu/drm/drm_panel.c
@@ -172,6 +172,47 @@ struct drm_panel *of_drm_find_panel(const struct
device_node *np)
return ERR_PTR(-EPROBE_DEFER);
}
EXPORT_SYMBOL(of_drm_find_panel);
+
+/**
+ * of_drm_get_panel_orientation - look up the rotation of the panel using a
+ * device tree node
+ * @np: device tree node of the panel
+ * @orientation: orientation enum to be filled in
+ *
+ * Looks up the rotation of a panel in the device tree. The rotation in the
+ * device tree is counter clockwise.
+ *
+ * Return: 0 when a valid rotation value (0, 90, 180, or 270) is read or the
+ * rotation property doesn't exist. -EERROR otherwise.
+ */
+int of_drm_get_panel_orientation(const struct device_node *np, int
*orientation)
+{
+ int rotation, ret;
+
+ ret = of_property_read_u32(np, "rotation", );
+ if (ret == -EINVAL) {
+ /* Don't return an error if there's no rotation property. */
+ *orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
+ return 0;
+ }
+
+ if (ret < 0)
+ return ret;
+
+ if (rotation == 0)
+ *orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
+ else if (rotation == 90)
+ *orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
+ else if (rotation == 180)
+ *orientation = DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
+ else if (rotation == 270)
+ *orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
+ else
+ return -EINVAL;
+
+ return 0;
+}
+EXPORT_SYMBOL(of_drm_get_panel_orientation);
#endif
MODULE_AUTHOR("Thierry Reding ");
diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
index 8c738c0e6e9f..13631b2efbaa 100644
--- a/include/drm/drm_panel.h
+++ b/include/drm/drm_panel.h
@@ -197,11 +197,18 @@ int drm_panel_detach(struct drm_panel *panel);
#if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL)
struct drm_panel *of_drm_find_panel(const struct device_node *np);
+int of_drm_get_panel_orientation(const struct device_node *np,
+int *orientation);
#else
static inline struct drm_panel *of_drm_find_panel(const struct device_node *np)
{
return ERR_PTR(-ENODEV);
}
+int of_drm_get_panel_orientation(const struct device_node *np,
+int *orientation)
+{
+ return -ENODEV;
+}
#endif
#endif
--
2.22.0.rc2.383.gf4fbbf30c2-goog
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[Intel-gfx] [PATCH 5/5] drm/mtk: add panel orientation property
This inits the panel orientation property for the mediatek dsi driver
if the panel orientation (connector.display_info.panel_orientation) is
not DRM_MODE_PANEL_ORIENTATION_UNKNOWN.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 4a0b9150a7bb..08ffdc7526dd 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -782,10 +782,18 @@ static int mtk_dsi_create_connector(struct drm_device
*drm, struct mtk_dsi *dsi)
DRM_ERROR("Failed to attach panel to drm\n");
goto err_connector_cleanup;
}
+
+ ret = drm_connector_init_panel_orientation_property(>conn);
+ if (ret) {
+ DRM_ERROR("Failed to init panel orientation\n");
+ goto err_panel_detach;
+ }
}
return 0;
+err_panel_detach:
+ drm_panel_detach(dsi->panel);
err_connector_cleanup:
drm_connector_cleanup(>conn);
return ret;
--
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[Intel-gfx] [PATCH 4/5] drm/connector: Split out orientation quirk detection
This removes the orientation quirk detection from the code to add
an orientation property to a panel. This is used only for legacy x86
systems, yet we'd like to start using this on device tree systems
where quirk detection like this is not needed.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/drm_connector.c | 16
drivers/gpu/drm/i915/vlv_dsi.c | 13 +
include/drm/drm_connector.h | 2 +-
3 files changed, 14 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index e17586aaa80f..58a09b65028b 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1894,31 +1894,23 @@ EXPORT_SYMBOL(drm_connector_set_vrr_capable_property);
* drm_connector_init_panel_orientation_property -
* initialize the connecters panel_orientation property
* @connector: connector for which to init the panel-orientation property.
- * @width: width in pixels of the panel, used for panel quirk detection
- * @height: height in pixels of the panel, used for panel quirk detection
*
* This function should only be called for built-in panels, after setting
* connector->display_info.panel_orientation first (if known).
*
- * This function will check for platform specific (e.g. DMI based) quirks
- * overriding display_info.panel_orientation first, then if panel_orientation
- * is not DRM_MODE_PANEL_ORIENTATION_UNKNOWN it will attach the
- * "panel orientation" property to the connector.
+ * This function will check if the panel_orientation is not
+ * DRM_MODE_PANEL_ORIENTATION_UNKNOWN. If not, it will attach the "panel
+ * orientation" property to the connector.
*
* Returns:
* Zero on success, negative errno on failure.
*/
int drm_connector_init_panel_orientation_property(
- struct drm_connector *connector, int width, int height)
+ struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
struct drm_display_info *info = >display_info;
struct drm_property *prop;
- int orientation_quirk;
-
- orientation_quirk = drm_get_panel_orientation_quirk(width, height);
- if (orientation_quirk != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
- info->panel_orientation = orientation_quirk;
if (info->panel_orientation == DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
return 0;
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index bfe2891eac37..113129996530 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -1650,6 +1650,7 @@ static void intel_dsi_add_properties(struct
intel_connector *connector)
if (connector->panel.fixed_mode) {
u32 allowed_scalers;
+ int orientation;
allowed_scalers = BIT(DRM_MODE_SCALE_ASPECT) |
BIT(DRM_MODE_SCALE_FULLSCREEN);
if (!HAS_GMCH(dev_priv))
@@ -1660,12 +1661,16 @@ static void intel_dsi_add_properties(struct
intel_connector *connector)
connector->base.state->scaling_mode = DRM_MODE_SCALE_ASPECT;
- connector->base.display_info.panel_orientation =
- vlv_dsi_get_panel_orientation(connector);
- drm_connector_init_panel_orientation_property(
- >base,
+ orientation = drm_get_panel_orientation_quirk(
connector->panel.fixed_mode->hdisplay,
connector->panel.fixed_mode->vdisplay);
+ if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
+ connector->display_info.panel_orientation = orientation;
+ else
+ connector->display_info.panel_orientation =
+ intel_dsi_get_panel_orientation(connector);
+
+ drm_connector_init_panel_orientation_property(>base);
}
}
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 47e749b74e5f..c2992f7a0dd5 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1370,7 +1370,7 @@ void drm_connector_set_link_status_property(struct
drm_connector *connector,
void drm_connector_set_vrr_capable_property(
struct drm_connector *connector, bool capable);
int drm_connector_init_panel_orientation_property(
- struct drm_connector *connector, int width, int height);
+ struct drm_connector *connector);
int drm_connector_attach_max_bpc_property(struct drm_connector *connector,
int min, int max);
--
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[Intel-gfx] [PATCH 3/5] drm/panel: Add attach/detach callbacks
This adds the attach/detach callbacks. These are for setting up
internal state for the connector/panel pair that can't be done at
probe (since the connector doesn't exist) and which don't need to be
repeatedly done for every get/modes, prepare, or enable callback.
Values such as the panel orientation, and display size can be filled
in for the connector.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/drm_panel.c | 14 ++
include/drm/drm_panel.h | 4
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
index 3b689ce4a51a..72f67678d9d5 100644
--- a/drivers/gpu/drm/drm_panel.c
+++ b/drivers/gpu/drm/drm_panel.c
@@ -104,12 +104,23 @@ EXPORT_SYMBOL(drm_panel_remove);
*/
int drm_panel_attach(struct drm_panel *panel, struct drm_connector *connector)
{
+ int ret;
+
if (panel->connector)
return -EBUSY;
panel->connector = connector;
panel->drm = connector->dev;
+ if (panel->funcs->attach) {
+ ret = panel->funcs->attach(panel);
+ if (ret < 0) {
+ panel->connector = NULL;
+ panel->drm = NULL;
+ return ret;
+ }
+ }
+
return 0;
}
EXPORT_SYMBOL(drm_panel_attach);
@@ -128,6 +139,9 @@ EXPORT_SYMBOL(drm_panel_attach);
*/
int drm_panel_detach(struct drm_panel *panel)
{
+ if (panel->funcs->detach)
+ panel->funcs->detach(panel);
+
panel->connector = NULL;
panel->drm = NULL;
diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
index 13631b2efbaa..e136e3a3c996 100644
--- a/include/drm/drm_panel.h
+++ b/include/drm/drm_panel.h
@@ -37,6 +37,8 @@ struct display_timing;
* struct drm_panel_funcs - perform operations on a given panel
* @disable: disable panel (turn off back light, etc.)
* @unprepare: turn off panel
+ * @detach: detach panel->connector (clear internal state, etc.)
+ * @attach: attach panel->connector (update internal state, etc.)
* @prepare: turn on panel and perform set up
* @enable: enable panel (turn on back light, etc.)
* @get_modes: add modes to the connector that the panel is attached to and
@@ -70,6 +72,8 @@ struct display_timing;
struct drm_panel_funcs {
int (*disable)(struct drm_panel *panel);
int (*unprepare)(struct drm_panel *panel);
+ void (*detach)(struct drm_panel *panel);
+ int (*attach)(struct drm_panel *panel);
int (*prepare)(struct drm_panel *panel);
int (*enable)(struct drm_panel *panel);
int (*get_modes)(struct drm_panel *panel);
--
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[Intel-gfx] [PATCH 2/5] dt-bindings: display/panel: Expand rotation documentation
This adds to the rotation documentation to explain how drivers should
use the property and gives an example of the property in a devicetree
node.
Signed-off-by: Derek Basehore
---
.../bindings/display/panel/panel.txt | 32 +++
1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel.txt
b/Documentation/devicetree/bindings/display/panel/panel.txt
index e2e6867852b8..f35d62d933fc 100644
--- a/Documentation/devicetree/bindings/display/panel/panel.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel.txt
@@ -2,3 +2,35 @@ Common display properties
-
- rotation:Display rotation in degrees counter clockwise (0,90,180,270)
+
+Property read from the device tree using of of_drm_get_panel_orientation
+
+The panel driver may apply the rotation at the TCON level, which will
+make the panel look like it isn't rotated to the kernel and any other
+software.
+
+If not, a panel orientation property should be added through the SoC
+vendor DRM code using the drm_connector_init_panel_orientation_property
+function.
+
+Example:
+ panel: panel@0 {
+ compatible = "boe,himax8279d8p";
+ reg = <0>;
+ enable-gpios = < 45 0>;
+ pp33-gpios = < 35 0>;
+ pp18-gpios = < 36 0>;
+ pinctrl-names = "default", "state_3300mv", "state_1800mv";
+ pinctrl-0 = <_pins_default>;
+ pinctrl-1 = <_pins_3300mv>;
+ pinctrl-2 = <_pins_1800mv>;
+ backlight = <_lcd0>;
+ rotation = <180>;
+ status = "okay";
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+ };
--
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[Intel-gfx] [PATCH 0/5] Panel rotation patches
This adds the plumbing for reading panel rotation from the devicetree and sets up adding a panel property for the panel orientation on Mediatek SoCs when a rotation is present. Derek Basehore (5): drm/panel: Add helper for reading DT rotation dt-bindings: display/panel: Expand rotation documentation drm/panel: Add attach/detach callbacks drm/connector: Split out orientation quirk detection drm/mtk: add panel orientation property .../bindings/display/panel/panel.txt | 32 +++ drivers/gpu/drm/drm_connector.c | 16 ++ drivers/gpu/drm/drm_panel.c | 55 +++ drivers/gpu/drm/i915/vlv_dsi.c| 13 +++-- drivers/gpu/drm/mediatek/mtk_dsi.c| 8 +++ include/drm/drm_connector.h | 2 +- include/drm/drm_panel.h | 11 7 files changed, 120 insertions(+), 17 deletions(-) -- 2.22.0.rc2.383.gf4fbbf30c2-goog ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 04/23] drm/i915: Sanitize the terminology used for TypeC port modes
On Tue, Jun 04, 2019 at 05:58:07PM +0300, Imre Deak wrote:
The TypeC port mode can switch dynamically, to reflect that better call
the port's mode as 'mode' rather than 'type'.
While at it:
- s/TC_PORT_TBT/TC_PORT_TBT_ALT/ and s/TC_PORT_TYPEC/TC_PORT_DP_ALT/.
'TYPEC' is ambiguous, TBT_ALT and DP_ALT better match the reality.
\o/
- Remove the 'unknown' TypeC port mode. The mode is always known, it's
the TBT-alt/safe mode after HW reset and after disconnecting the PHY.
Simplify the tc_port/tc_type checks accordingly.
I think the unknown was there to cover the first time we set the type
(aka mode). Since we don't do this during initialization and only when
updating the connected state, we needed that to protect some functions.
- Don't WARN if the port mode changes, that can happen normally.
No functional changes.
Cc: Animesh Manna
Cc: Paulo Zanoni
Cc: Anusha Srivatsa
Cc: José Roberto de Souza
Cc: Rodrigo Vivi
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_ddi.c | 11 +++---
drivers/gpu/drm/i915/intel_display.h | 7 ++--
drivers/gpu/drm/i915/intel_dp.c | 2 +-
drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i915/intel_tc.c | 48 +++
6 files changed, 31 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 5a1c98438375..a3574f14a3d0 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2986,14 +2986,14 @@ static void icl_program_mg_dp_mode(struct
intel_digital_port *intel_dig_port)
enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
u32 ln0, ln1, lane_info;
- if (tc_port == PORT_TC_NONE || intel_dig_port->tc_type == TC_PORT_TBT)
+ if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT)
return;
ln0 = I915_READ(MG_DP_MODE(0, port));
ln1 = I915_READ(MG_DP_MODE(1, port));
- switch (intel_dig_port->tc_type) {
- case TC_PORT_TYPEC:
+ switch (intel_dig_port->tc_mode) {
+ case TC_PORT_DP_ALT:
ln0 &= ~(MG_DP_MODE_CFG_DP_X1_MODE | MG_DP_MODE_CFG_DP_X2_MODE);
ln1 &= ~(MG_DP_MODE_CFG_DP_X1_MODE | MG_DP_MODE_CFG_DP_X2_MODE);
@@ -3036,7 +3036,7 @@ static void icl_program_mg_dp_mode(struct
intel_digital_port *intel_dig_port)
break;
default:
- MISSING_CASE(intel_dig_port->tc_type);
+ MISSING_CASE(intel_dig_port->tc_mode);
return;
}
@@ -3630,8 +3630,7 @@ intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
* Program the lane count for static/dynamic connections on Type-C
ports.
* Skip this step for TBT.
*/
- if (dig_port->tc_type == TC_PORT_UNKNOWN ||
- dig_port->tc_type == TC_PORT_TBT)
+ if (dig_port->tc_mode == TC_PORT_TBT_ALT)
return;
intel_ddi_set_fia_lane_count(encoder, crtc_state, port);
diff --git a/drivers/gpu/drm/i915/intel_display.h
b/drivers/gpu/drm/i915/intel_display.h
index ee6b8194a459..d296556ed82e 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -189,10 +189,9 @@ enum tc_port {
I915_MAX_TC_PORTS
};
-enum tc_port_type {
- TC_PORT_UNKNOWN = 0,
- TC_PORT_TYPEC,
- TC_PORT_TBT,
+enum tc_port_mode {
+ TC_PORT_TBT_ALT,
+ TC_PORT_DP_ALT,
TC_PORT_LEGACY,
};
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b69310bd9914..e1e27662aa6d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1175,7 +1175,7 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) |
DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
- if (intel_dig_port->tc_type == TC_PORT_TBT)
+ if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT)
ret |= DP_AUX_CH_CTL_TBT_IO;
return ret;
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 69787f259677..f4787650a0d3 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2817,7 +2817,7 @@ icl_get_dpll(struct intel_crtc_state *crtc_state,
intel_dig_port = enc_to_dig_port(>base);
}
- if (intel_dig_port->tc_type == TC_PORT_TBT) {
+ if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT) {
min = DPLL_ID_ICL_TBTPLL;
max = min;
ret = icl_calc_dpll_state(crtc_state, encoder);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0dcc03592d6e..30cd49dbd0d8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1225,7 +1225,7 @@ struct intel_digital_port {
enum aux_ch aux_ch;
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add Wa_1409120013:icl,ehl
== Series Details ==
Series: drm/i915: Add Wa_1409120013:icl,ehl
URL : https://patchwork.freedesktop.org/series/61867/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13231
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13231/
Known issues
Here are the changes found in Patchwork_13231 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13231/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
* igt@i915_selftest@live_requests:
- fi-icl-dsi: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] /
[fdo#109644] / [fdo#110464])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-dsi/igt@i915_selftest@live_requests.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13231/fi-icl-dsi/igt@i915_selftest@live_requests.html
* igt@vgem_basic@second-client:
- fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@vgem_ba...@second-client.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13231/fi-icl-u3/igt@vgem_ba...@second-client.html
Possible fixes
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13231/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +2
similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13231/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][11] ([fdo#110235]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13231/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#109644]: https://bugs.freedesktop.org/show_bug.cgi?id=109644
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
[fdo#110464]: https://bugs.freedesktop.org/show_bug.cgi?id=110464
Participating hosts (54 -> 47)
--
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13231
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13231: c39a97726865031af2d51bb79b9eeb0350b7b6e2 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c39a97726865 drm/i915: Add Wa_1409120013:icl,ehl
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13231/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/fb-helper: Move modesetting code to drm_client (rev9)
== Series Details == Series: drm/fb-helper: Move modesetting code to drm_client (rev9) URL : https://patchwork.freedesktop.org/series/58597/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13211_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13211_full that come from known issues: ### IGT changes ### Issues hit * igt@kms_draw_crc@draw-method-rgb565-blt-xtiled: - shard-skl: [PASS][1] -> [FAIL][2] ([fdo#103184] / [fdo#103232]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl2/igt@kms_draw_...@draw-method-rgb565-blt-xtiled.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-skl7/igt@kms_draw_...@draw-method-rgb565-blt-xtiled.html * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: [PASS][3] -> [FAIL][4] ([fdo#105363]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl2/igt@kms_f...@flip-vs-expired-vblank.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-skl1/igt@kms_f...@flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-suspend: - shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713] / [fdo#109507]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb6/igt@kms_f...@flip-vs-suspend.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-iclb6/igt@kms_f...@flip-vs-suspend.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite: - shard-iclb: [PASS][7] -> [FAIL][8] ([fdo#103167]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb7/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-indfb-draw-pwrite.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-primscrn-pri-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move: - shard-hsw: [PASS][9] -> [SKIP][10] ([fdo#109271]) +14 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw2/igt@kms_frontbuffer_track...@fbc-2p-scndscrn-cur-indfb-move.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-scndscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-apl: [PASS][11] -> [DMESG-WARN][12] ([fdo#108566]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl4/igt@kms_frontbuffer_track...@fbc-suspend.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-apl7/igt@kms_frontbuffer_track...@fbc-suspend.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw: - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108040]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl2/igt@kms_frontbuffer_track...@fbcpsr-1p-pri-indfb-multidraw.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-skl7/igt@kms_frontbuffer_track...@fbcpsr-1p-pri-indfb-multidraw.html * igt@kms_mmap_write_crc@main: - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#110870]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl2/igt@kms_mmap_write_...@main.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-skl7/igt@kms_mmap_write_...@main.html * igt@kms_setmode@basic: - shard-apl: [PASS][17] -> [FAIL][18] ([fdo#99912]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl4/igt@kms_setm...@basic.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-apl3/igt@kms_setm...@basic.html Possible fixes * igt@gem_eio@in-flight-suspend: - shard-skl: [INCOMPLETE][19] ([fdo#104108]) -> [PASS][20] +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl4/igt@gem_...@in-flight-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-skl2/igt@gem_...@in-flight-suspend.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-kbl: [DMESG-WARN][21] ([fdo#108566]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-kbl6/igt@kms_cursor_...@pipe-b-cursor-suspend.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13211/shard-kbl4/igt@kms_cursor_...@pipe-b-cursor-suspend.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: [FAIL][23] ([fdo#105363]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk1/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html [24]:
Re: [Intel-gfx] [PATCH 03/23] drm/i915: Move the TypeC port handling code to a separate file
On Thu, Jun 06, 2019 at 11:42:46AM +0300, Jani Nikula wrote:
On Tue, 04 Jun 2019, Imre Deak wrote:
Move the TypeC port handling functions to a new file for clarity.
While at it:
- s/icl_tc_port_connected()/intel_tc_port_connected()/
icl_tc_phy_disconnect(), will be unexported later.
- s/intel_dp_get_fia_supported_lane_count()/intel_tc_port_fia_max_lane_count()/
It's used for HDMI legacy mode too.
- Simplify function interfaces by passing only dig_port to them.
No functional changes.
Some nitpicks below.
BR,
Jani.
Cc: Animesh Manna
Cc: Paulo Zanoni
Cc: José Roberto de Souza
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/Makefile.header-test | 1 +
drivers/gpu/drm/i915/intel_ddi.c | 6 +-
drivers/gpu/drm/i915/intel_dp.c | 227 +
drivers/gpu/drm/i915/intel_dp.h | 2 -
drivers/gpu/drm/i915/intel_tc.c | 230 ++
drivers/gpu/drm/i915/intel_tc.h | 13 ++
7 files changed, 252 insertions(+), 230 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_tc.c
create mode 100644 drivers/gpu/drm/i915/intel_tc.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c0a7b2994077..74c4d11d83eb 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -171,7 +171,8 @@ i915-y += intel_audio.o \
intel_psr.o \
intel_quirks.o \
intel_sideband.o \
- intel_sprite.o
+ intel_sprite.o \
+ intel_tc.o
i915-$(CONFIG_ACPI)+= intel_acpi.o intel_opregion.o
i915-$(CONFIG_DRM_FBDEV_EMULATION) += intel_fbdev.o
diff --git a/drivers/gpu/drm/i915/Makefile.header-test
b/drivers/gpu/drm/i915/Makefile.header-test
index 6ef3b647ac65..e80e8e45b09c 100644
--- a/drivers/gpu/drm/i915/Makefile.header-test
+++ b/drivers/gpu/drm/i915/Makefile.header-test
@@ -58,6 +58,7 @@ header_test := \
intel_sdvo.h \
intel_sideband.h \
intel_sprite.h \
+ intel_tc.h \
intel_tv.h \
intel_uncore.h \
intel_vdsc.h \
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 350eaf54f01f..5a1c98438375 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -45,6 +45,7 @@
#include "intel_lspcon.h"
#include "intel_panel.h"
#include "intel_psr.h"
+#include "intel_tc.h"
#include "intel_vdsc.h"
struct ddi_buf_trans {
@@ -3904,7 +3905,6 @@ static int intel_ddi_compute_config(struct intel_encoder
*encoder,
static void intel_ddi_encoder_suspend(struct intel_encoder *encoder)
{
struct intel_digital_port *dig_port = enc_to_dig_port(>base);
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
intel_dp_encoder_suspend(encoder);
@@ -3914,7 +3914,7 @@ static void intel_ddi_encoder_suspend(struct
intel_encoder *encoder)
* even if the sink has disappeared while being suspended.
*/
if (dig_port->tc_legacy_port)
- icl_tc_phy_disconnect(i915, dig_port);
+ icl_tc_phy_disconnect(dig_port);
}
static void intel_ddi_encoder_reset(struct drm_encoder *drm_encoder)
@@ -3936,7 +3936,7 @@ static void intel_ddi_encoder_destroy(struct drm_encoder
*encoder)
intel_dp_encoder_flush_work(encoder);
if (intel_port_is_tc(i915, dig_port->base.port))
- icl_tc_phy_disconnect(i915, dig_port);
+ icl_tc_phy_disconnect(dig_port);
drm_encoder_cleanup(encoder);
kfree(dig_port);
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 24b56b2a76c8..b69310bd9914 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -62,6 +62,7 @@
#include "intel_panel.h"
#include "intel_psr.h"
#include "intel_sideband.h"
+#include "intel_tc.h"
#include "intel_vdsc.h"
#define DP_DPRX_ESI_LEN 14
@@ -211,46 +212,13 @@ static int intel_dp_max_common_rate(struct intel_dp
*intel_dp)
return intel_dp->common_rates[intel_dp->num_common_rates - 1];
}
-static int intel_dp_get_fia_supported_lane_count(struct intel_dp *intel_dp)
-{
- struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
- enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
- intel_wakeref_t wakeref;
- u32 lane_info;
-
- if (tc_port == PORT_TC_NONE || dig_port->tc_type != TC_PORT_TYPEC)
- return 4;
-
- lane_info = 0;
- with_intel_display_power(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref)
- lane_info = (I915_READ(PORT_TX_DFLEXDPSP) &
-DP_LANE_ASSIGNMENT_MASK(tc_port)) >>
- DP_LANE_ASSIGNMENT_SHIFT(tc_port);
-
- switch (lane_info) {
- default:
- MISSING_CASE(lane_info);
- case
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [RFC,1/2] drm/i915: move modesetting output/encoder code under display/
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: move modesetting
output/encoder code under display/
URL : https://patchwork.freedesktop.org/series/61865/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13230
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/
Known issues
Here are the changes found in Patchwork_13230 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_create@basic:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_ctx_cre...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/fi-icl-u3/igt@gem_ctx_cre...@basic.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#109485])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +2
similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][7] ([fdo#110235]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 47)
--
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13230
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13230: 619dc92bb2e54211a071b6d54cbb6d2c48d731f4 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
619dc92bb2e5 drm/i915: move modesetting core code under display/
b49cf84c98a3 drm/i915: move modesetting output/encoder code under display/
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/
___
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[Intel-gfx] [PATCH] drm/i915: Add Wa_1409120013:icl,ehl
This chicken bit should be set before enabling FBC to avoid screen
corruption when the plane size has odd vertical and horizontal
dimensions. It is safe to leave the bit set even when FBC is disabled.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
drivers/gpu/drm/i915/intel_fbc.c | 4
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7a26766ba84d..2af04568449e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3150,6 +3150,8 @@ enum i915_power_well_id {
/* Framebuffer compression for Ironlake */
#define ILK_DPFC_CB_BASE _MMIO(0x43200)
+#define ILK_DPFC_CHICKEN _MMIO(0x43224)
+#define ILK_DPFC_CHICKEN_SPARE14 REG_BIT(14)
#define ILK_DPFC_CONTROL _MMIO(0x43208)
#define FBC_CTL_FALSE_COLOR (1 << 10)
/* The bit 28-8 is reserved */
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 5679f2fffb7c..875ad83c3d32 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -344,6 +344,10 @@ static void gen7_fbc_activate(struct drm_i915_private
*dev_priv)
HSW_FBCQ_DIS);
}
+ if (IS_GEN(dev_priv, 11))
+ /* Wa_1409120013:icl,ehl */
+ I915_WRITE(ILK_DPFC_CHICKEN, ILK_DPFC_CHICKEN_SPARE14);
+
I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
intel_fbc_recompress(dev_priv);
--
2.14.5
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[Intel-gfx] ✓ Fi.CI.BAT: success for Use ranges for voltage level lookup
== Series Details ==
Series: Use ranges for voltage level lookup
URL : https://patchwork.freedesktop.org/series/61864/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13229
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/
Known issues
Here are the changes found in Patchwork_13229 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_close_race@basic-threads:
- fi-icl-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-dsi/igt@gem_close_r...@basic-threads.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/fi-icl-dsi/igt@gem_close_r...@basic-threads.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#109485])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_flip@basic-flip-vs-modeset:
- fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1
similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@kms_f...@basic-flip-vs-modeset.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/fi-icl-u3/igt@kms_f...@basic-flip-vs-modeset.html
Possible fixes
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +2
similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][11] ([fdo#110235]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 46)
--
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ivb-3770 fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13229
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13229: 5c28bbf694d434ab85834b1fb462027aec4b7e37 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5c28bbf694d4 drm/i915/skl: use ranges for voltage level lookup
b7c1a4d68e02 drm/i915/cnl: use ranges for voltage level lookup
9971242e5416 drm/i915/icl: use ranges for voltage level lookup
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/
___
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[Intel-gfx] [RFC 2/2] drm/i915: move modesetting core code under display/
Now that we have a new subdirectory for display code, continue by moving
modesetting core code.
display/intel_frontbuffer.h sticks out like a sore thumb, otherwise this
is, again, a surprisingly clean operation.
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 61 ++-
drivers/gpu/drm/i915/Makefile.header-test | 25
.../gpu/drm/i915/display/Makefile.header-test | 2 +-
.../gpu/drm/i915/{ => display}/intel_acpi.c | 0
.../gpu/drm/i915/{ => display}/intel_acpi.h | 0
.../gpu/drm/i915/{ => display}/intel_atomic.c | 0
.../gpu/drm/i915/{ => display}/intel_atomic.h | 0
.../i915/{ => display}/intel_atomic_plane.c | 0
.../i915/{ => display}/intel_atomic_plane.h | 0
.../gpu/drm/i915/{ => display}/intel_audio.c | 0
.../gpu/drm/i915/{ => display}/intel_audio.h | 0
.../gpu/drm/i915/{ => display}/intel_bios.c | 0
.../gpu/drm/i915/{ => display}/intel_bios.h | 0
drivers/gpu/drm/i915/{ => display}/intel_bw.c | 0
drivers/gpu/drm/i915/{ => display}/intel_bw.h | 0
.../gpu/drm/i915/{ => display}/intel_cdclk.c | 0
.../gpu/drm/i915/{ => display}/intel_cdclk.h | 0
.../gpu/drm/i915/{ => display}/intel_color.c | 0
.../gpu/drm/i915/{ => display}/intel_color.h | 0
.../drm/i915/{ => display}/intel_combo_phy.c | 0
.../drm/i915/{ => display}/intel_combo_phy.h | 0
.../drm/i915/{ => display}/intel_connector.c | 0
.../drm/i915/{ => display}/intel_connector.h | 0
.../drm/i915/{ => display}/intel_display.c| 0
.../drm/i915/{ => display}/intel_display.h| 0
.../i915/{ => display}/intel_display_power.c | 0
.../i915/{ => display}/intel_display_power.h | 0
.../drm/i915/{ => display}/intel_dpio_phy.c | 0
.../drm/i915/{ => display}/intel_dpio_phy.h | 0
.../drm/i915/{ => display}/intel_dpll_mgr.c | 0
.../drm/i915/{ => display}/intel_dpll_mgr.h | 0
.../gpu/drm/i915/{ => display}/intel_fbc.c| 0
.../gpu/drm/i915/{ => display}/intel_fbc.h| 0
.../gpu/drm/i915/{ => display}/intel_fbdev.c | 0
.../gpu/drm/i915/{ => display}/intel_fbdev.h | 0
.../i915/{ => display}/intel_fifo_underrun.c | 0
.../i915/{ => display}/intel_fifo_underrun.h | 0
.../i915/{ => display}/intel_frontbuffer.c| 0
.../i915/{ => display}/intel_frontbuffer.h| 0
.../gpu/drm/i915/{ => display}/intel_hdcp.c | 0
.../gpu/drm/i915/{ => display}/intel_hdcp.h | 0
.../drm/i915/{ => display}/intel_hotplug.c| 0
.../drm/i915/{ => display}/intel_hotplug.h| 0
.../drm/i915/{ => display}/intel_lpe_audio.c | 0
.../drm/i915/{ => display}/intel_lpe_audio.h | 0
.../drm/i915/{ => display}/intel_opregion.c | 0
.../drm/i915/{ => display}/intel_opregion.h | 0
.../drm/i915/{ => display}/intel_overlay.c| 0
.../drm/i915/{ => display}/intel_overlay.h| 0
.../drm/i915/{ => display}/intel_pipe_crc.c | 0
.../drm/i915/{ => display}/intel_pipe_crc.h | 0
.../gpu/drm/i915/{ => display}/intel_psr.c| 0
.../gpu/drm/i915/{ => display}/intel_psr.h| 0
.../gpu/drm/i915/{ => display}/intel_quirks.c | 0
.../gpu/drm/i915/{ => display}/intel_quirks.h | 0
.../drm/i915/{ => display}/intel_sideband.c | 0
.../drm/i915/{ => display}/intel_sideband.h | 0
.../gpu/drm/i915/{ => display}/intel_sprite.c | 0
.../gpu/drm/i915/{ => display}/intel_sprite.h | 0
.../drm/i915/{ => display}/intel_vbt_defs.h | 0
drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 3 +-
drivers/gpu/drm/i915/gem/i915_gem_domain.c| 3 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 3 +-
drivers/gpu/drm/i915/gem/i915_gem_object.c| 3 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 3 +-
drivers/gpu/drm/i915/gvt/opregion.c | 2 +-
drivers/gpu/drm/i915/i915_debugfs.c | 8 +--
drivers/gpu/drm/i915/i915_drv.c | 18 +++---
drivers/gpu/drm/i915/i915_drv.h | 13 ++--
drivers/gpu/drm/i915/i915_gem.c | 5 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 5 +-
drivers/gpu/drm/i915/i915_irq.c | 9 +--
drivers/gpu/drm/i915/i915_pci.c | 3 +-
drivers/gpu/drm/i915/i915_suspend.c | 2 +-
drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
drivers/gpu/drm/i915/i915_vma.c | 10 +--
drivers/gpu/drm/i915/intel_device_info.h | 4 +-
drivers/gpu/drm/i915/intel_pm.c | 9 +--
drivers/gpu/drm/i915/intel_runtime_pm.h | 3 +-
80 files changed, 95 insertions(+), 105 deletions(-)
rename drivers/gpu/drm/i915/{ => display}/intel_acpi.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_acpi.h (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_atomic.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_atomic.h (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_atomic_plane.c (100%)
rename drivers/gpu/drm/i915/{ =>
[Intel-gfx] [RFC 1/2] drm/i915: move modesetting output/encoder code under display/
Add a new subdirectory for display code, and start off by moving
modesetting output/encoder code. Judging by the include changes, this is
a surprisingly clean operation.
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 55 ++-
drivers/gpu/drm/i915/Makefile.header-test | 18 --
drivers/gpu/drm/i915/display/Makefile | 2 +
.../gpu/drm/i915/display/Makefile.header-test | 16 ++
.../gpu/drm/i915/{ => display}/dvo_ch7017.c | 0
.../gpu/drm/i915/{ => display}/dvo_ch7xxx.c | 0
drivers/gpu/drm/i915/{ => display}/dvo_ivch.c | 0
.../gpu/drm/i915/{ => display}/dvo_ns2501.c | 0
.../gpu/drm/i915/{ => display}/dvo_sil164.c | 0
.../gpu/drm/i915/{ => display}/dvo_tfp410.c | 0
drivers/gpu/drm/i915/{ => display}/icl_dsi.c | 0
.../gpu/drm/i915/{ => display}/intel_crt.c| 0
.../gpu/drm/i915/{ => display}/intel_crt.h| 0
.../gpu/drm/i915/{ => display}/intel_ddi.c| 0
.../gpu/drm/i915/{ => display}/intel_ddi.h| 0
drivers/gpu/drm/i915/{ => display}/intel_dp.c | 0
drivers/gpu/drm/i915/{ => display}/intel_dp.h | 0
.../{ => display}/intel_dp_aux_backlight.c| 0
.../{ => display}/intel_dp_aux_backlight.h| 0
.../{ => display}/intel_dp_link_training.c| 0
.../{ => display}/intel_dp_link_training.h| 0
.../gpu/drm/i915/{ => display}/intel_dp_mst.c | 0
.../gpu/drm/i915/{ => display}/intel_dp_mst.h | 0
.../gpu/drm/i915/{ => display}/intel_dsi.c| 0
.../gpu/drm/i915/{ => display}/intel_dsi.h| 0
.../{ => display}/intel_dsi_dcs_backlight.c | 0
.../{ => display}/intel_dsi_dcs_backlight.h | 0
.../drm/i915/{ => display}/intel_dsi_vbt.c| 0
.../gpu/drm/i915/{ => display}/intel_dvo.c| 0
.../gpu/drm/i915/{ => display}/intel_dvo.h| 0
.../drm/i915/{ => display}/intel_dvo_dev.h| 0
.../gpu/drm/i915/{ => display}/intel_gmbus.c | 0
.../gpu/drm/i915/{ => display}/intel_gmbus.h | 0
.../gpu/drm/i915/{ => display}/intel_hdmi.c | 0
.../gpu/drm/i915/{ => display}/intel_hdmi.h | 0
.../gpu/drm/i915/{ => display}/intel_lspcon.c | 0
.../gpu/drm/i915/{ => display}/intel_lspcon.h | 0
.../gpu/drm/i915/{ => display}/intel_lvds.c | 0
.../gpu/drm/i915/{ => display}/intel_lvds.h | 0
.../gpu/drm/i915/{ => display}/intel_panel.c | 0
.../gpu/drm/i915/{ => display}/intel_panel.h | 0
.../gpu/drm/i915/{ => display}/intel_sdvo.c | 0
.../gpu/drm/i915/{ => display}/intel_sdvo.h | 0
drivers/gpu/drm/i915/{ => display}/intel_tv.c | 0
drivers/gpu/drm/i915/{ => display}/intel_tv.h | 0
.../gpu/drm/i915/{ => display}/intel_vdsc.c | 0
.../gpu/drm/i915/{ => display}/intel_vdsc.h | 0
drivers/gpu/drm/i915/{ => display}/vlv_dsi.c | 0
.../gpu/drm/i915/{ => display}/vlv_dsi_pll.c | 0
drivers/gpu/drm/i915/i915_debugfs.c | 5 +-
drivers/gpu/drm/i915/i915_drv.c | 5 +-
drivers/gpu/drm/i915/i915_suspend.c | 3 +-
drivers/gpu/drm/i915/intel_bios.c | 3 +-
drivers/gpu/drm/i915/intel_connector.c| 3 +-
drivers/gpu/drm/i915/intel_display.c | 23
drivers/gpu/drm/i915/intel_display_power.c| 5 +-
drivers/gpu/drm/i915/intel_dpio_phy.c | 3 +-
drivers/gpu/drm/i915/intel_frontbuffer.c | 3 +-
drivers/gpu/drm/i915/intel_opregion.c | 3 +-
drivers/gpu/drm/i915/intel_psr.c | 3 +-
60 files changed, 81 insertions(+), 69 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/Makefile
create mode 100644 drivers/gpu/drm/i915/display/Makefile.header-test
rename drivers/gpu/drm/i915/{ => display}/dvo_ch7017.c (100%)
rename drivers/gpu/drm/i915/{ => display}/dvo_ch7xxx.c (100%)
rename drivers/gpu/drm/i915/{ => display}/dvo_ivch.c (100%)
rename drivers/gpu/drm/i915/{ => display}/dvo_ns2501.c (100%)
rename drivers/gpu/drm/i915/{ => display}/dvo_sil164.c (100%)
rename drivers/gpu/drm/i915/{ => display}/dvo_tfp410.c (100%)
rename drivers/gpu/drm/i915/{ => display}/icl_dsi.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_crt.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_crt.h (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_ddi.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_ddi.h (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dp.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dp.h (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dp_aux_backlight.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dp_aux_backlight.h (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dp_link_training.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dp_link_training.h (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dp_mst.c (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dp_mst.h (100%)
rename drivers/gpu/drm/i915/{ => display}/intel_dsi.c (100%)
rename drivers/gpu/drm/i915/{ =>
[Intel-gfx] [PATCH v2 3/3] drm/i915/skl: use ranges for voltage level lookup
Like was done for ICL, let's convert the voltage level lookup to use
frequency ranges rather than individual frequencies. For deciding the
voltage, the individual value doesn't really matter.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_cdclk.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
b/drivers/gpu/drm/i915/intel_cdclk.c
index 80e22507cd34..8993ab283562 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -809,20 +809,14 @@ static int skl_calc_cdclk(int min_cdclk, int vco)
static u8 skl_calc_voltage_level(int cdclk)
{
- switch (cdclk) {
- default:
- case 308571:
- case 337500:
- return 0;
- case 45:
- case 432000:
- return 1;
- case 54:
- return 2;
- case 617143:
- case 675000:
+ if (cdclk > 54)
return 3;
- }
+ else if (cdclk > 45)
+ return 2;
+ else if (cdclk > 337500)
+ return 1;
+ else
+ return 0;
}
static void skl_dpll0_update(struct drm_i915_private *dev_priv,
--
2.21.0
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[Intel-gfx] [PATCH v2 2/3] drm/i915/cnl: use ranges for voltage level lookup
Like was done for ICL, let's convert the voltage level lookup to use
frequency ranges rather than individual frequencies. For deciding the
voltage, the individual value doesn't really matter.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_cdclk.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
b/drivers/gpu/drm/i915/intel_cdclk.c
index 465a72d185ad..80e22507cd34 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1531,15 +1531,12 @@ static int cnl_calc_cdclk(int min_cdclk)
static u8 cnl_calc_voltage_level(int cdclk)
{
- switch (cdclk) {
- default:
- case 168000:
- return 0;
- case 336000:
- return 1;
- case 528000:
+ if (cdclk > 336000)
return 2;
- }
+ else if (cdclk > 168000)
+ return 1;
+ else
+ return 0;
}
static void cnl_cdclk_pll_update(struct drm_i915_private *dev_priv,
--
2.21.0
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[Intel-gfx] [PATCH v2 1/3] drm/i915/icl: use ranges for voltage level lookup
Spec shows voltage level 0 as 307.2, 312, or lower and suggests to use
range checks. Prepare for having other frequencies in these ranges by
not comparing the exact frequency.
v2: invert checks by comparing biggest cdclk first (suggested by Ville)
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_cdclk.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
b/drivers/gpu/drm/i915/intel_cdclk.c
index 6988c6cbc362..465a72d185ad 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1865,21 +1865,12 @@ static void icl_set_cdclk(struct drm_i915_private
*dev_priv,
static u8 icl_calc_voltage_level(int cdclk)
{
- switch (cdclk) {
- case 5:
- case 307200:
- case 312000:
- return 0;
- case 556800:
- case 552000:
- return 1;
- default:
- MISSING_CASE(cdclk);
- /* fall through */
- case 652800:
- case 648000:
+ if (cdclk > 556800)
return 2;
- }
+ else if (cdclk > 312000)
+ return 1;
+ else
+ return 0;
}
static void icl_get_cdclk(struct drm_i915_private *dev_priv,
--
2.21.0
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[Intel-gfx] [PATCH v2 0/3] Use ranges for voltage level lookup
Version 2 of https://patchwork.freedesktop.org/series/61742/, this time applied to all possible platforms, not only Ice Lake. I also changed the if else chain to use big to small frequency values according to the suggestion from Ville. $ git grep -e "static.*_calc_voltage_level" -- drivers/gpu/drm/i915 drivers/gpu/drm/i915/intel_cdclk.c:static u8 vlv_calc_voltage_level(struct drm_i915_private *dev_priv, int cdclk) drivers/gpu/drm/i915/intel_cdclk.c:static u8 bdw_calc_voltage_level(int cdclk) drivers/gpu/drm/i915/intel_cdclk.c:static u8 skl_calc_voltage_level(int cdclk) drivers/gpu/drm/i915/intel_cdclk.c:static u8 bxt_calc_voltage_level(int cdclk) drivers/gpu/drm/i915/intel_cdclk.c:static u8 cnl_calc_voltage_level(int cdclk) drivers/gpu/drm/i915/intel_cdclk.c:static u8 icl_calc_voltage_level(int cdclk) vlv: already using ranges (and not applicable for chv) bdw: not applicable as levels don't respect the ranges (confirmed in spec, too) bxt: not applicable as it just divides the cdclk The rest is in this series. Lucas De Marchi (3): drm/i915/icl: use ranges for voltage level lookup drm/i915/cnl: use ranges for voltage level lookup drm/i915/skl: use ranges for voltage level lookup drivers/gpu/drm/i915/intel_cdclk.c | 52 ++ 1 file changed, 17 insertions(+), 35 deletions(-) -- 2.21.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [REBASED,1/2] drm/i915: Move intel_add_dsi_properties to intel_dsi
== Series Details ==
Series: series starting with [REBASED,1/2] drm/i915: Move
intel_add_dsi_properties to intel_dsi
URL : https://patchwork.freedesktop.org/series/61862/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227 -> Patchwork_13228
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/
Known issues
Here are the changes found in Patchwork_13228 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
* igt@kms_addfb_basic@no-handle:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u3/igt@kms_addfb_ba...@no-handle.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/fi-icl-u3/igt@kms_addfb_ba...@no-handle.html
Possible fixes
* igt@gem_basic@bad-close:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u3/igt@gem_ba...@bad-close.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/fi-icl-u3/igt@gem_ba...@bad-close.html
- fi-icl-dsi: [INCOMPLETE][7] ([fdo#107713]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-dsi/igt@gem_ba...@bad-close.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/fi-icl-dsi/igt@gem_ba...@bad-close.html
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
Participating hosts (52 -> 46)
--
Additional (1): fi-snb-2600
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-u2
fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6227 -> Patchwork_13228
CI_DRM_6227: fe62c0390420632afe2193a40097c9f03a0bf725 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13228: 6b35e67428fcf2903600c5dea6143b98395e8c9b @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6b35e67428fc drm/i915: Add intel_dsi properties support for icl
bfc796027b45 drm/i915: Move intel_add_dsi_properties to intel_dsi
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/
___
Intel-gfx mailing list
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [REBASED,1/2] drm/i915: Move intel_add_dsi_properties to intel_dsi
== Series Details ==
Series: series starting with [REBASED,1/2] drm/i915: Move
intel_add_dsi_properties to intel_dsi
URL : https://patchwork.freedesktop.org/series/61862/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
bfc796027b45 drm/i915: Move intel_add_dsi_properties to intel_dsi
-:47: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#47: FILE: drivers/gpu/drm/i915/intel_dsi.c:149:
+ drm_connector_attach_scaling_mode_property(>base,
+
allowed_scalers);
-:53: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#53: FILE: drivers/gpu/drm/i915/intel_dsi.c:155:
+ drm_connector_init_panel_orientation_property(
total: 0 errors, 0 warnings, 2 checks, 110 lines checked
6b35e67428fc drm/i915: Add intel_dsi properties support for icl
-:20: CHECK:LINE_SPACING: Please don't use multiple blank lines
#20: FILE: drivers/gpu/drm/i915/icl_dsi.c:1582:
+
total: 0 errors, 0 warnings, 1 checks, 11 lines checked
___
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Re: [Intel-gfx] [PATCH 27/28] drm/i915: Allow vma binding to occur asynchronously
Quoting Matthew Auld (2019-06-10 18:34:52)
> On Mon, 10 Jun 2019 at 08:21, Chris Wilson wrote:
> >
> > If we let pages be allocated asynchronously, we also then want to push
> > the binding process into an asynchronous task. Make it so, utilising the
> > recent improvements to fence error tracking and struct_mutex reduction.
> >
> > Signed-off-by: Chris Wilson
>
> [snip]
>
> > +static int queue_async_bind(struct i915_vma *vma,
> > + enum i915_cache_level cache_level,
> > + u32 flags)
> > +{
> > + bool ready = true;
> > +
> > + /* We are not allowed to shrink inside vm->mutex! */
> > + vma->async.dma = kmalloc(sizeof(*vma->async.dma),
> > +GFP_NOWAIT | __GFP_NOWARN);
> > + if (!vma->async.dma)
> > + return -ENOMEM;
> > +
> > + dma_fence_init(vma->async.dma,
> > + _bind_ops,
> > + _lock,
> > + vma->vm->i915->mm.unordered_timeline,
> > + 0);
> > +
> > + /* XXX find and avoid allocations under reservation_object locks */
> > + if (!i915_vma_trylock(vma)) {
> > + kfree(fetch_and_zero(>async.dma));
> > + return -EAGAIN;
> > + }
> > +
> > + if (rcu_access_pointer(vma->resv->fence_excl)) { /* async pages */
> > + struct dma_fence *f =
> > reservation_object_get_excl(vma->resv);
> > +
> > + if (!dma_fence_add_callback(f,
> > + >async.cb,
> > + __queue_async_bind))
> > + ready = false;
> > + }
> > + reservation_object_add_excl_fence(vma->resv, vma->async.dma);
> > + i915_vma_unlock(vma);
> > +
> > + i915_vm_get(vma->vm);
> > + i915_vma_get(vma);
> > + __i915_vma_pin(vma); /* avoid being shrunk */
> > +
> > + vma->async.cache_level = cache_level;
> > + vma->async.flags = flags;
>
> Do we need to move this stuff to before the add_callback?
Yes. I'm used to having an i915_sw_fence_commit to have everything in
place before I let go :(
> > + if (ready)
> > + __queue_async_bind(vma->async.dma, >async.cb);
> > +
> > + return 0;
> > +}
> > +
> > /**
> > * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address
> > space.
> > * @vma: VMA to map
> > @@ -293,17 +405,12 @@ int i915_vma_bind(struct i915_vma *vma, enum
> > i915_cache_level cache_level,
> > u32 vma_flags;
> > int ret;
> >
> > + GEM_BUG_ON(!flags);
> > GEM_BUG_ON(!drm_mm_node_allocated(>node));
> > GEM_BUG_ON(vma->size > vma->node.size);
> > -
> > - if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start,
> > - vma->node.size,
> > - vma->vm->total)))
> > - return -ENODEV;
> > -
> > - if (GEM_DEBUG_WARN_ON(!flags))
> > - return -EINVAL;
> > -
> > + GEM_BUG_ON(range_overflows(vma->node.start,
> > + vma->node.size,
> > + vma->vm->total));
> > bind_flags = 0;
> > if (flags & PIN_GLOBAL)
> > bind_flags |= I915_VMA_GLOBAL_BIND;
> > @@ -318,14 +425,18 @@ int i915_vma_bind(struct i915_vma *vma, enum
> > i915_cache_level cache_level,
>
> Are we aiming for vma_bind/vma_bind_async/vma_pin/vma_pin_async etc ?
At the moment, it's a pretty straightforward split between global being
synchronous and user being asynchronous. Now, user should always remain
async, if only because we have to play games with avoiding allocations
underneath vm->mutex; but we may want to make global optionally async
(if we have some caller that cares).
The implication of the question is that you would rather be a flag
upfront so that we don't have to retrofit later on :)
> > if (bind_flags == 0)
> > return 0;
> >
> > - GEM_BUG_ON(!vma->pages);
> > + if ((bind_flags & ~vma_flags) & I915_VMA_LOCAL_BIND)
> > + bind_flags |= I915_VMA_ALLOC_BIND;
> >
> > trace_i915_vma_bind(vma, bind_flags);
> > - ret = vma->ops->bind_vma(vma, cache_level, bind_flags);
> > + if (bind_flags & I915_VMA_ALLOC_BIND)
> > + ret = queue_async_bind(vma, cache_level, bind_flags);
> > + else
> > + ret = __vma_bind(vma, cache_level, bind_flags);
> > if (ret)
> > return ret;
>
> Looks like clear_pages() is called unconditionally in vma_remove() if
> we error out here, even though that is now set as part of the worker?
Right, I moved the ->set_pages, I should move the ->clear_pages.
> > - vma->flags |= bind_flags;
> > + vma->flags |= bind_flags & ~I915_VMA_ALLOC_BIND;
> > return 0;
> > }
> >
> > @@ -569,7 +680,7 @@
Re: [Intel-gfx] [REBASED PATCH 2/2] drm/i915: Add intel_dsi properties support for icl
This is also by Vandita, I screwed up the authorship while rebasing the patches. I'll fix while applying. BR, Jani. On Mon, 10 Jun 2019, Jani Nikula wrote: > Support dsi properties on icl > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110693 > Signed-off-by: Vandita Kulkarni > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/icl_dsi.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c > index 74448e6bf749..e3592db2c1c4 100644 > --- a/drivers/gpu/drm/i915/icl_dsi.c > +++ b/drivers/gpu/drm/i915/icl_dsi.c > @@ -1579,7 +1579,11 @@ void icl_dsi_init(struct drm_i915_private *dev_priv) > goto err; > } > > + > icl_dphy_param_init(intel_dsi); > + > + intel_dsi_add_properties(intel_connector); > + > return; > > err: -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [REBASED PATCH 1/2] drm/i915: Move intel_add_dsi_properties to intel_dsi
From: Vandita Kulkarni
Since intel_add_dsi_properties will be used by other
platforms too move it out of platform specific file.
Signed-off-by: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi.c | 32
drivers/gpu/drm/i915/intel_dsi.h | 3 +++
drivers/gpu/drm/i915/vlv_dsi.c | 42 +---
3 files changed, 36 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 5fec02aceaed..26124a8fe531 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -116,6 +116,12 @@ intel_dsi_get_panel_orientation(struct intel_connector
*connector)
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
enum drm_panel_orientation orientation;
+ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ orientation = vlv_dsi_get_hw_panel_orientation(connector);
+ if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
+ return orientation;
+ }
+
orientation = dev_priv->vbt.dsi.orientation;
if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
return orientation;
@@ -126,3 +132,29 @@ intel_dsi_get_panel_orientation(struct intel_connector
*connector)
return DRM_MODE_PANEL_ORIENTATION_NORMAL;
}
+
+void intel_dsi_add_properties(struct intel_connector *connector)
+{
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+
+ if (connector->panel.fixed_mode) {
+ u32 allowed_scalers;
+
+ allowed_scalers = BIT(DRM_MODE_SCALE_ASPECT) |
+ BIT(DRM_MODE_SCALE_FULLSCREEN);
+ if (!HAS_GMCH(dev_priv))
+ allowed_scalers |= BIT(DRM_MODE_SCALE_CENTER);
+
+ drm_connector_attach_scaling_mode_property(>base,
+
allowed_scalers);
+
+ connector->base.state->scaling_mode = DRM_MODE_SCALE_ASPECT;
+
+ connector->base.display_info.panel_orientation =
+ intel_dsi_get_panel_orientation(connector);
+ drm_connector_init_panel_orientation_property(
+ >base,
+ connector->panel.fixed_mode->hdisplay,
+ connector->panel.fixed_mode->vdisplay);
+ }
+}
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 6d20434636cd..11f7bfb28299 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -162,6 +162,7 @@ int intel_dsi_bitrate(const struct intel_dsi *intel_dsi);
int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi);
enum drm_panel_orientation
intel_dsi_get_panel_orientation(struct intel_connector *connector);
+void intel_dsi_add_properties(struct intel_connector *connector);
/* vlv_dsi.c */
void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
@@ -173,6 +174,8 @@ struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi
*intel_dsi,
const struct mipi_dsi_host_ops
*funcs,
enum port port);
void vlv_dsi_init(struct drm_i915_private *dev_priv);
+enum drm_panel_orientation
+vlv_dsi_get_hw_panel_orientation(struct intel_connector *connector);
/* vlv_dsi_pll.c */
int vlv_dsi_pll_compute(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index e272d826210a..9f911623d685 100644
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -1591,7 +1591,7 @@ static const struct drm_connector_funcs
intel_dsi_connector_funcs = {
.atomic_duplicate_state = intel_digital_connector_duplicate_state,
};
-static enum drm_panel_orientation
+enum drm_panel_orientation
vlv_dsi_get_hw_panel_orientation(struct intel_connector *connector)
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
@@ -1629,46 +1629,6 @@ vlv_dsi_get_hw_panel_orientation(struct intel_connector
*connector)
return orientation;
}
-static enum drm_panel_orientation
-vlv_dsi_get_panel_orientation(struct intel_connector *connector)
-{
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- enum drm_panel_orientation orientation;
-
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
- orientation = vlv_dsi_get_hw_panel_orientation(connector);
- if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
- return orientation;
- }
-
- return intel_dsi_get_panel_orientation(connector);
-}
-
-static void intel_dsi_add_properties(struct intel_connector *connector)
-{
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
-
- if
[Intel-gfx] [REBASED PATCH 2/2] drm/i915: Add intel_dsi properties support for icl
Support dsi properties on icl Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110693 Signed-off-by: Vandita Kulkarni Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/icl_dsi.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 74448e6bf749..e3592db2c1c4 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -1579,7 +1579,11 @@ void icl_dsi_init(struct drm_i915_private *dev_priv) goto err; } + icl_dphy_param_init(intel_dsi); + + intel_dsi_add_properties(intel_connector); + return; err: -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC 14/14] drm/i915: Make GuC GGTT reservation work on ggtt
On Mon, 10 Jun 2019 17:54:19 +0200, Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Michal)
Signed-off-by: Tvrtko Ursulin
Cc: Michal Wajdeczko
with some nits below,
Reviewed-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 37 +++--
drivers/gpu/drm/i915/intel_guc.c| 27 -
drivers/gpu/drm/i915/intel_guc.h| 2 --
3 files changed, 30 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e62041eb10b8..394f347a90ee 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2830,6 +2830,31 @@ static void fini_aliasing_ppgtt(struct
drm_i915_private *i915)
ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
+static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
maybe we should copy some comment from commit 911800765ef6
directly to the code here, to explain why we do that ?
+{
+ u64 size;
+ int ret;
+
+ if (!USES_GUC(ggtt->vm.i915))
+ return 0;
+
+ size = ggtt->vm.total - GUC_GGTT_TOP;
what about making sure that ggtt size is large enough:
GEM_BUG_ON(ggtt->vm.total > GUC_GGTT_TOP)
+
+ ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
+ GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+ PIN_NOEVICT);
+ if (ret)
+ DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
this is now ggtt code, so:
DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
+
+ return ret;
+}
+
+static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
+{
+ if (drm_mm_node_allocated(>uc_fw))
+ drm_mm_remove_node(>uc_fw);
+}
+
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
{
/* Let GEM Manage all of the aperture.
@@ -2867,11 +2892,9 @@ int i915_gem_init_ggtt(struct drm_i915_private
*dev_priv)
if (ret)
return ret;
- if (USES_GUC(dev_priv)) {
- ret = intel_guc_reserve_ggtt_top(_priv->guc);
- if (ret)
- goto err_reserve;
- }
+ ret = ggtt_reserve_guc_top(ggtt);
+ if (ret)
+ goto err_reserve;
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, >vm.mm, hole_start, hole_end) {
@@ -2893,7 +2916,7 @@ int i915_gem_init_ggtt(struct drm_i915_private
*dev_priv)
return 0;
err_appgtt:
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
err_reserve:
drm_mm_remove_node(>error_capture);
return ret;
@@ -2920,7 +2943,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
if (drm_mm_node_allocated(>error_capture))
drm_mm_remove_node(>error_capture);
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(>vm.mm)) {
intel_vgt_deballoon(ggtt);
diff --git a/drivers/gpu/drm/i915/intel_guc.c
b/drivers/gpu/drm/i915/intel_guc.c
index d45d97624402..c40a6efdd33a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct
intel_guc *guc, u32 size)
i915_gem_object_put(obj);
return vma;
}
-
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
- u64 size;
- int ret;
-
- size = ggtt->vm.total - GUC_GGTT_TOP;
-
- ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
- GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
- PIN_NOEVICT);
- if (ret)
- DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
-
- return ret;
-}
-
-void intel_guc_release_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
-
- if (drm_mm_node_allocated(>uc_fw))
- drm_mm_remove_node(>uc_fw);
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h
b/drivers/gpu/drm/i915/intel_guc.h
index 85c3b02a0c08..08c906abdfa2 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32
size);
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
-void
Re: [Intel-gfx] [RFC 13/14] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
On Mon, 10 Jun 2019 17:54:18 +0200, Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
Reduces pointer chasing and gets more to the point.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Michal Wajdeczko
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
with small nit below
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/intel_guc.c| 17 -
drivers/gpu/drm/i915/intel_guc.h| 1 -
drivers/gpu/drm/i915/intel_wopcm.h | 17 +
4 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 979305343ac3..e62041eb10b8 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2853,7 +2853,7 @@ int i915_gem_init_ggtt(struct drm_i915_private
*dev_priv)
* why.
*/
ggtt->pin_bias = max_t(u32, I915_GTT_PAGE_SIZE,
- intel_guc_reserved_gtt_size(_priv->guc));
+ intel_wopcm_guc_size(_priv->wopcm));
ret = intel_vgt_balloon(ggtt);
if (ret)
diff --git a/drivers/gpu/drm/i915/intel_guc.c
b/drivers/gpu/drm/i915/intel_guc.c
index 43232242d167..d45d97624402 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -686,23 +686,6 @@ struct i915_vma *intel_guc_allocate_vma(struct
intel_guc *guc, u32 size)
return vma;
}
-/**
- * intel_guc_reserved_gtt_size()
- * @guc: intel_guc structure
- *
- * The GuC WOPCM mapping shadows the lower part of the GGTT, so if we
are using
- * GuC we can't have any objects pinned in that region. This function
returns
- * the size of the shadowed region.
- *
- * Returns:
- * 0 if GuC is not present or not in use.
- * Otherwise, the GuC WOPCM size.
- */
-u32 intel_guc_reserved_gtt_size(struct intel_guc *guc)
-{
- return guc_to_i915(guc)->wopcm.guc.size;
-}
-
int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
{
struct drm_i915_private *i915 = guc_to_i915(guc);
diff --git a/drivers/gpu/drm/i915/intel_guc.h
b/drivers/gpu/drm/i915/intel_guc.h
index e07e4c69cf08..85c3b02a0c08 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,7 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32
size);
-u32 intel_guc_reserved_gtt_size(struct intel_guc *guc);
int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
void intel_guc_release_ggtt_top(struct intel_guc *guc);
diff --git a/drivers/gpu/drm/i915/intel_wopcm.h
b/drivers/gpu/drm/i915/intel_wopcm.h
index 6298910a384c..1c32d449fc10 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.h
+++ b/drivers/gpu/drm/i915/intel_wopcm.h
@@ -24,6 +24,23 @@ struct intel_wopcm {
} guc;
};
+/**
+ * intel_wopcm_guc_size()
+ * @wopcm: intel_wopcm structure
+ *
+ * The GuC WOPCM mapping shadows the lower part of the GGTT, so if we
are using
+ * GuC we can't have any objects pinned in that region.
maybe we can drop above sentence is we already have something similar
as comment in i915_gem_init_ggtt ? pin/GGTT doesn't fit here.
This function returns
+ * the size of the shadowed region.
+ *
+ * Returns:
+ * 0 if GuC is not present or not in use.
+ * Otherwise, the GuC WOPCM size.
+ */
+static inline u32 intel_wopcm_guc_size(struct intel_wopcm *wopcm)
+{
+return wopcm->guc.size;
+}
+
void intel_wopcm_init_early(struct intel_wopcm *wopcm);
int intel_wopcm_init(struct intel_wopcm *wopcm);
int intel_wopcm_init_hw(struct intel_wopcm *wopcm);
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Re: [Intel-gfx] [PATCH 3/9] drm/i915/dmc: add support for package_header with version 2
>-Original Message-
>From: De Marchi, Lucas
>Sent: Friday, June 7, 2019 2:12 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Vivi, Rodrigo ; Srivatsa, Anusha
>; De Marchi, Lucas
>Subject: [PATCH 3/9] drm/i915/dmc: add support for package_header with
>version 2
>
>The only meaninful change is that it supports up to 32 fw_info entries rather
>than
>the previous max=20.
>
>Signed-off-by: Lucas De Marchi
Reviewed-by: Anusha Srivatsa
>---
> drivers/gpu/drm/i915/intel_csr.c | 38 ++--
> 1 file changed, 26 insertions(+), 12 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_csr.c
>b/drivers/gpu/drm/i915/intel_csr.c
>index 99fa4db95e46..ba72c29acbcc 100644
>--- a/drivers/gpu/drm/i915/intel_csr.c
>+++ b/drivers/gpu/drm/i915/intel_csr.c
>@@ -71,6 +71,7 @@ MODULE_FIRMWARE(BXT_CSR_PATH);
>
> #define CSR_DEFAULT_FW_OFFSET 0x
> #define PACKAGE_MAX_FW_INFO_ENTRIES 20
>+#define PACKAGE_V2_MAX_FW_INFO_ENTRIES32
>
> struct intel_css_header {
> /* 0x09 for DMC */
>@@ -133,7 +134,7 @@ struct intel_package_header {
> /* DMC container header length in dwords */
> u8 header_len;
>
>- /* always value would be 0x01 */
>+ /* 0x01, 0x02 */
> u8 header_ver;
>
> u8 reserved[10];
>@@ -339,7 +340,7 @@ static u32 *parse_csr_fw(struct drm_i915_private
>*dev_priv,
> struct intel_dmc_header *dmc_header;
> struct intel_csr *csr = _priv->csr;
> const struct stepping_info *si = intel_get_stepping_info(dev_priv);
>- u32 dmc_offset, num_entries, readcount = 0, nbytes;
>+ u32 dmc_offset, num_entries, max_entries, readcount = 0, nbytes;
> u32 i;
> u32 *dmc_payload;
> size_t fsize;
>@@ -381,20 +382,32 @@ static u32 *parse_csr_fw(struct drm_i915_private
>*dev_priv,
> /* Extract Package Header information*/
> package_header = (struct intel_package_header *)
> >data[readcount];
>- if (sizeof(struct intel_package_header) !=
>- (package_header->header_len * 4)) {
>+
>+ readcount += sizeof(struct intel_package_header);
>+
>+ if (package_header->header_ver == 1) {
>+ max_entries = PACKAGE_MAX_FW_INFO_ENTRIES;
>+ } else if (package_header->header_ver == 2) {
>+ max_entries = PACKAGE_V2_MAX_FW_INFO_ENTRIES;
>+ } else {
>+ DRM_ERROR("DMC firmware has unknown header version
>%u\n",
>+package_header->header_ver);
>+ return NULL;
>+ }
>+
>+ if (package_header->header_len * 4 !=
>+ sizeof(struct intel_package_header) +
>+ max_entries * sizeof(struct intel_fw_info)) {
> DRM_ERROR("DMC firmware has wrong package header length "
>-"(%u bytes)\n",
>-(package_header->header_len * 4));
>+"(%u bytes)\n", package_header->header_len * 4);
> return NULL;
> }
>
>- readcount += sizeof(struct intel_package_header);
> num_entries = package_header->num_entries;
>- if (WARN_ON(package_header->num_entries >
>PACKAGE_MAX_FW_INFO_ENTRIES))
>- num_entries = PACKAGE_MAX_FW_INFO_ENTRIES;
>+ if (WARN_ON(package_header->num_entries > max_entries))
>+ num_entries = max_entries;
>
>- fsize += PACKAGE_MAX_FW_INFO_ENTRIES * sizeof(struct
>intel_fw_info);
>+ fsize += max_entries * sizeof(struct intel_fw_info);
> if (fsize > fw->size)
> goto error_truncated;
>
>@@ -405,8 +418,9 @@ static u32 *parse_csr_fw(struct drm_i915_private
>*dev_priv,
> si->stepping);
> return NULL;
> }
>- /* we always have space for PACKAGE_MAX_FW_INFO_ENTRIES */
>- readcount += PACKAGE_MAX_FW_INFO_ENTRIES * sizeof(struct
>intel_fw_info);
>+
>+ /* we always have space for max_entries, even if not all are used */
>+ readcount += max_entries * sizeof(struct intel_fw_info);
>
> /* Convert dmc_offset into number of bytes. By default it is in dwords*/
> dmc_offset *= 4;
>--
>2.21.0
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Re: [Intel-gfx] [PATCH 2/9] drm/i915/dmc: extract fw_info and table walk from intel_package_header
>-Original Message-
>From: De Marchi, Lucas
>Sent: Friday, June 7, 2019 2:12 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Vivi, Rodrigo ; Srivatsa, Anusha
>; De Marchi, Lucas
>Subject: [PATCH 2/9] drm/i915/dmc: extract fw_info and table walk from
>intel_package_header
>
>Move fw_info out of struct intel_package_header to allow it to grow more easily
>in future. To make a cleaner move, let's also extract a function to search the
>header for the dmc_offset.
>
>While reviewing this code I wondered why we continued the search even after
>finding a suitable firmware. Add a comment to explain we will continue to try
>to
>find a more specific firmware version, even if this is not required by the
>spec.
>
>Signed-off-by: Lucas De Marchi
Reviewed-by: Anusha Srivatsa
>---
> drivers/gpu/drm/i915/intel_csr.c | 72
> 1 file changed, 55 insertions(+), 17 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_csr.c
>b/drivers/gpu/drm/i915/intel_csr.c
>index 3d2beecd8d0d..99fa4db95e46 100644
>--- a/drivers/gpu/drm/i915/intel_csr.c
>+++ b/drivers/gpu/drm/i915/intel_csr.c
>@@ -70,6 +70,7 @@ MODULE_FIRMWARE(SKL_CSR_PATH);
>MODULE_FIRMWARE(BXT_CSR_PATH);
>
> #define CSR_DEFAULT_FW_OFFSET 0x
>+#define PACKAGE_MAX_FW_INFO_ENTRIES 20
>
> struct intel_css_header {
> /* 0x09 for DMC */
>@@ -139,8 +140,6 @@ struct intel_package_header {
>
> /* Number of valid entries in the FWInfo array below */
> u32 num_entries;
>-
>- struct intel_fw_info fw_info[20];
> } __packed;
>
> struct intel_dmc_header {
>@@ -292,6 +291,46 @@ void intel_csr_load_program(struct drm_i915_private
>*dev_priv)
> gen9_set_dc_state_debugmask(dev_priv);
> }
>
>+/*
>+ * Search fw_info table for dmc_offset to find firmware binary:
>+num_entries is
>+ * already sanitized.
>+ */
>+static u32 find_dmc_fw_offset(const struct intel_fw_info *fw_info,
>+unsigned int num_entries,
>+const struct stepping_info *si) {
>+ u32 dmc_offset = CSR_DEFAULT_FW_OFFSET;
>+ unsigned int i;
>+
>+ for (i = 0; i < num_entries; i++) {
>+ if (fw_info[i].substepping == '*' &&
>+ si->stepping == fw_info[i].stepping) {
>+ dmc_offset = fw_info[i].offset;
>+ break;
>+ }
>+
>+ if (si->stepping == fw_info[i].stepping &&
>+ si->substepping == fw_info[i].substepping) {
>+ dmc_offset = fw_info[i].offset;
>+ break;
>+ }
>+
>+ if (fw_info[i].stepping == '*' &&
>+ fw_info[i].substepping == '*') {
>+ /*
>+ * In theory we should stop the search as generic
>+ * entries should always come after the more specific
>+ * ones, but let's continue to make sure to work even
>+ * with "broken" firmwares. If we don't find a more
>+ * specific one, then we use this entry
>+ */
>+ dmc_offset = fw_info[i].offset;
>+ }
>+ }
>+
>+ return dmc_offset;
>+}
>+
> static u32 *parse_csr_fw(struct drm_i915_private *dev_priv,
>const struct firmware *fw)
> {
>@@ -300,7 +339,7 @@ static u32 *parse_csr_fw(struct drm_i915_private
>*dev_priv,
> struct intel_dmc_header *dmc_header;
> struct intel_csr *csr = _priv->csr;
> const struct stepping_info *si = intel_get_stepping_info(dev_priv);
>- u32 dmc_offset = CSR_DEFAULT_FW_OFFSET, readcount = 0, nbytes;
>+ u32 dmc_offset, num_entries, readcount = 0, nbytes;
> u32 i;
> u32 *dmc_payload;
> size_t fsize;
>@@ -349,27 +388,26 @@ static u32 *parse_csr_fw(struct drm_i915_private
>*dev_priv,
> (package_header->header_len * 4));
> return NULL;
> }
>+
> readcount += sizeof(struct intel_package_header);
>+ num_entries = package_header->num_entries;
>+ if (WARN_ON(package_header->num_entries >
>PACKAGE_MAX_FW_INFO_ENTRIES))
>+ num_entries = PACKAGE_MAX_FW_INFO_ENTRIES;
>
>- /* Search for dmc_offset to find firware binary. */
>- for (i = 0; i < package_header->num_entries; i++) {
>- if (package_header->fw_info[i].substepping == '*' &&
>- si->stepping == package_header->fw_info[i].stepping) {
>- dmc_offset = package_header->fw_info[i].offset;
>- break;
>- } else if (si->stepping == package_header->fw_info[i].stepping
>&&
>- si->substepping == package_header-
>>fw_info[i].substepping) {
>- dmc_offset = package_header->fw_info[i].offset;
>- break;
>- } else if (package_header->fw_info[i].stepping == '*' &&
>-
Re: [Intel-gfx] [RFC 08/14] drm/i915: Store backpointer to intel_gt in the engine
On 6/10/19 9:16 AM, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-10 16:54:13)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 01223864237a..343c4459e8a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -34,6 +34,7 @@ struct drm_i915_reg_table;
struct i915_gem_context;
struct i915_request;
struct i915_sched_attr;
+struct intel_gt;
struct intel_uncore;
typedef u8 intel_engine_mask_t;
@@ -266,6 +267,7 @@ struct intel_engine_execlists {
struct intel_engine_cs {
struct drm_i915_private *i915;
+ struct intel_gt *gt;
I'd push for gt as being the backpointer, and i915 its distant grand
parent. Not sure how much pain that would bring just for the elimination
of one more drm_i915_private, but that's how I picture the
encapsulation.
Would it be worth moving some of the flags in the device_info structure
in a gt substructure, like we did for display, and get a pointer to that
in intel_gt? We could save some jumps back that way and be more coherent
in where we store the info.
Daniele
I'm sure I'm missing a link or two :)
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for Implicit dev_priv removal (rev2)
== Series Details ==
Series: Implicit dev_priv removal (rev2)
URL : https://patchwork.freedesktop.org/series/61705/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227 -> Patchwork_13227
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/
Known issues
Here are the changes found in Patchwork_13227 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_basic@bad-close:
- fi-icl-u2: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u2/igt@gem_ba...@bad-close.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/fi-icl-u2/igt@gem_ba...@bad-close.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: [PASS][3] -> [INCOMPLETE][4] ([fdo#107718])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][5] -> [FAIL][6] ([fdo#108511])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
Possible fixes
* igt@gem_basic@bad-close:
- fi-icl-u3: [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u3/igt@gem_ba...@bad-close.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/fi-icl-u3/igt@gem_ba...@bad-close.html
- fi-icl-dsi: [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-dsi/igt@gem_ba...@bad-close.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/fi-icl-dsi/igt@gem_ba...@bad-close.html
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][11] ([fdo#107713] / [fdo#108569]) ->
[PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
Participating hosts (52 -> 46)
--
Additional (1): fi-snb-2600
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6227 -> Patchwork_13227
CI_DRM_6227: fe62c0390420632afe2193a40097c9f03a0bf725 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13227: f862592a446ffe102ba9e650a22fe22e4ec9ff95 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f862592a446f drm/i915: Make GuC GGTT reservation work on ggtt
7f7e63f7489c drm/i915/guc: Move intel_guc_reserved_gtt_size to
intel_wopcm_guc_size
36083aedd680 drm/i915: Convert i915_gem_init_hw to intel_gt
8789e9c71eaa drm/i915: Consolidate some open coded mmio rmw
1e3e07823505 drm/i915: Convert i915_ppgtt_init_hw to intel_gt
0ea90265d50d drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt
9815d56874c7 drm/i915: Store backpointer to intel_gt in the engine
a3efc681b7d4 drm/i915: Convert gt workarounds to intel_gt
9de87c85d59e drm/i915: Convert init_unused_rings to intel_gt
cfef12d54404 drm/i915: Convert i915_gem_init_swizzling to intel_gt
eb4225fc81d8 drm/i915: Add a couple intel_gt helpers
b81a04a33e41 drm/i915: Introduce struct intel_gt as replacement for anonymous
i915->gt
4594ba392e2c drm/i915: Convert intel_vgt_(de)balloon to uncore
885d95410d8d drm/i915: Make i915_check_and_clear_faults take uncore
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev3)
== Series Details == Series: drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev3) URL : https://patchwork.freedesktop.org/series/61832/ State : success == Summary == CI Bug Log - changes from CI_DRM_6227 -> Patchwork_13226 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/ Known issues Here are the changes found in Patchwork_13226 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_create@basic: - fi-icl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-y/igt@gem_exec_cre...@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/fi-icl-y/igt@gem_exec_cre...@basic.html * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: [PASS][3] -> [INCOMPLETE][4] ([fdo#107718]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html Possible fixes * igt@gem_basic@bad-close: - fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u3/igt@gem_ba...@bad-close.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/fi-icl-u3/igt@gem_ba...@bad-close.html - fi-icl-dsi: [INCOMPLETE][7] ([fdo#107713]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-dsi/igt@gem_ba...@bad-close.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/fi-icl-dsi/igt@gem_ba...@bad-close.html * igt@kms_frontbuffer_tracking@basic: - fi-icl-u2: [FAIL][9] ([fdo#103167]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 Participating hosts (52 -> 47) -- Additional (1): fi-snb-2600 Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6227 -> Patchwork_13226 CI_DRM_6227: fe62c0390420632afe2193a40097c9f03a0bf725 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13226: 4f61077ee58756a41f185bf4880c6fe4bcd585b8 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4f61077ee587 drm/i915: Promote i915->mm.obj_lock to be irqsafe == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs"
== Series Details ==
Series: Revert "drm/i915/icl: More workaround for port F detection due to
broken VBTs"
URL : https://patchwork.freedesktop.org/series/61846/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227 -> Patchwork_13225
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/
Known issues
Here are the changes found in Patchwork_13225 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][1] -> [FAIL][2] ([fdo#109485])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +2
similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u3/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/fi-icl-u3/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
Possible fixes
* igt@gem_basic@bad-close:
- fi-icl-dsi: [INCOMPLETE][5] ([fdo#107713]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-dsi/igt@gem_ba...@bad-close.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/fi-icl-dsi/igt@gem_ba...@bad-close.html
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
Participating hosts (52 -> 46)
--
Additional (1): fi-snb-2600
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6227 -> Patchwork_13225
CI_DRM_6227: fe62c0390420632afe2193a40097c9f03a0bf725 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13225: bc1d12322f5f3c4e30e2d606142e1adf60732898 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
bc1d12322f5f Revert "drm/i915/icl: More workaround for port F detection due to
broken VBTs"
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/
___
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Implicit dev_priv removal (rev2)
== Series Details == Series: Implicit dev_priv removal (rev2) URL : https://patchwork.freedesktop.org/series/61705/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Make i915_check_and_clear_faults take uncore Okay! Commit: drm/i915: Convert intel_vgt_(de)balloon to uncore -O:drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void) Commit: drm/i915: Introduce struct intel_gt as replacement for anonymous i915->gt +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000 becomes 0) Commit: drm/i915: Add a couple intel_gt helpers - +drivers/gpu/drm/i915/gt/intel_gt.h:26:27: warning: no newline at end of file +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000 becomes 0) Commit: drm/i915: Convert i915_gem_init_swizzling to intel_gt -O:drivers/gpu/drm/i915/gt/intel_gt.h:26:27: warning: no newline at end of file +drivers/gpu/drm/i915/gt/intel_gt.h:28:27: warning: no newline at end of file +drivers/gpu/drm/i915/gt/intel_gt.h:28:27: warning: no newline at end of file +drivers/gpu/drm/i915/gt/intel_gt.h:28:27: warning: no newline at end of file +drivers/gpu/drm/i915/gt/intel_gt.h:28:27: warning: no newline at end of file +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000 becomes 0) Commit: drm/i915: Convert init_unused_rings to intel_gt Okay! Commit: drm/i915: Convert gt workarounds to intel_gt +drivers/gpu/drm/i915/gt/intel_gt.h:28:27: warning: no newline at end of file Commit: drm/i915: Store backpointer to intel_gt in the engine Okay! Commit: drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt +drivers/gpu/drm/i915/gt/intel_gt.h:28:27: warning: no newline at end of file Commit: drm/i915: Convert i915_ppgtt_init_hw to intel_gt +drivers/gpu/drm/i915/gt/intel_gt.h:28:27: warning: no newline at end of file Commit: drm/i915: Consolidate some open coded mmio rmw Okay! Commit: drm/i915: Convert i915_gem_init_hw to intel_gt Okay! Commit: drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size -O:drivers/gpu/drm/i915/i915_gem_gtt.c:2855:26: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:2855:26: warning: expression using sizeof(void) Commit: drm/i915: Make GuC GGTT reservation work on ggtt Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Implicit dev_priv removal (rev2)
== Series Details == Series: Implicit dev_priv removal (rev2) URL : https://patchwork.freedesktop.org/series/61705/ State : warning == Summary == $ dim checkpatch origin/drm-tip 885d95410d8d drm/i915: Make i915_check_and_clear_faults take uncore 4594ba392e2c drm/i915: Convert intel_vgt_(de)balloon to uncore b81a04a33e41 drm/i915: Introduce struct intel_gt as replacement for anonymous i915->gt -:11: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #11: This is a first step towards cleaning up the separation between i915 and gt. -:16: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #16: new file mode 100644 -:21: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #21: FILE: drivers/gpu/drm/i915/gt/intel_gt_types.h:1: +/* -:22: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead #22: FILE: drivers/gpu/drm/i915/gt/intel_gt_types.h:2: + * SPDX-License-Identifier: MIT total: 0 errors, 4 warnings, 0 checks, 99 lines checked eb4225fc81d8 drm/i915: Add a couple intel_gt helpers -:12: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #12: new file mode 100644 -:17: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #17: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:1: +/* -:18: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead #18: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:2: + * SPDX-License-Identifier: MIT -:42: WARNING:MISSING_EOF_NEWLINE: adding a line without newline at end of file #42: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:26: +#endif /* __INTEL_GT_H__ */ total: 0 errors, 4 warnings, 0 checks, 26 lines checked cfef12d54404 drm/i915: Convert i915_gem_init_swizzling to intel_gt -:25: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #25: new file mode 100644 -:30: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #30: FILE: drivers/gpu/drm/i915/gt/intel_gt.c:1: +/* -:31: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead #31: FILE: drivers/gpu/drm/i915/gt/intel_gt.c:2: + * SPDX-License-Identifier: MIT total: 0 errors, 3 warnings, 0 checks, 131 lines checked 9de87c85d59e drm/i915: Convert init_unused_rings to intel_gt a3efc681b7d4 drm/i915: Convert gt workarounds to intel_gt 9815d56874c7 drm/i915: Store backpointer to intel_gt in the engine 0ea90265d50d drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt 1e3e07823505 drm/i915: Convert i915_ppgtt_init_hw to intel_gt 8789e9c71eaa drm/i915: Consolidate some open coded mmio rmw 36083aedd680 drm/i915: Convert i915_gem_init_hw to intel_gt -:128: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() #128: FILE: drivers/gpu/drm/i915/i915_gem.c:1309: + BUG_ON(!i915->kernel_context); total: 0 errors, 1 warnings, 0 checks, 117 lines checked 7f7e63f7489c drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size -:88: WARNING:LEADING_SPACE: please, no spaces at the start of a line #88: FILE: drivers/gpu/drm/i915/intel_wopcm.h:41: +return wopcm->guc.size;$ total: 0 errors, 1 warnings, 0 checks, 61 lines checked f862592a446f drm/i915: Make GuC GGTT reservation work on ggtt ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 27/28] drm/i915: Allow vma binding to occur asynchronously
On Mon, 10 Jun 2019 at 08:21, Chris Wilson wrote:
>
> If we let pages be allocated asynchronously, we also then want to push
> the binding process into an asynchronous task. Make it so, utilising the
> recent improvements to fence error tracking and struct_mutex reduction.
>
> Signed-off-by: Chris Wilson
[snip]
> +static int queue_async_bind(struct i915_vma *vma,
> + enum i915_cache_level cache_level,
> + u32 flags)
> +{
> + bool ready = true;
> +
> + /* We are not allowed to shrink inside vm->mutex! */
> + vma->async.dma = kmalloc(sizeof(*vma->async.dma),
> +GFP_NOWAIT | __GFP_NOWARN);
> + if (!vma->async.dma)
> + return -ENOMEM;
> +
> + dma_fence_init(vma->async.dma,
> + _bind_ops,
> + _lock,
> + vma->vm->i915->mm.unordered_timeline,
> + 0);
> +
> + /* XXX find and avoid allocations under reservation_object locks */
> + if (!i915_vma_trylock(vma)) {
> + kfree(fetch_and_zero(>async.dma));
> + return -EAGAIN;
> + }
> +
> + if (rcu_access_pointer(vma->resv->fence_excl)) { /* async pages */
> + struct dma_fence *f = reservation_object_get_excl(vma->resv);
> +
> + if (!dma_fence_add_callback(f,
> + >async.cb,
> + __queue_async_bind))
> + ready = false;
> + }
> + reservation_object_add_excl_fence(vma->resv, vma->async.dma);
> + i915_vma_unlock(vma);
> +
> + i915_vm_get(vma->vm);
> + i915_vma_get(vma);
> + __i915_vma_pin(vma); /* avoid being shrunk */
> +
> + vma->async.cache_level = cache_level;
> + vma->async.flags = flags;
Do we need to move this stuff to before the add_callback?
> +
> + if (ready)
> + __queue_async_bind(vma->async.dma, >async.cb);
> +
> + return 0;
> +}
> +
> /**
> * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address
> space.
> * @vma: VMA to map
> @@ -293,17 +405,12 @@ int i915_vma_bind(struct i915_vma *vma, enum
> i915_cache_level cache_level,
> u32 vma_flags;
> int ret;
>
> + GEM_BUG_ON(!flags);
> GEM_BUG_ON(!drm_mm_node_allocated(>node));
> GEM_BUG_ON(vma->size > vma->node.size);
> -
> - if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start,
> - vma->node.size,
> - vma->vm->total)))
> - return -ENODEV;
> -
> - if (GEM_DEBUG_WARN_ON(!flags))
> - return -EINVAL;
> -
> + GEM_BUG_ON(range_overflows(vma->node.start,
> + vma->node.size,
> + vma->vm->total));
> bind_flags = 0;
> if (flags & PIN_GLOBAL)
> bind_flags |= I915_VMA_GLOBAL_BIND;
> @@ -318,14 +425,18 @@ int i915_vma_bind(struct i915_vma *vma, enum
> i915_cache_level cache_level,
Are we aiming for vma_bind/vma_bind_async/vma_pin/vma_pin_async etc ?
> if (bind_flags == 0)
> return 0;
>
> - GEM_BUG_ON(!vma->pages);
> + if ((bind_flags & ~vma_flags) & I915_VMA_LOCAL_BIND)
> + bind_flags |= I915_VMA_ALLOC_BIND;
>
> trace_i915_vma_bind(vma, bind_flags);
> - ret = vma->ops->bind_vma(vma, cache_level, bind_flags);
> + if (bind_flags & I915_VMA_ALLOC_BIND)
> + ret = queue_async_bind(vma, cache_level, bind_flags);
> + else
> + ret = __vma_bind(vma, cache_level, bind_flags);
> if (ret)
> return ret;
Looks like clear_pages() is called unconditionally in vma_remove() if
we error out here, even though that is now set as part of the worker?
>
> - vma->flags |= bind_flags;
> + vma->flags |= bind_flags & ~I915_VMA_ALLOC_BIND;
> return 0;
> }
>
> @@ -569,7 +680,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64
> alignment, u64 flags)
> }
>
> if (vma->obj) {
> - ret = i915_gem_object_pin_pages(vma->obj);
> + ret = i915_gem_object_pin_pages_async(vma->obj);
> if (ret)
> return ret;
>
> @@ -578,25 +689,19 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64
> alignment, u64 flags)
> cache_level = 0;
> }
>
> - GEM_BUG_ON(vma->pages);
> -
> - ret = vma->ops->set_pages(vma);
> - if (ret)
> - goto err_unpin;
> -
I guess one casualty here is the !offset_fixed path for
huge-gtt-pages, since we need to inspect the vma->page_sizes below.
Though probably not the end of the world if that's the case.
> if (flags & PIN_OFFSET_FIXED) {
> u64 offset = flags & PIN_OFFSET_MASK;
>
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev3)
== Series Details == Series: drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev3) URL : https://patchwork.freedesktop.org/series/61832/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4f61077ee587 drm/i915: Promote i915->mm.obj_lock to be irqsafe -:135: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #135: FILE: drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:141: + unsigned shrink) total: 0 errors, 1 warnings, 0 checks, 360 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [v7][PATCH 03/12] drm/i915: Add func to compare hw/sw gamma lut
On Mon, Jun 10, 2019 at 04:24:54PM +0530, Sharma, Swati2 wrote:
> On 31-May-19 8:58 PM, Ville Syrjälä wrote:
>
> > On Wed, May 29, 2019 at 03:20:53PM +0530, Swati Sharma wrote:
> >> v3: -Rebase
> >> v4: -Renamed intel_compare_color_lut() to intel_color_lut_equal() [Jani]
> >> -Added the default label above the correct label [Jani]
> >> -Corrected smatch warn "variable dereferenced before check"
> >> [Dan Carpenter]
> >> v5: -Added condition (!blob1 && !blob2) return true [Jani]
> >> -Called PIPE_CONF_CHECK_COLOR_LUT inside if (!adjust) [Jani]
> >> -Added #undef PIPE_CONF_CHECK_COLOR_LUT [Jani]
> >> v6: -Added func intel_color_get_bit_precision() to get bit precision for
> >> gamma and degamma lut readout depending upon platform and
> >> corresponding to load_luts() [Ankit]
> >> -Added debug log for color para in intel_dump_pipe_config [Jani]
> >> -Made patch11 as patch3 [Jani]
> >> v7: -Renamed func intel_color_get_bit_precision() to
> >> intel_color_get_gamma_bit_precision()
> >> -Added separate function/platform for gamma bit precision [Ville]
> >> -Corrected checkpatch warnings
> >>
> >> Signed-off-by: Swati Sharma
> >> ---
> >> drivers/gpu/drm/i915/intel_color.c | 166
> >> +++
> >> drivers/gpu/drm/i915/intel_color.h | 7 ++
> >> drivers/gpu/drm/i915/intel_display.c | 24 +
> >> 3 files changed, 197 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_color.c
> >> b/drivers/gpu/drm/i915/intel_color.c
> >> index 50b98ee..b20a2c6 100644
> >> --- a/drivers/gpu/drm/i915/intel_color.c
> >> +++ b/drivers/gpu/drm/i915/intel_color.c
> >> @@ -1251,6 +1251,172 @@ static int icl_color_check(struct intel_crtc_state
> >> *crtc_state)
> >>return 0;
> >> }
> >>
> >> +static int i9xx_gamma_precision(struct intel_crtc_state *crtc_state)
> >> +{
> >> + if (!crtc_state->gamma_enable)
> >> + return 0;
> >> +
> >> + switch (crtc_state->gamma_mode) {
> >> + case GAMMA_MODE_MODE_8BIT:
> >> + return 8;
> >> + case GAMMA_MODE_MODE_10BIT:
> >> + return 16;
> >> + default:
> >> + MISSING_CASE(crtc_state->gamma_mode);
> >> + return 0;
> >> + }
> >> +}
> >> +
> >> +static int chv_gamma_precision(struct intel_crtc_state *crtc_state)
> >> +{
> >> + if (crtc_state->cgm_mode & CGM_PIPE_MODE_GAMMA)
> >> + return 10;
> >> + else
> >> + return i9xx_gamma_precision(crtc_state);
> >> +}
> >> +
> >> +static int ilk_gamma_precision(struct intel_crtc_state *crtc_state)
> >> +{
> >> + if (!crtc_state->gamma_enable)
> >> + return 0;
> >> +
> >> + if ((crtc_state->csc_mode & CSC_POSITION_BEFORE_GAMMA) == 0)
> >> + return 0;
> >> +
> >> + switch (crtc_state->gamma_mode) {
> >> + case GAMMA_MODE_MODE_8BIT:
> >> + return 8;
> >> + case GAMMA_MODE_MODE_10BIT:
> >> + return 10;
> >> + default:
> >> + MISSING_CASE(crtc_state->gamma_mode);
> >> + return 0;
> >> + }
> >> +}
> >> +
> >> +static int ivb_gamma_precision(struct intel_crtc_state *crtc_state)
> >> +{
> >> + if (!crtc_state->gamma_enable)
> >> + return 0;
> >> +
> >> + if ((crtc_state->csc_mode & CSC_POSITION_BEFORE_GAMMA) == 0)
> >> + return 0;
> >> +
> >> + switch (crtc_state->gamma_mode) {
> >> + case GAMMA_MODE_MODE_8BIT:
> >> + return 8;
> >> + case GAMMA_MODE_MODE_SPLIT:
> >> + case GAMMA_MODE_MODE_10BIT:
> >> + return 10;
> >> + default:
> >> + MISSING_CASE(crtc_state->gamma_mode);
> >> + return 0;
> >> + }
> >> +}
> >> +
> >> +static int glk_gamma_precision(struct intel_crtc_state *crtc_state)
> >> +{
> >> + if (!crtc_state->gamma_enable)
> >> + return 0;
> >> +
> >> + if ((crtc_state->csc_mode & CSC_POSITION_BEFORE_GAMMA) == 0)
> >> + return 0;
> > glk doens't have that bit.
> >
> >> +
> >> + switch (crtc_state->gamma_mode) {
> >> + case GAMMA_MODE_MODE_8BIT:
> >> + return 8;
> >> + case GAMMA_MODE_MODE_10BIT:
> >> + return 10;
> >> + default:
> >> + MISSING_CASE(crtc_state->gamma_mode);
> >> + return 0;
> >> + }
> >> +}
> >> +
> >> +static int icl_gamma_precision(struct intel_crtc_state *crtc_state)
> >> +{
> >> + if ((crtc_state->gamma_mode & PRE_CSC_GAMMA_ENABLE) == 0)
> >> + return 0;
> > POST_CSC_GAMMA
> >
> >> +
> >> + switch (crtc_state->gamma_mode & GAMMA_MODE_MODE_MASK) {
> >> + case GAMMA_MODE_MODE_8BIT:
> >> + return 8;
> >> + case GAMMA_MODE_MODE_10BIT:
> >> + return 10;
> >> + default:
> >> + MISSING_CASE(crtc_state->gamma_mode);
> >> + return 0;
> >> + }
> >> +}
> >> +
> >> +int intel_color_get_gamma_bit_precision(struct intel_crtc_state
> >> *crtc_state)
> >> +{
> >> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
> >> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >> +
> >> + if
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Do not touch the PCH SSC reference if a PLL is using it (rev2)
== Series Details ==
Series: series starting with [1/5] drm/i915: Do not touch the PCH SSC reference
if a PLL is using it (rev2)
URL : https://patchwork.freedesktop.org/series/61608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227 -> Patchwork_13224
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/
Known issues
Here are the changes found in Patchwork_13224 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_create@basic:
- fi-icl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-y/igt@gem_exec_cre...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/fi-icl-y/igt@gem_exec_cre...@basic.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u3/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/fi-icl-u3/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a.html
Possible fixes
* igt@gem_basic@bad-close:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-u3/igt@gem_ba...@bad-close.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/fi-icl-u3/igt@gem_ba...@bad-close.html
- fi-icl-dsi: [INCOMPLETE][7] ([fdo#107713]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-dsi/igt@gem_ba...@bad-close.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/fi-icl-dsi/igt@gem_ba...@bad-close.html
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
Participating hosts (52 -> 47)
--
Additional (1): fi-snb-2600
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6227 -> Patchwork_13224
CI_DRM_6227: fe62c0390420632afe2193a40097c9f03a0bf725 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13224: e53d5befa0e5123576c86bcd588e56e9a57aa26f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e53d5befa0e5 drm/i915: Improve WRPLL reference clock readout on HSW/BDW
0427c69681c7 drm/i915: Assert that HSW/BDW LCPLL is using the non-SSC reference
d7d5fb1445f4 drm/i915: Nuke LC_FREQ
7d67ff34d363 drm/i915: Rename HSW/BDW PLL bits
35d03acfdb07 drm/i915: Do not touch the PCH SSC reference if a PLL is using it
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/
___
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs"
== Series Details == Series: Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs" URL : https://patchwork.freedesktop.org/series/61846/ State : warning == Summary == $ dim checkpatch origin/drm-tip bc1d12322f5f Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs" -:32: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s) total: 1 errors, 0 warnings, 0 checks, 16 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC 01/14] drm/i915: Make i915_check_and_clear_faults take uncore
Quoting Tvrtko Ursulin (2019-06-10 16:54:06)
> From: Tvrtko Ursulin
>
> Continuing the conversion and elimination of implicit dev_priv.
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_reset.c | 28 ---
> drivers/gpu/drm/i915/gt/intel_reset.h | 2 +-
> drivers/gpu/drm/i915/i915_drv.c | 2 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
> 5 files changed, 20 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index c0d986db5a75..a046e8dccc96 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -453,7 +453,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
>
> RUNTIME_INFO(i915)->num_engines = hweight32(mask);
>
> - i915_check_and_clear_faults(i915);
> + i915_check_and_clear_faults(>uncore);
This name is still setting off red flags for me, but I have to confess
that staring at it, passing uncore does make sense.
I just wish we have per-engines faults everywhere and this could be
reduced to passing engine.
Hmm, this I guess we will just have to revisit in the near future as we
may get the opportunity to put these regs under more scrutiny.
>
> intel_setup_engine_capabilities(i915);
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
> b/drivers/gpu/drm/i915/gt/intel_reset.c
> index 60d24110af80..13471916559b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -1166,10 +1166,10 @@ static void gen8_clear_engine_error_register(struct
> intel_engine_cs *engine)
> GEN6_RING_FAULT_REG_POSTING_READ(engine);
> }
>
> -static void clear_error_registers(struct drm_i915_private *i915,
> +static void clear_error_registers(struct intel_uncore *uncore,
> intel_engine_mask_t engine_mask)
> {
> - struct intel_uncore *uncore = >uncore;
> + struct drm_i915_private *i915 = uncore_to_i915(uncore);
Grr, I should have objected to uncore_to_i915() loudly from the
beginning
What's done is done,
Reviewed-by: Chris Wilson
-Chris
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Re: [Intel-gfx] [RFC 04/14] drm/i915: Add a couple intel_gt helpers
Quoting Tvrtko Ursulin (2019-06-10 16:54:09)
> From: Tvrtko Ursulin
>
> Two trivial helpers to convert from intel_gt to i915 and uncore which will
> be needed by the following patches.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/gt/intel_gt.h | 26 ++
> 1 file changed, 26 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/gt/intel_gt.h
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
> b/drivers/gpu/drm/i915/gt/intel_gt.h
> new file mode 100644
> index ..b672f8b03bfd
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -0,0 +1,26 @@
> +/*
> + * SPDX-License-Identifier: MIT
> + *
> + * Copyright © 2019 Intel Corporation
> + */
> +
> +#ifndef __INTEL_GT__
> +#define __INTEL_GT__
> +
> +#include "gt/intel_gt_types.h"
> +
> +#include "intel_uncore.h"
> +
> +#include "i915_drv.h"
> +
> +static inline struct drm_i915_private *gt_to_i915(struct intel_gt *gt)
> +{
> + return container_of(gt, struct drm_i915_private, gt);
Ok, I can buy that a single i915 device will only have a single GT slot.
> +}
> +
> +static inline struct intel_uncore *gt_to_uncore(struct intel_gt *gt)
> +{
> + return _to_i915(gt)->uncore;
But I suspect it will be cleaner just to have a gt->uncore pointer. With
any luck, Daniele's splitting of display and GT uncore bears fruit and
it will be distinct without its own set of locks, powerwells and
cacheline rules.
-Chris
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Re: [Intel-gfx] [RFC 08/14] drm/i915: Store backpointer to intel_gt in the engine
Quoting Tvrtko Ursulin (2019-06-10 16:54:13)
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index 01223864237a..343c4459e8a3 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -34,6 +34,7 @@ struct drm_i915_reg_table;
> struct i915_gem_context;
> struct i915_request;
> struct i915_sched_attr;
> +struct intel_gt;
> struct intel_uncore;
>
> typedef u8 intel_engine_mask_t;
> @@ -266,6 +267,7 @@ struct intel_engine_execlists {
>
> struct intel_engine_cs {
> struct drm_i915_private *i915;
> + struct intel_gt *gt;
I'd push for gt as being the backpointer, and i915 its distant grand
parent. Not sure how much pain that would bring just for the elimination
of one more drm_i915_private, but that's how I picture the
encapsulation.
I'm sure I'm missing a link or two :)
-Chris
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[Intel-gfx] [RFC 11/14] drm/i915: Consolidate some open coded mmio rmw
From: Tvrtko Ursulin
Replace some gen6/7 open coded rmw with intel_uncore_rmw.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 41 +
1 file changed, 18 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 7d0b7a47f761..979305343ac3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1699,13 +1699,10 @@ static void gen7_ppgtt_enable(struct intel_gt *gt)
struct drm_i915_private *i915 = gt_to_i915(gt);
struct intel_uncore *uncore = gt_to_uncore(gt);
struct intel_engine_cs *engine;
- u32 ecochk, ecobits;
enum intel_engine_id id;
+ u32 ecochk;
- ecobits = intel_uncore_read(uncore, GAC_ECO_BITS);
- intel_uncore_write(uncore,
- GAC_ECO_BITS,
- ecobits | ECOBITS_PPGTT_CACHE64B);
+ intel_uncore_rmw(uncore, GAC_ECO_BITS, 0, ECOBITS_PPGTT_CACHE64B);
ecochk = intel_uncore_read(uncore, GAM_ECOCHK);
if (IS_HASWELL(i915)) {
@@ -1727,22 +1724,21 @@ static void gen7_ppgtt_enable(struct intel_gt *gt)
static void gen6_ppgtt_enable(struct intel_gt *gt)
{
struct intel_uncore *uncore = gt_to_uncore(gt);
- u32 ecochk, gab_ctl, ecobits;
- ecobits = intel_uncore_read(uncore, GAC_ECO_BITS);
- intel_uncore_write(uncore,
- GAC_ECO_BITS,
- ecobits | ECOBITS_SNB_BIT | ECOBITS_PPGTT_CACHE64B);
+ intel_uncore_rmw(uncore,
+GAC_ECO_BITS,
+0,
+ECOBITS_SNB_BIT | ECOBITS_PPGTT_CACHE64B);
- gab_ctl = intel_uncore_read(uncore, GAB_CTL);
- intel_uncore_write(uncore,
- GAB_CTL,
- gab_ctl | GAB_CTL_CONT_AFTER_PAGEFAULT);
+ intel_uncore_rmw(uncore,
+GAB_CTL,
+0,
+GAB_CTL_CONT_AFTER_PAGEFAULT);
- ecochk = intel_uncore_read(uncore, GAM_ECOCHK);
- intel_uncore_write(uncore,
- GAM_ECOCHK,
- ecochk | ECOCHK_SNB_BIT | ECOCHK_PPGTT_CACHE64B);
+ intel_uncore_rmw(uncore,
+GAM_ECOCHK,
+0,
+ECOCHK_SNB_BIT | ECOCHK_PPGTT_CACHE64B);
if (HAS_PPGTT(uncore_to_i915(uncore))) /* may be disabled for VT-d */
intel_uncore_write(uncore,
@@ -2239,11 +2235,10 @@ static void gtt_write_workarounds(struct intel_gt *gt)
*/
if (HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K) &&
INTEL_GEN(i915) <= 10)
- intel_uncore_write(uncore,
- GEN8_GAMW_ECO_DEV_RW_IA,
- intel_uncore_read(uncore,
-GEN8_GAMW_ECO_DEV_RW_IA) |
- GAMW_ECO_ENABLE_64K_IPS_FIELD);
+ intel_uncore_rmw(uncore,
+GEN8_GAMW_ECO_DEV_RW_IA,
+0,
+GAMW_ECO_ENABLE_64K_IPS_FIELD);
}
int i915_ppgtt_init_hw(struct intel_gt *gt)
--
2.20.1
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[Intel-gfx] [RFC 14/14] drm/i915: Make GuC GGTT reservation work on ggtt
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Michal)
Signed-off-by: Tvrtko Ursulin
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 37 +++--
drivers/gpu/drm/i915/intel_guc.c| 27 -
drivers/gpu/drm/i915/intel_guc.h| 2 --
3 files changed, 30 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e62041eb10b8..394f347a90ee 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2830,6 +2830,31 @@ static void fini_aliasing_ppgtt(struct drm_i915_private
*i915)
ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
+static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
+{
+ u64 size;
+ int ret;
+
+ if (!USES_GUC(ggtt->vm.i915))
+ return 0;
+
+ size = ggtt->vm.total - GUC_GGTT_TOP;
+
+ ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
+ GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+ PIN_NOEVICT);
+ if (ret)
+ DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
+
+ return ret;
+}
+
+static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
+{
+ if (drm_mm_node_allocated(>uc_fw))
+ drm_mm_remove_node(>uc_fw);
+}
+
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
{
/* Let GEM Manage all of the aperture.
@@ -2867,11 +2892,9 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
if (ret)
return ret;
- if (USES_GUC(dev_priv)) {
- ret = intel_guc_reserve_ggtt_top(_priv->guc);
- if (ret)
- goto err_reserve;
- }
+ ret = ggtt_reserve_guc_top(ggtt);
+ if (ret)
+ goto err_reserve;
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, >vm.mm, hole_start, hole_end) {
@@ -2893,7 +2916,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
return 0;
err_appgtt:
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
err_reserve:
drm_mm_remove_node(>error_capture);
return ret;
@@ -2920,7 +2943,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
if (drm_mm_node_allocated(>error_capture))
drm_mm_remove_node(>error_capture);
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(>vm.mm)) {
intel_vgt_deballoon(ggtt);
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index d45d97624402..c40a6efdd33a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc
*guc, u32 size)
i915_gem_object_put(obj);
return vma;
}
-
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
- u64 size;
- int ret;
-
- size = ggtt->vm.total - GUC_GGTT_TOP;
-
- ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
- GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
- PIN_NOEVICT);
- if (ret)
- DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
-
- return ret;
-}
-
-void intel_guc_release_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
-
- if (drm_mm_node_allocated(>uc_fw))
- drm_mm_remove_node(>uc_fw);
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 85c3b02a0c08..08c906abdfa2 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
-void intel_guc_release_ggtt_top(struct intel_guc *guc);
static inline bool intel_guc_is_loaded(struct intel_guc *guc)
{
--
2.20.1
___
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[Intel-gfx] [RFC 03/14] drm/i915: Introduce struct intel_gt as replacement for anonymous i915->gt
From: Tvrtko Ursulin
We have long been slighlty annoyed by the anonymous i915->gt.
Promote it to a separate structure and give it its own header.
This is a first step towards cleaning up the separation between i915 and gt.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gt_types.h | 53
drivers/gpu/drm/i915/i915_drv.h | 34 +--
2 files changed, 55 insertions(+), 32 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_types.h
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
b/drivers/gpu/drm/i915/gt/intel_gt_types.h
new file mode 100644
index ..dcdb18e0dd84
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -0,0 +1,53 @@
+/*
+ * SPDX-License-Identifier: MIT
+ *
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef __INTEL_GT_TYPES__
+#define __INTEL_GT_TYPES__
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "i915_vma.h"
+#include "intel_wakeref.h"
+
+struct intel_gt {
+ struct i915_gt_timelines {
+ struct mutex mutex; /* protects list, tainted by GPU */
+ struct list_head active_list;
+
+ /* Pack multiple timelines' seqnos into the same page */
+ spinlock_t hwsp_lock;
+ struct list_head hwsp_free_list;
+ } timelines;
+
+ struct list_head active_rings;
+
+ struct intel_wakeref wakeref;
+
+ struct list_head closed_vma;
+ spinlock_t closed_lock; /* guards the list of closed_vma */
+
+ /**
+* Is the GPU currently considered idle, or busy executing
+* userspace requests? Whilst idle, we allow runtime power
+* management to power down the hardware and display clocks.
+* In order to reduce the effect on performance, there
+* is a slight delay before we do so.
+*/
+ intel_wakeref_t awake;
+
+ struct blocking_notifier_head pm_notifications;
+
+ ktime_t last_init_time;
+
+ struct i915_vma *scratch;
+};
+
+#endif /* __INTEL_GT_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b39b6e526189..2cca65633bcc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -65,6 +65,7 @@
#include "gt/intel_lrc.h"
#include "gt/intel_engine.h"
+#include "gt/intel_gt_types.h"
#include "gt/intel_workarounds.h"
#include "intel_bios.h"
@@ -1888,38 +1889,7 @@ struct drm_i915_private {
} perf;
/* Abstract the submission mechanism (legacy ringbuffer or execlists)
away */
- struct {
- struct i915_gt_timelines {
- struct mutex mutex; /* protects list, tainted by GPU */
- struct list_head active_list;
-
- /* Pack multiple timelines' seqnos into the same page */
- spinlock_t hwsp_lock;
- struct list_head hwsp_free_list;
- } timelines;
-
- struct list_head active_rings;
-
- struct intel_wakeref wakeref;
-
- struct list_head closed_vma;
- spinlock_t closed_lock; /* guards the list of closed_vma */
-
- /**
-* Is the GPU currently considered idle, or busy executing
-* userspace requests? Whilst idle, we allow runtime power
-* management to power down the hardware and display clocks.
-* In order to reduce the effect on performance, there
-* is a slight delay before we do so.
-*/
- intel_wakeref_t awake;
-
- struct blocking_notifier_head pm_notifications;
-
- ktime_t last_init_time;
-
- struct i915_vma *scratch;
- } gt;
+ struct intel_gt gt;
struct {
struct notifier_block pm_notifier;
--
2.20.1
___
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[Intel-gfx] [RFC 10/14] drm/i915: Convert i915_ppgtt_init_hw to intel_gt
From: Tvrtko Ursulin
More removal of implicit dev_priv from using old mmio accessors.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 102 ++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 3 +-
3 files changed, 68 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fea6fc3659ba..72e584136909 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1266,7 +1266,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
if (ret)
goto out;
- ret = i915_ppgtt_init_hw(dev_priv);
+ ret = i915_ppgtt_init_hw(_priv->gt);
if (ret) {
DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
goto out;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 50a74674a2a5..7d0b7a47f761 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -41,6 +41,7 @@
#include "i915_vgpu.h"
#include "intel_drv.h"
#include "intel_frontbuffer.h"
+#include "gt/intel_gt.h"
#define I915_GFP_ALLOW_FAIL (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
@@ -1693,25 +1694,29 @@ static inline void gen6_write_pde(const struct
gen6_hw_ppgtt *ppgtt,
ppgtt->pd_addr + pde);
}
-static void gen7_ppgtt_enable(struct drm_i915_private *dev_priv)
+static void gen7_ppgtt_enable(struct intel_gt *gt)
{
+ struct drm_i915_private *i915 = gt_to_i915(gt);
+ struct intel_uncore *uncore = gt_to_uncore(gt);
struct intel_engine_cs *engine;
u32 ecochk, ecobits;
enum intel_engine_id id;
- ecobits = I915_READ(GAC_ECO_BITS);
- I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_PPGTT_CACHE64B);
+ ecobits = intel_uncore_read(uncore, GAC_ECO_BITS);
+ intel_uncore_write(uncore,
+ GAC_ECO_BITS,
+ ecobits | ECOBITS_PPGTT_CACHE64B);
- ecochk = I915_READ(GAM_ECOCHK);
- if (IS_HASWELL(dev_priv)) {
+ ecochk = intel_uncore_read(uncore, GAM_ECOCHK);
+ if (IS_HASWELL(i915)) {
ecochk |= ECOCHK_PPGTT_WB_HSW;
} else {
ecochk |= ECOCHK_PPGTT_LLC_IVB;
ecochk &= ~ECOCHK_PPGTT_GFDT_IVB;
}
- I915_WRITE(GAM_ECOCHK, ecochk);
+ intel_uncore_write(uncore, GAM_ECOCHK, ecochk);
- for_each_engine(engine, dev_priv, id) {
+ for_each_engine(engine, i915, id) {
/* GFX_MODE is per-ring on gen7+ */
ENGINE_WRITE(engine,
RING_MODE_GEN7,
@@ -1719,22 +1724,30 @@ static void gen7_ppgtt_enable(struct drm_i915_private
*dev_priv)
}
}
-static void gen6_ppgtt_enable(struct drm_i915_private *dev_priv)
+static void gen6_ppgtt_enable(struct intel_gt *gt)
{
+ struct intel_uncore *uncore = gt_to_uncore(gt);
u32 ecochk, gab_ctl, ecobits;
- ecobits = I915_READ(GAC_ECO_BITS);
- I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_SNB_BIT |
- ECOBITS_PPGTT_CACHE64B);
+ ecobits = intel_uncore_read(uncore, GAC_ECO_BITS);
+ intel_uncore_write(uncore,
+ GAC_ECO_BITS,
+ ecobits | ECOBITS_SNB_BIT | ECOBITS_PPGTT_CACHE64B);
- gab_ctl = I915_READ(GAB_CTL);
- I915_WRITE(GAB_CTL, gab_ctl | GAB_CTL_CONT_AFTER_PAGEFAULT);
+ gab_ctl = intel_uncore_read(uncore, GAB_CTL);
+ intel_uncore_write(uncore,
+ GAB_CTL,
+ gab_ctl | GAB_CTL_CONT_AFTER_PAGEFAULT);
- ecochk = I915_READ(GAM_ECOCHK);
- I915_WRITE(GAM_ECOCHK, ecochk | ECOCHK_SNB_BIT | ECOCHK_PPGTT_CACHE64B);
+ ecochk = intel_uncore_read(uncore, GAM_ECOCHK);
+ intel_uncore_write(uncore,
+ GAM_ECOCHK,
+ ecochk | ECOCHK_SNB_BIT | ECOCHK_PPGTT_CACHE64B);
- if (HAS_PPGTT(dev_priv)) /* may be disabled for VT-d */
- I915_WRITE(GFX_MODE, _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
+ if (HAS_PPGTT(uncore_to_i915(uncore))) /* may be disabled for VT-d */
+ intel_uncore_write(uncore,
+ GFX_MODE,
+ _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
}
/* PPGTT support for Sandybdrige/Gen6 and later */
@@ -2186,21 +2199,32 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct
drm_i915_private *i915)
return ERR_PTR(err);
}
-static void gtt_write_workarounds(struct drm_i915_private *dev_priv)
+static void gtt_write_workarounds(struct intel_gt *gt)
{
+ struct drm_i915_private *i915 = gt_to_i915(gt);
+ struct intel_uncore *uncore = gt_to_uncore(gt);
+
/* This function is for gtt related workarounds. This function is
* called on driver load and after a GPU reset, so you
[Intel-gfx] [RFC 07/14] drm/i915: Convert gt workarounds to intel_gt
From: Tvrtko Ursulin
More conversion of i915_gem_init_hw to uncore.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 ++-
drivers/gpu/drm/i915/gt/intel_workarounds.h | 6 +++---
drivers/gpu/drm/i915/i915_gem.c | 4 ++--
3 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 165b0a45e009..99f43158b7d6 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -6,6 +6,7 @@
#include "i915_drv.h"
#include "intel_context.h"
+#include "intel_gt.h"
#include "intel_workarounds.h"
/**
@@ -984,9 +985,9 @@ wa_list_apply(struct intel_uncore *uncore, const struct
i915_wa_list *wal)
spin_unlock_irqrestore(>lock, flags);
}
-void intel_gt_apply_workarounds(struct drm_i915_private *i915)
+void intel_gt_apply_workarounds(struct intel_gt *gt)
{
- wa_list_apply(>uncore, >gt_wa_list);
+ wa_list_apply(gt_to_uncore(gt), _to_i915(gt)->gt_wa_list);
}
static bool wa_list_verify(struct intel_uncore *uncore,
@@ -1005,10 +1006,10 @@ static bool wa_list_verify(struct intel_uncore *uncore,
return ok;
}
-bool intel_gt_verify_workarounds(struct drm_i915_private *i915,
-const char *from)
+bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from)
{
- return wa_list_verify(>uncore, >gt_wa_list, from);
+ return wa_list_verify(gt_to_uncore(gt),
+ _to_i915(gt)->gt_wa_list, from);
}
static void
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h
b/drivers/gpu/drm/i915/gt/intel_workarounds.h
index 3761a6ee58bb..8c9c769c2204 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h
@@ -14,6 +14,7 @@
struct drm_i915_private;
struct i915_request;
struct intel_engine_cs;
+struct intel_gt;
static inline void intel_wa_list_free(struct i915_wa_list *wal)
{
@@ -25,9 +26,8 @@ void intel_engine_init_ctx_wa(struct intel_engine_cs *engine);
int intel_engine_emit_ctx_wa(struct i915_request *rq);
void intel_gt_init_workarounds(struct drm_i915_private *i915);
-void intel_gt_apply_workarounds(struct drm_i915_private *i915);
-bool intel_gt_verify_workarounds(struct drm_i915_private *i915,
-const char *from);
+void intel_gt_apply_workarounds(struct intel_gt *gt);
+bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from);
void intel_engine_init_whitelist(struct intel_engine_cs *engine);
void intel_engine_apply_whitelist(struct intel_engine_cs *engine);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index cc8d289814cd..9dd014770e06 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1247,9 +1247,9 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
/* Apply the GT workarounds... */
- intel_gt_apply_workarounds(dev_priv);
+ intel_gt_apply_workarounds(_priv->gt);
/* ...and determine whether they are sticking. */
- intel_gt_verify_workarounds(dev_priv, "init");
+ intel_gt_verify_workarounds(_priv->gt, "init");
intel_gt_init_swizzling(_priv->gt);
--
2.20.1
___
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[Intel-gfx] [RFC 08/14] drm/i915: Store backpointer to intel_gt in the engine
From: Tvrtko Ursulin
It will come useful in the next patch.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 1 +
drivers/gpu/drm/i915/gt/intel_engine_types.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index a046e8dccc96..d4385422e2b3 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -314,6 +314,7 @@ intel_engine_setup(struct drm_i915_private *dev_priv,
engine->id = id;
engine->mask = BIT(id);
engine->i915 = dev_priv;
+ engine->gt = _priv->gt;
engine->uncore = _priv->uncore;
__sprint_engine_name(engine->name, info);
engine->hw_id = engine->guc_id = info->hw_id;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 01223864237a..343c4459e8a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -34,6 +34,7 @@ struct drm_i915_reg_table;
struct i915_gem_context;
struct i915_request;
struct i915_sched_attr;
+struct intel_gt;
struct intel_uncore;
typedef u8 intel_engine_mask_t;
@@ -266,6 +267,7 @@ struct intel_engine_execlists {
struct intel_engine_cs {
struct drm_i915_private *i915;
+ struct intel_gt *gt;
struct intel_uncore *uncore;
char name[INTEL_ENGINE_CS_MAX_NAME];
--
2.20.1
___
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[Intel-gfx] [RFC 13/14] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
From: Tvrtko Ursulin
Reduces pointer chasing and gets more to the point.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Michal Wajdeczko
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/intel_guc.c| 17 -
drivers/gpu/drm/i915/intel_guc.h| 1 -
drivers/gpu/drm/i915/intel_wopcm.h | 17 +
4 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 979305343ac3..e62041eb10b8 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2853,7 +2853,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
* why.
*/
ggtt->pin_bias = max_t(u32, I915_GTT_PAGE_SIZE,
- intel_guc_reserved_gtt_size(_priv->guc));
+ intel_wopcm_guc_size(_priv->wopcm));
ret = intel_vgt_balloon(ggtt);
if (ret)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 43232242d167..d45d97624402 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -686,23 +686,6 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc
*guc, u32 size)
return vma;
}
-/**
- * intel_guc_reserved_gtt_size()
- * @guc: intel_guc structure
- *
- * The GuC WOPCM mapping shadows the lower part of the GGTT, so if we are using
- * GuC we can't have any objects pinned in that region. This function returns
- * the size of the shadowed region.
- *
- * Returns:
- * 0 if GuC is not present or not in use.
- * Otherwise, the GuC WOPCM size.
- */
-u32 intel_guc_reserved_gtt_size(struct intel_guc *guc)
-{
- return guc_to_i915(guc)->wopcm.guc.size;
-}
-
int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
{
struct drm_i915_private *i915 = guc_to_i915(guc);
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index e07e4c69cf08..85c3b02a0c08 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,7 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-u32 intel_guc_reserved_gtt_size(struct intel_guc *guc);
int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
void intel_guc_release_ggtt_top(struct intel_guc *guc);
diff --git a/drivers/gpu/drm/i915/intel_wopcm.h
b/drivers/gpu/drm/i915/intel_wopcm.h
index 6298910a384c..1c32d449fc10 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.h
+++ b/drivers/gpu/drm/i915/intel_wopcm.h
@@ -24,6 +24,23 @@ struct intel_wopcm {
} guc;
};
+/**
+ * intel_wopcm_guc_size()
+ * @wopcm: intel_wopcm structure
+ *
+ * The GuC WOPCM mapping shadows the lower part of the GGTT, so if we are using
+ * GuC we can't have any objects pinned in that region. This function returns
+ * the size of the shadowed region.
+ *
+ * Returns:
+ * 0 if GuC is not present or not in use.
+ * Otherwise, the GuC WOPCM size.
+ */
+static inline u32 intel_wopcm_guc_size(struct intel_wopcm *wopcm)
+{
+return wopcm->guc.size;
+}
+
void intel_wopcm_init_early(struct intel_wopcm *wopcm);
int intel_wopcm_init(struct intel_wopcm *wopcm);
int intel_wopcm_init_hw(struct intel_wopcm *wopcm);
--
2.20.1
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[Intel-gfx] [RFC 09/14] drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt
From: Tvrtko Ursulin
More removal of implicit dev_priv from using old mmio accessors.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 52 +---
drivers/gpu/drm/i915/gt/intel_mocs.h | 3 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
3 files changed, 35 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 79df66022d3a..1bb98f277407 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -23,6 +23,7 @@
#include "i915_drv.h"
#include "intel_engine.h"
+#include "intel_gt.h"
#include "intel_mocs.h"
#include "intel_lrc.h"
@@ -239,7 +240,7 @@ static const struct drm_i915_mocs_entry
icelake_mocs_table[] = {
/**
* get_mocs_settings()
- * @dev_priv: i915 device.
+ * @gt:gt device
* @table: Output table that will be made to point at appropriate
* MOCS values for the device.
*
@@ -249,33 +250,34 @@ static const struct drm_i915_mocs_entry
icelake_mocs_table[] = {
*
* Return: true if there are applicable MOCS settings for the device.
*/
-static bool get_mocs_settings(struct drm_i915_private *dev_priv,
+static bool get_mocs_settings(struct intel_gt *gt,
struct drm_i915_mocs_table *table)
{
+ struct drm_i915_private *i915 = gt_to_i915(gt);
bool result = false;
- if (INTEL_GEN(dev_priv) >= 11) {
+ if (INTEL_GEN(i915) >= 11) {
table->size = ARRAY_SIZE(icelake_mocs_table);
table->table = icelake_mocs_table;
table->n_entries = GEN11_NUM_MOCS_ENTRIES;
result = true;
- } else if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {
+ } else if (IS_GEN9_BC(i915) || IS_CANNONLAKE(i915)) {
table->size = ARRAY_SIZE(skylake_mocs_table);
table->n_entries = GEN9_NUM_MOCS_ENTRIES;
table->table = skylake_mocs_table;
result = true;
- } else if (IS_GEN9_LP(dev_priv)) {
+ } else if (IS_GEN9_LP(i915)) {
table->size = ARRAY_SIZE(broxton_mocs_table);
table->n_entries = GEN9_NUM_MOCS_ENTRIES;
table->table = broxton_mocs_table;
result = true;
} else {
- WARN_ONCE(INTEL_GEN(dev_priv) >= 9,
+ WARN_ONCE(INTEL_GEN(i915) >= 9,
"Platform that should have a MOCS table does not.\n");
}
/* WaDisableSkipCaching:skl,bxt,kbl,glk */
- if (IS_GEN(dev_priv, 9)) {
+ if (IS_GEN(i915, 9)) {
int i;
for (i = 0; i < table->size; i++)
@@ -330,12 +332,13 @@ static u32 get_entry_control(const struct
drm_i915_mocs_table *table,
*/
void intel_mocs_init_engine(struct intel_engine_cs *engine)
{
- struct drm_i915_private *dev_priv = engine->i915;
+ struct intel_gt *gt = engine->gt;
+ struct intel_uncore *uncore = gt_to_uncore(gt);
struct drm_i915_mocs_table table;
unsigned int index;
u32 unused_value;
- if (!get_mocs_settings(dev_priv, ))
+ if (!get_mocs_settings(gt, ))
return;
/* Set unused values to PTE */
@@ -344,12 +347,16 @@ void intel_mocs_init_engine(struct intel_engine_cs
*engine)
for (index = 0; index < table.size; index++) {
u32 value = get_entry_control(, index);
- I915_WRITE(mocs_register(engine->id, index), value);
+ intel_uncore_write(uncore,
+ mocs_register(engine->id, index),
+ value);
}
/* All remaining entries are also unused */
for (; index < table.n_entries; index++)
- I915_WRITE(mocs_register(engine->id, index), unused_value);
+ intel_uncore_write(uncore,
+ mocs_register(engine->id, index),
+ unused_value);
}
/**
@@ -494,13 +501,14 @@ static int emit_mocs_l3cc_table(struct i915_request *rq,
*
* Return: Nothing.
*/
-void intel_mocs_init_l3cc_table(struct drm_i915_private *dev_priv)
+void intel_mocs_init_l3cc_table(struct intel_gt *gt)
{
+ struct intel_uncore *uncore = gt_to_uncore(gt);
struct drm_i915_mocs_table table;
unsigned int i;
u16 unused_value;
- if (!get_mocs_settings(dev_priv, ))
+ if (!get_mocs_settings(gt, ))
return;
/* Set unused values to PTE */
@@ -510,23 +518,27 @@ void intel_mocs_init_l3cc_table(struct drm_i915_private
*dev_priv)
u16 low = get_entry_l3cc(, 2 * i);
u16 high = get_entry_l3cc(, 2 * i + 1);
- I915_WRITE(GEN9_LNCFCMOCS(i),
- l3cc_combine(, low, high));
+ intel_uncore_write(uncore,
+
[Intel-gfx] [RFC 06/14] drm/i915: Convert init_unused_rings to intel_gt
From: Tvrtko Ursulin
More removal of implicit dev_priv from using old mmio accessors.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 42 ++---
1 file changed, 23 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0e0e6bb08e23..cc8d289814cd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1201,28 +1201,32 @@ void i915_gem_sanitize(struct drm_i915_private *i915)
mutex_unlock(>drm.struct_mutex);
}
-static void init_unused_ring(struct drm_i915_private *dev_priv, u32 base)
+static void init_unused_ring(struct intel_gt *gt, u32 base)
{
- I915_WRITE(RING_CTL(base), 0);
- I915_WRITE(RING_HEAD(base), 0);
- I915_WRITE(RING_TAIL(base), 0);
- I915_WRITE(RING_START(base), 0);
+ struct intel_uncore *uncore = gt_to_uncore(gt);
+
+ intel_uncore_write(uncore, RING_CTL(base), 0);
+ intel_uncore_write(uncore, RING_HEAD(base), 0);
+ intel_uncore_write(uncore, RING_TAIL(base), 0);
+ intel_uncore_write(uncore, RING_START(base), 0);
}
-static void init_unused_rings(struct drm_i915_private *dev_priv)
+static void init_unused_rings(struct intel_gt *gt)
{
- if (IS_I830(dev_priv)) {
- init_unused_ring(dev_priv, PRB1_BASE);
- init_unused_ring(dev_priv, SRB0_BASE);
- init_unused_ring(dev_priv, SRB1_BASE);
- init_unused_ring(dev_priv, SRB2_BASE);
- init_unused_ring(dev_priv, SRB3_BASE);
- } else if (IS_GEN(dev_priv, 2)) {
- init_unused_ring(dev_priv, SRB0_BASE);
- init_unused_ring(dev_priv, SRB1_BASE);
- } else if (IS_GEN(dev_priv, 3)) {
- init_unused_ring(dev_priv, PRB1_BASE);
- init_unused_ring(dev_priv, PRB2_BASE);
+ struct drm_i915_private *i915 = gt_to_i915(gt);
+
+ if (IS_I830(i915)) {
+ init_unused_ring(gt, PRB1_BASE);
+ init_unused_ring(gt, SRB0_BASE);
+ init_unused_ring(gt, SRB1_BASE);
+ init_unused_ring(gt, SRB2_BASE);
+ init_unused_ring(gt, SRB3_BASE);
+ } else if (IS_GEN(i915, 2)) {
+ init_unused_ring(gt, SRB0_BASE);
+ init_unused_ring(gt, SRB1_BASE);
+ } else if (IS_GEN(i915, 3)) {
+ init_unused_ring(gt, PRB1_BASE);
+ init_unused_ring(gt, PRB2_BASE);
}
}
@@ -1255,7 +1259,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
* will prevent c3 entry. Makes sure all unused rings
* are totally idle.
*/
- init_unused_rings(dev_priv);
+ init_unused_rings(_priv->gt);
BUG_ON(!dev_priv->kernel_context);
ret = i915_terminally_wedged(dev_priv);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC 01/14] drm/i915: Make i915_check_and_clear_faults take uncore
From: Tvrtko Ursulin
Continuing the conversion and elimination of implicit dev_priv.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 28 ---
drivers/gpu/drm/i915/gt/intel_reset.h | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
5 files changed, 20 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index c0d986db5a75..a046e8dccc96 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -453,7 +453,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
RUNTIME_INFO(i915)->num_engines = hweight32(mask);
- i915_check_and_clear_faults(i915);
+ i915_check_and_clear_faults(>uncore);
intel_setup_engine_capabilities(i915);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 60d24110af80..13471916559b 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1166,10 +1166,10 @@ static void gen8_clear_engine_error_register(struct
intel_engine_cs *engine)
GEN6_RING_FAULT_REG_POSTING_READ(engine);
}
-static void clear_error_registers(struct drm_i915_private *i915,
+static void clear_error_registers(struct intel_uncore *uncore,
intel_engine_mask_t engine_mask)
{
- struct intel_uncore *uncore = >uncore;
+ struct drm_i915_private *i915 = uncore_to_i915(uncore);
u32 eir;
if (!IS_GEN(i915, 2))
@@ -1205,13 +1205,13 @@ static void clear_error_registers(struct
drm_i915_private *i915,
}
}
-static void gen6_check_faults(struct drm_i915_private *dev_priv)
+static void gen6_check_faults(struct intel_uncore *uncore)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
u32 fault;
- for_each_engine(engine, dev_priv, id) {
+ for_each_engine(engine, uncore_to_i915(uncore), id) {
fault = GEN6_RING_FAULT_REG_READ(engine);
if (fault & RING_FAULT_VALID) {
DRM_DEBUG_DRIVER("Unexpected fault\n"
@@ -1227,16 +1227,16 @@ static void gen6_check_faults(struct drm_i915_private
*dev_priv)
}
}
-static void gen8_check_faults(struct drm_i915_private *dev_priv)
+static void gen8_check_faults(struct intel_uncore *uncore)
{
- u32 fault = I915_READ(GEN8_RING_FAULT_REG);
+ u32 fault = intel_uncore_read(uncore, GEN8_RING_FAULT_REG);
if (fault & RING_FAULT_VALID) {
u32 fault_data0, fault_data1;
u64 fault_addr;
- fault_data0 = I915_READ(GEN8_FAULT_TLB_DATA0);
- fault_data1 = I915_READ(GEN8_FAULT_TLB_DATA1);
+ fault_data0 = intel_uncore_read(uncore, GEN8_FAULT_TLB_DATA0);
+ fault_data1 = intel_uncore_read(uncore, GEN8_FAULT_TLB_DATA1);
fault_addr = ((u64)(fault_data1 & FAULT_VA_HIGH_BITS) << 44) |
((u64)fault_data0 << 12);
@@ -1255,17 +1255,19 @@ static void gen8_check_faults(struct drm_i915_private
*dev_priv)
}
}
-void i915_check_and_clear_faults(struct drm_i915_private *i915)
+void i915_check_and_clear_faults(struct intel_uncore *uncore)
{
+ struct drm_i915_private *i915 = uncore_to_i915(uncore);
+
/* From GEN8 onwards we only have one 'All Engine Fault Register' */
if (INTEL_GEN(i915) >= 8)
- gen8_check_faults(i915);
+ gen8_check_faults(uncore);
else if (INTEL_GEN(i915) >= 6)
- gen6_check_faults(i915);
+ gen6_check_faults(uncore);
else
return;
- clear_error_registers(i915, ALL_ENGINES);
+ clear_error_registers(uncore, ALL_ENGINES);
}
/**
@@ -1316,7 +1318,7 @@ void i915_handle_error(struct drm_i915_private *i915,
if (flags & I915_ERROR_CAPTURE) {
i915_capture_error_state(i915, engine_mask, msg);
- clear_error_registers(i915, engine_mask);
+ clear_error_registers(>uncore, engine_mask);
}
/*
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.h
b/drivers/gpu/drm/i915/gt/intel_reset.h
index 580ebdb59eca..d5cf217ba719 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.h
+++ b/drivers/gpu/drm/i915/gt/intel_reset.h
@@ -25,7 +25,7 @@ void i915_handle_error(struct drm_i915_private *i915,
const char *fmt, ...);
#define I915_ERROR_CAPTURE BIT(0)
-void i915_check_and_clear_faults(struct drm_i915_private *i915);
+void i915_check_and_clear_faults(struct intel_uncore *uncore);
void i915_reset(struct drm_i915_private *i915,
intel_engine_mask_t stalled_mask,
diff --git a/drivers/gpu/drm/i915/i915_drv.c
[Intel-gfx] [RFC 02/14] drm/i915: Convert intel_vgt_(de)balloon to uncore
From: Tvrtko Ursulin
More removal of implicit dev_priv from using old mmio accessors.
Furthermore these calls really operate on ggtt so it logically makes sense
if they take it as parameter.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
drivers/gpu/drm/i915/i915_vgpu.c| 24 ++--
drivers/gpu/drm/i915/i915_vgpu.h| 4 ++--
3 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 904cdabc5b64..50a74674a2a5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2832,7 +2832,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
ggtt->pin_bias = max_t(u32, I915_GTT_PAGE_SIZE,
intel_guc_reserved_gtt_size(_priv->guc));
- ret = intel_vgt_balloon(dev_priv);
+ ret = intel_vgt_balloon(ggtt);
if (ret)
return ret;
@@ -2900,7 +2900,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
intel_guc_release_ggtt_top(_priv->guc);
if (drm_mm_initialized(>vm.mm)) {
- intel_vgt_deballoon(dev_priv);
+ intel_vgt_deballoon(ggtt);
i915_address_space_fini(>vm);
}
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 94d3992b599d..41ed9a3f52b4 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -117,17 +117,17 @@ static void vgt_deballoon_space(struct i915_ggtt *ggtt,
* This function is called to deallocate the ballooned-out graphic memory, when
* driver is unloaded or when ballooning fails.
*/
-void intel_vgt_deballoon(struct drm_i915_private *dev_priv)
+void intel_vgt_deballoon(struct i915_ggtt *ggtt)
{
int i;
- if (!intel_vgpu_active(dev_priv))
+ if (!intel_vgpu_active(ggtt->vm.i915))
return;
DRM_DEBUG("VGT deballoon.\n");
for (i = 0; i < 4; i++)
- vgt_deballoon_space(_priv->ggtt, _info.space[i]);
+ vgt_deballoon_space(ggtt, _info.space[i]);
}
static int vgt_balloon_space(struct i915_ggtt *ggtt,
@@ -195,22 +195,26 @@ static int vgt_balloon_space(struct i915_ggtt *ggtt,
* Returns:
* zero on success, non-zero if configuration invalid or ballooning failed
*/
-int intel_vgt_balloon(struct drm_i915_private *dev_priv)
+int intel_vgt_balloon(struct i915_ggtt *ggtt)
{
- struct i915_ggtt *ggtt = _priv->ggtt;
+ struct intel_uncore *uncore = >vm.i915->uncore;
unsigned long ggtt_end = ggtt->vm.total;
unsigned long mappable_base, mappable_size, mappable_end;
unsigned long unmappable_base, unmappable_size, unmappable_end;
int ret;
- if (!intel_vgpu_active(dev_priv))
+ if (!intel_vgpu_active(ggtt->vm.i915))
return 0;
- mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
- mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
- unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
- unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
+ mappable_base =
+ intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.base));
+ mappable_size =
+ intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.size));
+ unmappable_base =
+ intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.base));
+ unmappable_size =
+ intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.size));
mappable_end = mappable_base + mappable_size;
unmappable_end = unmappable_base + unmappable_size;
diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
index ebe1b7bced98..e918f418503f 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.h
+++ b/drivers/gpu/drm/i915/i915_vgpu.h
@@ -42,7 +42,7 @@ intel_vgpu_has_huge_gtt(struct drm_i915_private *dev_priv)
return dev_priv->vgpu.caps & VGT_CAPS_HUGE_GTT;
}
-int intel_vgt_balloon(struct drm_i915_private *dev_priv);
-void intel_vgt_deballoon(struct drm_i915_private *dev_priv);
+int intel_vgt_balloon(struct i915_ggtt *ggtt);
+void intel_vgt_deballoon(struct i915_ggtt *ggtt);
#endif /* _I915_VGPU_H_ */
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC 12/14] drm/i915: Convert i915_gem_init_hw to intel_gt
From: Tvrtko Ursulin
More removal of implicit dev_priv from using old mmio accessors.
Actually the top level function remains but is split into a part which
writes to i915 and part which operates on uncore to initialize the
hardware.
GuC and engines are the only odd ones out remaining.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 68 -
1 file changed, 41 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 72e584136909..cacc4ff1a160 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1230,28 +1230,30 @@ static void init_unused_rings(struct intel_gt *gt)
}
}
-int i915_gem_init_hw(struct drm_i915_private *dev_priv)
+static int init_hw(struct intel_gt *gt)
{
+ struct drm_i915_private *i915 = gt_to_i915(gt);
+ struct intel_uncore *uncore = gt_to_uncore(gt);
int ret;
- dev_priv->gt.last_init_time = ktime_get();
-
/* Double layer security blanket, see i915_gem_init() */
- intel_uncore_forcewake_get(_priv->uncore, FORCEWAKE_ALL);
+ intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
- if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
- I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
+ if (HAS_EDRAM(i915) && INTEL_GEN(i915) < 9)
+ intel_uncore_rmw(uncore, HSW_IDICR, 0, IDIHASHMSK(0xf));
- if (IS_HASWELL(dev_priv))
- I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev_priv) ?
- LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
+ if (IS_HASWELL(i915))
+ intel_uncore_write(uncore,
+ MI_PREDICATE_RESULT_2,
+ IS_HSW_GT3(i915) ?
+ LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
/* Apply the GT workarounds... */
- intel_gt_apply_workarounds(_priv->gt);
+ intel_gt_apply_workarounds(gt);
/* ...and determine whether they are sticking. */
- intel_gt_verify_workarounds(_priv->gt, "init");
+ intel_gt_verify_workarounds(gt, "init");
- intel_gt_init_swizzling(_priv->gt);
+ intel_gt_init_swizzling(gt);
/*
* At least 830 can leave some of the unused rings
@@ -1259,48 +1261,60 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
* will prevent c3 entry. Makes sure all unused rings
* are totally idle.
*/
- init_unused_rings(_priv->gt);
+ init_unused_rings(gt);
- BUG_ON(!dev_priv->kernel_context);
- ret = i915_terminally_wedged(dev_priv);
- if (ret)
- goto out;
-
- ret = i915_ppgtt_init_hw(_priv->gt);
+ ret = i915_ppgtt_init_hw(gt);
if (ret) {
DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
goto out;
}
- ret = intel_wopcm_init_hw(_priv->wopcm);
+ ret = intel_wopcm_init_hw(>wopcm);
if (ret) {
DRM_ERROR("Enabling WOPCM failed (%d)\n", ret);
goto out;
}
/* We can't enable contexts until all firmware is loaded */
- ret = intel_uc_init_hw(dev_priv);
+ ret = intel_uc_init_hw(i915);
if (ret) {
DRM_ERROR("Enabling uc failed (%d)\n", ret);
goto out;
}
- intel_mocs_init_l3cc_table(_priv->gt);
+ intel_mocs_init_l3cc_table(gt);
/* Only when the HW is re-initialised, can we replay the requests */
- ret = intel_engines_resume(dev_priv);
+ ret = intel_engines_resume(i915);
if (ret)
goto cleanup_uc;
- intel_uncore_forcewake_put(_priv->uncore, FORCEWAKE_ALL);
+ intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
- intel_engines_set_scheduler_caps(dev_priv);
return 0;
cleanup_uc:
- intel_uc_fini_hw(dev_priv);
+ intel_uc_fini_hw(i915);
out:
- intel_uncore_forcewake_put(_priv->uncore, FORCEWAKE_ALL);
+ intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
+
+ return ret;
+}
+
+int i915_gem_init_hw(struct drm_i915_private *i915)
+{
+ int ret;
+
+ i915->gt.last_init_time = ktime_get();
+
+ BUG_ON(!i915->kernel_context);
+ ret = i915_terminally_wedged(i915);
+ if (ret)
+ return ret;
+
+ ret = init_hw(>gt);
+
+ intel_engines_set_scheduler_caps(i915);
return ret;
}
--
2.20.1
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[Intel-gfx] [RFC 05/14] drm/i915: Convert i915_gem_init_swizzling to intel_gt
From: Tvrtko Ursulin
Start using the newly introduced struct intel_gt to fuse together correct
logical init flow with uncore for more removal of implicit dev_priv in
mmio access.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gt/intel_gt.c | 44 ++
drivers/gpu/drm/i915/gt/intel_gt.h | 2 ++
drivers/gpu/drm/i915/i915_drv.c| 5 ++--
drivers/gpu/drm/i915/i915_drv.h| 1 -
drivers/gpu/drm/i915/i915_gem.c| 26 ++
6 files changed, 52 insertions(+), 27 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/intel_gt.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c0a7b2994077..8df1bf2855d0 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -73,6 +73,7 @@ gt-y += \
gt/intel_context.o \
gt/intel_engine_cs.o \
gt/intel_engine_pm.o \
+ gt/intel_gt.o \
gt/intel_gt_pm.o \
gt/intel_hangcheck.o \
gt/intel_lrc.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
new file mode 100644
index ..4bc0bb4d343e
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -0,0 +1,44 @@
+/*
+ * SPDX-License-Identifier: MIT
+ *
+ * Copyright © 2008-2018 Intel Corporation
+ */
+
+#include "intel_gt.h"
+
+void intel_gt_init_swizzling(struct intel_gt *gt)
+{
+ struct drm_i915_private *i915 = gt_to_i915(gt);
+ struct intel_uncore *uncore = gt_to_uncore(gt);
+
+ if (INTEL_GEN(i915) < 5 ||
+ i915->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
+ return;
+
+ intel_uncore_write(uncore,
+ DISP_ARB_CTL,
+ intel_uncore_read(uncore, DISP_ARB_CTL) |
+ DISP_TILE_SURFACE_SWIZZLING);
+
+ if (IS_GEN(i915, 5))
+ return;
+
+ intel_uncore_write(uncore,
+ TILECTL,
+ intel_uncore_read(uncore, TILECTL) | TILECTL_SWZCTL);
+
+ if (IS_GEN(i915, 6))
+ intel_uncore_write(uncore,
+ ARB_MODE,
+ _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB));
+ else if (IS_GEN(i915, 7))
+ intel_uncore_write(uncore,
+ ARB_MODE,
+ _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB));
+ else if (IS_GEN(i915, 8))
+ intel_uncore_write(uncore,
+ GAMTARBMODE,
+ _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));
+ else
+ MISSING_CASE(INTEL_GEN(i915));
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
b/drivers/gpu/drm/i915/gt/intel_gt.h
index b672f8b03bfd..20594e710356 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -23,4 +23,6 @@ static inline struct intel_uncore *gt_to_uncore(struct
intel_gt *gt)
return _to_i915(gt)->uncore;
}
+void intel_gt_init_swizzling(struct intel_gt *gt);
+
#endif /* __INTEL_GT_H__ */
\ No newline at end of file
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ee9af4293133..56423f431613 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -49,6 +49,7 @@
#include "gem/i915_gem_context.h"
#include "gem/i915_gem_ioctls.h"
+#include "gt/intel_gt.h"
#include "gt/intel_gt_pm.h"
#include "gt/intel_reset.h"
#include "gt/intel_workarounds.h"
@@ -2935,7 +2936,7 @@ static int intel_runtime_suspend(struct device *kdev)
intel_uc_resume(dev_priv);
- i915_gem_init_swizzling(dev_priv);
+ intel_gt_init_swizzling(_priv->gt);
i915_gem_restore_fences(dev_priv);
enable_rpm_wakeref_asserts(dev_priv);
@@ -3036,7 +3037,7 @@ static int intel_runtime_resume(struct device *kdev)
* No point of rolling back things in case of an error, as the best
* we can do is to hope that things will still work (and disable RPM).
*/
- i915_gem_init_swizzling(dev_priv);
+ intel_gt_init_swizzling(_priv->gt);
i915_gem_restore_fences(dev_priv);
/*
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2cca65633bcc..19084549f44f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2606,7 +2606,6 @@ bool i915_gem_unset_wedged(struct drm_i915_private
*dev_priv);
void i915_gem_init_mmio(struct drm_i915_private *i915);
int __must_check i915_gem_init(struct drm_i915_private *dev_priv);
int __must_check i915_gem_init_hw(struct drm_i915_private *dev_priv);
-void i915_gem_init_swizzling(struct drm_i915_private *dev_priv);
void i915_gem_fini_hw(struct drm_i915_private *dev_priv);
void i915_gem_fini(struct drm_i915_private *dev_priv);
int
[Intel-gfx] [RFC v2 00/14] Implicit dev_priv removal
From: Tvrtko Ursulin Mostly patches reworking the code and GEM init paths to remove some implicit dev_priv dependencies (I915_READ/I915_WRITE), plus some small tweaks to tidy GEM init paths to use more logical input parameters (enabled by the conversion to uncore mmio accessors). v2: * Introduce struct intel_gt by popular demand. * Compile tested only this time. Tvrtko Ursulin (14): drm/i915: Make i915_check_and_clear_faults take uncore drm/i915: Convert intel_vgt_(de)balloon to uncore drm/i915: Introduce struct intel_gt as replacement for anonymous i915->gt drm/i915: Add a couple intel_gt helpers drm/i915: Convert i915_gem_init_swizzling to intel_gt drm/i915: Convert init_unused_rings to intel_gt drm/i915: Convert gt workarounds to intel_gt drm/i915: Store backpointer to intel_gt in the engine drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt drm/i915: Convert i915_ppgtt_init_hw to intel_gt drm/i915: Consolidate some open coded mmio rmw drm/i915: Convert i915_gem_init_hw to intel_gt drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size drm/i915: Make GuC GGTT reservation work on ggtt drivers/gpu/drm/i915/Makefile| 1 + drivers/gpu/drm/i915/gt/intel_engine_cs.c| 3 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 2 + drivers/gpu/drm/i915/gt/intel_gt.c | 44 ++ drivers/gpu/drm/i915/gt/intel_gt.h | 28 drivers/gpu/drm/i915/gt/intel_gt_types.h | 53 +++ drivers/gpu/drm/i915/gt/intel_mocs.c | 52 --- drivers/gpu/drm/i915/gt/intel_mocs.h | 3 +- drivers/gpu/drm/i915/gt/intel_reset.c| 28 ++-- drivers/gpu/drm/i915/gt/intel_reset.h| 2 +- drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +- drivers/gpu/drm/i915/gt/intel_workarounds.h | 6 +- drivers/gpu/drm/i915/i915_drv.c | 7 +- drivers/gpu/drm/i915/i915_drv.h | 35 + drivers/gpu/drm/i915/i915_gem.c | 130 drivers/gpu/drm/i915/i915_gem_gtt.c | 148 --- drivers/gpu/drm/i915/i915_gem_gtt.h | 3 +- drivers/gpu/drm/i915/i915_vgpu.c | 24 +-- drivers/gpu/drm/i915/i915_vgpu.h | 4 +- drivers/gpu/drm/i915/intel_guc.c | 44 -- drivers/gpu/drm/i915/intel_guc.h | 3 - drivers/gpu/drm/i915/intel_wopcm.h | 17 +++ 22 files changed, 390 insertions(+), 258 deletions(-) create mode 100644 drivers/gpu/drm/i915/gt/intel_gt.c create mode 100644 drivers/gpu/drm/i915/gt/intel_gt.h create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_types.h -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC 04/14] drm/i915: Add a couple intel_gt helpers
From: Tvrtko Ursulin
Two trivial helpers to convert from intel_gt to i915 and uncore which will
be needed by the following patches.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gt.h | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 drivers/gpu/drm/i915/gt/intel_gt.h
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
b/drivers/gpu/drm/i915/gt/intel_gt.h
new file mode 100644
index ..b672f8b03bfd
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: MIT
+ *
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef __INTEL_GT__
+#define __INTEL_GT__
+
+#include "gt/intel_gt_types.h"
+
+#include "intel_uncore.h"
+
+#include "i915_drv.h"
+
+static inline struct drm_i915_private *gt_to_i915(struct intel_gt *gt)
+{
+ return container_of(gt, struct drm_i915_private, gt);
+}
+
+static inline struct intel_uncore *gt_to_uncore(struct intel_gt *gt)
+{
+ return _to_i915(gt)->uncore;
+}
+
+#endif /* __INTEL_GT_H__ */
\ No newline at end of file
--
2.20.1
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hangcheck: Look at instdone for all engines
== Series Details ==
Series: drm/i915/hangcheck: Look at instdone for all engines
URL : https://patchwork.freedesktop.org/series/61843/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13223
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/
Known issues
Here are the changes found in Patchwork_13223 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_reloc@basic-cpu-noreloc:
- fi-icl-dsi: [PASS][1] -> [DMESG-WARN][2] ([fdo#106107])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-dsi/igt@gem_exec_re...@basic-cpu-noreloc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/fi-icl-dsi/igt@gem_exec_re...@basic-cpu-noreloc.html
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][3] -> [INCOMPLETE][4] ([fdo#107718])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
* igt@kms_busy@basic-flip-c:
- fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1
similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@kms_b...@basic-flip-c.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/fi-icl-u3/igt@kms_b...@basic-flip-c.html
Possible fixes
* igt@gem_render_linear_blits@basic:
- fi-icl-u3: [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_render_linear_bl...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/fi-icl-u3/igt@gem_render_linear_bl...@basic.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][9] ([fdo#102614]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
Participating hosts (54 -> 47)
--
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6225 -> Patchwork_13223
CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13223: 9f96a3a7fe4dd163a8524c35ff18f207f2a87ba0 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9f96a3a7fe4d drm/i915/hangcheck: Look at instdone for all engines
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/
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Re: [Intel-gfx] [PATCH] drm/i915/perf: fix ICL perf register offsets
On Monday, June 10, 2019 1:19:14 AM PDT Lionel Landwerlin wrote:
> We got the wrong offsets (could they have changed?). New values were
> computed off an error state by looking up the register offset in the
> context image as written by the HW.
>
> Signed-off-by: Lionel Landwerlin
> Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL")
> ---
> drivers/gpu/drm/i915/i915_perf.c | 10 +++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c
> b/drivers/gpu/drm/i915/i915_perf.c
> index 4a767087de27..6c85191fc6c9 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -3612,9 +3612,13 @@ void i915_perf_init(struct drm_i915_private *dev_priv)
> dev_priv->perf.oa.ops.enable_metric_set =
> gen8_enable_metric_set;
> dev_priv->perf.oa.ops.disable_metric_set =
> gen10_disable_metric_set;
>
> - dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
> - dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
> -
> + if (IS_GEN(dev_priv, 10)) {
> + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
> + dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
> + } else {
> + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124;
> + dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e;
> + }
> dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
> }
> }
>
Sounds believable.
Acked-by: Kenneth Graunke
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Description: This is a digitally signed message part.
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Make read_subslice_reg take engine
== Series Details == Series: drm/i915: Make read_subslice_reg take engine URL : https://patchwork.freedesktop.org/series/61841/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13222 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/ Known issues Here are the changes found in Patchwork_13222 that come from known issues: ### IGT changes ### Issues hit * igt@gem_basic@bad-close: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_ba...@bad-close.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/fi-icl-u3/igt@gem_ba...@bad-close.html * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: [PASS][3] -> [INCOMPLETE][4] ([fdo#107718]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html * igt@prime_busy@basic-before-default: - fi-icl-dsi: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-dsi/igt@prime_b...@basic-before-default.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/fi-icl-dsi/igt@prime_b...@basic-before-default.html Possible fixes * igt@gem_render_linear_blits@basic: - fi-icl-u3: [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_render_linear_bl...@basic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/fi-icl-u3/igt@gem_render_linear_bl...@basic.html * igt@kms_frontbuffer_tracking@basic: - fi-icl-u2: [FAIL][9] ([fdo#103167]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 Participating hosts (54 -> 45) -- Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6225 -> Patchwork_13222 CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13222: b9c7e22e6eab38bc9adefbda70658b8f80c8c3cd @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == b9c7e22e6eab drm/i915: Make read_subslice_reg take engine == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/6] drm/i915: Eliminate unused mmio accessors
== Series Details == Series: series starting with [CI,1/6] drm/i915: Eliminate unused mmio accessors URL : https://patchwork.freedesktop.org/series/61837/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13221 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/ Known issues Here are the changes found in Patchwork_13221 that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_create@basic: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_ctx_cre...@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/fi-icl-u3/igt@gem_ctx_cre...@basic.html * igt@i915_selftest@live_contexts: - fi-bdw-gvtdvm: [PASS][3] -> [DMESG-FAIL][4] ([fdo#110235]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html * igt@kms_chamelium@dp-crc-fast: - fi-cml-u2: [PASS][5] -> [FAIL][6] ([fdo#110627]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html * igt@prime_vgem@basic-fence-flip: - fi-ilk-650: [PASS][7] -> [DMESG-WARN][8] ([fdo#106387]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-ilk-650/igt@prime_v...@basic-fence-flip.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/fi-ilk-650/igt@prime_v...@basic-fence-flip.html Possible fixes * igt@gem_render_linear_blits@basic: - fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_render_linear_bl...@basic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/fi-icl-u3/igt@gem_render_linear_bl...@basic.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][11] ([fdo#109485]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [DMESG-WARN][13] ([fdo#102614]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 [fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627 Participating hosts (54 -> 46) -- Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-guc fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6225 -> Patchwork_13221 CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13221: b3503871099b78edee8540aef4424a3953c007f9 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == b3503871099b drm/i915: Remove I915_READ64 and I915_READ64_32x2 a7f81beb69a9 drm/i915: Convert intel_read_wm_latency to uncore mmio accessors 703459e5963e drm/i915: Convert gem_record_fences to uncore mmio accessors d037c5131c56 drm/i915: Convert icl_get_stolen_reserved to uncore mmio accessors 09b3958cd6f7 drm/i915: Convert i915_reg_read_ioctl to use explicit mmio accessors 5e5709d97f13 drm/i915: Eliminate unused mmio accessors == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs"
Quoting Imre Deak (2019-06-10 15:40:13) > On Mon, Jun 10, 2019 at 02:34:13PM +0100, Chris Wilson wrote: > > This reverts commit 1aa3750885fbcece5a0c9e6bbcd014ac526cea41. > > > > References: https://bugs.freedesktop.org/show_bug.cgi?id=110882 > > How is it related? None of the above bug reports are about a 0x8A5D > box. 0x8A56 is one and 0x8A5A is the other. Just coincided with the regression. Tomi has re-run CI_DRM_6077 and that reproduced the same failures as tip, so we have ruled out a kernel regression for the time being. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI] drm/i915: Promote i915->mm.obj_lock to be irqsafe
The intent is to be able to update the mm.lists from inside an irqsoff
section (e.g. from a softirq rcu workqueue), ergo we need to make the
i915->mm.obj_lock irqsafe.
v2: can_discard_pages() ensures we are shrinkable
v3: Beware shadowing of 'flags'
Fixes: 3b4fa9640ccd ("drm/i915: Track the purgeable objects on a separate
eviction list")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110869
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matthew Auld
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 23 +++-
drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 ---
drivers/gpu/drm/i915/gem/i915_gem_pages.c| 16 ++---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 38 ++--
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 5 +--
drivers/gpu/drm/i915/i915_debugfs.c | 10 +++---
drivers/gpu/drm/i915/i915_gem.c | 8 +++--
drivers/gpu/drm/i915/i915_vma.c | 17 +
8 files changed, 80 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index e5deae62681f..31929220b90f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -475,15 +475,20 @@ static void i915_gem_object_bump_inactive_ggtt(struct
drm_i915_gem_object *obj)
}
mutex_unlock(>ggtt.vm.mutex);
- if (i915_gem_object_is_shrinkable(obj) &&
- obj->mm.madv == I915_MADV_WILLNEED) {
- struct list_head *list;
-
- spin_lock(>mm.obj_lock);
- list = obj->bind_count ?
- >mm.bound_list : >mm.unbound_list;
- list_move_tail(>mm.link, list);
- spin_unlock(>mm.obj_lock);
+ if (i915_gem_object_is_shrinkable(obj)) {
+ unsigned long flags;
+
+ spin_lock_irqsave(>mm.obj_lock, flags);
+
+ if (obj->mm.madv == I915_MADV_WILLNEED) {
+ struct list_head *list;
+
+ list = obj->bind_count ?
+ >mm.bound_list : >mm.unbound_list;
+ list_move_tail(>mm.link, list);
+ }
+
+ spin_unlock_irqrestore(>mm.obj_lock, flags);
}
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index a0bc8f7ab780..d02a1aff2058 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -207,9 +207,11 @@ static void __i915_gem_free_objects(struct
drm_i915_private *i915,
*/
if (i915_gem_object_has_pages(obj) &&
i915_gem_object_is_shrinkable(obj)) {
- spin_lock(>mm.obj_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(>mm.obj_lock, flags);
list_del_init(>mm.link);
- spin_unlock(>mm.obj_lock);
+ spin_unlock_irqrestore(>mm.obj_lock, flags);
}
mutex_unlock(>drm.struct_mutex);
@@ -330,9 +332,11 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
obj->mm.madv = I915_MADV_DONTNEED;
if (i915_gem_object_has_pages(obj)) {
- spin_lock(>mm.obj_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(>mm.obj_lock, flags);
list_move_tail(>mm.link, >mm.purge_list);
- spin_unlock(>mm.obj_lock);
+ spin_unlock_irqrestore(>mm.obj_lock, flags);
}
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 7e64fd6bc19b..7ff907d6d0c6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -57,11 +57,15 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object
*obj,
GEM_BUG_ON(!HAS_PAGE_SIZES(i915, obj->mm.page_sizes.sg));
if (i915_gem_object_is_shrinkable(obj)) {
- spin_lock(>mm.obj_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(>mm.obj_lock, flags);
+
i915->mm.shrink_count++;
i915->mm.shrink_memory += obj->base.size;
list_add(>mm.link, >mm.unbound_list);
- spin_unlock(>mm.obj_lock);
+
+ spin_unlock_irqrestore(>mm.obj_lock, flags);
}
}
@@ -151,11 +155,15 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object
*obj)
return pages;
if (i915_gem_object_is_shrinkable(obj)) {
- spin_lock(>mm.obj_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(>mm.obj_lock, flags);
+
list_del(>mm.link);
i915->mm.shrink_count--;
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ehl: Add support for DPLL4 (v5) (rev2)
== Series Details ==
Series: drm/i915/ehl: Add support for DPLL4 (v5) (rev2)
URL : https://patchwork.freedesktop.org/series/61684/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6222_full -> Patchwork_13210_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_13210_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_ctx_engines@independent}:
- shard-snb: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-snb2/igt@gem_ctx_engi...@independent.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-snb6/igt@gem_ctx_engi...@independent.html
Known issues
Here are the changes found in Patchwork_13210_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_engines@execute-one:
- shard-glk: [PASS][3] -> [DMESG-WARN][4] ([fdo#110869])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-glk7/igt@gem_ctx_engi...@execute-one.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-glk7/igt@gem_ctx_engi...@execute-one.html
* igt@gem_eio@in-flight-suspend:
- shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +4
similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-kbl7/igt@gem_...@in-flight-suspend.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-kbl6/igt@gem_...@in-flight-suspend.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +4
similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-apl7/igt@i915_susp...@sysfs-reader.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-apl8/igt@i915_susp...@sysfs-reader.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-skl: [PASS][9] -> [INCOMPLETE][10] ([fdo#110741])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-skl5/igt@kms_cursor_...@pipe-c-cursor-suspend.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-skl5/igt@kms_cursor_...@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-kbl: [PASS][11] -> [FAIL][12] ([fdo#102887] / [fdo#105363])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-kbl4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-kbl4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-snb: [PASS][13] -> [INCOMPLETE][14] ([fdo#105411])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-snb6/igt@kms_f...@flip-vs-suspend-interruptible.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-snb1/igt@kms_f...@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-glk: [PASS][15] -> [FAIL][16] ([fdo#100368])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-glk4/igt@kms_f...@plain-flip-fb-recreate-interruptible.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-glk2/igt@kms_f...@plain-flip-fb-recreate-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103167]) +4 similar
issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-iclb6/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-blt.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-iclb4/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103166])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-iclb3/igt@kms_plane_low...@pipe-a-tiling-x.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-iclb6/igt@kms_plane_low...@pipe-a-tiling-x.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][21] -> [FAIL][22] ([fdo#99912])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6222/shard-kbl3/igt@kms_setm...@basic.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13210/shard-kbl4/igt@kms_setm...@basic.html
Possible fixes
*
igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
- shard-glk: [INCOMPLETE][23] ([fdo#103359] / [k.org#198133]) ->
[PASS][24]
[23]:
Re: [Intel-gfx] [PATCH] Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs"
On Mon, Jun 10, 2019 at 02:34:13PM +0100, Chris Wilson wrote: > This reverts commit 1aa3750885fbcece5a0c9e6bbcd014ac526cea41. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=110882 How is it related? None of the above bug reports are about a 0x8A5D box. 0x8A56 is one and 0x8A5A is the other. > --- > include/drm/i915_pciids.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h > index 6d60ea68c171..6477da22af28 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -559,6 +559,7 @@ > #define INTEL_ICL_PORT_F_IDS(info) \ > INTEL_VGA_DEVICE(0x8A50, info), \ > INTEL_VGA_DEVICE(0x8A5C, info), \ > + INTEL_VGA_DEVICE(0x8A5D, info), \ > INTEL_VGA_DEVICE(0x8A59, info), \ > INTEL_VGA_DEVICE(0x8A58, info), \ > INTEL_VGA_DEVICE(0x8A52, info), \ > @@ -572,8 +573,7 @@ > > #define INTEL_ICL_11_IDS(info) \ > INTEL_ICL_PORT_F_IDS(info), \ > - INTEL_VGA_DEVICE(0x8A51, info), \ > - INTEL_VGA_DEVICE(0x8A5D, info) > + INTEL_VGA_DEVICE(0x8A51, info) > > /* EHL */ > #define INTEL_EHL_IDS(info) \ > -- > 2.20.1 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev2)
== Series Details == Series: drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev2) URL : https://patchwork.freedesktop.org/series/61832/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13220 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_13220 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_13220, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_13220: ### IGT changes ### Possible regressions * igt@gem_exec_suspend@basic-s4-devices: - fi-bdw-gvtdvm: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-bdw-gvtdvm/igt@gem_exec_susp...@basic-s4-devices.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-bdw-gvtdvm/igt@gem_exec_susp...@basic-s4-devices.html - fi-snb-2520m: [PASS][3] -> [DMESG-WARN][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-snb-2520m/igt@gem_exec_susp...@basic-s4-devices.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-snb-2520m/igt@gem_exec_susp...@basic-s4-devices.html - fi-whl-u: [PASS][5] -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-whl-u/igt@gem_exec_susp...@basic-s4-devices.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-whl-u/igt@gem_exec_susp...@basic-s4-devices.html - fi-bdw-5557u: [PASS][7] -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-bdw-5557u/igt@gem_exec_susp...@basic-s4-devices.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-bdw-5557u/igt@gem_exec_susp...@basic-s4-devices.html Known issues Here are the changes found in Patchwork_13220 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s4-devices: - fi-skl-6260u: [PASS][9] -> [INCOMPLETE][10] ([fdo#104108]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-skl-6260u/igt@gem_exec_susp...@basic-s4-devices.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-skl-6260u/igt@gem_exec_susp...@basic-s4-devices.html - fi-skl-6700k2: [PASS][11] -> [INCOMPLETE][12] ([fdo#104108]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-skl-6700k2/igt@gem_exec_susp...@basic-s4-devices.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-skl-6700k2/igt@gem_exec_susp...@basic-s4-devices.html - fi-bxt-j4205: [PASS][13] -> [INCOMPLETE][14] ([fdo#103927]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-bxt-j4205/igt@gem_exec_susp...@basic-s4-devices.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-bxt-j4205/igt@gem_exec_susp...@basic-s4-devices.html - fi-kbl-7567u: [PASS][15] -> [INCOMPLETE][16] ([fdo#103665] / [fdo#107139]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-7567u/igt@gem_exec_susp...@basic-s4-devices.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-kbl-7567u/igt@gem_exec_susp...@basic-s4-devices.html - fi-cfl-8109u: [PASS][17] -> [INCOMPLETE][18] ([fdo#108126]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-cfl-8109u/igt@gem_exec_susp...@basic-s4-devices.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-cfl-8109u/igt@gem_exec_susp...@basic-s4-devices.html - fi-kbl-r: [PASS][19] -> [INCOMPLETE][20] ([fdo#107139]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-r/igt@gem_exec_susp...@basic-s4-devices.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-kbl-r/igt@gem_exec_susp...@basic-s4-devices.html - fi-icl-u2: [PASS][21] -> [INCOMPLETE][22] ([fdo#107713]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u2/igt@gem_exec_susp...@basic-s4-devices.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-icl-u2/igt@gem_exec_susp...@basic-s4-devices.html - fi-cml-u2: [PASS][23] -> [INCOMPLETE][24] ([fdo#110566]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-cml-u2/igt@gem_exec_susp...@basic-s4-devices.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13220/fi-cml-u2/igt@gem_exec_susp...@basic-s4-devices.html - fi-bxt-dsi: [PASS][25] -> [INCOMPLETE][26] ([fdo#103927]) [25]:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Allow interrupts when taking the timeline->mutex
== Series Details == Series: drm/i915: Allow interrupts when taking the timeline->mutex URL : https://patchwork.freedesktop.org/series/61833/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13219 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/ Known issues Here are the changes found in Patchwork_13219 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live_evict: - fi-bsw-kefka: [PASS][1] -> [DMESG-WARN][2] ([fdo#107709]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-bsw-kefka/igt@i915_selftest@live_evict.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/fi-bsw-kefka/igt@i915_selftest@live_evict.html Possible fixes * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][3] ([fdo#109485]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [DMESG-WARN][5] ([fdo#102614]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 Participating hosts (54 -> 42) -- Missing(12): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-gdg-551 fi-icl-u3 fi-pnv-d510 fi-icl-guc fi-icl-dsi fi-bdw-samus Build changes - * Linux: CI_DRM_6225 -> Patchwork_13219 CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13219: f10d8799da43247f8fdf714e88d380c4974caf97 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == f10d8799da43 drm/i915: Allow interrupts when taking the timeline->mutex == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs"
This reverts commit 1aa3750885fbcece5a0c9e6bbcd014ac526cea41. References: https://bugs.freedesktop.org/show_bug.cgi?id=110882 --- include/drm/i915_pciids.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 6d60ea68c171..6477da22af28 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -559,6 +559,7 @@ #define INTEL_ICL_PORT_F_IDS(info) \ INTEL_VGA_DEVICE(0x8A50, info), \ INTEL_VGA_DEVICE(0x8A5C, info), \ + INTEL_VGA_DEVICE(0x8A5D, info), \ INTEL_VGA_DEVICE(0x8A59, info), \ INTEL_VGA_DEVICE(0x8A58, info), \ INTEL_VGA_DEVICE(0x8A52, info), \ @@ -572,8 +573,7 @@ #define INTEL_ICL_11_IDS(info) \ INTEL_ICL_PORT_F_IDS(info), \ - INTEL_VGA_DEVICE(0x8A51, info), \ - INTEL_VGA_DEVICE(0x8A5D, info) + INTEL_VGA_DEVICE(0x8A51, info) /* EHL */ #define INTEL_EHL_IDS(info) \ -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 2/5] drm/i915: Rename HSW/BDW PLL bits
From: Ville Syrjälä
Give the PLL control register bits better names on HSW/BDW.
v2: Fix the copy paste fails in SPLL_REF defines (Maarten)
Cc: Maarten Lankhorst
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 32 +--
drivers/gpu/drm/i915/intel_ddi.c | 16 +++---
drivers/gpu/drm/i915/intel_display.c | 8 +++
drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 ++--
4 files changed, 34 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d5fee72fc079..3eef1c356cb6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9465,24 +9465,28 @@ enum skl_power_gate {
/* SPLL */
#define SPLL_CTL _MMIO(0x46020)
#define SPLL_PLL_ENABLE (1 << 31)
-#define SPLL_PLL_SSC (1 << 28)
-#define SPLL_PLL_NON_SSC (2 << 28)
-#define SPLL_PLL_LCPLL(3 << 28)
-#define SPLL_PLL_REF_MASK (3 << 28)
-#define SPLL_PLL_FREQ_810MHz (0 << 26)
-#define SPLL_PLL_FREQ_1350MHz (1 << 26)
-#define SPLL_PLL_FREQ_2700MHz (2 << 26)
-#define SPLL_PLL_FREQ_MASK(3 << 26)
+#define SPLL_REF_BCLK (0 << 28)
+#define SPLL_REF_MUXED_SSC(1 << 28) /* CPU SSC if fused enabled,
PCH SSC otherwise */
+#define SPLL_REF_NON_SSC_HSW (2 << 28)
+#define SPLL_REF_PCH_SSC_BDW (2 << 28)
+#define SPLL_REF_LCPLL(3 << 28)
+#define SPLL_REF_MASK (3 << 28)
+#define SPLL_FREQ_810MHz (0 << 26)
+#define SPLL_FREQ_1350MHz (1 << 26)
+#define SPLL_FREQ_2700MHz (2 << 26)
+#define SPLL_FREQ_MASK(3 << 26)
/* WRPLL */
#define _WRPLL_CTL10x46040
#define _WRPLL_CTL20x46060
#define WRPLL_CTL(pll) _MMIO_PIPE(pll, _WRPLL_CTL1,
_WRPLL_CTL2)
#define WRPLL_PLL_ENABLE (1 << 31)
-#define WRPLL_PLL_SSC (1 << 28)
-#define WRPLL_PLL_NON_SSC (2 << 28)
-#define WRPLL_PLL_LCPLL (3 << 28)
-#define WRPLL_PLL_REF_MASK(3 << 28)
+#define WRPLL_REF_BCLK(0 << 28)
+#define WRPLL_REF_PCH_SSC (1 << 28)
+#define WRPLL_REF_MUXED_SSC_BDW (2 << 28) /* CPU SSC if fused enabled,
PCH SSC otherwise */
+#define WRPLL_REF_SPECIAL_HSW (2 << 28) /* muxed SSC (ULT), non-SSC
(non-ULT) */
+#define WRPLL_REF_LCPLL (3 << 28)
+#define WRPLL_REF_MASK(3 << 28)
/* WRPLL divider programming */
#define WRPLL_DIVIDER_REFERENCE(x)((x) << 0)
#define WRPLL_DIVIDER_REF_MASK(0xff)
@@ -9548,6 +9552,10 @@ enum skl_power_gate {
#define LCPLL_CTL _MMIO(0x130040)
#define LCPLL_PLL_DISABLE (1 << 31)
#define LCPLL_PLL_LOCK(1 << 30)
+#define LCPLL_REF_NON_SSC (0 << 28)
+#define LCPLL_REF_BCLK(2 << 28)
+#define LCPLL_REF_PCH_SSC (3 << 28)
+#define LCPLL_REF_MASK(3 << 28)
#define LCPLL_CLK_FREQ_MASK (3 << 26)
#define LCPLL_CLK_FREQ_450(0 << 26)
#define LCPLL_CLK_FREQ_54O_BDW(1 << 26)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 350eaf54f01f..183f91abda19 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1231,9 +1231,9 @@ static int hsw_ddi_calc_wrpll_link(struct
drm_i915_private *dev_priv,
u32 wrpll;
wrpll = I915_READ(reg);
- switch (wrpll & WRPLL_PLL_REF_MASK) {
- case WRPLL_PLL_SSC:
- case WRPLL_PLL_NON_SSC:
+ switch (wrpll & WRPLL_REF_MASK) {
+ case WRPLL_REF_SPECIAL_HSW:
+ case WRPLL_REF_PCH_SSC:
/*
* We could calculate spread here, but our checking
* code only cares about 5% accuracy, and spread is a max of
@@ -1241,7 +1241,7 @@ static int hsw_ddi_calc_wrpll_link(struct
drm_i915_private *dev_priv,
*/
refclk = 135;
break;
- case WRPLL_PLL_LCPLL:
+ case WRPLL_REF_LCPLL:
refclk = LC_FREQ;
break;
default:
@@ -1613,12 +1613,12 @@ static void hsw_ddi_clock_get(struct intel_encoder
*encoder,
link_clock = hsw_ddi_calc_wrpll_link(dev_priv, WRPLL_CTL(1));
break;
case PORT_CLK_SEL_SPLL:
- pll = I915_READ(SPLL_CTL) & SPLL_PLL_FREQ_MASK;
- if (pll == SPLL_PLL_FREQ_810MHz)
+ pll = I915_READ(SPLL_CTL) & SPLL_FREQ_MASK;
+ if (pll == SPLL_FREQ_810MHz)
link_clock = 81000;
- else if (pll == SPLL_PLL_FREQ_1350MHz)
+ else if (pll ==
Re: [Intel-gfx] [RFC] drm/i915/hangcheck: Look at instdone for all engines
Quoting Tvrtko Ursulin (2019-06-10 14:16:32) > > On 10/06/2019 14:05, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-06-10 14:01:10) > >> From: Tvrtko Ursulin > >> > >> It seems intel_engine_get_instdone is able to get instdone for all engines > >> but intel_hangcheck.c/subunits_stuck decides to ignore it for non render. > >> > >> We can just drop the check in subunits_stuck since the checks on > >> unavailable fields will always return stuck, which when bitwise and with > >> the potential unstuck instdone is harmless. > >> > >> Signed-off-by: Tvrtko Ursulin > >> Cc: Chris Wilson > >> Cc: Mika Kuoppala > >> --- > >> Would actually using the available data improve hang detection? > > > > No, just prolong it :) > > I was thinking activity on instdone would, but correctly so, no? If > functional blocks have shown a change of status, then we try again until > they too get stuck. Some improvement in false positives, but marginal I > know given the hangcheck period. It's a lot more fuzzy when you look at how we OR together the bits for the history. Not that you are wrong, just being an old curmudgeon. I'm not really sold on whether it makes any sense at the granularity of our inspection, currently sampling every ~1.5s. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC] drm/i915/hangcheck: Look at instdone for all engines
On 10/06/2019 14:05, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-06-10 14:01:10) From: Tvrtko Ursulin It seems intel_engine_get_instdone is able to get instdone for all engines but intel_hangcheck.c/subunits_stuck decides to ignore it for non render. We can just drop the check in subunits_stuck since the checks on unavailable fields will always return stuck, which when bitwise and with the potential unstuck instdone is harmless. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Cc: Mika Kuoppala --- Would actually using the available data improve hang detection? No, just prolong it :) I was thinking activity on instdone would, but correctly so, no? If functional blocks have shown a change of status, then we try again until they too get stuck. Some improvement in false positives, but marginal I know given the hangcheck period. Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix GVT balloon fail path handling
== Series Details == Series: drm/i915: Fix GVT balloon fail path handling URL : https://patchwork.freedesktop.org/series/61830/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13218 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13218/ Known issues Here are the changes found in Patchwork_13218 that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_create@basic-files: - fi-icl-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#109100]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-dsi/igt@gem_ctx_cre...@basic-files.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13218/fi-icl-dsi/igt@gem_ctx_cre...@basic-files.html * igt@gem_exec_create@basic: - fi-icl-y: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-y/igt@gem_exec_cre...@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13218/fi-icl-y/igt@gem_exec_cre...@basic.html Possible fixes * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][5] ([fdo#109485]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13218/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [DMESG-WARN][7] ([fdo#102614]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13218/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 Participating hosts (54 -> 45) -- Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-byt-clapper fi-bdw-samus fi-cml-u Build changes - * Linux: CI_DRM_6225 -> Patchwork_13218 CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13218: 1479965541ec242e97d86a1f2e25755b2982dcbe @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 1479965541ec drm/i915: Fix GVT balloon fail path handling == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13218/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC] drm/i915/hangcheck: Look at instdone for all engines
Quoting Tvrtko Ursulin (2019-06-10 14:01:10) > From: Tvrtko Ursulin > > It seems intel_engine_get_instdone is able to get instdone for all engines > but intel_hangcheck.c/subunits_stuck decides to ignore it for non render. > > We can just drop the check in subunits_stuck since the checks on > unavailable fields will always return stuck, which when bitwise and with > the potential unstuck instdone is harmless. > > Signed-off-by: Tvrtko Ursulin > Cc: Chris Wilson > Cc: Mika Kuoppala > --- > Would actually using the available data improve hang detection? No, just prolong it :) -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2] i915/gem_mmap_gtt: Disregard forked subtests on ICL for reasons
Nothing to see here, please move along.
References: https://bugs.freedesktop.org/show_bug.cgi?id=110882
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Martin Peres
---
tests/i915/gem_mmap_gtt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 034658e64..6f3a9c36e 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -656,6 +656,9 @@ test_huge_copy(int fd, int huge, int tiling_a, int
tiling_b, int ncpus)
uint64_t huge_object_size, i;
unsigned mode = CHECK_RAM;
+ igt_fail_on_f(intel_gen(devid) >= 11 && ncpus > 1,
+ "Please adjust your expectations,
https://bugs.freedesktop.org/show_bug.cgi?id=110882\n;);
+
switch (huge) {
case -2:
huge_object_size = gem_mappable_aperture_size() / 4;
--
2.20.1
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[Intel-gfx] [RFC] drm/i915/hangcheck: Look at instdone for all engines
From: Tvrtko Ursulin It seems intel_engine_get_instdone is able to get instdone for all engines but intel_hangcheck.c/subunits_stuck decides to ignore it for non render. We can just drop the check in subunits_stuck since the checks on unavailable fields will always return stuck, which when bitwise and with the potential unstuck instdone is harmless. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Cc: Mika Kuoppala --- Would actually using the available data improve hang detection? --- drivers/gpu/drm/i915/gt/intel_hangcheck.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_hangcheck.c b/drivers/gpu/drm/i915/gt/intel_hangcheck.c index 174bb0a60309..70f0960200ed 100644 --- a/drivers/gpu/drm/i915/gt/intel_hangcheck.c +++ b/drivers/gpu/drm/i915/gt/intel_hangcheck.c @@ -57,9 +57,6 @@ static bool subunits_stuck(struct intel_engine_cs *engine) int slice; int subslice; - if (engine->id != RCS0) - return true; - intel_engine_get_instdone(engine, ); /* There might be unstable subunit states even when -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t] i915/gem_mmap_gtt: Disregard forked subtests on ICL for reasons
On 10/06/2019 15:55, Chris Wilson wrote:
> Nothing to see here, please move along.
>
> XXX: Update with better bugzilla
https://bugs.freedesktop.org/show_bug.cgi?id=110882
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107713#c125
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> Cc: Martin Peres
> ---
> tests/i915/gem_mmap_gtt.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
> index 034658e64..c3cb5db2d 100644
> --- a/tests/i915/gem_mmap_gtt.c
> +++ b/tests/i915/gem_mmap_gtt.c
> @@ -656,6 +656,9 @@ test_huge_copy(int fd, int huge, int tiling_a, int
> tiling_b, int ncpus)
> uint64_t huge_object_size, i;
> unsigned mode = CHECK_RAM;
>
> + igt_fail_on_f(intel_gen(devid) >= 11 && ncpus > 1,
> + "Please adjust your expectations,
> https://bugs.freedesktop.org/show_bug.cgi?id=107713#c125\n;);
> +
> switch (huge) {
> case -2:
> huge_object_size = gem_mappable_aperture_size() / 4;
>
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[Intel-gfx] [PATCH v2] drm/i915: Make read_subslice_reg take engine
From: Tvrtko Ursulin
The function operates on the render engine so make the input reflect it.
v2:
* Pass engine to read_subslice_reg. (Chris)
* Drop inline from read_subslice_reg.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Rodrigo Vivi
Cc: Chris Wilson
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 6b838948ba24..c0d986db5a75 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -972,11 +972,12 @@ u32 intel_calculate_mcr_s_ss_select(struct
drm_i915_private *dev_priv)
return mcr_s_ss_select;
}
-static inline u32
-read_subslice_reg(struct drm_i915_private *dev_priv, int slice,
- int subslice, i915_reg_t reg)
+static u32
+read_subslice_reg(struct intel_engine_cs *engine, int slice, int subslice,
+ i915_reg_t reg)
{
- struct intel_uncore *uncore = _priv->uncore;
+ struct drm_i915_private *i915 = engine->i915;
+ struct intel_uncore *uncore = engine->uncore;
u32 mcr_slice_subslice_mask;
u32 mcr_slice_subslice_select;
u32 default_mcr_s_ss_select;
@@ -984,7 +985,7 @@ read_subslice_reg(struct drm_i915_private *dev_priv, int
slice,
u32 ret;
enum forcewake_domains fw_domains;
- if (INTEL_GEN(dev_priv) >= 11) {
+ if (INTEL_GEN(i915) >= 11) {
mcr_slice_subslice_mask = GEN11_MCR_SLICE_MASK |
GEN11_MCR_SUBSLICE_MASK;
mcr_slice_subslice_select = GEN11_MCR_SLICE(slice) |
@@ -996,7 +997,7 @@ read_subslice_reg(struct drm_i915_private *dev_priv, int
slice,
GEN8_MCR_SUBSLICE(subslice);
}
- default_mcr_s_ss_select = intel_calculate_mcr_s_ss_select(dev_priv);
+ default_mcr_s_ss_select = intel_calculate_mcr_s_ss_select(i915);
fw_domains = intel_uncore_forcewake_for_reg(uncore, reg,
FW_REG_READ);
@@ -1033,7 +1034,7 @@ read_subslice_reg(struct drm_i915_private *dev_priv, int
slice,
void intel_engine_get_instdone(struct intel_engine_cs *engine,
struct intel_instdone *instdone)
{
- struct drm_i915_private *dev_priv = engine->i915;
+ struct drm_i915_private *i915 = engine->i915;
struct intel_uncore *uncore = engine->uncore;
u32 mmio_base = engine->mmio_base;
int slice;
@@ -1041,7 +1042,7 @@ void intel_engine_get_instdone(struct intel_engine_cs
*engine,
memset(instdone, 0, sizeof(*instdone));
- switch (INTEL_GEN(dev_priv)) {
+ switch (INTEL_GEN(i915)) {
default:
instdone->instdone =
intel_uncore_read(uncore, RING_INSTDONE(mmio_base));
@@ -1051,12 +1052,12 @@ void intel_engine_get_instdone(struct intel_engine_cs
*engine,
instdone->slice_common =
intel_uncore_read(uncore, GEN7_SC_INSTDONE);
- for_each_instdone_slice_subslice(dev_priv, slice, subslice) {
+ for_each_instdone_slice_subslice(i915, slice, subslice) {
instdone->sampler[slice][subslice] =
- read_subslice_reg(dev_priv, slice, subslice,
+ read_subslice_reg(engine, slice, subslice,
GEN7_SAMPLER_INSTDONE);
instdone->row[slice][subslice] =
- read_subslice_reg(dev_priv, slice, subslice,
+ read_subslice_reg(engine, slice, subslice,
GEN7_ROW_INSTDONE);
}
break;
--
2.20.1
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[Intel-gfx] [PATCH i-g-t] i915/gem_mmap_gtt: Disregard forked subtests on ICL for reasons
Nothing to see here, please move along.
XXX: Update with better bugzilla
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107713#c125
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Martin Peres
---
tests/i915/gem_mmap_gtt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 034658e64..c3cb5db2d 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -656,6 +656,9 @@ test_huge_copy(int fd, int huge, int tiling_a, int
tiling_b, int ncpus)
uint64_t huge_object_size, i;
unsigned mode = CHECK_RAM;
+ igt_fail_on_f(intel_gen(devid) >= 11 && ncpus > 1,
+ "Please adjust your expectations,
https://bugs.freedesktop.org/show_bug.cgi?id=107713#c125\n;);
+
switch (huge) {
case -2:
huge_object_size = gem_mappable_aperture_size() / 4;
--
2.20.1
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/edid: abstract override/firmware EDID retrieval (rev2)
== Series Details ==
Series: series starting with [1/2] drm/edid: abstract override/firmware EDID
retrieval (rev2)
URL : https://patchwork.freedesktop.org/series/61764/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13217
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13217/
Known issues
Here are the changes found in Patchwork_13217 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13217/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@prime_vgem@basic-fence-flip:
- fi-ilk-650: [PASS][3] -> [DMESG-WARN][4] ([fdo#106387]) +2
similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-ilk-650/igt@prime_v...@basic-fence-flip.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13217/fi-ilk-650/igt@prime_v...@basic-fence-flip.html
Possible fixes
* igt@gem_render_linear_blits@basic:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_render_linear_bl...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13217/fi-icl-u3/igt@gem_render_linear_bl...@basic.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][7] ([fdo#109485]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13217/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][9] ([fdo#102614]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13217/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
Participating hosts (54 -> 47)
--
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6225 -> Patchwork_13217
CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13217: 745bb8191a6de49c7aed831251ea790e37342d33 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
745bb8191a6d drm: add fallback override/firmware EDID modes workaround
d5896a186b31 drm/edid: abstract override/firmware EDID retrieval
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13217/
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: fix ICL perf register offsets
== Series Details == Series: drm/i915/perf: fix ICL perf register offsets URL : https://patchwork.freedesktop.org/series/61826/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13216 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/ Known issues Here are the changes found in Patchwork_13216 that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_switch@basic-default: - fi-icl-u2: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108569]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u2/igt@gem_ctx_swi...@basic-default.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-icl-u2/igt@gem_ctx_swi...@basic-default.html * igt@gem_exec_basic@basic-all: - fi-icl-y: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-y/igt@gem_exec_ba...@basic-all.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-icl-y/igt@gem_exec_ba...@basic-all.html * igt@i915_selftest@live_sanitycheck: - fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html Possible fixes * igt@gem_render_linear_blits@basic: - fi-icl-u3: [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_render_linear_bl...@basic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-icl-u3/igt@gem_render_linear_bl...@basic.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][9] ([fdo#109485]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 Participating hosts (54 -> 45) -- Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-guc fi-icl-dsi fi-bdw-samus Build changes - * Linux: CI_DRM_6225 -> Patchwork_13216 CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13216: 6646efae240b479f8024b15fa2d756d4c94ecb97 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 6646efae240b drm/i915/perf: fix ICL perf register offsets == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix TypeC port mode switching (rev2)
== Series Details == Series: drm/i915: Fix TypeC port mode switching (rev2) URL : https://patchwork.freedesktop.org/series/61590/ State : success == Summary == CI Bug Log - changes from CI_DRM_6221_full -> Patchwork_13209_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13209_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_engines@execute-one: - shard-snb: [PASS][1] -> [DMESG-WARN][2] ([fdo#110869]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-snb2/igt@gem_ctx_engi...@execute-one.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-snb2/igt@gem_ctx_engi...@execute-one.html * igt@gem_tiled_swapping@non-threaded: - shard-glk: [PASS][3] -> [DMESG-WARN][4] ([fdo#108686]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-glk6/igt@gem_tiled_swapp...@non-threaded.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-glk5/igt@gem_tiled_swapp...@non-threaded.html * igt@i915_suspend@fence-restore-untiled: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-skl6/igt@i915_susp...@fence-restore-untiled.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-skl7/igt@i915_susp...@fence-restore-untiled.html * igt@kms_cursor_legacy@all-pipes-torture-bo: - shard-iclb: [PASS][7] -> [INCOMPLETE][8] ([fdo#107713]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-iclb6/igt@kms_cursor_leg...@all-pipes-torture-bo.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-iclb7/igt@kms_cursor_leg...@all-pipes-torture-bo.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-iclb: [PASS][9] -> [INCOMPLETE][10] ([fdo#107713] / [fdo#109507]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-iclb3/igt@kms_f...@flip-vs-suspend-interruptible.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-iclb3/igt@kms_f...@flip-vs-suspend-interruptible.html - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#109507]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-skl6/igt@kms_f...@flip-vs-suspend-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-skl7/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-iclb4/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-iclb4/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +2 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-kbl4/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-c.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-kbl6/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-c.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([fdo#108566]) +5 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-apl3/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-c-planes.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-apl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-c-planes.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145] / [fdo#110403]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-skl7/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-skl1/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-skl5/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13209/shard-skl9/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103166]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6221/shard-iclb7/igt@kms_plane_low...@pipe-a-tiling-y.html [24]:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/edid: abstract override/firmware EDID retrieval (rev2)
== Series Details ==
Series: series starting with [1/2] drm/edid: abstract override/firmware EDID
retrieval (rev2)
URL : https://patchwork.freedesktop.org/series/61764/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d5896a186b31 drm/edid: abstract override/firmware EDID retrieval
745bb8191a6d drm: add fallback override/firmware EDID modes workaround
-:53: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#53:
References:
http://mid.mail-archive.com/alpine.DEB.2.20.1905262211270.24390@whs-18.cs.helsinki.fi
-:57: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 15f080f08d48 ("drm/edid: respect
connector force for drm_get_edid ddc probe")'
#57:
References: 15f080f08d48 ("drm/edid: respect connector force for drm_get_edid
ddc probe")
total: 1 errors, 1 warnings, 0 checks, 56 lines checked
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Backlight control via VESA eDP aux interface
== Series Details == Series: drm/i915: Backlight control via VESA eDP aux interface URL : https://patchwork.freedesktop.org/series/61825/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13215 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/ Known issues Here are the changes found in Patchwork_13215 that come from known issues: ### IGT changes ### Issues hit * igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/fi-icl-u3/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html Possible fixes * igt@gem_render_linear_blits@basic: - fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_render_linear_bl...@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/fi-icl-u3/igt@gem_render_linear_bl...@basic.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][5] ([fdo#109485]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [DMESG-WARN][7] ([fdo#102614]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html - fi-icl-u2: [FAIL][9] ([fdo#103167]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 Participating hosts (54 -> 47) -- Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6225 -> Patchwork_13215 CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13215: 06b7b6ffb6272392f62a4a0890f231b68184dd2d @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 06b7b6ffb627 drm/i915: Backlight control via VESA eDP aux interface == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13215/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
