[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [RFC,1/2] drm/i915: move modesetting output/encoder code under display/
== Series Details == Series: series starting with [RFC,1/2] drm/i915: move modesetting output/encoder code under display/ URL : https://patchwork.freedesktop.org/series/61865/ State : success == Summary == CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13230_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_13230_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_13230_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_13230_full: ### IGT changes ### Warnings * igt@kms_hdmi_inject@inject-audio: - shard-iclb: [DMESG-FAIL][1] ([fdo#109593]) -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb1/igt@kms_hdmi_inj...@inject-audio.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-iclb8/igt@kms_hdmi_inj...@inject-audio.html Known issues Here are the changes found in Patchwork_13230_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap_wc@set-cache-level: - shard-snb: [PASS][3] -> [SKIP][4] ([fdo#109271]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-snb2/igt@gem_mmap...@set-cache-level.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-snb6/igt@gem_mmap...@set-cache-level.html * igt@gem_workarounds@suspend-resume-fd: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl4/igt@gem_workarou...@suspend-resume-fd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-skl6/igt@gem_workarou...@suspend-resume-fd.html * igt@kms_draw_crc@draw-method-xrgb-pwrite-ytiled: - shard-skl: [PASS][7] -> [FAIL][8] ([fdo#103184] / [fdo#103232] / [fdo#108222]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl7/igt@kms_draw_...@draw-method-xrgb-pwrite-ytiled.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-skl4/igt@kms_draw_...@draw-method-xrgb-pwrite-ytiled.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [PASS][9] -> [DMESG-WARN][10] ([fdo#108566]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl7/igt@kms_f...@flip-vs-suspend-interruptible.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-apl1/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb6/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-blt.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-iclb4/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103166]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-x.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-iclb4/igt@kms_plane_low...@pipe-a-tiling-x.html * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: [PASS][15] -> [FAIL][16] ([fdo#109016]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl3/igt@kms_rotation_...@multiplane-rotation-cropping-top.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-kbl6/igt@kms_rotation_...@multiplane-rotation-cropping-top.html * igt@kms_setmode@basic: - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#99912]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl1/igt@kms_setm...@basic.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-skl6/igt@kms_setm...@basic.html - shard-hsw: [PASS][19] -> [FAIL][20] ([fdo#99912]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_setm...@basic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-hsw8/igt@kms_setm...@basic.html * igt@perf@polling: - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#110728]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl7/igt@p...@polling.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13230/shard-skl5/igt@p...@polling.html Possible fixes * igt@gem_eio@in-flight-suspend: - shard-glk:
[Intel-gfx] ✓ Fi.CI.IGT: success for Use ranges for voltage level lookup
== Series Details == Series: Use ranges for voltage level lookup URL : https://patchwork.freedesktop.org/series/61864/ State : success == Summary == CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13229_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13229_full that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@mock_fence: - shard-iclb: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb5/igt@i915_selftest@mock_fence.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-iclb7/igt@i915_selftest@mock_fence.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +3 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-apl6/igt@i915_susp...@fence-restore-tiled2untiled.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-apl3/igt@i915_susp...@fence-restore-tiled2untiled.html * igt@kms_cursor_legacy@cursor-vs-flip-legacy: - shard-hsw: [PASS][5] -> [FAIL][6] ([fdo#103355]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw4/igt@kms_cursor_leg...@cursor-vs-flip-legacy.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-hsw5/igt@kms_cursor_leg...@cursor-vs-flip-legacy.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: [PASS][7] -> [FAIL][8] ([fdo#105363]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-glk9/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend: - shard-snb: [PASS][9] -> [INCOMPLETE][10] ([fdo#105411]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-snb7/igt@kms_f...@flip-vs-suspend.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-snb1/igt@kms_f...@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#109507]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl5/igt@kms_f...@flip-vs-suspend-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-skl5/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_flip_tiling@flip-to-x-tiled: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#108134]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb5/igt@kms_flip_til...@flip-to-x-tiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-iclb4/igt@kms_flip_til...@flip-to-x-tiled.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb3/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-iclb5/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103166]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-x.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-iclb6/igt@kms_plane_low...@pipe-a-tiling-x.html * igt@kms_setmode@basic: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#99912]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-skl1/igt@kms_setm...@basic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-skl2/igt@kms_setm...@basic.html - shard-hsw: [PASS][21] -> [FAIL][22] ([fdo#99912]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-hsw1/igt@kms_setm...@basic.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-hsw7/igt@kms_setm...@basic.html - shard-kbl: [PASS][23] -> [FAIL][24] ([fdo#99912]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-kbl2/igt@kms_setm...@basic.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-kbl6/igt@kms_setm...@basic.html Possible fixes * igt@gem_eio@in-flight-suspend: - shard-glk: [FAIL][25] ([fdo#110667]) -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/shard-glk2/igt@gem_...@in-flight-suspend.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13229/shard-glk1/igt@gem_...@in-flight-suspend.html *
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: remove duplicate entry of trace (rev2)
== Series Details ==
Series: drm/i915/gvt: remove duplicate entry of trace (rev2)
URL : https://patchwork.freedesktop.org/series/61281/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6242 -> Patchwork_13247
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/
Known issues
Here are the changes found in Patchwork_13247 that come from known issues:
### IGT changes ###
Possible fixes
* igt@i915_module_load@reload:
- fi-icl-u3: [DMESG-WARN][1] ([fdo#107724]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/fi-icl-u3/igt@i915_module_l...@reload.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/fi-icl-u3/igt@i915_module_l...@reload.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-bsw-kefka: [DMESG-WARN][3] -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/fi-bsw-kefka/igt@i915_module_l...@reload-with-fault-injection.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/fi-bsw-kefka/igt@i915_module_l...@reload-with-fault-injection.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][5] ([fdo#102614]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
- fi-icl-u2: [FAIL][7] ([fdo#103167]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
Warnings
* igt@runner@aborted:
- fi-bsw-kefka: [FAIL][9] ([fdo#110446]) -> [FAIL][10] ([fdo#107709]
/ [fdo#110446])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6242/fi-bsw-kefka/igt@run...@aborted.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/fi-bsw-kefka/igt@run...@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#110446]: https://bugs.freedesktop.org/show_bug.cgi?id=110446
Participating hosts (53 -> 47)
--
Additional (1): fi-bsw-n3050
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6242 -> Patchwork_13247
CI_DRM_6242: c12b829d81452b335fd986b93b2532001b93157e @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5051: 1f2acef836ffcbf5113df4ade8b587935c7d5868 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13247: 1e63ef1847a7a3aa4335ed03334cbb7316a64e40 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1e63ef1847a7 drm/i915/gvt: remove duplicate entry of trace
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13247/
___
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gvt: remove duplicate entry of trace (rev2)
== Series Details == Series: drm/i915/gvt: remove duplicate entry of trace (rev2) URL : https://patchwork.freedesktop.org/series/61281/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1e63ef1847a7 drm/i915/gvt: remove duplicate entry of trace -:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #16: > diff --git a/drivers/gpu/drm/i915/gvt/trace_points.c > b/drivers/gpu/drm/i915/gvt/trace_points.c total: 0 errors, 1 warnings, 0 checks, 8 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/gvt: remove duplicate entry of trace
On 2019.05.26 13:26:33 +0530, Hariprasad Kelam wrote: > Remove duplicate include of trace.h > > Issue identified by includecheck > > Signed-off-by: Hariprasad Kelam > --- > drivers/gpu/drm/i915/gvt/trace_points.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gvt/trace_points.c > b/drivers/gpu/drm/i915/gvt/trace_points.c > index a3deed69..569f5e3 100644 > --- a/drivers/gpu/drm/i915/gvt/trace_points.c > +++ b/drivers/gpu/drm/i915/gvt/trace_points.c > @@ -32,5 +32,4 @@ > > #ifndef __CHECKER__ > #define CREATE_TRACE_POINTS > -#include "trace.h" > #endif > -- This actually caused build issue like ERROR: "__tracepoint_gma_index" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_render_mmio" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_gvt_command" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_spt_guest_change" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_gma_translate" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_spt_alloc" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_spt_change" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_oos_sync" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_write_ir" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_propagate_event" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_inject_msi" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_spt_refcount" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_spt_free" [drivers/gpu/drm/i915/i915.ko] undefined! ERROR: "__tracepoint_oos_change" [drivers/gpu/drm/i915/i915.ko] undefined! scripts/Makefile.modpost:91: recipe for target '__modpost' failed Looks we need fix like below. Subject: [PATCH] drm/i915/gvt: remove duplicate include of trace.h This removes duplicate include of trace.h. Found by Hariprasad Kelam with includecheck. Reported-by: Hariprasad Kelam Signed-off-by: Zhenyu Wang --- drivers/gpu/drm/i915/gvt/trace_points.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/trace_points.c b/drivers/gpu/drm/i915/gvt/trace_points.c index a3deed692b9c..fe552e877e09 100644 --- a/drivers/gpu/drm/i915/gvt/trace_points.c +++ b/drivers/gpu/drm/i915/gvt/trace_points.c @@ -28,8 +28,6 @@ * */ -#include "trace.h" - #ifndef __CHECKER__ #define CREATE_TRACE_POINTS #include "trace.h" -- 2.20.1 -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] linux-next: manual merge of the drm-misc tree with the amdgpu tree
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
between commit:
c7c7192c56d2 ("drm/amd/display: add audio related regs")
from the amdgpu tree and commit:
4fc4dca8320e ("drm/amd: drop use of drmp.h in os_types.h")
from the drm-misc tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
index d43d5d924c19,9b078a71de2e..
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
@@@ -22,7 -22,9 +22,10 @@@
* Authors: AMD
*
*/
+
+ #include
+
+#include "../dc.h"
#include "reg_helper.h"
#include "dce_audio.h"
#include "dce/dce_11_0_d.h"
pgpHUadXFidsm.pgp
Description: OpenPGP digital signature
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Re: [Intel-gfx] [PATCH 3/5] drm/panel: Add attach/detach callbacks
On Tue, Jun 11, 2019 at 1:57 AM Daniel Vetter wrote:
>
> On Mon, Jun 10, 2019 at 09:03:48PM -0700, Derek Basehore wrote:
> > This adds the attach/detach callbacks. These are for setting up
> > internal state for the connector/panel pair that can't be done at
> > probe (since the connector doesn't exist) and which don't need to be
> > repeatedly done for every get/modes, prepare, or enable callback.
> > Values such as the panel orientation, and display size can be filled
> > in for the connector.
> >
> > Signed-off-by: Derek Basehore
> > ---
> > drivers/gpu/drm/drm_panel.c | 14 ++
> > include/drm/drm_panel.h | 4
> > 2 files changed, 18 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
> > index 3b689ce4a51a..72f67678d9d5 100644
> > --- a/drivers/gpu/drm/drm_panel.c
> > +++ b/drivers/gpu/drm/drm_panel.c
> > @@ -104,12 +104,23 @@ EXPORT_SYMBOL(drm_panel_remove);
> > */
> > int drm_panel_attach(struct drm_panel *panel, struct drm_connector
> > *connector)
> > {
> > + int ret;
> > +
> > if (panel->connector)
> > return -EBUSY;
> >
> > panel->connector = connector;
> > panel->drm = connector->dev;
> >
> > + if (panel->funcs->attach) {
> > + ret = panel->funcs->attach(panel);
> > + if (ret < 0) {
> > + panel->connector = NULL;
> > + panel->drm = NULL;
> > + return ret;
> > + }
> > + }
>
> Why can't we just implement this in the drm helpers for everyone, by e.g.
> storing a dt node in drm_panel? Feels a bit overkill to have these new
> hooks here.
>
> Also, my understanding is that this dt stuff is supposed to be
> standardized, so this should work.
So do you want all of this information added to the drm_panel struct?
If we do that, we don't necessarily even need the drm helper function.
We could just copy the values over here in the drm_panel_attach
function (and clear them in drm_panel_detach).
> -Daniel
>
> > +
> > return 0;
> > }
> > EXPORT_SYMBOL(drm_panel_attach);
> > @@ -128,6 +139,9 @@ EXPORT_SYMBOL(drm_panel_attach);
> > */
> > int drm_panel_detach(struct drm_panel *panel)
> > {
> > + if (panel->funcs->detach)
> > + panel->funcs->detach(panel);
> > +
> > panel->connector = NULL;
> > panel->drm = NULL;
> >
> > diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
> > index 13631b2efbaa..e136e3a3c996 100644
> > --- a/include/drm/drm_panel.h
> > +++ b/include/drm/drm_panel.h
> > @@ -37,6 +37,8 @@ struct display_timing;
> > * struct drm_panel_funcs - perform operations on a given panel
> > * @disable: disable panel (turn off back light, etc.)
> > * @unprepare: turn off panel
> > + * @detach: detach panel->connector (clear internal state, etc.)
> > + * @attach: attach panel->connector (update internal state, etc.)
> > * @prepare: turn on panel and perform set up
> > * @enable: enable panel (turn on back light, etc.)
> > * @get_modes: add modes to the connector that the panel is attached to and
> > @@ -70,6 +72,8 @@ struct display_timing;
> > struct drm_panel_funcs {
> > int (*disable)(struct drm_panel *panel);
> > int (*unprepare)(struct drm_panel *panel);
> > + void (*detach)(struct drm_panel *panel);
> > + int (*attach)(struct drm_panel *panel);
> > int (*prepare)(struct drm_panel *panel);
> > int (*enable)(struct drm_panel *panel);
> > int (*get_modes)(struct drm_panel *panel);
> > --
> > 2.22.0.rc2.383.gf4fbbf30c2-goog
> >
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
___
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Re: [Intel-gfx] [PATCH] drm/i915: Engine relative MMIO
On Mon, May 20, 2019 at 07:19:58AM +0100, Tvrtko Ursulin wrote:
>
> On 17/05/2019 02:25, John Harrison wrote:
> > On 5/15/2019 01:52, Tvrtko Ursulin wrote:
> > >
> > > On 13/05/2019 20:45, john.c.harri...@intel.com wrote:
> > > > From: John Harrison
> > > >
> > > > With virtual engines, it is no longer possible to know which specific
> > > > physical engine a given request will be executed on at the time that
> > > > request is generated. This means that the request itself must be engine
> > > > agnostic - any direct register writes must be relative to the engine
> > > > and not absolute addresses.
> > > >
> > > > The LRI command has support for engine relative addressing. However,
> > > > the mechanism is not transparent to the driver. The scheme for Gen11
> > > > (MI_LRI_ADD_CS_MMIO_START) requires the LRI address to have no
> > > > absolute engine base component. The hardware then adds on the correct
> > > > engine offset at execution time.
> > > >
> > > > Due to the non-trivial and differing schemes on different hardware, it
> > > > is not possible to simply update the code that creates the LRI
> > > > commands to set a remap flag and let the hardware get on with it.
> > > > Instead, this patch adds function wrappers for generating the LRI
> > > > command itself and then for constructing the correct address to use
> > > > with the LRI.
> > > >
> > > > v2: Fix build break in GVT. Remove flags parameter [review feedback
> > > > from Chris W].
> > > >
> > > > v3: Fix build break in selftest. Rebase to newer base tree and fix
> > > > merge conflict.
> > > >
> > > > v4: More rebasing. Rmoved relative addressing support from Gen7-9 only
> > > > code paths [review feedback from Chris W].
> > > >
> > > > v5: More rebasing (new 'gt' directory). Fix white space issue. Use
> > > > COPY class rather than BCS0 id for checking against BCS engine.
> > > >
> > > > Signed-off-by: John Harrison
> > > > CC: Rodrigo Vivi
> > > > CC: Tvrtko Ursulin
> > > > CC: Wilson, Chris P
> > > > ---
> > > > drivers/gpu/drm/i915/gt/intel_engine.h | 4 +
> > > > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 11 +++
> > > > drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 6 +-
> > > > drivers/gpu/drm/i915/gt/intel_lrc.c | 79 ++-
> > > > drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 4 +-
> > > > drivers/gpu/drm/i915/gt/intel_mocs.c | 17 ++--
> > > > drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 45 +--
> > > > drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 +-
> > > > .../gpu/drm/i915/gt/selftest_workarounds.c | 9 ++-
> > > > drivers/gpu/drm/i915/gvt/mmio_context.c | 16 +++-
> > > > drivers/gpu/drm/i915/i915_cmd_parser.c | 4 +-
> > > > drivers/gpu/drm/i915/i915_gem_context.c | 12 +--
> > > > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 3 +-
> > > > drivers/gpu/drm/i915/i915_perf.c | 19 +++--
> > > > 14 files changed, 154 insertions(+), 79 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h
> > > > b/drivers/gpu/drm/i915/gt/intel_engine.h
> > > > index 9359b3a7ad9c..3506c992182c 100644
> > > > --- a/drivers/gpu/drm/i915/gt/intel_engine.h
> > > > +++ b/drivers/gpu/drm/i915/gt/intel_engine.h
> > > > @@ -546,4 +546,8 @@ static inline bool
> > > > inject_preempt_hang(struct intel_engine_execlists *execlists)
> > > > #endif
> > > > +bool i915_engine_has_relative_lri(const struct
> > > > intel_engine_cs *engine);
> > > > +u32 i915_get_lri_cmd(const struct intel_engine_cs *engine, u32
> > > > word_count);
> > > > +u32 i915_get_lri_reg(const struct intel_engine_cs *engine,
> > > > i915_reg_t reg);
> > > > +
> > > > #endif /* _INTEL_RINGBUFFER_H_ */
> > > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > > > b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > > > index 4c3753c1b573..233295d689d2 100644
> > > > --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > > > +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > > > @@ -253,6 +253,17 @@ static u32 __engine_mmio_base(struct
> > > > drm_i915_private *i915,
> > > > return bases[i].base;
> > > > }
> > > > +bool i915_engine_has_relative_lri(const struct
> > > > intel_engine_cs *engine)
> > > > +{
> > > > + if (INTEL_GEN(engine->i915) < 11)
> > > > + return false;
> > > > +
> > > > + if (engine->class == COPY_ENGINE_CLASS)
> > > > + return false;
> > > > +
> > > > + return true;
> > >
> > > I think engine->flags would be better. At least it is one
> > > conditional instead of two at runtime, even one too many for
> > > something that is invariant.
> > >
> > > > +}
> > > > +
> > > > static void __sprint_engine_name(char *name, const struct
> > > > engine_info *info)
> > > > {
> > > > WARN_ON(snprintf(name, INTEL_ENGINE_CS_MAX_NAME, "%s%u",
> > > > diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> > > > b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> > > >
Re: [Intel-gfx] [PATCH 4/5] drm/connector: Split out orientation quirk detection
On Tue, Jun 11, 2019 at 1:54 AM Hans de Goede wrote: > > Hi, > > On 11-06-19 10:08, Jani Nikula wrote: > > On Mon, 10 Jun 2019, Derek Basehore wrote: > >> This removes the orientation quirk detection from the code to add > >> an orientation property to a panel. This is used only for legacy x86 > >> systems, yet we'd like to start using this on devicetree systems where > >> quirk detection like this is not needed. > > > > Not needed, but no harm done either, right? > > > > I guess I'll defer judgement on this to Hans and Ville (Cc'd). > > Hmm, I'm not big fan of this change. It adds code duplication and as > other models with the same issue using a different driver or panel-type > show up we will get more code duplication. > > Also I'm not convinced that devicetree based platforms will not need > this. The whole devicetree as an ABI thing, which means that all > devicetree bindings need to be set in stone before things are merged > into the mainline, is done solely so that we can get vendors to ship > hardware with the dtb files included in the firmware. We've posted fixes to the devicetree well after the initial merge into mainline before, so I don't see what you mean about the bindings being set in stone. I also don't really see the point. The devicetree is in the kernel. If there's some setting in the devicetree that we want to change, it's effectively the same to make the change in the devicetree versus some quirk setting. The only difference seems to be that making the change in the devicetree is cleaner. > > I'm 100% sure that there is e.g. ARM hardware out there which uses > non upright mounted LCD panels (I used to have a few Allwinner > tablets which did this). And given my experience with the quality > of firmware bundled tables like ACPI tables I'm quite sure that > if we ever move to firmware included dtb files that we will need > quirks for those too. Is there a timeline to start using firmware bundled tables? Since the quirk code only uses DMI, it will need to be changed anyways for firmware bundled devicetree files anyways. We could consolidate the duplicated code into another function that calls drm_get_panel_orientation_quirks too. The only reason it's like it is is because I initially only had the call to drm_get_panel_orientation_quirk once in the code. > > Also calling this "used only for legacy x86 systems" is a bit > unfair IMHO, new UEFI models are still being added to the quirk list > today, for hardware which does not even ship yet. Actually 99% > of the models in the quirk list are UEFI only models, which do > not even support classic PC BIOS booting, so those systems are > anything but legacy. > > I believe the only reason we have only had to deal with this on x86 > so far is because the OOTB support for most ARM systems is less polished > then that for x86 systems and on ARM systems there are still more > important issues to tackle first. ARM just handles it in a different way. I'm not exactly sure how more of the Android tablets do this, but it might just be handled entirely in userspace with rotated splash screens on boot (so a device with a 180 degree panel has an upside down splash screen). > > Regards, > > Hans > > > > > > > > > > Side note, I'm about to apply some (minor) conflicting changes in our > > -next as soon as I get CI results on it. > > > > > > BR, > > Jani. > > > > > >> > >> Signed-off-by: Derek Basehore > >> --- > >> drivers/gpu/drm/drm_connector.c | 16 > >> drivers/gpu/drm/i915/intel_dp.c | 14 +++--- > >> drivers/gpu/drm/i915/vlv_dsi.c | 14 ++ > >> include/drm/drm_connector.h | 2 +- > >> 4 files changed, 26 insertions(+), 20 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/drm_connector.c > >> b/drivers/gpu/drm/drm_connector.c > >> index e17586aaa80f..58a09b65028b 100644 > >> --- a/drivers/gpu/drm/drm_connector.c > >> +++ b/drivers/gpu/drm/drm_connector.c > >> @@ -1894,31 +1894,23 @@ > >> EXPORT_SYMBOL(drm_connector_set_vrr_capable_property); > >>* drm_connector_init_panel_orientation_property - > >>* initialize the connecters panel_orientation property > >>* @connector: connector for which to init the panel-orientation > >> property. > >> - * @width: width in pixels of the panel, used for panel quirk detection > >> - * @height: height in pixels of the panel, used for panel quirk detection > >>* > >>* This function should only be called for built-in panels, after setting > >>* connector->display_info.panel_orientation first (if known). > >>* > >> - * This function will check for platform specific (e.g. DMI based) quirks > >> - * overriding display_info.panel_orientation first, then if > >> panel_orientation > >> - * is not DRM_MODE_PANEL_ORIENTATION_UNKNOWN it will attach the > >> - * "panel orientation" property to the connector. > >> + * This function will check if the panel_orientation is not > >> + * DRM_MODE_PANEL_ORIENTATION_UNKNOWN. If not, it will attach
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [REBASED,1/2] drm/i915: Move intel_add_dsi_properties to intel_dsi
== Series Details == Series: series starting with [REBASED,1/2] drm/i915: Move intel_add_dsi_properties to intel_dsi URL : https://patchwork.freedesktop.org/series/61862/ State : success == Summary == CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13228_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_13228_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_13228_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_13228_full: ### IGT changes ### Warnings * igt@kms_hdmi_inject@inject-audio: - shard-iclb: [DMESG-FAIL][1] ([fdo#109593]) -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb1/igt@kms_hdmi_inj...@inject-audio.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-iclb8/igt@kms_hdmi_inj...@inject-audio.html Known issues Here are the changes found in Patchwork_13228_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_engines@execute-one: - shard-snb: [PASS][3] -> [DMESG-WARN][4] ([fdo#110869]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-snb4/igt@gem_ctx_engi...@execute-one.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-snb6/igt@gem_ctx_engi...@execute-one.html - shard-glk: [PASS][5] -> [DMESG-WARN][6] ([fdo#110869]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-glk3/igt@gem_ctx_engi...@execute-one.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-glk9/igt@gem_ctx_engi...@execute-one.html * igt@gem_ctx_isolation@bcs0-s3: - shard-apl: [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +4 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-apl2/igt@gem_ctx_isolat...@bcs0-s3.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-apl8/igt@gem_ctx_isolat...@bcs0-s3.html * igt@gem_eio@in-flight-suspend: - shard-glk: [PASS][9] -> [FAIL][10] ([fdo#110667]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-glk1/igt@gem_...@in-flight-suspend.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-glk4/igt@gem_...@in-flight-suspend.html * igt@gem_exec_schedule@preempt-queue-bsd: - shard-glk: [PASS][11] -> [INCOMPLETE][12] ([fdo#103359] / [k.org#198133]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-glk8/igt@gem_exec_sched...@preempt-queue-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-glk3/igt@gem_exec_sched...@preempt-queue-bsd.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-skl: [PASS][13] -> [INCOMPLETE][14] ([fdo#110741]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl2/igt@kms_cursor_...@pipe-a-cursor-suspend.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-skl6/igt@kms_cursor_...@pipe-a-cursor-suspend.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [PASS][15] -> [FAIL][16] ([fdo#104873]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-glk4/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-glk8/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset: - shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +15 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-hsw4/igt@kms_f...@2x-flip-vs-dpms-off-vs-modeset.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-hsw1/igt@kms_f...@2x-flip-vs-dpms-off-vs-modeset.html * igt@kms_flip@flip-vs-suspend: - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#109507]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl9/igt@kms_f...@flip-vs-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-skl1/igt@kms_f...@flip-vs-suspend.html - shard-snb: [PASS][21] -> [INCOMPLETE][22] ([fdo#105411]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-snb6/igt@kms_f...@flip-vs-suspend.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13228/shard-snb1/igt@kms_f...@flip-vs-suspend.html * igt@kms_flip_tiling@flip-to-x-tiled: - shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#108134]) [23]:
Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/icl: Assign Master slave crtc links for Transcoder Port Sync
Need some suggestions on what could be stored in slave_crtc_state to point to
the master,
See my comments/questions inline
On Tue, Apr 23, 2019 at 08:48:58AM -0700, Manasi Navare wrote:
> In case of tiled displays when the two tiles are sent across two CRTCs
> over two separate DP SST connectors, we need a mechanism to synchronize
> the two CRTCs and their corresponding transcoders.
> So use the master-slave mode where there is one master corresponding
> to last horizontal and vertical tile that needs to be genlocked with
> all other slave tiles.
> This patch identifies saves the master CRTC pointer in all the slave
> CRTC states. This pointer is needed to select the master CRTC/transcoder
> while configuring transcoder port sync for the corresponding slaves.
>
> v2:
> * Move this to intel_mode_set_pipe_config(Jani N, Ville)
> * Use slave_bitmask to save associated slaves in master crtc state (Ville)
>
> Cc: Daniel Vetter
> Cc: Ville Syrjälä
> Cc: Maarten Lankhorst
> Cc: Matt Roper
> Signed-off-by: Manasi Navare
> ---
> drivers/gpu/drm/i915/intel_display.c | 89
> drivers/gpu/drm/i915/intel_drv.h | 6 ++
> 2 files changed, 95 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index b276345779e6..92dea2231499 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11316,6 +11316,86 @@ static int icl_check_nv12_planes(struct
> intel_crtc_state *crtc_state)
> return 0;
> }
>
> +static int icl_add_genlock_crtcs(struct drm_crtc *crtc,
> + struct intel_crtc_state *crtc_state,
> + struct drm_atomic_state *state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
> + struct drm_connector *master_connector, *connector;
> + struct drm_connector_state *connector_state;
> + struct drm_connector_list_iter conn_iter;
> + struct drm_crtc *master_crtc = NULL;
> + struct drm_crtc_state *master_crtc_state;
> + int i, tile_group_id;
> +
> + if (INTEL_GEN(dev_priv) < 11)
> + return 0;
> +
> + /*
> + * In case of tiled displays there could be one or more slaves but
> there is
> + * only one master. Lets make the CRTC used by the connector
> corresponding
> + * to the last horizonal and last vertical tile a master/genlock CRTC.
> + * All the other CRTCs corresponding to other tiles of the same Tile
> group
> + * are the slave CRTCs and hold a pointer to their genlock CRTC.
> + */
> + for_each_new_connector_in_state(state, connector, connector_state, i) {
> + if (connector_state->crtc != crtc)
> + continue;
> + if (!connector->has_tile)
> + continue;
> + if (connector->tile_h_loc == connector->num_h_tile - 1 &&
> + connector->tile_v_loc == connector->num_v_tile - 1)
> + continue;
> + crtc_state->master_crtc = NULL;
> + tile_group_id = connector->tile_group->id;
> + drm_connector_list_iter_begin(_priv->drm, _iter);
> + drm_for_each_connector_iter(master_connector, _iter) {
> + struct drm_connector_state *master_conn_state = NULL;
> +
> + if (!master_connector->has_tile)
> + continue;
> + if (master_connector->tile_h_loc !=
> master_connector->num_h_tile - 1 ||
> + master_connector->tile_v_loc !=
> master_connector->num_v_tile - 1)
> + continue;
> + if (master_connector->tile_group->id != tile_group_id)
> + continue;
> +
> + master_conn_state =
> drm_atomic_get_connector_state(state,
> +
> master_connector);
> + if (IS_ERR(master_conn_state)) {
> + drm_connector_list_iter_end(_iter);
> + return PTR_ERR(master_conn_state);
> + }
> + if (master_conn_state->crtc) {
> + master_crtc = master_conn_state->crtc;
> + break;
> + }
> + }
> + drm_connector_list_iter_end(_iter);
> +
> + if (!master_crtc) {
> + DRM_DEBUG_KMS("Could not add Master CRTC for Slave CRTC
> %d\n",
> + connector_state->crtc->base.id);
> + return -EINVAL;
> + }
> +
> + master_crtc_state = drm_atomic_get_crtc_state(state,
> + master_crtc);
> + if (IS_ERR(master_crtc_state))
> + return
[Intel-gfx] ✓ Fi.CI.IGT: success for Implicit dev_priv removal (rev2)
== Series Details == Series: Implicit dev_priv removal (rev2) URL : https://patchwork.freedesktop.org/series/61705/ State : success == Summary == CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13227_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_13227_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_13227_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_13227_full: ### IGT changes ### Warnings * igt@kms_hdmi_inject@inject-audio: - shard-iclb: [DMESG-FAIL][1] ([fdo#109593]) -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb1/igt@kms_hdmi_inj...@inject-audio.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-iclb7/igt@kms_hdmi_inj...@inject-audio.html Known issues Here are the changes found in Patchwork_13227_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_tiled_swapping@non-threaded: - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108686]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-apl5/igt@gem_tiled_swapp...@non-threaded.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-apl5/igt@gem_tiled_swapp...@non-threaded.html * igt@i915_pm_backlight@fade_with_suspend: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl4/igt@i915_pm_backlight@fade_with_suspend.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-skl7/igt@i915_pm_backlight@fade_with_suspend.html * igt@kms_cursor_crc@pipe-b-cursor-256x256-random: - shard-snb: [PASS][7] -> [SKIP][8] ([fdo#109271]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-snb4/igt@kms_cursor_...@pipe-b-cursor-256x256-random.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-snb2/igt@kms_cursor_...@pipe-b-cursor-256x256-random.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][9] -> [FAIL][10] ([fdo#105363]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl9/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-skl1/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-pwrite: - shard-hsw: [PASS][11] -> [SKIP][12] ([fdo#109271]) +17 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-hsw4/igt@kms_frontbuffer_track...@fbc-2p-primscrn-pri-shrfb-draw-pwrite.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-primscrn-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb8/igt@kms_frontbuffer_track...@fbc-rgb565-draw-render.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-iclb8/igt@kms_frontbuffer_track...@fbc-rgb565-draw-render.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-apl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-b-planes.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-apl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145] / [fdo#110403]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl5/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-skl8/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl1/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13227/shard-skl8/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#103166]) [21]:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev3)
== Series Details == Series: drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev3) URL : https://patchwork.freedesktop.org/series/61832/ State : success == Summary == CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13226_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13226_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_eio@reset-stress: - shard-snb: [PASS][1] -> [FAIL][2] ([fdo#109661]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-snb7/igt@gem_...@reset-stress.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-snb6/igt@gem_...@reset-stress.html * igt@gem_exec_schedule@reorder-wide-blt: - shard-apl: [PASS][3] -> [INCOMPLETE][4] ([fdo#103927]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-apl7/igt@gem_exec_sched...@reorder-wide-blt.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-apl8/igt@gem_exec_sched...@reorder-wide-blt.html * igt@gem_tiled_swapping@non-threaded: - shard-glk: [PASS][5] -> [DMESG-WARN][6] ([fdo#108686]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-glk5/igt@gem_tiled_swapp...@non-threaded.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-glk3/igt@gem_tiled_swapp...@non-threaded.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [PASS][7] -> [FAIL][8] ([fdo#104873]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-glk4/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-glk5/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html * igt@kms_flip@2x-blocking-absolute-wf_vblank: - shard-hsw: [PASS][9] -> [SKIP][10] ([fdo#109271]) +6 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-hsw7/igt@kms_flip@2x-blocking-absolute-wf_vblank.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-hsw1/igt@kms_flip@2x-blocking-absolute-wf_vblank.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +2 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb5/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-apl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-b-planes.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-apl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#108145]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl1/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-skl1/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html * igt@perf@blocking: - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#110728]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl7/igt@p...@blocking.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-skl2/igt@p...@blocking.html * igt@perf_pmu@rc6: - shard-kbl: [PASS][19] -> [SKIP][20] ([fdo#109271]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-kbl4/igt@perf_...@rc6.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-kbl2/igt@perf_...@rc6.html Possible fixes * igt@gem_ctx_engines@execute-one: - shard-skl: [DMESG-WARN][21] ([fdo#110869]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl4/igt@gem_ctx_engi...@execute-one.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-skl8/igt@gem_ctx_engi...@execute-one.html - shard-hsw: [DMESG-WARN][23] ([fdo#110869]) -> [PASS][24] +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-hsw5/igt@gem_ctx_engi...@execute-one.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13226/shard-hsw7/igt@gem_ctx_engi...@execute-one.html - shard-iclb: [DMESG-WARN][25] ([fdo#110869]) -> [PASS][26] [25]:
Re: [Intel-gfx] [PATCH 2/5] dt-bindings: display/panel: Expand rotation documentation
On Tue, Jun 11, 2019 at 8:25 AM Rob Herring wrote:
>
> On Mon, Jun 10, 2019 at 10:03 PM Derek Basehore
> wrote:
> >
> > This adds to the rotation documentation to explain how drivers should
> > use the property and gives an example of the property in a devicetree
> > node.
> >
> > Signed-off-by: Derek Basehore
> > ---
> > .../bindings/display/panel/panel.txt | 32 +++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/display/panel/panel.txt
> > b/Documentation/devicetree/bindings/display/panel/panel.txt
> > index e2e6867852b8..f35d62d933fc 100644
> > --- a/Documentation/devicetree/bindings/display/panel/panel.txt
> > +++ b/Documentation/devicetree/bindings/display/panel/panel.txt
> > @@ -2,3 +2,35 @@ Common display properties
> > -
> >
> > - rotation:Display rotation in degrees counter clockwise (0,90,180,270)
> > +
> > +Property read from the device tree using of of_drm_get_panel_orientation
>
> Don't put kernel specifics into bindings.
Will remove that. I'll clean up the documentation to indicate that
this binding creates a panel orientation property unless the rotation
is handled in the Timing Controller on the panel if that sounds fine.
>
> > +
> > +The panel driver may apply the rotation at the TCON level, which will
>
> What's TCON? Something Mediatek specific IIRC.
The TCON is the Timing controller, which is on the panel. Every panel
has one. I'll add to the doc that the TCON is in the panel, etc.
>
> > +make the panel look like it isn't rotated to the kernel and any other
> > +software.
> > +
> > +If not, a panel orientation property should be added through the SoC
> > +vendor DRM code using the drm_connector_init_panel_orientation_property
> > +function.
>
> The 'rotation' property should be defined purely based on how the
> panel is mounted relative to a device's orientation. If the display
> pipeline has some ability to handle rotation, that's a feature of the
> display pipeline and not the panel.
This is how the panel orientation property is already handled in the
kernel. See drivers/gpu/drm/i915/vlv_dsi.c for more details.
>
> > +
> > +Example:
>
> This file is a collection of common properties. It shouldn't have an
> example especially as this example is mostly non-common properties.
Just copied one of our DTS entries that uses the property. I'll remove
everything under compatible except for rotation and status.
>
> > + panel: panel@0 {
> > + compatible = "boe,himax8279d8p";
> > + reg = <0>;
> > + enable-gpios = < 45 0>;
>
> > + pp33-gpios = < 35 0>;
> > + pp18-gpios = < 36 0>;
>
> BTW, are these upstream because they look like GPIO controlled
> supplies which we model with gpio-regulator binding typically.
The boe,himax8279 driver was sent upstream, but it doesn't appear to
be merged. I'll look into it on that thread.
>
> > + pinctrl-names = "default", "state_3300mv", "state_1800mv";
> > + pinctrl-0 = <_pins_default>;
> > + pinctrl-1 = <_pins_3300mv>;
> > + pinctrl-2 = <_pins_1800mv>;
> > + backlight = <_lcd0>;
> > + rotation = <180>;
> > + status = "okay";
> > +
> > + port {
> > + panel_in: endpoint {
> > + remote-endpoint = <_out>;
> > + };
> > + };
> > + };
> > --
> > 2.22.0.rc2.383.gf4fbbf30c2-goog
> >
___
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Re: [Intel-gfx] [PATCH 8/9] drm/i915/gtt: Make swapping the pd entry generic
Quoting Chris Wilson (2019-06-11 20:50:09)
> Quoting Mika Kuoppala (2019-06-11 18:27:30)
> > Swapping a pd entry is same across the page directories, if
> > we succeed we need to increment the count and write the phys page
> > entry. Make a common function for it.
> >
> > Signed-off-by: Mika Kuoppala
> > ---
> > drivers/gpu/drm/i915/i915_gem_gtt.c | 41 +++--
> > 1 file changed, 27 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index f1d7874834e2..9b0d0a077e31 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -752,6 +752,27 @@ static void __set_pd_entry(struct i915_page_directory
> > * const pd,
> >gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
> > })
> >
> > +static void *__swap_pd_entry(struct i915_page_directory * const pd,
> > +const unsigned short pde,
> > +void * const old_val,
> > +void * const new_val,
> > +const u64 encoded_entry)
>
> Mark this as inline and pass in the encode function, the compiler should
> do the rest.
>
> > +{
> > + void * const old = cmpxchg(>entry[pde], old_val, new_val);
> > +
> > + if (likely(old == old_val)) {
> > + atomic_inc(>used);
>
> Hmm, looking at this again, this would be safer if atomic_inc was before
> the cmpxchg, with an atomic_dec on the fail path.
Actually already taken care of, the parent pins the child page directory
before entering.
-Chris
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Re: [Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro
On Tue, 11 Jun 2019 15:00:10 -0600 Andreas Dilger wrote: > >> to FIELD_SIZEOF > > > > As Alexey has pointed out, C structs and unions don't have fields - > > they have members. So this is an opportunity to switch everything to > > a new member_sizeof(). > > > > What do people think of that and how does this impact the patch footprint? > > I did a check, and FIELD_SIZEOF() is used about 350x, while sizeof_field() > is about 30x, and SIZEOF_FIELD() is only about 5x. Erk. Sorry, I should have grepped. > That said, I'm much more in favour of "sizeof_field()" or "sizeof_member()" > than FIELD_SIZEOF(). Not only does that better match "offsetof()", with > which it is closely related, but is also closer to the original "sizeof()". > > Since this is a rather trivial change, it can be split into a number of > patches to get approval/landing via subsystem maintainers, and there is no > huge urgency to remove the original macros until the users are gone. It > would make sense to remove SIZEOF_FIELD() and sizeof_field() quickly so > they don't gain more users, and the remaining FIELD_SIZEOF() users can be > whittled away as the patches come through the maintainer trees. In that case I'd say let's live with FIELD_SIZEOF() and remove sizeof_field() and SIZEOF_FIELD(). I'm a bit surprised that the FIELD_SIZEOF() definition ends up in stddef.h rather than in kernel.h where such things are normally defined. Why is that? ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro
On Wed, 12 Jun 2019 01:08:36 +0530 Shyam Saini wrote: > Currently, there are 3 different macros, namely sizeof_field, SIZEOF_FIELD > and FIELD_SIZEOF which are used to calculate the size of a member of > structure, so to bring uniformity in entire kernel source tree lets use > FIELD_SIZEOF and replace all occurrences of other two macros with this. > > For this purpose, redefine FIELD_SIZEOF in include/linux/stddef.h and > tools/testing/selftests/bpf/bpf_util.h and remove its defination from > include/linux/kernel.h > > In favour of FIELD_SIZEOF, this patch also deprecates other two similar > macros sizeof_field and SIZEOF_FIELD. > > For code compatibility reason, retain sizeof_field macro as a wrapper macro > to FIELD_SIZEOF As Alexey has pointed out, C structs and unions don't have fields - they have members. So this is an opportunity to switch everything to a new member_sizeof(). What do people think of that and how does this impact the patch footprint? ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH V2] include: linux: Regularise the use of FIELD_SIZEOF macro
On Wed, Jun 12, 2019 at 01:08:36AM +0530, Shyam Saini wrote:
> In favour of FIELD_SIZEOF, this patch also deprecates other two similar
> macros sizeof_field and SIZEOF_FIELD.
>
> For code compatibility reason, retain sizeof_field macro as a wrapper macro
> to FIELD_SIZEOF
Can you explain this part? First sentence says you want to remove
sizeof_field, and the second says you're keeping it? I thought the point
was to switch all of these to FIELD_SIZEOF()?
-Kees
>
> Signed-off-by: Shyam Saini
> ---
> Changelog:
>
> V1->V2
> - Consolidate previous patch 1 and 2 into single patch
> - For code compatibility reason, retain sizeof_field macro as a
> wrapper macro to FIELD_SIZEOF
>
> arch/arm64/include/asm/processor.h | 10 +-
> arch/mips/cavium-octeon/executive/cvmx-bootmem.c | 9 +
> drivers/gpu/drm/i915/gvt/scheduler.c | 2 +-
> drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c | 4 ++--
> fs/befs/linuxvfs.c | 2 +-
> fs/ext2/super.c| 2 +-
> fs/ext4/super.c| 2 +-
> fs/freevxfs/vxfs_super.c | 2 +-
> fs/orangefs/super.c| 2 +-
> fs/ufs/super.c | 2 +-
> include/linux/kernel.h | 9 -
> include/linux/slab.h | 2 +-
> include/linux/stddef.h | 17 ++---
> kernel/fork.c | 2 +-
> kernel/utsname.c | 2 +-
> net/caif/caif_socket.c | 2 +-
> net/core/skbuff.c | 2 +-
> net/ipv4/raw.c | 2 +-
> net/ipv6/raw.c | 2 +-
> net/sctp/socket.c | 4 ++--
> tools/testing/selftests/bpf/bpf_util.h | 22
> +++---
> virt/kvm/kvm_main.c| 2 +-
> 22 files changed, 58 insertions(+), 47 deletions(-)
>
> diff --git a/arch/arm64/include/asm/processor.h
> b/arch/arm64/include/asm/processor.h
> index fcd0e691b1ea..ace906d887cc 100644
> --- a/arch/arm64/include/asm/processor.h
> +++ b/arch/arm64/include/asm/processor.h
> @@ -164,13 +164,13 @@ static inline void
> arch_thread_struct_whitelist(unsigned long *offset,
> unsigned long *size)
> {
> /* Verify that there is no padding among the whitelisted fields: */
> - BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
> - sizeof_field(struct thread_struct, uw.tp_value) +
> - sizeof_field(struct thread_struct, uw.tp2_value) +
> - sizeof_field(struct thread_struct, uw.fpsimd_state));
> + BUILD_BUG_ON(FIELD_SIZEOF(struct thread_struct, uw) !=
> + FIELD_SIZEOF(struct thread_struct, uw.tp_value) +
> + FIELD_SIZEOF(struct thread_struct, uw.tp2_value) +
> + FIELD_SIZEOF(struct thread_struct, uw.fpsimd_state));
>
> *offset = offsetof(struct thread_struct, uw);
> - *size = sizeof_field(struct thread_struct, uw);
> + *size = FIELD_SIZEOF(struct thread_struct, uw);
> }
>
> #ifdef CONFIG_COMPAT
> diff --git a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
> b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
> index ba8f82a29a81..44b506a14666 100644
> --- a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
> +++ b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
> @@ -45,13 +45,6 @@ static struct cvmx_bootmem_desc *cvmx_bootmem_desc;
> /* See header file for descriptions of functions */
>
> /**
> - * This macro returns the size of a member of a structure.
> - * Logically it is the same as "sizeof(s::field)" in C++, but
> - * C lacks the "::" operator.
> - */
> -#define SIZEOF_FIELD(s, field) sizeof(((s *)NULL)->field)
> -
> -/**
> * This macro returns a member of the
> * cvmx_bootmem_named_block_desc_t structure. These members can't
> * be directly addressed as they might be in memory not directly
> @@ -65,7 +58,7 @@ static struct cvmx_bootmem_desc *cvmx_bootmem_desc;
> #define CVMX_BOOTMEM_NAMED_GET_FIELD(addr, field)\
> __cvmx_bootmem_desc_get(addr, \
> offsetof(struct cvmx_bootmem_named_block_desc, field), \
> - SIZEOF_FIELD(struct cvmx_bootmem_named_block_desc, field))
> + FIELD_SIZEOF(struct cvmx_bootmem_named_block_desc, field))
>
> /**
> * This function is the implementation of the get macros defined
> diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c
> b/drivers/gpu/drm/i915/gvt/scheduler.c
> index 0f919f0a43d4..820f95a52542 100644
> --- a/drivers/gpu/drm/i915/gvt/scheduler.c
> +++ b/drivers/gpu/drm/i915/gvt/scheduler.c
> @@
Re: [Intel-gfx] [RFC 7/8] drm/i915: introduce display_uncore
On 6/7/19 1:58 AM, Tvrtko Ursulin wrote:
+ Jani & Ville
Jani, Ville, any feedback on this approach?
BTW, If we want to keep the accesses short we could also have display_*
register access wrappers that take i915 and internally use >de_uncore.
On 06/06/2019 22:52, Daniele Ceraolo Spurio wrote:
A forcewake-less uncore to be used to decouple GT accesses from display
ones to avoid serializing them when there is no need.
All the uncore suspend/resume functions are forcewake-related, so no
need to call them for display_uncore.
Looks like a promising concept. Display experts can give a final verdict.
Would it be possible to add something like Ville did to verify
non-display registers are not used with wrong uncore and vice-versa
(https://github.com/vsyrjala/linux/commit/ddd01ad0836f2aad3bb78d6e27a572d2ae43960e)?
Another vfunc per uncore to verify register range or something.
I was also thinking of adding something along these lines, but having it
under a debug build flag. I was also hoping to get rid of
NEEDS_FORCE_WAKE and GEN11_NEEDS_FORCE_WAKE if/when the transition
completes, which should help reduce the per-gen deltas in the MMIO
accessors.
Daniele
Regards,
Tvrtko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_drv.c | 14 +++---
drivers/gpu/drm/i915/i915_drv.h | 6 +-
drivers/gpu/drm/i915/intel_uncore.c | 23 +--
drivers/gpu/drm/i915/intel_uncore.h | 9 -
4 files changed, 41 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c
b/drivers/gpu/drm/i915/i915_drv.c
index 024f270f6f00..635024cad005 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -893,7 +893,8 @@ static int i915_driver_init_early(struct
drm_i915_private *dev_priv)
intel_device_info_subplatform_init(dev_priv);
- intel_uncore_init_early(_priv->uncore);
+ intel_uncore_init_early(_priv->uncore, 0);
+ intel_uncore_init_early(_priv->de_uncore, UNCORE_IS_DISPLAY);
spin_lock_init(_priv->irq_lock);
spin_lock_init(_priv->gpu_error.lock);
@@ -991,6 +992,10 @@ static int i915_driver_init_mmio(struct
drm_i915_private *dev_priv)
if (ret < 0)
goto err_bridge;
+ ret = intel_uncore_init_mmio(_priv->de_uncore);
+ if (ret < 0)
+ goto err_uncore;
+
/* Try to make sure MCHBAR is enabled before poking at it */
intel_setup_mchbar(dev_priv);
@@ -1000,14 +1005,16 @@ static int i915_driver_init_mmio(struct
drm_i915_private *dev_priv)
ret = intel_engines_init_mmio(dev_priv);
if (ret)
- goto err_uncore;
+ goto err_mchbar;
i915_gem_init_mmio(dev_priv);
return 0;
-err_uncore:
+err_mchbar:
intel_teardown_mchbar(dev_priv);
+ intel_uncore_fini_mmio(_priv->de_uncore);
+err_uncore:
intel_uncore_fini_mmio(_priv->uncore);
err_bridge:
pci_dev_put(dev_priv->bridge_dev);
@@ -1022,6 +1029,7 @@ static int i915_driver_init_mmio(struct
drm_i915_private *dev_priv)
static void i915_driver_cleanup_mmio(struct drm_i915_private *dev_priv)
{
intel_teardown_mchbar(dev_priv);
+ intel_uncore_fini_mmio(_priv->de_uncore);
intel_uncore_fini_mmio(_priv->uncore);
pci_dev_put(dev_priv->bridge_dev);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h
b/drivers/gpu/drm/i915/i915_drv.h
index dc6b3e4af575..87dcc7addc53 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1398,6 +1398,7 @@ struct drm_i915_private {
resource_size_t stolen_usable_size; /* Total size minus
reserved ranges */
struct intel_uncore uncore;
+ struct intel_uncore de_uncore;
struct intel_uncore_mmio_debug mmio_debug;
atomic_t user_forcewake_count;
@@ -2013,7 +2014,10 @@ static inline struct drm_i915_private
*huc_to_i915(struct intel_huc *huc)
static inline struct drm_i915_private *uncore_to_i915(struct
intel_uncore *uncore)
{
- return container_of(uncore, struct drm_i915_private, uncore);
+ if (intel_uncore_is_display(uncore))
+ return container_of(uncore, struct drm_i915_private, de_uncore);
+ else
+ return container_of(uncore, struct drm_i915_private, uncore);
}
/* Simple iterator over all initialised engines */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index c460426b0562..64479a746f56 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -549,6 +549,9 @@ static void __intel_uncore_early_sanitize(struct
intel_uncore *uncore,
void intel_uncore_suspend(struct intel_uncore *uncore)
{
+ if (!intel_uncore_is_display(uncore))
+ return;
+
iosf_mbi_punit_acquire();
iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
>pmic_bus_access_nb);
@@ -560,6 +563,9 @@ void intel_uncore_resume_early(struct intel_uncore
*uncore)
{
unsigned int restore_forcewake;
+ if
Re: [Intel-gfx] [PATCH 2/9] drm/i915/gtt: Use a common type for page directories
Quoting Chris Wilson (2019-06-11 20:41:59)
> Quoting Mika Kuoppala (2019-06-11 18:27:24)
> > struct i915_page_table {
> > struct i915_page_dma base;
> > - atomic_t used_ptes;
> > + atomic_t used;
> > };
> >
> > struct i915_page_directory {
> > struct i915_page_dma base;
> > -
> > - struct i915_page_table *page_table[I915_PDES]; /* PDEs */
> > - atomic_t used_pdes;
> > - spinlock_t lock;
> > -};
> > -
> > -struct i915_page_directory_pointer {
> > - struct i915_page_dma base;
> > - struct i915_page_directory **page_directory;
> > - atomic_t used_pdpes;
> > - spinlock_t lock;
> > -};
> > -
> > -struct i915_pml4 {
> > - struct i915_page_dma base;
> > - struct i915_page_directory_pointer *pdps[GEN8_PML4ES_PER_PML4];
> > + atomic_t used;
> > spinlock_t lock;
> > + void *entry[0];
> > };
>
> And always (albeit with a single bsw discrepancy) 512. At the very least
> you can alias a fixed sized variant over the top to remove the extra
> pointer chasing you added.
I would float your make bsw behave identically patch. In the grand
scheme of things, no one will ever notice that bsw alone saved a couple
of pages per GTT.
-Chris
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Re: [Intel-gfx] [PATCH 8/9] drm/i915/gtt: Make swapping the pd entry generic
Quoting Mika Kuoppala (2019-06-11 18:27:30)
> Swapping a pd entry is same across the page directories, if
> we succeed we need to increment the count and write the phys page
> entry. Make a common function for it.
>
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 41 +++--
> 1 file changed, 27 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index f1d7874834e2..9b0d0a077e31 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -752,6 +752,27 @@ static void __set_pd_entry(struct i915_page_directory *
> const pd,
>gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
> })
>
> +static void *__swap_pd_entry(struct i915_page_directory * const pd,
> +const unsigned short pde,
> +void * const old_val,
> +void * const new_val,
> +const u64 encoded_entry)
Mark this as inline and pass in the encode function, the compiler should
do the rest.
> +{
> + void * const old = cmpxchg(>entry[pde], old_val, new_val);
> +
> + if (likely(old == old_val)) {
> + atomic_inc(>used);
Hmm, looking at this again, this would be safer if atomic_inc was before
the cmpxchg, with an atomic_dec on the fail path.
> + if (likely(pd_has_phys_page(pd)))
> + __set_pd_entry(pd, pde, encoded_entry);
> + }
> +
> + return old;
> +}
-Chris
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Re: [Intel-gfx] [PATCH 3/9] drm/i915/gtt: Introduce init_pd_with_page
Quoting Mika Kuoppala (2019-06-11 18:27:25)
> We set the page directory entries to point into a page table.
> There is no gen specifics in here so make it simple and
> obvious.
>
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 16
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 9a1f956a817a..9d87f0fb5b16 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -724,12 +724,12 @@ static void free_pd(struct i915_address_space *vm,
> kfree(pd);
> }
>
> -static void gen8_initialize_pd(struct i915_address_space *vm,
> - struct i915_page_directory *pd)
> +static void init_pd_with_page(struct i915_address_space *vm,
> + struct i915_page_directory * const pd,
> + struct i915_page_table *pt)
> {
> - fill_px(vm, pd,
> - gen8_pde_encode(px_dma(vm->scratch_pt), I915_CACHE_LLC));
> - memset_p(pd->entry, vm->scratch_pt, I915_PDES);
> + fill_px(vm, pd, gen8_pde_encode(px_dma(pt), I915_CACHE_LLC));
Ahem, the scratch_pte value is known apriori and doesn't need
recomputing?
-Chris
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Re: [Intel-gfx] [PATCH 2/9] drm/i915/gtt: Use a common type for page directories
Quoting Mika Kuoppala (2019-06-11 18:27:24)
> All page directories are identical in function, only the position in the
> hierarchy differ. Use same base type for directory functionality.
>
> Cc: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Matthew Auld
> Cc: Abdiel Janulgue
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 2 +-
> drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 2 +-
> drivers/gpu/drm/i915/gvt/scheduler.c| 30 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 349 ++--
> drivers/gpu/drm/i915/i915_gem_gtt.h | 64 ++--
> 6 files changed, 234 insertions(+), 215 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index c86ca9f21532..dbab0ab1cef1 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1038,7 +1038,7 @@ static int emit_ppgtt_update(struct i915_request *rq,
> void *data)
>
> if (i915_vm_is_4lvl(vm)) {
> struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
> - const dma_addr_t pd_daddr = px_dma(>pml4);
> + const dma_addr_t pd_daddr = px_dma(ppgtt->pd);
>
> cs = intel_ring_begin(rq, 6);
> if (IS_ERR(cs))
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
> b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
> index 5ef932d810a7..6bf34738b4e5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
> @@ -55,7 +55,7 @@
>
> #define ASSIGN_CTX_PML4(ppgtt, reg_state) do { \
> u32 *reg_state__ = (reg_state); \
> - const u64 addr__ = px_dma(>pml4); \
> + const u64 addr__ = px_dma(ppgtt->pd); \
> (reg_state__)[CTX_PDP0_UDW + 1] = upper_32_bits(addr__); \
> (reg_state__)[CTX_PDP0_LDW + 1] = lower_32_bits(addr__); \
> } while (0)
> diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> index c834d016c965..3b857994943c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
> @@ -1523,7 +1523,7 @@ static int load_pd_dir(struct i915_request *rq, const
> struct i915_ppgtt *ppgtt)
>
> *cs++ = MI_LOAD_REGISTER_IMM(1);
> *cs++ = i915_mmio_reg_offset(RING_PP_DIR_BASE(engine->mmio_base));
> - *cs++ = ppgtt->pd.base.ggtt_offset << 10;
> + *cs++ = ppgtt->pd->base.ggtt_offset << 10;
>
> intel_ring_advance(rq, cs);
>
> diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c
> b/drivers/gpu/drm/i915/gvt/scheduler.c
> index e301efb18d45..f1e1261ac3db 100644
> --- a/drivers/gpu/drm/i915/gvt/scheduler.c
> +++ b/drivers/gpu/drm/i915/gvt/scheduler.c
> @@ -375,11 +375,13 @@ static int set_context_ppgtt_from_shadow(struct
> intel_vgpu_workload *workload,
> return -EINVAL;
>
> if (mm->ppgtt_mm.root_entry_type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY) {
> - px_dma(>pml4) = mm->ppgtt_mm.shadow_pdps[0];
> + px_dma(ppgtt->pd) = mm->ppgtt_mm.shadow_pdps[0];
> } else {
> for (i = 0; i < GVT_RING_CTX_NR_PDPS; i++) {
> - px_dma(ppgtt->pdp.page_directory[i]) =
> - mm->ppgtt_mm.shadow_pdps[i];
> + struct i915_page_directory * const pd =
> + i915_pd_entry(ppgtt->pd, i);
> +
> + px_dma(pd) = mm->ppgtt_mm.shadow_pdps[i];
> }
> }
>
> @@ -1128,11 +1130,14 @@ i915_context_ppgtt_root_restore(struct
> intel_vgpu_submission *s,
> int i;
>
> if (i915_vm_is_4lvl(>vm)) {
> - px_dma(>pml4) = s->i915_context_pml4;
> + px_dma(ppgtt->pd) = s->i915_context_pml4;
> } else {
> - for (i = 0; i < GEN8_3LVL_PDPES; i++)
> - px_dma(ppgtt->pdp.page_directory[i]) =
> - s->i915_context_pdps[i];
> + for (i = 0; i < GEN8_3LVL_PDPES; i++) {
> + struct i915_page_directory * const pd =
> + i915_pd_entry(ppgtt->pd, i);
> +
> + px_dma(pd) = s->i915_context_pdps[i];
> + }
> }
> }
>
> @@ -1186,11 +1191,14 @@ i915_context_ppgtt_root_save(struct
> intel_vgpu_submission *s,
> int i;
>
> if (i915_vm_is_4lvl(>vm)) {
> - s->i915_context_pml4 = px_dma(>pml4);
> + s->i915_context_pml4 = px_dma(ppgtt->pd);
> } else {
> - for (i = 0; i < GEN8_3LVL_PDPES; i++)
> - s->i915_context_pdps[i] =
> - px_dma(ppgtt->pdp.page_directory[i]);
> + for (i = 0; i < GEN8_3LVL_PDPES; i++) {
> + struct
[Intel-gfx] ✓ Fi.CI.IGT: success for Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs"
== Series Details == Series: Revert "drm/i915/icl: More workaround for port F detection due to broken VBTs" URL : https://patchwork.freedesktop.org/series/61846/ State : success == Summary == CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13225_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13225_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_engines@execute-one: - shard-snb: [PASS][1] -> [DMESG-WARN][2] ([fdo#110869]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-snb4/igt@gem_ctx_engi...@execute-one.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-snb5/igt@gem_ctx_engi...@execute-one.html * igt@kms_cursor_edge_walk@pipe-c-256x256-top-edge: - shard-kbl: [PASS][3] -> [FAIL][4] ([fdo#104671]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-kbl7/igt@kms_cursor_edge_w...@pipe-c-256x256-top-edge.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-kbl1/igt@kms_cursor_edge_w...@pipe-c-256x256-top-edge.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][5] -> [FAIL][6] ([fdo#105363]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl9/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-skl7/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-apl1/igt@kms_f...@flip-vs-suspend-interruptible.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-apl6/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb4/igt@kms_frontbuffer_track...@fbc-1p-pri-indfb-multidraw.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-iclb4/igt@kms_frontbuffer_track...@fbc-1p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu: - shard-hsw: [PASS][11] -> [SKIP][12] ([fdo#109271]) +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-hsw4/igt@kms_frontbuffer_track...@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-hsw2/igt@kms_frontbuffer_track...@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145] / [fdo#110403]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl5/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-skl6/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#108145]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl1/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-skl8/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103166]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-x.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-x.html * igt@kms_setmode@basic: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#99912]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl7/igt@kms_setm...@basic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-skl2/igt@kms_setm...@basic.html Possible fixes * igt@gem_ctx_engines@execute-one: - shard-skl: [DMESG-WARN][21] ([fdo#110869]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl4/igt@gem_ctx_engi...@execute-one.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13225/shard-skl4/igt@gem_ctx_engi...@execute-one.html * igt@i915_suspend@sysfs-reader: - shard-apl: [DMESG-WARN][23] ([fdo#108566]) -> [PASS][24] +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-apl1/igt@i915_susp...@sysfs-reader.html [24]:
Re: [Intel-gfx] [PATCH 2/9] drm/i915/gtt: Use a common type for page directories
Quoting Mika Kuoppala (2019-06-11 18:27:24)
> struct i915_page_table {
> struct i915_page_dma base;
> - atomic_t used_ptes;
> + atomic_t used;
> };
>
> struct i915_page_directory {
> struct i915_page_dma base;
> -
> - struct i915_page_table *page_table[I915_PDES]; /* PDEs */
> - atomic_t used_pdes;
> - spinlock_t lock;
> -};
> -
> -struct i915_page_directory_pointer {
> - struct i915_page_dma base;
> - struct i915_page_directory **page_directory;
> - atomic_t used_pdpes;
> - spinlock_t lock;
> -};
> -
> -struct i915_pml4 {
> - struct i915_page_dma base;
> - struct i915_page_directory_pointer *pdps[GEN8_PML4ES_PER_PML4];
> + atomic_t used;
> spinlock_t lock;
> + void *entry[0];
> };
And always (albeit with a single bsw discrepancy) 512. At the very least
you can alias a fixed sized variant over the top to remove the extra
pointer chasing you added.
-Chris
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Re: [Intel-gfx] [PATCH 1/9] drm/i915/gtt: No need to zero the table for page dirs
Quoting Mika Kuoppala (2019-06-11 18:27:23)
> We set them to scratch right after allocation so prevent
> useless zeroing before.
>
> v2: atomic_t
>
> Cc: Chris Wilson
> Signed-off-by: Mika Kuoppala
> Reviewed-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index e70675bfb51d..07f86d474fa2 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -687,7 +687,7 @@ static struct i915_page_directory *alloc_pd(struct
> i915_address_space *vm)
> {
> struct i915_page_directory *pd;
>
> - pd = kzalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
> + pd = kmalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
> if (unlikely(!pd))
> return ERR_PTR(-ENOMEM);
>
> @@ -747,7 +747,7 @@ alloc_pdp(struct i915_address_space *vm)
>
> GEM_BUG_ON(!i915_vm_is_4lvl(vm));
>
> - pdp = kzalloc(sizeof(*pdp), GFP_KERNEL);
> + pdp = kmalloc(sizeof(*pdp), GFP_KERNEL);
While you are here, this too can be I915_GFP_ALLOW_FAIL
> if (!pdp)
> return ERR_PTR(-ENOMEM);
Because we immediately propagate the error and can gracefully handle
failures.
-Chris
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Do not touch the PCH SSC reference if a PLL is using it (rev2)
== Series Details == Series: series starting with [1/5] drm/i915: Do not touch the PCH SSC reference if a PLL is using it (rev2) URL : https://patchwork.freedesktop.org/series/61608/ State : success == Summary == CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13224_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13224_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_engines@execute-one: - shard-snb: [PASS][1] -> [DMESG-WARN][2] ([fdo#110869]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-snb4/igt@gem_ctx_engi...@execute-one.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-snb5/igt@gem_ctx_engi...@execute-one.html * igt@gem_pwrite@big-gtt-forwards: - shard-iclb: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / [fdo#109100]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb6/igt@gem_pwr...@big-gtt-forwards.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-iclb7/igt@gem_pwr...@big-gtt-forwards.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-kbl1/igt@gem_workarou...@suspend-resume-fd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-kbl6/igt@gem_workarou...@suspend-resume-fd.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [PASS][7] -> [FAIL][8] ([fdo#104873]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-glk4/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-glk2/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset: - shard-hsw: [PASS][9] -> [SKIP][10] ([fdo#109271]) +15 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-hsw4/igt@kms_f...@2x-flip-vs-dpms-off-vs-modeset.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-hsw1/igt@kms_f...@2x-flip-vs-dpms-off-vs-modeset.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt: - shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb6/igt@kms_frontbuffer_track...@fbc-1p-primscrn-shrfb-msflip-blt.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-primscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-apl1/igt@kms_frontbuffer_track...@fbc-suspend.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-apl3/igt@kms_frontbuffer_track...@fbc-suspend.html * igt@kms_plane@pixel-format-pipe-a-planes: - shard-iclb: [PASS][15] -> [INCOMPLETE][16] ([fdo#107713] / [fdo#110036 ]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb3/igt@kms_pl...@pixel-format-pipe-a-planes.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-iclb7/igt@kms_pl...@pixel-format-pipe-a-planes.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145] / [fdo#110403]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl5/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-skl5/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl1/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-skl1/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#108341]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-iclb5/igt@kms_psr@no_drrs.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_setmode@basic: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#99912]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6227/shard-skl7/igt@kms_setm...@basic.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13224/shard-skl2/igt@kms_setm...@basic.html - shard-kbl: [PASS][25] -> [FAIL][26]
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915/gtt: No need to zero the table for page dirs
== Series Details ==
Series: series starting with [1/9] drm/i915/gtt: No need to zero the table for
page dirs
URL : https://patchwork.freedesktop.org/series/61914/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6240 -> Patchwork_13246
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/
Known issues
Here are the changes found in Patchwork_13246 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-skl-6600u: [PASS][1] -> [FAIL][2] ([fdo#107707])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/fi-skl-6600u/igt@i915_pm_...@basic-pci-d3-state.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/fi-skl-6600u/igt@i915_pm_...@basic-pci-d3-state.html
* igt@kms_addfb_basic@unused-modifier:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +1
similar issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/fi-icl-u3/igt@kms_addfb_ba...@unused-modifier.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/fi-icl-u3/igt@kms_addfb_ba...@unused-modifier.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#109485])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [PASS][7] -> [DMESG-WARN][8] ([fdo#102614])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
Possible fixes
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6240/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#107707]: https://bugs.freedesktop.org/show_bug.cgi?id=107707
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
Participating hosts (52 -> 47)
--
Additional (2): fi-byt-j1900 fi-gdg-551
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6240 -> Patchwork_13246
CI_DRM_6240: 6912995f6dd977863a049005b01c6f197ae9cbdc @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5051: 1f2acef836ffcbf5113df4ade8b587935c7d5868 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13246: 393d891d4aec953670d456c9a2336a591274cbba @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
393d891d4aec drm/i915/gtt: Tear down setup and cleanup macros for page dma
08e4c78a9b99 drm/i915/gtt: Make swapping the pd entry generic
0a1e3ad99009 drm/i915/gtt: Check for physical page for pd entry always
72426989ea08 drm/i915/gtt: pde entry encoding is identical
2e057ea8402b drm/i915/gtt: Generalize alloc_pd
c8ec1761dc80 drm/i915/gtt: Introduce init_pd
cfdf6893e733 drm/i915/gtt: Introduce init_pd_with_page
456a07424854 drm/i915/gtt: Use a common type for page directories
84806e55a140 drm/i915/gtt: No need to zero the table for page dirs
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13246/
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Re: [Intel-gfx] [PATCH 3/4] drm/fb-helper: Set up gamma_lut during restore_fbdev_mode_atomic()
On Tue, Jun 11, 2019 at 07:55:45PM +0200, Daniel Vetter wrote:
> On Tue, Jun 11, 2019 at 7:50 PM Ville Syrjälä
> wrote:
> >
> > On Fri, Jun 07, 2019 at 08:40:15PM +0200, Daniel Vetter wrote:
> > > On Fri, Jun 07, 2019 at 07:26:10PM +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
> > > >
> > > > i915 will now refuse to enable a C8 plane unless the gamma_lut
> > > > is already enabled (to avoid scanning out whatever garbage got
> > > > left in the hw LUT previously). So in order to make the fbdev
> > > > code work with C8 we need to program the gamma_lut already
> > > > during restore_fbdev_mode_atomic().
> > > >
> > > > To avoid having to update the hw LUT every time
> > > > restore_fbdev_mode_atomic() is called we hang on to the
> > > > current gamma_lut blob. Note that the first crtc to get
> > > > enabled will dictate the size of the gamma_lut, so this
> > > > approach isn't 100% great for hardware with non-uniform
> > > > crtcs. But that problem already exists in setcmap_atomic()
> > > > so we'll just keep ignoring it.
> > > >
> > > > Signed-off-by: Ville Syrjälä
> > > > ---
> > > > drivers/gpu/drm/drm_fb_helper.c | 165
> > > > include/drm/drm_fb_helper.h | 7 ++
> > > > 2 files changed, 113 insertions(+), 59 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/drm_fb_helper.c
> > > > b/drivers/gpu/drm/drm_fb_helper.c
> > > > index bdfa14cd7f6d..0ecec763789f 100644
> > > > --- a/drivers/gpu/drm/drm_fb_helper.c
> > > > +++ b/drivers/gpu/drm/drm_fb_helper.c
> > > > @@ -436,10 +436,76 @@ static bool drm_fb_helper_panel_rotation(struct
> > > > drm_mode_set *modeset,
> > > > return true;
> > > > }
> > > >
> > > > +static int setcmap_crtc_atomic(struct drm_atomic_state *state,
> > > > + struct drm_crtc *crtc,
> > > > + struct drm_property_blob *gamma_lut)
> > > > +{
> > > > + struct drm_crtc_state *crtc_state;
> > > > + bool replaced;
> > > > +
> > > > + crtc_state = drm_atomic_get_crtc_state(state, crtc);
> > > > + if (IS_ERR(crtc_state))
> > > > + return PTR_ERR(crtc_state);
> > > > +
> > > > + replaced = drm_property_replace_blob(_state->degamma_lut,
> > > > + NULL);
> > > > + replaced |= drm_property_replace_blob(_state->ctm, NULL);
> > > > + replaced |= drm_property_replace_blob(_state->gamma_lut,
> > > > + gamma_lut);
> > > > + crtc_state->color_mgmt_changed |= replaced;
> > > > +
> > > > + return 0;
> > > > +}
> > > > +
> > > > +static struct drm_property_blob *setcmap_new_gamma_lut(struct drm_crtc
> > > > *crtc,
> > > > + struct fb_cmap *cmap)
> > > > +{
> > > > + struct drm_device *dev = crtc->dev;
> > > > + struct drm_property_blob *gamma_lut;
> > > > + struct drm_color_lut *lut;
> > > > + int size = crtc->gamma_size;
> > > > + int i;
> > > > +
> > > > + if (!size || cmap->start + cmap->len > size)
> > > > + return ERR_PTR(-EINVAL);
> > > > +
> > > > + gamma_lut = drm_property_create_blob(dev, sizeof(*lut) * size,
> > > > NULL);
> > > > + if (IS_ERR(gamma_lut))
> > > > + return gamma_lut;
> > > > +
> > > > + lut = gamma_lut->data;
> > > > + if (cmap->start || cmap->len != size) {
> > > > + u16 *r = crtc->gamma_store;
> > > > + u16 *g = r + crtc->gamma_size;
> > > > + u16 *b = g + crtc->gamma_size;
> > > > +
> > > > + for (i = 0; i < cmap->start; i++) {
> > > > + lut[i].red = r[i];
> > > > + lut[i].green = g[i];
> > > > + lut[i].blue = b[i];
> > > > + }
> > > > + for (i = cmap->start + cmap->len; i < size; i++) {
> > > > + lut[i].red = r[i];
> > > > + lut[i].green = g[i];
> > > > + lut[i].blue = b[i];
> > > > + }
> > > > + }
> > > > +
> > > > + for (i = 0; i < cmap->len; i++) {
> > > > + lut[cmap->start + i].red = cmap->red[i];
> > > > + lut[cmap->start + i].green = cmap->green[i];
> > > > + lut[cmap->start + i].blue = cmap->blue[i];
> > > > + }
> > > > +
> > > > + return gamma_lut;
> > > > +}
> > > > +
> > > > static int restore_fbdev_mode_atomic(struct drm_fb_helper *fb_helper,
> > > > bool active)
> > > > {
> > > > + struct fb_info *info = fb_helper->fbdev;
> > > > struct drm_client_dev *client = _helper->client;
> > > > struct drm_device *dev = fb_helper->dev;
> > > > + struct drm_property_blob *gamma_lut;
> > > > struct drm_plane_state *plane_state;
> > > > struct drm_plane *plane;
> > > > struct drm_atomic_state *state;
> > > > @@ -455,6 +521,10 @@ static int restore_fbdev_mode_atomic(struct
> > > > drm_fb_helper *fb_helper, bool activ
> > > > goto out_ctx;
> > > > }
> > > >
> > > > + gamma_lut = fb_helper->gamma_lut;
> > > > +
Re: [Intel-gfx] [PATCH v5 04/11] drm: Convert connector_helper_funcs->atomic_check to accept drm_atomic_state
Hi Sean,
Thank you for the patch.
On Tue, Jun 11, 2019 at 12:08:18PM -0400, Sean Paul wrote:
> From: Sean Paul
>
> Everyone who implements connector_helper_funcs->atomic_check reaches
> into the connector state to get the atomic state. Instead of continuing
> this pattern, change the callback signature to just give atomic state
> and let the driver determine what it does and does not need from it.
>
> Eventually all atomic functions should do this, but that's just too much
> busy work for me.
>
> Changes in v3:
> - Added to the set
> Changes in v4:
> - None
> Changes in v5:
> - intel_digital_connector_atomic_check declaration moved to i915_atomic.h
>
> Link to v3:
> https://patchwork.freedesktop.org/patch/msgid/20190502194956.218441-5-s...@poorly.run
> Link to v4:
> https://patchwork.freedesktop.org/patch/msgid/20190508160920.144739-5-s...@poorly.run
>
> Cc: Daniel Vetter
> Cc: Ville Syrjälä
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Cc: Rodrigo Vivi
> Cc: Ben Skeggs
> Cc: Laurent Pinchart
> Cc: Kieran Bingham
> Cc: Eric Anholt
> Tested-by: Heiko Stuebner
> Acked-by: Daniel Vetter
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/drm_atomic_helper.c | 4 ++--
> drivers/gpu/drm/i915/intel_atomic.c | 8 +---
> drivers/gpu/drm/i915/intel_atomic.h | 2 +-
> drivers/gpu/drm/i915/intel_dp_mst.c | 7 ---
> drivers/gpu/drm/i915/intel_sdvo.c| 9 +
> drivers/gpu/drm/i915/intel_tv.c | 8 +---
> drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 +++--
> drivers/gpu/drm/rcar-du/rcar_lvds.c | 12 +++-
For the R-Car LVDS driver,
Reviewed-by: Laurent Pinchart
> drivers/gpu/drm/vc4/vc4_txp.c| 7 ---
> include/drm/drm_modeset_helper_vtables.h | 2 +-
> 10 files changed, 37 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> b/drivers/gpu/drm/drm_atomic_helper.c
> index 2133f62539176..e58be69960692 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -686,7 +686,7 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
> }
>
> if (funcs->atomic_check)
> - ret = funcs->atomic_check(connector,
> new_connector_state);
> + ret = funcs->atomic_check(connector, state);
> if (ret)
> return ret;
>
> @@ -728,7 +728,7 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
> continue;
>
> if (funcs->atomic_check)
> - ret = funcs->atomic_check(connector,
> new_connector_state);
> + ret = funcs->atomic_check(connector, state);
> if (ret)
> return ret;
> }
> diff --git a/drivers/gpu/drm/i915/intel_atomic.c
> b/drivers/gpu/drm/i915/intel_atomic.c
> index 58b8049649a0f..ab40448a19d56 100644
> --- a/drivers/gpu/drm/i915/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/intel_atomic.c
> @@ -106,12 +106,14 @@ int intel_digital_connector_atomic_set_property(struct
> drm_connector *connector,
> }
>
> int intel_digital_connector_atomic_check(struct drm_connector *conn,
> - struct drm_connector_state *new_state)
> + struct drm_atomic_state *state)
> {
> + struct drm_connector_state *new_state =
> + drm_atomic_get_new_connector_state(state, conn);
> struct intel_digital_connector_state *new_conn_state =
> to_intel_digital_connector_state(new_state);
> struct drm_connector_state *old_state =
> - drm_atomic_get_old_connector_state(new_state->state, conn);
> + drm_atomic_get_old_connector_state(state, conn);
> struct intel_digital_connector_state *old_conn_state =
> to_intel_digital_connector_state(old_state);
> struct drm_crtc_state *crtc_state;
> @@ -121,7 +123,7 @@ int intel_digital_connector_atomic_check(struct
> drm_connector *conn,
> if (!new_state->crtc)
> return 0;
>
> - crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
> new_state->crtc);
> + crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
>
> /*
>* These properties are handled by fastset, and might not end
> diff --git a/drivers/gpu/drm/i915/intel_atomic.h
> b/drivers/gpu/drm/i915/intel_atomic.h
> index 1c8507da1a690..58065d3161a34 100644
> --- a/drivers/gpu/drm/i915/intel_atomic.h
> +++ b/drivers/gpu/drm/i915/intel_atomic.h
> @@ -28,7 +28,7 @@ int intel_digital_connector_atomic_set_property(struct
> drm_connector *connector,
> struct drm_property *property,
> u64 val);
> int intel_digital_connector_atomic_check(struct drm_connector *conn,
> - struct drm_connector_state *new_state);
> +
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/9] drm/i915/gtt: No need to zero the table for page dirs
== Series Details == Series: series starting with [1/9] drm/i915/gtt: No need to zero the table for page dirs URL : https://patchwork.freedesktop.org/series/61914/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/gtt: No need to zero the table for page dirs Okay! Commit: drm/i915/gtt: Use a common type for page directories -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1512:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1512:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1501:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1501:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1752:44: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1752:44: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1831:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1831:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1745:44: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1745:44: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1826:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1826:9: warning: expression using sizeof(void) -./include/linux/slab.h:666:13: error: undefined identifier '__builtin_mul_overflow' -./include/linux/slab.h:666:13: warning: call with no type! Commit: drm/i915/gtt: Introduce init_pd_with_page Okay! Commit: drm/i915/gtt: Introduce init_pd Okay! Commit: drm/i915/gtt: Generalize alloc_pd -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1487:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1487:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1468:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1468:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1562:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1562:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1542:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1542:9: warning: expression using sizeof(void) Commit: drm/i915/gtt: pde entry encoding is identical -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1542:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1542:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1511:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1511:9: warning: expression using sizeof(void) Commit: drm/i915/gtt: Check for physical page for pd entry always -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1511:9: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1511:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1505:9: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:1505:9: warning: expression using sizeof(void) Commit: drm/i915/gtt: Make swapping the pd entry generic Okay! Commit: drm/i915/gtt: Tear down setup and cleanup macros for page dma Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/4] drm/fb-helper: Set up gamma_lut during restore_fbdev_mode_atomic()
On Tue, Jun 11, 2019 at 7:50 PM Ville Syrjälä
wrote:
>
> On Fri, Jun 07, 2019 at 08:40:15PM +0200, Daniel Vetter wrote:
> > On Fri, Jun 07, 2019 at 07:26:10PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > i915 will now refuse to enable a C8 plane unless the gamma_lut
> > > is already enabled (to avoid scanning out whatever garbage got
> > > left in the hw LUT previously). So in order to make the fbdev
> > > code work with C8 we need to program the gamma_lut already
> > > during restore_fbdev_mode_atomic().
> > >
> > > To avoid having to update the hw LUT every time
> > > restore_fbdev_mode_atomic() is called we hang on to the
> > > current gamma_lut blob. Note that the first crtc to get
> > > enabled will dictate the size of the gamma_lut, so this
> > > approach isn't 100% great for hardware with non-uniform
> > > crtcs. But that problem already exists in setcmap_atomic()
> > > so we'll just keep ignoring it.
> > >
> > > Signed-off-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/drm_fb_helper.c | 165
> > > include/drm/drm_fb_helper.h | 7 ++
> > > 2 files changed, 113 insertions(+), 59 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/drm_fb_helper.c
> > > b/drivers/gpu/drm/drm_fb_helper.c
> > > index bdfa14cd7f6d..0ecec763789f 100644
> > > --- a/drivers/gpu/drm/drm_fb_helper.c
> > > +++ b/drivers/gpu/drm/drm_fb_helper.c
> > > @@ -436,10 +436,76 @@ static bool drm_fb_helper_panel_rotation(struct
> > > drm_mode_set *modeset,
> > > return true;
> > > }
> > >
> > > +static int setcmap_crtc_atomic(struct drm_atomic_state *state,
> > > + struct drm_crtc *crtc,
> > > + struct drm_property_blob *gamma_lut)
> > > +{
> > > + struct drm_crtc_state *crtc_state;
> > > + bool replaced;
> > > +
> > > + crtc_state = drm_atomic_get_crtc_state(state, crtc);
> > > + if (IS_ERR(crtc_state))
> > > + return PTR_ERR(crtc_state);
> > > +
> > > + replaced = drm_property_replace_blob(_state->degamma_lut,
> > > + NULL);
> > > + replaced |= drm_property_replace_blob(_state->ctm, NULL);
> > > + replaced |= drm_property_replace_blob(_state->gamma_lut,
> > > + gamma_lut);
> > > + crtc_state->color_mgmt_changed |= replaced;
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static struct drm_property_blob *setcmap_new_gamma_lut(struct drm_crtc
> > > *crtc,
> > > + struct fb_cmap *cmap)
> > > +{
> > > + struct drm_device *dev = crtc->dev;
> > > + struct drm_property_blob *gamma_lut;
> > > + struct drm_color_lut *lut;
> > > + int size = crtc->gamma_size;
> > > + int i;
> > > +
> > > + if (!size || cmap->start + cmap->len > size)
> > > + return ERR_PTR(-EINVAL);
> > > +
> > > + gamma_lut = drm_property_create_blob(dev, sizeof(*lut) * size, NULL);
> > > + if (IS_ERR(gamma_lut))
> > > + return gamma_lut;
> > > +
> > > + lut = gamma_lut->data;
> > > + if (cmap->start || cmap->len != size) {
> > > + u16 *r = crtc->gamma_store;
> > > + u16 *g = r + crtc->gamma_size;
> > > + u16 *b = g + crtc->gamma_size;
> > > +
> > > + for (i = 0; i < cmap->start; i++) {
> > > + lut[i].red = r[i];
> > > + lut[i].green = g[i];
> > > + lut[i].blue = b[i];
> > > + }
> > > + for (i = cmap->start + cmap->len; i < size; i++) {
> > > + lut[i].red = r[i];
> > > + lut[i].green = g[i];
> > > + lut[i].blue = b[i];
> > > + }
> > > + }
> > > +
> > > + for (i = 0; i < cmap->len; i++) {
> > > + lut[cmap->start + i].red = cmap->red[i];
> > > + lut[cmap->start + i].green = cmap->green[i];
> > > + lut[cmap->start + i].blue = cmap->blue[i];
> > > + }
> > > +
> > > + return gamma_lut;
> > > +}
> > > +
> > > static int restore_fbdev_mode_atomic(struct drm_fb_helper *fb_helper,
> > > bool active)
> > > {
> > > + struct fb_info *info = fb_helper->fbdev;
> > > struct drm_client_dev *client = _helper->client;
> > > struct drm_device *dev = fb_helper->dev;
> > > + struct drm_property_blob *gamma_lut;
> > > struct drm_plane_state *plane_state;
> > > struct drm_plane *plane;
> > > struct drm_atomic_state *state;
> > > @@ -455,6 +521,10 @@ static int restore_fbdev_mode_atomic(struct
> > > drm_fb_helper *fb_helper, bool activ
> > > goto out_ctx;
> > > }
> > >
> > > + gamma_lut = fb_helper->gamma_lut;
> > > + if (gamma_lut)
> > > + drm_property_blob_get(gamma_lut);
> >
> > Why the get/put stuff here?
>
> So we don't free this guy during the cleanup.
>
> >
> > > +
> > > state->acquire_ctx =
> > > retry:
> > > drm_for_each_plane(plane, dev) {
> > > @@ -476,7 +546,8 @@ static int
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/gtt: No need to zero the table for page dirs
== Series Details ==
Series: series starting with [1/9] drm/i915/gtt: No need to zero the table for
page dirs
URL : https://patchwork.freedesktop.org/series/61914/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
84806e55a140 drm/i915/gtt: No need to zero the table for page dirs
456a07424854 drm/i915/gtt: Use a common type for page directories
-:676: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#676: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1502:
gen8_for_each_pml4e(pdp, pml4, start, length, pml4e) {
+
total: 0 errors, 0 warnings, 1 checks, 1049 lines checked
cfdf6893e733 drm/i915/gtt: Introduce init_pd_with_page
c8ec1761dc80 drm/i915/gtt: Introduce init_pd
2e057ea8402b drm/i915/gtt: Generalize alloc_pd
72426989ea08 drm/i915/gtt: pde entry encoding is identical
-:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pd' - possible side-effects?
#53: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:731:
+#define init_pd(vm, pd, to) { \
+ GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd));\
+ fill_px((vm), (pd), gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \
+ memset_p((pd)->entry, (to), 512); \
}
-:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects?
#53: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:731:
+#define init_pd(vm, pd, to) { \
+ GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd));\
+ fill_px((vm), (pd), gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \
+ memset_p((pd)->entry, (to), 512); \
}
-:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pd' - possible side-effects?
#76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:748:
+#define set_pd_entry(pd, pde, to) ({ \
+ (pd)->entry[(pde)] = (to); \
+ __set_pd_entry((pd), (pde), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
+})
-:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pde' - possible side-effects?
#76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:748:
+#define set_pd_entry(pd, pde, to) ({ \
+ (pd)->entry[(pde)] = (to); \
+ __set_pd_entry((pd), (pde), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
+})
-:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects?
#76: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:748:
+#define set_pd_entry(pd, pde, to) ({ \
+ (pd)->entry[(pde)] = (to); \
+ __set_pd_entry((pd), (pde), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
+})
-:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pdp' - possible side-effects?
#82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:754:
+#define set_pdp_entry(pdp, pdpe, to) ({\
+ (pdp)->entry[(pdpe)] = (to);\
+ if (pd_has_phys_page(pdp)) \
+ __set_pd_entry((pdp), (pdpe), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
+})
-:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pdpe' - possible
side-effects?
#82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:754:
+#define set_pdp_entry(pdp, pdpe, to) ({\
+ (pdp)->entry[(pdpe)] = (to);\
+ if (pd_has_phys_page(pdp)) \
+ __set_pd_entry((pdp), (pdpe), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
+})
-:82: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects?
#82: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:754:
+#define set_pdp_entry(pdp, pdpe, to) ({\
+ (pdp)->entry[(pdpe)] = (to);\
+ if (pd_has_phys_page(pdp)) \
+ __set_pd_entry((pdp), (pdpe), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
+})
total: 0 errors, 0 warnings, 8 checks, 232 lines checked
0a1e3ad99009 drm/i915/gtt: Check for physical page for pd entry always
08e4c78a9b99 drm/i915/gtt: Make swapping the pd entry generic
-:37: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'to' - possible side-effects?
#37: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:772:
+#define swap_pd_entry(pd, pde, old, to) \
+ __swap_pd_entry((pd), (pde), (old), (to), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC))
total: 0 errors, 0 warnings, 1 checks, 65 lines checked
393d891d4aec drm/i915/gtt: Tear down setup and cleanup macros for page dma
Re: [Intel-gfx] [PATCH 4/4] drm/i915: Throw away the BIOS fb if has the wrong depth/bpp
On Fri, Jun 07, 2019 at 08:43:56PM +0200, Daniel Vetter wrote:
> On Fri, Jun 07, 2019 at 07:26:11PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Respect the user's choice of depth/bpp for the fbdev framebuffer
> > and throw out the fb we inherited from the BIOS if it doesn't
> > match.
> >
> > Signed-off-by: Ville Syrjälä
>
> I guess we're going boom right now, which is maybe a bit much? i.e.
> Cc: sta...@vger.kernel.org
I think currently it just ignores whatever the user said.
I didn't see any explosions.
>
> Reviewed-by: Daniel Vetter
>
> > ---
> > drivers/gpu/drm/i915/intel_fbdev.c | 11 +++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
> > b/drivers/gpu/drm/i915/intel_fbdev.c
> > index 0d3a6fa674e6..1a935dc74d23 100644
> > --- a/drivers/gpu/drm/i915/intel_fbdev.c
> > +++ b/drivers/gpu/drm/i915/intel_fbdev.c
> > @@ -199,6 +199,17 @@ static int intelfb_create(struct drm_fb_helper *helper,
> > drm_framebuffer_put(_fb->base);
> > intel_fb = ifbdev->fb = NULL;
> > }
> > + if (intel_fb &&
> > + (sizes->surface_depth != intel_fb->base.format->depth ||
> > +sizes->surface_bpp != intel_fb->base.format->cpp[0] * 8)) {
>
> Bikeshed: A little helper that does all these checks with debug output,
> and just one "throw bios fb away" path would look a lot neater.
> -Daniel
>
> > + DRM_DEBUG_KMS("BIOS fb using wrong depth/bpp (%d/%d), we
> > require (%d/%d),"
> > + " releasing it\n",
> > + intel_fb->base.format->depth,
> > + intel_fb->base.format->cpp[0] * 8,
> > + sizes->surface_depth, sizes->surface_bpp);
> > + drm_framebuffer_put(_fb->base);
> > + intel_fb = ifbdev->fb = NULL;
> > + }
> > if (!intel_fb || WARN_ON(!intel_fb_obj(_fb->base))) {
> > DRM_DEBUG_KMS("no BIOS fb, allocating a new one\n");
> > ret = intelfb_alloc(helper, sizes);
> > --
> > 2.21.0
> >
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 3/4] drm/fb-helper: Set up gamma_lut during restore_fbdev_mode_atomic()
On Fri, Jun 07, 2019 at 08:40:15PM +0200, Daniel Vetter wrote:
> On Fri, Jun 07, 2019 at 07:26:10PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > i915 will now refuse to enable a C8 plane unless the gamma_lut
> > is already enabled (to avoid scanning out whatever garbage got
> > left in the hw LUT previously). So in order to make the fbdev
> > code work with C8 we need to program the gamma_lut already
> > during restore_fbdev_mode_atomic().
> >
> > To avoid having to update the hw LUT every time
> > restore_fbdev_mode_atomic() is called we hang on to the
> > current gamma_lut blob. Note that the first crtc to get
> > enabled will dictate the size of the gamma_lut, so this
> > approach isn't 100% great for hardware with non-uniform
> > crtcs. But that problem already exists in setcmap_atomic()
> > so we'll just keep ignoring it.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/drm_fb_helper.c | 165
> > include/drm/drm_fb_helper.h | 7 ++
> > 2 files changed, 113 insertions(+), 59 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_fb_helper.c
> > b/drivers/gpu/drm/drm_fb_helper.c
> > index bdfa14cd7f6d..0ecec763789f 100644
> > --- a/drivers/gpu/drm/drm_fb_helper.c
> > +++ b/drivers/gpu/drm/drm_fb_helper.c
> > @@ -436,10 +436,76 @@ static bool drm_fb_helper_panel_rotation(struct
> > drm_mode_set *modeset,
> > return true;
> > }
> >
> > +static int setcmap_crtc_atomic(struct drm_atomic_state *state,
> > + struct drm_crtc *crtc,
> > + struct drm_property_blob *gamma_lut)
> > +{
> > + struct drm_crtc_state *crtc_state;
> > + bool replaced;
> > +
> > + crtc_state = drm_atomic_get_crtc_state(state, crtc);
> > + if (IS_ERR(crtc_state))
> > + return PTR_ERR(crtc_state);
> > +
> > + replaced = drm_property_replace_blob(_state->degamma_lut,
> > + NULL);
> > + replaced |= drm_property_replace_blob(_state->ctm, NULL);
> > + replaced |= drm_property_replace_blob(_state->gamma_lut,
> > + gamma_lut);
> > + crtc_state->color_mgmt_changed |= replaced;
> > +
> > + return 0;
> > +}
> > +
> > +static struct drm_property_blob *setcmap_new_gamma_lut(struct drm_crtc
> > *crtc,
> > + struct fb_cmap *cmap)
> > +{
> > + struct drm_device *dev = crtc->dev;
> > + struct drm_property_blob *gamma_lut;
> > + struct drm_color_lut *lut;
> > + int size = crtc->gamma_size;
> > + int i;
> > +
> > + if (!size || cmap->start + cmap->len > size)
> > + return ERR_PTR(-EINVAL);
> > +
> > + gamma_lut = drm_property_create_blob(dev, sizeof(*lut) * size, NULL);
> > + if (IS_ERR(gamma_lut))
> > + return gamma_lut;
> > +
> > + lut = gamma_lut->data;
> > + if (cmap->start || cmap->len != size) {
> > + u16 *r = crtc->gamma_store;
> > + u16 *g = r + crtc->gamma_size;
> > + u16 *b = g + crtc->gamma_size;
> > +
> > + for (i = 0; i < cmap->start; i++) {
> > + lut[i].red = r[i];
> > + lut[i].green = g[i];
> > + lut[i].blue = b[i];
> > + }
> > + for (i = cmap->start + cmap->len; i < size; i++) {
> > + lut[i].red = r[i];
> > + lut[i].green = g[i];
> > + lut[i].blue = b[i];
> > + }
> > + }
> > +
> > + for (i = 0; i < cmap->len; i++) {
> > + lut[cmap->start + i].red = cmap->red[i];
> > + lut[cmap->start + i].green = cmap->green[i];
> > + lut[cmap->start + i].blue = cmap->blue[i];
> > + }
> > +
> > + return gamma_lut;
> > +}
> > +
> > static int restore_fbdev_mode_atomic(struct drm_fb_helper *fb_helper, bool
> > active)
> > {
> > + struct fb_info *info = fb_helper->fbdev;
> > struct drm_client_dev *client = _helper->client;
> > struct drm_device *dev = fb_helper->dev;
> > + struct drm_property_blob *gamma_lut;
> > struct drm_plane_state *plane_state;
> > struct drm_plane *plane;
> > struct drm_atomic_state *state;
> > @@ -455,6 +521,10 @@ static int restore_fbdev_mode_atomic(struct
> > drm_fb_helper *fb_helper, bool activ
> > goto out_ctx;
> > }
> >
> > + gamma_lut = fb_helper->gamma_lut;
> > + if (gamma_lut)
> > + drm_property_blob_get(gamma_lut);
>
> Why the get/put stuff here?
So we don't free this guy during the cleanup.
>
> > +
> > state->acquire_ctx =
> > retry:
> > drm_for_each_plane(plane, dev) {
> > @@ -476,7 +546,8 @@ static int restore_fbdev_mode_atomic(struct
> > drm_fb_helper *fb_helper, bool activ
> > }
> >
> > drm_client_for_each_modeset(mode_set, client) {
> > - struct drm_plane *primary = mode_set->crtc->primary;
> > + struct drm_crtc *crtc = mode_set->crtc;
> > + struct drm_plane *primary =
[Intel-gfx] [PATCH 2/9] drm/i915/gtt: Use a common type for page directories
All page directories are identical in function, only the position in the
hierarchy differ. Use same base type for directory functionality.
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matthew Auld
Cc: Abdiel Janulgue
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 2 +-
drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 2 +-
drivers/gpu/drm/i915/gvt/scheduler.c| 30 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 349 ++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 64 ++--
6 files changed, 234 insertions(+), 215 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index c86ca9f21532..dbab0ab1cef1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1038,7 +1038,7 @@ static int emit_ppgtt_update(struct i915_request *rq,
void *data)
if (i915_vm_is_4lvl(vm)) {
struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
- const dma_addr_t pd_daddr = px_dma(>pml4);
+ const dma_addr_t pd_daddr = px_dma(ppgtt->pd);
cs = intel_ring_begin(rq, 6);
if (IS_ERR(cs))
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
index 5ef932d810a7..6bf34738b4e5 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
+++ b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
@@ -55,7 +55,7 @@
#define ASSIGN_CTX_PML4(ppgtt, reg_state) do { \
u32 *reg_state__ = (reg_state); \
- const u64 addr__ = px_dma(>pml4); \
+ const u64 addr__ = px_dma(ppgtt->pd); \
(reg_state__)[CTX_PDP0_UDW + 1] = upper_32_bits(addr__); \
(reg_state__)[CTX_PDP0_LDW + 1] = lower_32_bits(addr__); \
} while (0)
diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
index c834d016c965..3b857994943c 100644
--- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
@@ -1523,7 +1523,7 @@ static int load_pd_dir(struct i915_request *rq, const
struct i915_ppgtt *ppgtt)
*cs++ = MI_LOAD_REGISTER_IMM(1);
*cs++ = i915_mmio_reg_offset(RING_PP_DIR_BASE(engine->mmio_base));
- *cs++ = ppgtt->pd.base.ggtt_offset << 10;
+ *cs++ = ppgtt->pd->base.ggtt_offset << 10;
intel_ring_advance(rq, cs);
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c
b/drivers/gpu/drm/i915/gvt/scheduler.c
index e301efb18d45..f1e1261ac3db 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -375,11 +375,13 @@ static int set_context_ppgtt_from_shadow(struct
intel_vgpu_workload *workload,
return -EINVAL;
if (mm->ppgtt_mm.root_entry_type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY) {
- px_dma(>pml4) = mm->ppgtt_mm.shadow_pdps[0];
+ px_dma(ppgtt->pd) = mm->ppgtt_mm.shadow_pdps[0];
} else {
for (i = 0; i < GVT_RING_CTX_NR_PDPS; i++) {
- px_dma(ppgtt->pdp.page_directory[i]) =
- mm->ppgtt_mm.shadow_pdps[i];
+ struct i915_page_directory * const pd =
+ i915_pd_entry(ppgtt->pd, i);
+
+ px_dma(pd) = mm->ppgtt_mm.shadow_pdps[i];
}
}
@@ -1128,11 +1130,14 @@ i915_context_ppgtt_root_restore(struct
intel_vgpu_submission *s,
int i;
if (i915_vm_is_4lvl(>vm)) {
- px_dma(>pml4) = s->i915_context_pml4;
+ px_dma(ppgtt->pd) = s->i915_context_pml4;
} else {
- for (i = 0; i < GEN8_3LVL_PDPES; i++)
- px_dma(ppgtt->pdp.page_directory[i]) =
- s->i915_context_pdps[i];
+ for (i = 0; i < GEN8_3LVL_PDPES; i++) {
+ struct i915_page_directory * const pd =
+ i915_pd_entry(ppgtt->pd, i);
+
+ px_dma(pd) = s->i915_context_pdps[i];
+ }
}
}
@@ -1186,11 +1191,14 @@ i915_context_ppgtt_root_save(struct
intel_vgpu_submission *s,
int i;
if (i915_vm_is_4lvl(>vm)) {
- s->i915_context_pml4 = px_dma(>pml4);
+ s->i915_context_pml4 = px_dma(ppgtt->pd);
} else {
- for (i = 0; i < GEN8_3LVL_PDPES; i++)
- s->i915_context_pdps[i] =
- px_dma(ppgtt->pdp.page_directory[i]);
+ for (i = 0; i < GEN8_3LVL_PDPES; i++) {
+ struct i915_page_directory * const pd =
+ i915_pd_entry(ppgtt->pd, i);
+
+ s->i915_context_pdps[i] = px_dma(pd);
+ }
}
}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index
[Intel-gfx] [PATCH 8/9] drm/i915/gtt: Make swapping the pd entry generic
Swapping a pd entry is same across the page directories, if
we succeed we need to increment the count and write the phys page
entry. Make a common function for it.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 41 +++--
1 file changed, 27 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f1d7874834e2..9b0d0a077e31 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -752,6 +752,27 @@ static void __set_pd_entry(struct i915_page_directory *
const pd,
gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
})
+static void *__swap_pd_entry(struct i915_page_directory * const pd,
+const unsigned short pde,
+void * const old_val,
+void * const new_val,
+const u64 encoded_entry)
+{
+ void * const old = cmpxchg(>entry[pde], old_val, new_val);
+
+ if (likely(old == old_val)) {
+ atomic_inc(>used);
+ if (likely(pd_has_phys_page(pd)))
+ __set_pd_entry(pd, pde, encoded_entry);
+ }
+
+ return old;
+}
+
+#define swap_pd_entry(pd, pde, old, to) \
+ __swap_pd_entry((pd), (pde), (old), (to), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC))
+
/*
* PDE TLBs are a pain to invalidate on GEN8+. When we modify
* the page table structures, we mark them dirty so that
@@ -1326,11 +1347,8 @@ static int gen8_ppgtt_alloc_pd(struct i915_address_space
*vm,
if (count < GEN8_PTES || intel_vgpu_active(vm->i915))
gen8_initialize_pt(vm, pt);
- old = cmpxchg(>entry[pde], vm->scratch_pt, pt);
- if (old == vm->scratch_pt) {
- set_pd_entry(pd, pde, pt);
- atomic_inc(>used);
- } else {
+ old = swap_pd_entry(pd, pde, vm->scratch_pt, pt);
+ if (unlikely(old != vm->scratch_pt)) {
free_pt(vm, pt);
pt = old;
}
@@ -1371,11 +1389,8 @@ static int gen8_ppgtt_alloc_pdp(struct
i915_address_space *vm,
init_pd(vm, pd, vm->scratch_pt);
- old = cmpxchg(>entry[pdpe], vm->scratch_pd, pd);
- if (old == vm->scratch_pd) {
- set_pd_entry(pdp, pdpe, pd);
- atomic_inc(>used);
- } else {
+ old = swap_pd_entry(pdp, pdpe, vm->scratch_pd, pd);
+ if (unlikely(old != vm->scratch_pd)) {
free_pd(vm, pd);
pd = old;
}
@@ -1440,10 +1455,8 @@ static int gen8_ppgtt_alloc_4lvl(struct
i915_address_space *vm,
init_pd(vm, pdp, vm->scratch_pd);
- old = cmpxchg(>entry[pml4e], vm->scratch_pdp,
pdp);
- if (old == vm->scratch_pdp) {
- set_pd_entry(pml4, pml4e, pdp);
- } else {
+ old = swap_pd_entry(pml4, pml4e, vm->scratch_pdp, pdp);
+ if (unlikely(old != vm->scratch_pdp)) {
free_pd(vm, pdp);
pdp = old;
}
--
2.17.1
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[Intel-gfx] [PATCH 3/9] drm/i915/gtt: Introduce init_pd_with_page
We set the page directory entries to point into a page table.
There is no gen specifics in here so make it simple and
obvious.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 9a1f956a817a..9d87f0fb5b16 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -724,12 +724,12 @@ static void free_pd(struct i915_address_space *vm,
kfree(pd);
}
-static void gen8_initialize_pd(struct i915_address_space *vm,
- struct i915_page_directory *pd)
+static void init_pd_with_page(struct i915_address_space *vm,
+ struct i915_page_directory * const pd,
+ struct i915_page_table *pt)
{
- fill_px(vm, pd,
- gen8_pde_encode(px_dma(vm->scratch_pt), I915_CACHE_LLC));
- memset_p(pd->entry, vm->scratch_pt, I915_PDES);
+ fill_px(vm, pd, gen8_pde_encode(px_dma(pt), I915_CACHE_LLC));
+ memset_p(pd->entry, pt, 512);
}
static struct i915_page_directory *alloc_pdp(struct i915_address_space *vm)
@@ -1262,7 +1262,7 @@ static int gen8_init_scratch(struct i915_address_space
*vm)
}
gen8_initialize_pt(vm, vm->scratch_pt);
- gen8_initialize_pd(vm, vm->scratch_pd);
+ init_pd_with_page(vm, vm->scratch_pd, vm->scratch_pt);
if (i915_vm_is_4lvl(vm))
gen8_initialize_4lvl_pdp(vm, vm->scratch_pdp);
@@ -1439,7 +1439,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space
*vm,
if (IS_ERR(pd))
goto unwind;
- gen8_initialize_pd(vm, pd);
+ init_pd_with_page(vm, pd, vm->scratch_pt);
old = cmpxchg(>entry[pdpe], vm->scratch_pd, pd);
if (old == vm->scratch_pd) {
@@ -1561,7 +1561,7 @@ static int gen8_preallocate_top_level_pdp(struct
i915_ppgtt *ppgtt)
if (IS_ERR(pd))
goto unwind;
- gen8_initialize_pd(vm, pd);
+ init_pd_with_page(vm, pd, vm->scratch_pt);
gen8_ppgtt_set_pdpe(vm, pdp, pd, pdpe);
atomic_inc(>used);
--
2.17.1
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[Intel-gfx] [PATCH 9/9] drm/i915/gtt: Tear down setup and cleanup macros for page dma
We don't use common codepaths to setup and cleanup page
directories vs page tables. So their setup and cleanup macros
are of no use.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 9b0d0a077e31..a2022f240fb6 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -550,8 +550,6 @@ static void cleanup_page_dma(struct i915_address_space *vm,
#define kmap_atomic_px(px) kmap_atomic(px_base(px)->page)
-#define setup_px(vm, px) setup_page_dma((vm), px_base(px))
-#define cleanup_px(vm, px) cleanup_page_dma((vm), px_base(px))
#define fill_px(vm, px, v) fill_page_dma((vm), px_base(px), (v))
#define fill32_px(vm, px, v) fill_page_dma_32((vm), px_base(px), (v))
@@ -653,7 +651,7 @@ static struct i915_page_table *alloc_pt(struct
i915_address_space *vm)
if (unlikely(!pt))
return ERR_PTR(-ENOMEM);
- if (unlikely(setup_px(vm, pt))) {
+ if (unlikely(setup_page_dma(vm, >base))) {
kfree(pt);
return ERR_PTR(-ENOMEM);
}
@@ -665,7 +663,7 @@ static struct i915_page_table *alloc_pt(struct
i915_address_space *vm)
static void free_pt(struct i915_address_space *vm, struct i915_page_table *pt)
{
- cleanup_px(vm, pt);
+ cleanup_page_dma(vm, >base);
kfree(pt);
}
@@ -706,7 +704,7 @@ static struct i915_page_directory *alloc_pd(struct
i915_address_space *vm)
if (unlikely(!pd))
return ERR_PTR(-ENOMEM);
- if (unlikely(setup_px(vm, pd))) {
+ if (unlikely(setup_page_dma(vm, >base))) {
kfree(pd);
return ERR_PTR(-ENOMEM);
}
@@ -723,7 +721,7 @@ static void free_pd(struct i915_address_space *vm,
struct i915_page_directory *pd)
{
if (likely(pd_has_phys_page(pd)))
- cleanup_px(vm, pd);
+ cleanup_page_dma(vm, >base);
kfree(pd);
}
@@ -1304,7 +1302,7 @@ static void gen8_ppgtt_cleanup_4lvl(struct i915_ppgtt
*ppgtt)
gen8_ppgtt_cleanup_3lvl(>vm, pdp);
}
- cleanup_px(>vm, pml4);
+ cleanup_page_dma(>vm, >base);
}
static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
@@ -1581,7 +1579,7 @@ static struct i915_ppgtt *gen8_ppgtt_create(struct
drm_i915_private *i915)
}
if (i915_vm_is_4lvl(>vm)) {
- ret = setup_px(>vm, ppgtt->pd);
+ ret = setup_page_dma(>vm, >pd->base);
if (ret)
goto err_free_pdp;
--
2.17.1
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[Intel-gfx] [PATCH 7/9] drm/i915/gtt: Check for physical page for pd entry always
Check the physical page before writing the entry into
the physical page. This further generalizes the pd so that
manipulation in callsites will be identical, removing the need to
handle pdps differently for gen8.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 815950658b12..f1d7874834e2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -747,17 +747,11 @@ static void __set_pd_entry(struct i915_page_directory *
const pd,
#define set_pd_entry(pd, pde, to) ({ \
(pd)->entry[(pde)] = (to); \
- __set_pd_entry((pd), (pde), \
+ if (likely(pd_has_phys_page(pd))) \
+ __set_pd_entry((pd), (pde), \
gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
})
-#define set_pdp_entry(pdp, pdpe, to) ({\
- (pdp)->entry[(pdpe)] = (to);\
- if (pd_has_phys_page(pdp)) \
- __set_pd_entry((pdp), (pdpe), \
- gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
-})
-
/*
* PDE TLBs are a pain to invalidate on GEN8+. When we modify
* the page table structures, we mark them dirty so that
@@ -838,7 +832,7 @@ static bool gen8_ppgtt_clear_pdp(struct i915_address_space
*vm,
spin_lock(>lock);
if (!atomic_read(>used)) {
- set_pdp_entry(pdp, pdpe, vm->scratch_pd);
+ set_pd_entry(pdp, pdpe, vm->scratch_pd);
GEM_BUG_ON(!atomic_read(>used));
atomic_dec(>used);
@@ -1379,7 +1373,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space
*vm,
old = cmpxchg(>entry[pdpe], vm->scratch_pd, pd);
if (old == vm->scratch_pd) {
- set_pdp_entry(pdp, pdpe, pd);
+ set_pd_entry(pdp, pdpe, pd);
atomic_inc(>used);
} else {
free_pd(vm, pd);
@@ -1405,7 +1399,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space
*vm,
unwind_pd:
spin_lock(>lock);
if (atomic_dec_and_test(>used)) {
- set_pdp_entry(pdp, pdpe, vm->scratch_pd);
+ set_pd_entry(pdp, pdpe, vm->scratch_pd);
GEM_BUG_ON(!atomic_read(>used));
atomic_dec(>used);
free_pd(vm, pd);
@@ -1497,7 +1491,7 @@ static int gen8_preallocate_top_level_pdp(struct
i915_ppgtt *ppgtt)
goto unwind;
init_pd(vm, pd, vm->scratch_pt);
- set_pdp_entry(pdp, pdpe, pd);
+ set_pd_entry(pdp, pdpe, pd);
atomic_inc(>used);
}
@@ -1509,7 +1503,7 @@ static int gen8_preallocate_top_level_pdp(struct
i915_ppgtt *ppgtt)
unwind:
start -= from;
gen8_for_each_pdpe(pd, pdp, from, start, pdpe) {
- set_pdp_entry(pdp, pdpe, vm->scratch_pd);
+ set_pd_entry(pdp, pdpe, vm->scratch_pd);
free_pd(vm, pd);
}
atomic_set(>used, 0);
--
2.17.1
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[Intel-gfx] [PATCH 5/9] drm/i915/gtt: Generalize alloc_pd
Allocate all page directory variants with alloc_pd. As
the lvl3 and lvl4 variants differ in manipulation, we
need to check for existence of backing phys page before accessing
it.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 100
1 file changed, 42 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 73aaf9481dab..bbcf3be28e19 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -717,10 +717,17 @@ static struct i915_page_directory *alloc_pd(struct
i915_address_space *vm)
return pd;
}
+static inline bool pd_has_phys_page(const struct i915_page_directory * const
pd)
+{
+ return pd->base.page;
+}
+
static void free_pd(struct i915_address_space *vm,
struct i915_page_directory *pd)
{
- cleanup_px(vm, pd);
+ if (likely(pd_has_phys_page(pd)))
+ cleanup_px(vm, pd);
+
kfree(pd);
}
@@ -732,37 +739,12 @@ static void init_pd_with_page(struct i915_address_space
*vm,
memset_p(pd->entry, pt, 512);
}
-static struct i915_page_directory *alloc_pdp(struct i915_address_space *vm)
-{
- struct i915_page_directory *pdp;
-
- pdp = __alloc_pd(i915_pdpes_per_pdp(vm));
- if (!pdp)
- return ERR_PTR(-ENOMEM);
-
- if (i915_vm_is_4lvl(vm)) {
- if (unlikely(setup_px(vm, pdp))) {
- kfree(pdp);
- return ERR_PTR(-ENOMEM);
- }
- }
-
- return pdp;
-}
-
-static void free_pdp(struct i915_address_space *vm,
-struct i915_page_directory *pdp)
-{
- if (i915_vm_is_4lvl(vm))
- cleanup_px(vm, pdp);
-
- kfree(pdp);
-}
-
static void init_pd(struct i915_address_space *vm,
struct i915_page_directory * const pd,
struct i915_page_directory * const to)
{
+ GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd));
+
fill_px(vm, pd, gen8_pdpe_encode(px_dma(to), I915_CACHE_LLC));
memset_p(pd->entry, to, 512);
}
@@ -840,14 +822,13 @@ static bool gen8_ppgtt_clear_pd(struct i915_address_space
*vm,
return !atomic_read(>used);
}
-static void gen8_ppgtt_set_pdpe(struct i915_address_space *vm,
- struct i915_page_directory *pdp,
+static void gen8_ppgtt_set_pdpe(struct i915_page_directory *pdp,
struct i915_page_directory *pd,
unsigned int pdpe)
{
gen8_ppgtt_pdpe_t *vaddr;
- if (!i915_vm_is_4lvl(vm))
+ if (!pd_has_phys_page(pdp))
return;
vaddr = kmap_atomic_px(pdp);
@@ -875,7 +856,7 @@ static bool gen8_ppgtt_clear_pdp(struct i915_address_space
*vm,
spin_lock(>lock);
if (!atomic_read(>used)) {
- gen8_ppgtt_set_pdpe(vm, pdp, vm->scratch_pd, pdpe);
+ gen8_ppgtt_set_pdpe(pdp, vm->scratch_pd, pdpe);
pdp->entry[pdpe] = vm->scratch_pd;
GEM_BUG_ON(!atomic_read(>used));
@@ -936,7 +917,7 @@ static void gen8_ppgtt_clear_4lvl(struct i915_address_space
*vm,
}
spin_unlock(>lock);
if (free)
- free_pdp(vm, pdp);
+ free_pd(vm, pdp);
}
}
@@ -1240,7 +1221,7 @@ static int gen8_init_scratch(struct i915_address_space
*vm)
}
if (i915_vm_is_4lvl(vm)) {
- vm->scratch_pdp = alloc_pdp(vm);
+ vm->scratch_pdp = alloc_pd(vm);
if (IS_ERR(vm->scratch_pdp)) {
ret = PTR_ERR(vm->scratch_pdp);
goto free_pd;
@@ -1302,7 +1283,7 @@ static void gen8_free_scratch(struct i915_address_space
*vm)
return;
if (i915_vm_is_4lvl(vm))
- free_pdp(vm, vm->scratch_pdp);
+ free_pd(vm, vm->scratch_pdp);
free_pd(vm, vm->scratch_pd);
free_pt(vm, vm->scratch_pt);
cleanup_scratch_page(vm);
@@ -1322,7 +1303,7 @@ static void gen8_ppgtt_cleanup_3lvl(struct
i915_address_space *vm,
free_pd(vm, pdp->entry[i]);
}
- free_pdp(vm, pdp);
+ free_pd(vm, pdp);
}
static void gen8_ppgtt_cleanup_4lvl(struct i915_ppgtt *ppgtt)
@@ -1429,7 +1410,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space
*vm,
old = cmpxchg(>entry[pdpe], vm->scratch_pd, pd);
if (old == vm->scratch_pd) {
- gen8_ppgtt_set_pdpe(vm, pdp, pd, pdpe);
+ gen8_ppgtt_set_pdpe(pdp, pd, pdpe);
atomic_inc(>used);
} else {
free_pd(vm, pd);
@@ -1455,7 +1436,7 @@ static int gen8_ppgtt_alloc_pdp(struct
[Intel-gfx] [PATCH 1/9] drm/i915/gtt: No need to zero the table for page dirs
We set them to scratch right after allocation so prevent
useless zeroing before.
v2: atomic_t
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e70675bfb51d..07f86d474fa2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -687,7 +687,7 @@ static struct i915_page_directory *alloc_pd(struct
i915_address_space *vm)
{
struct i915_page_directory *pd;
- pd = kzalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
+ pd = kmalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL);
if (unlikely(!pd))
return ERR_PTR(-ENOMEM);
@@ -747,7 +747,7 @@ alloc_pdp(struct i915_address_space *vm)
GEM_BUG_ON(!i915_vm_is_4lvl(vm));
- pdp = kzalloc(sizeof(*pdp), GFP_KERNEL);
+ pdp = kmalloc(sizeof(*pdp), GFP_KERNEL);
if (!pdp)
return ERR_PTR(-ENOMEM);
--
2.17.1
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[Intel-gfx] [PATCH 6/9] drm/i915/gtt: pde entry encoding is identical
For all page directory entries, the pde encoding is
identical. Don't compilicate call sites with different
versions of doing the same thing.
Only wart that remains is a 4 entry gen8/bsw pdp, for which
we need to check the backing phys page.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 111 ++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 3 -
2 files changed, 40 insertions(+), 74 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index bbcf3be28e19..815950658b12 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -214,10 +214,10 @@ static u64 gen8_pte_encode(dma_addr_t addr,
return pte;
}
-static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
- const enum i915_cache_level level)
+static u64 gen8_pde_encode(const dma_addr_t addr,
+ const enum i915_cache_level level)
{
- gen8_pde_t pde = _PAGE_PRESENT | _PAGE_RW;
+ u64 pde = _PAGE_PRESENT | _PAGE_RW;
pde |= addr;
if (level != I915_CACHE_NONE)
pde |= PPAT_CACHED_PDE;
@@ -226,9 +226,6 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
return pde;
}
-#define gen8_pdpe_encode gen8_pde_encode
-#define gen8_pml4e_encode gen8_pde_encode
-
static u64 snb_pte_encode(dma_addr_t addr,
enum i915_cache_level level,
u32 flags)
@@ -731,24 +728,36 @@ static void free_pd(struct i915_address_space *vm,
kfree(pd);
}
-static void init_pd_with_page(struct i915_address_space *vm,
- struct i915_page_directory * const pd,
- struct i915_page_table *pt)
-{
- fill_px(vm, pd, gen8_pde_encode(px_dma(pt), I915_CACHE_LLC));
- memset_p(pd->entry, pt, 512);
+#define init_pd(vm, pd, to) { \
+ GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd));\
+ fill_px((vm), (pd), gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \
+ memset_p((pd)->entry, (to), 512); \
}
-static void init_pd(struct i915_address_space *vm,
- struct i915_page_directory * const pd,
- struct i915_page_directory * const to)
+static void __set_pd_entry(struct i915_page_directory * const pd,
+ const unsigned short pde,
+ const u64 encoded_entry)
{
- GEM_DEBUG_BUG_ON(!pd_has_phys_page(pd));
+ u64 *vaddr;
- fill_px(vm, pd, gen8_pdpe_encode(px_dma(to), I915_CACHE_LLC));
- memset_p(pd->entry, to, 512);
+ vaddr = kmap_atomic(pd->base.page);
+ vaddr[pde] = encoded_entry;
+ kunmap_atomic(vaddr);
}
+#define set_pd_entry(pd, pde, to) ({ \
+ (pd)->entry[(pde)] = (to); \
+ __set_pd_entry((pd), (pde), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
+})
+
+#define set_pdp_entry(pdp, pdpe, to) ({\
+ (pdp)->entry[(pdpe)] = (to);\
+ if (pd_has_phys_page(pdp)) \
+ __set_pd_entry((pdp), (pdpe), \
+ gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\
+})
+
/*
* PDE TLBs are a pain to invalidate on GEN8+. When we modify
* the page table structures, we mark them dirty so that
@@ -778,18 +787,6 @@ static bool gen8_ppgtt_clear_pt(const struct
i915_address_space *vm,
return !atomic_sub_return(num_entries, >used);
}
-static void gen8_ppgtt_set_pde(struct i915_address_space *vm,
- struct i915_page_directory *pd,
- struct i915_page_table *pt,
- unsigned int pde)
-{
- gen8_pde_t *vaddr;
-
- vaddr = kmap_atomic_px(pd);
- vaddr[pde] = gen8_pde_encode(px_dma(pt), I915_CACHE_LLC);
- kunmap_atomic(vaddr);
-}
-
static bool gen8_ppgtt_clear_pd(struct i915_address_space *vm,
struct i915_page_directory *pd,
u64 start, u64 length)
@@ -807,8 +804,7 @@ static bool gen8_ppgtt_clear_pd(struct i915_address_space
*vm,
spin_lock(>lock);
if (!atomic_read(>used)) {
- gen8_ppgtt_set_pde(vm, pd, vm->scratch_pt, pde);
- pd->entry[pde] = vm->scratch_pt;
+ set_pd_entry(pd, pde, vm->scratch_pt);
GEM_BUG_ON(!atomic_read(>used));
atomic_dec(>used);
@@ -822,20 +818,6 @@ static bool gen8_ppgtt_clear_pd(struct i915_address_space
*vm,
return !atomic_read(>used);
}
-static void gen8_ppgtt_set_pdpe(struct i915_page_directory *pdp,
-
[Intel-gfx] [PATCH 4/9] drm/i915/gtt: Introduce init_pd
All page directories, excluding last level, are initialized with
pointer to next level page directories. Make common function for it.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 37 +++--
1 file changed, 14 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 9d87f0fb5b16..73aaf9481dab 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -759,26 +759,12 @@ static void free_pdp(struct i915_address_space *vm,
kfree(pdp);
}
-static void gen8_initialize_4lvl_pdp(struct i915_address_space *vm,
-struct i915_page_directory *pdp)
+static void init_pd(struct i915_address_space *vm,
+ struct i915_page_directory * const pd,
+ struct i915_page_directory * const to)
{
- fill_px(vm, pdp,
- gen8_pdpe_encode(px_dma(vm->scratch_pd), I915_CACHE_LLC));
- memset_p(pdp->entry, vm->scratch_pd, 512);
-}
-
-static void gen8_initialize_3lvl_pdp(struct i915_address_space *vm,
-struct i915_page_directory *pdp)
-{
- memset_p(pdp->entry, vm->scratch_pd, GEN8_3LVL_PDPES);
-}
-
-static void gen8_initialize_pml4(struct i915_address_space *vm,
-struct i915_page_directory *pml4)
-{
- fill_px(vm, pml4,
- gen8_pml4e_encode(px_dma(vm->scratch_pdp), I915_CACHE_LLC));
- memset_p(pml4->entry, vm->scratch_pdp, GEN8_PML4ES_PER_PML4);
+ fill_px(vm, pd, gen8_pdpe_encode(px_dma(to), I915_CACHE_LLC));
+ memset_p(pd->entry, to, 512);
}
/*
@@ -1264,7 +1250,7 @@ static int gen8_init_scratch(struct i915_address_space
*vm)
gen8_initialize_pt(vm, vm->scratch_pt);
init_pd_with_page(vm, vm->scratch_pd, vm->scratch_pt);
if (i915_vm_is_4lvl(vm))
- gen8_initialize_4lvl_pdp(vm, vm->scratch_pdp);
+ init_pd(vm, vm->scratch_pdp, vm->scratch_pd);
return 0;
@@ -1509,7 +1495,7 @@ static int gen8_ppgtt_alloc_4lvl(struct
i915_address_space *vm,
if (IS_ERR(pdp))
goto unwind;
- gen8_initialize_4lvl_pdp(vm, pdp);
+ init_pd(vm, pdp, vm->scratch_pd);
old = cmpxchg(>entry[pml4e], vm->scratch_pdp,
pdp);
if (old == vm->scratch_pdp) {
@@ -1639,13 +1625,18 @@ static struct i915_ppgtt *gen8_ppgtt_create(struct
drm_i915_private *i915)
}
if (i915_vm_is_4lvl(>vm)) {
- gen8_initialize_pml4(>vm, ppgtt->pd);
+ init_pd(>vm, ppgtt->pd, ppgtt->vm.scratch_pdp);
ppgtt->vm.allocate_va_range = gen8_ppgtt_alloc_4lvl;
ppgtt->vm.insert_entries = gen8_ppgtt_insert_4lvl;
ppgtt->vm.clear_range = gen8_ppgtt_clear_4lvl;
} else {
- gen8_initialize_3lvl_pdp(>vm, ppgtt->pd);
+ /*
+* We don't need to setup dma for top level pdp, only
+* for entries. So point entries to scratch.
+*/
+ memset_p(ppgtt->pd->entry, ppgtt->vm.scratch_pd,
+GEN8_3LVL_PDPES);
if (intel_vgpu_active(i915)) {
err = gen8_preallocate_top_level_pdp(ppgtt);
--
2.17.1
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Re: [Intel-gfx] [RFC 1/2] drm/i915: move modesetting output/encoder code under display/
On Tue, Jun 11, 2019 at 08:47:07AM +0100, Chris Wilson wrote: > Quoting Jani Nikula (2019-06-10 22:53:11) > > Add a new subdirectory for display code, and start off by moving > > modesetting output/encoder code. Judging by the include changes, this is > > a surprisingly clean operation. > > > > Cc: Chris Wilson > > Cc: Joonas Lahtinen > > Cc: Rodrigo Vivi Acked-by: Rodrigo Vivi > > Cc: Ville Syrjälä > > Signed-off-by: Jani Nikula > > Only surprisingly clean because you already done the hard work :) > > Reviewed-by: Chris Wilson > -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC 2/2] drm/i915: move modesetting core code under display/
On Tue, Jun 11, 2019 at 08:52:31AM +0100, Chris Wilson wrote: > Quoting Jani Nikula (2019-06-10 22:53:12) > > Now that we have a new subdirectory for display code, continue by moving > > modesetting core code. > > > > display/intel_frontbuffer.h sticks out like a sore thumb, otherwise this > > is, again, a surprisingly clean operation. > > Yup. I've a patch to decouple it from GEM slightly, but we may want to > go full observer mode. Although that seems like overkill as the > intention is make userspace explicitly generate such notifications (i.e. > along the lines of DIRTYFB). However, the implicit back-channel > notifications are much easier to organise. > > > Cc: Chris Wilson > > Cc: Joonas Lahtinen > > Cc: Rodrigo Vivi Acked-by: Rodrigo Vivi > > Cc: Ville Syrjälä > > Signed-off-by: Jani Nikula > > Reviewed-by: Chris Wilson > -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [CI 6/6] drm/i915: Remove I915_READ64 and I915_READ64_32x2
On Mon, Jun 10, 2019 at 01:06:08PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Now that all their users are gone we can remove the macros and > accompanying duplicated comment. > > Signed-off-by: Tvrtko Ursulin > Suggested-by: Jani Nikula > Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/i915_drv.h | 18 -- > 1 file changed, 18 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 20eb37b760c4..d3c02e009a98 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2851,24 +2851,6 @@ extern void intel_display_print_error_state(struct > drm_i915_error_state_buf *e, > #define I915_READ_NOTRACE(reg__) __I915_REG_OP(read_notrace, dev_priv, > (reg__)) > #define I915_WRITE_NOTRACE(reg__, val__) __I915_REG_OP(write_notrace, > dev_priv, (reg__), (val__)) > > -/* Be very careful with read/write 64-bit values. On 32-bit machines, they > - * will be implemented using 2 32-bit writes in an arbitrary order with > - * an arbitrary delay between them. This can cause the hardware to > - * act upon the intermediate value, possibly leading to corruption and > - * machine death. For this reason we do not support I915_WRITE64, or > - * dev_priv->uncore.funcs.mmio_writeq. > - * > - * When reading a 64-bit value as two 32-bit values, the delay may cause > - * the two reads to mismatch, e.g. a timestamp overflowing. Also note that > - * occasionally a 64-bit register does not actualy support a full readq > - * and must be read using two 32-bit reads. > - * > - * You have been warned. We are no longer warned? > - */ > -#define I915_READ64(reg__) __I915_REG_OP(read64, dev_priv, (reg__)) > -#define I915_READ64_2x32(lower_reg__, upper_reg__) \ > - __I915_REG_OP(read64_2x32, dev_priv, (lower_reg__), (upper_reg__)) > - > #define POSTING_READ(reg__) __I915_REG_OP(posting_read, dev_priv, (reg__)) > #define POSTING_READ16(reg__)__I915_REG_OP(posting_read16, dev_priv, > (reg__)) > > -- > 2.20.1 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Nuke atomic set/get prop plane stubs
On Tue, Jun 11, 2019 at 03:28:20PM +0200, Maarten Lankhorst wrote:
> They have been unused since rotation was added to drm core in 2015,
> time to get rid of them.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_atomic_plane.c | 45 ---
> drivers/gpu/drm/i915/intel_atomic_plane.h | 8
> drivers/gpu/drm/i915/intel_display.c | 6 ---
> drivers/gpu/drm/i915/intel_sprite.c | 8
> 4 files changed, 67 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/intel_atomic_plane.c
> index 58ea1b672a1a..30bd4e76fff9 100644
> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> @@ -353,48 +353,3 @@ const struct drm_plane_helper_funcs
> intel_plane_helper_funcs = {
> .cleanup_fb = intel_cleanup_plane_fb,
> .atomic_check = intel_plane_atomic_check,
> };
> -
> -/**
> - * intel_plane_atomic_get_property - fetch plane property value
> - * @plane: plane to fetch property for
> - * @state: state containing the property value
> - * @property: property to look up
> - * @val: pointer to write property value into
> - *
> - * The DRM core does not store shadow copies of properties for
> - * atomic-capable drivers. This entrypoint is used to fetch
> - * the current value of a driver-specific plane property.
> - */
> -int
> -intel_plane_atomic_get_property(struct drm_plane *plane,
> - const struct drm_plane_state *state,
> - struct drm_property *property,
> - u64 *val)
> -{
> - DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
> - property->base.id, property->name);
> - return -EINVAL;
> -}
> -
> -/**
> - * intel_plane_atomic_set_property - set plane property value
> - * @plane: plane to set property for
> - * @state: state to update property value in
> - * @property: property to set
> - * @val: value to set property to
> - *
> - * Writes the specified property value for a plane into the provided atomic
> - * state object.
> - *
> - * Returns 0 on success, -EINVAL on unrecognized properties
> - */
> -int
> -intel_plane_atomic_set_property(struct drm_plane *plane,
> - struct drm_plane_state *state,
> - struct drm_property *property,
> - u64 val)
> -{
> - DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
> - property->base.id, property->name);
> - return -EINVAL;
> -}
> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/intel_atomic_plane.h
> index 24320041498d..1437a8797e10 100644
> --- a/drivers/gpu/drm/i915/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.h
> @@ -42,14 +42,6 @@ int intel_plane_atomic_check_with_state(const struct
> intel_crtc_state *old_crtc_
> struct intel_crtc_state *crtc_state,
> const struct intel_plane_state
> *old_plane_state,
> struct intel_plane_state *intel_state);
> -int intel_plane_atomic_get_property(struct drm_plane *plane,
> - const struct drm_plane_state *state,
> - struct drm_property *property,
> - u64 *val);
> -int intel_plane_atomic_set_property(struct drm_plane *plane,
> - struct drm_plane_state *state,
> - struct drm_property *property,
> - u64 val);
> int intel_plane_atomic_calc_changes(const struct intel_crtc_state
> *old_crtc_state,
> struct drm_crtc_state *crtc_state,
> const struct intel_plane_state
> *old_plane_state,
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 62fa573f90e8..5d497627ffd0 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14458,8 +14458,6 @@ static const struct drm_plane_funcs i965_plane_funcs
> = {
> .update_plane = drm_atomic_helper_update_plane,
> .disable_plane = drm_atomic_helper_disable_plane,
> .destroy = intel_plane_destroy,
> - .atomic_get_property = intel_plane_atomic_get_property,
> - .atomic_set_property = intel_plane_atomic_set_property,
> .atomic_duplicate_state = intel_plane_duplicate_state,
> .atomic_destroy_state = intel_plane_destroy_state,
> .format_mod_supported = i965_plane_format_mod_supported,
> @@ -14469,8 +14467,6 @@ static const struct drm_plane_funcs i8xx_plane_funcs
> = {
> .update_plane = drm_atomic_helper_update_plane,
> .disable_plane = drm_atomic_helper_disable_plane,
> .destroy = intel_plane_destroy,
> - .atomic_get_property =
Re: [Intel-gfx] [PATCH] drm/i915/gtt: Skip initializing PT with scratch if full
Chris Wilson writes:
> If we will completely overwrite the PT with PTEs for the object, we can
> forgo filling it with scratch entries.
>
> References: 14826673247e ("drm/i915: Only initialize partially filled
> pagetables")
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Mika Kuoppala
> Cc: Matthew Auld
> Reviewed-by: Matthew Auld
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index daecbf91efc6..6f437b28fe2a 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1846,7 +1846,8 @@ static int gen6_alloc_va_range(struct
> i915_address_space *vm,
> if (IS_ERR(pt))
> goto unwind_out;
>
> - gen6_initialize_pt(vm, pt);
> + if (count < GEN6_PTES)
> + gen6_initialize_pt(vm, pt);
>
> old = cmpxchg(>base.pd.page_table[pde],
> vm->scratch_pt, pt);
> --
> 2.20.1
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Re: [Intel-gfx] [RFC 08/14] drm/i915: Store backpointer to intel_gt in the engine
On 6/11/2019 2:36 AM, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-11 09:41:02)
On 10/06/2019 19:17, Daniele Ceraolo Spurio wrote:
On 6/10/19 9:16 AM, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-10 16:54:13)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 01223864237a..343c4459e8a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -34,6 +34,7 @@ struct drm_i915_reg_table;
struct i915_gem_context;
struct i915_request;
struct i915_sched_attr;
+struct intel_gt;
struct intel_uncore;
typedef u8 intel_engine_mask_t;
@@ -266,6 +267,7 @@ struct intel_engine_execlists {
struct intel_engine_cs {
struct drm_i915_private *i915;
+ struct intel_gt *gt;
I'd push for gt as being the backpointer, and i915 its distant grand
parent. Not sure how much pain that would bring just for the elimination
of one more drm_i915_private, but that's how I picture the
encapsulation.
It depends on overall direction. Are we going to go with helpers
(XXX_to_i915) or not. Well for removing engine->i915 there would be
churn already. But same churn regardless of whether we pick
engine_to_i915 or engine->gt->i915.
But I don't see a problem with having both i915 and gt pointers in the
engine. It's a short cut to avoid pointer chasing and verbosity. Our
code is fundamentally still very dependent on runtime checks against
INTEL_GEN and INTEL_INFO, so i915 is pretty much in need all over the place.
Would it be worth moving some of the flags in the device_info structure
in a gt substructure, like we did for display, and get a pointer to that
in intel_gt? We could save some jumps back that way and be more coherent
in where we store the info.
So even with this we maybe reduce the need to chase all the way to i915
a bit, but not fully. Unless we decide to duplicate gen in intel_gt as
well. Well.. now I am scared we will just decide to do that. :D
Kind off, we are already reducing the runtime checks into feature flags
or vfuncs for hot paths. I do hope the only time we need to go back to
i915 is during init. This should be reasonably true for engine; looking
at intel_lrc.c the common access is for i915->scratch, which we need to
move under intel_gt. And I expect that we will see similar natural
transitions for engine->i915.
-Chris
There was also a mention a while back of splitting gt and display gens
(https://patchwork.freedesktop.org/series/51860/), if we ever decide
that that makes sense the gt gen will just naturally move and we'll save
most of the jumps to i915.
Daniele
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Prevent lock-cycles between GPU waits and GPU resets
== Series Details == Series: drm/i915: Prevent lock-cycles between GPU waits and GPU resets URL : https://patchwork.freedesktop.org/series/61901/ State : success == Summary == CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13245 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/ Known issues Here are the changes found in Patchwork_13245 that come from known issues: ### IGT changes ### Issues hit * igt@kms_addfb_basic@clobberred-modifier: - fi-bsw-kefka: [PASS][1] -> [SKIP][2] ([fdo#109271]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bsw-kefka/igt@kms_addfb_ba...@clobberred-modifier.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/fi-bsw-kefka/igt@kms_addfb_ba...@clobberred-modifier.html * igt@kms_flip@basic-flip-vs-dpms: - fi-byt-j1900: [PASS][3] -> [SKIP][4] ([fdo#109271]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-byt-j1900/igt@kms_f...@basic-flip-vs-dpms.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/fi-byt-j1900/igt@kms_f...@basic-flip-vs-dpms.html * igt@kms_flip@basic-flip-vs-wf_vblank: - fi-gdg-551: [PASS][5] -> [FAIL][6] ([fdo#100368]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-gdg-551/igt@kms_flip@basic-flip-vs-wf_vblank.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/fi-gdg-551/igt@kms_flip@basic-flip-vs-wf_vblank.html * igt@prime_busy@basic-after-default: - fi-cfl-8700k: [PASS][7] -> [SKIP][8] ([fdo#109271]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-cfl-8700k/igt@prime_b...@basic-after-default.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/fi-cfl-8700k/igt@prime_b...@basic-after-default.html * igt@prime_vgem@basic-fence-flip: - fi-ilk-650: [PASS][9] -> [DMESG-WARN][10] ([fdo#106387]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-ilk-650/igt@prime_v...@basic-fence-flip.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/fi-ilk-650/igt@prime_v...@basic-fence-flip.html Possible fixes * igt@gem_mmap@basic-small-bo: - fi-icl-u3: [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] +2 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/fi-icl-u3/igt@gem_m...@basic-small-bo.html * igt@i915_selftest@live_contexts: - fi-bdw-gvtdvm: [DMESG-FAIL][13] ([fdo#110235]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368 [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 Participating hosts (54 -> 47) -- Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6230 -> Patchwork_13245 CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13245: e107872165ce27445acca87dbaf4bc6c993ea7e7 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == e107872165ce drm/i915: Prevent lock-cycles between GPU waits and GPU resets == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13245/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 04/11] drm: Convert connector_helper_funcs->atomic_check to accept drm_atomic_state
From: Sean Paul
Everyone who implements connector_helper_funcs->atomic_check reaches
into the connector state to get the atomic state. Instead of continuing
this pattern, change the callback signature to just give atomic state
and let the driver determine what it does and does not need from it.
Eventually all atomic functions should do this, but that's just too much
busy work for me.
Changes in v3:
- Added to the set
Changes in v4:
- None
Changes in v5:
- intel_digital_connector_atomic_check declaration moved to i915_atomic.h
Link to v3:
https://patchwork.freedesktop.org/patch/msgid/20190502194956.218441-5-s...@poorly.run
Link to v4:
https://patchwork.freedesktop.org/patch/msgid/20190508160920.144739-5-s...@poorly.run
Cc: Daniel Vetter
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Ben Skeggs
Cc: Laurent Pinchart
Cc: Kieran Bingham
Cc: Eric Anholt
Tested-by: Heiko Stuebner
Acked-by: Daniel Vetter
Signed-off-by: Sean Paul
---
drivers/gpu/drm/drm_atomic_helper.c | 4 ++--
drivers/gpu/drm/i915/intel_atomic.c | 8 +---
drivers/gpu/drm/i915/intel_atomic.h | 2 +-
drivers/gpu/drm/i915/intel_dp_mst.c | 7 ---
drivers/gpu/drm/i915/intel_sdvo.c| 9 +
drivers/gpu/drm/i915/intel_tv.c | 8 +---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 +++--
drivers/gpu/drm/rcar-du/rcar_lvds.c | 12 +++-
drivers/gpu/drm/vc4/vc4_txp.c| 7 ---
include/drm/drm_modeset_helper_vtables.h | 2 +-
10 files changed, 37 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 2133f62539176..e58be69960692 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -686,7 +686,7 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
}
if (funcs->atomic_check)
- ret = funcs->atomic_check(connector,
new_connector_state);
+ ret = funcs->atomic_check(connector, state);
if (ret)
return ret;
@@ -728,7 +728,7 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
continue;
if (funcs->atomic_check)
- ret = funcs->atomic_check(connector,
new_connector_state);
+ ret = funcs->atomic_check(connector, state);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index 58b8049649a0f..ab40448a19d56 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -106,12 +106,14 @@ int intel_digital_connector_atomic_set_property(struct
drm_connector *connector,
}
int intel_digital_connector_atomic_check(struct drm_connector *conn,
-struct drm_connector_state *new_state)
+struct drm_atomic_state *state)
{
+ struct drm_connector_state *new_state =
+ drm_atomic_get_new_connector_state(state, conn);
struct intel_digital_connector_state *new_conn_state =
to_intel_digital_connector_state(new_state);
struct drm_connector_state *old_state =
- drm_atomic_get_old_connector_state(new_state->state, conn);
+ drm_atomic_get_old_connector_state(state, conn);
struct intel_digital_connector_state *old_conn_state =
to_intel_digital_connector_state(old_state);
struct drm_crtc_state *crtc_state;
@@ -121,7 +123,7 @@ int intel_digital_connector_atomic_check(struct
drm_connector *conn,
if (!new_state->crtc)
return 0;
- crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
new_state->crtc);
+ crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
/*
* These properties are handled by fastset, and might not end
diff --git a/drivers/gpu/drm/i915/intel_atomic.h
b/drivers/gpu/drm/i915/intel_atomic.h
index 1c8507da1a690..58065d3161a34 100644
--- a/drivers/gpu/drm/i915/intel_atomic.h
+++ b/drivers/gpu/drm/i915/intel_atomic.h
@@ -28,7 +28,7 @@ int intel_digital_connector_atomic_set_property(struct
drm_connector *connector,
struct drm_property *property,
u64 val);
int intel_digital_connector_atomic_check(struct drm_connector *conn,
-struct drm_connector_state *new_state);
+struct drm_atomic_state *state);
struct drm_connector_state *
intel_digital_connector_duplicate_state(struct drm_connector *connector);
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 0caf645fbbb84..60652ebbdf610 100644
---
Re: [Intel-gfx] [PATCH 00/33] fbcon notifier begone v3!
On Tue, Jun 11, 2019 at 03:16:35PM +0100, Daniel Thompson wrote: > On Fri, Jun 07, 2019 at 12:07:55PM +0200, Bartlomiej Zolnierkiewicz wrote: > > > > On 6/6/19 9:38 AM, Daniel Vetter wrote: > > > Hi Bart, > > > > Hi Daniel, > > > > > On Tue, May 28, 2019 at 11:02:31AM +0200, Daniel Vetter wrote: > > >> Hi all, > > >> > > >> I think we're slowly getting there. Previous cover letters with more > > >> context: > > >> > > >> https://lists.freedesktop.org/archives/dri-devel/2019-May/218362.html > > >> > > >> tldr; I have a multi-year plan to improve fbcon locking, because the > > >> current thing is a bit a mess. > > >> > > >> Cover letter of this version, where I detail a bit more the details > > >> fixed in this one here: > > >> > > >> https://lists.freedesktop.org/archives/dri-devel/2019-May/218984.html > > >> > > >> Note that the locking plan in this one is already outdated, I overlooked > > >> a > > >> few fun issues around any printk() going back to console_lock. > > >> > > >> I think remaining bits: > > >> > > >> - Ack from Daniel Thompson for the backlight bits, he wanted to check the > > >> big picture. > > > > > > I think Daniel is still on vacation until next week or so. > > Thanks for spotting that. As it happens the e-mail asking for extra detail > was just about the last thing I sent before going on holiday (exactly to > try and avoid round trips this wee ;-) ). Vacations notices are sometimes indeed useful :-) > > >> - Hash out actual merge plan. > > > > > > I'd like to stuff this into drm.git somehow, I guess topic branch works > > > too. > > > > I would like to have topic branch for this patchset. > > From a backlight perspective its Lee Jones who hoovers up the patches > and worries about hiding merge conflicts from Linus. > > I'll let him follow up if needed but I suspect he'd like an immutable > branch to work from also. Ok I'll build the topic branch, get it tested a bit and then send the pull around to everyone. Thanks for taking a look at the backlight side. -Daniel > > > Daniel. > > > > > > > Long term I think we need to reconsider how we handle fbdev, at least the > > > core/fbcon pieces. Since a few years all the work in that area has been > > > motivated by drm, and pushed by drm contributors. Having that maintained > > > in a separate tree that doesn't regularly integrate imo doesn't make much > > > sense, and we ended up merging almost everything through some drm tree. > > > That one time we didn't (for some panel rotation stuff) it resulted in > > > some good suprises. > > > > > > I think best solution is if we put the core and fbcon bits into drm-misc, > > > as group maintained infrastructure piece. All the other gfx infra pieces > > > are maintained in there already too. You'd obviously get commit rights. > > > I think that would include > > > - drivers/video/fbdev > > > - drivers/video/*c > > > - drivers/video/console > > > > Sounds fine to me. > > > > > I don't really care about what happens with the actual fbdev drivers > > > (aside from the drm one in drm_fb_helper.c, but that's already maintained > > > as part of drm). I guess we could also put those into drm-misc, or as a > > > separate tree, depending what you want. > > > > > > Thoughts? > > > > I would like to handle fbdev changes for v5.3 merge window using fbdev > > tree but after that everything (including changes to fbdev drivers) can go > > through drm-misc tree. > > > > Best regards, > > -- > > Bartlomiej Zolnierkiewicz > > Samsung R Institute Poland > > Samsung Electronics > > > > > Cheers, Daniel > > > > > > > > >> > > >> I'm also cc'ing the entire pile to a lot more people on request. > > >> > > >> Thanks, Daniel > > >> > > >> Daniel Vetter (33): > > >> dummycon: Sprinkle locking checks > > >> fbdev: locking check for fb_set_suspend > > >> vt: might_sleep() annotation for do_blank_screen > > >> vt: More locking checks > > >> fbdev/sa1100fb: Remove dead code > > >> fbdev/cyber2000: Remove struct display > > >> fbdev/aty128fb: Remove dead code > > >> fbcon: s/struct display/struct fbcon_display/ > > >> fbcon: Remove fbcon_has_exited > > >> fbcon: call fbcon_fb_(un)registered directly > > >> fbdev/sh_mobile: remove sh_mobile_lcdc_display_notify > > >> fbdev/omap: sysfs files can't disappear before the device is gone > > >> fbdev: sysfs files can't disappear before the device is gone > > >> staging/olpc: lock_fb_info can't fail > > >> fbdev/atyfb: lock_fb_info can't fail > > >> fbdev: lock_fb_info cannot fail > > >> fbcon: call fbcon_fb_bind directly > > >> fbdev: make unregister/unlink functions not fail > > >> fbdev: unify unlink_framebuffer paths > > >> fbdev/sh_mob: Remove fb notifier callback > > >> fbdev: directly call fbcon_suspended/resumed > > >> fbcon: Call fbcon_mode_deleted/new_modelist directly > > >> fbdev: Call fbcon_get_requirement directly > > >> Revert "backlight/fbcon: Add FB_EVENT_CONBLANK" > > >> fbmem: pull
Re: [Intel-gfx] [PATCH v2 1/3] drm/i915/icl: use ranges for voltage level lookup
On Mon, Jun 10, 2019 at 02:48:19PM -0700, Lucas De Marchi wrote:
> Spec shows voltage level 0 as 307.2, 312, or lower and suggests to use
> range checks. Prepare for having other frequencies in these ranges by
> not comparing the exact frequency.
>
> v2: invert checks by comparing biggest cdclk first (suggested by Ville)
>
> Signed-off-by: Lucas De Marchi
lgtm
Series is
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_cdclk.c | 19 +--
> 1 file changed, 5 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index 6988c6cbc362..465a72d185ad 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1865,21 +1865,12 @@ static void icl_set_cdclk(struct drm_i915_private
> *dev_priv,
>
> static u8 icl_calc_voltage_level(int cdclk)
> {
> - switch (cdclk) {
> - case 5:
> - case 307200:
> - case 312000:
> - return 0;
> - case 556800:
> - case 552000:
> - return 1;
> - default:
> - MISSING_CASE(cdclk);
> - /* fall through */
> - case 652800:
> - case 648000:
> + if (cdclk > 556800)
> return 2;
> - }
> + else if (cdclk > 312000)
> + return 1;
> + else
> + return 0;
> }
>
> static void icl_get_cdclk(struct drm_i915_private *dev_priv,
> --
> 2.21.0
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 24/33] Revert "backlight/fbcon: Add FB_EVENT_CONBLANK"
On Tue, Jun 11, 2019 at 03:09:29PM +0100, Daniel Thompson wrote:
> On Tue, May 28, 2019 at 11:02:55AM +0200, Daniel Vetter wrote:
> > This reverts commit 994efacdf9a087b52f71e620b58dfa526b0cf928.
> >
> > The justification is that if hw blanking fails (i.e. fbops->fb_blank)
> > fails, then we still want to shut down the backlight. Which is exactly
> > _not_ what fb_blank() does and so rather inconsistent if we end up
> > with different behaviour between fbcon and direct fbdev usage. Given
> > that the entire notifier maze is getting in the way anyway I figured
> > it's simplest to revert this not well justified commit.
> >
> > v2: Add static inline to the dummy version.
> >
> > Cc: Richard Purdie
> > Signed-off-by: Daniel Vetter
> > Reviewed-by: Sam Ravnborg
> > Reviewed-by: Maarten Lankhorst
> > Cc: Lee Jones
> > Cc: Daniel Thompson
> > Cc: Jingoo Han
> > Cc: Bartlomiej Zolnierkiewicz
> > Cc: Daniel Vetter
> > Cc: Hans de Goede
> > Cc: Yisheng Xie
> > Cc: linux-fb...@vger.kernel.org
>
> This was the main patch where I wanted the bigger picture ;-) and TBH
> I'm still in two minds here. I don't personally view fbcon as
> inconsistent, more that, as an in-kernel service it might have to do
> more that something more complicated than freak out and let userspace
> decide what to do next.
I think the story is even worse, at least for drm-based drivers:
- We have the fbcon code here, which did something slightly different than
fbdev modesets called through /dev/fb*.
- For most x86 drivers the expectations is that userspace handles the
backlight over modesets (enabling/disabling as needed), and the rules
for which backlight to pick extremely arcane: There's no link in sysfs
or anywhere else from a drm connector to the corresponding backlight
device.
- But some other drivers, mostly on the soc side, handle backlight
enabling/disabling themselves, as part of the usual drm modeset
sequence. And I suspect that at least some drm userspace more geared
towards userspace doesn't bother handling the backlight on its own.
I don't have any plan yet how to get us out of this whole, but figured
this patch here should at least simplifiy things a bit.
Just fyi a bit more context here, I think there's more work to do :-/
-Daniel
> However... since I'm struggling to make up my mind, I can't think of
> many products that would ship reliant exclusively on fbcon *and* this
> patch is more about fbcon than backlight then I figure that, from a
> backlight perspective:
>
> Acked-by: Daniel Thompson
>
>
> Daniel.
>
>
> > ---
> > drivers/video/backlight/backlight.c | 2 +-
> > drivers/video/fbdev/core/fbcon.c| 14 +-
> > drivers/video/fbdev/core/fbmem.c| 1 +
> > include/linux/fb.h | 4 +---
> > include/linux/fbcon.h | 2 ++
> > 5 files changed, 6 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/video/backlight/backlight.c
> > b/drivers/video/backlight/backlight.c
> > index 1ef8b6fd62ac..5dc07106a59e 100644
> > --- a/drivers/video/backlight/backlight.c
> > +++ b/drivers/video/backlight/backlight.c
> > @@ -47,7 +47,7 @@ static int fb_notifier_callback(struct notifier_block
> > *self,
> > int fb_blank = 0;
> >
> > /* If we aren't interested in this event, skip it immediately ... */
> > - if (event != FB_EVENT_BLANK && event != FB_EVENT_CONBLANK)
> > + if (event != FB_EVENT_BLANK)
> > return 0;
> >
> > bd = container_of(self, struct backlight_device, fb_notif);
> > diff --git a/drivers/video/fbdev/core/fbcon.c
> > b/drivers/video/fbdev/core/fbcon.c
> > index ef69bd4ad343..a4617067ff24 100644
> > --- a/drivers/video/fbdev/core/fbcon.c
> > +++ b/drivers/video/fbdev/core/fbcon.c
> > @@ -2350,8 +2350,6 @@ static int fbcon_switch(struct vc_data *vc)
> > static void fbcon_generic_blank(struct vc_data *vc, struct fb_info *info,
> > int blank)
> > {
> > - struct fb_event event;
> > -
> > if (blank) {
> > unsigned short charmask = vc->vc_hi_font_mask ?
> > 0x1ff : 0xff;
> > @@ -2362,13 +2360,6 @@ static void fbcon_generic_blank(struct vc_data *vc,
> > struct fb_info *info,
> > fbcon_clear(vc, 0, 0, vc->vc_rows, vc->vc_cols);
> > vc->vc_video_erase_char = oldc;
> > }
> > -
> > -
> > - lock_fb_info(info);
> > - event.info = info;
> > - event.data =
> > - fb_notifier_call_chain(FB_EVENT_CONBLANK, );
> > - unlock_fb_info(info);
> > }
> >
> > static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch)
> > @@ -3240,7 +3231,7 @@ int fbcon_fb_registered(struct fb_info *info)
> > return ret;
> > }
> >
> > -static void fbcon_fb_blanked(struct fb_info *info, int blank)
> > +void fbcon_fb_blanked(struct fb_info *info, int blank)
> > {
> > struct fbcon_ops *ops = info->fbcon_par;
> > struct vc_data *vc;
> > @@ -3344,9 +3335,6 @@ static int fbcon_event_notify(struct notifier_block
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gtt: Skip initializing PT with scratch if full
== Series Details ==
Series: drm/i915/gtt: Skip initializing PT with scratch if full
URL : https://patchwork.freedesktop.org/series/61900/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13244
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/
Known issues
Here are the changes found in Patchwork_13244 that come from known issues:
### IGT changes ###
Possible fixes
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][1] ([fdo#107713] / [fdo#108569]) ->
[PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4] +2
similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][5] ([fdo#110235]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 46)
--
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-icl-dsi fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13244
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13244: 6afacc870ab4db22e38e551f137a51adef226cfb @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6afacc870ab4 drm/i915/gtt: Skip initializing PT with scratch if full
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13244/
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: Skip initializing PT with scratch if full
== Series Details ==
Series: drm/i915/gtt: Skip initializing PT with scratch if full
URL : https://patchwork.freedesktop.org/series/61900/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6afacc870ab4 drm/i915/gtt: Skip initializing PT with scratch if full
-:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#9:
References: 14826673247e ("drm/i915: Only initialize partially filled
pagetables")
-:9: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 14826673247e ("drm/i915: Only
initialize partially filled pagetables")'
#9:
References: 14826673247e ("drm/i915: Only initialize partially filled
pagetables")
total: 1 errors, 1 warnings, 0 checks, 9 lines checked
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Check the right binding exists in i915_vma_misplaced()
== Series Details ==
Series: drm/i915: Check the right binding exists in i915_vma_misplaced()
URL : https://patchwork.freedesktop.org/series/61899/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13243
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_13243 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_13243, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_13243:
### IGT changes ###
Possible regressions
* igt@runner@aborted:
- fi-ilk-650: NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-ilk-650/igt@run...@aborted.html
- fi-pnv-d510:NOTRUN -> [FAIL][2]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-pnv-d510/igt@run...@aborted.html
- fi-bdw-gvtdvm: NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-bdw-gvtdvm/igt@run...@aborted.html
- fi-gdg-551: NOTRUN -> [FAIL][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-gdg-551/igt@run...@aborted.html
- fi-snb-2520m: NOTRUN -> [FAIL][5]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-snb-2520m/igt@run...@aborted.html
- fi-bxt-j4205: NOTRUN -> [FAIL][6]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-bxt-j4205/igt@run...@aborted.html
- fi-whl-u: NOTRUN -> [FAIL][7]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-whl-u/igt@run...@aborted.html
- fi-cml-u2: NOTRUN -> [FAIL][8]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-cml-u2/igt@run...@aborted.html
- fi-cml-u: NOTRUN -> [FAIL][9]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-cml-u/igt@run...@aborted.html
- fi-ivb-3770:NOTRUN -> [FAIL][10]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-ivb-3770/igt@run...@aborted.html
- fi-bxt-dsi: NOTRUN -> [FAIL][11]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-bxt-dsi/igt@run...@aborted.html
- fi-byt-j1900: NOTRUN -> [FAIL][12]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-byt-j1900/igt@run...@aborted.html
- fi-bsw-n3050: NOTRUN -> [FAIL][13]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-bsw-n3050/igt@run...@aborted.html
- fi-blb-e6850: NOTRUN -> [FAIL][14]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-blb-e6850/igt@run...@aborted.html
- fi-bsw-kefka: NOTRUN -> [FAIL][15]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-bsw-kefka/igt@run...@aborted.html
- fi-bdw-5557u: NOTRUN -> [FAIL][16]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-bdw-5557u/igt@run...@aborted.html
- fi-byt-n2820: NOTRUN -> [FAIL][17]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-byt-n2820/igt@run...@aborted.html
- fi-elk-e7500: NOTRUN -> [FAIL][18]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-elk-e7500/igt@run...@aborted.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@runner@aborted:
- {fi-apl-guc}: NOTRUN -> [FAIL][19]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/fi-apl-guc/igt@run...@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Participating hosts (54 -> 47)
--
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13243
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13243: b5965dc7fa393ea25430e72b6364f75fa6a4f34f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b5965dc7fa39 drm/i915: Check the right binding exists in i915_vma_misplaced()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13243/
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hangcheck: Look at instdone for all engines
== Series Details ==
Series: drm/i915/hangcheck: Look at instdone for all engines
URL : https://patchwork.freedesktop.org/series/61843/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13223_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_13223_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_eio@in-flight-suspend:
- shard-kbl: [PASS][1] -> [FAIL][2] ([fdo#110667])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-kbl4/igt@gem_...@in-flight-suspend.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-kbl3/igt@gem_...@in-flight-suspend.html
* igt@gem_persistent_relocs@forked-thrash-inactive:
- shard-glk: [PASS][3] -> [INCOMPLETE][4] ([fdo#103359] /
[k.org#198133])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk4/igt@gem_persistent_rel...@forked-thrash-inactive.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-glk4/igt@gem_persistent_rel...@forked-thrash-inactive.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl7/igt@i915_susp...@sysfs-reader.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-apl5/igt@i915_susp...@sysfs-reader.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-hsw: [PASS][7] -> [INCOMPLETE][8] ([fdo#103540])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw6/igt@kms_f...@2x-flip-vs-suspend-interruptible.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-hsw5/igt@kms_f...@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][9] -> [FAIL][10] ([fdo#105363])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl2/igt@kms_f...@flip-vs-expired-vblank.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-skl6/igt@kms_f...@flip-vs-expired-vblank.html
* igt@kms_flip_tiling@flip-changes-tiling:
- shard-skl: [PASS][11] -> [FAIL][12] ([fdo#108303])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_flip_til...@flip-changes-tiling.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-skl7/igt@kms_flip_til...@flip-changes-tiling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
- shard-hsw: [PASS][13] -> [SKIP][14] ([fdo#109271]) +13 similar
issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw6/igt@kms_frontbuffer_track...@fbc-2p-primscrn-cur-indfb-draw-render.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +4 similar
issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb3/igt@kms_frontbuffer_track...@fbc-rgb565-draw-blt.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-iclb8/igt@kms_frontbuffer_track...@fbc-rgb565-draw-blt.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-skl7/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html
* igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103166])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-y.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-iclb1/igt@kms_plane_low...@pipe-a-tiling-y.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][21] -> [FAIL][22] ([fdo#99912])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl4/igt@kms_setm...@basic.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-apl3/igt@kms_setm...@basic.html
Possible fixes
* {igt@gem_ctx_engines@execute-oneforall}:
- shard-snb: [DMESG-WARN][23] ([fdo#110869]) -> [PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-snb4/igt@gem_ctx_engi...@execute-oneforall.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13223/shard-snb1/igt@gem_ctx_engi...@execute-oneforall.html
* {igt@gem_exec_balancer@smoke}:
- shard-iclb: [SKIP][25] ([fdo#110854]) ->
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Nuke atomic set/get prop plane stubs
== Series Details ==
Series: drm/i915: Nuke atomic set/get prop plane stubs
URL : https://patchwork.freedesktop.org/series/61898/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13242
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/
Known issues
Here are the changes found in Patchwork_13242 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/fi-icl-u3/igt@gem_mmap_...@basic-write-cpu-read-gtt.html
* igt@i915_selftest@live_evict:
- fi-bsw-kefka: [PASS][3] -> [DMESG-WARN][4] ([fdo#107709])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bsw-kefka/igt@i915_selftest@live_evict.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/fi-bsw-kefka/igt@i915_selftest@live_evict.html
Possible fixes
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +2
similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][7] ([fdo#110235]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107707]: https://bugs.freedesktop.org/show_bug.cgi?id=107707
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 46)
--
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-icl-dsi fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13242
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13242: c6331db8dd66dda6869472c97e1c59a326f3d1c6 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c6331db8dd66 drm/i915: Nuke atomic set/get prop plane stubs
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13242/
___
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[Intel-gfx] [PATCH] drm/i915: Prevent lock-cycles between GPU waits and GPU resets
We cannot allow ourselves to wait on the GPU while holding any lock we
may need to reset the GPU. While there is not an explicit lock between
the two operations, lockdep cannot detect the dependency. So let's tell
lockdep about the wait/reset dependency with an explicit lockmap.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_reset.c | 5 -
drivers/gpu/drm/i915/i915_drv.h | 8
drivers/gpu/drm/i915/i915_gem.c | 3 +++
drivers/gpu/drm/i915/i915_request.c | 2 ++
4 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 60d24110af80..6368b37f26d1 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -978,10 +978,11 @@ void i915_reset(struct drm_i915_private *i915,
might_sleep();
GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, >flags));
+ lock_map_acquire(>gt.reset_lockmap);
/* Clear any previous failed attempts at recovery. Time to try again. */
if (!__i915_gem_unset_wedged(i915))
- return;
+ goto unlock;
if (reason)
dev_notice(i915->drm.dev, "Resetting chip for %s\n", reason);
@@ -1029,6 +1030,8 @@ void i915_reset(struct drm_i915_private *i915,
finish:
reset_finish(i915);
+unlock:
+ lock_map_release(>gt.reset_lockmap);
return;
taint:
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0ea7f78ae227..9cfa9500fcc4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1919,6 +1919,14 @@ struct drm_i915_private {
ktime_t last_init_time;
struct i915_vma *scratch;
+
+ /*
+* We must never wait on the GPU while holding a lock we may
+* need to perform a GPU reset. So while we don't need to
+* serialise wait/reset with an explicit lock, we do want
+* lockdep to detect potential dependency cycles.
+*/
+ struct lockdep_map reset_lockmap;
} gt;
struct {
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e980c1ee3dcf..24f0f3db1bfb 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1782,6 +1782,7 @@ static void i915_gem_init__mm(struct drm_i915_private
*i915)
int i915_gem_init_early(struct drm_i915_private *dev_priv)
{
+ static struct lock_class_key reset_key;
int err;
intel_gt_pm_init(dev_priv);
@@ -1789,6 +1790,8 @@ int i915_gem_init_early(struct drm_i915_private *dev_priv)
INIT_LIST_HEAD(_priv->gt.active_rings);
INIT_LIST_HEAD(_priv->gt.closed_vma);
spin_lock_init(_priv->gt.closed_lock);
+ lockdep_init_map(_priv->gt.reset_lockmap,
+"i915.reset", _key, 0);
i915_gem_init__mm(dev_priv);
i915_gem_init__pm(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index e9b59eea4f10..1cbc3ef4fc27 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -1444,6 +1444,7 @@ long i915_request_wait(struct i915_request *rq,
return -ETIME;
trace_i915_request_wait_begin(rq, flags);
+ lock_map_acquire(>i915->gt.reset_lockmap);
/*
* Optimistic spin before touching IRQs.
@@ -1517,6 +1518,7 @@ long i915_request_wait(struct i915_request *rq,
dma_fence_remove_callback(>fence, );
out:
+ lock_map_release(>i915->gt.reset_lockmap);
trace_i915_request_wait_end(rq);
return timeout;
}
--
2.20.1
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gtt: Skip initializing PT with scratch if full
If we will completely overwrite the PT with PTEs for the object, we can
forgo filling it with scratch entries.
References: 14826673247e ("drm/i915: Only initialize partially filled
pagetables")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index daecbf91efc6..6f437b28fe2a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1846,7 +1846,8 @@ static int gen6_alloc_va_range(struct i915_address_space
*vm,
if (IS_ERR(pt))
goto unwind_out;
- gen6_initialize_pt(vm, pt);
+ if (count < GEN6_PTES)
+ gen6_initialize_pt(vm, pt);
old = cmpxchg(>base.pd.page_table[pde],
vm->scratch_pt, pt);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 00/33] fbcon notifier begone v3!
On Fri, Jun 07, 2019 at 12:07:55PM +0200, Bartlomiej Zolnierkiewicz wrote: > > On 6/6/19 9:38 AM, Daniel Vetter wrote: > > Hi Bart, > > Hi Daniel, > > > On Tue, May 28, 2019 at 11:02:31AM +0200, Daniel Vetter wrote: > >> Hi all, > >> > >> I think we're slowly getting there. Previous cover letters with more > >> context: > >> > >> https://lists.freedesktop.org/archives/dri-devel/2019-May/218362.html > >> > >> tldr; I have a multi-year plan to improve fbcon locking, because the > >> current thing is a bit a mess. > >> > >> Cover letter of this version, where I detail a bit more the details > >> fixed in this one here: > >> > >> https://lists.freedesktop.org/archives/dri-devel/2019-May/218984.html > >> > >> Note that the locking plan in this one is already outdated, I overlooked a > >> few fun issues around any printk() going back to console_lock. > >> > >> I think remaining bits: > >> > >> - Ack from Daniel Thompson for the backlight bits, he wanted to check the > >> big picture. > > > > I think Daniel is still on vacation until next week or so. Thanks for spotting that. As it happens the e-mail asking for extra detail was just about the last thing I sent before going on holiday (exactly to try and avoid round trips this wee ;-) ). > > > >> - Hash out actual merge plan. > > > > I'd like to stuff this into drm.git somehow, I guess topic branch works > > too. > > I would like to have topic branch for this patchset. From a backlight perspective its Lee Jones who hoovers up the patches and worries about hiding merge conflicts from Linus. I'll let him follow up if needed but I suspect he'd like an immutable branch to work from also. Daniel. > > > Long term I think we need to reconsider how we handle fbdev, at least the > > core/fbcon pieces. Since a few years all the work in that area has been > > motivated by drm, and pushed by drm contributors. Having that maintained > > in a separate tree that doesn't regularly integrate imo doesn't make much > > sense, and we ended up merging almost everything through some drm tree. > > That one time we didn't (for some panel rotation stuff) it resulted in > > some good suprises. > > > > I think best solution is if we put the core and fbcon bits into drm-misc, > > as group maintained infrastructure piece. All the other gfx infra pieces > > are maintained in there already too. You'd obviously get commit rights. > > I think that would include > > - drivers/video/fbdev > > - drivers/video/*c > > - drivers/video/console > > Sounds fine to me. > > > I don't really care about what happens with the actual fbdev drivers > > (aside from the drm one in drm_fb_helper.c, but that's already maintained > > as part of drm). I guess we could also put those into drm-misc, or as a > > separate tree, depending what you want. > > > > Thoughts? > > I would like to handle fbdev changes for v5.3 merge window using fbdev > tree but after that everything (including changes to fbdev drivers) can go > through drm-misc tree. > > Best regards, > -- > Bartlomiej Zolnierkiewicz > Samsung R Institute Poland > Samsung Electronics > > > Cheers, Daniel > > > > > >> > >> I'm also cc'ing the entire pile to a lot more people on request. > >> > >> Thanks, Daniel > >> > >> Daniel Vetter (33): > >> dummycon: Sprinkle locking checks > >> fbdev: locking check for fb_set_suspend > >> vt: might_sleep() annotation for do_blank_screen > >> vt: More locking checks > >> fbdev/sa1100fb: Remove dead code > >> fbdev/cyber2000: Remove struct display > >> fbdev/aty128fb: Remove dead code > >> fbcon: s/struct display/struct fbcon_display/ > >> fbcon: Remove fbcon_has_exited > >> fbcon: call fbcon_fb_(un)registered directly > >> fbdev/sh_mobile: remove sh_mobile_lcdc_display_notify > >> fbdev/omap: sysfs files can't disappear before the device is gone > >> fbdev: sysfs files can't disappear before the device is gone > >> staging/olpc: lock_fb_info can't fail > >> fbdev/atyfb: lock_fb_info can't fail > >> fbdev: lock_fb_info cannot fail > >> fbcon: call fbcon_fb_bind directly > >> fbdev: make unregister/unlink functions not fail > >> fbdev: unify unlink_framebuffer paths > >> fbdev/sh_mob: Remove fb notifier callback > >> fbdev: directly call fbcon_suspended/resumed > >> fbcon: Call fbcon_mode_deleted/new_modelist directly > >> fbdev: Call fbcon_get_requirement directly > >> Revert "backlight/fbcon: Add FB_EVENT_CONBLANK" > >> fbmem: pull fbcon_fb_blanked out of fb_blank > >> fbdev: remove FBINFO_MISC_USEREVENT around fb_blank > >> fb: Flatten control flow in fb_set_var > >> fbcon: replace FB_EVENT_MODE_CHANGE/_ALL with direct calls > >> vgaswitcheroo: call fbcon_remap_all directly > >> fbcon: Call con2fb_map functions directly > >> fbcon: Document what I learned about fbcon locking > >> staging/olpc_dcon: Add drm conversion to TODO > >> backlight: simplify lcd notifier > >> > >> arch/arm/mach-pxa/am200epd.c | 13 +- >
Re: [Intel-gfx] [PATCH 33/33] backlight: simplify lcd notifier
On Tue, May 28, 2019 at 11:03:04AM +0200, Daniel Vetter wrote:
> With all the work I've done on replacing fb notifier calls with direct
> calls into fbcon the backlight/lcd notifier is the only user left.
>
> It will only receive events now that it cares about, hence we can
> remove this check.
>
> Signed-off-by: Daniel Vetter
> Reviewed-by: Sam Ravnborg
> Reviewed-by: Maarten Lankhorst
> Cc: Lee Jones
> Cc: Daniel Thompson
> Cc: Jingoo Han
Acked-by: Daniel Thompson
> ---
> drivers/video/backlight/lcd.c | 11 ---
> 1 file changed, 11 deletions(-)
>
> diff --git a/drivers/video/backlight/lcd.c b/drivers/video/backlight/lcd.c
> index ecdda06989d0..d6b653aa4ee9 100644
> --- a/drivers/video/backlight/lcd.c
> +++ b/drivers/video/backlight/lcd.c
> @@ -30,17 +30,6 @@ static int fb_notifier_callback(struct notifier_block
> *self,
> struct lcd_device *ld;
> struct fb_event *evdata = data;
>
> - /* If we aren't interested in this event, skip it immediately ... */
> - switch (event) {
> - case FB_EVENT_BLANK:
> - case FB_EVENT_MODE_CHANGE:
> - case FB_EARLY_EVENT_BLANK:
> - case FB_R_EARLY_EVENT_BLANK:
> - break;
> - default:
> - return 0;
> - }
> -
> ld = container_of(self, struct lcd_device, fb_notif);
> if (!ld->ops)
> return 0;
> --
> 2.20.1
>
___
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Re: [Intel-gfx] [PATCH 28/33] fbcon: replace FB_EVENT_MODE_CHANGE/_ALL with direct calls
On Tue, May 28, 2019 at 11:02:59AM +0200, Daniel Vetter wrote:
> Create a new wrapper function for this, feels like there's some
> refactoring room here between the two modes.
>
> v2: backlight notifier is also interested in the mode change event,
> it calls lcd->set_mode, of which there are 3 implementations. Thanks
> to Maarten for spotting this. So we keep that. We can ditch the
> differentiation
> between mode change and all mode changes (because backlight notifier
> doesn't care), and we can drop the FBINFO_MISC_USEREVENT stuff too,
> because that's just to prevent recursion between fbmem.c and fbcon.c.
>
> While at it flatten the control flow a bit.
>
> v3: Need to add a static inline to the dummy function.
>
> v4: Add missing #include to sh_mob (Sam).
>
> Cc: Sam Ravnborg
> Signed-off-by: Daniel Vetter
> Reviewed-by: Sam Ravnborg
> Reviewed-by: Maarten Lankhorst
> Cc: Maarten Lankhorst
> Cc: Lee Jones
> Cc: Daniel Thompson
> Cc: Jingoo Han
> Cc: Bartlomiej Zolnierkiewicz
> Cc: Daniel Vetter
> Cc: Hans de Goede
> Cc: Yisheng Xie
> Cc: "Michał Mirosław"
> Cc: Peter Rosin
> Cc: Mikulas Patocka
> Cc: linux-fb...@vger.kernel.org
Acked-by: Daniel Thompson
> ---
> drivers/video/backlight/lcd.c | 1 -
> drivers/video/fbdev/core/fbcon.c | 15 +--
> drivers/video/fbdev/core/fbmem.c | 21 ++---
> drivers/video/fbdev/sh_mobile_lcdcfb.c | 12 ++--
> include/linux/fb.h | 2 --
> include/linux/fbcon.h | 2 ++
> 6 files changed, 23 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/video/backlight/lcd.c b/drivers/video/backlight/lcd.c
> index 151b18776add..ecdda06989d0 100644
> --- a/drivers/video/backlight/lcd.c
> +++ b/drivers/video/backlight/lcd.c
> @@ -34,7 +34,6 @@ static int fb_notifier_callback(struct notifier_block *self,
> switch (event) {
> case FB_EVENT_BLANK:
> case FB_EVENT_MODE_CHANGE:
> - case FB_EVENT_MODE_CHANGE_ALL:
> case FB_EARLY_EVENT_BLANK:
> case FB_R_EARLY_EVENT_BLANK:
> break;
> diff --git a/drivers/video/fbdev/core/fbcon.c
> b/drivers/video/fbdev/core/fbcon.c
> index b5ee89f16d6c..e98551f96138 100644
> --- a/drivers/video/fbdev/core/fbcon.c
> +++ b/drivers/video/fbdev/core/fbcon.c
> @@ -3009,6 +3009,15 @@ static void fbcon_set_all_vcs(struct fb_info *info)
> fbcon_modechanged(info);
> }
>
> +
> +void fbcon_update_vcs(struct fb_info *info, bool all)
> +{
> + if (all)
> + fbcon_set_all_vcs(info);
> + else
> + fbcon_modechanged(info);
> +}
> +
> int fbcon_mode_deleted(struct fb_info *info,
> struct fb_videomode *mode)
> {
> @@ -3318,12 +3327,6 @@ static int fbcon_event_notify(struct notifier_block
> *self,
> int idx, ret = 0;
>
> switch(action) {
> - case FB_EVENT_MODE_CHANGE:
> - fbcon_modechanged(info);
> - break;
> - case FB_EVENT_MODE_CHANGE_ALL:
> - fbcon_set_all_vcs(info);
> - break;
> case FB_EVENT_SET_CONSOLE_MAP:
> /* called with console lock held */
> con2fb = event->data;
> diff --git a/drivers/video/fbdev/core/fbmem.c
> b/drivers/video/fbdev/core/fbmem.c
> index 96805fe85332..dd1a708df1a7 100644
> --- a/drivers/video/fbdev/core/fbmem.c
> +++ b/drivers/video/fbdev/core/fbmem.c
> @@ -957,6 +957,7 @@ fb_set_var(struct fb_info *info, struct fb_var_screeninfo
> *var)
> u32 activate;
> struct fb_var_screeninfo old_var;
> struct fb_videomode mode;
> + struct fb_event event;
>
> if (var->activate & FB_ACTIVATE_INV_MODE) {
> struct fb_videomode mode1, mode2;
> @@ -1039,19 +1040,17 @@ fb_set_var(struct fb_info *info, struct
> fb_var_screeninfo *var)
> !list_empty(>modelist))
> ret = fb_add_videomode(, >modelist);
>
> - if (!ret && (flags & FBINFO_MISC_USEREVENT)) {
> - struct fb_event event;
> - int evnt = (activate & FB_ACTIVATE_ALL) ?
> - FB_EVENT_MODE_CHANGE_ALL :
> - FB_EVENT_MODE_CHANGE;
> + if (ret)
> + return ret;
>
> - info->flags &= ~FBINFO_MISC_USEREVENT;
> - event.info = info;
> - event.data =
> - fb_notifier_call_chain(evnt, );
> - }
> + event.info = info;
> + event.data =
> + fb_notifier_call_chain(FB_EVENT_MODE_CHANGE, );
>
> - return ret;
> + if (flags & FBINFO_MISC_USEREVENT)
> + fbcon_update_vcs(info, activate & FB_ACTIVATE_ALL);
> +
> + return 0;
> }
> EXPORT_SYMBOL(fb_set_var);
>
> diff --git a/drivers/video/fbdev/sh_mobile_lcdcfb.c
> b/drivers/video/fbdev/sh_mobile_lcdcfb.c
> index 015a02a29d37..b8454424910d 100644
> --- a/drivers/video/fbdev/sh_mobile_lcdcfb.c
> +++ b/drivers/video/fbdev/sh_mobile_lcdcfb.c
> @@ -15,6 +15,7 @@
> #include
> #include
> #include
>
Re: [Intel-gfx] [PATCH 24/33] Revert "backlight/fbcon: Add FB_EVENT_CONBLANK"
On Tue, May 28, 2019 at 11:02:55AM +0200, Daniel Vetter wrote:
> This reverts commit 994efacdf9a087b52f71e620b58dfa526b0cf928.
>
> The justification is that if hw blanking fails (i.e. fbops->fb_blank)
> fails, then we still want to shut down the backlight. Which is exactly
> _not_ what fb_blank() does and so rather inconsistent if we end up
> with different behaviour between fbcon and direct fbdev usage. Given
> that the entire notifier maze is getting in the way anyway I figured
> it's simplest to revert this not well justified commit.
>
> v2: Add static inline to the dummy version.
>
> Cc: Richard Purdie
> Signed-off-by: Daniel Vetter
> Reviewed-by: Sam Ravnborg
> Reviewed-by: Maarten Lankhorst
> Cc: Lee Jones
> Cc: Daniel Thompson
> Cc: Jingoo Han
> Cc: Bartlomiej Zolnierkiewicz
> Cc: Daniel Vetter
> Cc: Hans de Goede
> Cc: Yisheng Xie
> Cc: linux-fb...@vger.kernel.org
This was the main patch where I wanted the bigger picture ;-) and TBH
I'm still in two minds here. I don't personally view fbcon as
inconsistent, more that, as an in-kernel service it might have to do
more that something more complicated than freak out and let userspace
decide what to do next.
However... since I'm struggling to make up my mind, I can't think of
many products that would ship reliant exclusively on fbcon *and* this
patch is more about fbcon than backlight then I figure that, from a
backlight perspective:
Acked-by: Daniel Thompson
Daniel.
> ---
> drivers/video/backlight/backlight.c | 2 +-
> drivers/video/fbdev/core/fbcon.c| 14 +-
> drivers/video/fbdev/core/fbmem.c| 1 +
> include/linux/fb.h | 4 +---
> include/linux/fbcon.h | 2 ++
> 5 files changed, 6 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/video/backlight/backlight.c
> b/drivers/video/backlight/backlight.c
> index 1ef8b6fd62ac..5dc07106a59e 100644
> --- a/drivers/video/backlight/backlight.c
> +++ b/drivers/video/backlight/backlight.c
> @@ -47,7 +47,7 @@ static int fb_notifier_callback(struct notifier_block *self,
> int fb_blank = 0;
>
> /* If we aren't interested in this event, skip it immediately ... */
> - if (event != FB_EVENT_BLANK && event != FB_EVENT_CONBLANK)
> + if (event != FB_EVENT_BLANK)
> return 0;
>
> bd = container_of(self, struct backlight_device, fb_notif);
> diff --git a/drivers/video/fbdev/core/fbcon.c
> b/drivers/video/fbdev/core/fbcon.c
> index ef69bd4ad343..a4617067ff24 100644
> --- a/drivers/video/fbdev/core/fbcon.c
> +++ b/drivers/video/fbdev/core/fbcon.c
> @@ -2350,8 +2350,6 @@ static int fbcon_switch(struct vc_data *vc)
> static void fbcon_generic_blank(struct vc_data *vc, struct fb_info *info,
> int blank)
> {
> - struct fb_event event;
> -
> if (blank) {
> unsigned short charmask = vc->vc_hi_font_mask ?
> 0x1ff : 0xff;
> @@ -2362,13 +2360,6 @@ static void fbcon_generic_blank(struct vc_data *vc,
> struct fb_info *info,
> fbcon_clear(vc, 0, 0, vc->vc_rows, vc->vc_cols);
> vc->vc_video_erase_char = oldc;
> }
> -
> -
> - lock_fb_info(info);
> - event.info = info;
> - event.data =
> - fb_notifier_call_chain(FB_EVENT_CONBLANK, );
> - unlock_fb_info(info);
> }
>
> static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch)
> @@ -3240,7 +3231,7 @@ int fbcon_fb_registered(struct fb_info *info)
> return ret;
> }
>
> -static void fbcon_fb_blanked(struct fb_info *info, int blank)
> +void fbcon_fb_blanked(struct fb_info *info, int blank)
> {
> struct fbcon_ops *ops = info->fbcon_par;
> struct vc_data *vc;
> @@ -3344,9 +3335,6 @@ static int fbcon_event_notify(struct notifier_block
> *self,
> con2fb = event->data;
> con2fb->framebuffer = con2fb_map[con2fb->console - 1];
> break;
> - case FB_EVENT_BLANK:
> - fbcon_fb_blanked(info, *(int *)event->data);
> - break;
> case FB_EVENT_REMAP_ALL_CONSOLE:
> idx = info->node;
> fbcon_remap_all(idx);
> diff --git a/drivers/video/fbdev/core/fbmem.c
> b/drivers/video/fbdev/core/fbmem.c
> index ddc0c16b8bbf..9366fbe99a58 100644
> --- a/drivers/video/fbdev/core/fbmem.c
> +++ b/drivers/video/fbdev/core/fbmem.c
> @@ -1068,6 +1068,7 @@ fb_blank(struct fb_info *info, int blank)
> event.data =
>
> early_ret = fb_notifier_call_chain(FB_EARLY_EVENT_BLANK, );
> + fbcon_fb_blanked(info, blank);
>
> if (info->fbops->fb_blank)
> ret = info->fbops->fb_blank(blank, info);
> diff --git a/include/linux/fb.h b/include/linux/fb.h
> index 0d86aa31bf8d..1e66fac3124f 100644
> --- a/include/linux/fb.h
> +++ b/include/linux/fb.h
> @@ -137,12 +137,10 @@ struct fb_cursor_user {
> #define FB_EVENT_GET_CONSOLE_MAP0x07
> /* CONSOLE-SPECIFIC: set console to framebuffer mapping */
>
[Intel-gfx] [PATCH] drm/i915: Check the right binding exists in i915_vma_misplaced()
As a final check, after checking the various alignment and placement, check that we exist in the right binding alias. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_vma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index 80050f6a0893..adecd7e16647 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -473,7 +473,7 @@ bool i915_vma_misplaced(const struct i915_vma *vma, vma->node.start != (flags & PIN_OFFSET_MASK)) return true; - return false; + return (vma->flags & flags & I915_VMA_BIND_MASK) == 0; } void __i915_vma_set_map_and_fenceable(struct i915_vma *vma) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Make read_subslice_reg take engine
== Series Details == Series: drm/i915: Make read_subslice_reg take engine URL : https://patchwork.freedesktop.org/series/61841/ State : success == Summary == CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13222_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_13222_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@rcs0-s3: - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl7/igt@gem_ctx_isolat...@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-apl6/igt@gem_ctx_isolat...@rcs0-s3.html * igt@gem_tiled_swapping@non-threaded: - shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108686]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-kbl4/igt@gem_tiled_swapp...@non-threaded.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-kbl1/igt@gem_tiled_swapp...@non-threaded.html * igt@i915_pm_rpm@fences: - shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713] / [fdo#108840]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb4/igt@i915_pm_...@fences.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-iclb7/igt@i915_pm_...@fences.html * igt@kms_flip@2x-flip-vs-suspend-interruptible: - shard-hsw: [PASS][7] -> [INCOMPLETE][8] ([fdo#103540]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw6/igt@kms_f...@2x-flip-vs-suspend-interruptible.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-hsw5/igt@kms_f...@2x-flip-vs-suspend-interruptible.html * igt@kms_flip@dpms-vs-vblank-race-interruptible: - shard-glk: [PASS][9] -> [FAIL][10] ([fdo#103060]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk8/igt@kms_f...@dpms-vs-vblank-race-interruptible.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-glk8/igt@kms_f...@dpms-vs-vblank-race-interruptible.html * igt@kms_flip@flip-vs-expired-vblank: - shard-apl: [PASS][11] -> [FAIL][12] ([fdo#102887] / [fdo#105363]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl4/igt@kms_f...@flip-vs-expired-vblank.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-apl3/igt@kms_f...@flip-vs-expired-vblank.html * igt@kms_flip_tiling@flip-changes-tiling: - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108303]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_flip_til...@flip-changes-tiling.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-skl6/igt@kms_flip_til...@flip-changes-tiling.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt: - shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb7/igt@kms_frontbuffer_track...@fbc-1p-primscrn-shrfb-plflip-blt.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-iclb4/igt@kms_frontbuffer_track...@fbc-1p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move: - shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +23 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw5/igt@kms_frontbuffer_track...@fbc-2p-scndscrn-spr-indfb-move.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-scndscrn-spr-indfb-move.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: [PASS][19] -> [INCOMPLETE][20] ([fdo#106978] / [fdo#107713]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb3/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-draw-blt.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-iclb1/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-draw-blt.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-skl: [PASS][21] -> [INCOMPLETE][22] ([fdo#104108]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl6/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-c.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13222/shard-skl5/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-c.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html [24]:
[Intel-gfx] [PATCH] drm/i915: Nuke atomic set/get prop plane stubs
They have been unused since rotation was added to drm core in 2015,
time to get rid of them.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 45 ---
drivers/gpu/drm/i915/intel_atomic_plane.h | 8
drivers/gpu/drm/i915/intel_display.c | 6 ---
drivers/gpu/drm/i915/intel_sprite.c | 8
4 files changed, 67 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 58ea1b672a1a..30bd4e76fff9 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -353,48 +353,3 @@ const struct drm_plane_helper_funcs
intel_plane_helper_funcs = {
.cleanup_fb = intel_cleanup_plane_fb,
.atomic_check = intel_plane_atomic_check,
};
-
-/**
- * intel_plane_atomic_get_property - fetch plane property value
- * @plane: plane to fetch property for
- * @state: state containing the property value
- * @property: property to look up
- * @val: pointer to write property value into
- *
- * The DRM core does not store shadow copies of properties for
- * atomic-capable drivers. This entrypoint is used to fetch
- * the current value of a driver-specific plane property.
- */
-int
-intel_plane_atomic_get_property(struct drm_plane *plane,
- const struct drm_plane_state *state,
- struct drm_property *property,
- u64 *val)
-{
- DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
- property->base.id, property->name);
- return -EINVAL;
-}
-
-/**
- * intel_plane_atomic_set_property - set plane property value
- * @plane: plane to set property for
- * @state: state to update property value in
- * @property: property to set
- * @val: value to set property to
- *
- * Writes the specified property value for a plane into the provided atomic
- * state object.
- *
- * Returns 0 on success, -EINVAL on unrecognized properties
- */
-int
-intel_plane_atomic_set_property(struct drm_plane *plane,
- struct drm_plane_state *state,
- struct drm_property *property,
- u64 val)
-{
- DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
- property->base.id, property->name);
- return -EINVAL;
-}
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.h
b/drivers/gpu/drm/i915/intel_atomic_plane.h
index 24320041498d..1437a8797e10 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.h
@@ -42,14 +42,6 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
struct intel_crtc_state *crtc_state,
const struct intel_plane_state
*old_plane_state,
struct intel_plane_state *intel_state);
-int intel_plane_atomic_get_property(struct drm_plane *plane,
- const struct drm_plane_state *state,
- struct drm_property *property,
- u64 *val);
-int intel_plane_atomic_set_property(struct drm_plane *plane,
- struct drm_plane_state *state,
- struct drm_property *property,
- u64 val);
int intel_plane_atomic_calc_changes(const struct intel_crtc_state
*old_crtc_state,
struct drm_crtc_state *crtc_state,
const struct intel_plane_state
*old_plane_state,
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 62fa573f90e8..5d497627ffd0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14458,8 +14458,6 @@ static const struct drm_plane_funcs i965_plane_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
.destroy = intel_plane_destroy,
- .atomic_get_property = intel_plane_atomic_get_property,
- .atomic_set_property = intel_plane_atomic_set_property,
.atomic_duplicate_state = intel_plane_duplicate_state,
.atomic_destroy_state = intel_plane_destroy_state,
.format_mod_supported = i965_plane_format_mod_supported,
@@ -14469,8 +14467,6 @@ static const struct drm_plane_funcs i8xx_plane_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
.destroy = intel_plane_destroy,
- .atomic_get_property = intel_plane_atomic_get_property,
- .atomic_set_property = intel_plane_atomic_set_property,
.atomic_duplicate_state = intel_plane_duplicate_state,
.atomic_destroy_state = intel_plane_destroy_state,
Re: [Intel-gfx] [PATCH v4 2/2] drm/i915: Make GuC GGTT reservation work on ggtt
On Tue, 11 Jun 2019 15:13:21 +0200, Tvrtko Ursulin
wrote:
Michal,
On 11/06/2019 13:23, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Michal)
v3:
* Add comment explaining reason for reservation, add assert and fix
error message. (Michal)
v4:
* Fix checkpatch error.
Signed-off-by: Tvrtko Ursulin
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
I've assumed I would be able to implement your small suggestions
correctly so I've kept the r-b. Could you just give it a quick glance
over to see if that is indeed true.
It's ok, r-b is valid.
Michal
Regards,
Tvrtko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 43 -
drivers/gpu/drm/i915/intel_guc.c| 27 --
drivers/gpu/drm/i915/intel_guc.h| 2 --
3 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5b5125ee49f3..c13b52b66ef1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2807,6 +2807,32 @@ static void fini_aliasing_ppgtt(struct
drm_i915_private *i915)
ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
+static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
+{
+ u64 size;
+ int ret;
+
+ if (!USES_GUC(ggtt->vm.i915))
+ return 0;
+
+ GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
+ size = ggtt->vm.total - GUC_GGTT_TOP;
+
+ ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
+ GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+ PIN_NOEVICT);
+ if (ret)
+ DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
+
+ return ret;
+}
+
+static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
+{
+ if (drm_mm_node_allocated(>uc_fw))
+ drm_mm_remove_node(>uc_fw);
+}
+
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
{
/* Let GEM Manage all of the aperture.
@@ -2844,11 +2870,14 @@ int i915_gem_init_ggtt(struct drm_i915_private
*dev_priv)
if (ret)
return ret;
- if (USES_GUC(dev_priv)) {
- ret = intel_guc_reserve_ggtt_top(_priv->guc);
- if (ret)
- goto err_reserve;
- }
+ /*
+* The upper portion of the GuC address space has a sizeable hole
+* (several MB) that is inaccessible by GuC. Reserve this range within
+* GGTT as it can comfortably hold GuC/HuC firmware images.
+*/
+ ret = ggtt_reserve_guc_top(ggtt);
+ if (ret)
+ goto err_reserve;
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, >vm.mm, hole_start, hole_end) {
@@ -2870,7 +2899,7 @@ int i915_gem_init_ggtt(struct drm_i915_private
*dev_priv)
return 0;
err_appgtt:
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
err_reserve:
drm_mm_remove_node(>error_capture);
return ret;
@@ -2897,7 +2926,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
if (drm_mm_node_allocated(>error_capture))
drm_mm_remove_node(>error_capture);
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(>vm.mm)) {
intel_vgt_deballoon(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_guc.c
b/drivers/gpu/drm/i915/intel_guc.c
index d45d97624402..c40a6efdd33a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct
intel_guc *guc, u32 size)
i915_gem_object_put(obj);
return vma;
}
-
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
- u64 size;
- int ret;
-
- size = ggtt->vm.total - GUC_GGTT_TOP;
-
- ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
- GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
- PIN_NOEVICT);
- if (ret)
- DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
-
- return ret;
-}
-
-void intel_guc_release_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
-
- if (drm_mm_node_allocated(>uc_fw))
- drm_mm_remove_node(>uc_fw);
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h
b/drivers/gpu/drm/i915/intel_guc.h
index 85c3b02a0c08..08c906abdfa2 100644
---
Re: [Intel-gfx] [PATCH v4 2/2] drm/i915: Make GuC GGTT reservation work on ggtt
Michal,
On 11/06/2019 13:23, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Michal)
v3:
* Add comment explaining reason for reservation, add assert and fix
error message. (Michal)
v4:
* Fix checkpatch error.
Signed-off-by: Tvrtko Ursulin
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
I've assumed I would be able to implement your small suggestions
correctly so I've kept the r-b. Could you just give it a quick glance
over to see if that is indeed true.
Regards,
Tvrtko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 43 -
drivers/gpu/drm/i915/intel_guc.c| 27 --
drivers/gpu/drm/i915/intel_guc.h| 2 --
3 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5b5125ee49f3..c13b52b66ef1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2807,6 +2807,32 @@ static void fini_aliasing_ppgtt(struct drm_i915_private
*i915)
ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
+static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
+{
+ u64 size;
+ int ret;
+
+ if (!USES_GUC(ggtt->vm.i915))
+ return 0;
+
+ GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
+ size = ggtt->vm.total - GUC_GGTT_TOP;
+
+ ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
+ GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+ PIN_NOEVICT);
+ if (ret)
+ DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
+
+ return ret;
+}
+
+static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
+{
+ if (drm_mm_node_allocated(>uc_fw))
+ drm_mm_remove_node(>uc_fw);
+}
+
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
{
/* Let GEM Manage all of the aperture.
@@ -2844,11 +2870,14 @@ int i915_gem_init_ggtt(struct drm_i915_private
*dev_priv)
if (ret)
return ret;
- if (USES_GUC(dev_priv)) {
- ret = intel_guc_reserve_ggtt_top(_priv->guc);
- if (ret)
- goto err_reserve;
- }
+ /*
+* The upper portion of the GuC address space has a sizeable hole
+* (several MB) that is inaccessible by GuC. Reserve this range within
+* GGTT as it can comfortably hold GuC/HuC firmware images.
+*/
+ ret = ggtt_reserve_guc_top(ggtt);
+ if (ret)
+ goto err_reserve;
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, >vm.mm, hole_start, hole_end) {
@@ -2870,7 +2899,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
return 0;
err_appgtt:
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
err_reserve:
drm_mm_remove_node(>error_capture);
return ret;
@@ -2897,7 +2926,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
if (drm_mm_node_allocated(>error_capture))
drm_mm_remove_node(>error_capture);
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(>vm.mm)) {
intel_vgt_deballoon(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index d45d97624402..c40a6efdd33a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc
*guc, u32 size)
i915_gem_object_put(obj);
return vma;
}
-
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
- u64 size;
- int ret;
-
- size = ggtt->vm.total - GUC_GGTT_TOP;
-
- ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
- GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
- PIN_NOEVICT);
- if (ret)
- DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
-
- return ret;
-}
-
-void intel_guc_release_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
-
- if (drm_mm_node_allocated(>uc_fw))
- drm_mm_remove_node(>uc_fw);
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 85c3b02a0c08..08c906abdfa2 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move
intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
URL : https://patchwork.freedesktop.org/series/61887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13240
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/
Known issues
Here are the changes found in Patchwork_13240 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
* igt@gem_flink_basic@bad-open:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_flink_ba...@bad-open.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-icl-u3/igt@gem_flink_ba...@bad-open.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#109485])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +2
similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][11] ([fdo#110235]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 43)
--
Missing(11): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900
fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-byt-clapper fi-pnv-d510 fi-icl-dsi
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13240
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13240: e22d47259fa9f80d9445832cde295e8995a7983f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e22d47259fa9 drm/i915: Make GuC GGTT reservation work on ggtt
6e5a49ccd0e3 drm/i915/guc: Move intel_guc_reserved_gtt_size to
intel_wopcm_guc_size
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13240/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Move fence register tracking from i915->mm to ggtt
== Series Details == Series: series starting with [1/2] drm/i915: Move fence register tracking from i915->mm to ggtt URL : https://patchwork.freedesktop.org/series/61895/ State : failure == Summary == Applying: drm/i915: Move fence register tracking from i915->mm to ggtt Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/i915_debugfs.c M drivers/gpu/drm/i915/i915_drv.h M drivers/gpu/drm/i915/i915_gem_gtt.c M drivers/gpu/drm/i915/i915_gem_gtt.h M drivers/gpu/drm/i915/i915_gpu_error.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/i915_gpu_error.c Auto-merging drivers/gpu/drm/i915/i915_gem_gtt.h Auto-merging drivers/gpu/drm/i915/i915_gem_gtt.c Auto-merging drivers/gpu/drm/i915/i915_drv.h CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_drv.h Auto-merging drivers/gpu/drm/i915/i915_debugfs.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 drm/i915: Move fence register tracking from i915->mm to ggtt When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v8 0/5] drm/fb-helper: Move modesetting code to drm_client
Den 08.06.2019 17.26, skrev Noralf Trønnes: > This moves the modesetting code from drm_fb_helper to drm_client so it > can be shared by all internal clients. > > Let's see what the CI says about the remaining patches. I have added the > bootsplash todo entry patch adding Sam as contact. > > Noralf. > > Noralf Trønnes (5): > drm/fb-helper: Remove drm_fb_helper_connector > drm/fb-helper: Prepare to move out modeset config code > drm/fb-helper: Move out modeset config code > drm/client: Hack: Add bootsplash example > drm/todo: Add bootsplash entry > The CI agreed this time so all applied except the example. Nice to be done with this. It started out as an idea about making generic fbdev emulation 18 months ago but turned out to be something even more generic :-) Noralf. > Documentation/gpu/todo.rst | 19 + > drivers/gpu/drm/Kconfig | 5 + > drivers/gpu/drm/Makefile | 1 + > drivers/gpu/drm/drm_bootsplash.c | 358 +++ > drivers/gpu/drm/drm_client.c | 7 + > drivers/gpu/drm/drm_client_modeset.c | 707 - > drivers/gpu/drm/drm_drv.c| 4 + > drivers/gpu/drm/drm_fb_helper.c | 886 +-- > include/drm/drm_client.h | 23 +- > include/drm/drm_fb_helper.h | 84 +-- > 10 files changed, 1149 insertions(+), 945 deletions(-) > create mode 100644 drivers/gpu/drm/drm_bootsplash.c > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915: Track ggtt fence reservations under its own mutex
We can reduce the locking for fence registers from the dev->struct_mutex
to a local mutex. We could introduce a mutex for the sole purpose of
tracking the fence acquisition, except there is a little bit of overlap
with the fault tracking, so use the i915_ggtt.mutex as it covers both.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 7 ++
drivers/gpu/drm/i915/gvt/aperture_gm.c | 10 +-
drivers/gpu/drm/i915/i915_debugfs.c | 5 +-
drivers/gpu/drm/i915/i915_gem_fence_reg.c| 108 ---
drivers/gpu/drm/i915/i915_gem_fence_reg.h| 2 +-
drivers/gpu/drm/i915/i915_vma.h | 4 +-
6 files changed, 87 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 45379a63e013..3752d3172543 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -1165,7 +1165,14 @@ static int evict_fence(void *data)
goto out_unlock;
}
+ err = i915_vma_pin(arg->vma, 0, 0, PIN_GLOBAL | PIN_MAPPABLE);
+ if (err) {
+ pr_err("Unable to pin vma for Y-tiled fence; err:%d\n", err);
+ goto out_unlock;
+ }
+
err = i915_vma_pin_fence(arg->vma);
+ i915_vma_unpin(arg->vma);
if (err) {
pr_err("Unable to pin Y-tiled fence; err:%d\n", err);
goto out_unlock;
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 4098902bfaeb..2bd9dcebd48c 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -172,14 +172,14 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
intel_runtime_pm_get(dev_priv);
- mutex_lock(_priv->drm.struct_mutex);
+ mutex_lock(_priv->ggtt.vm.mutex);
_clear_vgpu_fence(vgpu);
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
reg = vgpu->fence.regs[i];
i915_unreserve_fence(reg);
vgpu->fence.regs[i] = NULL;
}
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
}
@@ -194,7 +194,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
intel_runtime_pm_get(dev_priv);
/* Request fences from host */
- mutex_lock(_priv->drm.struct_mutex);
+ mutex_lock(_priv->ggtt.vm.mutex);
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
reg = i915_reserve_fence(dev_priv);
@@ -206,7 +206,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
_clear_vgpu_fence(vgpu);
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
return 0;
out_free_fence:
@@ -219,7 +219,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
i915_unreserve_fence(reg);
vgpu->fence.regs[i] = NULL;
}
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index c42e109224ae..ac106448ae84 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -884,10 +884,11 @@ static int i915_gem_fence_regs_info(struct seq_file *m,
void *data)
rcu_read_lock();
for (i = 0; i < i915->ggtt.num_fences; i++) {
- struct i915_vma *vma = i915->ggtt.fence_regs[i].vma;
+ struct i915_fence_reg *reg = >ggtt.fence_regs[i];
+ struct i915_vma *vma = reg->vma;
seq_printf(m, "Fence %d, pin count = %d, object = ",
- i, i915->ggtt.fence_regs[i].pin_count);
+ i, atomic_read(>pin_count));
if (!vma)
seq_puts(m, "unused");
else
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 1c9466676caf..24bdffac6380 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -301,15 +301,24 @@ static int fence_update(struct i915_fence_reg *fence,
*/
int i915_vma_put_fence(struct i915_vma *vma)
{
+ struct i915_ggtt *ggtt = i915_vm_to_ggtt(vma->vm);
struct i915_fence_reg *fence = vma->fence;
+ int err;
if (!fence)
return 0;
- if (fence->pin_count)
+ if (atomic_read(>pin_count))
return -EBUSY;
- return fence_update(fence, NULL);
+ err = mutex_lock_interruptible(>vm.mutex);
+ if (err)
+ return err;
+
+ err = fence_update(fence, NULL);
+ mutex_unlock(>vm.mutex);
+
+
[Intel-gfx] [PATCH 1/2] drm/i915: Move fence register tracking from i915->mm to ggtt
As the fence registers only apply to regions inside the GGTT is makes
more sense that we track these as part of the i915_ggtt and not the
general mm. In the next patch, we will then pull the register locking
underneath the i915_ggtt.mutex.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 +-
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 6 +-
drivers/gpu/drm/i915/gvt/aperture_gm.c| 7 +-
drivers/gpu/drm/i915/gvt/gvt.h| 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 42 ++-
drivers/gpu/drm/i915/i915_drv.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 28 ---
drivers/gpu/drm/i915/i915_gem.c | 52 +++--
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 90 ---
drivers/gpu/drm/i915/i915_gem_fence_reg.h | 19 -
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +
drivers/gpu/drm/i915/i915_gem_gtt.h | 14 +++-
drivers/gpu/drm/i915/i915_gpu_error.c | 6 +-
drivers/gpu/drm/i915/i915_vma.h | 2 +-
15 files changed, 144 insertions(+), 137 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index c7b9b34de01b..a8b8b9c281f1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -310,9 +310,9 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
/* Mark as being mmapped into userspace for later revocation */
assert_rpm_wakelock_held(i915);
if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
- list_add(>userfault_link, >mm.userfault_list);
+ list_add(>userfault_link, >ggtt.userfault_list);
if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
- intel_wakeref_auto(>mm.userfault_wakeref,
+ intel_wakeref_auto(>ggtt.userfault_wakeref,
msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
GEM_BUG_ON(!obj->userfault_count);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index f40f13c0b8b7..6d6064fb2bf5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -126,7 +126,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
{
GEM_TRACE("\n");
- intel_wakeref_auto(>mm.userfault_wakeref, 0);
+ intel_wakeref_auto(>ggtt.userfault_wakeref, 0);
flush_workqueue(i915->wq);
mutex_lock(>drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 60d24110af80..4abebcd36a71 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -695,19 +695,19 @@ static void revoke_mmaps(struct drm_i915_private *i915)
{
int i;
- for (i = 0; i < i915->num_fence_regs; i++) {
+ for (i = 0; i < i915->ggtt.num_fences; i++) {
struct drm_vma_offset_node *node;
struct i915_vma *vma;
u64 vma_offset;
- vma = READ_ONCE(i915->fence_regs[i].vma);
+ vma = READ_ONCE(i915->ggtt.fence_regs[i].vma);
if (!vma)
continue;
if (!i915_vma_has_userfault(vma))
continue;
- GEM_BUG_ON(vma->fence != >fence_regs[i]);
+ GEM_BUG_ON(vma->fence != >ggtt.fence_regs[i]);
node = >obj->base.vma_node;
vma_offset = vma->ggtt_view.partial.offset << PAGE_SHIFT;
unmap_mapping_range(i915->drm.anon_inode->i_mapping,
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 1fa2f65c3cd1..4098902bfaeb 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -35,6 +35,7 @@
*/
#include "i915_drv.h"
+#include "i915_gem_fence_reg.h"
#include "gvt.h"
static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
@@ -128,7 +129,7 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
+ struct i915_fence_reg *reg;
i915_reg_t fence_reg_lo, fence_reg_hi;
assert_rpm_wakelock_held(dev_priv);
@@ -163,7 +164,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
+ struct i915_fence_reg *reg;
u32 i;
if (WARN_ON(!vgpu_fence_sz(vgpu)))
@@ -187,7 +188,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
== Series Details == Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2) URL : https://patchwork.freedesktop.org/series/61887/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size -O:drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void) Commit: drm/i915: Make GuC GGTT reservation work on ggtt Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Move fence register tracking from i915->mm to ggtt
== Series Details == Series: series starting with [1/2] drm/i915: Move fence register tracking from i915->mm to ggtt URL : https://patchwork.freedesktop.org/series/61893/ State : failure == Summary == Applying: drm/i915: Move fence register tracking from i915->mm to ggtt Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/i915_debugfs.c M drivers/gpu/drm/i915/i915_drv.h M drivers/gpu/drm/i915/i915_gem_gtt.c M drivers/gpu/drm/i915/i915_gem_gtt.h M drivers/gpu/drm/i915/i915_gpu_error.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/i915_gpu_error.c Auto-merging drivers/gpu/drm/i915/i915_gem_gtt.h Auto-merging drivers/gpu/drm/i915/i915_gem_gtt.c Auto-merging drivers/gpu/drm/i915/i915_drv.h CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_drv.h Auto-merging drivers/gpu/drm/i915/i915_debugfs.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 drm/i915: Move fence register tracking from i915->mm to ggtt When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/6] drm/i915: Eliminate unused mmio accessors
== Series Details ==
Series: series starting with [CI,1/6] drm/i915: Eliminate unused mmio accessors
URL : https://patchwork.freedesktop.org/series/61837/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13221_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_13221_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_ctx_engines@independent}:
- shard-hsw: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw1/igt@gem_ctx_engi...@independent.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-hsw8/igt@gem_ctx_engi...@independent.html
Known issues
Here are the changes found in Patchwork_13221_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@drm_read@invalid-buffer:
- shard-snb: [PASS][3] -> [SKIP][4] ([fdo#109271]) +1 similar issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-snb7/igt@drm_r...@invalid-buffer.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-snb2/igt@drm_r...@invalid-buffer.html
* igt@gem_ctx_engines@execute-one:
- shard-skl: [PASS][5] -> [DMESG-WARN][6] ([fdo#110869])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl4/igt@gem_ctx_engi...@execute-one.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-skl4/igt@gem_ctx_engi...@execute-one.html
- shard-glk: [PASS][7] -> [DMESG-WARN][8] ([fdo#110869])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk5/igt@gem_ctx_engi...@execute-one.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-glk1/igt@gem_ctx_engi...@execute-one.html
* igt@gem_tiled_swapping@non-threaded:
- shard-kbl: [PASS][9] -> [DMESG-WARN][10] ([fdo#108686])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-kbl4/igt@gem_tiled_swapp...@non-threaded.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-kbl4/igt@gem_tiled_swapp...@non-threaded.html
* igt@i915_suspend@forcewake:
- shard-apl: [PASS][11] -> [DMESG-WARN][12] ([fdo#108566])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl8/igt@i915_susp...@forcewake.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-apl5/igt@i915_susp...@forcewake.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [PASS][13] -> [FAIL][14] ([fdo#104873])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk4/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-legacy.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-glk2/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-legacy.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-hsw: [PASS][15] -> [INCOMPLETE][16] ([fdo#103540])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw6/igt@kms_f...@2x-flip-vs-suspend-interruptible.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-hsw2/igt@kms_f...@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +1 similar
issue
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw4/igt@kms_flip@2x-wf_vblank-ts-check.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-hsw1/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [PASS][19] -> [FAIL][20] ([fdo#102887] / [fdo#105363])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk4/igt@kms_f...@flip-vs-expired-vblank.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-glk2/igt@kms_f...@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-apl: [PASS][21] -> [FAIL][22] ([fdo#103167])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-pwrite.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13221/shard-apl5/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103167]) +6 similar
issues
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb1/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
[24]:
[Intel-gfx] [PATCH v4 2/2] drm/i915: Make GuC GGTT reservation work on ggtt
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Michal)
v3:
* Add comment explaining reason for reservation, add assert and fix
error message. (Michal)
v4:
* Fix checkpatch error.
Signed-off-by: Tvrtko Ursulin
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 43 -
drivers/gpu/drm/i915/intel_guc.c| 27 --
drivers/gpu/drm/i915/intel_guc.h| 2 --
3 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5b5125ee49f3..c13b52b66ef1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2807,6 +2807,32 @@ static void fini_aliasing_ppgtt(struct drm_i915_private
*i915)
ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
+static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
+{
+ u64 size;
+ int ret;
+
+ if (!USES_GUC(ggtt->vm.i915))
+ return 0;
+
+ GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
+ size = ggtt->vm.total - GUC_GGTT_TOP;
+
+ ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
+ GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+ PIN_NOEVICT);
+ if (ret)
+ DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
+
+ return ret;
+}
+
+static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
+{
+ if (drm_mm_node_allocated(>uc_fw))
+ drm_mm_remove_node(>uc_fw);
+}
+
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
{
/* Let GEM Manage all of the aperture.
@@ -2844,11 +2870,14 @@ int i915_gem_init_ggtt(struct drm_i915_private
*dev_priv)
if (ret)
return ret;
- if (USES_GUC(dev_priv)) {
- ret = intel_guc_reserve_ggtt_top(_priv->guc);
- if (ret)
- goto err_reserve;
- }
+ /*
+* The upper portion of the GuC address space has a sizeable hole
+* (several MB) that is inaccessible by GuC. Reserve this range within
+* GGTT as it can comfortably hold GuC/HuC firmware images.
+*/
+ ret = ggtt_reserve_guc_top(ggtt);
+ if (ret)
+ goto err_reserve;
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, >vm.mm, hole_start, hole_end) {
@@ -2870,7 +2899,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
return 0;
err_appgtt:
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
err_reserve:
drm_mm_remove_node(>error_capture);
return ret;
@@ -2897,7 +2926,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
if (drm_mm_node_allocated(>error_capture))
drm_mm_remove_node(>error_capture);
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(>vm.mm)) {
intel_vgt_deballoon(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index d45d97624402..c40a6efdd33a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc
*guc, u32 size)
i915_gem_object_put(obj);
return vma;
}
-
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
- u64 size;
- int ret;
-
- size = ggtt->vm.total - GUC_GGTT_TOP;
-
- ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
- GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
- PIN_NOEVICT);
- if (ret)
- DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
-
- return ret;
-}
-
-void intel_guc_release_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
-
- if (drm_mm_node_allocated(>uc_fw))
- drm_mm_remove_node(>uc_fw);
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 85c3b02a0c08..08c906abdfa2 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
-void
[Intel-gfx] [PATCH 1/2] drm/i915: Move fence register tracking from i915->mm to ggtt
As the fence registers only apply to regions inside the GGTT is makes
more sense that we track these as part of the i915_ggtt and not the
general mm. In the next patch, we will then pull the register locking
underneath the i915_ggtt.mutex.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 +-
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 6 +-
drivers/gpu/drm/i915/gvt/aperture_gm.c| 7 +-
drivers/gpu/drm/i915/gvt/gvt.h| 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 42 ++-
drivers/gpu/drm/i915/i915_drv.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 28 ---
drivers/gpu/drm/i915/i915_gem.c | 52 +++--
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 90 ---
drivers/gpu/drm/i915/i915_gem_fence_reg.h | 19 -
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +
drivers/gpu/drm/i915/i915_gem_gtt.h | 14 +++-
drivers/gpu/drm/i915/i915_gpu_error.c | 6 +-
drivers/gpu/drm/i915/i915_vma.h | 2 +-
15 files changed, 144 insertions(+), 137 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index c7b9b34de01b..a8b8b9c281f1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -310,9 +310,9 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
/* Mark as being mmapped into userspace for later revocation */
assert_rpm_wakelock_held(i915);
if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
- list_add(>userfault_link, >mm.userfault_list);
+ list_add(>userfault_link, >ggtt.userfault_list);
if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
- intel_wakeref_auto(>mm.userfault_wakeref,
+ intel_wakeref_auto(>ggtt.userfault_wakeref,
msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
GEM_BUG_ON(!obj->userfault_count);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index f40f13c0b8b7..6d6064fb2bf5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -126,7 +126,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
{
GEM_TRACE("\n");
- intel_wakeref_auto(>mm.userfault_wakeref, 0);
+ intel_wakeref_auto(>ggtt.userfault_wakeref, 0);
flush_workqueue(i915->wq);
mutex_lock(>drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 60d24110af80..4abebcd36a71 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -695,19 +695,19 @@ static void revoke_mmaps(struct drm_i915_private *i915)
{
int i;
- for (i = 0; i < i915->num_fence_regs; i++) {
+ for (i = 0; i < i915->ggtt.num_fences; i++) {
struct drm_vma_offset_node *node;
struct i915_vma *vma;
u64 vma_offset;
- vma = READ_ONCE(i915->fence_regs[i].vma);
+ vma = READ_ONCE(i915->ggtt.fence_regs[i].vma);
if (!vma)
continue;
if (!i915_vma_has_userfault(vma))
continue;
- GEM_BUG_ON(vma->fence != >fence_regs[i]);
+ GEM_BUG_ON(vma->fence != >ggtt.fence_regs[i]);
node = >obj->base.vma_node;
vma_offset = vma->ggtt_view.partial.offset << PAGE_SHIFT;
unmap_mapping_range(i915->drm.anon_inode->i_mapping,
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 1fa2f65c3cd1..4098902bfaeb 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -35,6 +35,7 @@
*/
#include "i915_drv.h"
+#include "i915_gem_fence_reg.h"
#include "gvt.h"
static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
@@ -128,7 +129,7 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
+ struct i915_fence_reg *reg;
i915_reg_t fence_reg_lo, fence_reg_hi;
assert_rpm_wakelock_held(dev_priv);
@@ -163,7 +164,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
+ struct i915_fence_reg *reg;
u32 i;
if (WARN_ON(!vgpu_fence_sz(vgpu)))
@@ -187,7 +188,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
[Intel-gfx] [PATCH 2/2] drm/i915: Track ggtt fence reservations under its own mutex
We can reduce the locking for fence registers from the dev->struct_mutex
to a local mutex. We could introduce a mutex for the sole purpose of
tracking the fence acquisition, except there is a little bit of overlap
with the fault tracking, so use the i915_ggtt.mutex as it covers both.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 7 ++
drivers/gpu/drm/i915/gvt/aperture_gm.c | 10 +-
drivers/gpu/drm/i915/i915_debugfs.c | 5 +-
drivers/gpu/drm/i915/i915_gem_fence_reg.c| 108 ---
drivers/gpu/drm/i915/i915_gem_fence_reg.h| 2 +-
drivers/gpu/drm/i915/i915_vma.h | 4 +-
6 files changed, 87 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 45379a63e013..3752d3172543 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -1165,7 +1165,14 @@ static int evict_fence(void *data)
goto out_unlock;
}
+ err = i915_vma_pin(arg->vma, 0, 0, PIN_GLOBAL | PIN_MAPPABLE);
+ if (err) {
+ pr_err("Unable to pin vma for Y-tiled fence; err:%d\n", err);
+ goto out_unlock;
+ }
+
err = i915_vma_pin_fence(arg->vma);
+ i915_vma_unpin(arg->vma);
if (err) {
pr_err("Unable to pin Y-tiled fence; err:%d\n", err);
goto out_unlock;
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 4098902bfaeb..2bd9dcebd48c 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -172,14 +172,14 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
intel_runtime_pm_get(dev_priv);
- mutex_lock(_priv->drm.struct_mutex);
+ mutex_lock(_priv->ggtt.vm.mutex);
_clear_vgpu_fence(vgpu);
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
reg = vgpu->fence.regs[i];
i915_unreserve_fence(reg);
vgpu->fence.regs[i] = NULL;
}
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
}
@@ -194,7 +194,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
intel_runtime_pm_get(dev_priv);
/* Request fences from host */
- mutex_lock(_priv->drm.struct_mutex);
+ mutex_lock(_priv->ggtt.vm.mutex);
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
reg = i915_reserve_fence(dev_priv);
@@ -206,7 +206,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
_clear_vgpu_fence(vgpu);
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
return 0;
out_free_fence:
@@ -219,7 +219,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
i915_unreserve_fence(reg);
vgpu->fence.regs[i] = NULL;
}
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index c42e109224ae..ac106448ae84 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -884,10 +884,11 @@ static int i915_gem_fence_regs_info(struct seq_file *m,
void *data)
rcu_read_lock();
for (i = 0; i < i915->ggtt.num_fences; i++) {
- struct i915_vma *vma = i915->ggtt.fence_regs[i].vma;
+ struct i915_fence_reg *reg = >ggtt.fence_regs[i];
+ struct i915_vma *vma = reg->vma;
seq_printf(m, "Fence %d, pin count = %d, object = ",
- i, i915->ggtt.fence_regs[i].pin_count);
+ i, atomic_read(>pin_count));
if (!vma)
seq_puts(m, "unused");
else
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 1c9466676caf..24bdffac6380 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -301,15 +301,24 @@ static int fence_update(struct i915_fence_reg *fence,
*/
int i915_vma_put_fence(struct i915_vma *vma)
{
+ struct i915_ggtt *ggtt = i915_vm_to_ggtt(vma->vm);
struct i915_fence_reg *fence = vma->fence;
+ int err;
if (!fence)
return 0;
- if (fence->pin_count)
+ if (atomic_read(>pin_count))
return -EBUSY;
- return fence_update(fence, NULL);
+ err = mutex_lock_interruptible(>vm.mutex);
+ if (err)
+ return err;
+
+ err = fence_update(fence, NULL);
+ mutex_unlock(>vm.mutex);
+
+
Re: [Intel-gfx] [RFC 01/14] drm/i915: Make i915_check_and_clear_faults take uncore
Quoting Tvrtko Ursulin (2019-06-11 13:05:58)
>
> On 11/06/2019 09:52, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-06-11 09:35:07)
> >>
> >> On 10/06/2019 17:26, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2019-06-10 16:54:06)
> From: Tvrtko Ursulin
>
> Continuing the conversion and elimination of implicit dev_priv.
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_reset.c | 28 ---
> drivers/gpu/drm/i915/gt/intel_reset.h | 2 +-
> drivers/gpu/drm/i915/i915_drv.c | 2 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
> 5 files changed, 20 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index c0d986db5a75..a046e8dccc96 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -453,7 +453,7 @@ int intel_engines_init_mmio(struct drm_i915_private
> *i915)
>
> RUNTIME_INFO(i915)->num_engines = hweight32(mask);
>
> - i915_check_and_clear_faults(i915);
> + i915_check_and_clear_faults(>uncore);
> >>>
> >>> This name is still setting off red flags for me, but I have to confess
> >>> that staring at it, passing uncore does make sense.
> >>
> >> Rename to intel_uncore_check_and_clear_faults?
> >>
> >> Or move later in the series as intel_gt_check_and_clear_faults?
> >
> > I think I prefer the latter option, intel_gt_check_and_clear_faults.
>
> Yep agreed.
>
> Any comments on the intel_gt.c the series added?
Good. It's the direction I think we need.
> And the end result in i915_gem_init(_hw)?
Definitely not the end yet, but passable for now :)
> >>> I just wish we have per-engines faults everywhere and this could be
> >>> reduced to passing engine.
> >>>
> >>> Hmm, this I guess we will just have to revisit in the near future as we
> >>> may get the opportunity to put these regs under more scrutiny.
> >>>
>
> intel_setup_engine_capabilities(i915);
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
> b/drivers/gpu/drm/i915/gt/intel_reset.c
> index 60d24110af80..13471916559b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -1166,10 +1166,10 @@ static void
> gen8_clear_engine_error_register(struct intel_engine_cs *engine)
> GEN6_RING_FAULT_REG_POSTING_READ(engine);
> }
>
> -static void clear_error_registers(struct drm_i915_private *i915,
> +static void clear_error_registers(struct intel_uncore *uncore,
> intel_engine_mask_t engine_mask)
> {
> - struct intel_uncore *uncore = >uncore;
> + struct drm_i915_private *i915 = uncore_to_i915(uncore);
> >>>
> >>> Grr, I should have objected to uncore_to_i915() loudly from the
> >>> beginning
> >>>
> >>> What's done is done,
> >>
> >> Is it too late already? Shouldn't be. My thinking was the implementation
> >> can easily be changed if/when backpointer is added (instead of
> >> container_of). But if you would prefer we start without a helper, but
> >> with a direct access to backpointer straight away that is fine by me.
> >
> > I'm optimistic that we can land a split display/gt intel_uncore early
> > and so the churn is in the not too distant future.
>
> Okay but that doesn't explicitly answer whether you prefer I just drop
> all the XXX_to_YYY wrappers in favour of using direct pointer dereferences.
I'm in favour of uncore->i915 over uncore_to_i915(uncore) and drop the
embedding knowledge.
> You are also in favour of replacing engine->i915 with engine->gt
> straight away?
I can live with an extra back pointer. I think it will ultimately be
redundant, but expect a incremental evolution will be easier.
-Chris
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Re: [Intel-gfx] [REBASED PATCH 1/2] drm/i915: Move intel_add_dsi_properties to intel_dsi
On Mon, Jun 10, 2019 at 10:45:14PM +0300, Jani Nikula wrote:
> From: Vandita Kulkarni
>
> Since intel_add_dsi_properties will be used by other
> platforms too move it out of platform specific file.
>
> Signed-off-by: Vandita Kulkarni
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_dsi.c | 32
> drivers/gpu/drm/i915/intel_dsi.h | 3 +++
> drivers/gpu/drm/i915/vlv_dsi.c | 42 +---
> 3 files changed, 36 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c
> b/drivers/gpu/drm/i915/intel_dsi.c
> index 5fec02aceaed..26124a8fe531 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -116,6 +116,12 @@ intel_dsi_get_panel_orientation(struct intel_connector
> *connector)
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> enum drm_panel_orientation orientation;
>
> + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> + orientation = vlv_dsi_get_hw_panel_orientation(connector);
> + if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> + return orientation;
> + }
> +
> orientation = dev_priv->vbt.dsi.orientation;
> if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> return orientation;
> @@ -126,3 +132,29 @@ intel_dsi_get_panel_orientation(struct intel_connector
> *connector)
>
> return DRM_MODE_PANEL_ORIENTATION_NORMAL;
> }
> +
> +void intel_dsi_add_properties(struct intel_connector *connector)
> +{
> + struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> +
> + if (connector->panel.fixed_mode) {
> + u32 allowed_scalers;
> +
> + allowed_scalers = BIT(DRM_MODE_SCALE_ASPECT) |
> + BIT(DRM_MODE_SCALE_FULLSCREEN);
> + if (!HAS_GMCH(dev_priv))
> + allowed_scalers |= BIT(DRM_MODE_SCALE_CENTER);
> +
> + drm_connector_attach_scaling_mode_property(>base,
> +
> allowed_scalers);
> +
> + connector->base.state->scaling_mode = DRM_MODE_SCALE_ASPECT;
> +
> + connector->base.display_info.panel_orientation =
> + intel_dsi_get_panel_orientation(connector);
> + drm_connector_init_panel_orientation_property(
> + >base,
> + connector->panel.fixed_mode->hdisplay,
> + connector->panel.fixed_mode->vdisplay);
I think I'd rather just duplicate the required parts in the icl code.
That way we don't have to have VLV/CHV specific stuff in the generic
code.
> + }
> +}
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h
> b/drivers/gpu/drm/i915/intel_dsi.h
> index 6d20434636cd..11f7bfb28299 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -162,6 +162,7 @@ int intel_dsi_bitrate(const struct intel_dsi *intel_dsi);
> int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi);
> enum drm_panel_orientation
> intel_dsi_get_panel_orientation(struct intel_connector *connector);
> +void intel_dsi_add_properties(struct intel_connector *connector);
>
> /* vlv_dsi.c */
> void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port
> port);
> @@ -173,6 +174,8 @@ struct intel_dsi_host *intel_dsi_host_init(struct
> intel_dsi *intel_dsi,
> const struct mipi_dsi_host_ops
> *funcs,
> enum port port);
> void vlv_dsi_init(struct drm_i915_private *dev_priv);
> +enum drm_panel_orientation
> +vlv_dsi_get_hw_panel_orientation(struct intel_connector *connector);
>
> /* vlv_dsi_pll.c */
> int vlv_dsi_pll_compute(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
> index e272d826210a..9f911623d685 100644
> --- a/drivers/gpu/drm/i915/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/vlv_dsi.c
> @@ -1591,7 +1591,7 @@ static const struct drm_connector_funcs
> intel_dsi_connector_funcs = {
> .atomic_duplicate_state = intel_digital_connector_duplicate_state,
> };
>
> -static enum drm_panel_orientation
> +enum drm_panel_orientation
> vlv_dsi_get_hw_panel_orientation(struct intel_connector *connector)
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> @@ -1629,46 +1629,6 @@ vlv_dsi_get_hw_panel_orientation(struct
> intel_connector *connector)
> return orientation;
> }
>
> -static enum drm_panel_orientation
> -vlv_dsi_get_panel_orientation(struct intel_connector *connector)
> -{
> - struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> - enum drm_panel_orientation orientation;
> -
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> - orientation =
Re: [Intel-gfx] [RFC 01/14] drm/i915: Make i915_check_and_clear_faults take uncore
On 11/06/2019 09:52, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-11 09:35:07)
On 10/06/2019 17:26, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-10 16:54:06)
From: Tvrtko Ursulin
Continuing the conversion and elimination of implicit dev_priv.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 28 ---
drivers/gpu/drm/i915/gt/intel_reset.h | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
5 files changed, 20 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index c0d986db5a75..a046e8dccc96 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -453,7 +453,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
RUNTIME_INFO(i915)->num_engines = hweight32(mask);
- i915_check_and_clear_faults(i915);
+ i915_check_and_clear_faults(>uncore);
This name is still setting off red flags for me, but I have to confess
that staring at it, passing uncore does make sense.
Rename to intel_uncore_check_and_clear_faults?
Or move later in the series as intel_gt_check_and_clear_faults?
I think I prefer the latter option, intel_gt_check_and_clear_faults.
Yep agreed.
Any comments on the intel_gt.c the series added?
And the end result in i915_gem_init(_hw)?
I just wish we have per-engines faults everywhere and this could be
reduced to passing engine.
Hmm, this I guess we will just have to revisit in the near future as we
may get the opportunity to put these regs under more scrutiny.
intel_setup_engine_capabilities(i915);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 60d24110af80..13471916559b 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1166,10 +1166,10 @@ static void gen8_clear_engine_error_register(struct
intel_engine_cs *engine)
GEN6_RING_FAULT_REG_POSTING_READ(engine);
}
-static void clear_error_registers(struct drm_i915_private *i915,
+static void clear_error_registers(struct intel_uncore *uncore,
intel_engine_mask_t engine_mask)
{
- struct intel_uncore *uncore = >uncore;
+ struct drm_i915_private *i915 = uncore_to_i915(uncore);
Grr, I should have objected to uncore_to_i915() loudly from the
beginning
What's done is done,
Is it too late already? Shouldn't be. My thinking was the implementation
can easily be changed if/when backpointer is added (instead of
container_of). But if you would prefer we start without a helper, but
with a direct access to backpointer straight away that is fine by me.
I'm optimistic that we can land a split display/gt intel_uncore early
and so the churn is in the not too distant future.
Okay but that doesn't explicitly answer whether you prefer I just drop
all the XXX_to_YYY wrappers in favour of using direct pointer dereferences.
You are also in favour of replacing engine->i915 with engine->gt
straight away?
Regards,
Tvrtko
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
== Series Details == Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size URL : https://patchwork.freedesktop.org/series/61887/ State : success == Summary == CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13237 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/ Known issues Here are the changes found in Patchwork_13237 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/fi-icl-u3/igt@gem_m...@basic.html * igt@i915_selftest@live_hangcheck: - fi-icl-u2: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / [fdo#108569]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u2/igt@i915_selftest@live_hangcheck.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/fi-icl-u2/igt@i915_selftest@live_hangcheck.html Possible fixes * igt@gem_mmap@basic-small-bo: - fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/fi-icl-u3/igt@gem_m...@basic-small-bo.html * igt@i915_selftest@live_contexts: - fi-bdw-gvtdvm: [DMESG-FAIL][7] ([fdo#110235]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 Participating hosts (54 -> 46) -- Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes - * Linux: CI_DRM_6230 -> Patchwork_13237 CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13237: b3763a316000dc11c1ff19b079d000651f447050 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == b3763a316000 drm/i915: Make GuC GGTT reservation work on ggtt 08010f3675e3 drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13237/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Move fence register tracking from i915->mm to ggtt
== Series Details == Series: series starting with [1/2] drm/i915: Move fence register tracking from i915->mm to ggtt URL : https://patchwork.freedesktop.org/series/61891/ State : failure == Summary == Applying: drm/i915: Move fence register tracking from i915->mm to ggtt Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/i915_debugfs.c M drivers/gpu/drm/i915/i915_drv.h M drivers/gpu/drm/i915/i915_gem_gtt.c M drivers/gpu/drm/i915/i915_gem_gtt.h M drivers/gpu/drm/i915/i915_gpu_error.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/i915_gpu_error.c Auto-merging drivers/gpu/drm/i915/i915_gem_gtt.h Auto-merging drivers/gpu/drm/i915/i915_gem_gtt.c Auto-merging drivers/gpu/drm/i915/i915_drv.h CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_drv.h Auto-merging drivers/gpu/drm/i915/i915_debugfs.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 drm/i915: Move fence register tracking from i915->mm to ggtt When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
== Series Details == Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size URL : https://patchwork.freedesktop.org/series/61887/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size -O:drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem_gtt.c:2832:26: warning: expression using sizeof(void) Commit: drm/i915: Make GuC GGTT reservation work on ggtt Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
== Series Details == Series: series starting with [1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size URL : https://patchwork.freedesktop.org/series/61887/ State : warning == Summary == $ dim checkpatch origin/drm-tip 08010f3675e3 drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size b3763a316000 drm/i915: Make GuC GGTT reservation work on ggtt -:40: WARNING:CONSTANT_COMPARISON: Comparisons should place the constant on the right side of the test #40: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2818: + GEM_BUG_ON(GUC_GGTT_TOP > ggtt->vm.total); total: 0 errors, 1 warnings, 0 checks, 78 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/6] drm/i915: Remove I915_READ8
== Series Details ==
Series: series starting with [CI,1/6] drm/i915: Remove I915_READ8
URL : https://patchwork.freedesktop.org/series/61886/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13236
Summary
---
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/
Known issues
Here are the changes found in Patchwork_13236 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_basic@create-close:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_ba...@create-close.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/fi-icl-u3/igt@gem_ba...@create-close.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-kbl-7500u: [PASS][3] -> [DMESG-WARN][4] ([fdo#105128] /
[fdo#107139])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-kbl-7500u/igt@gem_exec_susp...@basic-s4-devices.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/fi-kbl-7500u/igt@gem_exec_susp...@basic-s4-devices.html
* igt@i915_module_load@reload:
- fi-blb-e6850: [PASS][5] -> [INCOMPLETE][6] ([fdo#107718])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-blb-e6850/igt@i915_module_l...@reload.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/fi-blb-e6850/igt@i915_module_l...@reload.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][7] -> [FAIL][8] ([fdo#109485])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_ctx_switch@basic-default:
- {fi-icl-guc}: [INCOMPLETE][9] ([fdo#107713] / [fdo#108569]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/fi-icl-guc/igt@gem_ctx_swi...@basic-default.html
* igt@gem_mmap@basic-small-bo:
- fi-icl-u3: [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] +2
similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u3/igt@gem_m...@basic-small-bo.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/fi-icl-u3/igt@gem_m...@basic-small-bo.html
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: [DMESG-FAIL][13] ([fdo#110235]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/fi-bdw-gvtdvm/igt@i915_selftest@live_contexts.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [FAIL][15] ([fdo#103167]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6230/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13236/fi-icl-u2/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#105128]: https://bugs.freedesktop.org/show_bug.cgi?id=105128
[fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (54 -> 47)
--
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-
* Linux: CI_DRM_6230 -> Patchwork_13236
CI_DRM_6230: 57bd224fa47bfe2a2b83fbfcfc48aaded027d211 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5050: 4c072238c784e6acb00634a80c3c55fb8358058b @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13236: 17cb71934cfb88838a5b766e515591489221c27e @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
17cb71934cfb drm/i915: Remove I915_READ16 and I915_WRITE16
9250fe0d0074 drm/i915: Remove I915_READ_NOTRACE
766eebd60a9a drm/i915: Remove I915_WRITE_NOTRACE
18af6f318038 drm/i915: Remove POSTING_READ16
9ed4bd021605 drm/i915: Remove I915_POSTING_READ_FW
93b7e48b69ad drm/i915: Remove I915_READ8
== Logs ==
For more details see:
[Intel-gfx] [PATCH 2/2] drm/i915: Track ggtt fence reservations under its own mutex
We can reduce the locking for fence registers from the dev->struct_mutex
to a local mutex. We could introduce a mutex for the sole purpose of
tracking the fence acquisition, except there is a little bit of overlap
with the fault tracking, so use the i915_ggtt.mutex as it covers both.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 7 ++
drivers/gpu/drm/i915/gvt/aperture_gm.c | 10 +-
drivers/gpu/drm/i915/i915_debugfs.c | 5 +-
drivers/gpu/drm/i915/i915_gem_fence_reg.c| 108 ---
drivers/gpu/drm/i915/i915_gem_fence_reg.h| 2 +-
drivers/gpu/drm/i915/i915_vma.h | 4 +-
6 files changed, 87 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 45379a63e013..3752d3172543 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -1165,7 +1165,14 @@ static int evict_fence(void *data)
goto out_unlock;
}
+ err = i915_vma_pin(arg->vma, 0, 0, PIN_GLOBAL | PIN_MAPPABLE);
+ if (err) {
+ pr_err("Unable to pin vma for Y-tiled fence; err:%d\n", err);
+ goto out_unlock;
+ }
+
err = i915_vma_pin_fence(arg->vma);
+ i915_vma_unpin(arg->vma);
if (err) {
pr_err("Unable to pin Y-tiled fence; err:%d\n", err);
goto out_unlock;
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 4098902bfaeb..2bd9dcebd48c 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -172,14 +172,14 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
intel_runtime_pm_get(dev_priv);
- mutex_lock(_priv->drm.struct_mutex);
+ mutex_lock(_priv->ggtt.vm.mutex);
_clear_vgpu_fence(vgpu);
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
reg = vgpu->fence.regs[i];
i915_unreserve_fence(reg);
vgpu->fence.regs[i] = NULL;
}
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
}
@@ -194,7 +194,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
intel_runtime_pm_get(dev_priv);
/* Request fences from host */
- mutex_lock(_priv->drm.struct_mutex);
+ mutex_lock(_priv->ggtt.vm.mutex);
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
reg = i915_reserve_fence(dev_priv);
@@ -206,7 +206,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
_clear_vgpu_fence(vgpu);
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
return 0;
out_free_fence:
@@ -219,7 +219,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
i915_unreserve_fence(reg);
vgpu->fence.regs[i] = NULL;
}
- mutex_unlock(_priv->drm.struct_mutex);
+ mutex_unlock(_priv->ggtt.vm.mutex);
intel_runtime_pm_put_unchecked(dev_priv);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index c42e109224ae..ac106448ae84 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -884,10 +884,11 @@ static int i915_gem_fence_regs_info(struct seq_file *m,
void *data)
rcu_read_lock();
for (i = 0; i < i915->ggtt.num_fences; i++) {
- struct i915_vma *vma = i915->ggtt.fence_regs[i].vma;
+ struct i915_fence_reg *reg = >ggtt.fence_regs[i];
+ struct i915_vma *vma = reg->vma;
seq_printf(m, "Fence %d, pin count = %d, object = ",
- i, i915->ggtt.fence_regs[i].pin_count);
+ i, atomic_read(>pin_count));
if (!vma)
seq_puts(m, "unused");
else
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 1c9466676caf..24bdffac6380 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -301,15 +301,24 @@ static int fence_update(struct i915_fence_reg *fence,
*/
int i915_vma_put_fence(struct i915_vma *vma)
{
+ struct i915_ggtt *ggtt = i915_vm_to_ggtt(vma->vm);
struct i915_fence_reg *fence = vma->fence;
+ int err;
if (!fence)
return 0;
- if (fence->pin_count)
+ if (atomic_read(>pin_count))
return -EBUSY;
- return fence_update(fence, NULL);
+ err = mutex_lock_interruptible(>vm.mutex);
+ if (err)
+ return err;
+
+ err = fence_update(fence, NULL);
+ mutex_unlock(>vm.mutex);
+
+
[Intel-gfx] [PATCH 1/2] drm/i915: Move fence register tracking from i915->mm to ggtt
As the fence registers only apply to regions inside the GGTT is makes
more sense that we track these as part of the i915_ggtt and not the
general mm. In the next patch, we will then pull the register locking
underneath the i915_ggtt.mutex.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 +-
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 6 +-
drivers/gpu/drm/i915/gvt/aperture_gm.c| 7 +-
drivers/gpu/drm/i915/gvt/gvt.h| 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 42 ++-
drivers/gpu/drm/i915/i915_drv.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 28 ---
drivers/gpu/drm/i915/i915_gem.c | 52 +++--
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 90 ---
drivers/gpu/drm/i915/i915_gem_fence_reg.h | 19 -
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +
drivers/gpu/drm/i915/i915_gem_gtt.h | 14 +++-
drivers/gpu/drm/i915/i915_gpu_error.c | 6 +-
drivers/gpu/drm/i915/i915_vma.h | 2 +-
15 files changed, 144 insertions(+), 137 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index c7b9b34de01b..a8b8b9c281f1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -310,9 +310,9 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
/* Mark as being mmapped into userspace for later revocation */
assert_rpm_wakelock_held(i915);
if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
- list_add(>userfault_link, >mm.userfault_list);
+ list_add(>userfault_link, >ggtt.userfault_list);
if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
- intel_wakeref_auto(>mm.userfault_wakeref,
+ intel_wakeref_auto(>ggtt.userfault_wakeref,
msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
GEM_BUG_ON(!obj->userfault_count);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index f40f13c0b8b7..6d6064fb2bf5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -126,7 +126,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
{
GEM_TRACE("\n");
- intel_wakeref_auto(>mm.userfault_wakeref, 0);
+ intel_wakeref_auto(>ggtt.userfault_wakeref, 0);
flush_workqueue(i915->wq);
mutex_lock(>drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 60d24110af80..4abebcd36a71 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -695,19 +695,19 @@ static void revoke_mmaps(struct drm_i915_private *i915)
{
int i;
- for (i = 0; i < i915->num_fence_regs; i++) {
+ for (i = 0; i < i915->ggtt.num_fences; i++) {
struct drm_vma_offset_node *node;
struct i915_vma *vma;
u64 vma_offset;
- vma = READ_ONCE(i915->fence_regs[i].vma);
+ vma = READ_ONCE(i915->ggtt.fence_regs[i].vma);
if (!vma)
continue;
if (!i915_vma_has_userfault(vma))
continue;
- GEM_BUG_ON(vma->fence != >fence_regs[i]);
+ GEM_BUG_ON(vma->fence != >ggtt.fence_regs[i]);
node = >obj->base.vma_node;
vma_offset = vma->ggtt_view.partial.offset << PAGE_SHIFT;
unmap_mapping_range(i915->drm.anon_inode->i_mapping,
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 1fa2f65c3cd1..4098902bfaeb 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -35,6 +35,7 @@
*/
#include "i915_drv.h"
+#include "i915_gem_fence_reg.h"
#include "gvt.h"
static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
@@ -128,7 +129,7 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
+ struct i915_fence_reg *reg;
i915_reg_t fence_reg_lo, fence_reg_hi;
assert_rpm_wakelock_held(dev_priv);
@@ -163,7 +164,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
+ struct i915_fence_reg *reg;
u32 i;
if (WARN_ON(!vgpu_fence_sz(vgpu)))
@@ -187,7 +188,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct drm_i915_fence_reg *reg;
Re: [Intel-gfx] [PATCH 04/23] drm/i915: Sanitize the terminology used for TypeC port modes
On Mon, Jun 10, 2019 at 04:21:30PM -0700, Lucas De Marchi wrote:
> On Tue, Jun 04, 2019 at 05:58:07PM +0300, Imre Deak wrote:
> > The TypeC port mode can switch dynamically, to reflect that better call
> > the port's mode as 'mode' rather than 'type'.
> >
> > While at it:
> > - s/TC_PORT_TBT/TC_PORT_TBT_ALT/ and s/TC_PORT_TYPEC/TC_PORT_DP_ALT/.
> > 'TYPEC' is ambiguous, TBT_ALT and DP_ALT better match the reality.
>
> \o/
>
> >
> > - Remove the 'unknown' TypeC port mode. The mode is always known, it's
> > the TBT-alt/safe mode after HW reset and after disconnecting the PHY.
> > Simplify the tc_port/tc_type checks accordingly.
>
> I think the unknown was there to cover the first time we set the type
> (aka mode). Since we don't do this during initialization and only when
> updating the connected state, we needed that to protect some functions.
Ok, but the mode is still known even before updating the connected state
(that is probing), we just have to make sure that we read out the HW
state (which is what this mode is) early enough. At least selecting the
proper AUX power well (DP-Alt or TBT-Alt AUX) depends on this.
That HW readout happens already now via the intel_ddi_init() function.
> >
> > - Don't WARN if the port mode changes, that can happen normally.
> >
> > No functional changes.
> >
> > Cc: Animesh Manna
> > Cc: Paulo Zanoni
> > Cc: Anusha Srivatsa
> > Cc: José Roberto de Souza
> > Cc: Rodrigo Vivi
> > Signed-off-by: Imre Deak
> > ---
> > drivers/gpu/drm/i915/intel_ddi.c | 11 +++---
> > drivers/gpu/drm/i915/intel_display.h | 7 ++--
> > drivers/gpu/drm/i915/intel_dp.c | 2 +-
> > drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +-
> > drivers/gpu/drm/i915/intel_drv.h | 2 +-
> > drivers/gpu/drm/i915/intel_tc.c | 48 +++
> > 6 files changed, 31 insertions(+), 41 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index 5a1c98438375..a3574f14a3d0 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2986,14 +2986,14 @@ static void icl_program_mg_dp_mode(struct
> > intel_digital_port *intel_dig_port)
> > enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
> > u32 ln0, ln1, lane_info;
> >
> > - if (tc_port == PORT_TC_NONE || intel_dig_port->tc_type == TC_PORT_TBT)
> > + if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT)
> > return;
> >
> > ln0 = I915_READ(MG_DP_MODE(0, port));
> > ln1 = I915_READ(MG_DP_MODE(1, port));
> >
> > - switch (intel_dig_port->tc_type) {
> > - case TC_PORT_TYPEC:
> > + switch (intel_dig_port->tc_mode) {
> > + case TC_PORT_DP_ALT:
> > ln0 &= ~(MG_DP_MODE_CFG_DP_X1_MODE | MG_DP_MODE_CFG_DP_X2_MODE);
> > ln1 &= ~(MG_DP_MODE_CFG_DP_X1_MODE | MG_DP_MODE_CFG_DP_X2_MODE);
> >
> > @@ -3036,7 +3036,7 @@ static void icl_program_mg_dp_mode(struct
> > intel_digital_port *intel_dig_port)
> > break;
> >
> > default:
> > - MISSING_CASE(intel_dig_port->tc_type);
> > + MISSING_CASE(intel_dig_port->tc_mode);
> > return;
> > }
> >
> > @@ -3630,8 +3630,7 @@ intel_ddi_pre_pll_enable(struct intel_encoder
> > *encoder,
> > * Program the lane count for static/dynamic connections on Type-C
> > ports.
> > * Skip this step for TBT.
> > */
> > - if (dig_port->tc_type == TC_PORT_UNKNOWN ||
> > - dig_port->tc_type == TC_PORT_TBT)
> > + if (dig_port->tc_mode == TC_PORT_TBT_ALT)
> > return;
> >
> > intel_ddi_set_fia_lane_count(encoder, crtc_state, port);
> > diff --git a/drivers/gpu/drm/i915/intel_display.h
> > b/drivers/gpu/drm/i915/intel_display.h
> > index ee6b8194a459..d296556ed82e 100644
> > --- a/drivers/gpu/drm/i915/intel_display.h
> > +++ b/drivers/gpu/drm/i915/intel_display.h
> > @@ -189,10 +189,9 @@ enum tc_port {
> > I915_MAX_TC_PORTS
> > };
> >
> > -enum tc_port_type {
> > - TC_PORT_UNKNOWN = 0,
> > - TC_PORT_TYPEC,
> > - TC_PORT_TBT,
> > +enum tc_port_mode {
> > + TC_PORT_TBT_ALT,
> > + TC_PORT_DP_ALT,
> > TC_PORT_LEGACY,
> > };
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index b69310bd9914..e1e27662aa6d 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1175,7 +1175,7 @@ static u32 skl_get_aux_send_ctl(struct intel_dp
> > *intel_dp,
> > DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) |
> > DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
> >
> > - if (intel_dig_port->tc_type == TC_PORT_TBT)
> > + if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT)
> > ret |= DP_AUX_CH_CTL_TBT_IO;
> >
> > return ret;
> > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > index 69787f259677..f4787650a0d3 100644
> > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/6] drm/i915: Remove I915_READ8
== Series Details == Series: series starting with [CI,1/6] drm/i915: Remove I915_READ8 URL : https://patchwork.freedesktop.org/series/61886/ State : warning == Summary == $ dim checkpatch origin/drm-tip 93b7e48b69ad drm/i915: Remove I915_READ8 -:62: WARNING:LINE_SPACING: Missing a blank line after declarations #62: FILE: drivers/gpu/drm/i915/intel_crt.c:682: + u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg); + intel_uncore_write(uncore, total: 0 errors, 1 warnings, 0 checks, 124 lines checked 9ed4bd021605 drm/i915: Remove I915_POSTING_READ_FW 18af6f318038 drm/i915: Remove POSTING_READ16 766eebd60a9a drm/i915: Remove I915_WRITE_NOTRACE 9250fe0d0074 drm/i915: Remove I915_READ_NOTRACE -:119: WARNING:LONG_LINE: line over 100 characters #119: FILE: drivers/gpu/drm/i915/intel_dp.c:1090: +#define C (((status = intel_uncore_read_notrace(>uncore, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) total: 0 errors, 1 warnings, 0 checks, 195 lines checked 17cb71934cfb drm/i915: Remove I915_READ16 and I915_WRITE16 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Allow interrupts when taking the timeline->mutex
== Series Details ==
Series: drm/i915: Allow interrupts when taking the timeline->mutex
URL : https://patchwork.freedesktop.org/series/61833/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13219_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_13219_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_ctx_engines@independent}:
- shard-glk: [PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk6/igt@gem_ctx_engi...@independent.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-glk4/igt@gem_ctx_engi...@independent.html
Known issues
Here are the changes found in Patchwork_13219_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_engines@execute-one:
- shard-glk: [PASS][3] -> [DMESG-WARN][4] ([fdo#110869])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk5/igt@gem_ctx_engi...@execute-one.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-glk1/igt@gem_ctx_engi...@execute-one.html
* igt@i915_pm_rpm@system-suspend:
- shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#104108] /
[fdo#107807])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl4/igt@i915_pm_...@system-suspend.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-skl1/igt@i915_pm_...@system-suspend.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-apl: [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +2
similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl7/igt@kms_cursor_...@pipe-c-cursor-suspend.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-apl4/igt@kms_cursor_...@pipe-c-cursor-suspend.html
* igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic:
- shard-skl: [PASS][9] -> [DMESG-WARN][10] ([fdo#105541])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl6/igt@kms_cursor_leg...@long-nonblocking-modeset-vs-cursor-atomic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-skl4/igt@kms_cursor_leg...@long-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_flip_tiling@flip-changes-tiling:
- shard-skl: [PASS][11] -> [FAIL][12] ([fdo#108303])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_flip_til...@flip-changes-tiling.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-skl4/igt@kms_flip_til...@flip-changes-tiling.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +2 similar
issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb6/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-iclb6/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-1p-rte:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167] / [fdo#110378])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-rte.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-rte.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt:
- shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +10 similar
issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw8/igt@kms_frontbuffer_track...@fbc-2p-primscrn-indfb-plflip-blt.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-hsw1/igt@kms_frontbuffer_track...@fbc-2p-primscrn-indfb-plflip-blt.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-skl4/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html
* igt@kms_plane_lowres@pipe-a-tiling-y:
- shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#103166])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-y.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13219/shard-iclb8/igt@kms_plane_low...@pipe-a-tiling-y.html
* igt@kms_setmode@basic:
-
[Intel-gfx] [PATCH 2/2] drm/i915: Make GuC GGTT reservation work on ggtt
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Michal)
v3:
* Add comment explaining reason for reservation, add assert and fix
error message. (Michal)
Signed-off-by: Tvrtko Ursulin
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 43 -
drivers/gpu/drm/i915/intel_guc.c| 27 --
drivers/gpu/drm/i915/intel_guc.h| 2 --
3 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5b5125ee49f3..ca3d79662cc1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2807,6 +2807,32 @@ static void fini_aliasing_ppgtt(struct drm_i915_private
*i915)
ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
+static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
+{
+ u64 size;
+ int ret;
+
+ if (!USES_GUC(ggtt->vm.i915))
+ return 0;
+
+ GEM_BUG_ON(GUC_GGTT_TOP > ggtt->vm.total);
+ size = ggtt->vm.total - GUC_GGTT_TOP;
+
+ ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
+ GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+ PIN_NOEVICT);
+ if (ret)
+ DRM_DEBUG_DRIVER("Failed to reserve top of GGTT for GuC\n");
+
+ return ret;
+}
+
+static void ggtt_release_guc_top(struct i915_ggtt *ggtt)
+{
+ if (drm_mm_node_allocated(>uc_fw))
+ drm_mm_remove_node(>uc_fw);
+}
+
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
{
/* Let GEM Manage all of the aperture.
@@ -2844,11 +2870,14 @@ int i915_gem_init_ggtt(struct drm_i915_private
*dev_priv)
if (ret)
return ret;
- if (USES_GUC(dev_priv)) {
- ret = intel_guc_reserve_ggtt_top(_priv->guc);
- if (ret)
- goto err_reserve;
- }
+ /*
+* The upper portion of the GuC address space has a sizeable hole
+* (several MB) that is inaccessible by GuC. Reserve this range within
+* GGTT as it can comfortably hold GuC/HuC firmware images.
+*/
+ ret = ggtt_reserve_guc_top(ggtt);
+ if (ret)
+ goto err_reserve;
/* Clear any non-preallocated blocks */
drm_mm_for_each_hole(entry, >vm.mm, hole_start, hole_end) {
@@ -2870,7 +2899,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
return 0;
err_appgtt:
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
err_reserve:
drm_mm_remove_node(>error_capture);
return ret;
@@ -2897,7 +2926,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
if (drm_mm_node_allocated(>error_capture))
drm_mm_remove_node(>error_capture);
- intel_guc_release_ggtt_top(_priv->guc);
+ ggtt_release_guc_top(ggtt);
if (drm_mm_initialized(>vm.mm)) {
intel_vgt_deballoon(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index d45d97624402..c40a6efdd33a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -685,30 +685,3 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc
*guc, u32 size)
i915_gem_object_put(obj);
return vma;
}
-
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
- u64 size;
- int ret;
-
- size = ggtt->vm.total - GUC_GGTT_TOP;
-
- ret = i915_gem_gtt_reserve(>vm, >uc_fw, size,
- GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
- PIN_NOEVICT);
- if (ret)
- DRM_DEBUG_DRIVER("GuC: failed to reserve top of ggtt\n");
-
- return ret;
-}
-
-void intel_guc_release_ggtt_top(struct intel_guc *guc)
-{
- struct drm_i915_private *i915 = guc_to_i915(guc);
- struct i915_ggtt *ggtt = >ggtt;
-
- if (drm_mm_node_allocated(>uc_fw))
- drm_mm_remove_node(>uc_fw);
-}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 85c3b02a0c08..08c906abdfa2 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,8 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
-void intel_guc_release_ggtt_top(struct intel_guc
[Intel-gfx] [PATCH 1/2] drm/i915/guc: Move intel_guc_reserved_gtt_size to intel_wopcm_guc_size
From: Tvrtko Ursulin
Reduces pointer chasing and gets more to the point.
v2:
* Tidy whitespace.
* Tidy comment. (Michal)
Signed-off-by: Tvrtko Ursulin
Suggested-by: Michal Wajdeczko
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/intel_guc.c| 17 -
drivers/gpu/drm/i915/intel_guc.h| 1 -
drivers/gpu/drm/i915/intel_wopcm.h | 15 +++
4 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2e15850bd987..5b5125ee49f3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2830,7 +2830,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
* why.
*/
ggtt->pin_bias = max_t(u32, I915_GTT_PAGE_SIZE,
- intel_guc_reserved_gtt_size(_priv->guc));
+ intel_wopcm_guc_size(_priv->wopcm));
ret = intel_vgt_balloon(dev_priv);
if (ret)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 43232242d167..d45d97624402 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -686,23 +686,6 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc
*guc, u32 size)
return vma;
}
-/**
- * intel_guc_reserved_gtt_size()
- * @guc: intel_guc structure
- *
- * The GuC WOPCM mapping shadows the lower part of the GGTT, so if we are using
- * GuC we can't have any objects pinned in that region. This function returns
- * the size of the shadowed region.
- *
- * Returns:
- * 0 if GuC is not present or not in use.
- * Otherwise, the GuC WOPCM size.
- */
-u32 intel_guc_reserved_gtt_size(struct intel_guc *guc)
-{
- return guc_to_i915(guc)->wopcm.guc.size;
-}
-
int intel_guc_reserve_ggtt_top(struct intel_guc *guc)
{
struct drm_i915_private *i915 = guc_to_i915(guc);
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index e07e4c69cf08..85c3b02a0c08 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -172,7 +172,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
rsa_offset);
int intel_guc_suspend(struct intel_guc *guc);
int intel_guc_resume(struct intel_guc *guc);
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
-u32 intel_guc_reserved_gtt_size(struct intel_guc *guc);
int intel_guc_reserve_ggtt_top(struct intel_guc *guc);
void intel_guc_release_ggtt_top(struct intel_guc *guc);
diff --git a/drivers/gpu/drm/i915/intel_wopcm.h
b/drivers/gpu/drm/i915/intel_wopcm.h
index 6298910a384c..114401971520 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.h
+++ b/drivers/gpu/drm/i915/intel_wopcm.h
@@ -24,6 +24,21 @@ struct intel_wopcm {
} guc;
};
+/**
+ * intel_wopcm_guc_size()
+ * @wopcm: intel_wopcm structure
+ *
+ * Returns size of the WOPCM shadowed region.
+ *
+ * Returns:
+ * 0 if GuC is not present or not in use.
+ * Otherwise, the GuC WOPCM size.
+ */
+static inline u32 intel_wopcm_guc_size(struct intel_wopcm *wopcm)
+{
+ return wopcm->guc.size;
+}
+
void intel_wopcm_init_early(struct intel_wopcm *wopcm);
int intel_wopcm_init(struct intel_wopcm *wopcm);
int intel_wopcm_init_hw(struct intel_wopcm *wopcm);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI 3/6] drm/i915: Remove POSTING_READ16
From: Tvrtko Ursulin
Only a few call sites remain which have been converted to uncore mmio
accessors and so the macro can be removed.
ENGINE_POSTING_READ16 is added to replace one engine->mmio_base relative
call site.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/intel_engine.h | 1 +
drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 8
drivers/gpu/drm/i915/i915_drv.h| 1 -
drivers/gpu/drm/i915/intel_pm.c| 11 ++-
4 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h
b/drivers/gpu/drm/i915/gt/intel_engine.h
index 201bbd2a4faf..1439fa4093ac 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -52,6 +52,7 @@ struct drm_printer;
#define ENGINE_READ(...) __ENGINE_READ_OP(read, __VA_ARGS__)
#define ENGINE_READ_FW(...)__ENGINE_READ_OP(read_fw, __VA_ARGS__)
#define ENGINE_POSTING_READ(...) __ENGINE_READ_OP(posting_read, __VA_ARGS__)
+#define ENGINE_POSTING_READ16(...) __ENGINE_READ_OP(posting_read16,
__VA_ARGS__)
#define ENGINE_READ64(engine__, lower_reg__, upper_reg__) \
__ENGINE_REG_OP(read64_2x32, (engine__), \
diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
index ff58d658e3e2..0373af648e72 100644
--- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
@@ -976,11 +976,11 @@ i9xx_irq_disable(struct intel_engine_cs *engine)
static void
i8xx_irq_enable(struct intel_engine_cs *engine)
{
- struct drm_i915_private *dev_priv = engine->i915;
+ struct drm_i915_private *i915 = engine->i915;
- dev_priv->irq_mask &= ~engine->irq_enable_mask;
- I915_WRITE16(GEN2_IMR, dev_priv->irq_mask);
- POSTING_READ16(RING_IMR(engine->mmio_base));
+ i915->irq_mask &= ~engine->irq_enable_mask;
+ intel_uncore_write16(>uncore, GEN2_IMR, i915->irq_mask);
+ ENGINE_POSTING_READ16(engine, RING_IMR);
}
static void
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 265386c22ff9..565a46b909be 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2850,7 +2850,6 @@ extern void intel_display_print_error_state(struct
drm_i915_error_state_buf *e,
#define I915_WRITE_NOTRACE(reg__, val__) __I915_REG_OP(write_notrace,
dev_priv, (reg__), (val__))
#define POSTING_READ(reg__)__I915_REG_OP(posting_read, dev_priv, (reg__))
-#define POSTING_READ16(reg__) __I915_REG_OP(posting_read16, dev_priv, (reg__))
/* These are untraced mmio-accessors that are only valid to be used inside
* critical sections, such as inside IRQ handlers, where forcewake is
explicitly
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 84588ff8732f..5a6679e2b6ee 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6406,13 +6406,14 @@ void intel_init_ipc(struct drm_i915_private *dev_priv)
*/
DEFINE_SPINLOCK(mchdev_lock);
-bool ironlake_set_drps(struct drm_i915_private *dev_priv, u8 val)
+bool ironlake_set_drps(struct drm_i915_private *i915, u8 val)
{
+ struct intel_uncore *uncore = >uncore;
u16 rgvswctl;
lockdep_assert_held(_lock);
- rgvswctl = I915_READ16(MEMSWCTL);
+ rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
if (rgvswctl & MEMCTL_CMD_STS) {
DRM_DEBUG("gpu busy, RCS change rejected\n");
return false; /* still busy with another command */
@@ -6420,11 +6421,11 @@ bool ironlake_set_drps(struct drm_i915_private
*dev_priv, u8 val)
rgvswctl = (MEMCTL_CMD_CHFREQ << MEMCTL_CMD_SHIFT) |
(val << MEMCTL_FREQ_SHIFT) | MEMCTL_SFCAVM;
- I915_WRITE16(MEMSWCTL, rgvswctl);
- POSTING_READ16(MEMSWCTL);
+ intel_uncore_write16(uncore, MEMSWCTL, rgvswctl);
+ intel_uncore_posting_read16(uncore, MEMSWCTL);
rgvswctl |= MEMCTL_CMD_STS;
- I915_WRITE16(MEMSWCTL, rgvswctl);
+ intel_uncore_write16(uncore, MEMSWCTL, rgvswctl);
return true;
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI 1/6] drm/i915: Remove I915_READ8
From: Tvrtko Ursulin
Only a few call sites remain which have been converted to uncore mmio
accessors and so the macro can be removed.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 2 --
drivers/gpu/drm/i915/intel_crt.c | 41 ++--
drivers/gpu/drm/i915/intel_pm.c | 6 ++---
3 files changed, 26 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d3c02e009a98..865182126f5f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2841,8 +2841,6 @@ extern void intel_display_print_error_state(struct
drm_i915_error_state_buf *e,
#define __I915_REG_OP(op__, dev_priv__, ...) \
intel_uncore_##op__(&(dev_priv__)->uncore, __VA_ARGS__)
-#define I915_READ8(reg__)__I915_REG_OP(read8, dev_priv, (reg__))
-
#define I915_READ16(reg__)__I915_REG_OP(read16, dev_priv, (reg__))
#define I915_WRITE16(reg__, val__) __I915_REG_OP(write16, dev_priv, (reg__),
(val__))
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index bb56518576a1..3fcf2f84bcce 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -643,6 +643,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
{
struct drm_device *dev = crt->base.base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_uncore *uncore = _priv->uncore;
u32 save_bclrpat;
u32 save_vtotal;
u32 vtotal, vactive;
@@ -663,9 +664,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
pipeconf_reg = PIPECONF(pipe);
pipe_dsl_reg = PIPEDSL(pipe);
- save_bclrpat = I915_READ(bclrpat_reg);
- save_vtotal = I915_READ(vtotal_reg);
- vblank = I915_READ(vblank_reg);
+ save_bclrpat = intel_uncore_read(uncore, bclrpat_reg);
+ save_vtotal = intel_uncore_read(uncore, vtotal_reg);
+ vblank = intel_uncore_read(uncore, vblank_reg);
vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
vactive = (save_vtotal & 0x7ff) + 1;
@@ -674,21 +675,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
vblank_end = ((vblank >> 16) & 0xfff) + 1;
/* Set the border color to purple. */
- I915_WRITE(bclrpat_reg, 0x500050);
+ intel_uncore_write(uncore, bclrpat_reg, 0x500050);
if (!IS_GEN(dev_priv, 2)) {
- u32 pipeconf = I915_READ(pipeconf_reg);
- I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
- POSTING_READ(pipeconf_reg);
+ u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
+ intel_uncore_write(uncore,
+ pipeconf_reg,
+ pipeconf | PIPECONF_FORCE_BORDER);
+ intel_uncore_posting_read(uncore, pipeconf_reg);
/* Wait for next Vblank to substitue
* border color for Color info */
intel_wait_for_vblank(dev_priv, pipe);
- st00 = I915_READ8(_VGA_MSR_WRITE);
+ st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
status = ((st00 & (1 << 4)) != 0) ?
connector_status_connected :
connector_status_disconnected;
- I915_WRITE(pipeconf_reg, pipeconf);
+ intel_uncore_write(uncore, pipeconf_reg, pipeconf);
} else {
bool restore_vblank = false;
int count, detect;
@@ -702,9 +705,10 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
u32 vsync_start = (vsync & 0x) + 1;
vblank_start = vsync_start;
- I915_WRITE(vblank_reg,
- (vblank_start - 1) |
- ((vblank_end - 1) << 16));
+ intel_uncore_write(uncore,
+ vblank_reg,
+ (vblank_start - 1) |
+ ((vblank_end - 1) << 16));
restore_vblank = true;
}
/* sample in the vertical border, selecting the larger one */
@@ -716,9 +720,10 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
/*
* Wait for the border to be displayed
*/
- while (I915_READ(pipe_dsl_reg) >= vactive)
+ while (intel_uncore_read(uncore, pipe_dsl_reg) >= vactive)
;
- while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
+ while ((dsl = intel_uncore_read(uncore, pipe_dsl_reg)) <=
+ vsample)
;
/*
* Watch ST00 for an entire scanline
@@ -728,14 +733,14 @@ intel_crt_load_detect(struct
[Intel-gfx] [CI 5/6] drm/i915: Remove I915_READ_NOTRACE
From: Tvrtko Ursulin
Only a few call sites remain which have been converted to uncore mmio
accessors and so the macro can be removed.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/gvt/debugfs.c | 4 +--
drivers/gpu/drm/i915/gvt/firmware.c | 5 ++--
drivers/gpu/drm/i915/i915_drv.c | 6 ++--
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/i915_pmu.c | 8 --
drivers/gpu/drm/i915/intel_dp.c | 43 +++--
drivers/gpu/drm/i915/intel_gmbus.c | 11
7 files changed, 43 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/debugfs.c
b/drivers/gpu/drm/i915/gvt/debugfs.c
index 8a9606f91e68..2fb7b73b260d 100644
--- a/drivers/gpu/drm/i915/gvt/debugfs.c
+++ b/drivers/gpu/drm/i915/gvt/debugfs.c
@@ -58,12 +58,12 @@ static int mmio_offset_compare(void *priv,
static inline int mmio_diff_handler(struct intel_gvt *gvt,
u32 offset, void *data)
{
- struct drm_i915_private *dev_priv = gvt->dev_priv;
+ struct drm_i915_private *i915 = gvt->dev_priv;
struct mmio_diff_param *param = data;
struct diff_mmio *node;
u32 preg, vreg;
- preg = I915_READ_NOTRACE(_MMIO(offset));
+ preg = intel_uncore_read_notrace(>uncore, _MMIO(offset));
vreg = vgpu_vreg(param->vgpu, offset);
if (preg != vreg) {
diff --git a/drivers/gpu/drm/i915/gvt/firmware.c
b/drivers/gpu/drm/i915/gvt/firmware.c
index 4ac18b447247..049775e8e350 100644
--- a/drivers/gpu/drm/i915/gvt/firmware.c
+++ b/drivers/gpu/drm/i915/gvt/firmware.c
@@ -68,9 +68,10 @@ static struct bin_attribute firmware_attr = {
static int mmio_snapshot_handler(struct intel_gvt *gvt, u32 offset, void *data)
{
- struct drm_i915_private *dev_priv = gvt->dev_priv;
+ struct drm_i915_private *i915 = gvt->dev_priv;
- *(u32 *)(data + offset) = I915_READ_NOTRACE(_MMIO(offset));
+ *(u32 *)(data + offset) = intel_uncore_read_notrace(>uncore,
+ _MMIO(offset));
return 0;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 1af6751e1b36..81ff2c78fd55 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2708,7 +2708,7 @@ static void vlv_restore_gunit_s0ix_state(struct
drm_i915_private *dev_priv)
I915_WRITE(VLV_GUNIT_CLOCK_GATE2, s->clock_gate_dis2);
}
-static int vlv_wait_for_pw_status(struct drm_i915_private *dev_priv,
+static int vlv_wait_for_pw_status(struct drm_i915_private *i915,
u32 mask, u32 val)
{
i915_reg_t reg = VLV_GTLC_PW_STATUS;
@@ -2722,7 +2722,9 @@ static int vlv_wait_for_pw_status(struct drm_i915_private
*dev_priv,
* Transitioning between RC6 states should be at most 2ms (see
* valleyview_enable_rps) so use a 3ms timeout.
*/
- ret = wait_for(((reg_value = I915_READ_NOTRACE(reg)) & mask) == val, 3);
+ ret = wait_for(((reg_value =
+intel_uncore_read_notrace(>uncore, reg)) & mask)
+ == val, 3);
/* just trace the final value */
trace_i915_reg_rw(false, reg, reg_value, sizeof(reg_value), true);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 30656543159b..66498d010c39 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2846,7 +2846,6 @@ extern void intel_display_print_error_state(struct
drm_i915_error_state_buf *e,
#define I915_READ(reg__)__I915_REG_OP(read, dev_priv, (reg__))
#define I915_WRITE(reg__, val__) __I915_REG_OP(write, dev_priv, (reg__),
(val__))
-#define I915_READ_NOTRACE(reg__)__I915_REG_OP(read_notrace, dev_priv,
(reg__))
#define POSTING_READ(reg__)__I915_REG_OP(posting_read, dev_priv, (reg__))
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 1ccda0ee4ff5..eb9c0e0e545c 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -227,9 +227,11 @@ frequency_sample(struct drm_i915_private *dev_priv,
unsigned int period_ns)
if (dev_priv->gt.awake) {
intel_wakeref_t wakeref;
- with_intel_runtime_pm_if_in_use(dev_priv, wakeref)
- val = intel_get_cagf(dev_priv,
-
I915_READ_NOTRACE(GEN6_RPSTAT1));
+ with_intel_runtime_pm_if_in_use(dev_priv, wakeref) {
+ val =
intel_uncore_read_notrace(_priv->uncore,
+ GEN6_RPSTAT1);
+ val = intel_get_cagf(dev_priv, val);
+ }
}
add_sample_mult(_priv->pmu.sample[__I915_SAMPLE_FREQ_ACT],
diff --git
