[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/21] drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt

2019-09-01 Thread Patchwork
== Series Details ==

Series: series starting with [01/21] drm/i915: Restrict the aliasing-ppgtt to 
the size of the ggtt
URL   : https://patchwork.freedesktop.org/series/66109/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6818 -> Patchwork_14255


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14255/

Known issues


  Here are the changes found in Patchwork_14255 that come from known issues:

### IGT changes ###

 Possible fixes 

  * igt@gem_exec_gttfill@basic:
- fi-bsw-kefka:   [SKIP][1] ([fdo#109271]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-bsw-kefka/igt@gem_exec_gttf...@basic.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14255/fi-bsw-kefka/igt@gem_exec_gttf...@basic.html
- fi-bsw-n3050:   [SKIP][3] ([fdo#109271]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-bsw-n3050/igt@gem_exec_gttf...@basic.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14255/fi-bsw-n3050/igt@gem_exec_gttf...@basic.html

  * igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850:   [INCOMPLETE][5] ([fdo#107718]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14255/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_module_load@reload-with-fault-injection:
- {fi-icl-guc}:   [DMESG-WARN][7] ([fdo#106107]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-icl-guc/igt@i915_module_l...@reload-with-fault-injection.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14255/fi-icl-guc/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3:  [FAIL][9] ([fdo#103167]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14255/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html
- fi-bsw-n3050:   [FAIL][11] ([fdo#103167]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-bsw-n3050/igt@kms_frontbuffer_track...@basic.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14255/fi-bsw-n3050/igt@kms_frontbuffer_track...@basic.html

  
 Warnings 

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [FAIL][13] ([fdo#111096]) -> [FAIL][14] ([fdo#111407])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14255/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407


Participating hosts (50 -> 44)
--

  Additional (1): fi-kbl-soraka 
  Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y 
fi-byt-clapper fi-bdw-samus 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6818 -> Patchwork_14255

  CI-20190529: 20190529
  CI_DRM_6818: c914252ce49ad246ccf5b23b8627319fdf5ff995 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5162: e62ea305fdba2a9cd0dadfa527b54529cb0d1438 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14255: da16be36aba9d7c66fb817d1773c433593494414 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

da16be36aba9 drm/i915: Move global activity tracking from GEM to GT
cafe9a8c443f drm/i915: Move request runtime management onto gt
b071d804c8ef drm/i915: Merge wait_for_timelines with retire_request
9f0a0ae2882e drm/i915: Remove the GEM idle worker
66e5834d5fbb drm/i915: Drop struct_mutex from around i915_retire_requests()
b9574533 drm/i915: Move idle barrier cleanup into engine-pm
19e36732883f drm/i915: Coordinate i915_active with its own mutex
55ab20749ded drm/i915: Push the i915_active.retire into a worker
ed159fb30e95 drm/i915: Pull i915_vma_pin under the vm->mutex
a39fcbd7b6c4 drm/i915: Mark up address spaces that may need to allocate
0fc6053b26bd drm/i915/gtt: Make sure the gen6 ppgtt is bound before first use
2419eb0b1436 drm/i915: Make i915_vma.flags atomic_t for mutex reduction
f1ea7eab5fc8 drm/i915: Only track 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/21] drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt

2019-09-01 Thread Patchwork
== Series Details ==

Series: series starting with [01/21] drm/i915: Restrict the aliasing-ppgtt to 
the size of the ggtt
URL   : https://patchwork.freedesktop.org/series/66109/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
68d6959ea4fd drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt
4fdf35426160 drm/i915: Report aliasing ppgtt size as ggtt size
31b06e8baa53 drm/i915/execlists: Ignore lost completion events
-:11: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#11: 
661497512us : process_csb: rcs0 csb[0]: status=0x10008002:0x0020 
[lite-restore]

total: 0 errors, 1 warnings, 0 checks, 133 lines checked
b736ca36e688 drm/i915: Refresh the errno to vmf_fault translations
704d348f6875 drm/i915: Replace obj->pin_global with obj->frontbuffer
-:255: WARNING:PREFER_SEQ_PUTS: Prefer seq_puts to seq_printf
#255: FILE: drivers/gpu/drm/i915/i915_debugfs.c:219:
+   seq_printf(m, " (fb)");

total: 0 errors, 1 warnings, 0 checks, 179 lines checked
6207e25cee7f dma-fence: Serialise signal enabling 
(dma_fence_enable_sw_signaling)
-:14: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ 
chars of sha1> ("")' - ie: 'commit 0fc89b6802ba ("dma-fence: Simply 
wrap dma_fence_signal_locked with dma_fence_signal")'
#14: 
See also 0fc89b6802ba ("dma-fence: Simply wrap dma_fence_signal_locked

total: 1 errors, 0 warnings, 0 checks, 24 lines checked
56fadeb07e9a drm/mm: Pack allocated/scanned boolean into a bitfield
44ed8393bb2c drm/i915: Make shrink/unshrink be atomic
f1ea7eab5fc8 drm/i915: Only track bound elements of the GTT
2419eb0b1436 drm/i915: Make i915_vma.flags atomic_t for mutex reduction
0fc6053b26bd drm/i915/gtt: Make sure the gen6 ppgtt is bound before first use
-:118: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#118: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:430:
+   struct mutex pin_mutex;

total: 0 errors, 0 warnings, 1 checks, 96 lines checked
a39fcbd7b6c4 drm/i915: Mark up address spaces that may need to allocate
ed159fb30e95 drm/i915: Pull i915_vma_pin under the vm->mutex
55ab20749ded drm/i915: Push the i915_active.retire into a worker
19e36732883f drm/i915: Coordinate i915_active with its own mutex
-:1352: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#1352: FILE: drivers/gpu/drm/i915/i915_active_types.h:49:
+   struct mutex mutex;

total: 0 errors, 0 warnings, 1 checks, 1509 lines checked
b9574533 drm/i915: Move idle barrier cleanup into engine-pm
66e5834d5fbb drm/i915: Drop struct_mutex from around i915_retire_requests()
9f0a0ae2882e drm/i915: Remove the GEM idle worker
b071d804c8ef drm/i915: Merge wait_for_timelines with retire_request
cafe9a8c443f drm/i915: Move request runtime management onto gt
-:228: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#228: 
new file mode 100644

-:233: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier 
tag in line 1
#233: FILE: drivers/gpu/drm/i915/gt/intel_gt_requests.c:1:
+/*

-:234: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use 
line 1 instead
#234: FILE: drivers/gpu/drm/i915/gt/intel_gt_requests.c:2:
+ * SPDX-License-Identifier: MIT

-:357: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier 
tag in line 1
#357: FILE: drivers/gpu/drm/i915/gt/intel_gt_requests.h:1:
+/*

-:358: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use 
line 1 instead
#358: FILE: drivers/gpu/drm/i915/gt/intel_gt_requests.h:2:
+ * SPDX-License-Identifier: MIT

total: 0 errors, 5 warnings, 0 checks, 696 lines checked
da16be36aba9 drm/i915: Move global activity tracking from GEM to GT

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[Intel-gfx] [PATCH i-g-t 1/6] lib: Fix gem_measure_ring_inflight

2019-09-01 Thread Chris Wilson
Any use of __for_each_physical_engine breaks library use of
for_each_physical_ring and in this case (e.g. gem_busy/close-race) leads
to GPU hangs.

Signed-off-by: Chris Wilson 
Cc: Andi Shyti 
Cc: Tvrtko Ursulin 
---
 lib/i915/gem_ring.c   | 26 --
 lib/i915/gem_submission.h |  2 ++
 2 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/lib/i915/gem_ring.c b/lib/i915/gem_ring.c
index bf7f439e1..272264659 100644
--- a/lib/i915/gem_ring.c
+++ b/lib/i915/gem_ring.c
@@ -21,12 +21,13 @@
  * IN THE SOFTWARE.
  */
 
-#include "gem_ring.h"
-
 #include 
 #include 
 #include 
 
+#include "gem_ring.h"
+#include "gem_submission.h"
+
 #include "intel_reg.h"
 #include "drmtest.h"
 #include "ioctl_wrappers.h"
@@ -140,18 +141,23 @@ __gem_measure_ring_inflight(int fd, unsigned int engine, 
enum measure_ring_flags
 unsigned int
 gem_measure_ring_inflight(int fd, unsigned int engine, enum measure_ring_flags 
flags)
 {
-   if (engine == ALL_ENGINES) {
-   unsigned int global_min = ~0u;
+   unsigned int min = ~0u;
 
+   fd = gem_reopen_driver(fd);
+
+   if (engine == ALL_ENGINES) {
for_each_physical_engine(fd, engine) {
-   unsigned int engine_min = 
__gem_measure_ring_inflight(fd, engine, flags);
+   unsigned int count =
+   __gem_measure_ring_inflight(fd, engine, flags);
 
-   if (engine_min < global_min)
-   global_min = engine_min;
+   if (count < min)
+   min = count;
}
-
-   return global_min;
+   } else {
+   min =  __gem_measure_ring_inflight(fd, engine, flags);
}
 
-   return __gem_measure_ring_inflight(fd, engine, flags);
+   close(fd);
+
+   return min;
 }
diff --git a/lib/i915/gem_submission.h b/lib/i915/gem_submission.h
index f94eabb20..1f1d63fe5 100644
--- a/lib/i915/gem_submission.h
+++ b/lib/i915/gem_submission.h
@@ -24,6 +24,8 @@
 #ifndef GEM_SUBMISSION_H
 #define GEM_SUBMISSION_H
 
+#include 
+
 #define GEM_SUBMISSION_SEMAPHORES  (1 << 0)
 #define GEM_SUBMISSION_EXECLISTS   (1 << 1)
 #define GEM_SUBMISSION_GUC (1 << 2)
-- 
2.23.0

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[Intel-gfx] [PATCH i-g-t 6/6] i915/gem_exec_balancer: Beware the migratory fence

2019-09-01 Thread Chris Wilson
If the object needs to be migrated, it may will need GPU relocs and so
have an exclusive fence showing up in the write domain.

Signed-off-by: Chris Wilson 
---
 tests/i915/gem_exec_balancer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index cda156ea6..407dc0eca 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -830,10 +830,10 @@ static void busy(int i915)
do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, );
igt_assert_eq_u32(busy.busy, 1u << (class + 16));
 
-   /* Queued(read): expected class */
+   /* Queued(read, maybe write if being migrated): expected class 
*/
busy.handle = spin[1]->handle;
do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, );
-   igt_assert_eq_u32(busy.busy, 1u << (class + 16));
+   igt_assert_eq_u32(busy.busy & 0x << 16, 1u << (class + 16));
 
/* Queued(write): expected class */
busy.handle = scratch;
-- 
2.23.0

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[Intel-gfx] [PATCH i-g-t 4/6] Add i915/gem_ctx_persistence

2019-09-01 Thread Chris Wilson
Sanity test existing persistence and new exciting non-persistent context
behaviour.

Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Michał Winiarski 
Cc: Jon Bloomfield 
---
 lib/i915/gem_context.c   |  37 
 lib/i915/gem_context.h   |   9 +
 lib/igt_dummyload.c  |   3 +-
 lib/ioctl_wrappers.c |   1 +
 tests/Makefile.sources   |   3 +
 tests/i915/gem_ctx_persistence.c | 312 +++
 tests/meson.build|   1 +
 7 files changed, 365 insertions(+), 1 deletion(-)
 create mode 100644 tests/i915/gem_ctx_persistence.c

diff --git a/lib/i915/gem_context.c b/lib/i915/gem_context.c
index 83c5df961..1fae5191f 100644
--- a/lib/i915/gem_context.c
+++ b/lib/i915/gem_context.c
@@ -272,6 +272,43 @@ void gem_context_set_priority(int fd, uint32_t ctx_id, int 
prio)
igt_assert_eq(__gem_context_set_priority(fd, ctx_id, prio), 0);
 }
 
+/**
+ * __gem_context_set_persistence:
+ * @i915: open i915 drm file descriptor
+ * @ctx: i915 context id
+ * @state: desired persistence
+ *
+ * Declare whether this context is allowed to persist after closing until
+ * its requests are complete (persistent=true) or if it should be
+ * immediately reaped on closing and its requests cancelled
+ * (persistent=false).
+ *
+ * Returns: An integer equal to zero for success and negative for failure
+ */
+int __gem_context_set_persistence(int i915, uint32_t ctx, bool state)
+{
+   struct drm_i915_gem_context_param p = {
+   .ctx_id = ctx,
+   .param = I915_CONTEXT_PARAM_PERSISTENCE,
+   .value = state,
+   };
+
+   return __gem_context_set_param(i915, );
+}
+
+/**
+ * __gem_context_set_persistence:
+ * @i915: open i915 drm file descriptor
+ * @ctx: i915 context id
+ * @state: desired persistence
+ *
+ * Like __gem_context_set_persistence(), except we assert on failure.
+ */
+void gem_context_set_persistence(int i915, uint32_t ctx, bool state)
+{
+   igt_assert_eq(__gem_context_set_persistence(i915, ctx, state), 0);
+}
+
 int
 __gem_context_clone(int i915,
uint32_t src, unsigned int share,
diff --git a/lib/i915/gem_context.h b/lib/i915/gem_context.h
index 8043c3401..6745c90c3 100644
--- a/lib/i915/gem_context.h
+++ b/lib/i915/gem_context.h
@@ -24,6 +24,11 @@
 #ifndef GEM_CONTEXT_H
 #define GEM_CONTEXT_H
 
+#include 
+#include 
+
+struct drm_i915_gem_context_param;
+
 uint32_t gem_context_create(int fd);
 int __gem_context_create(int fd, uint32_t *ctx_id);
 void gem_context_destroy(int fd, uint32_t ctx_id);
@@ -58,6 +63,10 @@ int __gem_context_get_param(int fd, struct 
drm_i915_gem_context_param *p);
 int __gem_context_set_priority(int fd, uint32_t ctx, int prio);
 void gem_context_set_priority(int fd, uint32_t ctx, int prio);
 
+#define I915_CONTEXT_PARAM_PERSISTENCE 0xb
+int __gem_context_set_persistence(int i915, uint32_t ctx, bool state);
+void gem_context_set_persistence(int i915, uint32_t ctx, bool state);
+
 bool gem_context_has_engine(int fd, uint32_t ctx, uint64_t engine);
 
 #endif /* GEM_CONTEXT_H */
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 0e06276af..499cd 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -445,7 +445,8 @@ void igt_spin_free(int fd, igt_spin_t *spin)
gem_close(fd, spin->poll_handle);
}
 
-   gem_close(fd, spin->handle);
+   if (spin->handle)
+   gem_close(fd, spin->handle);
 
if (spin->out_fence >= 0)
close(spin->out_fence);
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 280fdd624..628f8b830 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -445,6 +445,7 @@ int gem_wait(int fd, uint32_t handle, int64_t *timeout_ns)
ret = 0;
if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_WAIT, ))
ret = -errno;
+   errno = 0;
 
if (timeout_ns)
*timeout_ns = wait.timeout_ns;
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index c02e4d948..fe8e221eb 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -153,6 +153,9 @@ gem_ctx_isolation_SOURCES = i915/gem_ctx_isolation.c
 TESTS_progs += gem_ctx_param
 gem_ctx_param_SOURCES = i915/gem_ctx_param.c
 
+TESTS_progs += gem_ctx_persistence
+gem_ctx_persistence_SOURCES = i915/gem_ctx_persistence.c
+
 TESTS_progs += gem_ctx_shared
 gem_ctx_shared_SOURCES = i915/gem_ctx_shared.c
 
diff --git a/tests/i915/gem_ctx_persistence.c b/tests/i915/gem_ctx_persistence.c
new file mode 100644
index 0..ecb791ded
--- /dev/null
+++ b/tests/i915/gem_ctx_persistence.c
@@ -0,0 +1,312 @@
+/*
+ * Copyright © 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, 

[Intel-gfx] [PATCH i-g-t 3/6] i915/gem_tiled_swapped: Tweak mlocked size

2019-09-01 Thread Chris Wilson
On my systems with lots of memdebug enabled, we would hit the oomkiller
90% of the time during the initial mlock prior to allocating any objects
(and about 20% of the time lockup / panic). Tweak the target allocation
sizes, and include a few more breadcrumbs tracing the allocations so
that we can reliably start the tests. We still do hit our shrinker and
even the oom notifier, so still achieving its goal of exercising low
memory and swap pressure.

Signed-off-by: Chris Wilson 
---
 tests/i915/gem_tiled_swapping.c | 26 +-
 1 file changed, 17 insertions(+), 9 deletions(-)

diff --git a/tests/i915/gem_tiled_swapping.c b/tests/i915/gem_tiled_swapping.c
index ddf2a748f..1b70c1e51 100644
--- a/tests/i915/gem_tiled_swapping.c
+++ b/tests/i915/gem_tiled_swapping.c
@@ -165,8 +165,9 @@ static void check_memory_layout(int fd)
 
 igt_main
 {
+   unsigned long n, count;
struct thread *threads;
-   int fd, n, count, num_threads;
+   int fd, num_threads;
 
igt_fixture {
size_t lock_size;
@@ -179,23 +180,30 @@ igt_main
check_memory_layout(fd);
 
/* lock RAM, leaving only 512MB available */
-   lock_size = max(0, intel_get_total_ram_mb() - AVAIL_RAM);
+   count = intel_get_total_ram_mb() - intel_get_avail_ram_mb();
+   count = max(count + 64, AVAIL_RAM);
+   lock_size = max(0, intel_get_total_ram_mb() - count);
+   igt_info("Mlocking %zdMiB of %ld/%ldMiB\n",
+lock_size,
+(long)intel_get_avail_ram_mb(),
+(long)intel_get_total_ram_mb());
igt_lock_mem(lock_size);
 
/* need slightly more than available memory */
-   count = min(intel_get_total_ram_mb(), AVAIL_RAM) * 1.25;
+   count = intel_get_avail_ram_mb() + 128;
+   igt_info("Using %lu 1MiB objects (available RAM: %ld/%ld, swap: 
%ld)\n",
+count,
+(long)intel_get_avail_ram_mb(),
+(long)intel_get_total_ram_mb(),
+(long)intel_get_total_swap_mb());
bo_handles = calloc(count, sizeof(uint32_t));
igt_assert(bo_handles);
 
-   num_threads = gem_available_fences(fd);
+   num_threads = gem_available_fences(fd) + 1;
+   igt_info("Using up to %d fences/threads\n", num_threads);
threads = calloc(num_threads, sizeof(struct thread));
igt_assert(threads);
 
-   igt_info("Using %d 1MiB objects (available RAM: %ld/%ld, swap: 
%ld)\n",
-count,
-(long)intel_get_avail_ram_mb(),
-(long)intel_get_total_ram_mb(),
-(long)intel_get_total_swap_mb());
intel_require_memory(count, 1024*1024, CHECK_RAM | CHECK_SWAP);
 
for (n = 0; n < count; n++) {
-- 
2.23.0

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[Intel-gfx] [PATCH i-g-t 5/6] i915/gem_mocs_settings: Fudge gen11:vcs2 mocs register base

2019-09-01 Thread Chris Wilson
On gen11 CI, we have vcs2 available which has a different base to gen9
vcs1. Gloss over the discrepancy while a proper fix is sought.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111330
Signed-off-by: Chris Wilson 
---
 tests/i915/gem_mocs_settings.c | 28 ++--
 1 file changed, 22 insertions(+), 6 deletions(-)

diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 3ad941491..06240877e 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -62,6 +62,7 @@ static const char * const test_modes[] = {
 #define GEN9_MFX0_MOCS_0   (0xc900)/* Media 0 MOCS base register*/
 #define GEN9_MFX1_MOCS_0   (0xcA00)/* Media 1 MOCS base register*/
 #define GEN9_VEBOX_MOCS_0  (0xcB00)/* Video MOCS base register*/
+#define GEN11_MFX2_MOCS_0  (0x1)
 #define GEN9_BLT_MOCS_0(0xcc00)/* Blitter MOCS base 
register*/
 #define GEN12_GLOBAL_MOCS  (0x4000)
 #define ICELAKE_MOCS_PTE   {0x0004, 0x0030, 0x1}
@@ -216,12 +217,27 @@ static uint32_t get_engine_base(int fd, uint32_t engine)
return GEN12_GLOBAL_MOCS;
 
switch (engine) {
-   case LOCAL_I915_EXEC_BSD1:  return GEN9_MFX0_MOCS_0;
-   case LOCAL_I915_EXEC_BSD2:  return GEN9_MFX1_MOCS_0;
-   case I915_EXEC_RENDER:  return GEN9_GFX_MOCS_0;
-   case I915_EXEC_BLT: return GEN9_BLT_MOCS_0;
-   case I915_EXEC_VEBOX:   return GEN9_VEBOX_MOCS_0;
-   default:return 0;
+   case LOCAL_I915_EXEC_BSD1:
+   return GEN9_MFX0_MOCS_0;
+
+   case LOCAL_I915_EXEC_BSD2:
+   if (intel_gen(intel_get_drm_devid(fd)) >= 11)
+   /* i915_query to find correct HW base */
+   return GEN11_MFX2_MOCS_0;
+   else
+   return GEN9_MFX1_MOCS_0;
+
+   case I915_EXEC_RENDER:
+   return GEN9_GFX_MOCS_0;
+
+   case I915_EXEC_BLT:
+   return GEN9_BLT_MOCS_0;
+
+   case I915_EXEC_VEBOX:
+   return GEN9_VEBOX_MOCS_0;
+
+   default:
+   return 0;
}
 }
 
-- 
2.23.0

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[Intel-gfx] [PATCH i-g-t 2/6] i915/gem_ctx_shared: Prebind both context images

2019-09-01 Thread Chris Wilson
If we are using an aliasing-ppgtt, the context images are in the same
virtual address space as our target objects. We have to be careful that
cloning and using a new context does not evict our unreferenced target
object. To avoid that, we first bind both context images while creating
the hole in the address space to ensure that the hole is still available
later on.

Signed-off-by: Chris Wilson 
---
 tests/i915/gem_ctx_shared.c | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index b073bdfc9..c9e7b8a1a 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -191,6 +191,7 @@ static void exec_shared_gtt(int i915, unsigned int ring)
.buffer_count = 1,
.flags = ring,
};
+   uint32_t clone;
uint32_t scratch, *s;
uint32_t batch, cs[16];
uint64_t offset;
@@ -199,13 +200,18 @@ static void exec_shared_gtt(int i915, unsigned int ring)
gem_require_ring(i915, ring);
igt_require(gem_can_store_dword(i915, ring));
 
+   clone = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0);
+
/* Find a hole big enough for both objects later */
-   scratch = gem_create(i915, 16384);
+   scratch = gem_create(i915, 64<<10);
gem_write(i915, scratch, 0, , sizeof(bbe));
obj.handle = scratch;
gem_execbuf(i915, );
-   gem_close(i915, scratch);
obj.flags |= EXEC_OBJECT_PINNED; /* reuse this address */
+   execbuf.rsvd1 = clone; /* and bind the second context image */
+   gem_execbuf(i915, );
+   execbuf.rsvd1 = 0;
+   gem_close(i915, scratch);
 
scratch = gem_create(i915, 4096);
s = gem_mmap__wc(i915, scratch, 0, 4096, PROT_WRITE);
@@ -241,7 +247,7 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 
obj.handle = batch;
obj.offset += 8192; /* make sure we don't cause an eviction! */
-   execbuf.rsvd1 = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0);
+   execbuf.rsvd1 = clone;
if (gen > 3 && gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
gem_execbuf(i915, );
@@ -253,7 +259,6 @@ static void exec_shared_gtt(int i915, unsigned int ring)
execbuf.batch_start_offset = 64 * sizeof(s[0]);
gem_execbuf(i915, );
igt_assert_eq_u64(obj.offset, offset);
-   gem_context_destroy(i915, execbuf.rsvd1);
 
gem_sync(i915, batch); /* write hazard lies */
gem_close(i915, batch);
@@ -268,6 +273,8 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 
munmap(s, 4096);
gem_close(i915, scratch);
+
+   gem_context_destroy(i915, clone);
 }
 
 static int nop_sync(int i915, uint32_t ctx, unsigned int ring, int64_t timeout)
-- 
2.23.0

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[Intel-gfx] [PATCH 05/21] drm/i915: Replace obj->pin_global with obj->frontbuffer

2019-09-01 Thread Chris Wilson
obj->pin_global was original used as a means to keep the shrinker off
the active scanout, but we use the vma->pin_count itself for that and
the obj->frontbuffer to delay shrinking active framebuffers. The other
role that obj->pin_global gained was for spotting display objects inside
GEM and working harder to keep those coherent; for which we can again
simply inspect obj->frontbuffer directly.

Coming up next, we will want to manipulate the pin_global counter
outside of the principle locks, so would need to make pin_global atomic.
However, since obj->frontbuffer is already managed atomically, it makes
sense to use that the primary key for display objects instead of having
pin_global.

Ville pointed out the principle difference is that obj->frontbuffer is
set for as long as an intel_framebuffer is attached to an object, but
obj->pin_global was only raised for as long as the object was active. In
practice, this means that we consider the object as being on the scanout
for longer than is strictly required, causing us to be more proactive in
flushing -- though it should be true that we would have flushed
eventually when the back became the front, except that on the flip path
that flush is async but when hit from another ioctl it will be
synchronous.

v2: i915_gem_object_is_framebuffer()

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
Cc: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_display.c  |  2 ++
 .../gpu/drm/i915/display/intel_frontbuffer.c  | 13 +--
 drivers/gpu/drm/i915/gem/i915_gem_domain.c| 34 ++-
 drivers/gpu/drm/i915/gem/i915_gem_object.h|  3 +-
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |  2 --
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  | 15 +++-
 drivers/gpu/drm/i915/i915_debugfs.c   | 12 ++-
 7 files changed, 31 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index e661e2099118..5e3b22e3f61d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2080,6 +2080,8 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
u32 alignment;
 
WARN_ON(!mutex_is_locked(>struct_mutex));
+   if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
+   return ERR_PTR(-EINVAL);
 
alignment = intel_surf_alignment(fb, 0);
 
diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c 
b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index 719379774fa5..fc40dc1fdbcc 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -220,11 +220,18 @@ static void frontbuffer_release(struct kref *ref)
 {
struct intel_frontbuffer *front =
container_of(ref, typeof(*front), ref);
+   struct drm_i915_gem_object *obj = front->obj;
+   struct i915_vma *vma;
 
-   front->obj->frontbuffer = NULL;
-   spin_unlock(_i915(front->obj->base.dev)->fb_tracking.lock);
+   spin_lock(>vma.lock);
+   for_each_ggtt_vma(vma, obj)
+   vma->display_alignment = I915_GTT_MIN_ALIGNMENT;
+   spin_unlock(>vma.lock);
 
-   i915_gem_object_put(front->obj);
+   obj->frontbuffer = NULL;
+   spin_unlock(_i915(obj->base.dev)->fb_tracking.lock);
+
+   i915_gem_object_put(obj);
kfree(front);
 }
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c 
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 9c58e8fac1d9..6af740a5e3db 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -27,7 +27,7 @@ static void __i915_gem_object_flush_for_display(struct 
drm_i915_gem_object *obj)
 
 void i915_gem_object_flush_if_display(struct drm_i915_gem_object *obj)
 {
-   if (!READ_ONCE(obj->pin_global))
+   if (!i915_gem_object_is_framebuffer(obj))
return;
 
i915_gem_object_lock(obj);
@@ -422,12 +422,8 @@ i915_gem_object_pin_to_display_plane(struct 
drm_i915_gem_object *obj,
 
assert_object_held(obj);
 
-   /* Mark the global pin early so that we account for the
-* display coherency whilst setting up the cache domains.
-*/
-   obj->pin_global++;
-
-   /* The display engine is not coherent with the LLC cache on gen6.  As
+   /*
+* The display engine is not coherent with the LLC cache on gen6.  As
 * a result, we make sure that the pinning that is about to occur is
 * done with uncached PTEs. This is lowest common denominator for all
 * chipsets.
@@ -439,12 +435,11 @@ i915_gem_object_pin_to_display_plane(struct 
drm_i915_gem_object *obj,
ret = i915_gem_object_set_cache_level(obj,
  HAS_WT(to_i915(obj->base.dev)) ?
  I915_CACHE_WT : I915_CACHE_NONE);
-   if (ret) {
-   vma = ERR_PTR(ret);
-   goto 

[Intel-gfx] [PATCH 10/21] drm/i915: Make i915_vma.flags atomic_t for mutex reduction

2019-09-01 Thread Chris Wilson
In preparation for reducing struct_mutex stranglehold around the vm,
make the vma.flags atomic so that we can acquire a pin on the vma
atomically before deciding if we need to take the mutex.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.c |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 14 ++---
 drivers/gpu/drm/i915/i915_vma.c| 29 +-
 drivers/gpu/drm/i915/i915_vma.h| 62 +-
 drivers/gpu/drm/i915/selftests/mock_gtt.c  |  4 +-
 6 files changed, 64 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index d7855dc5a5c5..0ef60dae23a7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -163,7 +163,7 @@ static void __i915_gem_free_objects(struct drm_i915_private 
*i915,
 
list_for_each_entry_safe(vma, vn, >vma.list, obj_link) {
GEM_BUG_ON(i915_vma_is_active(vma));
-   vma->flags &= ~I915_VMA_PIN_MASK;
+   atomic_and(~I915_VMA_PIN_MASK, >flags);
i915_vma_destroy(vma);
}
GEM_BUG_ON(!list_empty(>vma.list));
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 2e1bfd5e4adf..0d81de1461b4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -685,7 +685,7 @@ i915_gem_object_create_stolen_for_preallocated(struct 
drm_i915_private *dev_priv
GEM_BUG_ON(!drm_mm_node_allocated(>node));
 
vma->pages = obj->mm.pages;
-   vma->flags |= I915_VMA_GLOBAL_BIND;
+   set_bit(I915_VMA_GLOBAL_BIND_BIT, __i915_vma_flags(vma));
__i915_vma_set_map_and_fenceable(vma);
 
mutex_lock(>vm.mutex);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d28e5ffa0b9d..d5bf57fa837b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -155,7 +155,7 @@ static int ppgtt_bind_vma(struct i915_vma *vma,
u32 pte_flags;
int err;
 
-   if (!(vma->flags & I915_VMA_LOCAL_BIND)) {
+   if (!i915_vma_is_bound(vma, I915_VMA_LOCAL_BIND)) {
err = vma->vm->allocate_va_range(vma->vm,
 vma->node.start, vma->size);
if (err)
@@ -1866,7 +1866,7 @@ static struct i915_vma *pd_vma_create(struct gen6_ppgtt 
*ppgtt, int size)
 
vma->size = size;
vma->fence_size = size;
-   vma->flags = I915_VMA_GGTT;
+   atomic_set(>flags, I915_VMA_GGTT);
vma->ggtt_view.type = I915_GGTT_VIEW_ROTATED; /* prevent fencing */
 
INIT_LIST_HEAD(>obj_link);
@@ -2425,7 +2425,7 @@ static int ggtt_bind_vma(struct i915_vma *vma,
 * GLOBAL/LOCAL_BIND, it's all the same ptes. Hence unconditionally
 * upgrade to both bound if we bind either to avoid double-binding.
 */
-   vma->flags |= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
+   atomic_or(I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND, >flags);
 
return 0;
 }
@@ -2455,7 +2455,7 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma,
if (flags & I915_VMA_LOCAL_BIND) {
struct i915_ppgtt *alias = i915_vm_to_ggtt(vma->vm)->alias;
 
-   if (!(vma->flags & I915_VMA_LOCAL_BIND)) {
+   if (!i915_vma_is_bound(vma, I915_VMA_LOCAL_BIND)) {
ret = alias->vm.allocate_va_range(>vm,
  vma->node.start,
  vma->size);
@@ -2483,7 +2483,7 @@ static void aliasing_gtt_unbind_vma(struct i915_vma *vma)
 {
struct drm_i915_private *i915 = vma->vm->i915;
 
-   if (vma->flags & I915_VMA_GLOBAL_BIND) {
+   if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND)) {
struct i915_address_space *vm = vma->vm;
intel_wakeref_t wakeref;
 
@@ -2491,7 +2491,7 @@ static void aliasing_gtt_unbind_vma(struct i915_vma *vma)
vm->clear_range(vm, vma->node.start, vma->size);
}
 
-   if (vma->flags & I915_VMA_LOCAL_BIND) {
+   if (i915_vma_is_bound(vma, I915_VMA_LOCAL_BIND)) {
struct i915_address_space *vm =
_vm_to_ggtt(vma->vm)->alias->vm;
 
@@ -3293,7 +3293,7 @@ static void ggtt_restore_mappings(struct i915_ggtt *ggtt)
list_for_each_entry_safe(vma, vn, >vm.bound_list, vm_link) {
struct drm_i915_gem_object *obj = vma->obj;
 
-   if (!(vma->flags & I915_VMA_GLOBAL_BIND))
+   if (!i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND))
continue;
 
mutex_unlock(>vm.mutex);
diff --git 

[Intel-gfx] [PATCH 11/21] drm/i915/gtt: Make sure the gen6 ppgtt is bound before first use

2019-09-01 Thread Chris Wilson
As we remove the struct_mutex protection from around the vma pinning,
counters need to be atomic and aware that there may be multiple threads
simultaneously active.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 39 -
 drivers/gpu/drm/i915/i915_gem_gtt.h |  4 ++-
 2 files changed, 24 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d5bf57fa837b..9095f017162e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1777,6 +1777,8 @@ static void gen6_ppgtt_cleanup(struct i915_address_space 
*vm)
 
gen6_ppgtt_free_pd(ppgtt);
free_scratch(vm);
+
+   mutex_destroy(>pin_mutex);
kfree(ppgtt->base.pd);
 }
 
@@ -1878,7 +1880,7 @@ static struct i915_vma *pd_vma_create(struct gen6_ppgtt 
*ppgtt, int size)
 int gen6_ppgtt_pin(struct i915_ppgtt *base)
 {
struct gen6_ppgtt *ppgtt = to_gen6_ppgtt(base);
-   int err;
+   int err = 0;
 
GEM_BUG_ON(ppgtt->base.vm.closed);
 
@@ -1888,24 +1890,26 @@ int gen6_ppgtt_pin(struct i915_ppgtt *base)
 * (When vma->pin_count becomes atomic, I expect we will naturally
 * need a larger, unpacked, type and kill this redundancy.)
 */
-   if (ppgtt->pin_count++)
+   if (atomic_add_unless(>pin_count, 1, 0))
return 0;
 
+   if (mutex_lock_interruptible(>pin_mutex))
+   return -EINTR;
+
/*
 * PPGTT PDEs reside in the GGTT and consists of 512 entries. The
 * allocator works in address space sizes, so it's multiplied by page
 * size. We allocate at the top of the GTT to avoid fragmentation.
 */
-   err = i915_vma_pin(ppgtt->vma,
-  0, GEN6_PD_ALIGN,
-  PIN_GLOBAL | PIN_HIGH);
-   if (err)
-   goto unpin;
-
-   return 0;
+   if (!atomic_read(>pin_count)) {
+   err = i915_vma_pin(ppgtt->vma,
+  0, GEN6_PD_ALIGN,
+  PIN_GLOBAL | PIN_HIGH);
+   }
+   if (!err)
+   atomic_inc(>pin_count);
+   mutex_unlock(>pin_mutex);
 
-unpin:
-   ppgtt->pin_count = 0;
return err;
 }
 
@@ -1913,22 +1917,19 @@ void gen6_ppgtt_unpin(struct i915_ppgtt *base)
 {
struct gen6_ppgtt *ppgtt = to_gen6_ppgtt(base);
 
-   GEM_BUG_ON(!ppgtt->pin_count);
-   if (--ppgtt->pin_count)
-   return;
-
-   i915_vma_unpin(ppgtt->vma);
+   GEM_BUG_ON(!atomic_read(>pin_count));
+   atomic_dec(>pin_count);
 }
 
 void gen6_ppgtt_unpin_all(struct i915_ppgtt *base)
 {
struct gen6_ppgtt *ppgtt = to_gen6_ppgtt(base);
 
-   if (!ppgtt->pin_count)
+   if (!atomic_read(>pin_count))
return;
 
-   ppgtt->pin_count = 0;
i915_vma_unpin(ppgtt->vma);
+   atomic_set(>pin_count, 0);
 }
 
 static struct i915_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
@@ -1941,6 +1942,8 @@ static struct i915_ppgtt *gen6_ppgtt_create(struct 
drm_i915_private *i915)
if (!ppgtt)
return ERR_PTR(-ENOMEM);
 
+   mutex_init(>pin_mutex);
+
ppgtt_init(>base, >gt);
ppgtt->base.vm.top = 1;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h 
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 546a7c0aa0e7..57d27898639a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -426,7 +426,9 @@ struct gen6_ppgtt {
struct i915_vma *vma;
gen6_pte_t __iomem *pd_addr;
 
-   unsigned int pin_count;
+   atomic_t pin_count;
+   struct mutex pin_mutex;
+
bool scan_for_unused_pt;
 };
 
-- 
2.23.0

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[Intel-gfx] [PATCH 01/21] drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt

2019-09-01 Thread Chris Wilson
The aliasing-ppgtt is not allowed to be smaller than the ggtt, nor
should we advertise it as being any bigger, or else we may get sued for
false advertisement.

Testcase: igt/gem_exec_big
Fixes: 0b718ba1e884 ("drm/i915/gtt: Downgrade Cherryview back to 
aliasing-ppgtt")
Signed-off-by: Chris Wilson 
Cc: Matthew Auld 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ee51fd1a6207..906dc6fff383 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2597,6 +2597,8 @@ static int init_aliasing_ppgtt(struct i915_ggtt *ggtt)
GEM_BUG_ON(ggtt->vm.vma_ops.unbind_vma != ggtt_unbind_vma);
ggtt->vm.vma_ops.unbind_vma = aliasing_gtt_unbind_vma;
 
+   ppgtt->vm.total = ggtt->vm.total;
+
return 0;
 
 err_ppgtt:
-- 
2.23.0

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[Intel-gfx] [PATCH 20/21] drm/i915: Move request runtime management onto gt

2019-09-01 Thread Chris Wilson
Requests are run from the gt and are tided into the gt runtime power
management, so pull the runtime request management under gt/

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/Makefile |   1 +
 drivers/gpu/drm/i915/gem/i915_gem_mman.c  |   6 +-
 drivers/gpu/drm/i915/gem/i915_gem_pm.c|  22 +---
 .../drm/i915/gem/selftests/i915_gem_context.c |   5 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c|   2 +-
 drivers/gpu/drm/i915/gt/intel_gt.c|   2 +
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |   9 +-
 drivers/gpu/drm/i915/gt/intel_gt_requests.c   | 118 ++
 drivers/gpu/drm/i915/gt/intel_gt_requests.h   |  19 +++
 drivers/gpu/drm/i915/gt/intel_gt_types.h  |  11 ++
 drivers/gpu/drm/i915/gt/selftest_timeline.c   |   8 +-
 drivers/gpu/drm/i915/i915_debugfs.c   |  17 +--
 drivers/gpu/drm/i915/i915_drv.h   |  10 --
 drivers/gpu/drm/i915/i915_gem.c   |  15 ---
 drivers/gpu/drm/i915/i915_gem_evict.c |  14 +--
 drivers/gpu/drm/i915/i915_gem_gtt.c   |   4 +-
 drivers/gpu/drm/i915/i915_request.c   |  59 +
 drivers/gpu/drm/i915/i915_request.h   |   3 +-
 .../gpu/drm/i915/selftests/igt_flush_test.c   |   9 +-
 .../gpu/drm/i915/selftests/igt_live_test.c|   5 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   9 +-
 21 files changed, 203 insertions(+), 145 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_requests.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_requests.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 658b930d34a8..ab5fa58d24f7 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -83,6 +83,7 @@ gt-y += \
gt/intel_gt_irq.o \
gt/intel_gt_pm.o \
gt/intel_gt_pm_irq.o \
+   gt/intel_gt_requests.o \
gt/intel_hangcheck.o \
gt/intel_lrc.o \
gt/intel_renderstate.o \
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 761ab0076a6a..e0bfc021ec6f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -8,6 +8,7 @@
 #include 
 
 #include "gt/intel_gt.h"
+#include "gt/intel_gt_requests.h"
 
 #include "i915_drv.h"
 #include "i915_gem_gtt.h"
@@ -421,6 +422,7 @@ void i915_gem_object_release_mmap(struct 
drm_i915_gem_object *obj)
 static int create_mmap_offset(struct drm_i915_gem_object *obj)
 {
struct drm_i915_private *i915 = to_i915(obj->base.dev);
+   struct intel_gt *gt = >gt;
int err;
 
err = drm_gem_create_mmap_offset(>base);
@@ -429,7 +431,7 @@ static int create_mmap_offset(struct drm_i915_gem_object 
*obj)
 
/* Attempt to reap some mmap space from dead objects */
do {
-   err = i915_gem_wait_for_idle(i915, MAX_SCHEDULE_TIMEOUT);
+   err = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
if (err)
break;
 
@@ -438,7 +440,7 @@ static int create_mmap_offset(struct drm_i915_gem_object 
*obj)
if (!err)
break;
 
-   } while (flush_delayed_work(>gem.retire_work));
+   } while (flush_delayed_work(>requests.retire_work));
 
return err;
 }
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index afbcf9219267..b459719386e3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -7,31 +7,18 @@
 #include "gem/i915_gem_pm.h"
 #include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
+#include "gt/intel_gt_requests.h"
 
 #include "i915_drv.h"
 #include "i915_globals.h"
 
 static void i915_gem_park(struct drm_i915_private *i915)
 {
-   cancel_delayed_work(>gem.retire_work);
-
i915_vma_parked(i915);
 
i915_globals_park();
 }
 
-static void retire_work_handler(struct work_struct *work)
-{
-   struct drm_i915_private *i915 =
-   container_of(work, typeof(*i915), gem.retire_work.work);
-
-   i915_retire_requests(i915, 0);
-
-   queue_delayed_work(i915->wq,
-  >gem.retire_work,
-  round_jiffies_up_relative(HZ));
-}
-
 static int pm_notifier(struct notifier_block *nb,
   unsigned long action,
   void *data)
@@ -42,9 +29,6 @@ static int pm_notifier(struct notifier_block *nb,
switch (action) {
case INTEL_GT_UNPARK:
i915_globals_unpark();
-   queue_delayed_work(i915->wq,
-  >gem.retire_work,
-  round_jiffies_up_relative(HZ));
break;
 
case INTEL_GT_PARK:
@@ -59,7 +43,7 @@ static bool switch_to_kernel_context_sync(struct intel_gt *gt)
 {
bool result = !intel_gt_is_wedged(gt);
 
-   if (i915_gem_wait_for_idle(gt->i915, I915_GEM_IDLE_TIMEOUT) == 

[Intel-gfx] [PATCH 16/21] drm/i915: Move idle barrier cleanup into engine-pm

2019-09-01 Thread Chris Wilson
Now that we now longer need to guarantee that the active callback is
under the struct_mutex, we can lift it out of the i915_gem_park() and
into the engine parking itself.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c| 19 ---
 drivers/gpu/drm/i915/gt/intel_engine_pm.c | 15 +++
 drivers/gpu/drm/i915/i915_active.c|  1 +
 3 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 92558fa47108..6e4cc177cc7a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -11,29 +11,10 @@
 #include "i915_drv.h"
 #include "i915_globals.h"
 
-static void call_idle_barriers(struct intel_engine_cs *engine)
-{
-   struct llist_node *node, *next;
-
-   llist_for_each_safe(node, next, llist_del_all(>barrier_tasks)) {
-   struct dma_fence_cb *cb =
-   container_of((struct list_head *)node,
-typeof(*cb), node);
-
-   cb->func(NULL, cb);
-   }
-}
-
 static void i915_gem_park(struct drm_i915_private *i915)
 {
-   struct intel_engine_cs *engine;
-   enum intel_engine_id id;
-
lockdep_assert_held(>drm.struct_mutex);
 
-   for_each_engine(engine, i915, id)
-   call_idle_barriers(engine); /* cleanup after wedging */
-
i915_vma_parked(i915);
 
i915_globals_park();
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c 
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 65b5ca74b394..472b2259f629 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -123,6 +123,19 @@ static bool switch_to_kernel_context(struct 
intel_engine_cs *engine)
return result;
 }
 
+static void call_idle_barriers(struct intel_engine_cs *engine)
+{
+   struct llist_node *node, *next;
+
+   llist_for_each_safe(node, next, llist_del_all(>barrier_tasks)) {
+   struct dma_fence_cb *cb =
+   container_of((struct list_head *)node,
+typeof(*cb), node);
+
+   cb->func(NULL, cb);
+   }
+}
+
 static int __engine_park(struct intel_wakeref *wf)
 {
struct intel_engine_cs *engine =
@@ -142,6 +155,8 @@ static int __engine_park(struct intel_wakeref *wf)
 
GEM_TRACE("%s\n", engine->name);
 
+   call_idle_barriers(engine); /* cleanup after wedging */
+
intel_engine_disarm_breadcrumbs(engine);
intel_engine_pool_park(>pool);
 
diff --git a/drivers/gpu/drm/i915/i915_active.c 
b/drivers/gpu/drm/i915/i915_active.c
index 2e2ab8176620..dcf5bc1d87e6 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -679,6 +679,7 @@ void i915_active_acquire_barrier(struct i915_active *ref)
rb_link_node(>node, parent, p);
rb_insert_color(>node, >tree);
 
+   GEM_BUG_ON(!intel_engine_pm_is_awake(engine));
llist_add(barrier_to_ll(node), >barrier_tasks);
intel_engine_pm_put(engine);
}
-- 
2.23.0

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[Intel-gfx] [PATCH 15/21] drm/i915: Coordinate i915_active with its own mutex

2019-09-01 Thread Chris Wilson
Forgo the struct_mutex serialisation for i915_active, and interpose its
own mutex handling for active/retire.

This is a multi-layered sleight-of-hand. First, we had to ensure that no
active/retire callbacks accidentally inverted the mutex ordering rules,
nor assumed that they were themselves serialised by struct_mutex. More
challenging though, is the rule over updating elements of the active
rbtree. Instead of the whole i915_active now being serialised by
struct_mutex, allocations/rotations of the tree are serialised by the
i915_active.mutex and individual nodes are serialised by the caller
using the i915_timeline.mutex (we need to use nested spinlocks to
interact with the dma_fence callback lists).

The pain point here is that instead of a single mutex around execbuf, we
now have to take a mutex for active tracker (one for each vma, context,
etc) and a couple of spinlocks for each fence update. The improvement in
fine grained locking allowing for multiple concurrent clients
(eventually!) should be worth it in typical loads.

Signed-off-by: Chris Wilson 
---
 .../gpu/drm/i915/display/intel_frontbuffer.c  |   2 +-
 drivers/gpu/drm/i915/display/intel_overlay.c  |   5 +-
 .../gpu/drm/i915/gem/i915_gem_client_blt.c|   2 +-
 drivers/gpu/drm/i915/gem/i915_gem_context.c   |   8 +-
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |   1 +
 drivers/gpu/drm/i915/gem/i915_gem_pm.c|   9 +-
 drivers/gpu/drm/i915/gt/intel_context.c   |   6 +-
 drivers/gpu/drm/i915/gt/intel_engine_pool.c   |   2 +-
 drivers/gpu/drm/i915/gt/intel_engine_pool.h   |   2 +-
 drivers/gpu/drm/i915/gt/intel_reset.c |  10 +-
 drivers/gpu/drm/i915/gt/intel_timeline.c  |   9 +-
 .../gpu/drm/i915/gt/intel_timeline_types.h|   2 +-
 drivers/gpu/drm/i915/gt/selftest_context.c|  16 +-
 drivers/gpu/drm/i915/gt/selftest_lrc.c|  10 +-
 .../gpu/drm/i915/gt/selftests/mock_timeline.c |   2 +-
 drivers/gpu/drm/i915/gvt/scheduler.c  |   3 -
 drivers/gpu/drm/i915/i915_active.c| 291 +++-
 drivers/gpu/drm/i915/i915_active.h| 318 --
 drivers/gpu/drm/i915/i915_active_types.h  |  23 +-
 drivers/gpu/drm/i915/i915_gem.c   |  42 ++-
 drivers/gpu/drm/i915/i915_gem_gtt.c   |   3 +-
 drivers/gpu/drm/i915/i915_gpu_error.c |   4 +-
 drivers/gpu/drm/i915/i915_request.c   |  39 +--
 drivers/gpu/drm/i915/i915_request.h   |   1 -
 drivers/gpu/drm/i915/i915_vma.c   |   8 +-
 drivers/gpu/drm/i915/selftests/i915_active.c  |  36 +-
 26 files changed, 274 insertions(+), 580 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c 
b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index 6428b8dd70d3..84b164f31895 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -257,7 +257,7 @@ intel_frontbuffer_get(struct drm_i915_gem_object *obj)
front->obj = obj;
kref_init(>ref);
atomic_set(>bits, 0);
-   i915_active_init(i915, >write,
+   i915_active_init(>write,
 frontbuffer_active,
 i915_active_may_sleep(frontbuffer_retire));
 
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c 
b/drivers/gpu/drm/i915/display/intel_overlay.c
index 4f36557b3f3b..544e953342ea 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -230,7 +230,7 @@ alloc_request(struct intel_overlay *overlay, void 
(*fn)(struct intel_overlay *))
if (IS_ERR(rq))
return rq;
 
-   err = i915_active_ref(>last_flip, rq->timeline, rq);
+   err = i915_active_ref(>last_flip, rq->timeline, >fence);
if (err) {
i915_request_add(rq);
return ERR_PTR(err);
@@ -1360,8 +1360,7 @@ void intel_overlay_setup(struct drm_i915_private 
*dev_priv)
overlay->contrast = 75;
overlay->saturation = 146;
 
-   i915_active_init(dev_priv,
->last_flip,
+   i915_active_init(>last_flip,
 NULL, intel_overlay_last_flip_retire);
 
ret = get_registers(overlay, OVERLAY_NEEDS_PHYSICAL(dev_priv));
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c 
b/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
index 9e72b42a86f5..ace50bb9ee1f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
@@ -160,7 +160,7 @@ static int move_to_active(struct i915_vma *vma, struct 
i915_request *rq)
if (err)
return err;
 
-   return i915_active_ref(>active, rq->timeline, rq);
+   return i915_active_ref(>active, rq->timeline, >fence);
 }
 
 static void clear_pages_worker(struct work_struct *work)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 4f303cb94698..b8ddcf7899a1 100644
--- 

[Intel-gfx] [PATCH 21/21] drm/i915: Move global activity tracking from GEM to GT

2019-09-01 Thread Chris Wilson
As our global unpark/park keep track of the number of active users, we
can simply move the accounting from the GEM layer to the base GT layer.
It was placed originally inside GEM to benefit from the 100ms extra
delay on idleness, but that has been eliminated and now there is no
substantive difference between the layers. In moving it, we move another
piece of the puzzle out from underneath struct_mutex.

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c | 11 +--
 drivers/gpu/drm/i915/gt/intel_gt_pm.c  |  5 +
 2 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index b459719386e3..5816bdb5bfa2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -10,14 +10,6 @@
 #include "gt/intel_gt_requests.h"
 
 #include "i915_drv.h"
-#include "i915_globals.h"
-
-static void i915_gem_park(struct drm_i915_private *i915)
-{
-   i915_vma_parked(i915);
-
-   i915_globals_park();
-}
 
 static int pm_notifier(struct notifier_block *nb,
   unsigned long action,
@@ -28,11 +20,10 @@ static int pm_notifier(struct notifier_block *nb,
 
switch (action) {
case INTEL_GT_UNPARK:
-   i915_globals_unpark();
break;
 
case INTEL_GT_PARK:
-   i915_gem_park(i915);
+   i915_vma_parked(i915);
break;
}
 
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c 
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index fa96e1ad7bd8..d31ad2d63175 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -5,6 +5,7 @@
  */
 
 #include "i915_drv.h"
+#include "i915_globals.h"
 #include "i915_params.h"
 #include "intel_context.h"
 #include "intel_engine_pm.h"
@@ -26,6 +27,8 @@ static int __gt_unpark(struct intel_wakeref *wf)
 
GEM_TRACE("\n");
 
+   i915_globals_unpark();
+
/*
 * It seems that the DMC likes to transition between the DC states a lot
 * when there are no connected displays (no active power domains) during
@@ -77,6 +80,8 @@ static int __gt_park(struct intel_wakeref *wf)
GEM_BUG_ON(!wakeref);
intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ, wakeref);
 
+   i915_globals_park();
+
return 0;
 }
 
-- 
2.23.0

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[Intel-gfx] [PATCH 02/21] drm/i915: Report aliasing ppgtt size as ggtt size

2019-09-01 Thread Chris Wilson
The aliasing-ppgtt is constrained to be the same size as the Global GTT
since it aliases the same address space. Simplifying gtt size reporting
in this case.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index b8969605f4e8..f1c0e5d958f3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -2231,8 +2231,6 @@ int i915_gem_context_getparam_ioctl(struct drm_device 
*dev, void *data,
args->size = 0;
if (ctx->vm)
args->value = ctx->vm->total;
-   else if (to_i915(dev)->ggtt.alias)
-   args->value = to_i915(dev)->ggtt.alias->vm.total;
else
args->value = to_i915(dev)->ggtt.vm.total;
break;
-- 
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[Intel-gfx] [PATCH 17/21] drm/i915: Drop struct_mutex from around i915_retire_requests()

2019-09-01 Thread Chris Wilson
We don't need to hold struct_mutex now for retiring requests, so drop it
from i915_retire_requests() and i915_gem_wait_for_idle(), finally
removing I915_WAIT_LOCKED for good.

Signed-off-by: Chris Wilson 
---
 .../gpu/drm/i915/gem/i915_gem_client_blt.c|   7 +-
 drivers/gpu/drm/i915/gem/i915_gem_context.c   |  20 +--
 drivers/gpu/drm/i915/gem/i915_gem_pm.c|  45 +++
 .../i915/gem/selftests/i915_gem_coherency.c   |  40 +++---
 .../drm/i915/gem/selftests/i915_gem_context.c |   4 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c|   6 +-
 .../i915/gem/selftests/i915_gem_object_blt.c  |   4 -
 drivers/gpu/drm/i915/gt/selftest_context.c|   4 +-
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c  |  89 +++--
 drivers/gpu/drm/i915/gt/selftest_lrc.c|  21 ++-
 drivers/gpu/drm/i915/gt/selftest_timeline.c   |  91 ++---
 .../gpu/drm/i915/gt/selftest_workarounds.c|   6 +-
 drivers/gpu/drm/i915/i915_debugfs.c   |  42 ++
 drivers/gpu/drm/i915/i915_gem.c   |  19 ++-
 drivers/gpu/drm/i915/i915_request.h   |   7 +-
 drivers/gpu/drm/i915/selftests/i915_active.c  |   8 +-
 .../gpu/drm/i915/selftests/i915_gem_evict.c   |   2 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |   4 -
 drivers/gpu/drm/i915/selftests/i915_request.c | 125 +-
 .../gpu/drm/i915/selftests/i915_selftest.c|   8 +-
 drivers/gpu/drm/i915/selftests/i915_vma.c |   4 -
 .../gpu/drm/i915/selftests/igt_flush_test.c   |  30 ++---
 .../gpu/drm/i915/selftests/igt_flush_test.h   |   2 +-
 .../gpu/drm/i915/selftests/igt_live_test.c|   9 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   4 -
 25 files changed, 191 insertions(+), 410 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c 
b/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
index ace50bb9ee1f..cf2057e515af 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
@@ -166,7 +166,6 @@ static int move_to_active(struct i915_vma *vma, struct 
i915_request *rq)
 static void clear_pages_worker(struct work_struct *work)
 {
struct clear_pages_work *w = container_of(work, typeof(*w), work);
-   struct drm_i915_private *i915 = w->ce->engine->i915;
struct drm_i915_gem_object *obj = w->sleeve->vma->obj;
struct i915_vma *vma = w->sleeve->vma;
struct i915_request *rq;
@@ -184,11 +183,9 @@ static void clear_pages_worker(struct work_struct *work)
obj->read_domains = I915_GEM_GPU_DOMAINS;
obj->write_domain = 0;
 
-   /* XXX: we need to kill this */
-   mutex_lock(>drm.struct_mutex);
err = i915_vma_pin(vma, 0, 0, PIN_USER);
if (unlikely(err))
-   goto out_unlock;
+   goto out_signal;
 
batch = intel_emit_vma_fill_blt(w->ce, vma, w->value);
if (IS_ERR(batch)) {
@@ -240,8 +237,6 @@ static void clear_pages_worker(struct work_struct *work)
intel_emit_vma_release(w->ce, batch);
 out_unpin:
i915_vma_unpin(vma);
-out_unlock:
-   mutex_unlock(>drm.struct_mutex);
 out_signal:
if (unlikely(err)) {
dma_fence_set_error(>dma, err);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index b8ddcf7899a1..3452f1497094 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1161,8 +1161,7 @@ gen8_modify_rpcs(struct intel_context *ce, struct 
intel_sseu sseu)
 }
 
 static int
-__intel_context_reconfigure_sseu(struct intel_context *ce,
-struct intel_sseu sseu)
+intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu 
sseu)
 {
int ret;
 
@@ -1185,23 +1184,6 @@ __intel_context_reconfigure_sseu(struct intel_context 
*ce,
return ret;
 }
 
-static int
-intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu 
sseu)
-{
-   struct drm_i915_private *i915 = ce->engine->i915;
-   int ret;
-
-   ret = mutex_lock_interruptible(>drm.struct_mutex);
-   if (ret)
-   return ret;
-
-   ret = __intel_context_reconfigure_sseu(ce, sseu);
-
-   mutex_unlock(>drm.struct_mutex);
-
-   return ret;
-}
-
 static int
 user_to_context_sseu(struct drm_i915_private *i915,
 const struct drm_i915_gem_context_param_sseu *user,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 6e4cc177cc7a..fec0b410d1d9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -48,11 +48,7 @@ static void retire_work_handler(struct work_struct *work)
struct drm_i915_private *i915 =
container_of(work, typeof(*i915), gem.retire_work.work);
 
-   /* Come back later if the device is busy... */
-   if (mutex_trylock(>drm.struct_mutex)) {
-   i915_retire_requests(i915);
-   

[Intel-gfx] [PATCH 12/21] drm/i915: Mark up address spaces that may need to allocate

2019-09-01 Thread Chris Wilson
Since we cannot allocate underneath the vm->mutex (it is used in the
direct-reclaim paths), we need to shift the allocations off into a
mutexless worker with fence recursion prevention. To know when we need
this protection, we mark up the address spaces that do allocate before
insertion.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +++
 drivers/gpu/drm/i915/i915_gem_gtt.h | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 9095f017162e..56d27cf09a3d 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1500,6 +1500,7 @@ static struct i915_ppgtt *gen8_ppgtt_create(struct 
drm_i915_private *i915)
goto err_free_pd;
}
 
+   ppgtt->vm.bind_alloc = I915_VMA_LOCAL_BIND;
ppgtt->vm.insert_entries = gen8_ppgtt_insert;
ppgtt->vm.allocate_va_range = gen8_ppgtt_alloc;
ppgtt->vm.clear_range = gen8_ppgtt_clear;
@@ -1947,6 +1948,7 @@ static struct i915_ppgtt *gen6_ppgtt_create(struct 
drm_i915_private *i915)
ppgtt_init(>base, >gt);
ppgtt->base.vm.top = 1;
 
+   ppgtt->base.vm.bind_alloc = I915_VMA_LOCAL_BIND;
ppgtt->base.vm.allocate_va_range = gen6_alloc_va_range;
ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries;
@@ -2578,6 +2580,7 @@ static int init_aliasing_ppgtt(struct i915_ggtt *ggtt)
goto err_ppgtt;
 
ggtt->alias = ppgtt;
+   ggtt->vm.bind_alloc |= ppgtt->vm.bind_alloc;
 
GEM_BUG_ON(ggtt->vm.vma_ops.bind_vma != ggtt_bind_vma);
ggtt->vm.vma_ops.bind_vma = aliasing_gtt_bind_vma;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h 
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 57d27898639a..007bdaf4ba00 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -305,6 +305,8 @@ struct i915_address_space {
u64 total;  /* size addr space maps (ex. 2GB for ggtt) */
u64 reserved;   /* size addr space reserved */
 
+   unsigned int bind_alloc;
+
bool closed;
 
struct mutex mutex; /* protects vma and our lists */
-- 
2.23.0

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[Intel-gfx] [PATCH 06/21] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)

2019-09-01 Thread Chris Wilson
Make dma_fence_enable_sw_signaling() behave like its
dma_fence_add_callback() and dma_fence_default_wait() counterparts and
perform the test to enable signaling under the fence->lock, along with
the action to do so. This ensure that should an implementation be trying
to flush the cb_list (by signaling) on retirement before freeing the
fence, it can do so in a race-free manner.

See also 0fc89b6802ba ("dma-fence: Simply wrap dma_fence_signal_locked
with dma_fence_signal").

Signed-off-by: Chris Wilson 
---
 drivers/dma-buf/dma-fence.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index 2c136aee3e79..587727089134 100644
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c
@@ -285,19 +285,18 @@ void dma_fence_enable_sw_signaling(struct dma_fence 
*fence)
 {
unsigned long flags;
 
+   if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, >flags))
+   return;
+
+   spin_lock_irqsave(fence->lock, flags);
if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
  >flags) &&
-   !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, >flags) &&
fence->ops->enable_signaling) {
trace_dma_fence_enable_signal(fence);
-
-   spin_lock_irqsave(fence->lock, flags);
-
if (!fence->ops->enable_signaling(fence))
dma_fence_signal_locked(fence);
-
-   spin_unlock_irqrestore(fence->lock, flags);
}
+   spin_unlock_irqrestore(fence->lock, flags);
 }
 EXPORT_SYMBOL(dma_fence_enable_sw_signaling);
 
-- 
2.23.0

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[Intel-gfx] [PATCH 04/21] drm/i915: Refresh the errno to vmf_fault translations

2019-09-01 Thread Chris Wilson
It's been a long time since we accidentally reported -EIO upon wedging,
it can now only be generated by failure to swap in a page.

Signed-off-by: Chris Wilson 
Cc: Abdiel Janulgue 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 39 +---
 1 file changed, 15 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 261c9bd83f51..82db2b783123 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -287,6 +287,9 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
view.type = I915_GGTT_VIEW_PARTIAL;
vma = i915_gem_object_ggtt_pin(obj, , 0, 0, flags);
}
+
+   /* The entire mappable GGTT is pinned? Unexpected! */
+   GEM_BUG_ON(vma == ERR_PTR(-ENOSPC));
}
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
@@ -333,23 +336,19 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
i915_gem_object_unpin_pages(obj);
 err:
switch (ret) {
-   case -EIO:
-   /*
-* We eat errors when the gpu is terminally wedged to avoid
-* userspace unduly crashing (gl has no provisions for mmaps to
-* fail). But any other -EIO isn't ours (e.g. swap in failure)
-* and so needs to be reported.
-*/
-   if (!intel_gt_is_wedged(ggtt->vm.gt))
-   return VM_FAULT_SIGBUS;
-   /* else, fall through */
-   case -EAGAIN:
-   /*
-* EAGAIN means the gpu is hung and we'll wait for the error
-* handler to reset everything when re-faulting in
-* i915_mutex_lock_interruptible.
-*/
+   default:
+   WARN_ONCE(ret, "unhandled error in %s: %i\n", __func__, ret);
+   /* fallthrough */
+   case -EIO: /* shmemfs failure from swap device */
+   case -EFAULT: /* purged object */
+   return VM_FAULT_SIGBUS;
+
+   case -ENOSPC: /* shmemfs allocation failure */
+   case -ENOMEM: /* our allocation failure */
+   return VM_FAULT_OOM;
+
case 0:
+   case -EAGAIN:
case -ERESTARTSYS:
case -EINTR:
case -EBUSY:
@@ -358,14 +357,6 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
 * already did the job.
 */
return VM_FAULT_NOPAGE;
-   case -ENOMEM:
-   return VM_FAULT_OOM;
-   case -ENOSPC:
-   case -EFAULT:
-   return VM_FAULT_SIGBUS;
-   default:
-   WARN_ONCE(ret, "unhandled error in %s: %i\n", __func__, ret);
-   return VM_FAULT_SIGBUS;
}
 }
 
-- 
2.23.0

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[Intel-gfx] [PATCH 07/21] drm/mm: Pack allocated/scanned boolean into a bitfield

2019-09-01 Thread Chris Wilson
The ulterior motive to switching the booleans over to bitops is to
allow use of the allocated flag as a bitlock.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/drm_mm.c  | 36 +++
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  6 ++--
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c  |  2 +-
 drivers/gpu/drm/i915/i915_gem.c   | 16 -
 drivers/gpu/drm/i915/i915_gem_evict.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c   |  2 +-
 drivers/gpu/drm/i915/i915_vma.c   |  4 +--
 drivers/gpu/drm/i915/i915_vma.h   |  2 +-
 drivers/gpu/drm/selftests/test-drm_mm.c   | 14 
 drivers/gpu/drm/vc4/vc4_crtc.c|  2 +-
 drivers/gpu/drm/vc4/vc4_hvs.c |  2 +-
 drivers/gpu/drm/vc4/vc4_plane.c   |  4 +--
 include/drm/drm_mm.h  |  7 ++--
 13 files changed, 53 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 4581c5387372..211967006cec 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -174,7 +174,7 @@ static void drm_mm_interval_tree_add_node(struct 
drm_mm_node *hole_node,
 
node->__subtree_last = LAST(node);
 
-   if (hole_node->allocated) {
+   if (drm_mm_node_allocated(hole_node)) {
rb = _node->rb;
while (rb) {
parent = rb_entry(rb, struct drm_mm_node, rb);
@@ -424,9 +424,9 @@ int drm_mm_reserve_node(struct drm_mm *mm, struct 
drm_mm_node *node)
 
node->mm = mm;
 
+   __set_bit(DRM_MM_NODE_ALLOCATED_BIT, >flags);
list_add(>node_list, >node_list);
drm_mm_interval_tree_add_node(hole, node);
-   node->allocated = true;
node->hole_size = 0;
 
rm_hole(hole);
@@ -543,9 +543,9 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
node->color = color;
node->hole_size = 0;
 
+   __set_bit(DRM_MM_NODE_ALLOCATED_BIT, >flags);
list_add(>node_list, >node_list);
drm_mm_interval_tree_add_node(hole, node);
-   node->allocated = true;
 
rm_hole(hole);
if (adj_start > hole_start)
@@ -561,6 +561,11 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
 }
 EXPORT_SYMBOL(drm_mm_insert_node_in_range);
 
+static inline bool drm_mm_node_scanned_block(const struct drm_mm_node *node)
+{
+   return test_bit(DRM_MM_NODE_SCANNED_BIT, >flags);
+}
+
 /**
  * drm_mm_remove_node - Remove a memory node from the allocator.
  * @node: drm_mm_node to remove
@@ -574,8 +579,8 @@ void drm_mm_remove_node(struct drm_mm_node *node)
struct drm_mm *mm = node->mm;
struct drm_mm_node *prev_node;
 
-   DRM_MM_BUG_ON(!node->allocated);
-   DRM_MM_BUG_ON(node->scanned_block);
+   DRM_MM_BUG_ON(!drm_mm_node_allocated(node));
+   DRM_MM_BUG_ON(drm_mm_node_scanned_block(node));
 
prev_node = list_prev_entry(node, node_list);
 
@@ -584,11 +589,12 @@ void drm_mm_remove_node(struct drm_mm_node *node)
 
drm_mm_interval_tree_remove(node, >interval_tree);
list_del(>node_list);
-   node->allocated = false;
 
if (drm_mm_hole_follows(prev_node))
rm_hole(prev_node);
add_hole(prev_node);
+
+   clear_bit_unlock(DRM_MM_NODE_ALLOCATED_BIT, >flags);
 }
 EXPORT_SYMBOL(drm_mm_remove_node);
 
@@ -605,7 +611,7 @@ void drm_mm_replace_node(struct drm_mm_node *old, struct 
drm_mm_node *new)
 {
struct drm_mm *mm = old->mm;
 
-   DRM_MM_BUG_ON(!old->allocated);
+   DRM_MM_BUG_ON(!drm_mm_node_allocated(old));
 
*new = *old;
 
@@ -622,8 +628,7 @@ void drm_mm_replace_node(struct drm_mm_node *old, struct 
drm_mm_node *new)
>holes_addr);
}
 
-   old->allocated = false;
-   new->allocated = true;
+   clear_bit_unlock(DRM_MM_NODE_ALLOCATED_BIT, >flags);
 }
 EXPORT_SYMBOL(drm_mm_replace_node);
 
@@ -731,9 +736,9 @@ bool drm_mm_scan_add_block(struct drm_mm_scan *scan,
u64 adj_start, adj_end;
 
DRM_MM_BUG_ON(node->mm != mm);
-   DRM_MM_BUG_ON(!node->allocated);
-   DRM_MM_BUG_ON(node->scanned_block);
-   node->scanned_block = true;
+   DRM_MM_BUG_ON(!drm_mm_node_allocated(node));
+   DRM_MM_BUG_ON(drm_mm_node_scanned_block(node));
+   __set_bit(DRM_MM_NODE_SCANNED_BIT, >flags);
mm->scan_active++;
 
/* Remove this block from the node_list so that we enlarge the hole
@@ -818,8 +823,7 @@ bool drm_mm_scan_remove_block(struct drm_mm_scan *scan,
struct drm_mm_node *prev_node;
 
DRM_MM_BUG_ON(node->mm != scan->mm);
-   DRM_MM_BUG_ON(!node->scanned_block);
-   node->scanned_block = false;
+   DRM_MM_BUG_ON(!drm_mm_node_scanned_block(node));
 
DRM_MM_BUG_ON(!node->mm->scan_active);
node->mm->scan_active--;
@@ -837,6 +841,8 @@ bool 

[Intel-gfx] [PATCH 19/21] drm/i915: Merge wait_for_timelines with retire_request

2019-09-01 Thread Chris Wilson
wait_for_timelines is essentially the same loop as retiring requests
(with an extra), so merge the two into one routine.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c  |  4 +-
 drivers/gpu/drm/i915/gem/i915_gem_pm.c|  6 +-
 .../drm/i915/gem/selftests/i915_gem_context.c |  4 +-
 drivers/gpu/drm/i915/gt/selftest_timeline.c   |  2 +-
 drivers/gpu/drm/i915/i915_debugfs.c   |  6 +-
 drivers/gpu/drm/i915/i915_drv.h   |  3 +-
 drivers/gpu/drm/i915/i915_gem.c   | 68 ++-
 drivers/gpu/drm/i915/i915_gem_evict.c | 12 ++--
 drivers/gpu/drm/i915/i915_gem_gtt.c   |  2 +-
 drivers/gpu/drm/i915/i915_request.c   | 21 +-
 drivers/gpu/drm/i915/i915_request.h   |  3 +-
 .../gpu/drm/i915/selftests/igt_flush_test.c   |  4 +-
 .../gpu/drm/i915/selftests/igt_live_test.c|  4 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  2 +-
 14 files changed, 42 insertions(+), 99 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 9a8c307c5aeb..761ab0076a6a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -429,9 +429,7 @@ static int create_mmap_offset(struct drm_i915_gem_object 
*obj)
 
/* Attempt to reap some mmap space from dead objects */
do {
-   err = i915_gem_wait_for_idle(i915,
-I915_WAIT_INTERRUPTIBLE,
-MAX_SCHEDULE_TIMEOUT);
+   err = i915_gem_wait_for_idle(i915, MAX_SCHEDULE_TIMEOUT);
if (err)
break;
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index e83eed8fa452..afbcf9219267 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -25,7 +25,7 @@ static void retire_work_handler(struct work_struct *work)
struct drm_i915_private *i915 =
container_of(work, typeof(*i915), gem.retire_work.work);
 
-   i915_retire_requests(i915);
+   i915_retire_requests(i915, 0);
 
queue_delayed_work(i915->wq,
   >gem.retire_work,
@@ -59,9 +59,7 @@ static bool switch_to_kernel_context_sync(struct intel_gt *gt)
 {
bool result = !intel_gt_is_wedged(gt);
 
-   if (i915_gem_wait_for_idle(gt->i915,
-  I915_WAIT_FOR_IDLE_BOOST,
-  I915_GEM_IDLE_TIMEOUT) == -ETIME) {
+   if (i915_gem_wait_for_idle(gt->i915, I915_GEM_IDLE_TIMEOUT) == -ETIME) {
/* XXX hide warning from gem_eio */
if (i915_modparams.reset) {
dev_err(gt->i915->drm.dev,
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index b87e35a713b8..bc4c8d763024 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -304,7 +304,7 @@ create_test_object(struct i915_address_space *vm,
int err;
 
/* Keep in GEM's good graces */
-   i915_retire_requests(vm->i915);
+   i915_retire_requests(vm->i915, 0);
 
size = min(vm->total / 2, 1024ull * DW_PER_PAGE * PAGE_SIZE);
size = round_down(size, DW_PER_PAGE * PAGE_SIZE);
@@ -923,7 +923,7 @@ __sseu_finish(const char *name,
 
if ((flags & TEST_IDLE) && ret == 0) {
ret = i915_gem_wait_for_idle(ce->engine->i915,
-0, MAX_SCHEDULE_TIMEOUT);
+MAX_SCHEDULE_TIMEOUT);
if (ret)
return ret;
 
diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c 
b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index 16abfabf08c7..b0b0fa5f91de 100644
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -734,7 +734,7 @@ static int live_hwsp_wrap(void *arg)
goto out;
}
 
-   i915_retire_requests(i915); /* recycle HWSP */
+   i915_retire_requests(i915, 0); /* recycle HWSP */
}
 
 out:
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 09c6c485a732..d7410f3f576f 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3612,12 +3612,10 @@ i915_drop_caches_set(void *data, u64 val)
intel_gt_set_wedged(>gt);
 
if (val & DROP_RETIRE)
-   i915_retire_requests(i915);
+   i915_retire_requests(i915, 0);
 
if (val & (DROP_IDLE | DROP_ACTIVE)) {
-   ret = i915_gem_wait_for_idle(i915,
-I915_WAIT_INTERRUPTIBLE,
-

[Intel-gfx] [PATCH 18/21] drm/i915: Remove the GEM idle worker

2019-09-01 Thread Chris Wilson
Nothing inside the idle worker now requires struct_mutex, so we can
remove the indirection of using our own worker.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c| 28 ++-
 .../drm/i915/gem/selftests/i915_gem_mman.c|  3 --
 drivers/gpu/drm/i915/i915_debugfs.c   |  5 
 drivers/gpu/drm/i915/i915_drv.h   |  9 --
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  6 
 5 files changed, 2 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index fec0b410d1d9..e83eed8fa452 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -13,36 +13,13 @@
 
 static void i915_gem_park(struct drm_i915_private *i915)
 {
-   lockdep_assert_held(>drm.struct_mutex);
+   cancel_delayed_work(>gem.retire_work);
 
i915_vma_parked(i915);
 
i915_globals_park();
 }
 
-static void idle_work_handler(struct work_struct *work)
-{
-   struct drm_i915_private *i915 =
-   container_of(work, typeof(*i915), gem.idle_work);
-   bool park;
-
-   cancel_delayed_work_sync(>gem.retire_work);
-   mutex_lock(>drm.struct_mutex);
-
-   intel_wakeref_lock(>gt.wakeref);
-   park = (!intel_wakeref_is_active(>gt.wakeref) &&
-   !work_pending(work));
-   intel_wakeref_unlock(>gt.wakeref);
-   if (park)
-   i915_gem_park(i915);
-   else
-   queue_delayed_work(i915->wq,
-  >gem.retire_work,
-  round_jiffies_up_relative(HZ));
-
-   mutex_unlock(>drm.struct_mutex);
-}
-
 static void retire_work_handler(struct work_struct *work)
 {
struct drm_i915_private *i915 =
@@ -71,7 +48,7 @@ static int pm_notifier(struct notifier_block *nb,
break;
 
case INTEL_GT_PARK:
-   queue_work(i915->wq, >gem.idle_work);
+   i915_gem_park(i915);
break;
}
 
@@ -244,7 +221,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
 
 void i915_gem_init__pm(struct drm_i915_private *i915)
 {
-   INIT_WORK(>gem.idle_work, idle_work_handler);
INIT_DELAYED_WORK(>gem.retire_work, retire_work_handler);
 
i915->gem.pm_notifier.notifier_call = pm_notifier;
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 39c01bc4eb51..8563af1819c4 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -384,11 +384,8 @@ static bool assert_mmap_offset(struct drm_i915_private 
*i915,
 static void disable_retire_worker(struct drm_i915_private *i915)
 {
i915_gem_driver_unregister__shrinker(i915);
-
intel_gt_pm_get(>gt);
-
cancel_delayed_work_sync(>gem.retire_work);
-   flush_work(>gem.idle_work);
 }
 
 static void restore_retire_worker(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 55f0fc03aa3e..09c6c485a732 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3642,11 +3642,6 @@ i915_drop_caches_set(void *data, u64 val)
i915_gem_shrink_all(i915);
fs_reclaim_release(GFP_KERNEL);
 
-   if (val & DROP_IDLE) {
-   flush_delayed_work(>gem.retire_work);
-   flush_work(>gem.idle_work);
-   }
-
if (val & DROP_FREED)
i915_gem_drain_freed_objects(i915);
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index db7480831e52..b33fc7972e6b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1718,15 +1718,6 @@ struct drm_i915_private {
 * fires, go retire requests.
 */
struct delayed_work retire_work;
-
-   /**
-* When we detect an idle GPU, we want to turn on
-* powersaving features. So once we see that there
-* are no more requests outstanding and no more
-* arrive within a small period of time, we fire
-* off the idle_work.
-*/
-   struct work_struct idle_work;
} gem;
 
/* For i945gm vblank irq vs. C3 workaround */
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c 
b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index 1956006a0d5b..f3e9b5d7d098 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -55,7 +55,6 @@ static void mock_device_release(struct drm_device *dev)
 
mock_device_flush(i915);
 
-   flush_work(>gem.idle_work);
i915_gem_drain_workqueue(i915);
 
mutex_lock(>drm.struct_mutex);
@@ -103,10 +102,6 @@ static void 

[Intel-gfx] [PATCH 09/21] drm/i915: Only track bound elements of the GTT

2019-09-01 Thread Chris Wilson
The premise here is to simply avoiding having to acquire the vm->mutex
inside vma create/destroy to update the vm->unbound_lists, to avoid some
nasty lock recursions later.

Signed-off-by: Chris Wilson 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c|  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c   | 23 ---
 drivers/gpu/drm/i915/i915_gem_gtt.h   |  5 
 drivers/gpu/drm/i915/i915_vma.c   | 12 ++
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  2 +-
 5 files changed, 8 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index aa533b4ab5f5..2e1bfd5e4adf 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -689,7 +689,7 @@ i915_gem_object_create_stolen_for_preallocated(struct 
drm_i915_private *dev_priv
__i915_vma_set_map_and_fenceable(vma);
 
mutex_lock(>vm.mutex);
-   list_move_tail(>vm_link, >vm.bound_list);
+   list_add_tail(>vm_link, >vm.bound_list);
mutex_unlock(>vm.mutex);
 
GEM_BUG_ON(i915_gem_object_is_shrinkable(obj));
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 27e8b12b9e45..d28e5ffa0b9d 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -505,19 +505,12 @@ static void i915_address_space_fini(struct 
i915_address_space *vm)
 
 static void ppgtt_destroy_vma(struct i915_address_space *vm)
 {
-   struct list_head *phases[] = {
-   >bound_list,
-   >unbound_list,
-   NULL,
-   }, **phase;
+   struct i915_vma *vma, *vn;
 
mutex_lock(>i915->drm.struct_mutex);
-   for (phase = phases; *phase; phase++) {
-   struct i915_vma *vma, *vn;
-
-   list_for_each_entry_safe(vma, vn, *phase, vm_link)
-   i915_vma_destroy(vma);
-   }
+   list_for_each_entry_safe(vma, vn, >bound_list, vm_link)
+   i915_vma_destroy(vma);
+   GEM_BUG_ON(!list_empty(>bound_list));
mutex_unlock(>i915->drm.struct_mutex);
 }
 
@@ -528,9 +521,6 @@ static void __i915_vm_release(struct work_struct *work)
 
ppgtt_destroy_vma(vm);
 
-   GEM_BUG_ON(!list_empty(>bound_list));
-   GEM_BUG_ON(!list_empty(>unbound_list));
-
vm->cleanup(vm);
i915_address_space_fini(vm);
 
@@ -569,7 +559,6 @@ static void i915_address_space_init(struct 
i915_address_space *vm, int subclass)
 
stash_init(>free_pages);
 
-   INIT_LIST_HEAD(>unbound_list);
INIT_LIST_HEAD(>bound_list);
 }
 
@@ -1883,10 +1872,6 @@ static struct i915_vma *pd_vma_create(struct gen6_ppgtt 
*ppgtt, int size)
INIT_LIST_HEAD(>obj_link);
INIT_LIST_HEAD(>closed_link);
 
-   mutex_lock(>vm->mutex);
-   list_add(>vm_link, >vm->unbound_list);
-   mutex_unlock(>vm->mutex);
-
return vma;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h 
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 07c85c134d4c..546a7c0aa0e7 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -320,11 +320,6 @@ struct i915_address_space {
 */
struct list_head bound_list;
 
-   /**
-* List of vma that are not unbound.
-*/
-   struct list_head unbound_list;
-
struct pagestash free_pages;
 
/* Global GTT */
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 76525543009a..8486052d 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -218,10 +218,6 @@ vma_create(struct drm_i915_gem_object *obj,
 
spin_unlock(>vma.lock);
 
-   mutex_lock(>mutex);
-   list_add(>vm_link, >unbound_list);
-   mutex_unlock(>mutex);
-
return vma;
 
 err_vma:
@@ -659,7 +655,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 
alignment, u64 flags)
GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, cache_level));
 
mutex_lock(>vm->mutex);
-   list_move_tail(>vm_link, >vm->bound_list);
+   list_add_tail(>vm_link, >vm->bound_list);
mutex_unlock(>vm->mutex);
 
if (vma->obj) {
@@ -687,7 +683,7 @@ i915_vma_remove(struct i915_vma *vma)
 
mutex_lock(>vm->mutex);
drm_mm_remove_node(>node);
-   list_move_tail(>vm_link, >vm->unbound_list);
+   list_del(>vm_link);
mutex_unlock(>vm->mutex);
 
/*
@@ -800,10 +796,6 @@ static void __i915_vma_destroy(struct i915_vma *vma)
GEM_BUG_ON(drm_mm_node_allocated(>node));
GEM_BUG_ON(vma->fence);
 
-   mutex_lock(>vm->mutex);
-   list_del(>vm_link);
-   mutex_unlock(>vm->mutex);
-
if (vma->obj) {
struct drm_i915_gem_object *obj = vma->obj;
 
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 

[Intel-gfx] [PATCH 08/21] drm/i915: Make shrink/unshrink be atomic

2019-09-01 Thread Chris Wilson
Add an atomic counter and always take the spinlock around the pin/unpin
events, so that we can perform the list manipulation concurrently.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_domain.c|  3 +-
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |  1 +
 drivers/gpu/drm/i915/gem/i915_gem_pages.c |  1 +
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  | 36 +++
 drivers/gpu/drm/i915/gt/intel_context.c   |  2 +-
 5 files changed, 26 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c 
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 6af740a5e3db..f0c437b6e995 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -492,7 +492,8 @@ static void i915_gem_object_bump_inactive_ggtt(struct 
drm_i915_gem_object *obj)
 
spin_lock_irqsave(>mm.obj_lock, flags);
 
-   if (obj->mm.madv == I915_MADV_WILLNEED)
+   if (obj->mm.madv == I915_MADV_WILLNEED &&
+   !atomic_read(>mm.shrink_pin))
list_move_tail(>mm.link, >mm.shrink_list);
 
spin_unlock_irqrestore(>mm.obj_lock, flags);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 13b9dc0e1a89..b0550727e69a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -156,6 +156,7 @@ struct drm_i915_gem_object {
struct {
struct mutex lock; /* protects the pages and their use */
atomic_t pages_pin_count;
+   atomic_t shrink_pin;
 
struct sg_table *pages;
void *mapping;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 18f0ce0135c1..2e941f093a20 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -71,6 +71,7 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object 
*obj,
list = >mm.shrink_list;
list_add_tail(>mm.link, list);
 
+   atomic_set(>mm.shrink_pin, 0);
spin_unlock_irqrestore(>mm.obj_lock, flags);
}
 }
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 4e55cfc2b0dc..d2c05d752909 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -516,46 +516,52 @@ void i915_gem_shrinker_taints_mutex(struct 
drm_i915_private *i915,
 
 void i915_gem_object_make_unshrinkable(struct drm_i915_gem_object *obj)
 {
+   struct drm_i915_private *i915 = obj_to_i915(obj);
+   unsigned long flags;
+
/*
 * We can only be called while the pages are pinned or when
 * the pages are released. If pinned, we should only be called
 * from a single caller under controlled conditions; and on release
 * only one caller may release us. Neither the two may cross.
 */
-   if (!list_empty(>mm.link)) { /* pinned by caller */
-   struct drm_i915_private *i915 = obj_to_i915(obj);
-   unsigned long flags;
-
-   spin_lock_irqsave(>mm.obj_lock, flags);
-   GEM_BUG_ON(list_empty(>mm.link));
+   if (atomic_add_unless(>mm.shrink_pin, 1, 0))
+   return;
 
+   spin_lock_irqsave(>mm.obj_lock, flags);
+   if (!atomic_fetch_inc(>mm.shrink_pin) &&
+   !list_empty(>mm.link)) {
list_del_init(>mm.link);
i915->mm.shrink_count--;
i915->mm.shrink_memory -= obj->base.size;
-
-   spin_unlock_irqrestore(>mm.obj_lock, flags);
}
+   spin_unlock_irqrestore(>mm.obj_lock, flags);
 }
 
 static void __i915_gem_object_make_shrinkable(struct drm_i915_gem_object *obj,
  struct list_head *head)
 {
+   struct drm_i915_private *i915 = obj_to_i915(obj);
+   unsigned long flags;
+
GEM_BUG_ON(!i915_gem_object_has_pages(obj));
-   GEM_BUG_ON(!list_empty(>mm.link));
+   if (!i915_gem_object_is_shrinkable(obj))
+   return;
 
-   if (i915_gem_object_is_shrinkable(obj)) {
-   struct drm_i915_private *i915 = obj_to_i915(obj);
-   unsigned long flags;
+   if (atomic_add_unless(>mm.shrink_pin, -1, 1))
+   return;
 
-   spin_lock_irqsave(>mm.obj_lock, flags);
-   GEM_BUG_ON(!kref_read(>base.refcount));
+   spin_lock_irqsave(>mm.obj_lock, flags);
+   GEM_BUG_ON(!kref_read(>base.refcount));
+   if (atomic_dec_and_test(>mm.shrink_pin)) {
+   GEM_BUG_ON(!list_empty(>mm.link));
 
list_add_tail(>mm.link, head);
i915->mm.shrink_count++;
i915->mm.shrink_memory += obj->base.size;
 
-   

[Intel-gfx] [PATCH 14/21] drm/i915: Push the i915_active.retire into a worker

2019-09-01 Thread Chris Wilson
As we need to use a mutex to serialise i915_active activation
(because we want to allow the callback to sleep), we need to push the
i915_active.retire into a worker callback in case we get need to retire
from an atomic context.

Signed-off-by: Chris Wilson 
Reviewed-by: Matthew Auld 
---
 .../gpu/drm/i915/display/intel_frontbuffer.c  |  4 ++-
 drivers/gpu/drm/i915/gem/i915_gem_context.c   |  1 +
 drivers/gpu/drm/i915/gt/intel_context.c   |  2 ++
 drivers/gpu/drm/i915/gt/intel_engine_pool.c   |  1 +
 drivers/gpu/drm/i915/gt/intel_timeline.c  |  1 +
 drivers/gpu/drm/i915/i915_active.c| 34 ---
 drivers/gpu/drm/i915/i915_active_types.h  | 13 ++-
 drivers/gpu/drm/i915/i915_vma.c   |  2 ++
 drivers/gpu/drm/i915/selftests/i915_active.c  |  6 ++--
 9 files changed, 55 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c 
b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index fc40dc1fdbcc..6428b8dd70d3 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -206,6 +206,7 @@ static int frontbuffer_active(struct i915_active *ref)
return 0;
 }
 
+__i915_active_call
 static void frontbuffer_retire(struct i915_active *ref)
 {
struct intel_frontbuffer *front =
@@ -257,7 +258,8 @@ intel_frontbuffer_get(struct drm_i915_gem_object *obj)
kref_init(>ref);
atomic_set(>bits, 0);
i915_active_init(i915, >write,
-frontbuffer_active, frontbuffer_retire);
+frontbuffer_active,
+i915_active_may_sleep(frontbuffer_retire));
 
spin_lock(>fb_tracking.lock);
if (obj->frontbuffer) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 653f7275306a..4f303cb94698 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -848,6 +848,7 @@ struct context_barrier_task {
void *data;
 };
 
+__i915_active_call
 static void cb_retire(struct i915_active *base)
 {
struct context_barrier_task *cb = container_of(base, typeof(*cb), base);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c 
b/drivers/gpu/drm/i915/gt/intel_context.c
index c0495811f493..ae7c2689ef30 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -138,6 +138,7 @@ static void __context_unpin_state(struct i915_vma *vma)
__i915_vma_unpin(vma);
 }
 
+__i915_active_call
 static void __intel_context_retire(struct i915_active *active)
 {
struct intel_context *ce = container_of(active, typeof(*ce), active);
@@ -150,6 +151,7 @@ static void __intel_context_retire(struct i915_active 
*active)
 
intel_timeline_unpin(ce->timeline);
intel_ring_unpin(ce->ring);
+
intel_context_put(ce);
 }
 
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pool.c 
b/drivers/gpu/drm/i915/gt/intel_engine_pool.c
index 97d36cca8ded..81fab101fdb4 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pool.c
@@ -61,6 +61,7 @@ static int pool_active(struct i915_active *ref)
return 0;
 }
 
+__i915_active_call
 static void pool_retire(struct i915_active *ref)
 {
struct intel_engine_pool_node *node =
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c 
b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 9cb01d9828f1..d824bca43d55 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -136,6 +136,7 @@ static void __idle_cacheline_free(struct 
intel_timeline_cacheline *cl)
kfree(cl);
 }
 
+__i915_active_call
 static void __cacheline_retire(struct i915_active *active)
 {
struct intel_timeline_cacheline *cl =
diff --git a/drivers/gpu/drm/i915/i915_active.c 
b/drivers/gpu/drm/i915/i915_active.c
index 6a37ed52957a..f82d6d931824 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -132,6 +132,7 @@ __active_retire(struct i915_active *ref)
bool retire = false;
 
lockdep_assert_held(>mutex);
+   GEM_BUG_ON(i915_active_is_idle(ref));
 
/* return the unused nodes to our slabcache -- flushing the allocator */
if (atomic_dec_and_test(>count)) {
@@ -157,6 +158,19 @@ __active_retire(struct i915_active *ref)
ref->retire(ref);
 }
 
+static void
+active_work(struct work_struct *wrk)
+{
+   struct i915_active *ref = container_of(wrk, typeof(*ref), work);
+
+   GEM_BUG_ON(!atomic_read(>count));
+   if (atomic_add_unless(>count, -1, 1))
+   return;
+
+   mutex_lock(>mutex);
+   __active_retire(ref);
+}
+
 static void
 active_retire(struct i915_active *ref)
 {
@@ -164,8 +178,13 @@ active_retire(struct i915_active *ref)
if (atomic_add_unless(>count, -1, 1))
return;
 
-   /* One 

[Intel-gfx] [PATCH 03/21] drm/i915/execlists: Ignore lost completion events

2019-09-01 Thread Chris Wilson
Icelake hit an issue where it missed reporting a completion event and
instead jumped straight to a idle->active event (skipping over the
active->idle and not even hitting the lite-restore preemption).

661497511us : process_csb: rcs0 cs-irq head=11, tail=0
661497512us : process_csb: rcs0 csb[0]: status=0x10008002:0x0020 
[lite-restore]
661497512us : trace_ports: rcs0: preempted { 28cc8:11052, 0:0 }
661497513us : trace_ports: rcs0: promote { 28cc8:11054, 0:0 }
661497514us : __i915_request_submit: rcs0 fence 28cc8:11056, current 11052
661497514us : __execlists_submission_tasklet: rcs0: 
queue_priority_hint:-2147483648, submit:yes
661497515us : trace_ports: rcs0: submit { 28cc8:11056, 0:0 }
661497530us : process_csb: rcs0 cs-irq head=0, tail=1
661497530us : process_csb: rcs0 csb[1]: status=0x10008002:0x0020 
[lite-restore]
661497531us : trace_ports: rcs0: preempted { 28cc8:11054!, 0:0 }
661497535us : trace_ports: rcs0: promote { 28cc8:11056, 0:0 }
661497540us : __i915_request_submit: rcs0 fence 28cc8:11058, current 11054
661497544us : __execlists_submission_tasklet: rcs0: 
queue_priority_hint:-2147483648, submit:yes
661497545us : trace_ports: rcs0: submit { 28cc8:11058, 0:0 }
661497553us : process_csb: rcs0 cs-irq head=1, tail=2
661497553us : process_csb: rcs0 csb[2]: status=0x1001:0x 
[idle->active]
661497574us : process_csb: process_csb:1538 GEM_BUG_ON(*execlists->active)

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 63 +
 1 file changed, 18 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 87b7473a6dfb..14a4df45e116 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -693,6 +693,9 @@ trace_ports(const struct intel_engine_execlists *execlists,
const struct intel_engine_cs *engine =
container_of(execlists, typeof(*engine), execlists);
 
+   if (!ports[0])
+   return;
+
GEM_TRACE("%s: %s { %llx:%lld%s, %llx:%lld }\n",
  engine->name, msg,
  ports[0]->fence.context,
@@ -1371,13 +1374,6 @@ reset_in_progress(const struct intel_engine_execlists 
*execlists)
return unlikely(!__tasklet_is_enabled(>tasklet));
 }
 
-enum csb_step {
-   CSB_NOP,
-   CSB_PROMOTE,
-   CSB_PREEMPT,
-   CSB_COMPLETE,
-};
-
 /*
  * Starting with Gen12, the status has a new format:
  *
@@ -1404,7 +1400,7 @@ enum csb_step {
  * bits 47-57: sw context id of the lrc the GT switched away from
  * bits 58-63: sw counter of the lrc the GT switched away from
  */
-static inline enum csb_step
+static inline bool
 gen12_csb_parse(const struct intel_engine_execlists *execlists, const u32 *csb)
 {
u32 lower_dw = csb[0];
@@ -1414,7 +1410,7 @@ gen12_csb_parse(const struct intel_engine_execlists 
*execlists, const u32 *csb)
bool new_queue = lower_dw & GEN12_CTX_STATUS_SWITCHED_TO_NEW_QUEUE;
 
if (!ctx_away_valid && ctx_to_valid)
-   return CSB_PROMOTE;
+   return true;
 
/*
 * The context switch detail is not guaranteed to be 5 when a preemption
@@ -1424,7 +1420,7 @@ gen12_csb_parse(const struct intel_engine_execlists 
*execlists, const u32 *csb)
 * would require some extra handling, but we don't support that.
 */
if (new_queue && ctx_away_valid)
-   return CSB_PREEMPT;
+   return true;
 
/*
 * switch detail = 5 is covered by the case above and we do not expect a
@@ -1433,29 +1429,13 @@ gen12_csb_parse(const struct intel_engine_execlists 
*execlists, const u32 *csb)
 */
GEM_BUG_ON(GEN12_CTX_SWITCH_DETAIL(upper_dw));
 
-   if (*execlists->active) {
-   GEM_BUG_ON(!ctx_away_valid);
-   return CSB_COMPLETE;
-   }
-
-   return CSB_NOP;
+   return false;
 }
 
-static inline enum csb_step
+static inline bool
 gen8_csb_parse(const struct intel_engine_execlists *execlists, const u32 *csb)
 {
-   unsigned int status = *csb;
-
-   if (status & GEN8_CTX_STATUS_IDLE_ACTIVE)
-   return CSB_PROMOTE;
-
-   if (status & GEN8_CTX_STATUS_PREEMPTED)
-   return CSB_PREEMPT;
-
-   if (*execlists->active)
-   return CSB_COMPLETE;
-
-   return CSB_NOP;
+   return *csb & (GEN8_CTX_STATUS_IDLE_ACTIVE | GEN8_CTX_STATUS_PREEMPTED);
 }
 
 static void process_csb(struct intel_engine_cs *engine)
@@ -1494,7 +1474,7 @@ static void process_csb(struct intel_engine_cs *engine)
rmb();
 
do {
-   enum csb_step csb_step;
+   bool promote;
 
if (++head == num_entries)
head = 0;
@@ -1522,20 +1502,16 @@ static void process_csb(struct intel_engine_cs *engine)
  buf[2 * head + 0], buf[2 * head + 1]);
 
if 

[Intel-gfx] [PATCH 13/21] drm/i915: Pull i915_vma_pin under the vm->mutex

2019-09-01 Thread Chris Wilson
Replace the struct_mutex requirement for pinning the i915_vma with the
local vm->mutex instead. Note that the vm->mutex is tainted by the
shrinker (we require unbinding from inside fs-reclaim) and so we cannot
allocate while holding that mutex. Instead we have to preallocate
workers to do allocate and apply the PTE updates after we have we
reserved their slot in the drm_mm (using fences to order the PTE writes
with the GPU work and with later unbind).

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/display/intel_display.c  |  29 +-
 drivers/gpu/drm/i915/display/intel_fbdev.c|   8 +-
 drivers/gpu/drm/i915/display/intel_overlay.c  |  11 +-
 .../gpu/drm/i915/gem/i915_gem_client_blt.c|  13 +-
 drivers/gpu/drm/i915/gem/i915_gem_context.c   |  20 +-
 drivers/gpu/drm/i915/gem/i915_gem_domain.c|  19 +-
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  48 +-
 drivers/gpu/drm/i915/gem/i915_gem_mman.c  |  24 +-
 drivers/gpu/drm/i915/gem/i915_gem_object.c|  33 +-
 drivers/gpu/drm/i915/gem/i915_gem_object.h|   5 +
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  |  71 +--
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c|   8 +-
 drivers/gpu/drm/i915/gem/i915_gem_tiling.c|  15 +-
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c   |  27 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |  23 +-
 .../drm/i915/gem/selftests/i915_gem_context.c |  12 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c|   2 -
 .../drm/i915/gem/selftests/igt_gem_utils.c|   7 +-
 drivers/gpu/drm/i915/gt/intel_gt.c|   5 +-
 drivers/gpu/drm/i915/gt/intel_ringbuffer.c|   4 +-
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c  |  19 +-
 drivers/gpu/drm/i915/gvt/aperture_gm.c|  12 +-
 drivers/gpu/drm/i915/i915_active.c|  94 +++-
 drivers/gpu/drm/i915/i915_active.h|   7 +
 drivers/gpu/drm/i915/i915_active_types.h  |   5 +
 drivers/gpu/drm/i915/i915_gem.c   |  94 ++--
 drivers/gpu/drm/i915/i915_gem_evict.c |  20 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c |   5 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c   | 104 ++--
 drivers/gpu/drm/i915/i915_gem_gtt.h   |  38 +-
 drivers/gpu/drm/i915/i915_perf.c  |  32 +-
 drivers/gpu/drm/i915/i915_vma.c   | 476 --
 drivers/gpu/drm/i915/i915_vma.h   |  75 ++-
 .../gpu/drm/i915/selftests/i915_gem_evict.c   |  36 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  91 ++--
 drivers/gpu/drm/i915/selftests/i915_vma.c |   8 +-
 36 files changed, 818 insertions(+), 682 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 5e3b22e3f61d..81c0d7a35c4c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2079,7 +2079,6 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
unsigned int pinctl;
u32 alignment;
 
-   WARN_ON(!mutex_is_locked(>struct_mutex));
if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
return ERR_PTR(-EINVAL);
 
@@ -2163,8 +2162,6 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
 
 void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
 {
-   lockdep_assert_held(>vm->i915->drm.struct_mutex);
-
i915_gem_object_lock(vma->obj);
if (flags & PLANE_HAS_FENCE)
i915_vma_unpin_fence(vma);
@@ -3065,12 +3062,10 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
return false;
}
 
-   mutex_lock(>struct_mutex);
obj = i915_gem_object_create_stolen_for_preallocated(dev_priv,
 base_aligned,
 base_aligned,
 size_aligned);
-   mutex_unlock(>struct_mutex);
if (!obj)
return false;
 
@@ -3232,13 +3227,11 @@ intel_find_initial_plane_obj(struct intel_crtc 
*intel_crtc,
intel_state->color_plane[0].stride =
intel_fb_pitch(fb, 0, intel_state->base.rotation);
 
-   mutex_lock(>struct_mutex);
intel_state->vma =
intel_pin_and_fence_fb_obj(fb,
   _state->view,
   intel_plane_uses_fence(intel_state),
   _state->flags);
-   mutex_unlock(>struct_mutex);
if (IS_ERR(intel_state->vma)) {
DRM_ERROR("failed to pin boot fb on pipe %d: %li\n",
  intel_crtc->pipe, PTR_ERR(intel_state->vma));
@@ -14364,8 +14357,6 @@ static void fb_obj_bump_render_priority(struct 
drm_i915_gem_object *obj)
  * bits.  Some older platforms need special physical address handling for
  * cursor planes.
  *
- * Must be called with struct_mutex held.
- *
  * Returns 0 on success, negative error code on 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Report aliasing ppgtt size as ggtt size

2019-09-01 Thread Patchwork
== Series Details ==

Series: drm/i915: Report aliasing ppgtt size as ggtt size
URL   : https://patchwork.freedesktop.org/series/66106/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6818_full -> Patchwork_14253_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_14253_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110841])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-iclb7/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-iclb4/igt@gem_ctx_sha...@exec-single-timeline-bsd.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#111325]) +3 similar 
issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-iclb5/igt@gem_exec_sched...@reorder-wide-bsd.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-iclb2/igt@gem_exec_sched...@reorder-wide-bsd.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl:  [PASS][5] -> [SKIP][6] ([fdo#109271])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-kbl3/igt@i915_pm_rc6_reside...@rc6-accuracy.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-kbl2/igt@i915_pm_rc6_reside...@rc6-accuracy.html

  * igt@i915_pm_rps@min-max-config-loaded:
- shard-apl:  [PASS][7] -> [FAIL][8] ([fdo#102250])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-apl8/igt@i915_pm_...@min-max-config-loaded.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-apl7/igt@i915_pm_...@min-max-config-loaded.html

  * igt@i915_pm_rps@reset:
- shard-skl:  [PASS][9] -> [FAIL][10] ([fdo#102250])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-skl2/igt@i915_pm_...@reset.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-skl1/igt@i915_pm_...@reset.html

  * igt@i915_suspend@forcewake:
- shard-skl:  [PASS][11] -> [INCOMPLETE][12] ([fdo#104108])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-skl1/igt@i915_susp...@forcewake.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-skl1/igt@i915_susp...@forcewake.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-iclb: [PASS][13] -> [INCOMPLETE][14] ([fdo#107713])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-iclb1/igt@kms_big...@linear-32bpp-rotate-0.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-iclb7/igt@kms_big...@linear-32bpp-rotate-0.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl:  [PASS][15] -> [FAIL][16] ([fdo#102670])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-skl3/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-skl3/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@flip-vs-panning-vs-hang-interruptible:
- shard-snb:  [PASS][17] -> [INCOMPLETE][18] ([fdo#105411])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-snb1/igt@kms_f...@flip-vs-panning-vs-hang-interruptible.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-snb1/igt@kms_f...@flip-vs-panning-vs-hang-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl:  [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +3 
similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-apl7/igt@kms_f...@flip-vs-suspend-interruptible.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-apl8/igt@kms_f...@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#103167]) +3 similar 
issues
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl:  [PASS][23] -> [FAIL][24] ([fdo#108145])
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/shard-skl3/igt@kms_plane_alpha_bl...@pipe-b-constant-alpha-min.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/shard-skl2/igt@kms_plane_alpha_bl...@pipe-b-constant-alpha-min.html

  * igt@kms_psr@psr2_suspend:
- shard-iclb: [PASS][25] -> 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt

2019-09-01 Thread Patchwork
== Series Details ==

Series: drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt
URL   : https://patchwork.freedesktop.org/series/66103/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6817_full -> Patchwork_14252_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_14252_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14252_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_14252_full:

### Piglit changes ###

 Possible regressions 

  * spec@ext_texture_norm16@render:
- pig-hsw-4770r:  NOTRUN -> [CRASH][1] +4 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/pig-hsw-4770r/spec@ext_texture_nor...@render.html

  
New tests
-

  New tests have been introduced between CI_DRM_6817_full and 
Patchwork_14252_full:

### New Piglit tests (1) ###

  * spec@ext_framebuffer_object@fbo-fragcoord2:
- Statuses : 1 crash(s)
- Exec time: [0.12] s

  

Known issues


  Here are the changes found in Patchwork_14252_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [PASS][2] -> [SKIP][3] ([fdo#111325]) +2 similar 
issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb8/igt@gem_exec_sched...@in-order-bsd.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-iclb1/igt@gem_exec_sched...@in-order-bsd.html

  * igt@gem_exec_schedule@independent-bsd2:
- shard-iclb: [PASS][4] -> [SKIP][5] ([fdo#109276]) +14 similar 
issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb1/igt@gem_exec_sched...@independent-bsd2.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-iclb6/igt@gem_exec_sched...@independent-bsd2.html

  * igt@gem_softpin@noreloc-s3:
- shard-skl:  [PASS][6] -> [INCOMPLETE][7] ([fdo#104108])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-skl8/igt@gem_soft...@noreloc-s3.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-skl2/igt@gem_soft...@noreloc-s3.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl:  [PASS][8] -> [SKIP][9] ([fdo#109271])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-kbl3/igt@i915_pm_rc6_reside...@rc6-accuracy.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-kbl1/igt@i915_pm_rc6_reside...@rc6-accuracy.html

  * igt@i915_pm_rps@reset:
- shard-apl:  [PASS][10] -> [FAIL][11] ([fdo#102250])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-apl6/igt@i915_pm_...@reset.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-apl3/igt@i915_pm_...@reset.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl:  [PASS][12] -> [DMESG-WARN][13] ([fdo#108566]) +2 
similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-apl8/igt@i915_susp...@fence-restore-tiled2untiled.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-apl1/igt@i915_susp...@fence-restore-tiled2untiled.html

  * igt@kms_flip@flip-vs-expired-vblank:
- shard-skl:  [PASS][14] -> [FAIL][15] ([fdo#105363])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-skl10/igt@kms_f...@flip-vs-expired-vblank.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-skl9/igt@kms_f...@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend:
- shard-snb:  [PASS][16] -> [INCOMPLETE][17] ([fdo#105411])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-snb5/igt@kms_f...@flip-vs-suspend.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-snb1/igt@kms_f...@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
- shard-iclb: [PASS][18] -> [FAIL][19] ([fdo#103167]) +2 similar 
issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb8/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-onoff.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-onoff.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl:  [PASS][20] -> [FAIL][21] ([fdo#108145])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-skl10/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html
   [21]: 

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Ignore preallocation of aliasing-ppgtt for vgpu

2019-09-01 Thread Patchwork
== Series Details ==

Series: drm/i915: Ignore preallocation of aliasing-ppgtt for vgpu
URL   : https://patchwork.freedesktop.org/series/66107/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6818 -> Patchwork_14254


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_14254 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14254, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_14254:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_suspend@basic-s3:
- fi-ivb-3770:[PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-ivb-3770/igt@gem_exec_susp...@basic-s3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/fi-ivb-3770/igt@gem_exec_susp...@basic-s3.html
- fi-hsw-peppy:   [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-hsw-peppy/igt@gem_exec_susp...@basic-s3.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/fi-hsw-peppy/igt@gem_exec_susp...@basic-s3.html

  
Known issues


  Here are the changes found in Patchwork_14254 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2:  [PASS][5] -> [FAIL][6] ([fdo#110627])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850:   [INCOMPLETE][7] ([fdo#107718]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_module_load@reload-with-fault-injection:
- {fi-icl-guc}:   [DMESG-WARN][9] ([fdo#106107]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-icl-guc/igt@i915_module_l...@reload-with-fault-injection.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/fi-icl-guc/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3:  [FAIL][11] ([fdo#103167]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html
- fi-bsw-n3050:   [FAIL][13] ([fdo#103167]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-bsw-n3050/igt@kms_frontbuffer_track...@basic.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/fi-bsw-n3050/igt@kms_frontbuffer_track...@basic.html

  
 Warnings 

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [FAIL][15] ([fdo#111096]) -> [FAIL][16] ([fdo#111407])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14254/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407


Participating hosts (50 -> 43)
--

  Additional (1): fi-kbl-soraka 
  Missing(8): fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6818 -> Patchwork_14254

  CI-20190529: 20190529
  CI_DRM_6818: c914252ce49ad246ccf5b23b8627319fdf5ff995 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5162: e62ea305fdba2a9cd0dadfa527b54529cb0d1438 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14254: 8fa702c1b6e4a469e350b28c11d4c8224fbc1fbb @ 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Report aliasing ppgtt size as ggtt size

2019-09-01 Thread Patchwork
== Series Details ==

Series: drm/i915: Report aliasing ppgtt size as ggtt size
URL   : https://patchwork.freedesktop.org/series/66106/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6818 -> Patchwork_14253


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/

Known issues


  Here are the changes found in Patchwork_14253 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm:  [PASS][1] -> [DMESG-FAIL][2] ([fdo#08])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html

  
 Possible fixes 

  * igt@gem_exec_gttfill@basic:
- fi-bsw-kefka:   [SKIP][3] ([fdo#109271]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-bsw-kefka/igt@gem_exec_gttf...@basic.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/fi-bsw-kefka/igt@gem_exec_gttf...@basic.html

  * igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850:   [INCOMPLETE][5] ([fdo#107718]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3:  [FAIL][7] ([fdo#103167]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6818/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/fi-icl-u3/igt@kms_frontbuffer_track...@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#08]: https://bugs.freedesktop.org/show_bug.cgi?id=08


Participating hosts (50 -> 39)
--

  Additional (1): fi-kbl-soraka 
  Missing(12): fi-icl-u4 fi-bxt-dsi fi-ilk-m540 fi-bsw-n3050 fi-hsw-4200u 
fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-byt-clapper fi-icl-y fi-icl-dsi 
fi-bdw-samus 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6818 -> Patchwork_14253

  CI-20190529: 20190529
  CI_DRM_6818: c914252ce49ad246ccf5b23b8627319fdf5ff995 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5162: e62ea305fdba2a9cd0dadfa527b54529cb0d1438 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14253: 4849c0b94ad6903695957191387b45681a7b8bef @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

4849c0b94ad6 drm/i915: Report aliasing ppgtt size as ggtt size

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14253/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/i915: Ignore preallocation of aliasing-ppgtt for vgpu

2019-09-01 Thread Chris Wilson
vGPU doesn't run on any system that supports aliasing-ppgtt, so we do
not need to force ourselves to preallocate the page directory.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 10 --
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 906dc6fff383..012a24d013b4 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2579,16 +2579,6 @@ static int init_aliasing_ppgtt(struct i915_ggtt *ggtt)
goto err_ppgtt;
}
 
-   /*
-* Note we only pre-allocate as far as the end of the global
-* GTT. On 48b / 4-level page-tables, the difference is very,
-* very significant! We have to preallocate as GVT/vgpu does
-* not like the page directory disappearing.
-*/
-   err = ppgtt->vm.allocate_va_range(>vm, 0, ggtt->vm.total);
-   if (err)
-   goto err_ppgtt;
-
ggtt->alias = ppgtt;
 
GEM_BUG_ON(ggtt->vm.vma_ops.bind_vma != ggtt_bind_vma);
-- 
2.23.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/i915: Report aliasing ppgtt size as ggtt size

2019-09-01 Thread Chris Wilson
The aliasing-ppgtt is constrained to be the same size as the Global GTT
since it aliases the same address space. Simplifying gtt size reporting
in this case.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index b8969605f4e8..f1c0e5d958f3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -2231,8 +2231,6 @@ int i915_gem_context_getparam_ioctl(struct drm_device 
*dev, void *data,
args->size = 0;
if (ctx->vm)
args->value = ctx->vm->total;
-   else if (to_i915(dev)->ggtt.alias)
-   args->value = to_i915(dev)->ggtt.alias->vm.total;
else
args->value = to_i915(dev)->ggtt.vm.total;
break;
-- 
2.23.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Remove unused __engines_name()

2019-09-01 Thread Patchwork
== Series Details ==

Series: drm/i915/selftests: Remove unused __engines_name()
URL   : https://patchwork.freedesktop.org/series/66098/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6817_full -> Patchwork_14251_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_14251_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb2/igt@gem_exec_balan...@smoke.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-iclb6/igt@gem_exec_balan...@smoke.html

  * igt@gem_exec_params@invalid-bsd-ring:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276]) +8 similar 
issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb4/igt@gem_exec_par...@invalid-bsd-ring.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-iclb7/igt@gem_exec_par...@invalid-bsd-ring.html

  * igt@gem_exec_schedule@preempt-queue-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#111325]) +1 similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb7/igt@gem_exec_sched...@preempt-queue-bsd.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-iclb2/igt@gem_exec_sched...@preempt-queue-bsd.html

  * igt@i915_pm_rpm@gem-mmap-gtt:
- shard-iclb: [PASS][7] -> [INCOMPLETE][8] ([fdo#107713] / 
[fdo#108840])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb6/igt@i915_pm_...@gem-mmap-gtt.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-iclb2/igt@i915_pm_...@gem-mmap-gtt.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-apl:  [PASS][9] -> [DMESG-WARN][10] ([fdo#108566]) +4 
similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-apl4/igt@kms_cursor_...@pipe-c-cursor-suspend.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-apl1/igt@kms_cursor_...@pipe-c-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-snb:  [PASS][11] -> [INCOMPLETE][12] ([fdo#105411])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-snb4/igt@kms_cursor_leg...@flip-vs-cursor-toggle.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-snb1/igt@kms_cursor_leg...@flip-vs-cursor-toggle.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk:  [PASS][13] -> [FAIL][14] ([fdo#105363])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-glk9/igt@kms_f...@2x-flip-vs-expired-vblank.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-glk5/igt@kms_f...@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank:
- shard-skl:  [PASS][15] -> [FAIL][16] ([fdo#105363])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-skl10/igt@kms_f...@flip-vs-expired-vblank.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-skl8/igt@kms_f...@flip-vs-expired-vblank.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103167]) +2 similar 
issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-iclb2/igt@kms_frontbuffer_track...@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl:  [PASS][19] -> [FAIL][20] ([fdo#108145])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-skl10/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-skl9/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html

  * igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441]) +1 similar 
issue
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-iclb6/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_setmode@basic:
- shard-apl:  [PASS][23] -> [FAIL][24] ([fdo#99912])
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/shard-apl2/igt@kms_setm...@basic.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/shard-apl2/igt@kms_setm...@basic.html

  
 Possible fixes 

  * igt@gem_ctx_isolation@vcs1-none:
- shard-iclb: [SKIP][25] ([fdo#109276]) -> [PASS][26] +6 similar 
issues
   [25]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt

2019-09-01 Thread Patchwork
== Series Details ==

Series: drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt
URL   : https://patchwork.freedesktop.org/series/66103/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6817 -> Patchwork_14252


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/

Known issues


  Here are the changes found in Patchwork_14252 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@read_all_entries:
- fi-cfl-8109u:   [PASS][1] -> [DMESG-WARN][2] ([fdo#105602] / 
[fdo#106350] / [fdo#110691])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/fi-cfl-8109u/igt@debugfs_test@read_all_entries.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/fi-cfl-8109u/igt@debugfs_test@read_all_entries.html

  * igt@kms_chamelium@dp-edid-read:
- fi-cml-u2:  [PASS][3] -> [FAIL][4] ([fdo#109483])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html

  
 Possible fixes 

  * igt@gem_exec_gttfill@basic:
- fi-bsw-kefka:   [SKIP][5] ([fdo#109271]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/fi-bsw-kefka/igt@gem_exec_gttf...@basic.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/fi-bsw-kefka/igt@gem_exec_gttf...@basic.html

  * igt@prime_vgem@basic-fence-flip:
- fi-ilk-650: [DMESG-WARN][7] ([fdo#106387]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/fi-ilk-650/igt@prime_v...@basic-fence-flip.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/fi-ilk-650/igt@prime_v...@basic-fence-flip.html

  
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#106350]: https://bugs.freedesktop.org/show_bug.cgi?id=106350
  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
  [fdo#110691]: https://bugs.freedesktop.org/show_bug.cgi?id=110691


Participating hosts (51 -> 41)
--

  Additional (1): fi-apl-guc 
  Missing(11): fi-ilk-m540 fi-bsw-n3050 fi-hsw-4200u fi-hsw-peppy 
fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-gdg-551 fi-icl-y fi-byt-clapper 
fi-bdw-samus 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6817 -> Patchwork_14252

  CI-20190529: 20190529
  CI_DRM_6817: 8ae00727917ce047fc0db5672769f70c6eaa314e @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5162: e62ea305fdba2a9cd0dadfa527b54529cb0d1438 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14252: 3a52410ae7798b0a73299b7f9db9b6b697454a42 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

3a52410ae779 drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14252/
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[Intel-gfx] [PATCH] drm/i915: Restrict the aliasing-ppgtt to the size of the ggtt

2019-09-01 Thread Chris Wilson
The aliasing-ppgtt is not allowed to be smaller than the ggtt, nor
should we advertise it as being any bigger, or else we may get sued for
false advertisement.

Testcase: igt/gem_exec_big
Fixes: 0b718ba1e884 ("drm/i915/gtt: Downgrade Cherryview back to 
aliasing-ppgtt")
Signed-off-by: Chris Wilson 
Cc: Matthew Auld 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ee51fd1a6207..906dc6fff383 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2597,6 +2597,8 @@ static int init_aliasing_ppgtt(struct i915_ggtt *ggtt)
GEM_BUG_ON(ggtt->vm.vma_ops.unbind_vma != ggtt_unbind_vma);
ggtt->vm.vma_ops.unbind_vma = aliasing_gtt_unbind_vma;
 
+   ppgtt->vm.total = ggtt->vm.total;
+
return 0;
 
 err_ppgtt:
-- 
2.23.0

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[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_shared: Prebind both context images

2019-09-01 Thread Chris Wilson
If we are using an aliasing-ppgtt, the context images are in the same
virtual address space as our target objects. We have to be careful that
cloning and using a new context does not evict our unreferenced target
object. To avoid that, we first bind both context images while creating
the hole in the address space to ensure that the hole is still available
later on.

Signed-off-by: Chris Wilson 
---
 tests/i915/gem_ctx_shared.c | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index b073bdfc9..c9e7b8a1a 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -191,6 +191,7 @@ static void exec_shared_gtt(int i915, unsigned int ring)
.buffer_count = 1,
.flags = ring,
};
+   uint32_t clone;
uint32_t scratch, *s;
uint32_t batch, cs[16];
uint64_t offset;
@@ -199,13 +200,18 @@ static void exec_shared_gtt(int i915, unsigned int ring)
gem_require_ring(i915, ring);
igt_require(gem_can_store_dword(i915, ring));
 
+   clone = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0);
+
/* Find a hole big enough for both objects later */
-   scratch = gem_create(i915, 16384);
+   scratch = gem_create(i915, 64<<10);
gem_write(i915, scratch, 0, , sizeof(bbe));
obj.handle = scratch;
gem_execbuf(i915, );
-   gem_close(i915, scratch);
obj.flags |= EXEC_OBJECT_PINNED; /* reuse this address */
+   execbuf.rsvd1 = clone; /* and bind the second context image */
+   gem_execbuf(i915, );
+   execbuf.rsvd1 = 0;
+   gem_close(i915, scratch);
 
scratch = gem_create(i915, 4096);
s = gem_mmap__wc(i915, scratch, 0, 4096, PROT_WRITE);
@@ -241,7 +247,7 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 
obj.handle = batch;
obj.offset += 8192; /* make sure we don't cause an eviction! */
-   execbuf.rsvd1 = gem_context_clone(i915, 0, I915_CONTEXT_CLONE_VM, 0);
+   execbuf.rsvd1 = clone;
if (gen > 3 && gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
gem_execbuf(i915, );
@@ -253,7 +259,6 @@ static void exec_shared_gtt(int i915, unsigned int ring)
execbuf.batch_start_offset = 64 * sizeof(s[0]);
gem_execbuf(i915, );
igt_assert_eq_u64(obj.offset, offset);
-   gem_context_destroy(i915, execbuf.rsvd1);
 
gem_sync(i915, batch); /* write hazard lies */
gem_close(i915, batch);
@@ -268,6 +273,8 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 
munmap(s, 4096);
gem_close(i915, scratch);
+
+   gem_context_destroy(i915, clone);
 }
 
 static int nop_sync(int i915, uint32_t ctx, unsigned int ring, int64_t timeout)
-- 
2.23.0

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Remove unused __engines_name()

2019-09-01 Thread Patchwork
== Series Details ==

Series: drm/i915/selftests: Remove unused __engines_name()
URL   : https://patchwork.freedesktop.org/series/66098/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6817 -> Patchwork_14251


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/

Known issues


  Here are the changes found in Patchwork_14251 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_busy@basic-flip-c:
- fi-skl-6770hq:  [PASS][1] -> [SKIP][2] ([fdo#109271] / [fdo#109278]) 
+2 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/fi-skl-6770hq/igt@kms_b...@basic-flip-c.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/fi-skl-6770hq/igt@kms_b...@basic-flip-c.html

  * igt@kms_flip@basic-flip-vs-dpms:
- fi-skl-6770hq:  [PASS][3] -> [SKIP][4] ([fdo#109271]) +23 similar 
issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/fi-skl-6770hq/igt@kms_f...@basic-flip-vs-dpms.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/fi-skl-6770hq/igt@kms_f...@basic-flip-vs-dpms.html

  
 Possible fixes 

  * igt@kms_frontbuffer_tracking@basic:
- fi-bsw-n3050:   [FAIL][5] ([fdo#103167]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/fi-bsw-n3050/igt@kms_frontbuffer_track...@basic.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/fi-bsw-n3050/igt@kms_frontbuffer_track...@basic.html

  * igt@prime_vgem@basic-fence-flip:
- fi-ilk-650: [DMESG-WARN][7] ([fdo#106387]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6817/fi-ilk-650/igt@prime_v...@basic-fence-flip.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/fi-ilk-650/igt@prime_v...@basic-fence-flip.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278


Participating hosts (51 -> 43)
--

  Additional (1): fi-apl-guc 
  Missing(9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-icl-u2 fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6817 -> Patchwork_14251

  CI-20190529: 20190529
  CI_DRM_6817: 8ae00727917ce047fc0db5672769f70c6eaa314e @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5162: e62ea305fdba2a9cd0dadfa527b54529cb0d1438 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14251: 1c1d94e897a2d6133b1dc73dd0fd11b9da9adc47 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

1c1d94e897a2 drm/i915/selftests: Remove unused __engines_name()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14251/
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[Intel-gfx] [PATCH] drm/i915/selftests: Remove unused __engines_name()

2019-09-01 Thread Chris Wilson
This function was never used and probably will never be used, so remove
it.

Signed-off-by: Chris Wilson 
---
 .../gpu/drm/i915/gem/selftests/i915_gem_context.c | 15 ---
 1 file changed, 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 00cd40cf54b4..9ac427ed1791 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -1528,21 +1528,6 @@ static int igt_vm_isolation(void *arg)
return err;
 }
 
-static __maybe_unused const char *
-__engine_name(struct drm_i915_private *i915, intel_engine_mask_t engines)
-{
-   struct intel_engine_cs *engine;
-   intel_engine_mask_t tmp;
-
-   if (engines == ALL_ENGINES)
-   return "all";
-
-   for_each_engine_masked(engine, i915, engines, tmp)
-   return engine->name;
-
-   return "none";
-}
-
 static bool skip_unused_engines(struct intel_context *ce, void *data)
 {
return !ce->state;
-- 
2.23.0

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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Refresh the errno to vmf_fault translations

2019-09-01 Thread Patchwork
== Series Details ==

Series: drm/i915: Refresh the errno to vmf_fault translations
URL   : https://patchwork.freedesktop.org/series/66085/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6814_full -> Patchwork_14250_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_14250_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_eio@unwedge-stress:
- shard-snb:  [PASS][1] -> [FAIL][2] ([fdo#109661])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-snb7/igt@gem_...@unwedge-stress.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-snb4/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276]) +16 similar 
issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-iclb2/igt@gem_exec_sched...@preempt-queue-bsd1.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-iclb7/igt@gem_exec_sched...@preempt-queue-bsd1.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#111325]) +4 similar 
issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-iclb8/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-iclb4/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html

  * igt@gem_workarounds@suspend-resume-context:
- shard-apl:  [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +7 
similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-apl5/igt@gem_workarou...@suspend-resume-context.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-apl7/igt@gem_workarou...@suspend-resume-context.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-snb:  [PASS][9] -> [SKIP][10] ([fdo#109271])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-snb2/igt@i915_pm_rc6_reside...@rc6-accuracy.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-snb7/igt@i915_pm_rc6_reside...@rc6-accuracy.html

  * igt@kms_cursor_legacy@nonblocking-modeset-vs-cursor-atomic:
- shard-skl:  [PASS][11] -> [DMESG-WARN][12] ([fdo#105541])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-skl3/igt@kms_cursor_leg...@nonblocking-modeset-vs-cursor-atomic.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-skl10/igt@kms_cursor_leg...@nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl:  [PASS][13] -> [FAIL][14] ([fdo#105363])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-skl5/igt@kms_f...@flip-vs-expired-vblank-interruptible.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-skl4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +3 similar 
issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-render.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-iclb6/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl:  [PASS][17] -> [FAIL][18] ([fdo#108145] / [fdo#110403])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-skl1/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-skl6/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-apl:  [PASS][19] -> [INCOMPLETE][20] ([fdo#103927]) +1 
similar issue
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-apl2/igt@kms_vbl...@pipe-b-ts-continuation-suspend.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-apl1/igt@kms_vbl...@pipe-b-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-skl:  [PASS][21] -> [INCOMPLETE][22] ([fdo#104108])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-skl1/igt@kms_vbl...@pipe-c-ts-continuation-suspend.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14250/shard-skl1/igt@kms_vbl...@pipe-c-ts-continuation-suspend.html

  * igt@perf@blocking:
- shard-skl:  [PASS][23] -> [FAIL][24] ([fdo#110728])
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6814/shard-skl1/igt@p...@blocking.html
   [24]: