[Intel-gfx] [PATCH i-g-t] i915/gem_softpin: Replace constant loop with timeout
Rather than do a fixed amount of work that takes *forever*, run for a
fixed amount of time.
Signed-off-by: Chris Wilson
---
tests/i915/gem_softpin.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index c29097ad3..032056c08 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -102,14 +102,14 @@ static void test_softpin(int fd)
struct drm_i915_gem_exec_object2 object;
uint64_t offset, end;
uint32_t last_handle;
- int loop;
+ unsigned long count = 0;
last_handle = gem_create(fd, size);
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&object);
execbuf.buffer_count = 1;
- for (loop = 0; loop < 1024; loop++) {
+ igt_until_timeout(30) {
memset(&object, 0, sizeof(object));
object.handle = gem_create(fd, 2*size);
gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));
@@ -134,7 +134,9 @@ static void test_softpin(int fd)
}
last_handle = object.handle;
+ count++;
}
+ igt_info("Completd %lu cycles\n", count);
}
static void test_overlap(int fd)
--
2.23.0
___
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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Appease lockdep
== Series Details ==
Series: drm/i915/selftests: Appease lockdep
URL : https://patchwork.freedesktop.org/series/67622/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7012_full -> Patchwork_14678_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14678_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14678_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14678_full:
### IGT changes ###
Possible regressions
* igt@gem_ctx_isolation@bcs0-nonpriv:
- shard-skl: NOTRUN -> [FAIL][1] +1 similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-skl10/igt@gem_ctx_isolat...@bcs0-nonpriv.html
* igt@gem_ctx_isolation@vcs0-s3:
- shard-kbl: [PASS][2] -> [FAIL][3] +1 similar issue
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-kbl3/igt@gem_ctx_isolat...@vcs0-s3.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-kbl6/igt@gem_ctx_isolat...@vcs0-s3.html
* igt@gem_ctx_isolation@vecs0-clean:
- shard-glk: [PASS][4] -> [FAIL][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-glk9/igt@gem_ctx_isolat...@vecs0-clean.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-glk5/igt@gem_ctx_isolat...@vecs0-clean.html
* igt@gem_ctx_isolation@vecs0-none:
- shard-apl: [PASS][6] -> [FAIL][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-apl8/igt@gem_ctx_isolat...@vecs0-none.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-apl6/igt@gem_ctx_isolat...@vecs0-none.html
* igt@gem_ctx_isolation@vecs0-reset:
- shard-skl: [PASS][8] -> [FAIL][9] +3 similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-skl8/igt@gem_ctx_isolat...@vecs0-reset.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-skl9/igt@gem_ctx_isolat...@vecs0-reset.html
* igt@i915_selftest@live_hangcheck:
- shard-hsw: [PASS][10] -> [DMESG-FAIL][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-hsw6/igt@i915_selftest@live_hangcheck.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-hsw1/igt@i915_selftest@live_hangcheck.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_ctx_isolation@vcs2-none:
- {shard-tglb}: NOTRUN -> [SKIP][12] +3 similar issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-tglb6/igt@gem_ctx_isolat...@vcs2-none.html
* {igt@gem_ctx_isolation@vecs0-nonpriv-switch}:
- shard-iclb: NOTRUN -> [FAIL][13]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-iclb5/igt@gem_ctx_isolat...@vecs0-nonpriv-switch.html
* igt@kms_flip@flip-vs-panning:
- {shard-tglb}: [PASS][14] -> [INCOMPLETE][15] +3 similar issues
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-tglb2/igt@kms_f...@flip-vs-panning.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-tglb6/igt@kms_f...@flip-vs-panning.html
Known issues
Here are the changes found in Patchwork_14678_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_shared@exec-shared-gtt-bsd2:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#109276]) +4 similar
issues
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-iclb1/igt@gem_ctx_sha...@exec-shared-gtt-bsd2.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-iclb7/igt@gem_ctx_sha...@exec-shared-gtt-bsd2.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][18] -> [SKIP][19] ([fdo#111325]) +6 similar
issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-iclb3/igt@gem_exec_sched...@preempt-other-chain-bsd.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-iclb1/igt@gem_exec_sched...@preempt-other-chain-bsd.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-snb: [PASS][20] -> [DMESG-WARN][21] ([fdo#111870])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/shard-snb5/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14678/shard-snb7/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-apl: [PASS][22] ->
[Intel-gfx] [PATCH] drm/i915/gt: Restore dropped 'interruptible' flag
Lost in the rebasing was Tvrtko's reminder that we need to keep an
uninterruptible wait around for the Ironlake VT-d w/a
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 8aed89fd2cdc..d69e78478eea 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -48,7 +48,7 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
fence = i915_active_fence_get(&tl->last_request);
if (fence) {
timeout = dma_fence_wait_timeout(fence,
-true,
+interruptible,
timeout);
dma_fence_put(fence);
}
--
2.23.0
___
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[Intel-gfx] [PATCH] drm/i915/gt: Treat a busy timeline as 'active' while waiting
If we cannot claim the timeline->mutex while preparing for a wait on it,
we have to skip the timeline. In doing so, treat it as active so that
under a intel_gt_wait_for_idle() loop, we repeat the wait after
scheduling away.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index d69e78478eea..ca606b79fd5e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -34,8 +34,10 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
spin_lock_irqsave(&timelines->lock, flags);
list_for_each_entry_safe(tl, tn, &timelines->active_list, link) {
- if (!mutex_trylock(&tl->mutex))
+ if (!mutex_trylock(&tl->mutex)) {
+ active_count++; /* report busy to caller, try again? */
continue;
+ }
intel_timeline_get(tl);
GEM_BUG_ON(!tl->active_count);
--
2.23.0
___
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: Use a modparam to restrict exposed engines
Hi Chris,
On Tue, Oct 01, 2019 at 02:54:02PM +0100, Chris Wilson wrote:
> Allow the user to restrict the available set of engines via a module
> parameter.
what is the driving reason for wanting this? Could you explain it
in the commit log?
It feels a bit confusing, though. You are actually making a
difference between engines we don't have and engines we don't
want, and I don't see why.
Wouldn't it make sense to either
- define a new architecture (which could make things more
confusing).
or
- have it specified in kernel configuration
> Signed-off-by: Chris Wilson
> Cc: Stuart Summers
> Cc: Andi Shyti
> Cc: Mika Kuoppala
> Cc: Tvrtko Ursulin
> Cc: Joonas Lahtinen
> Cc: Martin Peres
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 35 ---
> drivers/gpu/drm/i915/i915_gem.c | 5
> drivers/gpu/drm/i915/i915_params.c| 4 +++
> drivers/gpu/drm/i915/i915_params.h| 1 +
> 4 files changed, 35 insertions(+), 10 deletions(-)
Because this is a module option that is set by the user, I don't
see any documentation about it.
> +static bool engine_available(struct drm_i915_private *i915, int id)
> +{
> + /* uAPI -- modparam bits must be consistent between kernels */
> + static const unsigned int param_bit[] = {
> + [RCS0] = BIT(0),
> + [VCS0] = BIT(1),
> + [BCS0] = BIT(2),
> + [VECS0] = BIT(3),
> + [VCS1] = BIT(4),
> + [VCS2] = BIT(5),
> + [VCS3] = BIT(6),
> + [VECS1] = BIT(7),
> + };
Yet another way to refer to engines... this time inside a static
function, without any visibility outside.
Andi
> +
> + if (!HAS_ENGINE(i915, id))
> + return false;
(engines we don't have...
> + if (!(i915_modparams.engines & param_bit[id]))
> + return false;
... engines we don't want)
___
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: Use a modparam to restrict exposed engines
Quoting Andi Shyti (2019-10-05 11:10:45)
> Hi Chris,
>
> On Tue, Oct 01, 2019 at 02:54:02PM +0100, Chris Wilson wrote:
> > Allow the user to restrict the available set of engines via a module
> > parameter.
>
> what is the driving reason for wanting this? Could you explain it
> in the commit log?
It's to allow the user to restrict the available set of engines, for
whatever reason they may have, presumably because they want to work
around some HW stability (or if that is the case to enable some HW
despite instability, since we should err on the side of caution).
> It feels a bit confusing, though. You are actually making a
> difference between engines we don't have and engines we don't
> want, and I don't see why.
>
> Wouldn't it make sense to either
>
> - define a new architecture (which could make things more
>confusing).
No, it's an optional overlay of an existing under the whim of the user.
> or
>
> - have it specified in kernel configuration
Is how we configure the defaults in reduced configurations.
> > Signed-off-by: Chris Wilson
> > Cc: Stuart Summers
> > Cc: Andi Shyti
> > Cc: Mika Kuoppala
> > Cc: Tvrtko Ursulin
> > Cc: Joonas Lahtinen
> > Cc: Martin Peres
> > ---
> > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 35 ---
> > drivers/gpu/drm/i915/i915_gem.c | 5
> > drivers/gpu/drm/i915/i915_params.c| 4 +++
> > drivers/gpu/drm/i915/i915_params.h| 1 +
> > 4 files changed, 35 insertions(+), 10 deletions(-)
>
> Because this is a module option that is set by the user, I don't
> see any documentation about it.
It's in i915_params.c
> > +static bool engine_available(struct drm_i915_private *i915, int id)
> > +{
> > + /* uAPI -- modparam bits must be consistent between kernels */
> > + static const unsigned int param_bit[] = {
> > + [RCS0] = BIT(0),
> > + [VCS0] = BIT(1),
> > + [BCS0] = BIT(2),
> > + [VECS0] = BIT(3),
> > + [VCS1] = BIT(4),
> > + [VCS2] = BIT(5),
> > + [VCS3] = BIT(6),
> > + [VECS1] = BIT(7),
> > + };
>
> Yet another way to refer to engines... this time inside a static
> function, without any visibility outside.
Sure. It's a static mapping table that has to stable for generations to
come because it is described in i915_params as part of the i915.engines
contract.
-Chris
___
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[Intel-gfx] [PATCH i-g-t] i915/gem_eio: Retighten timeouts for forced reset
The forced-reset itself should be immediate; it's just the wait after the health check where we appear to have issues! Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/i915/gem_eio.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c index 007b9fb70..7c8ff10df 100644 --- a/tests/i915/gem_eio.c +++ b/tests/i915/gem_eio.c @@ -76,12 +76,15 @@ static void trigger_reset(int fd) igt_kmsg(KMSG_DEBUG "Forcing GPU reset\n"); igt_force_gpu_reset(fd); + /* The forced reset should be immediate */ + igt_assert_lte(igt_seconds_elapsed(&ts), 2); + /* And just check the gpu is indeed running again */ igt_kmsg(KMSG_DEBUG "Checking that the GPU recovered\n"); gem_test_engine(fd, ALL_ENGINES); igt_drop_caches_set(fd, DROP_ACTIVE); - /* We expect forced reset and health check to be quick. */ + /* We expect health check to be quick. */ igt_assert_lte(igt_seconds_elapsed(&ts), 10); } -- 2.23.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Restore dropped 'interruptible' flag
== Series Details ==
Series: drm/i915/gt: Restore dropped 'interruptible' flag
URL : https://patchwork.freedesktop.org/series/67626/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7012 -> Patchwork_14679
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14679 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14679, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_14679:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_active:
- fi-icl-u2: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-icl-u2/igt@i915_selftest@live_active.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/fi-icl-u2/igt@i915_selftest@live_active.html
* igt@i915_selftest@live_execlists:
- fi-skl-6260u: [PASS][3] -> [DMESG-WARN][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-skl-6260u/igt@i915_selftest@live_execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/fi-skl-6260u/igt@i915_selftest@live_execlists.html
Known issues
Here are the changes found in Patchwork_14679 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_basic@create-close:
- fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-icl-u3/igt@gem_ba...@create-close.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/fi-icl-u3/igt@gem_ba...@create-close.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: [PASS][7] -> [INCOMPLETE][8] ([fdo#107718])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/fi-blb-e6850/igt@gem_exec_susp...@basic-s4-devices.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][9] -> [FAIL][10] ([fdo#111045] / [fdo#111096])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_mmap_gtt@basic-write-no-prefault:
- fi-icl-u3: [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] +1
similar issue
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-icl-u3/igt@gem_mmap_...@basic-write-no-prefault.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/fi-icl-u3/igt@gem_mmap_...@basic-write-no-prefault.html
* igt@i915_selftest@live_hangcheck:
- {fi-icl-guc}: [DMESG-FAIL][13] ([fdo#111678]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-icl-guc/igt@i915_selftest@live_hangcheck.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/fi-icl-guc/igt@i915_selftest@live_hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111678]: https://bugs.freedesktop.org/show_bug.cgi?id=111678
Participating hosts (52 -> 45)
--
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y
fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7012 -> Patchwork_14679
CI-20190529: 20190529
CI_DRM_7012: 42dcf5adc9c45f6f2f28e23b815ab723f96edca0 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5212: d17a484b3c22706b2b004ef1577f367d79235e43 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14679: 1fee21e20ed7c8f8cb6dc61e8830c169825f1f45 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1fee21e20ed7 drm/i915/gt: Restore dropped 'interruptible' flag
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14679/index.html
___
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[Intel-gfx] [PATCH i-g-t] i915/gem_eio: Show engine status before resets
Dump the i915_engine_info into debug prior to triggering a reset/wedge.
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 7c8ff10df..71cb9 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -82,6 +82,8 @@ static void trigger_reset(int fd)
/* And just check the gpu is indeed running again */
igt_kmsg(KMSG_DEBUG "Checking that the GPU recovered\n");
gem_test_engine(fd, ALL_ENGINES);
+
+ igt_debugfs_dump(fd, "i915_engine_info");
igt_drop_caches_set(fd, DROP_ACTIVE);
/* We expect health check to be quick. */
@@ -392,6 +394,7 @@ static void test_wait(int fd, unsigned int flags, unsigned
int wait)
hang = spin_sync(fd, 0, I915_EXEC_DEFAULT);
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, hang->handle, wait, NULL);
igt_spin_free(fd, hang);
@@ -467,14 +470,15 @@ static void test_inflight(int fd, unsigned int wait)
igt_assert(fence[n] != -1);
}
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, obj[1].handle, wait, NULL);
for (unsigned int n = 0; n < max; n++) {
igt_assert_eq(sync_fence_status(fence[n]), -EIO);
close(fence[n]);
}
-
igt_spin_free(fd, hang);
+
igt_assert(i915_reset_control(true));
trigger_reset(fd);
@@ -523,14 +527,15 @@ static void test_inflight_suspend(int fd)
igt_set_autoresume_delay(30);
igt_system_suspend_autoresume(SUSPEND_STATE_MEM, SUSPEND_TEST_NONE);
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, obj[1].handle, 10, NULL);
for (unsigned int n = 0; n < max; n++) {
igt_assert_eq(sync_fence_status(fence[n]), -EIO);
close(fence[n]);
}
-
igt_spin_free(fd, hang);
+
igt_assert(i915_reset_control(true));
trigger_reset(fd);
close(fd);
@@ -605,15 +610,16 @@ static void test_inflight_contexts(int fd, unsigned int
wait)
count++;
}
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, obj[1].handle, wait, NULL);
for (unsigned int n = 0; n < count; n++) {
igt_assert_eq(sync_fence_status(fence[n]), -EIO);
close(fence[n]);
}
-
igt_spin_free(fd, hang);
gem_close(fd, obj[1].handle);
+
igt_assert(i915_reset_control(true));
trigger_reset(fd);
@@ -714,14 +720,15 @@ static void test_inflight_internal(int fd, unsigned int
wait)
nfence++;
}
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, obj[1].handle, wait, NULL);
while (nfence--) {
igt_assert_eq(sync_fence_status(fences[nfence]), -EIO);
close(fences[nfence]);
}
-
igt_spin_free(fd, hang);
+
igt_assert(i915_reset_control(true));
trigger_reset(fd);
close(fd);
--
2.23.0
___
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[Intel-gfx] [PATCH i-g-t 1/3] i915/gem_eio: Retighten timeouts for forced reset
The forced-reset itself should be immediate; it's just the wait after the health check where we appear to have issues! Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/i915/gem_eio.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c index 007b9fb70..7c8ff10df 100644 --- a/tests/i915/gem_eio.c +++ b/tests/i915/gem_eio.c @@ -76,12 +76,15 @@ static void trigger_reset(int fd) igt_kmsg(KMSG_DEBUG "Forcing GPU reset\n"); igt_force_gpu_reset(fd); + /* The forced reset should be immediate */ + igt_assert_lte(igt_seconds_elapsed(&ts), 2); + /* And just check the gpu is indeed running again */ igt_kmsg(KMSG_DEBUG "Checking that the GPU recovered\n"); gem_test_engine(fd, ALL_ENGINES); igt_drop_caches_set(fd, DROP_ACTIVE); - /* We expect forced reset and health check to be quick. */ + /* We expect health check to be quick. */ igt_assert_lte(igt_seconds_elapsed(&ts), 10); } -- 2.23.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 3/3] i915/gem_softpin: Replace constant loop with timeout
Rather than do a fixed amount of work that takes *forever*, run for a
fixed amount of time.
Signed-off-by: Chris Wilson
---
tests/i915/gem_softpin.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index c29097ad3..032056c08 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -102,14 +102,14 @@ static void test_softpin(int fd)
struct drm_i915_gem_exec_object2 object;
uint64_t offset, end;
uint32_t last_handle;
- int loop;
+ unsigned long count = 0;
last_handle = gem_create(fd, size);
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&object);
execbuf.buffer_count = 1;
- for (loop = 0; loop < 1024; loop++) {
+ igt_until_timeout(30) {
memset(&object, 0, sizeof(object));
object.handle = gem_create(fd, 2*size);
gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));
@@ -134,7 +134,9 @@ static void test_softpin(int fd)
}
last_handle = object.handle;
+ count++;
}
+ igt_info("Completd %lu cycles\n", count);
}
static void test_overlap(int fd)
--
2.23.0
___
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[Intel-gfx] [PATCH i-g-t 2/3] i915/gem_eio: Show engine status before resets
Dump the i915_engine_info into debug prior to triggering a reset/wedge.
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 7c8ff10df..71cb9 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -82,6 +82,8 @@ static void trigger_reset(int fd)
/* And just check the gpu is indeed running again */
igt_kmsg(KMSG_DEBUG "Checking that the GPU recovered\n");
gem_test_engine(fd, ALL_ENGINES);
+
+ igt_debugfs_dump(fd, "i915_engine_info");
igt_drop_caches_set(fd, DROP_ACTIVE);
/* We expect health check to be quick. */
@@ -392,6 +394,7 @@ static void test_wait(int fd, unsigned int flags, unsigned
int wait)
hang = spin_sync(fd, 0, I915_EXEC_DEFAULT);
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, hang->handle, wait, NULL);
igt_spin_free(fd, hang);
@@ -467,14 +470,15 @@ static void test_inflight(int fd, unsigned int wait)
igt_assert(fence[n] != -1);
}
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, obj[1].handle, wait, NULL);
for (unsigned int n = 0; n < max; n++) {
igt_assert_eq(sync_fence_status(fence[n]), -EIO);
close(fence[n]);
}
-
igt_spin_free(fd, hang);
+
igt_assert(i915_reset_control(true));
trigger_reset(fd);
@@ -523,14 +527,15 @@ static void test_inflight_suspend(int fd)
igt_set_autoresume_delay(30);
igt_system_suspend_autoresume(SUSPEND_STATE_MEM, SUSPEND_TEST_NONE);
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, obj[1].handle, 10, NULL);
for (unsigned int n = 0; n < max; n++) {
igt_assert_eq(sync_fence_status(fence[n]), -EIO);
close(fence[n]);
}
-
igt_spin_free(fd, hang);
+
igt_assert(i915_reset_control(true));
trigger_reset(fd);
close(fd);
@@ -605,15 +610,16 @@ static void test_inflight_contexts(int fd, unsigned int
wait)
count++;
}
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, obj[1].handle, wait, NULL);
for (unsigned int n = 0; n < count; n++) {
igt_assert_eq(sync_fence_status(fence[n]), -EIO);
close(fence[n]);
}
-
igt_spin_free(fd, hang);
gem_close(fd, obj[1].handle);
+
igt_assert(i915_reset_control(true));
trigger_reset(fd);
@@ -714,14 +720,15 @@ static void test_inflight_internal(int fd, unsigned int
wait)
nfence++;
}
+ igt_debugfs_dump(fd, "i915_engine_info");
check_wait(fd, obj[1].handle, wait, NULL);
while (nfence--) {
igt_assert_eq(sync_fence_status(fences[nfence]), -EIO);
close(fences[nfence]);
}
-
igt_spin_free(fd, hang);
+
igt_assert(i915_reset_control(true));
trigger_reset(fd);
close(fd);
--
2.23.0
___
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Treat a busy timeline as 'active' while waiting
== Series Details ==
Series: drm/i915/gt: Treat a busy timeline as 'active' while waiting
URL : https://patchwork.freedesktop.org/series/67627/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7013 -> Patchwork_14680
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14680 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14680, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14680/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_14680:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_execlists:
- fi-icl-u2: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-icl-u2/igt@i915_selftest@live_execlists.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14680/fi-icl-u2/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_hangcheck:
- fi-hsw-4770r: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14680/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
Known issues
Here are the changes found in Patchwork_14680 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713] /
[fdo#109100])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14680/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
Possible fixes
* igt@gem_ctx_switch@rcs0:
- {fi-icl-guc}: [INCOMPLETE][7] ([fdo#107713]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-icl-guc/igt@gem_ctx_swi...@rcs0.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14680/fi-icl-guc/igt@gem_ctx_swi...@rcs0.html
Warnings
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][9] ([fdo#111045] / [fdo#111096]) -> [FAIL][10]
([fdo#111407])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14680/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
Participating hosts (51 -> 43)
--
Additional (1): fi-icl-u4
Missing(9): fi-ilk-m540 fi-bxt-dsi fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ivb-3770 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7013 -> Patchwork_14680
CI-20190529: 20190529
CI_DRM_7013: d15ba88aba4d101631bad25b6e75de1a3a0c9440 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5213: 2090a01dd78a15e0e68ffd18c42461a23da17156 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14680: 8e41d77e40a662c94b5339aa083335203b95288d @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8e41d77e40a6 drm/i915/gt: Treat a busy timeline as 'active' while waiting
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14680/index.html
___
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Re: [Intel-gfx] [PATCH i-g-t 2/3] i915/gem_eio: Show engine status before resets
Hi Chris, On Sat, Oct 05, 2019 at 11:55:55AM +0100, Chris Wilson wrote: > Dump the i915_engine_info into debug prior to triggering a reset/wedge. > > Signed-off-by: Chris Wilson looks OK, Reviewed-by: Andi Shyti Andi P.S. > } > - > igt_spin_free(fd, hang); > + grr ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t 3/3] i915/gem_softpin: Replace constant loop with timeout
Hi Chris, On Sat, Oct 05, 2019 at 11:55:56AM +0100, Chris Wilson wrote: > Rather than do a fixed amount of work that takes *forever*, run for a > fixed amount of time. > > Signed-off-by: Chris Wilson looks nice! :) Reviewed-by: Andi Shyti Andi ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [drm-tip:drm-tip 548/565] drivers/gpu/drm/i915/gem/i915_gem_context.c:813:29: sparse: sparse: incorrect type in argument 1 (different address spaces)
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: f99065c68952afc90504325a19125d95e6b84abc
commit: a4e7ccdac38ec8335d9e4e2656c1a041c77feae1 [548/565] drm/i915: Move
context management under GEM
reproduce:
# apt-get install sparse
# sparse version: v0.6.1-rc1-42-g38eda53-dirty
git checkout a4e7ccdac38ec8335d9e4e2656c1a041c77feae1
make ARCH=x86_64 allmodconfig
make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/gem/i915_gem_context.c:813:29: sparse: sparse:
>> incorrect type in argument 1 (different address spaces) @@expected
>> struct i915_address_space *vm @@got struct i915_addresstruct
>> i915_address_space *vm @@
>> drivers/gpu/drm/i915/gem/i915_gem_context.c:813:29: sparse:expected
>> struct i915_address_space *vm
>> drivers/gpu/drm/i915/gem/i915_gem_context.c:813:29: sparse:got struct
>> i915_address_space [noderef] *vm
drivers/gpu/drm/i915/gem/i915_gem_context.c:1748:25: sparse: sparse:
incorrect type in argument 1 (different address spaces) @@expected struct
i915_gem_engines *e @@got struct i915_gem_enstruct i915_gem_engines *e @@
drivers/gpu/drm/i915/gem/i915_gem_context.c:1748:25: sparse:expected
struct i915_gem_engines *e
drivers/gpu/drm/i915/gem/i915_gem_context.c:1748:25: sparse:got struct
i915_gem_engines [noderef] *engines
drivers/gpu/drm/i915/gem/i915_gem_context.c:1783:15: sparse: sparse:
incorrect type in assignment (different address spaces) @@expected struct
i915_gem_engines *clone @@got struct i915_gem_enstruct i915_gem_engines
*clone @@
drivers/gpu/drm/i915/gem/i915_gem_context.c:1783:15: sparse:expected
struct i915_gem_engines *clone
drivers/gpu/drm/i915/gem/i915_gem_context.c:1783:15: sparse:got struct
i915_gem_engines [noderef] *engines
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:773:51: sparse:
>> sparse: incorrect type in argument 2 (different address spaces) @@
>> expected struct i915_address_space *[assigned] vm @@got struct struct
>> i915_address_space *[assigned] vm @@
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:773:51: sparse:
>> expected struct i915_address_space *[assigned] vm
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:773:51: sparse:got
>> struct i915_address_space [noderef] *vm
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:780:64: sparse:
>> sparse: incorrect type in argument 1 (different address spaces) @@
>> expected struct i915_address_space *vm @@got struct i915_addresstruct
>> i915_address_space *vm @@
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:780:64: sparse:
>> expected struct i915_address_space *vm
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:780:64: sparse:got
struct i915_address_space [noderef] *vm
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:1694:25: sparse:
>> sparse: dereference of noderef expression
vim +813 drivers/gpu/drm/i915/gem/i915_gem_context.c
85fddf0b002719 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-09 801
cde5f7edd511b1 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-30 802 static int get_ppgtt(struct drm_i915_file_private *file_priv,
cde5f7edd511b1 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-30 803 struct i915_gem_context *ctx,
e0695db7298ec2 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-22 804 struct drm_i915_gem_context_param *args)
e0695db7298ec2 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-22 805 {
e568ac3874be7d drivers/gpu/drm/i915/gem/i915_gem_context.c Chris Wilson
2019-06-11 806 struct i915_address_space *vm;
e0695db7298ec2 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-22 807 int ret;
e0695db7298ec2 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-22 808
a4e7ccdac38ec8 drivers/gpu/drm/i915/gem/i915_gem_context.c Chris Wilson
2019-10-04 809 if (!rcu_access_pointer(ctx->vm))
e0695db7298ec2 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-22 810 return -ENODEV;
e0695db7298ec2 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-22 811
a4e7ccdac38ec8 drivers/gpu/drm/i915/gem/i915_gem_context.c Chris Wilson
2019-10-04 812 rcu_read_lock();
e568ac3874be7d drivers/gpu/drm/i915/gem/i915_gem_context.c Chris Wilson
2019-06-11 @813 vm = i915_vm_get(ctx->vm);
a4e7ccdac38ec8 drivers/gpu/drm/i915/gem/i915_gem_context.c Chris Wilson
2019-10-04 814 rcu_read_unlock();
e0695db7298ec2 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-22 815
e0695db7298ec2 drivers/gpu/drm/i915/i915_gem_context.c Chris Wilson
2019-03-22 816
