Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree
Hi all, On Tue, 8 Oct 2019 10:30:45 +1100 Stephen Rothwell wrote: > > Hi all, > > After merging the drm-misc tree, today's linux-next build (x86_64 > allmodconfig) failed like this: > Sorry, forgot to include the error messages. But they shuld be clear from the fix ... -- Cheers, Stephen Rothwell pgpsAKGQxAfBY.pgp Description: OpenPGP digital signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC PATCH] iommu/vt-d: Fix IOMMU field not populated on device hot re-plug
Hi, On 10/1/19 11:01 PM, Janusz Krzysztofik wrote: Hi Baolu, On Tuesday, September 3, 2019 9:41:23 AM CEST Janusz Krzysztofik wrote: Hi Baolu, On Tuesday, September 3, 2019 3:29:40 AM CEST Lu Baolu wrote: Hi Janusz, On 9/2/19 4:37 PM, Janusz Krzysztofik wrote: I am not saying that keeping data is not acceptable. I just want to check whether there are any other solutions. Then reverting 458b7c8e0dde and applying this patch still resolves the issue for me. No errors appear when mappings are unmapped on device close after the device has been removed, and domain info preserved on device removal is successfully reused on device re-plug. This patch doesn't look good to me although I agree that keeping data is acceptable. Any progress with that? Which mailing list should I watch for updates?\ We had a holiday last week. I will go ahead with reproducing it locally. Feel free to let me know if you have any new proposal. Best regards, Baolu Thanks, Janusz It updates dev->archdata.iommu, but leaves the hardware context/pasid table unchanged. This might cause problems somewhere. Is there anything else I can do to help? Can you please tell me how to reproduce the problem? The most simple way to reproduce the issue, assuming there are no non-Intel graphics adapters installed, is to run the following shell commands: #!/bin/sh # load i915 module modprobe i915 # open an i915 device and keep it open in background cat /dev/dri/card0 >/dev/null & sleep 2 # simulate device unplug echo 1 >/sys/class/drm/card0/device/remove # make the background process close the device on exit kill $! Thanks, Janusz Keeping the per device domain info while device is unplugged is a bit dangerous because info->dev might be a wild pointer. We need to work out a clean fix. Thanks, Janusz Best regards, Baolu ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for linux-next: build failure after merge of the drm-misc tree
== Series Details == Series: linux-next: build failure after merge of the drm-misc tree URL : https://patchwork.freedesktop.org/series/67718/ State : failure == Summary == Applying: linux-next: build failure after merge of the drm-misc tree error: sha1 information is lacking or useless (drivers/media/platform/cec-gpio/cec-gpio.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 linux-next: build failure after merge of the drm-misc tree When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] linux-next: build failure after merge of the drm-misc tree
Hi all,
After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) failed like this:
Caused by commit
10d8f308ba3e ("cec: add cec_adapter to cec_notifier_cec_adap_unregister()")
interacting with commit
7e86efa2ff03 ("media: cec-gpio: add notifier support")
form the v4l-dvb tree.
I have applied the following merge fix patch.
From: Stephen Rothwell
Date: Tue, 8 Oct 2019 10:26:05 +1100
Subject: [PATCH] cec: fix up for "cec: add cec_adapter to
cec_notifier_cec_adap_unregister()"
Signed-off-by: Stephen Rothwell
---
drivers/media/platform/cec-gpio/cec-gpio.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/cec-gpio/cec-gpio.c
b/drivers/media/platform/cec-gpio/cec-gpio.c
index 7be91e712c4a..42d2c2cd9a78 100644
--- a/drivers/media/platform/cec-gpio/cec-gpio.c
+++ b/drivers/media/platform/cec-gpio/cec-gpio.c
@@ -259,7 +259,7 @@ static int cec_gpio_probe(struct platform_device *pdev)
return 0;
unreg_notifier:
- cec_notifier_cec_adap_unregister(cec->notifier);
+ cec_notifier_cec_adap_unregister(cec->notifier, cec->adap);
del_adap:
cec_delete_adapter(cec->adap);
return ret;
@@ -269,7 +269,7 @@ static int cec_gpio_remove(struct platform_device *pdev)
{
struct cec_gpio *cec = platform_get_drvdata(pdev);
- cec_notifier_cec_adap_unregister(cec->notifier);
+ cec_notifier_cec_adap_unregister(cec->notifier, cec->adap);
cec_unregister_adapter(cec->adap);
return 0;
}
--
2.23.0.rc1
--
Cheers,
Stephen Rothwell
pgpK5fn7J9sbB.pgp
Description: OpenPGP digital signature
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/tgl: Read SAGV block time from PCODE
On Mon, Oct 07, 2019 at 01:15:24PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 04, 2019 at 02:51:34PM -0700, James Ausmus wrote:
> > On Fri, Oct 04, 2019 at 01:55:46PM -0700, Lucas De Marchi wrote:
> > > On Fri, Sep 27, 2019 at 03:24:27PM -0700, James Ausmus wrote:
> > > >Starting from TGL, we now need to read the SAGV block time via a PCODE
> > > >mailbox, rather than having a static value.
> > > >
> > > >BSpec: 49326
> > > >
> > > >v2: Fix up pcode val data type (Ville), tighten variable scope (Ville)
> > > >
> > > >Cc: Ville Syrjälä
> > > >Cc: Stanislav Lisovskiy
> > > >Cc: Lucas De Marchi
> > > >Signed-off-by: James Ausmus
> > > >Reviewed-by: Ville Syrjälä
> > > >---
> > > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > > drivers/gpu/drm/i915/intel_pm.c | 15 ++-
> > > > 2 files changed, 15 insertions(+), 1 deletion(-)
> > > >
> > > >diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > >b/drivers/gpu/drm/i915/i915_reg.h
> > > >index 058aa5ca8b73..6a45df9dad9c 100644
> > > >--- a/drivers/gpu/drm/i915/i915_reg.h
> > > >+++ b/drivers/gpu/drm/i915/i915_reg.h
> > > >@@ -8869,6 +8869,7 @@ enum {
> > > > #define GEN9_SAGV_DISABLE 0x0
> > > > #define GEN9_SAGV_IS_DISABLED 0x1
> > > > #define GEN9_SAGV_ENABLE0x3
> > > >+#define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US 0x23
> > > > #define GEN6_PCODE_DATA _MMIO(0x138128)
> > > > #define GEN6_PCODE_FREQ_IA_RATIO_SHIFT8
> > > > #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16
> > > >diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > > >b/drivers/gpu/drm/i915/intel_pm.c
> > > >index b413a7f3bc5d..13721ba44013 100644
> > > >--- a/drivers/gpu/drm/i915/intel_pm.c
> > > >+++ b/drivers/gpu/drm/i915/intel_pm.c
> > > >@@ -3645,7 +3645,20 @@ intel_has_sagv(struct drm_i915_private *dev_priv)
> > > > static void
> > > > skl_setup_sagv_block_time(struct drm_i915_private *dev_priv)
> > > > {
> > > >-if (IS_GEN(dev_priv, 11)) {
> > > >+if (INTEL_GEN(dev_priv) >= 12) {
> > >
> > > sagv will still never be enabled for TGL. Are you going to revert
> > > 8ffa4392a32e ("drm/i915/tgl: disable SAGV temporarily")
> > > in a separete patch?
> >
> > Yes, that's the idea - we land these two patches, then once HSD
> > 1409542895 gets resolved, we revert 8ffa4392a32e and everything Just
> > Works. ;)
>
> The whole sagv stuff is wrong for icl+. Stan is attempting to remedy
> that.
Well, we'll at least need to do this read of the block time - do you
think these two patches can land in the meantime, to help prep the TGL
path for actually working when Stan's work lands?
Thanks!
-James
>
> >
> > -James
> >
> > >
> > > Lucas De Marchi
> > >
> > > >+u32 val = 0;
> > > >+int ret;
> > > >+
> > > >+ret = sandybridge_pcode_read(dev_priv,
> > > >+
> > > >GEN12_PCODE_READ_SAGV_BLOCK_TIME_US,
> > > >+ , NULL);
> > > >+if (!ret) {
> > > >+dev_priv->sagv_block_time_us = val;
> > > >+return;
> > > >+}
> > > >+
> > > >+DRM_DEBUG_DRIVER("Couldn't read SAGV block time!\n");
> > > >+} else if (IS_GEN(dev_priv, 11)) {
> > > > dev_priv->sagv_block_time_us = 10;
> > > > return;
> > > > } else if (IS_GEN(dev_priv, 10)) {
> > > >--
> > > >2.22.1
> > > >
>
> --
> Ville Syrjälä
> Intel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
URL : https://patchwork.freedesktop.org/series/67713/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7027 -> Patchwork_14696
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14696 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14696, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14696/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_14696:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_coherency:
- fi-cfl-8109u: [PASS][1] -> [TIMEOUT][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7027/fi-cfl-8109u/igt@i915_selftest@live_coherency.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14696/fi-cfl-8109u/igt@i915_selftest@live_coherency.html
* igt@i915_selftest@live_hangcheck:
- fi-hsw-4770r: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7027/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14696/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
Known issues
Here are the changes found in Patchwork_14696 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][5] -> [INCOMPLETE][6] ([fdo#107718])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7027/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14696/fi-blb-e6850/igt@gem_exec_susp...@basic-s3.html
Possible fixes
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [INCOMPLETE][7] ([fdo#107713] / [fdo#109100]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7027/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14696/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
* igt@gem_ctx_switch@legacy-render:
- fi-icl-u2: [INCOMPLETE][9] ([fdo#107713] / [fdo#111381]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7027/fi-icl-u2/igt@gem_ctx_swi...@legacy-render.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14696/fi-icl-u2/igt@gem_ctx_swi...@legacy-render.html
* igt@kms_chamelium@hdmi-edid-read:
- {fi-icl-u4}:[FAIL][11] ([fdo#111045]) -> [PASS][12] +1 similar
issue
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7027/fi-icl-u4/igt@kms_chamel...@hdmi-edid-read.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14696/fi-icl-u4/igt@kms_chamel...@hdmi-edid-read.html
Warnings
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][13] ([fdo#111045] / [fdo#111096]) ->
[FAIL][14] ([fdo#111407])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7027/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14696/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111049]: https://bugs.freedesktop.org/show_bug.cgi?id=111049
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
Participating hosts (51 -> 43)
--
Missing(8): fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy fi-bsw-n3050
fi-byt-squawks fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7027 -> Patchwork_14696
CI-20190529: 20190529
CI_DRM_7027: 90e76f123ecd09ddd6742f51d2aa0d80566334f1 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5216: 0147a3777dc73ac2138905d0aef33c0fdb3dde5e @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14696: c2842f6c93a8509d31c781cc0f8b10a4e12d0d5f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
== Series Details == Series: series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv URL : https://patchwork.freedesktop.org/series/67713/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4e4728d59e05 drm/i915/perf: Wean ourselves off dev_priv -:416: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() #416: FILE: drivers/gpu/drm/i915/i915_perf.c:1340: + BUG_ON(stream != perf->exclusive_stream); total: 0 errors, 1 warnings, 0 checks, 1846 lines checked c2842f6c93a8 drm/i915/perf: Set the exclusive stream under perf->lock ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v8 1/4] drm/panel: Add helper for reading DT rotation
On Mon, Oct 7, 2019 at 9:38 AM Sean Paul wrote:
>
> On Wed, Sep 25, 2019 at 03:58:30PM -0700, Derek Basehore wrote:
> > This adds a helper function for reading the rotation (panel
> > orientation) from the device tree.
> >
> > Signed-off-by: Derek Basehore
> > Reviewed-by: Sam Ravnborg
>
> The patch LGTM, but I don't see it used anywhere later in the patch? Is there
> a
> panel driver incoming?
Yeah, the boe-tv101wum-nl6 panel will use it. It's not in the patch
currently sent upstream since I don't want to step on their toes, but
I plan on sending a patch to add it as soon as that is merged.
I could hold back on this patch until that panel driver is merged too.
Another alternative is to throw this into the generic drm_panel code,
but there's no obvious place to put it since DRM seems to leave
reading the DTS up to the panel drivers themselves.
>
> Sean
>
> > ---
> > drivers/gpu/drm/drm_panel.c | 43 +
> > include/drm/drm_panel.h | 9
> > 2 files changed, 52 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
> > index 6b0bf42039cf..0909b53b74e6 100644
> > --- a/drivers/gpu/drm/drm_panel.c
> > +++ b/drivers/gpu/drm/drm_panel.c
> > @@ -264,6 +264,49 @@ struct drm_panel *of_drm_find_panel(const struct
> > device_node *np)
> > return ERR_PTR(-EPROBE_DEFER);
> > }
> > EXPORT_SYMBOL(of_drm_find_panel);
> > +
> > +/**
> > + * of_drm_get_panel_orientation - look up the orientation of the panel
> > through
> > + * the "rotation" binding from a device tree node
> > + * @np: device tree node of the panel
> > + * @orientation: orientation enum to be filled in
> > + *
> > + * Looks up the rotation of a panel in the device tree. The orientation of
> > the
> > + * panel is expressed as a property name "rotation" in the device tree. The
> > + * rotation in the device tree is counter clockwise.
> > + *
> > + * Return: 0 when a valid rotation value (0, 90, 180, or 270) is read or
> > the
> > + * rotation property doesn't exist. -EERROR otherwise.
> > + */
> > +int of_drm_get_panel_orientation(const struct device_node *np,
> > + enum drm_panel_orientation *orientation)
> > +{
> > + int rotation, ret;
> > +
> > + ret = of_property_read_u32(np, "rotation", );
> > + if (ret == -EINVAL) {
> > + /* Don't return an error if there's no rotation property. */
> > + *orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
> > + return 0;
> > + }
> > +
> > + if (ret < 0)
> > + return ret;
> > +
> > + if (rotation == 0)
> > + *orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
> > + else if (rotation == 90)
> > + *orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
> > + else if (rotation == 180)
> > + *orientation = DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
> > + else if (rotation == 270)
> > + *orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
> > + else
> > + return -EINVAL;
> > +
> > + return 0;
> > +}
> > +EXPORT_SYMBOL(of_drm_get_panel_orientation);
> > #endif
> >
> > MODULE_AUTHOR("Thierry Reding ");
> > diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
> > index 624bd15ecfab..d16158deacdc 100644
> > --- a/include/drm/drm_panel.h
> > +++ b/include/drm/drm_panel.h
> > @@ -34,6 +34,8 @@ struct drm_device;
> > struct drm_panel;
> > struct display_timing;
> >
> > +enum drm_panel_orientation;
> > +
> > /**
> > * struct drm_panel_funcs - perform operations on a given panel
> > *
> > @@ -165,11 +167,18 @@ int drm_panel_get_modes(struct drm_panel *panel);
> >
> > #if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL)
> > struct drm_panel *of_drm_find_panel(const struct device_node *np);
> > +int of_drm_get_panel_orientation(const struct device_node *np,
> > + enum drm_panel_orientation *orientation);
> > #else
> > static inline struct drm_panel *of_drm_find_panel(const struct device_node
> > *np)
> > {
> > return ERR_PTR(-ENODEV);
> > }
> > +static inline int of_drm_get_panel_orientation(const struct device_node
> > *np,
> > + enum drm_panel_orientation *orientation)
> > +{
> > + return -ENODEV;
> > +}
> > #endif
> >
> > #endif
> > --
> > 2.23.0.351.gc4317032e6-goog
> >
>
> --
> Sean Paul, Software Engineer, Google / Chromium OS
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [v8, 2/4] drm/panel: set display info in panel attach
On Mon, Oct 7, 2019 at 9:44 AM Sean Paul wrote:
>
> On Mon, Sep 30, 2019 at 04:14:54PM -0700, dbasehore . wrote:
> > On Sat, Sep 28, 2019 at 10:23 PM james qian wang (Arm Technology
> > China) wrote:
> > >
> > > On Wed, Sep 25, 2019 at 03:58:31PM -0700, Derek Basehore wrote:
> > > > Devicetree systems can set panel orientation via a panel binding, but
> > > > there's no way, as is, to propagate this setting to the connector,
> > > > where the property need to be added.
> > > > To address this, this patch sets orientation, as well as other fixed
> > > > values for the panel, in the drm_panel_attach function. These values
> > > > are stored from probe in the drm_panel struct.
> > > >
> > > > Signed-off-by: Derek Basehore
> > > > Reviewed-by: Sam Ravnborg
> > > > ---
> > > > drivers/gpu/drm/drm_panel.c | 28 +
> > > > include/drm/drm_panel.h | 50 +
> > > > 2 files changed, 78 insertions(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
> > > > index 0909b53b74e6..1cd2b56c9fe6 100644
> > > > --- a/drivers/gpu/drm/drm_panel.c
> > > > +++ b/drivers/gpu/drm/drm_panel.c
> > > > @@ -104,11 +104,23 @@ EXPORT_SYMBOL(drm_panel_remove);
> > > > */
> > > > int drm_panel_attach(struct drm_panel *panel, struct drm_connector
> > > > *connector)
> > > > {
> > > > + struct drm_display_info *info;
> > > > +
> > > > if (panel->connector)
> > > > return -EBUSY;
> > > >
> > > > panel->connector = connector;
> > > > panel->drm = connector->dev;
> > > > + info = >display_info;
> > > > + info->width_mm = panel->width_mm;
> > > > + info->height_mm = panel->height_mm;
> > > > + info->bpc = panel->bpc;
> > > > + info->panel_orientation = panel->orientation;
> > > > + info->bus_flags = panel->bus_flags;
> > > > + if (panel->bus_formats)
> > > > + drm_display_info_set_bus_formats(>display_info,
> > > > + panel->bus_formats,
> > > > + panel->num_bus_formats);
> > > >
> > > > return 0;
> > > > }
> > > > @@ -126,6 +138,22 @@ EXPORT_SYMBOL(drm_panel_attach);
> > > > */
> > > > void drm_panel_detach(struct drm_panel *panel)
> > > > {
> > > > + struct drm_display_info *info;
> > > > +
> > > > + if (!panel->connector)
> > > > + goto out;
> > > > +
> > > > + info = >connector->display_info;
> > > > + info->width_mm = 0;
> > > > + info->height_mm = 0;
> > > > + info->bpc = 0;
> > > > + info->panel_orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
> > > > + info->bus_flags = 0;
> > > > + kfree(info->bus_formats);
> > > > + info->bus_formats = NULL;
> > > > + info->num_bus_formats = 0;
> > > > +
> > > > +out:
> > > > panel->connector = NULL;
> > > > panel->drm = NULL;
> > > > }
> > > > diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
> > > > index d16158deacdc..f3587a54b8ac 100644
> > > > --- a/include/drm/drm_panel.h
> > > > +++ b/include/drm/drm_panel.h
> > > > @@ -141,6 +141,56 @@ struct drm_panel {
> > > >*/
> > > > const struct drm_panel_funcs *funcs;
> > > >
> > >
> > > All these new added members seems dupliated with drm_display_info,
> > > So I think, can we add a new drm_plane_funcs func:
> > >
> > > int (*set_display_info)(struct drm_panel *panel,
> > > struct drm_display_info *info);
> >
> > I don't disagree personally, since I originally wrote it this way, but
> > 2 maintainers, Daniel Vetter and Thierry Reding, requested that it be
> > changed. Unless that decision is reversed, I won't be changing this.
> >
>
> Reading back the feedback on v1, I don't think anyone said they were against
> storing a drm_display_info struct in drm_panel (no one really weighed in on
> it one way or another). IMO duplicating a bunch of fields feels pretty icky.
Thanks for the review. Should we duplicate the entire struct, or just
create a sub-struct, say, physical_properties that will be part of
drm_display_info and drm_panel?
>
> I think most fields in drm_display_info have pretty reasonable defaults, so
> I'd
> recommend just storing a copy in drm_panel. As Thierry suggests, we can
> populate the dt parts in probe (orientation) and then copy over all or a
> subset
> of the struct to connector on attach.
>
> Sean
>
> > >
> > > Then in drm_panel_attach(), via this interface the specific panel
> > > driver can directly set connector->display_info. like
> > >
> > >...
> > >if (panel->funcs && panel->funcs->set_display_info)
> > > panel->funcs->unprepare(panel, connector->display_info);
> > >...
> > >
> > > Thanks
> > > James
> > >
> > > > + /**
> > > > + * @width_mm:
> > > > + *
> > > > + * Physical width in mm.
> > > > + */
> > > > + unsigned int width_mm;
> > > > +
> > > > + /**
> > > > +
Re: [Intel-gfx] [PATCH] drm/i915: make array hw_engine_mask static, makes object smaller
Quoting Chris Wilson (2019-10-07 17:22:52) > Quoting Colin King (2019-10-07 16:41:51) > > From: Colin Ian King > > > > Don't populate the array hw_engine_mask on the stack but instead make it > > static. Makes the object code smaller by 316 bytes. > > > > Before: > >textdata bss dec hex filename > > 340044388 320 387129738 gpu/drm/i915/gt/intel_reset.o > > > > After: > >textdata bss dec hex filename > > 335284548 320 3839695fc gpu/drm/i915/gt/intel_reset.o > > > > (gcc version 9.2.1, amd64) > > > > Signed-off-by: Colin Ian King > Reviewed-by: Chris Wilson And pushed, thanks for the patch. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: make array hw_engine_mask static, makes object smaller
== Series Details ==
Series: drm/i915: make array hw_engine_mask static, makes object smaller
URL : https://patchwork.freedesktop.org/series/67694/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7024_full -> Patchwork_14692_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14692_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14692_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14692_full:
### IGT changes ###
Possible regressions
* igt@kms_big_fb@x-tiled-32bpp-rotate-0:
- shard-kbl: [PASS][1] -> [TIMEOUT][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-kbl4/igt@kms_big...@x-tiled-32bpp-rotate-0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/shard-kbl4/igt@kms_big...@x-tiled-32bpp-rotate-0.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_cursor_legacy@cursora-vs-flipa-varying-size:
- {shard-tglb}: [PASS][3] -> [INCOMPLETE][4] +1 similar issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-tglb3/igt@kms_cursor_leg...@cursora-vs-flipa-varying-size.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/shard-tglb2/igt@kms_cursor_leg...@cursora-vs-flipa-varying-size.html
New tests
-
New tests have been introduced between CI_DRM_7024_full and
Patchwork_14692_full:
### New Piglit tests (7) ###
* spec@arb_gpu_shader5@texturegatheroffset@fs-rgb-0-unorm-2darray:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegatheroffset@fs-rgb-0-unorm-2darray-const:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegatheroffset@fs-rgb-1-unorm-2darray:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegatheroffset@fs-rgb-1-unorm-2darray-const:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegatheroffset@fs-rgb-2-unorm-2darray:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegatheroffset@fs-rgb-2-unorm-2darray-const:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegatheroffsets@fs-rgb-0-unorm-2darray:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
Known issues
Here are the changes found in Patchwork_14692_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +22 similar
issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-iclb2/igt@gem_exec_sched...@preempt-queue-bsd1.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/shard-iclb6/igt@gem_exec_sched...@preempt-queue-bsd1.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#111325]) +7 similar
issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-iclb6/igt@gem_exec_sched...@reorder-wide-bsd.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/shard-iclb4/igt@gem_exec_sched...@reorder-wide-bsd.html
* igt@gem_tiled_swapping@non-threaded:
- shard-glk: [PASS][9] -> [INCOMPLETE][10] ([fdo#103359] /
[fdo#108686] / [k.org#198133])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-glk8/igt@gem_tiled_swapp...@non-threaded.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/shard-glk3/igt@gem_tiled_swapp...@non-threaded.html
* igt@gem_userptr_blits@sync-unmap-after-close:
- shard-hsw: [PASS][11] -> [DMESG-WARN][12] ([fdo#111870]) +1
similar issue
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-hsw6/igt@gem_userptr_bl...@sync-unmap-after-close.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/shard-hsw7/igt@gem_userptr_bl...@sync-unmap-after-close.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +1
similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-apl4/igt@i915_susp...@fence-restore-tiled2untiled.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/shard-apl2/igt@i915_susp...@fence-restore-tiled2untiled.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][15] -> [FAIL][16] ([fdo#105363])
[15]:
[Intel-gfx] [CI 1/2] drm/i915/perf: Wean ourselves off dev_priv
Use the local uncore accessors for the GT rather than using the [not-so]
magic global dev_priv mmio routines. In the process, we also teach the
perf stream to use backpointers to the i915_perf rather than digging it
out of dev_priv.
v2: Rebase onto i915_perf_types.h
Signed-off-by: Chris Wilson
Cc: Umesh Nerlige Ramappa
Cc: Lionel Landwerlin
Reviewed-by: Lionel Landwerlin #v1
Link:
https://patchwork.freedesktop.org/patch/msgid/20191007140812.10963-1-ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_drv.h| 56 +-
drivers/gpu/drm/i915/i915_perf.c | 721 -
drivers/gpu/drm/i915/i915_perf_types.h | 73 ++-
3 files changed, 422 insertions(+), 428 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1b8fd3a38c66..dd0eb8dc4491 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1332,61 +1332,7 @@ struct drm_i915_private {
struct intel_runtime_pm runtime_pm;
- struct {
- bool initialized;
-
- struct kobject *metrics_kobj;
- struct ctl_table_header *sysctl_header;
-
- /*
-* Lock associated with adding/modifying/removing OA configs
-* in dev_priv->perf.metrics_idr.
-*/
- struct mutex metrics_lock;
-
- /*
-* List of dynamic configurations, you need to hold
-* dev_priv->perf.metrics_lock to access it.
-*/
- struct idr metrics_idr;
-
- /*
-* Lock associated with anything below within this structure
-* except exclusive_stream.
-*/
- struct mutex lock;
- struct list_head streams;
-
- /*
-* The stream currently using the OA unit. If accessed
-* outside a syscall associated to its file
-* descriptor, you need to hold
-* dev_priv->drm.struct_mutex.
-*/
- struct i915_perf_stream *exclusive_stream;
-
- /**
-* For rate limiting any notifications of spurious
-* invalid OA reports
-*/
- struct ratelimit_state spurious_report_rs;
-
- struct i915_oa_config test_config;
-
- u32 gen7_latched_oastatus1;
- u32 ctx_oactxctrl_offset;
- u32 ctx_flexeu0_offset;
-
- /**
-* The RPT_ID/reason field for Gen8+ includes a bit
-* to determine if the CTX ID in the report is valid
-* but the specific bit differs between Gen 8 and 9
-*/
- u32 gen8_valid_ctx_bit;
-
- struct i915_oa_ops ops;
- const struct i915_oa_format *oa_formats;
- } perf;
+ struct i915_perf perf;
/* Abstract the submission mechanism (legacy ringbuffer or execlists)
away */
struct intel_gt gt;
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 231388d06c82..5a25bbeb6c7a 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -367,8 +367,7 @@ struct perf_open_properties {
static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
-static void free_oa_config(struct drm_i915_private *dev_priv,
- struct i915_oa_config *oa_config)
+static void free_oa_config(struct i915_oa_config *oa_config)
{
if (!PTR_ERR(oa_config->flex_regs))
kfree(oa_config->flex_regs);
@@ -379,53 +378,52 @@ static void free_oa_config(struct drm_i915_private
*dev_priv,
kfree(oa_config);
}
-static void put_oa_config(struct drm_i915_private *dev_priv,
- struct i915_oa_config *oa_config)
+static void put_oa_config(struct i915_oa_config *oa_config)
{
if (!atomic_dec_and_test(_config->ref_count))
return;
- free_oa_config(dev_priv, oa_config);
+ free_oa_config(oa_config);
}
-static int get_oa_config(struct drm_i915_private *dev_priv,
+static int get_oa_config(struct i915_perf *perf,
int metrics_set,
struct i915_oa_config **out_config)
{
int ret;
if (metrics_set == 1) {
- *out_config = _priv->perf.test_config;
- atomic_inc(_priv->perf.test_config.ref_count);
+ *out_config = >test_config;
+ atomic_inc(>test_config.ref_count);
return 0;
}
- ret = mutex_lock_interruptible(_priv->perf.metrics_lock);
+ ret = mutex_lock_interruptible(>metrics_lock);
if (ret)
return ret;
- *out_config = idr_find(_priv->perf.metrics_idr, metrics_set);
+ *out_config = idr_find(>metrics_idr, metrics_set);
if
[Intel-gfx] [CI 2/2] drm/i915/perf: Set the exclusive stream under perf->lock
The BKL struct_mutex is no more, the only serialisation we required for setting the exclusive stream is already managed by ce->pin_mutex in gen8_configure_all_contexts(). As such, we can manipulate i915_perf.exclusive_stream underneath our own (already held) perf->lock. Signed-off-by: Chris Wilson Cc: Umesh Nerlige Ramappa Cc: Lionel Landwerlin Reviewed-by: Lionel Landwerlin Link: https://patchwork.freedesktop.org/patch/msgid/20191007140812.10963-2-ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/i915_perf.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 5a25bbeb6c7a..e5973809b69a 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1343,10 +1343,8 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream) * Unset exclusive_stream first, it will be checked while disabling * the metric set on gen8+. */ - mutex_lock(>i915->drm.struct_mutex); perf->exclusive_stream = NULL; perf->ops.disable_metric_set(stream); - mutex_unlock(>i915->drm.struct_mutex); free_oa_buffer(stream); @@ -1853,7 +1851,7 @@ static int gen8_configure_all_contexts(struct i915_perf_stream *stream, for (i = 2; i < ARRAY_SIZE(regs); i++) regs[i].value = oa_config_flex_reg(oa_config, regs[i].reg); - lockdep_assert_held(>drm.struct_mutex); + lockdep_assert_held(>perf->lock); /* * The OA register config is setup through the context image. This image @@ -2220,10 +2218,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, if (ret) goto err_oa_buf_alloc; - ret = i915_mutex_lock_interruptible(>perf->i915->drm); - if (ret) - goto err_lock; - stream->ops = _oa_stream_ops; perf->exclusive_stream = stream; @@ -2233,8 +2227,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, goto err_enable; } - mutex_unlock(>perf->i915->drm.struct_mutex); - hrtimer_init(>poll_check_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); stream->poll_check_timer.function = oa_poll_check_timer_cb; @@ -2246,9 +2238,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, err_enable: perf->exclusive_stream = NULL; perf->ops.disable_metric_set(stream); - mutex_unlock(>perf->i915->drm.struct_mutex); -err_lock: free_oa_buffer(stream); err_oa_buf_alloc: -- 2.23.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
URL : https://patchwork.freedesktop.org/series/67689/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7024_full -> Patchwork_14690_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14690_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14690_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14690_full:
### IGT changes ###
Possible regressions
* igt@perf@blocking:
- shard-hsw: [PASS][1] -> [TIMEOUT][2] +17 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-hsw8/igt@p...@blocking.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-hsw6/igt@p...@blocking.html
* igt@perf@create-destroy-userspace-config:
- shard-glk: [PASS][3] -> [TIMEOUT][4] +15 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-glk4/igt@p...@create-destroy-userspace-config.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-glk9/igt@p...@create-destroy-userspace-config.html
* igt@perf@invalid-oa-exponent:
- shard-skl: [PASS][5] -> [TIMEOUT][6] +13 similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-skl7/igt@p...@invalid-oa-exponent.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-skl10/igt@p...@invalid-oa-exponent.html
- shard-iclb: [PASS][7] -> [TIMEOUT][8] +11 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-iclb6/igt@p...@invalid-oa-exponent.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-iclb8/igt@p...@invalid-oa-exponent.html
* igt@perf@invalid-oa-format-id:
- shard-kbl: [PASS][9] -> [TIMEOUT][10] +18 similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-kbl4/igt@p...@invalid-oa-format-id.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-kbl7/igt@p...@invalid-oa-format-id.html
* igt@perf@low-oa-exponent-permissions:
- shard-apl: [PASS][11] -> [TIMEOUT][12] +17 similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-apl5/igt@p...@low-oa-exponent-permissions.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-apl6/igt@p...@low-oa-exponent-permissions.html
* igt@perf@mi-rpc:
- shard-iclb: NOTRUN -> [TIMEOUT][13] +3 similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-iclb8/igt@p...@mi-rpc.html
* igt@perf@short-reads:
- shard-skl: [PASS][14] -> [INCOMPLETE][15] +1 similar issue
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-skl3/igt@p...@short-reads.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-skl5/igt@p...@short-reads.html
Warnings
* igt@perf@blocking:
- shard-skl: [FAIL][16] ([fdo#110728]) -> [TIMEOUT][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-skl1/igt@p...@blocking.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-skl8/igt@p...@blocking.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_exec_balancer@bonded-slice}:
- shard-iclb: [PASS][18] -> [DMESG-FAIL][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-iclb5/igt@gem_exec_balan...@bonded-slice.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-iclb2/igt@gem_exec_balan...@bonded-slice.html
* igt@kms_cursor_legacy@cursora-vs-flipa-varying-size:
- {shard-tglb}: [PASS][20] -> [INCOMPLETE][21] +1 similar issue
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-tglb3/igt@kms_cursor_leg...@cursora-vs-flipa-varying-size.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/shard-tglb4/igt@kms_cursor_leg...@cursora-vs-flipa-varying-size.html
Known issues
Here are the changes found in Patchwork_14690_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [PASS][22] -> [SKIP][23] ([fdo#111325]) +5 similar
issues
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/shard-iclb6/igt@gem_exec_sched...@preemptive-hang-bsd.html
[23]:
Re: [Intel-gfx] [PATCH 02/11] drm/i915: switch i915_driver_probe() to use i915 local variable
Quoting Jani Nikula (2019-10-07 16:09:27) > Prefer i915 over dev_priv where possible. No functional changes. > > Signed-off-by: Jani Nikula Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 1/1] drm/i915/ehl: Add sysfs interface to control class-of-service
Quoting Prathap Kumar Valsan (2019-10-07 17:52:09)
> To provide shared last-level-cache isolation to cpu workloads running
> concurrently with gpu workloads, the gpu allocation of cache lines needs
> to be restricted to certain ways. Currently GPU hardware supports four
> class-of-service(CLOS) levels and there is an associated way-mask for
> each CLOS. Each LLC MOCS register has a field to select the clos level.
> So in-order to globally set the gpu to a clos level, driver needs
> to program entire MOCS table.
>
> Hardware supports reading supported way-mask configuration for GPU using
> a bios pcode interface. This interface has two files--llc_clos_modes and
> llc_clos. The file llc_clos_modes is read only file and will list the
> available way masks. The file llc_clos is read/write and will show the
> currently active way mask and writing a new way mask will update the
> active way mask of the gpu.
>
> Note of Caution: Restricting cache ways using this mechanism presents a
> larger attack surface for side-channel attacks.
>
> Example usage:
> > cat /sys/class/drm/card0/llc_clos_modes
> 0xfff 0xfc0 0xc00 0x800
>
> >cat /sys/class/drm/card0/llc_clos
> 0xfff
>
> Update to new clos
> echo "0x800" > /sys/class/drm/card0/llc_clos
So the first question is whether this is global on the device or local
to the GT.
> Signed-off-by: Prathap Kumar Valsan
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 7 +
> drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 1 +
> drivers/gpu/drm/i915/gt/intel_mocs.c| 216 +++-
> drivers/gpu/drm/i915/gt/intel_mocs.h| 6 +-
> drivers/gpu/drm/i915/i915_drv.h | 8 +
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/i915_sysfs.c | 100 +++
> 7 files changed, 337 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
> b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 468438fb47af..054051969d00 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -2137,6 +2137,13 @@ __execlists_update_reg_state(const struct
> intel_context *ce,
> intel_sseu_make_rpcs(engine->i915, >sseu);
>
> i915_oa_init_reg_state(ce, engine);
> + /*
> +* Gen11+ wants to support update of LLC class-of-service via
> +* sysfs interface. CLOS is defined in MOCS registers and for
> +* Gen11, MOCS is part of context resgister state.
> +*/
> + if (IS_GEN(engine->i915, 11))
> + intel_mocs_init_reg_state(ce);
Do the filtering in intel_mocs_init_reg_state(). The intel_ prefix says
it should be common to all.
Not IS_ELKHARTLAKE(), that is implies by subject?
> +static int
> +mocs_store_clos(struct i915_request *rq,
> + struct intel_context *ce)
> +{
> + struct drm_i915_mocs_table t;
> + unsigned int count, active_clos, index;
> + u32 offset;
> + u32 value;
> + u32 *cs;
> +
> + if (!get_mocs_settings(rq->engine->gt, ))
> + return -ENODEV;
> +
> + count = t.n_entries;
> + active_clos = rq->i915->clos.active_clos;
> + cs = intel_ring_begin(rq, 4 * count);
> + if (IS_ERR(cs))
> + return PTR_ERR(cs);
> +
> + offset = i915_ggtt_offset(ce->state) + LRC_STATE_PN * PAGE_SIZE;
> +
> + for (index = 0; index < count; index++) {
> + value = ce->lrc_reg_state[ctx_mocsN(index)];
Their context image is volatile at this point. They are pinned and
active. If you must do a rmw, do it on the GPU. But do we not know the
full value (as I don't expect it to be nonpriv)? [If doing rmw on the
GPU, we're probably have to use a secure batch here to avoid running out
of ringspace.]
> + value &= ~LE_COS_MASK;
> + value |= FIELD_PREP(LE_COS_MASK, active_clos);
> +
> + *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
> + *cs++ = offset + ctx_mocsN(index) * sizeof(uint32_t);
> + *cs++ = 0;
> + *cs++ = value;
> + }
> +
> + intel_ring_advance(rq, cs);
> +
> + return 0;
> +}
> +
> +static int modify_context_mocs(struct intel_context *ce)
> +{
> + struct i915_request *rq;
> + int err;
> +
> + lockdep_assert_held(>pin_mutex);
> +
> + rq = i915_request_create(ce->engine->kernel_context);
> + if (IS_ERR(rq))
> + return PTR_ERR(rq);
> +
> + /* Serialise with the remote context */
> + err = intel_context_prepare_remote_request(ce, rq);
> + if (err == 0)
> + err = mocs_store_clos(rq, ce);
> +
> + i915_request_add(rq);
> + return err;
> +}
> +
> +static int intel_mocs_configure_context(struct i915_gem_context *ctx)
> +{
> + struct i915_gem_engines_iter it;
> + struct intel_context *ce;
> + int err = 0;
> +
> +
Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET
Quoting Chris Wilson (2019-10-07 21:16:29) > Quoting Bloomfield, Jon (2019-10-07 17:55:16) > > > -Original Message- > > > From: Intel-gfx On Behalf Of > > > Abdiel > > > Janulgue > > > Sent: Monday, October 7, 2019 2:19 AM > > > To: intel-gfx@lists.freedesktop.org > > > Cc: Auld, Matthew > > > Subject: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce > > > DRM_I915_GEM_MMAP_OFFSET > > > > > > This is really just an alias of mmap_gtt. Add a new CPU mmap > > > implementation that allows multiple fault handlers that depends on > > > the object's backing pages. > > > > > > Note that we multiplex mmap_gtt and mmap_offset through the same ioctl, > > > and use the zero extending behaviour of drm to differentiate between > > > them, when we inspect the flags. > > > > > > Signed-off-by: Abdiel Janulgue > > > Signed-off-by: Matthew Auld > > > Cc: Joonas Lahtinen > > > --- > > > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 36 +-- > > > .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 ++ > > > drivers/gpu/drm/i915/i915_drv.c | 2 +- > > > include/uapi/drm/i915_drm.h | 28 +++ > > > 4 files changed, 66 insertions(+), 3 deletions(-) > > > > How does the label 'offset' fit into this API if it's really about multiple > > fault handlers? > > Could do with a much better description here I think. Who would use this, > > and why, would help a lot. > > The ioctl returns the offset into the device fd userpace uses with > mmap(2). Hence DRM_IOCTL_I915_GEM_MMAP_OFFSET. Yeah, that should have been explained in the changelog why the name was chosen to reflect expected usage. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET
Quoting Bloomfield, Jon (2019-10-07 17:55:16) > > -Original Message- > > From: Intel-gfx On Behalf Of > > Abdiel > > Janulgue > > Sent: Monday, October 7, 2019 2:19 AM > > To: intel-gfx@lists.freedesktop.org > > Cc: Auld, Matthew > > Subject: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce > > DRM_I915_GEM_MMAP_OFFSET > > > > This is really just an alias of mmap_gtt. Add a new CPU mmap > > implementation that allows multiple fault handlers that depends on > > the object's backing pages. > > > > Note that we multiplex mmap_gtt and mmap_offset through the same ioctl, > > and use the zero extending behaviour of drm to differentiate between > > them, when we inspect the flags. > > > > Signed-off-by: Abdiel Janulgue > > Signed-off-by: Matthew Auld > > Cc: Joonas Lahtinen > > --- > > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 36 +-- > > .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 ++ > > drivers/gpu/drm/i915/i915_drv.c | 2 +- > > include/uapi/drm/i915_drm.h | 28 +++ > > 4 files changed, 66 insertions(+), 3 deletions(-) > > How does the label 'offset' fit into this API if it's really about multiple > fault handlers? > Could do with a much better description here I think. Who would use this, and > why, would help a lot. The ioctl returns the offset into the device fd userpace uses with mmap(2). Hence DRM_IOCTL_I915_GEM_MMAP_OFFSET. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] Fixes which failed clean cherry-pick to drm-intel-fixes
Quoting Rodrigo Vivi (2019-10-07 18:54:35)
> Hi Chris,
>
> 4 of your fixes failed the clean cherry-pick of drm-intel-fixes.
>
> b647c7df01b7 ("drm/i915: Fixup preempt-to-busy vs resubmission of a virtual
> request")
> cb2377a919bb ("drm/i915: Fixup preempt-to-busy vs reset of a virtual request")
> a4311745bba9 ("drm/i915/userptr: Never allow userptr into the mappable GGTT")
> 2935ed5339c4 ("drm/i915: Remove logical HW ID")
>
> Is anyone of those critical?
> If so, could you please provide a version for drm-intel-fixes?
See https://cgit.freedesktop.org/~ickle/linux-2.6/log/?h=dif
I've not bothered with 2935ed5339c4, that seems more hassle than I care
for atm. The risk is only if people adopt I915_CONTEXT_PARAM_SET_ENGINE
and use it in novel ways and still the HW may not notice. So we are
probably going to get the next kernel out before people notice any
breakage.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] lib/i915: Bump conservative threshold for ring size
Quoting Tvrtko Ursulin (2019-10-07 17:56:20) > > On 07/10/2019 09:27, Chris Wilson wrote: > > We are still hitting the occasional stall upon submission, so be extra > > caution and leave one more spare. > > > > Signed-off-by: Chris Wilson > > --- > > lib/i915/gem_ring.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/lib/i915/gem_ring.c b/lib/i915/gem_ring.c > > index 272264659..9f099edff 100644 > > --- a/lib/i915/gem_ring.c > > +++ b/lib/i915/gem_ring.c > > @@ -104,7 +104,7 @@ __gem_measure_ring_inflight(int fd, unsigned int > > engine, enum measure_ring_flags > > } while (1); > > > > igt_assert_eq(__execbuf(fd, ), -EINTR); > > - igt_assert(count > 1); > > + igt_assert(count > 2); > > > > memset(, 0, sizeof(itv)); > > setitimer(ITIMER_REAL, , NULL); > > @@ -120,7 +120,7 @@ __gem_measure_ring_inflight(int fd, unsigned int > > engine, enum measure_ring_flags > > gem_quiescent_gpu(fd); > > > > /* Be conservative in case we must wrap later */ > > - return count - 1; > > + return count - 2; > > } > > > > /** > > > > Will one make a difference? I'm willing to find out! All I am going on is rcs0 *** WEDGED *** Awake? 66 Hangcheck: 11959 ms ago Reset count: 0 (global 8) Requests: MMIO base: 0x2000 CCID: 0x RING_START: 0x RING_HEAD: 0x RING_TAIL: 0x RING_CTL: 0x RING_MODE: 0x0200 [idle] RING_IMR: ACTHD: 0x_ BBADDR: 0x_ DMA_FADDR: 0x_ IPEIR: 0x IPEHR: 0x E 3:139cd! @ 12914ms: gem_eio[1345] E 3:139ce! @ 12914ms: gem_eio[1345] E 3:139cf! @ 12914ms: gem_eio[1345] E 3:139d0! @ 12914ms: gem_eio[1345] E 3:139d1! @ 12914ms: gem_eio[1345] E 3:139d2! @ 12913ms: gem_eio[1345] E 3:139d3! @ 12913ms: gem_eio[1345] ...skipping 25 executing requests... E 3:139ed! @ 0ms: gem_eio[1345] which tells me it was blocked in submission until hangcheck kicked in and declared the system wedged. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 06/24] drm/i915: Remove begin/finish_crtc_commit, v4.
On Fri, Oct 04, 2019 at 01:34:56PM +0200, Maarten Lankhorst wrote:
> This can all be done from the intel_update_crtc function. Split out the
> pipe update into a separate function, just like is done for the planes.
> Pull in all the changes done during fastset as well. It makes no sense
> for it to still exist as a separate function.
>
> Changes since v1:
> - Inline intel_update_pipe_config()
> Changes since v2:
> - Add comments suggested by matt.
> - Reorder commit_pipe_config() to remove all nesting. (Ville, Matt)
> - Use intel_set_pipe_src_size((). (Matt)
> Changes since v3:
> - Move atomic_update_watermarks closer to the plane calls.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 210 +--
> 1 file changed, 99 insertions(+), 111 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index b5ed097d6a59..ecb15420b5ca 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -135,8 +135,6 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
> const struct intel_crtc_state *pipe_config);
> static void chv_prepare_pll(struct intel_crtc *crtc,
> const struct intel_crtc_state *pipe_config);
> -static void intel_begin_crtc_commit(struct intel_atomic_state *, struct
> intel_crtc *);
> -static void intel_finish_crtc_commit(struct intel_atomic_state *, struct
> intel_crtc *);
> static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state);
> static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state);
> @@ -4408,45 +4406,6 @@ static void icl_set_pipe_chicken(struct intel_crtc
> *crtc)
> I915_WRITE(PIPE_CHICKEN(pipe), tmp);
> }
>
> -static void intel_update_pipe_config(const struct intel_crtc_state
> *old_crtc_state,
> - const struct intel_crtc_state
> *new_crtc_state)
> -{
> - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> -
> - /* drm_atomic_helper_update_legacy_modeset_state might not be called. */
> - crtc->base.mode = new_crtc_state->base.mode;
> -
> - /*
> - * Update pipe size and adjust fitter if needed: the reason for this is
> - * that in compute_mode_changes we check the native mode (not the pfit
> - * mode) to see if we can flip rather than do a full mode set. In the
> - * fastboot case, we'll flip, but if we don't update the pipesrc and
> - * pfit state, we'll end up with a big fb scanned out into the wrong
> - * sized surface.
> - */
> -
> - I915_WRITE(PIPESRC(crtc->pipe),
> -((new_crtc_state->pipe_src_w - 1) << 16) |
> -(new_crtc_state->pipe_src_h - 1));
> -
> - /* on skylake this is done by detaching scalers */
> - if (INTEL_GEN(dev_priv) >= 9) {
> - skl_detach_scalers(new_crtc_state);
> -
> - if (new_crtc_state->pch_pfit.enabled)
> - skylake_pfit_enable(new_crtc_state);
> - } else if (HAS_PCH_SPLIT(dev_priv)) {
> - if (new_crtc_state->pch_pfit.enabled)
> - ironlake_pfit_enable(new_crtc_state);
> - else if (old_crtc_state->pch_pfit.enabled)
> - ironlake_pfit_disable(old_crtc_state);
> - }
> -
> - if (INTEL_GEN(dev_priv) >= 11)
> - icl_set_pipe_chicken(crtc);
> -}
> -
> static void intel_fdi_normal_train(struct intel_crtc *crtc)
> {
> struct drm_device *dev = crtc->base.dev;
> @@ -13715,13 +13674,95 @@ u32 intel_crtc_get_vblank_counter(struct intel_crtc
> *crtc)
> return crtc->base.funcs->get_vblank_counter(>base);
> }
>
> +void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
> + struct intel_crtc_state *crtc_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +
> + if (!IS_GEN(dev_priv, 2))
> + intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe,
> true);
> +
> + if (crtc_state->has_pch_encoder) {
> + enum pipe pch_transcoder =
> + intel_crtc_pch_transcoder(crtc);
> +
> + intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder,
> true);
> + }
> +}
> +
> +static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state,
> +const struct intel_crtc_state *new_crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +
> + /* drm_atomic_helper_update_legacy_modeset_state might not be called. */
> + crtc->base.mode = new_crtc_state->base.mode;
> +
> + /*
> +
Re: [Intel-gfx] [PATCH 03/24] drm/i915: Introduce and use intel_atomic_crtc_state_for_each_plane_state.
On Fri, Oct 04, 2019 at 01:34:53PM +0200, Maarten Lankhorst wrote:
> Instead of looking at drm_plane_state, look at intel_plane_state directly.
>
> This will allow us to make the watermarks bigjoiner aware, when we make it
> work for bigjoiner slave pipes as well.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display.h | 8 +++
> drivers/gpu/drm/i915/intel_pm.c | 60
> 2 files changed, 33 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 4ded64fcbc6c..bc2cf4bec0e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -440,6 +440,14 @@ enum phy_fia {
>(__i)--) \
> for_each_if(crtc)
>
> +#define intel_atomic_crtc_state_for_each_plane_state( \
> + plane, plane_state, \
> + crtc_state) \
> + for_each_intel_plane_mask(((crtc_state)->base.state->dev), (plane), \
> + ((crtc_state)->base.plane_mask)) \
> + for_each_if ((plane_state = \
> +
> to_intel_plane_state(__drm_atomic_get_current_plane_state((crtc_state)->base.state,
> >base
> +
> void intel_link_compute_m_n(u16 bpp, int nlanes,
> int pixel_clock, int link_clock,
> struct intel_link_m_n *m_n,
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index bfcf03ab5245..6aeaad587a20 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3089,8 +3089,8 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state
> *crtc_state)
> struct intel_pipe_wm *pipe_wm;
> struct drm_device *dev = state->dev;
> const struct drm_i915_private *dev_priv = to_i915(dev);
> - struct drm_plane *plane;
> - const struct drm_plane_state *plane_state;
> + struct intel_plane *plane;
> + const struct intel_plane_state *plane_state;
> const struct intel_plane_state *pristate = NULL;
> const struct intel_plane_state *sprstate = NULL;
> const struct intel_plane_state *curstate = NULL;
> @@ -3099,15 +3099,13 @@ static int ilk_compute_pipe_wm(struct
> intel_crtc_state *crtc_state)
>
> pipe_wm = _state->wm.ilk.optimal;
>
> - drm_atomic_crtc_state_for_each_plane_state(plane, plane_state,
> _state->base) {
> - const struct intel_plane_state *ps =
> to_intel_plane_state(plane_state);
> -
> - if (plane->type == DRM_PLANE_TYPE_PRIMARY)
> - pristate = ps;
> - else if (plane->type == DRM_PLANE_TYPE_OVERLAY)
> - sprstate = ps;
> - else if (plane->type == DRM_PLANE_TYPE_CURSOR)
> - curstate = ps;
> + intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
> crtc_state) {
> + if (plane->base.type == DRM_PLANE_TYPE_PRIMARY)
> + pristate = plane_state;
> + else if (plane->base.type == DRM_PLANE_TYPE_OVERLAY)
> + sprstate = plane_state;
> + else if (plane->base.type == DRM_PLANE_TYPE_CURSOR)
> + curstate = plane_state;
> }
>
> pipe_wm->pipe_enabled = crtc_state->base.active;
> @@ -4124,8 +4122,8 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc
> *intel_crtc,
> {
> struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
> struct drm_atomic_state *state = crtc_state->base.state;
> - struct drm_plane *plane;
> - const struct drm_plane_state *drm_plane_state;
> + const struct intel_plane_state *plane_state;
> + struct intel_plane *plane;
> int crtc_clock, dotclk;
> u32 pipe_max_pixel_rate;
> uint_fixed_16_16_t pipe_downscale;
> @@ -4134,12 +4132,10 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc
> *intel_crtc,
> if (!crtc_state->base.enable)
> return 0;
>
> - drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state,
> _state->base) {
> + intel_atomic_crtc_state_for_each_plane_state(plane, plane_state,
> crtc_state) {
> uint_fixed_16_16_t plane_downscale;
> uint_fixed_16_16_t fp_9_div_8 = div_fixed16(9, 8);
> int bpp;
> - const struct intel_plane_state *plane_state =
> - to_intel_plane_state(drm_plane_state);
>
> if (!intel_wm_plane_visible(crtc_state, plane_state))
> continue;
> @@ -4227,18 +4223,16 @@ skl_get_total_relative_data_rate(struct
> intel_crtc_state *crtc_state,
>u64 *uv_plane_data_rate)
> {
> struct drm_atomic_state *state = crtc_state->base.state;
> - struct drm_plane *plane;
> - const struct drm_plane_state *drm_plane_state;
Re: [Intel-gfx] [PATCH 05/24] drm/i915: Use intel_plane_state in prepare and cleanup plane_fb
On Fri, Oct 04, 2019 at 01:34:55PM +0200, Maarten Lankhorst wrote:
> We need to look at the hw fb in the plane split, so replace all the places
> that use drm_plane_state with intel_plane_state.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 28 +++-
> 1 file changed, 16 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 9e34be48c770..b5ed097d6a59 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14380,12 +14380,14 @@ static void fb_obj_bump_render_priority(struct
> drm_i915_gem_object *obj)
> */
> int
> intel_prepare_plane_fb(struct drm_plane *plane,
> -struct drm_plane_state *new_state)
> +struct drm_plane_state *_new_plane_state)
> {
> + struct intel_plane_state *new_plane_state =
> + to_intel_plane_state(_new_plane_state);
> struct intel_atomic_state *intel_state =
> - to_intel_atomic_state(new_state->state);
> + to_intel_atomic_state(new_plane_state->base.state);
> struct drm_i915_private *dev_priv = to_i915(plane->dev);
> - struct drm_framebuffer *fb = new_state->fb;
> + struct drm_framebuffer *fb = new_plane_state->base.fb;
> struct drm_i915_gem_object *obj = intel_fb_obj(fb);
> struct drm_i915_gem_object *old_obj = intel_fb_obj(plane->state->fb);
> int ret;
> @@ -14416,9 +14418,9 @@ intel_prepare_plane_fb(struct drm_plane *plane,
> }
> }
>
> - if (new_state->fence) { /* explicit fencing */
> + if (new_plane_state->base.fence) { /* explicit fencing */
> ret = i915_sw_fence_await_dma_fence(_state->commit_ready,
> - new_state->fence,
> + new_plane_state->base.fence,
> I915_FENCE_TIMEOUT,
> GFP_KERNEL);
> if (ret < 0)
> @@ -14438,7 +14440,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
> return ret;
> }
>
> - ret = intel_plane_pin_fb(to_intel_plane_state(new_state));
> + ret = intel_plane_pin_fb(new_plane_state);
>
> mutex_unlock(_priv->drm.struct_mutex);
> i915_gem_object_unpin_pages(obj);
> @@ -14448,7 +14450,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
> fb_obj_bump_render_priority(obj);
> intel_frontbuffer_flush(obj->frontbuffer, ORIGIN_DIRTYFB);
>
> - if (!new_state->fence) { /* implicit fencing */
> + if (!new_plane_state->base.fence) { /* implicit fencing */
> struct dma_fence *fence;
>
> ret =
> i915_sw_fence_await_reservation(_state->commit_ready,
> @@ -14460,11 +14462,11 @@ intel_prepare_plane_fb(struct drm_plane *plane,
>
> fence = dma_resv_get_excl_rcu(obj->base.resv);
> if (fence) {
> - add_rps_boost_after_vblank(new_state->crtc, fence);
> + add_rps_boost_after_vblank(new_plane_state->base.crtc,
> fence);
> dma_fence_put(fence);
> }
> } else {
> - add_rps_boost_after_vblank(new_state->crtc, new_state->fence);
> + add_rps_boost_after_vblank(new_plane_state->base.crtc,
> new_plane_state->base.fence);
The two changes in this hunk require line wraps now to stay <80 chars.
Otherwise,
Reviewed-by: Matt Roper
> }
>
> /*
> @@ -14494,10 +14496,12 @@ intel_prepare_plane_fb(struct drm_plane *plane,
> */
> void
> intel_cleanup_plane_fb(struct drm_plane *plane,
> -struct drm_plane_state *old_state)
> +struct drm_plane_state *_old_plane_state)
> {
> + struct intel_plane_state *old_plane_state =
> + to_intel_plane_state(_old_plane_state);
> struct intel_atomic_state *intel_state =
> - to_intel_atomic_state(old_state->state);
> + to_intel_atomic_state(old_plane_state->base.state);
> struct drm_i915_private *dev_priv = to_i915(plane->dev);
>
> if (intel_state->rps_interactive) {
> @@ -14507,7 +14511,7 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
>
> /* Should only be called after a successful intel_prepare_plane_fb()! */
> mutex_lock(_priv->drm.struct_mutex);
> - intel_plane_unpin_fb(to_intel_plane_state(old_state));
> + intel_plane_unpin_fb(old_plane_state);
> mutex_unlock(_priv->drm.struct_mutex);
> }
>
> --
> 2.23.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
Re: [Intel-gfx] [PATCH 04/24] drm/i915: Remove cursor use of properties for coordinates
On Fri, Oct 04, 2019 at 01:34:54PM +0200, Maarten Lankhorst wrote:
> We have a src and dect rectangle, use it instead of relying on
> the core drm properties.
>
> This removes the special case in the watermark code for cursor w/h.
>
> Signed-off-by: Maarten Lankhorst
I think you should make it more clear in the commit message here that
you're actually overwriting the clipped coordinates in src/dst with the
unclipped coordinates that we program into our hardware. I missed that
the first time reading through the patch; using clipped coordinates
would obviously cause lots of failures.
Actually, even if this is safe at the moment, we're violating the
documented expectations of the DRM core. I'd suggest also adding a drm
core patch that updates the comment on drm_plane_state to indicate that
the contents may or may not be clipped (driver-specific) and that the
core shouldn't assume either way.
Matt
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 57 +++
> drivers/gpu/drm/i915/intel_pm.c | 58 +++-
> 2 files changed, 53 insertions(+), 62 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index c3ac5a5c5185..9e34be48c770 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10591,16 +10591,16 @@ static u32 intel_cursor_base(const struct
> intel_plane_state *plane_state)
> /* ILK+ do this automagically */
> if (HAS_GMCH(dev_priv) &&
> plane_state->base.rotation & DRM_MODE_ROTATE_180)
> - base += (plane_state->base.crtc_h *
> - plane_state->base.crtc_w - 1) * fb->format->cpp[0];
> + base += (drm_rect_height(_state->base.dst) *
> + drm_rect_width(_state->base.dst) - 1) *
> fb->format->cpp[0];
>
> return base;
> }
>
> static u32 intel_cursor_position(const struct intel_plane_state *plane_state)
> {
> - int x = plane_state->base.crtc_x;
> - int y = plane_state->base.crtc_y;
> + int x = plane_state->base.dst.x1;
> + int y = plane_state->base.dst.y1;
> u32 pos = 0;
>
> if (x < 0) {
> @@ -10622,8 +10622,8 @@ static bool intel_cursor_size_ok(const struct
> intel_plane_state *plane_state)
> {
> const struct drm_mode_config *config =
> _state->base.plane->dev->mode_config;
> - int width = plane_state->base.crtc_w;
> - int height = plane_state->base.crtc_h;
> + int width = drm_rect_width(_state->base.dst);
> + int height = drm_rect_height(_state->base.dst);
>
> return width > 0 && width <= config->cursor_width &&
> height > 0 && height <= config->cursor_height;
> @@ -10642,8 +10642,8 @@ static int intel_cursor_check_surface(struct
> intel_plane_state *plane_state)
> if (!plane_state->base.visible)
> return 0;
>
> - src_x = plane_state->base.src_x >> 16;
> - src_y = plane_state->base.src_y >> 16;
> + src_x = plane_state->base.src.x1 >> 16;
> + src_y = plane_state->base.src.y1 >> 16;
>
> intel_add_fb_offsets(_x, _y, plane_state, 0);
> offset = intel_plane_compute_aligned_offset(_x, _y,
> @@ -10678,6 +10678,10 @@ static int intel_check_cursor(struct
> intel_crtc_state *crtc_state,
> if (ret)
> return ret;
>
> + /* Use the unclipped src/dst rectangles, which we program to hw */
> + plane_state->base.src = drm_plane_state_src(_state->base);
> + plane_state->base.dst = drm_plane_state_dest(_state->base);
> +
> ret = intel_cursor_check_surface(plane_state);
> if (ret)
> return ret;
> @@ -10720,7 +10724,7 @@ static u32 i845_cursor_ctl(const struct
> intel_crtc_state *crtc_state,
>
> static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state)
> {
> - int width = plane_state->base.crtc_w;
> + int width = drm_rect_width(_state->base.dst);
>
> /*
>* 845g/865g are only limited by the width of their cursors,
> @@ -10746,8 +10750,8 @@ static int i845_check_cursor(struct intel_crtc_state
> *crtc_state,
> /* Check for which cursor types we support */
> if (!i845_cursor_size_ok(plane_state)) {
> DRM_DEBUG("Cursor dimension %dx%d not supported\n",
> - plane_state->base.crtc_w,
> - plane_state->base.crtc_h);
> + drm_rect_width(_state->base.dst),
> + drm_rect_height(_state->base.dst));
> return -EINVAL;
> }
>
> @@ -10780,8 +10784,8 @@ static void i845_update_cursor(struct intel_plane
> *plane,
> unsigned long irqflags;
>
> if (plane_state && plane_state->base.visible) {
> - unsigned int width = plane_state->base.crtc_w;
> - unsigned int height = plane_state->base.crtc_h;
> + unsigned int width =
Re: [Intel-gfx] [PATCH 02/24] drm/i915: Fix for_each_intel_plane_mask definition
On Fri, Oct 04, 2019 at 01:34:52PM +0200, Maarten Lankhorst wrote:
> Using for_each_intel_plane_mask() fails because of an extra bracket,
> remove the bracket so we can use it in the next commit.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 2782f23ee887..4ded64fcbc6c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -350,7 +350,7 @@ enum phy_fia {
> &(dev)->mode_config.plane_list, \
> base.head) \
> for_each_if((plane_mask) & \
> - drm_plane_mask(_plane->base)))
> + drm_plane_mask(_plane->base))
>
> #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \
> list_for_each_entry(intel_plane,\
> --
> 2.23.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Fix Kconfig indentation
== Series Details == Series: drm/i915: Fix Kconfig indentation URL : https://patchwork.freedesktop.org/series/67707/ State : failure == Summary == Applying: drm/i915: Fix Kconfig indentation Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/Kconfig.debug Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/Kconfig.debug CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/Kconfig.debug error: Failed to merge in the changes. hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 drm/i915: Fix Kconfig indentation When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
== Series Details ==
Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
URL : https://patchwork.freedesktop.org/series/67525/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7021_full -> Patchwork_14686_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14686_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14686_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14686_full:
### IGT changes ###
Possible regressions
* igt@gem_tiled_swapping@non-threaded:
- shard-hsw: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw4/igt@gem_tiled_swapp...@non-threaded.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw5/igt@gem_tiled_swapp...@non-threaded.html
* {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
- shard-iclb: NOTRUN -> [SKIP][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@i915_pm...@dc3co-vpb-simulation.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_plane_lowres@pipe-c-tiling-none:
- {shard-tglb}: [PASS][4] -> [INCOMPLETE][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_plane_low...@pipe-c-tiling-none.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb1/igt@kms_plane_low...@pipe-c-tiling-none.html
New tests
-
New tests have been introduced between CI_DRM_7021_full and
Patchwork_14686_full:
### New IGT tests (1) ###
* igt@i915_pm_dc@dc3co-vpb-simulation:
- Statuses : 7 skip(s)
- Exec time: [0.0] s
### New Piglit tests (4) ###
* spec@arb_gpu_shader5@texturegather@vs-rgba-0-int-cubearray:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegather@vs-rgba-1-int-cubearray:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegather@vs-rgba-2-int-cubearray:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@arb_gpu_shader5@texturegather@vs-rgba-3-int-cubearray:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
Known issues
Here are the changes found in Patchwork_14686_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@bcs0-s3:
- shard-apl: [PASS][6] -> [DMESG-WARN][7] ([fdo#108566]) +5
similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl3/igt@gem_ctx_isolat...@bcs0-s3.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@gem_ctx_isolat...@bcs0-s3.html
* igt@gem_ctx_isolation@vcs1-s3:
- shard-kbl: [PASS][8] -> [INCOMPLETE][9] ([fdo#103665])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@gem_ctx_isolat...@vcs1-s3.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/igt@gem_ctx_isolat...@vcs1-s3.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][10] -> [SKIP][11] ([fdo#110841])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][12] -> [SKIP][13] ([fdo#110854])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_balan...@smoke.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/igt@gem_exec_balan...@smoke.html
* igt@gem_exec_nop@basic-parallel:
- shard-apl: [PASS][14] -> [INCOMPLETE][15] ([fdo#103927]) +1
similar issue
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@gem_exec_...@basic-parallel.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl6/igt@gem_exec_...@basic-parallel.html
* igt@gem_exec_schedule@out-order-bsd2:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#109276]) +12 similar
issues
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_exec_sched...@out-order-bsd2.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/igt@gem_exec_sched...@out-order-bsd2.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][18] -> [SKIP][19] ([fdo#111325]) +3 similar
[Intel-gfx] [PATCH v3] drm/i915: Fix Kconfig indentation
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^/\t/' -i */Kconfig Signed-off-by: Krzysztof Kozlowski --- Changes since v2: 1. Split AMD and i915 to separate patches. --- drivers/gpu/drm/i915/Kconfig | 12 +-- drivers/gpu/drm/i915/Kconfig.debug | 144 ++--- 2 files changed, 78 insertions(+), 78 deletions(-) diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index 0d21402945ab..3c6d57df262d 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -76,7 +76,7 @@ config DRM_I915_CAPTURE_ERROR This option enables capturing the GPU state when a hang is detected. This information is vital for triaging hangs and assists in debugging. Please report any hang to -https://bugs.freedesktop.org/enter_bug.cgi?product=DRI + https://bugs.freedesktop.org/enter_bug.cgi?product=DRI for triaging. If in doubt, say "Y". @@ -105,11 +105,11 @@ config DRM_I915_USERPTR If in doubt, say "Y". config DRM_I915_GVT -bool "Enable Intel GVT-g graphics virtualization host support" -depends on DRM_I915 -depends on 64BIT -default n -help + bool "Enable Intel GVT-g graphics virtualization host support" + depends on DRM_I915 + depends on 64BIT + default n + help Choose this option if you want to enable Intel GVT-g graphics virtualization technology host support with integrated graphics. With GVT-g, it's possible to have one integrated graphics diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug index 00786a142ff0..eea79125b3ea 100644 --- a/drivers/gpu/drm/i915/Kconfig.debug +++ b/drivers/gpu/drm/i915/Kconfig.debug @@ -1,34 +1,34 @@ # SPDX-License-Identifier: GPL-2.0-only config DRM_I915_WERROR -bool "Force GCC to throw an error instead of a warning when compiling" -# As this may inadvertently break the build, only allow the user -# to shoot oneself in the foot iff they aim really hard -depends on EXPERT -# We use the dependency on !COMPILE_TEST to not be enabled in -# allmodconfig or allyesconfig configurations -depends on !COMPILE_TEST + bool "Force GCC to throw an error instead of a warning when compiling" + # As this may inadvertently break the build, only allow the user + # to shoot oneself in the foot iff they aim really hard + depends on EXPERT + # We use the dependency on !COMPILE_TEST to not be enabled in + # allmodconfig or allyesconfig configurations + depends on !COMPILE_TEST select HEADER_TEST -default n -help - Add -Werror to the build flags for (and only for) i915.ko. - Do not enable this unless you are writing code for the i915.ko module. + default n + help + Add -Werror to the build flags for (and only for) i915.ko. + Do not enable this unless you are writing code for the i915.ko module. - Recommended for driver developers only. + Recommended for driver developers only. - If in doubt, say "N". + If in doubt, say "N". config DRM_I915_DEBUG -bool "Enable additional driver debugging" -depends on DRM_I915 -select DEBUG_FS -select PREEMPT_COUNT -select REFCOUNT_FULL -select I2C_CHARDEV -select STACKDEPOT -select DRM_DP_AUX_CHARDEV -select X86_MSR # used by igt/pm_rpm -select DRM_VGEM # used by igt/prime_vgem (dmabuf interop checks) -select DRM_DEBUG_MM if DRM=y + bool "Enable additional driver debugging" + depends on DRM_I915 + select DEBUG_FS + select PREEMPT_COUNT + select REFCOUNT_FULL + select I2C_CHARDEV + select STACKDEPOT + select DRM_DP_AUX_CHARDEV + select X86_MSR # used by igt/pm_rpm + select DRM_VGEM # used by igt/prime_vgem (dmabuf interop checks) + select DRM_DEBUG_MM if DRM=y select DRM_DEBUG_SELFTEST select DMABUF_SELFTESTS select SW_SYNC # signaling validation framework (igt/syncobj*) @@ -36,14 +36,14 @@ config DRM_I915_DEBUG select DRM_I915_SELFTEST select DRM_I915_DEBUG_RUNTIME_PM select DRM_I915_DEBUG_MMIO -default n -help - Choose this option to turn on extra driver debugging that may affect - performance but will catch some internal issues. + default n + help + Choose this option to turn on extra driver debugging that may affect + performance but will catch some internal issues. - Recommended for driver developers only. + Recommended for driver developers only. - If in doubt, say "N". + If in doubt, say "N". config
Re: [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Add Sphinx-compatible references to struct fields
On Mon, Oct 07, 2019 at 02:36:30PM +0300, Jani Nikula wrote:
> On Fri, 04 Oct 2019, Jonathan Neuschäfer wrote:
[...]
> > I'm not sure what's wrong here. The patch applies cleanly to v5.4-rc1
> > and linux-next. Maybe patchwork is applying it to an older base?
>
> On the contrary, to a much newer base. Try drm-tip branch of [1].
>
> BR,
> Jani.
>
> [1] https://cgit.freedesktop.org/drm/drm-tip
Thanks for the hint!
Turns out someone already sent a similar fix, commit 56316cbc9c98
("drm/i915/perf: Fix use of kernel-doc format in structure members").
Jonathan Neuschäfer
signature.asc
Description: PGP signature
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH TRIVIAL v2] gpu: Fix Kconfig indentation
On Mon, 7 Oct 2019 at 18:09, Alex Deucher wrote: > > On Mon, Oct 7, 2019 at 7:39 AM Jani Nikula > wrote: > > > > On Fri, 04 Oct 2019, Krzysztof Kozlowski wrote: > > > drivers/gpu/drm/i915/Kconfig | 12 +- > > > drivers/gpu/drm/i915/Kconfig.debug | 144 +++ > > > > Please split these out to a separate patch. Can't speak for others, but > > the patch looks like it'll be conflicts galore and a problem to manage > > if merged in one big lump. > > Yes, it would be nice to have the amd patch separate as well. I'll split the AMD and i915 although I am not sure if it is sense to split such trivial patch per each driver. Best regards, Krzysztof ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Fixes which failed clean cherry-pick to drm-intel-fixes
Hi Chris,
4 of your fixes failed the clean cherry-pick of drm-intel-fixes.
b647c7df01b7 ("drm/i915: Fixup preempt-to-busy vs resubmission of a virtual
request")
cb2377a919bb ("drm/i915: Fixup preempt-to-busy vs reset of a virtual request")
a4311745bba9 ("drm/i915/userptr: Never allow userptr into the mappable GGTT")
2935ed5339c4 ("drm/i915: Remove logical HW ID")
Is anyone of those critical?
If so, could you please provide a version for drm-intel-fixes?
Thanks,
Rodrigo.
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: customize DPCD brightness control for specific panel
On Mon, 2019-10-07 at 12:08 +0300, Jani Nikula wrote: > The problem with the EDID quirks is that exposing the quirks sticks out > like a sore thumb. Thus far all of it has been contained in drm_edid.c > and they affect how the EDID gets parsed, for all drivers. Obviously > this could be changed, but is it the right thing to do? > > What I suggested was, check the OUI only, and if it matches, do > more. Perhaps there's something in the 0x300 range of DPCD offsets that > you can read? Or perhaps you need to write the source OUI first, and > then do that. My issue isn't really with identifying the panel from EDID rather than DPCD, whichever identifier is most specific is probably the best thing to use. It's more that this quirk is identified in common code but only applied in one driver. If this panel were ever to be attached to some other source, they might well want to apply the same kind of fix. My (admittedly naïve) reading of the OUI handshake process is that when the source device writes an OUI to DP_SOURCE_OUI it is telling the sink "I'm about to issue commands that conform to _this_ vendor's own conventions". If that convention communicates information that is entirely contained within AUXCH transactions (and doesn't, for example, require looking at some other strapping pin or external device) then in principle it doesn't matter if the source device "matches" that OUI; it would be legal for an AMD GPU to write the same sequence and expect the same reaction, should that panel be attached to an AMD GPU. So, it would be nice to know exactly what that protocol is meant to do, if it applies only to this specific panel or anything else with the same TCON, how one would identify such TCONs in the wild other than EDID, if it relies on an external PWM or something, etc. And it might make sense for now to make this a (shudder) driver-specific EDID quirk rather than match by DPCD, at least until we know if the panel is ever seen attached to other source devices and if the OUI convention is self-contained. - ajax ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/vbt: Child device size remains unchanged through VBT 229
On Thu, Oct 03, 2019 at 09:00:20AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/vbt: Child device size remains unchanged through VBT 229 > URL : https://patchwork.freedesktop.org/series/67510/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_6992_full -> Patchwork_14639_full > > > Summary > --- > > **FAILURE** > > Serious unknown changes coming with Patchwork_14639_full absolutely need to > be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_14639_full, please notify your bug team to allow > them > to document this new failure mode, which will reduce false positives in CI. > > > > Possible new issues > --- > > Here are the unknown changes that may have been introduced in > Patchwork_14639_full: > > ### IGT changes ### > > Possible regressions > > * igt@kms_psr@sprite_render: > - shard-skl: [PASS][1] -> [DMESG-WARN][2] >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-skl8/igt@kms_psr@sprite_render.html >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-skl6/igt@kms_psr@sprite_render.html Already captured by https://bugs.freedesktop.org/show_bug.cgi?id=111904 and fixed by Chris. Applied to dinq; thanks Jani for the review. Matt > > > Known issues > > > Here are the changes found in Patchwork_14639_full that come from known > issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_exec_schedule@preempt-hang-vebox: > - shard-apl: [PASS][3] -> [INCOMPLETE][4] ([fdo#103927]) >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-apl8/igt@gem_exec_sched...@preempt-hang-vebox.html >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-apl1/igt@gem_exec_sched...@preempt-hang-vebox.html > > * igt@gem_exec_schedule@preempt-other-chain-bsd: > - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#111325]) +3 similar > issues >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb8/igt@gem_exec_sched...@preempt-other-chain-bsd.html >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-iclb1/igt@gem_exec_sched...@preempt-other-chain-bsd.html > > * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy: > - shard-kbl: [PASS][7] -> [DMESG-WARN][8] ([fdo#111870]) >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-kbl2/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy.html >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-kbl1/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy.html > > * igt@gem_userptr_blits@sync-unmap-cycles: > - shard-snb: [PASS][9] -> [DMESG-WARN][10] ([fdo#111870]) +1 > similar issue >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-snb1/igt@gem_userptr_bl...@sync-unmap-cycles.html >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-snb2/igt@gem_userptr_bl...@sync-unmap-cycles.html > - shard-apl: [PASS][11] -> [DMESG-WARN][12] ([fdo#109385] / > [fdo#111870]) >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-apl4/igt@gem_userptr_bl...@sync-unmap-cycles.html >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-apl1/igt@gem_userptr_bl...@sync-unmap-cycles.html > > * igt@i915_pm_rpm@system-suspend-execbuf: > - shard-skl: [PASS][13] -> [INCOMPLETE][14] ([fdo#104108] / > [fdo#107773] / [fdo#107807]) >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-skl3/igt@i915_pm_...@system-suspend-execbuf.html >[14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-skl5/igt@i915_pm_...@system-suspend-execbuf.html > > * igt@kms_cursor_crc@pipe-a-cursor-128x128-random: > - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#103232]) >[15]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-skl5/igt@kms_cursor_...@pipe-a-cursor-128x128-random.html >[16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-skl1/igt@kms_cursor_...@pipe-a-cursor-128x128-random.html > > * igt@kms_fbcon_fbt@psr-suspend: > - shard-skl: [PASS][17] -> [INCOMPLETE][18] ([fdo#104108]) >[17]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-skl5/igt@kms_fbcon_...@psr-suspend.html >[18]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14639/shard-skl6/igt@kms_fbcon_...@psr-suspend.html > > * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render: > - shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103167]) +5 similar > issues >[19]: >
[Intel-gfx] ✗ Fi.CI.BAT: failure for Add sysfs interface to control class-of-service
== Series Details == Series: Add sysfs interface to control class-of-service URL : https://patchwork.freedesktop.org/series/67700/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14694 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_14694 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_14694, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14694/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_14694: ### IGT changes ### Possible regressions * igt@i915_selftest@live_execlists: - fi-skl-6260u: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-skl-6260u/igt@i915_selftest@live_execlists.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14694/fi-skl-6260u/igt@i915_selftest@live_execlists.html Known issues Here are the changes found in Patchwork_14694 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live_execlists: - fi-icl-u3: [PASS][3] -> [DMESG-FAIL][4] ([fdo#111872]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-icl-u3/igt@i915_selftest@live_execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14694/fi-icl-u3/igt@i915_selftest@live_execlists.html * igt@prime_vgem@basic-read: - fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-icl-u3/igt@prime_v...@basic-read.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14694/fi-icl-u3/igt@prime_v...@basic-read.html Possible fixes * igt@gem_mmap_gtt@basic-write-gtt: - fi-icl-u3: [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-icl-u3/igt@gem_mmap_...@basic-write-gtt.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14694/fi-icl-u3/igt@gem_mmap_...@basic-write-gtt.html * igt@kms_chamelium@dp-edid-read: - fi-kbl-7500u: [WARN][9] ([fdo#109483]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-7500u/igt@kms_chamel...@dp-edid-read.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14694/fi-kbl-7500u/igt@kms_chamel...@dp-edid-read.html [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483 [fdo#111872]: https://bugs.freedesktop.org/show_bug.cgi?id=111872 Participating hosts (52 -> 44) -- Missing(8): fi-ilk-m540 fi-tgl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_7024 -> Patchwork_14694 CI-20190529: 20190529 CI_DRM_7024: b149aba92ace27b28e068c2541270653c23bca75 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14694: c0fc7c3ea79f2cfb9c05e4e26e3cbd76d74652a2 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c0fc7c3ea79f drm/i915/ehl: Add sysfs interface to control class-of-service == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14694/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 04/12] drm/i915/gt: Treat a busy timeline as 'active' while waiting
On 06/10/2019 17:49, Chris Wilson wrote:
If we cannot claim the timeline->mutex while preparing for a wait on it,
we have to skip the timeline. In doing so, treat it as active so that
under a intel_gt_wait_for_idle() loop, we repeat the wait after
scheduling away.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index d69e78478eea..ca606b79fd5e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -34,8 +34,10 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
spin_lock_irqsave(>lock, flags);
list_for_each_entry_safe(tl, tn, >active_list, link) {
- if (!mutex_trylock(>mutex))
+ if (!mutex_trylock(>mutex)) {
+ active_count++; /* report busy to caller, try again? */
continue;
+ }
intel_timeline_get(tl);
GEM_BUG_ON(!tl->active_count);
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_softpin: Replace constant loop with timeout
On 05/10/2019 09:15, Chris Wilson wrote:
Rather than do a fixed amount of work that takes *forever*, run for a
fixed amount of time.
Signed-off-by: Chris Wilson
---
tests/i915/gem_softpin.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index c29097ad3..032056c08 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -102,14 +102,14 @@ static void test_softpin(int fd)
struct drm_i915_gem_exec_object2 object;
uint64_t offset, end;
uint32_t last_handle;
- int loop;
+ unsigned long count = 0;
last_handle = gem_create(fd, size);
memset(, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer();
execbuf.buffer_count = 1;
- for (loop = 0; loop < 1024; loop++) {
+ igt_until_timeout(30) {
memset(, 0, sizeof(object));
object.handle = gem_create(fd, 2*size);
gem_write(fd, object.handle, 0, , sizeof(bbe));
@@ -134,7 +134,9 @@ static void test_softpin(int fd)
}
last_handle = object.handle;
+ count++;
}
+ igt_info("Completd %lu cycles\n", count);
}
static void test_overlap(int fd)
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Retighten timeouts for forced reset
On 05/10/2019 11:55, Chris Wilson wrote: The forced-reset itself should be immediate; it's just the wait after the health check where we appear to have issues! Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/i915/gem_eio.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c index 007b9fb70..7c8ff10df 100644 --- a/tests/i915/gem_eio.c +++ b/tests/i915/gem_eio.c @@ -76,12 +76,15 @@ static void trigger_reset(int fd) igt_kmsg(KMSG_DEBUG "Forcing GPU reset\n"); igt_force_gpu_reset(fd); + /* The forced reset should be immediate */ + igt_assert_lte(igt_seconds_elapsed(), 2); + /* And just check the gpu is indeed running again */ igt_kmsg(KMSG_DEBUG "Checking that the GPU recovered\n"); gem_test_engine(fd, ALL_ENGINES); igt_drop_caches_set(fd, DROP_ACTIVE); - /* We expect forced reset and health check to be quick. */ + /* We expect health check to be quick. */ igt_assert_lte(igt_seconds_elapsed(), 10); } Reviewed-by: Tvrtko Ursulin Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/atomic-helper: Extract drm_atomic_helper_calc_timestamping_constants()
== Series Details ==
Series: series starting with [1/3] drm/atomic-helper: Extract
drm_atomic_helper_calc_timestamping_constants()
URL : https://patchwork.freedesktop.org/series/67681/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7023_full -> Patchwork_14687_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14687_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14687_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14687_full:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_execlists:
- shard-kbl: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-kbl3/igt@i915_selftest@live_execlists.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-kbl2/igt@i915_selftest@live_execlists.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_mmap_gtt@basic-small-copy-xy:
- {shard-tglb}: [PASS][3] -> [INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-tglb3/igt@gem_mmap_...@basic-small-copy-xy.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-tglb7/igt@gem_mmap_...@basic-small-copy-xy.html
Known issues
Here are the changes found in Patchwork_14687_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#110841])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-iclb8/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-iclb4/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
* igt@gem_double_irq_loop:
- shard-apl: [PASS][7] -> [INCOMPLETE][8] ([fdo#103927])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-apl6/igt@gem_double_irq_loop.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-apl2/igt@gem_double_irq_loop.html
* igt@gem_eio@unwedge-stress:
- shard-snb: [PASS][9] -> [FAIL][10] ([fdo#109661])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-snb2/igt@gem_...@unwedge-stress.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-snb7/igt@gem_...@unwedge-stress.html
* igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#111325]) +6 similar
issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-iclb8/igt@gem_exec_sched...@in-order-bsd.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-iclb4/igt@gem_exec_sched...@in-order-bsd.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109276]) +25 similar
issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-iclb2/igt@gem_exec_sched...@preempt-queue-bsd1.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-iclb3/igt@gem_exec_sched...@preempt-queue-bsd1.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [PASS][15] -> [INCOMPLETE][16] ([fdo#104108]) +2
similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-skl2/igt@gem_soft...@noreloc-s3.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-skl6/igt@gem_soft...@noreloc-s3.html
* igt@gem_tiled_swapping@non-threaded:
- shard-hsw: [PASS][17] -> [INCOMPLETE][18] ([fdo#103540] /
[fdo#108686])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-hsw7/igt@gem_tiled_swapp...@non-threaded.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-hsw1/igt@gem_tiled_swapp...@non-threaded.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-snb: [PASS][19] -> [DMESG-WARN][20] ([fdo#111870]) +1
similar issue
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-snb1/igt@gem_userptr_bl...@dmabuf-sync.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-snb2/igt@gem_userptr_bl...@dmabuf-sync.html
* igt@gem_userptr_blits@sync-unmap:
- shard-hsw: [PASS][21] -> [DMESG-WARN][22] ([fdo#111870])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/shard-hsw7/igt@gem_userptr_bl...@sync-unmap.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/shard-hsw1/igt@gem_userptr_bl...@sync-unmap.html
*
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] lib/i915: Bump conservative threshold for ring size
On 07/10/2019 09:27, Chris Wilson wrote: We are still hitting the occasional stall upon submission, so be extra caution and leave one more spare. Signed-off-by: Chris Wilson --- lib/i915/gem_ring.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/i915/gem_ring.c b/lib/i915/gem_ring.c index 272264659..9f099edff 100644 --- a/lib/i915/gem_ring.c +++ b/lib/i915/gem_ring.c @@ -104,7 +104,7 @@ __gem_measure_ring_inflight(int fd, unsigned int engine, enum measure_ring_flags } while (1); igt_assert_eq(__execbuf(fd, ), -EINTR); - igt_assert(count > 1); + igt_assert(count > 2); memset(, 0, sizeof(itv)); setitimer(ITIMER_REAL, , NULL); @@ -120,7 +120,7 @@ __gem_measure_ring_inflight(int fd, unsigned int engine, enum measure_ring_flags gem_quiescent_gpu(fd); /* Be conservative in case we must wrap later */ - return count - 1; + return count - 2; } /** Will one make a difference? Reviewed-by: Tvrtko Ursulin Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET
> -Original Message- > From: Intel-gfx On Behalf Of Abdiel > Janulgue > Sent: Monday, October 7, 2019 2:19 AM > To: intel-gfx@lists.freedesktop.org > Cc: Auld, Matthew > Subject: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce > DRM_I915_GEM_MMAP_OFFSET > > This is really just an alias of mmap_gtt. Add a new CPU mmap > implementation that allows multiple fault handlers that depends on > the object's backing pages. > > Note that we multiplex mmap_gtt and mmap_offset through the same ioctl, > and use the zero extending behaviour of drm to differentiate between > them, when we inspect the flags. > > Signed-off-by: Abdiel Janulgue > Signed-off-by: Matthew Auld > Cc: Joonas Lahtinen > --- > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 36 +-- > .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 ++ > drivers/gpu/drm/i915/i915_drv.c | 2 +- > include/uapi/drm/i915_drm.h | 28 +++ > 4 files changed, 66 insertions(+), 3 deletions(-) How does the label 'offset' fit into this API if it's really about multiple fault handlers? Could do with a much better description here I think. Who would use this, and why, would help a lot. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_userptr: Be defensive when testing userptr capabilities
On 07/10/2019 08:37, Chris Wilson wrote:
Not every device naturally supports snooping and userptr, so be prepared
for the initial probe to fail.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111910
Signed-off-by: Chris Wilson
---
tests/i915/gem_userptr_blits.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 2359c13f4..18e806fed 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -78,12 +78,14 @@ static uint32_t linear[WIDTH*HEIGHT];
static bool has_gtt_mmap(int i915)
{
- void *ptr, *map;
+ void *ptr, *map = NULL;
uint32_t handle;
igt_assert(posix_memalign(, PAGE_SIZE, PAGE_SIZE) == 0);
- gem_userptr(i915, ptr, 4096, 0, 0, );
+ if (__gem_userptr(i915, ptr, 4096, 0,
+ LOCAL_I915_USERPTR_UNSYNCHRONIZED, ))
+ goto out_ptr;
igt_assert(handle != 0);
map = __gem_mmap__gtt(i915, handle, 4096, PROT_WRITE);
@@ -91,6 +93,7 @@ static bool has_gtt_mmap(int i915)
munmap(map, 4096);
gem_close(i915, handle);
+out_ptr:
free(ptr);
return map != NULL;
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add sysfs interface to control class-of-service
== Series Details == Series: Add sysfs interface to control class-of-service URL : https://patchwork.freedesktop.org/series/67700/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/ehl: Add sysfs interface to control class-of-service +drivers/gpu/drm/i915/gt/intel_mocs.c:422:6: warning: symbol 'intel_mocs_init_global' was not declared. Should it be static? ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v8 4/4] drm/mtk: add panel orientation property
On Wed, Sep 25, 2019 at 03:58:33PM -0700, Derek Basehore wrote:
> This inits the panel orientation property for the mediatek dsi driver
> if the panel orientation (connector.display_info.panel_orientation) is
> not DRM_MODE_PANEL_ORIENTATION_UNKNOWN.
>
> Signed-off-by: Derek Basehore
> Acked-by: Sam Ravnborg
> Reviewed-by: CK Hu
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 224afb666881..2936932344eb 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -792,10 +792,18 @@ static int mtk_dsi_create_connector(struct drm_device
> *drm, struct mtk_dsi *dsi)
> DRM_ERROR("Failed to attach panel to drm\n");
> goto err_connector_cleanup;
> }
> +
> + ret = drm_connector_init_panel_orientation_property(>conn);
> + if (ret) {
> + DRM_ERROR("Failed to init panel orientation\n");
> + goto err_panel_detach;
> + }
> }
>
> return 0;
>
> +err_panel_detach:
> + drm_panel_detach(dsi->panel);
> err_connector_cleanup:
> drm_connector_cleanup(>conn);
> return ret;
> --
> 2.23.0.351.gc4317032e6-goog
>
--
Sean Paul, Software Engineer, Google / Chromium OS
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Prefer local path to runtime powermanagement
== Series Details ==
Series: drm/i915/gt: Prefer local path to runtime powermanagement
URL : https://patchwork.freedesktop.org/series/67696/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14693
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_14693 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14693, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14693/index.html
Known issues
Here are the changes found in Patchwork_14693 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][1] -> [FAIL][2] ([fdo#111045] / [fdo#111096])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14693/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@kms_chamelium@dp-edid-read:
- fi-kbl-7500u: [WARN][3] ([fdo#109483]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-7500u/igt@kms_chamel...@dp-edid-read.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14693/fi-kbl-7500u/igt@kms_chamel...@dp-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
Participating hosts (52 -> 22)
--
ERROR: It appears as if the changes made in Patchwork_14693 prevented too
many machines from booting.
Missing(30): fi-kbl-soraka fi-bdw-gvtdvm fi-icl-u2 fi-skl-6260u
fi-apl-guc fi-icl-u3 fi-icl-y fi-byt-n2820 fi-icl-guc fi-snb-2600 fi-cml-u2
fi-icl-u4 fi-tgl-u fi-bsw-n3050 fi-byt-j1900 fi-bwr-2160 fi-ilk-650
fi-skl-6700k2 fi-ilk-m540 fi-skl-guc fi-hsw-4200u fi-hsw-peppy fi-byt-squawks
fi-bsw-cyan fi-cfl-guc fi-kbl-guc fi-skl-iommu fi-kbl-8809g fi-byt-clapper
fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7024 -> Patchwork_14693
CI-20190529: 20190529
CI_DRM_7024: b149aba92ace27b28e068c2541270653c23bca75 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14693: f76add6fb61d064b3afa6fd0ea290084527f61b6 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f76add6fb61d drm/i915/gt: Prefer local path to runtime powermanagement
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14693/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v8 3/4] drm/connector: Split out orientation quirk detection
On Wed, Sep 25, 2019 at 03:58:32PM -0700, Derek Basehore wrote:
> Not every platform needs quirk detection for panel orientation, so
> split the drm_connector_init_panel_orientation_property into two
> functions. One for platforms without the need for quirks, and the
> other for platforms that need quirks.
>
> Signed-off-by: Derek Basehore
> Acked-by: Sam Ravnborg
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/drm_connector.c | 45 ++---
> drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 4 +--
> drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
> include/drm/drm_connector.h | 2 ++
> 5 files changed, 39 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index 4c766624b20d..faef25683faf 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -1989,31 +1989,23 @@ EXPORT_SYMBOL(drm_connector_set_vrr_capable_property);
> * drm_connector_init_panel_orientation_property -
> * initialize the connecters panel_orientation property
> * @connector: connector for which to init the panel-orientation property.
> - * @width: width in pixels of the panel, used for panel quirk detection
> - * @height: height in pixels of the panel, used for panel quirk detection
> *
> * This function should only be called for built-in panels, after setting
> * connector->display_info.panel_orientation first (if known).
> *
> - * This function will check for platform specific (e.g. DMI based) quirks
> - * overriding display_info.panel_orientation first, then if panel_orientation
> - * is not DRM_MODE_PANEL_ORIENTATION_UNKNOWN it will attach the
> - * "panel orientation" property to the connector.
> + * This function will check if the panel_orientation is not
> + * DRM_MODE_PANEL_ORIENTATION_UNKNOWN. If not, it will attach the "panel
> + * orientation" property to the connector.
> *
> * Returns:
> * Zero on success, negative errno on failure.
> */
> int drm_connector_init_panel_orientation_property(
> - struct drm_connector *connector, int width, int height)
> + struct drm_connector *connector)
> {
> struct drm_device *dev = connector->dev;
> struct drm_display_info *info = >display_info;
> struct drm_property *prop;
> - int orientation_quirk;
> -
> - orientation_quirk = drm_get_panel_orientation_quirk(width, height);
> - if (orientation_quirk != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> - info->panel_orientation = orientation_quirk;
>
> if (info->panel_orientation == DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> return 0;
> @@ -2036,6 +2028,35 @@ int drm_connector_init_panel_orientation_property(
> }
> EXPORT_SYMBOL(drm_connector_init_panel_orientation_property);
>
> +/**
> + * drm_connector_init_panel_orientation_property_quirk -
> + * initialize the connecters panel_orientation property with a quirk
> + * override
> + * @connector: connector for which to init the panel-orientation property.
> + * @width: width in pixels of the panel, used for panel quirk detection
> + * @height: height in pixels of the panel, used for panel quirk detection
> + *
> + * This function will check for platform specific (e.g. DMI based) quirks
> + * overriding display_info.panel_orientation first, then if panel_orientation
> + * is not DRM_MODE_PANEL_ORIENTATION_UNKNOWN it will attach the
> + * "panel orientation" property to the connector.
> + *
> + * Returns:
> + * Zero on success, negative errno on failure.
> + */
> +int drm_connector_init_panel_orientation_property_quirk(
> + struct drm_connector *connector, int width, int height)
> +{
> + int orientation_quirk;
> +
> + orientation_quirk = drm_get_panel_orientation_quirk(width, height);
> + if (orientation_quirk != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
> + connector->display_info.panel_orientation = orientation_quirk;
> +
> + return drm_connector_init_panel_orientation_property(connector);
> +}
> +EXPORT_SYMBOL(drm_connector_init_panel_orientation_property_quirk);
> +
> int drm_connector_set_obj_prop(struct drm_mode_object *obj,
> struct drm_property *property,
> uint64_t value)
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 6e398c33a524..483287984090 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1538,7 +1538,7 @@ static void icl_dsi_add_properties(struct
> intel_connector *connector)
>
> connector->base.display_info.panel_orientation =
> intel_dsi_get_panel_orientation(connector);
> - drm_connector_init_panel_orientation_property(>base,
> + drm_connector_init_panel_orientation_property_quirk(>base,
> connector->panel.fixed_mode->hdisplay,
Re: [Intel-gfx] [v8, 2/4] drm/panel: set display info in panel attach
On Mon, Sep 30, 2019 at 04:14:54PM -0700, dbasehore . wrote:
> On Sat, Sep 28, 2019 at 10:23 PM james qian wang (Arm Technology
> China) wrote:
> >
> > On Wed, Sep 25, 2019 at 03:58:31PM -0700, Derek Basehore wrote:
> > > Devicetree systems can set panel orientation via a panel binding, but
> > > there's no way, as is, to propagate this setting to the connector,
> > > where the property need to be added.
> > > To address this, this patch sets orientation, as well as other fixed
> > > values for the panel, in the drm_panel_attach function. These values
> > > are stored from probe in the drm_panel struct.
> > >
> > > Signed-off-by: Derek Basehore
> > > Reviewed-by: Sam Ravnborg
> > > ---
> > > drivers/gpu/drm/drm_panel.c | 28 +
> > > include/drm/drm_panel.h | 50 +
> > > 2 files changed, 78 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
> > > index 0909b53b74e6..1cd2b56c9fe6 100644
> > > --- a/drivers/gpu/drm/drm_panel.c
> > > +++ b/drivers/gpu/drm/drm_panel.c
> > > @@ -104,11 +104,23 @@ EXPORT_SYMBOL(drm_panel_remove);
> > > */
> > > int drm_panel_attach(struct drm_panel *panel, struct drm_connector
> > > *connector)
> > > {
> > > + struct drm_display_info *info;
> > > +
> > > if (panel->connector)
> > > return -EBUSY;
> > >
> > > panel->connector = connector;
> > > panel->drm = connector->dev;
> > > + info = >display_info;
> > > + info->width_mm = panel->width_mm;
> > > + info->height_mm = panel->height_mm;
> > > + info->bpc = panel->bpc;
> > > + info->panel_orientation = panel->orientation;
> > > + info->bus_flags = panel->bus_flags;
> > > + if (panel->bus_formats)
> > > + drm_display_info_set_bus_formats(>display_info,
> > > + panel->bus_formats,
> > > + panel->num_bus_formats);
> > >
> > > return 0;
> > > }
> > > @@ -126,6 +138,22 @@ EXPORT_SYMBOL(drm_panel_attach);
> > > */
> > > void drm_panel_detach(struct drm_panel *panel)
> > > {
> > > + struct drm_display_info *info;
> > > +
> > > + if (!panel->connector)
> > > + goto out;
> > > +
> > > + info = >connector->display_info;
> > > + info->width_mm = 0;
> > > + info->height_mm = 0;
> > > + info->bpc = 0;
> > > + info->panel_orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
> > > + info->bus_flags = 0;
> > > + kfree(info->bus_formats);
> > > + info->bus_formats = NULL;
> > > + info->num_bus_formats = 0;
> > > +
> > > +out:
> > > panel->connector = NULL;
> > > panel->drm = NULL;
> > > }
> > > diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
> > > index d16158deacdc..f3587a54b8ac 100644
> > > --- a/include/drm/drm_panel.h
> > > +++ b/include/drm/drm_panel.h
> > > @@ -141,6 +141,56 @@ struct drm_panel {
> > >*/
> > > const struct drm_panel_funcs *funcs;
> > >
> >
> > All these new added members seems dupliated with drm_display_info,
> > So I think, can we add a new drm_plane_funcs func:
> >
> > int (*set_display_info)(struct drm_panel *panel,
> > struct drm_display_info *info);
>
> I don't disagree personally, since I originally wrote it this way, but
> 2 maintainers, Daniel Vetter and Thierry Reding, requested that it be
> changed. Unless that decision is reversed, I won't be changing this.
>
Reading back the feedback on v1, I don't think anyone said they were against
storing a drm_display_info struct in drm_panel (no one really weighed in on
it one way or another). IMO duplicating a bunch of fields feels pretty icky.
I think most fields in drm_display_info have pretty reasonable defaults, so I'd
recommend just storing a copy in drm_panel. As Thierry suggests, we can
populate the dt parts in probe (orientation) and then copy over all or a subset
of the struct to connector on attach.
Sean
> >
> > Then in drm_panel_attach(), via this interface the specific panel
> > driver can directly set connector->display_info. like
> >
> >...
> >if (panel->funcs && panel->funcs->set_display_info)
> > panel->funcs->unprepare(panel, connector->display_info);
> >...
> >
> > Thanks
> > James
> >
> > > + /**
> > > + * @width_mm:
> > > + *
> > > + * Physical width in mm.
> > > + */
> > > + unsigned int width_mm;
> > > +
> > > + /**
> > > + * @height_mm:
> > > + *
> > > + * Physical height in mm.
> > > + */
> > > + unsigned int height_mm;
> > > +
> > > + /**
> > > + * @bpc:
> > > + *
> > > + * Maximum bits per color channel. Used by HDMI and DP outputs.
> > > + */
> > > + unsigned int bpc;
> > > +
> > > + /**
> > > + * @orientation
> > > + *
> > > + * Installation orientation of the panel with respect to the
> > > chassis.
> > > +
Re: [Intel-gfx] [PATCH v8 1/4] drm/panel: Add helper for reading DT rotation
On Wed, Sep 25, 2019 at 03:58:30PM -0700, Derek Basehore wrote:
> This adds a helper function for reading the rotation (panel
> orientation) from the device tree.
>
> Signed-off-by: Derek Basehore
> Reviewed-by: Sam Ravnborg
The patch LGTM, but I don't see it used anywhere later in the patch? Is there a
panel driver incoming?
Sean
> ---
> drivers/gpu/drm/drm_panel.c | 43 +
> include/drm/drm_panel.h | 9
> 2 files changed, 52 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
> index 6b0bf42039cf..0909b53b74e6 100644
> --- a/drivers/gpu/drm/drm_panel.c
> +++ b/drivers/gpu/drm/drm_panel.c
> @@ -264,6 +264,49 @@ struct drm_panel *of_drm_find_panel(const struct
> device_node *np)
> return ERR_PTR(-EPROBE_DEFER);
> }
> EXPORT_SYMBOL(of_drm_find_panel);
> +
> +/**
> + * of_drm_get_panel_orientation - look up the orientation of the panel
> through
> + * the "rotation" binding from a device tree node
> + * @np: device tree node of the panel
> + * @orientation: orientation enum to be filled in
> + *
> + * Looks up the rotation of a panel in the device tree. The orientation of
> the
> + * panel is expressed as a property name "rotation" in the device tree. The
> + * rotation in the device tree is counter clockwise.
> + *
> + * Return: 0 when a valid rotation value (0, 90, 180, or 270) is read or the
> + * rotation property doesn't exist. -EERROR otherwise.
> + */
> +int of_drm_get_panel_orientation(const struct device_node *np,
> + enum drm_panel_orientation *orientation)
> +{
> + int rotation, ret;
> +
> + ret = of_property_read_u32(np, "rotation", );
> + if (ret == -EINVAL) {
> + /* Don't return an error if there's no rotation property. */
> + *orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
> + return 0;
> + }
> +
> + if (ret < 0)
> + return ret;
> +
> + if (rotation == 0)
> + *orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
> + else if (rotation == 90)
> + *orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
> + else if (rotation == 180)
> + *orientation = DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
> + else if (rotation == 270)
> + *orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
> + else
> + return -EINVAL;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(of_drm_get_panel_orientation);
> #endif
>
> MODULE_AUTHOR("Thierry Reding ");
> diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
> index 624bd15ecfab..d16158deacdc 100644
> --- a/include/drm/drm_panel.h
> +++ b/include/drm/drm_panel.h
> @@ -34,6 +34,8 @@ struct drm_device;
> struct drm_panel;
> struct display_timing;
>
> +enum drm_panel_orientation;
> +
> /**
> * struct drm_panel_funcs - perform operations on a given panel
> *
> @@ -165,11 +167,18 @@ int drm_panel_get_modes(struct drm_panel *panel);
>
> #if defined(CONFIG_OF) && defined(CONFIG_DRM_PANEL)
> struct drm_panel *of_drm_find_panel(const struct device_node *np);
> +int of_drm_get_panel_orientation(const struct device_node *np,
> + enum drm_panel_orientation *orientation);
> #else
> static inline struct drm_panel *of_drm_find_panel(const struct device_node
> *np)
> {
> return ERR_PTR(-ENODEV);
> }
> +static inline int of_drm_get_panel_orientation(const struct device_node *np,
> + enum drm_panel_orientation *orientation)
> +{
> + return -ENODEV;
> +}
> #endif
>
> #endif
> --
> 2.23.0.351.gc4317032e6-goog
>
--
Sean Paul, Software Engineer, Google / Chromium OS
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 0/1] Add sysfs interface to control class-of-service
For GEN11 MOCS are part of context register state. This means updating CLOS also needs to update the context state of active contexts. v3: Rebase v2: Updated the interface to use two sysfs files(Joonas) - Gen12 PCode interface is not ready yet to read the way mask. So removed TGL support and added support for Gen11. - Updating MOCS in Gen 11 also require changing the context image of existing contexts. Referred to gen8_configure_all_contexts() as suggested by Chris. Prathap Kumar Valsan (1): drm/i915/ehl: Add sysfs interface to control class-of-service drivers/gpu/drm/i915/gt/intel_lrc.c | 7 + drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 1 + drivers/gpu/drm/i915/gt/intel_mocs.c| 216 +++- drivers/gpu/drm/i915/gt/intel_mocs.h| 6 +- drivers/gpu/drm/i915/i915_drv.h | 8 + drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/i915_sysfs.c | 100 +++ 7 files changed, 337 insertions(+), 2 deletions(-) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 1/1] drm/i915/ehl: Add sysfs interface to control class-of-service
To provide shared last-level-cache isolation to cpu workloads running
concurrently with gpu workloads, the gpu allocation of cache lines needs
to be restricted to certain ways. Currently GPU hardware supports four
class-of-service(CLOS) levels and there is an associated way-mask for
each CLOS. Each LLC MOCS register has a field to select the clos level.
So in-order to globally set the gpu to a clos level, driver needs
to program entire MOCS table.
Hardware supports reading supported way-mask configuration for GPU using
a bios pcode interface. This interface has two files--llc_clos_modes and
llc_clos. The file llc_clos_modes is read only file and will list the
available way masks. The file llc_clos is read/write and will show the
currently active way mask and writing a new way mask will update the
active way mask of the gpu.
Note of Caution: Restricting cache ways using this mechanism presents a
larger attack surface for side-channel attacks.
Example usage:
> cat /sys/class/drm/card0/llc_clos_modes
0xfff 0xfc0 0xc00 0x800
>cat /sys/class/drm/card0/llc_clos
0xfff
Update to new clos
echo "0x800" > /sys/class/drm/card0/llc_clos
Signed-off-by: Prathap Kumar Valsan
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 7 +
drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 1 +
drivers/gpu/drm/i915/gt/intel_mocs.c| 216 +++-
drivers/gpu/drm/i915/gt/intel_mocs.h| 6 +-
drivers/gpu/drm/i915/i915_drv.h | 8 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/i915_sysfs.c | 100 +++
7 files changed, 337 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 468438fb47af..054051969d00 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2137,6 +2137,13 @@ __execlists_update_reg_state(const struct intel_context
*ce,
intel_sseu_make_rpcs(engine->i915, >sseu);
i915_oa_init_reg_state(ce, engine);
+ /*
+* Gen11+ wants to support update of LLC class-of-service via
+* sysfs interface. CLOS is defined in MOCS registers and for
+* Gen11, MOCS is part of context resgister state.
+*/
+ if (IS_GEN(engine->i915, 11))
+ intel_mocs_init_reg_state(ce);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
index 06ab0276e10e..f07a6262217c 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
+++ b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
@@ -28,6 +28,7 @@
#define CTX_R_PWR_CLK_STATE(0x42 + 1)
#define GEN9_CTX_RING_MI_MODE 0x54
+#define GEN11_CTX_GFX_MOCS_BASE0x4F2
/* GEN12+ Reg State Context */
#define GEN12_CTX_BB_PER_CTX_PTR (0x12 + 1)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 728704bbbe18..a2669bee9b1b 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -26,6 +26,9 @@
#include "intel_gt.h"
#include "intel_mocs.h"
#include "intel_lrc.h"
+#include "intel_lrc_reg.h"
+#include "intel_sideband.h"
+#include "gem/i915_gem_context.h"
/* structures required */
struct drm_i915_mocs_entry {
@@ -40,6 +43,7 @@ struct drm_i915_mocs_table {
const struct drm_i915_mocs_entry *table;
};
+#define ctx_mocsN(N) (GEN11_CTX_GFX_MOCS_BASE + 2 * (N) + 1)
/* Defines for the tables (XXX_MOCS_0 - XXX_MOCS_63) */
#define _LE_CACHEABILITY(value)((value) << 0)
#define _LE_TGT_CACHE(value) ((value) << 2)
@@ -51,6 +55,7 @@ struct drm_i915_mocs_table {
#define LE_SCF(value) ((value) << 14)
#define LE_COS(value) ((value) << 15)
#define LE_SSE(value) ((value) << 17)
+#define LE_COS_MASKGENMASK(16, 15)
/* Defines for the tables (LNCFMOCS0 - LNCFMOCS31) - two entries per word */
#define L3_ESC(value) ((value) << 0)
@@ -377,6 +382,7 @@ void intel_mocs_init_engine(struct intel_engine_cs *engine)
struct intel_gt *gt = engine->gt;
struct intel_uncore *uncore = gt->uncore;
struct drm_i915_mocs_table table;
+ unsigned int active_clos;
unsigned int index;
u32 unused_value;
@@ -390,11 +396,16 @@ void intel_mocs_init_engine(struct intel_engine_cs
*engine)
if (!get_mocs_settings(gt, ))
return;
+ active_clos = engine->i915->clos.active_clos;
/* Set unused values to PTE */
unused_value = table.table[I915_MOCS_PTE].control_value;
+ unused_value &= ~LE_COS_MASK;
+ unused_value |= FIELD_PREP(LE_COS_MASK, active_clos);
for (index = 0; index < table.size; index++) {
u32 value = get_entry_control(, index);
+ value &= ~LE_COS_MASK;
+ value |= FIELD_PREP(LE_COS_MASK, active_clos);
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: make array hw_engine_mask static, makes object smaller
== Series Details ==
Series: drm/i915: make array hw_engine_mask static, makes object smaller
URL : https://patchwork.freedesktop.org/series/67694/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14692
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/index.html
Known issues
Here are the changes found in Patchwork_14692 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-icl-u3/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/fi-icl-u3/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#111407])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_mmap_gtt@basic-write-gtt:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +1
similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-icl-u3/igt@gem_mmap_...@basic-write-gtt.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/fi-icl-u3/igt@gem_mmap_...@basic-write-gtt.html
* igt@i915_selftest@live_hangcheck:
- fi-bsw-n3050: [INCOMPLETE][7] ([fdo#105876]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
* igt@i915_selftest@live_requests:
- {fi-tgl-u}: [INCOMPLETE][9] ([fdo#111867]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-tgl-u/igt@i915_selftest@live_requests.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/fi-tgl-u/igt@i915_selftest@live_requests.html
* igt@kms_chamelium@dp-edid-read:
- fi-kbl-7500u: [WARN][11] ([fdo#109483]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-7500u/igt@kms_chamel...@dp-edid-read.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/fi-kbl-7500u/igt@kms_chamel...@dp-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111867]: https://bugs.freedesktop.org/show_bug.cgi?id=111867
Participating hosts (52 -> 42)
--
Missing(10): fi-kbl-soraka fi-cml-u2 fi-ilk-m540 fi-hsw-4200u
fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-y fi-icl-dsi fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7024 -> Patchwork_14692
CI-20190529: 20190529
CI_DRM_7024: b149aba92ace27b28e068c2541270653c23bca75 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14692: 6c6a1da06540988537551ce00c22314211c68d21 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6c6a1da06540 drm/i915: make array hw_engine_mask static, makes object smaller
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14692/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Prefer local path to runtime powermanagement
== Series Details == Series: drm/i915/gt: Prefer local path to runtime powermanagement URL : https://patchwork.freedesktop.org/series/67696/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/gt: Prefer local path to runtime powermanagement -O:drivers/gpu/drm/i915/gt/intel_reset.c:1252:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +drivers/gpu/drm/i915/gt/intel_reset.c:1252:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: modeset probe/remove cleanup
== Series Details == Series: drm/i915: modeset probe/remove cleanup URL : https://patchwork.freedesktop.org/series/67691/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14691 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_14691 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_14691, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_14691: ### IGT changes ### Possible regressions * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-guc: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-guc: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-skl-guc/igt@i915_module_l...@reload-with-fault-injection.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-skl-guc/igt@i915_module_l...@reload-with-fault-injection.html - fi-cfl-8700k: [PASS][5] -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-6700k2: [PASS][7] -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html - fi-blb-e6850: [PASS][9] -> [INCOMPLETE][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-blb-e6850/igt@i915_module_l...@reload-with-fault-injection.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-blb-e6850/igt@i915_module_l...@reload-with-fault-injection.html - fi-bwr-2160:[PASS][11] -> [INCOMPLETE][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-bwr-2160/igt@i915_module_l...@reload-with-fault-injection.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-bwr-2160/igt@i915_module_l...@reload-with-fault-injection.html - fi-kbl-guc: [PASS][13] -> [INCOMPLETE][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-guc/igt@i915_module_l...@reload-with-fault-injection.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-kbl-guc/igt@i915_module_l...@reload-with-fault-injection.html - fi-cfl-8109u: [PASS][15] -> [INCOMPLETE][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-cfl-8109u/igt@i915_module_l...@reload-with-fault-injection.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-cfl-8109u/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-lmem:[PASS][17] -> [INCOMPLETE][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html - fi-kbl-r: [PASS][19] -> [INCOMPLETE][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-r/igt@i915_module_l...@reload-with-fault-injection.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-kbl-r/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-6260u: [PASS][21] -> [INCOMPLETE][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-skl-6260u/igt@i915_module_l...@reload-with-fault-injection.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-skl-6260u/igt@i915_module_l...@reload-with-fault-injection.html - fi-hsw-4770:[PASS][23] -> [INCOMPLETE][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-hsw-4770/igt@i915_module_l...@reload-with-fault-injection.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14691/fi-hsw-4770/igt@i915_module_l...@reload-with-fault-injection.html - fi-whl-u: [PASS][25] -> [INCOMPLETE][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-whl-u/igt@i915_module_l...@reload-with-fault-injection.html [26]:
Re: [Intel-gfx] [PATCH] drm/i915: make array hw_engine_mask static, makes object smaller
Quoting Colin King (2019-10-07 16:41:51) > From: Colin Ian King > > Don't populate the array hw_engine_mask on the stack but instead make it > static. Makes the object code smaller by 316 bytes. > > Before: >textdata bss dec hex filename > 340044388 320 387129738 gpu/drm/i915/gt/intel_reset.o > > After: >textdata bss dec hex filename > 335284548 320 3839695fc gpu/drm/i915/gt/intel_reset.o > > (gcc version 9.2.1, amd64) > > Signed-off-by: Colin Ian King Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/selftests: Appease lockdep
On 04/10/2019 21:31, Chris Wilson wrote:
Disable irqs around updating the context image to keep lockdep happy:
<4>[ 673.483340] WARNING: possible irq lock inversion dependency detected
<4>[ 673.483342] 5.4.0-rc1-CI-Trybot_5118+ #1 Tainted: G U
<4>[ 673.483342]
<4>[ 673.483343] swapper/2/0 just changed the state of lock:
<4>[ 673.483344] 88845db885a0 (_request_get(rq)->submit/1){-...}, at:
__i915_sw_fence_complete+0x1b2/0x250 [i915]
<4>[ 673.483387] but this lock took another, HARDIRQ-unsafe lock in the past:
<4>[ 673.483388] (>pin_mutex/2){+...}
<4>[ 673.483389]
and interrupts could create inverse lock ordering between
them.
<4>[ 673.483390]
other info that might help us debug this:
<4>[ 673.483390] Chain exists of:
_request_get(rq)->submit/1 --> >active.lock -->
>pin_mutex/2
<4>[ 673.483392] Possible interrupt unsafe locking scenario:
<4>[ 673.483392]CPU0CPU1
<4>[ 673.483393]
<4>[ 673.483393] lock(>pin_mutex/2);
<4>[ 673.483394]local_irq_disable();
<4>[ 673.483395]
lock(_request_get(rq)->submit/1);
<4>[ 673.483396]lock(>active.lock);
<4>[ 673.483396]
<4>[ 673.483397] lock(_request_get(rq)->submit/1);
<4>[ 673.483398]
*** DEADLOCK ***
<4>[ 673.483398] 2 locks held by swapper/2/0:
<4>[ 673.483399] #0: 8883f61ac9b0 (&(>irq_lock)->rlock){-.-.}, at:
gen11_gt_irq_handler+0x42/0x280 [i915]
<4>[ 673.483433] #1: 88845db8c418 (&(>lock)->rlock){-.-.}, at:
intel_engine_breadcrumbs_irq+0x34a/0x5a0 [i915]
<4>[ 673.483463]
the shortest dependencies between 2nd lock and 1st lock:
<4>[ 673.483466] -> (>pin_mutex/2){+...} ops: 614520 {
<4>[ 673.483468] HARDIRQ-ON-W at:
<4>[ 673.483471] lock_acquire+0xa7/0x1c0
<4>[ 673.483501] live_unlite_restore+0x1d8/0x6c0 [i915]
<4>[ 673.483543] __i915_subtests+0xb8/0x210 [i915]
<4>[ 673.483581] __run_selftests+0x112/0x170 [i915]
<4>[ 673.483615] i915_live_selftests+0x2c/0x60 [i915]
<4>[ 673.483644] i915_pci_probe+0x93/0x1b0 [i915]
<4>[ 673.483646] pci_device_probe+0x9e/0x120
<4>[ 673.483648] really_probe+0xea/0x420
<4>[ 673.483649] driver_probe_device+0x10b/0x120
<4>[ 673.483651] device_driver_attach+0x4a/0x50
<4>[ 673.483652] __driver_attach+0x97/0x130
<4>[ 673.483653] bus_for_each_dev+0x74/0xc0
<4>[ 673.483654] bus_add_driver+0x142/0x220
<4>[ 673.483655] driver_register+0x56/0xf0
<4>[ 673.483657] do_one_initcall+0x58/0x2ff
<4>[ 673.483659] do_init_module+0x56/0x1f8
<4>[ 673.483660] load_module+0x243e/0x29f0
<4>[ 673.483661] __do_sys_finit_module+0xe9/0x110
<4>[ 673.483662] do_syscall_64+0x4f/0x210
<4>[ 673.483665]
entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4>[ 673.483665] INITIAL USE at:
<4>[ 673.483667]lock_acquire+0xa7/0x1c0
<4>[ 673.483698]live_unlite_restore+0x1d8/0x6c0 [i915]
<4>[ 673.483733]__i915_subtests+0xb8/0x210 [i915]
<4>[ 673.483764]__run_selftests+0x112/0x170 [i915]
<4>[ 673.483793]i915_live_selftests+0x2c/0x60 [i915]
<4>[ 673.483821]i915_pci_probe+0x93/0x1b0 [i915]
<4>[ 673.483822]pci_device_probe+0x9e/0x120
<4>[ 673.483824]really_probe+0xea/0x420
<4>[ 673.483825]driver_probe_device+0x10b/0x120
<4>[ 673.483826]device_driver_attach+0x4a/0x50
<4>[ 673.483827]__driver_attach+0x97/0x130
<4>[ 673.483828]bus_for_each_dev+0x74/0xc0
<4>[ 673.483829]bus_add_driver+0x142/0x220
<4>[ 673.483830]driver_register+0x56/0xf0
<4>[ 673.483831]do_one_initcall+0x58/0x2ff
<4>[ 673.483833]do_init_module+0x56/0x1f8
<4>[ 673.483834]load_module+0x243e/0x29f0
<4>[ 673.483835]__do_sys_finit_module+0xe9/0x110
<4>[ 673.483836]do_syscall_64+0x4f/0x210
<4>[ 673.483837]
entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4>[ 673.483838]}
<4>[ 673.483868]... key at: []
__key.70113+0x2/0xffef2ed0 [i915]
<4>[
Re: [Intel-gfx] [PATCH] drm/i915/execlists: Fix annotation for decoupling virtual request
On 04/10/2019 20:47, Chris Wilson wrote:
As we may signal a request and take the engine->active.lock within the
signaler, the engine submission paths have to use a nested annotation on
their requests -- but we guarantee that we can never submit on the same
engine as the signaling fence.
<4>[ 723.763281] WARNING: possible circular locking dependency detected
<4>[ 723.763285] 5.3.0-g80fa0e042cdb-drmtip_379+ #1 Tainted: G U
<4>[ 723.763288] --
<4>[ 723.763291] gem_exec_await/1388 is trying to acquire lock:
<4>[ 723.763294] 93a7b53221d8 (>active.lock){..-.}, at:
execlists_submit_request+0x2b/0x1e0 [i915]
<4>[ 723.763378]
but task is already holding lock:
<4>[ 723.763381] 93a7c25f6d20 (_request_get(rq)->submit/1){-.-.}, at:
__i915_sw_fence_complete+0x1b2/0x250 [i915]
<4>[ 723.763420]
which lock already depends on the new lock.
<4>[ 723.763423]
the existing dependency chain (in reverse order) is:
<4>[ 723.763427]
-> #2 (_request_get(rq)->submit/1){-.-.}:
<4>[ 723.763434]_raw_spin_lock_irqsave_nested+0x39/0x50
<4>[ 723.763478]__i915_sw_fence_complete+0x1b2/0x250 [i915]
<4>[ 723.763513]intel_engine_breadcrumbs_irq+0x3aa/0x5e0 [i915]
<4>[ 723.763600]cs_irq_handler+0x49/0x50 [i915]
<4>[ 723.763659]gen11_gt_irq_handler+0x17b/0x280 [i915]
<4>[ 723.763690]gen11_irq_handler+0x54/0xf0 [i915]
<4>[ 723.763695]__handle_irq_event_percpu+0x41/0x2d0
<4>[ 723.763699]handle_irq_event_percpu+0x2b/0x70
<4>[ 723.763702]handle_irq_event+0x2f/0x50
<4>[ 723.763706]handle_edge_irq+0xee/0x1a0
<4>[ 723.763709]do_IRQ+0x7e/0x160
<4>[ 723.763712]ret_from_intr+0x0/0x1d
<4>[ 723.763717]__slab_alloc.isra.28.constprop.33+0x4f/0x70
<4>[ 723.763720]kmem_cache_alloc+0x28d/0x2f0
<4>[ 723.763724]vm_area_dup+0x15/0x40
<4>[ 723.763727]dup_mm+0x2dd/0x550
<4>[ 723.763730]copy_process+0xf21/0x1ef0
<4>[ 723.763734]_do_fork+0x71/0x670
<4>[ 723.763737]__se_sys_clone+0x6e/0xa0
<4>[ 723.763741]do_syscall_64+0x4f/0x210
<4>[ 723.763744]entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4>[ 723.763747]
-> #1 (&(>lock)->rlock#2){-.-.}:
<4>[ 723.763752]_raw_spin_lock+0x2a/0x40
<4>[ 723.763789]__unwind_incomplete_requests+0x3eb/0x450 [i915]
<4>[ 723.763825]__execlists_submission_tasklet+0x9ec/0x1d60 [i915]
<4>[ 723.763864]execlists_submission_tasklet+0x34/0x50 [i915]
<4>[ 723.763874]tasklet_action_common.isra.5+0x47/0xb0
<4>[ 723.763878]__do_softirq+0xd8/0x4ae
<4>[ 723.763881]irq_exit+0xa9/0xc0
<4>[ 723.763883]smp_apic_timer_interrupt+0xb7/0x280
<4>[ 723.763887]apic_timer_interrupt+0xf/0x20
<4>[ 723.763892]cpuidle_enter_state+0xae/0x450
<4>[ 723.763895]cpuidle_enter+0x24/0x40
<4>[ 723.763899]do_idle+0x1e7/0x250
<4>[ 723.763902]cpu_startup_entry+0x14/0x20
<4>[ 723.763905]start_secondary+0x15f/0x1b0
<4>[ 723.763908]secondary_startup_64+0xa4/0xb0
<4>[ 723.763911]
-> #0 (>active.lock){..-.}:
<4>[ 723.763916]__lock_acquire+0x15d8/0x1ea0
<4>[ 723.763919]lock_acquire+0xa6/0x1c0
<4>[ 723.763922]_raw_spin_lock_irqsave+0x33/0x50
<4>[ 723.763956]execlists_submit_request+0x2b/0x1e0 [i915]
<4>[ 723.764002]submit_notify+0xa8/0x13c [i915]
<4>[ 723.764035]__i915_sw_fence_complete+0x81/0x250 [i915]
<4>[ 723.764054]i915_sw_fence_wake+0x51/0x64 [i915]
<4>[ 723.764054]__i915_sw_fence_complete+0x1ee/0x250 [i915]
<4>[ 723.764054]dma_i915_sw_fence_wake_timer+0x14/0x20 [i915]
<4>[ 723.764054]dma_fence_signal_locked+0x9e/0x1c0
<4>[ 723.764054]dma_fence_signal+0x1f/0x40
<4>[ 723.764054]vgem_fence_signal_ioctl+0x67/0xc0 [vgem]
<4>[ 723.764054]drm_ioctl_kernel+0x83/0xf0
<4>[ 723.764054]drm_ioctl+0x2f3/0x3b0
<4>[ 723.764054]do_vfs_ioctl+0xa0/0x6f0
<4>[ 723.764054]ksys_ioctl+0x35/0x60
<4>[ 723.764054]__x64_sys_ioctl+0x11/0x20
<4>[ 723.764054]do_syscall_64+0x4f/0x210
<4>[ 723.764054]entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4>[ 723.764054]
other info that might help us debug this:
<4>[ 723.764054] Chain exists of:
>active.lock --> &(>lock)->rlock#2 -->
_request_get(rq)->submit/1
<4>[ 723.764054] Possible unsafe locking scenario:
<4>[ 723.764054]CPU0CPU1
<4>[ 723.764054]
<4>[ 723.764054] lock(_request_get(rq)->submit/1);
<4>[ 723.764054]lock(&(>lock)->rlock#2);
<4>[ 723.764054]
lock(_request_get(rq)->submit/1);
<4>[ 723.764054]
Re: [Intel-gfx] [PATCH TRIVIAL v2] gpu: Fix Kconfig indentation
On Mon, Oct 7, 2019 at 7:39 AM Jani Nikula wrote: > > On Fri, 04 Oct 2019, Krzysztof Kozlowski wrote: > > drivers/gpu/drm/i915/Kconfig | 12 +- > > drivers/gpu/drm/i915/Kconfig.debug | 144 +++ > > Please split these out to a separate patch. Can't speak for others, but > the patch looks like it'll be conflicts galore and a problem to manage > if merged in one big lump. Yes, it would be nice to have the amd patch separate as well. Alex > > BR, > Jani. > > > -- > Jani Nikula, Intel Open Source Graphics Center > ___ > amd-gfx mailing list > amd-...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/gt: Prefer local path to runtime powermanagement
On 07/10/2019 16:45, Chris Wilson wrote:
Avoid going to the base i915 device when we already have a path from gt
to the runtime powermanagement interface. The benefit is that it looks a
bit more self-consistent to always be acquiring the gt->uncore->rpm for
use with the gt->uncore.
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_context.c| 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 7 +++
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_hangcheck.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_reset.c | 6 +++---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_reset.c | 8
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 4 ++--
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 3 +--
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c| 6 +++---
14 files changed, 28 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index be34d97ac18f..1225c4b8e9aa 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -62,7 +62,7 @@ int __intel_context_do_pin(struct intel_context *ce)
}
err = 0;
- with_intel_runtime_pm(>engine->i915->runtime_pm, wakeref)
+ with_intel_runtime_pm(ce->engine->gt->uncore->rpm, wakeref)
err = ce->ops->pin(ce);
if (err)
goto err;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 80fd072ac719..d10d13d0282f 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1458,10 +1458,10 @@ void intel_engine_dump(struct intel_engine_cs *engine,
spin_unlock_irqrestore(>active.lock, flags);
drm_printf(m, "\tMMIO base: 0x%08x\n", engine->mmio_base);
- wakeref = intel_runtime_pm_get_if_in_use(>i915->runtime_pm);
+ wakeref = intel_runtime_pm_get_if_in_use(engine->gt->uncore->rpm);
if (wakeref) {
intel_engine_print_registers(engine, m);
- intel_runtime_pm_put(>i915->runtime_pm, wakeref);
+ intel_runtime_pm_put(engine->gt->uncore->rpm, wakeref);
} else {
drm_printf(m, "\tDevice is asleep; skipping register dump\n");
}
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 8e5e513eddc9..43fc7ce3f54e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -185,7 +185,7 @@ static const struct intel_wakeref_ops wf_ops = {
void intel_engine_init__pm(struct intel_engine_cs *engine)
{
- struct intel_runtime_pm *rpm = >i915->runtime_pm;
+ struct intel_runtime_pm *rpm = engine->gt->uncore->rpm;
intel_wakeref_init(>wakeref, rpm, _ops);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8f44cf8c79b2..b3619a2a5d0e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -273,7 +273,7 @@ void intel_gt_check_and_clear_faults(struct intel_gt *gt)
void intel_gt_flush_ggtt_writes(struct intel_gt *gt)
{
- struct drm_i915_private *i915 = gt->i915;
+ struct intel_uncore *uncore = gt->uncore;
intel_wakeref_t wakeref;
/*
@@ -297,13 +297,12 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt)
wmb();
- if (INTEL_INFO(i915)->has_coherent_ggtt)
+ if (INTEL_INFO(gt->i915)->has_coherent_ggtt)
return;
intel_gt_chipset_flush(gt);
- with_intel_runtime_pm(>runtime_pm, wakeref) {
- struct intel_uncore *uncore = gt->uncore;
+ with_intel_runtime_pm(uncore->rpm, wakeref) {
unsigned long flags;
spin_lock_irqsave(>lock, flags);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index b52e2ba3d092..87e34e0b6427 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -94,7 +94,7 @@ static const struct intel_wakeref_ops wf_ops = {
void intel_gt_pm_init_early(struct intel_gt *gt)
{
- intel_wakeref_init(>wakeref, >i915->runtime_pm, _ops);
+ intel_wakeref_init(>wakeref, gt->uncore->rpm, _ops);
BLOCKING_INIT_NOTIFIER_HEAD(>pm_notifications);
}
@@ -222,7 +222,7 @@ void intel_gt_suspend(struct intel_gt *gt)
/* We expect to be idle already; but also want to be independent */
wait_for_idle(gt);
-
[Intel-gfx] [PATCH] drm/i915/gt: Prefer local path to runtime powermanagement
Avoid going to the base i915 device when we already have a path from gt
to the runtime powermanagement interface. The benefit is that it looks a
bit more self-consistent to always be acquiring the gt->uncore->rpm for
use with the gt->uncore.
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_context.c| 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 7 +++
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_hangcheck.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_reset.c | 6 +++---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_reset.c | 8
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 4 ++--
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 3 +--
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c| 6 +++---
14 files changed, 28 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index be34d97ac18f..1225c4b8e9aa 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -62,7 +62,7 @@ int __intel_context_do_pin(struct intel_context *ce)
}
err = 0;
- with_intel_runtime_pm(>engine->i915->runtime_pm, wakeref)
+ with_intel_runtime_pm(ce->engine->gt->uncore->rpm, wakeref)
err = ce->ops->pin(ce);
if (err)
goto err;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 80fd072ac719..d10d13d0282f 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1458,10 +1458,10 @@ void intel_engine_dump(struct intel_engine_cs *engine,
spin_unlock_irqrestore(>active.lock, flags);
drm_printf(m, "\tMMIO base: 0x%08x\n", engine->mmio_base);
- wakeref = intel_runtime_pm_get_if_in_use(>i915->runtime_pm);
+ wakeref = intel_runtime_pm_get_if_in_use(engine->gt->uncore->rpm);
if (wakeref) {
intel_engine_print_registers(engine, m);
- intel_runtime_pm_put(>i915->runtime_pm, wakeref);
+ intel_runtime_pm_put(engine->gt->uncore->rpm, wakeref);
} else {
drm_printf(m, "\tDevice is asleep; skipping register dump\n");
}
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 8e5e513eddc9..43fc7ce3f54e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -185,7 +185,7 @@ static const struct intel_wakeref_ops wf_ops = {
void intel_engine_init__pm(struct intel_engine_cs *engine)
{
- struct intel_runtime_pm *rpm = >i915->runtime_pm;
+ struct intel_runtime_pm *rpm = engine->gt->uncore->rpm;
intel_wakeref_init(>wakeref, rpm, _ops);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8f44cf8c79b2..b3619a2a5d0e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -273,7 +273,7 @@ void intel_gt_check_and_clear_faults(struct intel_gt *gt)
void intel_gt_flush_ggtt_writes(struct intel_gt *gt)
{
- struct drm_i915_private *i915 = gt->i915;
+ struct intel_uncore *uncore = gt->uncore;
intel_wakeref_t wakeref;
/*
@@ -297,13 +297,12 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt)
wmb();
- if (INTEL_INFO(i915)->has_coherent_ggtt)
+ if (INTEL_INFO(gt->i915)->has_coherent_ggtt)
return;
intel_gt_chipset_flush(gt);
- with_intel_runtime_pm(>runtime_pm, wakeref) {
- struct intel_uncore *uncore = gt->uncore;
+ with_intel_runtime_pm(uncore->rpm, wakeref) {
unsigned long flags;
spin_lock_irqsave(>lock, flags);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index b52e2ba3d092..87e34e0b6427 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -94,7 +94,7 @@ static const struct intel_wakeref_ops wf_ops = {
void intel_gt_pm_init_early(struct intel_gt *gt)
{
- intel_wakeref_init(>wakeref, >i915->runtime_pm, _ops);
+ intel_wakeref_init(>wakeref, gt->uncore->rpm, _ops);
BLOCKING_INIT_NOTIFIER_HEAD(>pm_notifications);
}
@@ -222,7 +222,7 @@ void intel_gt_suspend(struct intel_gt *gt)
/* We expect to be idle already; but also want to be independent */
wait_for_idle(gt);
- with_intel_runtime_pm(>i915->runtime_pm, wakeref)
+
[Intel-gfx] [PATCH] drm/i915: make array hw_engine_mask static, makes object smaller
From: Colin Ian King
Don't populate the array hw_engine_mask on the stack but instead make it
static. Makes the object code smaller by 316 bytes.
Before:
textdata bss dec hex filename
340044388 320 387129738 gpu/drm/i915/gt/intel_reset.o
After:
textdata bss dec hex filename
335284548 320 3839695fc gpu/drm/i915/gt/intel_reset.o
(gcc version 9.2.1, amd64)
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/gt/intel_reset.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index eeb3bd0c4d69..db58ca9bee3a 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -285,7 +285,7 @@ static int gen6_reset_engines(struct intel_gt *gt,
unsigned int retry)
{
struct intel_engine_cs *engine;
- const u32 hw_engine_mask[] = {
+ static const u32 hw_engine_mask[] = {
[RCS0] = GEN6_GRDOM_RENDER,
[BCS0] = GEN6_GRDOM_BLT,
[VCS0] = GEN6_GRDOM_MEDIA,
@@ -408,7 +408,7 @@ static int gen11_reset_engines(struct intel_gt *gt,
intel_engine_mask_t engine_mask,
unsigned int retry)
{
- const u32 hw_engine_mask[] = {
+ static const u32 hw_engine_mask[] = {
[RCS0] = GEN11_GRDOM_RENDER,
[BCS0] = GEN11_GRDOM_BLT,
[VCS0] = GEN11_GRDOM_MEDIA,
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: modeset probe/remove cleanup
== Series Details == Series: drm/i915: modeset probe/remove cleanup URL : https://patchwork.freedesktop.org/series/67691/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4f485ace7f46 drm/i915: register vga switcheroo later, unregister earlier 4cea63d24b5c drm/i915: switch i915_driver_probe() to use i915 local variable 2a73bb27fbc4 drm/i915: keep power domains init/remove calls at the same level 247360baa07e drm/i915: split intel_modeset_driver_remove() to pre/post irq uninstall 5032d68c656d drm/i915: split i915_driver_modeset_remove() to pre/post irq uninstall e83d085ced9a drm/i915: split i915_driver_modeset_probe() to pre/post irq install 6d6664633090 drm/i915: split intel_modeset_init() to pre/post irq install 69c89a6bb40d drm/i915: split intel_modeset_init() pre/post gem init 528fb2a4b001 drm/i915: move more display related probe/remove stuff to display 499509716c59 drm/i915: move modeset probe failures down to intel_display.c 5d53e56521e8 drm/i915: remove the now redundant i915_driver_modeset_* call layer -:91: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a separate line #91: FILE: drivers/gpu/drm/i915/i915_drv.c:1426: +* working irqs for e.g. gmbus and dp aux transfers. */ total: 0 errors, 1 warnings, 0 checks, 111 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
URL : https://patchwork.freedesktop.org/series/67689/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7024 -> Patchwork_14690
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/index.html
Known issues
Here are the changes found in Patchwork_14690 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_basic@create-fd-close:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-icl-u3/igt@gem_ba...@create-fd-close.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/fi-icl-u3/igt@gem_ba...@create-fd-close.html
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] /
[fdo#109100])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
* igt@i915_selftest@live_hangcheck:
- fi-cml-u2: [PASS][5] -> [INCOMPLETE][6] ([fdo#110566])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-cml-u2/igt@i915_selftest@live_hangcheck.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/fi-cml-u2/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][7] -> [FAIL][8] ([fdo#111407])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@i915_selftest@live_hangcheck:
- fi-bsw-n3050: [INCOMPLETE][9] ([fdo#105876]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/fi-bsw-n3050/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@dp-edid-read:
- fi-kbl-7500u: [WARN][11] ([fdo#109483]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7024/fi-kbl-7500u/igt@kms_chamel...@dp-edid-read.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/fi-kbl-7500u/igt@kms_chamel...@dp-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111880]: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Participating hosts (52 -> 45)
--
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y
fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7024 -> Patchwork_14690
CI-20190529: 20190529
CI_DRM_7024: b149aba92ace27b28e068c2541270653c23bca75 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14690: 932d16e56d324e73dc1a39f3835b711cf7cde44f @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
932d16e56d32 drm/i915/perf: Set the exclusive stream under perf->lock
c449e123f41b drm/i915/perf: Wean ourselves off dev_priv
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14690/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 11/11] drm/i915: remove the now redundant i915_driver_modeset_* call layer
Quoting Jani Nikula (2019-10-07 16:09:36)
> The i915_driver_modeset_*() functions have become irrelevant, and the
> extra layer can be removed.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_drv.c | 76 +
> 1 file changed, 19 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 5a778944d7a8..2e19e70b3963 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -269,58 +269,6 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
> release_resource(_priv->mch_res);
> }
>
> -/* part #1: call before irq install */
> -static int i915_driver_modeset_probe_noirq(struct drm_i915_private *i915)
> -{
> - return intel_modeset_init_noirq(i915);
> -}
> -
> -/* part #2: call after irq install */
> -static int i915_driver_modeset_probe(struct drm_i915_private *i915)
> -{
> - int ret;
> -
> - /* Important: The output setup functions called by modeset_init need
> -* working irqs for e.g. gmbus and dp aux transfers. */
> - ret = intel_modeset_init_nogem(i915);
> - if (ret)
> - goto out;
> -
> - ret = i915_gem_init(i915);
> - if (ret)
> - goto cleanup_modeset;
> -
> - ret = intel_modeset_init(i915);
> - if (ret)
> - goto cleanup_gem;
> -
> - return 0;
> -
> -cleanup_gem:
> - i915_gem_suspend(i915);
> - i915_gem_driver_remove(i915);
> - i915_gem_driver_release(i915);
> -cleanup_modeset:
> - /* FIXME */
> - intel_modeset_driver_remove(i915);
> - intel_irq_uninstall(i915);
> - intel_modeset_driver_remove_noirq(i915);
> -out:
> - return ret;
> -}
> -
> -/* part #1: call before irq uninstall */
> -static void i915_driver_modeset_remove(struct drm_i915_private *i915)
> -{
> - intel_modeset_driver_remove(i915);
> -}
> -
> -/* part #2: call after irq uninstall */
> -static void i915_driver_modeset_remove_noirq(struct drm_i915_private *i915)
> -{
> - intel_modeset_driver_remove_noirq(i915);
> -}
> -
> static void intel_init_dpio(struct drm_i915_private *dev_priv)
> {
> /*
> @@ -1466,7 +1414,7 @@ int i915_driver_probe(struct pci_dev *pdev, const
> struct pci_device_id *ent)
>
> intel_power_domains_init_hw(i915, false);
>
> - ret = i915_driver_modeset_probe_noirq(i915);
> + ret = intel_modeset_init_noirq(i915);
> if (ret < 0)
> goto out_cleanup_hw;
>
> @@ -1474,10 +1422,20 @@ int i915_driver_probe(struct pci_dev *pdev, const
> struct pci_device_id *ent)
> if (ret)
> goto out_cleanup_modeset;
>
> - ret = i915_driver_modeset_probe(i915);
> - if (ret < 0)
> + /* Important: The output setup functions called by modeset_init need
> +* working irqs for e.g. gmbus and dp aux transfers. */
> + ret = intel_modeset_init_nogem(i915);
> + if (ret)
> goto out_cleanup_irq;
>
> + ret = i915_gem_init(i915);
> + if (ret)
> + goto out_cleanup_modeset;
> +
> + ret = intel_modeset_init(i915);
> + if (ret)
> + goto out_cleanup_gem;
Fwiw, I'm really digging the nomenclature, and I think it is the biggest
advance made in sorting out the init sequence.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for DC3CO Support for TGL test with DC3CO IGT (rev2)
== Series Details ==
Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
URL : https://patchwork.freedesktop.org/series/67525/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_14686:
### IGT changes ###
Possible regressions
* {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
- {fi-icl-dsi}: NOTRUN -> [SKIP][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-dsi/igt@i915_pm...@dc3co-vpb-simulation.html
- {fi-icl-guc}: NOTRUN -> [SKIP][2]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-guc/igt@i915_pm...@dc3co-vpb-simulation.html
- {fi-icl-u4}:NOTRUN -> [SKIP][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u4/igt@i915_pm...@dc3co-vpb-simulation.html
- fi-icl-u2: NOTRUN -> [SKIP][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u2/igt@i915_pm...@dc3co-vpb-simulation.html
- fi-cml-u2: NOTRUN -> [SKIP][5]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-u2/igt@i915_pm...@dc3co-vpb-simulation.html
- {fi-cml-s}: NOTRUN -> [SKIP][6]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-s/igt@i915_pm...@dc3co-vpb-simulation.html
- fi-icl-u3: NOTRUN -> [SKIP][7]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@i915_pm...@dc3co-vpb-simulation.html
New tests
-
New tests have been introduced between CI_DRM_7021 and Patchwork_14686:
### New IGT tests (1) ###
* igt@i915_pm_dc@dc3co-vpb-simulation:
- Statuses : 1 pass(s) 44 skip(s)
- Exec time: [0.0, 4.04] s
Known issues
Here are the changes found in Patchwork_14686 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_mmap_gtt@basic-read-write-distinct:
- fi-icl-u3: [PASS][8] -> [DMESG-WARN][9] ([fdo#107724]) +1
similar issue
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_...@basic-read-write-distinct.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_mmap_...@basic-read-write-distinct.html
* igt@i915_selftest@live_execlists:
- fi-cfl-8109u: [PASS][10] -> [DMESG-FAIL][11] ([fdo#111872])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
Possible fixes
* igt@gem_ctx_create@basic-files:
- {fi-tgl-u}: [INCOMPLETE][12] ([fdo#111735]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-tgl-u/igt@gem_ctx_cre...@basic-files.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-tgl-u/igt@gem_ctx_cre...@basic-files.html
* igt@gem_exec_suspend@basic:
- fi-icl-u3: [FAIL][14] ([fdo#111699]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_exec_susp...@basic.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_exec_susp...@basic.html
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- fi-icl-u3: [DMESG-WARN][16] ([fdo#107724]) -> [PASS][17] +1
similar issue
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_...@basic-small-bo-tiledy.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_mmap_...@basic-small-bo-tiledy.html
* igt@i915_selftest@live_execlists:
- fi-icl-u3: [DMESG-WARN][18] -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@i915_selftest@live_execlists.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@i915_selftest@live_execlists.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][20] ([fdo#102614]) -> [PASS][21]
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
[fdo#111735]:
[Intel-gfx] [PATCH 11/11] drm/i915: remove the now redundant i915_driver_modeset_* call layer
The i915_driver_modeset_*() functions have become irrelevant, and the
extra layer can be removed.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 76 +
1 file changed, 19 insertions(+), 57 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5a778944d7a8..2e19e70b3963 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -269,58 +269,6 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
release_resource(_priv->mch_res);
}
-/* part #1: call before irq install */
-static int i915_driver_modeset_probe_noirq(struct drm_i915_private *i915)
-{
- return intel_modeset_init_noirq(i915);
-}
-
-/* part #2: call after irq install */
-static int i915_driver_modeset_probe(struct drm_i915_private *i915)
-{
- int ret;
-
- /* Important: The output setup functions called by modeset_init need
-* working irqs for e.g. gmbus and dp aux transfers. */
- ret = intel_modeset_init_nogem(i915);
- if (ret)
- goto out;
-
- ret = i915_gem_init(i915);
- if (ret)
- goto cleanup_modeset;
-
- ret = intel_modeset_init(i915);
- if (ret)
- goto cleanup_gem;
-
- return 0;
-
-cleanup_gem:
- i915_gem_suspend(i915);
- i915_gem_driver_remove(i915);
- i915_gem_driver_release(i915);
-cleanup_modeset:
- /* FIXME */
- intel_modeset_driver_remove(i915);
- intel_irq_uninstall(i915);
- intel_modeset_driver_remove_noirq(i915);
-out:
- return ret;
-}
-
-/* part #1: call before irq uninstall */
-static void i915_driver_modeset_remove(struct drm_i915_private *i915)
-{
- intel_modeset_driver_remove(i915);
-}
-
-/* part #2: call after irq uninstall */
-static void i915_driver_modeset_remove_noirq(struct drm_i915_private *i915)
-{
- intel_modeset_driver_remove_noirq(i915);
-}
-
static void intel_init_dpio(struct drm_i915_private *dev_priv)
{
/*
@@ -1466,7 +1414,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
intel_power_domains_init_hw(i915, false);
- ret = i915_driver_modeset_probe_noirq(i915);
+ ret = intel_modeset_init_noirq(i915);
if (ret < 0)
goto out_cleanup_hw;
@@ -1474,10 +1422,20 @@ int i915_driver_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
if (ret)
goto out_cleanup_modeset;
- ret = i915_driver_modeset_probe(i915);
- if (ret < 0)
+ /* Important: The output setup functions called by modeset_init need
+* working irqs for e.g. gmbus and dp aux transfers. */
+ ret = intel_modeset_init_nogem(i915);
+ if (ret)
goto out_cleanup_irq;
+ ret = i915_gem_init(i915);
+ if (ret)
+ goto out_cleanup_modeset;
+
+ ret = intel_modeset_init(i915);
+ if (ret)
+ goto out_cleanup_gem;
+
i915_driver_register(i915);
enable_rpm_wakeref_asserts(>runtime_pm);
@@ -1486,6 +1444,10 @@ int i915_driver_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
return 0;
+out_cleanup_gem:
+ i915_gem_suspend(i915);
+ i915_gem_driver_remove(i915);
+ i915_gem_driver_release(i915);
out_cleanup_irq:
intel_irq_uninstall(i915);
out_cleanup_modeset:
@@ -1529,11 +1491,11 @@ void i915_driver_remove(struct drm_i915_private *i915)
intel_gvt_driver_remove(i915);
- i915_driver_modeset_remove(i915);
+ intel_modeset_driver_remove(i915);
intel_irq_uninstall(i915);
- i915_driver_modeset_remove_noirq(i915);
+ intel_modeset_driver_remove_noirq(i915);
/* Free error state after interrupts are fully disabled. */
cancel_delayed_work_sync(>gt.hangcheck.work);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 08/11] drm/i915: split intel_modeset_init() pre/post gem init
Turn current intel_modeset_init() to a pre-gem init function, and add a
new intel_modeset_init() function and move all post-gem modeset init
there, in the correct layer. Again, apart from possible failure paths,
no functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 26 ++--
drivers/gpu/drm/i915/display/intel_display.h | 1 +
drivers/gpu/drm/i915/i915_drv.c | 14 ++-
3 files changed, 27 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 2352c0b6b9fa..3e97d4d76900 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16213,8 +16213,8 @@ int intel_modeset_init_noirq(struct drm_i915_private
*i915)
return 0;
}
-/* part #2: call after irq install */
-int intel_modeset_init(struct drm_i915_private *i915)
+/* part #2: call after irq install, but before gem init */
+int intel_modeset_init_nogem(struct drm_i915_private *i915)
{
struct drm_device *dev = >drm;
enum pipe pipe;
@@ -16303,6 +16303,28 @@ int intel_modeset_init(struct drm_i915_private *i915)
return 0;
}
+/* part #3: call after gem init */
+int intel_modeset_init(struct drm_i915_private *i915)
+{
+ int ret;
+
+ intel_overlay_setup(i915);
+
+ if (!HAS_DISPLAY(i915) || !INTEL_DISPLAY_ENABLED(i915))
+ return 0;
+
+ ret = intel_fbdev_init(>drm);
+ if (ret)
+ return ret;
+
+ /* Only enable hotplug handling once the fbdev is fully set up. */
+ intel_hpd_init(i915);
+
+ intel_init_ipc(i915);
+
+ return 0;
+}
+
void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
{
struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index 568b641a38dd..9d9085984992 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -578,6 +578,7 @@ void intel_display_print_error_state(struct
drm_i915_error_state_buf *e,
/* modesetting */
void intel_modeset_init_hw(struct drm_i915_private *i915);
int intel_modeset_init_noirq(struct drm_i915_private *i915);
+int intel_modeset_init_nogem(struct drm_i915_private *i915);
int intel_modeset_init(struct drm_i915_private *i915);
void intel_modeset_driver_remove(struct drm_i915_private *i915);
void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3330e40724cb..abd8bc0b0544 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -314,7 +314,7 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
/* Important: The output setup functions called by modeset_init need
* working irqs for e.g. gmbus and dp aux transfers. */
- ret = intel_modeset_init(i915);
+ ret = intel_modeset_init_nogem(i915);
if (ret)
goto out;
@@ -322,20 +322,10 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
if (ret)
goto cleanup_modeset;
- intel_overlay_setup(i915);
-
- if (!HAS_DISPLAY(i915) || !INTEL_DISPLAY_ENABLED(i915))
- return 0;
-
- ret = intel_fbdev_init(>drm);
+ ret = intel_modeset_init(i915);
if (ret)
goto cleanup_gem;
- /* Only enable hotplug handling once the fbdev is fully set up. */
- intel_hpd_init(i915);
-
- intel_init_ipc(i915);
-
return 0;
cleanup_gem:
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 07/11] drm/i915: split intel_modeset_init() to pre/post irq install
Split inte_modeset_init() to parts before and after irq install, to
facilitate further cleanup. The error paths are a mess, otherwise no
functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 17 +
drivers/gpu/drm/i915/display/intel_display.h | 1 +
drivers/gpu/drm/i915/i915_drv.c | 6 ++
3 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index d78f2c908d8b..2352c0b6b9fa 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16187,11 +16187,9 @@ static void intel_mode_config_init(struct
drm_i915_private *i915)
}
}
-int intel_modeset_init(struct drm_i915_private *i915)
+/* part #1: call before irq install */
+int intel_modeset_init_noirq(struct drm_i915_private *i915)
{
- struct drm_device *dev = >drm;
- enum pipe pipe;
- struct intel_crtc *crtc;
int ret;
i915->modeset_wq = alloc_ordered_workqueue("i915_modeset", 0);
@@ -16212,6 +16210,17 @@ int intel_modeset_init(struct drm_i915_private *i915)
intel_fbc_init(i915);
+ return 0;
+}
+
+/* part #2: call after irq install */
+int intel_modeset_init(struct drm_i915_private *i915)
+{
+ struct drm_device *dev = >drm;
+ enum pipe pipe;
+ struct intel_crtc *crtc;
+ int ret;
+
intel_init_pm(i915);
intel_panel_sanitize_ssc(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index d0705f338048..568b641a38dd 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -577,6 +577,7 @@ void intel_display_print_error_state(struct
drm_i915_error_state_buf *e,
/* modesetting */
void intel_modeset_init_hw(struct drm_i915_private *i915);
+int intel_modeset_init_noirq(struct drm_i915_private *i915);
int intel_modeset_init(struct drm_i915_private *i915);
void intel_modeset_driver_remove(struct drm_i915_private *i915);
void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index cf3daa49a4d1..3330e40724cb 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -292,8 +292,14 @@ static int i915_driver_modeset_probe_noirq(struct
drm_i915_private *i915)
intel_csr_ucode_init(i915);
+ ret = intel_modeset_init_noirq(i915);
+ if (ret)
+ goto cleanup_vga_client;
+
return 0;
+cleanup_vga_client:
+ intel_vga_unregister(i915);
out:
return ret;
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 10/11] drm/i915: move modeset probe failures down to intel_display.c
Makes more sense, facilitates further cleanup.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 ++
drivers/gpu/drm/i915/i915_drv.c | 6 --
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index db79faffa7c7..f4b9d4e29edc 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16193,6 +16193,9 @@ int intel_modeset_init_noirq(struct drm_i915_private
*i915)
{
int ret;
+ if (i915_inject_probe_failure(i915))
+ return -ENODEV;
+
if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
ret = drm_vblank_init(>drm,
INTEL_NUM_PIPES(i915));
@@ -16240,6 +16243,9 @@ int intel_modeset_init_nogem(struct drm_i915_private
*i915)
struct intel_crtc *crtc;
int ret;
+ if (i915_inject_probe_failure(i915))
+ return -ENODEV;
+
intel_init_pm(i915);
intel_panel_sanitize_ssc(i915);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d092cc130acf..5a778944d7a8 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -272,9 +272,6 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
/* part #1: call before irq install */
static int i915_driver_modeset_probe_noirq(struct drm_i915_private *i915)
{
- if (i915_inject_probe_failure(i915))
- return -ENODEV;
-
return intel_modeset_init_noirq(i915);
}
@@ -283,9 +280,6 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
{
int ret;
- if (i915_inject_probe_failure(i915))
- return -ENODEV;
-
/* Important: The output setup functions called by modeset_init need
* working irqs for e.g. gmbus and dp aux transfers. */
ret = intel_modeset_init_nogem(i915);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 05/11] drm/i915: split i915_driver_modeset_remove() to pre/post irq uninstall
Push irq uninstall further up, by splitting i915_driver_modeset_remove()
to two, the part with working irqs before irq uninstall, and the part
after irq uninstall. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f0679139282d..c6fabe775046 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -339,12 +339,15 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
return ret;
}
+/* part #1: call before irq uninstall */
static void i915_driver_modeset_remove(struct drm_i915_private *i915)
{
intel_modeset_driver_remove(i915);
+}
- intel_irq_uninstall(i915);
-
+/* part #2: call after irq uninstall */
+static void i915_driver_modeset_remove_noirq(struct drm_i915_private *i915)
+{
intel_modeset_driver_remove_noirq(i915);
intel_bios_driver_remove(i915);
@@ -1552,6 +1555,10 @@ void i915_driver_remove(struct drm_i915_private *i915)
i915_driver_modeset_remove(i915);
+ intel_irq_uninstall(i915);
+
+ i915_driver_modeset_remove_noirq(i915);
+
/* Free error state after interrupts are fully disabled. */
cancel_delayed_work_sync(>gt.hangcheck.work);
i915_reset_error_state(i915);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/11] drm/i915: keep power domains init/remove calls at the same level
Move intel_power_domains_init_hw() call one level higher, to be on the same level as all the other intel_power_domains_*() calls in the probe/remove paths. This also moves the power domain hw init earlier in the sequence, along with the dependent intel_update_rawclk() call. As far as I can tell there should not be any other dependencies on the initalization that's now done after these calls (vblank init, bios init, vga register). Cc: Imre Deak Cc: Ville Syrjala Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 0abfece20c57..16ac5e88e1ec 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -289,11 +289,6 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915) if (ret) goto out; - /* must happen before intel_power_domains_init_hw() on VLV/CHV */ - intel_update_rawclk(i915); - - intel_power_domains_init_hw(i915, false); - intel_csr_ucode_init(i915); ret = intel_irq_install(i915); @@ -336,7 +331,6 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915) intel_irq_uninstall(i915); cleanup_csr: intel_csr_ucode_fini(i915); - intel_power_domains_driver_remove(i915); intel_vga_unregister(i915); out: return ret; @@ -1493,6 +1487,11 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret < 0) goto out_cleanup_mmio; + /* must happen before intel_power_domains_init_hw() on VLV/CHV */ + intel_update_rawclk(i915); + + intel_power_domains_init_hw(i915, false); + ret = i915_driver_modeset_probe(i915); if (ret < 0) goto out_cleanup_hw; @@ -1506,6 +1505,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) return 0; out_cleanup_hw: + intel_power_domains_driver_remove(i915); i915_driver_hw_remove(i915); i915_ggtt_driver_release(i915); out_cleanup_mmio: -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 09/11] drm/i915: move more display related probe/remove stuff to display
With the intel_display_* prove/remove functions clarified, we can
continue with moving more related calls to the right layer:
- drm_vblank_init()
- intel_bios_init() and intel_bios_driver_remove()
- intel_vga_register() and intel_vga_unregister()
- intel_csr_ucode_init() and intel_csr_ucode_fini()
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 25 ++
drivers/gpu/drm/i915/i915_drv.c | 34 +---
2 files changed, 26 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3e97d4d76900..db79faffa7c7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -63,6 +63,7 @@
#include "intel_bw.h"
#include "intel_cdclk.h"
#include "intel_color.h"
+#include "intel_csr.h"
#include "intel_display_types.h"
#include "intel_fbc.h"
#include "intel_fbdev.h"
@@ -16192,6 +16193,21 @@ int intel_modeset_init_noirq(struct drm_i915_private
*i915)
{
int ret;
+ if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
+ ret = drm_vblank_init(>drm,
+ INTEL_NUM_PIPES(i915));
+ if (ret)
+ goto out;
+ }
+
+ intel_bios_init(i915);
+
+ ret = intel_vga_register(i915);
+ if (ret)
+ goto out;
+
+ intel_csr_ucode_init(i915);
+
i915->modeset_wq = alloc_ordered_workqueue("i915_modeset", 0);
i915->flip_wq = alloc_workqueue("i915_flip", WQ_HIGHPRI |
WQ_UNBOUND, WQ_UNBOUND_MAX_ACTIVE);
@@ -16211,6 +16227,9 @@ int intel_modeset_init_noirq(struct drm_i915_private
*i915)
intel_fbc_init(i915);
return 0;
+
+out:
+ return ret;
}
/* part #2: call after irq install, but before gem init */
@@ -17138,6 +17157,12 @@ void intel_modeset_driver_remove_noirq(struct
drm_i915_private *i915)
destroy_workqueue(i915->modeset_wq);
intel_fbc_cleanup_cfb(i915);
+
+ intel_bios_driver_remove(i915);
+
+ intel_vga_unregister(i915);
+
+ intel_csr_ucode_fini(i915);
}
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index abd8bc0b0544..d092cc130acf 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -272,36 +272,10 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
/* part #1: call before irq install */
static int i915_driver_modeset_probe_noirq(struct drm_i915_private *i915)
{
- int ret;
-
if (i915_inject_probe_failure(i915))
return -ENODEV;
- if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
- ret = drm_vblank_init(>drm,
- INTEL_NUM_PIPES(i915));
- if (ret)
- goto out;
- }
-
- intel_bios_init(i915);
-
- ret = intel_vga_register(i915);
- if (ret)
- goto out;
-
- intel_csr_ucode_init(i915);
-
- ret = intel_modeset_init_noirq(i915);
- if (ret)
- goto cleanup_vga_client;
-
- return 0;
-
-cleanup_vga_client:
- intel_vga_unregister(i915);
-out:
- return ret;
+ return intel_modeset_init_noirq(i915);
}
/* part #2: call after irq install */
@@ -351,12 +325,6 @@ static void i915_driver_modeset_remove(struct
drm_i915_private *i915)
static void i915_driver_modeset_remove_noirq(struct drm_i915_private *i915)
{
intel_modeset_driver_remove_noirq(i915);
-
- intel_bios_driver_remove(i915);
-
- intel_vga_unregister(i915);
-
- intel_csr_ucode_fini(i915);
}
static void intel_init_dpio(struct drm_i915_private *dev_priv)
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv
== Series Details == Series: series starting with [CI,1/2] drm/i915/perf: Wean ourselves off dev_priv URL : https://patchwork.freedesktop.org/series/67689/ State : warning == Summary == $ dim checkpatch origin/drm-tip c449e123f41b drm/i915/perf: Wean ourselves off dev_priv -:415: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() #415: FILE: drivers/gpu/drm/i915/i915_perf.c:1340: + BUG_ON(stream != perf->exclusive_stream); total: 0 errors, 1 warnings, 0 checks, 1846 lines checked 932d16e56d32 drm/i915/perf: Set the exclusive stream under perf->lock ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 06/11] drm/i915: split i915_driver_modeset_probe() to pre/post irq install
Pair the irq install and uninstall in the same layer. There are no
functional changes in the happy day scenario. The cleanup paths are
currently a mess though.
Note that modeset probe pre-irq + post-irq install are matched by
modeset driver remove pre-irq + post-irq uninstall, together, but not
independently. They are not symmetric pairs.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 42 +++--
1 file changed, 30 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c6fabe775046..cf3daa49a4d1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -269,7 +269,8 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
release_resource(_priv->mch_res);
}
-static int i915_driver_modeset_probe(struct drm_i915_private *i915)
+/* part #1: call before irq install */
+static int i915_driver_modeset_probe_noirq(struct drm_i915_private *i915)
{
int ret;
@@ -291,15 +292,25 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
intel_csr_ucode_init(i915);
- ret = intel_irq_install(i915);
- if (ret)
- goto cleanup_csr;
+ return 0;
+
+out:
+ return ret;
+}
+
+/* part #2: call after irq install */
+static int i915_driver_modeset_probe(struct drm_i915_private *i915)
+{
+ int ret;
+
+ if (i915_inject_probe_failure(i915))
+ return -ENODEV;
/* Important: The output setup functions called by modeset_init need
* working irqs for e.g. gmbus and dp aux transfers. */
ret = intel_modeset_init(i915);
if (ret)
- goto cleanup_irq;
+ goto out;
ret = i915_gem_init(i915);
if (ret)
@@ -326,15 +337,10 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
i915_gem_driver_remove(i915);
i915_gem_driver_release(i915);
cleanup_modeset:
+ /* FIXME */
intel_modeset_driver_remove(i915);
intel_irq_uninstall(i915);
intel_modeset_driver_remove_noirq(i915);
- goto cleanup_csr;
-cleanup_irq:
- intel_irq_uninstall(i915);
-cleanup_csr:
- intel_csr_ucode_fini(i915);
- intel_vga_unregister(i915);
out:
return ret;
}
@@ -1502,10 +1508,18 @@ int i915_driver_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
intel_power_domains_init_hw(i915, false);
- ret = i915_driver_modeset_probe(i915);
+ ret = i915_driver_modeset_probe_noirq(i915);
if (ret < 0)
goto out_cleanup_hw;
+ ret = intel_irq_install(i915);
+ if (ret)
+ goto out_cleanup_modeset;
+
+ ret = i915_driver_modeset_probe(i915);
+ if (ret < 0)
+ goto out_cleanup_irq;
+
i915_driver_register(i915);
enable_rpm_wakeref_asserts(>runtime_pm);
@@ -1514,6 +1528,10 @@ int i915_driver_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
return 0;
+out_cleanup_irq:
+ intel_irq_uninstall(i915);
+out_cleanup_modeset:
+ /* FIXME */
out_cleanup_hw:
intel_power_domains_driver_remove(i915);
i915_driver_hw_remove(i915);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 04/11] drm/i915: split intel_modeset_driver_remove() to pre/post irq uninstall
Split intel_modeset_driver_remove() to two, the part with working irqs
before irq uninstall, and the part after irq uninstall. Move
irq_unintall() closer to the layer it belongs.
The error path in i915_driver_modeset_probe() looks obviously weird
after this, but remains as good or broken as it ever was. No functional
changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 12 +---
drivers/gpu/drm/i915/display/intel_display.h | 1 +
drivers/gpu/drm/i915/i915_drv.c | 7 +++
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 05fb672a00b9..d78f2c908d8b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17066,6 +17066,7 @@ static void intel_hpd_poll_fini(struct drm_i915_private
*i915)
drm_connector_list_iter_end(_iter);
}
+/* part #1: call before irq uninstall */
void intel_modeset_driver_remove(struct drm_i915_private *i915)
{
flush_workqueue(i915->flip_wq);
@@ -17073,14 +17074,11 @@ void intel_modeset_driver_remove(struct
drm_i915_private *i915)
flush_work(>atomic_helper.free_work);
WARN_ON(!llist_empty(>atomic_helper.free_list));
+}
- /*
-* Interrupts and polling as the first thing to avoid creating havoc.
-* Too much stuff here (turning of connectors, ...) would
-* experience fancy races otherwise.
-*/
- intel_irq_uninstall(i915);
-
+/* part #2: call after irq uninstall */
+void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915)
+{
/*
* Due to the hpd irq storm handling the hotplug work can re-arm the
* poll handlers. Hence disable polling after hpd handling is shut down.
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index 2782f23ee887..d0705f338048 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -579,6 +579,7 @@ void intel_display_print_error_state(struct
drm_i915_error_state_buf *e,
void intel_modeset_init_hw(struct drm_i915_private *i915);
int intel_modeset_init(struct drm_i915_private *i915);
void intel_modeset_driver_remove(struct drm_i915_private *i915);
+void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915);
void intel_display_resume(struct drm_device *dev);
void intel_init_pch_refclk(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 16ac5e88e1ec..f0679139282d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -327,6 +327,9 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
i915_gem_driver_release(i915);
cleanup_modeset:
intel_modeset_driver_remove(i915);
+ intel_irq_uninstall(i915);
+ intel_modeset_driver_remove_noirq(i915);
+ goto cleanup_csr;
cleanup_irq:
intel_irq_uninstall(i915);
cleanup_csr:
@@ -340,6 +343,10 @@ static void i915_driver_modeset_remove(struct
drm_i915_private *i915)
{
intel_modeset_driver_remove(i915);
+ intel_irq_uninstall(i915);
+
+ intel_modeset_driver_remove_noirq(i915);
+
intel_bios_driver_remove(i915);
intel_vga_unregister(i915);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 02/11] drm/i915: switch i915_driver_probe() to use i915 local variable
Prefer i915 over dev_priv where possible. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 42 -
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 63d47d699305..0abfece20c57 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1462,62 +1462,62 @@ int i915_driver_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
{
const struct intel_device_info *match_info =
(struct intel_device_info *)ent->driver_data;
- struct drm_i915_private *dev_priv;
+ struct drm_i915_private *i915;
int ret;
- dev_priv = i915_driver_create(pdev, ent);
- if (IS_ERR(dev_priv))
- return PTR_ERR(dev_priv);
+ i915 = i915_driver_create(pdev, ent);
+ if (IS_ERR(i915))
+ return PTR_ERR(i915);
/* Disable nuclear pageflip by default on pre-ILK */
if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)
- dev_priv->drm.driver_features &= ~DRIVER_ATOMIC;
+ i915->drm.driver_features &= ~DRIVER_ATOMIC;
ret = pci_enable_device(pdev);
if (ret)
goto out_fini;
- ret = i915_driver_early_probe(dev_priv);
+ ret = i915_driver_early_probe(i915);
if (ret < 0)
goto out_pci_disable;
- disable_rpm_wakeref_asserts(_priv->runtime_pm);
+ disable_rpm_wakeref_asserts(>runtime_pm);
- i915_detect_vgpu(dev_priv);
+ i915_detect_vgpu(i915);
- ret = i915_driver_mmio_probe(dev_priv);
+ ret = i915_driver_mmio_probe(i915);
if (ret < 0)
goto out_runtime_pm_put;
- ret = i915_driver_hw_probe(dev_priv);
+ ret = i915_driver_hw_probe(i915);
if (ret < 0)
goto out_cleanup_mmio;
- ret = i915_driver_modeset_probe(dev_priv);
+ ret = i915_driver_modeset_probe(i915);
if (ret < 0)
goto out_cleanup_hw;
- i915_driver_register(dev_priv);
+ i915_driver_register(i915);
- enable_rpm_wakeref_asserts(_priv->runtime_pm);
+ enable_rpm_wakeref_asserts(>runtime_pm);
- i915_welcome_messages(dev_priv);
+ i915_welcome_messages(i915);
return 0;
out_cleanup_hw:
- i915_driver_hw_remove(dev_priv);
- i915_ggtt_driver_release(dev_priv);
+ i915_driver_hw_remove(i915);
+ i915_ggtt_driver_release(i915);
out_cleanup_mmio:
- i915_driver_mmio_release(dev_priv);
+ i915_driver_mmio_release(i915);
out_runtime_pm_put:
- enable_rpm_wakeref_asserts(_priv->runtime_pm);
- i915_driver_late_release(dev_priv);
+ enable_rpm_wakeref_asserts(>runtime_pm);
+ i915_driver_late_release(i915);
out_pci_disable:
pci_disable_device(pdev);
out_fini:
- i915_probe_error(dev_priv, "Device initialization failed (%d)\n", ret);
- i915_driver_destroy(dev_priv);
+ i915_probe_error(i915, "Device initialization failed (%d)\n", ret);
+ i915_driver_destroy(i915);
return ret;
}
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 01/11] drm/i915: register vga switcheroo later, unregister earlier
Move vga switcheroo and dsm handler register later in
i915_driver_register(), and unregister in i915_driver_unregister(). The
dsm handler unregister is a nop, and is only added for completeness.
My unsubstantiated suspicion is that the vga switcheroo state change
would not work as early as we register the hooks currently. In any case
exposing the interfaces to the world only after we've got everything set
up seems prudent.
Also replace the error handling in vga switcheroo register with a simple
error message. This is done at the same time due to lack of error
propagation from i915_driver_register().
Cc: Lukas Wunner
Acked-by: Lukas Wunner
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9354924576c4..63d47d699305 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -289,12 +289,6 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
if (ret)
goto out;
- intel_register_dsm_handler();
-
- ret = i915_switcheroo_register(i915);
- if (ret)
- goto cleanup_vga_client;
-
/* must happen before intel_power_domains_init_hw() on VLV/CHV */
intel_update_rawclk(i915);
@@ -343,8 +337,6 @@ static int i915_driver_modeset_probe(struct
drm_i915_private *i915)
cleanup_csr:
intel_csr_ucode_fini(i915);
intel_power_domains_driver_remove(i915);
- i915_switcheroo_unregister(i915);
-cleanup_vga_client:
intel_vga_unregister(i915);
out:
return ret;
@@ -356,8 +348,6 @@ static void i915_driver_modeset_remove(struct
drm_i915_private *i915)
intel_bios_driver_remove(i915);
- i915_switcheroo_unregister(i915);
-
intel_vga_unregister(i915);
intel_csr_ucode_fini(i915);
@@ -1344,6 +1334,11 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
intel_power_domains_enable(dev_priv);
intel_runtime_pm_enable(_priv->runtime_pm);
+
+ intel_register_dsm_handler();
+
+ if (i915_switcheroo_register(dev_priv))
+ DRM_ERROR("Failed to register vga switcheroo!\n");
}
/**
@@ -1352,6 +1347,10 @@ static void i915_driver_register(struct drm_i915_private
*dev_priv)
*/
static void i915_driver_unregister(struct drm_i915_private *dev_priv)
{
+ i915_switcheroo_unregister(dev_priv);
+
+ intel_unregister_dsm_handler();
+
intel_runtime_pm_disable(_priv->runtime_pm);
intel_power_domains_disable(dev_priv);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 00/11] drm/i915: modeset probe/remove cleanup
Another attempt at trying to cleanup the probe/remove wrt display. TL;DR: It's a mess. I'm trying to chop up the intel_modeset_*() functions in intel_display.c to smaller pieces, and eventually remove the extra i915_driver_modeset_*() layer from i915_drv.c. The intermediate steps aren't the prettiest. The error paths in particular are hideous. (Not that they are great now.) But I'm trying to probe (eh) if this would be a workable direction. BR, Jani. Jani Nikula (11): drm/i915: register vga switcheroo later, unregister earlier drm/i915: switch i915_driver_probe() to use i915 local variable drm/i915: keep power domains init/remove calls at the same level drm/i915: split intel_modeset_driver_remove() to pre/post irq uninstall drm/i915: split i915_driver_modeset_remove() to pre/post irq uninstall drm/i915: split i915_driver_modeset_probe() to pre/post irq install drm/i915: split intel_modeset_init() to pre/post irq install drm/i915: split intel_modeset_init() pre/post gem init drm/i915: move more display related probe/remove stuff to display drm/i915: move modeset probe failures down to intel_display.c drm/i915: remove the now redundant i915_driver_modeset_* call layer drivers/gpu/drm/i915/display/intel_display.c | 82 +++-- drivers/gpu/drm/i915/display/intel_display.h | 3 + drivers/gpu/drm/i915/i915_drv.c | 183 +++ 3 files changed, 141 insertions(+), 127 deletions(-) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/perf: Set the exclusive stream under perf->lock
== Series Details == Series: drm/i915/perf: Set the exclusive stream under perf->lock URL : https://patchwork.freedesktop.org/series/67687/ State : failure == Summary == Applying: drm/i915/perf: Set the exclusive stream under perf->lock error: sha1 information is lacking or useless (drivers/gpu/drm/i915/i915_perf.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 drm/i915/perf: Set the exclusive stream under perf->lock When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/perf: Wean ourselves off dev_priv
== Series Details == Series: drm/i915/perf: Wean ourselves off dev_priv URL : https://patchwork.freedesktop.org/series/67686/ State : failure == Summary == Applying: drm/i915/perf: Wean ourselves off dev_priv error: sha1 information is lacking or useless (drivers/gpu/drm/i915/i915_drv.h). error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 drm/i915/perf: Wean ourselves off dev_priv When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/atomic-helper: Extract drm_atomic_helper_calc_timestamping_constants()
== Series Details ==
Series: series starting with [1/3] drm/atomic-helper: Extract
drm_atomic_helper_calc_timestamping_constants()
URL : https://patchwork.freedesktop.org/series/67681/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7023 -> Patchwork_14687
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/index.html
Known issues
Here are the changes found in Patchwork_14687 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_execlists:
- fi-cfl-guc: [PASS][1] -> [DMESG-FAIL][2] ([fdo#111872])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/fi-cfl-guc/igt@i915_selftest@live_execlists.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/fi-cfl-guc/igt@i915_selftest@live_execlists.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [PASS][3] -> [DMESG-WARN][4] ([fdo#102614])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
Possible fixes
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [INCOMPLETE][5] ([fdo#107713] / [fdo#109100]) ->
[PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
- {fi-icl-u4}:[INCOMPLETE][7] ([fdo#107713] / [fdo#109100]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/fi-icl-u4/igt@gem_ctx_cre...@basic-files.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/fi-icl-u4/igt@gem_ctx_cre...@basic-files.html
* igt@i915_selftest@live_execlists:
- fi-skl-6260u: [DMESG-WARN][9] -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/fi-skl-6260u/igt@i915_selftest@live_execlists.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/fi-skl-6260u/igt@i915_selftest@live_execlists.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][11] ([fdo#111407]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Warnings
* igt@kms_chamelium@vga-edid-read:
- fi-icl-u2: [FAIL][13] ([fdo#109483]) -> [SKIP][14] ([fdo#109309])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7023/fi-icl-u2/igt@kms_chamel...@vga-edid-read.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/fi-icl-u2/igt@kms_chamel...@vga-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111872]: https://bugs.freedesktop.org/show_bug.cgi?id=111872
Participating hosts (51 -> 44)
--
Additional (1): fi-icl-dsi
Missing(8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y
fi-icl-guc fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7023 -> Patchwork_14687
CI-20190529: 20190529
CI_DRM_7023: e77a148bc1c9dee816f057ea4d790d5f04ef5267 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14687: 24a00f33b037d1a0603a968d965b1ed384155bd0 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
24a00f33b037 drm/i915: Refactor timestamping constants update
cd8f6c5de723 drm/atomic-helper: Remove the timestamping constant update from
drm_atomic_helper_update_legacy_modeset_state()
bebbad23a619 drm/atomic-helper: Extract
drm_atomic_helper_calc_timestamping_constants()
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14687/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PULL] drm-misc-fixes
On Thu, Oct 3, 2019 at 9:26 AM Maxime Ripard wrote: > > Hi, > > On Wed, Oct 02, 2019 at 10:06:04PM +0200, Maxime Ripard wrote: > > Hi Dave, Daniel, > > > > I hope that you enjoy XDC if you could make it this year :) > > > > Here's the first round of fixes for drm-misc > > > > Maxime > > > > drm-misc-fixes-2019-10-02: > > - One include fix for tilcdc > > - A memory leak fix for Komeda > > - Some fixes for resources cleanups with writeback > > So it turns out that while that tag was pushed, I forgot to push the > branch first, and now we have a conflict. > > Let's drop this PR, I'll do another one. Hm, does dim not check for that? Can I volunteer you for a patch? -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI 1/2] drm/i915/perf: Wean ourselves off dev_priv
Use the local uncore accessors for the GT rather than using the [not-so]
magic global dev_priv mmio routines. In the process, we also teach the
perf stream to use backpointers to the i915_perf rather than digging it
out of dev_priv.
v2: Rebase onto i915_perf_types.h
Signed-off-by: Chris Wilson
Cc: Umesh Nerlige Ramappa
Cc: Lionel Landwerlin
Reviewed-by: Lionel Landwerlin #v1
---
drivers/gpu/drm/i915/i915_drv.h| 56 +-
drivers/gpu/drm/i915/i915_perf.c | 721 -
drivers/gpu/drm/i915/i915_perf_types.h | 73 ++-
3 files changed, 422 insertions(+), 428 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1b8fd3a38c66..dd0eb8dc4491 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1332,61 +1332,7 @@ struct drm_i915_private {
struct intel_runtime_pm runtime_pm;
- struct {
- bool initialized;
-
- struct kobject *metrics_kobj;
- struct ctl_table_header *sysctl_header;
-
- /*
-* Lock associated with adding/modifying/removing OA configs
-* in dev_priv->perf.metrics_idr.
-*/
- struct mutex metrics_lock;
-
- /*
-* List of dynamic configurations, you need to hold
-* dev_priv->perf.metrics_lock to access it.
-*/
- struct idr metrics_idr;
-
- /*
-* Lock associated with anything below within this structure
-* except exclusive_stream.
-*/
- struct mutex lock;
- struct list_head streams;
-
- /*
-* The stream currently using the OA unit. If accessed
-* outside a syscall associated to its file
-* descriptor, you need to hold
-* dev_priv->drm.struct_mutex.
-*/
- struct i915_perf_stream *exclusive_stream;
-
- /**
-* For rate limiting any notifications of spurious
-* invalid OA reports
-*/
- struct ratelimit_state spurious_report_rs;
-
- struct i915_oa_config test_config;
-
- u32 gen7_latched_oastatus1;
- u32 ctx_oactxctrl_offset;
- u32 ctx_flexeu0_offset;
-
- /**
-* The RPT_ID/reason field for Gen8+ includes a bit
-* to determine if the CTX ID in the report is valid
-* but the specific bit differs between Gen 8 and 9
-*/
- u32 gen8_valid_ctx_bit;
-
- struct i915_oa_ops ops;
- const struct i915_oa_format *oa_formats;
- } perf;
+ struct i915_perf perf;
/* Abstract the submission mechanism (legacy ringbuffer or execlists)
away */
struct intel_gt gt;
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 231388d06c82..5a25bbeb6c7a 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -367,8 +367,7 @@ struct perf_open_properties {
static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
-static void free_oa_config(struct drm_i915_private *dev_priv,
- struct i915_oa_config *oa_config)
+static void free_oa_config(struct i915_oa_config *oa_config)
{
if (!PTR_ERR(oa_config->flex_regs))
kfree(oa_config->flex_regs);
@@ -379,53 +378,52 @@ static void free_oa_config(struct drm_i915_private
*dev_priv,
kfree(oa_config);
}
-static void put_oa_config(struct drm_i915_private *dev_priv,
- struct i915_oa_config *oa_config)
+static void put_oa_config(struct i915_oa_config *oa_config)
{
if (!atomic_dec_and_test(_config->ref_count))
return;
- free_oa_config(dev_priv, oa_config);
+ free_oa_config(oa_config);
}
-static int get_oa_config(struct drm_i915_private *dev_priv,
+static int get_oa_config(struct i915_perf *perf,
int metrics_set,
struct i915_oa_config **out_config)
{
int ret;
if (metrics_set == 1) {
- *out_config = _priv->perf.test_config;
- atomic_inc(_priv->perf.test_config.ref_count);
+ *out_config = >test_config;
+ atomic_inc(>test_config.ref_count);
return 0;
}
- ret = mutex_lock_interruptible(_priv->perf.metrics_lock);
+ ret = mutex_lock_interruptible(>metrics_lock);
if (ret)
return ret;
- *out_config = idr_find(_priv->perf.metrics_idr, metrics_set);
+ *out_config = idr_find(>metrics_idr, metrics_set);
if (!*out_config)
ret = -EINVAL;
else
[Intel-gfx] [CI 2/2] drm/i915/perf: Set the exclusive stream under perf->lock
The BKL struct_mutex is no more, the only serialisation we required for setting the exclusive stream is already managed by ce->pin_mutex in gen8_configure_all_contexts(). As such, we can manipulate i915_perf.exclusive_stream underneath our own perf->lock. Signed-off-by: Chris Wilson Cc: Umesh Nerlige Ramappa Cc: Lionel Landwerlin Reviewed-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_perf.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 5a25bbeb6c7a..45167c595322 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1343,10 +1343,10 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream) * Unset exclusive_stream first, it will be checked while disabling * the metric set on gen8+. */ - mutex_lock(>i915->drm.struct_mutex); + mutex_lock(>lock); perf->exclusive_stream = NULL; perf->ops.disable_metric_set(stream); - mutex_unlock(>i915->drm.struct_mutex); + mutex_unlock(>lock); free_oa_buffer(stream); @@ -1853,7 +1853,7 @@ static int gen8_configure_all_contexts(struct i915_perf_stream *stream, for (i = 2; i < ARRAY_SIZE(regs); i++) regs[i].value = oa_config_flex_reg(oa_config, regs[i].reg); - lockdep_assert_held(>drm.struct_mutex); + lockdep_assert_held(>perf->lock); /* * The OA register config is setup through the context image. This image @@ -2220,7 +2220,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, if (ret) goto err_oa_buf_alloc; - ret = i915_mutex_lock_interruptible(>perf->i915->drm); + ret = mutex_lock_interruptible(>lock); if (ret) goto err_lock; @@ -2233,7 +2233,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, goto err_enable; } - mutex_unlock(>perf->i915->drm.struct_mutex); + mutex_unlock(>lock); hrtimer_init(>poll_check_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); @@ -2246,7 +2246,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, err_enable: perf->exclusive_stream = NULL; perf->ops.disable_metric_set(stream); - mutex_unlock(>perf->i915->drm.struct_mutex); + mutex_unlock(>lock); err_lock: free_oa_buffer(stream); -- 2.23.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/perf: Set the exclusive stream under perf->lock
On 07/10/2019 16:38, Chris Wilson wrote: The BKL struct_mutex is no more, the only serialisation we required for setting the exclusive stream is already managed by ce->pin_mutex in gen8_configure_all_contexts(). As such, we can manipulate i915_perf.exclusive_stream underneath our own perf->lock. Signed-off-by: Chris Wilson Cc: Umesh Nerlige Ramappa Cc: Lionel Landwerlin Long time coming: Reviewed-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_perf.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index ef5e48ebaaa6..45167c595322 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1343,10 +1343,10 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream) * Unset exclusive_stream first, it will be checked while disabling * the metric set on gen8+. */ - mutex_lock(>i915->drm.struct_mutex); + mutex_lock(>lock); perf->exclusive_stream = NULL; perf->ops.disable_metric_set(stream); - mutex_unlock(>i915->drm.struct_mutex); + mutex_unlock(>lock); free_oa_buffer(stream); @@ -1853,7 +1853,7 @@ static int gen8_configure_all_contexts(struct i915_perf_stream *stream, for (i = 2; i < ARRAY_SIZE(regs); i++) regs[i].value = oa_config_flex_reg(oa_config, regs[i].reg); - lockdep_assert_held(>drm.struct_mutex); + lockdep_assert_held(>perf->lock); /* * The OA register config is setup through the context image. This image @@ -2220,7 +2220,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, if (ret) goto err_oa_buf_alloc; - ret = i915_mutex_lock_interruptible(>gt->i915->drm); + ret = mutex_lock_interruptible(>lock); if (ret) goto err_lock; @@ -2233,7 +2233,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, goto err_enable; } - mutex_unlock(>gt->i915->drm.struct_mutex); + mutex_unlock(>lock); hrtimer_init(>poll_check_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); @@ -2246,7 +2246,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, err_enable: perf->exclusive_stream = NULL; perf->ops.disable_metric_set(stream); - mutex_unlock(>gt->i915->drm.struct_mutex); + mutex_unlock(>lock); err_lock: free_oa_buffer(stream); ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/perf: Wean ourselves off dev_priv
On 07/10/2019 16:36, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-10-07 14:33:02) On 07/10/2019 16:03, Chris Wilson wrote: Use the local uncore accessors for the GT rather than using the [not-so] magic global dev_priv mmio routines. In the process, we also teach the perf stream to use backpointers to the i915_perf rather than digging it out of dev_priv. Signed-off-by: Chris Wilson Cc: Umesh Nerlige Ramappa Cc: Lionel Landwerlin Looks good, apart from the fact that this has been reviewed by Umesh : https://lists.freedesktop.org/archives/intel-gfx/2019-September/212008.html Should I have landed this or do I have to wait for someone else to also review? Merge it. -Chris Thanks, done. -Lionel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PULL] drm-intel-next
p versions (Anusha) - Extract common code from GuC stop/disable comm (Fernando) - Fix perf kernel-doc formatting for struct members (Anna) - Documentation fixes (Joonas) The following changes since commit be91233b1053d9725d3a437e3da44ccff2639477: drm/i915: Update DRIVER_DATE to 20190822 (2019-08-22 05:46:28 -0700) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2019-10-07 for you to fetch changes up to 9445ad17109b6fe7864acc33f0c62bd9d866b722: drm/i915: Update DRIVER_DATE to 20191007 (2019-10-07 15:24:47 +0300) UAPI Changes: - Never allow userptr into the mappable GGTT (Chris) No existing users. Avoid anyone from even trying to spare a deadlock scenario. Cross-subsystem Changes: Core Changes: Driver Changes: - Eliminate struct_mutex use as BKL! (Chris) Only used for execbuf serialisation. - Initialize DDI TC and TBT ports (D-I) on Tigerlake (Lucas) - Fix DKL link training for 2.7GHz and 1.62GHz (Jose) - Add Tigerlake DKL PHY programming sequences (Clinton) - Add Tigerlake Thunderbolt PLL divider values (Imre) - drm/i915: Use helpers for drm_mm_node booleans (Chris) - Restrict L3 remapping sysfs interface to dwords (Chris) - Fix audio power up sequence for gen10+ display (Kai) - Skip redundant execlist resubmission (Chris) - Only unwedge if we can reset GPU first (Chris) - Initialise breadcrumb lists on the virtual engine (Chris) - Don't rely on kernel context existing during early errors (Matt A) - Update Icelake+ MG_DP_MODE programming table (Clinton) - Update DMC firmware for Icelake (Anusha) - Downgrade DP MST error after unplugging TypeC cable (Srinivasan) - Limit MST modes based on plane size too (Ville) - Polish intel_tv_mode_valid() (Ville) - Fix g4x sprite scaling stride check with GTT remapping (Ville) - Don't advertize non-exisiting crtcs (Ville) - Clean up encoder->crtc_mask setup (Ville) - Use tc_port instead of port parameter to MG registers (Jose) - Remove static variable for aux last status (Jani) - Implement a better i945gm vblank irq vs. C-states workaround (Ville) - Make the object creation interface consistent (CQ) - Rename intel_vga_msr_write() to intel_vga_reset_io_mem() (Jani, Ville) - Eliminate previous drm_dbg/drm_err usage (Jani) - Move gmbus setup down to intel_modeset_init() (Jani) - Abstract all vgaarb access to intel_vga.[ch] (Jani) - Split out i915_switcheroo.[ch] from i915_drv.c (Jani) - Use intel_gt in has_reset* (Chris) - Eliminate return value for i915_gem_init_early (Matt A) - Selftest improvements (Chris) - Update HuC firmware header version number format (Daniele) Andi Shyti (2): drm/i915: Hook up GT power management drm/i915: Extract GT render sleep (rc6) management Animesh Manna (9): drm/i915/dsb: feature flag added for display state buffer. drm/i915/dsb: DSB context creation. drm/i915/dsb: Indexed register write function for DSB. drm/i915/dsb: Check DSB engine status. drm/i915/dsb: functions to enable/disable DSB engine. drm/i915/dsb: function to trigger workload execution of DSB. drm/i915/dsb: Enable gamma lut programming using DSB. drm/i915/dsb: Enable DSB for gen12. drm/i915/dsb: Documentation for DSB. Ankit Nautiyal (1): drm/i915: Add Pipe D cursor ctrl register for Gen12 Anna Karas (1): drm/i915/perf: Fix use of kernel-doc format in structure members Anusha Srivatsa (3): drm/dp/dsc: Add Support for all BPCs supported by TGL drm/i915/uc: Update HuC firmware naming convention and load latest HuC drm/i915/dmc: Update ICL DMC version to v1.09 Arkadiusz Hiler (1): drm/i915: Get the correct wakeref for reading HOTPLUG_EN et al. CQ Tang (1): drm/i915/stolen: make the object creation interface consistent Chris Wilson (108): drm/i915: Hold irq-off for the entire fake lock period drm/i915/gtt: Preallocate Braswell top-level page directory drm/i915: Flush the existing fence before GGTT read/write drm/i915: Keep drm_i915_file_private around under RCU drm/i915/selftests: Teach igt_gpu_fill_dw() to take intel_context drm/i915/selftests: Add the usual batch vma managements to st_workarounds drm/i915: Use NOEVICT for first pass on attemping to pin a GGTT mmap drm/i915/selftests: Markup impossible error pointers drm/i915: Only activate i915_active debugobject once drm/i915: Make engine's batch pool safe for use with virtual engines drm/i915/selftests: Remove accidental serialization between gpu_fill drm/i915/selftests: Try to recycle context allocations drm/i915/execlists: Flush the post-sync breadcrumb write harder drm/i915/selftests: Ignore coherency failures on Broadwater drm/i915: Protect our local workers against I915_FENCE_TIMEOUT drm/i915/selftests: cond_r
[Intel-gfx] [PATCH] drm/i915/perf: Set the exclusive stream under perf->lock
The BKL struct_mutex is no more, the only serialisation we required for setting the exclusive stream is already managed by ce->pin_mutex in gen8_configure_all_contexts(). As such, we can manipulate i915_perf.exclusive_stream underneath our own perf->lock. Signed-off-by: Chris Wilson Cc: Umesh Nerlige Ramappa Cc: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_perf.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index ef5e48ebaaa6..45167c595322 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1343,10 +1343,10 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream) * Unset exclusive_stream first, it will be checked while disabling * the metric set on gen8+. */ - mutex_lock(>i915->drm.struct_mutex); + mutex_lock(>lock); perf->exclusive_stream = NULL; perf->ops.disable_metric_set(stream); - mutex_unlock(>i915->drm.struct_mutex); + mutex_unlock(>lock); free_oa_buffer(stream); @@ -1853,7 +1853,7 @@ static int gen8_configure_all_contexts(struct i915_perf_stream *stream, for (i = 2; i < ARRAY_SIZE(regs); i++) regs[i].value = oa_config_flex_reg(oa_config, regs[i].reg); - lockdep_assert_held(>drm.struct_mutex); + lockdep_assert_held(>perf->lock); /* * The OA register config is setup through the context image. This image @@ -2220,7 +2220,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, if (ret) goto err_oa_buf_alloc; - ret = i915_mutex_lock_interruptible(>gt->i915->drm); + ret = mutex_lock_interruptible(>lock); if (ret) goto err_lock; @@ -2233,7 +2233,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, goto err_enable; } - mutex_unlock(>gt->i915->drm.struct_mutex); + mutex_unlock(>lock); hrtimer_init(>poll_check_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); @@ -2246,7 +2246,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, err_enable: perf->exclusive_stream = NULL; perf->ops.disable_metric_set(stream); - mutex_unlock(>gt->i915->drm.struct_mutex); + mutex_unlock(>lock); err_lock: free_oa_buffer(stream); -- 2.23.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/perf: Wean ourselves off dev_priv
Quoting Lionel Landwerlin (2019-10-07 14:33:02) > On 07/10/2019 16:03, Chris Wilson wrote: > > Use the local uncore accessors for the GT rather than using the [not-so] > > magic global dev_priv mmio routines. In the process, we also teach the > > perf stream to use backpointers to the i915_perf rather than digging it > > out of dev_priv. > > > > Signed-off-by: Chris Wilson > > Cc: Umesh Nerlige Ramappa > > Cc: Lionel Landwerlin > > > Looks good, apart from the fact that this has been reviewed by Umesh : > https://lists.freedesktop.org/archives/intel-gfx/2019-September/212008.html > > Should I have landed this or do I have to wait for someone else to also > review? Merge it. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/perf: Wean ourselves off dev_priv
On 07/10/2019 16:03, Chris Wilson wrote:
Use the local uncore accessors for the GT rather than using the [not-so]
magic global dev_priv mmio routines. In the process, we also teach the
perf stream to use backpointers to the i915_perf rather than digging it
out of dev_priv.
Signed-off-by: Chris Wilson
Cc: Umesh Nerlige Ramappa
Cc: Lionel Landwerlin
Looks good, apart from the fact that this has been reviewed by Umesh :
https://lists.freedesktop.org/archives/intel-gfx/2019-September/212008.html
Should I have landed this or do I have to wait for someone else to also
review?
Reviewed-by: Lionel Landwerlin
Thanks,
-Lionel
---
drivers/gpu/drm/i915/i915_drv.h | 21 +-
drivers/gpu/drm/i915/i915_perf.c | 721 +++
2 files changed, 367 insertions(+), 375 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b9dc4be4b6a1..7724b686c9ed 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1007,6 +1007,7 @@ struct i915_oa_config {
atomic_t ref_count;
};
+struct i915_perf;
struct i915_perf_stream;
/**
@@ -1078,9 +1079,14 @@ struct i915_perf_stream_ops {
*/
struct i915_perf_stream {
/**
-* @dev_priv: i915 drm device
+* @perf: i915_perf backpointer
*/
- struct drm_i915_private *dev_priv;
+ struct i915_perf *perf;
+
+ /**
+* @gt: intel_gt container
+*/
+ struct intel_gt *gt;
/**
* @link: Links the stream into ``_i915_private->streams``
@@ -1220,20 +1226,19 @@ struct i915_oa_ops {
* @is_valid_b_counter_reg: Validates register's address for
* programming boolean counters for a particular platform.
*/
- bool (*is_valid_b_counter_reg)(struct drm_i915_private *dev_priv,
- u32 addr);
+ bool (*is_valid_b_counter_reg)(struct i915_perf *perf, u32 addr);
/**
* @is_valid_mux_reg: Validates register's address for programming mux
* for a particular platform.
*/
- bool (*is_valid_mux_reg)(struct drm_i915_private *dev_priv, u32 addr);
+ bool (*is_valid_mux_reg)(struct i915_perf *perf, u32 addr);
/**
* @is_valid_flex_reg: Validates register's address for programming
* flex EU filtering for a particular platform.
*/
- bool (*is_valid_flex_reg)(struct drm_i915_private *dev_priv, u32 addr);
+ bool (*is_valid_flex_reg)(struct i915_perf *perf, u32 addr);
/**
* @enable_metric_set: Selects and applies any MUX configuration to set
@@ -1635,8 +1640,8 @@ struct drm_i915_private {
struct intel_runtime_pm runtime_pm;
- struct {
- bool initialized;
+ struct i915_perf {
+ struct drm_i915_private *i915;
struct kobject *metrics_kobj;
struct ctl_table_header *sysctl_header;
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 231388d06c82..ef5e48ebaaa6 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -367,8 +367,7 @@ struct perf_open_properties {
static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
-static void free_oa_config(struct drm_i915_private *dev_priv,
- struct i915_oa_config *oa_config)
+static void free_oa_config(struct i915_oa_config *oa_config)
{
if (!PTR_ERR(oa_config->flex_regs))
kfree(oa_config->flex_regs);
@@ -379,53 +378,52 @@ static void free_oa_config(struct drm_i915_private
*dev_priv,
kfree(oa_config);
}
-static void put_oa_config(struct drm_i915_private *dev_priv,
- struct i915_oa_config *oa_config)
+static void put_oa_config(struct i915_oa_config *oa_config)
{
if (!atomic_dec_and_test(_config->ref_count))
return;
- free_oa_config(dev_priv, oa_config);
+ free_oa_config(oa_config);
}
-static int get_oa_config(struct drm_i915_private *dev_priv,
+static int get_oa_config(struct i915_perf *perf,
int metrics_set,
struct i915_oa_config **out_config)
{
int ret;
if (metrics_set == 1) {
- *out_config = _priv->perf.test_config;
- atomic_inc(_priv->perf.test_config.ref_count);
+ *out_config = >test_config;
+ atomic_inc(>test_config.ref_count);
return 0;
}
- ret = mutex_lock_interruptible(_priv->perf.metrics_lock);
+ ret = mutex_lock_interruptible(>metrics_lock);
if (ret)
return ret;
- *out_config = idr_find(_priv->perf.metrics_idr, metrics_set);
+ *out_config = idr_find(>metrics_idr, metrics_set);
if (!*out_config)
ret = -EINVAL;
else
atomic_inc(&(*out_config)->ref_count);
-
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
Anshuman, I have addressed below failures and updated filters for Bug 111872 .
Lakshmi.
-Original Message-
From: Gupta, Anshuman
Sent: Monday, October 7, 2019 2:02 PM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana
Cc: Deak, Imre
Subject: Re: ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT
(rev2)
On 2019-10-07 at 10:46:35 +, Patchwork wrote:
> == Series Details ==
>
> Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
> URL : https://patchwork.freedesktop.org/series/67525/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686
>
>
> Summary
> ---
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_14686 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_14686, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
>
> Possible new issues
> ---
>
> Here are the unknown changes that may have been introduced in
> Patchwork_14686:
>
> ### IGT changes ###
>
> Possible regressions
>
> * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
> - {fi-icl-dsi}: NOTRUN -> [SKIP][1]
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-dsi/igt@i915_pm...@dc3co-vpb-simulation.html
> - {fi-icl-guc}: NOTRUN -> [SKIP][2]
>[2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-guc/igt@i915_pm...@dc3co-vpb-simulation.html
> - {fi-icl-u4}:NOTRUN -> [SKIP][3]
>[3]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u4/igt@i915_pm...@dc3co-vpb-simulation.html
> - fi-icl-u2: NOTRUN -> [SKIP][4]
>[4]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u2/igt@i915_pm...@dc3co-vpb-simulation.html
> - fi-cml-u2: NOTRUN -> [SKIP][5]
>[5]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-u2/igt@i915_pm...@dc3co-vpb-simulation.html
> - {fi-cml-s}: NOTRUN -> [SKIP][6]
>[6]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-s/igt@i915_pm...@dc3co-vpb-simulation.html
> - fi-icl-u3: NOTRUN -> [SKIP][7]
>[7]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt
> @i915_pm...@dc3co-vpb-simulation.html
>
> * igt@i915_selftest@live_execlists:
> - fi-cfl-8109u: [PASS][8] -> [DMESG-FAIL][9]
>[8]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
>[9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cfl-8109u/
> igt@i915_selftest@live_execlists.html
Hi Lakshmi,
Above CI failure DMESG warning has also occured during IGTPW_3538 execution,
this is not related to this DC3CO series.
IGTPW_3538:
- fi-cfl-8109u: [PASS][3] -> [DMESG-WARN][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3538/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
Could you please create a bug for this CI failure and update the filter.
Thanks,
Anshuman Gupta.
>
>
> New tests
> -
>
> New tests have been introduced between CI_DRM_7021 and Patchwork_14686:
>
> ### New IGT tests (1) ###
>
> * igt@i915_pm_dc@dc3co-vpb-simulation:
> - Statuses : 1 pass(s) 44 skip(s)
> - Exec time: [0.0, 4.04] s
>
>
>
> Known issues
>
>
> Here are the changes found in Patchwork_14686 that come from known issues:
>
> ### IGT changes ###
>
> Issues hit
>
> * igt@gem_mmap_gtt@basic-read-write-distinct:
> - fi-icl-u3: [PASS][10] -> [DMESG-WARN][11] ([fdo#107724]) +1
> similar issue
>[10]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_...@basic-read-write-distinct.html
>[11]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt
> @gem_mmap_...@basic-read-write-distinct.html
>
>
> Possible fixes
>
> * igt@gem_ctx_create@basic-files:
> - {fi-tgl-u}: [INCOMPLETE][12] ([fdo#111735]) -> [PASS][13]
>[12]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-tgl-u/igt@gem_ctx_cre...@basic-files.html
>[13]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-tgl-u/igt@
> gem_ctx_cre...@basic-files.html
>
> * igt@gem_exec_suspend@basic:
> - fi-icl-u3: [FAIL][14] ([fdo#111699]) -> [PASS][15]
>[14]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_exec_susp...@basic.html
>[15]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt
>
[Intel-gfx] [PATCH] drm/i915/perf: Wean ourselves off dev_priv
Use the local uncore accessors for the GT rather than using the [not-so]
magic global dev_priv mmio routines. In the process, we also teach the
perf stream to use backpointers to the i915_perf rather than digging it
out of dev_priv.
Signed-off-by: Chris Wilson
Cc: Umesh Nerlige Ramappa
Cc: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_drv.h | 21 +-
drivers/gpu/drm/i915/i915_perf.c | 721 +++
2 files changed, 367 insertions(+), 375 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b9dc4be4b6a1..7724b686c9ed 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1007,6 +1007,7 @@ struct i915_oa_config {
atomic_t ref_count;
};
+struct i915_perf;
struct i915_perf_stream;
/**
@@ -1078,9 +1079,14 @@ struct i915_perf_stream_ops {
*/
struct i915_perf_stream {
/**
-* @dev_priv: i915 drm device
+* @perf: i915_perf backpointer
*/
- struct drm_i915_private *dev_priv;
+ struct i915_perf *perf;
+
+ /**
+* @gt: intel_gt container
+*/
+ struct intel_gt *gt;
/**
* @link: Links the stream into ``_i915_private->streams``
@@ -1220,20 +1226,19 @@ struct i915_oa_ops {
* @is_valid_b_counter_reg: Validates register's address for
* programming boolean counters for a particular platform.
*/
- bool (*is_valid_b_counter_reg)(struct drm_i915_private *dev_priv,
- u32 addr);
+ bool (*is_valid_b_counter_reg)(struct i915_perf *perf, u32 addr);
/**
* @is_valid_mux_reg: Validates register's address for programming mux
* for a particular platform.
*/
- bool (*is_valid_mux_reg)(struct drm_i915_private *dev_priv, u32 addr);
+ bool (*is_valid_mux_reg)(struct i915_perf *perf, u32 addr);
/**
* @is_valid_flex_reg: Validates register's address for programming
* flex EU filtering for a particular platform.
*/
- bool (*is_valid_flex_reg)(struct drm_i915_private *dev_priv, u32 addr);
+ bool (*is_valid_flex_reg)(struct i915_perf *perf, u32 addr);
/**
* @enable_metric_set: Selects and applies any MUX configuration to set
@@ -1635,8 +1640,8 @@ struct drm_i915_private {
struct intel_runtime_pm runtime_pm;
- struct {
- bool initialized;
+ struct i915_perf {
+ struct drm_i915_private *i915;
struct kobject *metrics_kobj;
struct ctl_table_header *sysctl_header;
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 231388d06c82..ef5e48ebaaa6 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -367,8 +367,7 @@ struct perf_open_properties {
static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
-static void free_oa_config(struct drm_i915_private *dev_priv,
- struct i915_oa_config *oa_config)
+static void free_oa_config(struct i915_oa_config *oa_config)
{
if (!PTR_ERR(oa_config->flex_regs))
kfree(oa_config->flex_regs);
@@ -379,53 +378,52 @@ static void free_oa_config(struct drm_i915_private
*dev_priv,
kfree(oa_config);
}
-static void put_oa_config(struct drm_i915_private *dev_priv,
- struct i915_oa_config *oa_config)
+static void put_oa_config(struct i915_oa_config *oa_config)
{
if (!atomic_dec_and_test(_config->ref_count))
return;
- free_oa_config(dev_priv, oa_config);
+ free_oa_config(oa_config);
}
-static int get_oa_config(struct drm_i915_private *dev_priv,
+static int get_oa_config(struct i915_perf *perf,
int metrics_set,
struct i915_oa_config **out_config)
{
int ret;
if (metrics_set == 1) {
- *out_config = _priv->perf.test_config;
- atomic_inc(_priv->perf.test_config.ref_count);
+ *out_config = >test_config;
+ atomic_inc(>test_config.ref_count);
return 0;
}
- ret = mutex_lock_interruptible(_priv->perf.metrics_lock);
+ ret = mutex_lock_interruptible(>metrics_lock);
if (ret)
return ret;
- *out_config = idr_find(_priv->perf.metrics_idr, metrics_set);
+ *out_config = idr_find(>metrics_idr, metrics_set);
if (!*out_config)
ret = -EINVAL;
else
atomic_inc(&(*out_config)->ref_count);
- mutex_unlock(_priv->perf.metrics_lock);
+ mutex_unlock(>metrics_lock);
return ret;
}
static u32 gen8_oa_hw_tail_read(struct i915_perf_stream *stream)
{
- struct drm_i915_private *dev_priv = stream->dev_priv;
+ struct intel_uncore *uncore = stream->gt->uncore;
- return
Re: [Intel-gfx] [PATCH 03/12] drm/i915/gt: Restore dropped 'interruptible' flag
On 06/10/2019 17:49, Chris Wilson wrote:
Lost in the rebasing was Tvrtko's reminder that we need to keep an
uninterruptible wait around for the Ironlake VT-d w/a
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 8aed89fd2cdc..d69e78478eea 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -48,7 +48,7 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
fence = i915_active_fence_get(>last_request);
if (fence) {
timeout = dma_fence_wait_timeout(fence,
-true,
+interruptible,
timeout);
dma_fence_put(fence);
}
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/3] drm/atomic-helper: Remove the timestamping constant update from drm_atomic_helper_update_legacy_modeset_state()
From: Ville Syrjälä
The timestamping constants have nothing to do with any legacy state
so should not be updated from
drm_atomic_helper_update_legacy_modeset_state().
Let's make everyone call drm_atomic_helper_calc_timestamping_constants()
directly instead of relying on
drm_atomic_helper_update_legacy_modeset_state() to call it.
@@
expression S;
@@
- drm_atomic_helper_calc_timestamping_constants(S);
@@
expression D, S;
@@
drm_atomic_helper_update_legacy_modeset_state(D, S);
+ drm_atomic_helper_calc_timestamping_constants(S);
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
drivers/gpu/drm/drm_atomic_helper.c | 3 +--
drivers/gpu/drm/i915/display/intel_display.c | 1 +
drivers/gpu/drm/nouveau/dispnv50/disp.c | 1 +
4 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index c67d3c41db19..67cc606b3cac 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6145,6 +6145,7 @@ static void amdgpu_dm_atomic_commit_tail(struct
drm_atomic_state *state)
int crtc_disable_count = 0;
drm_atomic_helper_update_legacy_modeset_state(dev, state);
+ drm_atomic_helper_calc_timestamping_constants(state);
dm_state = dm_atomic_get_new_state(state);
if (dm_state && dm_state->context) {
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 3773d74877e7..12a625ab3fd4 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1150,8 +1150,6 @@ drm_atomic_helper_update_legacy_modeset_state(struct
drm_device *dev,
crtc->y = new_plane_state->src_y >> 16;
}
}
-
- drm_atomic_helper_calc_timestamping_constants(old_state);
}
EXPORT_SYMBOL(drm_atomic_helper_update_legacy_modeset_state);
@@ -1257,6 +1255,7 @@ void drm_atomic_helper_commit_modeset_disables(struct
drm_device *dev,
disable_outputs(dev, old_state);
drm_atomic_helper_update_legacy_modeset_state(dev, old_state);
+ drm_atomic_helper_calc_timestamping_constants(old_state);
crtc_set_mode(dev, old_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 05fb672a00b9..b80d864cc8f1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13980,6 +13980,7 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
if (state->modeset) {
drm_atomic_helper_update_legacy_modeset_state(dev,
>base);
+ drm_atomic_helper_calc_timestamping_constants(>base);
intel_set_cdclk_pre_plane_update(dev_priv,
>cdclk.actual,
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index a13924ae1992..51e4055b5e02 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1820,6 +1820,7 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state
*state)
drm_atomic_helper_wait_for_fences(dev, state, false);
drm_atomic_helper_wait_for_dependencies(state);
drm_atomic_helper_update_legacy_modeset_state(dev, state);
+ drm_atomic_helper_calc_timestamping_constants(state);
if (atom->lock_core)
mutex_lock(>mutex);
--
2.21.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/3] drm/i915: Refactor timestamping constants update
From: Ville Syrjälä
Once we do the hw vs. uapi split we can no longer use
drm_atomic_helper_calc_timestamping_constants() as it'll
consult the uapi state instead of the hw state.
So let's just update the vblank timestamping constants whenever
we update the scanline offset. We use both to convert the hw
scanline count to something which matches the software timing
values.
First I thought to put these into intel_crtc_vblank_on() but
we may want to get the scanline counter value before that (eg.
from some early tracepoints), so let's stick to updating them
a bit earlier than intel_crtc_vblank_on().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index b80d864cc8f1..ae5fa584d9ae 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13361,10 +13361,15 @@ intel_modeset_verify_disabled(struct drm_i915_private
*dev_priv,
verify_disabled_dpll_state(dev_priv);
}
-static void update_scanline_offset(const struct intel_crtc_state *crtc_state)
+static void
+intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ const struct drm_display_mode *adjusted_mode =
+ _state->base.adjusted_mode;
+
+ drm_calc_timestamping_constants(>base, adjusted_mode);
/*
* The scanline counter increments at the leading edge of hsync.
@@ -13394,7 +13399,6 @@ static void update_scanline_offset(const struct
intel_crtc_state *crtc_state)
* answer that's slightly in the future.
*/
if (IS_GEN(dev_priv, 2)) {
- const struct drm_display_mode *adjusted_mode =
_state->base.adjusted_mode;
int vtotal;
vtotal = adjusted_mode->crtc_vtotal;
@@ -13405,8 +13409,9 @@ static void update_scanline_offset(const struct
intel_crtc_state *crtc_state)
} else if (HAS_DDI(dev_priv) &&
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
crtc->scanline_offset = 2;
- } else
+ } else {
crtc->scanline_offset = 1;
+ }
}
static void intel_modeset_clear_plls(struct intel_atomic_state *state)
@@ -13707,7 +13712,8 @@ static void intel_update_crtc(struct intel_crtc *crtc,
to_intel_plane(crtc->base.primary));
if (modeset) {
- update_scanline_offset(new_crtc_state);
+ intel_crtc_update_active_timings(new_crtc_state);
+
dev_priv->display.crtc_enable(new_crtc_state, state);
/* vblanks work again, re-enable pipe CRC. */
@@ -13980,7 +13986,6 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
if (state->modeset) {
drm_atomic_helper_update_legacy_modeset_state(dev,
>base);
- drm_atomic_helper_calc_timestamping_constants(>base);
intel_set_cdclk_pre_plane_update(dev_priv,
>cdclk.actual,
@@ -16787,9 +16792,7 @@ static void intel_modeset_readout_hw_state(struct
drm_device *dev)
min_cdclk = 0;
}
- drm_calc_timestamping_constants(>base,
-
_state->base.adjusted_mode);
- update_scanline_offset(crtc_state);
+ intel_crtc_update_active_timings(crtc_state);
}
dev_priv->min_cdclk[crtc->pipe] = min_cdclk;
--
2.21.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/3] drm/atomic-helper: Extract drm_atomic_helper_calc_timestamping_constants()
From: Ville Syrjälä
Put the vblank timestamping constants update loop into its own
function. It has no business living inside
drm_atomic_helper_update_legacy_modeset_state() so we'll be wanting
to move it out entirely. As a first step we'll still call it
from drm_atomic_helper_update_legacy_modeset_state().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_atomic_helper.c | 26 ++
include/drm/drm_atomic_helper.h | 3 +++
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 587052751b48..3773d74877e7 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1080,9 +1080,7 @@ disable_outputs(struct drm_device *dev, struct
drm_atomic_state *old_state)
* @old_state: atomic state object with old state structures
*
* This function updates all the various legacy modeset state pointers in
- * connectors, encoders and crtcs. It also updates the timestamping constants
- * used for precise vblank timestamps by calling
- * drm_calc_timestamping_constants().
+ * connectors, encoders and crtcs.
*
* Drivers can use this for building their own atomic commit if they don't have
* a pure helper-based modeset implementation.
@@ -1151,13 +1149,33 @@ drm_atomic_helper_update_legacy_modeset_state(struct
drm_device *dev,
crtc->x = new_plane_state->src_x >> 16;
crtc->y = new_plane_state->src_y >> 16;
}
+ }
+
+ drm_atomic_helper_calc_timestamping_constants(old_state);
+}
+EXPORT_SYMBOL(drm_atomic_helper_update_legacy_modeset_state);
+/**
+ * drm_atomic_helper_calc_timestamping_constants - update vblank timestamping
constants
+ * @state: atomic state object
+ *
+ * Updates the timestamping constants used for precise vblank timestamps
+ * by calling drm_calc_timestamping_constants() for all enabled crtcs in
@state.
+ */
+void drm_atomic_helper_calc_timestamping_constants(struct drm_atomic_state
*state)
+{
+ struct drm_crtc_state *new_crtc_state;
+ struct drm_crtc *crtc;
+ int i;
+
+ /* set legacy state in the crtc structure */
+ for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
if (new_crtc_state->enable)
drm_calc_timestamping_constants(crtc,
_crtc_state->adjusted_mode);
}
}
-EXPORT_SYMBOL(drm_atomic_helper_update_legacy_modeset_state);
+EXPORT_SYMBOL(drm_atomic_helper_calc_timestamping_constants);
static void
crtc_set_mode(struct drm_device *dev, struct drm_atomic_state *old_state)
diff --git a/include/drm/drm_atomic_helper.h b/include/drm/drm_atomic_helper.h
index bf4e07141d81..a60ea2cf36f0 100644
--- a/include/drm/drm_atomic_helper.h
+++ b/include/drm/drm_atomic_helper.h
@@ -74,6 +74,9 @@ void
drm_atomic_helper_update_legacy_modeset_state(struct drm_device *dev,
struct drm_atomic_state
*old_state);
+void
+drm_atomic_helper_calc_timestamping_constants(struct drm_atomic_state *state);
+
void drm_atomic_helper_commit_modeset_disables(struct drm_device *dev,
struct drm_atomic_state *state);
void drm_atomic_helper_commit_modeset_enables(struct drm_device *dev,
--
2.21.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH TRIVIAL v2] gpu: Fix Kconfig indentation
On Fri, 04 Oct 2019, Krzysztof Kozlowski wrote: > drivers/gpu/drm/i915/Kconfig | 12 +- > drivers/gpu/drm/i915/Kconfig.debug | 144 +++ Please split these out to a separate patch. Can't speak for others, but the patch looks like it'll be conflicts galore and a problem to manage if merged in one big lump. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/3] drm/i915/huc: improve documentation
Hello Daniele, On Fri, Sep 27, 2019 at 02:42:43PM -0700, Daniele Ceraolo Spurio wrote: > Better explain the usage of the microcontroller and what i915 is > responsible of. While at it, fix the documentation for the auth > function, which doesn't do any pinning anymore. > > Signed-off-by: Daniele Ceraolo Spurio > Cc: Michal Wajdeczko Acked-by: Anna Karas Anna Karas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Add Sphinx-compatible references to struct fields
On Fri, 04 Oct 2019, Jonathan Neuschäfer wrote: > On Thu, Oct 03, 2019 at 06:45:56PM -, Patchwork wrote: >> == Series Details == >> >> Series: drm/i915: Add Sphinx-compatible references to struct fields >> URL : https://patchwork.freedesktop.org/series/67550/ >> State : failure >> >> == Summary == >> >> Applying: drm/i915: Add Sphinx-compatible references to struct fields >> Using index info to reconstruct a base tree... >> Mdrivers/gpu/drm/i915/i915_drv.h >> Falling back to patching base and 3-way merge... >> Auto-merging drivers/gpu/drm/i915/i915_drv.h >> CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_drv.h > > I'm not sure what's wrong here. The patch applies cleanly to v5.4-rc1 > and linux-next. Maybe patchwork is applying it to an older base? On the contrary, to a much newer base. Try drm-tip branch of [1]. BR, Jani. [1] https://cgit.freedesktop.org/drm/drm-tip > > > Thanks, > Jonathan Neuschäfer > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/vbt: Child device size remains unchanged through VBT 229
On Wed, 02 Oct 2019, Matt Roper wrote:
> The latest documented version of the VBT is 229, but no further data has
> been added to the child device definition in block 2. Update the child
> device version test to eliminate the "Expected child device config size
> for VBT version XXX not known; assuming 39" debug messages from the
> logs.
>
> Bspec: 20124
> Bspec: 20157
> Signed-off-by: Matt Roper
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 1def550c68c8..9628b485b179 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1615,7 +1615,7 @@ parse_general_definitions(struct drm_i915_private
> *dev_priv,
> expected_size = 37;
> } else if (bdb->version <= 215) {
> expected_size = 38;
> - } else if (bdb->version <= 216) {
> + } else if (bdb->version <= 229) {
> expected_size = 39;
> } else {
> expected_size = sizeof(*child);
--
Jani Nikula, Intel Open Source Graphics Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/3] drm/i915/guc: improve documentation
Hello Daniele, On Fri, Sep 27, 2019 at 02:42:42PM -0700, Daniele Ceraolo Spurio wrote: > Add a short description of what we expect from GuC and some minor > improvements to existing documentation. Also remove a comment about a > difference between GuC and HuC that is not true anymore. > > Signed-off-by: Daniele Ceraolo Spurio > Cc: Michal Wajdeczko > Cc: Matthew Brost Acked-by: Anna Karas Anna Karas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/5] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core
== Series Details ==
Series: series starting with [v2,1/5] drm/i915: Allow i915 to manage the vma
offset nodes instead of drm core
URL : https://patchwork.freedesktop.org/series/67674/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7021_full -> Patchwork_14684_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_14684_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_mmap_gtt@close-race}:
- shard-iclb: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_mmap_...@close-race.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-iclb6/igt@gem_mmap_...@close-race.html
- shard-apl: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl3/igt@gem_mmap_...@close-race.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-apl4/igt@gem_mmap_...@close-race.html
Known issues
Here are the changes found in Patchwork_14684_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_schedule@preempt-other-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#111325])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb5/igt@gem_exec_sched...@preempt-other-bsd.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-iclb4/igt@gem_exec_sched...@preempt-other-bsd.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-hsw: [PASS][7] -> [DMESG-WARN][8] ([fdo#111870]) +1
similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw5/igt@gem_userptr_bl...@map-fixed-invalidate-busy-gup.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-hsw2/igt@gem_userptr_bl...@map-fixed-invalidate-busy-gup.html
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-snb: [PASS][9] -> [DMESG-WARN][10] ([fdo#111870])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_bl...@sync-unmap-cycles.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-snb4/igt@gem_userptr_bl...@sync-unmap-cycles.html
* igt@i915_pm_rpm@i2c:
- shard-iclb: [PASS][11] -> [INCOMPLETE][12] ([fdo#107713] /
[fdo#108840])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@i915_pm_...@i2c.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-iclb7/igt@i915_pm_...@i2c.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +4
similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl2/igt@i915_susp...@fence-restore-tiled2untiled.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-apl7/igt@i915_susp...@fence-restore-tiled2untiled.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-hsw: [PASS][15] -> [INCOMPLETE][16] ([fdo#103540])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw5/igt@kms_f...@2x-flip-vs-suspend.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-hsw2/igt@kms_f...@2x-flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103167]) +1 similar
issue
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-iclb2/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#104108] /
[fdo#106978])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl3/igt@kms_frontbuffer_track...@psr-suspend.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-skl9/igt@kms_frontbuffer_track...@psr-suspend.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl6/igt@kms_plane_alpha_bl...@pipe-b-constant-alpha-min.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14684/shard-skl10/igt@kms_plane_alpha_bl...@pipe-b-constant-alpha-min.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103166]) +1 similar
issue
[23]:
