[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Add spaces before compound GEM_TRACE
== Series Details == Series: series starting with [1/2] drm/i915: Add spaces before compound GEM_TRACE URL : https://patchwork.freedesktop.org/series/71331/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7630_full -> Patchwork_15903_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15903_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15903_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15903_full: ### IGT changes ### Possible regressions * igt@i915_selftest@live_workarounds: - shard-apl: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-apl3/igt@i915_selftest@live_workarounds.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/shard-apl4/igt@i915_selftest@live_workarounds.html New tests - New tests have been introduced between CI_DRM_7630_full and Patchwork_15903_full: ### New Piglit tests (9) ### * spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-double_dmat2-double_dvec3-position: - Statuses : 1 fail(s) - Exec time: [0.13] s * spec@ext_framebuffer_object@fbo-stencil-gl_stencil_index4-copypixels: - Statuses : 1 fail(s) - Exec time: [0.08] s * spec@glsl-4.20@execution@vs_in@vs-input-double_dmat2_array5-float_float-position: - Statuses : 1 fail(s) - Exec time: [0.14] s * spec@glsl-4.20@execution@vs_in@vs-input-float_mat4x2-double_dmat4x2_array2-position: - Statuses : 1 fail(s) - Exec time: [0.13] s * spec@glsl-4.20@execution@vs_in@vs-input-float_vec3-position-double_dmat3x2_array2: - Statuses : 1 fail(s) - Exec time: [0.13] s * spec@glsl-4.20@execution@vs_in@vs-input-int_ivec3-position-double_dmat3x4_array2: - Statuses : 1 fail(s) - Exec time: [0.15] s * spec@glsl-4.20@execution@vs_in@vs-input-int_ivec3_array3-position-double_dvec3: - Statuses : 1 fail(s) - Exec time: [0.16] s * spec@glsl-4.20@execution@vs_in@vs-input-position-double_dmat3x4-float_mat2x3_array3: - Statuses : 1 fail(s) - Exec time: [0.12] s * spec@glsl-4.20@execution@vs_in@vs-input-ushort_uint-position-double_dmat4: - Statuses : 1 fail(s) - Exec time: [0.17] s Known issues Here are the changes found in Patchwork_15903_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@vcs1-s3: - shard-tglb: [PASS][3] -> [INCOMPLETE][4] ([i915#456]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb6/igt@gem_ctx_isolat...@vcs1-s3.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/shard-tglb4/igt@gem_ctx_isolat...@vcs1-s3.html * igt@gem_eio@in-flight-suspend: - shard-tglb: [PASS][5] -> [INCOMPLETE][6] ([i915#456] / [i915#460] / [i915#534]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb3/igt@gem_...@in-flight-suspend.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/shard-tglb7/igt@gem_...@in-flight-suspend.html * igt@gem_exec_create@madvise: - shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#435]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb7/igt@gem_exec_cre...@madvise.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/shard-tglb4/igt@gem_exec_cre...@madvise.html * igt@gem_exec_schedule@preempt-queue-contexts-bsd1: - shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([fdo#111606] / [fdo#111677]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb8/igt@gem_exec_sched...@preempt-queue-contexts-bsd1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/shard-tglb6/igt@gem_exec_sched...@preempt-queue-contexts-bsd1.html * igt@gem_exec_schedule@smoketest-all: - shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([i915#463]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb5/igt@gem_exec_sched...@smoketest-all.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/shard-tglb7/igt@gem_exec_sched...@smoketest-all.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-glk: [PASS][13] -> [FAIL][14] ([i915#644]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-glk6/igt@gem_pp...@flink-and-close-vma-leak.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/shard-glk8/igt@gem_pp...@flink-and-close-vma-leak.html - shard-apl: [PASS][15] -> [FAIL][16] ([i915#644]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-apl2/igt@gem
[Intel-gfx] [CI] drm/i915/gt: Apply sanitiization just before resume
Bring sanitization completely underneath the umbrella of intel_gt, and
perform it exclusively after suspend and before the next resume.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt.c| 6 -
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 31 ++-
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 2 --
drivers/gpu/drm/i915/i915_drv.c | 2 --
drivers/gpu/drm/i915/selftests/i915_gem.c | 2 --
5 files changed, 14 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index e4f7cc7dd88a..8a17abfbb19f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -38,8 +38,6 @@ void intel_gt_init_early(struct intel_gt *gt, struct
drm_i915_private *i915)
void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt)
{
gt->ggtt = ggtt;
-
- intel_gt_sanitize(gt, false);
}
static void init_unused_ring(struct intel_gt *gt, u32 base)
@@ -77,10 +75,6 @@ int intel_gt_init_hw(struct intel_gt *gt)
struct intel_uncore *uncore = gt->uncore;
int ret;
- ret = intel_gt_terminally_wedged(gt);
- if (ret)
- return ret;
-
gt->last_init_time = ktime_get();
/* Double layer security blanket, see i915_gem_init() */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 45b68a17da4d..3cda837d64c9 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -126,17 +126,7 @@ static bool reset_engines(struct intel_gt *gt)
return __intel_gt_reset(gt, ALL_ENGINES) == 0;
}
-/**
- * intel_gt_sanitize: called after the GPU has lost power
- * @gt: the i915 GT container
- * @force: ignore a failed reset and sanitize engine state anyway
- *
- * Anytime we reset the GPU, either with an explicit GPU reset or through a
- * PCI power cycle, the GPU loses state and we must reset our state tracking
- * to match. Note that calling intel_gt_sanitize() if the GPU has not
- * been reset results in much confusion!
- */
-void intel_gt_sanitize(struct intel_gt *gt, bool force)
+static void gt_sanitize(struct intel_gt *gt, bool force)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -189,6 +179,10 @@ int intel_gt_resume(struct intel_gt *gt)
enum intel_engine_id id;
int err;
+ err = intel_gt_terminally_wedged(gt);
+ if (err)
+ return err;
+
GT_TRACE(gt, "\n");
/*
@@ -201,14 +195,14 @@ int intel_gt_resume(struct intel_gt *gt)
intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
intel_rc6_sanitize(>->rc6);
+ gt_sanitize(gt, true);
/* Only when the HW is re-initialised, can we replay the requests */
err = intel_gt_init_hw(gt);
if (err) {
dev_err(gt->i915->drm.dev,
"Failed to initialize GPU, declaring it wedged!\n");
- intel_gt_set_wedged(gt);
- goto err_fw;
+ goto err_wedged;
}
intel_rps_enable(>->rps);
@@ -233,7 +227,7 @@ int intel_gt_resume(struct intel_gt *gt)
dev_err(gt->i915->drm.dev,
"Failed to restart %s (%d)\n",
engine->name, err);
- break;
+ goto err_wedged;
}
}
@@ -243,11 +237,14 @@ int intel_gt_resume(struct intel_gt *gt)
user_forcewake(gt, false);
-err_fw:
+out_fw:
intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
intel_gt_pm_put(gt);
-
return err;
+
+err_wedged:
+ intel_gt_set_wedged(gt);
+ goto out_fw;
}
static void wait_for_suspend(struct intel_gt *gt)
@@ -315,7 +312,7 @@ void intel_gt_suspend_late(struct intel_gt *gt)
intel_llc_disable(>->llc);
}
- intel_gt_sanitize(gt, false);
+ gt_sanitize(gt, false);
GT_TRACE(gt, "\n");
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index 4a9e48c12bd4..60f0e2fbe55c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -51,8 +51,6 @@ void intel_gt_pm_init_early(struct intel_gt *gt);
void intel_gt_pm_init(struct intel_gt *gt);
void intel_gt_pm_fini(struct intel_gt *gt);
-void intel_gt_sanitize(struct intel_gt *gt, bool force);
-
void intel_gt_suspend_prepare(struct intel_gt *gt);
void intel_gt_suspend_late(struct intel_gt *gt);
int intel_gt_resume(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 59525094d0e3..9f75e03368c4 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1817,8 +1817,6 @@ static int i915_drm_resume(struct drm_device *dev)
disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Apply sanitiization just before resume (rev2)
== Series Details == Series: drm/i915/gt: Apply sanitiization just before resume (rev2) URL : https://patchwork.freedesktop.org/series/71334/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7636 -> Patchwork_15926 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15926 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15926, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15926: ### IGT changes ### Possible regressions * igt@i915_selftest@live_gt_pm: - fi-bwr-2160:[PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-bwr-2160/igt@i915_selftest@live_gt_pm.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-bwr-2160/igt@i915_selftest@live_gt_pm.html Known issues Here are the changes found in Patchwork_15926 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-skl-6770hq: [PASS][3] -> [INCOMPLETE][4] ([i915#671]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#111407]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html Possible fixes * igt@i915_module_load@reload-with-fault-injection: - fi-bxt-dsi: [INCOMPLETE][7] ([fdo#103927]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_gem_contexts: - fi-cfl-8700k: [INCOMPLETE][9] ([i915#424]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html * igt@i915_selftest@live_hugepages: - fi-bwr-2160:[FAIL][11] -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-bwr-2160/igt@i915_selftest@live_hugepages.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-bwr-2160/igt@i915_selftest@live_hugepages.html Warnings * igt@gem_exec_suspend@basic-s4-devices: - fi-kbl-x1275: [DMESG-WARN][13] ([fdo#107139] / [i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][14] ([fdo#107139] / [i915#62] / [i915#92]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html * igt@i915_module_load@reload-with-fault-injection: - fi-kbl-x1275: [INCOMPLETE][15] ([i915#879]) -> [DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html * igt@kms_flip@basic-flip-vs-wf_vblank: - fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][18] ([i915#62] / [i915#92]) +5 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-wf_vblank.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-wf_vblank.html * igt@kms_force_connector_basic@force-edid: - fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) -> [DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7636/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15926/fi-kbl-x1275/igt@kms_force_connector_ba...@force-edid.html [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#107
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Flush other retirees inside intel_gt_retire_requests()
== Series Details == Series: drm/i915/gt: Flush other retirees inside intel_gt_retire_requests() URL : https://patchwork.freedesktop.org/series/71333/ State : success == Summary == CI Bug Log - changes from CI_DRM_7630_full -> Patchwork_15904_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_15904_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@vcs0-mixed-process: - shard-tglb: [PASS][1] -> [FAIL][2] ([i915#679]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb5/igt@gem_ctx_persiste...@vcs0-mixed-process.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-tglb3/igt@gem_ctx_persiste...@vcs0-mixed-process.html * igt@gem_eio@unwedge-stress: - shard-snb: [PASS][3] -> [FAIL][4] ([i915#232]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-snb7/igt@gem_...@unwedge-stress.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-snb4/igt@gem_...@unwedge-stress.html * igt@gem_exec_await@wide-all: - shard-tglb: [PASS][5] -> [INCOMPLETE][6] ([fdo#111736]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb3/igt@gem_exec_aw...@wide-all.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-tglb6/igt@gem_exec_aw...@wide-all.html * igt@gem_exec_schedule@smoketest-bsd1: - shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#463]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb4/igt@gem_exec_sched...@smoketest-bsd1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-tglb6/igt@gem_exec_sched...@smoketest-bsd1.html * igt@gem_persistent_relocs@forked-interruptible-thrashing: - shard-snb: [PASS][9] -> [FAIL][10] ([i915#520]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-snb7/igt@gem_persistent_rel...@forked-interruptible-thrashing.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-snb1/igt@gem_persistent_rel...@forked-interruptible-thrashing.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-glk: [PASS][11] -> [FAIL][12] ([i915#644]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-glk6/igt@gem_pp...@flink-and-close-vma-leak.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-glk4/igt@gem_pp...@flink-and-close-vma-leak.html - shard-apl: [PASS][13] -> [FAIL][14] ([i915#644]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-apl2/igt@gem_pp...@flink-and-close-vma-leak.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-apl1/igt@gem_pp...@flink-and-close-vma-leak.html - shard-skl: [PASS][15] -> [FAIL][16] ([i915#644]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-skl8/igt@gem_pp...@flink-and-close-vma-leak.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-skl3/igt@gem_pp...@flink-and-close-vma-leak.html * igt@gem_sync@basic-many-each: - shard-tglb: [PASS][17] -> [INCOMPLETE][18] ([i915#472] / [i915#707]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb9/igt@gem_s...@basic-many-each.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-tglb8/igt@gem_s...@basic-many-each.html * igt@i915_selftest@mock_requests: - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#198]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-skl10/igt@i915_selftest@mock_requests.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-skl5/igt@i915_selftest@mock_requests.html * igt@kms_color@pipe-a-ctm-negative: - shard-skl: [PASS][21] -> [DMESG-WARN][22] ([i915#109]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-skl8/igt@kms_co...@pipe-a-ctm-negative.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-skl6/igt@kms_co...@pipe-a-ctm-negative.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-kbl: [PASS][23] -> [DMESG-WARN][24] ([i915#180]) +3 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-kbl1/igt@kms_cursor_...@pipe-a-cursor-suspend.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-kbl1/igt@kms_cursor_...@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-b-cursor-256x256-sliding: - shard-skl: [PASS][25] -> [FAIL][26] ([i915#54]) +6 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-skl3/igt@kms_cursor_...@pipe-b-cursor-256x256-sliding.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/shard-skl4/igt@kms_cursor_...@pipe-b-c
Re: [Intel-gfx] [PATCH] drm/i915: Fix enable OA report logic
On Wed, Dec 25, 2019 at 12:05 AM Ebrahim Byagowi wrote:
>
>
> Clang raises
>
> drivers/gpu/drm/i915/i915_perf.c:2474:50: warning: operator '?:' has lower
> precedence than '|'; '|' will be evaluated first
> [-Wbitwise-conditional-parentheses]
> !(stream->sample_flags & SAMPLE_OA_REPORT) ?
> ~~ ^
> drivers/gpu/drm/i915/i915_perf.c:2474:50: note: place parentheses around
> the '|' expression to silence this warning
> !(stream->sample_flags & SAMPLE_OA_REPORT) ?
> ~~ ^
> drivers/gpu/drm/i915/i915_perf.c:2474:50: note: place parentheses around
> the '?:' expression to evaluate it first
> !(stream->sample_flags & SAMPLE_OA_REPORT) ?
> ~~~^
>
> with -Wbitwise-conditional-parentheses and apparently is right
> as '|' is evaluated before '?:' which doesn't seem to be the intention
> here so let's put parentheses in the right place to fix it.
>
> Signed-off-by: Ebrahim Byagowi
This has already been fixed by
9278bbb6e43c ("drm/i915/perf: Reverse a ternary to make sparse happy")
Maybe it missed a "Fixes", reason it was not propagated to stable kernel.
Lucas De Marchi
> ---
> drivers/gpu/drm/i915/i915_perf.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c
> b/drivers/gpu/drm/i915/i915_perf.c
> index 2ae14bc14931..db963f7c2e2e 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -2471,9 +2471,9 @@ static int gen12_enable_metric_set(struct
> i915_perf_stream *stream)
> * If the user didn't require OA reports, instruct
> the
> * hardware not to emit ctx switch reports.
> */
> - !(stream->sample_flags & SAMPLE_OA_REPORT) ?
> -
> _MASKED_BIT_ENABLE(GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS) :
> -
> _MASKED_BIT_DISABLE(GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS));
> + (!(stream->sample_flags & SAMPLE_OA_REPORT) ?
> +
> _MASKED_BIT_ENABLE(GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS) :
> +
> _MASKED_BIT_DISABLE(GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS)));
>
> intel_uncore_write(uncore, GEN12_OAG_OAGLBCTXCTRL, periodic ?
>(GEN12_OAG_OAGLBCTXCTRL_COUNTER_RESUME |
> --
> 2.24.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Lucas De Marchi
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tgl: Assume future platforms will inherit TGL's SFC capability
On Tue, Dec 24, 2019 at 11:53:33PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tgl: Assume future platforms will inherit TGL's SFC
> capability
> URL : https://patchwork.freedesktop.org/series/71371/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7633 -> Patchwork_15920
>
>
> Summary
> ---
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_15920 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_15920, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/index.html
>
> Possible new issues
> ---
>
> Here are the unknown changes that may have been introduced in
> Patchwork_15920:
>
> ### IGT changes ###
>
> Possible regressions
>
> * igt@i915_selftest@live_gem_contexts:
> - fi-kbl-x1275: NOTRUN -> [DMESG-FAIL][1]
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-kbl-x1275/igt@i915_selftest@live_gem_contexts.html
Some kind of GEM selftest failure on KBL. Not related to this patch.
Hitting the retest button.
Matt
>
>
> Known issues
>
>
> Here are the changes found in Patchwork_15920 that come from known issues:
>
> ### IGT changes ###
>
> Issues hit
>
> * igt@i915_module_load@reload-with-fault-injection:
> - fi-skl-6700k2: [PASS][2] -> [INCOMPLETE][3] ([i915#671])
>[2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
>[3]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
>
> * igt@i915_selftest@live_gem_contexts:
> - fi-hsw-peppy: [PASS][4] -> [DMESG-FAIL][5] ([i915#722])
>[4]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
>[5]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
>
>
> Possible fixes
>
> * igt@gem_exec_create@basic:
> - {fi-tgl-u}: [INCOMPLETE][6] ([fdo#111736]) -> [PASS][7]
>[6]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-tgl-u/igt@gem_exec_cre...@basic.html
>[7]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-tgl-u/igt@gem_exec_cre...@basic.html
>
> * igt@i915_module_load@reload-with-fault-injection:
> - fi-cfl-guc: [INCOMPLETE][8] ([i915#505] / [i915#671]) ->
> [PASS][9]
>[8]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
>[9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
>
> * igt@i915_pm_rpm@module-reload:
> - fi-skl-6770hq: [FAIL][10] ([i915#178]) -> [PASS][11]
>[10]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
>[11]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
>
> * igt@i915_selftest@live_blt:
> - fi-hsw-4770:[DMESG-FAIL][12] ([i915#563]) -> [PASS][13]
>[12]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-hsw-4770/igt@i915_selftest@live_blt.html
>[13]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-hsw-4770/igt@i915_selftest@live_blt.html
>
> * igt@i915_selftest@live_dmabuf:
> - fi-bwr-2160:[FAIL][14] -> [PASS][15]
>[14]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-bwr-2160/igt@i915_selftest@live_dmabuf.html
>[15]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-bwr-2160/igt@i915_selftest@live_dmabuf.html
>
>
> Warnings
>
> * igt@i915_module_load@reload-with-fault-injection:
> - fi-bxt-dsi: [DMESG-WARN][16] -> [INCOMPLETE][17] ([fdo#103927])
>[16]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
>[17]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
> - fi-kbl-x1275: [INCOMPLETE][18] ([i915#879]) -> [DMESG-WARN][19]
> ([i915#62] / [i915#92] / [i915#95])
>[18]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7633/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html
>[19]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15920/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html
>
> * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
> - fi-kbl-x12
Re: [Intel-gfx] [PATCH 0/3] Workaround updates
On Wed, Dec 25, 2019 at 09:31:29PM +0200, Lionel Landwerlin wrote: > On 24/12/2019 03:20, Matt Roper wrote: > > A quick drive-by update for some workarounds I noticed that were > > added/extended to additional platforms. > > > > Cc: Lucas De Marchi > > Cc: Matt Atwood > > Cc: Radhakrishna Sripada > > > > Matt Roper (3): > >drm/i915: Extend WaDisableDARBFClkGating to icl,ehl,tgl > >drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl > >drm/i915/tgl: Extend Wa_1408615072 to tgl > > > > drivers/gpu/drm/i915/display/intel_display.c | 7 +-- > > drivers/gpu/drm/i915/i915_reg.h | 7 ++- > > drivers/gpu/drm/i915/intel_pm.c | 12 > > 3 files changed, 23 insertions(+), 3 deletions(-) > > > Acked-by: Lionel Landwerlin > > > What do you think about Wa_1407352427 for ICL? > > Sounds like it could fix some 3D hangs too. Yeah, looks like we need to add that one for ICL/EHL. I'll send a separate patch for that one since this series is ready to merge once CI results come back. Thanks for pointing it out! Matt > > > -Lionel > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Add Wa_1407352427:icl,ehl
The workaround database now indicates we need to disable psdunit clock
gating as well.
Bspec: 32354
Bspec: 33450
Bspec: 33451
Suggested-by: Lionel Landwerlin
Cc: Lionel Landwerlin
Cc: Lucas De Marchi
Cc: Matt Atwood
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 4
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bbfedeb00b7f..b98734378c9a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4179,6 +4179,9 @@ enum {
#define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434)
#define VFUNIT_CLKGATE_DIS(1 << 20)
+#define UNSLICE_UNIT_LEVEL_CLKGATE2_MMIO(0x94e4)
+#define PSDUNIT_CLKGATE_DIS REG_BIT(5)
+
#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
#define CGPSF_CLKGATE_DIS(1 << 3)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 31ec82337e4f..8bc8f0836368 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6590,6 +6590,10 @@ static void icl_init_clock_gating(struct
drm_i915_private *dev_priv)
/* WaEnable32PlaneMode:icl */
I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
_MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
+
+ /* Wa_1407352427:icl,ehl */
+ intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
+0, PSDUNIT_CLKGATE_DIS);
}
static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Assume future platforms will inherit TGL's SFC capability (rev2)
== Series Details ==
Series: drm/i915/tgl: Assume future platforms will inherit TGL's SFC capability
(rev2)
URL : https://patchwork.freedesktop.org/series/71371/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7637 -> Patchwork_15927
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/index.html
Known issues
Here are the changes found in Patchwork_15927 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_close_race@basic-threads:
- fi-byt-n2820: [PASS][1] -> [TIMEOUT][2] ([i915#816])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-n2820/igt@gem_close_r...@basic-threads.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-byt-n2820/igt@gem_close_r...@basic-threads.html
* igt@gem_exec_suspend@basic-s3:
- fi-cml-s: [PASS][3] -> [DMESG-WARN][4] ([fdo#111764])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6600u: [PASS][5] -> [INCOMPLETE][6] ([i915#671] / [i915#69])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770r: [PASS][7] -> [DMESG-FAIL][8] ([i915#563])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-hsw-4770r/igt@i915_selftest@live_blt.html
- fi-byt-j1900: [PASS][9] -> [DMESG-FAIL][10] ([i915#725])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-j1900/igt@i915_selftest@live_blt.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-byt-j1900/igt@i915_selftest@live_blt.html
Possible fixes
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][11] ([fdo#111736]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-tgl-u/igt@gem_exec_cre...@basic.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@gem_exec_parallel@basic:
- fi-byt-j1900: [TIMEOUT][13] -> [PASS][14] +2 similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-j1900/igt@gem_exec_paral...@basic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-byt-j1900/igt@gem_exec_paral...@basic.html
* igt@gem_exec_store@basic-all:
- fi-byt-j1900: [FAIL][15] -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-j1900/igt@gem_exec_st...@basic-all.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-byt-j1900/igt@gem_exec_st...@basic-all.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][17] ([i915#656]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
Warnings
* igt@i915_module_load@reload:
- fi-icl-u2: [DMESG-WARN][19] ([i915#289]) -> [DMESG-WARN][20]
([i915#109] / [i915#289])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-icl-u2/igt@i915_module_l...@reload.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-icl-u2/igt@i915_module_l...@reload.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][21] ([i915#553] / [i915#725]) ->
[DMESG-FAIL][22] ([i915#725])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-hsw-4770/igt@i915_selftest@live_blt.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@kms_flip@basic-flip-vs-modeset:
- fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][24] ([i915#62] / [i915#92]) +9 similar issues
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15927/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-x1275: [DMESG-WARN][25] ([i915#62] / [i915#92]) ->
[DMESG-WARN][26] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-x1275/igt@prime_v
Re: [Intel-gfx] [PATCH 0/3] Workaround updates
On 26/12/2019 19:39, Matt Roper wrote: On Wed, Dec 25, 2019 at 09:31:29PM +0200, Lionel Landwerlin wrote: On 24/12/2019 03:20, Matt Roper wrote: A quick drive-by update for some workarounds I noticed that were added/extended to additional platforms. Cc: Lucas De Marchi Cc: Matt Atwood Cc: Radhakrishna Sripada Matt Roper (3): drm/i915: Extend WaDisableDARBFClkGating to icl,ehl,tgl drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl drm/i915/tgl: Extend Wa_1408615072 to tgl drivers/gpu/drm/i915/display/intel_display.c | 7 +-- drivers/gpu/drm/i915/i915_reg.h | 7 ++- drivers/gpu/drm/i915/intel_pm.c | 12 3 files changed, 23 insertions(+), 3 deletions(-) Acked-by: Lionel Landwerlin What do you think about Wa_1407352427 for ICL? Sounds like it could fix some 3D hangs too. Yeah, looks like we need to add that one for ICL/EHL. I'll send a separate patch for that one since this series is ready to merge once CI results come back. Thanks for pointing it out! Matt Thanks for taking that on. One question though about those workarounds, we probably need to have them applied to older kernels with ICL support right? Should they be Cc stable? Cheers, -Lionel -Lionel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Add Wa_1407352427:icl,ehl
On 26/12/2019 19:46, Matt Roper wrote:
The workaround database now indicates we need to disable psdunit clock
gating as well.
Bspec: 32354
Bspec: 33450
Bspec: 33451
Suggested-by: Lionel Landwerlin
Cc: Lionel Landwerlin
Cc: Lucas De Marchi
Cc: Matt Atwood
Signed-off-by: Matt Roper
Acked-by: Lionel Landwerlin
I have the same question about applying this to stable kernels with ICL
support :)
-Lionel
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 4
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bbfedeb00b7f..b98734378c9a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4179,6 +4179,9 @@ enum {
#define UNSLICE_UNIT_LEVEL_CLKGATE_MMIO(0x9434)
#define VFUNIT_CLKGATE_DIS (1 << 20)
+#define UNSLICE_UNIT_LEVEL_CLKGATE2 _MMIO(0x94e4)
+#define PSDUNIT_CLKGATE_DIS REG_BIT(5)
+
#define INF_UNIT_LEVEL_CLKGATE_MMIO(0x9560)
#define CGPSF_CLKGATE_DIS (1 << 3)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 31ec82337e4f..8bc8f0836368 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6590,6 +6590,10 @@ static void icl_init_clock_gating(struct
drm_i915_private *dev_priv)
/* WaEnable32PlaneMode:icl */
I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
_MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
+
+ /* Wa_1407352427:icl,ehl */
+ intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
+0, PSDUNIT_CLKGATE_DIS);
}
static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add Wa_1407352427:icl,ehl
== Series Details ==
Series: drm/i915: Add Wa_1407352427:icl,ehl
URL : https://patchwork.freedesktop.org/series/71403/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7637 -> Patchwork_15928
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15928 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15928, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15928:
### IGT changes ###
Possible regressions
* igt@i915_module_load@reload-with-fault-injection:
- fi-bxt-dsi: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
- fi-skl-6600u: [PASS][3] -> [DMESG-WARN][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6600u: [PASS][5] -> [FAIL][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-skl-6600u/igt@i915_pm_...@module-reload.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-skl-6600u/igt@i915_pm_...@module-reload.html
- fi-bxt-dsi: [PASS][7] -> [FAIL][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-bxt-dsi/igt@i915_pm_...@module-reload.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-bxt-dsi/igt@i915_pm_...@module-reload.html
* igt@runner@aborted:
- fi-bxt-dsi: NOTRUN -> [FAIL][9]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-bxt-dsi/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_15928 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-cml-s: [PASS][10] -> [DMESG-WARN][11] ([fdo#111764])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][12] -> [FAIL][13] ([fdo#111407])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_close_race@basic-threads:
- {fi-tgl-guc}: [INCOMPLETE][14] ([i915#435]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-tgl-guc/igt@gem_close_r...@basic-threads.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-tgl-guc/igt@gem_close_r...@basic-threads.html
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][16] ([fdo#111736]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-tgl-u/igt@gem_exec_cre...@basic.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][18] ([i915#656]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
Warnings
* igt@kms_flip@basic-flip-vs-modeset:
- fi-kbl-x1275: [DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][21] ([i915#62] / [i915#92]) +6 similar issues
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][22] ([i915#62] / [i915#92]) ->
[DMESG-WARN][23] ([i915#62] / [i915#92] / [i915#95]) +6 similar issues
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15928/fi-kbl-x1275
Re: [Intel-gfx] [PATCH 0/3] Workaround updates
On Thu, Dec 26, 2019 at 08:09:04PM +0200, Lionel Landwerlin wrote: > On 26/12/2019 19:39, Matt Roper wrote: > > On Wed, Dec 25, 2019 at 09:31:29PM +0200, Lionel Landwerlin wrote: > > > On 24/12/2019 03:20, Matt Roper wrote: > > > > A quick drive-by update for some workarounds I noticed that were > > > > added/extended to additional platforms. > > > > > > > > Cc: Lucas De Marchi > > > > Cc: Matt Atwood > > > > Cc: Radhakrishna Sripada > > > > > > > > Matt Roper (3): > > > > drm/i915: Extend WaDisableDARBFClkGating to icl,ehl,tgl > > > > drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl > > > > drm/i915/tgl: Extend Wa_1408615072 to tgl > > > > > > > >drivers/gpu/drm/i915/display/intel_display.c | 7 +-- > > > >drivers/gpu/drm/i915/i915_reg.h | 7 ++- > > > >drivers/gpu/drm/i915/intel_pm.c | 12 > > > >3 files changed, 23 insertions(+), 3 deletions(-) > > > > > > > Acked-by: Lionel Landwerlin > > > > > > > > > What do you think about Wa_1407352427 for ICL? > > > > > > Sounds like it could fix some 3D hangs too. > > Yeah, looks like we need to add that one for ICL/EHL. I'll send a > > separate patch for that one since this series is ready to merge once CI > > results come back. Thanks for pointing it out! > > > > > > Matt > > > Thanks for taking that on. > > > One question though about those workarounds, we probably need to have them > applied to older kernels with ICL support right? > > Should they be Cc stable? Yeah, true. I'll add a Cc: stable tag when I apply them. Matt > > > Cheers, > > > -Lionel > > > > > > > > > > -Lionel > > > > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915: Add Wa_1407352427:icl,ehl
The workaround database now indicates we need to disable psdunit clock
gating as well.
Bspec: 32354
Bspec: 33450
Bspec: 33451
Suggested-by: Lionel Landwerlin
Cc: sta...@vger.kernel.org
Cc: Lionel Landwerlin
Cc: Lucas De Marchi
Cc: Matt Atwood
Signed-off-by: Matt Roper
Acked-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 4
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bbfedeb00b7f..b98734378c9a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4179,6 +4179,9 @@ enum {
#define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434)
#define VFUNIT_CLKGATE_DIS(1 << 20)
+#define UNSLICE_UNIT_LEVEL_CLKGATE2_MMIO(0x94e4)
+#define PSDUNIT_CLKGATE_DIS REG_BIT(5)
+
#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
#define CGPSF_CLKGATE_DIS(1 << 3)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 31ec82337e4f..8bc8f0836368 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6590,6 +6590,10 @@ static void icl_init_clock_gating(struct
drm_i915_private *dev_priv)
/* WaEnable32PlaneMode:icl */
I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
_MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
+
+ /* Wa_1407352427:icl,ehl */
+ intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
+0, PSDUNIT_CLKGATE_DIS);
}
static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gt: Ignore incomplete engines after init failure
Do not expose incomplete engines to the user after we fail to setup the
GT.
Fixes: e6ba76480299 ("drm/i915: Remove i915->kernel_context")
Signed-off-by: Chris Wilson
Cc: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 4
drivers/gpu/drm/i915/gt/intel_gt.h | 7 ++-
drivers/gpu/drm/i915/gt/intel_reset.c | 4 ++--
3 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 7f7150a733f4..9e7f12bef828 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -11,6 +11,7 @@
#include "i915_drv.h"
#include "intel_engine.h"
#include "intel_engine_user.h"
+#include "intel_gt.h"
struct intel_engine_cs *
intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance)
@@ -200,6 +201,9 @@ void intel_engines_driver_register(struct drm_i915_private
*i915)
uabi_node);
char old[sizeof(engine->name)];
+ if (intel_gt_has_init_error(engine->gt))
+ continue; /* ignore incomplete engines */
+
GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
engine->uabi_class = uabi_classes[engine->class];
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 2355cf129e9c..1dac441cb8f4 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -58,9 +58,14 @@ static inline u32 intel_gt_scratch_offset(const struct
intel_gt *gt,
return i915_ggtt_offset(gt->scratch) + field;
}
-static inline bool intel_gt_is_wedged(struct intel_gt *gt)
+static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
{
return __intel_reset_failed(>->reset);
}
+static inline bool intel_gt_has_init_error(const struct intel_gt *gt)
+{
+ return test_bit(I915_WEDGED_ON_INIT, >->reset.flags);
+}
+
#endif /* __INTEL_GT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 1c51296646e0..2b7f75759bf2 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1329,10 +1329,10 @@ int intel_gt_terminally_wedged(struct intel_gt *gt)
if (!intel_gt_is_wedged(gt))
return 0;
- /* Reset still in progress? Maybe we will recover? */
- if (!test_bit(I915_RESET_BACKOFF, >->reset.flags))
+ if (intel_gt_has_init_error(gt))
return -EIO;
+ /* Reset still in progress? Maybe we will recover? */
if (wait_event_interruptible(gt->reset.queue,
!test_bit(I915_RESET_BACKOFF,
>->reset.flags)))
--
2.24.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add Wa_1407352427:icl,ehl (rev2)
== Series Details ==
Series: drm/i915: Add Wa_1407352427:icl,ehl (rev2)
URL : https://patchwork.freedesktop.org/series/71403/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7637 -> Patchwork_15929
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15929 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15929, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15929:
### IGT changes ###
Possible regressions
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6600u: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6600u: [PASS][3] -> [FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-skl-6600u/igt@i915_pm_...@module-reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-skl-6600u/igt@i915_pm_...@module-reload.html
Known issues
Here are the changes found in Patchwork_15929 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-cml-s: [PASS][5] -> [DMESG-WARN][6] ([fdo#111764])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-8700k: [PASS][7] -> [INCOMPLETE][8] ([i915#505])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770r: [PASS][9] -> [DMESG-FAIL][10] ([i915#553] /
[i915#725])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-hsw-4770r/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_gem_contexts:
- fi-cfl-guc: [PASS][11] -> [INCOMPLETE][12] ([fdo#106070] /
[i915#424])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][13] -> [FAIL][14] ([fdo#111096] / [i915#323])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_close_race@basic-threads:
- {fi-tgl-guc}: [INCOMPLETE][15] ([i915#435]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-tgl-guc/igt@gem_close_r...@basic-threads.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-tgl-guc/igt@gem_close_r...@basic-threads.html
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][17] ([fdo#111736]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-tgl-u/igt@gem_exec_cre...@basic.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@gem_exec_parallel@basic:
- fi-byt-j1900: [TIMEOUT][19] -> [PASS][20] +2 similar issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-j1900/igt@gem_exec_paral...@basic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-byt-j1900/igt@gem_exec_paral...@basic.html
* igt@gem_exec_store@basic-all:
- fi-byt-j1900: [FAIL][21] -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-j1900/igt@gem_exec_st...@basic-all.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15929/fi-byt-j1900/igt@gem_exec_st...@basic-all.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][23] ([i915#553] / [i915#725]) ->
[PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-hsw-4770/igt@i915_selfte
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Ignore incomplete engines after init failure
== Series Details ==
Series: drm/i915/gt: Ignore incomplete engines after init failure
URL : https://patchwork.freedesktop.org/series/71404/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7637 -> Patchwork_15930
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15930 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15930, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15930:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_vma:
- fi-bwr-2160:[PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-bwr-2160/igt@i915_selftest@live_vma.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-bwr-2160/igt@i915_selftest@live_vma.html
Known issues
Here are the changes found in Patchwork_15930 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-cml-s: [PASS][3] -> [DMESG-WARN][4] ([fdo#111764])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-cml-s/igt@gem_exec_susp...@basic-s3.html
* igt@i915_selftest@live_hugepages:
- fi-byt-j1900: [PASS][5] -> [DMESG-FAIL][6] ([i915#845])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-j1900/igt@i915_selftest@live_hugepages.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-byt-j1900/igt@i915_selftest@live_hugepages.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [PASS][7] -> [FAIL][8] ([i915#217])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][9] ([fdo#111736]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-tgl-u/igt@gem_exec_cre...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@gem_exec_parallel@basic:
- fi-byt-j1900: [TIMEOUT][11] -> [PASS][12] +2 similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-j1900/igt@gem_exec_paral...@basic.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-byt-j1900/igt@gem_exec_paral...@basic.html
* igt@gem_exec_store@basic-all:
- fi-byt-j1900: [FAIL][13] -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-byt-j1900/igt@gem_exec_st...@basic-all.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-byt-j1900/igt@gem_exec_st...@basic-all.html
Warnings
* igt@kms_flip@basic-flip-vs-modeset:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][16] ([i915#62] / [i915#92]) +6 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) ->
[DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95]) +7 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7637/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15930/fi-kbl-x1275/igt@prime_v...@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#845]: https://gitlab.freedesktop.org/drm/intel/issues/845
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (47 -> 41)
--
Additional (5): fi-skl-6770hq fi-bsw-kefka fi-skl-lmem fi-tgl-y fi-skl-6700k2
Missing(11): fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy
f
[Intel-gfx] [PATCH 3/3] drm/i915: use true, false for bool variable in intel_crt.c
Fixes coccicheck warning:
drivers/gpu/drm/i915/display/intel_crt.c:1066:1-28: WARNING: Assignment of 0/1
to bool variable
drivers/gpu/drm/i915/display/intel_crt.c:928:2-29: WARNING: Assignment of 0/1
to bool variable
drivers/gpu/drm/i915/display/intel_crt.c:443:2-29: WARNING: Assignment of 0/1
to bool variable
Reported-by: Hulk Robot
Signed-off-by: Ma Feng
---
drivers/gpu/drm/i915/display/intel_crt.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index b2b1336..8596eef 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -440,7 +440,7 @@ static bool intel_ironlake_crt_detect_hotplug(struct
drm_connector *connector)
bool turn_off_dac = HAS_PCH_SPLIT(dev_priv);
u32 save_adpa;
- crt->force_hotplug_required = 0;
+ crt->force_hotplug_required = false;
save_adpa = adpa = I915_READ(crt->adpa_reg);
DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n",
adpa);
@@ -925,7 +925,7 @@ void intel_crt_reset(struct drm_encoder *encoder)
POSTING_READ(crt->adpa_reg);
DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
- crt->force_hotplug_required = 1;
+ crt->force_hotplug_required = true;
}
}
@@ -1063,7 +1063,7 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
/*
* Configure the automatic hotplug detection stuff
*/
- crt->force_hotplug_required = 0;
+ crt->force_hotplug_required = false;
/*
* TODO: find a proper way to discover whether we need to set the the
--
2.6.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec
On 2019-12-23 12:03 p.m., Animesh Manna wrote: > [Why]: > Aligh with DP spec wanted to follow same naming convention. > > [How]: > Changed the macro name of the dpcd address used for getting requested > test-pattern. > > Cc: Harry Wentland > Cc: Alex Deucher > Signed-off-by: Animesh Manna Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- > include/drm/drm_dp_helper.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > index 42aa889fd0f5..1a6109be2fce 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c > @@ -2491,7 +2491,7 @@ static void dp_test_send_phy_test_pattern(struct > dc_link *link) > /* get phy test pattern and pattern parameters from DP receiver */ > core_link_read_dpcd( > link, > - DP_TEST_PHY_PATTERN, > + DP_PHY_TEST_PATTERN, > &dpcd_test_pattern.raw, > sizeof(dpcd_test_pattern)); > core_link_read_dpcd( > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index 8f8f3632e697..d6e560870fb1 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -699,7 +699,7 @@ > # define DP_TEST_CRC_SUPPORTED (1 << 5) > # define DP_TEST_COUNT_MASK 0xf > > -#define DP_TEST_PHY_PATTERN 0x248 > +#define DP_PHY_TEST_PATTERN 0x248 > #define DP_TEST_80BIT_CUSTOM_PATTERN_7_00x250 > #define DP_TEST_80BIT_CUSTOM_PATTERN_15_8 0x251 > #define DP_TEST_80BIT_CUSTOM_PATTERN_23_16 0x252 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/3] drm/i915/dp: use true, false for bool variable in intel_dp.c
Fixes coccicheck warning: drivers/gpu/drm/i915/display/intel_dp.c:4950:1-33: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/display/intel_dp.c:4906:1-33: WARNING: Assignment of 0/1 to bool variable Reported-by: Hulk Robot Signed-off-by: Ma Feng --- drivers/gpu/drm/i915/display/intel_dp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2f31d22..4fd0fcd 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4903,7 +4903,7 @@ static u8 intel_dp_autotest_video_pattern(struct intel_dp *intel_dp) intel_dp->compliance.test_data.hdisplay = be16_to_cpu(h_width); intel_dp->compliance.test_data.vdisplay = be16_to_cpu(v_height); /* Set test active flag here so userspace doesn't interrupt things */ - intel_dp->compliance.test_active = 1; + intel_dp->compliance.test_active = true; return DP_TEST_ACK; } @@ -4947,7 +4947,7 @@ static u8 intel_dp_autotest_edid(struct intel_dp *intel_dp) } /* Set test active flag here so userspace doesn't interrupt things */ - intel_dp->compliance.test_active = 1; + intel_dp->compliance.test_active = true; return test_result; } -- 2.6.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/3] drm/i915: use true, false for bool variable in i915_debugfs.c
Fixes coccicheck warning: drivers/gpu/drm/i915/i915_debugfs.c:3078:4-36: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/i915_debugfs.c:3078:4-36: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/i915_debugfs.c:3080:4-36: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/i915_debugfs.c:3080:4-36: WARNING: Assignment of 0/1 to bool variable Reported-by: Hulk Robot Signed-off-by: Ma Feng --- drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index d28468e..4ead86a 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -3075,9 +3075,9 @@ static ssize_t i915_displayport_test_active_write(struct file *file, * testing code, only accept an actual value of 1 here */ if (val == 1) - intel_dp->compliance.test_active = 1; + intel_dp->compliance.test_active = true; else - intel_dp->compliance.test_active = 0; + intel_dp->compliance.test_active = false; } } drm_connector_list_iter_end(&conn_iter); -- 2.6.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 2/9] drm/dp: get/set phy compliance pattern
On 2019-12-23 12:03 p.m., Animesh Manna wrote:
> During phy compliance auto test mode source need to read
> requested test pattern from sink through DPCD. After processing
> the request source need to set the pattern. So set/get method
> added in drm layer as it is DP protocol.
>
> v2: As per review feedback from Manasi on RFC version,
> - added dp revision as function argument in set_phy_pattern api.
> - used int for link_rate and u8 for lane_count to align with existing code.
>
> Signed-off-by: Animesh Manna
> ---
> drivers/gpu/drm/drm_dp_helper.c | 93 +
> include/drm/drm_dp_helper.h | 31 +++
> 2 files changed, 124 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 2c7870aef469..91c80973aa83 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -1371,3 +1371,96 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8
> dsc_dpcd[DP_DSC_RECEIVER_CAP_S
> return num_bpc;
> }
> EXPORT_SYMBOL(drm_dp_dsc_sink_supported_input_bpcs);
> +
> +/**
> + * drm_dp_get_phy_test_pattern() - get the requested pattern from the sink.
> + * @aux: DisplayPort AUX channel
> + * @data: DP phy compliance test parameters.
> + *
> + * Returns 0 on success or a negative error code on failure.
> + */
> +int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux,
> + struct drm_dp_phy_test_params *data)
> +{
> + int err;
> + u8 rate, lanes;
> +
> + err = drm_dp_dpcd_readb(aux, DP_TEST_LINK_RATE, &rate);
> + if (err < 0)
> + return err;
> + data->link_rate = drm_dp_bw_code_to_link_rate(rate);
> +
> + err = drm_dp_dpcd_readb(aux, DP_TEST_LANE_COUNT, &lanes);
> + if (err < 0)
> + return err;
> + data->num_lanes = lanes & DP_MAX_LANE_COUNT_MASK;
> +
> + if (lanes & DP_ENHANCED_FRAME_CAP)
> + data->enahanced_frame_cap = true;
> +
> + err = drm_dp_dpcd_readb(aux, DP_PHY_TEST_PATTERN, &data->phy_pattern);
> + if (err < 0)
> + return err;
> +
> + switch (data->phy_pattern) {
> + case DP_PHY_TEST_PATTERN_80BIT_CUSTOM:
> + err = drm_dp_dpcd_read(aux, DP_TEST_80BIT_CUSTOM_PATTERN_7_0,
> +&data->custom80, 10);
Using sizeof(data->custom80) might be safer.
> + if (err < 0)
> + return err;
> +
> + break;
> + case DP_PHY_TEST_PATTERN_CP2520:
> + err = drm_dp_dpcd_read(aux, DP_TEST_HBR2_SCRAMBLER_RESET,
> +&data->hbr2_reset, 2);
Same here, using sizeof(data->hbr2_reset).
> + if (err < 0)
> + return err;
> + }
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(drm_dp_get_phy_test_pattern);
> +
> +/**
> + * drm_dp_set_phy_test_pattern() - set the pattern to the sink.
> + * @aux: DisplayPort AUX channel
> + * @data: DP phy compliance test parameters.
> + *
> + * Returns 0 on success or a negative error code on failure.
> + */
> +int drm_dp_set_phy_test_pattern(struct drm_dp_aux *aux,
> + struct drm_dp_phy_test_params *data, u8 dp_rev)
> +{
> + int err, i;
> + u8 link_config[2];
> + u8 test_pattern;
> +
> + link_config[0] = drm_dp_link_rate_to_bw_code(data->link_rate);
> + link_config[1] = data->num_lanes;
> + if (data->enahanced_frame_cap)
> + link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
> + err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, link_config, 2);
> + if (err < 0)
> + return err;
> +
> + test_pattern = data->phy_pattern;
> + if (dp_rev < 0x12) {
> + test_pattern = (test_pattern << 2) &
> +DP_LINK_QUAL_PATTERN_11_MASK;
> + err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET,
> + test_pattern);
> + if (err < 0)
> + return err;
> + } else {
> + for (i = 0; i < data->num_lanes; i++) {
> + err = drm_dp_dpcd_writeb(aux,
> + DP_LINK_QUAL_LANE0_SET + i,
> + test_pattern);
> + if (err < 0)
> + return err;
> + }
> + }
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(drm_dp_set_phy_test_pattern);
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index d6e560870fb1..42a364748308 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -700,6 +700,15 @@
> # define DP_TEST_COUNT_MASK 0xf
>
> #define DP_PHY_TEST_PATTERN 0x248
> +# define DP_PHY_TEST_PATTERN_SEL_MASK 0x7
> +# define DP_PHY_TEST_PATTERN_NONE 0x0
> +# define DP_PHY_TEST_PATTERN_D10_2 0x1
> +# define DP_PHY_TEST_PATTERN_ERROR_COUNT0x2
> +# define D
Re: [Intel-gfx] [PATCH] drm/i915/dsb: Increase log level if DSB engine gets busy
On Wed, Dec 25, 2019 at 10:07 AM Swati Sharma wrote:
>
> Increase the log level if DSB engine gets busy. If dsb engine
> is busy, it should be an error condition to indicate there might be
> some difficulty with the hardware.
>
> If DSB engine gets busy, load luts will fail and as per current
> driver design if one instance of DSB engine gets busy, we are not
> allocating the other instance. So, increase the log level to indicate there
> could be an issue with driver/hardware.
>
> Signed-off-by: Swati Sharma
> ---
> drivers/gpu/drm/i915/display/intel_dsb.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index ada006a690df..6f67b5dfa128 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -52,7 +52,7 @@ static inline bool intel_dsb_enable_engine(struct intel_dsb
> *dsb)
>
> dsb_ctrl = I915_READ(DSB_CTRL(pipe, dsb->id));
> if (DSB_STATUS & dsb_ctrl) {
> - DRM_DEBUG_KMS("DSB engine is busy.\n");
> + DRM_ERROR("DSB engine is busy.\n");
are we seeing this? Isn't it a dbg message because in this case we
would fallback to direct mmio?
Lucas De Marchi
> return false;
> }
>
> @@ -72,7 +72,7 @@ static inline bool intel_dsb_disable_engine(struct
> intel_dsb *dsb)
>
> dsb_ctrl = I915_READ(DSB_CTRL(pipe, dsb->id));
> if (DSB_STATUS & dsb_ctrl) {
> - DRM_DEBUG_KMS("DSB engine is busy.\n");
> + DRM_ERROR("DSB engine is busy.\n");
> return false;
> }
>
> --
> 2.24.1
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Lucas De Marchi
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Apply sanitiization just before resume
== Series Details == Series: drm/i915/gt: Apply sanitiization just before resume URL : https://patchwork.freedesktop.org/series/71334/ State : success == Summary == CI Bug Log - changes from CI_DRM_7630_full -> Patchwork_15905_full Summary --- **SUCCESS** No regressions found. New tests - New tests have been introduced between CI_DRM_7630_full and Patchwork_15905_full: ### New Piglit tests (10) ### * spec@arb_texture_barrier@arb_texture_barrier-blending-in-shader 32 42 8 64 2: - Statuses : 1 fail(s) - Exec time: [6.64] s * spec@arb_texture_barrier@arb_texture_barrier-blending-in-shader 32 42 8 64 3: - Statuses : 1 fail(s) - Exec time: [6.64] s * spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-float_mat2x4_array3-position-double_dmat2_array2: - Statuses : 1 fail(s) - Exec time: [0.16] s * spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dvec3-double_dmat3x2_array2: - Statuses : 1 fail(s) - Exec time: [0.17] s * spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dvec3-double_dmat4x2_array2: - Statuses : 1 fail(s) - Exec time: [0.16] s * spec@glsl-4.20@execution@vs_in@vs-input-double_dmat3x2-double_dvec3_array2-position: - Statuses : 1 fail(s) - Exec time: [0.13] s * spec@glsl-4.20@execution@vs_in@vs-input-double_dmat3x2-position-double_double: - Statuses : 1 fail(s) - Exec time: [0.17] s * spec@glsl-4.20@execution@vs_in@vs-input-int_ivec3-position-double_dmat3x4_array2: - Statuses : 1 fail(s) - Exec time: [0.18] s * spec@glsl-4.20@execution@vs_in@vs-input-position-uint_uint_array3-double_dvec2_array2: - Statuses : 1 fail(s) - Exec time: [0.16] s * spec@glsl-4.20@execution@vs_in@vs-input-uint_uint-position-double_dmat2x4_array2: - Statuses : 1 fail(s) - Exec time: [0.17] s Known issues Here are the changes found in Patchwork_15905_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-kbl7/igt@gem_ctx_isolat...@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/shard-kbl4/igt@gem_ctx_isolat...@rcs0-s3.html * igt@gem_ctx_persistence@vecs0-mixed-process: - shard-apl: [PASS][3] -> [FAIL][4] ([i915#679]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-apl4/igt@gem_ctx_persiste...@vecs0-mixed-process.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/shard-apl6/igt@gem_ctx_persiste...@vecs0-mixed-process.html * igt@gem_exec_parallel@fds: - shard-tglb: [PASS][5] -> [INCOMPLETE][6] ([i915#470]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb4/igt@gem_exec_paral...@fds.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/shard-tglb6/igt@gem_exec_paral...@fds.html * igt@gem_exec_schedule@smoketest-all: - shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#463]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb5/igt@gem_exec_sched...@smoketest-all.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/shard-tglb6/igt@gem_exec_sched...@smoketest-all.html * igt@gem_exec_suspend@basic-s3: - shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([fdo#111736] / [i915#460]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb8/igt@gem_exec_susp...@basic-s3.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/shard-tglb3/igt@gem_exec_susp...@basic-s3.html * igt@gem_persistent_relocs@forked-interruptible-thrashing: - shard-kbl: [PASS][11] -> [FAIL][12] ([i915#520]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-kbl7/igt@gem_persistent_rel...@forked-interruptible-thrashing.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/shard-kbl7/igt@gem_persistent_rel...@forked-interruptible-thrashing.html * igt@gem_softpin@noreloc-s3: - shard-skl: [PASS][13] -> [INCOMPLETE][14] ([i915#69]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-skl8/igt@gem_soft...@noreloc-s3.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/shard-skl4/igt@gem_soft...@noreloc-s3.html * igt@gem_sync@basic-store-all: - shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#472]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb1/igt@gem_s...@basic-store-all.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/shard-tglb8/igt@gem_s...@basic-store-all.html * igt@i915_suspend@sysfs-reader: - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +3 similar issues [17]: h
Re: [Intel-gfx] [PATCH] drm/i915/tgl: Assume future platforms will inherit TGL's SFC capability
On Tue, Dec 24, 2019 at 03:15:21PM -0800, Matt Roper wrote:
Our usual i915 convention is to assume that future platforms will follow
the same behavior as the latest platform of today. The VDBOX/SFC
capabilities described here don't seem like something that should be
specific to TGL, so let's future-proof by making the test apply to all
gen12+ platforms.
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/intel_device_info.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index 1acb5db77431..bb709a08bd3c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -1093,7 +1093,7 @@ void intel_device_info_init_mmio(struct drm_i915_private
*dev_priv)
* hooked up to an SFC (Scaler & Format Converter) unit.
* In TGL each VDBOX has access to an SFC.
*/
- if (IS_TIGERLAKE(dev_priv) || logical_vdbox++ % 2 == 0)
+ if (INTEL_GEN(dev_priv) >= 12 || logical_vdbox++ % 2 == 0)
RUNTIME_INFO(dev_priv)->vdbox_sfc_access |= BIT(i);
but why are we even doing this instead of initiliazing them at compile
time on the device_info? If it's fused off, then whatever is set in
vdbox_sfc_access bit shouldn't matter... or if the code making use of
this doesn't check for engine availability, then this part of the
function could just disable the bit of whatever is fused off, regardless
if it's ice lake, tiger lake or whatever.
Lucas De Marchi
}
DRM_DEBUG_DRIVER("vdbox enable: %04x, instances: %04lx\n",
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/tgl: Assume future platforms will inherit TGL's SFC capability
On Thu, Dec 26, 2019 at 02:23:49PM -0800, Lucas De Marchi wrote:
> On Tue, Dec 24, 2019 at 03:15:21PM -0800, Matt Roper wrote:
> > Our usual i915 convention is to assume that future platforms will follow
> > the same behavior as the latest platform of today. The VDBOX/SFC
> > capabilities described here don't seem like something that should be
> > specific to TGL, so let's future-proof by making the test apply to all
> > gen12+ platforms.
> >
> > Cc: Lucas De Marchi
> > Signed-off-by: Matt Roper
> > ---
> > drivers/gpu/drm/i915/intel_device_info.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> > b/drivers/gpu/drm/i915/intel_device_info.c
> > index 1acb5db77431..bb709a08bd3c 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.c
> > +++ b/drivers/gpu/drm/i915/intel_device_info.c
> > @@ -1093,7 +1093,7 @@ void intel_device_info_init_mmio(struct
> > drm_i915_private *dev_priv)
> > * hooked up to an SFC (Scaler & Format Converter) unit.
> > * In TGL each VDBOX has access to an SFC.
> > */
> > - if (IS_TIGERLAKE(dev_priv) || logical_vdbox++ % 2 == 0)
> > + if (INTEL_GEN(dev_priv) >= 12 || logical_vdbox++ % 2 == 0)
> > RUNTIME_INFO(dev_priv)->vdbox_sfc_access |= BIT(i);
>
> but why are we even doing this instead of initiliazing them at compile
> time on the device_info? If it's fused off, then whatever is set in
> vdbox_sfc_access bit shouldn't matter... or if the code making use of
> this doesn't check for engine availability, then this part of the
> function could just disable the bit of whatever is fused off, regardless
> if it's ice lake, tiger lake or whatever.
I'm not sure; it looks like among other things we send this bitmask
directly to the GuC, so I'm not really comfortable making the assumption
that all users of the mask will pay attention to whether the engine is
fused off or not, even if that turns out to be true for the i915 usage.
I could switch this to being initialized statically and then modified
here if an engine is fused off. In that case should this move out of
RUNTIME_INFO() and back to INTEL_INFO()? Honestly I've never really
understood why we have those separated given that we still ignore the
const and modify INTEL_INFO at runtime in several places.
Matt
>
> Lucas De Marchi
>
>
> > }
> > DRM_DEBUG_DRIVER("vdbox enable: %04x, instances: %04lx\n",
> > --
> > 2.23.0
> >
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: nuke skl workaround for pre-production hw (rev2)
== Series Details == Series: drm/i915/display: nuke skl workaround for pre-production hw (rev2) URL : https://patchwork.freedesktop.org/series/71230/ State : success == Summary == CI Bug Log - changes from CI_DRM_7630_full -> Patchwork_15906_full Summary --- **SUCCESS** No regressions found. New tests - New tests have been introduced between CI_DRM_7630_full and Patchwork_15906_full: ### New Piglit tests (8) ### * spec@arb_draw_buffers@fbo-mrt-new-bind: - Statuses : 1 fail(s) - Exec time: [0.12] s * spec@arb_texture_cube_map_array@texturesize@tes-texturesize-usamplercubearray: - Statuses : 1 fail(s) - Exec time: [0.09] s * spec@arb_texture_cube_map_array@texturesize@vs-texturesize-usamplercubearray: - Statuses : 1 fail(s) - Exec time: [0.11] s * spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-double_double_array3-position-double_dmat2x4_array2: - Statuses : 1 fail(s) - Exec time: [0.16] s * spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-uint_uint_array3-position-double_dmat4x3: - Statuses : 1 fail(s) - Exec time: [0.12] s * spec@ext_framebuffer_multisample@draw-buffers-alpha-to-coverage 8: - Statuses : 1 fail(s) - Exec time: [0.20] s * spec@ext_framebuffer_multisample@sample-alpha-to-coverage 8 color: - Statuses : 1 fail(s) - Exec time: [0.16] s * spec@glsl-4.20@execution@vs_in@vs-input-position-double_dmat4x2_array3-double_dvec4: - Statuses : 1 fail(s) - Exec time: [0.16] s Known issues Here are the changes found in Patchwork_15906_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@close-race: - shard-tglb: [PASS][1] -> [INCOMPLETE][2] ([i915#435]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb8/igt@gem_b...@close-race.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-tglb6/igt@gem_b...@close-race.html * igt@gem_ctx_persistence@processes: - shard-skl: [PASS][3] -> [FAIL][4] ([i915#570]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-skl9/igt@gem_ctx_persiste...@processes.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-skl5/igt@gem_ctx_persiste...@processes.html * igt@gem_exec_suspend@basic-s3: - shard-tglb: [PASS][5] -> [INCOMPLETE][6] ([fdo#111736] / [i915#460]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb8/igt@gem_exec_susp...@basic-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-tglb4/igt@gem_exec_susp...@basic-s3.html * igt@gem_sync@basic-each: - shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#472] / [i915#707]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb9/igt@gem_s...@basic-each.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-tglb6/igt@gem_s...@basic-each.html * igt@gem_sync@basic-store-all: - shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([i915#472]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb1/igt@gem_s...@basic-store-all.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-tglb3/igt@gem_s...@basic-store-all.html * igt@i915_pm_rpm@system-suspend: - shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([i915#435] / [i915#460]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb8/igt@i915_pm_...@system-suspend.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-tglb7/igt@i915_pm_...@system-suspend.html * igt@i915_selftest@live_gem_contexts: - shard-tglb: [PASS][13] -> [INCOMPLETE][14] ([i915#455]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb2/igt@i915_selftest@live_gem_contexts.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-tglb4/igt@i915_selftest@live_gem_contexts.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-skl: [PASS][15] -> [INCOMPLETE][16] ([i915#300]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-skl10/igt@kms_cursor_...@pipe-a-cursor-suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-skl3/igt@kms_cursor_...@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-tglb: [PASS][17] -> [INCOMPLETE][18] ([i915#456] / [i915#460]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb6/igt@kms_cursor_...@pipe-b-cursor-suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/shard-tglb5/igt@kms_cursor_...@pipe-b-cursor-suspend.html * igt@kms_cursor_crc@pipe-c-cursor-256x256-onscreen: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#54]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-sk
Re: [Intel-gfx] [PATCH] drm/i915/dsb: Increase log level if DSB engine gets busy
On 27-Dec-19 2:39 AM, Lucas De Marchi wrote:
On Wed, Dec 25, 2019 at 10:07 AM Swati Sharma wrote:
Increase the log level if DSB engine gets busy. If dsb engine
is busy, it should be an error condition to indicate there might be
some difficulty with the hardware.
If DSB engine gets busy, load luts will fail and as per current
driver design if one instance of DSB engine gets busy, we are not
allocating the other instance. So, increase the log level to indicate there
could be an issue with driver/hardware.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_dsb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
b/drivers/gpu/drm/i915/display/intel_dsb.c
index ada006a690df..6f67b5dfa128 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -52,7 +52,7 @@ static inline bool intel_dsb_enable_engine(struct intel_dsb
*dsb)
dsb_ctrl = I915_READ(DSB_CTRL(pipe, dsb->id));
if (DSB_STATUS & dsb_ctrl) {
- DRM_DEBUG_KMS("DSB engine is busy.\n");
+ DRM_ERROR("DSB engine is busy.\n");
are we seeing this? Isn't it a dbg message because in this case we
would fallback to direct mmio?
We are seeing this issue and is already under debug.
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/shard-tglb5/igt@kms_available_modes_crc@available_mode_test_crc.html
<7> [303.727858] [drm:intel_dsb_commit [i915]] DSB engine is busy.
<7> [303.727975] [drm:icl_load_luts [i915]] DSB engine is busy.
Lucas De Marchi
return false;
}
@@ -72,7 +72,7 @@ static inline bool intel_dsb_disable_engine(struct intel_dsb
*dsb)
dsb_ctrl = I915_READ(DSB_CTRL(pipe, dsb->id));
if (DSB_STATUS & dsb_ctrl) {
- DRM_DEBUG_KMS("DSB engine is busy.\n");
+ DRM_ERROR("DSB engine is busy.\n");
return false;
}
--
2.24.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
~Swati Sharma
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
