Re: [Intel-gfx] [PATCH v2 5/7] drm/i915: Get first crtc instead of PIPE_A crtc
On 2020-02-11 at 22:55:30 +0530, Anshuman Gupta wrote:
> intel_plane_fb_max_stride should return the max stride of
> primary plane for first available pipe in intel device info
> pipe_mask.
> Similarly glk_force_audio_cdclk() should also use the first
> available CRTC instead of pipe 'A' crtc to force the cdclk
> changes.
>
> changes since RFC:
> - Introduced a helper to get first intel_crtc intel_get_first_crtc. [Ville]
> v1:
> - Used intel_get_first_crtc() instead of PIPE_A crtc in
> glk_force_audio_cdclk(). [Ville]
Hi Ville,
You had provided your RB on earlier revision
https://patchwork.freedesktop.org/patch/351873/?series=72468&rev=2
later u have provided the above review comment, as current
patch fixes the above review comment.
can i use your RB for this patch, if current patch is ok.
Thanks,
Anshuman Gupta.
>
> Cc: Ville Syrjälä
> Signed-off-by: Anshuman Gupta
> ---
> drivers/gpu/drm/i915/display/intel_audio.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 5 +++--
> drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++
> 3 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
> b/drivers/gpu/drm/i915/display/intel_audio.c
> index 30fb7c887ff0..19bf206037c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -844,7 +844,7 @@ static void glk_force_audio_cdclk(struct drm_i915_private
> *dev_priv,
> struct intel_crtc *crtc;
> int ret;
>
> - crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> + crtc = intel_get_first_crtc(dev_priv);
> if (!crtc)
> return;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 5ba0b40fbfde..6fdaeb019fef 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2715,9 +2715,10 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private
> *dev_priv,
>
> /*
>* We assume the primary plane for pipe A has
> - * the highest stride limits of them all.
> + * the highest stride limits of them all,
> + * if in case pipe A is disabled, use the first pipe from pipe_mask.
>*/
> - crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> + crtc = intel_get_first_crtc(dev_priv);
> if (!crtc)
> return 0;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index d359f1636ba8..359eaa6703a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1403,6 +1403,12 @@ vlv_pipe_to_channel(enum pipe pipe)
> }
> }
>
> +static inline struct intel_crtc *
> +intel_get_first_crtc(struct drm_i915_private *dev_priv)
> +{
> + return to_intel_crtc(drm_crtc_from_index(&dev_priv->drm, 0));
> +}
> +
> static inline struct intel_crtc *
> intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
> {
> --
> 2.24.0
>
___
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Re: [Intel-gfx] [PATCH] Add support for Color encoding YCBCR_BT2020
> -Original Message- > From: Jani Nikula > Sent: Friday, February 14, 2020 4:56 PM > To: Kadiyala, Kishore ; intel- > g...@lists.freedesktop.org > Cc: Kadiyala, Kishore > Subject: Re: [Intel-gfx] [PATCH] Add support for Color encoding YCBCR_BT2020 > > On Fri, 14 Feb 2020, Kishore Kadiyala wrote: > > Currently the plane property doesn't have support for YCBCR_BT2020, > > which enables the corresponding color conversion mode on plane CSC. > > Please prefix your patch subjects properly. "drm/i915: " at a minimum for > stuff > touching i915. Sure Jani, I'll include prefix from next time. > > No need to resend for this, but for future reference. Ok Regards, Kishore > > BR, > Jani. > > > > > > Signed-off-by: Kishore Kadiyala > > Cc: Uma Shankar > > --- > > drivers/gpu/drm/i915/display/intel_sprite.c | 9 +++-- > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c > > b/drivers/gpu/drm/i915/display/intel_sprite.c > > index 7abeefe8dce5..5169a7260d7c 100644 > > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > > @@ -3011,6 +3011,7 @@ skl_universal_plane_create(struct drm_i915_private > *dev_priv, > > struct intel_plane *plane; > > enum drm_plane_type plane_type; > > unsigned int supported_rotations; > > + unsigned int supported_csc; > > unsigned int possible_crtcs; > > const u64 *modifiers; > > const u32 *formats; > > @@ -3088,9 +3089,13 @@ skl_universal_plane_create(struct > drm_i915_private *dev_priv, > >DRM_MODE_ROTATE_0, > >supported_rotations); > > > > + supported_csc = BIT(DRM_COLOR_YCBCR_BT601) | > > +BIT(DRM_COLOR_YCBCR_BT709); > > + > > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > > + supported_csc |= BIT(DRM_COLOR_YCBCR_BT2020); > > + > > drm_plane_create_color_properties(&plane->base, > > - BIT(DRM_COLOR_YCBCR_BT601) | > > - BIT(DRM_COLOR_YCBCR_BT709), > > + supported_csc, > > > BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | > > > BIT(DRM_COLOR_YCBCR_FULL_RANGE), > > DRM_COLOR_YCBCR_BT709, > > -- > Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Add Wa_1808121037 to tgl.
== Series Details == Series: drm/i915/tgl: Add Wa_1808121037 to tgl. URL : https://patchwork.freedesktop.org/series/73379/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16550_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16550_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16550_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16550_full: ### IGT changes ### Possible regressions * igt@perf@oa-formats: - shard-iclb: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb3/igt@p...@oa-formats.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-iclb3/igt@p...@oa-formats.html Known issues Here are the changes found in Patchwork_16550_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_parallel@vcs1-fds: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +14 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@gem_exec_paral...@vcs1-fds.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-iclb5/igt@gem_exec_paral...@vcs1-fds.html * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +13 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb1/igt@gem_exec_sched...@preempt-contexts-bsd2.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-iclb3/igt@gem_exec_sched...@preempt-contexts-bsd2.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +5 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_exec_sched...@wide-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-iclb1/igt@gem_exec_sched...@wide-bsd.html * igt@gem_partial_pwrite_pread@writes-after-reads-snoop: - shard-hsw: [PASS][9] -> [FAIL][10] ([i915#694]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw5/igt@gem_partial_pwrite_pr...@writes-after-reads-snoop.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-hsw1/igt@gem_partial_pwrite_pr...@writes-after-reads-snoop.html * igt@gem_softpin@noreloc-s3: - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([i915#69]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl4/igt@gem_soft...@noreloc-s3.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-skl7/igt@gem_soft...@noreloc-s3.html * igt@gem_workarounds@suspend-resume-context: - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl7/igt@gem_workarou...@suspend-resume-context.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-apl4/igt@gem_workarou...@suspend-resume-context.html * igt@kms_color@pipe-a-gamma: - shard-tglb: [PASS][15] -> [FAIL][16] ([i915#1149]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb7/igt@kms_co...@pipe-a-gamma.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-tglb2/igt@kms_co...@pipe-a-gamma.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-random: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#54]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-skl10/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-skl: [PASS][19] -> [FAIL][20] ([IGT#5]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl7/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-skl1/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#79]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16550/shard-skl1/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [PASS][23] -> [
Re: [Intel-gfx] [PATCH v3 3/7] drm/exynos: Use drm_encoder_mask()
20. 2. 12. 오전 1:22에 Ville Syrjala 이(가) 쓴 글: > From: Ville Syrjälä > > Replace the hand rolled encoder bitmask thing with drm_encoder_mask() > > Cc: Inki Dae > Cc: Joonyoung Shim > Cc: Seung-Woo Kim > Cc: Kyungmin Park > Acked-by: Thomas Zimmermann > Signed-off-by: Ville Syrjälä Acked-by: Inki Dae THanks, Inki Dae > --- > drivers/gpu/drm/exynos/exynos_drm_drv.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c > b/drivers/gpu/drm/exynos/exynos_drm_drv.c > index ba0f868b2477..57defeb44522 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c > +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c > @@ -270,7 +270,7 @@ static int exynos_drm_bind(struct device *dev) > struct drm_encoder *encoder; > struct drm_device *drm; > unsigned int clone_mask; > - int cnt, ret; > + int ret; > > drm = drm_dev_alloc(&exynos_drm_driver, dev); > if (IS_ERR(drm)) > @@ -293,10 +293,9 @@ static int exynos_drm_bind(struct device *dev) > exynos_drm_mode_config_init(drm); > > /* setup possible_clones. */ > - cnt = 0; > clone_mask = 0; > list_for_each_entry(encoder, &drm->mode_config.encoder_list, head) > - clone_mask |= (1 << (cnt++)); > + clone_mask |= drm_encoder_mask(encoder); > > list_for_each_entry(encoder, &drm->mode_config.encoder_list, head) > encoder->possible_clones = clone_mask; > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Add support for DP 1.4 Compliance edid corruption test (rev6)
== Series Details == Series: drm: Add support for DP 1.4 Compliance edid corruption test (rev6) URL : https://patchwork.freedesktop.org/series/70530/ State : success == Summary == CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16548_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16548_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@busy-vcs1: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +15 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_b...@busy-vcs1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-iclb3/igt@gem_b...@busy-vcs1.html * igt@gem_exec_schedule@pi-distinct-iova-bsd: - shard-iclb: [PASS][3] -> [SKIP][4] ([i915#677]) +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_exec_sched...@pi-distinct-iova-bsd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-iclb2/igt@gem_exec_sched...@pi-distinct-iova-bsd.html * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +21 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb1/igt@gem_exec_sched...@preempt-contexts-bsd2.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-iclb7/igt@gem_exec_sched...@preempt-contexts-bsd2.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +8 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb7/igt@gem_exec_sched...@reorder-wide-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-iclb2/igt@gem_exec_sched...@reorder-wide-bsd.html * igt@i915_pm_dc@dc5-dpms: - shard-iclb: [PASS][9] -> [FAIL][10] ([i915#447]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb1/igt@i915_pm...@dc5-dpms.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-iclb3/igt@i915_pm...@dc5-dpms.html * igt@kms_color@pipe-a-gamma: - shard-tglb: [PASS][11] -> [FAIL][12] ([i915#1149]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb7/igt@kms_co...@pipe-a-gamma.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-tglb8/igt@kms_co...@pipe-a-gamma.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-random: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#54]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-skl8/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic: - shard-skl: [PASS][15] -> [FAIL][16] ([IGT#5]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl6/igt@kms_cursor_leg...@flip-vs-cursor-atomic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-skl2/igt@kms_cursor_leg...@flip-vs-cursor-atomic.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: [PASS][17] -> [FAIL][18] ([i915#79]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk1/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-glk5/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#79]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-skl9/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +3 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl3/igt@kms_f...@flip-vs-suspend-interruptible.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-apl4/igt@kms_f...@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@basic: - shard-skl: [PASS][23] -> [FAIL][24] ([i915#49]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl2/igt@kms_frontbuffer_track...@basic.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16548/shard-skl7/igt@kms_frontbuffer_track...@basic.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-tglb: [PASS][25] -> [SKIP][26] ([i915#668]) [25]: https://intel-gfx-ci.01.org/tre
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: pfit/scaler rework prep stuff (rev2)
== Series Details == Series: drm/i915: pfit/scaler rework prep stuff (rev2) URL : https://patchwork.freedesktop.org/series/68409/ State : success == Summary == CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16547_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16547_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@bcs0-s3: - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl4/igt@gem_ctx_isolat...@bcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-apl6/igt@gem_ctx_isolat...@bcs0-s3.html * igt@gem_exec_parallel@vcs1-fds: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +15 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@gem_exec_paral...@vcs1-fds.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-iclb6/igt@gem_exec_paral...@vcs1-fds.html * igt@gem_exec_schedule@in-order-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112146]) +5 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb3/igt@gem_exec_sched...@in-order-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-iclb1/igt@gem_exec_sched...@in-order-bsd.html * igt@gem_exec_schedule@pi-shared-iova-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([i915#677]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_exec_sched...@pi-shared-iova-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-iclb2/igt@gem_exec_sched...@pi-shared-iova-bsd.html * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +20 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb1/igt@gem_exec_sched...@preempt-contexts-bsd2.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-iclb3/igt@gem_exec_sched...@preempt-contexts-bsd2.html * igt@gen7_exec_parse@basic-offset: - shard-hsw: [PASS][11] -> [FAIL][12] ([i915#694]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw6/igt@gen7_exec_pa...@basic-offset.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-hsw1/igt@gen7_exec_pa...@basic-offset.html * igt@i915_pm_rpm@modeset-stress-extra-wait: - shard-glk: [PASS][13] -> [DMESG-WARN][14] ([i915#118] / [i915#95]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk6/igt@i915_pm_...@modeset-stress-extra-wait.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-glk8/igt@i915_pm_...@modeset-stress-extra-wait.html * igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge: - shard-hsw: [PASS][15] -> [INCOMPLETE][16] ([i915#61]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw1/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-hsw5/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: [PASS][17] -> [FAIL][18] ([i915#79]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk1/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-glk8/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend: - shard-kbl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl7/igt@kms_f...@flip-vs-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-kbl3/igt@kms_f...@flip-vs-suspend.html * igt@kms_frontbuffer_tracking@basic: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#49]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl2/igt@kms_frontbuffer_track...@basic.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-skl9/igt@kms_frontbuffer_track...@basic.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-snb: [PASS][23] -> [SKIP][24] ([fdo#109271]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-snb4/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16547/shard-snb6/igt@kms_frontbuffer_track...@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][25] -> [FAIL]
Re: [Intel-gfx] kernel 5.5.4: BUG: kernel NULL pointer dereference, address: 000000000000000
On 2/16/20 3:55 PM, Hillf Danton wrote:
>
> On Sun, 16 Feb 2020 11:33:02 +0100 Toralf Foerster wrote:
>> On 2/16/20 4:26 AM, Hillf Danton wrote:
>>> Looks like a stray lock counts for the above NULL dereference.
>>>
>> Hi, the patch applied on top of 5.5.4 breaks the internal display now even
>> in the boot phase.
>
> My bad.
>
> Then try to do fence signaling before taking request's lock as we'll
> take the fence specific lock if we're in the right direction.
>
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -252,10 +252,10 @@ bool i915_request_retire(struct i915_req
>*/
> remove_from_engine(rq);
>
> + dma_fence_signal(&rq->fence);
> +
> spin_lock_irq(&rq->lock);
> i915_request_mark_complete(rq);
> - if (!i915_request_signaled(rq))
> - dma_fence_signal_locked(&rq->fence);
> if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &rq->fence.flags))
> i915_request_cancel_breadcrumb(rq);
> if (i915_request_has_waitboost(rq)) {
>
This is similar to the behaviour before, the BUG occurres after few
minutes/hours.
It brought now:
Feb 16 22:09:01 t44 CROND[8918]: (root) CMD (/usr/lib/sa/sa1 30 2 -S XALL)
Feb 16 22:10:01 t44 CROND[8980]: (root) CMD (/usr/lib/sa/sa1 30 2 -S XALL)
Feb 16 22:10:37 t44 kernel: BUG: kernel NULL pointer dereference, address:
Feb 16 22:10:37 t44 kernel: #PF: supervisor instruction fetch in kernel mode
Feb 16 22:10:37 t44 kernel: #PF: error_code(0x0010) - not-present page
Feb 16 22:10:37 t44 kernel: PGD 0 P4D 0
Feb 16 22:10:37 t44 kernel: Oops: 0010 [#1] SMP PTI
Feb 16 22:10:37 t44 kernel: CPU: 1 PID: 3403 Comm: X Tainted: G
T 5.5.4 #3
Feb 16 22:10:37 t44 kernel: Hardware name: LENOVO 20AQCTO1WW/20AQCTO1WW, BIOS
GJET92WW (2.42 ) 03/03/2017
Feb 16 22:10:37 t44 kernel: RIP: 0010:0x0
Feb 16 22:10:37 t44 kernel: Code: Bad RIP value.
Feb 16 22:10:37 t44 kernel: RSP: 0018:ad37009eba20 EFLAGS: 00010087
Feb 16 22:10:37 t44 kernel: RAX: RBX: RCX:
000e68b0
Feb 16 22:10:37 t44 kernel: RDX: RSI: 8b35598cba88 RDI:
8b362d9146c0
Feb 16 22:10:37 t44 kernel: RBP: 8b362d9146c0 R08: R09:
8b35598cbe00
Feb 16 22:10:37 t44 kernel: R10: 0002 R11: 0005 R12:
ad37009eba28
Feb 16 22:10:37 t44 kernel: R13: R14: 8b36a40fa200 R15:
8b369bf99600
Feb 16 22:10:37 t44 kernel: FS: 7f2b751398c0()
GS:8b36b268() knlGS:
Feb 16 22:10:37 t44 kernel: CS: 0010 DS: ES: CR0: 80050033
Feb 16 22:10:37 t44 kernel: CR2: ffd6 CR3: 000323292001 CR4:
001606e0
Feb 16 22:10:37 t44 kernel: Call Trace:
Feb 16 22:10:37 t44 kernel: dma_fence_signal_locked+0x85/0xc0
Feb 16 22:10:37 t44 kernel: dma_fence_signal+0x1f/0x40
Feb 16 22:10:37 t44 kernel: i915_request_retire+0x9a/0x290 [i915]
Feb 16 22:10:37 t44 kernel: i915_request_create+0x3f/0xc0 [i915]
Feb 16 22:10:37 t44 kernel: i915_gem_do_execbuffer+0x973/0x17d0 [i915]
Feb 16 22:10:37 t44 kernel: i915_gem_execbuffer2_ioctl+0xe9/0x3a0 [i915]
Feb 16 22:10:37 t44 kernel: ? i915_gem_execbuffer_ioctl+0x2c0/0x2c0 [i915]
Feb 16 22:10:37 t44 kernel: drm_ioctl_kernel+0xae/0x100 [drm]
Feb 16 22:10:37 t44 kernel: drm_ioctl+0x223/0x400 [drm]
Feb 16 22:10:37 t44 kernel: ? i915_gem_execbuffer_ioctl+0x2c0/0x2c0 [i915]
Feb 16 22:10:37 t44 kernel: do_vfs_ioctl+0x4d4/0x760
Feb 16 22:10:37 t44 kernel: ksys_ioctl+0x5b/0x90
Feb 16 22:10:37 t44 kernel: __x64_sys_ioctl+0x15/0x20
Feb 16 22:10:37 t44 kernel: do_syscall_64+0x46/0x100
Feb 16 22:10:37 t44 kernel: entry_SYSCALL_64_after_hwframe+0x44/0xa9
Feb 16 22:10:37 t44 kernel: RIP: 0033:0x7f2b75372137
Feb 16 22:10:37 t44 kernel: Code: 00 00 00 75 0c 48 c7 c0 ff ff ff ff 48 83 c4
18 c3 e8 2d d4 01 00 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 00 b8 10 00 00 00 0f
05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 19 ed 0c 00 f7 d8 64 89 01 48
Feb 16 22:10:37 t44 kernel: RSP: 002b:7ffebe2b4c38 EFLAGS: 0246
ORIG_RAX: 0010
Feb 16 22:10:37 t44 kernel: RAX: ffda RBX: 7ffebe2b4c80 RCX:
7f2b75372137
Feb 16 22:10:37 t44 kernel: RDX: 7ffebe2b4c80 RSI: 40406469 RDI:
000d
Feb 16 22:10:37 t44 kernel: RBP: 40406469 R08: 561477eb8670 R09:
0202
Feb 16 22:10:37 t44 kernel: R10: R11: 0246 R12:
561477e7b0b0
Feb 16 22:10:37 t44 kernel: R13: 000d R14: 7f2b74b51c48 R15:
Feb 16 22:10:37 t44 kernel: Modules linked in: af_packet bridge stp llc
ip6table_filter ip6_tables xt_MASQUERADE iptable_nat nf_nat nf_log_ipv4
nf_log_common xt_LOG xt_limit xt_recent xt_conntrack nf_conntrack
nf_defrag_ipv6 nf_defrag_ipv4 iptable_filter ip_tables uvcvideo
videobuf2_vmalloc videobuf2_memops videobuf2_v4l2 videodev videobuf2_common
btusb btrtl btbcm btintel bluetoot
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] MAINTAINERS: Update drm/i915 bug filing URL
== Series Details == Series: series starting with [1/2] MAINTAINERS: Update drm/i915 bug filing URL URL : https://patchwork.freedesktop.org/series/73371/ State : success == Summary == CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16546_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16546_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_async@concurrent-writes-bsd: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112146]) +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb8/igt@gem_exec_as...@concurrent-writes-bsd.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-iclb1/igt@gem_exec_as...@concurrent-writes-bsd.html * igt@gem_exec_parallel@vcs1-fds: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +11 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@gem_exec_paral...@vcs1-fds.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-iclb8/igt@gem_exec_paral...@vcs1-fds.html * igt@gem_exec_schedule@out-order-bsd2: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +12 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_exec_sched...@out-order-bsd2.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-iclb8/igt@gem_exec_sched...@out-order-bsd2.html * igt@gem_exec_schedule@pi-shared-iova-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([i915#677]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_exec_sched...@pi-shared-iova-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-iclb4/igt@gem_exec_sched...@pi-shared-iova-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-glk: [PASS][9] -> [FAIL][10] ([i915#644]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk2/igt@gem_pp...@flink-and-close-vma-leak.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-glk1/igt@gem_pp...@flink-and-close-vma-leak.html - shard-skl: [PASS][11] -> [FAIL][12] ([i915#644]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl10/igt@gem_pp...@flink-and-close-vma-leak.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-skl9/igt@gem_pp...@flink-and-close-vma-leak.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl2/igt@gem_workarou...@suspend-resume-fd.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-kbl7/igt@gem_workarou...@suspend-resume-fd.html * igt@i915_suspend@sysfs-reader: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +7 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl4/igt@i915_susp...@sysfs-reader.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-apl4/igt@i915_susp...@sysfs-reader.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-random: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#54]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-skl10/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-hsw: [PASS][19] -> [INCOMPLETE][20] ([i915#61]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw2/igt@kms_cursor_...@pipe-c-cursor-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-hsw5/igt@kms_cursor_...@pipe-c-cursor-suspend.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-apl: [PASS][21] -> [FAIL][22] ([i915#79]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-apl4/igt@kms_f...@flip-vs-expired-vblank-interruptible.html - shard-glk: [PASS][23] -> [FAIL][24] ([i915#79]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk7/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16546/shard-glk8/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move: - shard-tglb: [PASS][25] -> [SKIP][26] ([i915#668]) +7 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Read rawclk_freq earlier
== Series Details ==
Series: drm/i915: Read rawclk_freq earlier
URL : https://patchwork.freedesktop.org/series/73507/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7950 -> Patchwork_16591
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16591/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16591:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-dsi}: NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16591/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Participating hosts (40 -> 40)
--
Additional (7): fi-hsw-peppy fi-ilk-650 fi-ivb-3770 fi-bsw-kefka fi-byt-n2820
fi-skl-6700k2 fi-kbl-r
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-bwr-2160 fi-ctg-p8600 fi-gdg-551
fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7950 -> Patchwork_16591
CI-20190529: 20190529
CI_DRM_7950: eebe6906446d83547d0a3f29ffa3f124a8971b40 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5444: c46bae259d427f53fcfcd5f05de0181a9e82d6fe @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16591: f8d26a310444c22043961f0482ea10ef8768e60d @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f8d26a310444 drm/i915: Read rawclk_freq earlier
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16591/index.html
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Avoid potential division-by-zero in computing CS timestamp period
== Series Details ==
Series: drm/i915: Avoid potential division-by-zero in computing CS timestamp
period
URL : https://patchwork.freedesktop.org/series/73506/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7950 -> Patchwork_16590
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16590/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16590:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-dsi}: NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16590/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_16590 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_gtt:
- fi-bxt-dsi: [PASS][2] -> [TIMEOUT][3] ([fdo#112271])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7950/fi-bxt-dsi/igt@i915_selftest@live_gtt.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16590/fi-bxt-dsi/igt@i915_selftest@live_gtt.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-u3: [PASS][4] -> [INCOMPLETE][5] ([fdo#108569])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7950/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16590/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
Participating hosts (40 -> 43)
--
Additional (9): fi-hsw-peppy fi-ilk-650 fi-snb-2520m fi-ivb-3770 fi-bsw-kefka
fi-blb-e6850 fi-byt-n2820 fi-skl-6700k2 fi-kbl-r
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-ctg-p8600 fi-gdg-551
fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7950 -> Patchwork_16590
CI-20190529: 20190529
CI_DRM_7950: eebe6906446d83547d0a3f29ffa3f124a8971b40 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5444: c46bae259d427f53fcfcd5f05de0181a9e82d6fe @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16590: b82aca351b49349019c6bb4e08f3e148bb5b77a7 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b82aca351b49 drm/i915: Avoid potential division-by-zero in computing CS
timestamp period
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16590/index.html
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Fix selftest_mocs for DGFX (rev3)
== Series Details ==
Series: drm/i915/selftests: Fix selftest_mocs for DGFX (rev3)
URL : https://patchwork.freedesktop.org/series/73387/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7950 -> Patchwork_16589
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16589/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16589:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-dsi}: NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16589/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_16589 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_gtt:
- fi-kbl-7500u: [PASS][2] -> [TIMEOUT][3] ([fdo#112271])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7950/fi-kbl-7500u/igt@i915_selftest@live_gtt.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16589/fi-kbl-7500u/igt@i915_selftest@live_gtt.html
* igt@kms_chamelium@dp-edid-read:
- fi-cml-u2: [PASS][4] -> [FAIL][5] ([i915#217] / [i915#976])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7950/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16589/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#976]: https://gitlab.freedesktop.org/drm/intel/issues/976
Participating hosts (40 -> 36)
--
Additional (7): fi-hsw-peppy fi-ilk-650 fi-snb-2520m fi-bsw-kefka
fi-byt-n2820 fi-skl-6700k2 fi-kbl-r
Missing(11): fi-ilk-m540 fi-bsw-n3050 fi-hsw-4200u fi-icl-u2 fi-bwr-2160
fi-ctg-p8600 fi-gdg-551 fi-elk-e7500 fi-pnv-d510 fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7950 -> Patchwork_16589
CI-20190529: 20190529
CI_DRM_7950: eebe6906446d83547d0a3f29ffa3f124a8971b40 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5444: c46bae259d427f53fcfcd5f05de0181a9e82d6fe @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16589: 57a0abd044c141876bb459321a6938611ee1b428 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
57a0abd044c1 drm/i915/gt: Refactor l3cc/mocs availability
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16589/index.html
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Read rawclk_freq earlier
Read the rawclk_freq during runtime info probing, prior to its first use
in computing the CS timestamp frequency. Then store it in the runtime
info, and include it in the debug printouts.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/834
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 19 ++-
drivers/gpu/drm/i915/display/intel_cdclk.h| 2 +-
.../drm/i915/display/intel_display_power.c| 9 +++--
drivers/gpu/drm/i915/display/intel_dp.c | 10 ++
drivers/gpu/drm/i915/display/intel_panel.c| 12 +++-
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/intel_device_info.c | 7 ++-
drivers/gpu/drm/i915/intel_device_info.h | 2 ++
8 files changed, 35 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 423c91b164b4..146c2b9bb7fb 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2693,28 +2693,29 @@ static int g4x_hrawclk(struct drm_i915_private
*dev_priv)
}
/**
- * intel_update_rawclk - Determine the current RAWCLK frequency
+ * intel_read_rawclk - Determine the current RAWCLK frequency
* @dev_priv: i915 device
*
* Determine the current RAWCLK frequency. RAWCLK is a fixed
* frequency clock so this needs to done only once.
*/
-void intel_update_rawclk(struct drm_i915_private *dev_priv)
+u32 intel_read_rawclk(struct drm_i915_private *dev_priv)
{
+ u32 freq;
+
if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
- dev_priv->rawclk_freq = cnp_rawclk(dev_priv);
+ freq = cnp_rawclk(dev_priv);
else if (HAS_PCH_SPLIT(dev_priv))
- dev_priv->rawclk_freq = pch_rawclk(dev_priv);
+ freq = pch_rawclk(dev_priv);
else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- dev_priv->rawclk_freq = vlv_hrawclk(dev_priv);
+ freq = vlv_hrawclk(dev_priv);
else if (IS_G4X(dev_priv) || IS_PINEVIEW(dev_priv))
- dev_priv->rawclk_freq = g4x_hrawclk(dev_priv);
+ freq = g4x_hrawclk(dev_priv);
else
/* no rawclk on other platforms, or no need to know it */
- return;
+ return 0;
- drm_dbg(&dev_priv->drm, "rawclk rate: %d kHz\n",
- dev_priv->rawclk_freq);
+ return freq;
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h
b/drivers/gpu/drm/i915/display/intel_cdclk.h
index df21dbdcc575..5731806e4cee 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -61,7 +61,7 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915);
void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);
void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
void intel_update_cdclk(struct drm_i915_private *dev_priv);
-void intel_update_rawclk(struct drm_i915_private *dev_priv);
+u32 intel_read_rawclk(struct drm_i915_private *dev_priv);
bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
const struct intel_cdclk_config *b);
void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b/drivers/gpu/drm/i915/display/intel_display_power.c
index b9a9cbad8a03..722399fc2ace 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1260,10 +1260,10 @@ static void vlv_init_display_clock_gating(struct
drm_i915_private *dev_priv)
MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
intel_de_write(dev_priv, CBR1_VLV, 0);
- WARN_ON(dev_priv->rawclk_freq == 0);
-
+ WARN_ON(RUNTIME_INFO(dev_priv)->rawclk_freq == 0);
intel_de_write(dev_priv, RAWCLK_FREQ_VLV,
- DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 1000));
+ DIV_ROUND_CLOSEST(RUNTIME_INFO(dev_priv)->rawclk_freq,
+1000));
}
static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
@@ -5236,9 +5236,6 @@ void intel_power_domains_init_hw(struct drm_i915_private
*i915, bool resume)
power_domains->initializing = true;
- /* Must happen before power domain init on VLV/CHV */
- intel_update_rawclk(i915);
-
if (INTEL_GEN(i915) >= 11) {
icl_display_core_init(i915, resume);
} else if (IS_CANNONLAKE(i915)) {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 9541ab11624d..82baf5aba84b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1213,13 +1213,14 @@ static u32 g4x_get_aux_clock_divider(struct intel_dp
*intel_dp, int index)
* The clock divider is based o
[Intel-gfx] [PATCH] drm/i915: Avoid potential division-by-zero in computing CS timestamp period
Since we use a HW readback or estimation of the CS timestamp frequency,
sometimes it may result in 0. Avoid the division-by-zero in computing
its reciprocal, the timestamp period.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_device_info.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index a97437fac884..18d9de488593 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -1044,13 +1044,17 @@ void intel_device_info_runtime_init(struct
drm_i915_private *dev_priv)
}
/* Initialize command stream timestamp frequency */
- runtime->cs_timestamp_frequency_khz =
read_timestamp_frequency(dev_priv);
- runtime->cs_timestamp_period_ns =
- div_u64(1e6, runtime->cs_timestamp_frequency_khz);
- drm_dbg(&dev_priv->drm,
- "CS timestamp wraparound in %lldms\n",
- div_u64(mul_u32_u32(runtime->cs_timestamp_period_ns, S32_MAX),
- USEC_PER_SEC));
+ runtime->cs_timestamp_frequency_khz =
+ read_timestamp_frequency(dev_priv);
+ if (runtime->cs_timestamp_frequency_khz) {
+ runtime->cs_timestamp_period_ns =
+ div_u64(1e6, runtime->cs_timestamp_frequency_khz);
+ drm_dbg(&dev_priv->drm,
+ "CS timestamp wraparound in %lldms\n",
+ div_u64(mul_u32_u32(runtime->cs_timestamp_period_ns,
+ S32_MAX),
+ USEC_PER_SEC));
+ }
}
void intel_driver_caps_print(const struct intel_driver_caps *caps,
--
2.25.0
___
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[Intel-gfx] [PATCH] drm/i915/gt: Refactor l3cc/mocs availability
On dgfx, we only use l3cc and not mocs, but we share the table of
register definitions with Tigerlake (which includes the mocs). This
confuses our selftest that verifies that the registers do contain the
values in our tables after various events (idling, reset, activity etc).
When constructing the table of register definitions, also include the
flags for which registers are valid so that information is computed
centrally and available to all callers.
Signed-off-by: Chris Wilson
Cc: Brian Welty
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/intel_mocs.c| 72 +
drivers/gpu/drm/i915/gt/selftest_mocs.c | 24 ++---
2 files changed, 67 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 0afc1eb3c20f..632e08a4592b 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -280,9 +280,32 @@ static const struct drm_i915_mocs_entry icl_mocs_table[] =
{
GEN11_MOCS_ENTRIES
};
-static bool get_mocs_settings(const struct drm_i915_private *i915,
- struct drm_i915_mocs_table *table)
+enum {
+ HAS_GLOBAL_MOCS = BIT(0),
+ HAS_ENGINE_MOCS = BIT(1),
+ HAS_RENDER_L3CC = BIT(2),
+};
+
+static bool has_l3cc(const struct drm_i915_private *i915)
{
+ return true;
+}
+
+static bool has_global_mocs(const struct drm_i915_private *i915)
+{
+ return HAS_GLOBAL_MOCS_REGISTERS(i915);
+}
+
+static bool has_mocs(const struct drm_i915_private *i915)
+{
+ return !IS_DGFX(i915);
+}
+
+static unsigned int get_mocs_settings(const struct drm_i915_private *i915,
+ struct drm_i915_mocs_table *table)
+{
+ unsigned int flags;
+
if (INTEL_GEN(i915) >= 12) {
table->size = ARRAY_SIZE(tgl_mocs_table);
table->table = tgl_mocs_table;
@@ -302,11 +325,11 @@ static bool get_mocs_settings(const struct
drm_i915_private *i915,
} else {
drm_WARN_ONCE(&i915->drm, INTEL_GEN(i915) >= 9,
"Platform that should have a MOCS table does
not.\n");
- return false;
+ return 0;
}
if (GEM_DEBUG_WARN_ON(table->size > table->n_entries))
- return false;
+ return 0;
/* WaDisableSkipCaching:skl,bxt,kbl,glk */
if (IS_GEN(i915, 9)) {
@@ -315,10 +338,20 @@ static bool get_mocs_settings(const struct
drm_i915_private *i915,
for (i = 0; i < table->size; i++)
if (GEM_DEBUG_WARN_ON(table->table[i].l3cc_value &
(L3_ESC(1) | L3_SCC(0x7
- return false;
+ return 0;
}
- return true;
+ flags = 0;
+ if (has_mocs(i915)) {
+ if (has_global_mocs(i915))
+ flags |= HAS_GLOBAL_MOCS;
+ else
+ flags |= HAS_ENGINE_MOCS;
+ }
+ if (has_l3cc(i915))
+ flags |= HAS_RENDER_L3CC;
+
+ return flags;
}
/*
@@ -411,18 +444,20 @@ static void init_l3cc_table(struct intel_engine_cs
*engine,
void intel_mocs_init_engine(struct intel_engine_cs *engine)
{
struct drm_i915_mocs_table table;
+ unsigned int flags;
/* Called under a blanket forcewake */
assert_forcewakes_active(engine->uncore, FORCEWAKE_ALL);
- if (!get_mocs_settings(engine->i915, &table))
+ flags = get_mocs_settings(engine->i915, &table);
+ if (!flags)
return;
/* Platforms with global MOCS do not need per-engine initialization. */
- if (!HAS_GLOBAL_MOCS_REGISTERS(engine->i915))
+ if (flags & HAS_ENGINE_MOCS)
init_mocs_table(engine, &table);
- if (engine->class == RENDER_CLASS)
+ if (flags & HAS_RENDER_L3CC && engine->class == RENDER_CLASS)
init_l3cc_table(engine, &table);
}
@@ -431,26 +466,17 @@ static u32 global_mocs_offset(void)
return i915_mmio_reg_offset(GEN12_GLOBAL_MOCS(0));
}
-static void init_global_mocs(struct intel_gt *gt)
+void intel_mocs_init(struct intel_gt *gt)
{
struct drm_i915_mocs_table table;
+ unsigned int flags;
/*
* LLC and eDRAM control values are not applicable to dgfx
*/
- if (IS_DGFX(gt->i915))
- return;
-
- if (!get_mocs_settings(gt->i915, &table))
- return;
-
- __init_mocs_table(gt->uncore, &table, global_mocs_offset());
-}
-
-void intel_mocs_init(struct intel_gt *gt)
-{
- if (HAS_GLOBAL_MOCS_REGISTERS(gt->i915))
- init_global_mocs(gt);
+ flags = get_mocs_settings(gt->i915, &table);
+ if (flags & HAS_GLOBAL_MOCS)
+ __init_mocs_table(gt->uncore, &table, global_mocs_offset());
}
#if IS_ENABLED(CONFIG_DRM_I915_S
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Track hw reported context runtime (rev7)
== Series Details ==
Series: drm/i915: Track hw reported context runtime (rev7)
URL : https://patchwork.freedesktop.org/series/73499/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7949 -> Patchwork_16588
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16588/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16588:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-u}: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7949/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16588/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
- {fi-tgl-dsi}: [PASS][3] -> [INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7949/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16588/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_16588 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_close_race@basic-threads:
- fi-hsw-peppy: [PASS][5] -> [INCOMPLETE][6] ([i915#694] / [i915#816])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7949/fi-hsw-peppy/igt@gem_close_r...@basic-threads.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16588/fi-hsw-peppy/igt@gem_close_r...@basic-threads.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
Participating hosts (51 -> 34)
--
Missing(17): fi-ilk-m540 fi-bdw-5557u fi-bsw-n3050 fi-hsw-4200u
fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-kbl-7500u fi-ctg-p8600 fi-gdg-551
fi-ivb-3770 fi-elk-e7500 fi-pnv-d510 fi-blb-e6850 fi-byt-clapper fi-bdw-samus
fi-kbl-r
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7949 -> Patchwork_16588
CI-20190529: 20190529
CI_DRM_7949: 107d61a9622390032e786b66d560649969ed985f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5444: c46bae259d427f53fcfcd5f05de0181a9e82d6fe @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16588: 6b2debda1baa912af15cffe1f0d33ef8fb926f00 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6b2debda1baa drm/i915: Track hw reported context runtime
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16588/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Track hw reported context runtime (rev7)
== Series Details == Series: drm/i915: Track hw reported context runtime (rev7) URL : https://patchwork.freedesktop.org/series/73499/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6b2debda1baa drm/i915: Track hw reported context runtime -:109: WARNING:LINE_SPACING: Missing a blank line after declarations #109: FILE: drivers/gpu/drm/i915/gt/intel_context_types.h:79: + u32 last; + I915_SELFTEST_DECLARE(u32 num_underflow); -:223: WARNING:LINE_SPACING: Missing a blank line after declarations #223: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:4462: + struct i915_request *rq; + IGT_TIMEOUT(end_time); total: 0 errors, 2 warnings, 0 checks, 313 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Track hw reported context runtime (rev6)
== Series Details ==
Series: drm/i915: Track hw reported context runtime (rev6)
URL : https://patchwork.freedesktop.org/series/73499/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7948 -> Patchwork_16587
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16587/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16587:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-u}: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16587/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
- {fi-tgl-dsi}: [PASS][3] -> [INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16587/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_16587 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_close_race@basic-threads:
- fi-hsw-peppy: [PASS][5] -> [INCOMPLETE][6] ([i915#694] / [i915#816])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-hsw-peppy/igt@gem_close_r...@basic-threads.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16587/fi-hsw-peppy/igt@gem_close_r...@basic-threads.html
* igt@i915_selftest@live_gem_contexts:
- fi-cml-s: [PASS][7] -> [DMESG-FAIL][8] ([i915#877])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16587/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
Possible fixes
* igt@kms_chamelium@dp-edid-read:
- fi-cml-u2: [FAIL][9] ([i915#217] / [i915#976]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16587/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
[i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877
[i915#976]: https://gitlab.freedesktop.org/drm/intel/issues/976
Participating hosts (46 -> 35)
--
Additional (2): fi-bsw-kefka fi-snb-2520m
Missing(13): fi-ehl-1 fi-hsw-4200u fi-byt-squawks fi-bwr-2160
fi-kbl-7500u fi-ctg-p8600 fi-cfl-8109u fi-elk-e7500 fi-skl-lmem fi-blb-e6850
fi-byt-clapper fi-bsw-nick fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7948 -> Patchwork_16587
CI-20190529: 20190529
CI_DRM_7948: 129a4630a618fee5d2eaa4290cd367e24893bc91 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5444: c46bae259d427f53fcfcd5f05de0181a9e82d6fe @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16587: 284fafeb344bf78275984ddd0c95bf2ff92ec8cf @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
284fafeb344b drm/i915: Track hw reported context runtime
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16587/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Ensure no conflicts with BIOS when updating Dbuf
== Series Details == Series: drm/i915: Ensure no conflicts with BIOS when updating Dbuf URL : https://patchwork.freedesktop.org/series/73369/ State : success == Summary == CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16545_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16545_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@busy-vcs1: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +10 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_b...@busy-vcs1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb7/igt@gem_b...@busy-vcs1.html * igt@gem_exec_schedule@out-order-bsd2: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276]) +15 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_exec_sched...@out-order-bsd2.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb5/igt@gem_exec_sched...@out-order-bsd2.html * igt@gem_exec_schedule@pi-distinct-iova-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_exec_sched...@pi-distinct-iova-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb1/igt@gem_exec_sched...@pi-distinct-iova-bsd.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +4 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb7/igt@gem_exec_sched...@reorder-wide-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb1/igt@gem_exec_sched...@reorder-wide-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-glk: [PASS][9] -> [FAIL][10] ([i915#644]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk2/igt@gem_pp...@flink-and-close-vma-leak.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-glk3/igt@gem_pp...@flink-and-close-vma-leak.html - shard-apl: [PASS][11] -> [FAIL][12] ([i915#644]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl2/igt@gem_pp...@flink-and-close-vma-leak.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-apl1/igt@gem_pp...@flink-and-close-vma-leak.html * igt@gem_tiled_swapping@non-threaded: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#183]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl1/igt@gem_tiled_swapp...@non-threaded.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-kbl7/igt@gem_tiled_swapp...@non-threaded.html * igt@gem_workarounds@suspend-resume-context: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +6 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl7/igt@gem_workarou...@suspend-resume-context.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-apl4/igt@gem_workarou...@suspend-resume-context.html * igt@i915_suspend@sysfs-reader: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +4 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl6/igt@i915_susp...@sysfs-reader.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-kbl2/igt@i915_susp...@sysfs-reader.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-random: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#54]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl7/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [PASS][21] -> [FAIL][22] ([IGT#5]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl7/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl5/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_frontbuffer_tracking@basic: - shard-skl: [PASS][23] -> [FAIL][24] ([i915#49]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl2/igt@kms_frontbuffer_track...@basic.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl4/igt@kms_frontbuffer_track...@basic.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][25] -> [FAIL][26] ([fdo#108145] / [i915#265]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Track hw reported context runtime (rev6)
== Series Details == Series: drm/i915: Track hw reported context runtime (rev6) URL : https://patchwork.freedesktop.org/series/73499/ State : warning == Summary == $ dim checkpatch origin/drm-tip 284fafeb344b drm/i915: Track hw reported context runtime -:109: WARNING:LINE_SPACING: Missing a blank line after declarations #109: FILE: drivers/gpu/drm/i915/gt/intel_context_types.h:79: + u32 last; + I915_SELFTEST_DECLARE(u32 num_underflow); -:198: WARNING:LINE_SPACING: Missing a blank line after declarations #198: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:4457: + struct i915_request *rq; + IGT_TIMEOUT(end_time); total: 0 errors, 2 warnings, 0 checks, 294 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI] drm/i915: Track hw reported context runtime
From: Tvrtko Ursulin
GPU saves accumulated context runtime (in CS timestamp units) in PPHWSP
which will be useful for us in cases when we are not able to track context
busyness ourselves (like with GuC). Keep a copy of this in struct
intel_context from where it can be easily read even if the context is not
pinned.
v2:
(Chris)
* Do not store pphwsp address in intel_context.
* Log CS wrap-around.
* Simplify calculation by relying on integer wraparound.
v3:
* Include total/avg in traces and error state for debugging
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_context.c | 6 +-
drivers/gpu/drm/i915/gt/intel_context.h | 17
drivers/gpu/drm/i915/gt/intel_context_types.h | 12 +++
drivers/gpu/drm/i915/gt/intel_lrc.c | 46 -
drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 1 +
drivers/gpu/drm/i915/gt/selftest_lrc.c| 96 +++
drivers/gpu/drm/i915/i915_gpu_error.c | 11 ++-
drivers/gpu/drm/i915/i915_gpu_error.h | 4 +
drivers/gpu/drm/i915/intel_device_info.c | 6 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
10 files changed, 195 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index e4f89341d17c..8bb444cda14f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -220,7 +220,9 @@ static void __intel_context_retire(struct i915_active
*active)
{
struct intel_context *ce = container_of(active, typeof(*ce), active);
- CE_TRACE(ce, "retire\n");
+ CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
+intel_context_get_total_runtime_ns(ce),
+intel_context_get_avg_runtime_ns(ce));
set_bit(CONTEXT_VALID_BIT, &ce->flags);
if (ce->state)
@@ -281,6 +283,8 @@ intel_context_init(struct intel_context *ce,
ce->sseu = engine->sseu;
ce->ring = __intel_context_ring_size(SZ_4K);
+ ewma_runtime_init(&ce->runtime.avg);
+
ce->vm = i915_vm_get(engine->gt->vm);
INIT_LIST_HEAD(&ce->signal_link);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 604d5cfc46ba..18efad255124 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -12,6 +12,7 @@
#include
#include "i915_active.h"
+#include "i915_drv.h"
#include "intel_context_types.h"
#include "intel_engine_types.h"
#include "intel_ring_types.h"
@@ -227,4 +228,20 @@ intel_context_clear_nopreempt(struct intel_context *ce)
clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
}
+static inline u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return READ_ONCE(ce->runtime.total) * period;
+}
+
+static inline u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return mul_u32_u32(ewma_runtime_read(&ce->runtime.avg), period);
+}
+
#endif /* __INTEL_CONTEXT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ca1420fb8b53..11278343b9b5 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -7,6 +7,7 @@
#ifndef __INTEL_CONTEXT_TYPES__
#define __INTEL_CONTEXT_TYPES__
+#include
#include
#include
#include
@@ -19,6 +20,8 @@
#define CONTEXT_REDZONE POISON_INUSE
+DECLARE_EWMA(runtime, 3, 8);
+
struct i915_gem_context;
struct i915_vma;
struct intel_context;
@@ -68,6 +71,15 @@ struct intel_context {
u64 lrc_desc;
u32 tag; /* cookie passed to HW to track this context on submission */
+ /* Time on GPU as tracked by the hw. */
+ struct {
+ struct ewma_runtime avg;
+ u64 total;
+ u32 last;
+ I915_SELFTEST_DECLARE(u32 num_underflow);
+ I915_SELFTEST_DECLARE(u32 max_underflow);
+ } runtime;
+
unsigned int active_count; /* protected by timeline->mutex */
atomic_t pin_count;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index c3d7727021db..78e854440949 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1195,6 +1195,42 @@ static void reset_active(struct i915_request *rq,
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE;
}
+static u32 intel_context_get_runtime(const struct intel_context *ce)
+{
+ /*
+* We can use either ppHWSP[16] which is recorded before the context
+* switch (and so excludes the cost of context switches) or use the
+* value from the context image itself, which is saved/restored earlier
+* and so inc
[Intel-gfx] [CI] drm/i915: Track hw reported context runtime
From: Tvrtko Ursulin
GPU saves accumulated context runtime (in CS timestamp units) in PPHWSP
which will be useful for us in cases when we are not able to track context
busyness ourselves (like with GuC). Keep a copy of this in struct
intel_context from where it can be easily read even if the context is not
pinned.
v2:
(Chris)
* Do not store pphwsp address in intel_context.
* Log CS wrap-around.
* Simplify calculation by relying on integer wraparound.
v3:
* Include total/avg in traces and error state for debugging
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_context.c | 6 +-
drivers/gpu/drm/i915/gt/intel_context.h | 17
drivers/gpu/drm/i915/gt/intel_context_types.h | 12 +++
drivers/gpu/drm/i915/gt/intel_lrc.c | 45 -
drivers/gpu/drm/i915/gt/selftest_lrc.c| 91 +++
drivers/gpu/drm/i915/i915_gpu_error.c | 11 ++-
drivers/gpu/drm/i915/i915_gpu_error.h | 4 +
drivers/gpu/drm/i915/intel_device_info.c | 6 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
9 files changed, 188 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index e4f89341d17c..8bb444cda14f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -220,7 +220,9 @@ static void __intel_context_retire(struct i915_active
*active)
{
struct intel_context *ce = container_of(active, typeof(*ce), active);
- CE_TRACE(ce, "retire\n");
+ CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
+intel_context_get_total_runtime_ns(ce),
+intel_context_get_avg_runtime_ns(ce));
set_bit(CONTEXT_VALID_BIT, &ce->flags);
if (ce->state)
@@ -281,6 +283,8 @@ intel_context_init(struct intel_context *ce,
ce->sseu = engine->sseu;
ce->ring = __intel_context_ring_size(SZ_4K);
+ ewma_runtime_init(&ce->runtime.avg);
+
ce->vm = i915_vm_get(engine->gt->vm);
INIT_LIST_HEAD(&ce->signal_link);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 604d5cfc46ba..18efad255124 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -12,6 +12,7 @@
#include
#include "i915_active.h"
+#include "i915_drv.h"
#include "intel_context_types.h"
#include "intel_engine_types.h"
#include "intel_ring_types.h"
@@ -227,4 +228,20 @@ intel_context_clear_nopreempt(struct intel_context *ce)
clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
}
+static inline u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return READ_ONCE(ce->runtime.total) * period;
+}
+
+static inline u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return mul_u32_u32(ewma_runtime_read(&ce->runtime.avg), period);
+}
+
#endif /* __INTEL_CONTEXT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ca1420fb8b53..90f8f4dd7091 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -7,6 +7,7 @@
#ifndef __INTEL_CONTEXT_TYPES__
#define __INTEL_CONTEXT_TYPES__
+#include
#include
#include
#include
@@ -19,6 +20,8 @@
#define CONTEXT_REDZONE POISON_INUSE
+DECLARE_EWMA(runtime, 3, 4);
+
struct i915_gem_context;
struct i915_vma;
struct intel_context;
@@ -68,6 +71,15 @@ struct intel_context {
u64 lrc_desc;
u32 tag; /* cookie passed to HW to track this context on submission */
+ /* Time on GPU as tracked by the hw. */
+ struct {
+ struct ewma_runtime avg;
+ u64 total;
+ u32 last;
+ I915_SELFTEST_DECLARE(u32 num_underflow);
+ I915_SELFTEST_DECLARE(u32 max_underflow);
+ } runtime;
+
unsigned int active_count; /* protected by timeline->mutex */
atomic_t pin_count;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index c3d7727021db..afce5f1330eb 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1195,6 +1195,41 @@ static void reset_active(struct i915_request *rq,
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE;
}
+static u32 intel_context_get_runtime(const struct intel_context *ce)
+{
+ /*
+* PPHWSP is one page before the lrc state page and in it at
+* dword 16 we have cumulative context runtime in CS timestamp ticks.
+*/
+ BUILD_BUG_ON((LRC_STATE_PN - LRC_PPHWSP_PN) != 1);
+ return READ_ONCE(ce->lrc_reg_state[-1024 + 16]);
+}
+
+static void intel_context_up
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Track hw reported context runtime (rev5)
== Series Details ==
Series: drm/i915: Track hw reported context runtime (rev5)
URL : https://patchwork.freedesktop.org/series/73499/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7948 -> Patchwork_16586
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16586/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16586:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-u}: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16586/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
- {fi-tgl-dsi}: [PASS][3] -> [INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16586/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_16586 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_gem_contexts:
- fi-cml-s: [PASS][5] -> [DMESG-FAIL][6] ([i915#877])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16586/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-cml-u2: [PASS][7] -> [FAIL][8] ([i915#217])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-cml-u2/igt@kms_chamel...@common-hpd-after-suspend.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16586/fi-cml-u2/igt@kms_chamel...@common-hpd-after-suspend.html
Possible fixes
* igt@i915_selftest@live_gem_contexts:
- fi-bsw-nick:[INCOMPLETE][9] ([i915#392]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16586/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
* igt@kms_chamelium@dp-edid-read:
- fi-cml-u2: [FAIL][11] ([i915#217] / [i915#976]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16586/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#392]: https://gitlab.freedesktop.org/drm/intel/issues/392
[i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877
[i915#976]: https://gitlab.freedesktop.org/drm/intel/issues/976
Participating hosts (46 -> 35)
--
Additional (1): fi-snb-2520m
Missing(12): fi-ehl-1 fi-bdw-samus fi-hsw-4200u fi-byt-squawks
fi-bwr-2160 fi-ctg-p8600 fi-elk-e7500 fi-skl-lmem fi-blb-e6850 fi-byt-clapper
fi-skl-6600u fi-snb-2600
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7948 -> Patchwork_16586
CI-20190529: 20190529
CI_DRM_7948: 129a4630a618fee5d2eaa4290cd367e24893bc91 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5444: c46bae259d427f53fcfcd5f05de0181a9e82d6fe @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16586: 5da4eb1bc1fd2c451405b6883fb79ff137b414a8 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5da4eb1bc1fd drm/i915: Track hw reported context runtime
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16586/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Track hw reported context runtime (rev5)
== Series Details == Series: drm/i915: Track hw reported context runtime (rev5) URL : https://patchwork.freedesktop.org/series/73499/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5da4eb1bc1fd drm/i915: Track hw reported context runtime -:109: WARNING:LINE_SPACING: Missing a blank line after declarations #109: FILE: drivers/gpu/drm/i915/gt/intel_context_types.h:79: + u32 last; + I915_SELFTEST_DECLARE(u32 num_underflow); -:197: WARNING:LINE_SPACING: Missing a blank line after declarations #197: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:4457: + struct i915_request *rq; + IGT_TIMEOUT(end_time); total: 0 errors, 2 warnings, 0 checks, 293 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Track hw reported context runtime (rev4)
== Series Details ==
Series: drm/i915: Track hw reported context runtime (rev4)
URL : https://patchwork.freedesktop.org/series/73499/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7948 -> Patchwork_16585
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16585:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-u}: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
- {fi-tgl-dsi}: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_16585 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_close_race@basic-threads:
- fi-hsw-peppy: [PASS][5] -> [INCOMPLETE][6] ([i915#694] / [i915#816])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-hsw-peppy/igt@gem_close_r...@basic-threads.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-hsw-peppy/igt@gem_close_r...@basic-threads.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-icl-guc: [PASS][7] -> [INCOMPLETE][8] ([i915#184])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-icl-guc/igt@gem_exec_susp...@basic-s4-devices.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-icl-guc/igt@gem_exec_susp...@basic-s4-devices.html
* igt@i915_selftest@live_execlists:
- fi-icl-y: [PASS][9] -> [DMESG-FAIL][10] ([fdo#108569])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-icl-y/igt@i915_selftest@live_execlists.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-icl-y/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_gtt:
- fi-bdw-5557u: [PASS][11] -> [TIMEOUT][12] ([fdo#112271])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-bdw-5557u/igt@i915_selftest@live_gtt.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-bdw-5557u/igt@i915_selftest@live_gtt.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-u3: [PASS][13] -> [INCOMPLETE][14] ([fdo#108569])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
Possible fixes
* igt@i915_selftest@live_gem_contexts:
- fi-bsw-nick:[INCOMPLETE][15] ([i915#392]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
* igt@i915_selftest@live_gtt:
- {fi-tgl-dsi}: [TIMEOUT][17] ([fdo#112126] / [fdo#112271]) ->
[PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-dsi/igt@i915_selftest@live_gtt.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-tgl-dsi/igt@i915_selftest@live_gtt.html
* igt@kms_chamelium@dp-edid-read:
- fi-cml-u2: [FAIL][19] ([i915#217] / [i915#976]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
Warnings
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [INCOMPLETE][21] ([i915#45]) -> [TIMEOUT][22]
([fdo#112271] / [i915#1084] / [i915#816])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-byt-j1900/igt@gem_close_r...@basic-threads.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16585/fi-byt-j1900/igt@gem_close_r...@basic-threads.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1084]: https://gitlab.freedesktop.org/drm/intel/is
[Intel-gfx] [CI] drm/i915: Track hw reported context runtime
From: Tvrtko Ursulin
GPU saves accumulated context runtime (in CS timestamp units) in PPHWSP
which will be useful for us in cases when we are not able to track context
busyness ourselves (like with GuC). Keep a copy of this in struct
intel_context from where it can be easily read even if the context is not
pinned.
v2:
(Chris)
* Do not store pphwsp address in intel_context.
* Log CS wrap-around.
* Simplify calculation by relying on integer wraparound.
v3:
* Include total/avg in traces and error state for debugging
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_context.c | 6 +-
drivers/gpu/drm/i915/gt/intel_context.h | 17
drivers/gpu/drm/i915/gt/intel_context_types.h | 12 +++
drivers/gpu/drm/i915/gt/intel_lrc.c | 44 -
drivers/gpu/drm/i915/gt/selftest_lrc.c| 91 +++
drivers/gpu/drm/i915/i915_gpu_error.c | 11 ++-
drivers/gpu/drm/i915/i915_gpu_error.h | 4 +
drivers/gpu/drm/i915/intel_device_info.c | 6 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
9 files changed, 187 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index e4f89341d17c..8bb444cda14f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -220,7 +220,9 @@ static void __intel_context_retire(struct i915_active
*active)
{
struct intel_context *ce = container_of(active, typeof(*ce), active);
- CE_TRACE(ce, "retire\n");
+ CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
+intel_context_get_total_runtime_ns(ce),
+intel_context_get_avg_runtime_ns(ce));
set_bit(CONTEXT_VALID_BIT, &ce->flags);
if (ce->state)
@@ -281,6 +283,8 @@ intel_context_init(struct intel_context *ce,
ce->sseu = engine->sseu;
ce->ring = __intel_context_ring_size(SZ_4K);
+ ewma_runtime_init(&ce->runtime.avg);
+
ce->vm = i915_vm_get(engine->gt->vm);
INIT_LIST_HEAD(&ce->signal_link);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 604d5cfc46ba..18efad255124 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -12,6 +12,7 @@
#include
#include "i915_active.h"
+#include "i915_drv.h"
#include "intel_context_types.h"
#include "intel_engine_types.h"
#include "intel_ring_types.h"
@@ -227,4 +228,20 @@ intel_context_clear_nopreempt(struct intel_context *ce)
clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
}
+static inline u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return READ_ONCE(ce->runtime.total) * period;
+}
+
+static inline u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return mul_u32_u32(ewma_runtime_read(&ce->runtime.avg), period);
+}
+
#endif /* __INTEL_CONTEXT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ca1420fb8b53..90f8f4dd7091 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -7,6 +7,7 @@
#ifndef __INTEL_CONTEXT_TYPES__
#define __INTEL_CONTEXT_TYPES__
+#include
#include
#include
#include
@@ -19,6 +20,8 @@
#define CONTEXT_REDZONE POISON_INUSE
+DECLARE_EWMA(runtime, 3, 4);
+
struct i915_gem_context;
struct i915_vma;
struct intel_context;
@@ -68,6 +71,15 @@ struct intel_context {
u64 lrc_desc;
u32 tag; /* cookie passed to HW to track this context on submission */
+ /* Time on GPU as tracked by the hw. */
+ struct {
+ struct ewma_runtime avg;
+ u64 total;
+ u32 last;
+ I915_SELFTEST_DECLARE(u32 num_underflow);
+ I915_SELFTEST_DECLARE(u32 max_underflow);
+ } runtime;
+
unsigned int active_count; /* protected by timeline->mutex */
atomic_t pin_count;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index c3d7727021db..ec9df88eb867 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1195,6 +1195,40 @@ static void reset_active(struct i915_request *rq,
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE;
}
+static u32 intel_context_get_runtime(const struct intel_context *ce)
+{
+ /*
+* PPHWSP is one page before the lrc state page and in it at
+* dword 16 we have cumulative context runtime in CS timestamp ticks.
+*/
+ BUILD_BUG_ON((LRC_STATE_PN - LRC_PPHWSP_PN) != 1);
+ return READ_ONCE(ce->lrc_reg_state[-1024 + 16]);
+}
+
+static void intel_context_up
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Track hw reported context runtime (rev4)
== Series Details == Series: drm/i915: Track hw reported context runtime (rev4) URL : https://patchwork.freedesktop.org/series/73499/ State : warning == Summary == $ dim checkpatch origin/drm-tip e134ee9aa337 drm/i915: Track hw reported context runtime -:109: WARNING:LINE_SPACING: Missing a blank line after declarations #109: FILE: drivers/gpu/drm/i915/gt/intel_context_types.h:79: + u32 last; + I915_SELFTEST_DECLARE(u32 num_underflow); -:197: WARNING:LINE_SPACING: Missing a blank line after declarations #197: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:4457: + struct i915_request *rq; + IGT_TIMEOUT(end_time); total: 0 errors, 2 warnings, 0 checks, 292 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Force state->modeset=true when distrust_bios_wm==true
== Series Details == Series: drm/i915: Force state->modeset=true when distrust_bios_wm==true URL : https://patchwork.freedesktop.org/series/73367/ State : success == Summary == CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16544_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16544_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@busy-vcs1: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +13 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_b...@busy-vcs1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-iclb6/igt@gem_b...@busy-vcs1.html * igt@gem_exec_schedule@in-order-bsd: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112146]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb3/igt@gem_exec_sched...@in-order-bsd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-iclb4/igt@gem_exec_sched...@in-order-bsd.html * igt@gem_exec_schedule@pi-common-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb7/igt@gem_exec_sched...@pi-common-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-iclb2/igt@gem_exec_sched...@pi-common-bsd.html * igt@gem_exec_schedule@preempt-contexts-bsd2: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276]) +18 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb1/igt@gem_exec_sched...@preempt-contexts-bsd2.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-iclb8/igt@gem_exec_sched...@preempt-contexts-bsd2.html * igt@gem_exec_suspend@basic-s3: - shard-kbl: [PASS][9] -> [DMESG-WARN][10] ([i915#180]) +4 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl4/igt@gem_exec_susp...@basic-s3.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-kbl2/igt@gem_exec_susp...@basic-s3.html * igt@kms_color@pipe-a-gamma: - shard-tglb: [PASS][11] -> [FAIL][12] ([i915#1149]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb7/igt@kms_co...@pipe-a-gamma.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-tglb6/igt@kms_co...@pipe-a-gamma.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-random: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#54]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-skl2/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html * igt@kms_cursor_edge_walk@pipe-b-128x128-bottom-edge: - shard-hsw: [PASS][15] -> [INCOMPLETE][16] ([i915#61]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw1/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-hsw5/igt@kms_cursor_edge_w...@pipe-b-128x128-bottom-edge.html * igt@kms_flip@flip-vs-expired-vblank: - shard-glk: [PASS][17] -> [FAIL][18] ([i915#79]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk5/igt@kms_f...@flip-vs-expired-vblank.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-glk1/igt@kms_f...@flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-suspend: - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#221]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl6/igt@kms_f...@flip-vs-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-skl5/igt@kms_f...@flip-vs-suspend.html * igt@kms_frontbuffer_tracking@basic: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#49]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl2/igt@kms_frontbuffer_track...@basic.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-skl7/igt@kms_frontbuffer_track...@basic.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move: - shard-tglb: [PASS][23] -> [SKIP][24] ([i915#668]) +9 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb1/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-move.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16544/shard-tglb2/igt@kms_frontbuffer_track...@fbcpsr-1p-primscrn-cur-indfb-move.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-apl: [PASS][25] -> [DMESG-WARN][26] ([i915#180]) +4 similar issues [25]: https://intel-gfx-ci.01.or
[Intel-gfx] [CI] drm/i915: Track hw reported context runtime
From: Tvrtko Ursulin
GPU saves accumulated context runtime (in CS timestamp units) in PPHWSP
which will be useful for us in cases when we are not able to track context
busyness ourselves (like with GuC). Keep a copy of this in struct
intel_context from where it can be easily read even if the context is not
pinned.
v2:
(Chris)
* Do not store pphwsp address in intel_context.
* Log CS wrap-around.
* Simplify calculation by relying on integer wraparound.
v3:
* Include total/avg in traces and error state for debugging
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_context.c | 6 +-
drivers/gpu/drm/i915/gt/intel_context.h | 17
drivers/gpu/drm/i915/gt/intel_context_types.h | 12 +++
drivers/gpu/drm/i915/gt/intel_lrc.c | 44 -
drivers/gpu/drm/i915/gt/selftest_lrc.c| 90 +++
drivers/gpu/drm/i915/i915_gpu_error.c | 11 ++-
drivers/gpu/drm/i915/i915_gpu_error.h | 4 +
drivers/gpu/drm/i915/intel_device_info.c | 6 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
9 files changed, 186 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index e4f89341d17c..8bb444cda14f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -220,7 +220,9 @@ static void __intel_context_retire(struct i915_active
*active)
{
struct intel_context *ce = container_of(active, typeof(*ce), active);
- CE_TRACE(ce, "retire\n");
+ CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
+intel_context_get_total_runtime_ns(ce),
+intel_context_get_avg_runtime_ns(ce));
set_bit(CONTEXT_VALID_BIT, &ce->flags);
if (ce->state)
@@ -281,6 +283,8 @@ intel_context_init(struct intel_context *ce,
ce->sseu = engine->sseu;
ce->ring = __intel_context_ring_size(SZ_4K);
+ ewma_runtime_init(&ce->runtime.avg);
+
ce->vm = i915_vm_get(engine->gt->vm);
INIT_LIST_HEAD(&ce->signal_link);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 604d5cfc46ba..18efad255124 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -12,6 +12,7 @@
#include
#include "i915_active.h"
+#include "i915_drv.h"
#include "intel_context_types.h"
#include "intel_engine_types.h"
#include "intel_ring_types.h"
@@ -227,4 +228,20 @@ intel_context_clear_nopreempt(struct intel_context *ce)
clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
}
+static inline u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return READ_ONCE(ce->runtime.total) * period;
+}
+
+static inline u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return mul_u32_u32(ewma_runtime_read(&ce->runtime.avg), period);
+}
+
#endif /* __INTEL_CONTEXT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ca1420fb8b53..90f8f4dd7091 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -7,6 +7,7 @@
#ifndef __INTEL_CONTEXT_TYPES__
#define __INTEL_CONTEXT_TYPES__
+#include
#include
#include
#include
@@ -19,6 +20,8 @@
#define CONTEXT_REDZONE POISON_INUSE
+DECLARE_EWMA(runtime, 3, 4);
+
struct i915_gem_context;
struct i915_vma;
struct intel_context;
@@ -68,6 +71,15 @@ struct intel_context {
u64 lrc_desc;
u32 tag; /* cookie passed to HW to track this context on submission */
+ /* Time on GPU as tracked by the hw. */
+ struct {
+ struct ewma_runtime avg;
+ u64 total;
+ u32 last;
+ I915_SELFTEST_DECLARE(u32 num_underflow);
+ I915_SELFTEST_DECLARE(u32 max_underflow);
+ } runtime;
+
unsigned int active_count; /* protected by timeline->mutex */
atomic_t pin_count;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index c3d7727021db..ec9df88eb867 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1195,6 +1195,40 @@ static void reset_active(struct i915_request *rq,
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE;
}
+static u32 intel_context_get_runtime(const struct intel_context *ce)
+{
+ /*
+* PPHWSP is one page before the lrc state page and in it at
+* dword 16 we have cumulative context runtime in CS timestamp ticks.
+*/
+ BUILD_BUG_ON((LRC_STATE_PN - LRC_PPHWSP_PN) != 1);
+ return READ_ONCE(ce->lrc_reg_state[-1024 + 16]);
+}
+
+static void intel_context_up
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Track hw reported context runtime (rev3)
== Series Details ==
Series: drm/i915: Track hw reported context runtime (rev3)
URL : https://patchwork.freedesktop.org/series/73499/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7948 -> Patchwork_16584
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16584:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gt_lrc:
- {fi-tgl-u}: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html
- {fi-tgl-dsi}: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/fi-tgl-dsi/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_16584 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_gtt:
- fi-kbl-7500u: [PASS][5] -> [TIMEOUT][6] ([fdo#112271])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-kbl-7500u/igt@i915_selftest@live_gtt.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/fi-kbl-7500u/igt@i915_selftest@live_gtt.html
Possible fixes
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [INCOMPLETE][7] ([i915#45]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-byt-j1900/igt@gem_close_r...@basic-threads.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/fi-byt-j1900/igt@gem_close_r...@basic-threads.html
* igt@i915_selftest@live_gem_contexts:
- fi-bsw-nick:[INCOMPLETE][9] ([i915#392]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
* igt@i915_selftest@live_gtt:
- {fi-tgl-dsi}: [TIMEOUT][11] ([fdo#112126] / [fdo#112271]) ->
[PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-tgl-dsi/igt@i915_selftest@live_gtt.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/fi-tgl-dsi/igt@i915_selftest@live_gtt.html
* igt@kms_chamelium@dp-edid-read:
- fi-cml-u2: [FAIL][13] ([i915#217] / [i915#976]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7948/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#392]: https://gitlab.freedesktop.org/drm/intel/issues/392
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
[i915#976]: https://gitlab.freedesktop.org/drm/intel/issues/976
Participating hosts (46 -> 35)
--
Additional (1): fi-bsw-kefka
Missing(12): fi-ehl-1 fi-bdw-samus fi-hsw-4200u fi-byt-squawks
fi-bwr-2160 fi-ctg-p8600 fi-cfl-8109u fi-elk-e7500 fi-skl-lmem fi-blb-e6850
fi-byt-clapper fi-skl-6600u
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7948 -> Patchwork_16584
CI-20190529: 20190529
CI_DRM_7948: 129a4630a618fee5d2eaa4290cd367e24893bc91 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5444: c46bae259d427f53fcfcd5f05de0181a9e82d6fe @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16584: 953502e2ee734d9982f5f9dedb0baa48a4221601 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
953502e2ee73 drm/i915: Track hw reported context runtime
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16584/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] kernel 5.5.4: BUG: kernel NULL pointer dereference, address: 000000000000000
On 2/16/20 4:26 AM, Hillf Danton wrote:
> Looks like a stray lock counts for the above NULL dereference.
Hi, the patch applied on top of 5.5.4 breaks the internal display now even in
the boot phase.
Gert just a black screen after few seconds, nothing in the logs except:
Feb 16 11:21:57 t44 kernel: elogind-daemon[1431]: Removed session c15.
Feb 16 11:21:57 t44 start-stop-daemon[6462]: Will stop PID 1431
Feb 16 11:21:57 t44 start-stop-daemon[6462]: Sending signal 15 to PID 1431
Feb 16 11:21:57 t44 kernel: elogind-daemon[1431]: Received signal 15 [TERM]
Feb 16 11:21:57 t44 kernel: elogind-daemon[1431]: segfault at 56264c00 ip
7fddfcf76882 sp 7ffc98c721b0 error 4 in
libc-2.29.so[7fddfcf0c000+15a000]
Feb 16 11:21:57 t44 kernel: Code: a8 02 75 4c 48 8b 15 05 e5 13 00 64 48 83 3a
00 0f 84 f2 00 00 00 48 8d 3d 2b f2 13 00 a8 04 74 0c 48 89 f0 48 25 00 00 00
fc <48> 8b 38 48 8b 44 24 18 64 48 33 04 25 28 00
00 00 0f 85 f8 00 00
Feb 16 11:21:57 t44 start-stop-daemon[6549]: Will stop /usr/sbin/dnsmasq
Feb 16 11:21:57 t44 start-stop-daemon[6549]: Will stop PID 2764
Feb 16 11:21:57 t44 start-stop-daemon[6549]: Sending signal 15 to PID 2764
>
> Btw, send pure text message please.
Ick, I do sned plain text to LKML, or?
>
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -254,8 +254,7 @@ bool i915_request_retire(struct i915_req
>
> spin_lock_irq(&rq->lock);
> i915_request_mark_complete(rq);
> - if (!i915_request_signaled(rq))
> - dma_fence_signal_locked(&rq->fence);
> + dma_fence_signal(&rq->fence);
> if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &rq->fence.flags))
> i915_request_cancel_breadcrumb(rq);
> if (i915_request_has_waitboost(rq)) {
>
--
Toralf
___
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Track hw reported context runtime (rev3)
== Series Details == Series: drm/i915: Track hw reported context runtime (rev3) URL : https://patchwork.freedesktop.org/series/73499/ State : warning == Summary == $ dim checkpatch origin/drm-tip 953502e2ee73 drm/i915: Track hw reported context runtime -:109: WARNING:LINE_SPACING: Missing a blank line after declarations #109: FILE: drivers/gpu/drm/i915/gt/intel_context_types.h:79: + u32 last; + I915_SELFTEST_DECLARE(u32 num_underflow); -:197: WARNING:LINE_SPACING: Missing a blank line after declarations #197: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:4457: + struct i915_request *rq; + IGT_TIMEOUT(end_time); total: 0 errors, 2 warnings, 0 checks, 292 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [CI] drm/i915: Track hw reported context runtime
From: Tvrtko Ursulin
GPU saves accumulated context runtime (in CS timestamp units) in PPHWSP
which will be useful for us in cases when we are not able to track context
busyness ourselves (like with GuC). Keep a copy of this in struct
intel_context from where it can be easily read even if the context is not
pinned.
QQQ: Do we want to make this accounting conditional / able to turn on/off?
v2:
(Chris)
* Do not store pphwsp address in intel_context.
* Log CS wrap-around.
* Simplify calculation by relying on integer wraparound.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_context.c | 6 +-
drivers/gpu/drm/i915/gt/intel_context.h | 17
drivers/gpu/drm/i915/gt/intel_context_types.h | 12 +++
drivers/gpu/drm/i915/gt/intel_lrc.c | 44 -
drivers/gpu/drm/i915/gt/selftest_lrc.c| 90 +++
drivers/gpu/drm/i915/i915_gpu_error.c | 11 ++-
drivers/gpu/drm/i915/i915_gpu_error.h | 4 +
drivers/gpu/drm/i915/intel_device_info.c | 6 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
9 files changed, 186 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index e4f89341d17c..8bb444cda14f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -220,7 +220,9 @@ static void __intel_context_retire(struct i915_active
*active)
{
struct intel_context *ce = container_of(active, typeof(*ce), active);
- CE_TRACE(ce, "retire\n");
+ CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
+intel_context_get_total_runtime_ns(ce),
+intel_context_get_avg_runtime_ns(ce));
set_bit(CONTEXT_VALID_BIT, &ce->flags);
if (ce->state)
@@ -281,6 +283,8 @@ intel_context_init(struct intel_context *ce,
ce->sseu = engine->sseu;
ce->ring = __intel_context_ring_size(SZ_4K);
+ ewma_runtime_init(&ce->runtime.avg);
+
ce->vm = i915_vm_get(engine->gt->vm);
INIT_LIST_HEAD(&ce->signal_link);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 604d5cfc46ba..18efad255124 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -12,6 +12,7 @@
#include
#include "i915_active.h"
+#include "i915_drv.h"
#include "intel_context_types.h"
#include "intel_engine_types.h"
#include "intel_ring_types.h"
@@ -227,4 +228,20 @@ intel_context_clear_nopreempt(struct intel_context *ce)
clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
}
+static inline u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return READ_ONCE(ce->runtime.total) * period;
+}
+
+static inline u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return mul_u32_u32(ewma_runtime_read(&ce->runtime.avg), period);
+}
+
#endif /* __INTEL_CONTEXT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ca1420fb8b53..90f8f4dd7091 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -7,6 +7,7 @@
#ifndef __INTEL_CONTEXT_TYPES__
#define __INTEL_CONTEXT_TYPES__
+#include
#include
#include
#include
@@ -19,6 +20,8 @@
#define CONTEXT_REDZONE POISON_INUSE
+DECLARE_EWMA(runtime, 3, 4);
+
struct i915_gem_context;
struct i915_vma;
struct intel_context;
@@ -68,6 +71,15 @@ struct intel_context {
u64 lrc_desc;
u32 tag; /* cookie passed to HW to track this context on submission */
+ /* Time on GPU as tracked by the hw. */
+ struct {
+ struct ewma_runtime avg;
+ u64 total;
+ u32 last;
+ I915_SELFTEST_DECLARE(u32 num_underflow);
+ I915_SELFTEST_DECLARE(u32 max_underflow);
+ } runtime;
+
unsigned int active_count; /* protected by timeline->mutex */
atomic_t pin_count;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index c3d7727021db..ec9df88eb867 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1195,6 +1195,40 @@ static void reset_active(struct i915_request *rq,
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE;
}
+static u32 intel_context_get_runtime(const struct intel_context *ce)
+{
+ /*
+* PPHWSP is one page before the lrc state page and in it at
+* dword 16 we have cumulative context runtime in CS timestamp ticks.
+*/
+ BUILD_BUG_ON((LRC_STATE_PN - LRC_PPHWSP_PN) != 1);
+ return READ_ONCE(ce->lrc_reg_state[-1024 + 16]);
+}
+
+static void intel
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dsb: Pre allocate and late cleanup of cmd buffer (rev2)
== Series Details == Series: drm/i915/dsb: Pre allocate and late cleanup of cmd buffer (rev2) URL : https://patchwork.freedesktop.org/series/73036/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16543_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16543_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16543_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16543_full: ### IGT changes ### Possible regressions * igt@gem_tiled_partial_pwrite_pread@writes-after-reads: - shard-hsw: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw5/igt@gem_tiled_partial_pwrite_pr...@writes-after-reads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-hsw5/igt@gem_tiled_partial_pwrite_pr...@writes-after-reads.html Known issues Here are the changes found in Patchwork_16543_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@busy-vcs1: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +10 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_b...@busy-vcs1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-iclb3/igt@gem_b...@busy-vcs1.html * igt@gem_exec_schedule@out-order-bsd2: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +16 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_exec_sched...@out-order-bsd2.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-iclb5/igt@gem_exec_sched...@out-order-bsd2.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +7 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb7/igt@gem_exec_sched...@reorder-wide-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-iclb4/igt@gem_exec_sched...@reorder-wide-bsd.html * igt@gem_softpin@noreloc-s3: - shard-apl: [PASS][9] -> [DMESG-WARN][10] ([i915#180]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl4/igt@gem_soft...@noreloc-s3.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-apl4/igt@gem_soft...@noreloc-s3.html * igt@i915_pm_dc@dc5-dpms: - shard-iclb: [PASS][11] -> [FAIL][12] ([i915#447]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb1/igt@i915_pm...@dc5-dpms.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-iclb3/igt@i915_pm...@dc5-dpms.html * igt@i915_pm_rpm@system-suspend: - shard-skl: [PASS][13] -> [INCOMPLETE][14] ([i915#151] / [i915#69]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl6/igt@i915_pm_...@system-suspend.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-skl3/igt@i915_pm_...@system-suspend.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-random: - shard-skl: [PASS][15] -> [FAIL][16] ([i915#54]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-skl1/igt@kms_cursor_...@pipe-c-cursor-128x128-random.html * igt@kms_cursor_legacy@cursor-vs-flip-toggle: - shard-hsw: [PASS][17] -> [FAIL][18] ([i915#57]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw2/igt@kms_cursor_leg...@cursor-vs-flip-toggle.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-hsw6/igt@kms_cursor_leg...@cursor-vs-flip-toggle.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-glk: [PASS][19] -> [FAIL][20] ([IGT#5]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk7/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-glk9/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@2x-plain-flip-ts-check-interruptible: - shard-glk: [PASS][21] -> [FAIL][22] ([i915#34]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk7/igt@kms_f...@2x-plain-flip-ts-check-interruptible.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16543/shard-glk9/igt@kms_f...@2x-plain-flip-ts-check-interruptible.html * igt@kms_fli
Re: [Intel-gfx] [CI] drm/i915: Track hw reported context runtime
On 16/02/2020 00:06, Chris Wilson wrote:
From: Tvrtko Ursulin
GPU saves accumulated context runtime (in CS timestamp units) in PPHWSP
which will be useful for us in cases when we are not able to track context
busyness ourselves (like with GuC). Keep a copy of this in struct
intel_context from where it can be easily read even if the context is not
pinned.
QQQ: Do we want to make this accounting conditional / able to turn on/off?
v2:
(Chris)
* Do not store pphwsp address in intel_context.
* Log CS wrap-around.
* Simplify calculation by relying on integer wraparound.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_context.c | 6 +-
drivers/gpu/drm/i915/gt/intel_context.h | 18
drivers/gpu/drm/i915/gt/intel_context_types.h | 11 +++
drivers/gpu/drm/i915/gt/intel_lrc.c | 42 -
drivers/gpu/drm/i915/gt/selftest_lrc.c| 87 +++
drivers/gpu/drm/i915/i915_gpu_error.c | 11 ++-
drivers/gpu/drm/i915/i915_gpu_error.h | 4 +
drivers/gpu/drm/i915/intel_device_info.c | 6 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
9 files changed, 181 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index e4f89341d17c..8bb444cda14f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -220,7 +220,9 @@ static void __intel_context_retire(struct i915_active
*active)
{
struct intel_context *ce = container_of(active, typeof(*ce), active);
- CE_TRACE(ce, "retire\n");
+ CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
+intel_context_get_total_runtime_ns(ce),
+intel_context_get_avg_runtime_ns(ce));
set_bit(CONTEXT_VALID_BIT, &ce->flags);
if (ce->state)
@@ -281,6 +283,8 @@ intel_context_init(struct intel_context *ce,
ce->sseu = engine->sseu;
ce->ring = __intel_context_ring_size(SZ_4K);
+ ewma_runtime_init(&ce->runtime.avg);
+
ce->vm = i915_vm_get(engine->gt->vm);
INIT_LIST_HEAD(&ce->signal_link);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 604d5cfc46ba..e58da0938dcb 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -12,6 +12,7 @@
#include
#include "i915_active.h"
+#include "i915_drv.h"
#include "intel_context_types.h"
#include "intel_engine_types.h"
#include "intel_ring_types.h"
@@ -227,4 +228,21 @@ intel_context_clear_nopreempt(struct intel_context *ce)
clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
}
+static inline u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return ce->runtime.total * period;
+}
+
+static inline u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
+{
+ const u32 period =
+ RUNTIME_INFO(ce->engine->i915)->cs_timestamp_period_ns;
+
+ return mul_u32_u32(ewma_runtime_read(&ce->runtime.avg), period);
+}
+
+
#endif /* __INTEL_CONTEXT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ca1420fb8b53..6112ec97fbdf 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -7,6 +7,7 @@
#ifndef __INTEL_CONTEXT_TYPES__
#define __INTEL_CONTEXT_TYPES__
+#include
#include
#include
#include
@@ -19,6 +20,8 @@
#define CONTEXT_REDZONE POISON_INUSE
+DECLARE_EWMA(runtime, 3, 4);
+
struct i915_gem_context;
struct i915_vma;
struct intel_context;
@@ -68,6 +71,14 @@ struct intel_context {
u64 lrc_desc;
u32 tag; /* cookie passed to HW to track this context on submission */
+ /* Time on GPU as tracked by the hw. */
+ struct {
+ struct ewma_runtime avg;
+ u64 total;
+ u32 last;
+ I915_SELFTEST_DECLARE(u32 underflow);
+ } runtime;
+
unsigned int active_count; /* protected by timeline->mutex */
atomic_t pin_count;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index c3d7727021db..c09079c93345 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1195,6 +1195,38 @@ static void reset_active(struct i915_request *rq,
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE;
}
+static u32 intel_context_get_runtime(const struct intel_context *ce)
+{
+ /*
+* PPHWSP is one page before the lrc state page and in it at
+* dword 16 we have cumulative context runtime in CS timestamp ticks.
+*/
I read somewhere this accumulated runtime was incremented only every 8th
CS timestamp tick.
-Lionel
+ BUILD_BUG_ON((LRC_STATE_PN -
