date:20201227

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cml : Add TGP PCH support (rev2)

2020-12-27 Thread Patchwork

== Series Details ==

Series: drm/i915/cml : Add TGP PCH support (rev2)
URL   : https://patchwork.freedesktop.org/series/85013/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9528 -> Patchwork_19218


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19218/index.html

Known issues


  Here are the changes found in Patchwork_19218 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_rpm@module-reload:
- fi-kbl-guc: [PASS][1] -> [SKIP][2] ([fdo#109271])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9528/fi-kbl-guc/igt@i915_pm_...@module-reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19218/fi-kbl-guc/igt@i915_pm_...@module-reload.html

  
 Possible fixes 

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [DMESG-FAIL][3] ([i915#165]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9528/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19218/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165


Participating hosts (38 -> 36)
--

  Missing(2): fi-bsw-cyan fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_9528 -> Patchwork_19218

  CI-20190529: 20190529
  CI_DRM_9528: 2d13ca3bfcff24ed05e602511a3720d374e1413c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5925: c8d6184a6185e02fc9f83e3cf3ef50b0a67d981d @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19218: 9c11fb777f34f9166abc787fb00b467948c39229 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

9c11fb777f34 drm/i915/cml : Add TGP PCH support

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19218/index.html
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Re: [Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support

2020-12-27 Thread Surendrakumar Upadhyay, TejaskumarX

Hi,

Please note that https://patchwork.freedesktop.org/patch/398145/?series=83154 
this patch is required for HDMI to work on CML + TGP PCH combo.

Thanks,
Tejas

> -Original Message-
> From: Intel-gfx  On Behalf Of Tejas
> Upadhyay
> Sent: 28 December 2020 11:43
> To: intel-gfx@lists.freedesktop.org; Pandey, Hariom
> 
> Subject: [Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support
> 
> We have TGP PCH support for Tigerlake and Rocketlake. Similarly now TGP
> PCH can be used with Cometlake CPU.
> 
> Changes since V1 :
>   - Matched HPD Pin mapping for PORT C and PORT D of CML CPU.
> 
> Cc : Matt Roper  Cc : Ville Syrjälä
> 
> Signed-off-by: Tejas Upadhyay
> 
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 7 +--
>  drivers/gpu/drm/i915/display/intel_display.c | 5 +
>  drivers/gpu/drm/i915/display/intel_hdmi.c| 3 ++-
>  3 files changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 17eaa56c5a99..181d60a5e145 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -5301,7 +5301,9 @@ static enum hpd_pin dg1_hpd_pin(struct
> drm_i915_private *dev_priv,  static enum hpd_pin tgl_hpd_pin(struct
> drm_i915_private *dev_priv,
>   enum port port)
>  {
> - if (port >= PORT_TC1)
> + if (IS_COMETLAKE(dev_priv) && port >= PORT_C)
> + return HPD_PORT_TC1 + port + 1 - PORT_TC1;
> + else if (port >= PORT_TC1)
>   return HPD_PORT_TC1 + port - PORT_TC1;
>   else
>   return HPD_PORT_A + port - PORT_A;
> @@ -5455,7 +5457,8 @@ void intel_ddi_init(struct drm_i915_private
> *dev_priv, enum port port)
> 
>   if (IS_DG1(dev_priv))
>   encoder->hpd_pin = dg1_hpd_pin(dev_priv, port);
> - else if (IS_ROCKETLAKE(dev_priv))
> + else if (IS_ROCKETLAKE(dev_priv) || (IS_COMETLAKE(dev_priv) &&
> +  HAS_PCH_TGP(dev_priv)))
>   encoder->hpd_pin = rkl_hpd_pin(dev_priv, port);
>   else if (INTEL_GEN(dev_priv) >= 12)
>   encoder->hpd_pin = tgl_hpd_pin(dev_priv, port); diff --git
> a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index f2c48e5cdb43..47014471658f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16163,6 +16163,11 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
>   intel_ddi_init(dev_priv, PORT_F);
> 
>   icl_dsi_init(dev_priv);
> + } else if (IS_COMETLAKE(dev_priv) && HAS_PCH_TGP(dev_priv)) {
> + intel_ddi_init(dev_priv, PORT_A);
> + intel_ddi_init(dev_priv, PORT_B);
> + intel_ddi_init(dev_priv, PORT_C);
> + intel_ddi_init(dev_priv, PORT_D);
>   } else if (IS_GEN9_LP(dev_priv)) {
>   /*
>* FIXME: Broxton doesn't support port detection via the diff -
> -git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index c5959590562b..540c9d54b595 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -3174,7 +3174,8 @@ static u8 intel_hdmi_ddc_pin(struct intel_encoder
> *encoder)
> 
>   if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
>   ddc_pin = dg1_port_to_ddc_pin(dev_priv, port);
> - else if (IS_ROCKETLAKE(dev_priv))
> + else if (IS_ROCKETLAKE(dev_priv) || (IS_COMETLAKE(dev_priv) &&
> +  HAS_PCH_TGP(dev_priv)))
>   ddc_pin = rkl_port_to_ddc_pin(dev_priv, port);
>   else if (HAS_PCH_MCC(dev_priv))
>   ddc_pin = mcc_port_to_ddc_pin(dev_priv, port);
> --
> 2.28.0
> 
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support

2020-12-27 Thread Tejas Upadhyay

We have TGP PCH support for Tigerlake and Rocketlake. Similarly
now TGP PCH can be used with Cometlake CPU.

Changes since V1 :
- Matched HPD Pin mapping for PORT C and PORT D of CML CPU.

Cc : Matt Roper 
Cc : Ville Syrjälä  
Signed-off-by: Tejas Upadhyay 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 7 +--
 drivers/gpu/drm/i915/display/intel_display.c | 5 +
 drivers/gpu/drm/i915/display/intel_hdmi.c| 3 ++-
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 17eaa56c5a99..181d60a5e145 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -5301,7 +5301,9 @@ static enum hpd_pin dg1_hpd_pin(struct drm_i915_private 
*dev_priv,
 static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,
enum port port)
 {
-   if (port >= PORT_TC1)
+   if (IS_COMETLAKE(dev_priv) && port >= PORT_C)
+   return HPD_PORT_TC1 + port + 1 - PORT_TC1;
+   else if (port >= PORT_TC1)
return HPD_PORT_TC1 + port - PORT_TC1;
else
return HPD_PORT_A + port - PORT_A;
@@ -5455,7 +5457,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, 
enum port port)
 
if (IS_DG1(dev_priv))
encoder->hpd_pin = dg1_hpd_pin(dev_priv, port);
-   else if (IS_ROCKETLAKE(dev_priv))
+   else if (IS_ROCKETLAKE(dev_priv) || (IS_COMETLAKE(dev_priv) &&
+HAS_PCH_TGP(dev_priv)))
encoder->hpd_pin = rkl_hpd_pin(dev_priv, port);
else if (INTEL_GEN(dev_priv) >= 12)
encoder->hpd_pin = tgl_hpd_pin(dev_priv, port);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index f2c48e5cdb43..47014471658f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16163,6 +16163,11 @@ static void intel_setup_outputs(struct 
drm_i915_private *dev_priv)
intel_ddi_init(dev_priv, PORT_F);
 
icl_dsi_init(dev_priv);
+   } else if (IS_COMETLAKE(dev_priv) && HAS_PCH_TGP(dev_priv)) {
+   intel_ddi_init(dev_priv, PORT_A);
+   intel_ddi_init(dev_priv, PORT_B);
+   intel_ddi_init(dev_priv, PORT_C);
+   intel_ddi_init(dev_priv, PORT_D);
} else if (IS_GEN9_LP(dev_priv)) {
/*
 * FIXME: Broxton doesn't support port detection via the
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c 
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index c5959590562b..540c9d54b595 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3174,7 +3174,8 @@ static u8 intel_hdmi_ddc_pin(struct intel_encoder 
*encoder)
 
if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
ddc_pin = dg1_port_to_ddc_pin(dev_priv, port);
-   else if (IS_ROCKETLAKE(dev_priv))
+   else if (IS_ROCKETLAKE(dev_priv) || (IS_COMETLAKE(dev_priv) &&
+HAS_PCH_TGP(dev_priv)))
ddc_pin = rkl_port_to_ddc_pin(dev_priv, port);
else if (HAS_PCH_MCC(dev_priv))
ddc_pin = mcc_port_to_ddc_pin(dev_priv, port);
-- 
2.28.0

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Re: [Intel-gfx] [patch 02/30] genirq: Move status flag checks to core

2020-12-27 Thread Guenter Roeck

On Thu, Dec 10, 2020 at 08:25:38PM +0100, Thomas Gleixner wrote:
> These checks are used by modules and prevent the removal of the export of
> irq_to_desc(). Move the accessor into the core.
> 
> Signed-off-by: Thomas Gleixner 

Yes, but that means that irq_check_status_bit() may be called from modules,
but it is not exported, resulting in build errors such as the following.

arm64:allmodconfig:

ERROR: modpost: "irq_check_status_bit" [drivers/perf/arm_spe_pmu.ko] undefined!

Guenter

> ---
>  include/linux/irqdesc.h |   17 +
>  kernel/irq/manage.c |   17 +
>  2 files changed, 22 insertions(+), 12 deletions(-)
> 
> --- a/include/linux/irqdesc.h
> +++ b/include/linux/irqdesc.h
> @@ -223,28 +223,21 @@ irq_set_chip_handler_name_locked(struct
>   data->chip = chip;
>  }
>  
> +bool irq_check_status_bit(unsigned int irq, unsigned int bitmask);
> +
>  static inline bool irq_balancing_disabled(unsigned int irq)
>  {
> - struct irq_desc *desc;
> -
> - desc = irq_to_desc(irq);
> - return desc->status_use_accessors & IRQ_NO_BALANCING_MASK;
> + return irq_check_status_bit(irq, IRQ_NO_BALANCING_MASK);
>  }
>  
>  static inline bool irq_is_percpu(unsigned int irq)
>  {
> - struct irq_desc *desc;
> -
> - desc = irq_to_desc(irq);
> - return desc->status_use_accessors & IRQ_PER_CPU;
> + return irq_check_status_bit(irq, IRQ_PER_CPU);
>  }
>  
>  static inline bool irq_is_percpu_devid(unsigned int irq)
>  {
> - struct irq_desc *desc;
> -
> - desc = irq_to_desc(irq);
> - return desc->status_use_accessors & IRQ_PER_CPU_DEVID;
> + return irq_check_status_bit(irq, IRQ_PER_CPU_DEVID);
>  }
>  
>  static inline void
> --- a/kernel/irq/manage.c
> +++ b/kernel/irq/manage.c
> @@ -2769,3 +2769,23 @@ bool irq_has_action(unsigned int irq)
>   return res;
>  }
>  EXPORT_SYMBOL_GPL(irq_has_action);
> +
> +/**
> + * irq_check_status_bit - Check whether bits in the irq descriptor status 
> are set
> + * @irq: The linux irq number
> + * @bitmask: The bitmask to evaluate
> + *
> + * Returns: True if one of the bits in @bitmask is set
> + */
> +bool irq_check_status_bit(unsigned int irq, unsigned int bitmask)
> +{
> + struct irq_desc *desc;
> + bool res = false;
> +
> + rcu_read_lock();
> + desc = irq_to_desc(irq);
> + if (desc)
> + res = !!(desc->status_use_accessors & bitmask);
> + rcu_read_unlock();
> + return res;
> +}
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cml : Add TGP PCH support (rev2)

Re: [Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support

[Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support

Re: [Intel-gfx] [patch 02/30] genirq: Move status flag checks to core

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