Re: [Intel-gfx] [PATCH resend 0/9] drm: Add privacy-screen class and connector properties
+Jesse Barnes Hello, On Wed, Apr 14, 2021 at 8:11 AM Hans de Goede wrote: > > Hi All, > > Here is the privacy-screen related code which I last posted in August > of last year. To the best of my knowledge there is consensus about / > everyone is in agreement with the new userspace API (2 connector properties) > this patch-set add (patch 1 of the series). > > The blocker the last time was that there were no userspace users of > the new properties and as a rule we don't add new drm userspace API > without users. > > There now is GNOME userspace code using the new properties: > https://hackmd.io/@3v1n0/rkyIy3BOw > > The new API works as designed for this userspace user and the branches > mentioned at the above link add the following features to GNOME: > > 1. Showing an OSD notification when the privacy-screen is toggled on/off >through hotkeys handled by the embedded-controller > 2. Allowing control of the privacy-screen from the GNOME control-panel, >including the on/off slider shown there updating to match the hw-setting >when the setting is changed with the control-panel open. > 3. Restoring the last user-setting at login > > This series consists of a number of different parts: > > 1. A new version of Rajat's privacy-screen connector properties patch, > this adds new userspace API in the form of new properties Thanks a lot Hans! > > 2. Since on most devices the privacy screen is actually controlled by > some vendor specific ACPI/WMI interface which has a driver under > drivers/platform/x86, we need some "glue" code to make this functionality > available to KMS drivers. Patches 2-4 add a new privacy-screen class for > this, which allows non KMS drivers (and possibly KMS drivers too) to > register a privacy-screen device and also adds an interface for KMS drivers > to get access to the privacy-screen associated with a specific connector. > This is modelled similar to how we deal with e.g. PWMs and GPIOs in the > kernel, including separate includes for consumers and providers(drivers). > > 3. Some drm_connector helper functions to keep the actual changes needed > for this in individual KMS drivers as small as possible (patch 5). > > 4. Make the thinkpad_acpi code register a privacy-screen device on > ThinkPads with a privacy-screen (patches 6-8) > > 5. Make the i915 driver export the privacy-screen functionality through > the connector properties on the eDP connector. > > I believe that it would be best to merge the entire series, including > the thinkpad_acpi changes through drm-misc in one go. As the pdx86 > subsys maintainer I hereby give my ack for merging the thinkpad_acpi > changes through drm-misc. Huge +1 to this. This feature has been waiting for acceptance for almost 1.5 years now, and we (Chromeos) have been carrying it out of the tree since then. We have real products today that use this feature. If a version of it can please be accepted and applied, we look forward to cherry-pick / backport it to our kernels (and adapt chrome code to the new API). Thanks, Rajat > > There is one small caveat with this series, which it is good to be > aware of. The i915 driver will now return -EPROBE_DEFER on Thinkpads > with an eprivacy screen, until the thinkpad_acpi driver is loaded. > This means that initrd generation tools will need to be updated to > include thinkpad_acpi when the i915 driver is added to the initrd. > Without this the loading of the i915 driver will be delayed to after > the switch to real rootfs. > > Regards, > > Hans > > > Hans de Goede (8): > drm: Add privacy-screen class > drm/privacy-screen: Add X86 specific arch init code > drm/privacy-screen: Add notifier support > drm/connector: Add a drm_connector privacy-screen helper functions > platform/x86: thinkpad_acpi: Add hotkey_notify_extended_hotkey() > helper > platform/x86: thinkpad_acpi: Get privacy-screen / lcdshadow ACPI > handles only once > platform/x86: thinkpad_acpi: Register a privacy-screen device > drm/i915: Add privacy-screen support > > Rajat Jain (1): > drm/connector: Add support for privacy-screen properties (v4) > > Documentation/gpu/drm-kms-helpers.rst| 15 + > Documentation/gpu/drm-kms.rst| 2 + > MAINTAINERS | 8 + > drivers/gpu/drm/Kconfig | 5 + > drivers/gpu/drm/Makefile | 4 + > drivers/gpu/drm/drm_atomic_uapi.c| 4 + > drivers/gpu/drm/drm_connector.c | 214 > drivers/gpu/drm/drm_privacy_screen.c | 493 +++ > drivers/gpu/drm/drm_privacy_screen_x86.c | 82 +++ > drivers/gpu/drm/i915/display/intel_display.c | 5 + > drivers/gpu/drm/i915/display/intel_dp.c | 10 + > drivers/gpu/drm/i915/i915_pci.c | 12 + > drivers/platform/x86/Kconfig | 1 + > drivers/platform/x86/thinkpad_acpi.c | 131 +++-- > include/drm/drm_connector.h | 56 +++ > incl
Re: [Intel-gfx] [PATCH] drm/i915/display/psr: Fix cppcheck warnings
On Fri, Apr 09, 2021 at 04:17:38PM -0700, José Roberto de Souza wrote:
> Fix redundant condition, caught in cppcheck by kernel test robot.
>
> Reported-by: kernel test robot
> Cc: Gwan-gyeong Mun
> Fixes: b64d6c51380b ("drm/i915/display: Support PSR Multiple Instances")
> Signed-off-by: José Roberto de Souza
Reviewed-by: Harish Chegondi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 2627d0b558f3..06cb286e9a4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1532,8 +1532,7 @@ void intel_psr_wait_for_idle(const struct
> intel_crtc_state *new_crtc_state)
> u32 psr_status;
>
> mutex_lock(&intel_dp->psr.lock);
> - if (!intel_dp->psr.enabled ||
> - (intel_dp->psr.enabled && intel_dp->psr.psr2_enabled)) {
> + if (!intel_dp->psr.enabled || intel_dp->psr.psr2_enabled) {
> mutex_unlock(&intel_dp->psr.lock);
> continue;
> }
> --
> 2.31.1
>
> ___
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Re: [Intel-gfx] [PATCH v19 2/6] dt-binding: i2c: mt65xx: add vbus-supply property
On Thu, 15 Apr 2021 01:29:12 +0800, Hsin-Yi Wang wrote: > Add vbus-supply property for mt65xx. The regulator can be passed into > core and turned off during suspend/sleep to reduce power consumption. > > Signed-off-by: Hsin-Yi Wang > --- > Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/adl_p: Add support for Display Page Tables
== Series Details == Series: drm/i915/adl_p: Add support for Display Page Tables URL : https://patchwork.freedesktop.org/series/89078/ State : success == Summary == CI Bug Log - changes from CI_DRM_9971_full -> Patchwork_19939_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_19939_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19939_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19939_full: ### IGT changes ### Warnings * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-iclb: [FAIL][1] ([i915#2842]) -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-iclb3/igt@gem_exec_fair@basic-pace-s...@rcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-iclb4/igt@gem_exec_fair@basic-pace-s...@rcs0.html Known issues Here are the changes found in Patchwork_19939_full that come from known issues: ### IGT changes ### Issues hit * igt@feature_discovery@psr2: - shard-iclb: [PASS][3] -> [SKIP][4] ([i915#658]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-iclb2/igt@feature_discov...@psr2.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-iclb5/igt@feature_discov...@psr2.html * igt@gem_create@create-clear: - shard-skl: [PASS][5] -> [FAIL][6] ([i915#3160]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-skl2/igt@gem_cre...@create-clear.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-skl9/igt@gem_cre...@create-clear.html * igt@gem_ctx_persistence@process: - shard-snb: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-snb6/igt@gem_ctx_persiste...@process.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#3063]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-tglb1/igt@gem_...@unwedge-stress.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-tglb8/igt@gem_...@unwedge-stress.html * igt@gem_exec_endless@dispatch@vcs0: - shard-iclb: [PASS][10] -> [INCOMPLETE][11] ([i915#2502]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-iclb4/igt@gem_exec_endless@dispa...@vcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-iclb4/igt@gem_exec_endless@dispa...@vcs0.html * igt@gem_exec_fair@basic-deadline: - shard-apl: NOTRUN -> [FAIL][12] ([i915#2846]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-apl7/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none@vcs1: - shard-kbl: NOTRUN -> [FAIL][13] ([i915#2842]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs1.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-glk: [PASS][14] -> [FAIL][15] ([i915#2842]) +1 similar issue [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-glk5/igt@gem_exec_fair@basic-throt...@rcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-glk8/igt@gem_exec_fair@basic-throt...@rcs0.html * igt@gem_exec_whisper@basic-queues-forked-all: - shard-glk: [PASS][16] -> [DMESG-WARN][17] ([i915#118] / [i915#95]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-glk9/igt@gem_exec_whis...@basic-queues-forked-all.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-glk6/igt@gem_exec_whis...@basic-queues-forked-all.html * igt@gem_mmap_gtt@cpuset-medium-copy: - shard-iclb: [PASS][18] -> [FAIL][19] ([i915#2428]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-iclb1/igt@gem_mmap_...@cpuset-medium-copy.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-iclb7/igt@gem_mmap_...@cpuset-medium-copy.html * igt@gem_mmap_offset@clear: - shard-glk: [PASS][20] -> [FAIL][21] ([i915#1888] / [i915#3160]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-glk1/igt@gem_mmap_off...@clear.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-glk4/igt@gem_mmap_off...@clear.html * igt@gem_pwrite@basic-exhaustion: - shard-skl: NOTRUN -> [WARN][22] ([i915#2658]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/shard-skl9/igt@gem_pwr...@basic-exhaustion.html - shard-apl: NOTRUN -> [WARN][23] ([i915#2658]) [23]: https://int
Re: [Intel-gfx] [RFC PATCH v2] drm/doc/rfc: i915 DG1 uAPI
+mesa-dev and some Intel mesa people.
On Wed, Apr 14, 2021 at 5:23 AM Daniel Vetter wrote:
>
> On Tue, Apr 13, 2021 at 12:47:06PM +0100, Matthew Auld wrote:
> > Add an entry for the new uAPI needed for DG1.
> >
> > v2(Daniel):
> > - include the overall upstreaming plan
> > - add a note for mmap, there are differences here for TTM vs i915
> > - bunch of other suggestions from Daniel
> >
> > Signed-off-by: Matthew Auld
> > Cc: Joonas Lahtinen
> > Cc: Daniel Vetter
> > Cc: Dave Airlie
>
> Bunch more thoughts below, I think we're getting there. Thanks for doing
> this.
>
> > ---
> > Documentation/gpu/rfc/i915_gem_lmem.h | 151
> > Documentation/gpu/rfc/i915_gem_lmem.rst | 119 +++
> > Documentation/gpu/rfc/index.rst | 4 +
> > 3 files changed, 274 insertions(+)
> > create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.h
> > create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.rst
> >
> > diff --git a/Documentation/gpu/rfc/i915_gem_lmem.h
> > b/Documentation/gpu/rfc/i915_gem_lmem.h
> > new file mode 100644
> > index ..6ae13209d7ef
> > --- /dev/null
> > +++ b/Documentation/gpu/rfc/i915_gem_lmem.h
> > @@ -0,0 +1,151 @@
> > +/* The new query_id for struct drm_i915_query_item */
> > +#define DRM_I915_QUERY_MEMORY_REGIONS 0xdeadbeaf
> > +
> > +/**
> > + * enum drm_i915_gem_memory_class
> > + */
> > +enum drm_i915_gem_memory_class {
>
> Are we really going with enum in uapi? I thought that was frought with
> peril since the integer type of enum is quite a bit up to compilers. But
> maybe I'm just scared.
It looks to me like it's a __u16 below. That should be fine. We
don't really need to give the enum type a name in that case, though.
> > + /** @I915_MEMORY_CLASS_SYSTEM: system memory */
> > + I915_MEMORY_CLASS_SYSTEM = 0,
> > + /** @I915_MEMORY_CLASS_DEVICE: device local-memory */
> > + I915_MEMORY_CLASS_DEVICE,
> > +};
> > +
> > +/**
> > + * struct drm_i915_gem_memory_class_instance
> > + */
> > +struct drm_i915_gem_memory_class_instance {
> > + /** @memory_class: see enum drm_i915_gem_memory_class */
> > + __u16 memory_class;
> > +
> > + /** @memory_instance: which instance */
> > + __u16 memory_instance;
> > +};
> > +
> > +/**
> > + * struct drm_i915_memory_region_info
> > + *
> > + * Describes one region as known to the driver.
> > + */
> > +struct drm_i915_memory_region_info {
> > + /** @region: class:instance pair encoding */
> > + struct drm_i915_gem_memory_class_instance region;
> > +
> > + /** @rsvd0: MBZ */
> > + __u32 rsvd0;
> > +
> > + /** @caps: MBZ */
> > + __u64 caps;
> > +
> > + /** @flags: MBZ */
> > + __u64 flags;
> > +
> > + /** @probed_size: Memory probed by the driver (-1 = unknown) */
> > + __u64 probed_size;
> > +
> > + /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */
> > + __u64 unallocated_size;
> > +
> > + /** @rsvd1: MBZ */
> > + __u64 rsvd1[8];
>
> I guess this is for future stuff that becomes relevant with multi-tile?
> Might be worth explaining in 1-2 words why we reserve a pile here. Also
> it doesn't matter ofc for performance here :-)
>
> > +};
> > +
> > +/**
> > + * struct drm_i915_query_memory_regions
> > + *
> > + * Region info query enumerates all regions known to the driver by filling
> > in
> > + * an array of struct drm_i915_memory_region_info structures.
>
> I guess this works with the usual 1. query number of regions 2. get them
> all two-step ioctl flow? Worth explaining here.
>
> > + */
> > +struct drm_i915_query_memory_regions {
> > + /** @num_regions: Number of supported regions */
> > + __u32 num_regions;
> > +
> > + /** @rsvd: MBZ */
> > + __u32 rsvd[3];
> > +
> > + /** @regions: Info about each supported region */
> > + struct drm_i915_memory_region_info regions[];
> > +};
>
> Hm don't we need a query ioctl for this too?
>
> > +
> > +#define DRM_I915_GEM_CREATE_EXT 0xdeadbeaf
> > +#define DRM_IOCTL_I915_GEM_CREATE_EXTDRM_IOWR(DRM_COMMAND_BASE +
> > DRM_I915_GEM_CREATE_EXT, struct drm_i915_gem_create_ext)
> > +
> > +/**
> > + * struct drm_i915_gem_create_ext
>
> I think some explanation here that all new bo flags will be added here,
> and that in general we're phasing out the various SET/GET ioctls.
>
> > + */
> > +struct drm_i915_gem_create_ext {
> > + /**
> > + * @size: Requested size for the object.
> > + *
> > + * The (page-aligned) allocated size for the object will be returned.
> > + */
> > + __u64 size;
> > + /**
> > + * @handle: Returned handle for the object.
> > + *
> > + * Object handles are nonzero.
> > + */
> > + __u32 handle;
> > + /** @flags: MBZ */
> > + __u32 flags;
> > + /**
> > + * @extensions:
> > + * For I915_GEM_CREATE_EXT_SETPARAM extension usage see both:
> > + * struct drm_i915_gem_create_ext_setparam.
> > + *
Re: [Intel-gfx] [PATCH 03/30] drm/tegra: Don't register DP AUX channels before connectors
On Wed, 2021-04-14 at 18:49 +0200, Thierry Reding wrote: > On Fri, Feb 19, 2021 at 04:52:59PM -0500, Lyude Paul wrote: > > As pointed out by the documentation for drm_dp_aux_register(), > > drm_dp_aux_init() should be used in situations where the AUX channel for a > > display driver can potentially be registered before it's respective DRM > > driver. This is the case with Tegra, since the DP aux channel exists as a > > platform device instead of being a grandchild of the DRM device. > > > > Since we're about to add a backpointer to a DP AUX channel's respective > > DRM > > device, let's fix this so that we don't potentially allow userspace to use > > the AUX channel before we've associated it with it's DRM connector. > > > > Signed-off-by: Lyude Paul > > --- > > drivers/gpu/drm/tegra/dpaux.c | 11 ++- > > 1 file changed, 6 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c > > index 105fb9cdbb3b..ea56c6ec25e4 100644 > > --- a/drivers/gpu/drm/tegra/dpaux.c > > +++ b/drivers/gpu/drm/tegra/dpaux.c > > @@ -534,9 +534,7 @@ static int tegra_dpaux_probe(struct platform_device > > *pdev) > > dpaux->aux.transfer = tegra_dpaux_transfer; > > dpaux->aux.dev = &pdev->dev; > > > > - err = drm_dp_aux_register(&dpaux->aux); > > - if (err < 0) > > - return err; > > + drm_dp_aux_init(&dpaux->aux); > > I just noticed that this change causes an error on some setups that I > haven't seen before. The problem is that the SOR driver tries to grab a > reference to the I2C device to make sure it doesn't go away while it has > a pointer to it. > > However, since now the I2C adapter hasn't been registered yet, I get > this: > > [ 15.013969] kobject: '(null)' (5c903e43): is not > initialized, yet kobject_get() is being called. > > I recall that you wanted to make this change so that a backpointer to > the DRM device could be added (I think that's patch 15 of the series), > but I didn't see that patch get merged, so it's a bit difficult to try > and fix this up. I'm pretty sure I already merged the tegra change in drm-misc-next, so if it's causing issues you probably should send out a revert for now and I can r-b it so we can figure out a better solution for this in the mean time > Has the situation changed? Do we no longer need the backpointer? If we > still want it, what's the plan for merging the change? Should I work > under the assumption that patch will make it in sometime and try to fix > this on top of that? yes we do still need the backpointer - I'm just still working on getting reviews for some of the other parts of this series, and have been on PTO/busy with a couple of other things. > > I'm thinking that perhaps we can move the I2C adapter registration into > drm_dp_aux_init() since that's independent of the DRM device. Yeah this makes sense for me - I can try to make this change on the next respin of this series. What kind of setup were you able to reproduce issues on this with btw? > It would > also make a bit more sense from the Tegra driver's point of view where > all devices would be created during the ->probe() path, and only during > the ->init() path would the connection between DRM device and DRM DP AUX > device be established. > > Thierry -- Cheers, Lyude Paul (she/her) Software Engineer at Red Hat ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 00/18] Make vfio_mdev type safe
On Tue, 6 Apr 2021 16:40:23 -0300 Jason Gunthorpe wrote: > vfio_mdev has a number of different objects: mdev_parent, mdev_type and > mdev_device. > > Unfortunately the types of these have been erased in various places > throughout the API, and this makes it very hard to understand this code or > maintain it by the time it reaches all of the drivers. > > This series puts in all the types and aligns some of the design with the > driver core standard for a driver core bus driver: > > - Replace 'struct device *' with 'struct mdev_device * > - Replace 'struct device *' with 'struct mdev_type *' and >mtype_get_parent_dev() > - Replace 'struct kobject *' with 'struct mdev_type *' > > Now that types are clear it is easy to spot a few places that have > duplicated information. > > More significantly we can now understand how to directly fix the > obfuscated 'kobj->name' matching by realizing the the kobj is a mdev_type, > which is linked to the supported_types_list provided by the driver, and > thus the core code can directly return the array indexes all the drivers > actually want. > > v2: > - Use a mdev_type local in mdev_create_sysfs_files > - Rename the goto unwind labels in mdev_device_free() > - Reorder patches, annotate reviewed-by's thanks all > v1: https://lore.kernel.org/r/0-v1-7dedf20b2b75+4f785-vfio2_...@nvidia.com > > Jason Gunthorpe (18): > vfio/mdev: Fix missing static's on MDEV_TYPE_ATTR's > vfio/mdev: Do not allow a mdev_type to have a NULL parent pointer > vfio/mdev: Add missing typesafety around mdev_device > vfio/mdev: Simplify driver registration > vfio/mdev: Use struct mdev_type in struct mdev_device > vfio/mdev: Expose mdev_get/put_parent to mdev_private.h > vfio/mdev: Add missing reference counting to mdev_type > vfio/mdev: Reorganize mdev_device_create() > vfio/mdev: Add missing error handling to dev_set_name() > vfio/mdev: Remove duplicate storage of parent in mdev_device > vfio/mdev: Add mdev/mtype_get_type_group_id() > vfio/mtty: Use mdev_get_type_group_id() > vfio/mdpy: Use mdev_get_type_group_id() > vfio/mbochs: Use mdev_get_type_group_id() > vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV > vfio/gvt: Use mdev_get_type_group_id() > vfio/mdev: Remove kobj from mdev_parent_ops->create() > vfio/mdev: Correct the function signatures for the > mdev_type_attributes > > .../driver-api/vfio-mediated-device.rst | 9 +- > drivers/gpu/drm/i915/Kconfig | 1 + > drivers/gpu/drm/i915/gvt/gvt.c| 41 ++--- > drivers/gpu/drm/i915/gvt/gvt.h| 4 +- > drivers/gpu/drm/i915/gvt/kvmgt.c | 7 +- > drivers/s390/cio/vfio_ccw_ops.c | 17 +- > drivers/s390/crypto/vfio_ap_ops.c | 14 +- > drivers/vfio/mdev/mdev_core.c | 174 +++--- > drivers/vfio/mdev/mdev_driver.c | 19 +- > drivers/vfio/mdev/mdev_private.h | 40 ++-- > drivers/vfio/mdev/mdev_sysfs.c| 59 +++--- > drivers/vfio/mdev/vfio_mdev.c | 29 +-- > drivers/vfio/vfio_iommu_type1.c | 25 +-- > include/linux/mdev.h | 80 +--- > samples/vfio-mdev/mbochs.c| 55 +++--- > samples/vfio-mdev/mdpy.c | 56 +++--- > samples/vfio-mdev/mtty.c | 66 ++- > 17 files changed, 313 insertions(+), 383 deletions(-) Applied to vfio next branch for v5.13. Thanks! Alex ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/adl_p: Add support for Display Page Tables
== Series Details == Series: drm/i915/adl_p: Add support for Display Page Tables URL : https://patchwork.freedesktop.org/series/89078/ State : success == Summary == CI Bug Log - changes from CI_DRM_9971 -> Patchwork_19939 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/index.html Known issues Here are the changes found in Patchwork_19939 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@semaphore: - fi-bsw-nick:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/fi-bsw-nick/igt@amdgpu/amd_ba...@semaphore.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-7500u: [PASS][2] -> [DMESG-FAIL][3] ([i915#165]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-kbl-7500u/igt@kms_chamel...@common-hpd-after-suspend.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/fi-kbl-7500u/igt@kms_chamel...@common-hpd-after-suspend.html * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7500u: [PASS][4] -> [FAIL][5] ([i915#1372]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html Possible fixes * igt@i915_selftest@live@execlists: - fi-bsw-nick:[INCOMPLETE][6] ([i915#2782] / [i915#2940]) -> [PASS][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-bsw-nick/igt@i915_selftest@l...@execlists.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/fi-bsw-nick/igt@i915_selftest@l...@execlists.html Warnings * igt@i915_pm_rpm@basic-rte: - fi-kbl-guc: [FAIL][8] ([i915#579]) -> [SKIP][9] ([fdo#109271]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-kbl-guc/igt@i915_pm_...@basic-rte.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/fi-kbl-guc/igt@i915_pm_...@basic-rte.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372 [i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165 [i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782 [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940 [i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579 Participating hosts (45 -> 41) -- Missing(4): fi-icl-y fi-ilk-m540 fi-bsw-cyan fi-bdw-samus Build changes - * Linux: CI_DRM_9971 -> Patchwork_19939 CI-20190529: 20190529 CI_DRM_9971: 8f38b366ca75c83434d586430306b9f83499f1b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6064: 48d89e2c65c54883b0776930a884e6d3bcefb45b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19939: a992015218bc03e5ae4315a3c225da2336c2d001 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == a992015218bc drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT a48fcda970df drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs dd8b2c31734c drm/i915/adl_p: Disable support for 90/270 FB rotation 3ab439b2e61b drm/i915/adl_p: Add stride restriction when using DPT ae0259160293 drm/i915/xelpd: Support 128k plane stride c4779e2af5ce drm/i915/xelpd: Fallback to plane stride limitations when using DPT 4a28c5ef22b0 drm/i915/xelpd: First stab at DPT support 9c24583b5bbd drm/i915/adl_p: ADL_P device info enabling c9f4c699d4b4 drm/i915/adl_p: Add PCI Devices IDs ee88b73d7f94 drm/i915/xelpd: add XE_LPD display characteristics fae46e1c4858 drm/i915: Pass intel_framebuffer instad of drm_framebuffer to intel_fill_fb_info() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19939/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for add power control in i2c
== Series Details == Series: add power control in i2c URL : https://patchwork.freedesktop.org/series/89081/ State : failure == Summary == Applying: i2c: core: support bus regulator controlling in adapter error: sha1 information is lacking or useless (drivers/i2c/i2c-core-base.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 i2c: core: support bus regulator controlling in adapter When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 08/12] drm/i915: finish removal of gen_mask
On Wed, Apr 14, 2021 at 12:38:44PM +0100, Tvrtko Ursulin wrote: On 13/04/2021 06:09, Lucas De Marchi wrote: Now that it's not used anywhere, remove it from struct intel_device_info. To allow a period in which code will be converted to the new macro, keep IS_GEN_RANGE() around, just redefining it to use the new fields. The size advantage from IS_GEN_RANGE() using a mask is not that big as it has pretty limited use througout the driver: textdata bss dec hex filename 2758497 959656496 2860958 2ba79e drivers/gpu/drm/i915/i915.ko.old 2758586 959536496 2861035 2ba7eb drivers/gpu/drm/i915/i915.ko.new This delta refers to this patch - I mean this point in the series? Asking because it may not be 100% representative since some of the previous patches have already removed some gen mask usages. yes, it doesn't consider the other patches. These numbers are also for v1, not v2, as I didn't update the commit mesage. I don't think the numbers will be too different though. While I am here, I am a bit fond of the mask approach and wonder if using it for all (gt/media/whatelse) new fields would still make sense. Presence of the range check helpers suggests that it might, but I haven't looked at how prevalent their usage ends up after the series is done. So just in principle, I don't see why not still go with masks since that guarantees elegant check at each range check site. It would be all hidden in the macro implementation so easy. Also for historical reference, another reason why I went for masks everywhere approach is that at some point we had a feature request to allow compiling out platforms/gens. I *think* that was much easier to do with masking and in experiments back then I was able for instance to build just for Gen9+ and drop like 30% of the binary size. Oh I found the branch now.. The reason for IS_GEN(p, v) was also in that series. I don't know if I ever RFC-ed or trybotted it.. google suggests no and I neither can find it in my mailboxes. I could send out the old patches for reference? But to be honest I have no idea if this feature request (targeted driver builds) will ever resurface.. At the time I also liked having the macros. Looking back and checking if we really took advantage of it, I lean towards a "no". Even when and if we are interested in compiling out some platforms, I think a better code split would be deserved rather relying on this. Lucas De Marchi ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v19 6/6] drm/i915/selftests: Rename functions names
pm_resume and pm_suspend might be conflict with the ones defined in
include/linux/suspend.h. Rename pm_resume{suspend} to
i915_pm_resume{suspend} since they are only used here.
Signed-off-by: Hsin-Yi Wang
Reported-by: kernel test robot
---
drivers/gpu/drm/i915/selftests/i915_gem.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c
b/drivers/gpu/drm/i915/selftests/i915_gem.c
index dc394fb7ccfa..525afda9d31f 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -94,7 +94,7 @@ static int pm_prepare(struct drm_i915_private *i915)
return 0;
}
-static void pm_suspend(struct drm_i915_private *i915)
+static void i915_pm_suspend(struct drm_i915_private *i915)
{
intel_wakeref_t wakeref;
@@ -116,7 +116,7 @@ static void pm_hibernate(struct drm_i915_private *i915)
}
}
-static void pm_resume(struct drm_i915_private *i915)
+static void i915_pm_resume(struct drm_i915_private *i915)
{
intel_wakeref_t wakeref;
@@ -152,12 +152,12 @@ static int igt_gem_suspend(void *arg)
if (err)
goto out;
- pm_suspend(i915);
+ i915_pm_suspend(i915);
/* Here be dragons! Note that with S3RST any S3 may become S4! */
simulate_hibernate(i915);
- pm_resume(i915);
+ i915_pm_resume(i915);
err = switch_to_context(ctx);
out:
@@ -192,7 +192,7 @@ static int igt_gem_hibernate(void *arg)
/* Here be dragons! */
simulate_hibernate(i915);
- pm_resume(i915);
+ i915_pm_resume(i915);
err = switch_to_context(ctx);
out:
--
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[Intel-gfx] [PATCH v19 5/6] arm64: dts: mt8183: add supply name for eeprom
Add supplies for eeprom for mt8183 boards.
Signed-off-by: Hsin-Yi Wang
---
arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi | 4
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi | 4
arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi | 4
3 files changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
index b442e38a3156..28966a65391b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi
@@ -88,11 +88,13 @@ &i2c2 {
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <&mt6358_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c32";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <&mt6358_vcama2_reg>;
};
};
@@ -101,11 +103,13 @@ &i2c4 {
pinctrl-0 = <&i2c4_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <&mt6358_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c32";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <&mt6358_vcn18_reg>;
};
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
index 2f5234a16ead..3aa79403c0c2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi
@@ -62,11 +62,13 @@ &i2c2 {
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <&mt6358_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c64";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <&mt6358_vcamio_reg>;
};
};
@@ -75,11 +77,13 @@ &i2c4 {
pinctrl-0 = <&i2c4_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <&mt6358_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <&mt6358_vcn18_reg>;
};
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
index fbc471ccf805..30c183c96a54 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi
@@ -71,11 +71,13 @@ &i2c2 {
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <&mt6358_vcamio_reg>;
eeprom@58 {
compatible = "atmel,24c32";
reg = <0x58>;
pagesize = <32>;
+ vcc-supply = <&mt6358_vcama2_reg>;
};
};
@@ -84,11 +86,13 @@ &i2c4 {
pinctrl-0 = <&i2c4_pins>;
status = "okay";
clock-frequency = <40>;
+ vbus-supply = <&mt6358_vcn18_reg>;
eeprom@54 {
compatible = "atmel,24c32";
reg = <0x54>;
pagesize = <32>;
+ vcc-supply = <&mt6358_vcn18_reg>;
};
};
--
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[Intel-gfx] [PATCH v19 4/6] misc: eeprom: at24: check suspend status before disable regulator
cd5676db0574 ("misc: eeprom: at24: support pm_runtime control") disables
regulator in runtime suspend. If runtime suspend is called before
regulator disable, it will results in regulator unbalanced disabling.
Signed-off-by: Hsin-Yi Wang
---
drivers/misc/eeprom/at24.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 926408b41270..7a6f01ace78a 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -763,7 +763,8 @@ static int at24_probe(struct i2c_client *client)
at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
if (IS_ERR(at24->nvmem)) {
pm_runtime_disable(dev);
- regulator_disable(at24->vcc_reg);
+ if (!pm_runtime_status_suspended(dev))
+ regulator_disable(at24->vcc_reg);
return PTR_ERR(at24->nvmem);
}
@@ -774,7 +775,8 @@ static int at24_probe(struct i2c_client *client)
err = at24_read(at24, 0, &test_byte, 1);
if (err) {
pm_runtime_disable(dev);
- regulator_disable(at24->vcc_reg);
+ if (!pm_runtime_status_suspended(dev))
+ regulator_disable(at24->vcc_reg);
return -ENODEV;
}
--
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[Intel-gfx] [PATCH v19 3/6] i2c: mediatek: mt65xx: add optional vbus-supply
Add vbus-supply which provides power to SCL/SDA. Pass this regulator
into core so it can be turned on/off for low power mode support.
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 2ffd2f354d0a..82f2b6716005 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -1215,6 +1215,13 @@ static int mtk_i2c_probe(struct platform_device *pdev)
i2c->adap.quirks = i2c->dev_comp->quirks;
i2c->adap.timeout = 2 * HZ;
i2c->adap.retries = 1;
+ i2c->adap.bus_regulator = devm_regulator_get_optional(&pdev->dev,
"vbus");
+ if (IS_ERR(i2c->adap.bus_regulator)) {
+ if (PTR_ERR(i2c->adap.bus_regulator) == -ENODEV)
+ i2c->adap.bus_regulator = NULL;
+ else
+ return PTR_ERR(i2c->adap.bus_regulator);
+ }
ret = mtk_i2c_parse_dt(pdev->dev.of_node, i2c);
if (ret)
--
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[Intel-gfx] [PATCH v19 2/6] dt-binding: i2c: mt65xx: add vbus-supply property
Add vbus-supply property for mt65xx. The regulator can be passed into core and turned off during suspend/sleep to reduce power consumption. Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt index 7f0194fdd0cc..2c45647e9f0b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt @@ -32,6 +32,7 @@ Optional properties: - mediatek,have-pmic: platform can control i2c form special pmic side. Only mt6589 and mt8135 support this feature. - mediatek,use-push-pull: IO config use push-pull mode. + - vbus-supply: phandle to the regulator that provides power to SCL/SDA. Example: -- 2.31.1.295.g9ea45b61b8-goog ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v19 1/6] i2c: core: support bus regulator controlling in adapter
From: Bibby Hsieh
Although in the most platforms, the bus power of i2c
are alway on, some platforms disable the i2c bus power
in order to meet low power request.
We can control bulk regulator if it is provided in i2c
adapter device.
Signed-off-by: Bibby Hsieh
Signed-off-by: Marek Szyprowski
Signed-off-by: Hsin-Yi Wang
---
drivers/i2c/i2c-core-base.c | 88 +
include/linux/i2c.h | 2 +
2 files changed, 90 insertions(+)
diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
index 24c8f11bac73..c34920f30c5a 100644
--- a/drivers/i2c/i2c-core-base.c
+++ b/drivers/i2c/i2c-core-base.c
@@ -461,12 +461,14 @@ static int i2c_smbus_host_notify_to_irq(const struct
i2c_client *client)
static int i2c_device_probe(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
int status;
if (!client)
return 0;
+ adap = client->adapter;
client->irq = client->init_irq;
if (!client->irq) {
@@ -532,6 +534,14 @@ static int i2c_device_probe(struct device *dev)
dev_dbg(dev, "probe\n");
+ if (adap->bus_regulator) {
+ status = regulator_enable(adap->bus_regulator);
+ if (status < 0) {
+ dev_err(&adap->dev, "Failed to enable bus regulator\n");
+ goto err_clear_wakeup_irq;
+ }
+ }
+
status = of_clk_set_defaults(dev->of_node, false);
if (status < 0)
goto err_clear_wakeup_irq;
@@ -589,8 +599,10 @@ static int i2c_device_probe(struct device *dev)
static int i2c_device_remove(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
+ struct i2c_adapter *adap;
struct i2c_driver *driver;
+ adap = client->adapter;
driver = to_i2c_driver(dev->driver);
if (driver->remove) {
int status;
@@ -605,6 +617,8 @@ static int i2c_device_remove(struct device *dev)
devres_release_group(&client->dev, client->devres_group_id);
dev_pm_domain_detach(&client->dev, true);
+ if (!pm_runtime_status_suspended(&client->dev) && adap->bus_regulator)
+ regulator_disable(adap->bus_regulator);
dev_pm_clear_wake_irq(&client->dev);
device_init_wakeup(&client->dev, false);
@@ -617,6 +631,79 @@ static int i2c_device_remove(struct device *dev)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int i2c_resume_early(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ if (!pm_runtime_status_suspended(&client->dev)) {
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ }
+
+ return pm_generic_resume_early(&client->dev);
+}
+
+static int i2c_suspend_late(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = pm_generic_suspend_late(&client->dev);
+ if (err)
+ return err;
+
+ if (!pm_runtime_status_suspended(&client->dev))
+ return regulator_disable(client->adapter->bus_regulator);
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_PM
+static int i2c_runtime_resume(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = regulator_enable(client->adapter->bus_regulator);
+ if (err)
+ return err;
+ return pm_generic_runtime_resume(&client->dev);
+}
+
+static int i2c_runtime_suspend(struct device *dev)
+{
+ struct i2c_client *client = i2c_verify_client(dev);
+ int err;
+
+ if (!client || !client->adapter->bus_regulator)
+ return 0;
+
+ err = pm_generic_runtime_suspend(&client->dev);
+ if (err)
+ return err;
+
+ return regulator_disable(client->adapter->bus_regulator);
+}
+#endif
+
+static const struct dev_pm_ops i2c_device_pm = {
+ SET_LATE_SYSTEM_SLEEP_PM_OPS(i2c_suspend_late, i2c_resume_early)
+ SET_RUNTIME_PM_OPS(i2c_runtime_suspend, i2c_runtime_resume, NULL)
+};
+
static void i2c_device_shutdown(struct device *dev)
{
struct i2c_client *client = i2c_verify_client(dev);
@@ -674,6 +761,7 @@ struct bus_type i2c_bus_type = {
.probe = i2c_device_probe,
.remove = i2c_device_remove,
.shutdown = i2c_device_shutdown,
+ .pm = &i2c_device_pm,
};
EXPORT_SYMBOL_GPL(i2c_bus_type);
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index e
[Intel-gfx] [PATCH v19 0/6] add power control in i2c
Although in the most platforms, the power of eeprom and i2c are alway on, some platforms disable the eeprom and i2c power in order to meet low power request. This patch add the pm_runtime ops to control power to support all platforms. Changes since v18: - Fix a function name conflict with drivers/gpu/drm/i915/selftests/i915_gem.c Changes since v17: - Add a patch to fix unbalanced regulator disabling. - Add dts patch. Changes since v16: - request regulator in device instead of in the core. - control regulator only if it's provided. Changes since v15: - Squash the fix[1] for v15. [1] https://patchwork.ozlabs.org/project/linux-i2c/patch/20200522101327.13456-1-m.szyprow...@samsung.com/ Changes since v14: - change the return value in normal condition - access the variable after NULL pointer checking - add ack tag Changes since v13: - fixup some logic error Changes since v12: - rebase onto v5.7-rc1 - change the property description in binding Changes since v11: - use suspend_late/resume_early instead of suspend/resume - rebase onto v5.6-rc1 Changes since v10: - fixup some worng codes Changes since v9: - fixup build error - remove redundant code Changes since v8: - fixup some wrong code - remove redundant message [... snip ...] Bibby Hsieh (1): i2c: core: support bus regulator controlling in adapter Hsin-Yi Wang (5): dt-binding: i2c: mt65xx: add vbus-supply property i2c: mediatek: mt65xx: add optional vbus-supply misc: eeprom: at24: check suspend status before disable regulator arm64: dts: mt8183: add supply name for eeprom drm/i915/selftests: Rename functions names .../devicetree/bindings/i2c/i2c-mt65xx.txt| 1 + .../dts/mediatek/mt8183-kukui-kakadu.dtsi | 4 + .../dts/mediatek/mt8183-kukui-kodama.dtsi | 4 + .../boot/dts/mediatek/mt8183-kukui-krane.dtsi | 4 + drivers/gpu/drm/i915/selftests/i915_gem.c | 10 +-- drivers/i2c/busses/i2c-mt65xx.c | 7 ++ drivers/i2c/i2c-core-base.c | 88 +++ drivers/misc/eeprom/at24.c| 6 +- include/linux/i2c.h | 2 + 9 files changed, 119 insertions(+), 7 deletions(-) -- 2.31.1.295.g9ea45b61b8-goog ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/adl_p: Add support for Display Page Tables
== Series Details ==
Series: drm/i915/adl_p: Add support for Display Page Tables
URL : https://patchwork.freedesktop.org/series/89078/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fae46e1c4858 drm/i915: Pass intel_framebuffer instad of drm_framebuffer to
intel_fill_fb_info()
-:156: CHECK:LINE_SPACING: Please don't use multiple blank lines
#156: FILE: drivers/gpu/drm/i915/display/intel_fb.h:49:
+
total: 0 errors, 0 warnings, 1 checks, 129 lines checked
ee88b73d7f94 drm/i915/xelpd: add XE_LPD display characteristics
c9f4c699d4b4 drm/i915/adl_p: Add PCI Devices IDs
-:25: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in
parentheses
#25: FILE: include/drm/i915_pciids.h:649:
+#define INTEL_ADLP_IDS(info) \
+ INTEL_VGA_DEVICE(0x46A0, info), \
+ INTEL_VGA_DEVICE(0x46A1, info), \
+ INTEL_VGA_DEVICE(0x46A2, info), \
+ INTEL_VGA_DEVICE(0x46A3, info), \
+ INTEL_VGA_DEVICE(0x46A6, info), \
+ INTEL_VGA_DEVICE(0x46A8, info), \
+ INTEL_VGA_DEVICE(0x46AA, info), \
+ INTEL_VGA_DEVICE(0x462A, info), \
+ INTEL_VGA_DEVICE(0x4626, info), \
+ INTEL_VGA_DEVICE(0x4628, info), \
+ INTEL_VGA_DEVICE(0x46B0, info), \
+ INTEL_VGA_DEVICE(0x46B1, info), \
+ INTEL_VGA_DEVICE(0x46B2, info), \
+ INTEL_VGA_DEVICE(0x46B3, info), \
+ INTEL_VGA_DEVICE(0x46C0, info), \
+ INTEL_VGA_DEVICE(0x46C1, info), \
+ INTEL_VGA_DEVICE(0x46C2, info), \
+ INTEL_VGA_DEVICE(0x46C3, info)
-:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'info' - possible
side-effects?
#25: FILE: include/drm/i915_pciids.h:649:
+#define INTEL_ADLP_IDS(info) \
+ INTEL_VGA_DEVICE(0x46A0, info), \
+ INTEL_VGA_DEVICE(0x46A1, info), \
+ INTEL_VGA_DEVICE(0x46A2, info), \
+ INTEL_VGA_DEVICE(0x46A3, info), \
+ INTEL_VGA_DEVICE(0x46A6, info), \
+ INTEL_VGA_DEVICE(0x46A8, info), \
+ INTEL_VGA_DEVICE(0x46AA, info), \
+ INTEL_VGA_DEVICE(0x462A, info), \
+ INTEL_VGA_DEVICE(0x4626, info), \
+ INTEL_VGA_DEVICE(0x4628, info), \
+ INTEL_VGA_DEVICE(0x46B0, info), \
+ INTEL_VGA_DEVICE(0x46B1, info), \
+ INTEL_VGA_DEVICE(0x46B2, info), \
+ INTEL_VGA_DEVICE(0x46B3, info), \
+ INTEL_VGA_DEVICE(0x46C0, info), \
+ INTEL_VGA_DEVICE(0x46C1, info), \
+ INTEL_VGA_DEVICE(0x46C2, info), \
+ INTEL_VGA_DEVICE(0x46C3, info)
total: 1 errors, 0 warnings, 1 checks, 25 lines checked
9c24583b5bbd drm/i915/adl_p: ADL_P device info enabling
4a28c5ef22b0 drm/i915/xelpd: First stab at DPT support
-:583: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or
return
#583: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:945:
+ return offset >> 9;
+ } else {
total: 0 errors, 1 warnings, 0 checks, 586 lines checked
c4779e2af5ce drm/i915/xelpd: Fallback to plane stride limitations when using DPT
ae0259160293 drm/i915/xelpd: Support 128k plane stride
3ab439b2e61b drm/i915/adl_p: Add stride restriction when using DPT
dd8b2c31734c drm/i915/adl_p: Disable support for 90/270 FB rotation
a48fcda970df drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs
a992015218bc drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 03/30] drm/tegra: Don't register DP AUX channels before connectors
On Fri, Feb 19, 2021 at 04:52:59PM -0500, Lyude Paul wrote: > As pointed out by the documentation for drm_dp_aux_register(), > drm_dp_aux_init() should be used in situations where the AUX channel for a > display driver can potentially be registered before it's respective DRM > driver. This is the case with Tegra, since the DP aux channel exists as a > platform device instead of being a grandchild of the DRM device. > > Since we're about to add a backpointer to a DP AUX channel's respective DRM > device, let's fix this so that we don't potentially allow userspace to use > the AUX channel before we've associated it with it's DRM connector. > > Signed-off-by: Lyude Paul > --- > drivers/gpu/drm/tegra/dpaux.c | 11 ++- > 1 file changed, 6 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c > index 105fb9cdbb3b..ea56c6ec25e4 100644 > --- a/drivers/gpu/drm/tegra/dpaux.c > +++ b/drivers/gpu/drm/tegra/dpaux.c > @@ -534,9 +534,7 @@ static int tegra_dpaux_probe(struct platform_device *pdev) > dpaux->aux.transfer = tegra_dpaux_transfer; > dpaux->aux.dev = &pdev->dev; > > - err = drm_dp_aux_register(&dpaux->aux); > - if (err < 0) > - return err; > + drm_dp_aux_init(&dpaux->aux); I just noticed that this change causes an error on some setups that I haven't seen before. The problem is that the SOR driver tries to grab a reference to the I2C device to make sure it doesn't go away while it has a pointer to it. However, since now the I2C adapter hasn't been registered yet, I get this: [ 15.013969] kobject: '(null)' (5c903e43): is not initialized, yet kobject_get() is being called. I recall that you wanted to make this change so that a backpointer to the DRM device could be added (I think that's patch 15 of the series), but I didn't see that patch get merged, so it's a bit difficult to try and fix this up. Has the situation changed? Do we no longer need the backpointer? If we still want it, what's the plan for merging the change? Should I work under the assumption that patch will make it in sometime and try to fix this on top of that? I'm thinking that perhaps we can move the I2C adapter registration into drm_dp_aux_init() since that's independent of the DRM device. It would also make a bit more sense from the Tegra driver's point of view where all devices would be created during the ->probe() path, and only during the ->init() path would the connection between DRM device and DRM DP AUX device be established. Thierry signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix "mitigations" parsing if i915 is builtin (rev2)
== Series Details == Series: drm/i915: Fix "mitigations" parsing if i915 is builtin (rev2) URL : https://patchwork.freedesktop.org/series/88998/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9971_full -> Patchwork_19937_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_19937_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19937_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19937_full: ### IGT changes ### Possible regressions * igt@gem_eio@in-flight-contexts-10ms: - shard-snb: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-snb6/igt@gem_...@in-flight-contexts-10ms.html Known issues Here are the changes found in Patchwork_19937_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-snb: NOTRUN -> [DMESG-WARN][2] ([i915#3002]) +1 similar issue [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-snb2/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@engines-hostile-preempt: - shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-snb2/igt@gem_ctx_persiste...@engines-hostile-preempt.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][4] -> [TIMEOUT][5] ([i915#2369] / [i915#3063]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-tglb1/igt@gem_...@unwedge-stress.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-tglb5/igt@gem_...@unwedge-stress.html - shard-snb: NOTRUN -> [FAIL][6] ([i915#3354]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-snb2/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-apl: NOTRUN -> [FAIL][7] ([i915#2846]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-apl8/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-tglb6/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-glk9/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-glk6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_reloc@basic-wide-active@vcs1: - shard-iclb: NOTRUN -> [FAIL][12] ([i915#2389]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-iclb2/igt@gem_exec_reloc@basic-wide-act...@vcs1.html * igt@gem_exec_whisper@basic-queues-forked-all: - shard-glk: [PASS][13] -> [DMESG-WARN][14] ([i915#118] / [i915#95]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-glk9/igt@gem_exec_whis...@basic-queues-forked-all.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-glk6/igt@gem_exec_whis...@basic-queues-forked-all.html * igt@gem_mmap_gtt@big-copy-odd: - shard-glk: [PASS][15] -> [FAIL][16] ([i915#307]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-glk6/igt@gem_mmap_...@big-copy-odd.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-glk5/igt@gem_mmap_...@big-copy-odd.html * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy: - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#2428]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/shard-iclb6/igt@gem_mmap_...@cpuset-basic-small-copy-xy.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-iclb4/igt@gem_mmap_...@cpuset-basic-small-copy-xy.html * igt@gem_pread@exhaustion: - shard-snb: NOTRUN -> [WARN][19] ([i915#2658]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-snb2/igt@gem_pr...@exhaustion.html * igt@gem_pwrite@basic-exhaustion: - shard-apl: NOTRUN -> [WARN][20] ([i915#2658]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/shard-apl1/igt@gem_pwr...@basic-exhaustion.html * igt@gem_render_copy@yf-tiled-to-vebox-x-tiled: - shard-kbl: NOTRUN -> [SKIP][21] ([fdo#109271]) +73 similar issues [21]: ht
Re: [Intel-gfx] [PATCH 11/19] drm/i915: Update the helper to set correct mapping
On Wed, 14 Apr 2021 at 16:22, Tvrtko Ursulin
wrote:
>
>
> On 12/04/2021 10:05, Matthew Auld wrote:
> > From: Venkata Sandeep Dhanalakota
> >
> > Determine the possible coherent map type based on object location,
> > and if target has llc or if user requires an always coherent
> > mapping.
> >
> > Cc: Matthew Auld
> > Cc: CQ Tang
> > Suggested-by: Michal Wajdeczko
> > Signed-off-by: Venkata Sandeep Dhanalakota
> > ---
> > drivers/gpu/drm/i915/gt/intel_engine_cs.c| 3 ++-
> > drivers/gpu/drm/i915/gt/intel_engine_pm.c| 2 +-
> > drivers/gpu/drm/i915/gt/intel_lrc.c | 4 +++-
> > drivers/gpu/drm/i915/gt/intel_ring.c | 9 ++---
> > drivers/gpu/drm/i915/gt/selftest_context.c | 3 ++-
> > drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
> > drivers/gpu/drm/i915/gt/selftest_lrc.c | 4 +++-
> > drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 +++-
> > drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 +++-
> > drivers/gpu/drm/i915/i915_drv.h | 11 +--
> > drivers/gpu/drm/i915/selftests/igt_spinner.c | 4 ++--
> > 11 files changed, 36 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > index efe935f80c1a..b79568d370f5 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> > @@ -664,7 +664,8 @@ static int init_status_page(struct intel_engine_cs
> > *engine)
> > if (ret)
> > goto err;
> >
> > - vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
> > + vaddr = i915_gem_object_pin_map(obj,
> > + i915_coherent_map_type(engine->i915,
> > obj, true));
> > if (IS_ERR(vaddr)) {
> > ret = PTR_ERR(vaddr);
> > goto err_unpin;
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > index 7c9af86fdb1e..47f4397095e5 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > @@ -23,7 +23,7 @@ static void dbg_poison_ce(struct intel_context *ce)
> >
> > if (ce->state) {
> > struct drm_i915_gem_object *obj = ce->state->obj;
> > - int type = i915_coherent_map_type(ce->engine->i915);
> > + int type = i915_coherent_map_type(ce->engine->i915, obj,
> > true);
> > void *map;
> >
> > if (!i915_gem_object_trylock(obj))
> > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
> > b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > index e86897cde984..aafe2a4df496 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > @@ -903,7 +903,9 @@ lrc_pre_pin(struct intel_context *ce,
> > GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
> >
> > *vaddr = i915_gem_object_pin_map(ce->state->obj,
> > -
> > i915_coherent_map_type(ce->engine->i915) |
> > +
> > i915_coherent_map_type(ce->engine->i915,
> > +
> > ce->state->obj,
> > + false) |
> >I915_MAP_OVERRIDE);
> >
> > return PTR_ERR_OR_ZERO(*vaddr);
> > diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c
> > b/drivers/gpu/drm/i915/gt/intel_ring.c
> > index aee0a77c77e0..3cf6c7e68108 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> > @@ -53,9 +53,12 @@ int intel_ring_pin(struct intel_ring *ring, struct
> > i915_gem_ww_ctx *ww)
> >
> > if (i915_vma_is_map_and_fenceable(vma))
> > addr = (void __force *)i915_vma_pin_iomap(vma);
> > - else
> > - addr = i915_gem_object_pin_map(vma->obj,
> > -
> > i915_coherent_map_type(vma->vm->i915));
> > + else {
> > + int type = i915_coherent_map_type(vma->vm->i915, vma->obj,
> > false);
> > +
> > + addr = i915_gem_object_pin_map(vma->obj, type);
> > + }
> > +
> > if (IS_ERR(addr)) {
> > ret = PTR_ERR(addr);
> > goto err_ring;
> > diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c
> > b/drivers/gpu/drm/i915/gt/selftest_context.c
> > index b9bdd1d23243..26685b927169 100644
> > --- a/drivers/gpu/drm/i915/gt/selftest_context.c
> > +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
> > @@ -88,7 +88,8 @@ static int __live_context_size(struct intel_engine_cs
> > *engine)
> > goto err;
> >
> > vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
> > -
> > i915_coherent_map_type(engine->i915));
> > +
> > i915_coherent_map_type(engine->i915,
> > +
[Intel-gfx] [PATCH 10/11] drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs
The specification only requires DPT FB strides to be POT aligned, but
there seems to be also a minimum of 8 stride tile requirement. Scanning
out FBs with < 8 stride tiles will result in pipe faults (even though
the stride is POT aligned).
Signed-off-by: Imre Deak
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fb.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i915/display/intel_fb.c
index bd862f77762a2..2ee10ece27c57 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -609,7 +609,11 @@ plane_view_dst_stride_tiles(const struct intel_framebuffer
*fb, int color_plane,
unsigned int pitch_tiles)
{
if (intel_fb_needs_pot_stride_remap(fb))
- return roundup_pow_of_two(pitch_tiles);
+ /*
+* ADL_P, the only platform needing a POT stride has a minimum
+* of 8 stride tiles.
+*/
+ return roundup_pow_of_two(max(pitch_tiles, 8u));
else
return pitch_tiles;
}
--
2.27.0
___
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[Intel-gfx] [PATCH 11/11] drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT
Enable padding of DPT FB strides to POT, using the FB remapping logic.
Signed-off-by: Imre Deak
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 16
drivers/gpu/drm/i915/display/intel_fb.c | 7 +--
drivers/gpu/drm/i915/display/intel_fb.h | 1 +
3 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 2eba13898fbea..bb5cb3f37c408 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -227,16 +227,22 @@ static void dpt_cleanup(struct i915_address_space *vm)
}
static struct i915_address_space *
-intel_dpt_create(struct drm_gem_object *obj)
+intel_dpt_create(struct intel_framebuffer *fb)
{
+ struct drm_gem_object *obj = &intel_fb_obj(&fb->base)->base;
struct drm_i915_private *i915 = to_i915(obj->dev);
- size_t size = DIV_ROUND_UP_ULL(obj->size, 512);
struct drm_i915_gem_object *dpt_obj;
struct i915_address_space *vm;
struct i915_dpt *dpt;
+ size_t size;
int ret;
- size = round_up(size, 4096);
+ if (intel_fb_needs_pot_stride_remap(fb))
+ size =
intel_remapped_info_size(&fb->remapped_view.gtt.remapped);
+ else
+ size = DIV_ROUND_UP_ULL(obj->size, I915_GTT_PAGE_SIZE);
+
+ size = round_up(size * sizeof(gen8_pte_t), I915_GTT_PAGE_SIZE);
dpt_obj = i915_gem_object_create_stolen(i915, size);
if (IS_ERR(dpt_obj))
@@ -11558,8 +11564,10 @@ static int intel_framebuffer_init(struct
intel_framebuffer *intel_fb,
}
}
+ /* TODO: Add POT stride remapping support for CCS formats as
well. */
if (IS_ALDERLAKE_P(dev_priv) &&
mode_cmd->modifier[i] != DRM_FORMAT_MOD_LINEAR &&
+ !intel_fb_needs_pot_stride_remap(intel_fb) &&
!is_power_of_2(mode_cmd->pitches[i])) {
drm_dbg_kms(&dev_priv->drm,
"plane %d pitch (%d) must be power of two
for tiled buffers\n",
@@ -11577,7 +11585,7 @@ static int intel_framebuffer_init(struct
intel_framebuffer *intel_fb,
if (intel_fb_uses_dpt(fb)) {
struct i915_address_space *vm;
- vm = intel_dpt_create(&obj->base);
+ vm = intel_dpt_create(intel_fb);
if (IS_ERR(vm)) {
ret = PTR_ERR(vm);
goto err;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i915/display/intel_fb.c
index 2ee10ece27c57..ebfee5e7cbc8b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -486,9 +486,12 @@ static bool intel_plane_can_remap(const struct
intel_plane_state *plane_state)
return true;
}
-static bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
+bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
{
- return false;
+ struct drm_i915_private *i915 = to_i915(fb->base.dev);
+
+ return IS_ALDERLAKE_P(i915) && fb->base.modifier !=
DRM_FORMAT_MOD_LINEAR &&
+ !is_ccs_modifier(fb->base.modifier);
}
static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane,
unsigned int rotation)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h
b/drivers/gpu/drm/i915/display/intel_fb.h
index 47716487de19c..f1c9754001e52 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -46,6 +46,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
const struct intel_plane_state *state,
int color_plane);
+bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb);
bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb);
int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer
*fb);
--
2.27.0
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[Intel-gfx] [PATCH 08/11] drm/i915/adl_p: Add stride restriction when using DPT
From: José Roberto de Souza
Alderlake-P have a new stride restriction when using DPT and it is used
by non linear framebuffers. Stride needs to be a power of two to take
full DPT rows, but stride is a parameter set by userspace.
What we could do is use a fake stride when doing DPT allocation so
HW requirements are met and userspace don't need to be changed to
met this power of two restrictions but this change will take a while
to be implemented so for now adding this restriction in driver to
reject atomic commits that would cause visual corruptions.
BSpec: 53393
Acked-by: Matt Roper
Cc: Matt Roper
Cc: Ville Syrjälä
Cc: Stanislav Lisovskiy
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index ce685a7ba6a1d..2eba13898fbea 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11558,6 +11558,15 @@ static int intel_framebuffer_init(struct
intel_framebuffer *intel_fb,
}
}
+ if (IS_ALDERLAKE_P(dev_priv) &&
+ mode_cmd->modifier[i] != DRM_FORMAT_MOD_LINEAR &&
+ !is_power_of_2(mode_cmd->pitches[i])) {
+ drm_dbg_kms(&dev_priv->drm,
+ "plane %d pitch (%d) must be power of two
for tiled buffers\n",
+ i, mode_cmd->pitches[i]);
+ goto err;
+ }
+
fb->obj[i] = &obj->base;
}
--
2.27.0
___
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[Intel-gfx] [PATCH 07/11] drm/i915/xelpd: Support 128k plane stride
From: Juha-Pekka Heikkilä
XE_LPD supports plane strides up to 128KB.
Cc: Vandita Kulkarni
Signed-off-by: Juha-Pekka Heikkilä
Signed-off-by: Matt Roper
Reviewed-by: Lucas De Marchi
---
.../drm/i915/display/skl_universal_plane.c| 46 +++
drivers/gpu/drm/i915/i915_reg.h | 2 +
2 files changed, 39 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 349a53cef0a94..c5b9669d2aacf 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -481,17 +481,35 @@ skl_plane_max_stride(struct intel_plane *plane,
u32 pixel_format, u64 modifier,
unsigned int rotation)
{
+ struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_format_info *info = drm_format_info(pixel_format);
int cpp = info->cpp[0];
+ int max_horizontal_pixels = 8192;
+ int max_stride_bytes;
+
+ if (DISPLAY_VER(i915) >= 13) {
+ /*
+* The stride in bytes must not exceed of the size
+* of 128K bytes. For pixel formats of 64bpp will allow
+* for a 16K pixel surface.
+*/
+ max_stride_bytes = 131072;
+ if (cpp == 8)
+ max_horizontal_pixels = 16384;
+ else
+ max_horizontal_pixels = 65536;
+ } else {
+ /*
+* "The stride in bytes must not exceed the
+* of the size of 8K pixels and 32K bytes."
+*/
+ max_stride_bytes = 32768;
+ }
- /*
-* "The stride in bytes must not exceed the
-* of the size of 8K pixels and 32K bytes."
-*/
if (drm_rotation_90_or_270(rotation))
- return min(8192, 32768 / cpp);
+ return min(max_horizontal_pixels, max_stride_bytes / cpp);
else
- return min(8192 * cpp, 32768);
+ return min(max_horizontal_pixels * cpp, max_stride_bytes);
}
@@ -1451,7 +1469,10 @@ static int skl_check_main_surface(struct
intel_plane_state *plane_state)
}
}
- drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
+ if (DISPLAY_VER(dev_priv) >= 13)
+ drm_WARN_ON(&dev_priv->drm, x > 65535 || y > 65535);
+ else
+ drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
plane_state->view.color_plane[0].offset = offset;
plane_state->view.color_plane[0].x = x;
@@ -1525,7 +1546,10 @@ static int skl_check_nv12_aux_surface(struct
intel_plane_state *plane_state)
}
}
- drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
+ if (DISPLAY_VER(i915) >= 13)
+ drm_WARN_ON(&i915->drm, x > 65535 || y > 65535);
+ else
+ drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
plane_state->view.color_plane[uv_plane].offset = offset;
plane_state->view.color_plane[uv_plane].x = x;
@@ -2238,7 +2262,11 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
- fb->pitches[0] = (val & 0x3ff) * stride_mult;
+
+ if (DISPLAY_VER(dev_priv) >= 13)
+ fb->pitches[0] = (val & PLANE_STRIDE_MASK_XELPD) * stride_mult;
+ else
+ fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
aligned_height = intel_fb_align_height(fb, 0, fb->height);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f80d656331f42..cdcb60b3fa063 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7210,6 +7210,8 @@ enum {
_PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
#define PLANE_STRIDE(pipe, plane) \
_MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
+#define PLANE_STRIDE_MASK REG_GENMASK(10, 0)
+#define PLANE_STRIDE_MASK_XELPDREG_GENMASK(11, 0)
#define _PLANE_POS_1_B 0x7118c
#define _PLANE_POS_2_B 0x7128c
--
2.27.0
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[Intel-gfx] [PATCH 09/11] drm/i915/adl_p: Disable support for 90/270 FB rotation
The latest specification removed the support for 90/270 FB rotation on
ADL_P, even though legacy Y-tiled surfaces are supported. Align the code
accordingly.
Signed-off-by: Imre Deak
Reviewed-by: Ville Syrjälä
---
.../drm/i915/display/intel_display_types.h| 6 +++--
drivers/gpu/drm/i915/display/intel_fb.c | 24 +++
drivers/gpu/drm/i915/display/intel_fb.h | 1 +
.../drm/i915/display/skl_universal_plane.c| 3 +--
4 files changed, 25 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index cdc8fcb8c2aa7..a4c898dd71abb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -127,8 +127,10 @@ struct intel_framebuffer {
/* Params to remap the FB pages and program the plane registers in each
view. */
struct intel_fb_view normal_view;
- struct intel_fb_view rotated_view;
- struct intel_fb_view remapped_view;
+ union {
+ struct intel_fb_view rotated_view;
+ struct intel_fb_view remapped_view;
+ };
struct i915_address_space *dpt_vm;
};
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i915/display/intel_fb.c
index 1b690b21310de..bd862f77762a2 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -743,6 +743,15 @@ static void intel_fb_view_init(struct intel_fb_view *view,
enum i915_ggtt_view_t
view->gtt.type = view_type;
}
+bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb)
+{
+ if (DISPLAY_VER(to_i915(fb->base.dev)) >= 13)
+ return false;
+
+ return fb->base.modifier == I915_FORMAT_MOD_Y_TILED ||
+ fb->base.modifier == I915_FORMAT_MOD_Yf_TILED;
+}
+
int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer
*fb)
{
struct drm_i915_gem_object *obj = intel_fb_obj(&fb->base);
@@ -753,8 +762,15 @@ int intel_fill_fb_info(struct drm_i915_private *i915,
struct intel_framebuffer *
unsigned int tile_size = intel_tile_size(i915);
intel_fb_view_init(&fb->normal_view, I915_GGTT_VIEW_NORMAL);
- intel_fb_view_init(&fb->rotated_view, I915_GGTT_VIEW_ROTATED);
- intel_fb_view_init(&fb->remapped_view, I915_GGTT_VIEW_REMAPPED);
+
+ drm_WARN_ON(&i915->drm,
+ intel_fb_supports_90_270_rotation(fb) &&
+ intel_fb_needs_pot_stride_remap(fb));
+
+ if (intel_fb_supports_90_270_rotation(fb))
+ intel_fb_view_init(&fb->rotated_view, I915_GGTT_VIEW_ROTATED);
+ if (intel_fb_needs_pot_stride_remap(fb))
+ intel_fb_view_init(&fb->remapped_view, I915_GGTT_VIEW_REMAPPED);
for (i = 0; i < num_planes; i++) {
struct fb_plane_view_dims view_dims;
@@ -795,9 +811,7 @@ int intel_fill_fb_info(struct drm_i915_private *i915,
struct intel_framebuffer *
offset = calc_plane_aligned_offset(fb, i, &x, &y);
- /* Y or Yf modifiers required for 90/270 rotation */
- if (fb->base.modifier == I915_FORMAT_MOD_Y_TILED ||
- fb->base.modifier == I915_FORMAT_MOD_Yf_TILED)
+ if (intel_fb_supports_90_270_rotation(fb))
gtt_offset_rotated += calc_plane_remap_info(fb, i,
&view_dims,
offset,
gtt_offset_rotated, x, y,
&fb->rotated_view);
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h
b/drivers/gpu/drm/i915/display/intel_fb.h
index e0953d8855b6b..47716487de19c 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -46,6 +46,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
const struct intel_plane_state *state,
int color_plane);
+bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb);
int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer
*fb);
void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int
rotation,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index c5b9669d2aacf..c06a3d4a9429d 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1160,8 +1160,7 @@ static int skl_plane_check_fb(const struct
intel_crtc_state *crtc_state,
}
if (drm_rotation_90_or_270(rotation)) {
- if (fb->modifier != I915_FORMAT_MOD_Y_TILED &&
- fb->modifier != I915_FORMAT_MOD_Yf_TILED) {
+ if
(!intel_fb_supports_90_270_rotation(to_intel_framebuffer(fb))) {
[Intel-gfx] [PATCH 06/11] drm/i915/xelpd: Fallback to plane stride limitations when using DPT
From: José Roberto de Souza
GTT remapping allow us to have planes with strides larger than HW
supports but DPT + GTT remapping is still not properly handled so
falling back to plane HW limitations for now.
This patch can be dropped when DPT + GTT remapping is correctly
handled but until then we need this limitation for all display13
platforms to avoid pipe faults.
Reviewed-by: Matt Roper
Cc: Ville Syrjälä
Cc: Clint Taylor
Cc: Matt Roper
Suggested-by: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 15 +++
.../gpu/drm/i915/display/intel_display_types.h| 8 ++--
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 00621ccea2c40..ce685a7ba6a1d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1588,14 +1588,13 @@ u32 intel_fb_max_stride(struct drm_i915_private
*dev_priv,
*
* The new CCS hash mode makes remapping impossible
*/
- if (!is_ccs_modifier(modifier)) {
- if (DISPLAY_VER(dev_priv) >= 7)
- return 256*1024;
- else if (DISPLAY_VER(dev_priv) >= 4)
- return 128*1024;
- }
-
- return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier);
+ if (DISPLAY_VER(dev_priv) < 4 || is_ccs_modifier(modifier) ||
+ intel_modifier_uses_dpt(dev_priv, modifier))
+ return intel_plane_fb_max_stride(dev_priv, pixel_format,
modifier);
+ else if (DISPLAY_VER(dev_priv) >= 7)
+ return 256 * 1024;
+ else
+ return 128 * 1024;
}
static u32
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 3c73737f88da4..cdc8fcb8c2aa7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1976,10 +1976,14 @@ intel_wait_for_vblank_if_active(struct drm_i915_private
*dev_priv, enum pipe pip
intel_wait_for_vblank(dev_priv, pipe);
}
+static inline bool intel_modifier_uses_dpt(struct drm_i915_private *i915, u64
modifier)
+{
+ return DISPLAY_VER(i915) >= 13 && modifier != DRM_FORMAT_MOD_LINEAR;
+}
+
static inline bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
{
- return fb && DISPLAY_VER(to_i915(fb->dev)) >= 13 &&
- fb->modifier != DRM_FORMAT_MOD_LINEAR;
+ return fb && intel_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);
}
static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state
*plane_state)
--
2.27.0
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[Intel-gfx] [PATCH 03/11] drm/i915/adl_p: Add PCI Devices IDs
From: Clinton Taylor Add 18 known PCI device IDs Bspec: 55376 Cc: Caz Yokoyama Cc: Matt Atwood Cc: Matt Roper Signed-off-by: Clinton Taylor Signed-off-by: Matt Roper Reviewed-by: Anusha Srivatsa --- include/drm/i915_pciids.h | 21 + 1 file changed, 21 insertions(+) diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index ebd0dd1c35b33..2448be8c72f89 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -645,4 +645,25 @@ INTEL_VGA_DEVICE(0x4692, info), \ INTEL_VGA_DEVICE(0x4693, info) +/* ADL-P */ +#define INTEL_ADLP_IDS(info) \ + INTEL_VGA_DEVICE(0x46A0, info), \ + INTEL_VGA_DEVICE(0x46A1, info), \ + INTEL_VGA_DEVICE(0x46A2, info), \ + INTEL_VGA_DEVICE(0x46A3, info), \ + INTEL_VGA_DEVICE(0x46A6, info), \ + INTEL_VGA_DEVICE(0x46A8, info), \ + INTEL_VGA_DEVICE(0x46AA, info), \ + INTEL_VGA_DEVICE(0x462A, info), \ + INTEL_VGA_DEVICE(0x4626, info), \ + INTEL_VGA_DEVICE(0x4628, info), \ + INTEL_VGA_DEVICE(0x46B0, info), \ + INTEL_VGA_DEVICE(0x46B1, info), \ + INTEL_VGA_DEVICE(0x46B2, info), \ + INTEL_VGA_DEVICE(0x46B3, info), \ + INTEL_VGA_DEVICE(0x46C0, info), \ + INTEL_VGA_DEVICE(0x46C1, info), \ + INTEL_VGA_DEVICE(0x46C2, info), \ + INTEL_VGA_DEVICE(0x46C3, info) + #endif /* _I915_PCIIDS_H */ -- 2.27.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 00/11] drm/i915/adl_p: Add support for Display Page Tables
Alder Lake-P adds a new Display Page Table hardware structure, mapping tiled framebuffer pages to the display engine, reducing the address space required in GGTT for these framebuffers. This patchset adds support for this taking a minimum set of dependency patches from the ADL_P enabling patchset at https://patchwork.freedesktop.org/series/87897/ Clinton Taylor (2): drm/i915/adl_p: Add PCI Devices IDs drm/i915/adl_p: ADL_P device info enabling Imre Deak (4): drm/i915: Pass intel_framebuffer instad of drm_framebuffer to intel_fill_fb_info() drm/i915/adl_p: Disable support for 90/270 FB rotation drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT José Roberto de Souza (2): drm/i915/xelpd: Fallback to plane stride limitations when using DPT drm/i915/adl_p: Add stride restriction when using DPT Juha-Pekka Heikkilä (1): drm/i915/xelpd: Support 128k plane stride Matt Roper (1): drm/i915/xelpd: add XE_LPD display characteristics Ville Syrjälä (1): drm/i915/xelpd: First stab at DPT support arch/x86/kernel/early-quirks.c| 1 + .../gpu/drm/i915/display/intel_atomic_plane.c | 7 +- drivers/gpu/drm/i915/display/intel_display.c | 381 -- drivers/gpu/drm/i915/display/intel_display.h | 1 + .../drm/i915/display/intel_display_types.h| 25 +- drivers/gpu/drm/i915/display/intel_fb.c | 92 +++-- drivers/gpu/drm/i915/display/intel_fb.h | 5 +- drivers/gpu/drm/i915/display/intel_fbc.c | 6 +- .../drm/i915/display/skl_universal_plane.c| 68 +++- drivers/gpu/drm/i915/gt/gen8_ppgtt.h | 7 + drivers/gpu/drm/i915/gt/intel_ggtt.c | 7 +- drivers/gpu/drm/i915/gt/intel_gtt.h | 5 + drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_pci.c | 22 + drivers/gpu/drm/i915/i915_reg.h | 2 + drivers/gpu/drm/i915/intel_device_info.c | 1 + drivers/gpu/drm/i915/intel_device_info.h | 1 + include/drm/i915_pciids.h | 21 + 18 files changed, 567 insertions(+), 86 deletions(-) -- 2.27.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 01/11] drm/i915: Pass intel_framebuffer instad of drm_framebuffer to intel_fill_fb_info()
Make one step to pass intel_framebuffer to all intel_fb functions.
Signed-off-by: Imre Deak
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_fb.c | 63 ++--
drivers/gpu/drm/i915/display/intel_fb.h | 3 +-
3 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 9c13d0ac022bc..dd92c97eb8ca0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11255,7 +11255,7 @@ static int intel_framebuffer_init(struct
intel_framebuffer *intel_fb,
fb->obj[i] = &obj->base;
}
- ret = intel_fill_fb_info(dev_priv, fb);
+ ret = intel_fill_fb_info(dev_priv, intel_fb);
if (ret)
goto err;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i915/display/intel_fb.c
index 0ec9ad7220a14..1b690b21310de 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -171,17 +171,17 @@ void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
*vsub = 32;
}
-static void intel_fb_plane_dims(int *w, int *h, struct drm_framebuffer *fb,
int color_plane)
+static void intel_fb_plane_dims(const struct intel_framebuffer *fb, int
color_plane, int *w, int *h)
{
- int main_plane = is_ccs_plane(fb, color_plane) ?
-skl_ccs_to_main_plane(fb, color_plane) : 0;
+ int main_plane = is_ccs_plane(&fb->base, color_plane) ?
+skl_ccs_to_main_plane(&fb->base, color_plane) : 0;
int main_hsub, main_vsub;
int hsub, vsub;
- intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, fb, main_plane);
- intel_fb_plane_get_subsampling(&hsub, &vsub, fb, color_plane);
- *w = fb->width / main_hsub / hsub;
- *h = fb->height / main_vsub / vsub;
+ intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, &fb->base,
main_plane);
+ intel_fb_plane_get_subsampling(&hsub, &vsub, &fb->base, color_plane);
+ *w = fb->base.width / main_hsub / hsub;
+ *h = fb->base.height / main_vsub / vsub;
}
static u32 intel_adjust_tile_offset(int *x, int *y,
@@ -743,19 +743,18 @@ static void intel_fb_view_init(struct intel_fb_view
*view, enum i915_ggtt_view_t
view->gtt.type = view_type;
}
-int intel_fill_fb_info(struct drm_i915_private *i915, struct drm_framebuffer
*fb)
+int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer
*fb)
{
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+ struct drm_i915_gem_object *obj = intel_fb_obj(&fb->base);
u32 gtt_offset_rotated = 0;
u32 gtt_offset_remapped = 0;
unsigned int max_size = 0;
- int i, num_planes = fb->format->num_planes;
+ int i, num_planes = fb->base.format->num_planes;
unsigned int tile_size = intel_tile_size(i915);
- intel_fb_view_init(&intel_fb->normal_view, I915_GGTT_VIEW_NORMAL);
- intel_fb_view_init(&intel_fb->rotated_view, I915_GGTT_VIEW_ROTATED);
- intel_fb_view_init(&intel_fb->remapped_view, I915_GGTT_VIEW_REMAPPED);
+ intel_fb_view_init(&fb->normal_view, I915_GGTT_VIEW_NORMAL);
+ intel_fb_view_init(&fb->rotated_view, I915_GGTT_VIEW_ROTATED);
+ intel_fb_view_init(&fb->remapped_view, I915_GGTT_VIEW_REMAPPED);
for (i = 0; i < num_planes; i++) {
struct fb_plane_view_dims view_dims;
@@ -770,45 +769,45 @@ int intel_fill_fb_info(struct drm_i915_private *i915,
struct drm_framebuffer *fb
* is consumed by the driver and not passed to DE. Skip the
* arithmetic related to alignment and offset calculation.
*/
- if (is_gen12_ccs_cc_plane(fb, i)) {
- if (IS_ALIGNED(fb->offsets[i], PAGE_SIZE))
+ if (is_gen12_ccs_cc_plane(&fb->base, i)) {
+ if (IS_ALIGNED(fb->base.offsets[i], PAGE_SIZE))
continue;
else
return -EINVAL;
}
- cpp = fb->format->cpp[i];
- intel_fb_plane_dims(&width, &height, fb, i);
+ cpp = fb->base.format->cpp[i];
+ intel_fb_plane_dims(fb, i, &width, &height);
- ret = convert_plane_offset_to_xy(intel_fb, i, width, &x, &y);
+ ret = convert_plane_offset_to_xy(fb, i, width, &x, &y);
if (ret)
return ret;
- init_plane_view_dims(intel_fb, i, width, height, &view_dims);
+ init_plane_view_dims(fb, i, width, height, &view_dims);
/*
* First pixel of the framebuffer from
* the st
[Intel-gfx] [PATCH 05/11] drm/i915/xelpd: First stab at DPT support
From: Ville Syrjälä
Add support for DPT (display page table). DPT is a
slightly peculiar two level page table scheme used for
tiled scanout buffers (linear uses direct ggtt mapping
still). The plane surface address will point at a page
in the DPT which holds the PTEs for 512 actual pages.
Thus we require 1/512 of the ggttt address space
compared to a direct ggtt mapping.
We create a new DPT address space for each framebuffer and
track two vmas (one for the DPT, another for the ggtt).
TODO:
- Is the i915_address_space approaach sane?
- Maybe don't map the whole DPT to write the PTEs?
- Deal with remapping/rotation? Need to create a
separate DPT for each remapped/rotated plane I
guess. Or else we'd need to make the per-fb DPT
large enough to support potentially several
remapped/rotated vmas. How large should that be?
Reviewed-by: Uma Shankar
Signed-off-by: Ville Syrjälä
Signed-off-by: Bommu Krishnaiah
Cc: Wilson Chris P
Cc: Tang CQ
Cc: Auld Matthew
Reviewed-by: Wilson Chris P
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 7 +-
drivers/gpu/drm/i915/display/intel_display.c | 347 +-
drivers/gpu/drm/i915/display/intel_display.h | 1 +
.../drm/i915/display/intel_display_types.h| 15 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 6 +-
.../drm/i915/display/skl_universal_plane.c| 19 +-
drivers/gpu/drm/i915/gt/gen8_ppgtt.h | 7 +
drivers/gpu/drm/i915/gt/intel_ggtt.c | 7 +-
drivers/gpu/drm/i915/gt/intel_gtt.h | 5 +
9 files changed, 387 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index c3f2962aa1ebc..fc68c6ffd9d73 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -102,7 +102,8 @@ intel_plane_duplicate_state(struct drm_plane *plane)
__drm_atomic_helper_plane_duplicate_state(plane, &intel_state->uapi);
- intel_state->vma = NULL;
+ intel_state->ggtt_vma = NULL;
+ intel_state->dpt_vma = NULL;
intel_state->flags = 0;
/* add reference to fb */
@@ -125,7 +126,9 @@ intel_plane_destroy_state(struct drm_plane *plane,
struct drm_plane_state *state)
{
struct intel_plane_state *plane_state = to_intel_plane_state(state);
- drm_WARN_ON(plane->dev, plane_state->vma);
+
+ drm_WARN_ON(plane->dev, plane_state->ggtt_vma);
+ drm_WARN_ON(plane->dev, plane_state->dpt_vma);
__drm_atomic_helper_plane_destroy_state(&plane_state->uapi);
if (plane_state->hw.fb)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index dd92c97eb8ca0..00621ccea2c40 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -66,6 +66,7 @@
#include "gem/i915_gem_object.h"
#include "gt/intel_rps.h"
+#include "gt/gen8_ppgtt.h"
#include "g4x_dp.h"
#include "g4x_hdmi.h"
@@ -122,6 +123,171 @@ static void ilk_pfit_enable(const struct intel_crtc_state
*crtc_state);
static void intel_modeset_setup_hw_state(struct drm_device *dev,
struct drm_modeset_acquire_ctx *ctx);
+struct i915_dpt {
+ struct i915_address_space vm;
+
+ struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
+ void __iomem *iomem;
+};
+
+#define i915_is_dpt(vm) ((vm)->is_dpt)
+
+static inline struct i915_dpt *
+i915_vm_to_dpt(struct i915_address_space *vm)
+{
+ BUILD_BUG_ON(offsetof(struct i915_dpt, vm));
+ GEM_BUG_ON(!i915_is_dpt(vm));
+ return container_of(vm, struct i915_dpt, vm);
+}
+
+#define dpt_total_entries(dpt) ((dpt)->vm.total >> PAGE_SHIFT)
+
+static void gen8_set_pte(void __iomem *addr, gen8_pte_t pte)
+{
+ writeq(pte, addr);
+}
+
+static void dpt_insert_page(struct i915_address_space *vm,
+ dma_addr_t addr,
+ u64 offset,
+ enum i915_cache_level level,
+ u32 flags)
+{
+ struct i915_dpt *dpt = i915_vm_to_dpt(vm);
+ gen8_pte_t __iomem *base = dpt->iomem;
+
+ gen8_set_pte(base + offset / I915_GTT_PAGE_SIZE,
+vm->pte_encode(addr, level, flags));
+}
+
+static void dpt_insert_entries(struct i915_address_space *vm,
+ struct i915_vma *vma,
+ enum i915_cache_level level,
+ u32 flags)
+{
+ struct i915_dpt *dpt = i915_vm_to_dpt(vm);
+ gen8_pte_t __iomem *base = dpt->iomem;
+ const gen8_pte_t pte_encode = vm->pte_encode(0, level, flags);
+ struct sgt_iter sgt_iter;
+ dma_addr_t addr;
+ int i;
+
+ /*
+* Note that we ignore PTE_READ_ONLY here. The caller must be careful
+* not to allow the user to override access to a read only pag
[Intel-gfx] [PATCH 02/11] drm/i915/xelpd: add XE_LPD display characteristics
From: Matt Roper
Let's start preparing for upcoming platforms that will use an XE_LPD
design.
v2:
- Use the now-preferred "XE_LPD" term to refer to this design
- Utilize DISPLAY_VER() rather than a feature flag
- Drop unused mbus_size field (Lucas)
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_pci.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 44e7b94db63dc..40b58a6dc3193 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -939,6 +939,16 @@ static const struct intel_device_info adl_s_info = {
.dma_mask_size = 46,
};
+#define XE_LPD_FEATURES \
+ .display.ver = 13, \
+ .display.has_psr_hw_tracking = 0, \
+ .abox_mask = GENMASK(1, 0), \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_D), \
+ .ddb_size = 4096, \
+ .num_supported_dbuf_slices = 4
+
#undef GEN
#undef PLATFORM
--
2.27.0
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[Intel-gfx] [PATCH 04/11] drm/i915/adl_p: ADL_P device info enabling
From: Clinton Taylor
Add ADL-P to the device_info table and support MACROS.
Bspec: 49185, 55372, 55373
Cc: Matt Atwood
Cc: Matt Roper
Signed-off-by: Clinton Taylor
Signed-off-by: Matt Roper
---
arch/x86/kernel/early-quirks.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_pci.c | 12
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
5 files changed, 16 insertions(+)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 6edd1e2ee8afa..b553ffe9b9851 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -552,6 +552,7 @@ static const struct pci_device_id intel_early_ids[]
__initconst = {
INTEL_TGL_12_IDS(&gen11_early_ops),
INTEL_RKL_IDS(&gen11_early_ops),
INTEL_ADLS_IDS(&gen11_early_ops),
+ INTEL_ADLP_IDS(&gen11_early_ops),
};
struct resource intel_graphics_stolen_res __ro_after_init = DEFINE_RES_MEM(0,
0);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e20294e9227a4..e5513e19beb5c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1392,6 +1392,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_ROCKETLAKE(dev_priv)IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE)
#define IS_DG1(dev_priv)IS_PLATFORM(dev_priv, INTEL_DG1)
#define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S)
+#define IS_ALDERLAKE_P(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_P)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 40b58a6dc3193..2384198e41f85 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -949,6 +949,17 @@ static const struct intel_device_info adl_s_info = {
.ddb_size = 4096, \
.num_supported_dbuf_slices = 4
+static const struct intel_device_info adl_p_info = {
+ GEN12_FEATURES,
+ XE_LPD_FEATURES,
+ PLATFORM(INTEL_ALDERLAKE_P),
+ .require_force_probe = 1,
+ .platform_engine_mask =
+ BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
+ .ppgtt_size = 48,
+ .dma_mask_size = 39,
+};
+
#undef GEN
#undef PLATFORM
@@ -1026,6 +1037,7 @@ static const struct pci_device_id pciidlist[] = {
INTEL_TGL_12_IDS(&tgl_info),
INTEL_RKL_IDS(&rkl_info),
INTEL_ADLS_IDS(&adl_s_info),
+ INTEL_ADLP_IDS(&adl_p_info),
{0, 0, 0}
};
MODULE_DEVICE_TABLE(pci, pciidlist);
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index 6a351a7094174..3b975ce1ff591 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -67,6 +67,7 @@ static const char * const platform_names[] = {
PLATFORM_NAME(ROCKETLAKE),
PLATFORM_NAME(DG1),
PLATFORM_NAME(ALDERLAKE_S),
+ PLATFORM_NAME(ALDERLAKE_P),
};
#undef PLATFORM_NAME
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 8ab4fa6c7fdd7..edf68244be2bc 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -87,6 +87,7 @@ enum intel_platform {
INTEL_ROCKETLAKE,
INTEL_DG1,
INTEL_ALDERLAKE_S,
+ INTEL_ALDERLAKE_P,
INTEL_MAX_PLATFORMS
};
--
2.27.0
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Re: [Intel-gfx] [PATCH 19/19] drm/i915/gtt/dgfx: place the PD in LMEM
On 12/04/2021 10:05, Matthew Auld wrote:
It's a requirement that for dgfx we place all the paging structures in
device local-memory.
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 5 -
drivers/gpu/drm/i915/gt/intel_gtt.c | 27 +--
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
3 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index f83496836f0f..11fb5df45a0f 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -712,7 +712,10 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt)
*/
ppgtt->vm.has_read_only = !IS_GEN_RANGE(gt->i915, 11, 12);
- ppgtt->vm.alloc_pt_dma = alloc_pt_dma;
+ if (HAS_LMEM(gt->i915))
+ ppgtt->vm.alloc_pt_dma = alloc_pt_lmem;
+ else
+ ppgtt->vm.alloc_pt_dma = alloc_pt_dma;
err = gen8_init_scratch(&ppgtt->vm);
if (err)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
b/drivers/gpu/drm/i915/gt/intel_gtt.c
index d386b89e2758..1eeeab45445c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -7,10 +7,23 @@
#include
+#include "gem/i915_gem_lmem.h"
#include "i915_trace.h"
#include "intel_gt.h"
#include "intel_gtt.h"
+struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space *vm, int sz)
+{
+ struct drm_i915_gem_object *obj;
+
+ obj = i915_gem_object_create_lmem(vm->i915, sz, 0);
+
+ /* ensure all dma objects have the same reservation class */
+ if (!IS_ERR(obj))
+ obj->base.resv = &vm->resv;
+ return obj;
+}
+
struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm, int
sz)
{
struct drm_i915_gem_object *obj;
@@ -27,9 +40,14 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
i915_address_space *vm, int sz)
int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
{
+ enum i915_map_type type;
void *vaddr;
- vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
+ type = I915_MAP_WB;
+ if (i915_gem_object_is_lmem(obj))
+ type = I915_MAP_WC;
Not trusting the "always coherent" helper from earlier in the series?
Regards,
Tvrtko
+
+ vaddr = i915_gem_object_pin_map_unlocked(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
@@ -39,9 +57,14 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
{
+ enum i915_map_type type;
void *vaddr;
- vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ type = I915_MAP_WB;
+ if (i915_gem_object_is_lmem(obj))
+ type = I915_MAP_WC;
+
+ vaddr = i915_gem_object_pin_map(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 40e486704558..44ce27c51631 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -527,6 +527,7 @@ int setup_scratch_page(struct i915_address_space *vm);
void free_scratch(struct i915_address_space *vm);
struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm, int sz);
+struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space *vm, int
sz);
struct i915_page_table *alloc_pt(struct i915_address_space *vm);
struct i915_page_directory *alloc_pd(struct i915_address_space *vm);
struct i915_page_directory *__alloc_pd(int npde);
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 12/19] drm/i915/lmem: Bypass aperture when lmem is available
On 12/04/2021 10:05, Matthew Auld wrote:
From: Anusha Srivatsa
In the scenario where local memory is available, we have
rely on CPU access via lmem directly instead of aperture.
v2:
gmch is only relevant for much older hw, therefore we can drop the
has_aperture check since it should always be present on such platforms.
(Chris)
Cc: Ville Syrjälä
Cc: Dhinakaran Pandiyan
Cc: Maarten Lankhorst
Cc: Chris P Wilson
Cc: Daniel Vetter
Cc: Joonas Lahtinen
Cc: Daniele Ceraolo Spurio
Cc: CQ Tang
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 22 +++---
drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 15 +++
drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 5 +
drivers/gpu/drm/i915/i915_vma.c| 19 +--
4 files changed, 48 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 2b37959da747..4af40229f5ec 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -139,14 +139,22 @@ static int intelfb_alloc(struct drm_fb_helper *helper,
size = mode_cmd.pitches[0] * mode_cmd.height;
size = PAGE_ALIGN(size);
- /* If the FB is too big, just don't use it since fbdev is not very
-* important and we should probably use that space with FBC or other
-* features. */
obj = ERR_PTR(-ENODEV);
- if (size * 2 < dev_priv->stolen_usable_size)
- obj = i915_gem_object_create_stolen(dev_priv, size);
- if (IS_ERR(obj))
- obj = i915_gem_object_create_shmem(dev_priv, size);
+ if (HAS_LMEM(dev_priv)) {
+ obj = i915_gem_object_create_lmem(dev_priv, size,
+ I915_BO_ALLOC_CONTIGUOUS);
Has to be contiguous? Question for display experts I guess.
[Comes back later.] Ah for iomap? Put a comment to that effect perhaps?
+ } else {
+ /*
+* If the FB is too big, just don't use it since fbdev is not
very
+* important and we should probably use that space with FBC or
other
+* features.
+*/
+ if (size * 2 < dev_priv->stolen_usable_size)
+ obj = i915_gem_object_create_stolen(dev_priv, size);
+ if (IS_ERR(obj))
+ obj = i915_gem_object_create_shmem(dev_priv, size);
+ }
Could we keep the IS_ERR ordered allocation order to save having to
re-indent? Bike shed so optional..
+
if (IS_ERR(obj)) {
drm_err(&dev_priv->drm, "failed to allocate framebuffer\n");
return PTR_ERR(obj);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 017db8f71130..f44bdd08f7cb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -17,6 +17,21 @@ const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops =
{
.release = i915_gem_object_release_memory_region,
};
+void __iomem *
+i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
+ unsigned long n,
+ unsigned long size)
+{
+ resource_size_t offset;
+
+ GEM_BUG_ON(!i915_gem_object_is_contiguous(obj));
+
+ offset = i915_gem_object_get_dma_address(obj, n);
+ offset -= obj->mm.region->region.start;
+
+ return io_mapping_map_wc(&obj->mm.region->iomap, offset, size);
+}
+
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
{
struct intel_memory_region *mr = obj->mm.region;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
index 036d53c01de9..fac6bc5a5ebb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.h
@@ -14,6 +14,11 @@ struct intel_memory_region;
extern const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops;
+void __iomem *
+i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
+ unsigned long n,
+ unsigned long size);
+
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj);
struct drm_i915_gem_object *
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 07490db51cdc..e24d33aecac4 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -27,6 +27,7 @@
#include "display/intel_frontbuffer.h"
+#include "gem/i915_gem_lmem.h"
#include "gt/intel_engine.h"
#include "gt/intel_engine_heartbeat.h"
#include "gt/intel_gt.h"
@@ -448,9 +449,11 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
void __iomem *ptr;
int err;
- if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) {
- err = -ENODEV;
- goto err;
+ if (!i915_
Re: [Intel-gfx] [PATCH 11/19] drm/i915: Update the helper to set correct mapping
On 12/04/2021 10:05, Matthew Auld wrote:
From: Venkata Sandeep Dhanalakota
Determine the possible coherent map type based on object location,
and if target has llc or if user requires an always coherent
mapping.
Cc: Matthew Auld
Cc: CQ Tang
Suggested-by: Michal Wajdeczko
Signed-off-by: Venkata Sandeep Dhanalakota
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 3 ++-
drivers/gpu/drm/i915/gt/intel_engine_pm.c| 2 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 4 +++-
drivers/gpu/drm/i915/gt/intel_ring.c | 9 ++---
drivers/gpu/drm/i915/gt/selftest_context.c | 3 ++-
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_lrc.c | 4 +++-
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 +++-
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 +++-
drivers/gpu/drm/i915/i915_drv.h | 11 +--
drivers/gpu/drm/i915/selftests/igt_spinner.c | 4 ++--
11 files changed, 36 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index efe935f80c1a..b79568d370f5 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -664,7 +664,8 @@ static int init_status_page(struct intel_engine_cs *engine)
if (ret)
goto err;
- vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ vaddr = i915_gem_object_pin_map(obj,
+ i915_coherent_map_type(engine->i915,
obj, true));
if (IS_ERR(vaddr)) {
ret = PTR_ERR(vaddr);
goto err_unpin;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 7c9af86fdb1e..47f4397095e5 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -23,7 +23,7 @@ static void dbg_poison_ce(struct intel_context *ce)
if (ce->state) {
struct drm_i915_gem_object *obj = ce->state->obj;
- int type = i915_coherent_map_type(ce->engine->i915);
+ int type = i915_coherent_map_type(ce->engine->i915, obj, true);
void *map;
if (!i915_gem_object_trylock(obj))
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index e86897cde984..aafe2a4df496 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -903,7 +903,9 @@ lrc_pre_pin(struct intel_context *ce,
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
*vaddr = i915_gem_object_pin_map(ce->state->obj,
-
i915_coherent_map_type(ce->engine->i915) |
+
i915_coherent_map_type(ce->engine->i915,
+ ce->state->obj,
+ false) |
I915_MAP_OVERRIDE);
return PTR_ERR_OR_ZERO(*vaddr);
diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c
b/drivers/gpu/drm/i915/gt/intel_ring.c
index aee0a77c77e0..3cf6c7e68108 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring.c
@@ -53,9 +53,12 @@ int intel_ring_pin(struct intel_ring *ring, struct
i915_gem_ww_ctx *ww)
if (i915_vma_is_map_and_fenceable(vma))
addr = (void __force *)i915_vma_pin_iomap(vma);
- else
- addr = i915_gem_object_pin_map(vma->obj,
-
i915_coherent_map_type(vma->vm->i915));
+ else {
+ int type = i915_coherent_map_type(vma->vm->i915, vma->obj,
false);
+
+ addr = i915_gem_object_pin_map(vma->obj, type);
+ }
+
if (IS_ERR(addr)) {
ret = PTR_ERR(addr);
goto err_ring;
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c
b/drivers/gpu/drm/i915/gt/selftest_context.c
index b9bdd1d23243..26685b927169 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -88,7 +88,8 @@ static int __live_context_size(struct intel_engine_cs *engine)
goto err;
vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
-
i915_coherent_map_type(engine->i915));
+
i915_coherent_map_type(engine->i915,
+
ce->state->obj, false));
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
intel_context_unpin(ce);
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 746985971c3a..5b63d4df8c93 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -69,7 +69,7 @@ stati
Re: [Intel-gfx] [PATCH 08/19] drm/i915: Return error value when bo not in LMEM for discrete
On 12/04/2021 10:05, Matthew Auld wrote:
From: Mohammed Khajapasha
Return EREMOTE value when frame buffer object is not backed by LMEM
for discrete. If Local memory is supported by hardware the framebuffer
backing gem objects should be from local memory.
Signed-off-by: Mohammed Khajapasha
---
drivers/gpu/drm/i915/display/intel_display.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 411b46c012f8..57b06d8728af 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -63,6 +63,7 @@
#include "display/intel_vdsc.h"
#include "display/intel_vrr.h"
+#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_object.h"
#include "gt/intel_rps.h"
@@ -11279,11 +11280,20 @@ intel_user_framebuffer_create(struct drm_device *dev,
struct drm_framebuffer *fb;
struct drm_i915_gem_object *obj;
struct drm_mode_fb_cmd2 mode_cmd = *user_mode_cmd;
+ struct drm_i915_private *i915;
obj = i915_gem_object_lookup(filp, mode_cmd.handles[0]);
if (!obj)
return ERR_PTR(-ENOENT);
+ /* object is backed with LMEM for discrete */
+ i915 = to_i915(obj->base.dev);
+ if (HAS_LMEM(i915) && !i915_gem_object_is_lmem(obj)) {
+ /* object is "remote", not in local memory */
+ i915_gem_object_put(obj);
+ return ERR_PTR(-EREMOTE);
I am a fan of rich errnos and this one feels appropriately descriptive,
but please get an ack from Daniel or so.
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
+ }
+
fb = intel_framebuffer_create(obj, &mode_cmd);
i915_gem_object_put(obj);
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm: Add privacy-screen class and connector properties (rev2)
== Series Details == Series: drm: Add privacy-screen class and connector properties (rev2) URL : https://patchwork.freedesktop.org/series/79259/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o AR init/built-in.a LD vmlinux.o MODPOST vmlinux.symvers MODINFO modules.builtin.modinfo GEN modules.builtin LD .tmp_vmlinux.kallsyms1 drivers/gpu/drm/drm_connector.o: In function `drm_connector_unregister': /home/cidrm/kernel/drivers/gpu/drm/drm_connector.c:573: undefined reference to `drm_privacy_screen_unregister_notifier' drivers/gpu/drm/drm_connector.o: In function `drm_connector_update_privacy_screen_properties': /home/cidrm/kernel/drivers/gpu/drm/drm_connector.c:2377: undefined reference to `drm_privacy_screen_get_state' drivers/gpu/drm/drm_connector.o: In function `drm_connector_register': /home/cidrm/kernel/drivers/gpu/drm/drm_connector.c:541: undefined reference to `drm_privacy_screen_register_notifier' drivers/gpu/drm/drm_connector.o: In function `drm_connector_update_privacy_screen': /home/cidrm/kernel/drivers/gpu/drm/drm_connector.c:2457: undefined reference to `drm_privacy_screen_set_sw_state' drivers/gpu/drm/drm_connector.o: In function `drm_connector_cleanup': /home/cidrm/kernel/drivers/gpu/drm/drm_connector.c:457: undefined reference to `drm_privacy_screen_put' Makefile:1199: recipe for target 'vmlinux' failed make: *** [vmlinux] Error 1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH resend 9/9] drm/i915: Add privacy-screen support
Add support for eDP panels with a built-in privacy screen using the
new drm_privacy_screen class.
One thing which stands out here is the addition of these 2 lines to
intel_atomic_commit_tail:
for_each_new_connector_in_state(&state->base, connector, ...
drm_connector_update_privacy_screen(connector, state);
It may seem more logical to instead take care of updating the
privacy-screen state by marking the crtc as needing a modeset and then
do this in both the encoder update_pipe (for fast-sets) and enable
(for full modesets) callbacks. But ATM these callbacks only get passed
the new connector_state and these callbacks are all called after
drm_atomic_helper_swap_state() at which point there is no way to get
the old state from the new state.
Without access to the old state, we do not know if the sw_state of
the privacy-screen has changes so we would need to call
drm_privacy_screen_set_sw_state() unconditionally. This is undesirable
since all current known privacy-screen providers use ACPI calls which
are somewhat expensive to make.
Also, as all providers use ACPI calls, rather then poking GPU registers,
there is no need to order this together with other encoder operations.
Since no GPU poking is involved having this as a separate step of the
commit process actually is the logical thing to do.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +
drivers/gpu/drm/i915/display/intel_dp.c | 10 ++
drivers/gpu/drm/i915/i915_pci.c | 12
3 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 411b46c012f8..620d11d6bb31 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10169,6 +10169,8 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
struct drm_device *dev = state->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc_state *new_crtc_state, *old_crtc_state;
+ struct drm_connector_state *new_connector_state;
+ struct drm_connector *connector;
struct intel_crtc *crtc;
u64 put_domains[I915_MAX_PIPES] = {};
intel_wakeref_t wakeref = 0;
@@ -10266,6 +10268,9 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
intel_color_load_luts(new_crtc_state);
}
+ for_each_new_connector_in_state(&state->base, connector,
new_connector_state, i)
+ drm_connector_update_privacy_screen(connector, &state->base);
+
/*
* Now that the vblank has passed, we can go ahead and program the
* optimal watermarks on platforms that need two-step watermark
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 6750949aa261..8ca3909e2ec9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -37,6 +37,7 @@
#include
#include
#include
+#include
#include
#include "g4x_dp.h"
@@ -5178,6 +5179,7 @@ static bool intel_edp_init_connector(struct intel_dp
*intel_dp,
struct drm_connector *connector = &intel_connector->base;
struct drm_display_mode *fixed_mode = NULL;
struct drm_display_mode *downclock_mode = NULL;
+ struct drm_privacy_screen *privacy_screen;
bool has_dpcd;
enum pipe pipe = INVALID_PIPE;
struct edid *edid;
@@ -5268,6 +5270,14 @@ static bool intel_edp_init_connector(struct intel_dp
*intel_dp,
fixed_mode->hdisplay, fixed_mode->vdisplay);
}
+ privacy_screen = drm_privacy_screen_get(&dev->pdev->dev, NULL);
+ if (!IS_ERR(privacy_screen)) {
+ drm_connector_attach_privacy_screen_provider(connector,
+privacy_screen);
+ } else if (PTR_ERR(privacy_screen) != -ENODEV) {
+ drm_warn(&dev_priv->drm, "Error getting privacy-screen\n");
+ }
+
return true;
out_vdd_off:
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 480553746794..95426e365400 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -26,6 +26,7 @@
#include
#include
+#include
#include
#include "display/intel_fbdev.h"
@@ -1064,6 +1065,7 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
{
struct intel_device_info *intel_info =
(struct intel_device_info *) ent->driver_data;
+ struct drm_privacy_screen *privacy_screen;
int err;
if (intel_info->require_force_probe &&
@@ -1092,7 +1094,17 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
if (vga_switcheroo_client_probe_defer(pdev))
return -EPROBE_DEFER;
+
[Intel-gfx] [PATCH resend 8/9] platform/x86: thinkpad_acpi: Register a privacy-screen device
Register a privacy-screen device on laptops with a privacy-screen,
this exports the PrivacyGuard features to user-space using a
standardized vendor-agnostic sysfs interface. Note the sysfs interface
is read-only.
Registering a privacy-screen device with the new privacy-screen class
code will also allow the GPU driver to get a handle to it and export
the privacy-screen setting as a property on the DRM connector object
for the LCD panel. This DRM connector property is news standardized
interface which all user-space code should use to query and control
the privacy-screen.
Signed-off-by: Hans de Goede
---
Changes in v2:
- Make the new lcdshadow_set_sw_state, lcdshadow_get_hw_state and
lcdshadow_ops symbols static
- Update state and call drm_privacy_screen_call_notifier_chain()
when the state is changed by pressing the Fn + D hotkey combo
---
drivers/platform/x86/Kconfig | 1 +
drivers/platform/x86/thinkpad_acpi.c | 91
2 files changed, 67 insertions(+), 25 deletions(-)
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 461ec61530eb..404d80f99a03 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -485,6 +485,7 @@ config THINKPAD_ACPI
depends on ACPI_VIDEO || ACPI_VIDEO = n
depends on BACKLIGHT_CLASS_DEVICE
select ACPI_PLATFORM_PROFILE
+ select DRM_PRIVACY_SCREEN
select HWMON
select NVRAM
select NEW_LEDS
diff --git a/drivers/platform/x86/thinkpad_acpi.c
b/drivers/platform/x86/thinkpad_acpi.c
index fe919700b8ae..766c6d64b0fb 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -73,6 +73,7 @@
#include
#include
#include
+#include
/* ThinkPad CMOS commands */
#define TP_CMOS_VOLUME_DOWN0
@@ -156,6 +157,7 @@ enum tpacpi_hkey_event_t {
TP_HKEY_EV_VOL_UP = 0x1015, /* Volume up or unmute */
TP_HKEY_EV_VOL_DOWN = 0x1016, /* Volume down or unmute */
TP_HKEY_EV_VOL_MUTE = 0x1017, /* Mixer output mute */
+ TP_HKEY_EV_PRIVACYGUARD_TOGGLE = 0x130f, /* Toggle priv.guard on/off */
/* Reasons for waking up from S3/S4 */
TP_HKEY_EV_WKUP_S3_UNDOCK = 0x2304, /* undock requested, S3 */
@@ -3882,6 +3884,12 @@ static bool hotkey_notify_extended_hotkey(const u32 hkey)
{
unsigned int scancode;
+ switch (hkey) {
+ case TP_HKEY_EV_PRIVACYGUARD_TOGGLE:
+ tpacpi_driver_event(hkey);
+ return true;
+ }
+
/* Extended keycodes start at 0x300 and our offset into the map
* TP_ACPI_HOTKEYSCAN_EXTENDED_START. The calculated scancode
* will be positive, but might not be in the correct range.
@@ -9759,30 +9767,40 @@ static struct ibm_struct battery_driver_data = {
* LCD Shadow subdriver, for the Lenovo PrivacyGuard feature
*/
+static struct drm_privacy_screen *lcdshadow_dev;
static acpi_handle lcdshadow_get_handle;
static acpi_handle lcdshadow_set_handle;
-static int lcdshadow_state;
-static int lcdshadow_on_off(bool state)
+static int lcdshadow_set_sw_state(struct drm_privacy_screen *priv,
+ enum drm_privacy_screen_status state)
{
int output;
+ if (WARN_ON(!mutex_is_locked(&priv->lock)))
+ return -EIO;
+
if (!acpi_evalf(lcdshadow_set_handle, &output, NULL, "dd", (int)state))
return -EIO;
- lcdshadow_state = state;
+ priv->hw_state = priv->sw_state = state;
return 0;
}
-static int lcdshadow_set(bool on)
+static void lcdshadow_get_hw_state(struct drm_privacy_screen *priv)
{
- if (lcdshadow_state < 0)
- return lcdshadow_state;
- if (lcdshadow_state == on)
- return 0;
- return lcdshadow_on_off(on);
+ int output;
+
+ if (!acpi_evalf(lcdshadow_get_handle, &output, NULL, "dd", 0))
+ return;
+
+ priv->hw_state = priv->sw_state = output & 0x1;
}
+static const struct drm_privacy_screen_ops lcdshadow_ops = {
+ .set_sw_state = lcdshadow_set_sw_state,
+ .get_hw_state = lcdshadow_get_hw_state,
+};
+
static int tpacpi_lcdshadow_init(struct ibm_init_struct *iibm)
{
acpi_status status1, status2;
@@ -9790,36 +9808,44 @@ static int tpacpi_lcdshadow_init(struct ibm_init_struct
*iibm)
status1 = acpi_get_handle(hkey_handle, "GSSS", &lcdshadow_get_handle);
status2 = acpi_get_handle(hkey_handle, "", &lcdshadow_set_handle);
- if (ACPI_FAILURE(status1) || ACPI_FAILURE(status2)) {
- lcdshadow_state = -ENODEV;
+ if (ACPI_FAILURE(status1) || ACPI_FAILURE(status2))
return 0;
- }
- if (!acpi_evalf(lcdshadow_get_handle, &output, NULL, "dd", 0)) {
- lcdshadow_state = -EIO;
+ if (!acpi_evalf(lcdshadow_get_handle, &output, NULL, "dd", 0))
return -EIO;
- }
-
[Intel-gfx] [PATCH resend 7/9] platform/x86: thinkpad_acpi: Get privacy-screen / lcdshadow ACPI handles only once
Get the privacy-screen / lcdshadow ACPI handles once and cache them,
instead of retrieving them every time we need them.
Signed-off-by: Hans de Goede
---
drivers/platform/x86/thinkpad_acpi.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/platform/x86/thinkpad_acpi.c
b/drivers/platform/x86/thinkpad_acpi.c
index 683c175cc28a..fe919700b8ae 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -9759,19 +9759,15 @@ static struct ibm_struct battery_driver_data = {
* LCD Shadow subdriver, for the Lenovo PrivacyGuard feature
*/
+static acpi_handle lcdshadow_get_handle;
+static acpi_handle lcdshadow_set_handle;
static int lcdshadow_state;
static int lcdshadow_on_off(bool state)
{
- acpi_handle set_shadow_handle;
int output;
- if (ACPI_FAILURE(acpi_get_handle(hkey_handle, "",
&set_shadow_handle))) {
- pr_warn("Thinkpad ACPI has no %s interface.\n", "");
- return -EIO;
- }
-
- if (!acpi_evalf(set_shadow_handle, &output, NULL, "dd", (int)state))
+ if (!acpi_evalf(lcdshadow_set_handle, &output, NULL, "dd", (int)state))
return -EIO;
lcdshadow_state = state;
@@ -9789,15 +9785,17 @@ static int lcdshadow_set(bool on)
static int tpacpi_lcdshadow_init(struct ibm_init_struct *iibm)
{
- acpi_handle get_shadow_handle;
+ acpi_status status1, status2;
int output;
- if (ACPI_FAILURE(acpi_get_handle(hkey_handle, "GSSS",
&get_shadow_handle))) {
+ status1 = acpi_get_handle(hkey_handle, "GSSS", &lcdshadow_get_handle);
+ status2 = acpi_get_handle(hkey_handle, "", &lcdshadow_set_handle);
+ if (ACPI_FAILURE(status1) || ACPI_FAILURE(status2)) {
lcdshadow_state = -ENODEV;
return 0;
}
- if (!acpi_evalf(get_shadow_handle, &output, NULL, "dd", 0)) {
+ if (!acpi_evalf(lcdshadow_get_handle, &output, NULL, "dd", 0)) {
lcdshadow_state = -EIO;
return -EIO;
}
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH resend 6/9] platform/x86: thinkpad_acpi: Add hotkey_notify_extended_hotkey() helper
Factor the extended hotkey handling out of hotkey_notify_hotkey() and
into a new hotkey_notify_extended_hotkey() helper.
This is a preparation patch for adding support the privacy-screen hotkey
toggle (which needs some special handling, it should NOT send an evdev
key-event to userspace...).
Signed-off-by: Hans de Goede
---
drivers/platform/x86/thinkpad_acpi.c | 30 ++--
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/platform/x86/thinkpad_acpi.c
b/drivers/platform/x86/thinkpad_acpi.c
index 0d9e2ddbf904..683c175cc28a 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -3878,6 +3878,24 @@ static bool
adaptive_keyboard_hotkey_notify_hotkey(unsigned int scancode)
}
}
+static bool hotkey_notify_extended_hotkey(const u32 hkey)
+{
+ unsigned int scancode;
+
+ /* Extended keycodes start at 0x300 and our offset into the map
+* TP_ACPI_HOTKEYSCAN_EXTENDED_START. The calculated scancode
+* will be positive, but might not be in the correct range.
+*/
+ scancode = (hkey & 0xfff) - (0x300 - TP_ACPI_HOTKEYSCAN_EXTENDED_START);
+ if (scancode >= TP_ACPI_HOTKEYSCAN_EXTENDED_START &&
+ scancode < TPACPI_HOTKEY_MAP_LEN) {
+ tpacpi_input_send_key(scancode);
+ return true;
+ }
+
+ return false;
+}
+
static bool hotkey_notify_hotkey(const u32 hkey,
bool *send_acpi_ev,
bool *ignore_acpi_ev)
@@ -3912,17 +3930,7 @@ static bool hotkey_notify_hotkey(const u32 hkey,
return adaptive_keyboard_hotkey_notify_hotkey(scancode);
case 3:
- /* Extended keycodes start at 0x300 and our offset into the map
-* TP_ACPI_HOTKEYSCAN_EXTENDED_START. The calculated scancode
-* will be positive, but might not be in the correct range.
-*/
- scancode -= (0x300 - TP_ACPI_HOTKEYSCAN_EXTENDED_START);
- if (scancode >= TP_ACPI_HOTKEYSCAN_EXTENDED_START &&
- scancode < TPACPI_HOTKEY_MAP_LEN) {
- tpacpi_input_send_key(scancode);
- return true;
- }
- break;
+ return hotkey_notify_extended_hotkey(hkey);
}
return false;
--
2.31.1
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH resend 5/9] drm/connector: Add a drm_connector privacy-screen helper functions
Add 2 drm_connector privacy-screen helper functions:
1. drm_connector_attach_privacy_screen_provider(), this function creates
and attaches the standard privacy-screen properties and registers a
generic notifier for generating sysfs-connector-status-events on external
changes to the privacy-screen status.
2. drm_connector_update_privacy_screen(), Check if the passed in atomic
state contains a privacy-screen sw_state change for the connector and if
it does, call drm_privacy_screen_set_sw_state() with the new sw_state.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_connector.c | 113
include/drm/drm_connector.h | 12
2 files changed, 125 insertions(+)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index ca8a76decd4c..958a332374af 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -20,6 +20,7 @@
* OF THIS SOFTWARE.
*/
+#include
#include
#include
#include
@@ -27,6 +28,7 @@
#include
#include
#include
+#include
#include
#include
@@ -451,6 +453,11 @@ void drm_connector_cleanup(struct drm_connector *connector)
DRM_CONNECTOR_REGISTERED))
drm_connector_unregister(connector);
+ if (connector->privacy_screen) {
+ drm_privacy_screen_put(connector->privacy_screen);
+ connector->privacy_screen = NULL;
+ }
+
if (connector->tile_group) {
drm_mode_put_tile_group(dev, connector->tile_group);
connector->tile_group = NULL;
@@ -530,6 +537,10 @@ int drm_connector_register(struct drm_connector *connector)
/* Let userspace know we have a new connector */
drm_sysfs_hotplug_event(connector->dev);
+ if (connector->privacy_screen)
+ drm_privacy_screen_register_notifier(connector->privacy_screen,
+ &connector->privacy_screen_notifier);
+
goto unlock;
err_debugfs:
@@ -558,6 +569,11 @@ void drm_connector_unregister(struct drm_connector
*connector)
return;
}
+ if (connector->privacy_screen)
+ drm_privacy_screen_unregister_notifier(
+ connector->privacy_screen,
+ &connector->privacy_screen_notifier);
+
if (connector->funcs->early_unregister)
connector->funcs->early_unregister(connector);
@@ -2353,6 +2369,103 @@ drm_connector_attach_privacy_screen_properties(struct
drm_connector *connector)
}
EXPORT_SYMBOL(drm_connector_attach_privacy_screen_properties);
+static void drm_connector_update_privacy_screen_properties(
+ struct drm_connector *connector)
+{
+ enum drm_privacy_screen_status sw_state, hw_state;
+
+ drm_privacy_screen_get_state(connector->privacy_screen,
+&sw_state, &hw_state);
+
+ connector->state->privacy_screen_sw_state = sw_state;
+ drm_object_property_set_value(&connector->base,
+ connector->privacy_screen_hw_state_property, hw_state);
+}
+
+static int drm_connector_privacy_screen_notifier(
+ struct notifier_block *nb, unsigned long action, void *data)
+{
+ struct drm_connector *connector =
+ container_of(nb, struct drm_connector, privacy_screen_notifier);
+ struct drm_device *dev = connector->dev;
+
+ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
+ drm_connector_update_privacy_screen_properties(connector);
+ drm_modeset_unlock(&dev->mode_config.connection_mutex);
+
+ drm_sysfs_connector_status_event(connector,
+ connector->privacy_screen_sw_state_property);
+ drm_sysfs_connector_status_event(connector,
+ connector->privacy_screen_hw_state_property);
+
+ return NOTIFY_DONE;
+}
+
+/**
+ * drm_connector_attach_privacy_screen_provider - attach a privacy-screen to
+ *the connector
+ * @connector: connector to attach the privacy-screen to
+ * @priv: drm_privacy_screen to attach
+ *
+ * Create and attach the standard privacy-screen properties and register
+ * a generic notifier for generating sysfs-connector-status-events
+ * on external changes to the privacy-screen status.
+ * This function takes ownership of the passed in drm_privacy_screen and will
+ * call drm_privacy_screen_put() on it when the connector is destroyed.
+ */
+void drm_connector_attach_privacy_screen_provider(
+ struct drm_connector *connector, struct drm_privacy_screen *priv)
+{
+ connector->privacy_screen = priv;
+ connector->privacy_screen_notifier.notifier_call =
+ drm_connector_privacy_screen_notifier;
+
+ drm_connector_create_privacy_screen_properties(connector);
+ drm_connector_update_privacy_screen_properties(connector);
+ drm_connector_attach_privacy_screen_properties(connector
[Intel-gfx] [PATCH resend 4/9] drm/privacy-screen: Add notifier support
Add support for privacy-screen consumers to register a notifier to
be notified of external (e.g. done by the hw itself on a hotkey press)
state changes.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_privacy_screen.c | 67 +++
include/drm/drm_privacy_screen_consumer.h | 5 ++
include/drm/drm_privacy_screen_driver.h | 4 ++
3 files changed, 76 insertions(+)
diff --git a/drivers/gpu/drm/drm_privacy_screen.c
b/drivers/gpu/drm/drm_privacy_screen.c
index 6296fd46156c..7e78b4068e8f 100644
--- a/drivers/gpu/drm/drm_privacy_screen.c
+++ b/drivers/gpu/drm/drm_privacy_screen.c
@@ -254,6 +254,49 @@ void drm_privacy_screen_get_state(struct
drm_privacy_screen *priv,
}
EXPORT_SYMBOL(drm_privacy_screen_get_state);
+/**
+ * drm_privacy_screen_register_notifier - register a notifier
+ * @priv: Privacy screen to register the notifier with
+ * @nb: Notifier-block for the notifier to register
+ *
+ * Register a notifier with the privacy-screen to be notified of changes made
+ * to the privacy-screen state from outside of the privacy-screen class.
+ * E.g. the state may be changed by the hardware itself in response to a
+ * hotkey press.
+ *
+ * The notifier is called with no locks held. The new hw_state and sw_state
+ * can be retrieved using the drm_privacy_screen_get_state() function.
+ * A pointer to the drm_privacy_screen's struct is passed as the void *data
+ * argument of the notifier_block's notifier_call.
+ *
+ * The notifier will NOT be called when changes are made through
+ * drm_privacy_screen_set_sw_state(). It is only called for external changes.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int drm_privacy_screen_register_notifier(struct drm_privacy_screen *priv,
+struct notifier_block *nb)
+{
+ return blocking_notifier_chain_register(&priv->notifier_head, nb);
+}
+EXPORT_SYMBOL(drm_privacy_screen_register_notifier);
+
+/**
+ * drm_privacy_screen_unregister_notifier - unregister a notifier
+ * @priv: Privacy screen to register the notifier with
+ * @nb: Notifier-block for the notifier to register
+ *
+ * Unregister a notifier registered with
drm_privacy_screen_register_notifier().
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int drm_privacy_screen_unregister_notifier(struct drm_privacy_screen *priv,
+ struct notifier_block *nb)
+{
+ return blocking_notifier_chain_unregister(&priv->notifier_head, nb);
+}
+EXPORT_SYMBOL(drm_privacy_screen_unregister_notifier);
+
/*** drm_privacy_screen_driver.h functions ***/
static ssize_t sw_state_show(struct device *dev,
@@ -352,6 +395,7 @@ struct drm_privacy_screen *drm_privacy_screen_register(
return ERR_PTR(-ENOMEM);
mutex_init(&priv->lock);
+ BLOCKING_INIT_NOTIFIER_HEAD(&priv->notifier_head);
priv->dev.class = &drm_privacy_screen_class;
priv->dev.parent = parent;
@@ -399,6 +443,29 @@ void drm_privacy_screen_unregister(struct
drm_privacy_screen *priv)
}
EXPORT_SYMBOL(drm_privacy_screen_unregister);
+/**
+ * drm_privacy_screen_call_notifier_chain - notify consumers of state change
+ * @priv: Privacy screen to register the notifier with
+ *
+ * A privacy-screen provider driver can call this functions upon external
+ * changes to the privacy-screen state. E.g. the state may be changed by the
+ * hardware itself in response to a hotkey press.
+ * This function must be called without holding the privacy-screen lock.
+ * the driver must update sw_state and hw_state to reflect the new state before
+ * calling this function.
+ * The expected behavior from the driver upon receiving an external state
+ * change event is: 1. Take the lock; 2. Update sw_state and hw_state;
+ * 3. Release the lock. 4. Call drm_privacy_screen_call_notifier_chain().
+ */
+void drm_privacy_screen_call_notifier_chain(struct drm_privacy_screen *priv)
+{
+ if (WARN_ON(mutex_is_locked(&priv->lock)))
+ return;
+
+ blocking_notifier_call_chain(&priv->notifier_head, 0, priv);
+}
+EXPORT_SYMBOL(drm_privacy_screen_call_notifier_chain);
+
static int __init drm_privacy_screen_init(void)
{
int ret;
diff --git a/include/drm/drm_privacy_screen_consumer.h
b/include/drm/drm_privacy_screen_consumer.h
index 169ba72bd60d..1f33dc1457ff 100644
--- a/include/drm/drm_privacy_screen_consumer.h
+++ b/include/drm/drm_privacy_screen_consumer.h
@@ -24,4 +24,9 @@ void drm_privacy_screen_get_state(struct drm_privacy_screen
*priv,
enum drm_privacy_screen_status *sw_state_ret,
enum drm_privacy_screen_status *hw_state_ret);
+int drm_privacy_screen_register_notifier(struct drm_privacy_screen *priv,
+struct notifier_block *nb);
+int drm_privacy_screen_unregister_notifier(struct drm_privacy_screen *priv,
+ struct notif
[Intel-gfx] [PATCH resend 1/9] drm/connector: Add support for privacy-screen properties (v4)
From: Rajat Jain
Add support for generic electronic privacy screen properties, that
can be added by systems that have an integrated EPS.
Changes in v2 (Hans de Goede)
- Create 2 properties, "privacy-screen sw-state" and
"privacy-screen hw-state", to deal with devices where the OS might be
locked out of making state changes
- Write kerneldoc explaining how the 2 properties work together, what
happens when changes to the state are made outside of the DRM code's
control, etc.
Changes in v3 (Hans de Goede)
- Some small tweaks to the kerneldoc describing the 2 properties
Changes in v4 (Hans de Goede)
- Change the "Enabled, locked" and "Disabled, locked" hw-state enum value
names to "Enabled-locked" and "Disabled-locked". The xrandr command shows
all possible enum values separated by commas in its output, so having a
comma in an enum name is not a good idea.
- Do not add a privacy_screen_hw_state member to drm_connector_state
since this property is immutable its value must be directly stored in the
obj->properties->values array
Signed-off-by: Rajat Jain
Co-authored-by: Hans de Goede
Acked-by: Pekka Paalanen
Reviewed-by: Mario Limonciello
Signed-off-by: Hans de Goede
---
Documentation/gpu/drm-kms.rst | 2 +
drivers/gpu/drm/drm_atomic_uapi.c | 4 ++
drivers/gpu/drm/drm_connector.c | 101 ++
include/drm/drm_connector.h | 44 +
4 files changed, 151 insertions(+)
diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
index 87e5023e3f55..36943f2b0c5d 100644
--- a/Documentation/gpu/drm-kms.rst
+++ b/Documentation/gpu/drm-kms.rst
@@ -475,6 +475,8 @@ Property Types and Blob Property Support
.. kernel-doc:: drivers/gpu/drm/drm_property.c
:export:
+.. _standard_connector_properties:
+
Standard Connector Properties
-
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
b/drivers/gpu/drm/drm_atomic_uapi.c
index 268bb69c2e2f..d5339b683156 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -796,6 +796,8 @@ static int drm_atomic_connector_set_property(struct
drm_connector *connector,
fence_ptr);
} else if (property == connector->max_bpc_property) {
state->max_requested_bpc = val;
+ } else if (property == connector->privacy_screen_sw_state_property) {
+ state->privacy_screen_sw_state = val;
} else if (connector->funcs->atomic_set_property) {
return connector->funcs->atomic_set_property(connector,
state, property, val);
@@ -873,6 +875,8 @@ drm_atomic_connector_get_property(struct drm_connector
*connector,
*val = 0;
} else if (property == connector->max_bpc_property) {
*val = state->max_requested_bpc;
+ } else if (property == connector->privacy_screen_sw_state_property) {
+ *val = state->privacy_screen_sw_state;
} else if (connector->funcs->atomic_get_property) {
return connector->funcs->atomic_get_property(connector,
state, property, val);
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 7631f76e7f34..ca8a76decd4c 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1244,6 +1244,46 @@ static const struct drm_prop_enum_list dp_colorspaces[]
= {
* For DVI-I and TVout there is also a matching property "select
subconnector"
* allowing to switch between signal types.
* DP subconnector corresponds to a downstream port.
+ *
+ * privacy-screen sw-state, privacy-screen hw-state:
+ * These 2 optional properties can be used to query the state of the
+ * electronic privacy screen that is available on some displays; and in
+ * some cases also control the state. If a driver implements these
+ * properties then both properties must be present.
+ *
+ * "privacy-screen hw-state" is read-only and reflects the actual state
+ * of the privacy-screen, possible values: "Enabled", "Disabled,
+ * "Enabled-locked", "Disabled-locked". The locked states indicate
+ * that the state cannot be changed through the DRM API. E.g. there
+ * might be devices where the firmware-setup options, or a hardware
+ * slider-switch, offer always on / off modes.
+ *
+ * "privacy-screen sw-state" can be set to change the privacy-screen state
+ * when not locked. In this case the driver must update the hw-state
+ * property to reflect the new state on completion of the commit of the
+ * sw-state property. Setting the sw-state property when the hw-state is
+ * locked must be interpreted by the driver as a request to change the
+ * state to the set state when the hw-state becomes unlocked. E.g. if
+ * "privacy-screen hw-state" is "Enabled-locked" and the sw-state
+ * gets set t
[Intel-gfx] [PATCH resend 3/9] drm/privacy-screen: Add X86 specific arch init code
Add X86 specific arch init code, which fills the privacy-screen lookup
table by checking for various vendor specific ACPI interfaces for
controlling the privacy-screen.
This initial version only checks for the Lenovo Thinkpad specific ACPI
methods for privacy-screen control.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/Makefile | 5 +-
drivers/gpu/drm/drm_privacy_screen_x86.c | 82
include/drm/drm_privacy_screen_machine.h | 5 ++
3 files changed, 91 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/drm_privacy_screen_x86.c
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 9a802605249d..75166bd53e00 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -58,11 +58,14 @@ drm_kms_helper-$(CONFIG_DRM_DP_CEC) += drm_dp_cec.o
obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
obj-$(CONFIG_DRM_DEBUG_SELFTEST) += selftests/
+drm_privacy_screen_helper-y := drm_privacy_screen.o
+drm_privacy_screen_helper-$(CONFIG_X86) += drm_privacy_screen_x86.o
+obj-$(CONFIG_DRM_PRIVACY_SCREEN) += drm_privacy_screen_helper.o
+
obj-$(CONFIG_DRM) += drm.o
obj-$(CONFIG_DRM_MIPI_DBI) += drm_mipi_dbi.o
obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
obj-$(CONFIG_DRM_PANEL_ORIENTATION_QUIRKS) += drm_panel_orientation_quirks.o
-obj-$(CONFIG_DRM_PRIVACY_SCREEN) += drm_privacy_screen.o
obj-y += arm/
obj-$(CONFIG_DRM_TTM) += ttm/
obj-$(CONFIG_DRM_SCHED)+= scheduler/
diff --git a/drivers/gpu/drm/drm_privacy_screen_x86.c
b/drivers/gpu/drm/drm_privacy_screen_x86.c
new file mode 100644
index ..f486d9087819
--- /dev/null
+++ b/drivers/gpu/drm/drm_privacy_screen_x86.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2020 Red Hat, Inc.
+ *
+ * Authors:
+ * Hans de Goede
+ */
+
+#include
+#include
+
+static struct drm_privacy_screen_lookup arch_lookup;
+
+struct arch_init_data {
+ struct drm_privacy_screen_lookup lookup;
+ bool (*detect)(void);
+};
+
+static acpi_status __init acpi_set_handle(acpi_handle handle, u32 level,
+ void *context, void **return_value)
+{
+ *(acpi_handle *)return_value = handle;
+ return AE_CTRL_TERMINATE;
+}
+
+static bool __init detect_thinkpad_privacy_screen(void)
+{
+ union acpi_object obj = { .type = ACPI_TYPE_INTEGER };
+ struct acpi_object_list args = { .count = 1, .pointer = &obj, };
+ acpi_handle ec_handle = NULL;
+ unsigned long long output;
+ acpi_status status;
+
+ /* Get embedded-controller handle */
+ status = acpi_get_devices("PNP0C09", acpi_set_handle, NULL, &ec_handle);
+ if (ACPI_FAILURE(status) || !ec_handle)
+ return false;
+
+ /* And call the privacy-screen get-status method */
+ status = acpi_evaluate_integer(ec_handle, "HKEY.GSSS", &args, &output);
+ if (ACPI_FAILURE(status))
+ return false;
+
+ return (output & 0x1) ? true : false;
+}
+
+static const struct arch_init_data arch_init_data[] __initconst = {
+#if IS_ENABLED(CONFIG_THINKPAD_ACPI)
+ {
+ .lookup = {
+ .dev_id = NULL,
+ .con_id = NULL,
+ .provider = "thinkpad_acpi",
+ },
+ .detect = detect_thinkpad_privacy_screen,
+ },
+#endif
+};
+
+void __init drm_privacy_screen_arch_init(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(arch_init_data); i++) {
+ if (!arch_init_data[i].detect())
+ continue;
+
+ pr_info("Found '%s' privacy-screen provider\n",
+ arch_init_data[i].lookup.provider);
+
+ /* Make a copy because arch_init_data is __initconst */
+ arch_lookup = arch_init_data[i].lookup;
+ drm_privacy_screen_lookup_add(&arch_lookup);
+ break;
+ }
+}
+
+void __exit drm_privacy_screen_arch_exit(void)
+{
+ if (arch_lookup.provider)
+ drm_privacy_screen_lookup_remove(&arch_lookup);
+}
diff --git a/include/drm/drm_privacy_screen_machine.h
b/include/drm/drm_privacy_screen_machine.h
index 55f4b4fd8e4e..0d2f2a443e8c 100644
--- a/include/drm/drm_privacy_screen_machine.h
+++ b/include/drm/drm_privacy_screen_machine.h
@@ -31,11 +31,16 @@ struct drm_privacy_screen_lookup {
void drm_privacy_screen_lookup_add(struct drm_privacy_screen_lookup *lookup);
void drm_privacy_screen_lookup_remove(struct drm_privacy_screen_lookup
*lookup);
+#ifdef CONFIG_X86
+void drm_privacy_screen_arch_init(void);
+void drm_privacy_screen_arch_exit(void);
+#else
static inline void drm_privacy_screen_arch_init(void)
{
}
static inline void drm_privacy_screen_arch_exit(void)
{
}
+#endif
#endif
--
2.31.1
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[Intel-gfx] [PATCH resend 2/9] drm: Add privacy-screen class
On some new laptops the LCD panel has a builtin electronic privacy-screen. We want to export this functionality as a property on the drm connector object. But often this functionality is not exposed on the GPU but on some other (ACPI) device. This commit adds a privacy-screen class allowing the driver for these other devices to register themselves as a privacy-screen provider; and allowing the drm/kms code to get a privacy-screen provider associated with a specific GPU/connector combo. Signed-off-by: Hans de Goede --- Documentation/gpu/drm-kms-helpers.rst | 15 + MAINTAINERS | 8 + drivers/gpu/drm/Kconfig | 5 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_privacy_screen.c | 426 ++ include/drm/drm_privacy_screen_consumer.h | 27 ++ include/drm/drm_privacy_screen_driver.h | 80 include/drm/drm_privacy_screen_machine.h | 41 +++ 8 files changed, 603 insertions(+) create mode 100644 drivers/gpu/drm/drm_privacy_screen.c create mode 100644 include/drm/drm_privacy_screen_consumer.h create mode 100644 include/drm/drm_privacy_screen_driver.h create mode 100644 include/drm/drm_privacy_screen_machine.h diff --git a/Documentation/gpu/drm-kms-helpers.rst b/Documentation/gpu/drm-kms-helpers.rst index 389892f36185..5d8715d2f998 100644 --- a/Documentation/gpu/drm-kms-helpers.rst +++ b/Documentation/gpu/drm-kms-helpers.rst @@ -423,3 +423,18 @@ Legacy CRTC/Modeset Helper Functions Reference .. kernel-doc:: drivers/gpu/drm/drm_crtc_helper.c :export: + +Privacy-screen class + + +.. kernel-doc:: drivers/gpu/drm/drm_privacy_screen.c + :doc: overview + +.. kernel-doc:: include/drm/drm_privacy_screen_driver.h + :internal: + +.. kernel-doc:: include/drm/drm_privacy_screen_machine.h + :internal: + +.. kernel-doc:: drivers/gpu/drm/drm_privacy_screen.c + :export: diff --git a/MAINTAINERS b/MAINTAINERS index 7c45120759e6..8220295b2670 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6129,6 +6129,14 @@ F: drivers/gpu/drm/drm_panel.c F: drivers/gpu/drm/panel/ F: include/drm/drm_panel.h +DRM PRIVACY-SCREEN CLASS +M: Hans de Goede +L: dri-de...@lists.freedesktop.org +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: drivers/gpu/drm/drm_privacy_screen* +F: include/drm/drm_privacy_screen* + DRM TTM SUBSYSTEM M: Christian Koenig M: Huang Rui diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 3c16bd1afd87..da25ff3a0a34 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -474,3 +474,8 @@ config DRM_PANEL_ORIENTATION_QUIRKS config DRM_LIB_RANDOM bool default n + +# Separate option, used by drivers outside of drivers/gpu/drm +config DRM_PRIVACY_SCREEN + tristate + default n diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 5279db4392df..9a802605249d 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -62,6 +62,7 @@ obj-$(CONFIG_DRM) += drm.o obj-$(CONFIG_DRM_MIPI_DBI) += drm_mipi_dbi.o obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o obj-$(CONFIG_DRM_PANEL_ORIENTATION_QUIRKS) += drm_panel_orientation_quirks.o +obj-$(CONFIG_DRM_PRIVACY_SCREEN) += drm_privacy_screen.o obj-y += arm/ obj-$(CONFIG_DRM_TTM) += ttm/ obj-$(CONFIG_DRM_SCHED)+= scheduler/ diff --git a/drivers/gpu/drm/drm_privacy_screen.c b/drivers/gpu/drm/drm_privacy_screen.c new file mode 100644 index ..6296fd46156c --- /dev/null +++ b/drivers/gpu/drm/drm_privacy_screen.c @@ -0,0 +1,426 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright (C) 2020 Red Hat, Inc. + * + * Authors: + * Hans de Goede + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/** + * DOC: overview + * + * This class allows non KMS drivers, from e.g. drivers/platform/x86 to + * register a privacy-screen device, which the KMS drivers can then use + * to implement the standard privacy-screen properties, see + * :ref:`Standard Connector Properties`. + * + * KMS drivers using a privacy-screen class device are advised to use the + * drm_connector_attach_privacy_screen_provider() and + * drm_connector_update_privacy_screen() helpers for dealing with this. + */ + +#define to_drm_privacy_screen(dev) \ + container_of(dev, struct drm_privacy_screen, dev) + +static DEFINE_MUTEX(drm_privacy_screen_lookup_lock); +static LIST_HEAD(drm_privacy_screen_lookup_list); + +static DEFINE_MUTEX(drm_privacy_screen_devs_lock); +static LIST_HEAD(drm_privacy_screen_devs); + +/*** drm_privacy_screen_machine.h functions ***/ + +/** + * drm_privacy_screen_lookup_add - add an entry to the static privacy-screen + *lookup list + * @lookup: lookup list entry to add + * + * Add an entry to the static privacy-screen lookup list. Note the + * &struct list_head which is part of the &struct drm_privacy_scr
[Intel-gfx] [PATCH resend 0/9] drm: Add privacy-screen class and connector properties
Hi All, Here is the privacy-screen related code which I last posted in August of last year. To the best of my knowledge there is consensus about / everyone is in agreement with the new userspace API (2 connector properties) this patch-set add (patch 1 of the series). The blocker the last time was that there were no userspace users of the new properties and as a rule we don't add new drm userspace API without users. There now is GNOME userspace code using the new properties: https://hackmd.io/@3v1n0/rkyIy3BOw The new API works as designed for this userspace user and the branches mentioned at the above link add the following features to GNOME: 1. Showing an OSD notification when the privacy-screen is toggled on/off through hotkeys handled by the embedded-controller 2. Allowing control of the privacy-screen from the GNOME control-panel, including the on/off slider shown there updating to match the hw-setting when the setting is changed with the control-panel open. 3. Restoring the last user-setting at login This series consists of a number of different parts: 1. A new version of Rajat's privacy-screen connector properties patch, this adds new userspace API in the form of new properties 2. Since on most devices the privacy screen is actually controlled by some vendor specific ACPI/WMI interface which has a driver under drivers/platform/x86, we need some "glue" code to make this functionality available to KMS drivers. Patches 2-4 add a new privacy-screen class for this, which allows non KMS drivers (and possibly KMS drivers too) to register a privacy-screen device and also adds an interface for KMS drivers to get access to the privacy-screen associated with a specific connector. This is modelled similar to how we deal with e.g. PWMs and GPIOs in the kernel, including separate includes for consumers and providers(drivers). 3. Some drm_connector helper functions to keep the actual changes needed for this in individual KMS drivers as small as possible (patch 5). 4. Make the thinkpad_acpi code register a privacy-screen device on ThinkPads with a privacy-screen (patches 6-8) 5. Make the i915 driver export the privacy-screen functionality through the connector properties on the eDP connector. I believe that it would be best to merge the entire series, including the thinkpad_acpi changes through drm-misc in one go. As the pdx86 subsys maintainer I hereby give my ack for merging the thinkpad_acpi changes through drm-misc. There is one small caveat with this series, which it is good to be aware of. The i915 driver will now return -EPROBE_DEFER on Thinkpads with an eprivacy screen, until the thinkpad_acpi driver is loaded. This means that initrd generation tools will need to be updated to include thinkpad_acpi when the i915 driver is added to the initrd. Without this the loading of the i915 driver will be delayed to after the switch to real rootfs. Regards, Hans Hans de Goede (8): drm: Add privacy-screen class drm/privacy-screen: Add X86 specific arch init code drm/privacy-screen: Add notifier support drm/connector: Add a drm_connector privacy-screen helper functions platform/x86: thinkpad_acpi: Add hotkey_notify_extended_hotkey() helper platform/x86: thinkpad_acpi: Get privacy-screen / lcdshadow ACPI handles only once platform/x86: thinkpad_acpi: Register a privacy-screen device drm/i915: Add privacy-screen support Rajat Jain (1): drm/connector: Add support for privacy-screen properties (v4) Documentation/gpu/drm-kms-helpers.rst| 15 + Documentation/gpu/drm-kms.rst| 2 + MAINTAINERS | 8 + drivers/gpu/drm/Kconfig | 5 + drivers/gpu/drm/Makefile | 4 + drivers/gpu/drm/drm_atomic_uapi.c| 4 + drivers/gpu/drm/drm_connector.c | 214 drivers/gpu/drm/drm_privacy_screen.c | 493 +++ drivers/gpu/drm/drm_privacy_screen_x86.c | 82 +++ drivers/gpu/drm/i915/display/intel_display.c | 5 + drivers/gpu/drm/i915/display/intel_dp.c | 10 + drivers/gpu/drm/i915/i915_pci.c | 12 + drivers/platform/x86/Kconfig | 1 + drivers/platform/x86/thinkpad_acpi.c | 131 +++-- include/drm/drm_connector.h | 56 +++ include/drm/drm_privacy_screen_consumer.h| 32 ++ include/drm/drm_privacy_screen_driver.h | 84 include/drm/drm_privacy_screen_machine.h | 46 ++ 18 files changed, 1162 insertions(+), 42 deletions(-) create mode 100644 drivers/gpu/drm/drm_privacy_screen.c create mode 100644 drivers/gpu/drm/drm_privacy_screen_x86.c create mode 100644 include/drm/drm_privacy_screen_consumer.h create mode 100644 include/drm/drm_privacy_screen_driver.h create mode 100644 include/drm/drm_privacy_screen_machine.h -- 2.31.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesk
Re: [Intel-gfx] [PATCH 06/19] drm/i915/stolen: pass the allocation flags
On 12/04/2021 10:05, Matthew Auld wrote:
From: CQ Tang
Stolen memory is always allocated as physically contiguous pages, mark
the object flags as such.
Signed-off-by: CQ Tang
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index f713eabb7671..49a2dfcc8ba7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -633,14 +633,15 @@ static const struct drm_i915_gem_object_ops
i915_gem_object_stolen_ops = {
static int __i915_gem_object_create_stolen(struct intel_memory_region *mem,
struct drm_i915_gem_object *obj,
- struct drm_mm_node *stolen)
+ struct drm_mm_node *stolen,
+ unsigned int flags)
{
static struct lock_class_key lock_class;
unsigned int cache_level;
int err;
drm_gem_private_object_init(&mem->i915->drm, &obj->base, stolen->size);
- i915_gem_object_init(obj, &i915_gem_object_stolen_ops, &lock_class, 0);
+ i915_gem_object_init(obj, &i915_gem_object_stolen_ops, &lock_class,
flags);
obj->stolen = stolen;
obj->read_domains = I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT;
@@ -682,7 +683,7 @@ static int _i915_gem_object_stolen_init(struct
intel_memory_region *mem,
if (ret)
goto err_free;
- ret = __i915_gem_object_create_stolen(mem, obj, stolen);
+ ret = __i915_gem_object_create_stolen(mem, obj, stolen, flags);
if (ret)
goto err_remove;
@@ -840,7 +841,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *i915,
goto err_stolen;
}
- ret = __i915_gem_object_create_stolen(mem, obj, stolen);
+ ret = __i915_gem_object_create_stolen(mem, obj, stolen,
+ I915_BO_ALLOC_CONTIGUOUS);
if (ret)
goto err_object_free;
Are all stolen objects always contiguous or only ones allocated by
i915_gem_object_create_stolen_for_preallocated? If former should
__i915_gem_object_create_stolen just set the flag without the need to
pass it in?
Regards,
Tvrtko
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Re: [Intel-gfx] [PATCH 2/8] drm/i915: Rewrite the FBC tiling check a bit
On Wed, 14 Apr 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Write the tiling check in a nicer form.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 04d9c7d22b04..178243a6d3a2 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -681,11 +681,9 @@ static bool tiling_is_valid(struct drm_i915_private
> *dev_priv,
> {
> switch (modifier) {
> case DRM_FORMAT_MOD_LINEAR:
> - if (DISPLAY_VER(dev_priv) >= 9)
> - return true;
> - return false;
> - case I915_FORMAT_MOD_X_TILED:
> case I915_FORMAT_MOD_Y_TILED:
> + return DISPLAY_VER(dev_priv) >= 9;
So this adds the version check on I915_FORMAT_MOD_Y_TILED which didn't
have it before?
BR,
Jani.
> + case I915_FORMAT_MOD_X_TILED:
> return true;
> default:
> return false;
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 05/19] drm/i915/stolen: enforce the min_page_size contract
On 12/04/2021 10:05, Matthew Auld wrote: From: CQ Tang Since stolen can now be device local-memory underneath, we should try to enforce any min_page_size restrictions when allocating pages. Signed-off-by: CQ Tang Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c index 56dd58bef5ee..f713eabb7671 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c @@ -677,7 +677,8 @@ static int _i915_gem_object_stolen_init(struct intel_memory_region *mem, if (!stolen) return -ENOMEM; - ret = i915_gem_stolen_insert_node(i915, stolen, size, 4096); + ret = i915_gem_stolen_insert_node(i915, stolen, size, + mem->min_page_size); if (ret) goto err_free; @@ -817,8 +818,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *i915, /* KISS and expect everything to be page-aligned */ if (GEM_WARN_ON(size == 0) || - GEM_WARN_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE)) || - GEM_WARN_ON(!IS_ALIGNED(stolen_offset, I915_GTT_MIN_ALIGNMENT))) + GEM_WARN_ON(!IS_ALIGNED(size, mem->min_page_size)) || + GEM_WARN_ON(!IS_ALIGNED(stolen_offset, mem->min_page_size))) return ERR_PTR(-EINVAL); stolen = kzalloc(sizeof(*stolen), GFP_KERNEL); Reviewed-by: Tvrtko Ursulin Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 04/19] drm/i915/stolen: treat stolen local as normal local memory
On 12/04/2021 10:05, Matthew Auld wrote:
Underneath it's the same stuff, so things like the PTE_LM bits for the
GTT should just keep working as-is.
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index ce1c83c13d05..017db8f71130 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -19,7 +19,10 @@ const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops =
{
bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
{
- return obj->ops == &i915_gem_lmem_obj_ops;
+ struct intel_memory_region *mr = obj->mm.region;
+
+ return mr && (mr->type == INTEL_MEMORY_LOCAL ||
+ mr->type == INTEL_MEMORY_STOLEN_LOCAL);
}
struct drm_i915_gem_object *
Passable I guess. Although there is also i915_gem_object_is_stolen so it
is not immediately clear what are the semantics of
i915_gem_object_is_lmem vs that one. Almost like we need more
"hierarchy" in region types, or flags of some sort, but I haven't looked
at the callers to have a good idea what would work best.
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
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Re: [Intel-gfx] [PATCH 03/19] drm/i915: Create stolen memory region from local memory
On 12/04/2021 10:05, Matthew Auld wrote:
From: CQ Tang
Add "REGION_STOLEN" device info to dg1, create stolen memory
region from upper portion of local device memory, starting
from DSMBASE.
v2:
- s/drm_info/drm_dbg; userspace likely doesn't care about stolen.
- mem->type is only setup after the region probe, so setting the name
as stolen-local or stolen-system based on this value won't work. Split
system vs local stolen setup to fix this.
- kill all the region->devmem/is_devmem stuff. We already differentiate
the different types of stolen so such things shouldn't be needed
anymore.
Signed-off-by: CQ Tang
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 99 +++---
drivers/gpu/drm/i915/gem/i915_gem_stolen.h | 3 +
drivers/gpu/drm/i915/i915_pci.c| 2 +-
drivers/gpu/drm/i915/i915_reg.h| 1 +
drivers/gpu/drm/i915/intel_memory_region.c | 6 ++
drivers/gpu/drm/i915/intel_memory_region.h | 5 +-
6 files changed, 102 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index b0597de206de..56dd58bef5ee 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -10,6 +10,7 @@
#include
#include
+#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_region.h"
#include "i915_drv.h"
#include "i915_gem_stolen.h"
@@ -121,6 +122,14 @@ static int i915_adjust_stolen(struct drm_i915_private
*i915,
}
}
+ /*
+* With device local memory, we don't need to check the address range,
+* this is device memory physical address, could overlap with system
+* memory.
+*/
+ if (HAS_LMEM(i915))
+ return 0;
+
/*
* Verify that nothing else uses this physical address. Stolen
* memory should be reserved by the BIOS and hidden from the
@@ -374,8 +383,9 @@ static void icl_get_stolen_reserved(struct drm_i915_private
*i915,
}
}
-static int i915_gem_init_stolen(struct drm_i915_private *i915)
+static int i915_gem_init_stolen(struct intel_memory_region *mem)
{
+ struct drm_i915_private *i915 = mem->i915;
struct intel_uncore *uncore = &i915->uncore;
resource_size_t reserved_base, stolen_top;
resource_size_t reserved_total, reserved_size;
@@ -396,10 +406,10 @@ static int i915_gem_init_stolen(struct drm_i915_private
*i915)
return 0;
}
- if (resource_size(&intel_graphics_stolen_res) == 0)
+ if (resource_size(&mem->region) == 0)
return 0;
- i915->dsm = intel_graphics_stolen_res;
+ i915->dsm = mem->region;
if (i915_adjust_stolen(i915, &i915->dsm))
return 0;
@@ -684,23 +694,36 @@ static int _i915_gem_object_stolen_init(struct
intel_memory_region *mem,
return ret;
}
+struct intel_memory_region *i915_stolen_region(struct drm_i915_private *i915)
+{
+ if (HAS_LMEM(i915))
+ return i915->mm.regions[INTEL_REGION_STOLEN_LMEM];
+
+ return i915->mm.regions[INTEL_REGION_STOLEN_SMEM];
+}
Could be a bikeshedding comment only - especially since I think this
path gets very little used at runtime so it is most likely pointless to
fiddle with it, but it just strikes me a bit not fully elegant to do:
i915_gem_object_create_stolen
-> i915_gem_object_create_region
-> i915_stolen_region
And end up in here, when alternative could be at driver init:
i915->stolen_region_id = HAS_LMEM() ? ... : ...;
i915_gem_object_create_stolen
->
i915_gem_object_create_region(i915->mm.regions[i915->stolen_region_id]);
Or pointer to region. Would avoid having to export i915_stolen_region as
well.
Or is i915->dsm already the right thing? Because..
+
struct drm_i915_gem_object *
i915_gem_object_create_stolen(struct drm_i915_private *i915,
resource_size_t size)
{
- return
i915_gem_object_create_region(i915->mm.regions[INTEL_REGION_STOLEN_SMEM],
+ return i915_gem_object_create_region(i915_stolen_region(i915),
size, I915_BO_ALLOC_CONTIGUOUS);
}
static int init_stolen(struct intel_memory_region *mem)
{
- intel_memory_region_set_name(mem, "stolen");
+ if (HAS_LMEM(mem->i915)) {
+ if (!io_mapping_init_wc(&mem->iomap,
+ mem->io_start,
+ resource_size(&mem->region)))
+ return -EIO;
+ }
/*
* Initialise stolen early so that we may reserve preallocated
* objects for the BIOS to KMS transition.
*/
- return i915_gem_init_stolen(mem->i915);
+ return i915_gem_init_stolen(mem);
... I find the mem region init paths a bit convoluted, stolen
especially, and struggle to fig
Re: [Intel-gfx] [PATCH v2 08/12] drm/i915: finish removal of gen_mask
On 14/04/2021 14:13, Jani Nikula wrote: On Wed, 14 Apr 2021, Tvrtko Ursulin wrote: On 13/04/2021 06:09, Lucas De Marchi wrote: Now that it's not used anywhere, remove it from struct intel_device_info. To allow a period in which code will be converted to the new macro, keep IS_GEN_RANGE() around, just redefining it to use the new fields. The size advantage from IS_GEN_RANGE() using a mask is not that big as it has pretty limited use througout the driver: textdata bss dec hex filename 2758497 959656496 2860958 2ba79e drivers/gpu/drm/i915/i915.ko.old 2758586 959536496 2861035 2ba7eb drivers/gpu/drm/i915/i915.ko.new This delta refers to this patch - I mean this point in the series? Asking because it may not be 100% representative since some of the previous patches have already removed some gen mask usages. While I am here, I am a bit fond of the mask approach and wonder if using it for all (gt/media/whatelse) new fields would still make sense. Presence of the range check helpers suggests that it might, but I haven't looked at how prevalent their usage ends up after the series is done. So just in principle, I don't see why not still go with masks since that guarantees elegant check at each range check site. It would be all hidden in the macro implementation so easy. Also for historical reference, another reason why I went for masks everywhere approach is that at some point we had a feature request to allow compiling out platforms/gens. I *think* that was much easier to do with masking and in experiments back then I was able for instance to build just for Gen9+ and drop like 30% of the binary size. Oh I found the branch now.. The reason for IS_GEN(p, v) was also in that series. I don't know if I ever RFC-ed or trybotted it.. google suggests no and I neither can find it in my mailboxes. I could send out the old patches for reference? But to be honest I have no idea if this feature request (targeted driver builds) will ever resurface.. I completely agreed with the direction of using the masks way back when, especially with the goal of the conditional/targeted compilation. I think the question now is whether we want to keep maintaining them just for the sake of the masks. Keeping them means having three masks instead of one. And we wouldn't be using most of the benefits with them, we'd mostly just get the downsides. Having the masks per se is not such a big deal, but they're also not such a big deal to add back later on if needed. It's the codebase all over that's the hard part. And arguably it's not getting that much different with the series at hand; the direct uses of INTEL_GEN() and DISPLAY_VER() vastly outnumber IS_GEN(), IS_GEN_RANGE() and IS_DISPLAY_RANGE() which could benefit from the mask. We'd still be retaining the range macros as IS_GRAPHICS_VER(), IS_MEDIA_VER() and IS_DISPLAY_VER(), although more for clarity than for any other reason. Adding masks later would not a big deal, but another cycle of changing "xxx_VER == n" to "IS_xxx_VER(n)" is a churn which could presumably be avoided. It is moot yes, but I don't see a clear case for doing the reversal as part of this series. With a disclaimer that I only glanced over the commit messages today for the first time. So I think from me its neither ack or nack, at least since I don't understand the attractiveness of using the "ver == n" and numerical range check forms everywhere. As said, if we are churning I'd rather go the other direction. But that's a soft objection only so feel free to proceed. Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 08/12] drm/i915: finish removal of gen_mask
On Wed, 14 Apr 2021, Tvrtko Ursulin wrote: > On 13/04/2021 06:09, Lucas De Marchi wrote: >> Now that it's not used anywhere, remove it from struct >> intel_device_info. To allow a period in which code will be converted to >> the new macro, keep IS_GEN_RANGE() around, just redefining it to use >> the new fields. The size advantage from IS_GEN_RANGE() using a mask is >> not that big as it has pretty limited use througout the driver: >> >> textdata bss dec hex filename >> 2758497 959656496 2860958 2ba79e drivers/gpu/drm/i915/i915.ko.old >> 2758586 959536496 2861035 2ba7eb drivers/gpu/drm/i915/i915.ko.new > > This delta refers to this patch - I mean this point in the series? > Asking because it may not be 100% representative since some of the > previous patches have already removed some gen mask usages. > > While I am here, I am a bit fond of the mask approach and wonder if > using it for all (gt/media/whatelse) new fields would still make sense. > > Presence of the range check helpers suggests that it might, but I > haven't looked at how prevalent their usage ends up after the series is > done. So just in principle, I don't see why not still go with masks > since that guarantees elegant check at each range check site. It would > be all hidden in the macro implementation so easy. > > Also for historical reference, another reason why I went for masks > everywhere approach is that at some point we had a feature request to > allow compiling out platforms/gens. I *think* that was much easier to do > with masking and in experiments back then I was able for instance to > build just for Gen9+ and drop like 30% of the binary size. > > Oh I found the branch now.. The reason for IS_GEN(p, v) was also in that > series. I don't know if I ever RFC-ed or trybotted it.. google suggests > no and I neither can find it in my mailboxes. I could send out the old > patches for reference? But to be honest I have no idea if this feature > request (targeted driver builds) will ever resurface.. I completely agreed with the direction of using the masks way back when, especially with the goal of the conditional/targeted compilation. I think the question now is whether we want to keep maintaining them just for the sake of the masks. Keeping them means having three masks instead of one. And we wouldn't be using most of the benefits with them, we'd mostly just get the downsides. Having the masks per se is not such a big deal, but they're also not such a big deal to add back later on if needed. It's the codebase all over that's the hard part. And arguably it's not getting that much different with the series at hand; the direct uses of INTEL_GEN() and DISPLAY_VER() vastly outnumber IS_GEN(), IS_GEN_RANGE() and IS_DISPLAY_RANGE() which could benefit from the mask. We'd still be retaining the range macros as IS_GRAPHICS_VER(), IS_MEDIA_VER() and IS_DISPLAY_VER(), although more for clarity than for any other reason. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix "mitigations" parsing if i915 is builtin (rev2)
== Series Details == Series: drm/i915: Fix "mitigations" parsing if i915 is builtin (rev2) URL : https://patchwork.freedesktop.org/series/88998/ State : success == Summary == CI Bug Log - changes from CI_DRM_9971 -> Patchwork_19937 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/index.html Known issues Here are the changes found in Patchwork_19937 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@semaphore: - fi-bsw-nick:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/fi-bsw-nick/igt@amdgpu/amd_ba...@semaphore.html * igt@amdgpu/amd_cs_nop@sync-fork-compute0: - fi-snb-2600:NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html * igt@i915_selftest@live@gt_heartbeat: - fi-tgl-y: [PASS][3] -> [DMESG-FAIL][4] ([i915#541]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([i915#1372]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html Possible fixes * igt@i915_selftest@live@execlists: - fi-bsw-nick:[INCOMPLETE][7] ([i915#2782] / [i915#2940]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-bsw-nick/igt@i915_selftest@l...@execlists.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/fi-bsw-nick/igt@i915_selftest@l...@execlists.html * igt@i915_selftest@live@hangcheck: - fi-snb-2600:[INCOMPLETE][9] ([i915#2782]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html Warnings * igt@i915_pm_rpm@basic-rte: - fi-kbl-guc: [FAIL][11] ([i915#579]) -> [SKIP][12] ([fdo#109271]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9971/fi-kbl-guc/igt@i915_pm_...@basic-rte.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/fi-kbl-guc/igt@i915_pm_...@basic-rte.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372 [i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782 [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940 [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541 [i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579 Participating hosts (45 -> 41) -- Missing(4): fi-icl-y fi-ilk-m540 fi-bsw-cyan fi-bdw-samus Build changes - * Linux: CI_DRM_9971 -> Patchwork_19937 CI-20190529: 20190529 CI_DRM_9971: 8f38b366ca75c83434d586430306b9f83499f1b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6064: 48d89e2c65c54883b0776930a884e6d3bcefb45b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19937: fbfc58ce6f5e7ebb4a633166f528c4567f0f7f8f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == fbfc58ce6f5e drm/i915: Fix "mitigations" parsing if i915 is builtin == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19937/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix "mitigations" parsing if i915 is builtin (rev2)
== Series Details == Series: drm/i915: Fix "mitigations" parsing if i915 is builtin (rev2) URL : https://patchwork.freedesktop.org/series/88998/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Fix a lockdep warnning on RT kernel
== Series Details == Series: drm/i915/gt: Fix a lockdep warnning on RT kernel URL : https://patchwork.freedesktop.org/series/89071/ State : failure == Summary == Applying: drm/i915/gt: Fix a lockdep warning on RT kernel error: sha1 information is lacking or useless (drivers/gpu/drm/i915/gt/intel_breadcrumbs.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/i915/gt: Fix a lockdep warning on RT kernel When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Fix a lockdep warnning on RT kernel
== Series Details == Series: drm/i915/gt: Fix a lockdep warnning on RT kernel URL : https://patchwork.freedesktop.org/series/89070/ State : failure == Summary == Applying: drm/i915/gt: Fix a lockdep warnning on RT kernel error: sha1 information is lacking or useless (drivers/gpu/drm/i915/gt/intel_breadcrumbs.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/i915/gt: Fix a lockdep warnning on RT kernel When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for Old platform/gen kconfig options series
== Series Details == Series: Old platform/gen kconfig options series URL : https://patchwork.freedesktop.org/series/89069/ State : failure == Summary == Applying: drm/i915: Make I830 platform support optional Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/Kconfig M drivers/gpu/drm/i915/i915_drv.h M drivers/gpu/drm/i915/i915_pci.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/i915_pci.c CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_pci.c Auto-merging drivers/gpu/drm/i915/i915_drv.h Auto-merging drivers/gpu/drm/i915/Kconfig error: Failed to merge in the changes. hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/i915: Make I830 platform support optional When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [01/12] drm/arm: Don't set allow_fb_modifiers explicitly (rev2)
== Series Details == Series: series starting with [01/12] drm/arm: Don't set allow_fb_modifiers explicitly (rev2) URL : https://patchwork.freedesktop.org/series/88999/ State : failure == Summary == Applying: drm/arm: Don't set allow_fb_modifiers explicitly Applying: drm/arm/malidp: Always list modifiers Applying: drm/exynos: Don't set allow_fb_modifiers explicitly Applying: drm/i915: Don't set allow_fb_modifiers explicitly Applying: drm/imx: Don't set allow_fb_modifiers explicitly Applying: drm/msm/dpu1: Don't set allow_fb_modifiers explicitly Using index info to reconstruct a base tree... M drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c CONFLICT (content): Merge conflict in drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0006 drm/msm/dpu1: Don't set allow_fb_modifiers explicitly When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/modifiers: Enforce consistency between the cap an IN_FORMATS
On Wed, 14 Apr 2021 11:08:15 +0200
Daniel Vetter wrote:
> It's very confusing for userspace to have to deal with inconsistencies
> here, and some drivers screwed this up a bit. Most just ommitted the
> format list when they meant to say that only linear modifier is
> allowed, but some also meant that only implied modifiers are
> acceptable (because actually none of the planes registered supported
> modifiers).
>
> Now that this is all done consistently across all drivers, document
> the rules and enforce it in the drm core.
>
> v2:
> - Make the capability a link (Simon)
> - Note that all is lost before 5.1.
>
> Acked-by: Maxime Ripard
> Cc: Simon Ser
> Reviewed-by: Lucas Stach
> Cc: Pekka Paalanen
> Signed-off-by: Daniel Vetter
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Thomas Zimmermann
> Cc: David Airlie
> Cc: Daniel Vetter
> ---
> drivers/gpu/drm/drm_plane.c | 18 +-
> include/drm/drm_mode_config.h | 2 ++
> 2 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
> index 0dd43882fe7c..20c7a1665414 100644
> --- a/drivers/gpu/drm/drm_plane.c
> +++ b/drivers/gpu/drm/drm_plane.c
> @@ -128,6 +128,13 @@
> * pairs supported by this plane. The blob is a struct
> * drm_format_modifier_blob. Without this property the plane doesn't
> * support buffers with modifiers. Userspace cannot change this property.
> + *
> + * Note that userspace can check the &DRM_CAP_ADDFB2_MODIFIERS driver
> + * capability for general modifier support. If this flag is set then
> every
> + * plane will have the IN_FORMATS property, even when it only supports
> + * DRM_FORMAT_MOD_LINEAR. Before linux kernel release v5.1 there have
> been
> + * various bugs in this area with inconsistencies between the capability
> + * flag and per-plane properties.
> */
>
> static unsigned int drm_num_planes(struct drm_device *dev)
> @@ -277,8 +284,14 @@ static int __drm_universal_plane_init(struct drm_device
> *dev,
> format_modifier_count++;
> }
>
> - if (format_modifier_count)
> + /* autoset the cap and check for consistency across all planes */
> + if (format_modifier_count) {
> + WARN_ON(!config->allow_fb_modifiers &&
> + !list_empty(&config->plane_list));
> config->allow_fb_modifiers = true;
> + } else {
> + WARN_ON(config->allow_fb_modifiers);
> + }
>
> plane->modifier_count = format_modifier_count;
> plane->modifiers = kmalloc_array(format_modifier_count,
> @@ -360,6 +373,9 @@ static int __drm_universal_plane_init(struct drm_device
> *dev,
> * drm_universal_plane_init() to let the DRM managed resource infrastructure
> * take care of cleanup and deallocation.
> *
> + * Drivers supporting modifiers must set @format_modifiers on all their
> planes,
> + * even those that only support DRM_FORMAT_MOD_LINEAR.
> + *
> * Returns:
> * Zero on success, error code on failure.
> */
> diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
> index ab424ddd7665..1ddf7783fdf7 100644
> --- a/include/drm/drm_mode_config.h
> +++ b/include/drm/drm_mode_config.h
> @@ -909,6 +909,8 @@ struct drm_mode_config {
>* @allow_fb_modifiers:
>*
>* Whether the driver supports fb modifiers in the ADDFB2.1 ioctl call.
> + * Note that drivers should not set this directly, it is automatically
> + * set in drm_universal_plane_init().
>*
>* IMPORTANT:
>*
Acked-by: Pekka Paalanen
Thanks,
pq
pgpqBp5UgCxOF.pgp
Description: OpenPGP digital signature
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[Intel-gfx] [PATCH 0/1] drm/i915/gt: Fix a lockdep warnning on RT kernel
Hi,all This lockdep warning is only in the RT kernel. Which is introduced by this path:https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c?h=v5.12-rc7&id=9d5612ca165a58aacc160465532e7998b9aab270 Fix it. Jun Miao (1): drm/i915/gt: Fix a lockdep warnning on RT kernel drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.25.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix "mitigations" parsing if i915 is builtin
On Tue, 13 Apr 2021 19:59:34 +0300 Ville Syrjälä wrote:
>
> On Tue, Apr 13, 2021 at 05:02:40PM +0800, Jisheng Zhang wrote:
> > I met below error during boot with i915 builtin if pass
> > "i915.mitigations=off":
> > [0.015589] Booting kernel: `off' invalid for parameter
> > `i915.mitigations'
> >
> > The reason is slab subsystem isn't ready at that time, so kstrdup()
> > returns NULL. Fix this issue by using stack var instead of kstrdup().
> >
> > Fixes: 984cadea032b ("drm/i915: Allow the sysadmin to override security
> > mitigations")
> > Signed-off-by: Jisheng Zhang
> > ---
> > drivers/gpu/drm/i915/i915_mitigations.c | 7 ++-
> > 1 file changed, 2 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_mitigations.c
> > b/drivers/gpu/drm/i915/i915_mitigations.c
> > index 84f12598d145..7dadf41064e0 100644
> > --- a/drivers/gpu/drm/i915/i915_mitigations.c
> > +++ b/drivers/gpu/drm/i915/i915_mitigations.c
> > @@ -29,15 +29,13 @@ bool i915_mitigate_clear_residuals(void)
> > static int mitigations_set(const char *val, const struct kernel_param *kp)
> > {
> > unsigned long new = ~0UL;
> > - char *str, *sep, *tok;
> > + char str[64], *sep, *tok;
> > bool first = true;
> > int err = 0;
> >
> > BUILD_BUG_ON(ARRAY_SIZE(names) >= BITS_PER_TYPE(mitigations));
> >
> > - str = kstrdup(val, GFP_KERNEL);
> > - if (!str)
> > - return -ENOMEM;
> > + strncpy(str, val, sizeof(str) - 1);
>
> I don't think strncpy() guarantees that the string is properly
> terminated.
>
> Also commit b1b6bed3b503 ("usb: core: fix quirks_param_set() writing to
> a const pointer") looks broken as well given your findings, and
> arch/um/drivers/virtio_uml.c seems to suffer from this as well.
wow thank you so much. I will send out patches to fix them as well.
> kernel/params.c itself seems to have some slab_is_available() magic
> around kmalloc().
>
> I used the following cocci snippet to find these:
Nice cocci script.
> @find@
> identifier O, F;
> position PS;
> @@
> struct kernel_param_ops O = {
> ...,
> .set = F@PS
> ,...
> };
>
> @alloc@
> identifier ALLOC =~ "^k.*(alloc|dup)";
> identifier find.F;
> position PA;
> @@
> F(...) {
> <+...
> ALLOC@PA(...)
> ...+>
> }
>
> @script:python depends on alloc@
> ps << find.PS;
> pa << alloc.PA;
> @@
> coccilib.report.print_report(ps[0], "struct")
> coccilib.report.print_report(pa[0], "alloc")
>
> That could of course miss a bunch more if they allocate
> via some other function I didn't consider.
>
> --
> Ville Syrjälä
> Intel
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[Intel-gfx] [PATCH 1/1] drm/i915/gt: Fix a lockdep warning on RT kernel
Don`t simple disable all the HD-irq, should race the region in the
intel_breadcrumbs_disarm_irq() only.
BUG: sleeping function called from invalid context at
kernel/locking/rtmutex.c:969
#0: 89c4c00ca970 ((wq_completion)events){+.+.}-{0:0}, at:
process_one_work+0x1cf/0x6d0
#1: a433c1f53e60 ((work_completion)(&engine->retire_work)){+.+.}-{0:0},
at: process_one_work+0x1cf 0x6d
#2: 89c4ccb0a0a8 (kernel_context){+.+.}-{0:0}, at:
engine_retire+0x62/0x110 [i915]
#3: 89c4cf682300 (wakeref.mutex#3){+.+.}-{0:0}, at:
__intel_wakeref_put_last+0x20/0x60 [i915]
#4: 89c4ccb08398 (&b->irq_lock){+.+.}-{0:0}, at:
intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
irq event stamp: 2126
hardirqs last enabled at (2125): []
cancel_delayed_work+0xa9/0xc0
hardirqs last disabled at (2126): []
__intel_breadcrumbs_park+0x76/0x80 [i915]
softirqs last enabled at (0): [] copy_process+0x63e/0x1630
softirqs last disabled at (0): [<>] 0x0
CPU: 3 PID: 281 Comm: kworker/3:3 Not tainted 5.10.27-rt34-yocto-preempt-rt #1
Hardware name: Intel(R) Client Systems NUC7i5DNKE/NUC7i5DNB, BIOS
DNKBLi5v.86A.0064.2019.0523.1933 05/23 2019
Workqueue: events engine_retire [i915]
Call Trace:
show_stack+0x52/0x58
dump_stack+0x7d/0x9f
___might_sleep.cold+0xe3/0xf4
rt_spin_lock+0x3f/0xc0
? intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
signal_irq_work+0x241/0x660 [i915]
? __this_cpu_preempt_check+0x13/0x20
? lockdep_hardirqs_off+0x106/0x120
__intel_breadcrumbs_park+0x3f/0x80 [i915]
__engine_park+0xbd/0xe0 [i915]
intel_wakeref_put_last+0x22/0x60 [i915]
__intel_wakeref_put_last+0x50/0x60 [i915]
intel_context_exit_engine+0x5f/0x70 [i915]
i915_request_retire+0x139/0x2d0 [i915]
engine_retire+0xb0/0x110 [i915]
process_one_work+0x26d/0x6d0
worker_thread+0x53/0x330
kthread+0x1b0/0x1d0
? process_one_work+0x6d0/0x6d0
? __kthread_parkme+0xc0/0xc0
ret_from_fork+0x22/0x30
Fixes: 9d5612ca165a ("drm/i915/gt: Defer enabling the breadcrumb interrupt to
after submission")
Signed-off-by: Jun Miao
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
index 0040b4765a54..89c2874ecc76 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
@@ -103,10 +103,11 @@ static void __intel_breadcrumbs_disarm_irq(struct
intel_breadcrumbs *b)
static void intel_breadcrumbs_disarm_irq(struct intel_breadcrumbs *b)
{
- spin_lock(&b->irq_lock);
+ unsigned long flags;
+ spin_lock_irqsave(&b->irq_lock,flags);
if (b->irq_armed)
__intel_breadcrumbs_disarm_irq(b);
- spin_unlock(&b->irq_lock);
+ spin_unlock_irqrestore(&b->irq_lock,flags);
}
static void add_signaling_context(struct intel_breadcrumbs *b,
@@ -342,9 +343,7 @@ void intel_breadcrumbs_park(struct intel_breadcrumbs *b)
/* Kick the work once more to drain the signalers */
irq_work_sync(&b->irq_work);
while (unlikely(READ_ONCE(b->irq_armed))) {
- local_irq_disable();
signal_irq_work(&b->irq_work);
- local_irq_enable();
cond_resched();
}
GEM_BUG_ON(!list_empty(&b->signalers));
--
2.25.1
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[Intel-gfx] [PATCH v2] drm/i915: Fix "mitigations" parsing if i915 is builtin
I met below error during boot with i915 builtin if pass
"i915.mitigations=off":
[0.015589] Booting kernel: `off' invalid for parameter `i915.mitigations'
The reason is slab subsystem isn't ready at that time, so kstrdup()
returns NULL. Fix this issue by using stack var instead of kstrdup().
Fixes: 984cadea032b ("drm/i915: Allow the sysadmin to override security
mitigations")
Signed-off-by: Jisheng Zhang
---
Since v1:
- Ensure "str" is properly terminated. Thanks Ville for pointing this out.
drivers/gpu/drm/i915/i915_mitigations.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_mitigations.c
b/drivers/gpu/drm/i915/i915_mitigations.c
index 84f12598d145..231aad5ff46c 100644
--- a/drivers/gpu/drm/i915/i915_mitigations.c
+++ b/drivers/gpu/drm/i915/i915_mitigations.c
@@ -29,15 +29,14 @@ bool i915_mitigate_clear_residuals(void)
static int mitigations_set(const char *val, const struct kernel_param *kp)
{
unsigned long new = ~0UL;
- char *str, *sep, *tok;
+ char str[64], *sep, *tok;
bool first = true;
int err = 0;
BUILD_BUG_ON(ARRAY_SIZE(names) >= BITS_PER_TYPE(mitigations));
- str = kstrdup(val, GFP_KERNEL);
- if (!str)
- return -ENOMEM;
+ strncpy(str, val, sizeof(str) - 1);
+ str[sizeof(str) - 1] = '\0';
for (sep = str; (tok = strsep(&sep, ","));) {
bool enable = true;
@@ -86,7 +85,6 @@ static int mitigations_set(const char *val, const struct
kernel_param *kp)
break;
}
}
- kfree(str);
if (err)
return err;
--
2.31.0
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Re: [Intel-gfx] [PATCH 05/12] drm/imx: Don't set allow_fb_modifiers explicitly
Hi Daniel, On Tue, 2021-04-13 at 16:14 +0200, Lucas Stach wrote: > Am Dienstag, dem 13.04.2021 um 16:04 +0200 schrieb Daniel Vetter: > > On Tue, Apr 13, 2021 at 01:47:28PM +0200, Lucas Stach wrote: > > > Am Dienstag, dem 13.04.2021 um 11:48 +0200 schrieb Daniel Vetter: > > > > Since > > > > > > > > commit 890880ddfdbe256083170866e49c87618b706ac7 > > > > Author: Paul Kocialkowski > > > > Date: Fri Jan 4 09:56:10 2019 +0100 > > > > > > > > drm: Auto-set allow_fb_modifiers when given modifiers at plane init > > > > > > > > this is done automatically as part of plane init, if drivers set the > > > > modifier list correctly. Which is the case here. > > > > > > > > This one actually set it twice on top of what drm_plane_init does, so > > > > double-redundant! > > > > > > That's not true. imx-dcss and imx-drm are two totally separate drivers. > > > Maybe we should move imx-drm into its own ipuv3 directory one day to > > > make this more clear. Change is still correct, though. > > > > Hm I greeped for drm_universal_plane_init and didn't find anythinf for the > > imx main driver ... where are planes set up for that? Need to review that > > they have the modifiers listed in all cases. > > That's in drivers/gpu/drm/imx/ipuv3-plane.c and modifiers are always > set on plane init. > > Regards, > Lucas > > > > Reviewed-by: Lucas Stach > > > > > > > Signed-off-by: Daniel Vetter > > > > Cc: Philipp Zabel > > > > Cc: Shawn Guo > > > > Cc: Sascha Hauer > > > > Cc: Pengutronix Kernel Team > > > > Cc: Fabio Estevam > > > > Cc: NXP Linux Team > > > > Cc: linux-arm-ker...@lists.infradead.org > > > > --- > > > > drivers/gpu/drm/imx/dcss/dcss-kms.c | 1 - > > > > drivers/gpu/drm/imx/imx-drm-core.c | 1 - Nit: Since this patch touches two totally separate drivers(imx-dcss and imx-drm), it would be good to split it into two patches. Thanks, Liu Ying > > > > 2 files changed, 2 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/imx/dcss/dcss-kms.c > > > > b/drivers/gpu/drm/imx/dcss/dcss-kms.c > > > > index b549ce5e7607..37ae68a7fba5 100644 > > > > --- a/drivers/gpu/drm/imx/dcss/dcss-kms.c > > > > +++ b/drivers/gpu/drm/imx/dcss/dcss-kms.c > > > > @@ -52,7 +52,6 @@ static void dcss_kms_mode_config_init(struct > > > > dcss_kms_dev *kms) > > > > config->min_height = 1; > > > > config->max_width = 4096; > > > > config->max_height = 4096; > > > > - config->allow_fb_modifiers = true; > > > > config->normalize_zpos = true; > > > > > > > > > > > > > > > > > > > > config->funcs = &dcss_drm_mode_config_funcs; > > > > diff --git a/drivers/gpu/drm/imx/imx-drm-core.c > > > > b/drivers/gpu/drm/imx/imx-drm-core.c > > > > index 2ded8e4f32d0..8be4edaec958 100644 > > > > --- a/drivers/gpu/drm/imx/imx-drm-core.c > > > > +++ b/drivers/gpu/drm/imx/imx-drm-core.c > > > > @@ -209,7 +209,6 @@ static int imx_drm_bind(struct device *dev) > > > > drm->mode_config.max_height = 4096; > > > > drm->mode_config.funcs = &imx_drm_mode_config_funcs; > > > > drm->mode_config.helper_private = &imx_drm_mode_config_helpers; > > > > - drm->mode_config.allow_fb_modifiers = true; > > > > drm->mode_config.normalize_zpos = true; > > > > > > > > > > > > > > > > > > > > ret = drmm_mode_config_init(drm); > > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix "mitigations" parsing if i915 is builtin
Hi Ville,
On Tue, 13 Apr 2021 19:59:34 +0300 Ville Syrjälä wrote:
>
>
> On Tue, Apr 13, 2021 at 05:02:40PM +0800, Jisheng Zhang wrote:
> > I met below error during boot with i915 builtin if pass
> > "i915.mitigations=off":
> > [0.015589] Booting kernel: `off' invalid for parameter
> > `i915.mitigations'
> >
> > The reason is slab subsystem isn't ready at that time, so kstrdup()
> > returns NULL. Fix this issue by using stack var instead of kstrdup().
> >
> > Fixes: 984cadea032b ("drm/i915: Allow the sysadmin to override security
> > mitigations")
> > Signed-off-by: Jisheng Zhang
> > ---
> > drivers/gpu/drm/i915/i915_mitigations.c | 7 ++-
> > 1 file changed, 2 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_mitigations.c
> > b/drivers/gpu/drm/i915/i915_mitigations.c
> > index 84f12598d145..7dadf41064e0 100644
> > --- a/drivers/gpu/drm/i915/i915_mitigations.c
> > +++ b/drivers/gpu/drm/i915/i915_mitigations.c
> > @@ -29,15 +29,13 @@ bool i915_mitigate_clear_residuals(void)
> > static int mitigations_set(const char *val, const struct kernel_param *kp)
> > {
> > unsigned long new = ~0UL;
> > - char *str, *sep, *tok;
> > + char str[64], *sep, *tok;
> > bool first = true;
> > int err = 0;
> >
> > BUILD_BUG_ON(ARRAY_SIZE(names) >= BITS_PER_TYPE(mitigations));
> >
> > - str = kstrdup(val, GFP_KERNEL);
> > - if (!str)
> > - return -ENOMEM;
> > + strncpy(str, val, sizeof(str) - 1);
>
> I don't think strncpy() guarantees that the string is properly
> terminated.
>
> Also commit b1b6bed3b503 ("usb: core: fix quirks_param_set() writing to
> a const pointer") looks broken as well given your findings, and
> arch/um/drivers/virtio_uml.c seems to suffer from this as well.
> kernel/params.c itself seems to have some slab_is_available() magic
> around kmalloc().
Just tried the "usbcore.quirks" with usb builtin, I can't reproduce the
issue. Futher investigation shows that device_param_cb() macro is the
key, or the "6" in __level_param_cb(name, ops, arg, perm, 6) is the key.
While i915.mitigations uses module_param_cb_unsafe(), in which the level
will be "-1"
arch/um/drivers/virtio_uml.c also makes use of device_param_cb()
thanks
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[Intel-gfx] [PATCH 0/1] drm/i915/gt: Fix a lockdep warnning on RT kernel
Hi,all This lockdep warning is only in the RT kernel. Which is introduced by this path:https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c?h=v5.12-rc7&id=9d5612ca165a58aacc160465532e7998b9aab270 Fix it. Jun Miao (1): drm/i915/gt: Fix a lockdep warnning on RT kernel drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.25.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] RT-BUG report: i915/gt/intel_breadcrumbs.c
kernel version: 5.10-rt
BUG: sleeping function called from invalid context at
kernel/locking/rtmutex.c:969
[ 57.899678] in_atomic(): 0, irqs_disabled(): 1, non_block: 0, pid:
281, name: kworker/3:3
[ 57.899679] 5 locks held by kworker/3:3/281:
[ 57.899681] #0: 89c4c00ca970
((wq_completion)events){+.+.}-{0:0}, at: process_one_work+0x1cf/0x6d0
[ 57.899691] #1: a433c1f53e60
((work_completion)(&engine->retire_work)){+.+.}-{0:0}, at:
process_one_work+0x1cf/0x6d0
[ 57.899696] #2: 89c4ccb0a0a8 (kernel_context){+.+.}-{0:0}, at:
engine_retire+0x62/0x110 [i915]
[ 57.899795] #3: 89c4cf682300 (wakeref.mutex#3){+.+.}-{0:0}, at:
__intel_wakeref_put_last+0x20/0x60 [i915]
[ 57.899866] #4: 89c4ccb08398 (&b->irq_lock){+.+.}-{0:0}, at:
intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
[ 57.899937] irq event stamp: 2126
[ 57.899938] hardirqs last enabled at (2125): []
cancel_delayed_work+0xa9/0xc0
[ 57.899942] hardirqs last disabled at (2126): []
__intel_breadcrumbs_park+0x76/0x80 [i915]
[ 57.98] softirqs last enabled at (0): []
copy_process+0x63e/0x1630
[ 57.900012] softirqs last disabled at (0): [<>] 0x0
[ 57.900015] CPU: 3 PID: 281 Comm: kworker/3:3 Not tainted
5.10.27-rt34-yocto-preempt-rt #1
[ 57.900017] Hardware name: Intel(R) Client Systems
NUC7i5DNKE/NUC7i5DNB, BIOS DNKBLi5v.86A.0064.2019.0523.1933 05/23/2019
[ 57.900019] Workqueue: events engine_retire [i915]
[ 57.900091] Call Trace:
[ 57.900094] show_stack+0x52/0x58
[ 57.900100] dump_stack+0x7d/0x9f
[ 57.900108] ___might_sleep.cold+0xe3/0xf4
[ 57.900119] rt_spin_lock+0x3f/0xc0
[ 57.900122] ? intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
[ 57.900192] intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
[ 57.900264] signal_irq_work+0x241/0x660 [i915]
[ 57.900334] ? __this_cpu_preempt_check+0x13/0x20
[ 57.900339] ? lockdep_hardirqs_off+0x106/0x120
[ 57.900353] __intel_breadcrumbs_park+0x3f/0x80 [i915]
[ 57.900420] __engine_park+0xbd/0xe0 [i915]
[ 57.900490] intel_wakeref_put_last+0x22/0x60 [i915]
[ 57.900557] __intel_wakeref_put_last+0x50/0x60 [i915]
[ 57.900623] intel_context_exit_engine+0x5f/0x70 [i915]
[ 57.900694] i915_request_retire+0x139/0x2d0 [i915]
[ 57.900783] engine_retire+0xb0/0x110 [i915]
[ 57.900862] process_one_work+0x26d/0x6d0
[ 57.900886] worker_thread+0x53/0x330
[ 57.900897] kthread+0x1b0/0x1d0
[ 57.900901] ? process_one_work+0x6d0/0x6d0
[ 57.900903] ? __kthread_parkme+0xc0/0xc0
[ 57.900912] ret_from_fork+0x22/0x30
Follow patch cause this bug warning:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c?h=v5.12-rc7&id=9d5612ca165a58aacc160465532e7998b9aab270
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[Intel-gfx] [PATCH 1/1] drm/i915/gt: Fix a lockdep warnning on RT kernel
Don`t simple disable all the HD-irq, should race the region in the
intel_breadcrumbs_disarm_irq() only.
BUG: sleeping function called from invalid context at
kernel/locking/rtmutex.c:969
#0: 89c4c00ca970 ((wq_completion)events){+.+.}-{0:0}, at:
process_one_work+0x1cf/0x6d0
#1: a433c1f53e60 ((work_completion)(&engine->retire_work)){+.+.}-{0:0},
at: process_one_work+0x1cf 0x6d
#2: 89c4ccb0a0a8 (kernel_context){+.+.}-{0:0}, at:
engine_retire+0x62/0x110 [i915]
#3: 89c4cf682300 (wakeref.mutex#3){+.+.}-{0:0}, at:
__intel_wakeref_put_last+0x20/0x60 [i915]
#4: 89c4ccb08398 (&b->irq_lock){+.+.}-{0:0}, at:
intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
irq event stamp: 2126
hardirqs last enabled at (2125): []
cancel_delayed_work+0xa9/0xc0
hardirqs last disabled at (2126): []
__intel_breadcrumbs_park+0x76/0x80 [i915]
softirqs last enabled at (0): [] copy_process+0x63e/0x1630
softirqs last disabled at (0): [<>] 0x0
CPU: 3 PID: 281 Comm: kworker/3:3 Not tainted 5.10.27-rt34-yocto-preempt-rt #1
Hardware name: Intel(R) Client Systems NUC7i5DNKE/NUC7i5DNB, BIOS
DNKBLi5v.86A.0064.2019.0523.1933 05/23 2019
Workqueue: events engine_retire [i915]
Call Trace:
show_stack+0x52/0x58
dump_stack+0x7d/0x9f
___might_sleep.cold+0xe3/0xf4
rt_spin_lock+0x3f/0xc0
? intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
intel_breadcrumbs_disarm_irq+0x20/0xd0 [i915]
signal_irq_work+0x241/0x660 [i915]
? __this_cpu_preempt_check+0x13/0x20
? lockdep_hardirqs_off+0x106/0x120
__intel_breadcrumbs_park+0x3f/0x80 [i915]
__engine_park+0xbd/0xe0 [i915]
intel_wakeref_put_last+0x22/0x60 [i915]
__intel_wakeref_put_last+0x50/0x60 [i915]
intel_context_exit_engine+0x5f/0x70 [i915]
i915_request_retire+0x139/0x2d0 [i915]
engine_retire+0xb0/0x110 [i915]
process_one_work+0x26d/0x6d0
worker_thread+0x53/0x330
kthread+0x1b0/0x1d0
? process_one_work+0x6d0/0x6d0
? __kthread_parkme+0xc0/0xc0
ret_from_fork+0x22/0x30
Fixes: 9d5612ca165a ("drm/i915/gt: Defer enabling the breadcrumb interrupt to
after submission")
Signed-off-by: Jun Miao
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
index 0040b4765a54..89c2874ecc76 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
@@ -103,10 +103,11 @@ static void __intel_breadcrumbs_disarm_irq(struct
intel_breadcrumbs *b)
static void intel_breadcrumbs_disarm_irq(struct intel_breadcrumbs *b)
{
- spin_lock(&b->irq_lock);
+ unsigned long flags;
+ spin_lock_irqsave(&b->irq_lock,flags);
if (b->irq_armed)
__intel_breadcrumbs_disarm_irq(b);
- spin_unlock(&b->irq_lock);
+ spin_unlock_irqrestore(&b->irq_lock,flags);
}
static void add_signaling_context(struct intel_breadcrumbs *b,
@@ -342,9 +343,7 @@ void intel_breadcrumbs_park(struct intel_breadcrumbs *b)
/* Kick the work once more to drain the signalers */
irq_work_sync(&b->irq_work);
while (unlikely(READ_ONCE(b->irq_armed))) {
- local_irq_disable();
signal_irq_work(&b->irq_work);
- local_irq_enable();
cond_resched();
}
GEM_BUG_ON(!list_empty(&b->signalers));
--
2.25.1
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[Intel-gfx] [RFC 28/28] drm/i915: Enable dropping small cores when not enabled
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/Kconfig.platforms | 7 +++ drivers/gpu/drm/i915/i915_drv.h| 8 ++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/Kconfig.platforms b/drivers/gpu/drm/i915/Kconfig.platforms index 4208222b2aaf..9884ccb7af26 100644 --- a/drivers/gpu/drm/i915/Kconfig.platforms +++ b/drivers/gpu/drm/i915/Kconfig.platforms @@ -152,11 +152,15 @@ config DRM_I915_PLATFORM_INTEL_IVYBRIDGE help Include support for Intel Ivybridge platforms. +config DRM_I915_LP + bool + config DRM_I915_PLATFORM_INTEL_VALLEYVIEW bool "Intel Valleyview platform support" default y depends on DRM_I915 select DRM_I915_GEN7 + select DRM_I915_LP help Include support for Intel Valleyview platforms. @@ -184,6 +188,7 @@ config DRM_I915_PLATFORM_INTEL_CHERRYVIEW default y depends on DRM_I915 select DRM_I915_GEN8 + select DRM_I915_LP help Include support for Intel Cherryview platforms. @@ -203,6 +208,7 @@ config DRM_I915_PLATFORM_INTEL_BROXTON default y depends on DRM_I915 select DRM_I915_GEN9 + select DRM_I915_LP help Include support for Intel Broxton platforms. @@ -211,6 +217,7 @@ config DRM_I915_PLATFORM_INTEL_BROXTON default y depends on DRM_I915 select DRM_I915_GEN9 + select DRM_I915_LP help Include support for Intel Geminilake platforms. diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6f56f3a42cd1..b6b98de675b3 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2767,9 +2767,13 @@ intel_info(const struct drm_i915_private *dev_priv) #define IS_GEN10(p) IS_GENx(p, 10) #define IS_GEN11(p) IS_GENx(p, 11) -#define IS_LP(dev_priv)(INTEL_INFO(dev_priv)->is_lp) +#define IS_LP(dev_priv)(IS_ENABLED(CONFIG_DRM_I915_LP) && \ +(dev_priv)->info.is_lp) +#define IS_BC(dev_priv)(!IS_ENABLED(CONFIG_DRM_I915_LP) || \ +!(dev_priv)->info.is_lp) + #define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv)) -#define IS_GEN9_BC(dev_priv) (IS_GEN9(dev_priv) && !IS_LP(dev_priv)) +#define IS_GEN9_BC(dev_priv) (IS_GEN9(dev_priv) && IS_BC(dev_priv)) #define ENGINE_MASK(id)BIT(id) #define RENDER_RINGENGINE_MASK(RCS) -- 2.27.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC 25/28] drm/i915: Use IS_GEN in intel_engine_cs.c
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_engine_cs.c | 92 +++---
1 file changed, 38 insertions(+), 54 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index 32a1fee719a0..3f97e1491fad 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -156,36 +156,30 @@ __intel_engine_context_size(struct drm_i915_private
*dev_priv, u8 class)
switch (class) {
case RENDER_CLASS:
- switch (INTEL_GEN(dev_priv)) {
- default:
- MISSING_CASE(INTEL_GEN(dev_priv));
- return DEFAULT_LR_CONTEXT_RENDER_SIZE;
- case 11:
+ if (IS_GEN(dev_priv, 11, GEN_FOREVER)) {
return GEN11_LR_CONTEXT_RENDER_SIZE;
- case 10:
+ } else if (IS_GEN(dev_priv, 10, GEN_FOREVER)) {
return GEN10_LR_CONTEXT_RENDER_SIZE;
- case 9:
+ } else if (IS_GEN(dev_priv, 9, GEN_FOREVER)) {
return GEN9_LR_CONTEXT_RENDER_SIZE;
- case 8:
+ } else if (IS_GEN(dev_priv, 8, GEN_FOREVER)) {
return GEN8_LR_CONTEXT_RENDER_SIZE;
- case 7:
+ } else if (IS_GEN(dev_priv, 7, GEN_FOREVER)) {
if (IS_HASWELL(dev_priv))
return HSW_CXT_TOTAL_SIZE;
cxt_size = I915_READ(GEN7_CXT_SIZE);
return round_up(GEN7_CXT_TOTAL_SIZE(cxt_size) * 64,
PAGE_SIZE);
- case 6:
+ } else if (IS_GEN(dev_priv, 6, GEN_FOREVER)) {
cxt_size = I915_READ(CXT_SIZE);
return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
PAGE_SIZE);
- case 5:
- case 4:
- case 3:
- case 2:
- /* For the special day when i810 gets merged. */
- case 1:
+ } else if (IS_GEN(dev_priv, 1, 5)) {
return 0;
+ } else {
+ MISSING_CASE(INTEL_GEN(dev_priv));
+ return DEFAULT_LR_CONTEXT_RENDER_SIZE;
}
break;
default:
@@ -781,47 +775,39 @@ void intel_engine_get_instdone(struct intel_engine_cs
*engine,
memset(instdone, 0, sizeof(*instdone));
- switch (INTEL_GEN(dev_priv)) {
- default:
+ if (IS_GEN7(dev_priv)) {
instdone->instdone = I915_READ(RING_INSTDONE(mmio_base));
- if (engine->id != RCS)
- break;
-
- instdone->slice_common = I915_READ(GEN7_SC_INSTDONE);
- for_each_instdone_slice_subslice(dev_priv, slice, subslice) {
- instdone->sampler[slice][subslice] =
- read_subslice_reg(dev_priv, slice, subslice,
- GEN7_SAMPLER_INSTDONE);
- instdone->row[slice][subslice] =
- read_subslice_reg(dev_priv, slice, subslice,
- GEN7_ROW_INSTDONE);
+ if (engine->id == RCS) {
+ instdone->slice_common = I915_READ(GEN7_SC_INSTDONE);
+ instdone->sampler[0][0] =
I915_READ(GEN7_SAMPLER_INSTDONE);
+ instdone->row[0][0] = I915_READ(GEN7_ROW_INSTDONE);
}
- break;
- case 7:
- instdone->instdone = I915_READ(RING_INSTDONE(mmio_base));
-
- if (engine->id != RCS)
- break;
-
- instdone->slice_common = I915_READ(GEN7_SC_INSTDONE);
- instdone->sampler[0][0] = I915_READ(GEN7_SAMPLER_INSTDONE);
- instdone->row[0][0] = I915_READ(GEN7_ROW_INSTDONE);
-
- break;
- case 6:
- case 5:
- case 4:
+ } else if (IS_GEN(dev_priv, 4, 6)) {
instdone->instdone = I915_READ(RING_INSTDONE(mmio_base));
if (engine->id == RCS)
/* HACK: Using the wrong struct member */
instdone->slice_common = I915_READ(GEN4_INSTDONE1);
- break;
- case 3:
- case 2:
+ } else if (IS_GEN(dev_priv, 2, 3)) {
instdone->instdone = I915_READ(GEN2_INSTDONE);
- break;
+ } else {
+ instdone->instdone = I915_READ(RING_INSTDONE(mmio_base));
+
+ if (engine->id == RCS) {
+ instdone->slice_common = I915_READ(GEN7_SC_INSTDONE);
+ for_each_instdone_slice_subslice(dev_priv, slice,
+
[Intel-gfx] [RFC 27/28] drm/i915: Use IS_GEN in intel_lrc.c
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 29 +++--
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 55df19ec879e..63872514213c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1413,20 +1413,16 @@ static int intel_init_workaround_bb(struct
intel_engine_cs *engine)
if (GEM_WARN_ON(engine->id != RCS))
return -EINVAL;
- switch (INTEL_GEN(engine->i915)) {
- case 10:
+ if (IS_GEN10(engine->i915)) {
wa_bb_fn[0] = gen10_init_indirectctx_bb;
wa_bb_fn[1] = NULL;
- break;
- case 9:
+ } else if (IS_GEN9(engine->i915)) {
wa_bb_fn[0] = gen9_init_indirectctx_bb;
wa_bb_fn[1] = NULL;
- break;
- case 8:
+ } else if (IS_GEN8(engine->i915)) {
wa_bb_fn[0] = gen8_init_indirectctx_bb;
wa_bb_fn[1] = NULL;
- break;
- default:
+ } else {
MISSING_CASE(INTEL_GEN(engine->i915));
return 0;
}
@@ -2149,22 +2145,19 @@ static u32 intel_lr_indirect_ctx_offset(struct
intel_engine_cs *engine)
{
u32 indirect_ctx_offset;
- switch (INTEL_GEN(engine->i915)) {
- default:
- MISSING_CASE(INTEL_GEN(engine->i915));
- /* fall through */
- case 10:
+ if (IS_GEN10(engine->i915)) {
indirect_ctx_offset =
GEN10_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
- break;
- case 9:
+ } else if (IS_GEN9(engine->i915)) {
indirect_ctx_offset =
GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
- break;
- case 8:
+ } else if (IS_GEN8(engine->i915)) {
indirect_ctx_offset =
GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
- break;
+ } else {
+ MISSING_CASE(INTEL_GEN(engine->i915));
+ indirect_ctx_offset =
+ GEN10_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
}
return indirect_ctx_offset;
--
2.27.0
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[Intel-gfx] [RFC 26/28] drm/i915: Use IS_GEN in intel_guc.c
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_guc.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 21140ccd7a97..e67283947624 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -208,14 +208,10 @@ static u32 get_gt_type(struct drm_i915_private *dev_priv)
static u32 get_core_family(struct drm_i915_private *dev_priv)
{
- u32 gen = INTEL_GEN(dev_priv);
-
- switch (gen) {
- case 9:
+ if (IS_GEN9(dev_priv)) {
return GUC_CORE_FAMILY_GEN9;
-
- default:
- MISSING_CASE(gen);
+ } else {
+ MISSING_CASE(INTEL_GEN(dev_priv));
return GUC_CORE_FAMILY_UNKNOWN;
}
}
--
2.27.0
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[Intel-gfx] [RFC 24/28] drm/i915: Use IS_GEN in intel_fb_pitch_limit
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_display.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index f7a3cefaaaed..5d1d67a7c368 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13848,23 +13848,22 @@ static
u32 intel_fb_pitch_limit(struct drm_i915_private *dev_priv,
uint64_t fb_modifier, uint32_t pixel_format)
{
- u32 gen = INTEL_GEN(dev_priv);
-
- if (gen >= 9) {
+ if (IS_GEN(dev_priv, 9, GEN_FOREVER)) {
int cpp = drm_format_plane_cpp(pixel_format, 0);
/* "The stride in bytes must not exceed the of the size of 8K
* pixels and 32K bytes."
*/
return min(8192 * cpp, 32768);
- } else if (gen >= 5 && !HAS_GMCH_DISPLAY(dev_priv)) {
+ } else if (IS_GEN(dev_priv, 5, GEN_FOREVER) &&
+ !HAS_GMCH_DISPLAY(dev_priv)) {
return 32*1024;
- } else if (gen >= 4) {
+ } else if (IS_GEN(dev_priv, 4, GEN_FOREVER)) {
if (fb_modifier == I915_FORMAT_MOD_X_TILED)
return 16*1024;
else
return 32*1024;
- } else if (gen >= 3) {
+ } else if (IS_GEN(dev_priv, 3, GEN_FOREVER)) {
if (fb_modifier == I915_FORMAT_MOD_X_TILED)
return 8*1024;
else
--
2.27.0
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[Intel-gfx] [RFC 22/28] drm/i915: Use IS_GEN in stolen
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_stolen.c | 36 ++
1 file changed, 14 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index 0afd50cf71de..4a9f545f0c4e 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -356,34 +356,26 @@ int i915_gem_init_stolen(struct drm_i915_private
*dev_priv)
reserved_base = 0;
reserved_size = 0;
- switch (INTEL_GEN(dev_priv)) {
- case 2:
- case 3:
- break;
- case 4:
- if (!IS_G4X(dev_priv))
- break;
- /* fall through */
- case 5:
- g4x_get_stolen_reserved(dev_priv,
- &reserved_base, &reserved_size);
- break;
- case 6:
- gen6_get_stolen_reserved(dev_priv,
-&reserved_base, &reserved_size);
- break;
- case 7:
- gen7_get_stolen_reserved(dev_priv,
-&reserved_base, &reserved_size);
- break;
- default:
+ if (IS_GEN(dev_priv, 8, GEN_FOREVER)) {
if (IS_LP(dev_priv))
chv_get_stolen_reserved(dev_priv,
&reserved_base, &reserved_size);
else
bdw_get_stolen_reserved(dev_priv,
&reserved_base, &reserved_size);
- break;
+
+ } else if (IS_GEN(dev_priv, 7, GEN_FOREVER)) {
+ gen7_get_stolen_reserved(dev_priv,
+ &reserved_base, &reserved_size);
+ } else if (IS_GEN(dev_priv, 6, GEN_FOREVER)) {
+ gen6_get_stolen_reserved(dev_priv,
+&reserved_base, &reserved_size);
+ } else if (IS_GEN(dev_priv, 5, GEN_FOREVER)) {
+ g4x_get_stolen_reserved(dev_priv,
+ &reserved_base, &reserved_size);
+ } else if (IS_GEN(dev_priv, 4, GEN_FOREVER) && IS_G4X(dev_priv)) {
+ g4x_get_stolen_reserved(dev_priv,
+ &reserved_base, &reserved_size);
}
/* It is possible for the reserved base to be zero, but the register
--
2.27.0
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[Intel-gfx] [RFC 23/28] drm/i915: Use IS_GEN in intel_bios.c
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_bios.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index aa4df6548771..15c18d24e4e9 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -391,15 +391,12 @@ parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
bool alternate)
{
- switch (INTEL_GEN(dev_priv)) {
- case 2:
+ if (IS_GEN2(dev_priv))
return alternate ? 7 : 48000;
- case 3:
- case 4:
+ else if (IS_GEN(dev_priv, 3, 4))
return alternate ? 10 : 96000;
- default:
+ else
return alternate ? 10 : 12;
- }
}
static void
--
2.27.0
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[Intel-gfx] [RFC 21/28] drm/i915: Allow render state to be compiled out
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Makefile| 8
drivers/gpu/drm/i915/i915_gem_render_state.c | 10 --
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f55cc028b2eb..dd523e037523 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -92,10 +92,10 @@ i915-y += intel_uc.o \
intel_huc.o
# autogenerated null render state
-i915-y += intel_renderstate_gen6.o \
- intel_renderstate_gen7.o \
- intel_renderstate_gen8.o \
- intel_renderstate_gen9.o
+i915-$(CONFIG_DRM_I915_GEN6) += intel_renderstate_gen6.o
+i915-$(CONFIG_DRM_I915_GEN7) += intel_renderstate_gen7.o
+i915-$(CONFIG_DRM_I915_GEN8) += intel_renderstate_gen8.o
+i915-$(CONFIG_DRM_I915_GEN9) += intel_renderstate_gen9.o
# modesetting core code
i915-y += intel_audio.o \
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c
b/drivers/gpu/drm/i915/i915_gem_render_state.c
index f7fc0df251ac..26f7940049dc 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -45,16 +45,14 @@ render_state_get_rodata(const struct intel_engine_cs
*engine)
if (engine->id != RCS)
return NULL;
- switch (INTEL_GEN(engine->i915)) {
- case 6:
+ if (IS_GEN6(engine->i915))
return &gen6_null_state;
- case 7:
+ else if (IS_GEN7(engine->i915))
return &gen7_null_state;
- case 8:
+ else if (IS_GEN8(engine->i915))
return &gen8_null_state;
- case 9:
+ else if (IS_GEN9(engine->i915))
return &gen9_null_state;
- }
return NULL;
}
--
2.27.0
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[Intel-gfx] [RFC 20/28] drm/i915: Use IS_GEN in execbuffer
From: Tvrtko Ursulin
Stop caching the gen and use the macros to enable compile time
optimisation.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 22b8ba9c94a2..090b43be3153 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -221,7 +221,6 @@ struct i915_execbuffer {
struct drm_mm_node node; /** temporary GTT binding */
unsigned long vaddr; /** Current kmap address */
unsigned long page; /** Currently mapped page index */
- unsigned int gen; /** Cached value of INTEL_GEN */
bool use_64bit_reloc : 1;
bool has_llc : 1;
bool has_fence : 1;
@@ -848,10 +847,9 @@ static void reloc_cache_init(struct reloc_cache *cache,
cache->page = -1;
cache->vaddr = 0;
/* Must be a variable in the struct to allow GCC to unroll. */
- cache->gen = INTEL_GEN(i915);
cache->has_llc = HAS_LLC(i915);
cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
- cache->has_fence = cache->gen < 4;
+ cache->has_fence = IS_GEN(i915, GEN_FOREVER, 3);
cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment;
cache->node.allocated = false;
cache->rq = NULL;
@@ -1113,7 +,8 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
err = eb->engine->emit_bb_start(rq,
batch->node.start, PAGE_SIZE,
- cache->gen > 5 ? 0 :
I915_DISPATCH_SECURE);
+ IS_GEN(eb->i915, 6, GEN_FOREVER) ?
+ 0 : I915_DISPATCH_SECURE);
if (err)
goto err_request;
@@ -1192,14 +1191,13 @@ relocate_entry(struct i915_vma *vma,
if (!eb->reloc_cache.vaddr &&
(DBG_FORCE_RELOC == FORCE_GPU_RELOC ||
!reservation_object_test_signaled_rcu(vma->resv, true))) {
- const unsigned int gen = eb->reloc_cache.gen;
unsigned int len;
u32 *batch;
u64 addr;
if (wide)
len = offset & 7 ? 8 : 5;
- else if (gen >= 4)
+ else if (IS_GEN(eb->i915, 4, GEN_FOREVER))
len = 4;
else
len = 3;
@@ -1229,12 +1227,12 @@ relocate_entry(struct i915_vma *vma,
*batch++ = lower_32_bits(target_offset);
*batch++ = upper_32_bits(target_offset);
}
- } else if (gen >= 6) {
+ } else if (IS_GEN(eb->i915, 6, GEN_FOREVER)) {
*batch++ = MI_STORE_DWORD_IMM_GEN4;
*batch++ = 0;
*batch++ = addr;
*batch++ = target_offset;
- } else if (gen >= 4) {
+ } else if (IS_GEN(eb->i915, 4, GEN_FOREVER)) {
*batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
*batch++ = 0;
*batch++ = addr;
--
2.27.0
___
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[Intel-gfx] [RFC 18/28] drm/i915: Use Gen Kconfig items in IS_GEN macro
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4f140e95207e..0e65e0bc3d09 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2557,13 +2557,42 @@ intel_info(const struct drm_i915_private *dev_priv)
(s) != GEN_FOREVER ? (s) - 1 : 0) \
)
+#define __gen_test_mask(s, e) \
+({ \
+ u16 m__ = (u16)INTEL_GEN_MASK((s), (e)); \
+\
+ m__ &= ~BIT(0); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN2)) \
+ m__ &= ~BIT(1); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN3)) \
+ m__ &= ~BIT(2); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN4)) \
+ m__ &= ~BIT(3); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN5)) \
+ m__ &= ~BIT(4); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN6)) \
+ m__ &= ~BIT(5); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN7)) \
+ m__ &= ~BIT(6); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN8)) \
+ m__ &= ~BIT(7); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN9)) \
+ m__ &= ~BIT(8); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN10)) \
+ m__ &= ~BIT(9); \
+ if (!IS_ENABLED(CONFIG_DRM_I915_GEN11)) \
+ m__ &= ~BIT(10); \
+\
+ m__; \
+})
+
/*
* Returns true if Gen is in inclusive range [Start, End].
*
* Use GEN_FOREVER for unbound start and or end.
*/
#define IS_GEN(dev_priv, s, e) \
- (!!((dev_priv)->info.gen_mask & INTEL_GEN_MASK((s), (e
+ (!!(__gen_test_mask((s), (e)) & (dev_priv)->info.gen_mask))
/*
* Return true if revision is in range [since,until] inclusive.
--
2.27.0
___
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[Intel-gfx] [RFC 13/28] drm/i915: Make Gen10 platform support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 11 +++
drivers/gpu/drm/i915/i915_drv.h| 6 --
drivers/gpu/drm/i915/i915_pci.c| 4
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index 5a7aeebee482..3d4d6deea0de 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -230,3 +230,14 @@ config DRM_I915_PLATFORM_INTEL_BROXTON
help
Include support for Intel Coffeelake platforms.
+config DRM_I915_GEN10
+ bool
+
+config DRM_I915_PLATFORM_INTEL_CANNONLAKE
+ bool "Intel Cannonlake platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN10
+ help
+ Include support for Intel Cannonlake platforms.
+
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 32b22b379a0c..90a83876b72d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2611,7 +2611,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_KABYLAKE(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_KABYLAKE)
#define IS_GEMINILAKE(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_GEMINILAKE)
#define IS_COFFEELAKE(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_COFFEELAKE)
-#define IS_CANNONLAKE(dev_priv)IS_PLATFORM(dev_priv, INTEL_CANNONLAKE)
+#define IS_CANNONLAKE(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_CANNONLAKE)
#define IS_ICELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ICELAKE)
#define IS_MOBILE(dev_priv)((dev_priv)->info.is_mobile)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
@@ -2747,7 +2747,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN9(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN9) && \
((dev_priv)->info.gen_mask & BIT(8)))
-#define IS_GEN10(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(9)))
+#define IS_GEN10(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN10) && \
+((dev_priv)->info.gen_mask & BIT(9)))
#define IS_GEN11(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(10)))
#define IS_LP(dev_priv)(INTEL_INFO(dev_priv)->is_lp)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 49b0cbfcd76c..4d0d84dec9df 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -629,6 +629,7 @@ static const struct intel_device_info
intel_coffeelake_gt3_info = {
.ddb_size = 1024, \
GLK_COLORS
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_CANNONLAKE
static const struct intel_device_info intel_cannonlake_info = {
GEN10_FEATURES,
.is_alpha_support = 1,
@@ -636,6 +637,7 @@ static const struct intel_device_info intel_cannonlake_info
= {
.gen = 10,
.gt = 2,
};
+#endif
#define GEN11_FEATURES \
GEN10_FEATURES, \
@@ -759,7 +761,9 @@ static const struct pci_device_id pciidlist[] = {
INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_CANNONLAKE
INTEL_CNL_IDS(&intel_cannonlake_info),
+#endif
{0, 0, 0}
};
MODULE_DEVICE_TABLE(pci, pciidlist);
--
2.27.0
___
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[Intel-gfx] [RFC 17/28] drm/i915: Favour IS_GENx
From: Tvrtko Ursulin
Replace INTEL_GEN (not-)equals with IS_GENx for more optimisation
opportunities.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
drivers/gpu/drm/i915/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 6 +++---
drivers/gpu/drm/i915/intel_ringbuffer.h | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index 298f8996cc54..3983d6a44f78 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -483,7 +483,7 @@ void intel_device_info_runtime_init(struct
intel_device_info *info)
if (INTEL_GEN(dev_priv) >= 10) {
for_each_pipe(dev_priv, pipe)
info->num_scalers[pipe] = 2;
- } else if (INTEL_GEN(dev_priv) == 9) {
+ } else if (IS_GEN9(dev_priv)) {
info->num_scalers[PIPE_A] = 2;
info->num_scalers[PIPE_B] = 2;
info->num_scalers[PIPE_C] = 1;
@@ -578,7 +578,7 @@ void intel_device_info_runtime_init(struct
intel_device_info *info)
cherryview_sseu_info_init(dev_priv);
else if (IS_BROADWELL(dev_priv))
broadwell_sseu_info_init(dev_priv);
- else if (INTEL_GEN(dev_priv) == 9)
+ else if (IS_GEN9(dev_priv))
gen9_sseu_info_init(dev_priv);
else if (INTEL_GEN(dev_priv) >= 10)
gen10_sseu_info_init(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index d7d1ac79c38a..0ad854095c38 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -94,7 +94,7 @@ static int intel_fbc_calculate_cfb_size(struct
drm_i915_private *dev_priv,
int lines;
intel_fbc_get_plane_source_size(cache, NULL, &lines);
- if (INTEL_GEN(dev_priv) == 7)
+ if (IS_GEN7(dev_priv))
lines = min(lines, 2048);
else if (INTEL_GEN(dev_priv) >= 8)
lines = min(lines, 2560);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6f98d144924e..b026b020d8b8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7554,7 +7554,7 @@ unsigned long i915_chipset_val(struct drm_i915_private
*dev_priv)
{
unsigned long val;
- if (INTEL_GEN(dev_priv) != 5)
+ if (!IS_GEN5(dev_priv))
return 0;
spin_lock_irq(&mchdev_lock);
@@ -7638,7 +7638,7 @@ static void __i915_update_gfx_val(struct drm_i915_private
*dev_priv)
void i915_update_gfx_val(struct drm_i915_private *dev_priv)
{
- if (INTEL_GEN(dev_priv) != 5)
+ if (!IS_GEN5(dev_priv))
return;
spin_lock_irq(&mchdev_lock);
@@ -7689,7 +7689,7 @@ unsigned long i915_gfx_val(struct drm_i915_private
*dev_priv)
{
unsigned long val;
- if (INTEL_GEN(dev_priv) != 5)
+ if (!IS_GEN5(dev_priv))
return 0;
spin_lock_irq(&mchdev_lock);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 8f1a4badf812..6b9a0c7f0af4 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -85,11 +85,11 @@ hangcheck_action_to_str(const enum
intel_engine_hangcheck_action a)
#define I915_MAX_SUBSLICES 3
#define instdone_slice_mask(dev_priv__) \
- (INTEL_GEN(dev_priv__) == 7 ? \
+ (IS_GEN7(dev_priv__) ? \
1 : INTEL_INFO(dev_priv__)->sseu.slice_mask)
#define instdone_subslice_mask(dev_priv__) \
- (INTEL_GEN(dev_priv__) == 7 ? \
+ (IS_GEN7(dev_priv__) ? \
1 : INTEL_INFO(dev_priv__)->sseu.subslice_mask)
#define for_each_instdone_slice_subslice(dev_priv__, slice__, subslice__) \
--
2.27.0
___
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[Intel-gfx] [RFC 15/28] drm/i915: Simplify IS_GEN macros
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h | 44 +++-- 1 file changed, 14 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index fa5aa0e3a776..4f140e95207e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2723,36 +2723,20 @@ intel_info(const struct drm_i915_private *dev_priv) * have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular * chips, etc.). */ -#define IS_GEN2(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN2) && \ -((dev_priv)->info.gen_mask & BIT(1))) -#define IS_GEN3(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN3) && \ -((dev_priv)->info.gen_mask & BIT(2))) -#define IS_GEN4(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN4) && \ -((dev_priv)->info.gen_mask & BIT(3))) -#define IS_GEN5(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN5) && \ -((dev_priv)->info.gen_mask & BIT(4))) -#define IS_GEN6(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN6) && \ -((dev_priv)->info.gen_mask & BIT(5))) -#define IS_GEN7(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN7) && \ -((dev_priv)->info.gen_mask & BIT(6))) -#define IS_GEN8(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN8) && \ -((dev_priv)->info.gen_mask & BIT(7))) -#define IS_GEN9(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN9) && \ -((dev_priv)->info.gen_mask & BIT(8))) -#define IS_GEN10(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN10) && \ -((dev_priv)->info.gen_mask & BIT(9))) -#define IS_GEN11(dev_priv) \ - (IS_ENABLED(CONFIG_DRM_I915_GEN11) && \ -((dev_priv)->info.gen_mask & BIT(10))) +#define IS_GENx(p, g) \ + (IS_ENABLED(CONFIG_DRM_I915_GEN##g) && \ +((p)->info.gen_mask & BIT((g) - 1))) + +#define IS_GEN2(p) IS_GENx(p, 2) +#define IS_GEN3(p) IS_GENx(p, 3) +#define IS_GEN4(p) IS_GENx(p, 4) +#define IS_GEN5(p) IS_GENx(p, 5) +#define IS_GEN6(p) IS_GENx(p, 6) +#define IS_GEN7(p) IS_GENx(p, 7) +#define IS_GEN8(p) IS_GENx(p, 8) +#define IS_GEN9(p) IS_GENx(p, 9) +#define IS_GEN10(p) IS_GENx(p, 10) +#define IS_GEN11(p) IS_GENx(p, 11) #define IS_LP(dev_priv)(INTEL_INFO(dev_priv)->is_lp) #define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv)) -- 2.27.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC 16/28] drm/i915: Use INTEL_GEN everywhere
From: Tvrtko Ursulin
Coccinelle patch:
@@
identifier p;
@@
-INTEL_INFO(p)->gen
+INTEL_GEN(p)
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 4 ++--
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 2 +-
drivers/gpu/drm/i915/intel_audio.c | 2 +-
drivers/gpu/drm/i915/intel_bios.c | 2 +-
drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
drivers/gpu/drm/i915/intel_ddi.c| 2 +-
drivers/gpu/drm/i915/intel_display.c| 12 ++--
drivers/gpu/drm/i915/intel_dp.c | 4 ++--
drivers/gpu/drm/i915/intel_lvds.c | 2 +-
drivers/gpu/drm/i915/intel_mocs.c | 2 +-
drivers/gpu/drm/i915/intel_panel.c | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 8
drivers/gpu/drm/i915/intel_psr.c| 4 ++--
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 6 +++---
16 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 349f127330c8..fc68b35854df 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5424,10 +5424,10 @@ i915_gem_load_init_fences(struct drm_i915_private
*dev_priv)
{
int i;
- if (INTEL_INFO(dev_priv)->gen >= 7 && !IS_VALLEYVIEW(dev_priv) &&
+ if (INTEL_GEN(dev_priv) >= 7 && !IS_VALLEYVIEW(dev_priv) &&
!IS_CHERRYVIEW(dev_priv))
dev_priv->num_fence_regs = 32;
- else if (INTEL_INFO(dev_priv)->gen >= 4 ||
+ else if (INTEL_GEN(dev_priv) >= 4 ||
IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
IS_G33(dev_priv) || IS_PINEVIEW(dev_priv))
dev_priv->num_fence_regs = 16;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 955ce7bee448..0c0f1affddad 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2109,7 +2109,7 @@ static int __hw_ppgtt_init(struct i915_hw_ppgtt *ppgtt,
ppgtt->base.i915 = dev_priv;
ppgtt->base.dma = &dev_priv->drm.pdev->dev;
- if (INTEL_INFO(dev_priv)->gen < 8)
+ if (INTEL_GEN(dev_priv) < 8)
return gen6_ppgtt_init(ppgtt);
else
return gen8_ppgtt_init(ppgtt);
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index d3f222fa6356..f18da9e2be8e 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -356,7 +356,7 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
reserved_base = 0;
reserved_size = 0;
- switch (INTEL_INFO(dev_priv)->gen) {
+ switch (INTEL_GEN(dev_priv)) {
case 2:
case 3:
break;
diff --git a/drivers/gpu/drm/i915/intel_audio.c
b/drivers/gpu/drm/i915/intel_audio.c
index 522d54fecb53..ff455c724775 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -704,7 +704,7 @@ void intel_init_audio_hooks(struct drm_i915_private
*dev_priv)
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
dev_priv->display.audio_codec_enable = ilk_audio_codec_enable;
dev_priv->display.audio_codec_disable = ilk_audio_codec_disable;
- } else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8) {
+ } else if (IS_HASWELL(dev_priv) || INTEL_GEN(dev_priv) >= 8) {
dev_priv->display.audio_codec_enable = hsw_audio_codec_enable;
dev_priv->display.audio_codec_disable = hsw_audio_codec_disable;
} else if (HAS_PCH_SPLIT(dev_priv)) {
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index 4e74aa2f16bc..aa4df6548771 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -391,7 +391,7 @@ parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
bool alternate)
{
- switch (INTEL_INFO(dev_priv)->gen) {
+ switch (INTEL_GEN(dev_priv)) {
case 2:
return alternate ? 7 : 48000;
case 3:
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
b/drivers/gpu/drm/i915/intel_cdclk.c
index ee788d5be5e3..aab6d1538fff 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2233,7 +2233,7 @@ static int intel_compute_max_dotclk(struct
drm_i915_private *dev_priv)
return max_cdclk_freq;
else if (IS_CHERRYVIEW(dev_priv))
return max_cdclk_freq*95/100;
- else if (INTEL_INFO(dev_priv)->gen < 4)
+ else if (INTEL_GEN(dev_priv) < 4)
return 2*max_cdclk_freq*90/100;
else
return max_cdclk_freq*90/100;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu
[Intel-gfx] [RFC 11/28] drm/i915: Make Gen8 platform support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 19 +++
drivers/gpu/drm/i915/i915_drv.h| 8 +---
drivers/gpu/drm/i915/i915_pci.c| 8
3 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index 1fe95996879a..346d440d049c 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -167,3 +167,22 @@ config DRM_I915_PLATFORM_INTEL_HASWELL
select DRM_I915_GEN7
help
Include support for Intel Haswell platforms.
+
+config DRM_I915_GEN8
+ bool
+
+config DRM_I915_PLATFORM_INTEL_BROADWELL
+ bool "Intel Broadwell platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN8
+ help
+ Include support for Intel Broadwell platforms.
+
+config DRM_I915_PLATFORM_INTEL_CHERRYVIEW
+ bool "Intel Cherryview platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN8
+ help
+ Include support for Intel Cherryview platforms.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1b82dadc7b0b..6658015c4a9f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2603,9 +2603,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
(dev_priv)->info.gt == 1)
#define IS_VALLEYVIEW(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_VALLEYVIEW)
-#define IS_CHERRYVIEW(dev_priv)IS_PLATFORM(dev_priv, INTEL_CHERRYVIEW)
+#define IS_CHERRYVIEW(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_CHERRYVIEW)
#define IS_HASWELL(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_HASWELL)
-#define IS_BROADWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROADWELL)
+#define IS_BROADWELL(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_BROADWELL)
#define IS_SKYLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_SKYLAKE)
#define IS_BROXTON(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROXTON)
#define IS_KABYLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_KABYLAKE)
@@ -2736,7 +2736,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN7(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN7) && \
((dev_priv)->info.gen_mask & BIT(6)))
-#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
+#define IS_GEN8(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN8) && \
+((dev_priv)->info.gen_mask & BIT(7)))
#define IS_GEN9(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(8)))
#define IS_GEN10(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(9)))
#define IS_GEN11(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(10)))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 205a8fc5e8be..4645f3e2eea4 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -430,6 +430,7 @@ static const struct intel_device_info
intel_haswell_gt3_info = {
.gen = 8, \
.platform = INTEL_BROADWELL
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_BROADWELL
static const struct intel_device_info intel_broadwell_gt1_info = {
BDW_PLATFORM,
.gt = 1,
@@ -453,7 +454,9 @@ static const struct intel_device_info
intel_broadwell_gt3_info = {
.gt = 3,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
};
+#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_CHERRYVIEW
static const struct intel_device_info intel_cherryview_info = {
.gen = 8, .num_pipes = 3,
.has_hotplug = 1,
@@ -477,6 +480,7 @@ static const struct intel_device_info intel_cherryview_info
= {
CURSOR_OFFSETS,
CHV_COLORS,
};
+#endif
#define GEN9_DEFAULT_PAGE_SIZES \
.page_sizes = I915_GTT_PAGE_SIZE_4K | \
@@ -708,11 +712,15 @@ static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_VALLEYVIEW
INTEL_VLV_IDS(&intel_valleyview_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_BROADWELL
INTEL_BDW_GT1_IDS(&intel_broadwell_gt1_info),
INTEL_BDW_GT2_IDS(&intel_broadwell_gt2_info),
INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info),
INTEL_BDW_RSVD_IDS(&intel_broadwell_rsvd_info),
+#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_CHERRYVIEW
INTEL_CHV_IDS(&intel_cherryview_info),
+#endif
INTEL_SKL_GT1_IDS(&intel_skylake_gt1_info),
INTEL_SKL_GT2_IDS(&intel_skylake_gt2_info),
INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info),
--
2.27.0
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[Intel-gfx] [RFC 12/28] drm/i915: Make Gen9 platform support optional
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/Kconfig.platforms | 44 + drivers/gpu/drm/i915/i915_drv.h| 53 +++--- drivers/gpu/drm/i915/i915_pci.c| 22 +++ 3 files changed, 96 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/Kconfig.platforms b/drivers/gpu/drm/i915/Kconfig.platforms index 346d440d049c..5a7aeebee482 100644 --- a/drivers/gpu/drm/i915/Kconfig.platforms +++ b/drivers/gpu/drm/i915/Kconfig.platforms @@ -186,3 +186,47 @@ config DRM_I915_PLATFORM_INTEL_CHERRYVIEW select DRM_I915_GEN8 help Include support for Intel Cherryview platforms. + +config DRM_I915_GEN9 + bool + +config DRM_I915_PLATFORM_INTEL_SKYLAKE + bool "Intel Skylake platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN9 + help + Include support for Intel Skylake platforms. + +config DRM_I915_PLATFORM_INTEL_BROXTON + bool "Intel Broxton platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN9 + help + Include support for Intel Broxton platforms. + + config DRM_I915_PLATFORM_INTEL_GEMINILAKE + bool "Intel Geminilake platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN9 + help + Include support for Intel Geminilake platforms. + + config DRM_I915_PLATFORM_INTEL_KABYLAKE + bool "Intel Kabylake platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN9 + help + Include support for Intel Kabylake platforms. + + config DRM_I915_PLATFORM_INTEL_COFFEELAKE + bool "Intel Coffeelake platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN9 + help + Include support for Intel Coffeelake platforms. + diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6658015c4a9f..32b22b379a0c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2606,11 +2606,11 @@ intel_info(const struct drm_i915_private *dev_priv) #define IS_CHERRYVIEW(dev_priv)IS_OPT_PLATFORM(dev_priv, INTEL_CHERRYVIEW) #define IS_HASWELL(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_HASWELL) #define IS_BROADWELL(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_BROADWELL) -#define IS_SKYLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_SKYLAKE) -#define IS_BROXTON(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROXTON) -#define IS_KABYLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_KABYLAKE) -#define IS_GEMINILAKE(dev_priv)IS_PLATFORM(dev_priv, INTEL_GEMINILAKE) -#define IS_COFFEELAKE(dev_priv)IS_PLATFORM(dev_priv, INTEL_COFFEELAKE) +#define IS_SKYLAKE(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_SKYLAKE) +#define IS_BROXTON(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_BROXTON) +#define IS_KABYLAKE(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_KABYLAKE) +#define IS_GEMINILAKE(dev_priv)IS_OPT_PLATFORM(dev_priv, INTEL_GEMINILAKE) +#define IS_COFFEELAKE(dev_priv)IS_OPT_PLATFORM(dev_priv, INTEL_COFFEELAKE) #define IS_CANNONLAKE(dev_priv)IS_PLATFORM(dev_priv, INTEL_CANNONLAKE) #define IS_ICELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ICELAKE) #define IS_MOBILE(dev_priv)((dev_priv)->info.is_mobile) @@ -2633,22 +2633,26 @@ intel_info(const struct drm_i915_private *dev_priv) #define IS_HSW_ULX(dev_priv) (IS_HASWELL(dev_priv) && \ (INTEL_DEVID(dev_priv) == 0x0A0E || \ INTEL_DEVID(dev_priv) == 0x0A1E)) -#define IS_SKL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x1906 || \ -INTEL_DEVID(dev_priv) == 0x1913 || \ -INTEL_DEVID(dev_priv) == 0x1916 || \ -INTEL_DEVID(dev_priv) == 0x1921 || \ -INTEL_DEVID(dev_priv) == 0x1926) -#define IS_SKL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x190E || \ -INTEL_DEVID(dev_priv) == 0x1915 || \ -INTEL_DEVID(dev_priv) == 0x191E) -#define IS_KBL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x5906 || \ -INTEL_DEVID(dev_priv) == 0x5913 || \ -INTEL_DEVID(dev_priv) == 0x5916 || \ -INTEL_DEVID(dev_priv) == 0x5921 || \ -INTEL_DEVID(dev_priv) == 0x5926) -#define IS_KBL_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x590E || \ -INTEL_DEVID(dev_priv) == 0x5915 || \ -INTEL_DEVID(dev_priv) == 0x591E) +#define IS_SKL_ULT(dev_priv) (IS_SKYLAKE(dev_priv) && \ +(INTEL_DEVID(dev_priv) == 0x1906 || \ + INTEL_DEVID(dev_priv) == 0x1913 || \ + IN
[Intel-gfx] [RFC 14/28] drm/i915: Make Gen11 platform support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 11 +++
drivers/gpu/drm/i915/i915_drv.h| 6 --
drivers/gpu/drm/i915/i915_pci.c| 2 ++
3 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index 3d4d6deea0de..4208222b2aaf 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -241,3 +241,14 @@ config DRM_I915_PLATFORM_INTEL_CANNONLAKE
help
Include support for Intel Cannonlake platforms.
+config DRM_I915_GEN11
+ bool
+
+config DRM_I915_PLATFORM_INTEL_ICELAKE
+ bool "Intel Icelake platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN11
+ help
+ Include support for Intel Icelake platforms.
+
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 90a83876b72d..fa5aa0e3a776 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2612,7 +2612,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEMINILAKE(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_GEMINILAKE)
#define IS_COFFEELAKE(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_COFFEELAKE)
#define IS_CANNONLAKE(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_CANNONLAKE)
-#define IS_ICELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ICELAKE)
+#define IS_ICELAKE(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_ICELAKE)
#define IS_MOBILE(dev_priv)((dev_priv)->info.is_mobile)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
@@ -2750,7 +2750,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN10(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN10) && \
((dev_priv)->info.gen_mask & BIT(9)))
-#define IS_GEN11(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(10)))
+#define IS_GEN11(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN11) && \
+((dev_priv)->info.gen_mask & BIT(10)))
#define IS_LP(dev_priv)(INTEL_INFO(dev_priv)->is_lp)
#define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 4d0d84dec9df..44de0057f19c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -645,12 +645,14 @@ static const struct intel_device_info
intel_cannonlake_info = {
.ddb_size = 2048, \
.has_csr = 0
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_ICELAKE
static const struct intel_device_info intel_icelake_11_info = {
GEN11_FEATURES,
.platform = INTEL_ICELAKE,
.is_alpha_support = 1,
.has_resource_streamer = 0,
};
+#endif
/*
* Make sure any device matches here are from most specific to most
--
2.27.0
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[Intel-gfx] [RFC 06/28] drm/i915: Make Gen3 platforms support optional
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/Kconfig.platforms | 51 ++ drivers/gpu/drm/i915/i915_drv.h| 22 ++- drivers/gpu/drm/i915/i915_pci.c| 28 +- 3 files changed, 90 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/Kconfig.platforms b/drivers/gpu/drm/i915/Kconfig.platforms index 23a44c8eb07b..1fa09884a290 100644 --- a/drivers/gpu/drm/i915/Kconfig.platforms +++ b/drivers/gpu/drm/i915/Kconfig.platforms @@ -32,3 +32,54 @@ config DRM_I915_PLATFORM_INTEL_I865G select DRM_I915_GEN2 help Include support for Intel i865G platform. + +config DRM_I915_GEN3 + bool + +config DRM_I915_PLATFORM_INTEL_I915G + bool "Intel i915G platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN3 + help + Include support for Intel i915G platform. + +config DRM_I915_PLATFORM_INTEL_I915GM + bool "Intel i915GM platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN3 + help + Include support for Intel i915GM platform. + +config DRM_I915_PLATFORM_INTEL_I945G + bool "Intel i945G platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN3 + help + Include support for Intel i945G platform. + +config DRM_I915_PLATFORM_INTEL_I945GM + bool "Intel i945GM platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN3 + help + Include support for Intel i945GM platform. + +config DRM_I915_PLATFORM_INTEL_G33 + bool "Intel G33 platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN3 + help + Include support for Intel G33 platform. + +config DRM_I915_PLATFORM_INTEL_PINEVIEW + bool "Intel Pineview platform support" + default y + depends on DRM_I915 + select DRM_I915_GEN3 + help + Include support for Intel Pineview platform. diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f718655294ea..949a8bf54d55 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2582,19 +2582,21 @@ intel_info(const struct drm_i915_private *dev_priv) #define IS_I845G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I845G) #define IS_I85X(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I85X) #define IS_I865G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I865G) -#define IS_I915G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I915G) -#define IS_I915GM(dev_priv)IS_PLATFORM(dev_priv, INTEL_I915GM) -#define IS_I945G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I945G) -#define IS_I945GM(dev_priv)IS_PLATFORM(dev_priv, INTEL_I945GM) +#define IS_I915G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I915G) +#define IS_I915GM(dev_priv)IS_OPT_PLATFORM(dev_priv, INTEL_I915GM) +#define IS_I945G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I945G) +#define IS_I945GM(dev_priv)IS_OPT_PLATFORM(dev_priv, INTEL_I945GM) #define IS_I965G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I965G) #define IS_I965GM(dev_priv)IS_PLATFORM(dev_priv, INTEL_I965GM) #define IS_G45(dev_priv) IS_PLATFORM(dev_priv, INTEL_G45) #define IS_GM45(dev_priv) IS_PLATFORM(dev_priv, INTEL_GM45) #define IS_G4X(dev_priv) (IS_G45(dev_priv) || IS_GM45(dev_priv)) -#define IS_PINEVIEW_G(dev_priv)(INTEL_DEVID(dev_priv) == 0xa001) -#define IS_PINEVIEW_M(dev_priv)(INTEL_DEVID(dev_priv) == 0xa011) -#define IS_PINEVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_PINEVIEW) -#define IS_G33(dev_priv) IS_PLATFORM(dev_priv, INTEL_G33) +#define IS_PINEVIEW_G(dev_priv)(IS_OPT_PLATFORM(dev_priv, INTEL_PINEVIEW) && \ + (INTEL_DEVID(dev_priv) == 0xa001)) +#define IS_PINEVIEW_M(dev_priv)(IS_OPT_PLATFORM(dev_priv, INTEL_PINEVIEW) && \ + (INTEL_DEVID(dev_priv) == 0xa011)) +#define IS_PINEVIEW(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_PINEVIEW) +#define IS_G33(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_G33) #define IS_IRONLAKE_M(dev_priv)(INTEL_DEVID(dev_priv) == 0x0046) #define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE) #define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \ @@ -2717,7 +2719,9 @@ intel_info(const struct drm_i915_private *dev_priv) #define IS_GEN2(dev_priv) \ (IS_ENABLED(CONFIG_DRM_I915_GEN2) && \ ((dev_priv)->info.gen_mask & BIT(1))) -#define IS_GEN3(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(2))) +#define IS_GEN3(dev_priv) \ + (IS_ENABLED(CONFIG_DRM_I915_GEN3) && \ +((dev_priv)->info.gen_mask & BIT(2))) #define IS_GEN4(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(3))) #define IS_GEN5(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(4))) #define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5))) di
[Intel-gfx] [RFC 10/28] drm/i915: Make Gen7/7.5 platform support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 26 ++
drivers/gpu/drm/i915/i915_drv.h| 15 +--
drivers/gpu/drm/i915/i915_pci.c| 14 ++
3 files changed, 49 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index 1302eb3989be..1fe95996879a 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -141,3 +141,29 @@ config DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
help
Include support for Intel Sandybridge platforms.
+config DRM_I915_GEN7
+ bool
+
+config DRM_I915_PLATFORM_INTEL_IVYBRIDGE
+ bool "Intel Ivybridge platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN7
+ help
+ Include support for Intel Ivybridge platforms.
+
+config DRM_I915_PLATFORM_INTEL_VALLEYVIEW
+ bool "Intel Valleyview platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN7
+ help
+ Include support for Intel Valleyview platforms.
+
+config DRM_I915_PLATFORM_INTEL_HASWELL
+ bool "Intel Haswell platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN7
+ help
+ Include support for Intel Haswell platforms.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2bb6e88f4f63..1b82dadc7b0b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2599,12 +2599,12 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_G33(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_G33)
#define IS_IRONLAKE_M(dev_priv)(IS_OPT_PLATFORM(dev_priv,
INTEL_IRONLAKE) && \
(INTEL_DEVID(dev_priv) == 0x0046))
-#define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
+#define IS_IVYBRIDGE(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
#define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
(dev_priv)->info.gt == 1)
-#define IS_VALLEYVIEW(dev_priv)IS_PLATFORM(dev_priv, INTEL_VALLEYVIEW)
+#define IS_VALLEYVIEW(dev_priv)IS_OPT_PLATFORM(dev_priv,
INTEL_VALLEYVIEW)
#define IS_CHERRYVIEW(dev_priv)IS_PLATFORM(dev_priv, INTEL_CHERRYVIEW)
-#define IS_HASWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_HASWELL)
+#define IS_HASWELL(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_HASWELL)
#define IS_BROADWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROADWELL)
#define IS_SKYLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_SKYLAKE)
#define IS_BROXTON(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROXTON)
@@ -2630,8 +2630,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \
(dev_priv)->info.gt == 3)
/* ULX machines are also considered ULT. */
-#define IS_HSW_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x0A0E || \
-INTEL_DEVID(dev_priv) == 0x0A1E)
+#define IS_HSW_ULX(dev_priv) (IS_HASWELL(dev_priv) && \
+(INTEL_DEVID(dev_priv) == 0x0A0E || \
+ INTEL_DEVID(dev_priv) == 0x0A1E))
#define IS_SKL_ULT(dev_priv) (INTEL_DEVID(dev_priv) == 0x1906 || \
INTEL_DEVID(dev_priv) == 0x1913 || \
INTEL_DEVID(dev_priv) == 0x1916 || \
@@ -2732,7 +2733,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN6(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN6) && \
((dev_priv)->info.gen_mask & BIT(5)))
-#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
+#define IS_GEN7(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN7) && \
+((dev_priv)->info.gen_mask & BIT(6)))
#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
#define IS_GEN9(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(8)))
#define IS_GEN10(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(9)))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8a7399787f4b..205a8fc5e8be 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -322,6 +322,7 @@ static const struct intel_device_info
intel_sandybridge_m_gt2_info = {
.platform = INTEL_IVYBRIDGE, \
.has_l3_dpf = 1
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_IVYBRIDGE
static const struct intel_device_info intel_ivybridge_d_gt1_info = {
IVB_D_PLATFORM,
.gt = 1,
@@ -331,6 +332,7 @@ static const struct intel_device_info
intel_ivybridge_d_gt2_info = {
IVB_D_PLATFORM,
.gt = 2,
};
+#endif
#define IVB_M_PLATFORM \
GEN7_FEATURES, \
@@ -338,6 +340,7 @@ static const struct intel_device_info
intel_ivybridge_d_gt2_info = {
.is_mobile = 1, \
.has_l3
[Intel-gfx] [RFC 09/28] drm/i915: Make Sandybridge/Gen6 platforms support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 12
drivers/gpu/drm/i915/i915_drv.h| 4 +++-
drivers/gpu/drm/i915/i915_pci.c| 6 ++
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index ade0520a1559..1302eb3989be 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -129,3 +129,15 @@ config DRM_I915_PLATFORM_INTEL_IRONLAKE
select DRM_I915_GEN5
help
Include support for Intel Ironlake platforms.
+
+config DRM_I915_GEN6
+ bool
+
+config DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
+ bool "Intel Sandybridge platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN6
+ help
+ Include support for Intel Sandybridge platforms.
+
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 741c1fff3616..2bb6e88f4f63 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2729,7 +2729,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN5(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN5) && \
((dev_priv)->info.gen_mask & BIT(4)))
-#define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5)))
+#define IS_GEN6(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN6) && \
+((dev_priv)->info.gen_mask & BIT(5)))
#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
#define IS_GEN9(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(8)))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index dbc580f05678..8a7399787f4b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -273,6 +273,7 @@ static const struct intel_device_info intel_ironlake_m_info
= {
GEN6_FEATURES, \
.platform = INTEL_SANDYBRIDGE
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
static const struct intel_device_info intel_sandybridge_d_gt1_info = {
SNB_D_PLATFORM,
.gt = 1,
@@ -282,6 +283,7 @@ static const struct intel_device_info
intel_sandybridge_d_gt2_info = {
SNB_D_PLATFORM,
.gt = 2,
};
+#endif
#define SNB_M_PLATFORM \
GEN6_FEATURES, \
@@ -289,6 +291,7 @@ static const struct intel_device_info
intel_sandybridge_d_gt2_info = {
.is_mobile = 1
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
static const struct intel_device_info intel_sandybridge_m_gt1_info = {
SNB_M_PLATFORM,
.gt = 1,
@@ -298,6 +301,7 @@ static const struct intel_device_info
intel_sandybridge_m_gt2_info = {
SNB_M_PLATFORM,
.gt = 2,
};
+#endif
#define GEN7_FEATURES \
.gen = 7, .num_pipes = 3, \
@@ -675,10 +679,12 @@ static const struct pci_device_id pciidlist[] = {
INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_SANDYBRIDGE
INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
INTEL_SNB_D_GT2_IDS(&intel_sandybridge_d_gt2_info),
INTEL_SNB_M_GT1_IDS(&intel_sandybridge_m_gt1_info),
INTEL_SNB_M_GT2_IDS(&intel_sandybridge_m_gt2_info),
+#endif
INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */
INTEL_IVB_M_GT1_IDS(&intel_ivybridge_m_gt1_info),
INTEL_IVB_M_GT2_IDS(&intel_ivybridge_m_gt2_info),
--
2.27.0
___
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[Intel-gfx] [RFC 08/28] drm/i915: Make Ironlake/Gen5 platforms support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 11 +++
drivers/gpu/drm/i915/i915_drv.h| 7 +--
drivers/gpu/drm/i915/i915_pci.c| 4
3 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index 559d563e8f2e..ade0520a1559 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -118,3 +118,14 @@ config DRM_I915_PLATFORM_INTEL_GM45
select DRM_I915_GEN4
help
Include support for Intel GM45 platform.
+
+config DRM_I915_GEN5
+ bool
+
+config DRM_I915_PLATFORM_INTEL_IRONLAKE
+ bool "Intel Ironlake platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN5
+ help
+ Include support for Intel Ironlake platforms.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0d0c6ac043d1..741c1fff3616 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2597,7 +2597,8 @@ intel_info(const struct drm_i915_private *dev_priv)
(INTEL_DEVID(dev_priv) == 0xa011))
#define IS_PINEVIEW(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_PINEVIEW)
#define IS_G33(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_G33)
-#define IS_IRONLAKE_M(dev_priv)(INTEL_DEVID(dev_priv) == 0x0046)
+#define IS_IRONLAKE_M(dev_priv)(IS_OPT_PLATFORM(dev_priv,
INTEL_IRONLAKE) && \
+(INTEL_DEVID(dev_priv) == 0x0046))
#define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
#define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
(dev_priv)->info.gt == 1)
@@ -2725,7 +2726,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN4(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN4) && \
((dev_priv)->info.gen_mask & BIT(3)))
-#define IS_GEN5(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(4)))
+#define IS_GEN5(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN5) && \
+((dev_priv)->info.gen_mask & BIT(4)))
#define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5)))
#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 20043a75b40f..dbc580f05678 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -243,6 +243,7 @@ static const struct intel_device_info intel_gm45_info = {
GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_IRONLAKE
static const struct intel_device_info intel_ironlake_d_info = {
GEN5_FEATURES,
.platform = INTEL_IRONLAKE,
@@ -253,6 +254,7 @@ static const struct intel_device_info intel_ironlake_m_info
= {
.platform = INTEL_IRONLAKE,
.is_mobile = 1, .has_fbc = 1,
};
+#endif
#define GEN6_FEATURES \
.gen = 6, .num_pipes = 2, \
@@ -669,8 +671,10 @@ static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_G45
INTEL_G45_IDS(&intel_g45_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_IRONLAKE
INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
+#endif
INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
INTEL_SNB_D_GT2_IDS(&intel_sandybridge_d_gt2_info),
INTEL_SNB_M_GT1_IDS(&intel_sandybridge_m_gt1_info),
--
2.27.0
___
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[Intel-gfx] [RFC 07/28] drm/i915: Make Gen4 platforms support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 35 ++
drivers/gpu/drm/i915/i915_drv.h| 12 +
drivers/gpu/drm/i915/i915_pci.c| 16
3 files changed, 58 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index 1fa09884a290..559d563e8f2e 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -83,3 +83,38 @@ config DRM_I915_PLATFORM_INTEL_PINEVIEW
select DRM_I915_GEN3
help
Include support for Intel Pineview platform.
+
+config DRM_I915_GEN4
+ bool
+
+config DRM_I915_PLATFORM_INTEL_I965G
+ bool "Intel i965G platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN4
+ help
+ Include support for Intel i965G platform.
+
+config DRM_I915_PLATFORM_INTEL_I965GM
+ bool "Intel i965GM platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN4
+ help
+ Include support for Intel i965GM platform.
+
+config DRM_I915_PLATFORM_INTEL_G45
+ bool "Intel G45 platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN4
+ help
+ Include support for Intel G45 platform.
+
+config DRM_I915_PLATFORM_INTEL_GM45
+ bool "Intel GM45 platform support"
+ default y
+ depends on DRM_I915
+ select DRM_I915_GEN4
+ help
+ Include support for Intel GM45 platform.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 949a8bf54d55..0d0c6ac043d1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2586,10 +2586,10 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_I915GM(dev_priv)IS_OPT_PLATFORM(dev_priv, INTEL_I915GM)
#define IS_I945G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I945G)
#define IS_I945GM(dev_priv)IS_OPT_PLATFORM(dev_priv, INTEL_I945GM)
-#define IS_I965G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I965G)
-#define IS_I965GM(dev_priv)IS_PLATFORM(dev_priv, INTEL_I965GM)
-#define IS_G45(dev_priv) IS_PLATFORM(dev_priv, INTEL_G45)
-#define IS_GM45(dev_priv) IS_PLATFORM(dev_priv, INTEL_GM45)
+#define IS_I965G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I965G)
+#define IS_I965GM(dev_priv)IS_OPT_PLATFORM(dev_priv, INTEL_I965GM)
+#define IS_G45(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_G45)
+#define IS_GM45(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_GM45)
#define IS_G4X(dev_priv) (IS_G45(dev_priv) || IS_GM45(dev_priv))
#define IS_PINEVIEW_G(dev_priv)(IS_OPT_PLATFORM(dev_priv,
INTEL_PINEVIEW) && \
(INTEL_DEVID(dev_priv) == 0xa001))
@@ -2722,7 +2722,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN3(dev_priv) \
(IS_ENABLED(CONFIG_DRM_I915_GEN3) && \
((dev_priv)->info.gen_mask & BIT(2)))
-#define IS_GEN4(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(3)))
+#define IS_GEN4(dev_priv) \
+ (IS_ENABLED(CONFIG_DRM_I915_GEN4) && \
+((dev_priv)->info.gen_mask & BIT(3)))
#define IS_GEN5(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(4)))
#define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5)))
#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 9b47cba66d3d..20043a75b40f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -192,6 +192,7 @@ static const struct intel_device_info intel_pineview_info =
{
GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I965G
static const struct intel_device_info intel_i965g_info = {
GEN4_FEATURES,
.platform = INTEL_I965G,
@@ -199,7 +200,9 @@ static const struct intel_device_info intel_i965g_info = {
.hws_needs_physical = 1,
.has_snoop = false,
};
+#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I965GM
static const struct intel_device_info intel_i965gm_info = {
GEN4_FEATURES,
.platform = INTEL_I965GM,
@@ -209,13 +212,17 @@ static const struct intel_device_info intel_i965gm_info =
{
.hws_needs_physical = 1,
.has_snoop = false,
};
+#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_G45
static const struct intel_device_info intel_g45_info = {
GEN4_FEATURES,
.platform = INTEL_G45,
.ring_mask = RENDER_RING | BSD_RING,
};
+#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_GM45
static const struct intel_device_info intel_gm45_info = {
GEN4_FEATURES,
.platform = INTEL_GM45,
@@ -223,6 +230,7 @@ static const struct intel_device_info intel_gm45_info = {
.supports_tv = 1,
.ring_mask = RENDER_RING | BSD_RING,
};
+#endif
#define GEN5_
[Intel-gfx] [RFC 05/28] drm/i915: Make GEN2 support optional
From: Tvrtko Ursulin By adding a hidden Kconfig option selected by all Gen2 platforms, we can eliminate more code when none of those is selected. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/Kconfig.platforms | 7 +++ drivers/gpu/drm/i915/i915_drv.h| 4 +++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/Kconfig.platforms b/drivers/gpu/drm/i915/Kconfig.platforms index 46b78425e6da..23a44c8eb07b 100644 --- a/drivers/gpu/drm/i915/Kconfig.platforms +++ b/drivers/gpu/drm/i915/Kconfig.platforms @@ -1,7 +1,11 @@ +config DRM_I915_GEN2 + bool + config DRM_I915_PLATFORM_INTEL_I830 bool "Intel i830 platform support" default y depends on DRM_I915 + select DRM_I915_GEN2 help Include support for Intel i830 platform. @@ -9,6 +13,7 @@ config DRM_I915_PLATFORM_INTEL_I845G bool "Intel i845G platform support" default y depends on DRM_I915 + select DRM_I915_GEN2 help Include support for Intel i845G platform. @@ -16,6 +21,7 @@ config DRM_I915_PLATFORM_INTEL_I85X bool "Intel i85X platform support" default y depends on DRM_I915 + select DRM_I915_GEN2 help Include support for Intel i85X platforms. @@ -23,5 +29,6 @@ config DRM_I915_PLATFORM_INTEL_I865G bool "Intel i865G platform support" default y depends on DRM_I915 + select DRM_I915_GEN2 help Include support for Intel i865G platform. diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4a350a6b1800..f718655294ea 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2714,7 +2714,9 @@ intel_info(const struct drm_i915_private *dev_priv) * have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular * chips, etc.). */ -#define IS_GEN2(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(1))) +#define IS_GEN2(dev_priv) \ + (IS_ENABLED(CONFIG_DRM_I915_GEN2) && \ +((dev_priv)->info.gen_mask & BIT(1))) #define IS_GEN3(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(2))) #define IS_GEN4(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(3))) #define IS_GEN5(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(4))) -- 2.27.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC 04/28] drm/i915: Make I865G platform support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 7 +++
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_pci.c| 4
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index ab5ad0eaf4e7..46b78425e6da 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -18,3 +18,10 @@ config DRM_I915_PLATFORM_INTEL_I85X
depends on DRM_I915
help
Include support for Intel i85X platforms.
+
+config DRM_I915_PLATFORM_INTEL_I865G
+ bool "Intel i865G platform support"
+ default y
+ depends on DRM_I915
+ help
+ Include support for Intel i865G platform.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 585e6d61a2bd..4a350a6b1800 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2581,7 +2581,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_I830(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I830)
#define IS_I845G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I845G)
#define IS_I85X(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I85X)
-#define IS_I865G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I865G)
+#define IS_I865G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I865G)
#define IS_I915G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I915G)
#define IS_I915GM(dev_priv)IS_PLATFORM(dev_priv, INTEL_I915GM)
#define IS_I945G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I945G)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 47aeaf817b8c..9f5054c009b6 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -100,10 +100,12 @@ static const struct intel_device_info intel_i85x_info = {
};
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I865G
static const struct intel_device_info intel_i865g_info = {
GEN2_FEATURES,
.platform = INTEL_I865G,
};
+#endif
#define GEN3_FEATURES \
.gen = 3, .num_pipes = 2, \
@@ -614,7 +616,9 @@ static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I85X
INTEL_I85X_IDS(&intel_i85x_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I865G
INTEL_I865G_IDS(&intel_i865g_info),
+#endif
INTEL_I915G_IDS(&intel_i915g_info),
INTEL_I915GM_IDS(&intel_i915gm_info),
INTEL_I945G_IDS(&intel_i945g_info),
--
2.27.0
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[Intel-gfx] [RFC 03/28] drm/i915: Make I85X platform support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 7 +++
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_pci.c| 4
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index cf06ed3b0727..ab5ad0eaf4e7 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -11,3 +11,10 @@ config DRM_I915_PLATFORM_INTEL_I845G
depends on DRM_I915
help
Include support for Intel i845G platform.
+
+config DRM_I915_PLATFORM_INTEL_I85X
+ bool "Intel i85X platform support"
+ default y
+ depends on DRM_I915
+ help
+ Include support for Intel i85X platforms.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 59231e500f78..585e6d61a2bd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2580,7 +2580,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_I830(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I830)
#define IS_I845G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I845G)
-#define IS_I85X(dev_priv) IS_PLATFORM(dev_priv, INTEL_I85X)
+#define IS_I85X(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I85X)
#define IS_I865G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I865G)
#define IS_I915G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I915G)
#define IS_I915GM(dev_priv)IS_PLATFORM(dev_priv, INTEL_I915GM)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index d98c35d2ff9d..47aeaf817b8c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -90,6 +90,7 @@ static const struct intel_device_info intel_i845g_info = {
};
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I85X
static const struct intel_device_info intel_i85x_info = {
GEN2_FEATURES,
.platform = INTEL_I85X, .is_mobile = 1,
@@ -97,6 +98,7 @@ static const struct intel_device_info intel_i85x_info = {
.cursor_needs_physical = 1,
.has_fbc = 1,
};
+#endif
static const struct intel_device_info intel_i865g_info = {
GEN2_FEATURES,
@@ -609,7 +611,9 @@ static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I845G
INTEL_I845G_IDS(&intel_i845g_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I85X
INTEL_I85X_IDS(&intel_i85x_info),
+#endif
INTEL_I865G_IDS(&intel_i865g_info),
INTEL_I915G_IDS(&intel_i915g_info),
INTEL_I915GM_IDS(&intel_i915gm_info),
--
2.27.0
___
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[Intel-gfx] [RFC 01/28] drm/i915: Make I830 platform support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig | 5 +
drivers/gpu/drm/i915/Kconfig.platforms | 6 ++
drivers/gpu/drm/i915/i915_drv.h| 5 -
drivers/gpu/drm/i915/i915_pci.c| 4
4 files changed, 19 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/Kconfig.platforms
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index dfd95889f4b7..1363d05e6ec5 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -131,3 +131,8 @@ depends on DRM_I915
depends on EXPERT
source drivers/gpu/drm/i915/Kconfig.debug
endmenu
+
+menu "Platform support"
+depends on DRM_I915
+source drivers/gpu/drm/i915/Kconfig.platforms
+endmenu
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
new file mode 100644
index ..f3949fff21e9
--- /dev/null
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -0,0 +1,6 @@
+config DRM_I915_PLATFORM_INTEL_I830
+ bool "Intel i830 platform support"
+ default y
+ depends on DRM_I915
+ help
+ Include support for Intel i830 platform.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7db3557b945c..6ea33c92ccef 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2575,7 +2575,10 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_PLATFORM(dev_priv, p) ((dev_priv)->info.platform_mask & BIT(p))
-#define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
+#define IS_OPT_PLATFORM(dev_priv, p) \
+ (IS_ENABLED(CONFIG_DRM_I915_PLATFORM_##p) && IS_PLATFORM(dev_priv, p))
+
+#define IS_I830(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I830)
#define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
#define IS_I85X(dev_priv) IS_PLATFORM(dev_priv, INTEL_I85X)
#define IS_I865G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I865G)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 4e7a10c89782..81573073dceb 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -74,12 +74,14 @@
GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I830
static const struct intel_device_info intel_i830_info = {
GEN2_FEATURES,
.platform = INTEL_I830,
.is_mobile = 1, .cursor_needs_physical = 1,
.num_pipes = 2, /* legal, last one wins */
};
+#endif
static const struct intel_device_info intel_i845g_info = {
GEN2_FEATURES,
@@ -599,7 +601,9 @@ static const struct intel_device_info intel_icelake_11_info
= {
* PCI ID matches, otherwise we'll use the wrong info struct above.
*/
static const struct pci_device_id pciidlist[] = {
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I830
INTEL_I830_IDS(&intel_i830_info),
+#endif
INTEL_I845G_IDS(&intel_i845g_info),
INTEL_I85X_IDS(&intel_i85x_info),
INTEL_I865G_IDS(&intel_i865g_info),
--
2.27.0
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[Intel-gfx] [RFC 02/28] drm/i915: Make I845G platform support optional
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/Kconfig.platforms | 7 +++
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_pci.c| 4
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.platforms
b/drivers/gpu/drm/i915/Kconfig.platforms
index f3949fff21e9..cf06ed3b0727 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -4,3 +4,10 @@ config DRM_I915_PLATFORM_INTEL_I830
depends on DRM_I915
help
Include support for Intel i830 platform.
+
+config DRM_I915_PLATFORM_INTEL_I845G
+ bool "Intel i845G platform support"
+ default y
+ depends on DRM_I915
+ help
+ Include support for Intel i845G platform.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6ea33c92ccef..59231e500f78 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2579,7 +2579,7 @@ intel_info(const struct drm_i915_private *dev_priv)
(IS_ENABLED(CONFIG_DRM_I915_PLATFORM_##p) && IS_PLATFORM(dev_priv, p))
#define IS_I830(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I830)
-#define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
+#define IS_I845G(dev_priv) IS_OPT_PLATFORM(dev_priv, INTEL_I845G)
#define IS_I85X(dev_priv) IS_PLATFORM(dev_priv, INTEL_I85X)
#define IS_I865G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I865G)
#define IS_I915G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I915G)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 81573073dceb..d98c35d2ff9d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -83,10 +83,12 @@ static const struct intel_device_info intel_i830_info = {
};
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I845G
static const struct intel_device_info intel_i845g_info = {
GEN2_FEATURES,
.platform = INTEL_I845G,
};
+#endif
static const struct intel_device_info intel_i85x_info = {
GEN2_FEATURES,
@@ -604,7 +606,9 @@ static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I830
INTEL_I830_IDS(&intel_i830_info),
#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_I845G
INTEL_I845G_IDS(&intel_i845g_info),
+#endif
INTEL_I85X_IDS(&intel_i85x_info),
INTEL_I865G_IDS(&intel_i865g_info),
INTEL_I915G_IDS(&intel_i915g_info),
--
2.27.0
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[Intel-gfx] [RFC 00/28] Old platform/gen kconfig options series
From: Tvrtko Ursulin Triggered by the recent work around INTEL_GEN etc and probably just for historical reference since I can't remember if I ever sent it out. So sending now but unrebased. This series from early 2018 is the reason why I was converting to mask based check everywhere. There was as feature request to enable compiling out parts of the driver for embedded deployments. Or inversely, to build for a single platform only. With the mask approach and this series I was able to demonstrate substantial savings in binary size. If only I could remember if I was building for Gen9 only or Gen9+.. But memory says savings around 30-40% were easy to get. Then the experiment was dropped, don't remember why. I also tried LTO on top of this but kernel support for it was immature back then (maybe still is, no idea). Anyway, sending for historical reference why masks for everything were doubly good. I mean they are good for all the range check in my opinion. Cc: Lucas De Marchi Cc: Jani Nikula Tvrtko Ursulin (28): drm/i915: Make I830 platform support optional drm/i915: Make I845G platform support optional drm/i915: Make I85X platform support optional drm/i915: Make I865G platform support optional drm/i915: Make GEN2 support optional drm/i915: Make Gen3 platforms support optional drm/i915: Make Gen4 platforms support optional drm/i915: Make Ironlake/Gen5 platforms support optional drm/i915: Make Sandybridge/Gen6 platforms support optional drm/i915: Make Gen7/7.5 platform support optional drm/i915: Make Gen8 platform support optional drm/i915: Make Gen9 platform support optional drm/i915: Make Gen10 platform support optional drm/i915: Make Gen11 platform support optional drm/i915: Simplify IS_GEN macros drm/i915: Use INTEL_GEN everywhere drm/i915: Favour IS_GENx drm/i915: Use Gen Kconfig items in IS_GEN macro drm/i915: Replace arithmetic INTEL_GEN checks with the IS_GEN macro drm/i915: Use IS_GEN in execbuffer drm/i915: Allow render state to be compiled out drm/i915: Use IS_GEN in stolen drm/i915: Use IS_GEN in intel_bios.c drm/i915: Use IS_GEN in intel_fb_pitch_limit drm/i915: Use IS_GEN in intel_engine_cs.c drm/i915: Use IS_GEN in intel_guc.c drm/i915: Use IS_GEN in intel_lrc.c drm/i915: Enable dropping small cores when not enabled drivers/gpu/drm/i915/Kconfig | 5 + drivers/gpu/drm/i915/Kconfig.platforms| 261 ++ drivers/gpu/drm/i915/Makefile | 8 +- drivers/gpu/drm/i915/i915_debugfs.c | 86 +++--- drivers/gpu/drm/i915/i915_drv.c | 16 +- drivers/gpu/drm/i915/i915_drv.h | 187 - drivers/gpu/drm/i915/i915_gem.c | 18 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c| 16 +- drivers/gpu/drm/i915/i915_gem_fence_reg.c | 4 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 30 +- drivers/gpu/drm/i915/i915_gem_render_state.c | 10 +- drivers/gpu/drm/i915/i915_gem_request.c | 2 +- drivers/gpu/drm/i915/i915_gem_stolen.c| 42 ++- drivers/gpu/drm/i915/i915_gem_tiling.c| 8 +- drivers/gpu/drm/i915/i915_gpu_error.c | 40 +-- drivers/gpu/drm/i915/i915_irq.c | 58 ++-- drivers/gpu/drm/i915/i915_pci.c | 120 +++- drivers/gpu/drm/i915/i915_perf.c | 2 +- drivers/gpu/drm/i915/i915_pmu.c | 6 +- drivers/gpu/drm/i915/i915_reg.h | 4 +- drivers/gpu/drm/i915/i915_suspend.c | 12 +- drivers/gpu/drm/i915/i915_sysfs.c | 2 +- drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +- drivers/gpu/drm/i915/intel_audio.c| 2 +- drivers/gpu/drm/i915/intel_bios.c | 9 +- drivers/gpu/drm/i915/intel_cdclk.c| 8 +- drivers/gpu/drm/i915/intel_color.c| 2 +- drivers/gpu/drm/i915/intel_crt.c | 6 +- drivers/gpu/drm/i915/intel_ddi.c | 10 +- drivers/gpu/drm/i915/intel_device_info.c | 18 +- drivers/gpu/drm/i915/intel_display.c | 205 +++--- drivers/gpu/drm/i915/intel_dp.c | 28 +- drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 +- drivers/gpu/drm/i915/intel_engine_cs.c| 114 drivers/gpu/drm/i915/intel_fbc.c | 32 +-- drivers/gpu/drm/i915/intel_fifo_underrun.c| 2 +- drivers/gpu/drm/i915/intel_guc.c | 10 +- drivers/gpu/drm/i915/intel_hangcheck.c| 2 +- drivers/gpu/drm/i915/intel_hdcp.c | 2 +- drivers/gpu/drm/i915/intel_hdmi.c | 10 +- drivers/gpu/drm/i915/intel_lrc.c | 35 +-- drivers/gpu/drm/i915/intel_lvds.c | 10 +- drivers/gpu/drm/i915/intel_mocs.c | 2 +- drivers/gpu/drm/i915/intel_overlay.c | 2 +- drivers/gpu/drm/i915/intel_panel.c| 10 +- drivers/gpu/drm/i915/intel_pipe_crc.c | 2 +- drivers/gpu/drm/i915/intel_pm.c
Re: [Intel-gfx] [PATCH v2 08/12] drm/i915: finish removal of gen_mask
On 13/04/2021 06:09, Lucas De Marchi wrote:
Now that it's not used anywhere, remove it from struct
intel_device_info. To allow a period in which code will be converted to
the new macro, keep IS_GEN_RANGE() around, just redefining it to use
the new fields. The size advantage from IS_GEN_RANGE() using a mask is
not that big as it has pretty limited use througout the driver:
textdata bss dec hex filename
2758497 959656496 2860958 2ba79e drivers/gpu/drm/i915/i915.ko.old
2758586 959536496 2861035 2ba7eb drivers/gpu/drm/i915/i915.ko.new
This delta refers to this patch - I mean this point in the series?
Asking because it may not be 100% representative since some of the
previous patches have already removed some gen mask usages.
While I am here, I am a bit fond of the mask approach and wonder if
using it for all (gt/media/whatelse) new fields would still make sense.
Presence of the range check helpers suggests that it might, but I
haven't looked at how prevalent their usage ends up after the series is
done. So just in principle, I don't see why not still go with masks
since that guarantees elegant check at each range check site. It would
be all hidden in the macro implementation so easy.
Also for historical reference, another reason why I went for masks
everywhere approach is that at some point we had a feature request to
allow compiling out platforms/gens. I *think* that was much easier to do
with masking and in experiments back then I was able for instance to
build just for Gen9+ and drop like 30% of the binary size.
Oh I found the branch now.. The reason for IS_GEN(p, v) was also in that
series. I don't know if I ever RFC-ed or trybotted it.. google suggests
no and I neither can find it in my mailboxes. I could send out the old
patches for reference? But to be honest I have no idea if this feature
request (targeted driver builds) will ever resurface..
Regards,
Tvrtko
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.c | 2 --
drivers/gpu/drm/i915/i915_drv.h | 13 -
drivers/gpu/drm/i915/i915_pci.c | 1 -
drivers/gpu/drm/i915/intel_device_info.h | 2 --
4 files changed, 4 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 305557e1942a..825b45cb3543 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -768,8 +768,6 @@ i915_driver_create(struct pci_dev *pdev, const struct
pci_device_id *ent)
memcpy(device_info, match_info, sizeof(*device_info));
RUNTIME_INFO(i915)->device_id = pdev->device;
- BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
-
return i915;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cb59eb0f6c5b..b984a340b21f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1241,6 +1241,10 @@ static inline struct drm_i915_private
*pdev_to_i915(struct pci_dev *pdev)
* GRAPHICS_VER(), MEDIA_VER and DISPLAY_VER()
*/
#define INTEL_GEN(dev_priv) (INTEL_INFO(dev_priv)->gen)
+/*
+ * Deprecated: use IS_GRAPHICS_VER()
+ */
+#define IS_GEN_RANGE(dev_priv, s, e) IS_GRAPHICS_VER(dev_priv, (s), (e))
#define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics_ver)
#define IS_GRAPHICS_VER(i915, from, until) \
@@ -1257,15 +1261,6 @@ static inline struct drm_i915_private
*pdev_to_i915(struct pci_dev *pdev)
#define REVID_FOREVER 0xff
#define INTEL_REVID(dev_priv) (to_pci_dev((dev_priv)->drm.dev)->revision)
-#define INTEL_GEN_MASK(s, e) ( \
- BUILD_BUG_ON_ZERO(!__builtin_constant_p(s)) + \
- BUILD_BUG_ON_ZERO(!__builtin_constant_p(e)) + \
- GENMASK((e) - 1, (s) - 1))
-
-/* Returns true if Gen is in inclusive range [Start, End] */
-#define IS_GEN_RANGE(dev_priv, s, e) \
- (!!(INTEL_INFO(dev_priv)->gen_mask & INTEL_GEN_MASK((s), (e
-
#define IS_GEN(dev_priv, n) \
(BUILD_BUG_ON_ZERO(!__builtin_constant_p(n)) + \
INTEL_INFO(dev_priv)->gen == (n))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 97ab73276334..3b9cd1af0f28 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -37,7 +37,6 @@
#define PLATFORM(x) .platform = (x)
#define GEN(x) \
- .gen_mask = BIT((x) - 1), \
.gen = (x), \
.graphics_ver = (x), \
.media_ver = (x), \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 405883a8cc84..b8f7b996f140 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -160,8 +160,6 @@ enum intel_ppgtt_type {
func(supports_tv);
struct intel_device_info {
- u16 gen_mask;
-
u8 graphics_ver;
u8 media_ver;
___
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