[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Simplify CCS and UV plane alignment handling (rev2)
== Series Details == Series: drm/i915: Simplify CCS and UV plane alignment handling (rev2) URL : https://patchwork.freedesktop.org/series/89299/ State : success == Summary == CI Bug Log - changes from CI_DRM_9994_full -> Patchwork_19967_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19967_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-skl: NOTRUN -> [DMESG-WARN][1] ([i915#3002]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-skl1/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@legacy-engines-cleanup: - shard-snb: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-snb6/igt@gem_ctx_persiste...@legacy-engines-cleanup.html * igt@gem_exec_fair@basic-deadline: - shard-tglb: [PASS][3] -> [FAIL][4] ([i915#2846]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/shard-tglb8/igt@gem_exec_f...@basic-deadline.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-tglb7/igt@gem_exec_f...@basic-deadline.html - shard-skl: NOTRUN -> [FAIL][5] ([i915#2846]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-skl1/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none@vcs1: - shard-kbl: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/shard-kbl7/igt@gem_exec_fair@basic-n...@vcs1.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-kbl3/igt@gem_exec_fair@basic-n...@vcs1.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/shard-tglb2/igt@gem_exec_fair@basic-p...@bcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-tglb6/igt@gem_exec_fair@basic-p...@bcs0.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][10] ([i915#2389]) +3 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-apl2/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-snb: NOTRUN -> [FAIL][11] ([i915#2389]) +2 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-snb2/igt@gem_exec_reloc@basic-wide-act...@rcs0.html * igt@gem_exec_reloc@basic-wide-active@vcs1: - shard-iclb: NOTRUN -> [FAIL][12] ([i915#2389]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-iclb2/igt@gem_exec_reloc@basic-wide-act...@vcs1.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [PASS][13] -> [SKIP][14] ([i915#2190]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/shard-tglb8/igt@gem_huc_c...@huc-copy.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-tglb6/igt@gem_huc_c...@huc-copy.html * igt@gem_mmap_gtt@big-copy-odd: - shard-skl: [PASS][15] -> [FAIL][16] ([i915#307]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/shard-skl4/igt@gem_mmap_...@big-copy-odd.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-skl9/igt@gem_mmap_...@big-copy-odd.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [FAIL][17] ([i915#3318]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-apl7/igt@gem_userptr_bl...@vma-merge.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][18] -> [DMESG-WARN][19] ([i915#180]) +3 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/shard-kbl1/igt@gem_workarou...@suspend-resume-fd.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-kbl4/igt@gem_workarou...@suspend-resume-fd.html * igt@gen9_exec_parse@bb-large: - shard-apl: NOTRUN -> [FAIL][20] ([i915#3296]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-apl2/igt@gen9_exec_pa...@bb-large.html * igt@i915_hangman@engine-error@vecs0: - shard-kbl: NOTRUN -> [SKIP][21] ([fdo#109271]) +70 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-kbl7/igt@i915_hangman@engine-er...@vecs0.html * igt@i915_module_load@reload-with-fault-injection: - shard-skl: [PASS][22] -> [DMESG-WARN][23] ([i915#1982]) +1 similar issue [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/shard-skl8/igt@i915_module_l...@reload-with-fault-injection.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/shard-skl2/igt@i915_module_l...@reload-with-fault-injection.html -
[Intel-gfx] ✗ Fi.CI.IGT: failure for Add support for querying engine cycles
== Series Details == Series: Add support for querying engine cycles URL : https://patchwork.freedesktop.org/series/89314/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9993_full -> Patchwork_19966_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_19966_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19966_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19966_full: ### IGT changes ### Possible regressions * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-iclb: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-iclb1/igt@gem_exec_fair@basic-pace-s...@rcs0.html New tests - New tests have been introduced between CI_DRM_9993_full and Patchwork_19966_full: ### New IGT tests (2) ### * igt@i915_query@cs-cycles: - Statuses : 6 pass(s) - Exec time: [0.00, 0.05] s * igt@i915_query@cs-cycles-invalid: - Statuses : 6 pass(s) - Exec time: [0.00, 0.04] s Known issues Here are the changes found in Patchwork_19966_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-clear: - shard-iclb: [PASS][2] -> [FAIL][3] ([i915#3160]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-iclb7/igt@gem_cre...@create-clear.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-iclb3/igt@gem_cre...@create-clear.html * igt@gem_ctx_bad_destroy@invalid-pad: - shard-skl: NOTRUN -> [DMESG-WARN][4] ([i915#1982]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-skl6/igt@gem_ctx_bad_dest...@invalid-pad.html * igt@gem_ctx_persistence@process: - shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-snb2/igt@gem_ctx_persiste...@process.html * igt@gem_ctx_sseu@mmap-args: - shard-tglb: NOTRUN -> [SKIP][6] ([i915#280]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-tglb6/igt@gem_ctx_s...@mmap-args.html * igt@gem_exec_fair@basic-deadline: - shard-kbl: [PASS][7] -> [FAIL][8] ([i915#2846]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl4/igt@gem_exec_f...@basic-deadline.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-kbl6/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-skl: NOTRUN -> [SKIP][9] ([fdo#109271]) +126 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-skl4/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglb: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-tglb5/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-glk: NOTRUN -> [FAIL][12] ([i915#2842]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-glk5/igt@gem_exec_fair@basic-pace-s...@rcs0.html - shard-tglb: NOTRUN -> [FAIL][13] ([i915#2842]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-tglb6/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-glk: [PASS][14] -> [FAIL][15] ([i915#2842]) +3 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk3/igt@gem_exec_fair@basic-p...@vecs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-glk8/igt@gem_exec_fair@basic-p...@vecs0.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][16] ([i915#2389]) +3 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-apl3/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_exec_suspend@basic-s3: - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-apl1/igt@gem_exec_susp...@basic-s3.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/shard-apl6/igt@gem_exec_susp...@basic-s3.html * igt@gem_huc_copy@huc-copy: - shard-skl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190]) [19]:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: DDI buf trans cleaup and fixes
== Series Details == Series: drm/i915: DDI buf trans cleaup and fixes URL : https://patchwork.freedesktop.org/series/89311/ State : success == Summary == CI Bug Log - changes from CI_DRM_9993_full -> Patchwork_19965_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19965_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@engines-mixed-process: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-snb7/igt@gem_ctx_persiste...@engines-mixed-process.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][2] -> [TIMEOUT][3] ([i915#2369] / [i915#3063]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb1/igt@gem_...@unwedge-stress.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-tglb5/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-apl: NOTRUN -> [FAIL][4] ([i915#2846]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-apl1/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-skl: NOTRUN -> [SKIP][5] ([fdo#109271]) +86 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-skl10/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-none@rcs0: - shard-glk: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk5/igt@gem_exec_fair@basic-n...@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-glk6/igt@gem_exec_fair@basic-n...@rcs0.html * igt@gem_exec_fair@basic-none@vecs0: - shard-kbl: [PASS][8] -> [FAIL][9] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl7/igt@gem_exec_fair@basic-n...@vecs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-kbl4/igt@gem_exec_fair@basic-n...@vecs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-tglb: [PASS][10] -> [FAIL][11] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb5/igt@gem_exec_fair@basic-p...@vcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-tglb8/igt@gem_exec_fair@basic-p...@vcs0.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][12] ([i915#2389]) +3 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-apl8/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_exec_whisper@basic-queues-priority: - shard-iclb: [PASS][13] -> [INCOMPLETE][14] ([i915#1895]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-iclb6/igt@gem_exec_whis...@basic-queues-priority.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-iclb7/igt@gem_exec_whis...@basic-queues-priority.html * igt@gem_huc_copy@huc-copy: - shard-skl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#2190]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-skl6/igt@gem_huc_c...@huc-copy.html * igt@gem_mmap_gtt@cpuset-medium-copy-odd: - shard-skl: [PASS][16] -> [FAIL][17] ([i915#307]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-skl9/igt@gem_mmap_...@cpuset-medium-copy-odd.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-skl2/igt@gem_mmap_...@cpuset-medium-copy-odd.html * igt@gem_userptr_blits@input-checking: - shard-snb: NOTRUN -> [DMESG-WARN][18] ([i915#3002]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-snb7/igt@gem_userptr_bl...@input-checking.html * igt@gem_userptr_blits@set-cache-level: - shard-snb: NOTRUN -> [FAIL][19] ([i915#3324]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-snb2/igt@gem_userptr_bl...@set-cache-level.html - shard-skl: NOTRUN -> [FAIL][20] ([i915#3324]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-skl7/igt@gem_userptr_bl...@set-cache-level.html * igt@gem_userptr_blits@vma-merge: - shard-snb: NOTRUN -> [FAIL][21] ([i915#2724]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-snb6/igt@gem_userptr_bl...@vma-merge.html * igt@gem_vm_create@destroy-race: - shard-tglb: [PASS][22] -> [TIMEOUT][23] ([i915#2795]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb5/igt@gem_vm_cre...@destroy-race.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/shard-tglb2/igt@gem_vm_cre...@destroy-race.html * igt@gen9_exec_parse@bb-large: - shard-skl: NOTRUN ->
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix older platforms
== Series Details == Series: drm/i915: Fix older platforms URL : https://patchwork.freedesktop.org/series/89306/ State : success == Summary == CI Bug Log - changes from CI_DRM_9993_full -> Patchwork_19964_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19964_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@process: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-snb7/igt@gem_ctx_persiste...@process.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][2] -> [TIMEOUT][3] ([i915#2369] / [i915#3063]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb1/igt@gem_...@unwedge-stress.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-tglb2/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-apl: NOTRUN -> [FAIL][4] ([i915#2846]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-apl7/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-skl: NOTRUN -> [SKIP][5] ([fdo#109271]) +72 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-skl10/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-glk3/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb5/igt@gem_exec_fair@basic-p...@vcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-tglb5/igt@gem_exec_fair@basic-p...@vcs0.html * igt@gem_exec_whisper@basic-contexts-priority-all: - shard-glk: [PASS][10] -> [DMESG-WARN][11] ([i915#118] / [i915#95]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk8/igt@gem_exec_whis...@basic-contexts-priority-all.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-glk2/igt@gem_exec_whis...@basic-contexts-priority-all.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [PASS][12] -> [SKIP][13] ([i915#2190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb3/igt@gem_huc_c...@huc-copy.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-tglb6/igt@gem_huc_c...@huc-copy.html - shard-skl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#2190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-skl1/igt@gem_huc_c...@huc-copy.html * igt@gem_pwrite@basic-exhaustion: - shard-snb: NOTRUN -> [WARN][15] ([i915#2658]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-snb7/igt@gem_pwr...@basic-exhaustion.html * igt@gem_userptr_blits@input-checking: - shard-snb: NOTRUN -> [DMESG-WARN][16] ([i915#3002]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-snb2/igt@gem_userptr_bl...@input-checking.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [FAIL][17] ([i915#3318]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-apl3/igt@gem_userptr_bl...@vma-merge.html * igt@gem_vm_create@destroy-race: - shard-tglb: [PASS][18] -> [TIMEOUT][19] ([i915#2795]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb5/igt@gem_vm_cre...@destroy-race.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-tglb5/igt@gem_vm_cre...@destroy-race.html * igt@gen9_exec_parse@bb-large: - shard-skl: NOTRUN -> [FAIL][20] ([i915#3296]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-skl9/igt@gen9_exec_pa...@bb-large.html * igt@i915_hangman@engine-error@vecs0: - shard-kbl: NOTRUN -> [SKIP][21] ([fdo#109271]) +72 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-kbl1/igt@i915_hangman@engine-er...@vecs0.html * igt@i915_selftest@live@hangcheck: - shard-snb: NOTRUN -> [INCOMPLETE][22] ([i915#2782]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/shard-snb6/igt@i915_selftest@l...@hangcheck.html * igt@i915_suspend@debugfs-reader: - shard-skl: [PASS][23] -> [INCOMPLETE][24] ([i915#198]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-skl4/igt@i915_susp...@debugfs-reader.html [24]:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Simplify CCS and UV plane alignment handling
== Series Details == Series: drm/i915: Simplify CCS and UV plane alignment handling URL : https://patchwork.freedesktop.org/series/89299/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9993_full -> Patchwork_19963_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_19963_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19963_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19963_full: ### IGT changes ### Possible regressions * igt@gem_sync@basic-many-each: - shard-iclb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-iclb4/igt@gem_s...@basic-many-each.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-iclb2/igt@gem_s...@basic-many-each.html Known issues Here are the changes found in Patchwork_19963_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@file: - shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-snb5/igt@gem_ctx_persiste...@file.html * igt@gem_eio@in-flight-suspend: - shard-apl: NOTRUN -> [DMESG-WARN][4] ([i915#180]) +1 similar issue [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-apl8/igt@gem_...@in-flight-suspend.html * igt@gem_eio@kms: - shard-glk: [PASS][5] -> [FAIL][6] ([i915#3115]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk4/igt@gem_...@kms.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-glk8/igt@gem_...@kms.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-skl: NOTRUN -> [SKIP][7] ([fdo#109271]) +84 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-skl10/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +1 similar issue [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-tglb5/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-kbl: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl6/igt@gem_exec_fair@basic-p...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-kbl6/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_exec_whisper@basic-queues-priority-all: - shard-iclb: [PASS][12] -> [INCOMPLETE][13] ([i915#1895]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-iclb7/igt@gem_exec_whis...@basic-queues-priority-all.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-iclb7/igt@gem_exec_whis...@basic-queues-priority-all.html * igt@gem_huc_copy@huc-copy: - shard-skl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#2190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-skl2/igt@gem_huc_c...@huc-copy.html * igt@gem_mmap_gtt@big-copy-xy: - shard-glk: [PASS][15] -> [FAIL][16] ([i915#307]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk8/igt@gem_mmap_...@big-copy-xy.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-glk8/igt@gem_mmap_...@big-copy-xy.html * igt@gem_userptr_blits@set-cache-level: - shard-skl: NOTRUN -> [FAIL][17] ([i915#3324]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-skl7/igt@gem_userptr_bl...@set-cache-level.html * igt@gem_userptr_blits@vma-merge: - shard-snb: NOTRUN -> [FAIL][18] ([i915#2724]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-snb5/igt@gem_userptr_bl...@vma-merge.html - shard-apl: NOTRUN -> [FAIL][19] ([i915#3318]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-apl8/igt@gem_userptr_bl...@vma-merge.html * igt@gem_vm_create@destroy-race: - shard-tglb: [PASS][20] -> [FAIL][21] ([i915#2822]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb5/igt@gem_vm_cre...@destroy-race.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/shard-tglb1/igt@gem_vm_cre...@destroy-race.html * igt@gen9_exec_parse@bb-large: - shard-skl: NOTRUN -> [FAIL][22] ([i915#3296]) [22]:
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
== Series Details ==
Series: series starting with [1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to
better mach eDP spec
URL : https://patchwork.freedesktop.org/series/89328/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9995 -> Patchwork_19969
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19969/index.html
Known issues
Here are the changes found in Patchwork_19969 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19969/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html
Possible fixes
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[INCOMPLETE][2] ([i915#2782]) -> [PASS][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9995/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19969/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
Participating hosts (42 -> 39)
--
Missing(3): fi-icl-y fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9995 -> Patchwork_19969
CI-20190529: 20190529
CI_DRM_9995: 7d0bac8583c9dbbdfe46d438ad5df8d00b91af95 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19969: 245b45f5f4b336f1b3ca0b7241b7f4e24d9a61fd @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
245b45f5f4b3 drm/i915/display/xelpd: Do not program EDP_Y_COORDINATE_ENABLE
8bc83c9cab06 drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19969/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
== Series Details == Series: series starting with [1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec URL : https://patchwork.freedesktop.org/series/89328/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
== Series Details == Series: series starting with [1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec URL : https://patchwork.freedesktop.org/series/89328/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix docbook descriptions for i915_gem_shrinker
== Series Details == Series: drm/i915: Fix docbook descriptions for i915_gem_shrinker URL : https://patchwork.freedesktop.org/series/89297/ State : success == Summary == CI Bug Log - changes from CI_DRM_9993_full -> Patchwork_19962_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19962_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@process: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-snb7/igt@gem_ctx_persiste...@process.html * igt@gem_exec_fair@basic-deadline: - shard-kbl: [PASS][2] -> [FAIL][3] ([i915#2846]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl4/igt@gem_exec_f...@basic-deadline.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-kbl4/igt@gem_exec_f...@basic-deadline.html - shard-apl: NOTRUN -> [FAIL][4] ([i915#2846]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-apl2/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-skl: NOTRUN -> [SKIP][5] ([fdo#109271]) +64 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-skl1/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglb: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-tglb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@vecs0: - shard-apl: NOTRUN -> [FAIL][8] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-apl8/igt@gem_exec_fair@basic-n...@vecs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-kbl: [PASS][9] -> [FAIL][10] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl6/igt@gem_exec_fair@basic-p...@vcs1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-kbl7/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][11] ([i915#2389]) +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-apl8/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [PASS][12] -> [SKIP][13] ([i915#2190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb3/igt@gem_huc_c...@huc-copy.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-tglb6/igt@gem_huc_c...@huc-copy.html - shard-skl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#2190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-skl7/igt@gem_huc_c...@huc-copy.html * igt@gem_mmap_gtt@big-copy-odd: - shard-skl: [PASS][15] -> [FAIL][16] ([i915#307]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-skl1/igt@gem_mmap_...@big-copy-odd.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-skl7/igt@gem_mmap_...@big-copy-odd.html * igt@gem_userptr_blits@input-checking: - shard-snb: NOTRUN -> [DMESG-WARN][17] ([i915#3002]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-snb6/igt@gem_userptr_bl...@input-checking.html * igt@gem_userptr_blits@set-cache-level: - shard-skl: NOTRUN -> [FAIL][18] ([i915#3324]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-skl8/igt@gem_userptr_bl...@set-cache-level.html * igt@gem_userptr_blits@vma-merge: - shard-snb: NOTRUN -> [FAIL][19] ([i915#2724]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-snb6/igt@gem_userptr_bl...@vma-merge.html - shard-apl: NOTRUN -> [FAIL][20] ([i915#3318]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-apl8/igt@gem_userptr_bl...@vma-merge.html * igt@gen9_exec_parse@allowed-single: - shard-skl: NOTRUN -> [DMESG-WARN][21] ([i915#1436] / [i915#716]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-skl7/igt@gen9_exec_pa...@allowed-single.html * igt@gen9_exec_parse@bb-large: - shard-skl: NOTRUN -> [FAIL][22] ([i915#3296]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-skl6/igt@gen9_exec_pa...@bb-large.html - shard-apl: NOTRUN -> [FAIL][23] ([i915#3296]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/shard-apl8/igt@gen9_exec_pa...@bb-large.html * igt@i915_hangman@engine-error@vecs0: - shard-kbl:
[Intel-gfx] [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
DP_PSR_EN_CFG bit 5 aka "Selective Update Region Scan Line Capture Indication" in eDP spec has a ambiguous name, so renaming to better match specification. While at it, replacing bit shit by BIT() macro and adding the version some registers were added to eDP specification. Cc: Cc: Rodrigo Vivi Cc: Jani Nikula Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- include/drm/drm_dp_helper.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 1e85c2021f2f..d6f6a084a190 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -687,14 +687,14 @@ struct drm_device; #define DP_DSC_ENABLE 0x160 /* DP 1.4 */ # define DP_DECOMPRESSION_EN(1 << 0) -#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */ -# define DP_PSR_ENABLE (1 << 0) -# define DP_PSR_MAIN_LINK_ACTIVE (1 << 1) -# define DP_PSR_CRC_VERIFICATION (1 << 2) -# define DP_PSR_FRAME_CAPTURE (1 << 3) -# define DP_PSR_SELECTIVE_UPDATE (1 << 4) -# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS (1 << 5) -# define DP_PSR_ENABLE_PSR2(1 << 6) /* eDP 1.4a */ +#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */ +# define DP_PSR_ENABLE BIT(0) +# define DP_PSR_MAIN_LINK_ACTIVE BIT(1) +# define DP_PSR_CRC_VERIFICATION BIT(2) +# define DP_PSR_FRAME_CAPTURE BIT(3) +# define DP_PSR_SU_REGION_SCANLINE_CAPTURE BIT(4) /* eDP 1.4a */ +# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORSBIT(5) /* eDP 1.4a */ +# define DP_PSR_ENABLE_PSR2BIT(6) /* eDP 1.4a */ #define DP_ADAPTER_CTRL0x1a0 # define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE (1 << 0) -- 2.31.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915/display/xelpd: Do not program EDP_Y_COORDINATE_ENABLE
EDP_Y_COORDINATE_ENABLE became a reserved register in display 13.
EDP_Y_COORDINATE_VALID have the same fate as EDP_Y_COORDINATE_ENABLE
but as we don't need it, removing the macro definition of it.
BSpec: 50422
Cc: Gwan-gyeong Mun
Cc: Anusha Srivatsa
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 4ad756e238c5..66335ec6b7d1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -524,7 +524,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
val = psr_compute_idle_frames(intel_dp) << EDP_PSR2_IDLE_FRAME_SHIFT;
val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
- if (DISPLAY_VER(dev_priv) >= 10)
+ if (DISPLAY_VER(dev_priv) >= 10 && DISPLAY_VER(dev_priv) <= 12)
val |= EDP_Y_COORDINATE_ENABLE;
val |= EDP_PSR2_FRAME_BEFORE_SU(intel_dp->psr.sink_sync_latency + 1);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 66a902b3bb8e..e18576c94cef 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4569,8 +4569,7 @@ enum {
#define EDP_SU_TRACK_ENABLE (1 << 30)
#define TGL_EDP_PSR2_BLOCK_COUNT_NUM_2 (0 << 28)
#define TGL_EDP_PSR2_BLOCK_COUNT_NUM_3 (1 << 28)
-#define EDP_Y_COORDINATE_VALID (1 << 26) /* GLK and CNL+ */
-#define EDP_Y_COORDINATE_ENABLE (1 << 25) /* GLK and CNL+ */
+#define EDP_Y_COORDINATE_ENABLE REG_BIT(25) /* display 10, 11
and 12 */
#define EDP_MAX_SU_DISABLE_TIME(t) ((t) << 20)
#define EDP_MAX_SU_DISABLE_TIME_MASK (0x1f << 20)
#define EDP_PSR2_IO_BUFFER_WAKE_MAX_LINES8
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Add privacy-screen class and connector properties (rev3)
== Series Details ==
Series: drm: Add privacy-screen class and connector properties (rev3)
URL : https://patchwork.freedesktop.org/series/79259/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9994 -> Patchwork_19968
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19968/index.html
Known issues
Here are the changes found in Patchwork_19968 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u: NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19968/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html
* igt@core_hotunplug@unbind-rebind:
- fi-bdw-5557u: NOTRUN -> [WARN][2] ([i915#2283])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19968/fi-bdw-5557u/igt@core_hotunp...@unbind-rebind.html
* igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u: NOTRUN -> [SKIP][3] ([fdo#109271] / [fdo#111827]) +8
similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19968/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html
Possible fixes
* igt@i915_selftest@live@gt_heartbeat:
- {fi-tgl-dsi}: [DMESG-FAIL][4] ([i915#541]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19968/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1222]: https://gitlab.freedesktop.org/drm/intel/issues/1222
[i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (42 -> 40)
--
Missing(2): fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9994 -> Patchwork_19968
CI-20190529: 20190529
CI_DRM_9994: 37ccc1432d3a2e6dddeaa2a68659aa790a9ad50c @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19968: ed2a0fed7736e04328b5a876261c51a982463bcd @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ed2a0fed7736 drm/i915: Add privacy-screen support
ff66a2279810 platform/x86: thinkpad_acpi: Register a privacy-screen device
d7f9f5f26c6f platform/x86: thinkpad_acpi: Get privacy-screen / lcdshadow ACPI
handles only once
ee59d864afd4 platform/x86: thinkpad_acpi: Add hotkey_notify_extended_hotkey()
helper
1b1cb90d0bce drm/connector: Add a drm_connector privacy-screen helper functions
4f93f9d92a68 drm/privacy-screen: Add notifier support
9bd51402f3ba drm/privacy-screen: Add X86 specific arch init code
7e5c15daa117 drm: Add privacy-screen class (v2)
ac8be957664f drm/connector: Add support for privacy-screen properties (v4)
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19968/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix docbook descriptions for i915_cmd_parser
== Series Details == Series: drm/i915: Fix docbook descriptions for i915_cmd_parser URL : https://patchwork.freedesktop.org/series/89295/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9993_full -> Patchwork_19961_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_19961_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19961_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19961_full: ### IGT changes ### Possible regressions * igt@i915_pm_rpm@system-suspend-devices: - shard-skl: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-skl10/igt@i915_pm_...@system-suspend-devices.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-skl2/igt@i915_pm_...@system-suspend-devices.html Known issues Here are the changes found in Patchwork_19961_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-clear: - shard-glk: [PASS][3] -> [FAIL][4] ([i915#1888] / [i915#3160]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk1/igt@gem_cre...@create-clear.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-glk2/igt@gem_cre...@create-clear.html * igt@gem_ctx_isolation@preservation-s3@vecs0: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([i915#198]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-skl8/igt@gem_ctx_isolation@preservation...@vecs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-skl4/igt@gem_ctx_isolation@preservation...@vecs0.html * igt@gem_ctx_persistence@engines-queued: - shard-snb: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-snb5/igt@gem_ctx_persiste...@engines-queued.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#3063]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb1/igt@gem_...@unwedge-stress.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-tglb2/igt@gem_...@unwedge-stress.html - shard-iclb: [PASS][10] -> [TIMEOUT][11] ([i915#2369] / [i915#2481] / [i915#3070]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-iclb5/igt@gem_...@unwedge-stress.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-iclb5/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-apl: NOTRUN -> [FAIL][12] ([i915#2846]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-apl7/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-skl: NOTRUN -> [SKIP][13] ([fdo#109271]) +66 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-skl4/igt@gem_exec_fair@basic-f...@rcs0.html - shard-tglb: [PASS][14] -> [FAIL][15] ([i915#2842]) +1 similar issue [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb1/igt@gem_exec_fair@basic-f...@rcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][16] -> [FAIL][17] ([i915#2842]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-glk2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-kbl: [PASS][18] -> [FAIL][19] ([i915#2842]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl6/igt@gem_exec_fair@basic-p...@vcs1.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-kbl6/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_flush@basic-batch-kernel-default-cmd: - shard-snb: NOTRUN -> [SKIP][20] ([fdo#109271]) +174 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-snb7/igt@gem_exec_fl...@basic-batch-kernel-default-cmd.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][21] ([i915#2389]) +3 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/shard-apl3/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_huc_copy@huc-copy: - shard-skl: NOTRUN -> [SKIP][22]
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm: Add privacy-screen class and connector properties (rev3)
== Series Details == Series: drm: Add privacy-screen class and connector properties (rev3) URL : https://patchwork.freedesktop.org/series/79259/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: Add privacy-screen class and connector properties (rev3)
== Series Details == Series: drm: Add privacy-screen class and connector properties (rev3) URL : https://patchwork.freedesktop.org/series/79259/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - + ^~~ + ^~~ + ~~^~ + ~~^~ +~~ +~~ + ^~~~ + ^~~~ + ^~~~ + ^~~~ +connector->privacy_screen_hw_state_property, hw_state); +connector->privacy_screen_hw_state_property, hw_state); + connector->state->privacy_screen_sw_state = sw_state; + connector->state->privacy_screen_sw_state = sw_state; +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB" +./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Add privacy-screen class and connector properties (rev3)
== Series Details ==
Series: drm: Add privacy-screen class and connector properties (rev3)
URL : https://patchwork.freedesktop.org/series/79259/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ac8be957664f drm/connector: Add support for privacy-screen properties (v4)
-:30: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-authored-by:
#30:
Co-authored-by: Hans de Goede
-:149: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#149: FILE: drivers/gpu/drm/drm_connector.c:2319:
+ drm_property_create_enum(connector->dev, DRM_MODE_PROP_ENUM,
+ "privacy-screen sw-state",
-:154: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#154: FILE: drivers/gpu/drm/drm_connector.c:2324:
+ drm_property_create_enum(connector->dev,
+ DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_ENUM,
total: 0 errors, 1 warnings, 2 checks, 205 lines checked
7e5c15daa117 drm: Add privacy-screen class (v2)
-:125: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#125:
new file mode 100644
-:162: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev' - possible
side-effects?
#162: FILE: drivers/gpu/drm/drm_privacy_screen.c:33:
+#define to_drm_privacy_screen(dev) \
+ container_of(dev, struct drm_privacy_screen, dev)
-:210: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#210: FILE: drivers/gpu/drm/drm_privacy_screen.c:81:
+static struct drm_privacy_screen *drm_privacy_screen_get_by_name(
-:411: CHECK:LINE_SPACING: Please use a blank line after
function/struct/union/enum declarations
#411: FILE: drivers/gpu/drm/drm_privacy_screen.c:282:
+}
+/*
-:473: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#473: FILE: drivers/gpu/drm/drm_privacy_screen.c:344:
+struct drm_privacy_screen *drm_privacy_screen_register(
-:569: CHECK:LINE_SPACING: Please use a blank line after
function/struct/union/enum declarations
#569: FILE: include/drm/drm_privacy_screen_consumer.h:33:
+}
+static inline void drm_privacy_screen_put(struct drm_privacy_screen *priv)
-:572: CHECK:LINE_SPACING: Please use a blank line after
function/struct/union/enum declarations
#572: FILE: include/drm/drm_privacy_screen_consumer.h:36:
+}
+static inline int drm_privacy_screen_set_sw_state(struct drm_privacy_screen
*priv,
-:577: CHECK:LINE_SPACING: Please use a blank line after
function/struct/union/enum declarations
#577: FILE: include/drm/drm_privacy_screen_consumer.h:41:
+}
+static inline void drm_privacy_screen_get_state(struct drm_privacy_screen
*priv,
-:666: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#666: FILE: include/drm/drm_privacy_screen_driver.h:76:
+struct drm_privacy_screen *drm_privacy_screen_register(
-:713: CHECK:LINE_SPACING: Please use a blank line after
function/struct/union/enum declarations
#713: FILE: include/drm/drm_privacy_screen_machine.h:37:
+}
+static inline void drm_privacy_screen_lookup_exit(void)
total: 0 errors, 1 warnings, 9 checks, 638 lines checked
9bd51402f3ba drm/privacy-screen: Add X86 specific arch init code
-:29: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#29:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 110 lines checked
4f93f9d92a68 drm/privacy-screen: Add notifier support
-:121: CHECK:LINE_SPACING: Please use a blank line after
function/struct/union/enum declarations
#121: FILE: include/drm/drm_privacy_screen_consumer.h:51:
}
+static inline int drm_privacy_screen_register_notifier(struct
drm_privacy_screen *priv,
-:126: CHECK:LINE_SPACING: Please use a blank line after
function/struct/union/enum declarations
#126: FILE: include/drm/drm_privacy_screen_consumer.h:56:
+}
+static inline int drm_privacy_screen_unregister_notifier(struct
drm_privacy_screen *priv,
total: 0 errors, 0 warnings, 2 checks, 123 lines checked
1b1cb90d0bce drm/connector: Add a drm_connector privacy-screen helper functions
-:58: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#58: FILE: drivers/gpu/drm/drm_connector.c:542:
+ drm_privacy_screen_register_notifier(connector->privacy_screen,
+ >privacy_screen_notifier);
-:68: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#68: FILE: drivers/gpu/drm/drm_connector.c:573:
+ drm_privacy_screen_unregister_notifier(
-:79: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#79: FILE: drivers/gpu/drm/drm_connector.c:2372:
+static void drm_connector_update_privacy_screen_properties(
-:89: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#89: FILE: drivers/gpu/drm/drm_connector.c:2382:
+ drm_object_property_set_value(>base,
+ connector->privacy_screen_hw_state_property, hw_state);
-:92: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#92: FILE: drivers/gpu/drm/drm_connector.c:2385:
+static
[Intel-gfx] [PATCH v2 9/9] drm/i915: Add privacy-screen support
Add support for eDP panels with a built-in privacy screen using the
new drm_privacy_screen class.
One thing which stands out here is the addition of these 2 lines to
intel_atomic_commit_tail:
for_each_new_connector_in_state(>base, connector, ...
drm_connector_update_privacy_screen(connector, state);
It may seem more logical to instead take care of updating the
privacy-screen state by marking the crtc as needing a modeset and then
do this in both the encoder update_pipe (for fast-sets) and enable
(for full modesets) callbacks. But ATM these callbacks only get passed
the new connector_state and these callbacks are all called after
drm_atomic_helper_swap_state() at which point there is no way to get
the old state from the new state.
Without access to the old state, we do not know if the sw_state of
the privacy-screen has changes so we would need to call
drm_privacy_screen_set_sw_state() unconditionally. This is undesirable
since all current known privacy-screen providers use ACPI calls which
are somewhat expensive to make.
Also, as all providers use ACPI calls, rather then poking GPU registers,
there is no need to order this together with other encoder operations.
Since no GPU poking is involved having this as a separate step of the
commit process actually is the logical thing to do.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +
drivers/gpu/drm/i915/display/intel_dp.c | 10 ++
drivers/gpu/drm/i915/i915_pci.c | 12
3 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index a10e26380ef3..b11fcc660446 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10159,6 +10159,8 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
struct drm_device *dev = state->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc_state *new_crtc_state, *old_crtc_state;
+ struct drm_connector_state *new_connector_state;
+ struct drm_connector *connector;
struct intel_crtc *crtc;
u64 put_domains[I915_MAX_PIPES] = {};
intel_wakeref_t wakeref = 0;
@@ -10256,6 +10258,9 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
intel_color_load_luts(new_crtc_state);
}
+ for_each_new_connector_in_state(>base, connector,
new_connector_state, i)
+ drm_connector_update_privacy_screen(connector, >base);
+
/*
* Now that the vblank has passed, we can go ahead and program the
* optimal watermarks on platforms that need two-step watermark
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 52ea09fc5e70..57864782d922 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -37,6 +37,7 @@
#include
#include
#include
+#include
#include
#include "g4x_dp.h"
@@ -5178,6 +5179,7 @@ static bool intel_edp_init_connector(struct intel_dp
*intel_dp,
struct drm_connector *connector = _connector->base;
struct drm_display_mode *fixed_mode = NULL;
struct drm_display_mode *downclock_mode = NULL;
+ struct drm_privacy_screen *privacy_screen;
bool has_dpcd;
enum pipe pipe = INVALID_PIPE;
struct edid *edid;
@@ -5268,6 +5270,14 @@ static bool intel_edp_init_connector(struct intel_dp
*intel_dp,
fixed_mode->hdisplay, fixed_mode->vdisplay);
}
+ privacy_screen = drm_privacy_screen_get(>pdev->dev, NULL);
+ if (!IS_ERR(privacy_screen)) {
+ drm_connector_attach_privacy_screen_provider(connector,
+privacy_screen);
+ } else if (PTR_ERR(privacy_screen) != -ENODEV) {
+ drm_warn(_priv->drm, "Error getting privacy-screen\n");
+ }
+
return true;
out_vdd_off:
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 7786217638ed..09d52ecc3713 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -26,6 +26,7 @@
#include
#include
+#include
#include
#include "display/intel_fbdev.h"
@@ -1067,6 +1068,7 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
{
struct intel_device_info *intel_info =
(struct intel_device_info *) ent->driver_data;
+ struct drm_privacy_screen *privacy_screen;
int err;
if (intel_info->require_force_probe &&
@@ -1095,7 +1097,17 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
if (vga_switcheroo_client_probe_defer(pdev))
return -EPROBE_DEFER;
+ /*
+* We do not handle
[Intel-gfx] [PATCH v2 3/9] drm/privacy-screen: Add X86 specific arch init code
Add X86 specific arch init code, which fills the privacy-screen lookup
table by checking for various vendor specific ACPI interfaces for
controlling the privacy-screen.
This initial version only checks for the Lenovo Thinkpad specific ACPI
methods for privacy-screen control.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/Makefile | 2 +-
drivers/gpu/drm/drm_privacy_screen_x86.c | 86
include/drm/drm_privacy_screen_machine.h | 5 ++
3 files changed, 92 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/drm_privacy_screen_x86.c
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 578853d18a3d..2e226b57de24 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -32,7 +32,7 @@ drm-$(CONFIG_AGP) += drm_agpsupport.o
drm-$(CONFIG_PCI) += drm_pci.o
drm-$(CONFIG_DEBUG_FS) += drm_debugfs.o drm_debugfs_crc.o
drm-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) += drm_edid_load.o
-drm-$(CONFIG_DRM_PRIVACY_SCREEN) += drm_privacy_screen.o
+drm-$(CONFIG_DRM_PRIVACY_SCREEN) += drm_privacy_screen.o
drm_privacy_screen_x86.o
drm_vram_helper-y := drm_gem_vram_helper.o
obj-$(CONFIG_DRM_VRAM_HELPER) += drm_vram_helper.o
diff --git a/drivers/gpu/drm/drm_privacy_screen_x86.c
b/drivers/gpu/drm/drm_privacy_screen_x86.c
new file mode 100644
index ..a2cafb294ca6
--- /dev/null
+++ b/drivers/gpu/drm/drm_privacy_screen_x86.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2020 Red Hat, Inc.
+ *
+ * Authors:
+ * Hans de Goede
+ */
+
+#include
+#include
+
+#ifdef CONFIG_X86
+static struct drm_privacy_screen_lookup arch_lookup;
+
+struct arch_init_data {
+ struct drm_privacy_screen_lookup lookup;
+ bool (*detect)(void);
+};
+
+#if IS_ENABLED(CONFIG_THINKPAD_ACPI)
+static acpi_status __init acpi_set_handle(acpi_handle handle, u32 level,
+ void *context, void **return_value)
+{
+ *(acpi_handle *)return_value = handle;
+ return AE_CTRL_TERMINATE;
+}
+
+static bool __init detect_thinkpad_privacy_screen(void)
+{
+ union acpi_object obj = { .type = ACPI_TYPE_INTEGER };
+ struct acpi_object_list args = { .count = 1, .pointer = , };
+ acpi_handle ec_handle = NULL;
+ unsigned long long output;
+ acpi_status status;
+
+ /* Get embedded-controller handle */
+ status = acpi_get_devices("PNP0C09", acpi_set_handle, NULL, _handle);
+ if (ACPI_FAILURE(status) || !ec_handle)
+ return false;
+
+ /* And call the privacy-screen get-status method */
+ status = acpi_evaluate_integer(ec_handle, "HKEY.GSSS", , );
+ if (ACPI_FAILURE(status))
+ return false;
+
+ return (output & 0x1) ? true : false;
+}
+#endif
+
+static const struct arch_init_data arch_init_data[] __initconst = {
+#if IS_ENABLED(CONFIG_THINKPAD_ACPI)
+ {
+ .lookup = {
+ .dev_id = NULL,
+ .con_id = NULL,
+ .provider = "privacy_screen-thinkpad_acpi",
+ },
+ .detect = detect_thinkpad_privacy_screen,
+ },
+#endif
+};
+
+void __init drm_privacy_screen_lookup_init(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(arch_init_data); i++) {
+ if (!arch_init_data[i].detect())
+ continue;
+
+ pr_info("Found '%s' privacy-screen provider\n",
+ arch_init_data[i].lookup.provider);
+
+ /* Make a copy because arch_init_data is __initconst */
+ arch_lookup = arch_init_data[i].lookup;
+ drm_privacy_screen_lookup_add(_lookup);
+ break;
+ }
+}
+
+void drm_privacy_screen_lookup_exit(void)
+{
+ if (arch_lookup.provider)
+ drm_privacy_screen_lookup_remove(_lookup);
+}
+#endif /* ifdef CONFIG_X86 */
diff --git a/include/drm/drm_privacy_screen_machine.h
b/include/drm/drm_privacy_screen_machine.h
index aaa0d38cce92..02e5371904d3 100644
--- a/include/drm/drm_privacy_screen_machine.h
+++ b/include/drm/drm_privacy_screen_machine.h
@@ -31,11 +31,16 @@ struct drm_privacy_screen_lookup {
void drm_privacy_screen_lookup_add(struct drm_privacy_screen_lookup *lookup);
void drm_privacy_screen_lookup_remove(struct drm_privacy_screen_lookup
*lookup);
+#if IS_ENABLED(CONFIG_DRM_PRIVACY_SCREEN) && IS_ENABLED(CONFIG_X86)
+void drm_privacy_screen_lookup_init(void);
+void drm_privacy_screen_lookup_exit(void);
+#else
static inline void drm_privacy_screen_lookup_init(void)
{
}
static inline void drm_privacy_screen_lookup_exit(void)
{
}
+#endif
#endif
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 8/9] platform/x86: thinkpad_acpi: Register a privacy-screen device
Register a privacy-screen device on laptops with a privacy-screen,
this exports the PrivacyGuard features to user-space using a
standardized vendor-agnostic sysfs interface. Note the sysfs interface
is read-only.
Registering a privacy-screen device with the new privacy-screen class
code will also allow the GPU driver to get a handle to it and export
the privacy-screen setting as a property on the DRM connector object
for the LCD panel. This DRM connector property is news standardized
interface which all user-space code should use to query and control
the privacy-screen.
Signed-off-by: Hans de Goede
---
Changes in v2:
- Make the new lcdshadow_set_sw_state, lcdshadow_get_hw_state and
lcdshadow_ops symbols static
- Update state and call drm_privacy_screen_call_notifier_chain()
when the state is changed by pressing the Fn + D hotkey combo
---
drivers/platform/x86/Kconfig | 2 +
drivers/platform/x86/thinkpad_acpi.c | 91
2 files changed, 68 insertions(+), 25 deletions(-)
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 461ec61530eb..ae49f1658aba 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -484,7 +484,9 @@ config THINKPAD_ACPI
depends on RFKILL || RFKILL = n
depends on ACPI_VIDEO || ACPI_VIDEO = n
depends on BACKLIGHT_CLASS_DEVICE
+ depends on DRM
select ACPI_PLATFORM_PROFILE
+ select DRM_PRIVACY_SCREEN
select HWMON
select NVRAM
select NEW_LEDS
diff --git a/drivers/platform/x86/thinkpad_acpi.c
b/drivers/platform/x86/thinkpad_acpi.c
index fe919700b8ae..766c6d64b0fb 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -73,6 +73,7 @@
#include
#include
#include
+#include
/* ThinkPad CMOS commands */
#define TP_CMOS_VOLUME_DOWN0
@@ -156,6 +157,7 @@ enum tpacpi_hkey_event_t {
TP_HKEY_EV_VOL_UP = 0x1015, /* Volume up or unmute */
TP_HKEY_EV_VOL_DOWN = 0x1016, /* Volume down or unmute */
TP_HKEY_EV_VOL_MUTE = 0x1017, /* Mixer output mute */
+ TP_HKEY_EV_PRIVACYGUARD_TOGGLE = 0x130f, /* Toggle priv.guard on/off */
/* Reasons for waking up from S3/S4 */
TP_HKEY_EV_WKUP_S3_UNDOCK = 0x2304, /* undock requested, S3 */
@@ -3882,6 +3884,12 @@ static bool hotkey_notify_extended_hotkey(const u32 hkey)
{
unsigned int scancode;
+ switch (hkey) {
+ case TP_HKEY_EV_PRIVACYGUARD_TOGGLE:
+ tpacpi_driver_event(hkey);
+ return true;
+ }
+
/* Extended keycodes start at 0x300 and our offset into the map
* TP_ACPI_HOTKEYSCAN_EXTENDED_START. The calculated scancode
* will be positive, but might not be in the correct range.
@@ -9759,30 +9767,40 @@ static struct ibm_struct battery_driver_data = {
* LCD Shadow subdriver, for the Lenovo PrivacyGuard feature
*/
+static struct drm_privacy_screen *lcdshadow_dev;
static acpi_handle lcdshadow_get_handle;
static acpi_handle lcdshadow_set_handle;
-static int lcdshadow_state;
-static int lcdshadow_on_off(bool state)
+static int lcdshadow_set_sw_state(struct drm_privacy_screen *priv,
+ enum drm_privacy_screen_status state)
{
int output;
+ if (WARN_ON(!mutex_is_locked(>lock)))
+ return -EIO;
+
if (!acpi_evalf(lcdshadow_set_handle, , NULL, "dd", (int)state))
return -EIO;
- lcdshadow_state = state;
+ priv->hw_state = priv->sw_state = state;
return 0;
}
-static int lcdshadow_set(bool on)
+static void lcdshadow_get_hw_state(struct drm_privacy_screen *priv)
{
- if (lcdshadow_state < 0)
- return lcdshadow_state;
- if (lcdshadow_state == on)
- return 0;
- return lcdshadow_on_off(on);
+ int output;
+
+ if (!acpi_evalf(lcdshadow_get_handle, , NULL, "dd", 0))
+ return;
+
+ priv->hw_state = priv->sw_state = output & 0x1;
}
+static const struct drm_privacy_screen_ops lcdshadow_ops = {
+ .set_sw_state = lcdshadow_set_sw_state,
+ .get_hw_state = lcdshadow_get_hw_state,
+};
+
static int tpacpi_lcdshadow_init(struct ibm_init_struct *iibm)
{
acpi_status status1, status2;
@@ -9790,36 +9808,44 @@ static int tpacpi_lcdshadow_init(struct ibm_init_struct
*iibm)
status1 = acpi_get_handle(hkey_handle, "GSSS", _get_handle);
status2 = acpi_get_handle(hkey_handle, "", _set_handle);
- if (ACPI_FAILURE(status1) || ACPI_FAILURE(status2)) {
- lcdshadow_state = -ENODEV;
+ if (ACPI_FAILURE(status1) || ACPI_FAILURE(status2))
return 0;
- }
- if (!acpi_evalf(lcdshadow_get_handle, , NULL, "dd", 0)) {
- lcdshadow_state = -EIO;
+ if (!acpi_evalf(lcdshadow_get_handle, , NULL, "dd", 0))
return -EIO;
-
[Intel-gfx] [PATCH v2 5/9] drm/connector: Add a drm_connector privacy-screen helper functions
Add 2 drm_connector privacy-screen helper functions:
1. drm_connector_attach_privacy_screen_provider(), this function creates
and attaches the standard privacy-screen properties and registers a
generic notifier for generating sysfs-connector-status-events on external
changes to the privacy-screen status.
2. drm_connector_update_privacy_screen(), Check if the passed in atomic
state contains a privacy-screen sw_state change for the connector and if
it does, call drm_privacy_screen_set_sw_state() with the new sw_state.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_connector.c | 113
include/drm/drm_connector.h | 12
2 files changed, 125 insertions(+)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index ca8a76decd4c..958a332374af 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -20,6 +20,7 @@
* OF THIS SOFTWARE.
*/
+#include
#include
#include
#include
@@ -27,6 +28,7 @@
#include
#include
#include
+#include
#include
#include
@@ -451,6 +453,11 @@ void drm_connector_cleanup(struct drm_connector *connector)
DRM_CONNECTOR_REGISTERED))
drm_connector_unregister(connector);
+ if (connector->privacy_screen) {
+ drm_privacy_screen_put(connector->privacy_screen);
+ connector->privacy_screen = NULL;
+ }
+
if (connector->tile_group) {
drm_mode_put_tile_group(dev, connector->tile_group);
connector->tile_group = NULL;
@@ -530,6 +537,10 @@ int drm_connector_register(struct drm_connector *connector)
/* Let userspace know we have a new connector */
drm_sysfs_hotplug_event(connector->dev);
+ if (connector->privacy_screen)
+ drm_privacy_screen_register_notifier(connector->privacy_screen,
+ >privacy_screen_notifier);
+
goto unlock;
err_debugfs:
@@ -558,6 +569,11 @@ void drm_connector_unregister(struct drm_connector
*connector)
return;
}
+ if (connector->privacy_screen)
+ drm_privacy_screen_unregister_notifier(
+ connector->privacy_screen,
+ >privacy_screen_notifier);
+
if (connector->funcs->early_unregister)
connector->funcs->early_unregister(connector);
@@ -2353,6 +2369,103 @@ drm_connector_attach_privacy_screen_properties(struct
drm_connector *connector)
}
EXPORT_SYMBOL(drm_connector_attach_privacy_screen_properties);
+static void drm_connector_update_privacy_screen_properties(
+ struct drm_connector *connector)
+{
+ enum drm_privacy_screen_status sw_state, hw_state;
+
+ drm_privacy_screen_get_state(connector->privacy_screen,
+_state, _state);
+
+ connector->state->privacy_screen_sw_state = sw_state;
+ drm_object_property_set_value(>base,
+ connector->privacy_screen_hw_state_property, hw_state);
+}
+
+static int drm_connector_privacy_screen_notifier(
+ struct notifier_block *nb, unsigned long action, void *data)
+{
+ struct drm_connector *connector =
+ container_of(nb, struct drm_connector, privacy_screen_notifier);
+ struct drm_device *dev = connector->dev;
+
+ drm_modeset_lock(>mode_config.connection_mutex, NULL);
+ drm_connector_update_privacy_screen_properties(connector);
+ drm_modeset_unlock(>mode_config.connection_mutex);
+
+ drm_sysfs_connector_status_event(connector,
+ connector->privacy_screen_sw_state_property);
+ drm_sysfs_connector_status_event(connector,
+ connector->privacy_screen_hw_state_property);
+
+ return NOTIFY_DONE;
+}
+
+/**
+ * drm_connector_attach_privacy_screen_provider - attach a privacy-screen to
+ *the connector
+ * @connector: connector to attach the privacy-screen to
+ * @priv: drm_privacy_screen to attach
+ *
+ * Create and attach the standard privacy-screen properties and register
+ * a generic notifier for generating sysfs-connector-status-events
+ * on external changes to the privacy-screen status.
+ * This function takes ownership of the passed in drm_privacy_screen and will
+ * call drm_privacy_screen_put() on it when the connector is destroyed.
+ */
+void drm_connector_attach_privacy_screen_provider(
+ struct drm_connector *connector, struct drm_privacy_screen *priv)
+{
+ connector->privacy_screen = priv;
+ connector->privacy_screen_notifier.notifier_call =
+ drm_connector_privacy_screen_notifier;
+
+ drm_connector_create_privacy_screen_properties(connector);
+ drm_connector_update_privacy_screen_properties(connector);
+ drm_connector_attach_privacy_screen_properties(connector);
+}
[Intel-gfx] [PATCH v2 7/9] platform/x86: thinkpad_acpi: Get privacy-screen / lcdshadow ACPI handles only once
Get the privacy-screen / lcdshadow ACPI handles once and cache them,
instead of retrieving them every time we need them.
Signed-off-by: Hans de Goede
---
drivers/platform/x86/thinkpad_acpi.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/platform/x86/thinkpad_acpi.c
b/drivers/platform/x86/thinkpad_acpi.c
index 683c175cc28a..fe919700b8ae 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -9759,19 +9759,15 @@ static struct ibm_struct battery_driver_data = {
* LCD Shadow subdriver, for the Lenovo PrivacyGuard feature
*/
+static acpi_handle lcdshadow_get_handle;
+static acpi_handle lcdshadow_set_handle;
static int lcdshadow_state;
static int lcdshadow_on_off(bool state)
{
- acpi_handle set_shadow_handle;
int output;
- if (ACPI_FAILURE(acpi_get_handle(hkey_handle, "",
_shadow_handle))) {
- pr_warn("Thinkpad ACPI has no %s interface.\n", "");
- return -EIO;
- }
-
- if (!acpi_evalf(set_shadow_handle, , NULL, "dd", (int)state))
+ if (!acpi_evalf(lcdshadow_set_handle, , NULL, "dd", (int)state))
return -EIO;
lcdshadow_state = state;
@@ -9789,15 +9785,17 @@ static int lcdshadow_set(bool on)
static int tpacpi_lcdshadow_init(struct ibm_init_struct *iibm)
{
- acpi_handle get_shadow_handle;
+ acpi_status status1, status2;
int output;
- if (ACPI_FAILURE(acpi_get_handle(hkey_handle, "GSSS",
_shadow_handle))) {
+ status1 = acpi_get_handle(hkey_handle, "GSSS", _get_handle);
+ status2 = acpi_get_handle(hkey_handle, "", _set_handle);
+ if (ACPI_FAILURE(status1) || ACPI_FAILURE(status2)) {
lcdshadow_state = -ENODEV;
return 0;
}
- if (!acpi_evalf(get_shadow_handle, , NULL, "dd", 0)) {
+ if (!acpi_evalf(lcdshadow_get_handle, , NULL, "dd", 0)) {
lcdshadow_state = -EIO;
return -EIO;
}
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 6/9] platform/x86: thinkpad_acpi: Add hotkey_notify_extended_hotkey() helper
Factor the extended hotkey handling out of hotkey_notify_hotkey() and
into a new hotkey_notify_extended_hotkey() helper.
This is a preparation patch for adding support the privacy-screen hotkey
toggle (which needs some special handling, it should NOT send an evdev
key-event to userspace...).
Signed-off-by: Hans de Goede
---
drivers/platform/x86/thinkpad_acpi.c | 30 ++--
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/platform/x86/thinkpad_acpi.c
b/drivers/platform/x86/thinkpad_acpi.c
index 0d9e2ddbf904..683c175cc28a 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -3878,6 +3878,24 @@ static bool
adaptive_keyboard_hotkey_notify_hotkey(unsigned int scancode)
}
}
+static bool hotkey_notify_extended_hotkey(const u32 hkey)
+{
+ unsigned int scancode;
+
+ /* Extended keycodes start at 0x300 and our offset into the map
+* TP_ACPI_HOTKEYSCAN_EXTENDED_START. The calculated scancode
+* will be positive, but might not be in the correct range.
+*/
+ scancode = (hkey & 0xfff) - (0x300 - TP_ACPI_HOTKEYSCAN_EXTENDED_START);
+ if (scancode >= TP_ACPI_HOTKEYSCAN_EXTENDED_START &&
+ scancode < TPACPI_HOTKEY_MAP_LEN) {
+ tpacpi_input_send_key(scancode);
+ return true;
+ }
+
+ return false;
+}
+
static bool hotkey_notify_hotkey(const u32 hkey,
bool *send_acpi_ev,
bool *ignore_acpi_ev)
@@ -3912,17 +3930,7 @@ static bool hotkey_notify_hotkey(const u32 hkey,
return adaptive_keyboard_hotkey_notify_hotkey(scancode);
case 3:
- /* Extended keycodes start at 0x300 and our offset into the map
-* TP_ACPI_HOTKEYSCAN_EXTENDED_START. The calculated scancode
-* will be positive, but might not be in the correct range.
-*/
- scancode -= (0x300 - TP_ACPI_HOTKEYSCAN_EXTENDED_START);
- if (scancode >= TP_ACPI_HOTKEYSCAN_EXTENDED_START &&
- scancode < TPACPI_HOTKEY_MAP_LEN) {
- tpacpi_input_send_key(scancode);
- return true;
- }
- break;
+ return hotkey_notify_extended_hotkey(hkey);
}
return false;
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 4/9] drm/privacy-screen: Add notifier support
Add support for privacy-screen consumers to register a notifier to
be notified of external (e.g. done by the hw itself on a hotkey press)
state changes.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_privacy_screen.c | 67 +++
include/drm/drm_privacy_screen_consumer.h | 15 +
include/drm/drm_privacy_screen_driver.h | 4 ++
3 files changed, 86 insertions(+)
diff --git a/drivers/gpu/drm/drm_privacy_screen.c
b/drivers/gpu/drm/drm_privacy_screen.c
index 294a09194bfb..7a5f878c3171 100644
--- a/drivers/gpu/drm/drm_privacy_screen.c
+++ b/drivers/gpu/drm/drm_privacy_screen.c
@@ -255,6 +255,49 @@ void drm_privacy_screen_get_state(struct
drm_privacy_screen *priv,
}
EXPORT_SYMBOL(drm_privacy_screen_get_state);
+/**
+ * drm_privacy_screen_register_notifier - register a notifier
+ * @priv: Privacy screen to register the notifier with
+ * @nb: Notifier-block for the notifier to register
+ *
+ * Register a notifier with the privacy-screen to be notified of changes made
+ * to the privacy-screen state from outside of the privacy-screen class.
+ * E.g. the state may be changed by the hardware itself in response to a
+ * hotkey press.
+ *
+ * The notifier is called with no locks held. The new hw_state and sw_state
+ * can be retrieved using the drm_privacy_screen_get_state() function.
+ * A pointer to the drm_privacy_screen's struct is passed as the void *data
+ * argument of the notifier_block's notifier_call.
+ *
+ * The notifier will NOT be called when changes are made through
+ * drm_privacy_screen_set_sw_state(). It is only called for external changes.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int drm_privacy_screen_register_notifier(struct drm_privacy_screen *priv,
+struct notifier_block *nb)
+{
+ return blocking_notifier_chain_register(>notifier_head, nb);
+}
+EXPORT_SYMBOL(drm_privacy_screen_register_notifier);
+
+/**
+ * drm_privacy_screen_unregister_notifier - unregister a notifier
+ * @priv: Privacy screen to register the notifier with
+ * @nb: Notifier-block for the notifier to register
+ *
+ * Unregister a notifier registered with
drm_privacy_screen_register_notifier().
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int drm_privacy_screen_unregister_notifier(struct drm_privacy_screen *priv,
+ struct notifier_block *nb)
+{
+ return blocking_notifier_chain_unregister(>notifier_head, nb);
+}
+EXPORT_SYMBOL(drm_privacy_screen_unregister_notifier);
+
/*** drm_privacy_screen_driver.h functions ***/
static ssize_t sw_state_show(struct device *dev,
@@ -352,6 +395,7 @@ struct drm_privacy_screen *drm_privacy_screen_register(
return ERR_PTR(-ENOMEM);
mutex_init(>lock);
+ BLOCKING_INIT_NOTIFIER_HEAD(>notifier_head);
priv->dev.class = drm_class;
priv->dev.type = _privacy_screen_type;
@@ -399,3 +443,26 @@ void drm_privacy_screen_unregister(struct
drm_privacy_screen *priv)
device_unregister(>dev);
}
EXPORT_SYMBOL(drm_privacy_screen_unregister);
+
+/**
+ * drm_privacy_screen_call_notifier_chain - notify consumers of state change
+ * @priv: Privacy screen to register the notifier with
+ *
+ * A privacy-screen provider driver can call this functions upon external
+ * changes to the privacy-screen state. E.g. the state may be changed by the
+ * hardware itself in response to a hotkey press.
+ * This function must be called without holding the privacy-screen lock.
+ * the driver must update sw_state and hw_state to reflect the new state before
+ * calling this function.
+ * The expected behavior from the driver upon receiving an external state
+ * change event is: 1. Take the lock; 2. Update sw_state and hw_state;
+ * 3. Release the lock. 4. Call drm_privacy_screen_call_notifier_chain().
+ */
+void drm_privacy_screen_call_notifier_chain(struct drm_privacy_screen *priv)
+{
+ if (WARN_ON(mutex_is_locked(>lock)))
+ return;
+
+ blocking_notifier_call_chain(>notifier_head, 0, priv);
+}
+EXPORT_SYMBOL(drm_privacy_screen_call_notifier_chain);
diff --git a/include/drm/drm_privacy_screen_consumer.h
b/include/drm/drm_privacy_screen_consumer.h
index 941c88b46889..31746a745439 100644
--- a/include/drm/drm_privacy_screen_consumer.h
+++ b/include/drm/drm_privacy_screen_consumer.h
@@ -24,6 +24,11 @@ int drm_privacy_screen_set_sw_state(struct
drm_privacy_screen *priv,
void drm_privacy_screen_get_state(struct drm_privacy_screen *priv,
enum drm_privacy_screen_status *sw_state_ret,
enum drm_privacy_screen_status *hw_state_ret);
+
+int drm_privacy_screen_register_notifier(struct drm_privacy_screen *priv,
+struct notifier_block *nb);
+int drm_privacy_screen_unregister_notifier(struct drm_privacy_screen *priv,
+ struct
[Intel-gfx] [PATCH v2 2/9] drm: Add privacy-screen class (v2)
On some new laptops the LCD panel has a builtin electronic privacy-screen.
We want to export this functionality as a property on the drm connector
object. But often this functionality is not exposed on the GPU but on some
other (ACPI) device.
This commit adds a privacy-screen class allowing the driver for these
other devices to register themselves as a privacy-screen provider; and
allowing the drm/kms code to get a privacy-screen provider associated
with a specific GPU/connector combo.
Changes in v2:
- Make CONFIG_DRM_PRIVACY_SCREEN a bool which controls if the drm_privacy
code gets built as part of the main drm module rather then making it
a tristate which builds its own module.
- Add a #if IS_ENABLED(CONFIG_DRM_PRIVACY_SCREEN) check to
drm_privacy_screen_consumer.h and define stubs when the check fails.
Together these 2 changes fix several dependency issues.
- Remove module related code now that this is part of the main drm.ko
- Use drm_class as class for the privacy-screen devices instead of
adding a separate class for this
Signed-off-by: Hans de Goede
---
Documentation/gpu/drm-kms-helpers.rst | 15 +
MAINTAINERS | 8 +
drivers/gpu/drm/Kconfig | 4 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/drm_drv.c | 4 +
drivers/gpu/drm/drm_privacy_screen.c | 401 ++
include/drm/drm_privacy_screen_consumer.h | 48 +++
include/drm/drm_privacy_screen_driver.h | 80 +
include/drm/drm_privacy_screen_machine.h | 41 +++
9 files changed, 602 insertions(+)
create mode 100644 drivers/gpu/drm/drm_privacy_screen.c
create mode 100644 include/drm/drm_privacy_screen_consumer.h
create mode 100644 include/drm/drm_privacy_screen_driver.h
create mode 100644 include/drm/drm_privacy_screen_machine.h
diff --git a/Documentation/gpu/drm-kms-helpers.rst
b/Documentation/gpu/drm-kms-helpers.rst
index 389892f36185..5d8715d2f998 100644
--- a/Documentation/gpu/drm-kms-helpers.rst
+++ b/Documentation/gpu/drm-kms-helpers.rst
@@ -423,3 +423,18 @@ Legacy CRTC/Modeset Helper Functions Reference
.. kernel-doc:: drivers/gpu/drm/drm_crtc_helper.c
:export:
+
+Privacy-screen class
+
+
+.. kernel-doc:: drivers/gpu/drm/drm_privacy_screen.c
+ :doc: overview
+
+.. kernel-doc:: include/drm/drm_privacy_screen_driver.h
+ :internal:
+
+.. kernel-doc:: include/drm/drm_privacy_screen_machine.h
+ :internal:
+
+.. kernel-doc:: drivers/gpu/drm/drm_privacy_screen.c
+ :export:
diff --git a/MAINTAINERS b/MAINTAINERS
index 0c91cd07db3a..5d3e7729e57c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6131,6 +6131,14 @@ F: drivers/gpu/drm/drm_panel.c
F: drivers/gpu/drm/panel/
F: include/drm/drm_panel.h
+DRM PRIVACY-SCREEN CLASS
+M: Hans de Goede
+L: dri-de...@lists.freedesktop.org
+S: Maintained
+T: git git://anongit.freedesktop.org/drm/drm-misc
+F: drivers/gpu/drm/drm_privacy_screen*
+F: include/drm/drm_privacy_screen*
+
DRM TTM SUBSYSTEM
M: Christian Koenig
M: Huang Rui
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 3c16bd1afd87..698ea8a32b2a 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -474,3 +474,7 @@ config DRM_PANEL_ORIENTATION_QUIRKS
config DRM_LIB_RANDOM
bool
default n
+
+config DRM_PRIVACY_SCREEN
+ bool
+ default n
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 89e747fedc00..578853d18a3d 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -32,6 +32,7 @@ drm-$(CONFIG_AGP) += drm_agpsupport.o
drm-$(CONFIG_PCI) += drm_pci.o
drm-$(CONFIG_DEBUG_FS) += drm_debugfs.o drm_debugfs_crc.o
drm-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) += drm_edid_load.o
+drm-$(CONFIG_DRM_PRIVACY_SCREEN) += drm_privacy_screen.o
drm_vram_helper-y := drm_gem_vram_helper.o
obj-$(CONFIG_DRM_VRAM_HELPER) += drm_vram_helper.o
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index c2f78dee9f2d..b33baa888be4 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -42,6 +42,7 @@
#include
#include
#include
+#include
#include "drm_crtc_internal.h"
#include "drm_internal.h"
@@ -1030,6 +1031,7 @@ static const struct file_operations drm_stub_fops = {
static void drm_core_exit(void)
{
+ drm_privacy_screen_lookup_exit();
unregister_chrdev(DRM_MAJOR, "drm");
debugfs_remove(drm_debugfs_root);
drm_sysfs_destroy();
@@ -1056,6 +1058,8 @@ static int __init drm_core_init(void)
if (ret < 0)
goto error;
+ drm_privacy_screen_lookup_init();
+
drm_core_init_complete = true;
DRM_DEBUG("Initialized\n");
diff --git a/drivers/gpu/drm/drm_privacy_screen.c
b/drivers/gpu/drm/drm_privacy_screen.c
new file mode 100644
index ..294a09194bfb
--- /dev/null
+++ b/drivers/gpu/drm/drm_privacy_screen.c
@@ -0,0 +1,401 @@
+//
[Intel-gfx] [PATCH v2 1/9] drm/connector: Add support for privacy-screen properties (v4)
From: Rajat Jain
Add support for generic electronic privacy screen properties, that
can be added by systems that have an integrated EPS.
Changes in v2 (Hans de Goede)
- Create 2 properties, "privacy-screen sw-state" and
"privacy-screen hw-state", to deal with devices where the OS might be
locked out of making state changes
- Write kerneldoc explaining how the 2 properties work together, what
happens when changes to the state are made outside of the DRM code's
control, etc.
Changes in v3 (Hans de Goede)
- Some small tweaks to the kerneldoc describing the 2 properties
Changes in v4 (Hans de Goede)
- Change the "Enabled, locked" and "Disabled, locked" hw-state enum value
names to "Enabled-locked" and "Disabled-locked". The xrandr command shows
all possible enum values separated by commas in its output, so having a
comma in an enum name is not a good idea.
- Do not add a privacy_screen_hw_state member to drm_connector_state
since this property is immutable its value must be directly stored in the
obj->properties->values array
Signed-off-by: Rajat Jain
Co-authored-by: Hans de Goede
Acked-by: Pekka Paalanen
Reviewed-by: Mario Limonciello
Signed-off-by: Hans de Goede
---
Documentation/gpu/drm-kms.rst | 2 +
drivers/gpu/drm/drm_atomic_uapi.c | 4 ++
drivers/gpu/drm/drm_connector.c | 101 ++
include/drm/drm_connector.h | 44 +
4 files changed, 151 insertions(+)
diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
index 87e5023e3f55..36943f2b0c5d 100644
--- a/Documentation/gpu/drm-kms.rst
+++ b/Documentation/gpu/drm-kms.rst
@@ -475,6 +475,8 @@ Property Types and Blob Property Support
.. kernel-doc:: drivers/gpu/drm/drm_property.c
:export:
+.. _standard_connector_properties:
+
Standard Connector Properties
-
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
b/drivers/gpu/drm/drm_atomic_uapi.c
index 268bb69c2e2f..d5339b683156 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -796,6 +796,8 @@ static int drm_atomic_connector_set_property(struct
drm_connector *connector,
fence_ptr);
} else if (property == connector->max_bpc_property) {
state->max_requested_bpc = val;
+ } else if (property == connector->privacy_screen_sw_state_property) {
+ state->privacy_screen_sw_state = val;
} else if (connector->funcs->atomic_set_property) {
return connector->funcs->atomic_set_property(connector,
state, property, val);
@@ -873,6 +875,8 @@ drm_atomic_connector_get_property(struct drm_connector
*connector,
*val = 0;
} else if (property == connector->max_bpc_property) {
*val = state->max_requested_bpc;
+ } else if (property == connector->privacy_screen_sw_state_property) {
+ *val = state->privacy_screen_sw_state;
} else if (connector->funcs->atomic_get_property) {
return connector->funcs->atomic_get_property(connector,
state, property, val);
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 7631f76e7f34..ca8a76decd4c 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1244,6 +1244,46 @@ static const struct drm_prop_enum_list dp_colorspaces[]
= {
* For DVI-I and TVout there is also a matching property "select
subconnector"
* allowing to switch between signal types.
* DP subconnector corresponds to a downstream port.
+ *
+ * privacy-screen sw-state, privacy-screen hw-state:
+ * These 2 optional properties can be used to query the state of the
+ * electronic privacy screen that is available on some displays; and in
+ * some cases also control the state. If a driver implements these
+ * properties then both properties must be present.
+ *
+ * "privacy-screen hw-state" is read-only and reflects the actual state
+ * of the privacy-screen, possible values: "Enabled", "Disabled,
+ * "Enabled-locked", "Disabled-locked". The locked states indicate
+ * that the state cannot be changed through the DRM API. E.g. there
+ * might be devices where the firmware-setup options, or a hardware
+ * slider-switch, offer always on / off modes.
+ *
+ * "privacy-screen sw-state" can be set to change the privacy-screen state
+ * when not locked. In this case the driver must update the hw-state
+ * property to reflect the new state on completion of the commit of the
+ * sw-state property. Setting the sw-state property when the hw-state is
+ * locked must be interpreted by the driver as a request to change the
+ * state to the set state when the hw-state becomes unlocked. E.g. if
+ * "privacy-screen hw-state" is "Enabled-locked" and the sw-state
+ * gets set
[Intel-gfx] [PATCH v2 0/9] drm: Add privacy-screen class and connector properties
Hi All, Here is v2 of my series to add a privacy-screen class and connector properties. The only significantly changed patch in this v2 is: [2/9] drm: Add privacy-screen class (v2) which was modified to fix the dependency issues which the lkp kernel test robot, see the patches changelog for details. Here is the v1 cover-letter which is still up2date: Here is the privacy-screen related code which I last posted in August of last year. To the best of my knowledge there is consensus about / everyone is in agreement with the new userspace API (2 connector properties) this patch-set add (patch 1 of the series). The blocker the last time was that there were no userspace users of the new properties and as a rule we don't add new drm userspace API without users. There now is GNOME userspace code using the new properties: https://hackmd.io/@3v1n0/rkyIy3BOw The new API works as designed for this userspace user and the branches mentioned at the above link add the following features to GNOME: 1. Showing an OSD notification when the privacy-screen is toggled on/off through hotkeys handled by the embedded-controller 2. Allowing control of the privacy-screen from the GNOME control-panel, including the on/off slider shown there updating to match the hw-setting when the setting is changed with the control-panel open. 3. Restoring the last user-setting at login This series consists of a number of different parts: 1. A new version of Rajat's privacy-screen connector properties patch, this adds new userspace API in the form of new properties 2. Since on most devices the privacy screen is actually controlled by some vendor specific ACPI/WMI interface which has a driver under drivers/platform/x86, we need some "glue" code to make this functionality available to KMS drivers. Patches 2-4 add a new privacy-screen class for this, which allows non KMS drivers (and possibly KMS drivers too) to register a privacy-screen device and also adds an interface for KMS drivers to get access to the privacy-screen associated with a specific connector. This is modelled similar to how we deal with e.g. PWMs and GPIOs in the kernel, including separate includes for consumers and providers(drivers). 3. Some drm_connector helper functions to keep the actual changes needed for this in individual KMS drivers as small as possible (patch 5). 4. Make the thinkpad_acpi code register a privacy-screen device on ThinkPads with a privacy-screen (patches 6-8) 5. Make the i915 driver export the privacy-screen functionality through the connector properties on the eDP connector. I believe that it would be best to merge the entire series, including the thinkpad_acpi changes through drm-misc in one go. As the pdx86 subsys maintainer I hereby give my ack for merging the thinkpad_acpi changes through drm-misc. There is one small caveat with this series, which it is good to be aware of. The i915 driver will now return -EPROBE_DEFER on Thinkpads with an eprivacy screen, until the thinkpad_acpi driver is loaded. This means that initrd generation tools will need to be updated to include thinkpad_acpi when the i915 driver is added to the initrd. Without this the loading of the i915 driver will be delayed to after the switch to real rootfs. Regards, Hans Hans de Goede (8): drm: Add privacy-screen class (v2) drm/privacy-screen: Add X86 specific arch init code drm/privacy-screen: Add notifier support drm/connector: Add a drm_connector privacy-screen helper functions platform/x86: thinkpad_acpi: Add hotkey_notify_extended_hotkey() helper platform/x86: thinkpad_acpi: Get privacy-screen / lcdshadow ACPI handles only once platform/x86: thinkpad_acpi: Register a privacy-screen device drm/i915: Add privacy-screen support Rajat Jain (1): drm/connector: Add support for privacy-screen properties (v4) Documentation/gpu/drm-kms-helpers.rst| 15 + Documentation/gpu/drm-kms.rst| 2 + MAINTAINERS | 8 + drivers/gpu/drm/Kconfig | 4 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_atomic_uapi.c| 4 + drivers/gpu/drm/drm_connector.c | 214 + drivers/gpu/drm/drm_drv.c| 4 + drivers/gpu/drm/drm_privacy_screen.c | 468 +++ drivers/gpu/drm/drm_privacy_screen_x86.c | 86 drivers/gpu/drm/i915/display/intel_display.c | 5 + drivers/gpu/drm/i915/display/intel_dp.c | 10 + drivers/gpu/drm/i915/i915_pci.c | 12 + drivers/platform/x86/Kconfig | 2 + drivers/platform/x86/thinkpad_acpi.c | 131 -- include/drm/drm_connector.h | 56 +++ include/drm/drm_privacy_screen_consumer.h| 63 +++ include/drm/drm_privacy_screen_driver.h | 84 include/drm/drm_privacy_screen_machine.h | 46 ++ 19 files changed, 1173 insertions(+), 42 deletions(-) create mode 100644
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Simplify CCS and UV plane alignment handling (rev2)
== Series Details ==
Series: drm/i915: Simplify CCS and UV plane alignment handling (rev2)
URL : https://patchwork.freedesktop.org/series/89299/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9994 -> Patchwork_19967
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/index.html
Known issues
Here are the changes found in Patchwork_19967 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-bdw-5557u: NOTRUN -> [SKIP][2] ([fdo#109271]) +3 similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/fi-bdw-5557u/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u: NOTRUN -> [SKIP][3] ([fdo#109271] / [fdo#111827]) +8
similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html
Possible fixes
* igt@i915_selftest@live@gt_heartbeat:
- {fi-tgl-dsi}: [DMESG-FAIL][4] ([i915#541]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/fi-tgl-dsi/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[INCOMPLETE][6] ([i915#2782]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9994/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1222]: https://gitlab.freedesktop.org/drm/intel/issues/1222
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (42 -> 38)
--
Missing(4): fi-kbl-soraka fi-bsw-cyan fi-icl-y fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9994 -> Patchwork_19967
CI-20190529: 20190529
CI_DRM_9994: 37ccc1432d3a2e6dddeaa2a68659aa790a9ad50c @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19967: 22bae28d81413572f1073d001ab27de8615ae1af @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
22bae28d8141 drm/i915: Simplify CCS and UV plane alignment handling
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19967/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory
== Series Details == Series: series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory URL : https://patchwork.freedesktop.org/series/89293/ State : success == Summary == CI Bug Log - changes from CI_DRM_9993_full -> Patchwork_19960_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19960_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@engines-queued: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-snb5/igt@gem_ctx_persiste...@engines-queued.html * igt@gem_exec_fair@basic-deadline: - shard-kbl: [PASS][2] -> [FAIL][3] ([i915#2846]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl4/igt@gem_exec_f...@basic-deadline.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-kbl6/igt@gem_exec_f...@basic-deadline.html - shard-apl: NOTRUN -> [FAIL][4] ([i915#2846]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-apl8/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-skl: NOTRUN -> [SKIP][5] ([fdo#109271]) +64 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-skl6/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-kbl: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl7/igt@gem_exec_fair@basic-n...@vcs1.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-kbl7/igt@gem_exec_fair@basic-n...@vcs1.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-tglb5/igt@gem_exec_fair@basic-p...@vcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-tglb8/igt@gem_exec_fair@basic-p...@vcs0.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][10] ([i915#2389]) +3 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-apl6/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_huc_copy@huc-copy: - shard-skl: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#2190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-skl8/igt@gem_huc_c...@huc-copy.html * igt@gem_mmap_gtt@big-copy: - shard-glk: [PASS][12] -> [FAIL][13] ([i915#307]) +3 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-glk5/igt@gem_mmap_...@big-copy.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-glk5/igt@gem_mmap_...@big-copy.html * igt@gem_mmap_gtt@big-copy-odd: - shard-skl: [PASS][14] -> [FAIL][15] ([i915#307]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-skl1/igt@gem_mmap_...@big-copy-odd.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-skl9/igt@gem_mmap_...@big-copy-odd.html * igt@gem_mmap_gtt@cpuset-medium-copy: - shard-iclb: [PASS][16] -> [FAIL][17] ([i915#2428]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-iclb5/igt@gem_mmap_...@cpuset-medium-copy.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-iclb8/igt@gem_mmap_...@cpuset-medium-copy.html * igt@gem_pwrite@basic-exhaustion: - shard-snb: NOTRUN -> [WARN][18] ([i915#2658]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-snb5/igt@gem_pwr...@basic-exhaustion.html * igt@gem_userptr_blits@input-checking: - shard-snb: NOTRUN -> [DMESG-WARN][19] ([i915#3002]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-snb7/igt@gem_userptr_bl...@input-checking.html * igt@gem_userptr_blits@set-cache-level: - shard-skl: NOTRUN -> [FAIL][20] ([i915#3324]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-skl8/igt@gem_userptr_bl...@set-cache-level.html * igt@gem_userptr_blits@vma-merge: - shard-snb: NOTRUN -> [FAIL][21] ([i915#2724]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-snb2/igt@gem_userptr_bl...@vma-merge.html - shard-apl: NOTRUN -> [FAIL][22] ([i915#3318]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/shard-apl3/igt@gem_userptr_bl...@vma-merge.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][23] -> [DMESG-WARN][24] ([i915#180]) +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/shard-kbl4/igt@gem_workarou...@suspend-resume-fd.html [24]:
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Simplify CCS and UV plane alignment handling (rev2)
== Series Details == Series: drm/i915: Simplify CCS and UV plane alignment handling (rev2) URL : https://patchwork.freedesktop.org/series/89299/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [Mesa-dev] [PATCH v3 4/4] drm/doc/rfc: i915 DG1 uAPI
On Wed, Apr 21, 2021 at 8:28 PM Tvrtko Ursulin wrote: > On 21/04/2021 18:17, Jason Ekstrand wrote: > > On Wed, Apr 21, 2021 at 9:25 AM Tvrtko Ursulin > > wrote: > >> On 21/04/2021 14:54, Jason Ekstrand wrote: > >>> On Wed, Apr 21, 2021 at 3:22 AM Tvrtko Ursulin > >>> wrote: > On 20/04/2021 18:00, Jason Ekstrand wrote: > I am not claiming to know memory region query will end up the same, and > I definitely agree we cannot guess the future. I am just saying rsvd > fields are inconsequential really in terms of maintenance burden and > have been proven useful in the past. So I disagree with the drive to > kick them all out. > >>> > >>> Sure, it doesn't cost anything to have extra zeros in the struct. > >>> However, if/when the API grows using rsvd fields, we end up with "if > >>> CAP_FOO is set, rsvd[5] means blah" which makes for a horribly > >>> confusing API. As a userspace person who has to remember how to use > >>> this stuff, I'd rather make another call or chain in a struct than try > >>> to remember and/or figure out what all 8 rsvd fields mean. > >> > >> Well it's not called rsvd in the uapi which is aware of the new field > >> but has a new name. > > > > Are we allowed to do that? This is a genuine question. When I've > > tried in the past (cliprects), I was told we couldn't rename it even > > though literally no one had used it in code for years. > > Well we did the union for pad_to_size so I thought we are allowed that > trick at least. From my experience backward source level compatibility > is not always there even with things like glibc. Despite that, are we > generally required to stay backward source compatible I will not claim > either way. I think the anonymous union with exactly same sized field is ok. We also try hard to be source compatible, but we have screwed up in the past and shrugged it off. The one example that comes to mind is extended structures at the bottom with new field, which the kernel automatically zero-extends for old userspace. But when you recompile, your new-old userspace might no longer clear the new fields because the ioctl code didn't start out by memset()ing the entire struct. But by we managed to not botch things up on source compat, but it's definitely a lot tricker than ABI compat. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 00/11] drm/i915/adl_p: Add support for Display Page Tables
On Wed, Apr 21, 2021 at 03:12:48PM +0300, Jani Nikula wrote: > On Wed, 21 Apr 2021, Imre Deak wrote: > > On Wed, Apr 21, 2021 at 02:03:45PM +0300, Jani Nikula wrote: > >> On Thu, 15 Apr 2021, Jani Nikula wrote: > >> > On Wed, 14 Apr 2021, Imre Deak wrote: > >> >> Alder Lake-P adds a new Display Page Table hardware structure, mapping > >> >> tiled framebuffer pages to the display engine, reducing the address > >> >> space required in GGTT for these framebuffers. > >> >> > >> >> This patchset adds support for this taking a minimum set of dependency > >> >> patches from the ADL_P enabling patchset at > >> >> https://patchwork.freedesktop.org/series/87897/ > >> > > >> > Cc: Daniel > >> > > >> > I guess we'll need a topic branch for the base enabling to merge to both > >> > din and dign? I guess it'll need to include the stuff in > >> > topic/intel-gen-to-ver too. > >> > > >> > Shared stuff like this keeps being a problem with the separate dign > >> > branch, especially when the only way to sync is to merge both din and > >> > dign to drm-next and then backmerge to both. > >> > >> I've created the topic branch. > >> > >> When this series starts getting ready to merge, please use the > >> topic/adl-p-enabling branch, so we can merge it to both drm-intel-next > >> and drm-intel-gt-next. > > > > Ok, thanks, I would need a review for 4 (trivial) patches in the > > patchset. Could you explain the reason for a separate branch? > > drm-intel-next and drm-intel-gt-next only get synced via merges to > drm-next, and backmerges back to each branch. If adl-p basic enabling > patches (PCI IDs, device info, etc.) only get merged to drm-intel-next, > any gt enabling in drm-intel-gt-next will be pending on the merge + > backmerge, which will be some time after the next merge window. At least > three weeks away. Additionally accumulating merge conflicts. > > With the topic branch, we can merge the basics to both right away, and > continue with details in each branch separately. Makes sense, thanks for explaining. > > BR, > Jani. > > > -- > Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 11/19] drm/i915: Update the helper to set correct mapping
On Wed, 21 Apr 2021 at 16:41, Tvrtko Ursulin
wrote:
>
>
> On 21/04/2021 12:42, Matthew Auld wrote:
> > On 19/04/2021 16:01, Tvrtko Ursulin wrote:
> >>
> >> On 19/04/2021 15:37, Matthew Auld wrote:
> >>> On 19/04/2021 15:07, Tvrtko Ursulin wrote:
>
> On 19/04/2021 12:30, Matthew Auld wrote:
> > On 15/04/2021 12:05, Tvrtko Ursulin wrote:
> >>
> >> On 15/04/2021 10:23, Matthew Auld wrote:
> >>> On Thu, 15 Apr 2021 at 09:21, Tvrtko Ursulin
> >>> wrote:
>
>
> On 14/04/2021 17:20, Matthew Auld wrote:
> > On Wed, 14 Apr 2021 at 16:22, Tvrtko Ursulin
> > wrote:
> >>
> >>
> >> On 12/04/2021 10:05, Matthew Auld wrote:
> >>> From: Venkata Sandeep Dhanalakota
> >>>
> >>>
> >>> Determine the possible coherent map type based on object
> >>> location,
> >>> and if target has llc or if user requires an always coherent
> >>> mapping.
> >>>
> >>> Cc: Matthew Auld
> >>> Cc: CQ Tang
> >>> Suggested-by: Michal Wajdeczko
> >>> Signed-off-by: Venkata Sandeep Dhanalakota
> >>>
> >>> ---
> >>> drivers/gpu/drm/i915/gt/intel_engine_cs.c| 3 ++-
> >>> drivers/gpu/drm/i915/gt/intel_engine_pm.c| 2 +-
> >>> drivers/gpu/drm/i915/gt/intel_lrc.c | 4 +++-
> >>> drivers/gpu/drm/i915/gt/intel_ring.c | 9 ++---
> >>> drivers/gpu/drm/i915/gt/selftest_context.c | 3 ++-
> >>> drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
> >>> drivers/gpu/drm/i915/gt/selftest_lrc.c | 4 +++-
> >>> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 +++-
> >>> drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 +++-
> >>> drivers/gpu/drm/i915/i915_drv.h | 11
> >>> +--
> >>> drivers/gpu/drm/i915/selftests/igt_spinner.c | 4 ++--
> >>> 11 files changed, 36 insertions(+), 16 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> >>> b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> >>> index efe935f80c1a..b79568d370f5 100644
> >>> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> >>> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> >>> @@ -664,7 +664,8 @@ static int init_status_page(struct
> >>> intel_engine_cs *engine)
> >>> if (ret)
> >>> goto err;
> >>>
> >>> - vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
> >>> + vaddr = i915_gem_object_pin_map(obj,
> >>> + i915_coherent_map_type(engine->i915, obj, true));
> >>> if (IS_ERR(vaddr)) {
> >>> ret = PTR_ERR(vaddr);
> >>> goto err_unpin;
> >>> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> >>> b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> >>> index 7c9af86fdb1e..47f4397095e5 100644
> >>> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> >>> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> >>> @@ -23,7 +23,7 @@ static void dbg_poison_ce(struct
> >>> intel_context *ce)
> >>>
> >>> if (ce->state) {
> >>> struct drm_i915_gem_object *obj =
> >>> ce->state->obj;
> >>> - int type =
> >>> i915_coherent_map_type(ce->engine->i915);
> >>> + int type =
> >>> i915_coherent_map_type(ce->engine->i915, obj, true);
> >>> void *map;
> >>>
> >>> if (!i915_gem_object_trylock(obj))
> >>> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
> >>> b/drivers/gpu/drm/i915/gt/intel_lrc.c
> >>> index e86897cde984..aafe2a4df496 100644
> >>> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> >>> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> >>> @@ -903,7 +903,9 @@ lrc_pre_pin(struct intel_context *ce,
> >>> GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
> >>>
> >>> *vaddr = i915_gem_object_pin_map(ce->state->obj,
> >>> - i915_coherent_map_type(ce->engine->i915) |
> >>> + i915_coherent_map_type(ce->engine->i915,
> >>> + ce->state->obj,
> >>> + false) |
> >>> I915_MAP_OVERRIDE);
> >>>
> >>> return PTR_ERR_OR_ZERO(*vaddr);
> >>> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c
> >>> b/drivers/gpu/drm/i915/gt/intel_ring.c
> >>> index aee0a77c77e0..3cf6c7e68108 100644
> >>> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> >>> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> >>> @@ -53,9 +53,12 @@ int intel_ring_pin(struct intel_ring
> >>>
[Intel-gfx] ✓ Fi.CI.BAT: success for Add support for querying engine cycles
== Series Details ==
Series: Add support for querying engine cycles
URL : https://patchwork.freedesktop.org/series/89314/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9993 -> Patchwork_19966
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/index.html
Known issues
Here are the changes found in Patchwork_19966 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
Possible fixes
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][3] ([i915#1849] / [i915#3180]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
Participating hosts (42 -> 39)
--
Missing(3): fi-kbl-soraka fi-bsw-cyan fi-bdw-samus
Build changes
-
* IGT: IGT_6072 -> IGTPW_5757
* Linux: CI_DRM_9993 -> Patchwork_19966
CI-20190529: 20190529
CI_DRM_9993: 629d3809e6d926c77ba5e9c5405e64eeba564560 @
git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5757: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5757/index.html
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19966: ca44314a5a5d70c39de70db3f333a2228809e1d4 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ca44314a5a5d i915/query: Correlate engine and cpu timestamps with better
accuracy
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19966/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/dp: Use slow and wide link training for everything
On Wed, Apr 21, 2021 at 01:20:31PM +0800, Kai-Heng Feng wrote:
> Screen flickers on Innolux eDP 1.3 panel when clock rate 54 is in use.
>
> According to the panel vendor, though clock rate 54 is advertised,
> but the max clock rate it really supports is 27.
>
> Ville Syrjälä mentioned that fast and narrow also breaks some eDP 1.4
> panel, so use slow and wide training for all panels to resolve the
> issue.
>
> User also confirmed that the new strategy doesn't introduce any
> regression on XPS 9380.
>
> v2:
> - Use slow and wide for everything.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3384
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/272
> Signed-off-by: Kai-Heng Feng
Thanks. Pushed to drm-intel-next.
I did a quick scan of a few CI logs and noticed that at least cml-u2
changed behaviour:
- [CONNECTOR:95:eDP-1] Link Training passed at link rate = 432000, lane count =
1, at DPRX
+ [CONNECTOR:95:eDP-1] Link Training passed at link rate = 216000, lane count =
2, at DPRX
But it still appears to work, and 2.16Gbps is also the link rate chosen
by the BIOS, which is reassuring.
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1095,44 +1095,6 @@ intel_dp_compute_link_config_wide(struct intel_dp
> *intel_dp,
> return -EINVAL;
> }
>
> -/* Optimize link config in order: max bpp, min lanes, min clock */
> -static int
> -intel_dp_compute_link_config_fast(struct intel_dp *intel_dp,
> - struct intel_crtc_state *pipe_config,
> - const struct link_config_limits *limits)
> -{
> - const struct drm_display_mode *adjusted_mode =
> _config->hw.adjusted_mode;
> - int bpp, clock, lane_count;
> - int mode_rate, link_clock, link_avail;
> -
> - for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
> - int output_bpp =
> intel_dp_output_bpp(pipe_config->output_format, bpp);
> -
> - mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
> -output_bpp);
> -
> - for (lane_count = limits->min_lane_count;
> - lane_count <= limits->max_lane_count;
> - lane_count <<= 1) {
> - for (clock = limits->min_clock; clock <=
> limits->max_clock; clock++) {
> - link_clock = intel_dp->common_rates[clock];
> - link_avail = intel_dp_max_data_rate(link_clock,
> - lane_count);
> -
> - if (mode_rate <= link_avail) {
> - pipe_config->lane_count = lane_count;
> - pipe_config->pipe_bpp = bpp;
> - pipe_config->port_clock = link_clock;
> -
> - return 0;
> - }
> - }
> - }
> - }
> -
> - return -EINVAL;
> -}
> -
> static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8
> dsc_max_bpc)
> {
> int i, num_bpc;
> @@ -1382,22 +1344,11 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
> intel_dp_can_bigjoiner(intel_dp))
> pipe_config->bigjoiner = true;
>
> - if (intel_dp_is_edp(intel_dp))
> - /*
> - * Optimize for fast and narrow. eDP 1.3 section 3.3 and eDP 1.4
> - * section A.1: "It is recommended that the minimum number of
> - * lanes be used, using the minimum link rate allowed for that
> - * lane configuration."
> - *
> - * Note that we fall back to the max clock and lane count for
> eDP
> - * panels that fail with the fast optimal settings (see
> - * intel_dp->use_max_params), in which case the fast vs. wide
> - * choice doesn't matter.
> - */
> - ret = intel_dp_compute_link_config_fast(intel_dp, pipe_config,
> );
> - else
> - /* Optimize for slow and wide. */
> - ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config,
> );
> + /*
> + * Optimize for slow and wide for everything, because there are some
> + * eDP 1.3 and 1.4 panels don't work well with fast and narrow.
> + */
> + ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, );
>
> /* enable compression if the mode doesn't fit available BW */
> drm_dbg_kms(>drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
> --
> 2.30.2
--
Ville Syrjälä
Intel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 4/4] drm/doc/rfc: i915 DG1 uAPI
On 21/04/2021 18:17, Jason Ekstrand wrote:
On Wed, Apr 21, 2021 at 9:25 AM Tvrtko Ursulin
wrote:
On 21/04/2021 14:54, Jason Ekstrand wrote:
On Wed, Apr 21, 2021 at 3:22 AM Tvrtko Ursulin
wrote:
On 20/04/2021 18:00, Jason Ekstrand wrote:
On Tue, Apr 20, 2021 at 11:34 AM Tvrtko Ursulin
wrote:
On 19/04/2021 16:19, Jason Ekstrand wrote:
On Mon, Apr 19, 2021 at 7:02 AM Matthew Auld wrote:
On 16/04/2021 17:38, Jason Ekstrand wrote:
On Thu, Apr 15, 2021 at 11:04 AM Matthew Auld wrote:
Add an entry for the new uAPI needed for DG1.
v2(Daniel):
- include the overall upstreaming plan
- add a note for mmap, there are differences here for TTM vs i915
- bunch of other suggestions from Daniel
v3:
(Daniel)
- add a note for set/get caching stuff
- add some more docs for existing query and extensions stuff
- add an actual code example for regions query
- bunch of other stuff
(Jason)
- uAPI change(!):
- try a simpler design with the placements extension
- rather than have a generic setparam which can cover multiple
use cases, have each extension be responsible for one thing
only
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Jordan Justen
Cc: Daniel Vetter
Cc: Kenneth Graunke
Cc: Jason Ekstrand
Cc: Dave Airlie
Cc: dri-de...@lists.freedesktop.org
Cc: mesa-...@lists.freedesktop.org
---
Documentation/gpu/rfc/i915_gem_lmem.h | 255
Documentation/gpu/rfc/i915_gem_lmem.rst | 139 +
Documentation/gpu/rfc/index.rst | 4 +
3 files changed, 398 insertions(+)
create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.h
create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.rst
diff --git a/Documentation/gpu/rfc/i915_gem_lmem.h
b/Documentation/gpu/rfc/i915_gem_lmem.h
new file mode 100644
index ..2a82a452e9f2
--- /dev/null
+++ b/Documentation/gpu/rfc/i915_gem_lmem.h
@@ -0,0 +1,255 @@
+/*
+ * Note that drm_i915_query_item and drm_i915_query are existing bits of uAPI.
+ * For the regions query we are just adding a new query id, so no actual new
+ * ioctl or anything, but including it here for reference.
+ */
+struct drm_i915_query_item {
+#define DRM_I915_QUERY_MEMORY_REGIONS 0xdeadbeaf
+
+__u64 query_id;
+
+/*
+ * When set to zero by userspace, this is filled with the size of the
+ * data to be written at the data_ptr pointer. The kernel sets this
+ * value to a negative value to signal an error on a particular query
+ * item.
+ */
+__s32 length;
+
+__u32 flags;
+/*
+ * Data will be written at the location pointed by data_ptr when the
+ * value of length matches the length of the data to be written by the
+ * kernel.
+ */
+__u64 data_ptr;
+};
+
+struct drm_i915_query {
+__u32 num_items;
+/*
+ * Unused for now. Must be cleared to zero.
+ */
+__u32 flags;
+/*
+ * This points to an array of num_items drm_i915_query_item structures.
+ */
+__u64 items_ptr;
+};
+
+#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY,
struct drm_i915_query)
+
+/**
+ * enum drm_i915_gem_memory_class
+ */
+enum drm_i915_gem_memory_class {
+ /** @I915_MEMORY_CLASS_SYSTEM: system memory */
+ I915_MEMORY_CLASS_SYSTEM = 0,
+ /** @I915_MEMORY_CLASS_DEVICE: device local-memory */
+ I915_MEMORY_CLASS_DEVICE,
+};
+
+/**
+ * struct drm_i915_gem_memory_class_instance
+ */
+struct drm_i915_gem_memory_class_instance {
+ /** @memory_class: see enum drm_i915_gem_memory_class */
+ __u16 memory_class;
+
+ /** @memory_instance: which instance */
+ __u16 memory_instance;
+};
+
+/**
+ * struct drm_i915_memory_region_info
+ *
+ * Describes one region as known to the driver.
+ *
+ * Note that we reserve quite a lot of stuff here for potential future work. As
+ * an example we might want expose the capabilities(see caps) for a given
+ * region, which could include things like if the region is CPU
+ * mappable/accessible etc.
I get caps but I'm seriously at a loss as to what the rest of this
would be used for. Why are caps and flags both there and separate?
Flags are typically something you set, not query. Also, what's with
rsvd1 at the end? This smells of substantial over-building to me.
I thought to myself, "maybe I'm missing a future use-case" so I looked
at the internal tree and none of this is being used there either.
This indicates to me that either I'm missing something and there's
code somewhere I don't know about or, with three years of building on
internal branches, we still haven't proven that any of this is needed.
If it's the latter, which I strongly suspect, maybe we should drop the
unnecessary bits and only add them back in if and when we have
[Intel-gfx] ✗ Fi.CI.DOCS: warning for Add support for querying engine cycles
== Series Details == Series: Add support for querying engine cycles URL : https://patchwork.freedesktop.org/series/89314/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./include/uapi/drm/i915_drm.h:2234: warning: Incorrect use of kernel-doc format: * Query Command Streamer timestamp register. ./include/uapi/drm/i915_drm.h:2420: warning: Incorrect use of kernel-doc format: * Command streamer cycles as read from the command streamer ./include/uapi/drm/i915_drm.h:2429: warning: Incorrect use of kernel-doc format: * CPU timestamps in ns. cpu_timestamp[0] is captured before reading the ./include/uapi/drm/i915_drm.h:2437: warning: Incorrect use of kernel-doc format: * Reference clock id for CPU timestamp. For definition, see ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'engine' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'flags' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cs_cycles' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cs_frequency' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cpu_timestamp' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'clockid' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'rsvd' not described in 'drm_i915_query_cs_cycles' ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dmc: Let's abstract the dmc path. (rev2)
== Series Details == Series: drm/i915/dmc: Let's abstract the dmc path. (rev2) URL : https://patchwork.freedesktop.org/series/89275/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9992_full -> Patchwork_19959_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_19959_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19959_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19959_full: ### IGT changes ### Possible regressions * igt@kms_cursor_crc@pipe-d-cursor-64x64-random: - shard-tglb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/shard-tglb3/igt@kms_cursor_...@pipe-d-cursor-64x64-random.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-tglb6/igt@kms_cursor_...@pipe-d-cursor-64x64-random.html Known issues Here are the changes found in Patchwork_19959_full that come from known issues: ### IGT changes ### Issues hit * igt@drm_import_export@flink: - shard-tglb: [PASS][3] -> [INCOMPLETE][4] ([i915#750]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/shard-tglb3/igt@drm_import_exp...@flink.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-tglb5/igt@drm_import_exp...@flink.html * igt@gem_ctx_persistence@smoketest: - shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +6 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-snb7/igt@gem_ctx_persiste...@smoketest.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][6] -> [TIMEOUT][7] ([i915#2369] / [i915#2481] / [i915#3070]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/shard-iclb5/igt@gem_...@unwedge-stress.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-iclb2/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [PASS][8] -> [FAIL][9] ([i915#2842]) +1 similar issue [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/shard-iclb3/igt@gem_exec_fair@basic-none-sh...@rcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-iclb2/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none-vip@rcs0: - shard-kbl: [PASS][10] -> [FAIL][11] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/shard-kbl2/igt@gem_exec_fair@basic-none-...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-kbl4/igt@gem_exec_fair@basic-none-...@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/shard-glk8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-glk8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_mmap_gtt@big-copy: - shard-glk: [PASS][14] -> [FAIL][15] ([i915#307]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/shard-glk4/igt@gem_mmap_...@big-copy.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-glk5/igt@gem_mmap_...@big-copy.html * igt@gem_pread@exhaustion: - shard-snb: NOTRUN -> [WARN][16] ([i915#2658]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-snb5/igt@gem_pr...@exhaustion.html * igt@gem_userptr_blits@input-checking: - shard-kbl: NOTRUN -> [DMESG-WARN][17] ([i915#3002]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-kbl1/igt@gem_userptr_bl...@input-checking.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [FAIL][18] ([i915#3318]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-apl2/igt@gem_userptr_bl...@vma-merge.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/shard-kbl4/igt@gem_workarou...@suspend-resume-fd.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-kbl1/igt@gem_workarou...@suspend-resume-fd.html * igt@i915_selftest@live@hangcheck: - shard-snb: NOTRUN -> [INCOMPLETE][21] ([i915#2782]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/shard-snb5/igt@i915_selftest@l...@hangcheck.html * igt@kms_chamelium@dp-mode-timings: - shard-apl: NOTRUN -> [SKIP][22]
[Intel-gfx] How to adjust gamma & brightness for individual colors using intel_gpu_write?
Dear all, I'm looking to adjust gamma & brightness for individual colors in Linux. Windows had Intel HD graphic Control Panel which allow to adjust gamma & brightness for individual colors directly using the driver. Since there is no Intel Graphic Control Panel on Linux, after some searches on the web, I found out that writing value directly to the GPU register might be the answer. But the best I can come up with is address 3C6h - 3C9h. Any help is appreciated. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: DDI buf trans cleaup and fixes
== Series Details ==
Series: drm/i915: DDI buf trans cleaup and fixes
URL : https://patchwork.freedesktop.org/series/89311/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9993 -> Patchwork_19965
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/index.html
Known issues
Here are the changes found in Patchwork_19965 that come from known issues:
### IGT changes ###
Issues hit
* igt@runner@aborted:
- fi-cfl-8700k: NOTRUN -> [FAIL][1] ([i915#2292] / [i915#2426] /
[k.org#204565])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/fi-cfl-8700k/igt@run...@aborted.html
Possible fixes
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-kbl-soraka: [FAIL][2] ([i915#2346]) -> [PASS][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][4] ([i915#1849] / [i915#3180]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2292]: https://gitlab.freedesktop.org/drm/intel/issues/2292
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[k.org#204565]: https://bugzilla.kernel.org/show_bug.cgi?id=204565
Participating hosts (42 -> 40)
--
Missing(2): fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9993 -> Patchwork_19965
CI-20190529: 20190529
CI_DRM_9993: 629d3809e6d926c77ba5e9c5405e64eeba564560 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19965: 3b7edb1bd0f7046814cef8409b635d5e0f3d2908 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
3b7edb1bd0f7 drm/i915: Add the missing adls vswing tables
7b6d286d856b drm/i915: Nuke buf_trans hdmi functions
578e59ec142f drm/i915: Clean up jsl/ehl buf trans functions
87baaa79a82e drm/i915: Fix ehl edp hbr2 vswing table
c02fe1383c62 drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table
6a8d3e2986f0 drm/i915: Fix dg1 buf trans tables
a8fc2844edc9 drm/i915: Introduce rkl_get_combo_buf_trans()
ec6e9e43811f drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs
2fd199ee08cc drm/i915: Introduce encoder->get_buf_trans()
a4ad121c30b4 drm/i915: Store the HDMI default entry in the bug trans struct
3684eb6e7604 drm/i915; Return the whole buf_trans struct from get_buf_trans()
e90b18869846 drm/i915: Introduce intel_get_buf_trans()
23cb70d43cd2 drm/i915: Wrap the buf trans tables into a struct
cb81a56fecaa drm/i915: Rename dkl phy buf trans tables
16aeb28e7179 drm/i915: Wrap the platform specific buf trans structs into a union
23e893369885 drm/i915: Introduce hsw_get_buf_trans()
1a9fc1bd6978 drm/i915: s/intel/hsw/ for hsw/bde/skl buf trans
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19965/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 000/190] Revertion of all of the umn.edu commits
On Wed, Apr 21, 2021 at 3:01 PM Greg Kroah-Hartman wrote: > > I have been meaning to do this for a while, but recent events have > finally forced me to do so. > > Commits from @umn.edu addresses have been found to be submitted in "bad > faith" to try to test the kernel community's ability to review "known > malicious" changes. The result of these submissions can be found in a > paper published at the 42nd IEEE Symposium on Security and Privacy > entitled, "Open Source Insecurity: Stealthily Introducing > Vulnerabilities via Hypocrite Commits" written by Qiushi Wu (University > of Minnesota) and Kangjie Lu (University of Minnesota). > > Because of this, all submissions from this group must be reverted from > the kernel tree and will need to be re-reviewed again to determine if > they actually are a valid fix. Until that work is complete, remove this > change to ensure that no problems are being introduced into the > codebase. > > This patchset has the "easy" reverts, there are 68 remaining ones that > need to be manually reviewed. Some of them are not able to be reverted > as they already have been reverted, or fixed up with follow-on patches > as they were determined to be invalid. Proof that these submissions > were almost universally wrong. Will you take care of these remaining ones in subsequent patches too? > I will be working with some other kernel developers to determine if any > of these reverts were actually valid changes, were actually valid, and > if so, will resubmit them properly later. For now, it's better to be > safe. > > I'll take this through my tree, so no need for any maintainer to worry > about this, but they should be aware that future submissions from anyone > with a umn.edu address should be by default-rejected unless otherwise > determined to actually be a valid fix (i.e. they provide proof and you > can verify it, but really, why waste your time doing that extra work?) > > thanks, > > greg k-h > > Greg Kroah-Hartman (190): > Revert "net/rds: Avoid potential use after free in > rds_send_remove_from_sock" > Revert "media: st-delta: Fix reference count leak in delta_run_work" > Revert "media: sti: Fix reference count leaks" > Revert "media: exynos4-is: Fix several reference count leaks due to > pm_runtime_get_sync" > Revert "media: exynos4-is: Fix a reference count leak due to > pm_runtime_get_sync" > Revert "media: exynos4-is: Fix a reference count leak" > Revert "media: ti-vpe: Fix a missing check and reference count leak" > Revert "media: stm32-dcmi: Fix a reference count leak" > Revert "media: s5p-mfc: Fix a reference count leak" > Revert "media: camss: Fix a reference count leak." > Revert "media: platform: fcp: Fix a reference count leak." > Revert "media: rockchip/rga: Fix a reference count leak." > Revert "media: rcar-vin: Fix a reference count leak." > Revert "media: rcar-vin: Fix a reference count leak." > Revert "firmware: Fix a reference count leak." > Revert "drm/nouveau: fix reference count leak in > nouveau_debugfs_strap_peek" > Revert "drm/nouveau: fix reference count leak in > nv50_disp_atomic_commit" > Revert "drm/nouveau: fix multiple instances of reference count leaks" > Revert "drm/nouveau/drm/noveau: fix reference count leak in > nouveau_fbcon_open" > Revert "PCI: Fix pci_create_slot() reference count leak" > Revert "omapfb: fix multiple reference count leaks due to > pm_runtime_get_sync" > Revert "drm/radeon: Fix reference count leaks caused by > pm_runtime_get_sync" > Revert "drm/radeon: fix multiple reference count leak" > Revert "drm/amdkfd: Fix reference count leaks." I didn't review these carefully, but from a quick look they all seem rather inconsequental. Either error paths that are very unlikely, or drivers which are very dead (looking at the entire list, not just what you reverted here). Acked-by: Daniel Vetter Also adding drm maintainers/lists, those aren't all on your cc it seems. I will also forward this to fd.o sitewranglers as abuse of our infrastructure, it's for community collaboration, not for inflicting experiments on unconsenting subjects. I'me dropping non-drm people here so not everyone gets spammed too badly. -Daniel > Revert "platform/chrome: cros_ec_ishtp: Fix a double-unlock issue" > Revert "usb: dwc3: pci: Fix reference count leak in > dwc3_pci_resume_work" > Revert "ASoC: rockchip: Fix a reference count leak." > Revert "RDMA/rvt: Fix potential memory leak caused by rvt_alloc_rq" > Revert "EDAC: Fix reference count leaks" > Revert "ASoC: tegra: Fix reference count leaks." > Revert "test_objagg: Fix potential memory leak in error handling" > Revert "ASoC: img-parallel-out: Fix a reference count leak" > Revert "ASoC: img: Fix a reference count leak in img_i2s_in_set_fmt" > Revert "efi/esrt: Fix reference count leak in > esre_create_sysfs_entry." > Revert "scsi: iscsi: Fix reference count leak in >
[Intel-gfx] [PATCH v2] drm/i915: Simplify CCS and UV plane alignment handling
We can handle the surface alignment of CCS and UV color planes for all
modifiers at one place, so do this. An AUX color plane can be a CCS or a
UV plane, use only the more specific query functions and remove
is_aux_plane() becoming redundant.
While at it add a TODO for linear UV color plane alignments. The spec
requires this to be stride-in-bytes * 64 on all platforms, whereas the
driver uses an alignment of 4k for gen<12 and 256k for gen>=12 for
linear UV planes.
v2:
- Restore previous alignment for linear UV surfaces.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display.c | 27 +---
drivers/gpu/drm/i915/display/intel_fb.c | 8 --
drivers/gpu/drm/i915/display/intel_fb.h | 1 -
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index a10e26380ef3d..e246e5cf75866 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -973,10 +973,26 @@ unsigned int intel_surf_alignment(const struct
drm_framebuffer *fb,
struct drm_i915_private *dev_priv = to_i915(fb->dev);
/* AUX_DIST needs only 4K alignment */
- if ((DISPLAY_VER(dev_priv) < 12 && is_aux_plane(fb, color_plane)) ||
- is_ccs_plane(fb, color_plane))
+ if (is_ccs_plane(fb, color_plane))
return 4096;
+ if (is_semiplanar_uv_plane(fb, color_plane)) {
+ /*
+* TODO: cross-check wrt. the bspec stride in bytes * 64 bytes
+* alignment for linear UV planes on all platforms.
+*/
+ if (DISPLAY_VER(dev_priv) >= 12) {
+ if (fb->modifier == DRM_FORMAT_MOD_LINEAR)
+ return intel_linear_alignment(dev_priv);
+
+ return intel_tile_row_size(fb, color_plane);
+ }
+
+ return 4096;
+ }
+
+ drm_WARN_ON(_priv->drm, color_plane != 0);
+
switch (fb->modifier) {
case DRM_FORMAT_MOD_LINEAR:
return intel_linear_alignment(dev_priv);
@@ -985,19 +1001,12 @@ unsigned int intel_surf_alignment(const struct
drm_framebuffer *fb,
return 256 * 1024;
return 0;
case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
- if (is_semiplanar_uv_plane(fb, color_plane))
- return intel_tile_row_size(fb, color_plane);
- fallthrough;
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
return 16 * 1024;
case I915_FORMAT_MOD_Y_TILED_CCS:
case I915_FORMAT_MOD_Yf_TILED_CCS:
case I915_FORMAT_MOD_Y_TILED:
- if (DISPLAY_VER(dev_priv) >= 12 &&
- is_semiplanar_uv_plane(fb, color_plane))
- return intel_tile_row_size(fb, color_plane);
- fallthrough;
case I915_FORMAT_MOD_Yf_TILED:
return 1 * 1024 * 1024;
default:
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i915/display/intel_fb.c
index 0ec9ad7220a14..c8aaca3e79e97 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -30,14 +30,6 @@ bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb,
int plane)
plane == 2;
}
-bool is_aux_plane(const struct drm_framebuffer *fb, int plane)
-{
- if (is_ccs_modifier(fb->modifier))
- return is_ccs_plane(fb, plane);
-
- return plane == 1;
-}
-
bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane)
{
return intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h
b/drivers/gpu/drm/i915/display/intel_fb.h
index 6acf792a8c44a..13244ec1ad214 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -19,7 +19,6 @@ struct intel_plane_state;
bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
-bool is_aux_plane(const struct drm_framebuffer *fb, int plane);
bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane);
bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane);
--
2.27.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy
Perf measurements rely on CPU and engine timestamps to correlate
events of interest across these time domains. Current mechanisms get
these timestamps separately and the calculated delta between these
timestamps lack enough accuracy.
To improve the accuracy of these time measurements to within a few us,
add a query that returns the engine and cpu timestamps captured as
close to each other as possible.
v2: (Tvrtko)
- document clock reference used
- return cpu timestamp always
- capture cpu time just before lower dword of cs timestamp
v3: (Chris)
- use uncore-rpm
- use __query_cs_timestamp helper
v4: (Lionel)
- Kernel perf subsytem allows users to specify the clock id to be used
in perf_event_open. This clock id is used by the perf subsystem to
return the appropriate cpu timestamp in perf events. Similarly, let
the user pass the clockid to this query so that cpu timestamp
corresponds to the clock id requested.
v5: (Tvrtko)
- Use normal ktime accessors instead of fast versions
- Add more uApi documentation
v6: (Lionel)
- Move switch out of spinlock
v7: (Chris)
- cs_timestamp is a misnomer, use cs_cycles instead
- return the cs cycle frequency as well in the query
v8:
- Add platform and engine specific checks
v9: (Lionel)
- Return 2 cpu timestamps in the query - captured before and after the
register read
v10: (Chris)
- Use local_clock() to measure time taken to read lower dword of
register and return it to user.
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_query.c | 145 ++
include/uapi/drm/i915_drm.h | 48 ++
2 files changed, 193 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_query.c
b/drivers/gpu/drm/i915/i915_query.c
index fed337ad7b68..25b96927ab92 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -6,6 +6,8 @@
#include
+#include "gt/intel_engine_pm.h"
+#include "gt/intel_engine_user.h"
#include "i915_drv.h"
#include "i915_perf.h"
#include "i915_query.h"
@@ -90,6 +92,148 @@ static int query_topology_info(struct drm_i915_private
*dev_priv,
return total_length;
}
+typedef u64 (*__ktime_func_t)(void);
+static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
+{
+ /*
+* Use logic same as the perf subsystem to allow user to select the
+* reference clock id to be used for timestamps.
+*/
+ switch (clk_id) {
+ case CLOCK_MONOTONIC:
+ return _get_ns;
+ case CLOCK_MONOTONIC_RAW:
+ return _get_raw_ns;
+ case CLOCK_REALTIME:
+ return _get_real_ns;
+ case CLOCK_BOOTTIME:
+ return _get_boottime_ns;
+ case CLOCK_TAI:
+ return _get_clocktai_ns;
+ default:
+ return NULL;
+ }
+}
+
+static inline int
+__read_timestamps(struct intel_uncore *uncore,
+ i915_reg_t lower_reg,
+ i915_reg_t upper_reg,
+ u64 *cs_ts,
+ u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+ u32 upper, lower, old_upper, loop = 0;
+
+ upper = intel_uncore_read_fw(uncore, upper_reg);
+ do {
+ cpu_ts[1] = local_clock();
+ cpu_ts[0] = cpu_clock();
+ lower = intel_uncore_read_fw(uncore, lower_reg);
+ cpu_ts[1] = local_clock() - cpu_ts[1];
+ old_upper = upper;
+ upper = intel_uncore_read_fw(uncore, upper_reg);
+ } while (upper != old_upper && loop++ < 2);
+
+ *cs_ts = (u64)upper << 32 | lower;
+
+ return 0;
+}
+
+static int
+__query_cs_cycles(struct intel_engine_cs *engine,
+ u64 *cs_ts, u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+ struct intel_uncore *uncore = engine->uncore;
+ enum forcewake_domains fw_domains;
+ u32 base = engine->mmio_base;
+ intel_wakeref_t wakeref;
+ int ret;
+
+ fw_domains = intel_uncore_forcewake_for_reg(uncore,
+ RING_TIMESTAMP(base),
+ FW_REG_READ);
+
+ with_intel_runtime_pm(uncore->rpm, wakeref) {
+ spin_lock_irq(>lock);
+ intel_uncore_forcewake_get__locked(uncore, fw_domains);
+
+ ret = __read_timestamps(uncore,
+ RING_TIMESTAMP(base),
+ RING_TIMESTAMP_UDW(base),
+ cs_ts,
+ cpu_ts,
+ cpu_clock);
+
+ intel_uncore_forcewake_put__locked(uncore, fw_domains);
+ spin_unlock_irq(>lock);
+ }
+
+ return ret;
+}
+
+static int
+query_cs_cycles(struct drm_i915_private *i915,
+ struct drm_i915_query_item *query_item)
+{
+ struct drm_i915_query_cs_cycles __user *query_ptr;
+
[Intel-gfx] [PATCH 0/1] Add support for querying engine cycles
This is just a refresh of the earlier patch along with cover letter for the IGT testing. The query provides the engine cs cycles counter. Signed-off-by: Umesh Nerlige Ramappa Test-with: 20210421172046.65062-1-umesh.nerlige.rama...@intel.com Umesh Nerlige Ramappa (1): i915/query: Correlate engine and cpu timestamps with better accuracy drivers/gpu/drm/i915/i915_query.c | 145 ++ include/uapi/drm/i915_drm.h | 48 ++ 2 files changed, 193 insertions(+) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: DDI buf trans cleaup and fixes
== Series Details == Series: drm/i915: DDI buf trans cleaup and fixes URL : https://patchwork.freedesktop.org/series/89311/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: DDI buf trans cleaup and fixes
== Series Details == Series: drm/i915: DDI buf trans cleaup and fixes URL : https://patchwork.freedesktop.org/series/89311/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_reset.c:1329:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning:
Re: [Intel-gfx] [PATCH v3 4/4] drm/doc/rfc: i915 DG1 uAPI
On Wed, Apr 21, 2021 at 9:25 AM Tvrtko Ursulin
wrote:
>
>
> On 21/04/2021 14:54, Jason Ekstrand wrote:
> > On Wed, Apr 21, 2021 at 3:22 AM Tvrtko Ursulin
> > wrote:
> >>
> >> On 20/04/2021 18:00, Jason Ekstrand wrote:
> >>> On Tue, Apr 20, 2021 at 11:34 AM Tvrtko Ursulin
> >>> wrote:
>
>
> On 19/04/2021 16:19, Jason Ekstrand wrote:
> > On Mon, Apr 19, 2021 at 7:02 AM Matthew Auld
> > wrote:
> >>
> >> On 16/04/2021 17:38, Jason Ekstrand wrote:
> >>> On Thu, Apr 15, 2021 at 11:04 AM Matthew Auld
> >>> wrote:
>
> Add an entry for the new uAPI needed for DG1.
>
> v2(Daniel):
> - include the overall upstreaming plan
> - add a note for mmap, there are differences here for TTM vs
> i915
> - bunch of other suggestions from Daniel
> v3:
> (Daniel)
> - add a note for set/get caching stuff
> - add some more docs for existing query and extensions stuff
> - add an actual code example for regions query
> - bunch of other stuff
> (Jason)
> - uAPI change(!):
> - try a simpler design with the placements extension
> - rather than have a generic setparam which can cover
> multiple
> use cases, have each extension be responsible for one
> thing
> only
>
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> Cc: Jordan Justen
> Cc: Daniel Vetter
> Cc: Kenneth Graunke
> Cc: Jason Ekstrand
> Cc: Dave Airlie
> Cc: dri-de...@lists.freedesktop.org
> Cc: mesa-...@lists.freedesktop.org
> ---
> Documentation/gpu/rfc/i915_gem_lmem.h | 255
>
> Documentation/gpu/rfc/i915_gem_lmem.rst | 139 +
> Documentation/gpu/rfc/index.rst | 4 +
> 3 files changed, 398 insertions(+)
> create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.h
> create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.rst
>
> diff --git a/Documentation/gpu/rfc/i915_gem_lmem.h
> b/Documentation/gpu/rfc/i915_gem_lmem.h
> new file mode 100644
> index ..2a82a452e9f2
> --- /dev/null
> +++ b/Documentation/gpu/rfc/i915_gem_lmem.h
> @@ -0,0 +1,255 @@
> +/*
> + * Note that drm_i915_query_item and drm_i915_query are existing
> bits of uAPI.
> + * For the regions query we are just adding a new query id, so no
> actual new
> + * ioctl or anything, but including it here for reference.
> + */
> +struct drm_i915_query_item {
> +#define DRM_I915_QUERY_MEMORY_REGIONS 0xdeadbeaf
> +
> +__u64 query_id;
> +
> +/*
> + * When set to zero by userspace, this is filled with the
> size of the
> + * data to be written at the data_ptr pointer. The kernel
> sets this
> + * value to a negative value to signal an error on a
> particular query
> + * item.
> + */
> +__s32 length;
> +
> +__u32 flags;
> +/*
> + * Data will be written at the location pointed by data_ptr
> when the
> + * value of length matches the length of the data to be
> written by the
> + * kernel.
> + */
> +__u64 data_ptr;
> +};
> +
> +struct drm_i915_query {
> +__u32 num_items;
> +/*
> + * Unused for now. Must be cleared to zero.
> + */
> +__u32 flags;
> +/*
> + * This points to an array of num_items drm_i915_query_item
> structures.
> + */
> +__u64 items_ptr;
> +};
> +
> +#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE +
> DRM_I915_QUERY, struct drm_i915_query)
> +
> +/**
> + * enum drm_i915_gem_memory_class
> + */
> +enum drm_i915_gem_memory_class {
> + /** @I915_MEMORY_CLASS_SYSTEM: system memory */
> + I915_MEMORY_CLASS_SYSTEM = 0,
> + /** @I915_MEMORY_CLASS_DEVICE: device local-memory */
> + I915_MEMORY_CLASS_DEVICE,
> +};
> +
> +/**
> + * struct drm_i915_gem_memory_class_instance
> + */
> +struct drm_i915_gem_memory_class_instance {
> +
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DDI buf trans cleaup and fixes
== Series Details == Series: drm/i915: DDI buf trans cleaup and fixes URL : https://patchwork.freedesktop.org/series/89311/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1a9fc1bd6978 drm/i915: s/intel/hsw/ for hsw/bde/skl buf trans 23e893369885 drm/i915: Introduce hsw_get_buf_trans() 16aeb28e7179 drm/i915: Wrap the platform specific buf trans structs into a union cb81a56fecaa drm/i915: Rename dkl phy buf trans tables 23cb70d43cd2 drm/i915: Wrap the buf trans tables into a struct e90b18869846 drm/i915: Introduce intel_get_buf_trans() -:25: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #25: + intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int *num_entries) total: 0 errors, 1 warnings, 0 checks, 473 lines checked 3684eb6e7604 drm/i915; Return the whole buf_trans struct from get_buf_trans() -:253: WARNING:LONG_LINE: line length of 108 exceeds 100 columns #253: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:1424: + dpcnt_val |= DKL_TX_DE_EMPHASIS_COEFF(ddi_translations->entries[level].dkl.dkl_de_emphasis_control); -:254: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #254: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:1425: + dpcnt_val |= DKL_TX_PRESHOOT_COEFF(ddi_translations->entries[level].dkl.dkl_preshoot_control); total: 0 errors, 2 warnings, 0 checks, 630 lines checked a4ad121c30b4 drm/i915: Store the HDMI default entry in the bug trans struct -:118: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #118: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1648: + ddi_translations = tgl_get_combo_buf_trans_hdmi(encoder, crtc_state, _entries); -:122: WARNING:LONG_LINE: line length of 103 exceeds 100 columns #122: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1650: + ddi_translations = tgl_get_dkl_buf_trans_hdmi(encoder, crtc_state, _entries); -:126: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #126: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1653: + ddi_translations = icl_get_combo_buf_trans_hdmi(encoder, crtc_state, _entries); -:130: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #130: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1655: + ddi_translations = icl_get_mg_buf_trans_hdmi(encoder, crtc_state, _entries); total: 0 errors, 4 warnings, 0 checks, 141 lines checked 2fd199ee08cc drm/i915: Introduce encoder->get_buf_trans() -:382: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #382: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:265: + const struct intel_crtc_state *crtc_state, total: 0 errors, 1 warnings, 0 checks, 342 lines checked ec6e9e43811f drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs a8fc2844edc9 drm/i915: Introduce rkl_get_combo_buf_trans() 6a8d3e2986f0 drm/i915: Fix dg1 buf trans tables c02fe1383c62 drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table 87baaa79a82e drm/i915: Fix ehl edp hbr2 vswing table 578e59ec142f drm/i915: Clean up jsl/ehl buf trans functions -:141: WARNING:LONG_LINE: line length of 104 exceeds 100 columns #141: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1393: + return intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, n_entries); total: 0 errors, 1 warnings, 0 checks, 123 lines checked 7b6d286d856b drm/i915: Nuke buf_trans hdmi functions 3b7edb1bd0f7 drm/i915: Add the missing adls vswing tables -:111: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #111: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1605: + return intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_hbr3, n_entries); -:127: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #127: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1621: + return intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2_hobl, n_entries); total: 0 errors, 2 warnings, 0 checks, 140 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix older platforms
== Series Details ==
Series: drm/i915: Fix older platforms
URL : https://patchwork.freedesktop.org/series/89306/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9993 -> Patchwork_19964
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/index.html
Known issues
Here are the changes found in Patchwork_19964 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@late_gt_pm:
- fi-bsw-nick:[PASS][1] -> [DMESG-FAIL][2] ([i915#2927])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html
* igt@runner@aborted:
- fi-bsw-nick:NOTRUN -> [FAIL][3] ([i915#1436])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/fi-bsw-nick/igt@run...@aborted.html
- fi-bdw-5557u: NOTRUN -> [FAIL][4] ([i915#1602] / [i915#2029])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/fi-bdw-5557u/igt@run...@aborted.html
Possible fixes
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-kbl-soraka: [FAIL][5] ([i915#2346]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][7] ([i915#1849] / [i915#3180]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2927]: https://gitlab.freedesktop.org/drm/intel/issues/2927
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
Participating hosts (42 -> 40)
--
Missing(2): fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9993 -> Patchwork_19964
CI-20190529: 20190529
CI_DRM_9993: 629d3809e6d926c77ba5e9c5405e64eeba564560 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19964: 6766ff3915c2cde9f06f0804dbeed9afdcd4b7e6 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6766ff3915c2 drm/i915: Rewrite CL/CTG L-shaped memory detection
f45d17839535 drm/i915: Give C0DRB3/C1DRB3 a _BW suffix
f2d7009113f9 drm/i915: Read C0DRB3/C1DRB3 as 16 bits again
7faa6f9fd08d drm/i915: Avoid div-by-zero on gen2
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19964/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 17/17] drm/i915: Add the missing adls vswing tables
From: Ville Syrjälä
adls is supposed to use special buf trans tables. Add what's
missing.
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 122 +-
1 file changed, 121 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index c5b7ce7464bc..7acb24a55738 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -999,6 +999,82 @@ static const struct intel_ddi_buf_trans
rkl_combo_phy_ddi_translations_dp_hbr2_h
.num_entries = ARRAY_SIZE(_rkl_combo_phy_ddi_translations_dp_hbr2_hbr3),
};
+static const union intel_ddi_buf_trans_entry
_adls_combo_phy_ddi_translations_dp_rbr_hbr[] = {
+ /* NT mV Trans mV db
*/
+ { .cnl = { 0xA, 0x32, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0
*/
+ { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1
*/
+ { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0
*/
+ { .cnl = { 0x6, 0x7D, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2
*/
+ { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0
*/
+ { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9
*/
+ { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1
*/
+ { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6
*/
+ { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5
*/
+ { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0
*/
+};
+
+static const struct intel_ddi_buf_trans
adls_combo_phy_ddi_translations_dp_rbr_hbr = {
+ .entries = _adls_combo_phy_ddi_translations_dp_rbr_hbr,
+ .num_entries = ARRAY_SIZE(_adls_combo_phy_ddi_translations_dp_rbr_hbr),
+};
+
+static const union intel_ddi_buf_trans_entry
_adls_combo_phy_ddi_translations_dp_hbr2_hbr3[] = {
+ /* NT mV Trans mV db
*/
+ { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0
*/
+ { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1
*/
+ { .cnl = { 0xC, 0x63, 0x30, 0x00, 0x0F } }, /* 350 700 6.0
*/
+ { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2
*/
+ { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0
*/
+ { .cnl = { 0xC, 0x63, 0x37, 0x00, 0x08 } }, /* 500 700 2.9
*/
+ { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } }, /* 500 900 5.1
*/
+ { .cnl = { 0xC, 0x61, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6
*/
+ { .cnl = { 0x6, 0x7B, 0x35, 0x00, 0x0A } }, /* 600 900 3.5
*/
+ { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0
*/
+};
+
+static const struct intel_ddi_buf_trans
adls_combo_phy_ddi_translations_dp_hbr2_hbr3 = {
+ .entries = _adls_combo_phy_ddi_translations_dp_hbr2_hbr3,
+ .num_entries =
ARRAY_SIZE(_adls_combo_phy_ddi_translations_dp_hbr2_hbr3),
+};
+
+static const union intel_ddi_buf_trans_entry
_adls_combo_phy_ddi_translations_edp_hbr2[] = {
+ /* NT mV Trans mV db
*/
+ { .cnl = { 0x9, 0x70, 0x3C, 0x00, 0x03 } }, /* 200 200 0.0
*/
+ { .cnl = { 0x9, 0x6D, 0x3A, 0x00, 0x05 } }, /* 200 250 1.9
*/
+ { .cnl = { 0x9, 0x7F, 0x36, 0x00, 0x09 } }, /* 200 300 3.5
*/
+ { .cnl = { 0x4, 0x59, 0x32, 0x00, 0x0D } }, /* 200 350 4.9
*/
+ { .cnl = { 0x2, 0x77, 0x3A, 0x00, 0x05 } }, /* 250 250 0.0
*/
+ { .cnl = { 0x2, 0x7F, 0x38, 0x00, 0x07 } }, /* 250 300 1.6
*/
+ { .cnl = { 0x4, 0x5A, 0x36, 0x00, 0x09 } }, /* 250 350 2.9
*/
+ { .cnl = { 0x4, 0x5E, 0x3D, 0x00, 0x04 } }, /* 300 300 0.0
*/
+ { .cnl = { 0x4, 0x65, 0x38, 0x00, 0x07 } }, /* 300 350 1.3
*/
+ { .cnl = { 0x4, 0x6F, 0x3A, 0x00, 0x05 } }, /* 350 350 0.0
*/
+};
+
+static const struct intel_ddi_buf_trans
adls_combo_phy_ddi_translations_edp_hbr2 = {
+ .entries = _adls_combo_phy_ddi_translations_edp_hbr2,
+ .num_entries = ARRAY_SIZE(_adls_combo_phy_ddi_translations_edp_hbr2),
+};
+
+static const union intel_ddi_buf_trans_entry
_adls_combo_phy_ddi_translations_edp_hbr3[] = {
+ /* NT mV Trans mV db
*/
+ { .cnl = { 0xA, 0x5E, 0x34, 0x00, 0x0B } }, /* 350 350 0.0
*/
+ { .cnl = { 0xA, 0x69, 0x32, 0x00, 0x0D } }, /* 350 500 3.1
*/
+ { .cnl = { 0xC, 0x74, 0x31, 0x00, 0x0E } }, /* 350 700 6.0
*/
+ { .cnl = { 0x6, 0x7F, 0x2E, 0x00, 0x11 } },
[Intel-gfx] [PATCH 16/17] drm/i915: Nuke buf_trans hdmi functions
From: Ville Syrjälä
All the foo_get_buf_trans_hdmi() functions just reuturn a single table.
Remove the pointless wrappers.
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 49 +++
1 file changed, 6 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 80d659b229b7..c5b7ce7464bc 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1255,15 +1255,6 @@ cnl_get_buf_trans(struct intel_encoder *encoder,
return cnl_get_buf_trans_dp(encoder, n_entries);
}
-static const struct intel_ddi_buf_trans *
-icl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
-const struct intel_crtc_state *crtc_state,
-int *n_entries)
-{
- return intel_get_buf_trans(_combo_phy_ddi_translations_hdmi,
- n_entries);
-}
-
static const struct intel_ddi_buf_trans *
icl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -1297,22 +1288,13 @@ icl_get_combo_buf_trans(struct intel_encoder *encoder,
int *n_entries)
{
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- return icl_get_combo_buf_trans_hdmi(encoder, crtc_state,
n_entries);
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_hdmi, n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
return icl_get_combo_buf_trans_edp(encoder, crtc_state,
n_entries);
else
return icl_get_combo_buf_trans_dp(encoder, crtc_state,
n_entries);
}
-static const struct intel_ddi_buf_trans *
-icl_get_mg_buf_trans_hdmi(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- int *n_entries)
-{
- return intel_get_buf_trans(_mg_phy_ddi_translations_hdmi,
- n_entries);
-}
-
static const struct intel_ddi_buf_trans *
icl_get_mg_buf_trans_dp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -1333,12 +1315,11 @@ icl_get_mg_buf_trans(struct intel_encoder *encoder,
int *n_entries)
{
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- return icl_get_mg_buf_trans_hdmi(encoder, crtc_state,
n_entries);
+ return intel_get_buf_trans(_mg_phy_ddi_translations_hdmi,
n_entries);
else
return icl_get_mg_buf_trans_dp(encoder, crtc_state, n_entries);
}
-
static const struct intel_ddi_buf_trans *
ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -1393,15 +1374,6 @@ jsl_get_combo_buf_trans(struct intel_encoder *encoder,
return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
}
-static const struct intel_ddi_buf_trans *
-tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
-const struct intel_crtc_state *crtc_state,
-int *n_entries)
-{
- return intel_get_buf_trans(_combo_phy_ddi_translations_hdmi,
- n_entries);
-}
-
static const struct intel_ddi_buf_trans *
tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -1451,7 +1423,7 @@ tgl_get_combo_buf_trans(struct intel_encoder *encoder,
int *n_entries)
{
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- return tgl_get_combo_buf_trans_hdmi(encoder, crtc_state,
n_entries);
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_hdmi, n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
return tgl_get_combo_buf_trans_edp(encoder, crtc_state,
n_entries);
else
@@ -1494,7 +1466,7 @@ dg1_get_combo_buf_trans(struct intel_encoder *encoder,
int *n_entries)
{
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- return icl_get_combo_buf_trans_hdmi(encoder, crtc_state,
n_entries);
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_hdmi, n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
return dg1_get_combo_buf_trans_edp(encoder, crtc_state,
n_entries);
else
@@ -1541,22 +1513,13 @@ rkl_get_combo_buf_trans(struct intel_encoder *encoder,
{
/* FIXME unclear what values we should use for HDMI and eDP */
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- return tgl_get_combo_buf_trans_hdmi(encoder, crtc_state,
[Intel-gfx] [PATCH 15/17] drm/i915: Clean up jsl/ehl buf trans functions
From: Ville Syrjälä
The jsl/ehl buf trans functions are needlessly conplicated.
Simplify them.
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 87 +--
1 file changed, 20 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 85db309ec57d..80d659b229b7 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1338,42 +1338,16 @@ icl_get_mg_buf_trans(struct intel_encoder *encoder,
return icl_get_mg_buf_trans_dp(encoder, crtc_state, n_entries);
}
-static const struct intel_ddi_buf_trans *
-ehl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
-const struct intel_crtc_state *crtc_state,
-int *n_entries)
-{
- return intel_get_buf_trans(_combo_phy_ddi_translations_hdmi,
- n_entries);
-}
-
-static const struct intel_ddi_buf_trans *
-ehl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- int *n_entries)
-{
- return intel_get_buf_trans(_combo_phy_ddi_translations_dp,
- n_entries);
-}
static const struct intel_ddi_buf_trans *
ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-
- if (dev_priv->vbt.edp.low_vswing) {
- if (crtc_state->port_clock > 27) {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
- n_entries);
- } else {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
- n_entries);
- }
- }
-
- return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
+ if (crtc_state->port_clock > 27)
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2, n_entries);
+ else
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2, n_entries);
}
static const struct intel_ddi_buf_trans *
@@ -1381,30 +1355,15 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- return ehl_get_combo_buf_trans_hdmi(encoder, crtc_state,
n_entries);
- else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_hdmi, n_entries);
+ else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
+dev_priv->vbt.edp.low_vswing)
return ehl_get_combo_buf_trans_edp(encoder, crtc_state,
n_entries);
else
- return ehl_get_combo_buf_trans_dp(encoder, crtc_state,
n_entries);
-}
-
-static const struct intel_ddi_buf_trans *
-jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder,
-const struct intel_crtc_state *crtc_state,
-int *n_entries)
-{
- return intel_get_buf_trans(_combo_phy_ddi_translations_hdmi,
- n_entries);
-}
-
-static const struct intel_ddi_buf_trans *
-jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- int *n_entries)
-{
- return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
- n_entries);
+ return intel_get_buf_trans(_combo_phy_ddi_translations_dp,
n_entries);
}
static const struct intel_ddi_buf_trans *
@@ -1412,19 +1371,10 @@ jsl_get_combo_buf_trans_edp(struct intel_encoder
*encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-
- if (dev_priv->vbt.edp.low_vswing) {
- if (crtc_state->port_clock > 27) {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
- n_entries);
- } else {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr,
- n_entries);
- }
- }
-
- return jsl_get_combo_buf_trans_dp(encoder, crtc_state,
[Intel-gfx] [PATCH 14/17] drm/i915: Fix ehl edp hbr2 vswing table
From: Ville Syrjälä
EHL is supposed to use special buf trans values for eDP HBR2+.
Add such a table.
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 28 +--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 0facbf556634..85db309ec57d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -671,6 +671,25 @@ static const struct intel_ddi_buf_trans
ehl_combo_phy_ddi_translations_dp = {
.num_entries = ARRAY_SIZE(_ehl_combo_phy_ddi_translations_dp),
};
+static const union intel_ddi_buf_trans_entry
_ehl_combo_phy_ddi_translations_edp_hbr2[] = {
+ /* NT mV Trans mV db
*/
+ { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 200 0.0
*/
+ { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 250 1.9
*/
+ { .cnl = { 0x1, 0x7F, 0x3D, 0x00, 0x02 } }, /* 200 300 3.5
*/
+ { .cnl = { 0xA, 0x35, 0x39, 0x00, 0x06 } }, /* 200 350 4.9
*/
+ { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 250 0.0
*/
+ { .cnl = { 0x1, 0x7F, 0x3C, 0x00, 0x03 } }, /* 250 300 1.6
*/
+ { .cnl = { 0xA, 0x35, 0x39, 0x00, 0x06 } }, /* 250 350 2.9
*/
+ { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 300 300 0.0
*/
+ { .cnl = { 0xA, 0x35, 0x38, 0x00, 0x07 } }, /* 300 350 1.3
*/
+ { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0
*/
+};
+
+static const struct intel_ddi_buf_trans
ehl_combo_phy_ddi_translations_edp_hbr2 = {
+ .entries = _ehl_combo_phy_ddi_translations_edp_hbr2,
+ .num_entries = ARRAY_SIZE(_ehl_combo_phy_ddi_translations_edp_hbr2),
+};
+
static const union intel_ddi_buf_trans_entry
_jsl_combo_phy_ddi_translations_edp_hbr[] = {
/* NT mV Trans mV db
*/
{ .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 200 0.0
*/
@@ -1345,8 +1364,13 @@ ehl_get_combo_buf_trans_edp(struct intel_encoder
*encoder,
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
if (dev_priv->vbt.edp.low_vswing) {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
- n_entries);
+ if (crtc_state->port_clock > 27) {
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
+ n_entries);
+ } else {
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
+ n_entries);
+ }
}
return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
--
2.26.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 13/17] drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table
From: Ville Syrjälä
The icl combo phy DP HBR2 is identical to the eDP HBR3 table.
Get rid of one redundant copy.
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 39 +--
1 file changed, 10 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 25702f40b3ce..0facbf556634 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -597,7 +597,7 @@ static const struct intel_ddi_buf_trans
cnl_ddi_translations_edp_1_05V = {
};
/* icl_combo_phy_ddi_translations */
-static const union intel_ddi_buf_trans_entry
_icl_combo_phy_ddi_translations_dp_hbr2[] = {
+static const union intel_ddi_buf_trans_entry
_icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3[] = {
/* NT mV Trans mV db
*/
{ .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0
*/
{ .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1
*/
@@ -611,9 +611,9 @@ static const union intel_ddi_buf_trans_entry
_icl_combo_phy_ddi_translations_dp_
{ .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0
*/
};
-static const struct intel_ddi_buf_trans icl_combo_phy_ddi_translations_dp_hbr2
= {
- .entries = _icl_combo_phy_ddi_translations_dp_hbr2,
- .num_entries = ARRAY_SIZE(_icl_combo_phy_ddi_translations_dp_hbr2),
+static const struct intel_ddi_buf_trans
icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3 = {
+ .entries = _icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
+ .num_entries =
ARRAY_SIZE(_icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3),
};
static const union intel_ddi_buf_trans_entry
_icl_combo_phy_ddi_translations_edp_hbr2[] = {
@@ -635,25 +635,6 @@ static const struct intel_ddi_buf_trans
icl_combo_phy_ddi_translations_edp_hbr2
.num_entries = ARRAY_SIZE(_icl_combo_phy_ddi_translations_edp_hbr2),
};
-static const union intel_ddi_buf_trans_entry
_icl_combo_phy_ddi_translations_edp_hbr3[] = {
- /* NT mV Trans mV db
*/
- { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0
*/
- { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1
*/
- { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0
*/
- { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2
*/
- { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0
*/
- { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9
*/
- { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1
*/
- { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6
*/
- { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5
*/
- { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0
*/
-};
-
-static const struct intel_ddi_buf_trans
icl_combo_phy_ddi_translations_edp_hbr3 = {
- .entries = _icl_combo_phy_ddi_translations_edp_hbr3,
- .num_entries = ARRAY_SIZE(_icl_combo_phy_ddi_translations_edp_hbr3),
-};
-
static const union intel_ddi_buf_trans_entry
_icl_combo_phy_ddi_translations_hdmi[] = {
/* NT mV Trans mV db
*/
{ .cnl = { 0xA, 0x60, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0
*/
@@ -1269,7 +1250,7 @@ icl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- return intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2,
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
}
@@ -1281,7 +1262,7 @@ icl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
if (crtc_state->port_clock > 54) {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr3,
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
} else if (dev_priv->vbt.edp.low_vswing) {
return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
@@ -1398,7 +1379,7 @@ jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- return intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2,
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
}
@@ -1474,7 +1455,7 @@
[Intel-gfx] [PATCH 12/17] drm/i915: Fix dg1 buf trans tables
From: Ville Syrjälä
For some reason the dg1 buf trans tables have been stuffed into
icl_get_combo_buf_trans_edp() which doesn't even get called
on dg1. Split them out into a proper dg1 specific function,
and also make sure we use the proper buf trans tables for
DP as well as eDP.
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 51 ---
1 file changed, 45 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index fd55c812f14a..25702f40b3ce 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1286,12 +1286,6 @@ icl_get_combo_buf_trans_edp(struct intel_encoder
*encoder,
} else if (dev_priv->vbt.edp.low_vswing) {
return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
n_entries);
- } else if (IS_DG1(dev_priv) && crtc_state->port_clock > 27) {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_hbr3,
- n_entries);
- } else if (IS_DG1(dev_priv)) {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_rbr_hbr,
- n_entries);
}
return icl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
@@ -1506,6 +1500,49 @@ tgl_get_combo_buf_trans(struct intel_encoder *encoder,
return tgl_get_combo_buf_trans_dp(encoder, crtc_state,
n_entries);
}
+static const struct intel_ddi_buf_trans *
+dg1_get_combo_buf_trans_dp(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
+{
+ if (crtc_state->port_clock > 27)
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_hbr3,
+ n_entries);
+ else
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_rbr_hbr,
+ n_entries);
+}
+
+static const struct intel_ddi_buf_trans *
+dg1_get_combo_buf_trans_edp(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+
+ if (crtc_state->port_clock > 54)
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr3,
+ n_entries);
+ else if (dev_priv->vbt.edp.low_vswing)
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
+ n_entries);
+ else
+ return dg1_get_combo_buf_trans_dp(encoder, crtc_state,
n_entries);
+}
+
+static const struct intel_ddi_buf_trans *
+dg1_get_combo_buf_trans(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
+{
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
+ return icl_get_combo_buf_trans_hdmi(encoder, crtc_state,
n_entries);
+ else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
+ return dg1_get_combo_buf_trans_edp(encoder, crtc_state,
n_entries);
+ else
+ return dg1_get_combo_buf_trans_dp(encoder, crtc_state,
n_entries);
+}
+
static const struct intel_ddi_buf_trans *
rkl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -1614,6 +1651,8 @@ void intel_ddi_buf_trans_init(struct intel_encoder
*encoder)
if (IS_ROCKETLAKE(i915)) {
encoder->get_buf_trans = rkl_get_combo_buf_trans;
+ } else if (IS_DG1(i915)) {
+ encoder->get_buf_trans = dg1_get_combo_buf_trans;
} else if (DISPLAY_VER(i915) >= 12) {
if (intel_phy_is_combo(i915, phy))
encoder->get_buf_trans = tgl_get_combo_buf_trans;
--
2.26.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 11/17] drm/i915: Introduce rkl_get_combo_buf_trans()
From: Ville Syrjälä
Give RKL its own get_buf_trans() func.
Note that the spec currently only lists values for DP.
Until we get that clarified let's just assume that for
HDMI and eDP we should do what TGL does (except we fall
back to the RKL DP values instead of TGL DP values when
not using the eDP specific values, whereas previously
we used all TGL values for eDP).
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 65 +++
1 file changed, 53 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 1d78640c439e..fd55c812f14a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1458,10 +1458,7 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
if (crtc_state->port_clock > 27) {
- if (IS_ROCKETLAKE(dev_priv)) {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_hbr3,
- n_entries);
- } else if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
+ if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
return
intel_get_buf_trans(_uy_combo_phy_ddi_translations_dp_hbr2,
n_entries);
} else {
@@ -1469,13 +1466,8 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
n_entries);
}
} else {
- if (IS_ROCKETLAKE(dev_priv)) {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr,
- n_entries);
- } else {
- return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr,
- n_entries);
- }
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr,
+ n_entries);
}
}
@@ -1514,6 +1506,53 @@ tgl_get_combo_buf_trans(struct intel_encoder *encoder,
return tgl_get_combo_buf_trans_dp(encoder, crtc_state,
n_entries);
}
+static const struct intel_ddi_buf_trans *
+rkl_get_combo_buf_trans_dp(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
+{
+ if (crtc_state->port_clock > 27)
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr2_hbr3, n_entries);
+ else
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_dp_hbr, n_entries);
+}
+
+static const struct intel_ddi_buf_trans *
+rkl_get_combo_buf_trans_edp(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+
+ if (crtc_state->port_clock > 54) {
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr3,
+ n_entries);
+ } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) {
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2_hobl,
+ n_entries);
+ } else if (dev_priv->vbt.edp.low_vswing) {
+ return
intel_get_buf_trans(_combo_phy_ddi_translations_edp_hbr2,
+ n_entries);
+ }
+
+ return rkl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries);
+}
+
+static const struct intel_ddi_buf_trans *
+rkl_get_combo_buf_trans(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
+{
+ /* FIXME unclear what values we should use for HDMI and eDP */
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
+ return tgl_get_combo_buf_trans_hdmi(encoder, crtc_state,
n_entries);
+ else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
+ return rkl_get_combo_buf_trans_edp(encoder, crtc_state,
n_entries);
+ else
+ return rkl_get_combo_buf_trans_dp(encoder, crtc_state,
n_entries);
+}
+
static const struct intel_ddi_buf_trans *
tgl_get_dkl_buf_trans_hdmi(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -1573,7 +1612,9 @@ void intel_ddi_buf_trans_init(struct intel_encoder
*encoder)
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
enum phy phy = intel_port_to_phy(i915, encoder->port);
-
[Intel-gfx] [PATCH 10/17] drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs
From: Ville Syrjälä
Split the hsw/bdw/skl/kbl get_buf_trans() functions into
clean platform specific variants.
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 308 +++---
1 file changed, 118 insertions(+), 190 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 37a9c3b2c03c..1d78640c439e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1012,102 +1012,34 @@ intel_get_buf_trans(const struct intel_ddi_buf_trans
*ddi_translations, int *num
}
static const struct intel_ddi_buf_trans *
-bdw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
+hsw_get_buf_trans(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-
- if (dev_priv->vbt.edp.low_vswing) {
- return intel_get_buf_trans(_ddi_translations_edp,
- n_entries);
- } else {
- return intel_get_buf_trans(_ddi_translations_dp,
- n_entries);
- }
-}
-
-static const struct intel_ddi_buf_trans *
-skl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-
- if (IS_SKL_ULX(dev_priv)) {
- return intel_get_buf_trans(_y_ddi_translations_dp,
- n_entries);
- } else if (IS_SKL_ULT(dev_priv)) {
- return intel_get_buf_trans(_u_ddi_translations_dp,
- n_entries);
- } else {
- return intel_get_buf_trans(_ddi_translations_dp,
- n_entries);
- }
-}
-
-static const struct intel_ddi_buf_trans *
-kbl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-
- if (IS_KBL_ULX(dev_priv) ||
- IS_CFL_ULX(dev_priv) ||
- IS_CML_ULX(dev_priv)) {
- return intel_get_buf_trans(_y_ddi_translations_dp,
- n_entries);
- } else if (IS_KBL_ULT(dev_priv) ||
- IS_CFL_ULT(dev_priv) ||
- IS_CML_ULT(dev_priv)) {
- return intel_get_buf_trans(_u_ddi_translations_dp,
- n_entries);
- } else {
- return intel_get_buf_trans(_ddi_translations_dp,
- n_entries);
- }
-}
-
-static const struct intel_ddi_buf_trans *
-skl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-
- if (dev_priv->vbt.edp.low_vswing) {
- if (IS_SKL_ULX(dev_priv) ||
- IS_KBL_ULX(dev_priv) ||
- IS_CFL_ULX(dev_priv) ||
- IS_CML_ULX(dev_priv)) {
- return intel_get_buf_trans(_y_ddi_translations_edp,
- n_entries);
- } else if (IS_SKL_ULT(dev_priv) ||
- IS_KBL_ULT(dev_priv) ||
- IS_CFL_ULT(dev_priv) ||
- IS_CML_ULT(dev_priv)) {
- return intel_get_buf_trans(_u_ddi_translations_edp,
- n_entries);
- } else {
- return intel_get_buf_trans(_ddi_translations_edp,
- n_entries);
- }
- }
-
- if (IS_KABYLAKE(dev_priv) ||
- IS_COFFEELAKE(dev_priv) ||
- IS_COMETLAKE(dev_priv))
- return kbl_get_buf_trans_dp(encoder, n_entries);
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
+ return intel_get_buf_trans(_ddi_translations_fdi,
n_entries);
+ else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
+ return intel_get_buf_trans(_ddi_translations_hdmi,
n_entries);
else
- return skl_get_buf_trans_dp(encoder, n_entries);
+ return intel_get_buf_trans(_ddi_translations_dp, n_entries);
}
static const struct intel_ddi_buf_trans *
-skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int *n_entries)
+bdw_get_buf_trans(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ int *n_entries)
{
- if (IS_SKL_ULX(dev_priv) ||
- IS_KBL_ULX(dev_priv) ||
- IS_CFL_ULX(dev_priv) ||
- IS_CML_ULX(dev_priv)) {
- return intel_get_buf_trans(_y_ddi_translations_hdmi,
-
[Intel-gfx] [PATCH 09/17] drm/i915: Introduce encoder->get_buf_trans()
From: Ville Syrjälä
Convert the get_buf_trans() functions into an encoder vfunc.
Allows us to get rid of bunch of platform if-ladders.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 3 +
drivers/gpu/drm/i915/display/intel_ddi.c | 56 +++
.../drm/i915/display/intel_ddi_buf_trans.c| 68 +++
.../drm/i915/display/intel_ddi_buf_trans.h| 39 +--
.../drm/i915/display/intel_display_types.h| 4 ++
drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
6 files changed, 59 insertions(+), 114 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index c85092eaa5c2..42da2e35bc7c 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -37,6 +37,7 @@
#include "intel_connector.h"
#include "intel_crt.h"
#include "intel_ddi.h"
+#include "intel_ddi_buf_trans.h"
#include "intel_display_types.h"
#include "intel_fdi.h"
#include "intel_fifo_underrun.h"
@@ -1079,6 +1080,8 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
crt->base.enable_clock = hsw_ddi_enable_clock;
crt->base.disable_clock = hsw_ddi_disable_clock;
crt->base.is_clock_enabled = hsw_ddi_is_clock_enabled;
+
+ intel_ddi_buf_trans_init(>base);
} else {
if (HAS_PCH_SPLIT(dev_priv)) {
crt->base.compute_config = pch_crt_compute_config;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5ac31bd13b3e..906fea249eaf 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -102,8 +102,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
enum port port = encoder->port;
const struct intel_ddi_buf_trans *ddi_translations;
- ddi_translations = hsw_get_buf_trans(encoder, crtc_state, _entries);
-
+ ddi_translations = encoder->get_buf_trans(encoder, crtc_state,
_entries);
if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
return;
@@ -135,8 +134,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
enum port port = encoder->port;
const struct intel_ddi_buf_trans *ddi_translations;
- ddi_translations = hsw_get_buf_trans(encoder, crtc_state, _entries);
-
+ ddi_translations = encoder->get_buf_trans(encoder, crtc_state,
_entries);
if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
return;
if (drm_WARN_ON_ONCE(_priv->drm, level >= n_entries))
@@ -911,8 +909,7 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
const struct intel_ddi_buf_trans *ddi_translations;
int n_entries;
- ddi_translations = hsw_get_buf_trans(encoder, crtc_state,
_entries);
-
+ ddi_translations = encoder->get_buf_trans(encoder, crtc_state,
_entries);
if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
return;
if (drm_WARN_ON_ONCE(_priv->drm, level >= n_entries))
@@ -942,7 +939,7 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder
*encoder,
enum port port = encoder->port;
int n_entries;
- ddi_translations = bxt_get_buf_trans(encoder, crtc_state, _entries);
+ ddi_translations = encoder->get_buf_trans(encoder, crtc_state,
_entries);
if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
return;
if (drm_WARN_ON_ONCE(_priv->drm, level >= n_entries))
@@ -960,31 +957,9 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp
*intel_dp,
{
struct intel_encoder *encoder = _to_dig_port(intel_dp)->base;
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- enum port port = encoder->port;
- enum phy phy = intel_port_to_phy(dev_priv, port);
int n_entries;
- if (DISPLAY_VER(dev_priv) >= 12) {
- if (intel_phy_is_combo(dev_priv, phy))
- tgl_get_combo_buf_trans(encoder, crtc_state,
_entries);
- else
- tgl_get_dkl_buf_trans(encoder, crtc_state, _entries);
- } else if (DISPLAY_VER(dev_priv) == 11) {
- if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE))
- jsl_get_combo_buf_trans(encoder, crtc_state,
_entries);
- else if (IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE))
- ehl_get_combo_buf_trans(encoder, crtc_state,
_entries);
- else if (intel_phy_is_combo(dev_priv, phy))
- icl_get_combo_buf_trans(encoder, crtc_state,
_entries);
- else
- icl_get_mg_buf_trans(encoder, crtc_state, _entries);
- } else if (IS_CANNONLAKE(dev_priv)) {
- cnl_get_buf_trans(encoder, crtc_state,
[Intel-gfx] [PATCH 08/17] drm/i915: Store the HDMI default entry in the bug trans struct
From: Ville Syrjälä
Store the default HDMI buf trans entry in struct intel_ddi_buf_trans
so that it's next to the actual table. This let's us start ridding
ourselves of some platofrm specifics in intel_ddi_hdmi_num_entries().
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 49 ++-
.../drm/i915/display/intel_ddi_buf_trans.h| 1 +
2 files changed, 27 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index d91b946dfa66..7574d6390a39 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -65,6 +65,7 @@ static const union intel_ddi_buf_trans_entry
_hsw_ddi_translations_hdmi[] = {
static const struct intel_ddi_buf_trans hsw_ddi_translations_hdmi = {
.entries = _hsw_ddi_translations_hdmi,
.num_entries = ARRAY_SIZE(_hsw_ddi_translations_hdmi),
+ .hdmi_default_entry = 6,
};
static const union intel_ddi_buf_trans_entry _bdw_ddi_translations_edp[] = {
@@ -135,6 +136,7 @@ static const union intel_ddi_buf_trans_entry
_bdw_ddi_translations_hdmi[] = {
static const struct intel_ddi_buf_trans bdw_ddi_translations_hdmi = {
.entries = _bdw_ddi_translations_hdmi,
.num_entries = ARRAY_SIZE(_bdw_ddi_translations_hdmi),
+ .hdmi_default_entry = 7,
};
/* Skylake H and S */
@@ -329,6 +331,7 @@ static const union intel_ddi_buf_trans_entry
_skl_ddi_translations_hdmi[] = {
static const struct intel_ddi_buf_trans skl_ddi_translations_hdmi = {
.entries = _skl_ddi_translations_hdmi,
.num_entries = ARRAY_SIZE(_skl_ddi_translations_hdmi),
+ .hdmi_default_entry = 8,
};
/* Skylake/Kabylake Y */
@@ -349,6 +352,7 @@ static const union intel_ddi_buf_trans_entry
_skl_y_ddi_translations_hdmi[] = {
static const struct intel_ddi_buf_trans skl_y_ddi_translations_hdmi = {
.entries = _skl_y_ddi_translations_hdmi,
.num_entries = ARRAY_SIZE(_skl_y_ddi_translations_hdmi),
+ .hdmi_default_entry = 8,
};
static const union intel_ddi_buf_trans_entry _bxt_ddi_translations_dp[] = {
@@ -409,6 +413,7 @@ static const union intel_ddi_buf_trans_entry
_bxt_ddi_translations_hdmi[] = {
static const struct intel_ddi_buf_trans bxt_ddi_translations_hdmi = {
.entries = _bxt_ddi_translations_hdmi,
.num_entries = ARRAY_SIZE(_bxt_ddi_translations_hdmi),
+ .hdmi_default_entry = ARRAY_SIZE(_bxt_ddi_translations_hdmi) - 1,
};
/* Voltage Swing Programming for VccIO 0.85V for DP */
@@ -446,6 +451,7 @@ static const union intel_ddi_buf_trans_entry
_cnl_ddi_translations_hdmi_0_85V[]
static const struct intel_ddi_buf_trans cnl_ddi_translations_hdmi_0_85V = {
.entries = _cnl_ddi_translations_hdmi_0_85V,
.num_entries = ARRAY_SIZE(_cnl_ddi_translations_hdmi_0_85V),
+ .hdmi_default_entry = ARRAY_SIZE(_cnl_ddi_translations_hdmi_0_85V) - 1,
};
/* Voltage Swing Programming for VccIO 0.85V for eDP */
@@ -506,6 +512,7 @@ static const union intel_ddi_buf_trans_entry
_cnl_ddi_translations_hdmi_0_95V[]
static const struct intel_ddi_buf_trans cnl_ddi_translations_hdmi_0_95V = {
.entries = _cnl_ddi_translations_hdmi_0_95V,
.num_entries = ARRAY_SIZE(_cnl_ddi_translations_hdmi_0_95V),
+ .hdmi_default_entry = ARRAY_SIZE(_cnl_ddi_translations_hdmi_0_95V) - 1,
};
/* Voltage Swing Programming for VccIO 0.95V for eDP */
@@ -567,6 +574,7 @@ static const union intel_ddi_buf_trans_entry
_cnl_ddi_translations_hdmi_1_05V[]
static const struct intel_ddi_buf_trans cnl_ddi_translations_hdmi_1_05V = {
.entries = _cnl_ddi_translations_hdmi_1_05V,
.num_entries = ARRAY_SIZE(_cnl_ddi_translations_hdmi_1_05V),
+ .hdmi_default_entry = ARRAY_SIZE(_cnl_ddi_translations_hdmi_1_05V) - 1,
};
/* Voltage Swing Programming for VccIO 1.05V for eDP */
@@ -660,6 +668,7 @@ static const union intel_ddi_buf_trans_entry
_icl_combo_phy_ddi_translations_hdm
static const struct intel_ddi_buf_trans icl_combo_phy_ddi_translations_hdmi = {
.entries = _icl_combo_phy_ddi_translations_hdmi,
.num_entries = ARRAY_SIZE(_icl_combo_phy_ddi_translations_hdmi),
+ .hdmi_default_entry = ARRAY_SIZE(_icl_combo_phy_ddi_translations_hdmi)
- 1,
};
static const union intel_ddi_buf_trans_entry
_ehl_combo_phy_ddi_translations_dp[] = {
@@ -812,6 +821,7 @@ static const union intel_ddi_buf_trans_entry
_icl_mg_phy_ddi_translations_hdmi[]
static const struct intel_ddi_buf_trans icl_mg_phy_ddi_translations_hdmi = {
.entries = _icl_mg_phy_ddi_translations_hdmi,
.num_entries = ARRAY_SIZE(_icl_mg_phy_ddi_translations_hdmi),
+ .hdmi_default_entry = ARRAY_SIZE(_icl_mg_phy_ddi_translations_hdmi) - 1,
};
static const union intel_ddi_buf_trans_entry
_tgl_dkl_phy_ddi_translations_dp_hbr[] = {
@@ -869,6 +879,7 @@ static const union intel_ddi_buf_trans_entry
[Intel-gfx] [PATCH 07/17] drm/i915; Return the whole buf_trans struct from get_buf_trans()
From: Ville Syrjälä
Raise the abstraction level of the get_buf_trans() functions
a bit more by returning the whole wrapper intel_ddi_buf_trans
struct.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 76 +++
.../drm/i915/display/intel_ddi_buf_trans.c| 94 +--
.../drm/i915/display/intel_ddi_buf_trans.h| 20 ++--
3 files changed, 95 insertions(+), 95 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index fd2dff10fc83..5ac31bd13b3e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -100,7 +100,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
u32 iboost_bit = 0;
int i, n_entries;
enum port port = encoder->port;
- const union intel_ddi_buf_trans_entry *ddi_translations;
+ const struct intel_ddi_buf_trans *ddi_translations;
ddi_translations = hsw_get_buf_trans(encoder, crtc_state, _entries);
@@ -114,9 +114,9 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
for (i = 0; i < n_entries; i++) {
intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, i),
- ddi_translations[i].hsw.trans1 | iboost_bit);
+ ddi_translations->entries[i].hsw.trans1 |
iboost_bit);
intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, i),
- ddi_translations[i].hsw.trans2);
+ ddi_translations->entries[i].hsw.trans2);
}
}
@@ -133,7 +133,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
u32 iboost_bit = 0;
int n_entries;
enum port port = encoder->port;
- const union intel_ddi_buf_trans_entry *ddi_translations;
+ const struct intel_ddi_buf_trans *ddi_translations;
ddi_translations = hsw_get_buf_trans(encoder, crtc_state, _entries);
@@ -149,9 +149,9 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
/* Entry 9 is for HDMI: */
intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, 9),
- ddi_translations[level].hsw.trans1 | iboost_bit);
+ ddi_translations->entries[level].hsw.trans1 |
iboost_bit);
intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, 9),
- ddi_translations[level].hsw.trans2);
+ ddi_translations->entries[level].hsw.trans2);
}
void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
@@ -908,7 +908,7 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
iboost = intel_bios_encoder_dp_boost_level(encoder->devdata);
if (iboost == 0) {
- const union intel_ddi_buf_trans_entry *ddi_translations;
+ const struct intel_ddi_buf_trans *ddi_translations;
int n_entries;
ddi_translations = hsw_get_buf_trans(encoder, crtc_state,
_entries);
@@ -918,7 +918,7 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
if (drm_WARN_ON_ONCE(_priv->drm, level >= n_entries))
level = n_entries - 1;
- iboost = ddi_translations[level].hsw.i_boost;
+ iboost = ddi_translations->entries[level].hsw.i_boost;
}
/* Make sure that the requested I_boost is valid */
@@ -938,7 +938,7 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder
*encoder,
int level)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- const union intel_ddi_buf_trans_entry *ddi_translations;
+ const struct intel_ddi_buf_trans *ddi_translations;
enum port port = encoder->port;
int n_entries;
@@ -949,10 +949,10 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder
*encoder,
level = n_entries - 1;
bxt_ddi_phy_set_signal_level(dev_priv, port,
-ddi_translations[level].bxt.margin,
-ddi_translations[level].bxt.scale,
-ddi_translations[level].bxt.enable,
-ddi_translations[level].bxt.deemphasis);
+
ddi_translations->entries[level].bxt.margin,
+ddi_translations->entries[level].bxt.scale,
+
ddi_translations->entries[level].bxt.enable,
+
ddi_translations->entries[level].bxt.deemphasis);
}
static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp,
@@ -1011,7 +1011,7 @@ static void cnl_ddi_vswing_program(struct intel_encoder
*encoder,
int level)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- const
[Intel-gfx] [PATCH 04/17] drm/i915: Rename dkl phy buf trans tables
From: Ville Syrjälä
Rename the dkl phy buf trans tables to follow the same
naming pattern used by everyone else.
Signed-off-by: Ville Syrjälä
---
.../gpu/drm/i915/display/intel_ddi_buf_trans.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index feef9d9a9dd8..879a2aca1140 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -604,7 +604,7 @@ static const union intel_ddi_buf_trans_entry
icl_mg_phy_ddi_translations_hdmi[]
{ .mg = { 0x36, 0x0, 0x9 } }, /* 10 Full-3 dB */
};
-static const union intel_ddi_buf_trans_entry tgl_dkl_phy_dp_ddi_trans[] = {
+static const union intel_ddi_buf_trans_entry
tgl_dkl_phy_ddi_translations_dp_hbr[] = {
/* VS pre-emp Non-trans mV
Pre-emph dB */
{ .dkl = { 0x7, 0x0, 0x00 } }, /* 00 400mV 0 dB */
{ .dkl = { 0x5, 0x0, 0x05 } }, /* 01 400mV 3.5 dB
*/
@@ -618,7 +618,7 @@ static const union intel_ddi_buf_trans_entry
tgl_dkl_phy_dp_ddi_trans[] = {
{ .dkl = { 0x0, 0x0, 0x00 } }, /* 30 1200mV 0 dB
HDMI default */
};
-static const union intel_ddi_buf_trans_entry tgl_dkl_phy_dp_ddi_trans_hbr2[] =
{
+static const union intel_ddi_buf_trans_entry
tgl_dkl_phy_ddi_translations_dp_hbr2[] = {
/* VS pre-emp Non-trans mV
Pre-emph dB */
{ .dkl = { 0x7, 0x0, 0x00 } }, /* 00 400mV 0 dB */
{ .dkl = { 0x5, 0x0, 0x05 } }, /* 01 400mV 3.5 dB
*/
@@ -632,7 +632,7 @@ static const union intel_ddi_buf_trans_entry
tgl_dkl_phy_dp_ddi_trans_hbr2[] = {
{ .dkl = { 0x0, 0x0, 0x00 } }, /* 30 1200mV 0 dB
HDMI default */
};
-static const union intel_ddi_buf_trans_entry tgl_dkl_phy_hdmi_ddi_trans[] = {
+static const union intel_ddi_buf_trans_entry
tgl_dkl_phy_ddi_translations_hdmi[] = {
/* HDMI Preset VS Pre-emph */
{ .dkl = { 0x7, 0x0, 0x0 } }, /* 1400mV 0dB */
{ .dkl = { 0x6, 0x0, 0x0 } }, /* 2500mV 0dB */
@@ -1334,8 +1334,8 @@ tgl_get_dkl_buf_trans_hdmi(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- *n_entries = ARRAY_SIZE(tgl_dkl_phy_hdmi_ddi_trans);
- return tgl_dkl_phy_hdmi_ddi_trans;
+ *n_entries = ARRAY_SIZE(tgl_dkl_phy_ddi_translations_hdmi);
+ return tgl_dkl_phy_ddi_translations_hdmi;
}
static const union intel_ddi_buf_trans_entry *
@@ -1344,11 +1344,11 @@ tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder,
int *n_entries)
{
if (crtc_state->port_clock > 27) {
- *n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans_hbr2);
- return tgl_dkl_phy_dp_ddi_trans_hbr2;
+ *n_entries = ARRAY_SIZE(tgl_dkl_phy_ddi_translations_dp_hbr2);
+ return tgl_dkl_phy_ddi_translations_dp_hbr2;
} else {
- *n_entries = ARRAY_SIZE(tgl_dkl_phy_dp_ddi_trans);
- return tgl_dkl_phy_dp_ddi_trans;
+ *n_entries = ARRAY_SIZE(tgl_dkl_phy_ddi_translations_dp_hbr);
+ return tgl_dkl_phy_ddi_translations_dp_hbr;
}
}
--
2.26.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 02/17] drm/i915: Introduce hsw_get_buf_trans()
From: Ville Syrjälä
All the other platforms handle the output_type stuff in their
*_get_buf_trans() functions. Do the same for hsw/bdw/skl.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 27
.../drm/i915/display/intel_ddi_buf_trans.c| 43 +--
.../drm/i915/display/intel_ddi_buf_trans.h| 10 ++---
drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
4 files changed, 43 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index f40472cfce10..3ebf3503bdf7 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -102,12 +102,10 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
enum port port = encoder->port;
const struct hsw_ddi_buf_trans *ddi_translations;
- if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
- ddi_translations = hsw_ddi_get_buf_trans_fdi(dev_priv,
_entries);
- else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
- ddi_translations = hsw_ddi_get_buf_trans_edp(encoder,
_entries);
- else
- ddi_translations = hsw_ddi_get_buf_trans_dp(encoder,
_entries);
+ ddi_translations = hsw_get_buf_trans(encoder, crtc_state, _entries);
+
+ if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
+ return;
/* If we're boosting the current, set bit 31 of trans1 */
if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
@@ -128,6 +126,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
* HDMI/DVI use cases.
*/
static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
+const struct intel_crtc_state
*crtc_state,
int level)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -136,7 +135,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
enum port port = encoder->port;
const struct hsw_ddi_buf_trans *ddi_translations;
- ddi_translations = hsw_ddi_get_buf_trans_hdmi(encoder, _entries);
+ ddi_translations = hsw_get_buf_trans(encoder, crtc_state, _entries);
if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
return;
@@ -912,12 +911,7 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
const struct hsw_ddi_buf_trans *ddi_translations;
int n_entries;
- if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- ddi_translations = hsw_ddi_get_buf_trans_hdmi(encoder,
_entries);
- else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
- ddi_translations = hsw_ddi_get_buf_trans_edp(encoder,
_entries);
- else
- ddi_translations = hsw_ddi_get_buf_trans_dp(encoder,
_entries);
+ ddi_translations = hsw_get_buf_trans(encoder, crtc_state,
_entries);
if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
return;
@@ -989,10 +983,7 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp
*intel_dp,
} else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
bxt_get_buf_trans(encoder, crtc_state, _entries);
} else {
- if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
- hsw_ddi_get_buf_trans_edp(encoder, _entries);
- else
- hsw_ddi_get_buf_trans_dp(encoder, _entries);
+ hsw_get_buf_trans(encoder, crtc_state, _entries);
}
if (drm_WARN_ON(_priv->drm, n_entries < 1))
@@ -3098,7 +3089,7 @@ static void intel_enable_ddi_hdmi(struct
intel_atomic_state *state,
else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
bxt_ddi_vswing_sequence(encoder, crtc_state, level);
else
- hsw_prepare_hdmi_ddi_buffers(encoder, level);
+ hsw_prepare_hdmi_ddi_buffers(encoder, crtc_state, level);
if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
skl_ddi_set_iboost(encoder, crtc_state, level);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 5b8c67c439a7..56b521d030e1 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -846,8 +846,8 @@ static int skl_buf_trans_num_entries(enum port port, int
n_entries)
return min(n_entries, 9);
}
-const struct hsw_ddi_buf_trans *
-hsw_ddi_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
+static const struct hsw_ddi_buf_trans *
+hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
{
struct drm_i915_private
[Intel-gfx] [PATCH 06/17] drm/i915: Introduce intel_get_buf_trans()
From: Ville Syrjälä
Add a small helper to get the buf trans entris+num_entries
from the struct. Should avoid copy-paste errors in the
platform specific get_buf_trans() functions.
@@
identifier T, N;
@@
- *N = T.num_entries;
- return T.entries;
+ return intel_get_buf_trans(, N);
@@
@@
is_hobl_buf_trans(...) { ... }
+
+ static const union intel_ddi_buf_trans_entry *
+ intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int
*num_entries)
+ {
+ *num_entries = ddi_translations->num_entries;
+ return ddi_translations->entries;
+ }
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 245 +-
1 file changed, 125 insertions(+), 120 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index f87533200322..413e3c55027e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -993,17 +993,24 @@ bool is_hobl_buf_trans(const union
intel_ddi_buf_trans_entry *table)
return table == tgl_combo_phy_ddi_translations_edp_hbr2_hobl.entries;
}
+static const union intel_ddi_buf_trans_entry *
+intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int
*num_entries)
+{
+ *num_entries = ddi_translations->num_entries;
+ return ddi_translations->entries;
+}
+
static const union intel_ddi_buf_trans_entry *
bdw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
if (dev_priv->vbt.edp.low_vswing) {
- *n_entries = bdw_ddi_translations_edp.num_entries;
- return bdw_ddi_translations_edp.entries;
+ return intel_get_buf_trans(_ddi_translations_edp,
+ n_entries);
} else {
- *n_entries = bdw_ddi_translations_dp.num_entries;
- return bdw_ddi_translations_dp.entries;
+ return intel_get_buf_trans(_ddi_translations_dp,
+ n_entries);
}
}
@@ -1013,14 +1020,14 @@ skl_get_buf_trans_dp(struct intel_encoder *encoder, int
*n_entries)
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
if (IS_SKL_ULX(dev_priv)) {
- *n_entries = skl_y_ddi_translations_dp.num_entries;
- return skl_y_ddi_translations_dp.entries;
+ return intel_get_buf_trans(_y_ddi_translations_dp,
+ n_entries);
} else if (IS_SKL_ULT(dev_priv)) {
- *n_entries = skl_u_ddi_translations_dp.num_entries;
- return skl_u_ddi_translations_dp.entries;
+ return intel_get_buf_trans(_u_ddi_translations_dp,
+ n_entries);
} else {
- *n_entries = skl_ddi_translations_dp.num_entries;
- return skl_ddi_translations_dp.entries;
+ return intel_get_buf_trans(_ddi_translations_dp,
+ n_entries);
}
}
@@ -1032,16 +1039,16 @@ kbl_get_buf_trans_dp(struct intel_encoder *encoder, int
*n_entries)
if (IS_KBL_ULX(dev_priv) ||
IS_CFL_ULX(dev_priv) ||
IS_CML_ULX(dev_priv)) {
- *n_entries = kbl_y_ddi_translations_dp.num_entries;
- return kbl_y_ddi_translations_dp.entries;
+ return intel_get_buf_trans(_y_ddi_translations_dp,
+ n_entries);
} else if (IS_KBL_ULT(dev_priv) ||
IS_CFL_ULT(dev_priv) ||
IS_CML_ULT(dev_priv)) {
- *n_entries = kbl_u_ddi_translations_dp.num_entries;
- return kbl_u_ddi_translations_dp.entries;
+ return intel_get_buf_trans(_u_ddi_translations_dp,
+ n_entries);
} else {
- *n_entries = kbl_ddi_translations_dp.num_entries;
- return kbl_ddi_translations_dp.entries;
+ return intel_get_buf_trans(_ddi_translations_dp,
+ n_entries);
}
}
@@ -1055,17 +1062,17 @@ skl_get_buf_trans_edp(struct intel_encoder *encoder,
int *n_entries)
IS_KBL_ULX(dev_priv) ||
IS_CFL_ULX(dev_priv) ||
IS_CML_ULX(dev_priv)) {
- *n_entries = skl_y_ddi_translations_edp.num_entries;
- return skl_y_ddi_translations_edp.entries;
+ return intel_get_buf_trans(_y_ddi_translations_edp,
+ n_entries);
} else if (IS_SKL_ULT(dev_priv) ||
IS_KBL_ULT(dev_priv) ||
IS_CFL_ULT(dev_priv) ||
[Intel-gfx] [PATCH 05/17] drm/i915: Wrap the buf trans tables into a struct
From: Ville Syrjälä
Put a wrapper struct around the buf trans tables so that
we can declare the number of entries and default HDMI entry
alongside the table.
@wrap@
identifier old =~ "^.*translations.*";
fresh identifier new = "_" ## old;
type T;
@@
<...
static const T
- old
+ new
[] = {
...
};
+
+ static const struct intel_ddi_buf_trans old = {
+ .entries = new,
+ .num_entries = ARRAY_SIZE(new),
+ };
...>
@@
identifier wrap.old;
@@
(
- ARRAY_SIZE(old)
+ old.num_entries
|
- old
+ old.entries
)
@@
@@
union intel_ddi_buf_trans_entry {
...
};
+
+struct intel_ddi_buf_trans {
+ const union intel_ddi_buf_trans_entry *entries;
+ u8 num_entries;
+};
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_ddi_buf_trans.c| 599 +-
.../drm/i915/display/intel_ddi_buf_trans.h| 5 +
2 files changed, 432 insertions(+), 172 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 879a2aca1140..f87533200322 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -12,7 +12,7 @@
* them for both DP and FDI transports, allowing those ports to
* automatically adapt to HDMI connections as well
*/
-static const union intel_ddi_buf_trans_entry hsw_ddi_translations_dp[] = {
+static const union intel_ddi_buf_trans_entry _hsw_ddi_translations_dp[] = {
{ .hsw = { 0x00FF, 0x0006000E, 0x0 } },
{ .hsw = { 0x00D75FFF, 0x0005000A, 0x0 } },
{ .hsw = { 0x00C30FFF, 0x00040006, 0x0 } },
@@ -24,7 +24,12 @@ static const union intel_ddi_buf_trans_entry
hsw_ddi_translations_dp[] = {
{ .hsw = { 0x80D75FFF, 0x000B, 0x0 } },
};
-static const union intel_ddi_buf_trans_entry hsw_ddi_translations_fdi[] = {
+static const struct intel_ddi_buf_trans hsw_ddi_translations_dp = {
+ .entries = _hsw_ddi_translations_dp,
+ .num_entries = ARRAY_SIZE(_hsw_ddi_translations_dp),
+};
+
+static const union intel_ddi_buf_trans_entry _hsw_ddi_translations_fdi[] = {
{ .hsw = { 0x00FF, 0x0007000E, 0x0 } },
{ .hsw = { 0x00D75FFF, 0x000F000A, 0x0 } },
{ .hsw = { 0x00C30FFF, 0x00060006, 0x0 } },
@@ -36,7 +41,12 @@ static const union intel_ddi_buf_trans_entry
hsw_ddi_translations_fdi[] = {
{ .hsw = { 0x00D75FFF, 0x001E, 0x0 } },
};
-static const union intel_ddi_buf_trans_entry hsw_ddi_translations_hdmi[] = {
+static const struct intel_ddi_buf_trans hsw_ddi_translations_fdi = {
+ .entries = _hsw_ddi_translations_fdi,
+ .num_entries = ARRAY_SIZE(_hsw_ddi_translations_fdi),
+};
+
+static const union intel_ddi_buf_trans_entry _hsw_ddi_translations_hdmi[] = {
/* Idx NT mV d T mV d
db */
{ .hsw = { 0x00FF, 0x0006000E, 0x0 } }, /* 0: 400 400
0 */
{ .hsw = { 0x00E79FFF, 0x000E000C, 0x0 } }, /* 1: 400 500
2 */
@@ -52,7 +62,12 @@ static const union intel_ddi_buf_trans_entry
hsw_ddi_translations_hdmi[] = {
{ .hsw = { 0x80FF, 0x00030002, 0x0 } }, /* 11: 10001000
0 */
};
-static const union intel_ddi_buf_trans_entry bdw_ddi_translations_edp[] = {
+static const struct intel_ddi_buf_trans hsw_ddi_translations_hdmi = {
+ .entries = _hsw_ddi_translations_hdmi,
+ .num_entries = ARRAY_SIZE(_hsw_ddi_translations_hdmi),
+};
+
+static const union intel_ddi_buf_trans_entry _bdw_ddi_translations_edp[] = {
{ .hsw = { 0x00FF, 0x0012, 0x0 } },
{ .hsw = { 0x00EBAFFF, 0x00020011, 0x0 } },
{ .hsw = { 0x00C71FFF, 0x0006000F, 0x0 } },
@@ -64,7 +79,12 @@ static const union intel_ddi_buf_trans_entry
bdw_ddi_translations_edp[] = {
{ .hsw = { 0x00DB6FFF, 0x000A000C, 0x0 } },
};
-static const union intel_ddi_buf_trans_entry bdw_ddi_translations_dp[] = {
+static const struct intel_ddi_buf_trans bdw_ddi_translations_edp = {
+ .entries = _bdw_ddi_translations_edp,
+ .num_entries = ARRAY_SIZE(_bdw_ddi_translations_edp),
+};
+
+static const union intel_ddi_buf_trans_entry _bdw_ddi_translations_dp[] = {
{ .hsw = { 0x00FF, 0x0007000E, 0x0 } },
{ .hsw = { 0x00D75FFF, 0x000E000A, 0x0 } },
{ .hsw = { 0x00BE, 0x00140006, 0x0 } },
@@ -76,7 +96,12 @@ static const union intel_ddi_buf_trans_entry
bdw_ddi_translations_dp[] = {
{ .hsw = { 0x80D75FFF, 0x001B0002, 0x0 } },
};
-static const union intel_ddi_buf_trans_entry bdw_ddi_translations_fdi[] = {
+static const struct intel_ddi_buf_trans bdw_ddi_translations_dp = {
+ .entries = _bdw_ddi_translations_dp,
+ .num_entries = ARRAY_SIZE(_bdw_ddi_translations_dp),
+};
+
+static const union intel_ddi_buf_trans_entry _bdw_ddi_translations_fdi[] = {
{ .hsw = { 0x00FF, 0x0001000E, 0x0 } },
{ .hsw = { 0x00D75FFF, 0x0004000A, 0x0 } },
{ .hsw = { 0x00C30FFF,
[Intel-gfx] [PATCH 01/17] drm/i915: s/intel/hsw/ for hsw/bde/skl buf trans
From: Ville Syrjälä
Give the hsw/bdw/skl buf trans stuff a better namespace.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 39 +
drivers/gpu/drm/i915/display/intel_ddi.h | 4 +-
.../drm/i915/display/intel_ddi_buf_trans.c| 79 +--
.../drm/i915/display/intel_ddi_buf_trans.h| 20 +++--
drivers/gpu/drm/i915/display/intel_fdi.c | 4 +-
5 files changed, 70 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index f4249f087fa7..f40472cfce10 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -93,24 +93,21 @@ static int intel_ddi_hdmi_level(struct intel_encoder
*encoder,
* values in advance. This function programs the correct values for
* DP/eDP/FDI use cases.
*/
-void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state)
+void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 iboost_bit = 0;
int i, n_entries;
enum port port = encoder->port;
- const struct ddi_buf_trans *ddi_translations;
+ const struct hsw_ddi_buf_trans *ddi_translations;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
- ddi_translations = intel_ddi_get_buf_trans_fdi(dev_priv,
- _entries);
+ ddi_translations = hsw_ddi_get_buf_trans_fdi(dev_priv,
_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
- ddi_translations = intel_ddi_get_buf_trans_edp(encoder,
- _entries);
+ ddi_translations = hsw_ddi_get_buf_trans_edp(encoder,
_entries);
else
- ddi_translations = intel_ddi_get_buf_trans_dp(encoder,
- _entries);
+ ddi_translations = hsw_ddi_get_buf_trans_dp(encoder,
_entries);
/* If we're boosting the current, set bit 31 of trans1 */
if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv) &&
@@ -130,16 +127,16 @@ void intel_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
* values in advance. This function programs the correct values for
* HDMI/DVI use cases.
*/
-static void intel_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
- int level)
+static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
+int level)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 iboost_bit = 0;
int n_entries;
enum port port = encoder->port;
- const struct ddi_buf_trans *ddi_translations;
+ const struct hsw_ddi_buf_trans *ddi_translations;
- ddi_translations = intel_ddi_get_buf_trans_hdmi(encoder, _entries);
+ ddi_translations = hsw_ddi_get_buf_trans_hdmi(encoder, _entries);
if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
return;
@@ -912,15 +909,15 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
iboost = intel_bios_encoder_dp_boost_level(encoder->devdata);
if (iboost == 0) {
- const struct ddi_buf_trans *ddi_translations;
+ const struct hsw_ddi_buf_trans *ddi_translations;
int n_entries;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- ddi_translations =
intel_ddi_get_buf_trans_hdmi(encoder, _entries);
+ ddi_translations = hsw_ddi_get_buf_trans_hdmi(encoder,
_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
- ddi_translations = intel_ddi_get_buf_trans_edp(encoder,
_entries);
+ ddi_translations = hsw_ddi_get_buf_trans_edp(encoder,
_entries);
else
- ddi_translations = intel_ddi_get_buf_trans_dp(encoder,
_entries);
+ ddi_translations = hsw_ddi_get_buf_trans_dp(encoder,
_entries);
if (drm_WARN_ON_ONCE(_priv->drm, !ddi_translations))
return;
@@ -993,9 +990,9 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp
*intel_dp,
bxt_get_buf_trans(encoder, crtc_state, _entries);
} else {
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
- intel_ddi_get_buf_trans_edp(encoder, _entries);
+ hsw_ddi_get_buf_trans_edp(encoder, _entries);
else
-
[Intel-gfx] [PATCH 03/17] drm/i915: Wrap the platform specific buf trans structs into a union
From: Ville Syrjälä
In order to abstact the buf trans stuff let's wrap the platform
specific structs into a union.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 76 +-
.../drm/i915/display/intel_ddi_buf_trans.c| 1318 -
.../drm/i915/display/intel_ddi_buf_trans.h| 28 +-
3 files changed, 715 insertions(+), 707 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3ebf3503bdf7..fd2dff10fc83 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -100,7 +100,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
u32 iboost_bit = 0;
int i, n_entries;
enum port port = encoder->port;
- const struct hsw_ddi_buf_trans *ddi_translations;
+ const union intel_ddi_buf_trans_entry *ddi_translations;
ddi_translations = hsw_get_buf_trans(encoder, crtc_state, _entries);
@@ -114,9 +114,9 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder
*encoder,
for (i = 0; i < n_entries; i++) {
intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, i),
- ddi_translations[i].trans1 | iboost_bit);
+ ddi_translations[i].hsw.trans1 | iboost_bit);
intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, i),
- ddi_translations[i].trans2);
+ ddi_translations[i].hsw.trans2);
}
}
@@ -133,7 +133,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
u32 iboost_bit = 0;
int n_entries;
enum port port = encoder->port;
- const struct hsw_ddi_buf_trans *ddi_translations;
+ const union intel_ddi_buf_trans_entry *ddi_translations;
ddi_translations = hsw_get_buf_trans(encoder, crtc_state, _entries);
@@ -149,9 +149,9 @@ static void hsw_prepare_hdmi_ddi_buffers(struct
intel_encoder *encoder,
/* Entry 9 is for HDMI: */
intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, 9),
- ddi_translations[level].trans1 | iboost_bit);
+ ddi_translations[level].hsw.trans1 | iboost_bit);
intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, 9),
- ddi_translations[level].trans2);
+ ddi_translations[level].hsw.trans2);
}
void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
@@ -908,7 +908,7 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
iboost = intel_bios_encoder_dp_boost_level(encoder->devdata);
if (iboost == 0) {
- const struct hsw_ddi_buf_trans *ddi_translations;
+ const union intel_ddi_buf_trans_entry *ddi_translations;
int n_entries;
ddi_translations = hsw_get_buf_trans(encoder, crtc_state,
_entries);
@@ -918,7 +918,7 @@ static void skl_ddi_set_iboost(struct intel_encoder
*encoder,
if (drm_WARN_ON_ONCE(_priv->drm, level >= n_entries))
level = n_entries - 1;
- iboost = ddi_translations[level].i_boost;
+ iboost = ddi_translations[level].hsw.i_boost;
}
/* Make sure that the requested I_boost is valid */
@@ -938,7 +938,7 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder
*encoder,
int level)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- const struct bxt_ddi_buf_trans *ddi_translations;
+ const union intel_ddi_buf_trans_entry *ddi_translations;
enum port port = encoder->port;
int n_entries;
@@ -949,10 +949,10 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder
*encoder,
level = n_entries - 1;
bxt_ddi_phy_set_signal_level(dev_priv, port,
-ddi_translations[level].margin,
-ddi_translations[level].scale,
-ddi_translations[level].enable,
-ddi_translations[level].deemphasis);
+ddi_translations[level].bxt.margin,
+ddi_translations[level].bxt.scale,
+ddi_translations[level].bxt.enable,
+ddi_translations[level].bxt.deemphasis);
}
static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp,
@@ -1011,7 +1011,7 @@ static void cnl_ddi_vswing_program(struct intel_encoder
*encoder,
int level)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- const struct cnl_ddi_buf_trans *ddi_translations;
+ const union intel_ddi_buf_trans_entry *ddi_translations;
enum port port = encoder->port;
int n_entries, ln;
[Intel-gfx] [PATCH 00/17] drm/i915: DDI buf trans cleaup and fixes
From: Ville Syrjälä The DDI buf trans functions keep turning into bad spaghetti every time a new platform gets added. Split the platforms up properly and turn the whole thing into a vfunc to make it easier to manage multiple platforms. Ville Syrjälä (17): drm/i915: s/intel/hsw/ for hsw/bde/skl buf trans drm/i915: Introduce hsw_get_buf_trans() drm/i915: Wrap the platform specific buf trans structs into a union drm/i915: Rename dkl phy buf trans tables drm/i915: Wrap the buf trans tables into a struct drm/i915: Introduce intel_get_buf_trans() drm/i915; Return the whole buf_trans struct from get_buf_trans() drm/i915: Store the HDMI default entry in the bug trans struct drm/i915: Introduce encoder->get_buf_trans() drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs drm/i915: Introduce rkl_get_combo_buf_trans() drm/i915: Fix dg1 buf trans tables drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table drm/i915: Fix ehl edp hbr2 vswing table drm/i915: Clean up jsl/ehl buf trans functions drm/i915: Nuke buf_trans hdmi functions drm/i915: Add the missing adls vswing tables drivers/gpu/drm/i915/display/intel_crt.c |3 + drivers/gpu/drm/i915/display/intel_ddi.c | 162 +- drivers/gpu/drm/i915/display/intel_ddi.h |4 +- .../drm/i915/display/intel_ddi_buf_trans.c| 2354 ++--- .../drm/i915/display/intel_ddi_buf_trans.h| 63 +- .../drm/i915/display/intel_display_types.h|4 + drivers/gpu/drm/i915/display/intel_fdi.c |5 +- 7 files changed, 1432 insertions(+), 1163 deletions(-) -- 2.26.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix older platforms
== Series Details == Series: drm/i915: Fix older platforms URL : https://patchwork.freedesktop.org/series/89306/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Simplify CCS and UV plane alignment handling
== Series Details ==
Series: drm/i915: Simplify CCS and UV plane alignment handling
URL : https://patchwork.freedesktop.org/series/89299/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9993 -> Patchwork_19963
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/index.html
Known issues
Here are the changes found in Patchwork_19963 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
* igt@i915_selftest@live@execlists:
- fi-bsw-kefka: [PASS][3] -> [INCOMPLETE][4] ([i915#2782] /
[i915#2940])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html
* igt@runner@aborted:
- fi-bsw-kefka: NOTRUN -> [FAIL][5] ([i915#1436])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/fi-bsw-kefka/igt@run...@aborted.html
- fi-bdw-5557u: NOTRUN -> [FAIL][6] ([i915#1602] / [i915#2029])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/fi-bdw-5557u/igt@run...@aborted.html
Possible fixes
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-kbl-soraka: [FAIL][7] ([i915#2346]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][9] ([i915#1849] / [i915#3180]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
Participating hosts (42 -> 40)
--
Missing(2): fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9993 -> Patchwork_19963
CI-20190529: 20190529
CI_DRM_9993: 629d3809e6d926c77ba5e9c5405e64eeba564560 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19963: 30bb75470a489cf14c31e0328ae75dc1773074a1 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
30bb75470a48 drm/i915: Simplify CCS and UV plane alignment handling
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19963/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Simplify CCS and UV plane alignment handling
== Series Details == Series: drm/i915: Simplify CCS and UV plane alignment handling URL : https://patchwork.freedesktop.org/series/89299/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix docbook descriptions for i915_gem_shrinker
== Series Details ==
Series: drm/i915: Fix docbook descriptions for i915_gem_shrinker
URL : https://patchwork.freedesktop.org/series/89297/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9993 -> Patchwork_19962
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/index.html
Known issues
Here are the changes found in Patchwork_19962 that come from known issues:
### IGT changes ###
Possible fixes
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-kbl-soraka: [FAIL][1] ([i915#2346]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][3] ([i915#1849] / [i915#3180]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
Participating hosts (42 -> 40)
--
Missing(2): fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9993 -> Patchwork_19962
CI-20190529: 20190529
CI_DRM_9993: 629d3809e6d926c77ba5e9c5405e64eeba564560 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19962: 557cd7cc78aa9e781c1ad2068d7288c0780608fe @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
557cd7cc78aa drm/i915: Fix docbook descriptions for i915_gem_shrinker
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19962/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 11/19] drm/i915: Update the helper to set correct mapping
On 21/04/2021 12:42, Matthew Auld wrote:
On 19/04/2021 16:01, Tvrtko Ursulin wrote:
On 19/04/2021 15:37, Matthew Auld wrote:
On 19/04/2021 15:07, Tvrtko Ursulin wrote:
On 19/04/2021 12:30, Matthew Auld wrote:
On 15/04/2021 12:05, Tvrtko Ursulin wrote:
On 15/04/2021 10:23, Matthew Auld wrote:
On Thu, 15 Apr 2021 at 09:21, Tvrtko Ursulin
wrote:
On 14/04/2021 17:20, Matthew Auld wrote:
On Wed, 14 Apr 2021 at 16:22, Tvrtko Ursulin
wrote:
On 12/04/2021 10:05, Matthew Auld wrote:
From: Venkata Sandeep Dhanalakota
Determine the possible coherent map type based on object
location,
and if target has llc or if user requires an always coherent
mapping.
Cc: Matthew Auld
Cc: CQ Tang
Suggested-by: Michal Wajdeczko
Signed-off-by: Venkata Sandeep Dhanalakota
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 ++-
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 4 +++-
drivers/gpu/drm/i915/gt/intel_ring.c | 9 ++---
drivers/gpu/drm/i915/gt/selftest_context.c | 3 ++-
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_lrc.c | 4 +++-
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 +++-
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 +++-
drivers/gpu/drm/i915/i915_drv.h | 11
+--
drivers/gpu/drm/i915/selftests/igt_spinner.c | 4 ++--
11 files changed, 36 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index efe935f80c1a..b79568d370f5 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -664,7 +664,8 @@ static int init_status_page(struct
intel_engine_cs *engine)
if (ret)
goto err;
- vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ vaddr = i915_gem_object_pin_map(obj,
+ i915_coherent_map_type(engine->i915, obj, true));
if (IS_ERR(vaddr)) {
ret = PTR_ERR(vaddr);
goto err_unpin;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 7c9af86fdb1e..47f4397095e5 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -23,7 +23,7 @@ static void dbg_poison_ce(struct
intel_context *ce)
if (ce->state) {
struct drm_i915_gem_object *obj =
ce->state->obj;
- int type =
i915_coherent_map_type(ce->engine->i915);
+ int type =
i915_coherent_map_type(ce->engine->i915, obj, true);
void *map;
if (!i915_gem_object_trylock(obj))
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index e86897cde984..aafe2a4df496 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -903,7 +903,9 @@ lrc_pre_pin(struct intel_context *ce,
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
*vaddr = i915_gem_object_pin_map(ce->state->obj,
- i915_coherent_map_type(ce->engine->i915) |
+ i915_coherent_map_type(ce->engine->i915,
+ ce->state->obj,
+ false) |
I915_MAP_OVERRIDE);
return PTR_ERR_OR_ZERO(*vaddr);
diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c
b/drivers/gpu/drm/i915/gt/intel_ring.c
index aee0a77c77e0..3cf6c7e68108 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring.c
@@ -53,9 +53,12 @@ int intel_ring_pin(struct intel_ring
*ring, struct i915_gem_ww_ctx *ww)
if (i915_vma_is_map_and_fenceable(vma))
addr = (void __force *)i915_vma_pin_iomap(vma);
- else
- addr = i915_gem_object_pin_map(vma->obj,
- i915_coherent_map_type(vma->vm->i915));
+ else {
+ int type =
i915_coherent_map_type(vma->vm->i915, vma->obj, false);
+
+ addr = i915_gem_object_pin_map(vma->obj, type);
+ }
+
if (IS_ERR(addr)) {
ret = PTR_ERR(addr);
goto err_ring;
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c
b/drivers/gpu/drm/i915/gt/selftest_context.c
index b9bdd1d23243..26685b927169 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -88,7 +88,8 @@ static int __live_context_size(struct
intel_engine_cs *engine)
goto err;
vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
- i915_coherent_map_type(engine->i915));
+ i915_coherent_map_type(engine->i915,
+ ce->state->obj, false));
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
intel_context_unpin(ce);
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 746985971c3a..5b63d4df8c93 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix docbook descriptions for i915_gem_shrinker
== Series Details == Series: drm/i915: Fix docbook descriptions for i915_gem_shrinker URL : https://patchwork.freedesktop.org/series/89297/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/4] drm/i915: Rewrite CL/CTG L-shaped memory detection
From: Ville Syrjälä
Currently we try to detect a symmetric memory configurations
using a magic DCC2_MODIFIED_ENHANCED_DISABLE bit. That bit is
either only set on a very specific subset of machines or it
just does not exist (it's not mentioned in any public chipset
datasheets I've found). As it happens my CL/CTG machines never
set said bit, even if I populate the channels with identical
sticks.
So let's do the L-shaped memory detection the same way as the
desktop variants, ie. just look at the DRAM rank boundary
registers to see if both channels have an identical size.
With this my CL/CTG no longer claim L-shaped memory when I use
identical sticks. Also tested with non-matching sticks just to
make sure the L-shaped memory is still properly detected.
And for completeness let's update the debugfs code to dump
the correct set of registers on each platform.
Cc: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 15 ---
drivers/gpu/drm/i915/i915_debugfs.c | 16
drivers/gpu/drm/i915/i915_reg.h | 4
3 files changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index 0fa6c38893f7..754f20768de5 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -693,14 +693,15 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
swizzle_x = I915_BIT_6_SWIZZLE_9_10_17;
swizzle_y = I915_BIT_6_SWIZZLE_9_17;
}
- break;
- }
- /* check for L-shaped memory aka modified enhanced addressing */
- if (IS_GEN(i915, 4) &&
- !(intel_uncore_read(uncore, DCC2) &
DCC2_MODIFIED_ENHANCED_DISABLE)) {
- swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;
- swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
+ /* check for L-shaped memory aka modified enhanced
addressing */
+ if (IS_GEN(i915, 4) &&
+ intel_uncore_read16(uncore, C0DRB3_CL) !=
+ intel_uncore_read16(uncore, C1DRB3_CL)) {
+ swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;
+ swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
+ }
+ break;
}
if (dcc == 0x) {
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 8dd374691102..6de11ffcde38 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -621,10 +621,18 @@ static int i915_swizzle_info(struct seq_file *m, void
*data)
intel_uncore_read(uncore, DCC));
seq_printf(m, "DDC2 = 0x%08x\n",
intel_uncore_read(uncore, DCC2));
- seq_printf(m, "C0DRB3 = 0x%04x\n",
- intel_uncore_read16(uncore, C0DRB3_BW));
- seq_printf(m, "C1DRB3 = 0x%04x\n",
- intel_uncore_read16(uncore, C1DRB3_BW));
+
+ if (IS_G45(dev_priv) || IS_I965G(dev_priv) || IS_G33(dev_priv))
{
+ seq_printf(m, "C0DRB3 = 0x%04x\n",
+ intel_uncore_read16(uncore, C0DRB3_BW));
+ seq_printf(m, "C1DRB3 = 0x%04x\n",
+ intel_uncore_read16(uncore, C1DRB3_BW));
+ } else if (IS_GEN(dev_priv, 4)) {
+ seq_printf(m, "C0DRB3 = 0x%04x\n",
+ intel_uncore_read16(uncore, C0DRB3_CL));
+ seq_printf(m, "C1DRB3 = 0x%04x\n",
+ intel_uncore_read16(uncore, C1DRB3_CL));
+ }
} else if (INTEL_GEN(dev_priv) >= 6) {
seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
intel_uncore_read(uncore, MAD_DIMM_C0));
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0587b2455ea1..055c258179a1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3790,6 +3790,10 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define C0DRB3_BW _MMIO(MCHBAR_MIRROR_BASE + 0x206)
#define C1DRB3_BW _MMIO(MCHBAR_MIRROR_BASE + 0x606)
+/* 965gm,ctg DRAM channel configuration */
+#define C0DRB3_CL _MMIO(MCHBAR_MIRROR_BASE + 0x1206)
+#define C1DRB3_CL _MMIO(MCHBAR_MIRROR_BASE + 0x1306)
+
/* snb MCH registers for reading the DRAM channel configuration */
#define MAD_DIMM_C0_MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5004)
#define MAD_DIMM_C1_MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5008)
--
2.26.3
[Intel-gfx] [PATCH 3/4] drm/i915: Give C0DRB3/C1DRB3 a _BW suffix
From: Ville Syrjälä
These are the 965g/g45/g33 specific DRB registers. Give them
a suitable suffix so we can add their counterparts for other
platforms.
Reviewed-by: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 ++--
drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index 8a322594210c..0fa6c38893f7 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -653,8 +653,8 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
* banks of memory are paired and unswizzled on the
* uneven portion, so leave that as unknown.
*/
- if (intel_uncore_read16(uncore, C0DRB3) ==
- intel_uncore_read16(uncore, C1DRB3)) {
+ if (intel_uncore_read16(uncore, C0DRB3_BW) ==
+ intel_uncore_read16(uncore, C1DRB3_BW)) {
swizzle_x = I915_BIT_6_SWIZZLE_9_10;
swizzle_y = I915_BIT_6_SWIZZLE_9;
}
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index b654b7498bcd..8dd374691102 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -622,9 +622,9 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
seq_printf(m, "DDC2 = 0x%08x\n",
intel_uncore_read(uncore, DCC2));
seq_printf(m, "C0DRB3 = 0x%04x\n",
- intel_uncore_read16(uncore, C0DRB3));
+ intel_uncore_read16(uncore, C0DRB3_BW));
seq_printf(m, "C1DRB3 = 0x%04x\n",
- intel_uncore_read16(uncore, C1DRB3));
+ intel_uncore_read16(uncore, C1DRB3_BW));
} else if (INTEL_GEN(dev_priv) >= 6) {
seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
intel_uncore_read(uncore, MAD_DIMM_C0));
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 66a902b3bb8e..0587b2455ea1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3787,8 +3787,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define CSHRDDR3CTL_DDR3 (1 << 2)
/* 965 MCH register controlling DRAM channel configuration */
-#define C0DRB3 _MMIO(MCHBAR_MIRROR_BASE + 0x206)
-#define C1DRB3 _MMIO(MCHBAR_MIRROR_BASE + 0x606)
+#define C0DRB3_BW _MMIO(MCHBAR_MIRROR_BASE + 0x206)
+#define C1DRB3_BW _MMIO(MCHBAR_MIRROR_BASE + 0x606)
/* snb MCH registers for reading the DRAM channel configuration */
#define MAD_DIMM_C0_MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5004)
--
2.26.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/4] drm/i915: Read C0DRB3/C1DRB3 as 16 bits again
From: Ville Syrjälä
We've defined C0DRB3/C0DRB3 as 16 bit registers, so access them
as such.
Fixes: 1c8242c3a4b2 ("drm/i915: Use unchecked writes for setting up the fences")
Reviewed-by: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index e72b7a0dc316..8a322594210c 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -653,8 +653,8 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
* banks of memory are paired and unswizzled on the
* uneven portion, so leave that as unknown.
*/
- if (intel_uncore_read(uncore, C0DRB3) ==
- intel_uncore_read(uncore, C1DRB3)) {
+ if (intel_uncore_read16(uncore, C0DRB3) ==
+ intel_uncore_read16(uncore, C1DRB3)) {
swizzle_x = I915_BIT_6_SWIZZLE_9_10;
swizzle_y = I915_BIT_6_SWIZZLE_9;
}
--
2.26.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/4] drm/i915: Avoid div-by-zero on gen2
From: Ville Syrjälä
Gen2 tiles are 2KiB in size so i915_gem_object_get_tile_row_size()
can in fact return <4KiB, which leads to div-by-zero here.
Avoid that.
Not sure i915_gem_object_get_tile_row_size() is entirely
sane anyway since it doesn't account for the different tile
layouts on i8xx/i915...
I'm not able to hit this before commit 6846895fde05 ("drm/i915:
Replace PIN_NONFAULT with calls to PIN_NOEVICT") and it looks
like I also need to run recent version of Mesa. With those in
place xonotic trips on this quite easily on my 85x.
Cc: sta...@vger.kernel.org
Reviewed-by: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 2561a2f1e54f..8598a1c78a4c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -189,7 +189,7 @@ compute_partial_view(const struct drm_i915_gem_object *obj,
struct i915_ggtt_view view;
if (i915_gem_object_is_tiled(obj))
- chunk = roundup(chunk, tile_row_pages(obj));
+ chunk = roundup(chunk, tile_row_pages(obj) ?: 1);
view.type = I915_GGTT_VIEW_PARTIAL;
view.partial.offset = rounddown(page_offset, chunk);
--
2.26.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 0/4] drm/i915: Fix older platforms
From: Ville Syrjälä Fix a div-by-zero on gen2, and make the L-shaped memory detection actually work on cl/ctg. Atm the SWIZZLE_UNKNOWN stuff just trips some GEM_BUG_ONs. This doesn't fix those but since I populate all my memory channels symmetrically I get to avoid the GEM_BUG_ONs by correctly detecting that I don't have an L-shaped memory configuration. Ville Syrjälä (4): drm/i915: Avoid div-by-zero on gen2 drm/i915: Read C0DRB3/C1DRB3 as 16 bits again drm/i915: Give C0DRB3/C1DRB3 a _BW suffix drm/i915: Rewrite CL/CTG L-shaped memory detection drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 19 ++- drivers/gpu/drm/i915/i915_debugfs.c | 16 drivers/gpu/drm/i915/i915_reg.h | 8 ++-- 4 files changed, 29 insertions(+), 16 deletions(-) -- 2.26.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix docbook descriptions for i915_cmd_parser
== Series Details ==
Series: drm/i915: Fix docbook descriptions for i915_cmd_parser
URL : https://patchwork.freedesktop.org/series/89295/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9993 -> Patchwork_19961
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/index.html
Known issues
Here are the changes found in Patchwork_19961 that come from known issues:
### IGT changes ###
Issues hit
* igt@runner@aborted:
- fi-bdw-5557u: NOTRUN -> [FAIL][1] ([i915#1602] / [i915#2029])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/fi-bdw-5557u/igt@run...@aborted.html
Possible fixes
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-kbl-soraka: [FAIL][2] ([i915#2346]) -> [PASS][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][4] ([i915#1849] / [i915#3180]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
Participating hosts (42 -> 40)
--
Missing(2): fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_9993 -> Patchwork_19961
CI-20190529: 20190529
CI_DRM_9993: 629d3809e6d926c77ba5e9c5405e64eeba564560 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19961: 13583b18a02b158084e687568314e6233f60b95c @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
13583b18a02b drm/i915: Fix docbook descriptions for i915_cmd_parser
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19961/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 01/20] drm/amdgpu: Add error handling to amdgpu_dm_initialize_dp_connector()
[AMD Official Use Only - Internal Distribution Only]
I'm fine with having these changes go through drm-misc.
Alex
From: Lipski, Mikita
Sent: Wednesday, April 21, 2021 10:23 AM
To: Lyude Paul ; dri-de...@lists.freedesktop.org
; intel-gfx@lists.freedesktop.org
; nouv...@lists.freedesktop.org
; amd-...@lists.freedesktop.org
; Ville Syrjälä ;
Jani Nikula ; Rodrigo Vivi
; Thomas Zimmermann ; Thierry
Reding
Cc: Wang, Chao-kai (Stylon) ; Lipski, Mikita
; Park, Chris ; Brol, Eryk
; Li, Sun peng (Leo) ; Lakha,
Bhawanpreet ; Lin, Wayne ;
Siqueira, Rodrigo ; open list
; Kazlauskas, Nicholas
; Somasundaram, Meenakshikumar
; David Airlie ; Pillai,
Aurabindo ; Daniel Vetter ; Bas
Nieuwenhuizen ; Deucher, Alexander
; Cornij, Nikola ; Wentland,
Harry ; Koenig, Christian
Subject: Re: [PATCH v3 01/20] drm/amdgpu: Add error handling to
amdgpu_dm_initialize_dp_connector()
Thanks for the change!
Reviewed-by: Mikita Lipski
On 2021-04-19 6:55 p.m., Lyude Paul wrote:
> While working on moving i2c device registration into drm_dp_aux_init() - I
> realized that in order to do so we need to make sure that drivers calling
> drm_dp_aux_init() handle any errors it could possibly return. In the
> process of doing that, I noticed that the majority of AMD's code for DP
> connector creation doesn't attempt to do any real error handling.
>
> So, let's fix this and also cleanup amdgpu_dm_initialize_dp_connector()
> while we're at it. This way we can handle the error codes from
> drm_dp_aux_init().
>
> Signed-off-by: Lyude Paul
> ---
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++-
> .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 44 +++
> .../display/amdgpu_dm/amdgpu_dm_mst_types.h | 6 +--
> 3 files changed, 45 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index a0c8c41e4e57..fc5d315bbb05 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -7608,10 +7608,9 @@ static int amdgpu_dm_connector_init(struct
> amdgpu_display_manager *dm,
>
>aconnector->i2c = i2c;
>res = i2c_add_adapter(>base);
> -
>if (res) {
>DRM_ERROR("Failed to register hw i2c %d\n", link->link_index);
> - goto out_free;
> + goto fail_free;
>}
>
>connector_type = to_drm_connector_type(link->connector_signal);
> @@ -7625,8 +7624,7 @@ static int amdgpu_dm_connector_init(struct
> amdgpu_display_manager *dm,
>
>if (res) {
>DRM_ERROR("connector_init failed\n");
> - aconnector->connector_id = -1;
> - goto out_free;
> + goto fail_id;
>}
>
>drm_connector_helper_add(
> @@ -7643,15 +7641,22 @@ static int amdgpu_dm_connector_init(struct
> amdgpu_display_manager *dm,
>drm_connector_attach_encoder(
>>base, >base);
>
> - if (connector_type == DRM_MODE_CONNECTOR_DisplayPort
> - || connector_type == DRM_MODE_CONNECTOR_eDP)
> - amdgpu_dm_initialize_dp_connector(dm, aconnector,
> link->link_index);
> -
> -out_free:
> - if (res) {
> - kfree(i2c);
> - aconnector->i2c = NULL;
> + if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
> + connector_type == DRM_MODE_CONNECTOR_eDP) {
> + res = amdgpu_dm_initialize_dp_connector(dm, aconnector,
> link->link_index);
> + if (res)
> + goto fail_cleanup;
>}
> +
> + return 0;
> +fail_cleanup:
> + drm_connector_cleanup(>base);
> +fail_id:
> + aconnector->connector_id = -1;
> +fail_free:
> + kfree(i2c);
> + aconnector->i2c = NULL;
> +
>return res;
> }
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 73cdb9fe981a..3dee9cce9c9e 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@ -425,33 +425,39 @@ static const struct drm_dp_mst_topology_cbs dm_mst_cbs
> = {
>.add_connector = dm_dp_add_mst_connector,
> };
>
> -void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
> -struct amdgpu_dm_connector *aconnector,
> -int link_index)
> +int amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
> + struct amdgpu_dm_connector *aconnector,
> + int link_index)
> {
> - aconnector->dm_dp_aux.aux.name =
> - kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d",
> - link_index);
> - aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
> -
Re: [Intel-gfx] [PATCH v2 1/1] drm/i915/dg1: Add HWMON power sensor support
On Tue, 13 Apr 2021, Dale B Stimson wrote:
> As part of the System Managemenent Interface (SMI), use the HWMON
> subsystem to display power utilization.
>
> The following standard HWMON power sensors are currently supported
> (and appropriately scaled):
> /sys/class/drm/card0/device/hwmon/hwmon
> - energy1_input
> - power1_cap
> - power1_max
>
> Some non-standard HWMON power information is also provided, such as
> enable bits and intervals.
>
> Signed-off-by: Dale B Stimson
> ---
> drivers/gpu/drm/i915/Kconfig | 1 +
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/i915_drv.c | 9 +
> drivers/gpu/drm/i915/i915_drv.h | 3 +
> drivers/gpu/drm/i915/i915_hwmon.c | 788 ++
> drivers/gpu/drm/i915/i915_hwmon.h | 41 ++
> drivers/gpu/drm/i915/i915_reg.h | 53 ++
> 7 files changed, 896 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/i915_hwmon.c
> create mode 100644 drivers/gpu/drm/i915/i915_hwmon.h
>
> diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
> index 1e1cb245fca77..ec8d5a0d7ea96 100644
> --- a/drivers/gpu/drm/i915/Kconfig
> +++ b/drivers/gpu/drm/i915/Kconfig
> @@ -14,6 +14,7 @@ config DRM_I915
> select DRM_MIPI_DSI
> select RELAY
> select IRQ_WORK
> + select HWMON
> # i915 depends on ACPI_VIDEO when ACPI is enabled
> # but for select to work, need to select ACPI_VIDEO's dependencies, ick
> select BACKLIGHT_CLASS_DEVICE if ACPI
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index d0d936d9137bc..e213e2b129e20 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -37,6 +37,7 @@ i915-y += i915_drv.o \
> i915_config.o \
> i915_irq.o \
> i915_getparam.o \
> + i915_hwmon.o \
> i915_mitigations.o \
> i915_params.o \
> i915_pci.o \
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 305557e1942aa..84c7de3b34c7d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -69,6 +69,7 @@
>
> #include "i915_debugfs.h"
> #include "i915_drv.h"
> +#include "i915_hwmon.h"
> #include "i915_ioc32.h"
> #include "i915_irq.h"
> #include "i915_memcpy.h"
> @@ -675,6 +676,10 @@ static void i915_driver_register(struct drm_i915_private
> *dev_priv)
> i915_debugfs_register(dev_priv);
> i915_setup_sysfs(dev_priv);
>
> + /* Register with hwmon */
> + if (i915_hwmon_init(_priv->drm))
Please pass in i915, not struct drm_device.
This is i915_driver_register. Almost all functions being have _register
in them. Why not this one?
> + drm_err(_priv->drm, "Failed to register driver hwmon!\n");
Not sure we want this error message at this level.
> +
> /* Depends on sysfs having been initialized */
> i915_perf_register(dev_priv);
>
> @@ -709,9 +714,13 @@ static void i915_driver_unregister(struct
> drm_i915_private *dev_priv)
> intel_gt_driver_unregister(_priv->gt);
>
> i915_perf_unregister(dev_priv);
> +
> + i915_hwmon_fini(_priv->drm);
> +
Naming, again _unregister in most places.
> i915_pmu_unregister(dev_priv);
>
> i915_teardown_sysfs(dev_priv);
> +
Stray newline.
> drm_dev_unplug(_priv->drm);
>
> i915_gem_driver_unregister(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 69e43bf91a153..7e9b452c77e2b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -61,6 +61,7 @@
> #include
> #include
>
> +#include "i915_hwmon.h"
> #include "i915_params.h"
> #include "i915_reg.h"
> #include "i915_utils.h"
> @@ -1109,6 +1110,8 @@ struct drm_i915_private {
>
> struct i915_perf perf;
>
> + struct i915_hwmon hwmon;
> +
> /* Abstract the submission mechanism (legacy ringbuffer or execlists)
> away */
> struct intel_gt gt;
>
> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c
> b/drivers/gpu/drm/i915/i915_hwmon.c
> new file mode 100644
> index 0..ab8f32f7ed1de
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c
> @@ -0,0 +1,788 @@
> +// SPDX-License-Identifier: MIT
> +
Superfluous newline.
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +/*
> + * Power-related hwmon entries.
> + */
> +
> +#include
> +#include
> +#include
> +
> +#include "i915_drv.h"
> +#include "gt/intel_gt.h"
> +#include "i915_hwmon.h"
> +
> +/*
> + * SF_* - scale factors for particular quantities.
> + * The hwmon standard says that quantities of the given types are specified
> + * in the given units:
> + * - time - milliseconds
> + * - power - microwatts
> + * - energy - microjoules
> + */
> +
> +#define SF_TIME 1000
> +#define SF_POWER 100
> +#define SF_ENERGY100
> +
> +static void
> +_locked_with_pm_intel_uncore_rmw(struct intel_uncore *uncore,
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix docbook descriptions for i915_cmd_parser
== Series Details == Series: drm/i915: Fix docbook descriptions for i915_cmd_parser URL : https://patchwork.freedesktop.org/series/89295/ State : warning == Summary == $ dim checkpatch origin/drm-tip 13583b18a02b drm/i915: Fix docbook descriptions for i915_cmd_parser -:25: WARNING:LONG_LINE_COMMENT: line length of 108 exceeds 100 columns #25: FILE: drivers/gpu/drm/i915/i915_cmd_parser.c:1373: + * intel_engine_cmd_parser_alloc_jump_whitelist() - preallocate jump whitelist for intel_engine_cmd_parser() total: 0 errors, 1 warnings, 0 checks, 28 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/dmc: Let's abstract the dmc path.
On Wed, Apr 21, 2021 at 03:18:17PM +0300, Jani Nikula wrote: On Wed, 21 Apr 2021, Rodrigo Vivi wrote: Although this abstraction removes the convenience of grepping for the file name, it: - makes addition easier. - makes it easier to tweak global path when experiments are needed. - get in sync with guc/huc, without getting overly abstracted. - allows future junction with CSR_VERSION for simplicity. - Enforces dmc file will never change this standard. v2: define DMC_PATH inside .c (Lucas) Cc: Fei Yang Cc: Jani Nikula Cc: Lucas De Marchi Signed-off-by: Rodrigo Vivi Reviewed-by: José Roberto de Souza #v1 Nice, Reviewed-by: Jani Nikula On a related note, should we finally consider a s/csr/dmc/g rename all over the place? It's just confusing to keep using two names. +1 But maybe we need a comment about dmc vs csr use, because spec uses both. Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_csr.c | 26 +++- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c index 26a3c6787e9e..26a922d34263 100644 --- a/drivers/gpu/drm/i915/display/intel_csr.c +++ b/drivers/gpu/drm/i915/display/intel_csr.c @@ -38,50 +38,56 @@ * low-power state and comes back to normal. */ +#define DMC_PATH(platform, major, minor) \ + "i915/"\ + __stringify(platform) "_dmc_ver" \ + __stringify(major) "_" \ + __stringify(minor) ".bin" + #define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE -#define ADLS_CSR_PATH "i915/adls_dmc_ver2_01.bin" +#define ADLS_CSR_PATH DMC_PATH(adls, 2, 01) #define ADLS_CSR_VERSION_REQUIRED CSR_VERSION(2, 1) MODULE_FIRMWARE(ADLS_CSR_PATH); -#define DG1_CSR_PATH "i915/dg1_dmc_ver2_02.bin" +#define DG1_CSR_PATH DMC_PATH(dg1, 2, 02) #define DG1_CSR_VERSION_REQUIRED CSR_VERSION(2, 2) MODULE_FIRMWARE(DG1_CSR_PATH); -#define RKL_CSR_PATH "i915/rkl_dmc_ver2_02.bin" +#define RKL_CSR_PATH DMC_PATH(rkl, 2, 02) #define RKL_CSR_VERSION_REQUIRED CSR_VERSION(2, 2) MODULE_FIRMWARE(RKL_CSR_PATH); -#define TGL_CSR_PATH "i915/tgl_dmc_ver2_08.bin" +#define TGL_CSR_PATH DMC_PATH(tgl, 2, 08) #define TGL_CSR_VERSION_REQUIRED CSR_VERSION(2, 8) MODULE_FIRMWARE(TGL_CSR_PATH); -#define ICL_CSR_PATH "i915/icl_dmc_ver1_09.bin" +#define ICL_CSR_PATH DMC_PATH(icl, 1, 09) #define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 9) #define ICL_CSR_MAX_FW_SIZE0x6000 MODULE_FIRMWARE(ICL_CSR_PATH); -#define CNL_CSR_PATH "i915/cnl_dmc_ver1_07.bin" +#define CNL_CSR_PATH DMC_PATH(cnl, 1, 07) #define CNL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) #define CNL_CSR_MAX_FW_SIZEGLK_CSR_MAX_FW_SIZE MODULE_FIRMWARE(CNL_CSR_PATH); -#define GLK_CSR_PATH "i915/glk_dmc_ver1_04.bin" +#define GLK_CSR_PATH DMC_PATH(glk, 1, 04) #define GLK_CSR_VERSION_REQUIRED CSR_VERSION(1, 4) #define GLK_CSR_MAX_FW_SIZE0x4000 MODULE_FIRMWARE(GLK_CSR_PATH); -#define KBL_CSR_PATH "i915/kbl_dmc_ver1_04.bin" +#define KBL_CSR_PATH DMC_PATH(kbl, 1, 04) #define KBL_CSR_VERSION_REQUIRED CSR_VERSION(1, 4) #define KBL_CSR_MAX_FW_SIZEBXT_CSR_MAX_FW_SIZE MODULE_FIRMWARE(KBL_CSR_PATH); -#define SKL_CSR_PATH "i915/skl_dmc_ver1_27.bin" +#define SKL_CSR_PATH DMC_PATH(skl, 1, 27) #define SKL_CSR_VERSION_REQUIRED CSR_VERSION(1, 27) #define SKL_CSR_MAX_FW_SIZEBXT_CSR_MAX_FW_SIZE MODULE_FIRMWARE(SKL_CSR_PATH); -#define BXT_CSR_PATH "i915/bxt_dmc_ver1_07.bin" +#define BXT_CSR_PATH DMC_PATH(bxt, 1, 07) #define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) #define BXT_CSR_MAX_FW_SIZE0x3000 MODULE_FIRMWARE(BXT_CSR_PATH); -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/dmc: Let's abstract the dmc path.
On Wed, Apr 21, 2021 at 05:44:06AM -0400, Rodrigo Vivi wrote: Although this abstraction removes the convenience of grepping for the file name, it: - makes addition easier. - makes it easier to tweak global path when experiments are needed. - get in sync with guc/huc, without getting overly abstracted. - allows future junction with CSR_VERSION for simplicity. - Enforces dmc file will never change this standard. v2: define DMC_PATH inside .c (Lucas) Cc: Fei Yang Cc: Jani Nikula Cc: Lucas De Marchi Signed-off-by: Rodrigo Vivi Reviewed-by: José Roberto de Souza #v1 Reviewed-by: Lucas De Marchi Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_csr.c | 26 +++- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c index 26a3c6787e9e..26a922d34263 100644 --- a/drivers/gpu/drm/i915/display/intel_csr.c +++ b/drivers/gpu/drm/i915/display/intel_csr.c @@ -38,50 +38,56 @@ * low-power state and comes back to normal. */ +#define DMC_PATH(platform, major, minor) \ + "i915/"\ + __stringify(platform) "_dmc_ver" \ + __stringify(major) "_" \ + __stringify(minor) ".bin" + #define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE -#define ADLS_CSR_PATH "i915/adls_dmc_ver2_01.bin" +#define ADLS_CSR_PATH DMC_PATH(adls, 2, 01) #define ADLS_CSR_VERSION_REQUIRED CSR_VERSION(2, 1) MODULE_FIRMWARE(ADLS_CSR_PATH); -#define DG1_CSR_PATH "i915/dg1_dmc_ver2_02.bin" +#define DG1_CSR_PATH DMC_PATH(dg1, 2, 02) #define DG1_CSR_VERSION_REQUIREDCSR_VERSION(2, 2) MODULE_FIRMWARE(DG1_CSR_PATH); -#define RKL_CSR_PATH "i915/rkl_dmc_ver2_02.bin" +#define RKL_CSR_PATH DMC_PATH(rkl, 2, 02) #define RKL_CSR_VERSION_REQUIREDCSR_VERSION(2, 2) MODULE_FIRMWARE(RKL_CSR_PATH); -#define TGL_CSR_PATH "i915/tgl_dmc_ver2_08.bin" +#define TGL_CSR_PATH DMC_PATH(tgl, 2, 08) #define TGL_CSR_VERSION_REQUIREDCSR_VERSION(2, 8) MODULE_FIRMWARE(TGL_CSR_PATH); -#define ICL_CSR_PATH "i915/icl_dmc_ver1_09.bin" +#define ICL_CSR_PATH DMC_PATH(icl, 1, 09) #define ICL_CSR_VERSION_REQUIREDCSR_VERSION(1, 9) #define ICL_CSR_MAX_FW_SIZE 0x6000 MODULE_FIRMWARE(ICL_CSR_PATH); -#define CNL_CSR_PATH "i915/cnl_dmc_ver1_07.bin" +#define CNL_CSR_PATH DMC_PATH(cnl, 1, 07) #define CNL_CSR_VERSION_REQUIREDCSR_VERSION(1, 7) #define CNL_CSR_MAX_FW_SIZE GLK_CSR_MAX_FW_SIZE MODULE_FIRMWARE(CNL_CSR_PATH); -#define GLK_CSR_PATH "i915/glk_dmc_ver1_04.bin" +#define GLK_CSR_PATH DMC_PATH(glk, 1, 04) #define GLK_CSR_VERSION_REQUIREDCSR_VERSION(1, 4) #define GLK_CSR_MAX_FW_SIZE 0x4000 MODULE_FIRMWARE(GLK_CSR_PATH); -#define KBL_CSR_PATH "i915/kbl_dmc_ver1_04.bin" +#define KBL_CSR_PATH DMC_PATH(kbl, 1, 04) #define KBL_CSR_VERSION_REQUIREDCSR_VERSION(1, 4) #define KBL_CSR_MAX_FW_SIZE BXT_CSR_MAX_FW_SIZE MODULE_FIRMWARE(KBL_CSR_PATH); -#define SKL_CSR_PATH "i915/skl_dmc_ver1_27.bin" +#define SKL_CSR_PATH DMC_PATH(skl, 1, 27) #define SKL_CSR_VERSION_REQUIREDCSR_VERSION(1, 27) #define SKL_CSR_MAX_FW_SIZE BXT_CSR_MAX_FW_SIZE MODULE_FIRMWARE(SKL_CSR_PATH); -#define BXT_CSR_PATH "i915/bxt_dmc_ver1_07.bin" +#define BXT_CSR_PATH DMC_PATH(bxt, 1, 07) #define BXT_CSR_VERSION_REQUIREDCSR_VERSION(1, 7) #define BXT_CSR_MAX_FW_SIZE 0x3000 MODULE_FIRMWARE(BXT_CSR_PATH); -- 2.30.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory
== Series Details == Series: series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory URL : https://patchwork.freedesktop.org/series/89293/ State : success == Summary == CI Bug Log - changes from CI_DRM_9993 -> Patchwork_19960 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/index.html Known issues Here are the changes found in Patchwork_19960 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_cs_nop@sync-fork-compute0: - fi-snb-2600:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html Possible fixes * igt@i915_selftest@live@hangcheck: - fi-snb-2600:[INCOMPLETE][2] ([i915#2782]) -> [PASS][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html * igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size: - fi-kbl-soraka: [FAIL][4] ([i915#2346]) -> [PASS][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9993/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/fi-kbl-soraka/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782 Participating hosts (42 -> 39) -- Missing(3): fi-icl-y fi-bsw-cyan fi-bdw-samus Build changes - * Linux: CI_DRM_9993 -> Patchwork_19960 CI-20190529: 20190529 CI_DRM_9993: 629d3809e6d926c77ba5e9c5405e64eeba564560 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19960: 8615844dae0492aa9a0b962fa72e0cb2fc555bc8 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 8615844dae04 drm/i915/stolen: actually mark as contiguous 3e9bbf037619 drm/i915/stolen: enforce the min_page_size contract 3dc8d4f8d134 drm/i915/stolen: treat stolen local as normal local memory bb6cb02052af drm/i915: Create stolen memory region from local memory == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19960/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix docbook descriptions for i915_cmd_parser
Op 21-04-2021 om 16:32 schreef Daniel Vetter:
> On Wed, Apr 21, 2021 at 2:03 PM Maarten Lankhorst
> wrote:
>> Fixes the following htmldocs warnings:
>> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function
>> parameter 'trampoline' description in 'intel_engine_cmd_parser'
>> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or
>> member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
>> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or
>> member 'shadow_map' not described in 'intel_engine_cmd_parser'
>> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or
>> member 'batch_map' not described in 'intel_engine_cmd_parser'
>> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function
>> parameter 'trampoline' description in 'intel_engine_cmd_parser'
>>
>> Reported-by: Stephen Rothwell
>> Signed-off-by: Maarten Lankhorst
>> ---
>> drivers/gpu/drm/i915/i915_cmd_parser.c | 16 +++-
>> 1 file changed, 15 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c
>> b/drivers/gpu/drm/i915/i915_cmd_parser.c
>> index e6f1e93a..afb9b7516999 100644
>> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
>> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
>> @@ -1369,6 +1369,18 @@ static int check_bbstart(u32 *cmd, u32 offset, u32
>> length,
>> return 0;
>> }
>>
>> +/**
>> + * intel_engine_cmd_parser_alloc_jump_whitelist() - preallocate jump
>> whitelist for intel_engine_cmd_parser()
>> + * @batch_length: length of the commands in batch_obj
>> + * @trampoline: Whether jump trampolines are used.
>> + *
>> + * Preallocates a jump whitelist for parsing the cmd buffer in
>> intel_engine_cmd_parser().
>> + * This has to be preallocated, because the command parser runs in
>> signaling context,
>> + * and may not allocate any memory.
>> + *
>> + * Return: NULL or pointer to a jump whitelist, or ERR_PTR() on failure. Use
>> + * IS_ERR() to check for errors. Must bre freed() with kfree().
> IS_ERR_OR_NULL or needs an actual bugfix in the code since we're not
> consistent. Also s/bre/be/
We're sort of consistent, NULL is a valid return code. IS_ERR is only on
faliure. :)
> -Daniel
>
>> + */
>> unsigned long *intel_engine_cmd_parser_alloc_jump_whitelist(u32
>> batch_length,
>> bool trampoline)
>> {
>> @@ -1401,7 +1413,9 @@ unsigned long
>> *intel_engine_cmd_parser_alloc_jump_whitelist(u32 batch_length,
>> * @batch_offset: byte offset in the batch at which execution starts
>> * @batch_length: length of the commands in batch_obj
>> * @shadow: validated copy of the batch buffer in question
>> - * @trampoline: whether to emit a conditional trampoline at the end of the
>> batch
>> + * @jump_whitelist: buffer preallocated with
>> intel_engine_cmd_parser_alloc_jump_whitelist()
>> + * @shadow_map: mapping to @shadow vma
>> + * @batch_map: mapping to @batch vma
>> *
>> * Parses the specified batch buffer looking for privilege violations as
>> * described in the overview.
>> --
>> 2.31.0
>>
>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 1/4] drm/i915: Create stolen memory region from local memory
On 21/04/2021 11:46, Matthew Auld wrote:
From: CQ Tang
Add "REGION_STOLEN" device info to dg1, create stolen memory
region from upper portion of local device memory, starting
from DSMBASE.
v2:
- s/drm_info/drm_dbg; userspace likely doesn't care about stolen.
- mem->type is only setup after the region probe, so setting the name
as stolen-local or stolen-system based on this value won't work. Split
system vs local stolen setup to fix this.
- kill all the region->devmem/is_devmem stuff. We already differentiate
the different types of stolen so such things shouldn't be needed
anymore.
v3:
- split stolen lmem vs smem ops(Tvrtko)
- add shortcut for stolen region in i915(Tvrtko)
- sanity check dsm base vs bar size(Xinyun)
v4(Tvrtko):
- more cleanup
- add some TODOs
Signed-off-by: CQ Tang
Signed-off-by: Matthew Auld
Cc: Tvrtko Ursulin
Cc: Xinyun Liu
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 132 ++---
drivers/gpu/drm/i915/gem/i915_gem_stolen.h | 3 +-
drivers/gpu/drm/i915/i915_drv.h| 7 ++
drivers/gpu/drm/i915/i915_pci.c| 2 +-
drivers/gpu/drm/i915/i915_reg.h| 1 +
drivers/gpu/drm/i915/intel_memory_region.c | 13 +-
drivers/gpu/drm/i915/intel_memory_region.h | 5 +-
7 files changed, 140 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index b0597de206de..13a7932cfe1a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -10,6 +10,7 @@
#include
#include
+#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_region.h"
#include "i915_drv.h"
#include "i915_gem_stolen.h"
@@ -121,6 +122,14 @@ static int i915_adjust_stolen(struct drm_i915_private
*i915,
}
}
+ /*
+* With stolen lmem, we don't need to check if the address range
+* overlaps with the non-stolen system memory range, since lmem is local
+* to the gpu.
+*/
+ if (HAS_LMEM(i915))
+ return 0;
+
/*
* Verify that nothing else uses this physical address. Stolen
* memory should be reserved by the BIOS and hidden from the
@@ -374,8 +383,9 @@ static void icl_get_stolen_reserved(struct drm_i915_private
*i915,
}
}
-static int i915_gem_init_stolen(struct drm_i915_private *i915)
+static int i915_gem_init_stolen(struct intel_memory_region *mem)
{
+ struct drm_i915_private *i915 = mem->i915;
struct intel_uncore *uncore = >uncore;
resource_size_t reserved_base, stolen_top;
resource_size_t reserved_total, reserved_size;
@@ -396,10 +406,10 @@ static int i915_gem_init_stolen(struct drm_i915_private
*i915)
return 0;
}
- if (resource_size(_graphics_stolen_res) == 0)
+ if (resource_size(>region) == 0)
return 0;
- i915->dsm = intel_graphics_stolen_res;
+ i915->dsm = mem->region;
if (i915_adjust_stolen(i915, >dsm))
return 0;
@@ -688,39 +698,123 @@ struct drm_i915_gem_object *
i915_gem_object_create_stolen(struct drm_i915_private *i915,
resource_size_t size)
{
- return
i915_gem_object_create_region(i915->mm.regions[INTEL_REGION_STOLEN_SMEM],
+ return i915_gem_object_create_region(i915->mm.stolen_region,
size, I915_BO_ALLOC_CONTIGUOUS);
}
-static int init_stolen(struct intel_memory_region *mem)
+static int init_stolen_smem(struct intel_memory_region *mem)
{
- intel_memory_region_set_name(mem, "stolen");
-
/*
* Initialise stolen early so that we may reserve preallocated
* objects for the BIOS to KMS transition.
*/
- return i915_gem_init_stolen(mem->i915);
+ return i915_gem_init_stolen(mem);
}
-static void release_stolen(struct intel_memory_region *mem)
+static void release_stolen_smem(struct intel_memory_region *mem)
{
i915_gem_cleanup_stolen(mem->i915);
}
-static const struct intel_memory_region_ops i915_region_stolen_ops = {
- .init = init_stolen,
- .release = release_stolen,
+static const struct intel_memory_region_ops i915_region_stolen_smem_ops = {
+ .init = init_stolen_smem,
+ .release = release_stolen_smem,
.init_object = _i915_gem_object_stolen_init,
};
-struct intel_memory_region *i915_gem_stolen_setup(struct drm_i915_private *i915)
+static int init_stolen_lmem(struct intel_memory_region *mem)
+{
+ int err;
+
+ if (GEM_WARN_ON(resource_size(>region) == 0))
+ return -ENODEV;
+
+ if (!io_mapping_init_wc(>iomap,
+ mem->io_start,
+ resource_size(>region)))
+ return -EIO;
+
+ /*
+* TODO: For stolen lmem we mostly
[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory
== Series Details == Series: series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory URL : https://patchwork.freedesktop.org/series/89293/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix docbook descriptions for i915_gem_shrinker
On Wed, Apr 21, 2021 at 2:09 PM Maarten Lankhorst
wrote:
>
> Fixes the following htmldocs warning:
> drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter
> or member 'ww' not described in 'i915_gem_shrink'
>
> Fixes: cf41a8f1dc1e ("drm/i915: Finally remove obj->mm.lock.")
> Reported-by: Stephen Rothwell
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> index 7545ddd83659..f4fb68e8955a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> @@ -72,6 +72,7 @@ static void try_to_writeback(struct drm_i915_gem_object
> *obj,
>
> /**
> * i915_gem_shrink - Shrink buffer object caches
> + * @ww: i915 gem ww acquire ctx, or NULL
> * @i915: i915 device
> * @target: amount of memory to make available, in pages
> * @nr_scanned: optional output for number of pages scanned (incremental)
> --
> 2.31.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix docbook descriptions for i915_cmd_parser
On Wed, Apr 21, 2021 at 2:03 PM Maarten Lankhorst
wrote:
>
> Fixes the following htmldocs warnings:
> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function
> parameter 'trampoline' description in 'intel_engine_cmd_parser'
> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or
> member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or
> member 'shadow_map' not described in 'intel_engine_cmd_parser'
> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or
> member 'batch_map' not described in 'intel_engine_cmd_parser'
> drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function
> parameter 'trampoline' description in 'intel_engine_cmd_parser'
>
> Reported-by: Stephen Rothwell
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 16 +++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c
> b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index e6f1e93a..afb9b7516999 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -1369,6 +1369,18 @@ static int check_bbstart(u32 *cmd, u32 offset, u32
> length,
> return 0;
> }
>
> +/**
> + * intel_engine_cmd_parser_alloc_jump_whitelist() - preallocate jump
> whitelist for intel_engine_cmd_parser()
> + * @batch_length: length of the commands in batch_obj
> + * @trampoline: Whether jump trampolines are used.
> + *
> + * Preallocates a jump whitelist for parsing the cmd buffer in
> intel_engine_cmd_parser().
> + * This has to be preallocated, because the command parser runs in signaling
> context,
> + * and may not allocate any memory.
> + *
> + * Return: NULL or pointer to a jump whitelist, or ERR_PTR() on failure. Use
> + * IS_ERR() to check for errors. Must bre freed() with kfree().
IS_ERR_OR_NULL or needs an actual bugfix in the code since we're not
consistent. Also s/bre/be/
-Daniel
> + */
> unsigned long *intel_engine_cmd_parser_alloc_jump_whitelist(u32 batch_length,
> bool trampoline)
> {
> @@ -1401,7 +1413,9 @@ unsigned long
> *intel_engine_cmd_parser_alloc_jump_whitelist(u32 batch_length,
> * @batch_offset: byte offset in the batch at which execution starts
> * @batch_length: length of the commands in batch_obj
> * @shadow: validated copy of the batch buffer in question
> - * @trampoline: whether to emit a conditional trampoline at the end of the
> batch
> + * @jump_whitelist: buffer preallocated with
> intel_engine_cmd_parser_alloc_jump_whitelist()
> + * @shadow_map: mapping to @shadow vma
> + * @batch_map: mapping to @batch vma
> *
> * Parses the specified batch buffer looking for privilege violations as
> * described in the overview.
> --
> 2.31.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory
== Series Details == Series: series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory URL : https://patchwork.freedesktop.org/series/89293/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_reset.c:1329:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +drivers/gpu/drm/i915/gt/intel_ring_submission.c:1203:24: warning: Using plain integer as NULL pointer +drivers/gpu/drm/i915/gvt/mmio.c:295:23: warning: memcpy with byte count of 279040 +drivers/gpu/drm/i915/i915_perf.c:1434:15: warning: memset with byte count of 16777216 +drivers/gpu/drm/i915/i915_perf.c:1488:15: warning: memset with byte count of 16777216 +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory
== Series Details == Series: series starting with [v2,1/4] drm/i915: Create stolen memory region from local memory URL : https://patchwork.freedesktop.org/series/89293/ State : warning == Summary == $ dim checkpatch origin/drm-tip bb6cb02052af drm/i915: Create stolen memory region from local memory -:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #13: as stolen-local or stolen-system based on this value won't work. Split total: 0 errors, 1 warnings, 0 checks, 281 lines checked 3dc8d4f8d134 drm/i915/stolen: treat stolen local as normal local memory 3e9bbf037619 drm/i915/stolen: enforce the min_page_size contract 8615844dae04 drm/i915/stolen: actually mark as contiguous ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/stolen: actually mark as contiguous
On 21/04/2021 11:46, Matthew Auld wrote:
Stolen memory is always allocated as physically contiguous pages, so
mark the object flags as such. It looks like the flags were previously
just ignored so this had no effect. In the future we might to add the
proper plumbing for passing the flags all over the way down from the
caller, but for now we don't have a use for that.
Signed-off-by: Matthew Auld
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index b43929da8de8..c5b64b2400e8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -637,10 +637,17 @@ static int __i915_gem_object_create_stolen(struct
intel_memory_region *mem,
{
static struct lock_class_key lock_class;
unsigned int cache_level;
+ unsigned int flags;
int err;
+ /*
+* Stolen objects are always physically contiguous since we just
+* allocate one big block underneath using the drm_mm range allocator.
+*/
+ flags = I915_BO_ALLOC_CONTIGUOUS;
+
drm_gem_private_object_init(>i915->drm, >base, stolen->size);
- i915_gem_object_init(obj, _gem_object_stolen_ops, _class, 0);
+ i915_gem_object_init(obj, _gem_object_stolen_ops, _class,
flags);
obj->stolen = stolen;
obj->read_domains = I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT;
@@ -699,8 +706,7 @@ struct drm_i915_gem_object *
i915_gem_object_create_stolen(struct drm_i915_private *i915,
resource_size_t size)
{
- return i915_gem_object_create_region(i915->mm.stolen_region,
-size, I915_BO_ALLOC_CONTIGUOUS);
+ return i915_gem_object_create_region(i915->mm.stolen_region, size, 0);
}
static int init_stolen_smem(struct intel_memory_region *mem)
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 4/4] drm/doc/rfc: i915 DG1 uAPI
On 21/04/2021 14:54, Jason Ekstrand wrote:
On Wed, Apr 21, 2021 at 3:22 AM Tvrtko Ursulin
wrote:
On 20/04/2021 18:00, Jason Ekstrand wrote:
On Tue, Apr 20, 2021 at 11:34 AM Tvrtko Ursulin
wrote:
On 19/04/2021 16:19, Jason Ekstrand wrote:
On Mon, Apr 19, 2021 at 7:02 AM Matthew Auld wrote:
On 16/04/2021 17:38, Jason Ekstrand wrote:
On Thu, Apr 15, 2021 at 11:04 AM Matthew Auld wrote:
Add an entry for the new uAPI needed for DG1.
v2(Daniel):
- include the overall upstreaming plan
- add a note for mmap, there are differences here for TTM vs i915
- bunch of other suggestions from Daniel
v3:
(Daniel)
- add a note for set/get caching stuff
- add some more docs for existing query and extensions stuff
- add an actual code example for regions query
- bunch of other stuff
(Jason)
- uAPI change(!):
- try a simpler design with the placements extension
- rather than have a generic setparam which can cover multiple
use cases, have each extension be responsible for one thing
only
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Jordan Justen
Cc: Daniel Vetter
Cc: Kenneth Graunke
Cc: Jason Ekstrand
Cc: Dave Airlie
Cc: dri-de...@lists.freedesktop.org
Cc: mesa-...@lists.freedesktop.org
---
Documentation/gpu/rfc/i915_gem_lmem.h | 255
Documentation/gpu/rfc/i915_gem_lmem.rst | 139 +
Documentation/gpu/rfc/index.rst | 4 +
3 files changed, 398 insertions(+)
create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.h
create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.rst
diff --git a/Documentation/gpu/rfc/i915_gem_lmem.h
b/Documentation/gpu/rfc/i915_gem_lmem.h
new file mode 100644
index ..2a82a452e9f2
--- /dev/null
+++ b/Documentation/gpu/rfc/i915_gem_lmem.h
@@ -0,0 +1,255 @@
+/*
+ * Note that drm_i915_query_item and drm_i915_query are existing bits of uAPI.
+ * For the regions query we are just adding a new query id, so no actual new
+ * ioctl or anything, but including it here for reference.
+ */
+struct drm_i915_query_item {
+#define DRM_I915_QUERY_MEMORY_REGIONS 0xdeadbeaf
+
+__u64 query_id;
+
+/*
+ * When set to zero by userspace, this is filled with the size of the
+ * data to be written at the data_ptr pointer. The kernel sets this
+ * value to a negative value to signal an error on a particular query
+ * item.
+ */
+__s32 length;
+
+__u32 flags;
+/*
+ * Data will be written at the location pointed by data_ptr when the
+ * value of length matches the length of the data to be written by the
+ * kernel.
+ */
+__u64 data_ptr;
+};
+
+struct drm_i915_query {
+__u32 num_items;
+/*
+ * Unused for now. Must be cleared to zero.
+ */
+__u32 flags;
+/*
+ * This points to an array of num_items drm_i915_query_item structures.
+ */
+__u64 items_ptr;
+};
+
+#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY,
struct drm_i915_query)
+
+/**
+ * enum drm_i915_gem_memory_class
+ */
+enum drm_i915_gem_memory_class {
+ /** @I915_MEMORY_CLASS_SYSTEM: system memory */
+ I915_MEMORY_CLASS_SYSTEM = 0,
+ /** @I915_MEMORY_CLASS_DEVICE: device local-memory */
+ I915_MEMORY_CLASS_DEVICE,
+};
+
+/**
+ * struct drm_i915_gem_memory_class_instance
+ */
+struct drm_i915_gem_memory_class_instance {
+ /** @memory_class: see enum drm_i915_gem_memory_class */
+ __u16 memory_class;
+
+ /** @memory_instance: which instance */
+ __u16 memory_instance;
+};
+
+/**
+ * struct drm_i915_memory_region_info
+ *
+ * Describes one region as known to the driver.
+ *
+ * Note that we reserve quite a lot of stuff here for potential future work. As
+ * an example we might want expose the capabilities(see caps) for a given
+ * region, which could include things like if the region is CPU
+ * mappable/accessible etc.
I get caps but I'm seriously at a loss as to what the rest of this
would be used for. Why are caps and flags both there and separate?
Flags are typically something you set, not query. Also, what's with
rsvd1 at the end? This smells of substantial over-building to me.
I thought to myself, "maybe I'm missing a future use-case" so I looked
at the internal tree and none of this is being used there either.
This indicates to me that either I'm missing something and there's
code somewhere I don't know about or, with three years of building on
internal branches, we still haven't proven that any of this is needed.
If it's the latter, which I strongly suspect, maybe we should drop the
unnecessary bits and only add them back in if and when we have proof
that they're useful.
Do you mean just drop caps/flags here, but keep/inflate rsvd0/rsvd1,
which is less opinionated
Re: [Intel-gfx] [PATCH 8/8] drm/i915: Pimp the FBC debugfs output
On Wed, 14 Apr 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Now that each pipe tracks its own no_fbc_reason we can print that
> out in debugfs, and we can also show which pipe is currently
> selected for FBC duty.
>
> Signed-off-by: Ville Syrjälä
> ---
> .../drm/i915/display/intel_display_debugfs.c | 50 +--
> 1 file changed, 36 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 183c414d554a..26317e66cb95 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -38,15 +38,36 @@ static int i915_frontbuffer_tracking(struct seq_file *m,
> void *unused)
> return 0;
> }
>
> +static bool i915_fbc_is_compressing(struct drm_i915_private *dev_priv)
> +{
> + if (!intel_fbc_is_active(dev_priv))
> + return false;
> +
> + if (DISPLAY_VER(dev_priv) >= 8)
> + return intel_de_read(dev_priv, IVB_FBC_STATUS2) &
> BDW_FBC_COMP_SEG_MASK;
> + else if (DISPLAY_VER(dev_priv) >= 7)
> + return intel_de_read(dev_priv, IVB_FBC_STATUS2) &
> IVB_FBC_COMP_SEG_MASK;
> + else if (DISPLAY_VER(dev_priv) >= 5)
> + return intel_de_read(dev_priv, ILK_DPFC_STATUS) &
> ILK_DPFC_COMP_SEG_MASK;
> + else if (IS_G4X(dev_priv))
> + return intel_de_read(dev_priv, DPFC_STATUS) &
> DPFC_COMP_SEG_MASK;
> + else
> + return intel_de_read(dev_priv, FBC_STATUS) &
> + (FBC_STAT_COMPRESSING | FBC_STAT_COMPRESSED);
> +}
I wouldn't mind moving debugfs helpers like this to files by feature,
e.g. intel_fbc.[ch] in this case. This one could just return bool like
here; in some cases I'm starting to think passing struct seq_file * and
having the helper print there would make sense.
BR,
Jani.
> +
> static int i915_fbc_status(struct seq_file *m, void *unused)
> {
> struct drm_i915_private *dev_priv = node_to_i915(m->private);
> struct intel_fbc *fbc = _priv->fbc;
> + struct intel_crtc *crtc;
> intel_wakeref_t wakeref;
>
> if (!HAS_FBC(dev_priv))
> return -ENODEV;
>
> + drm_modeset_lock_all(_priv->drm);
> +
> wakeref = intel_runtime_pm_get(_priv->runtime_pm);
> mutex_lock(>lock);
>
> @@ -55,27 +76,28 @@ static int i915_fbc_status(struct seq_file *m, void
> *unused)
> else
> seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
>
> - if (intel_fbc_is_active(dev_priv)) {
> - u32 mask;
> + seq_printf(m, "Compressing: %s\n",
> yesno(i915_fbc_is_compressing(dev_priv)));
>
> - if (DISPLAY_VER(dev_priv) >= 8)
> - mask = intel_de_read(dev_priv, IVB_FBC_STATUS2) &
> BDW_FBC_COMP_SEG_MASK;
> - else if (DISPLAY_VER(dev_priv) >= 7)
> - mask = intel_de_read(dev_priv, IVB_FBC_STATUS2) &
> IVB_FBC_COMP_SEG_MASK;
> - else if (DISPLAY_VER(dev_priv) >= 5)
> - mask = intel_de_read(dev_priv, ILK_DPFC_STATUS) &
> ILK_DPFC_COMP_SEG_MASK;
> - else if (IS_G4X(dev_priv))
> - mask = intel_de_read(dev_priv, DPFC_STATUS) &
> DPFC_COMP_SEG_MASK;
> - else
> - mask = intel_de_read(dev_priv, FBC_STATUS) &
> - (FBC_STAT_COMPRESSING | FBC_STAT_COMPRESSED);
> + for_each_intel_crtc(_priv->drm, crtc) {
> + struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> + const struct intel_crtc_state *crtc_state =
> + to_intel_crtc_state(crtc->base.state);
>
> - seq_printf(m, "Compressing: %s\n", yesno(mask));
> + if (!plane->has_fbc)
> + continue;
> +
> + seq_printf(m, "%c [CRTC:%d:%s]/[PLANE:%d:%s]: %s\n",
> +fbc->crtc == crtc ? '*' : ' ',
> +crtc->base.base.id, crtc->base.name,
> +plane->base.base.id, plane->base.name,
> +crtc_state->no_fbc_reason ?: "FBC possible");
> }
>
> mutex_unlock(>lock);
> intel_runtime_pm_put(_priv->runtime_pm, wakeref);
>
> + drm_modeset_unlock_all(_priv->drm);
> +
> return 0;
> }
--
Jani Nikula, Intel Open Source Graphics Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 4/4] drm/doc/rfc: i915 DG1 uAPI
On Wed, Apr 21, 2021 at 3:22 AM Tvrtko Ursulin
wrote:
>
> On 20/04/2021 18:00, Jason Ekstrand wrote:
> > On Tue, Apr 20, 2021 at 11:34 AM Tvrtko Ursulin
> > wrote:
> >>
> >>
> >> On 19/04/2021 16:19, Jason Ekstrand wrote:
> >>> On Mon, Apr 19, 2021 at 7:02 AM Matthew Auld
> >>> wrote:
>
> On 16/04/2021 17:38, Jason Ekstrand wrote:
> > On Thu, Apr 15, 2021 at 11:04 AM Matthew Auld
> > wrote:
> >>
> >> Add an entry for the new uAPI needed for DG1.
> >>
> >> v2(Daniel):
> >> - include the overall upstreaming plan
> >> - add a note for mmap, there are differences here for TTM vs i915
> >> - bunch of other suggestions from Daniel
> >> v3:
> >> (Daniel)
> >> - add a note for set/get caching stuff
> >> - add some more docs for existing query and extensions stuff
> >> - add an actual code example for regions query
> >> - bunch of other stuff
> >> (Jason)
> >> - uAPI change(!):
> >>- try a simpler design with the placements extension
> >>- rather than have a generic setparam which can cover
> >> multiple
> >> use cases, have each extension be responsible for one
> >> thing
> >> only
> >>
> >> Signed-off-by: Matthew Auld
> >> Cc: Joonas Lahtinen
> >> Cc: Jordan Justen
> >> Cc: Daniel Vetter
> >> Cc: Kenneth Graunke
> >> Cc: Jason Ekstrand
> >> Cc: Dave Airlie
> >> Cc: dri-de...@lists.freedesktop.org
> >> Cc: mesa-...@lists.freedesktop.org
> >> ---
> >> Documentation/gpu/rfc/i915_gem_lmem.h | 255
> >>
> >> Documentation/gpu/rfc/i915_gem_lmem.rst | 139 +
> >> Documentation/gpu/rfc/index.rst | 4 +
> >> 3 files changed, 398 insertions(+)
> >> create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.h
> >> create mode 100644 Documentation/gpu/rfc/i915_gem_lmem.rst
> >>
> >> diff --git a/Documentation/gpu/rfc/i915_gem_lmem.h
> >> b/Documentation/gpu/rfc/i915_gem_lmem.h
> >> new file mode 100644
> >> index ..2a82a452e9f2
> >> --- /dev/null
> >> +++ b/Documentation/gpu/rfc/i915_gem_lmem.h
> >> @@ -0,0 +1,255 @@
> >> +/*
> >> + * Note that drm_i915_query_item and drm_i915_query are existing bits
> >> of uAPI.
> >> + * For the regions query we are just adding a new query id, so no
> >> actual new
> >> + * ioctl or anything, but including it here for reference.
> >> + */
> >> +struct drm_i915_query_item {
> >> +#define DRM_I915_QUERY_MEMORY_REGIONS 0xdeadbeaf
> >> +
> >> +__u64 query_id;
> >> +
> >> +/*
> >> + * When set to zero by userspace, this is filled with the
> >> size of the
> >> + * data to be written at the data_ptr pointer. The kernel
> >> sets this
> >> + * value to a negative value to signal an error on a
> >> particular query
> >> + * item.
> >> + */
> >> +__s32 length;
> >> +
> >> +__u32 flags;
> >> +/*
> >> + * Data will be written at the location pointed by data_ptr
> >> when the
> >> + * value of length matches the length of the data to be
> >> written by the
> >> + * kernel.
> >> + */
> >> +__u64 data_ptr;
> >> +};
> >> +
> >> +struct drm_i915_query {
> >> +__u32 num_items;
> >> +/*
> >> + * Unused for now. Must be cleared to zero.
> >> + */
> >> +__u32 flags;
> >> +/*
> >> + * This points to an array of num_items drm_i915_query_item
> >> structures.
> >> + */
> >> +__u64 items_ptr;
> >> +};
> >> +
> >> +#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE +
> >> DRM_I915_QUERY, struct drm_i915_query)
> >> +
> >> +/**
> >> + * enum drm_i915_gem_memory_class
> >> + */
> >> +enum drm_i915_gem_memory_class {
> >> + /** @I915_MEMORY_CLASS_SYSTEM: system memory */
> >> + I915_MEMORY_CLASS_SYSTEM = 0,
> >> + /** @I915_MEMORY_CLASS_DEVICE: device local-memory */
> >> + I915_MEMORY_CLASS_DEVICE,
> >> +};
> >> +
> >> +/**
> >> + * struct drm_i915_gem_memory_class_instance
> >> + */
> >> +struct drm_i915_gem_memory_class_instance {
> >> + /** @memory_class: see enum drm_i915_gem_memory_class */
> >> + __u16 memory_class;
> >> +
> >> + /** @memory_instance: which instance */
> >> + __u16 memory_instance;
> >> +};
> >> +
> >> +/**
> >> + * struct drm_i915_memory_region_info
> >> + *
> >> + * Describes one region as known to the driver.
> >> + *
> >> + * Note
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dmc: Let's abstract the dmc path. (rev2)
== Series Details == Series: drm/i915/dmc: Let's abstract the dmc path. (rev2) URL : https://patchwork.freedesktop.org/series/89275/ State : success == Summary == CI Bug Log - changes from CI_DRM_9992 -> Patchwork_19959 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/index.html Known issues Here are the changes found in Patchwork_19959 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@semaphore: - fi-bdw-5557u: NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html * igt@core_hotunplug@unbind-rebind: - fi-bdw-5557u: NOTRUN -> [WARN][2] ([i915#2283]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/fi-bdw-5557u/igt@core_hotunp...@unbind-rebind.html * igt@gem_exec_suspend@basic-s3: - fi-tgl-u2: [PASS][3] -> [FAIL][4] ([i915#1888]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9992/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html * igt@kms_chamelium@dp-crc-fast: - fi-bdw-5557u: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827]) +8 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283 Participating hosts (41 -> 40) -- Additional (1): fi-bdw-5557u Missing(2): fi-bsw-cyan fi-bdw-samus Build changes - * Linux: CI_DRM_9992 -> Patchwork_19959 CI-20190529: 20190529 CI_DRM_9992: cd804a7f03a97c3f808e696bcf04d7338f3fc27d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19959: b7bbe304556d184a22b83370ae9d2ced6a0b4efc @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == b7bbe304556d drm/i915/dmc: Let's abstract the dmc path. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19959/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 4/8] drm/i915: Clear no_fbc_reason on activate
On Wed, 14 Apr 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We try to set no_fbc_reason when FBC is not possible, let's
> consistently clear when activating FBC.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 13 -
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 4968e79a6235..fb8c0872a2b7 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -411,6 +411,17 @@ bool intel_fbc_is_active(struct drm_i915_private
> *dev_priv)
> return dev_priv->fbc.active;
> }
>
> +static void intel_fbc_activate(struct drm_i915_private *dev_priv)
> +{
> + struct intel_fbc *fbc = _priv->fbc;
> +
> + drm_WARN_ON(_priv->drm, !mutex_is_locked(>lock));
> +
> + intel_fbc_hw_activate(dev_priv);
> +
> + fbc->no_fbc_reason = NULL;
> +}
> +
> static void intel_fbc_deactivate(struct drm_i915_private *dev_priv,
>const char *reason)
> {
> @@ -1094,7 +1105,7 @@ static void __intel_fbc_post_update(struct intel_crtc
> *crtc)
> return;
>
> if (!fbc->busy_bits)
> - intel_fbc_hw_activate(dev_priv);
> + intel_fbc_activate(dev_priv);
> else
> intel_fbc_deactivate(dev_priv, "frontbuffer write");
> }
--
Jani Nikula, Intel Open Source Graphics Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC PATCH] drm/i915: Simplify userptr locking
On Mon, Apr 12, 2021 at 7:51 PM Thomas Hellström
wrote:
>
> Use an rwlock instead of spinlock for the global notifier lock
> to reduce risk of contention in execbuf.
>
> Protect object state with the object lock whenever possible rather
> than with the global notifier lock
>
> Don't take an explicit page_ref in userptr_submit_init() but rather
> call get_pages() after obtaining the page list so that
> get_pages() holds the page_ref. This means we don't need to call
> userptr_submit_fini(), which is needed to avoid awkward locking
> in our upcoming VM_BIND code.
>
> CC'ing a broader audience since userptr handling is something we
> probably want to unify across drivers at some point.
>
> Cc: Maarten Lankhorst
> Cc: Daniel Vetter
> Cc: Dave Airlie
> Cc: dri-de...@lists.freedesktop.org
> Cc: Intel Graphics Development
> Signed-off-by: Thomas Hellström
So I was panicking when I've seen this first because of the RFC and
feared it's the big discussion about which userptr semantics exactly
we should aim for. Which is something we really should nail. But
looking now again it's really that you remove some optional paths, and
the core bit with mmu_interval_read_retry is still there. It's just
mmu_interval_check_retry that goes out.
So no panic from me on this. But ideally I think needs Maarten to
review the details.
Wrt the panic topic, I think there's 3 legit ways to do userptr:
- using pin_user_page with PIN_LONGTERM
- using hmm/mmu_notifier_range, gpu page faults and tlb invalidate,
with no dma_fence and no page refcounts at all
- with mmu_notifier_range and dma_fence, and I think there the big
question is whether we should get some page references. I think it
would be great if we get as close as possible to the case with real
page faults/tlb invalidate, so no page references, since holding
random references.
I think ideally we'd at least document this, ideally with helpers used
by drivers, also I'd like a few more ponies :-)
Cheers, Daniel
> ---
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 21 +++---
> drivers/gpu/drm/i915/gem/i915_gem_object.h| 2 -
> drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 72 ++-
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> 4 files changed, 31 insertions(+), 66 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 5964e67c7d36..d3604ddfa93b 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -994,7 +994,7 @@ eb_get_vma(const struct i915_execbuffer *eb, unsigned
> long handle)
> }
> }
>
> -static void eb_release_vmas(struct i915_execbuffer *eb, bool final, bool
> release_userptr)
> +static void eb_release_vmas(struct i915_execbuffer *eb, bool final)
> {
> const unsigned int count = eb->buffer_count;
> unsigned int i;
> @@ -1008,11 +1008,6 @@ static void eb_release_vmas(struct i915_execbuffer
> *eb, bool final, bool release
>
> eb_unreserve_vma(ev);
>
> - if (release_userptr && ev->flags &
> __EXEC_OBJECT_USERPTR_INIT) {
> - ev->flags &= ~__EXEC_OBJECT_USERPTR_INIT;
> - i915_gem_object_userptr_submit_fini(vma->obj);
> - }
> -
> if (final)
> i915_vma_put(vma);
> }
> @@ -1990,7 +1985,7 @@ static noinline int eb_relocate_parse_slow(struct
> i915_execbuffer *eb,
> }
>
> /* We may process another execbuffer during the unlock... */
> - eb_release_vmas(eb, false, true);
> + eb_release_vmas(eb, false);
> i915_gem_ww_ctx_fini(>ww);
>
> if (rq) {
> @@ -2094,7 +2089,7 @@ static noinline int eb_relocate_parse_slow(struct
> i915_execbuffer *eb,
>
> err:
> if (err == -EDEADLK) {
> - eb_release_vmas(eb, false, false);
> + eb_release_vmas(eb, false);
> err = i915_gem_ww_ctx_backoff(>ww);
> if (!err)
> goto repeat_validate;
> @@ -2191,7 +2186,7 @@ static int eb_relocate_parse(struct i915_execbuffer *eb)
>
> err:
> if (err == -EDEADLK) {
> - eb_release_vmas(eb, false, false);
> + eb_release_vmas(eb, false);
> err = i915_gem_ww_ctx_backoff(>ww);
> if (!err)
> goto retry;
> @@ -2268,7 +2263,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
>
> #ifdef CONFIG_MMU_NOTIFIER
> if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) {
> - spin_lock(>i915->mm.notifier_lock);
> + read_lock(>i915->mm.notifier_lock);
>
> /*
> * count is always at least 1, otherwise __EXEC_USERPTR_USED
> @@ -2286,7 +2281,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> break;
> }
>
> -
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/dmc: Let's abstract the dmc path. (rev2)
== Series Details == Series: drm/i915/dmc: Let's abstract the dmc path. (rev2) URL : https://patchwork.freedesktop.org/series/89275/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser' ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 5/8] drm/i915: Move the "recompress on activate" to a central place
On Wed, 14 Apr 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> On ILK+ we current do a nuke right after activating FBC. If my
> memory isn't playing tricks on me this is actially required if
> FBC didn't stay disabled for a full frame. In that case the
> deactivate+reactivate may not invalidate the cfb. I'd have to
> double chekc to be sure though.
>
> So let's keep the nuke, and just extend it backwards to cover
> all the platforms by doing it a bit higher up.
>
> Signed-off-by: Ville Syrjälä
Does what it says on the box, and the change overall seems logical.
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 13 +
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index fb8c0872a2b7..8165bdb6f921 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -212,16 +212,16 @@ static void i965_fbc_recompress(struct drm_i915_private
> *dev_priv)
> /* This function forces a CFB recompression through the nuke operation. */
> static void snb_fbc_recompress(struct drm_i915_private *dev_priv)
> {
> - struct intel_fbc *fbc = _priv->fbc;
> -
> - trace_intel_fbc_nuke(fbc->crtc);
> -
> intel_de_write(dev_priv, MSG_FBC_REND_STATE, FBC_REND_NUKE);
> intel_de_posting_read(dev_priv, MSG_FBC_REND_STATE);
> }
>
> static void intel_fbc_recompress(struct drm_i915_private *dev_priv)
> {
> + struct intel_fbc *fbc = _priv->fbc;
> +
> + trace_intel_fbc_nuke(fbc->crtc);
> +
> if (DISPLAY_VER(dev_priv) >= 6)
> snb_fbc_recompress(dev_priv);
> else if (DISPLAY_VER(dev_priv) >= 4)
> @@ -274,8 +274,6 @@ static void ilk_fbc_activate(struct drm_i915_private
> *dev_priv)
> params->fence_y_offset);
> /* enable it... */
> intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
> -
> - intel_fbc_recompress(dev_priv);
> }
>
> static void ilk_fbc_deactivate(struct drm_i915_private *dev_priv)
> @@ -348,8 +346,6 @@ static void gen7_fbc_activate(struct drm_i915_private
> *dev_priv)
> dpfc_ctl |= FBC_CTL_FALSE_COLOR;
>
> intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
> -
> - intel_fbc_recompress(dev_priv);
> }
>
> static bool intel_fbc_hw_is_active(struct drm_i915_private *dev_priv)
> @@ -418,6 +414,7 @@ static void intel_fbc_activate(struct drm_i915_private
> *dev_priv)
> drm_WARN_ON(_priv->drm, !mutex_is_locked(>lock));
>
> intel_fbc_hw_activate(dev_priv);
> + intel_fbc_recompress(dev_priv);
>
> fbc->no_fbc_reason = NULL;
> }
--
Jani Nikula, Intel Open Source Graphics Center
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
