Re: [Intel-gfx] [PATCH 1/2] drm/i915/gvt: Move mdev attribute groups into kvmgt module
On 2021.04.27 09:12:35 -0300, Jason Gunthorpe wrote:
> On Tue, Apr 27, 2021 at 10:45:06AM +0800, Zhenyu Wang wrote:
> > On 2021.04.26 10:39:24 -0300, Jason Gunthorpe wrote:
> > > On Mon, Apr 26, 2021 at 05:41:42PM +0800, Zhenyu Wang wrote:
> > > > @@ -1667,19 +1773,26 @@ static struct mdev_parent_ops intel_vgpu_ops = {
> > > >
> > > > static int kvmgt_host_init(struct device *dev, void *gvt, const void
> > > > *ops)
> > > > {
> > > > - struct attribute_group **kvm_vgpu_type_groups;
> > > > + int ret;
> > > > +
> > > > + ret = intel_gvt_init_vgpu_type_groups((struct intel_gvt *)gvt);
> > > > + if (ret)
> > > > + return ret;
> > > >
> > > > intel_gvt_ops = ops;
> > > > - if (!intel_gvt_ops->get_gvt_attrs(_vgpu_type_groups))
> > > > - return -EFAULT;
> > > > - intel_vgpu_ops.supported_type_groups = kvm_vgpu_type_groups;
> > > > + intel_vgpu_ops.supported_type_groups = gvt_vgpu_type_groups;
> > >
> > > This patch is an improvement, but this fictional dynamic behavior is
> > > still wrong. The supported_type_groups directly flows from the
> > > vgpu_types array in vgpu.c and it should not be split up like this
> > >
> > > The code copies the rodata vgpu_types into dynamic memory gvt->types
> > > then copies that dynamic memory into a dynamic gvt_vgpu_type_groups,
> > > which makes very little sense at all.
> >
> > vgpu_types is static for we want fixed vgpu mdev type, but actual supported
> > types depend on HW resources e.g aperture mem, fence, etc, that's dynamic
> > for
> > gvt->types, so gvt_vgpu_type_groups is dynamic from gvt->types.
>
> Well, that's worse then, intel_vgpu_ops.supported_type_groups is a
> static global, it cannot depend on HW variable calculations.
>
sorry, maybe I didn't describe this properly, gvt_vgpu_type_groups is
static global, but the actual supported types is determined from
gvt->types and initialized before mdev device register.
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[Intel-gfx] ✗ Fi.CI.IGT: failure for Add support for querying engine cycles
== Series Details == Series: Add support for querying engine cycles URL : https://patchwork.freedesktop.org/series/89561/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10019_full -> Patchwork_20009_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_20009_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20009_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_20009_full: ### IGT changes ### Possible regressions * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: - shard-tglb: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/shard-tglb6/igt@kms_pipe_crc_ba...@hang-read-crc-pipe-c.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-tglb5/igt@kms_pipe_crc_ba...@hang-read-crc-pipe-c.html New tests - New tests have been introduced between CI_DRM_10019_full and Patchwork_20009_full: ### New IGT tests (2) ### * igt@i915_query@cs-cycles: - Statuses : 7 pass(s) - Exec time: [0.00, 0.16] s * igt@i915_query@cs-cycles-invalid: - Statuses : 7 pass(s) - Exec time: [0.00, 0.05] s Known issues Here are the changes found in Patchwork_20009_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-snb: NOTRUN -> [DMESG-WARN][3] ([i915#3002]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-snb7/igt@gem_cre...@create-massive.html * igt@gem_ctx_isolation@preservation-s3@rcs0: - shard-apl: [PASS][4] -> [DMESG-WARN][5] ([i915#180]) +1 similar issue [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/shard-apl7/igt@gem_ctx_isolation@preservation...@rcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-apl6/igt@gem_ctx_isolation@preservation...@rcs0.html * igt@gem_ctx_persistence@clone: - shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +4 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-snb2/igt@gem_ctx_persiste...@clone.html * igt@gem_ctx_persistence@many-contexts: - shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2410]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/shard-tglb3/igt@gem_ctx_persiste...@many-contexts.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-tglb7/igt@gem_ctx_persiste...@many-contexts.html * igt@gem_ctx_persistence@replace@rcs0: - shard-skl: NOTRUN -> [FAIL][9] ([i915#2410]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-skl9/igt@gem_ctx_persistence@repl...@rcs0.html * igt@gem_eio@in-flight-suspend: - shard-kbl: [PASS][10] -> [DMESG-WARN][11] ([i915#180]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/shard-kbl1/igt@gem_...@in-flight-suspend.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-kbl1/igt@gem_...@in-flight-suspend.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][12] -> [TIMEOUT][13] ([i915#2369] / [i915#3063]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/shard-tglb5/igt@gem_...@unwedge-stress.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-tglb8/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][14] ([i915#2846]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-skl4/igt@gem_exec_f...@basic-deadline.html - shard-apl: NOTRUN -> [FAIL][15] ([i915#2846]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-apl3/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [PASS][16] -> [FAIL][17] ([i915#2842]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/shard-iclb5/igt@gem_exec_fair@basic-none-sh...@rcs0.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-iclb6/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-apl: [PASS][18] -> [FAIL][19] ([i915#2842]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/shard-apl6/igt@gem_exec_fair@basic-n...@vcs0.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/shard-apl7/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][20] ([i915#2842]) +4 similar issues [20]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for Simplify intel_setup_outputs (rev3)
== Series Details ==
Series: Simplify intel_setup_outputs (rev3)
URL : https://patchwork.freedesktop.org/series/88988/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10019 -> Patchwork_20012
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_20012 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20012, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20012/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20012:
### IGT changes ###
Possible regressions
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-skl-6700k2: [PASS][1] -> [WARN][2] +12 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/fi-skl-6700k2/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequence.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20012/fi-skl-6700k2/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequence.html
Known issues
Here are the changes found in Patchwork_20012 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_prime@amd-to-i915:
- fi-tgl-y: NOTRUN -> [SKIP][3] ([fdo#109315] / [i915#2575])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20012/fi-tgl-y/igt@amdgpu/amd_pr...@amd-to-i915.html
Possible fixes
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][4] ([i915#1849] / [i915#3180]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20012/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
Participating hosts (45 -> 41)
--
Missing(4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-
* Linux: CI_DRM_10019 -> Patchwork_20012
CI-20190529: 20190529
CI_DRM_10019: acf28153df39c6dab44a8691ecaad05f1f37ed46 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20012: f66a4d7d8ad4bb0998d20efb4cfae2a405d06d54 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f66a4d7d8ad4 drm/i915/display: hide workaround for broken vbt in intel_bios.c
fbca5016d6b8 drm/i915/display: remove strap checks from gen 9
e5feef680147 drm/i915/display: remove FIXME comment for intended feature
a84e8d6fe5a7 drm/i915/display: move vbt check to intel_ddi_init()
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20012/index.html
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[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/drm_mst: Use Extended Base Receiver Capability DPCD space (rev4)
== Series Details == Series: drm/drm_mst: Use Extended Base Receiver Capability DPCD space (rev4) URL : https://patchwork.freedesktop.org/series/89559/ State : failure == Summary == Applying: drm/drm_mst: Use Extended Base Receiver Capability DPCD space error: sha1 information is lacking or useless (drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/drm_mst: Use Extended Base Receiver Capability DPCD space When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 01/21] drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE
On Tue, Apr 27, 2021 at 4:32 AM Daniel Vetter wrote:
>
> On Fri, Apr 23, 2021 at 05:31:11PM -0500, Jason Ekstrand wrote:
> > This reverts commit 88be76cdafc7 ("drm/i915: Allow userspace to specify
> > ringsize on construction"). This API was originally added for OpenCL
> > but the compute-runtime PR has sat open for a year without action so we
> > can still pull it out if we want. I argue we should drop it for three
> > reasons:
> >
> > 1. If the compute-runtime PR has sat open for a year, this clearly
> > isn't that important.
> >
> > 2. It's a very leaky API. Ring size is an implementation detail of the
> > current execlist scheduler and really only makes sense there. It
> > can't apply to the older ring-buffer scheduler on pre-execlist
> > hardware because that's shared across all contexts and it won't
> > apply to the GuC scheduler that's in the pipeline.
> >
> > 3. Having userspace set a ring size in bytes is a bad solution to the
> > problem of having too small a ring. There is no way that userspace
> > has the information to know how to properly set the ring size so
> > it's just going to detect the feature and always set it to the
> > maximum of 512K. This is what the compute-runtime PR does. The
> > scheduler in i915, on the other hand, does have the information to
> > make an informed choice. It could detect if the ring size is a
> > problem and grow it itself. Or, if that's too hard, we could just
> > increase the default size from 16K to 32K or even 64K instead of
> > relying on userspace to do it.
> >
> > Let's drop this API for now and, if someone decides they really care
> > about solving this problem, they can do it properly.
> >
> > Signed-off-by: Jason Ekstrand
>
> Two things:
> - I'm assuming you have an igt change to make sure we get EINVAL for both
> set and getparam now? Just to make sure.
I've written up some quick tests. I'll send them out in the next
version of the IGT series or as a separate series if that one gets
reviewed without comment (unlikely).
> - intel_context->ring is either a ring pointer when CONTEXT_ALLOC_BIT is
> set in ce->flags, or the size of the ring stored in the pointer if not.
> I'm seriously hoping you get rid of this complexity with your
> proto-context series, and also delete __intel_context_ring_size() in the
> end. That function has no business existing imo.
I hadn't done that yet, no. But I typed up a patch today which I'll
send out with the next version of this series which does this.
--Jason
> If not, please make sure that's the case.
>
> Aside from these patch looks good.
>
> Reviewed-by: Daniel Vetter
>
> > ---
> > drivers/gpu/drm/i915/Makefile | 1 -
> > drivers/gpu/drm/i915/gem/i915_gem_context.c | 85 +--
> > drivers/gpu/drm/i915/gt/intel_context_param.c | 63 --
> > drivers/gpu/drm/i915/gt/intel_context_param.h | 3 -
> > include/uapi/drm/i915_drm.h | 20 +
> > 5 files changed, 4 insertions(+), 168 deletions(-)
> > delete mode 100644 drivers/gpu/drm/i915/gt/intel_context_param.c
> >
> > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> > index d0d936d9137bc..afa22338fa343 100644
> > --- a/drivers/gpu/drm/i915/Makefile
> > +++ b/drivers/gpu/drm/i915/Makefile
> > @@ -88,7 +88,6 @@ gt-y += \
> > gt/gen8_ppgtt.o \
> > gt/intel_breadcrumbs.o \
> > gt/intel_context.o \
> > - gt/intel_context_param.o \
> > gt/intel_context_sseu.o \
> > gt/intel_engine_cs.o \
> > gt/intel_engine_heartbeat.o \
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > index fd8ee52e17a47..e52b85b8f923d 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > @@ -1335,63 +1335,6 @@ static int set_ppgtt(struct drm_i915_file_private
> > *file_priv,
> > return err;
> > }
> >
> > -static int __apply_ringsize(struct intel_context *ce, void *sz)
> > -{
> > - return intel_context_set_ring_size(ce, (unsigned long)sz);
> > -}
> > -
> > -static int set_ringsize(struct i915_gem_context *ctx,
> > - struct drm_i915_gem_context_param *args)
> > -{
> > - if (!HAS_LOGICAL_RING_CONTEXTS(ctx->i915))
> > - return -ENODEV;
> > -
> > - if (args->size)
> > - return -EINVAL;
> > -
> > - if (!IS_ALIGNED(args->value, I915_GTT_PAGE_SIZE))
> > - return -EINVAL;
> > -
> > - if (args->value < I915_GTT_PAGE_SIZE)
> > - return -EINVAL;
> > -
> > - if (args->value > 128 * I915_GTT_PAGE_SIZE)
> > - return -EINVAL;
> > -
> > - return context_apply_all(ctx,
> > - __apply_ringsize,
> > - __intel_context_ring_size(args->value));
> > -}
> > -
> > -static int __get_ringsize(struct intel_context
[Intel-gfx] ✓ Fi.CI.IGT: success for Add support for querying engine cycles
== Series Details == Series: Add support for querying engine cycles URL : https://patchwork.freedesktop.org/series/89560/ State : success == Summary == CI Bug Log - changes from CI_DRM_10018_full -> Patchwork_20008_full Summary --- **SUCCESS** No regressions found. New tests - New tests have been introduced between CI_DRM_10018_full and Patchwork_20008_full: ### New IGT tests (2) ### * igt@i915_query@cs-cycles: - Statuses : 6 pass(s) - Exec time: [0.01, 0.14] s * igt@i915_query@cs-cycles-invalid: - Statuses : 6 pass(s) - Exec time: [0.00, 0.04] s Known issues Here are the changes found in Patchwork_20008_full that come from known issues: ### IGT changes ### Issues hit * igt@feature_discovery@display-3x: - shard-iclb: NOTRUN -> [SKIP][1] ([i915#1839]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-iclb7/igt@feature_discov...@display-3x.html * igt@gem_create@create-clear: - shard-glk: [PASS][2] -> [FAIL][3] ([i915#3160]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-glk7/igt@gem_cre...@create-clear.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-glk3/igt@gem_cre...@create-clear.html * igt@gem_create@create-massive: - shard-apl: NOTRUN -> [DMESG-WARN][4] ([i915#3002]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-apl6/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@legacy-engines-queued: - shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +6 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-snb2/igt@gem_ctx_persiste...@legacy-engines-queued.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][6] ([i915#2846]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-skl5/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none-vip@rcs0: - shard-kbl: [PASS][7] -> [FAIL][8] ([i915#2842]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-kbl1/igt@gem_exec_fair@basic-none-...@rcs0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-kbl1/igt@gem_exec_fair@basic-none-...@rcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][9] ([i915#2842]) +4 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-iclb1/igt@gem_exec_fair@basic-n...@vcs1.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][10] -> [FAIL][11] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-tglb1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-glk: [PASS][12] -> [FAIL][13] ([i915#2842]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-glk6/igt@gem_exec_fair@basic-pace-s...@rcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-glk2/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-tglb: NOTRUN -> [FAIL][14] ([i915#2842]) +2 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-tglb8/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-glk: NOTRUN -> [FAIL][15] ([i915#2842]) +2 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-glk6/igt@gem_exec_fair@basic-p...@vecs0.html * igt@gem_exec_params@secure-non-root: - shard-iclb: NOTRUN -> [SKIP][16] ([fdo#112283]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-iclb5/igt@gem_exec_par...@secure-non-root.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][17] ([i915#2389]) +3 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-apl3/igt@gem_exec_reloc@basic-wide-act...@bcs0.html - shard-skl: NOTRUN -> [FAIL][18] ([i915#2389]) +3 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-skl1/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-snb: NOTRUN -> [FAIL][19] ([i915#2389]) +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/shard-snb6/igt@gem_exec_reloc@basic-wide-act...@rcs0.html * igt@gem_exec_whisper@basic-queues-forked: - shard-glk: [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95]) +1 similar issue [20]:
[Intel-gfx] [PATCH] drm/drm_mst: Use Extended Base Receiver Capability DPCD space
[why]
DP 1.4a spec madates that if DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is
set, Extended Base Receiver Capability DPCD space must be used. Without
doing that, the three DPCD values that differ will be wrong, leading to
incorrect or limited functionality. MST link rate, for example, could
have a lower value. Also, Synaptics quirk wouldn't work out well when
Extended DPCD was not read, resulting in no DSC for such hubs.
[how]
Modify MST topology manager to use the values from Extended DPCD where
applicable.
To prevent regression on the sources that have a lower maximum link rate
capability than MAX_LINK_RATE from Extended DPCD, have the drivers
supply maximum lane count and rate at initialization time.
This also reverts 'commit 2dcab875e763 ("Revert "drm/dp_mst: Retrieve
extended DPCD caps for topology manager"")', brining the change back to
the original 'commit ad44c03208e4 ("drm/dp_mst: Retrieve extended DPCD
caps for topology manager")'.
Signed-off-by: Nikola Cornij
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 2 ++
drivers/gpu/drm/drm_dp_mst_topology.c | 33 ---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +++-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +-
drivers/gpu/drm/radeon/radeon_dp_mst.c| 8 +
include/drm/drm_dp_mst_helper.h | 12 ++-
8 files changed, 72 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index d62460b69d95..d038e3185afb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -437,6 +437,8 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
struct amdgpu_dm_connector *aconnector,
int link_index)
{
+ struct dc_link_settings max_link_enc_cap = {0};
+
aconnector->dm_dp_aux.aux.name =
kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d",
link_index);
@@ -450,6 +452,7 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
return;
+ dc_link_dp_get_max_link_enc_cap(aconnector->dc_link, _link_enc_cap);
aconnector->mst_mgr.cbs = _mst_cbs;
drm_dp_mst_topology_mgr_init(
>mst_mgr,
@@ -457,6 +460,8 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
>dm_dp_aux.aux,
16,
4,
+ max_link_enc_cap.lane_count,
+ max_link_enc_cap.link_rate,
aconnector->connector_id);
drm_connector_attach_dp_subconnector_property(>base);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 3ff3d9e90983..afa43181dec6 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1893,6 +1893,24 @@ bool dc_link_dp_sync_lt_end(struct dc_link *link, bool
link_down)
return true;
}
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
dc_link_settings *max_link_enc_cap)
+{
+ if (!max_link_enc_cap) {
+ DC_LOG_ERROR("%s: Could not return max link encoder caps",
__func__);
+ return false;
+ }
+
+ if (link->link_enc->funcs->get_max_link_cap) {
+ link->link_enc->funcs->get_max_link_cap(link->link_enc,
max_link_enc_cap);
+ return true;
+ }
+
+ DC_LOG_ERROR("%s: Max link encoder caps unknown", __func__);
+ max_link_enc_cap->lane_count = 1;
+ max_link_enc_cap->link_rate = 6;
+ return false;
+}
+
static struct dc_link_settings get_max_link_cap(struct dc_link *link)
{
struct dc_link_settings max_link_cap = {0};
diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h
b/drivers/gpu/drm/amd/display/dc/dc_link.h
index 054bab45ee17..fc5622ffec3d 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -345,6 +345,8 @@ bool dc_link_dp_set_test_pattern(
const unsigned char *p_custom_pattern,
unsigned int cust_pattern_size);
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
dc_link_settings *max_link_enc_cap);
+
void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
bool dc_link_is_dp_sink_present(struct dc_link *link);
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index de5124ce42cb..a86065c9a880 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3693,18
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Remove reference to struct drm_device.pdev (rev2)
== Series Details == Series: drm/i915/gem: Remove reference to struct drm_device.pdev (rev2) URL : https://patchwork.freedesktop.org/series/89545/ State : success == Summary == CI Bug Log - changes from CI_DRM_10018_full -> Patchwork_20006_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_20006_full that come from known issues: ### IGT changes ### Issues hit * igt@feature_discovery@display-3x: - shard-iclb: NOTRUN -> [SKIP][1] ([i915#1839]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-iclb4/igt@feature_discov...@display-3x.html * igt@gem_create@create-massive: - shard-apl: NOTRUN -> [DMESG-WARN][2] ([i915#3002]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-apl8/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@legacy-engines-queued: - shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-snb7/igt@gem_ctx_persiste...@legacy-engines-queued.html * igt@gem_exec_capture@pi@vecs0: - shard-skl: NOTRUN -> [INCOMPLETE][4] ([i915#198] / [i915#2624]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-skl8/igt@gem_exec_capture@p...@vecs0.html * igt@gem_exec_fair@basic-none@vecs0: - shard-apl: [PASS][5] -> [FAIL][6] ([i915#2842]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-apl2/igt@gem_exec_fair@basic-n...@vecs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-apl1/igt@gem_exec_fair@basic-n...@vecs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2842]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-tglb1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-tglb3/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-glk: [PASS][9] -> [FAIL][10] ([i915#2842]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-glk6/igt@gem_exec_fair@basic-pace-s...@rcs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-glk3/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: NOTRUN -> [FAIL][11] ([i915#2849]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-iclb4/igt@gem_exec_fair@basic-throt...@rcs0.html * igt@gem_exec_params@secure-non-root: - shard-iclb: NOTRUN -> [SKIP][12] ([fdo#112283]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-iclb4/igt@gem_exec_par...@secure-non-root.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][13] ([i915#2389]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-apl1/igt@gem_exec_reloc@basic-wide-act...@bcs0.html - shard-skl: NOTRUN -> [FAIL][14] ([i915#2389]) +3 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-skl6/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-snb: NOTRUN -> [FAIL][15] ([i915#2389]) +2 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-snb5/igt@gem_exec_reloc@basic-wide-act...@rcs0.html * igt@gem_mmap_gtt@big-copy: - shard-skl: [PASS][16] -> [FAIL][17] ([i915#307]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-skl5/igt@gem_mmap_...@big-copy.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-skl6/igt@gem_mmap_...@big-copy.html * igt@gem_mmap_gtt@cpuset-big-copy-xy: - shard-iclb: NOTRUN -> [FAIL][18] ([i915#307]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-iclb4/igt@gem_mmap_...@cpuset-big-copy-xy.html * igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled: - shard-iclb: NOTRUN -> [SKIP][19] ([i915#768]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-iclb8/igt@gem_render_c...@y-tiled-mc-ccs-to-vebox-y-tiled.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#3323]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/shard-apl8/igt@gem_userptr_bl...@dmabuf-sync.html * igt@gem_userptr_blits@map-fixed-invalidate-busy@wb: - shard-glk: [PASS][21] -> [DMESG-WARN][22] ([i915#118] / [i915#95]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/shard-glk9/igt@gem_userptr_blits@map-fixed-invalidate-b...@wb.html [22]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for Simplify intel_setup_outputs (rev2)
== Series Details ==
Series: Simplify intel_setup_outputs (rev2)
URL : https://patchwork.freedesktop.org/series/88988/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10019 -> Patchwork_20011
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_20011 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20011, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20011/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20011:
### IGT changes ###
Possible regressions
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-skl-6700k2: [PASS][1] -> [WARN][2] +12 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/fi-skl-6700k2/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequence.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20011/fi-skl-6700k2/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequence.html
Known issues
Here are the changes found in Patchwork_20011 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
- fi-bsw-kefka: [PASS][3] -> [FAIL][4] ([i915#2346])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/fi-bsw-kefka/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20011/fi-bsw-kefka/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
Possible fixes
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][5] ([i915#1849] / [i915#3180]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20011/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
Participating hosts (45 -> 40)
--
Missing(5): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_10019 -> Patchwork_20011
CI-20190529: 20190529
CI_DRM_10019: acf28153df39c6dab44a8691ecaad05f1f37ed46 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20011: 9734ff139e242d0ec53d0304bf38c4df4ba94a17 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9734ff139e24 drm/i915/display: hide workaround for broken vbt in intel_bios.c
ccb53a694122 drm/i915/display: remove strap checks from gen 9
448b20488a73 drm/i915/display: remove FIXME comment for intended feature
b00cbc473968 drm/i915/display: move vbt check to intel_ddi_init()
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20011/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Add support for querying engine cycles
== Series Details ==
Series: Add support for querying engine cycles
URL : https://patchwork.freedesktop.org/series/89561/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10019 -> Patchwork_20009
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/index.html
Known issues
Here are the changes found in Patchwork_20009 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html
Possible fixes
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[INCOMPLETE][2] ([i915#2782]) -> [PASS][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
* igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][4] ([i915#1849] / [i915#3180]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
Warnings
* igt@kms_chamelium@vga-edid-read:
- fi-icl-u2: [SKIP][6] -> [SKIP][7] ([fdo#109309]) +1 similar issue
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10019/fi-icl-u2/igt@kms_chamel...@vga-edid-read.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/fi-icl-u2/igt@kms_chamel...@vga-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
Participating hosts (45 -> 41)
--
Missing(4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-
* IGT: IGT_6076 -> IGTPW_5757
* Linux: CI_DRM_10019 -> Patchwork_20009
CI-20190529: 20190529
CI_DRM_10019: acf28153df39c6dab44a8691ecaad05f1f37ed46 @
git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5757: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5757/index.html
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20009: 99d2530ba90b8230fa31735614b07a1c27f1117d @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
99d2530ba90b i915/query: Correlate engine and cpu timestamps with better
accuracy
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20009/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/drm_mst: Use Extended Base Receiver Capability DPCD space (rev3)
== Series Details == Series: drm/drm_mst: Use Extended Base Receiver Capability DPCD space (rev3) URL : https://patchwork.freedesktop.org/series/89559/ State : failure == Summary == Applying: drm/drm_mst: Use Extended Base Receiver Capability DPCD space error: sha1 information is lacking or useless (drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/drm_mst: Use Extended Base Receiver Capability DPCD space When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for Add support for querying engine cycles
== Series Details == Series: Add support for querying engine cycles URL : https://patchwork.freedesktop.org/series/89561/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./include/uapi/drm/i915_drm.h:2234: warning: Incorrect use of kernel-doc format: * Query Command Streamer timestamp register. ./include/uapi/drm/i915_drm.h:2420: warning: Incorrect use of kernel-doc format: * Command streamer cycles as read from the command streamer ./include/uapi/drm/i915_drm.h:2429: warning: Incorrect use of kernel-doc format: * CPU timestamps in ns. cpu_timestamp[0] is captured before reading the ./include/uapi/drm/i915_drm.h:2437: warning: Incorrect use of kernel-doc format: * Reference clock id for CPU timestamp. For definition, see ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'engine' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'flags' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cs_cycles' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cs_frequency' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cpu_timestamp' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'clockid' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'rsvd' not described in 'drm_i915_query_cs_cycles' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 1/4] drm/i915/display: move vbt check to intel_ddi_init()
Since commit 45c0673aac97 ("drm/i915/bios: start using the
intel_bios_encoder_data directly") we lookup the devdata for each port
in intel_ddi_init() and just return if the port is not present in VBT
(or if we didn't create a fake devdata for it if VBT is not available).
So in intel_display.c we don't have to check
intel_bios_is_port_present(), just rely on the check in
intel_ddi_init().
v2: Rebase on commit 45c0673aac97 ("drm/i915/bios: start using the
intel_bios_encoder_data directly") re-using that check in intel_ddi_init()
instead of adding a new one.
Signed-off-by: Lucas De Marchi
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 6280ba7f4c17..705f32b2f832 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10868,13 +10868,13 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
intel_ddi_init(dev_priv, PORT_C);
intel_ddi_init(dev_priv, PORT_D);
intel_ddi_init(dev_priv, PORT_E);
+
/*
-* On some ICL SKUs port F is not present. No strap bits for
-* this, so rely on VBT.
-* Work around broken VBTs on SKUs known to have no port F.
+* On some ICL SKUs port F is not present, but broken VBTs mark
+* the port as present. Only try to initialize port F for the
+* SKUs that may actually have it.
*/
- if (IS_ICL_WITH_PORT_F(dev_priv) &&
- intel_bios_is_port_present(dev_priv, PORT_F))
+ if (IS_ICL_WITH_PORT_F(dev_priv))
intel_ddi_init(dev_priv, PORT_F);
icl_dsi_init(dev_priv);
@@ -10928,10 +10928,8 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
/*
* On SKL we don't have a way to detect DDI-E so we rely on VBT.
*/
- if (DISPLAY_VER(dev_priv) == 9 &&
- intel_bios_is_port_present(dev_priv, PORT_E))
+ if (DISPLAY_VER(dev_priv) == 9)
intel_ddi_init(dev_priv, PORT_E);
-
} else if (HAS_PCH_SPLIT(dev_priv)) {
int found;
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 0/4] Simplify intel_setup_outputs
First and second patches should be straightforward. Third patch is a simplification for gen9+ since we are not supposed to check the straps anymore and rely on VBT. Finally last patch may or may not make sense: I'm trying to hide these hacks in intel_bios.c so we have a clean init sequence. Lucas De Marchi (4): drm/i915/display: move vbt check to intel_ddi_init() drm/i915/display: remove FIXME comment for intended feature drm/i915/display: remove strap checks from gen 9 drm/i915/display: hide workaround for broken vbt in intel_bios.c drivers/gpu/drm/i915/display/intel_bios.c| 15 ++ drivers/gpu/drm/i915/display/intel_display.c | 54 +--- 2 files changed, 27 insertions(+), 42 deletions(-) -- 2.31.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 4/4] drm/i915/display: hide workaround for broken vbt in intel_bios.c
Instead of poluting the normal code path in intel_display.c, make
intel_bios.c handle the brokenness of the VBT.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_bios.c| 15 +++
drivers/gpu/drm/i915/display/intel_display.c | 14 ++
2 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index befab891a6b9..e9f828452412 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1852,6 +1852,14 @@ intel_bios_encoder_supports_edp(const struct
intel_bios_encoder_data *devdata)
devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
}
+static bool skip_broken_vbt(struct drm_i915_private *i915, enum port port)
+{
+ if (port == PORT_F && (IS_ICELAKE(i915) || IS_CANNONLAKE(i915)))
+ return !IS_ICL_WITH_PORT_F(i915) && !IS_CNL_WITH_PORT_F(i915);
+
+ return false;
+}
+
static void parse_ddi_port(struct drm_i915_private *i915,
struct intel_bios_encoder_data *devdata)
{
@@ -1865,6 +1873,13 @@ static void parse_ddi_port(struct drm_i915_private *i915,
if (port == PORT_NONE)
return;
+ if (skip_broken_vbt(i915, port)) {
+ drm_dbg_kms(>drm,
+ "VBT reports port %c as supported, but that can't
be true: skipping\n",
+ port_name(port));
+ return;
+ }
+
info = >vbt.ddi_port_info[port];
if (info->devdata) {
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 55f8f2ceada2..64a2a3b9a480 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10868,15 +10868,7 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
intel_ddi_init(dev_priv, PORT_C);
intel_ddi_init(dev_priv, PORT_D);
intel_ddi_init(dev_priv, PORT_E);
-
- /*
-* On some ICL SKUs port F is not present, but broken VBTs mark
-* the port as present. Only try to initialize port F for the
-* SKUs that may actually have it.
-*/
- if (IS_ICL_WITH_PORT_F(dev_priv))
- intel_ddi_init(dev_priv, PORT_F);
-
+ intel_ddi_init(dev_priv, PORT_F);
icl_dsi_init(dev_priv);
} else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
intel_ddi_init(dev_priv, PORT_A);
@@ -10889,9 +10881,7 @@ static void intel_setup_outputs(struct drm_i915_private
*dev_priv)
intel_ddi_init(dev_priv, PORT_C);
intel_ddi_init(dev_priv, PORT_D);
intel_ddi_init(dev_priv, PORT_E);
-
- if (IS_CNL_WITH_PORT_F(dev_priv))
- intel_ddi_init(dev_priv, PORT_F);
+ intel_ddi_init(dev_priv, PORT_E);
} else if (HAS_DDI(dev_priv)) {
u32 found;
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 3/4] drm/i915/display: remove strap checks from gen 9
Direction on gen9+ was to stop reading the straps and only rely on the
VBT for marking the port presence. This happened while dealing with
WaIgnoreDDIAStrap and instead of using it as a WA, it should now be the
normal flow. See commit 885d3e5b6f08 ("drm/i915/display: fix comment on
skl straps").
For gen 10 it's hard to say if this will work or not since I can't test
it, so leave it with the same behavior as before.
For PCH_TGP we should still rely on the VBT to make ports E and F not
available.
v2 (Ville):
- use display ver >= 9 to make it consistent with the rest of the
driver instead of checking for == 9
- also handle CNL and only initialize port F if it is
IS_CNL_WITH_PORT_F. Eventually CNL may be removed, but while it
isn't let's keep it consistent everywhere
Signed-off-by: Lucas De Marchi
Reviewed-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_display.c | 38 +++-
1 file changed, 13 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 37fe35f6de2c..55f8f2ceada2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10883,34 +10883,27 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
intel_ddi_init(dev_priv, PORT_B);
intel_ddi_init(dev_priv, PORT_C);
vlv_dsi_init(dev_priv);
+ } else if (DISPLAY_VER(dev_priv) >= 9) {
+ intel_ddi_init(dev_priv, PORT_A);
+ intel_ddi_init(dev_priv, PORT_B);
+ intel_ddi_init(dev_priv, PORT_C);
+ intel_ddi_init(dev_priv, PORT_D);
+ intel_ddi_init(dev_priv, PORT_E);
+
+ if (IS_CNL_WITH_PORT_F(dev_priv))
+ intel_ddi_init(dev_priv, PORT_F);
} else if (HAS_DDI(dev_priv)) {
- int found;
+ u32 found;
if (intel_ddi_crt_present(dev_priv))
intel_crt_init(dev_priv);
- /*
-* Haswell uses DDI functions to detect digital outputs.
-* On SKL pre-D0 the strap isn't connected. Later SKUs may or
-* may not have it - it was supposed to be fixed by the same
-* time we stopped using straps. Assume it's there.
-*/
+ /* Haswell uses DDI functions to detect digital outputs. */
found = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) &
DDI_INIT_DISPLAY_DETECTED;
- /* WaIgnoreDDIAStrap: skl */
- if (found || DISPLAY_VER(dev_priv) == 9)
+ if (found)
intel_ddi_init(dev_priv, PORT_A);
- /* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP
-* register */
- if (HAS_PCH_TGP(dev_priv)) {
- /* W/A due to lack of STRAP config on TGP PCH*/
- found = (SFUSE_STRAP_DDIB_DETECTED |
-SFUSE_STRAP_DDIC_DETECTED |
-SFUSE_STRAP_DDID_DETECTED);
- } else {
- found = intel_de_read(dev_priv, SFUSE_STRAP);
- }
-
+ found = intel_de_read(dev_priv, SFUSE_STRAP);
if (found & SFUSE_STRAP_DDIB_DETECTED)
intel_ddi_init(dev_priv, PORT_B);
if (found & SFUSE_STRAP_DDIC_DETECTED)
@@ -10919,11 +10912,6 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
intel_ddi_init(dev_priv, PORT_D);
if (found & SFUSE_STRAP_DDIF_DETECTED)
intel_ddi_init(dev_priv, PORT_F);
- /*
-* On SKL we don't have a way to detect DDI-E so we rely on VBT.
-*/
- if (DISPLAY_VER(dev_priv) == 9)
- intel_ddi_init(dev_priv, PORT_E);
} else if (HAS_PCH_SPLIT(dev_priv)) {
int found;
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 2/4] drm/i915/display: remove FIXME comment for intended feature
Direction on gen >= 9 was to stop using straps and rely on VBT
indicating if the port is present or not. Remove FIXME comment since
this will never be "fixed".
Signed-off-by: Lucas De Marchi
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 705f32b2f832..37fe35f6de2c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10879,15 +10879,9 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
icl_dsi_init(dev_priv);
} else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
- /*
-* FIXME: Broxton doesn't support port detection via the
-* DDI_BUF_CTL_A or SFUSE_STRAP registers, find another way to
-* detect the ports.
-*/
intel_ddi_init(dev_priv, PORT_A);
intel_ddi_init(dev_priv, PORT_B);
intel_ddi_init(dev_priv, PORT_C);
-
vlv_dsi_init(dev_priv);
} else if (HAS_DDI(dev_priv)) {
int found;
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 00/13] Remove vfio_mdev.c, mdev_parent_ops and more
On Tue, 27 Apr 2021 19:20:26 -0300 Jason Gunthorpe wrote: > On Tue, Apr 27, 2021 at 03:30:42PM -0600, Alex Williamson wrote: > > > It'd be really helpful if you could consistently copy at least one > > list, preferably one monitored by patchwork, for an entire series. The > > kvm list is missing patches 06 and 08. I can find the latter hopping > > over to the intel-gfx or dri-devel projects as I did for the last > > series, but 06 only copied linux-s390, where I need to use lore and > > can't find a patchwork. Thanks, > > Oh wow, that is not intentional, sorry! Thanks for pointing it out > > I didn't notice this was happening, basically a side effect of having > so many different people and lists to get on this series - kvm should > have been CC on them all, I fixed it up going forward. > > FWIW you may be interested in b4 if you haven't seen it before, it is > a good alternative if there isn't an offical patchworks. I'm sold! Thanks, Alex ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Add support for querying engine cycles
== Series Details ==
Series: Add support for querying engine cycles
URL : https://patchwork.freedesktop.org/series/89560/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10018 -> Patchwork_20008
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/index.html
Known issues
Here are the changes found in Patchwork_20008 that come from known issues:
### IGT changes ###
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [FAIL][1] ([i915#1888]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-y: [DMESG-FAIL][3] ([i915#541]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
Warnings
* igt@kms_chamelium@vga-edid-read:
- fi-icl-u2: [SKIP][5] -> [SKIP][6] ([fdo#109309]) +1 similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-icl-u2/igt@kms_chamel...@vga-edid-read.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/fi-icl-u2/igt@kms_chamel...@vga-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (47 -> 41)
--
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-icl-y
fi-bdw-samus
Build changes
-
* IGT: IGT_6076 -> IGTPW_5757
* Linux: CI_DRM_10018 -> Patchwork_20008
CI-20190529: 20190529
CI_DRM_10018: 929a4fa94d31990066fd8be6a02f1a6c2b9f1d2d @
git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5757: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5757/index.html
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20008: 043ae82f7a388989581edb393cd22ff6fb2fde02 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
043ae82f7a38 i915/query: Correlate engine and cpu timestamps with better
accuracy
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20008/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for Add support for querying engine cycles
== Series Details == Series: Add support for querying engine cycles URL : https://patchwork.freedesktop.org/series/89560/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./include/uapi/drm/i915_drm.h:2234: warning: Incorrect use of kernel-doc format: * Query Command Streamer timestamp register. ./include/uapi/drm/i915_drm.h:2420: warning: Incorrect use of kernel-doc format: * Command streamer cycles as read from the command streamer ./include/uapi/drm/i915_drm.h:2429: warning: Incorrect use of kernel-doc format: * CPU timestamps in ns. cpu_timestamp[0] is captured before reading the ./include/uapi/drm/i915_drm.h:2437: warning: Incorrect use of kernel-doc format: * Reference clock id for CPU timestamp. For definition, see ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'engine' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'flags' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cs_cycles' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cs_frequency' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'cpu_timestamp' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'clockid' not described in 'drm_i915_query_cs_cycles' ./include/uapi/drm/i915_drm.h:2446: warning: Function parameter or member 'rsvd' not described in 'drm_i915_query_cs_cycles' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/drm_mst: Use Extended Base Receiver Capability DPCD space
== Series Details ==
Series: drm/drm_mst: Use Extended Base Receiver Capability DPCD space
URL : https://patchwork.freedesktop.org/series/89559/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10018 -> Patchwork_20007
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20007/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20007:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_flip@basic-flip-vs-dpms@d-dp3:
- {fi-tgl-1115g4}:[PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-tgl-1115g4/igt@kms_flip@basic-flip-vs-d...@d-dp3.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20007/fi-tgl-1115g4/igt@kms_flip@basic-flip-vs-d...@d-dp3.html
* igt@runner@aborted:
- {fi-tgl-1115g4}:NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20007/fi-tgl-1115g4/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_20007 that come from known issues:
### IGT changes ###
Possible fixes
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [FAIL][4] ([i915#1888]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20007/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-y: [DMESG-FAIL][6] ([i915#541]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20007/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1222]: https://gitlab.freedesktop.org/drm/intel/issues/1222
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (47 -> 41)
--
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-icl-y
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_10018 -> Patchwork_20007
CI-20190529: 20190529
CI_DRM_10018: 929a4fa94d31990066fd8be6a02f1a6c2b9f1d2d @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20007: 63120ebc08ec4cdca2a8c8b9a9c563d40e1d290b @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
63120ebc08ec drm/drm_mst: Use Extended Base Receiver Capability DPCD space
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20007/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/drm_mst: Use Extended Base Receiver Capability DPCD space
[why]
DP 1.4a spec madates that if DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is
set, Extended Base Receiver Capability DPCD space must be used. Without
doing that, the three DPCD values that differ will be wrong, leading to
incorrect or limited functionality. MST link rate, for example, could
have a lower value or Synaptics quirk wouldn't work out well when
Extended DPCD was not read, resulting in no DSC for such hubs.
[how]
Modify MST topology manager to use the values from Extended DPCD where
applicable.
To prevent regression on the sources that have lower maximum link rate
capability than MAX_LINK_RATE from Extended DPCD, have the drivers
supply maximum lane count and rate at initialization time.
This also reverts 'commit 2dcab875e763 ("Revert "drm/dp_mst: Retrieve
extended DPCD caps for topology manager"")', brining the change back to the
original 'commit ad44c03208e4 ("drm/dp_mst: Retrieve extended DPCD caps
for topology manager")'.
Signed-off-by: Nikola Cornij
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 2 ++
drivers/gpu/drm/drm_dp_mst_topology.c | 33 ---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +++-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +-
drivers/gpu/drm/radeon/radeon_dp_mst.c| 3 ++
include/drm/drm_dp_mst_helper.h | 12 ++-
8 files changed, 67 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index d62460b69d95..d038e3185afb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -437,6 +437,8 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
struct amdgpu_dm_connector *aconnector,
int link_index)
{
+ struct dc_link_settings max_link_enc_cap = {0};
+
aconnector->dm_dp_aux.aux.name =
kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d",
link_index);
@@ -450,6 +452,7 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
return;
+ dc_link_dp_get_max_link_enc_cap(aconnector->dc_link, _link_enc_cap);
aconnector->mst_mgr.cbs = _mst_cbs;
drm_dp_mst_topology_mgr_init(
>mst_mgr,
@@ -457,6 +460,8 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
>dm_dp_aux.aux,
16,
4,
+ max_link_enc_cap.lane_count,
+ max_link_enc_cap.link_rate,
aconnector->connector_id);
drm_connector_attach_dp_subconnector_property(>base);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 3ff3d9e90983..afa43181dec6 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1893,6 +1893,24 @@ bool dc_link_dp_sync_lt_end(struct dc_link *link, bool
link_down)
return true;
}
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
dc_link_settings *max_link_enc_cap)
+{
+ if (!max_link_enc_cap) {
+ DC_LOG_ERROR("%s: Could not return max link encoder caps",
__func__);
+ return false;
+ }
+
+ if (link->link_enc->funcs->get_max_link_cap) {
+ link->link_enc->funcs->get_max_link_cap(link->link_enc,
max_link_enc_cap);
+ return true;
+ }
+
+ DC_LOG_ERROR("%s: Max link encoder caps unknown", __func__);
+ max_link_enc_cap->lane_count = 1;
+ max_link_enc_cap->link_rate = 6;
+ return false;
+}
+
static struct dc_link_settings get_max_link_cap(struct dc_link *link)
{
struct dc_link_settings max_link_cap = {0};
diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h
b/drivers/gpu/drm/amd/display/dc/dc_link.h
index 054bab45ee17..fc5622ffec3d 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -345,6 +345,8 @@ bool dc_link_dp_set_test_pattern(
const unsigned char *p_custom_pattern,
unsigned int cust_pattern_size);
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
dc_link_settings *max_link_enc_cap);
+
void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
bool dc_link_is_dp_sink_present(struct dc_link *link);
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index de5124ce42cb..a86065c9a880 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3693,18 +3693,23
[Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy
Perf measurements rely on CPU and engine timestamps to correlate
events of interest across these time domains. Current mechanisms get
these timestamps separately and the calculated delta between these
timestamps lack enough accuracy.
To improve the accuracy of these time measurements to within a few us,
add a query that returns the engine and cpu timestamps captured as
close to each other as possible.
v2: (Tvrtko)
- document clock reference used
- return cpu timestamp always
- capture cpu time just before lower dword of cs timestamp
v3: (Chris)
- use uncore-rpm
- use __query_cs_timestamp helper
v4: (Lionel)
- Kernel perf subsytem allows users to specify the clock id to be used
in perf_event_open. This clock id is used by the perf subsystem to
return the appropriate cpu timestamp in perf events. Similarly, let
the user pass the clockid to this query so that cpu timestamp
corresponds to the clock id requested.
v5: (Tvrtko)
- Use normal ktime accessors instead of fast versions
- Add more uApi documentation
v6: (Lionel)
- Move switch out of spinlock
v7: (Chris)
- cs_timestamp is a misnomer, use cs_cycles instead
- return the cs cycle frequency as well in the query
v8:
- Add platform and engine specific checks
v9: (Lionel)
- Return 2 cpu timestamps in the query - captured before and after the
register read
v10: (Chris)
- Use local_clock() to measure time taken to read lower dword of
register and return it to user.
v11: (Jani)
- IS_GEN deprecated. User GRAPHICS_VER instead.
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_query.c | 145 ++
include/uapi/drm/i915_drm.h | 48 ++
2 files changed, 193 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_query.c
b/drivers/gpu/drm/i915/i915_query.c
index fed337ad7b68..2594b93901ac 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -6,6 +6,8 @@
#include
+#include "gt/intel_engine_pm.h"
+#include "gt/intel_engine_user.h"
#include "i915_drv.h"
#include "i915_perf.h"
#include "i915_query.h"
@@ -90,6 +92,148 @@ static int query_topology_info(struct drm_i915_private
*dev_priv,
return total_length;
}
+typedef u64 (*__ktime_func_t)(void);
+static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
+{
+ /*
+* Use logic same as the perf subsystem to allow user to select the
+* reference clock id to be used for timestamps.
+*/
+ switch (clk_id) {
+ case CLOCK_MONOTONIC:
+ return _get_ns;
+ case CLOCK_MONOTONIC_RAW:
+ return _get_raw_ns;
+ case CLOCK_REALTIME:
+ return _get_real_ns;
+ case CLOCK_BOOTTIME:
+ return _get_boottime_ns;
+ case CLOCK_TAI:
+ return _get_clocktai_ns;
+ default:
+ return NULL;
+ }
+}
+
+static inline int
+__read_timestamps(struct intel_uncore *uncore,
+ i915_reg_t lower_reg,
+ i915_reg_t upper_reg,
+ u64 *cs_ts,
+ u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+ u32 upper, lower, old_upper, loop = 0;
+
+ upper = intel_uncore_read_fw(uncore, upper_reg);
+ do {
+ cpu_ts[1] = local_clock();
+ cpu_ts[0] = cpu_clock();
+ lower = intel_uncore_read_fw(uncore, lower_reg);
+ cpu_ts[1] = local_clock() - cpu_ts[1];
+ old_upper = upper;
+ upper = intel_uncore_read_fw(uncore, upper_reg);
+ } while (upper != old_upper && loop++ < 2);
+
+ *cs_ts = (u64)upper << 32 | lower;
+
+ return 0;
+}
+
+static int
+__query_cs_cycles(struct intel_engine_cs *engine,
+ u64 *cs_ts, u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+ struct intel_uncore *uncore = engine->uncore;
+ enum forcewake_domains fw_domains;
+ u32 base = engine->mmio_base;
+ intel_wakeref_t wakeref;
+ int ret;
+
+ fw_domains = intel_uncore_forcewake_for_reg(uncore,
+ RING_TIMESTAMP(base),
+ FW_REG_READ);
+
+ with_intel_runtime_pm(uncore->rpm, wakeref) {
+ spin_lock_irq(>lock);
+ intel_uncore_forcewake_get__locked(uncore, fw_domains);
+
+ ret = __read_timestamps(uncore,
+ RING_TIMESTAMP(base),
+ RING_TIMESTAMP_UDW(base),
+ cs_ts,
+ cpu_ts,
+ cpu_clock);
+
+ intel_uncore_forcewake_put__locked(uncore, fw_domains);
+ spin_unlock_irq(>lock);
+ }
+
+ return ret;
+}
+
+static int
+query_cs_cycles(struct drm_i915_private *i915,
+ struct
[Intel-gfx] [PATCH 0/1] Add support for querying engine cycles
This is just a refresh of the earlier patch along with cover letter for the IGT testing. The query provides the engine cs cycles counter. v2: Use GRAPHICS_VER() instead of IG_GEN() v3: Add R-b to the patch Signed-off-by: Umesh Nerlige Ramappa Test-with: 20210421172046.65062-1-umesh.nerlige.rama...@intel.com Umesh Nerlige Ramappa (1): i915/query: Correlate engine and cpu timestamps with better accuracy drivers/gpu/drm/i915/i915_query.c | 145 ++ include/uapi/drm/i915_drm.h | 48 ++ 2 files changed, 193 insertions(+) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy
Perf measurements rely on CPU and engine timestamps to correlate
events of interest across these time domains. Current mechanisms get
these timestamps separately and the calculated delta between these
timestamps lack enough accuracy.
To improve the accuracy of these time measurements to within a few us,
add a query that returns the engine and cpu timestamps captured as
close to each other as possible.
v2: (Tvrtko)
- document clock reference used
- return cpu timestamp always
- capture cpu time just before lower dword of cs timestamp
v3: (Chris)
- use uncore-rpm
- use __query_cs_timestamp helper
v4: (Lionel)
- Kernel perf subsytem allows users to specify the clock id to be used
in perf_event_open. This clock id is used by the perf subsystem to
return the appropriate cpu timestamp in perf events. Similarly, let
the user pass the clockid to this query so that cpu timestamp
corresponds to the clock id requested.
v5: (Tvrtko)
- Use normal ktime accessors instead of fast versions
- Add more uApi documentation
v6: (Lionel)
- Move switch out of spinlock
v7: (Chris)
- cs_timestamp is a misnomer, use cs_cycles instead
- return the cs cycle frequency as well in the query
v8:
- Add platform and engine specific checks
v9: (Lionel)
- Return 2 cpu timestamps in the query - captured before and after the
register read
v10: (Chris)
- Use local_clock() to measure time taken to read lower dword of
register and return it to user.
v11: (Jani)
- IS_GEN deprecated. User GRAPHICS_VER instead.
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_query.c | 145 ++
include/uapi/drm/i915_drm.h | 48 ++
2 files changed, 193 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_query.c
b/drivers/gpu/drm/i915/i915_query.c
index fed337ad7b68..2594b93901ac 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -6,6 +6,8 @@
#include
+#include "gt/intel_engine_pm.h"
+#include "gt/intel_engine_user.h"
#include "i915_drv.h"
#include "i915_perf.h"
#include "i915_query.h"
@@ -90,6 +92,148 @@ static int query_topology_info(struct drm_i915_private
*dev_priv,
return total_length;
}
+typedef u64 (*__ktime_func_t)(void);
+static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
+{
+ /*
+* Use logic same as the perf subsystem to allow user to select the
+* reference clock id to be used for timestamps.
+*/
+ switch (clk_id) {
+ case CLOCK_MONOTONIC:
+ return _get_ns;
+ case CLOCK_MONOTONIC_RAW:
+ return _get_raw_ns;
+ case CLOCK_REALTIME:
+ return _get_real_ns;
+ case CLOCK_BOOTTIME:
+ return _get_boottime_ns;
+ case CLOCK_TAI:
+ return _get_clocktai_ns;
+ default:
+ return NULL;
+ }
+}
+
+static inline int
+__read_timestamps(struct intel_uncore *uncore,
+ i915_reg_t lower_reg,
+ i915_reg_t upper_reg,
+ u64 *cs_ts,
+ u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+ u32 upper, lower, old_upper, loop = 0;
+
+ upper = intel_uncore_read_fw(uncore, upper_reg);
+ do {
+ cpu_ts[1] = local_clock();
+ cpu_ts[0] = cpu_clock();
+ lower = intel_uncore_read_fw(uncore, lower_reg);
+ cpu_ts[1] = local_clock() - cpu_ts[1];
+ old_upper = upper;
+ upper = intel_uncore_read_fw(uncore, upper_reg);
+ } while (upper != old_upper && loop++ < 2);
+
+ *cs_ts = (u64)upper << 32 | lower;
+
+ return 0;
+}
+
+static int
+__query_cs_cycles(struct intel_engine_cs *engine,
+ u64 *cs_ts, u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+ struct intel_uncore *uncore = engine->uncore;
+ enum forcewake_domains fw_domains;
+ u32 base = engine->mmio_base;
+ intel_wakeref_t wakeref;
+ int ret;
+
+ fw_domains = intel_uncore_forcewake_for_reg(uncore,
+ RING_TIMESTAMP(base),
+ FW_REG_READ);
+
+ with_intel_runtime_pm(uncore->rpm, wakeref) {
+ spin_lock_irq(>lock);
+ intel_uncore_forcewake_get__locked(uncore, fw_domains);
+
+ ret = __read_timestamps(uncore,
+ RING_TIMESTAMP(base),
+ RING_TIMESTAMP_UDW(base),
+ cs_ts,
+ cpu_ts,
+ cpu_clock);
+
+ intel_uncore_forcewake_put__locked(uncore, fw_domains);
+ spin_unlock_irq(>lock);
+ }
+
+ return ret;
+}
+
+static int
+query_cs_cycles(struct drm_i915_private *i915,
+ struct drm_i915_query_item *query_item)
+{
+
[Intel-gfx] [PATCH 0/1] Add support for querying engine cycles
This is just a refresh of the earlier patch along with cover letter for the IGT testing. The query provides the engine cs cycles counter. v2: Use GRAPHICS_VER() instead of IG_GEN() Signed-off-by: Umesh Nerlige Ramappa Test-with: 20210421172046.65062-1-umesh.nerlige.rama...@intel.com Umesh Nerlige Ramappa (1): i915/query: Correlate engine and cpu timestamps with better accuracy drivers/gpu/drm/i915/i915_query.c | 145 ++ include/uapi/drm/i915_drm.h | 48 ++ 2 files changed, 193 insertions(+) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/drm_mst: Use Extended Base Receiver Capability DPCD space
== Series Details ==
Series: drm/drm_mst: Use Extended Base Receiver Capability DPCD space
URL : https://patchwork.freedesktop.org/series/89559/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
63120ebc08ec drm/drm_mst: Use Extended Base Receiver Capability DPCD space
-:22: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 2dcab875e763 ("Revert
"drm/dp_mst: Retrieve extended DPCD caps for topology manager"")'
#22:
This also reverts the 2dcab875e763 (Revert "drm/dp_mst: Retrieve
-:24: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit ad44c03208e4 ("drm/dp_mst:
Retrieve extended DPCD caps for topology manager")'
#24:
original commit ad44c03208e4 (drm/dp_mst: Retrieve extended DPCD caps
-:67: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#67: FILE: drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c:1897:
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
dc_link_settings *max_link_enc_cap)
-:69: WARNING:BRACES: braces {} are not necessary for single statement blocks
#69: FILE: drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c:1899:
+ if (max_link_enc_cap == NULL) {
+ DC_LOG_ERROR("%s: Could not return max link encoder caps",
__func__);
+ }
-:69: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written
"!max_link_enc_cap"
#69: FILE: drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c:1899:
+ if (max_link_enc_cap == NULL) {
-:95: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#95: FILE: drivers/gpu/drm/amd/display/dc/dc_link.h:349:
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
dc_link_settings *max_link_enc_cap);
-:127: WARNING:MINMAX: min() should probably be min_t(int, mgr->dpcd[1],
mgr->max_link_rate)
#127: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:3717:
+ link_rate = min((int)mgr->dpcd[1], mgr->max_link_rate);
-:177: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#177: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:5905:
+ if ((dpcd_ext[DP_DOWNSTREAMPORT_PRESENT] &
DP_DWN_STRM_PORT_PRESENT) &&
+ ((dpcd_ext[DP_DOWNSTREAMPORT_PRESENT] &
DP_DWN_STRM_PORT_TYPE_MASK)
-:202: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#202: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:963:
+ bios_max_link_rate/27000,
conn_base_id);
^
total: 2 errors, 4 warnings, 3 checks, 194 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/drm_mst: Use Extended Base Receiver Capability DPCD space
[AMD Official Use Only - Internal Distribution Only]
Hi,
drm/radeon/ part is still WIP (i.e. I doubt it'll work as is), but drm/i915 and
drm/nouveau/ should be OK. Would it be possible to test those while I'm
figuring out drm/radeon/ settings?
I'm pretty sure the follow-up change would affect only drm/radeon/, i.e. no
modifications in other parts of the code (unless found wrong in review, of
course).
I've tested drm/amd/ and it passes - I've confirmed the link and rate values
make it all the way to drm_dp_mst_topology_mgr_set_mst().
Thanks,
Nikola
-Original Message-
From: Cornij, Nikola
Sent: Tuesday, April 27, 2021 5:29 PM
To: amd-...@lists.freedesktop.org
Cc: Pillai, Aurabindo ; Lipski, Mikita
; ly...@redhat.com; ville.syrj...@linux.intel.com;
koba...@canonical.com; intel-gfx@lists.freedesktop.org; Cornij, Nikola
Subject: [PATCH] drm/drm_mst: Use Extended Base Receiver Capability DPCD space
[why]
DP 1.4a spec madates that if DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is set,
Extended Base Receiver Capability DPCD space must be used. Without doing that,
the three DPCD values that differ will be wrong, leading to incorrect or
limited functionality. MST link rate, for example, could have a lower value or
Synaptics quirk wouldn't work out well when Extended DPCD was not read,
resulting in no DSC for such hubs.
[how]
Modify MST topology manager to use the values from Extended DPCD where
applicable.
To prevent regression on the sources that have lower maximum link rate
capability than MAX_LINK_RATE from Extended DPCD, have the drivers supply
maximum lane count and rate at initialization time.
This also reverts the 2dcab875e763 (Revert "drm/dp_mst: Retrieve extended DPCD
caps for topology manager), brining the change back to the original commit
ad44c03208e4 (drm/dp_mst: Retrieve extended DPCD caps for topology manager).
Signed-off-by: Nikola Cornij
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 17 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 2 ++
drivers/gpu/drm/drm_dp_mst_topology.c | 33 ---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +++-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +-
drivers/gpu/drm/radeon/radeon_dp_mst.c| 3 ++
include/drm/drm_dp_mst_helper.h | 12 ++-
8 files changed, 66 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index d62460b69d95..d038e3185afb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -437,6 +437,8 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
struct amdgpu_dm_connector *aconnector,
int link_index)
{
+struct dc_link_settings max_link_enc_cap = {0};
+
aconnector->dm_dp_aux.aux.name =
kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d",
link_index);
@@ -450,6 +452,7 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
return;
+dc_link_dp_get_max_link_enc_cap(aconnector->dc_link,
+_link_enc_cap);
aconnector->mst_mgr.cbs = _mst_cbs;
drm_dp_mst_topology_mgr_init(
>mst_mgr,
@@ -457,6 +460,8 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
>dm_dp_aux.aux,
16,
4,
+max_link_enc_cap.lane_count,
+max_link_enc_cap.link_rate,
aconnector->connector_id);
drm_connector_attach_dp_subconnector_property(>base);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 3ff3d9e90983..18a0b84e9869 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1893,6 +1893,23 @@ bool dc_link_dp_sync_lt_end(struct dc_link *link, bool
link_down)
return true;
}
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
+dc_link_settings *max_link_enc_cap) {
+if (max_link_enc_cap == NULL) {
+DC_LOG_ERROR("%s: Could not return max link encoder caps", __func__);
+}
+
+if (link->link_enc->funcs->get_max_link_cap) {
+link->link_enc->funcs->get_max_link_cap(link->link_enc, max_link_enc_cap);
+return true;
+}
+
+DC_LOG_ERROR("%s: Max link encoder caps unknown", __func__);
+max_link_enc_cap->lane_count = 1;
+max_link_enc_cap->link_rate = 6;
+return false;
+}
+
static struct dc_link_settings get_max_link_cap(struct dc_link *link) {
struct dc_link_settings max_link_cap = {0}; diff --git
a/drivers/gpu/drm/amd/display/dc/dc_link.h
b/drivers/gpu/drm/amd/display/dc/dc_link.h
index 054bab45ee17..fc5622ffec3d 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -345,6 +345,8 @@ bool dc_link_dp_set_test_pattern(
const unsigned char *p_custom_pattern,
unsigned
Re: [Intel-gfx] [PATCH v2 00/13] Remove vfio_mdev.c, mdev_parent_ops and more
On Mon, 26 Apr 2021 17:00:02 -0300 Jason Gunthorpe wrote: > The mdev bus's core part for managing the lifecycle of devices is mostly > as one would expect for a driver core bus subsystem. > > However instead of having a normal 'struct device_driver' and binding the > actual mdev drivers through the standard driver core mechanisms it open > codes this with the struct mdev_parent_ops and provides a single driver > that shims between the VFIO core and the actual device driver. > > Make every one of the mdev drivers implement an actual struct mdev_driver > and directly call vfio_register_group_dev() in the probe() function for > the mdev. > > Squash what is left of the mdev_parent_ops into the mdev_driver and remap > create(), remove() and mdev_attr_groups to their driver core > equivalents. Arrange to bind the created mdev_device to the mdev_driver > that is provided by the end driver. > > The actual execution flow doesn't change much, eg what was > parent_ops->create is now device_driver->probe and it is called at almost > the exact same time - except under the normal control of the driver core. > > This allows deleting the entire mdev_drvdata, and tidying some of the > sysfs. Many places in the drivers start using container_of() > > This cleanly splits the mdev sysfs GUID lifecycle management stuff from > the vfio_device implementation part, the only VFIO special part of mdev > that remains is the mdev specific iommu intervention. > > v2: > - Keep && m in samples kconfig > - Restore accidently squashed removeal of vfio_mdev.c > - Remove indirections to call bus_register()/bus_unregister() > - Reflow long doc lines > v1: https://lore.kernel.org/r/0-v1-d88406ed308e+418-vfio3_...@nvidia.com > > Jason > > Cc: Leon Romanovsky > Cc: "Raj, Ashok" > Cc: Dan Williams > Cc: Max Gurtovoy > Cc: Christoph Hellwig > Cc: Tarun Gupta > Cc: Daniel Vetter > > > Jason Gunthorpe (13): > vfio/mdev: Remove CONFIG_VFIO_MDEV_DEVICE > vfio/mdev: Allow the mdev_parent_ops to specify the device driver to > bind > vfio/mtty: Convert to use vfio_register_group_dev() > vfio/mdpy: Convert to use vfio_register_group_dev() > vfio/mbochs: Convert to use vfio_register_group_dev() > vfio/ap_ops: Convert to use vfio_register_group_dev() > vfio/ccw: Convert to use vfio_register_group_dev() > vfio/gvt: Convert to use vfio_register_group_dev() > vfio/mdev: Remove vfio_mdev.c > vfio/mdev: Remove mdev_parent_ops dev_attr_groups > vfio/mdev: Remove mdev_parent_ops > vfio/mdev: Use the driver core to create the 'remove' file > vfio/mdev: Remove mdev drvdata It'd be really helpful if you could consistently copy at least one list, preferably one monitored by patchwork, for an entire series. The kvm list is missing patches 06 and 08. I can find the latter hopping over to the intel-gfx or dri-devel projects as I did for the last series, but 06 only copied linux-s390, where I need to use lore and can't find a patchwork. Thanks, Alex > > .../driver-api/vfio-mediated-device.rst | 56 ++--- > Documentation/s390/vfio-ap.rst| 1 - > arch/s390/Kconfig | 2 +- > drivers/gpu/drm/i915/Kconfig | 2 +- > drivers/gpu/drm/i915/gvt/kvmgt.c | 210 + > drivers/s390/cio/vfio_ccw_drv.c | 21 +- > drivers/s390/cio/vfio_ccw_ops.c | 136 ++- > drivers/s390/cio/vfio_ccw_private.h | 5 + > drivers/s390/crypto/vfio_ap_ops.c | 138 ++- > drivers/s390/crypto/vfio_ap_private.h | 2 + > drivers/vfio/mdev/Kconfig | 7 - > drivers/vfio/mdev/Makefile| 1 - > drivers/vfio/mdev/mdev_core.c | 67 -- > drivers/vfio/mdev/mdev_driver.c | 20 +- > drivers/vfio/mdev/mdev_private.h | 4 +- > drivers/vfio/mdev/mdev_sysfs.c| 37 ++- > drivers/vfio/mdev/vfio_mdev.c | 180 --- > drivers/vfio/vfio.c | 6 +- > include/linux/mdev.h | 86 +-- > include/linux/vfio.h | 4 + > samples/Kconfig | 6 +- > samples/vfio-mdev/mbochs.c| 166 +++-- > samples/vfio-mdev/mdpy.c | 162 +++-- > samples/vfio-mdev/mtty.c | 218 +++--- > 24 files changed, 651 insertions(+), 886 deletions(-) > delete mode 100644 drivers/vfio/mdev/vfio_mdev.c > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/drm_mst: Use Extended Base Receiver Capability DPCD space
[why]
DP 1.4a spec madates that if DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is
set, Extended Base Receiver Capability DPCD space must be used. Without
doing that, the three DPCD values that differ will be wrong, leading to
incorrect or limited functionality. MST link rate, for example, could
have a lower value or Synaptics quirk wouldn't work out well when
Extended DPCD was not read, resulting in no DSC for such hubs.
[how]
Modify MST topology manager to use the values from Extended DPCD where
applicable.
To prevent regression on the sources that have lower maximum link rate
capability than MAX_LINK_RATE from Extended DPCD, have the drivers
supply maximum lane count and rate at initialization time.
This also reverts the 2dcab875e763 (Revert "drm/dp_mst: Retrieve
extended DPCD caps for topology manager), brining the change back to the
original commit ad44c03208e4 (drm/dp_mst: Retrieve extended DPCD caps
for topology manager).
Signed-off-by: Nikola Cornij
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 17 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 2 ++
drivers/gpu/drm/drm_dp_mst_topology.c | 33 ---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +++-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +-
drivers/gpu/drm/radeon/radeon_dp_mst.c| 3 ++
include/drm/drm_dp_mst_helper.h | 12 ++-
8 files changed, 66 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index d62460b69d95..d038e3185afb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -437,6 +437,8 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
struct amdgpu_dm_connector *aconnector,
int link_index)
{
+ struct dc_link_settings max_link_enc_cap = {0};
+
aconnector->dm_dp_aux.aux.name =
kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d",
link_index);
@@ -450,6 +452,7 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
return;
+ dc_link_dp_get_max_link_enc_cap(aconnector->dc_link, _link_enc_cap);
aconnector->mst_mgr.cbs = _mst_cbs;
drm_dp_mst_topology_mgr_init(
>mst_mgr,
@@ -457,6 +460,8 @@ void amdgpu_dm_initialize_dp_connector(struct
amdgpu_display_manager *dm,
>dm_dp_aux.aux,
16,
4,
+ max_link_enc_cap.lane_count,
+ max_link_enc_cap.link_rate,
aconnector->connector_id);
drm_connector_attach_dp_subconnector_property(>base);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 3ff3d9e90983..18a0b84e9869 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1893,6 +1893,23 @@ bool dc_link_dp_sync_lt_end(struct dc_link *link, bool
link_down)
return true;
}
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
dc_link_settings *max_link_enc_cap)
+{
+ if (max_link_enc_cap == NULL) {
+ DC_LOG_ERROR("%s: Could not return max link encoder caps",
__func__);
+ }
+
+ if (link->link_enc->funcs->get_max_link_cap) {
+ link->link_enc->funcs->get_max_link_cap(link->link_enc,
max_link_enc_cap);
+ return true;
+ }
+
+ DC_LOG_ERROR("%s: Max link encoder caps unknown", __func__);
+ max_link_enc_cap->lane_count = 1;
+ max_link_enc_cap->link_rate = 6;
+ return false;
+}
+
static struct dc_link_settings get_max_link_cap(struct dc_link *link)
{
struct dc_link_settings max_link_cap = {0};
diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h
b/drivers/gpu/drm/amd/display/dc/dc_link.h
index 054bab45ee17..fc5622ffec3d 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -345,6 +345,8 @@ bool dc_link_dp_set_test_pattern(
const unsigned char *p_custom_pattern,
unsigned int cust_pattern_size);
+bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct
dc_link_settings *max_link_enc_cap);
+
void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
bool dc_link_is_dp_sink_present(struct dc_link *link);
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index de5124ce42cb..36e4155f048c 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3693,18 +3693,23 @@ int
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: move crtc and dpll declarations where they belong
== Series Details == Series: drm/i915/display: move crtc and dpll declarations where they belong URL : https://patchwork.freedesktop.org/series/89551/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10017_full -> Patchwork_20005_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_20005_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20005_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_20005_full: ### IGT changes ### Possible regressions * igt@gem_exec_whisper@basic-queues-priority: - shard-tglb: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-tglb1/igt@gem_exec_whis...@basic-queues-priority.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-tglb2/igt@gem_exec_whis...@basic-queues-priority.html * igt@i915_selftest@live@gt_mocs: - shard-skl: [PASS][3] -> [FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl10/igt@i915_selftest@live@gt_mocs.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-skl2/igt@i915_selftest@live@gt_mocs.html Known issues Here are the changes found in Patchwork_20005_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-apl: NOTRUN -> [DMESG-WARN][5] ([i915#3002]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-apl6/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@legacy-engines-cleanup: - shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-snb7/igt@gem_ctx_persiste...@legacy-engines-cleanup.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][7] -> [TIMEOUT][8] ([i915#2369] / [i915#2481] / [i915#3070]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-iclb7/igt@gem_...@unwedge-stress.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-iclb1/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-kbl: NOTRUN -> [FAIL][9] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-kbl7/igt@gem_exec_fair@basic-none-s...@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][10] -> [FAIL][11] ([i915#2842]) +2 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-kbl2/igt@gem_exec_fair@basic-n...@vcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-kbl2/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-iclb2/igt@gem_exec_fair@basic-n...@vcs1.html * igt@gem_exec_params@no-vebox: - shard-skl: NOTRUN -> [SKIP][13] ([fdo#109271]) +121 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-skl6/igt@gem_exec_par...@no-vebox.html * igt@gem_exec_reloc@basic-wide-active@vcs1: - shard-iclb: NOTRUN -> [FAIL][14] ([i915#2389]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-iclb2/igt@gem_exec_reloc@basic-wide-act...@vcs1.html * igt@gem_mmap_gtt@big-copy: - shard-glk: [PASS][15] -> [FAIL][16] ([i915#307]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-glk7/igt@gem_mmap_...@big-copy.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-glk6/igt@gem_mmap_...@big-copy.html * igt@gem_mmap_gtt@cpuset-basic-small-copy: - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#307]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-iclb3/igt@gem_mmap_...@cpuset-basic-small-copy.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-iclb3/igt@gem_mmap_...@cpuset-basic-small-copy.html * igt@gem_userptr_blits@input-checking: - shard-snb: NOTRUN -> [DMESG-WARN][19] ([i915#3002]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/shard-snb7/igt@gem_userptr_bl...@input-checking.html * igt@gem_workarounds@suspend-resume-context: - shard-skl: [PASS][20] -> [INCOMPLETE][21] ([i915#198]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl3/igt@gem_workarou...@suspend-resume-context.html [21]:
Re: [Intel-gfx] [PATCH] drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly
On Tue, Apr 27, 2021 at 02:45:20PM +0300, Jani Nikula wrote:
> Add separate intel_dp_hdcp.h to go with intel_dp_hdcp.c, and rename the
> init function intel_dp_hdcp_init() to follow naming where function
> prefix matches the file name.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 5 +++--
> drivers/gpu/drm/i915/display/intel_dp.h | 3 ---
> drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 5 +++--
> drivers/gpu/drm/i915/display/intel_dp_hdcp.h | 15 +++
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +++--
> 5 files changed, 24 insertions(+), 9 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_dp_hdcp.h
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4ad12dde5938..dfa7da928ae5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -49,10 +49,11 @@
> #include "intel_display_types.h"
> #include "intel_dp.h"
> #include "intel_dp_aux.h"
> +#include "intel_dp_hdcp.h"
> #include "intel_dp_link_training.h"
> #include "intel_dp_mst.h"
> -#include "intel_dpll.h"
> #include "intel_dpio_phy.h"
> +#include "intel_dpll.h"
> #include "intel_fifo_underrun.h"
> #include "intel_hdcp.h"
> #include "intel_hdmi.h"
> @@ -5348,7 +5349,7 @@ intel_dp_init_connector(struct intel_digital_port
> *dig_port,
> intel_dp_add_properties(intel_dp, connector);
>
> if (is_hdcp_supported(dev_priv, port) && !intel_dp_is_edp(intel_dp)) {
> - int ret = intel_dp_init_hdcp(dig_port, intel_connector);
> + int ret = intel_dp_hdcp_init(dig_port, intel_connector);
> if (ret)
> drm_dbg_kms(_priv->drm,
> "HDCP init failed, skipping.\n");
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 8db5062f6c4a..680631b5b437 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -119,9 +119,6 @@ void intel_ddi_update_pipe(struct intel_atomic_state
> *state,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state);
>
> -int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
> -struct intel_connector *intel_connector);
> -
> bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state);
> void intel_dp_sync_state(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 2dd9360bdf9a..d7c3a74b81a3 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -11,9 +11,10 @@
> #include
> #include
>
> -#include "intel_display_types.h"
> #include "intel_ddi.h"
> +#include "intel_display_types.h"
> #include "intel_dp.h"
> +#include "intel_dp_hdcp.h"
> #include "intel_hdcp.h"
>
> static unsigned int transcoder_to_stream_enc_status(enum transcoder
> cpu_transcoder)
> @@ -835,7 +836,7 @@ static const struct intel_hdcp_shim
> intel_dp_mst_hdcp_shim = {
> .protocol = HDCP_PROTOCOL_DP,
> };
>
> -int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
> +int intel_dp_hdcp_init(struct intel_digital_port *dig_port,
> struct intel_connector *intel_connector)
> {
> struct drm_device *dev = intel_connector->base.dev;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.h
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.h
> new file mode 100644
> index ..eff5ec5c5021
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2021 Intel Corporation
> + */
> +
> +#ifndef __INTEL_DP_HDCP___
> +#define __INTEL_DP_HDCP___
> +
> +struct intel_connector;
> +struct intel_digital_port;
> +
> +int intel_dp_hdcp_init(struct intel_digital_port *dig_port,
> +struct intel_connector *intel_connector);
> +
> +#endif /* __INTEL_DP_HDCP___ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 180f97cd74cb..3558bce242ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -34,11 +34,12 @@
> #include "intel_connector.h"
> #include "intel_ddi.h"
> #include "intel_display_types.h"
> -#include "intel_hotplug.h"
> #include "intel_dp.h"
> +#include "intel_dp_hdcp.h"
> #include "intel_dp_mst.h"
> #include "intel_dpio_phy.h"
> #include "intel_hdcp.h"
> +#include "intel_hotplug.h"
> #include "skl_scaler.h"
>
> static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> @@ -832,7 +833,7 @@
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly
== Series Details == Series: drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly URL : https://patchwork.freedesktop.org/series/89550/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10017_full -> Patchwork_20004_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_20004_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20004_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_20004_full: ### IGT changes ### Possible regressions * igt@kms_cursor_crc@pipe-d-cursor-128x128-random: - shard-tglb: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-tglb7/igt@kms_cursor_...@pipe-d-cursor-128x128-random.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-tglb5/igt@kms_cursor_...@pipe-d-cursor-128x128-random.html Warnings * igt@gem_ctx_ringsize@active@bcs0: - shard-skl: [INCOMPLETE][3] ([i915#3316]) -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl5/igt@gem_ctx_ringsize@act...@bcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl3/igt@gem_ctx_ringsize@act...@bcs0.html * igt@runner@aborted: - shard-skl: ([FAIL][5], [FAIL][6], [FAIL][7], [FAIL][8], [FAIL][9], [FAIL][10], [FAIL][11]) ([i915#1436] / [i915#1814] / [i915#2029] / [i915#2292] / [i915#2426] / [i915#2485] / [i915#3002]) -> ([FAIL][12], [FAIL][13], [FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17], [FAIL][18]) ([i915#1814] / [i915#2029] / [i915#3002]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl2/igt@run...@aborted.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl10/igt@run...@aborted.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl3/igt@run...@aborted.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl2/igt@run...@aborted.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl3/igt@run...@aborted.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl9/igt@run...@aborted.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-skl8/igt@run...@aborted.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl5/igt@run...@aborted.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl3/igt@run...@aborted.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl2/igt@run...@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl3/igt@run...@aborted.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl2/igt@run...@aborted.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl8/igt@run...@aborted.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl3/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_20004_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-queued: - shard-snb: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#1099]) +6 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-snb5/igt@gem_ctx_persiste...@legacy-engines-queued.html * igt@gem_ctx_persistence@many-contexts: - shard-tglb: [PASS][20] -> [FAIL][21] ([i915#2410]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-tglb8/igt@gem_ctx_persiste...@many-contexts.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-tglb6/igt@gem_ctx_persiste...@many-contexts.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][22] -> [TIMEOUT][23] ([i915#2369] / [i915#2481] / [i915#3070]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-iclb7/igt@gem_...@unwedge-stress.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-iclb7/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][24] ([i915#2846]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/shard-skl4/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [PASS][25] -> [FAIL][26] ([i915#2842]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html [26]:
Re: [Intel-gfx] [PATCH 2/2] Revert "vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV"
On Tue, 27 Apr 2021 13:31:39 +0800
Zhenyu Wang wrote:
> On 2021.04.26 14:40:17 -0300, Jason Gunthorpe wrote:
> > On Mon, Apr 26, 2021 at 10:55:55AM -0600, Alex Williamson wrote:
> > > On Mon, 26 Apr 2021 17:41:43 +0800
> > > Zhenyu Wang wrote:
> > >
> > > > This reverts commit 07e543f4f9d116d6b4240644191dee6388ef4a85.
> > >
> > > 07e543f4f9d1 ("vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV")
> > >
> > > > With all mdev handing moved to kvmgt module, only kvmgt should depend
> > > > on VFIO_MDEV. So revert this one.
> > > >
> > > > Cc: Arnd Bergmann
> > > > Cc: Jason Gunthorpe
> > > > Cc: Alex Williamson
> > > > Signed-off-by: Zhenyu Wang
> > > > drivers/gpu/drm/i915/Kconfig | 1 -
> > > > 1 file changed, 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
> > > > index 8f15bfb5faac..93f4d059fc89 100644
> > > > +++ b/drivers/gpu/drm/i915/Kconfig
> > > > @@ -102,7 +102,6 @@ config DRM_I915_GVT
> > > > bool "Enable Intel GVT-g graphics virtualization host support"
> > > > depends on DRM_I915
> > > > depends on 64BIT
> > > > - depends on VFIO_MDEV
> > > > default n
> > > > help
> > > > Choose this option if you want to enable Intel GVT-g graphics
> > > >
> > >
> > > I take it that this retracts your ack from
> > > https://lore.kernel.org/dri-devel/20210425032356.gh1...@zhen-hp.sh.intel.com/
> > > I'll drop it from consideration for pushing through my tree unless
> > > indicated otherwise. Thanks,
> >
> > In any event you'll need either Arnd's patch or this patch in your
> > tree to avoid randconfig problems.
> >
> > At this point I would take Arnd's and leave this to go next merge
> > window.
> >
>
> I'm ok with that, so won't block your vfio pull for merge window.
> I'll send gvt fixes pull in next RC.
Ok, I've pushed Arnd's fix to my next branch, I'll get it in for rc1.
Thanks,
Alex
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Remove reference to struct drm_device.pdev
== Series Details == Series: drm/i915/gem: Remove reference to struct drm_device.pdev URL : https://patchwork.freedesktop.org/series/89545/ State : success == Summary == CI Bug Log - changes from CI_DRM_10017_full -> Patchwork_20002_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_20002_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-cleanup: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +6 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-snb6/igt@gem_ctx_persiste...@legacy-engines-cleanup.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][2] -> [TIMEOUT][3] ([i915#2369] / [i915#2481] / [i915#3070]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-iclb7/igt@gem_...@unwedge-stress.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-iclb4/igt@gem_...@unwedge-stress.html * igt@gem_exec_create@madvise: - shard-glk: [PASS][4] -> [DMESG-WARN][5] ([i915#118] / [i915#95]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-glk7/igt@gem_exec_cre...@madvise.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-glk9/igt@gem_exec_cre...@madvise.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][6] ([i915#2846]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-skl1/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-kbl: NOTRUN -> [FAIL][7] ([i915#2842]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-kbl7/igt@gem_exec_fair@basic-none-s...@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][8] -> [FAIL][9] ([i915#2842]) +1 similar issue [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-kbl2/igt@gem_exec_fair@basic-n...@vcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][10] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-iclb2/igt@gem_exec_fair@basic-n...@vcs1.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][11] -> [FAIL][12] ([i915#2842]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-tglb8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-tglb8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_params@no-vebox: - shard-skl: NOTRUN -> [SKIP][13] ([fdo#109271]) +145 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-skl6/igt@gem_exec_par...@no-vebox.html * igt@gem_exec_reloc@basic-wide-active@vcs1: - shard-iclb: NOTRUN -> [FAIL][14] ([i915#2389]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-iclb2/igt@gem_exec_reloc@basic-wide-act...@vcs1.html * igt@gem_mmap_gtt@cpuset-big-copy-odd: - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#307]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/shard-iclb3/igt@gem_mmap_...@cpuset-big-copy-odd.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-iclb6/igt@gem_mmap_...@cpuset-big-copy-odd.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#3323]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-apl7/igt@gem_userptr_bl...@dmabuf-sync.html * igt@gem_userptr_blits@input-checking: - shard-apl: NOTRUN -> [DMESG-WARN][18] ([i915#3002]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-apl2/igt@gem_userptr_bl...@input-checking.html - shard-snb: NOTRUN -> [DMESG-WARN][19] ([i915#3002]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-snb6/igt@gem_userptr_bl...@input-checking.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [FAIL][20] ([i915#3318]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-apl7/igt@gem_userptr_bl...@vma-merge.html * igt@gen9_exec_parse@bb-large: - shard-skl: NOTRUN -> [FAIL][21] ([i915#3296]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-skl10/igt@gen9_exec_pa...@bb-large.html * igt@i915_pm_dc@dc6-psr: - shard-skl: NOTRUN -> [FAIL][22] ([i915#454]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/shard-skl6/igt@i915_pm...@dc6-psr.html * igt@kms_big_joiner@basic: - shard-skl:
Re: [Intel-gfx] [PATCH] drm/i915/display: move crtc and dpll declarations where they belong
On Tue, Apr 27, 2021 at 03:03:15PM +0300, Jani Nikula wrote: > The definitions are in the crtc and dpll files; move the declarations to > the corresponding headers. > > Signed-off-by: Jani Nikula Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/display/icl_dsi.c| 1 + > drivers/gpu/drm/i915/display/intel_crt.c | 1 + > drivers/gpu/drm/i915/display/intel_crtc.h | 3 +++ > drivers/gpu/drm/i915/display/intel_ddi.c | 1 + > drivers/gpu/drm/i915/display/intel_display.h | 6 -- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 1 + > drivers/gpu/drm/i915/display/intel_dpll.h | 5 + > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 1 + > drivers/gpu/drm/i915/display/intel_sdvo.c | 1 + > drivers/gpu/drm/i915/display/vlv_dsi.c| 1 + > drivers/gpu/drm/i915/i915_trace.h | 1 + > 11 files changed, 16 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c > b/drivers/gpu/drm/i915/display/icl_dsi.c > index 37e2d93d064c..781630a40f06 100644 > --- a/drivers/gpu/drm/i915/display/icl_dsi.c > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c > @@ -31,6 +31,7 @@ > #include "intel_atomic.h" > #include "intel_combo_phy.h" > #include "intel_connector.h" > +#include "intel_crtc.h" > #include "intel_ddi.h" > #include "intel_dsi.h" > #include "intel_panel.h" > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c > b/drivers/gpu/drm/i915/display/intel_crt.c > index c85092eaa5c2..1aac8bead4eb 100644 > --- a/drivers/gpu/drm/i915/display/intel_crt.c > +++ b/drivers/gpu/drm/i915/display/intel_crt.c > @@ -36,6 +36,7 @@ > #include "i915_drv.h" > #include "intel_connector.h" > #include "intel_crt.h" > +#include "intel_crtc.h" > #include "intel_ddi.h" > #include "intel_display_types.h" > #include "intel_fdi.h" > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.h > b/drivers/gpu/drm/i915/display/intel_crtc.h > index 08112d557411..a5ae997581aa 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc.h > +++ b/drivers/gpu/drm/i915/display/intel_crtc.h > @@ -18,5 +18,8 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum > pipe pipe); > struct intel_crtc_state *intel_crtc_state_alloc(struct intel_crtc *crtc); > void intel_crtc_state_reset(struct intel_crtc_state *crtc_state, > struct intel_crtc *crtc); > +u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc); > +void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state); > +void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state); > > #endif > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index f4249f087fa7..93d94d50b63d 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -31,6 +31,7 @@ > #include "intel_audio.h" > #include "intel_combo_phy.h" > #include "intel_connector.h" > +#include "intel_crtc.h" > #include "intel_ddi.h" > #include "intel_ddi_buf_trans.h" > #include "intel_display_types.h" > diff --git a/drivers/gpu/drm/i915/display/intel_display.h > b/drivers/gpu/drm/i915/display/intel_display.h > index b68bcd502206..fc0df4c63e8d 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -557,9 +557,6 @@ enum tc_port intel_port_to_tc(struct drm_i915_private > *dev_priv, > enum port port); > int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data, > struct drm_file *file_priv); > -u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc); > -void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state); > -void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state); > > int ilk_get_lanes_required(int target_clock, int link_bw, int bpp); > void vlv_wait_port_ready(struct drm_i915_private *dev_priv, > @@ -598,9 +595,6 @@ void intel_dp_get_m_n(struct intel_crtc *crtc, > void intel_dp_set_m_n(const struct intel_crtc_state *crtc_state, > enum link_m_n_set m_n); > int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n > *m_n); > -bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, > - struct dpll *best_clock); > -int chv_calc_dpll_params(int refclk, struct dpll *pll_clock); > > bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state); > void hsw_enable_ips(const struct intel_crtc_state *crtc_state); > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index 3558bce242ee..a30ca4380a06 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -32,6 +32,7 @@ > #include "intel_atomic.h" > #include "intel_audio.h" > #include "intel_connector.h" > +#include "intel_crtc.h" > #include "intel_ddi.h" > #include
Re: [Intel-gfx] [PATCH v3 15/16] drm/i915/pxp: black pixels on pxp disabled
On Tue, Apr 27, 2021 at 04:15:04PM +0530, Anshuman Gupta wrote:
> When protected sufaces has flipped and pxp session is disabled,
> display black pixels by using plane color CTM correction.
>
> v2:
> - Display black pixels in aysnc flip too.
We can't change any of that with an async flip.
>
> Cc: Ville Syrjälä
> Cc: Gaurav Kumar
> Cc: Shankar Uma
> Signed-off-by: Anshuman Gupta
> Signed-off-by: Daniele Ceraolo Spurio
> ---
> .../drm/i915/display/skl_universal_plane.c| 51 ++-
> drivers/gpu/drm/i915/i915_reg.h | 46 +
> 2 files changed, 95 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 74489217e580..a666b86df726 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -934,6 +934,33 @@ static u32 glk_plane_color_ctl(const struct
> intel_crtc_state *crtc_state,
> return plane_color_ctl;
> }
>
> +static void intel_load_plane_csc_black(struct intel_plane *intel_plane)
> +{
> + struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
> + enum pipe pipe = intel_plane->pipe;
> + enum plane_id plane = intel_plane->id;
> + u16 postoff = 0;
> +
> + drm_dbg_kms(_priv->drm, "plane color CTM to black %s:%d\n",
> + intel_plane->base.name, plane);
> + intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 0), 0);
> + intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 1), 0);
> +
> + intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 2), 0);
> + intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 3), 0);
> +
> + intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 4), 0);
> + intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 5), 0);
> +
> + intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 0), 0);
> + intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 1), 0);
> + intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 2), 0);
> +
> + intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 0), postoff);
> + intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 1), postoff);
> + intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 2), postoff);
> +}
> +
> static void
> skl_program_plane(struct intel_plane *plane,
> const struct intel_crtc_state *crtc_state,
> @@ -1039,13 +1066,22 @@ skl_program_plane(struct intel_plane *plane,
>*/
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr;
> + plane_color_ctl = intel_de_read_fw(dev_priv, PLANE_COLOR_CTL(pipe,
> plane_id));
>
> if (intel_pxp_is_active(_priv->gt.pxp) &&
> - plane_state->plane_decryption)
> + plane_state->plane_decryption) {
> plane_surf |= PLANE_SURF_DECRYPTION_ENABLED;
> - else
> + plane_color_ctl &= ~PLANE_COLOR_PLANE_CSC_ENABLE;
> + } else if (plane_state->plane_decryption) {
> + intel_load_plane_csc_black(plane);
> + plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
> + } else {
> plane_surf &= ~PLANE_SURF_DECRYPTION_ENABLED;
> + plane_color_ctl &= ~PLANE_COLOR_PLANE_CSC_ENABLE;
> + }
>
> + intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id),
> + plane_color_ctl);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), plane_surf);
>
> if (plane_state->scaler_id >= 0)
> @@ -1066,6 +1102,7 @@ skl_plane_async_flip(struct intel_plane *plane,
> enum pipe pipe = plane->pipe;
> u32 surf_addr = plane_state->view.color_plane[0].offset;
> u32 plane_ctl = plane_state->ctl;
> + u32 plane_color_ctl = 0;
>
> plane_ctl |= skl_plane_ctl_crtc(crtc_state);
>
> @@ -1075,6 +1112,16 @@ skl_plane_async_flip(struct intel_plane *plane,
> spin_lock_irqsave(_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> +
> + if (!intel_pxp_is_active(_priv->gt.pxp) &&
> + plane_state->plane_decryption) {
> + plane_color_ctl = intel_de_read_fw(dev_priv,
> PLANE_COLOR_CTL(pipe, plane_id));
> + intel_load_plane_csc_black(plane);
> + plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
> + intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id),
> + plane_color_ctl);
> + }
> +
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> intel_plane_ggtt_offset(plane_state) + surf_addr);
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index fbaf9199001d..0a4deca1098b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
Re: [Intel-gfx] [PATCH v3 14/16] drm/i915/pxp: Add plane decryption support
On Tue, Apr 27, 2021 at 04:13:11PM +0530, Anshuman Gupta wrote:
> Add support to enable/disable PLANE_SURF Decryption Request bit.
> It requires only to enable plane decryption support when following
> condition met.
> 1. PXP session is enabled.
> 2. Buffer object is protected.
>
> v2:
> - Used gen fb obj user_flags instead gem_object_metadata. [Krishna]
>
> v3:
> - intel_pxp_gem_object_status() API changes.
>
> v4: use intel_pxp_is_active (Daniele)
>
> v5: rebase and use the new protected object status checker (Daniele)
>
> v6: used plane state for plane_decryption to handle async flip
> as suggested by Ville.
>
> Cc: Bommu Krishnaiah
> Cc: Huang Sean Z
> Cc: Gaurav Kumar
> Cc: Ville Syrjälä
> Signed-off-by: Anshuman Gupta
> Signed-off-by: Daniele Ceraolo Spurio
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 3 ++
> drivers/gpu/drm/i915/display/intel_display.c | 5 +++
> .../drm/i915/display/intel_display_types.h| 3 ++
> .../drm/i915/display/skl_universal_plane.c| 32 +--
> .../drm/i915/display/skl_universal_plane.h| 1 +
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 6 files changed, 42 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 7bfb26ca0bd0..7057077a2b71 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -394,6 +394,7 @@ int intel_plane_atomic_check(struct intel_atomic_state
> *state,
> intel_atomic_get_old_crtc_state(state, crtc);
> struct intel_crtc_state *new_crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> + const struct drm_framebuffer *fb = new_plane_state->hw.fb;
>
> if (new_crtc_state && new_crtc_state->bigjoiner_slave) {
> struct intel_plane *master_plane =
> @@ -409,6 +410,8 @@ int intel_plane_atomic_check(struct intel_atomic_state
> *state,
> intel_plane_copy_uapi_to_hw_state(new_plane_state,
> new_master_plane_state,
> crtc);
> + new_plane_state->plane_decryption =
> + i915_gem_object_has_valid_protection(intel_fb_obj(fb));
>
> new_plane_state->uapi.visible = false;
> if (!new_crtc_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index a10e26380ef3..55ab2d0b92d8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9367,6 +9367,10 @@ static int intel_atomic_check_async(struct
> intel_atomic_state *state)
> drm_dbg_kms(>drm, "Color range cannot be changed
> in async flip\n");
> return -EINVAL;
> }
> +
> + /* plane decryption is allow to change only in synchronous
> flips */
> + if (old_plane_state->plane_decryption !=
> new_plane_state->plane_decryption)
> + return -EINVAL;
> }
>
> return 0;
> @@ -12350,6 +12354,7 @@ static void readout_plane_state(struct
> drm_i915_private *dev_priv)
>
> crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
> crtc_state = to_intel_crtc_state(crtc->base.state);
> + intel_plane_read_hw_decryption(plane_state);
We don't have real plane state readout anyway, so seems pointless.
>
> intel_set_plane_visible(crtc_state, plane_state, visible);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e2e707c4dff5..76b3bb64a36a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -617,6 +617,9 @@ struct intel_plane_state {
>
> struct intel_fb_view view;
>
> + /* Plane pxp decryption state */
> + bool plane_decryption;
> +
It's all about the plane, so the plane_ prefix is entirely redundant.
Could just call it "decrypt" I guess.
> /* plane control register */
> u32 ctl;
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 75d3ca3dbb37..74489217e580 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -17,6 +17,7 @@
> #include "intel_sprite.h"
> #include "skl_scaler.h"
> #include "skl_universal_plane.h"
> +#include "pxp/intel_pxp.h"
>
> static const u32 skl_plane_formats[] = {
> DRM_FORMAT_C8,
> @@ -956,7 +957,7 @@ skl_program_plane(struct intel_plane *plane,
> u8 alpha = plane_state->hw.alpha >> 8;
> u32 plane_color_ctl = 0, aux_dist = 0;
> unsigned long irqflags;
> - u32 keymsk, keymax;
> + u32 keymsk, keymax, plane_surf;
> u32
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Remove reference to struct drm_device.pdev (rev2)
== Series Details == Series: drm/i915/gem: Remove reference to struct drm_device.pdev (rev2) URL : https://patchwork.freedesktop.org/series/89545/ State : success == Summary == CI Bug Log - changes from CI_DRM_10018 -> Patchwork_20006 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/index.html Known issues Here are the changes found in Patchwork_20006 that come from known issues: ### IGT changes ### Issues hit * igt@kms_chamelium@hdmi-crc-fast: - fi-kbl-7500u: [PASS][1] -> [FAIL][2] ([i915#1372]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-kbl-7500u/igt@kms_chamel...@hdmi-crc-fast.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/fi-kbl-7500u/igt@kms_chamel...@hdmi-crc-fast.html Possible fixes * igt@gem_exec_suspend@basic-s3: - fi-tgl-u2: [FAIL][3] ([i915#1888]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html * igt@i915_selftest@live@gt_heartbeat: - fi-tgl-y: [DMESG-FAIL][5] ([i915#541]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10018/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html [i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541 Participating hosts (47 -> 42) -- Missing(5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus Build changes - * Linux: CI_DRM_10018 -> Patchwork_20006 CI-20190529: 20190529 CI_DRM_10018: 929a4fa94d31990066fd8be6a02f1a6c2b9f1d2d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_20006: 78c7c6f906c5b62dc10744ab1547dbb964368b57 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 78c7c6f906c5 drm/i915/gem: Remove reference to struct drm_device.pdev == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20006/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Remove reference to struct drm_device.pdev (rev2)
== Series Details == Series: drm/i915/gem: Remove reference to struct drm_device.pdev (rev2) URL : https://patchwork.freedesktop.org/series/89545/ State : warning == Summary == $ dim checkpatch origin/drm-tip 78c7c6f906c5 drm/i915/gem: Remove reference to struct drm_device.pdev -:35: ERROR:BAD_SIGN_OFF: Unrecognized email address: 'Michael J. Ruhl https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915/gem: Remove reference to struct drm_device.pdev
>-Original Message-
>From: Thomas Zimmermann
>Sent: Tuesday, April 27, 2021 1:49 PM
>To: jani.nik...@linux.intel.com; joonas.lahti...@linux.intel.com; Vivi, Rodrigo
>; airl...@linux.ie; dan...@ffwll.ch; Auld, Matthew
>; Ruhl, Michael J
>Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Thomas
>Zimmermann ; Nikula, Jani
>; Tang, CQ ; Tvrtko Ursulin
>; Liu, Xinyun ; Ursulin,
>Tvrtko ; Chris Wilson ;
>Mika Kuoppala ; Daniel Vetter
>; Maarten Lankhorst
>; Hellstrom, Thomas
>; Gustavo A. R. Silva
>; Dan Carpenter
>Subject: [PATCH v2] drm/i915/gem: Remove reference to struct
>drm_device.pdev
>
>References to struct drm_device.pdev should not be used any longer as
>the field will be moved into the struct's legacy section. Add a fix
>for the rsp commit.
Commit message match the patch.
Reviewed-by: Michael J. Ruhl v2:
> * fix an error in the commit description (Michael)
>
>Signed-off-by: Thomas Zimmermann
>Reviewed-by: Jani Nikula
>Fixes: d57d4a1daf5e ("drm/i915: Create stolen memory region from local
>memory")
>Cc: CQ Tang
>Cc: Matthew Auld
>Cc: Tvrtko Ursulin
>Cc: Xinyun Liu
>Cc: Tvrtko Ursulin
>Cc: Jani Nikula
>Cc: Joonas Lahtinen
>Cc: Rodrigo Vivi
>Cc: Chris Wilson
>Cc: Mika Kuoppala
>Cc: Daniel Vetter
>Cc: Maarten Lankhorst
>Cc: "Thomas Hellström"
>Cc: "Gustavo A. R. Silva"
>Cc: Dan Carpenter
>Cc: intel-gfx@lists.freedesktop.org
>---
> drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
>b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
>index c5b64b2400e8..e1a32672bbe8 100644
>--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
>+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
>@@ -773,7 +773,7 @@ struct intel_memory_region *
> i915_gem_stolen_lmem_setup(struct drm_i915_private *i915)
> {
> struct intel_uncore *uncore = >uncore;
>- struct pci_dev *pdev = i915->drm.pdev;
>+ struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> struct intel_memory_region *mem;
> resource_size_t io_start;
> resource_size_t lmem_size;
>--
>2.31.1
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/gem: Remove reference to struct drm_device.pdev
References to struct drm_device.pdev should not be used any longer as
the field will be moved into the struct's legacy section. Add a fix
for the rsp commit.
v2:
* fix an error in the commit description (Michael)
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jani Nikula
Fixes: d57d4a1daf5e ("drm/i915: Create stolen memory region from local memory")
Cc: CQ Tang
Cc: Matthew Auld
Cc: Tvrtko Ursulin
Cc: Xinyun Liu
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Cc: "Thomas Hellström"
Cc: "Gustavo A. R. Silva"
Cc: Dan Carpenter
Cc: intel-gfx@lists.freedesktop.org
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index c5b64b2400e8..e1a32672bbe8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -773,7 +773,7 @@ struct intel_memory_region *
i915_gem_stolen_lmem_setup(struct drm_i915_private *i915)
{
struct intel_uncore *uncore = >uncore;
- struct pci_dev *pdev = i915->drm.pdev;
+ struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
struct intel_memory_region *mem;
resource_size_t io_start;
resource_size_t lmem_size;
--
2.31.1
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/gem: Remove reference to struct drm_device.pdev
Am 27.04.21 um 16:39 schrieb Ruhl, Michael J:
-Original Message-
From: dri-devel On Behalf Of
Thomas Zimmermann
Sent: Tuesday, April 27, 2021 7:08 AM
To: jani.nik...@linux.intel.com; joonas.lahti...@linux.intel.com; Vivi, Rodrigo
; airl...@linux.ie; dan...@ffwll.ch; Auld, Matthew
Cc: Tvrtko Ursulin ; Ursulin, Tvrtko
; Mika Kuoppala
; intel-gfx@lists.freedesktop.org; Gustavo
A. R. Silva ; dri-de...@lists.freedesktop.org; Chris
Wilson ; Tang, CQ ; Hellstrom,
Thomas ; Thomas Zimmermann
; Daniel Vetter ; Liu,
Xinyun ; Dan Carpenter
Subject: [PATCH] drm/i915/gem: Remove reference to struct
drm_device.pdev
References to struct drm_device.pdev should be used any longer as
should not be used
^^^
?
Oh, indeed.
m
the field will be moved into the struct's legacy section. Add a fix
for the rsp commit.
Signed-off-by: Thomas Zimmermann
Fixes: d57d4a1daf5e ("drm/i915: Create stolen memory region from local
memory")
Cc: CQ Tang
Cc: Matthew Auld
Cc: Tvrtko Ursulin
Cc: Xinyun Liu
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Cc: "Thomas Hellström"
Cc: "Gustavo A. R. Silva"
Cc: Dan Carpenter
Cc: intel-gfx@lists.freedesktop.org
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index c5b64b2400e8..e1a32672bbe8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -773,7 +773,7 @@ struct intel_memory_region *
i915_gem_stolen_lmem_setup(struct drm_i915_private *i915)
{
struct intel_uncore *uncore = >uncore;
- struct pci_dev *pdev = i915->drm.pdev;
+ struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
struct intel_memory_region *mem;
resource_size_t io_start;
resource_size_t lmem_size;
--
2.31.1
___
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___
dri-devel mailing list
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
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Description: OpenPGP digital signature
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Simplify userptr locking (rev2)
== Series Details == Series: drm/i915: Simplify userptr locking (rev2) URL : https://patchwork.freedesktop.org/series/88974/ State : success == Summary == CI Bug Log - changes from CI_DRM_10016_full -> Patchwork_2_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_2_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@engines-mixed: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-snb2/igt@gem_ctx_persiste...@engines-mixed.html * igt@gem_ctx_ringsize@idle@bcs0: - shard-skl: NOTRUN -> [INCOMPLETE][2] ([i915#3316]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-skl7/igt@gem_ctx_ringsize@i...@bcs0.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][3] ([i915#2846]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-skl9/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [PASS][4] -> [FAIL][5] ([i915#2842]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/shard-tglb5/igt@gem_exec_fair@basic-f...@rcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/shard-iclb4/igt@gem_exec_fair@basic-none-sh...@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-iclb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/shard-kbl3/igt@gem_exec_fair@basic-n...@vcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/shard-glk2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-glk4/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-snb: NOTRUN -> [FAIL][12] ([i915#2389]) +2 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-snb6/igt@gem_exec_reloc@basic-wide-act...@rcs0.html * igt@gem_mmap_gtt@big-copy-xy: - shard-iclb: [PASS][13] -> [FAIL][14] ([i915#307]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/shard-iclb5/igt@gem_mmap_...@big-copy-xy.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-iclb2/igt@gem_mmap_...@big-copy-xy.html * igt@gem_pread@exhaustion: - shard-skl: NOTRUN -> [WARN][15] ([i915#2658]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-skl10/igt@gem_pr...@exhaustion.html * igt@gem_pwrite@basic-exhaustion: - shard-snb: NOTRUN -> [WARN][16] ([i915#2658]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-snb2/igt@gem_pwr...@basic-exhaustion.html * igt@gem_vm_create@destroy-race: - shard-tglb: [PASS][17] -> [TIMEOUT][18] ([i915#2795]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/shard-tglb1/igt@gem_vm_cre...@destroy-race.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-tglb8/igt@gem_vm_cre...@destroy-race.html * igt@gen9_exec_parse@allowed-all: - shard-kbl: [PASS][19] -> [DMESG-WARN][20] ([i915#1436] / [i915#716]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/shard-kbl2/igt@gen9_exec_pa...@allowed-all.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-kbl2/igt@gen9_exec_pa...@allowed-all.html * igt@gen9_exec_parse@bb-large: - shard-skl: NOTRUN -> [FAIL][21] ([i915#3296]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-skl8/igt@gen9_exec_pa...@bb-large.html * igt@i915_selftest@live@hangcheck: - shard-snb: NOTRUN -> [INCOMPLETE][22] ([i915#2782]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-snb7/igt@i915_selftest@l...@hangcheck.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-skl: NOTRUN -> [FAIL][23] ([i915#2521]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/shard-skl7/igt@kms_async_fl...@alternate-sync-async-flip.html * igt@kms_ccs@pipe-c-random-ccs-data: - shard-skl:
Re: [Intel-gfx] [PATCH v2 0/9] drm: Add privacy-screen class and connector properties
Hi, >>> There now is GNOME userspace code using the new properties: >>> https://hackmd.io/@3v1n0/rkyIy3BOw >> >> Thanks for working on this. >> >> Can these patches be submitted as merge requests against the upstream >> projects? It would be nice to get some feedback from the maintainers, >> and be able to easily leave some comments there as well. FYI, I've discussed with other uptream developers about these while doing them, and afterwards on how to improve them. > I guess Marco was waiting for the kernel bits too land before > submitting these, > but I agree that it would probably be good to have these submitted > now, we > can mark them as WIP to avoid them getting merged before the kernel side > is finalized. I'll submit them in the next days once I'm done with the refactor I've in mind, and will notify the list. And for sure we can keep them in WIP till the final bits aren't completed. Cheers ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 000/190] Revertion of all of the umn.edu commits
On Wed, Apr 21, 2021 at 07:35:44PM +0200, Daniel Vetter wrote: > On Wed, Apr 21, 2021 at 3:01 PM Greg Kroah-Hartman > wrote: > > > > I have been meaning to do this for a while, but recent events have > > finally forced me to do so. > > > > Commits from @umn.edu addresses have been found to be submitted in "bad > > faith" to try to test the kernel community's ability to review "known > > malicious" changes. The result of these submissions can be found in a > > paper published at the 42nd IEEE Symposium on Security and Privacy > > entitled, "Open Source Insecurity: Stealthily Introducing > > Vulnerabilities via Hypocrite Commits" written by Qiushi Wu (University > > of Minnesota) and Kangjie Lu (University of Minnesota). > > > > Because of this, all submissions from this group must be reverted from > > the kernel tree and will need to be re-reviewed again to determine if > > they actually are a valid fix. Until that work is complete, remove this > > change to ensure that no problems are being introduced into the > > codebase. > > > > This patchset has the "easy" reverts, there are 68 remaining ones that > > need to be manually reviewed. Some of them are not able to be reverted > > as they already have been reverted, or fixed up with follow-on patches > > as they were determined to be invalid. Proof that these submissions > > were almost universally wrong. > > Will you take care of these remaining ones in subsequent patches too? Yes I will. > > I will be working with some other kernel developers to determine if any > > of these reverts were actually valid changes, were actually valid, and > > if so, will resubmit them properly later. For now, it's better to be > > safe. > > > > I'll take this through my tree, so no need for any maintainer to worry > > about this, but they should be aware that future submissions from anyone > > with a umn.edu address should be by default-rejected unless otherwise > > determined to actually be a valid fix (i.e. they provide proof and you > > can verify it, but really, why waste your time doing that extra work?) > > > > thanks, > > > > greg k-h > > > > Greg Kroah-Hartman (190): > > Revert "net/rds: Avoid potential use after free in > > rds_send_remove_from_sock" > > Revert "media: st-delta: Fix reference count leak in delta_run_work" > > Revert "media: sti: Fix reference count leaks" > > Revert "media: exynos4-is: Fix several reference count leaks due to > > pm_runtime_get_sync" > > Revert "media: exynos4-is: Fix a reference count leak due to > > pm_runtime_get_sync" > > Revert "media: exynos4-is: Fix a reference count leak" > > Revert "media: ti-vpe: Fix a missing check and reference count leak" > > Revert "media: stm32-dcmi: Fix a reference count leak" > > Revert "media: s5p-mfc: Fix a reference count leak" > > Revert "media: camss: Fix a reference count leak." > > Revert "media: platform: fcp: Fix a reference count leak." > > Revert "media: rockchip/rga: Fix a reference count leak." > > Revert "media: rcar-vin: Fix a reference count leak." > > Revert "media: rcar-vin: Fix a reference count leak." > > Revert "firmware: Fix a reference count leak." > > Revert "drm/nouveau: fix reference count leak in > > nouveau_debugfs_strap_peek" > > Revert "drm/nouveau: fix reference count leak in > > nv50_disp_atomic_commit" > > Revert "drm/nouveau: fix multiple instances of reference count leaks" > > Revert "drm/nouveau/drm/noveau: fix reference count leak in > > nouveau_fbcon_open" > > Revert "PCI: Fix pci_create_slot() reference count leak" > > Revert "omapfb: fix multiple reference count leaks due to > > pm_runtime_get_sync" > > Revert "drm/radeon: Fix reference count leaks caused by > > pm_runtime_get_sync" > > Revert "drm/radeon: fix multiple reference count leak" > > Revert "drm/amdkfd: Fix reference count leaks." > > I didn't review these carefully, but from a quick look they all seem > rather inconsequental. Either error paths that are very unlikely, or > drivers which are very dead (looking at the entire list, not just what > you reverted here). > > Acked-by: Daniel Vetter Thanks for the quick review, I'm now going over them all again to see if they are valid or not, some of the pm reference count stuff all looks correct. Others not at all. > Also adding drm maintainers/lists, those aren't all on your cc it > seems. I will also forward this to fd.o sitewranglers as abuse of our > infrastructure, it's for community collaboration, not for inflicting > experiments on unconsenting subjects. Much appreciated. greg k-h ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] PR ADL-P DMC
Sending PR for ADL-P DMC for CI to pull the changes: The following changes since commit fa0efeff4894e36b9c3964376f2c99fae101d147: linux-firmware: Update firmware file for Intel Bluetooth AX210 (2021-04-26 07:00:56 -0400) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-firmware adlp_firmware for you to fetch changes up to 726645d0915c8506b491db23d3103f0027055ac5: i915: Add ADL-P DMC Support (2021-04-27 09:32:13 -0700) Anusha Srivatsa (1): i915: Add ADL-P DMC Support i915/adlp_dmc_ver2_09.bin | Bin 0 -> 44636 bytes i915/adlp_dmc_ver2_10.bin | Bin 0 -> 44616 bytes 2 files changed, 0 insertions(+), 0 deletions(-) create mode 100644 i915/adlp_dmc_ver2_09.bin create mode 100644 i915/adlp_dmc_ver2_10.bin Anusha ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Stop using crtc->index as the pipe
On Tue, 2021-04-27 at 10:51 +0300, Jani Nikula wrote: > On Tue, 27 Apr 2021, Ville Syrjälä wrote: > > On Tue, Apr 27, 2021 at 12:07:21AM +, Souza, Jose wrote: > > > On Mon, 2021-04-26 at 21:56 +0300, Ville Syrjala wrote: > > > > From: Ville Syrjälä > > > > > > > > The pipe crc code slipped theough the net when we tried to > > > > eliminate all crtc->index==pipe abuses. Remedy that. > > > > > > > > And while at it get rid of those nasty intel_crtc+drm_crtc > > > > pointer aliases. > > > > > > intel_crtc is broadly used, > > > > Not anymore. We've cleaned up almost all of it. Looks like only ~40 left > > vs. ~600 the other name. Probably a good time to clean up the rest > > finally. > > Ack. > > > > > > also we have the same for other structs like intel_connector, in my > > > option that is better than _crtc x crtc. > > > > The _crtc is explicitly ugly to make sure people leave it well > > alone. Otherwise we can never get rid of these horrible aliasing > > pointers. It should only make an appearance in core/helper vfuncs > > and such. At some point I was even pondering some kind of macro > > magic to create semi-automatic wrappers so that we could always > > just use the intel_ types in our vfunc implementations. > > > > intel_crtc we've cleaned up the most I think, intel_encoder a bit less > > perhaps, and intel_connector not really at all. Hence you see a lot more > > of intel_connector floating around. We also don't usually use the intel_ > > types for connector states. Mainly because most of the time you don't > > need anyting from there. > > Ack. Fair enough then Reviewed-by: José Roberto de Souza > > > BR, > Jani. > > > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/8] drm/arm: Don't set allow_fb_modifiers explicitly
== Series Details == Series: series starting with [1/8] drm/arm: Don't set allow_fb_modifiers explicitly URL : https://patchwork.freedesktop.org/series/89531/ State : success == Summary == CI Bug Log - changes from CI_DRM_10015_full -> Patchwork_1_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_1_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-apl: NOTRUN -> [DMESG-WARN][1] ([i915#3002]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-apl2/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@engines-queued: - shard-snb: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099]) +1 similar issue [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-snb7/igt@gem_ctx_persiste...@engines-queued.html * igt@gem_ctx_ringsize@idle@bcs0: - shard-skl: NOTRUN -> [INCOMPLETE][3] ([i915#3316]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-skl1/igt@gem_ctx_ringsize@i...@bcs0.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][4] ([i915#2846]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-skl7/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-kbl: NOTRUN -> [FAIL][5] ([i915#2842]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-kbl6/igt@gem_exec_fair@basic-none-s...@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-glk: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10015/shard-glk7/igt@gem_exec_fair@basic-pace-s...@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-glk6/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_reloc@basic-wide-active@bcs0: - shard-apl: NOTRUN -> [FAIL][8] ([i915#2389]) +3 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-apl2/igt@gem_exec_reloc@basic-wide-act...@bcs0.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-snb: NOTRUN -> [FAIL][9] ([i915#2389]) +2 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-snb2/igt@gem_exec_reloc@basic-wide-act...@rcs0.html * igt@gem_mmap_gtt@cpuset-medium-copy-odd: - shard-skl: [PASS][10] -> [FAIL][11] ([i915#307]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10015/shard-skl1/igt@gem_mmap_...@cpuset-medium-copy-odd.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-skl1/igt@gem_mmap_...@cpuset-medium-copy-odd.html * igt@gem_pread@exhaustion: - shard-skl: NOTRUN -> [WARN][12] ([i915#2658]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-skl6/igt@gem_pr...@exhaustion.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#3323]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-apl1/igt@gem_userptr_bl...@dmabuf-sync.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [FAIL][14] ([i915#3318]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-apl1/igt@gem_userptr_bl...@vma-merge.html * igt@gen9_exec_parse@bb-large: - shard-skl: NOTRUN -> [FAIL][15] ([i915#3296]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-skl8/igt@gen9_exec_pa...@bb-large.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-skl: NOTRUN -> [FAIL][16] ([i915#2521]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-skl1/igt@kms_async_fl...@alternate-sync-async-flip.html * igt@kms_big_joiner@invalid-modeset: - shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#2705]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-apl2/igt@kms_big_joi...@invalid-modeset.html * igt@kms_ccs@pipe-c-missing-ccs-buffer: - shard-skl: NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111304]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-skl7/igt@kms_...@pipe-c-missing-ccs-buffer.html * igt@kms_chamelium@dp-mode-timings: - shard-apl: NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +31 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/shard-apl1/igt@kms_chamel...@dp-mode-timings.html * igt@kms_color@pipe-c-ctm-green-to-red: - shard-skl: [PASS][20] -> [DMESG-WARN][21] ([i915#1982]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10015/shard-skl3/igt@kms_co...@pipe-c-ctm-green-to-red.html [21]:
Re: [Intel-gfx] [PATCH 2/8] drm/arm/malidp: Always list modifiers
On Tue, Apr 27, 2021 at 11:20:12AM +0200, Daniel Vetter wrote:
> Even when all we support is linear, make that explicit. Otherwise the
> uapi is rather confusing.
:)
>
> Cc: sta...@vger.kernel.org
> Cc: Pekka Paalanen
> Cc: Liviu Dudau
> Cc: Brian Starkey
> Signed-off-by: Daniel Vetter
Acked-by: Liviu Dudau
Best regards,
Liviu
> ---
> drivers/gpu/drm/arm/malidp_planes.c | 9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/arm/malidp_planes.c
> b/drivers/gpu/drm/arm/malidp_planes.c
> index ddbba67f0283..8c2ab3d653b7 100644
> --- a/drivers/gpu/drm/arm/malidp_planes.c
> +++ b/drivers/gpu/drm/arm/malidp_planes.c
> @@ -927,6 +927,11 @@ static const struct drm_plane_helper_funcs
> malidp_de_plane_helper_funcs = {
> .atomic_disable = malidp_de_plane_disable,
> };
>
> +static const uint64_t linear_only_modifiers[] = {
> + DRM_FORMAT_MOD_LINEAR,
> + DRM_FORMAT_MOD_INVALID
> +};
> +
> int malidp_de_planes_init(struct drm_device *drm)
> {
> struct malidp_drm *malidp = drm->dev_private;
> @@ -990,8 +995,8 @@ int malidp_de_planes_init(struct drm_device *drm)
>*/
> ret = drm_universal_plane_init(drm, >base, crtcs,
> _de_plane_funcs, formats, n,
> - (id == DE_SMART) ? NULL : modifiers, plane_type,
> - NULL);
> + (id == DE_SMART) ? linear_only_modifiers :
> modifiers,
> + plane_type, NULL);
>
> if (ret < 0)
> goto cleanup;
> --
> 2.31.0
>
--
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---
¯\_(ツ)_/¯
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Re: [Intel-gfx] [PATCH] drm: i915: fix build when ACPI is disabled and BACKLIGHT=m
On 4/27/21 1:03 AM, Jani Nikula wrote:
> On Mon, 26 Apr 2021, Randy Dunlap wrote:
>> When CONFIG_DRM_I915=y, CONFIG_ACPI is not set, and
>> CONFIG_BACKLIGHT_CLASS_DEVICE=m, not due to I915 config,
>> there are build errors trying to reference backlight_device_{un}register().
>>
>> Changing the use of IS_ENABLED() to IS_REACHABLE() in intel_panel.[ch]
>> fixes this.
>
> I feel like a broken record...
Thanks! :)
I'll leave it b0rken as well.
> CONFIG_DRM_I915=y and CONFIG_BACKLIGHT_CLASS_DEVICE=m is an invalid
> configuration. The patch at hand just silently hides the problem,
> leaving you without backlight.
>
> i915 should *depend* on backlight, not select it. It would express the
> dependency without chances for invalid configuration.
>
> However, i915 alone can't depend on backlight, all users of backlight
> should depend on backlight, not select it. Otherwise, you end up with
> other configuration problems, circular dependencies and
> whatnot. Everyone should change. See also (*) why select is not a good
> idea here.
>
> I've sent patches to this effect before, got rejected, and the same
> thing gets repeated ad infinitum.
>
> Accepting this patch would stop the inflow of these reports and similar
> patches, but it does not fix the root cause. It just sweeps the problem
> under the rug.
>
>
> BR,
> Jani.
>
> (*) Documentation/kbuild/kconfig-language.rst:
>
> select should be used with care. select will force
> a symbol to a value without visiting the dependencies.
> By abusing select you are able to select a symbol FOO even
> if FOO depends on BAR that is not set.
> In general use select only for non-visible symbols
> (no prompts anywhere) and for symbols with no dependencies.
> That will limit the usefulness but on the other hand avoid
> the illegal configurations all over.
Yes, I'm well aware of that.
ta.
--
~Randy
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Re: [Intel-gfx] [PATCH 1/8] drm/arm: Don't set allow_fb_modifiers explicitly
On Tue, Apr 27, 2021 at 11:20:11AM +0200, Daniel Vetter wrote: > Since > > commit 890880ddfdbe256083170866e49c87618b706ac7 > Author: Paul Kocialkowski > Date: Fri Jan 4 09:56:10 2019 +0100 > > drm: Auto-set allow_fb_modifiers when given modifiers at plane init > > this is done automatically as part of plane init, if drivers set the > modifier list correctly. Which is the case here for both komeda and > malidp. > > Signed-off-by: Daniel Vetter > Cc: "James (Qian) Wang" > Cc: Liviu Dudau Acked-by: Liviu Dudau Best regards, Liviu > Cc: Mihail Atanassov > Cc: Brian Starkey > --- > drivers/gpu/drm/arm/display/komeda/komeda_kms.c | 1 - > drivers/gpu/drm/arm/malidp_drv.c| 1 - > 2 files changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > index aeda4e5ec4f4..ff45f23f3d56 100644 > --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > @@ -247,7 +247,6 @@ static void komeda_kms_mode_config_init(struct > komeda_kms_dev *kms, > config->min_height = 0; > config->max_width = 4096; > config->max_height = 4096; > - config->allow_fb_modifiers = true; > > config->funcs = _mode_config_funcs; > config->helper_private = _mode_config_helpers; > diff --git a/drivers/gpu/drm/arm/malidp_drv.c > b/drivers/gpu/drm/arm/malidp_drv.c > index d83c7366b348..de59f3302516 100644 > --- a/drivers/gpu/drm/arm/malidp_drv.c > +++ b/drivers/gpu/drm/arm/malidp_drv.c > @@ -403,7 +403,6 @@ static int malidp_init(struct drm_device *drm) > drm->mode_config.max_height = hwdev->max_line_size; > drm->mode_config.funcs = _mode_config_funcs; > drm->mode_config.helper_private = _mode_config_helpers; > - drm->mode_config.allow_fb_modifiers = true; > > ret = malidp_crtc_init(drm); > if (ret) > -- > 2.31.0 > -- | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --- ¯\_(ツ)_/¯ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: move crtc and dpll declarations where they belong
== Series Details ==
Series: drm/i915/display: move crtc and dpll declarations where they belong
URL : https://patchwork.freedesktop.org/series/89551/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10017 -> Patchwork_20005
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20005:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@amdgpu/amd_cs_nop@nop-gfx0:
- {fi-tgl-1115g4}:NOTRUN -> [SKIP][1] +25 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/fi-tgl-1115g4/igt@amdgpu/amd_cs_...@nop-gfx0.html
* igt@gem_exec_suspend@basic-s0:
- {fi-tgl-1115g4}:NOTRUN -> [FAIL][2]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html
Known issues
Here are the changes found in Patchwork_20005 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_prime@amd-to-i915:
- fi-tgl-y: NOTRUN -> [SKIP][3] ([fdo#109315] / [i915#2575])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/fi-tgl-y/igt@amdgpu/amd_pr...@amd-to-i915.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
[i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
Participating hosts (46 -> 41)
--
Additional (1): fi-tgl-1115g4
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-icl-y
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_10017 -> Patchwork_20005
CI-20190529: 20190529
CI_DRM_10017: 90fd4f5c1834f556c119cba5b6c41fe90683b912 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20005: c75032319fb208810e5e1f7e2f2347ceecb79fbf @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c75032319fb2 drm/i915/display: move crtc and dpll declarations where they belong
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20005/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 4/7] drm/i915/gtt/dgfx: place the PD in LMEM
On 27/04/2021 09:54, Matthew Auld wrote:
It's a requirement that for dgfx we place all the paging structures in
device local-memory.
v2: use i915_coherent_map_type()
v3: improve the shared dma-resv object comment
Signed-off-by: Matthew Auld
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 5 -
drivers/gpu/drm/i915/gt/intel_gtt.c | 30 +---
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
3 files changed, 32 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index f83496836f0f..11fb5df45a0f 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -712,7 +712,10 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt)
*/
ppgtt->vm.has_read_only = !IS_GEN_RANGE(gt->i915, 11, 12);
- ppgtt->vm.alloc_pt_dma = alloc_pt_dma;
+ if (HAS_LMEM(gt->i915))
+ ppgtt->vm.alloc_pt_dma = alloc_pt_lmem;
+ else
+ ppgtt->vm.alloc_pt_dma = alloc_pt_dma;
err = gen8_init_scratch(>vm);
if (err)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
b/drivers/gpu/drm/i915/gt/intel_gtt.c
index d386b89e2758..061c39d2ad51 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -7,10 +7,26 @@
#include
+#include "gem/i915_gem_lmem.h"
#include "i915_trace.h"
#include "intel_gt.h"
#include "intel_gtt.h"
+struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space *vm, int sz)
+{
+ struct drm_i915_gem_object *obj;
+
+ obj = i915_gem_object_create_lmem(vm->i915, sz, 0);
+ /*
+* Ensure all paging structures for this vm share the same dma-resv
+* object underneath, with the idea that one object_lock() will lock
+* them all at once.
Okay but I am still missing the part about why is this beneficial and
not a downside. I suppose it is not a concept added by this patch so not
fair to ask for explanation here anyway.
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
+*/
+ if (!IS_ERR(obj))
+ obj->base.resv = >resv;
+ return obj;
+}
+
struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm, int
sz)
{
struct drm_i915_gem_object *obj;
@@ -19,7 +35,11 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
i915_address_space *vm, int sz)
i915_gem_shrink_all(vm->i915);
obj = i915_gem_object_create_internal(vm->i915, sz);
- /* ensure all dma objects have the same reservation class */
+ /*
+* Ensure all paging structures for this vm share the same dma-resv
+* object underneath, with the idea that one object_lock() will lock
+* them all at once.
+*/
if (!IS_ERR(obj))
obj->base.resv = >resv;
return obj;
@@ -27,9 +47,11 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
i915_address_space *vm, int sz)
int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
{
+ enum i915_map_type type;
void *vaddr;
- vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
+ type = i915_coherent_map_type(vm->i915, obj, true);
+ vaddr = i915_gem_object_pin_map_unlocked(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
@@ -39,9 +61,11 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
{
+ enum i915_map_type type;
void *vaddr;
- vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ type = i915_coherent_map_type(vm->i915, obj, true);
+ vaddr = i915_gem_object_pin_map(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 40e486704558..44ce27c51631 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -527,6 +527,7 @@ int setup_scratch_page(struct i915_address_space *vm);
void free_scratch(struct i915_address_space *vm);
struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm, int sz);
+struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space *vm, int
sz);
struct i915_page_table *alloc_pt(struct i915_address_space *vm);
struct i915_page_directory *alloc_pd(struct i915_address_space *vm);
struct i915_page_directory *__alloc_pd(int npde);
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 4/7] drm/i915/gtt/dgfx: place the PD in LMEM
On 27/04/2021 14:34, Tang, CQ wrote:
-Original Message-
From: Intel-gfx On Behalf Of
Matthew Auld
Sent: Tuesday, April 27, 2021 1:54 AM
To: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 4/7] drm/i915/gtt/dgfx: place the PD in LMEM
It's a requirement that for dgfx we place all the paging structures in device
local-memory.
v2: use i915_coherent_map_type()
v3: improve the shared dma-resv object comment
Signed-off-by: Matthew Auld
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 5 -
drivers/gpu/drm/i915/gt/intel_gtt.c | 30 +---
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
3 files changed, 32 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index f83496836f0f..11fb5df45a0f 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -712,7 +712,10 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt
*gt)
*/
ppgtt->vm.has_read_only = !IS_GEN_RANGE(gt->i915, 11, 12);
- ppgtt->vm.alloc_pt_dma = alloc_pt_dma;
+ if (HAS_LMEM(gt->i915))
+ ppgtt->vm.alloc_pt_dma = alloc_pt_lmem;
Here we might want to allocate lmem from the 'gt' in the argument, however,
below inside alloc_pt_lmem(), we always allocate lmem to tile0.
Is this desired?
Yeah, AFAIK that is all handled in some later patches which have not yet
made there way upstream. For DG1 they don't really do anything
interesting, but yes we need them for Xe HP at some point.
--CQ
+ else
+ ppgtt->vm.alloc_pt_dma = alloc_pt_dma;
err = gen8_init_scratch(>vm);
if (err)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
b/drivers/gpu/drm/i915/gt/intel_gtt.c
index d386b89e2758..061c39d2ad51 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -7,10 +7,26 @@
#include
+#include "gem/i915_gem_lmem.h"
#include "i915_trace.h"
#include "intel_gt.h"
#include "intel_gtt.h"
+struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space
+*vm, int sz) {
+ struct drm_i915_gem_object *obj;
+
+ obj = i915_gem_object_create_lmem(vm->i915, sz, 0);
+ /*
+* Ensure all paging structures for this vm share the same dma-resv
+* object underneath, with the idea that one object_lock() will lock
+* them all at once.
+*/
+ if (!IS_ERR(obj))
+ obj->base.resv = >resv;
+ return obj;
+}
+
struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm,
int sz) {
struct drm_i915_gem_object *obj;
@@ -19,7 +35,11 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
i915_address_space *vm, int sz)
i915_gem_shrink_all(vm->i915);
obj = i915_gem_object_create_internal(vm->i915, sz);
- /* ensure all dma objects have the same reservation class */
+ /*
+* Ensure all paging structures for this vm share the same dma-resv
+* object underneath, with the idea that one object_lock() will lock
+* them all at once.
+*/
if (!IS_ERR(obj))
obj->base.resv = >resv;
return obj;
@@ -27,9 +47,11 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
i915_address_space *vm, int sz)
int map_pt_dma(struct i915_address_space *vm, struct
drm_i915_gem_object *obj) {
+ enum i915_map_type type;
void *vaddr;
- vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
+ type = i915_coherent_map_type(vm->i915, obj, true);
+ vaddr = i915_gem_object_pin_map_unlocked(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
@@ -39,9 +61,11 @@ int map_pt_dma(struct i915_address_space *vm,
struct drm_i915_gem_object *obj)
int map_pt_dma_locked(struct i915_address_space *vm, struct
drm_i915_gem_object *obj) {
+ enum i915_map_type type;
void *vaddr;
- vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ type = i915_coherent_map_type(vm->i915, obj, true);
+ vaddr = i915_gem_object_pin_map(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h
b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 40e486704558..44ce27c51631 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -527,6 +527,7 @@ int setup_scratch_page(struct i915_address_space
*vm); void free_scratch(struct i915_address_space *vm);
struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm,
int sz);
+struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space
+*vm, int sz);
struct i915_page_table *alloc_pt(struct i915_address_space *vm); struct
i915_page_directory *alloc_pd(struct i915_address_space *vm); struct
i915_page_directory *__alloc_pd(int npde);
--
2.26.3
Re: [Intel-gfx] [PATCH v2 3/7] drm/i915/gtt: map the PD up front
On 27/04/2021 09:54, Matthew Auld wrote:
We need to generalise our accessor for the page directories and tables from
using the simple kmap_atomic to support local memory, and this setup
must be done on acquisition of the backing storage prior to entering
fence execution contexts. Here we replace the kmap with the object
mapping code that for simple single page shmemfs object will return a
plain kmap, that is then kept for the lifetime of the page directory.
Note that keeping the mapping around is a potential concern here, since
while the vma is pinned the mapping remains there for the PDs
underneath, or at least until the used_count reaches zero, at which
point we can safely destroy the mapping. For 32b this will be even worse
since the address space is more limited, but since this change mostly
impacts full ppGTT platforms, the justification is that for modern
platforms we shouldn't care too much about 32b.
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
Signed-off-by: Matthew Auld
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
.../drm/i915/gem/selftests/i915_gem_context.c | 11 +
drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 11 ++---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 26 --
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gtt.c | 48 +--
drivers/gpu/drm/i915/gt/intel_gtt.h | 11 +++--
drivers/gpu/drm/i915/gt/intel_ppgtt.c | 7 ++-
drivers/gpu/drm/i915/i915_vma.c | 3 +-
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 10 ++--
drivers/gpu/drm/i915/selftests/i915_perf.c| 3 +-
10 files changed, 54 insertions(+), 78 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 5fef592390cb..ce70d0a3afb2 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -1740,7 +1740,6 @@ static int read_from_scratch(struct i915_gem_context *ctx,
static int check_scratch_page(struct i915_gem_context *ctx, u32 *out)
{
struct i915_address_space *vm;
- struct page *page;
u32 *vaddr;
int err = 0;
@@ -1748,24 +1747,18 @@ static int check_scratch_page(struct i915_gem_context *ctx, u32 *out)
if (!vm)
return -ENODEV;
- page = __px_page(vm->scratch[0]);
- if (!page) {
+ if (!vm->scratch[0]) {
pr_err("No scratch page!\n");
return -EINVAL;
}
- vaddr = kmap(page);
- if (!vaddr) {
- pr_err("No (mappable) scratch page!\n");
- return -EINVAL;
- }
+ vaddr = __px_vaddr(vm->scratch[0]);
memcpy(out, vaddr, sizeof(*out));
if (memchr_inv(vaddr, *out, PAGE_SIZE)) {
pr_err("Inconsistent initial state of scratch page!\n");
err = -EINVAL;
}
- kunmap(page);
return err;
}
diff --git a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
index e08dff376339..21b1085769be 100644
--- a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
@@ -96,9 +96,8 @@ static void gen6_ppgtt_clear_range(struct i915_address_space
*vm,
* entries back to scratch.
*/
- vaddr = kmap_atomic_px(pt);
+ vaddr = px_vaddr(pt);
memset32(vaddr + pte, scratch_pte, count);
- kunmap_atomic(vaddr);
pte = 0;
}
@@ -120,7 +119,7 @@ static void gen6_ppgtt_insert_entries(struct
i915_address_space *vm,
GEM_BUG_ON(!pd->entry[act_pt]);
- vaddr = kmap_atomic_px(i915_pt_entry(pd, act_pt));
+ vaddr = px_vaddr(i915_pt_entry(pd, act_pt));
do {
GEM_BUG_ON(sg_dma_len(iter.sg) < I915_GTT_PAGE_SIZE);
vaddr[act_pte] = pte_encode | GEN6_PTE_ADDR_ENCODE(iter.dma);
@@ -136,12 +135,10 @@ static void gen6_ppgtt_insert_entries(struct
i915_address_space *vm,
}
if (++act_pte == GEN6_PTES) {
- kunmap_atomic(vaddr);
- vaddr = kmap_atomic_px(i915_pt_entry(pd, ++act_pt));
+ vaddr = px_vaddr(i915_pt_entry(pd, ++act_pt));
act_pte = 0;
}
} while (1);
- kunmap_atomic(vaddr);
vma->page_sizes.gtt = I915_GTT_PAGE_SIZE;
}
@@ -235,7 +232,7 @@ static int gen6_ppgtt_init_scratch(struct gen6_ppgtt *ppgtt)
goto err_scratch0;
}
- ret = pin_pt_dma(vm, vm->scratch[1]);
+ ret = map_pt_dma(vm, vm->scratch[1]);
if (ret)
goto err_scratch1;
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index 176c19633412..f83496836f0f 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -242,11 +242,10 @@
Re: [Intel-gfx] [PATCH] drm/i915/gem: Remove reference to struct drm_device.pdev
>-Original Message-
>From: dri-devel On Behalf Of
>Thomas Zimmermann
>Sent: Tuesday, April 27, 2021 7:08 AM
>To: jani.nik...@linux.intel.com; joonas.lahti...@linux.intel.com; Vivi, Rodrigo
>; airl...@linux.ie; dan...@ffwll.ch; Auld, Matthew
>
>Cc: Tvrtko Ursulin ; Ursulin, Tvrtko
>; Mika Kuoppala
>; intel-gfx@lists.freedesktop.org; Gustavo
>A. R. Silva ; dri-de...@lists.freedesktop.org; Chris
>Wilson ; Tang, CQ ; Hellstrom,
>Thomas ; Thomas Zimmermann
>; Daniel Vetter ; Liu,
>Xinyun ; Dan Carpenter
>Subject: [PATCH] drm/i915/gem: Remove reference to struct
>drm_device.pdev
>
>References to struct drm_device.pdev should be used any longer as
should not be used
^^^
?
m
>the field will be moved into the struct's legacy section. Add a fix
>for the rsp commit.
>
>Signed-off-by: Thomas Zimmermann
>Fixes: d57d4a1daf5e ("drm/i915: Create stolen memory region from local
>memory")
>Cc: CQ Tang
>Cc: Matthew Auld
>Cc: Tvrtko Ursulin
>Cc: Xinyun Liu
>Cc: Tvrtko Ursulin
>Cc: Jani Nikula
>Cc: Joonas Lahtinen
>Cc: Rodrigo Vivi
>Cc: Chris Wilson
>Cc: Mika Kuoppala
>Cc: Daniel Vetter
>Cc: Maarten Lankhorst
>Cc: "Thomas Hellström"
>Cc: "Gustavo A. R. Silva"
>Cc: Dan Carpenter
>Cc: intel-gfx@lists.freedesktop.org
>---
> drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
>b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
>index c5b64b2400e8..e1a32672bbe8 100644
>--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
>+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
>@@ -773,7 +773,7 @@ struct intel_memory_region *
> i915_gem_stolen_lmem_setup(struct drm_i915_private *i915)
> {
> struct intel_uncore *uncore = >uncore;
>- struct pci_dev *pdev = i915->drm.pdev;
>+ struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> struct intel_memory_region *mem;
> resource_size_t io_start;
> resource_size_t lmem_size;
>--
>2.31.1
>
>___
>dri-devel mailing list
>dri-de...@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/dri-devel
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly
== Series Details ==
Series: drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly
URL : https://patchwork.freedesktop.org/series/89550/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10017 -> Patchwork_20004
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/index.html
Known issues
Here are the changes found in Patchwork_20004 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_prime@amd-to-i915:
- fi-tgl-y: NOTRUN -> [SKIP][1] ([fdo#109315] / [i915#2575])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/fi-tgl-y/igt@amdgpu/amd_pr...@amd-to-i915.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
[i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
Participating hosts (46 -> 41)
--
Missing(5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_10017 -> Patchwork_20004
CI-20190529: 20190529
CI_DRM_10017: 90fd4f5c1834f556c119cba5b6c41fe90683b912 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20004: 268ac60ecd8ba93583cc3dc256ec9837c15d600c @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
268ac60ecd8b drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20004/index.html
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 08/20] drm/i915/gem: Disallow bonding of virtual engines (v2)
On Mon, Apr 26, 2021 at 06:43:30PM -0500, Jason Ekstrand wrote:
> This adds a bunch of complexity which the media driver has never
> actually used. The media driver does technically bond a balanced engine
> to another engine but the balanced engine only has one engine in the
> sibling set. This doesn't actually result in a virtual engine.
Have you tripled checked this by running media stack with bonding? Also
this needs acks from media side, pls Cc Carl
I think you should also explain a bit more indetail why exactly the bonded
submit thing is a no-op and what the implications are, since it took me a
while to get that. Plus you missed the entire SUBMIT_FENCE entertainment,
so obviously this isn't very obvious :-)
> Unless some userspace badly wants it, there's no good reason to support
> this case. This makes I915_CONTEXT_ENGINES_EXT_BOND a total no-op. We
> leave the validation code in place in case we ever decide we want to do
> something interesting with the bonding information.
>
> v2 (Jason Ekstrand):
> - Don't delete quite as much code. Some of it was necessary.
Please explain the details here, after all this is rather tricky ...
> Signed-off-by: Jason Ekstrand
So this just stops the uapi and immediate things. But since I've looked
around in how this works I think it'd be worth it to throw a backend
cleanup task on top. Not the entire thing, but just the most egregious
detail:
One thing the submit fence does, aside from holding up the subsequent
batches until the first one is scheduled, is limit the set of engines to
the right pair - which we know once the engine is selected for the first
batch. That's done with some lockless trickery in the await fence callback
(iirc, would need to double-check) with cmpxchg. If we can delete that in
a follow-up, assuming it's really not pulling in an entire string of
things, I think that would be rather nice clarification on what's possible
or not possible wrt execlist backend scheduling.
I'd like to do this now because unlike all the rcu stuff it's a lot harder
to find it again and realize it's all dead code now. With the rcu/locking
stuff I'm much less worried about leaving complexity behind that we don't
realize isn't needed anymore.
Also we really need to make sure we can get away with this before we
commit to anything I think ...
Code itself looks reasonable, but I'll wait for r-b stamping until the
commit message is more polished.
-Daniel
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 18 +-
> .../drm/i915/gt/intel_execlists_submission.c | 83 ---
> .../drm/i915/gt/intel_execlists_submission.h | 4 -
> drivers/gpu/drm/i915/gt/selftest_execlists.c | 229 --
> 4 files changed, 6 insertions(+), 328 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index e8179918fa306..5f8d0faf783aa 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1553,6 +1553,12 @@ set_engines__bond(struct i915_user_extension __user
> *base, void *data)
> }
> virtual = set->engines->engines[idx]->engine;
>
> + if (intel_engine_is_virtual(virtual)) {
> + drm_dbg(>drm,
> + "Bonding with virtual engines not allowed\n");
> + return -EINVAL;
> + }
> +
> err = check_user_mbz(>flags);
> if (err)
> return err;
> @@ -1593,18 +1599,6 @@ set_engines__bond(struct i915_user_extension __user
> *base, void *data)
> n, ci.engine_class, ci.engine_instance);
> return -EINVAL;
> }
> -
> - /*
> - * A non-virtual engine has no siblings to choose between; and
> - * a submit fence will always be directed to the one engine.
> - */
> - if (intel_engine_is_virtual(virtual)) {
> - err = intel_virtual_engine_attach_bond(virtual,
> -master,
> -bond);
> - if (err)
> - return err;
> - }
> }
>
> return 0;
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index de124870af44d..a6204c60b59cb 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -181,18 +181,6 @@ struct virtual_engine {
> int prio;
> } nodes[I915_NUM_ENGINES];
>
> - /*
> - * Keep track of bonded pairs -- restrictions upon on our selection
> - * of physical engines any particular request may be submitted to.
> - * If we receive a submit-fence from a master engine, we will only
> - * use one of sibling_mask physical engines.
> - */
> -
Re: [Intel-gfx] [PATCH 08/21] drm/i915/gem: Disallow bonding of virtual engines
On Fri, Apr 23, 2021 at 5:31 PM Jason Ekstrand wrote:
>
> This adds a bunch of complexity which the media driver has never
> actually used. The media driver does technically bond a balanced engine
> to another engine but the balanced engine only has one engine in the
> sibling set. This doesn't actually result in a virtual engine.
>
> Unless some userspace badly wants it, there's no good reason to support
> this case. This makes I915_CONTEXT_ENGINES_EXT_BOND a total no-op. We
> leave the validation code in place in case we ever decide we want to do
> something interesting with the bonding information.
>
> Signed-off-by: Jason Ekstrand
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 18 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 2 +-
> drivers/gpu/drm/i915/gt/intel_engine_types.h | 7 -
> .../drm/i915/gt/intel_execlists_submission.c | 100
> .../drm/i915/gt/intel_execlists_submission.h | 4 -
> drivers/gpu/drm/i915/gt/selftest_execlists.c | 229 --
> 6 files changed, 7 insertions(+), 353 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index e8179918fa306..5f8d0faf783aa 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1553,6 +1553,12 @@ set_engines__bond(struct i915_user_extension __user
> *base, void *data)
> }
> virtual = set->engines->engines[idx]->engine;
>
> + if (intel_engine_is_virtual(virtual)) {
> + drm_dbg(>drm,
> + "Bonding with virtual engines not allowed\n");
> + return -EINVAL;
> + }
> +
> err = check_user_mbz(>flags);
> if (err)
> return err;
> @@ -1593,18 +1599,6 @@ set_engines__bond(struct i915_user_extension __user
> *base, void *data)
> n, ci.engine_class, ci.engine_instance);
> return -EINVAL;
> }
> -
> - /*
> -* A non-virtual engine has no siblings to choose between; and
> -* a submit fence will always be directed to the one engine.
> -*/
> - if (intel_engine_is_virtual(virtual)) {
> - err = intel_virtual_engine_attach_bond(virtual,
> - master,
> - bond);
> - if (err)
> - return err;
> - }
> }
>
> return 0;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index d640bba6ad9ab..efb2fa3522a42 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -3474,7 +3474,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> if (args->flags & I915_EXEC_FENCE_SUBMIT)
> err = i915_request_await_execution(eb.request,
>in_fence,
> -
> eb.engine->bond_execute);
> + NULL);
> else
> err = i915_request_await_dma_fence(eb.request,
>in_fence);
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index 883bafc449024..68cfe5080325c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -446,13 +446,6 @@ struct intel_engine_cs {
> */
> void(*submit_request)(struct i915_request *rq);
>
> - /*
> -* Called on signaling of a SUBMIT_FENCE, passing along the signaling
> -* request down to the bonded pairs.
> -*/
> - void(*bond_execute)(struct i915_request *rq,
> - struct dma_fence *signal);
> -
> /*
> * Call when the priority on a request has changed and it and its
> * dependencies may need rescheduling. Note the request itself may
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index de124870af44d..b6e2b59f133b7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -181,18 +181,6 @@ struct virtual_engine {
> int prio;
> } nodes[I915_NUM_ENGINES];
>
> - /*
> -* Keep track of bonded pairs -- restrictions upon on our selection
> -* of physical engines any particular request may be submitted to.
> -* If we receive a submit-fence from a
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly
== Series Details == Series: drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly URL : https://patchwork.freedesktop.org/series/89550/ State : warning == Summary == $ dim checkpatch origin/drm-tip 268ac60ecd8b drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly -:79: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #79: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 84 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Remove reference to struct drm_device.pdev
== Series Details ==
Series: drm/i915/gem: Remove reference to struct drm_device.pdev
URL : https://patchwork.freedesktop.org/series/89545/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10017 -> Patchwork_20002
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/index.html
Known issues
Here are the changes found in Patchwork_20002 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_prime@amd-to-i915:
- fi-tgl-y: NOTRUN -> [SKIP][1] ([fdo#109315] / [i915#2575])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/fi-tgl-y/igt@amdgpu/amd_pr...@amd-to-i915.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [PASS][2] -> [FAIL][3] ([i915#1372])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10017/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
[i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
[k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379
Participating hosts (46 -> 41)
--
Missing(5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_10017 -> Patchwork_20002
CI-20190529: 20190529
CI_DRM_10017: 90fd4f5c1834f556c119cba5b6c41fe90683b912 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20002: 1a7f6d0a100fc25ec7846a8839007145d1f49e56 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1a7f6d0a100f drm/i915/gem: Remove reference to struct drm_device.pdev
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20002/index.html
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm: Move struct drm_device.pdev to legacy (rev7)
== Series Details == Series: drm: Move struct drm_device.pdev to legacy (rev7) URL : https://patchwork.freedesktop.org/series/84205/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/i915/gem/i915_gem_stolen.o drivers/gpu/drm/i915/gem/i915_gem_stolen.c: In function ‘i915_gem_stolen_lmem_setup’: drivers/gpu/drm/i915/gem/i915_gem_stolen.c:776:35: error: ‘struct drm_device’ has no member named ‘pdev’; did you mean ‘dev’? struct pci_dev *pdev = i915->drm.pdev; ^~~~ dev scripts/Makefile.build:271: recipe for target 'drivers/gpu/drm/i915/gem/i915_gem_stolen.o' failed make[4]: *** [drivers/gpu/drm/i915/gem/i915_gem_stolen.o] Error 1 scripts/Makefile.build:514: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:514: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:514: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1851: recipe for target 'drivers' failed make: *** [drivers] Error 2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 4/7] drm/i915/gtt/dgfx: place the PD in LMEM
> -Original Message-
> From: Intel-gfx On Behalf Of
> Matthew Auld
> Sent: Tuesday, April 27, 2021 1:54 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 4/7] drm/i915/gtt/dgfx: place the PD in LMEM
>
> It's a requirement that for dgfx we place all the paging structures in device
> local-memory.
>
> v2: use i915_coherent_map_type()
> v3: improve the shared dma-resv object comment
>
> Signed-off-by: Matthew Auld
> Cc: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 5 -
> drivers/gpu/drm/i915/gt/intel_gtt.c | 30 +---
> drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
> 3 files changed, 32 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> index f83496836f0f..11fb5df45a0f 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> @@ -712,7 +712,10 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt
> *gt)
>*/
> ppgtt->vm.has_read_only = !IS_GEN_RANGE(gt->i915, 11, 12);
>
> - ppgtt->vm.alloc_pt_dma = alloc_pt_dma;
> + if (HAS_LMEM(gt->i915))
> + ppgtt->vm.alloc_pt_dma = alloc_pt_lmem;
Here we might want to allocate lmem from the 'gt' in the argument, however,
below inside alloc_pt_lmem(), we always allocate lmem to tile0.
Is this desired?
--CQ
> + else
> + ppgtt->vm.alloc_pt_dma = alloc_pt_dma;
>
> err = gen8_init_scratch(>vm);
> if (err)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
> b/drivers/gpu/drm/i915/gt/intel_gtt.c
> index d386b89e2758..061c39d2ad51 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
> @@ -7,10 +7,26 @@
>
> #include
>
> +#include "gem/i915_gem_lmem.h"
> #include "i915_trace.h"
> #include "intel_gt.h"
> #include "intel_gtt.h"
>
> +struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space
> +*vm, int sz) {
> + struct drm_i915_gem_object *obj;
> +
> + obj = i915_gem_object_create_lmem(vm->i915, sz, 0);
> + /*
> + * Ensure all paging structures for this vm share the same dma-resv
> + * object underneath, with the idea that one object_lock() will lock
> + * them all at once.
> + */
> + if (!IS_ERR(obj))
> + obj->base.resv = >resv;
> + return obj;
> +}
> +
> struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm,
> int sz) {
> struct drm_i915_gem_object *obj;
> @@ -19,7 +35,11 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
> i915_address_space *vm, int sz)
> i915_gem_shrink_all(vm->i915);
>
> obj = i915_gem_object_create_internal(vm->i915, sz);
> - /* ensure all dma objects have the same reservation class */
> + /*
> + * Ensure all paging structures for this vm share the same dma-resv
> + * object underneath, with the idea that one object_lock() will lock
> + * them all at once.
> + */
> if (!IS_ERR(obj))
> obj->base.resv = >resv;
> return obj;
> @@ -27,9 +47,11 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
> i915_address_space *vm, int sz)
>
> int map_pt_dma(struct i915_address_space *vm, struct
> drm_i915_gem_object *obj) {
> + enum i915_map_type type;
> void *vaddr;
>
> - vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB);
> + type = i915_coherent_map_type(vm->i915, obj, true);
> + vaddr = i915_gem_object_pin_map_unlocked(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
>
> @@ -39,9 +61,11 @@ int map_pt_dma(struct i915_address_space *vm,
> struct drm_i915_gem_object *obj)
>
> int map_pt_dma_locked(struct i915_address_space *vm, struct
> drm_i915_gem_object *obj) {
> + enum i915_map_type type;
> void *vaddr;
>
> - vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
> + type = i915_coherent_map_type(vm->i915, obj, true);
> + vaddr = i915_gem_object_pin_map(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h
> b/drivers/gpu/drm/i915/gt/intel_gtt.h
> index 40e486704558..44ce27c51631 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gtt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
> @@ -527,6 +527,7 @@ int setup_scratch_page(struct i915_address_space
> *vm); void free_scratch(struct i915_address_space *vm);
>
> struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm,
> int sz);
> +struct drm_i915_gem_object *alloc_pt_lmem(struct i915_address_space
> +*vm, int sz);
> struct i915_page_table *alloc_pt(struct i915_address_space *vm); struct
> i915_page_directory *alloc_pd(struct i915_address_space *vm); struct
> i915_page_directory *__alloc_pd(int npde);
> --
> 2.26.3
>
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>
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object
== Series Details == Series: series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object URL : https://patchwork.freedesktop.org/series/89529/ State : success == Summary == CI Bug Log - changes from CI_DRM_10014_full -> Patchwork_19998_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_19998_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_19998_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_19998_full: ### IGT changes ### Warnings * igt@gem_ctx_ringsize@idle@bcs0: - shard-skl: [INCOMPLETE][1] ([i915#3316]) -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-skl7/igt@gem_ctx_ringsize@i...@bcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-skl2/igt@gem_ctx_ringsize@i...@bcs0.html * igt@runner@aborted: - shard-skl: ([FAIL][3], [FAIL][4], [FAIL][5], [FAIL][6], [FAIL][7], [FAIL][8]) ([i915#1814] / [i915#2029] / [i915#2369] / [i915#3002]) -> ([FAIL][9], [FAIL][10], [FAIL][11], [FAIL][12], [FAIL][13]) ([i915#2029] / [i915#3002]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-skl4/igt@run...@aborted.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-skl2/igt@run...@aborted.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-skl3/igt@run...@aborted.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-skl3/igt@run...@aborted.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-skl3/igt@run...@aborted.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-skl5/igt@run...@aborted.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-skl2/igt@run...@aborted.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-skl6/igt@run...@aborted.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-skl3/igt@run...@aborted.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-skl3/igt@run...@aborted.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-skl8/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_19998_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@blit-noreloc-purge-cache-random: - shard-snb: NOTRUN -> [SKIP][14] ([fdo#109271]) +264 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-snb6/igt@api_intel...@blit-noreloc-purge-cache-random.html * igt@gem_create@create-massive: - shard-snb: NOTRUN -> [DMESG-WARN][15] ([i915#3002]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-snb5/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@clone: - shard-snb: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#1099]) +4 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-snb2/igt@gem_ctx_persiste...@clone.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][17] -> [FAIL][18] ([i915#2842]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-tglb7/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-tglb3/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-kbl: [PASS][19] -> [FAIL][20] ([i915#2842]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-kbl6/igt@gem_exec_fair@basic-pace-s...@rcs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-kbl6/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: [PASS][21] -> [FAIL][22] ([i915#2849]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-iclb5/igt@gem_exec_fair@basic-throt...@rcs0.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-iclb4/igt@gem_exec_fair@basic-throt...@rcs0.html * igt@gem_exec_parallel@engines@userptr: - shard-skl: NOTRUN -> [DMESG-WARN][23] ([i915#1982]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/shard-skl3/igt@gem_exec_parallel@engi...@userptr.html * igt@gem_mmap_gtt@cpuset-big-copy-odd: - shard-iclb: [PASS][24] -> [FAIL][25] ([i915#307]) +2 similar issues [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10014/shard-iclb6/igt@gem_mmap_...@cpuset-big-copy-odd.html
[Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce Intel PXP (rev5)
== Series Details == Series: Introduce Intel PXP (rev5) URL : https://patchwork.freedesktop.org/series/86798/ State : failure == Summary == Applying: drm/i915/pxp: Define PXP component interface Applying: mei: pxp: export pavp client to me client bus Applying: drm/i915/pxp: define PXP device flag and kconfig Applying: drm/i915/pxp: allocate a vcs context for pxp usage Applying: drm/i915/pxp: Implement funcs to create the TEE channel Applying: drm/i915/pxp: set KCR reg init Applying: drm/i915/pxp: Create the arbitrary session after boot Applying: drm/i915/pxp: Implement arb session teardown Applying: drm/i915/pxp: Implement PXP irq handler Applying: drm/i915/pxp: Enable PXP power management Applying: drm/i915/pxp: interface for marking contexts as using protected content Applying: drm/i915/uapi: introduce drm_i915_gem_create_ext Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/i915_drv.c M include/uapi/drm/i915_drm.h Falling back to patching base and 3-way merge... Auto-merging include/uapi/drm/i915_drm.h CONFLICT (content): Merge conflict in include/uapi/drm/i915_drm.h Auto-merging drivers/gpu/drm/i915/i915_drv.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0012 drm/i915/uapi: introduce drm_i915_gem_create_ext When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v7 0/4] drm: Move struct drm_device.pdev to legacy
On Tue, 27 Apr 2021, Thomas Zimmermann wrote: > Hi Jani > > Am 27.04.21 um 14:04 schrieb Jani Nikula: >> On Tue, 27 Apr 2021, Thomas Zimmermann wrote: >>> V7 of the patchset fixes some bitrot in the intel driver. >>> >>> The pdev field in struct drm_device points to a PCI device structure and >>> goes back to UMS-only days when all DRM drivers were for PCI devices. >>> Meanwhile we also support USB, SPI and platform devices. Each of those >>> uses the generic device stored in struct drm_device.dev. >>> >>> To reduce duplication and remove the special case of PCI, this patchset >>> converts all modesetting drivers from pdev to dev and makes pdev a field >>> for legacy UMS drivers. >>> >>> For PCI devices, the pointer in struct drm_device.dev can be upcasted to >>> struct pci_device; or tested for PCI with dev_is_pci(). In several places >>> the code can use the dev field directly. >>> >>> After converting all drivers and the DRM core, the pdev fields becomes >>> only relevant for legacy drivers. In a later patchset, we may want to >>> convert these as well and remove pdev entirely. >> >> On the series, >> >> Reviewed-by: Jani Nikula >> >> How should we merge these? > > Thanks for the quick reply. > > There is another pdev patch that I just sent out. [1] It has to go into > the intel tree. After it landed, I want to get this patchset into > drm-misc-next ASAP. Otherwise, drm-tip would stop building. On merging the series via drm-misc-next, Acked-by: Jani Nikula > > This should fix things in the correct order and finally remove pdev for > current drivers. > > Best regards > Thomas > > [1] > https://lore.kernel.org/dri-devel/20210427110747.2065-1-tzimmerm...@suse.de/T/#u > >> >> >> >>> >>> v7: >>> * fix instances of pdev that have benn added under i915/ >>> v6: >>> * also remove assignment in i915/selftests in later patch (Chris) >>> v5: >>> * remove assignment in later patch (Chris) >>> v4: >>> * merged several patches >>> * moved core changes into separate patch >>> * vmwgfx build fix >>> v3: >>> * merged several patches >>> * fix one pdev reference in nouveau (Jeremy) >>> * rebases >>> v2: >>> * move whitespace fixes into separate patches (Alex, Sam) >>> * move i915 gt/ and gvt/ changes into separate patches (Joonas) >>> >>> Thomas Zimmermann (4): >>>drm/i915/gt: Remove reference to struct drm_device.pdev >>>drm/i915: Remove reference to struct drm_device.pdev >>>drm/i915: Don't assign to struct drm_device.pdev >>>drm: Move struct drm_device.pdev to legacy section >>> >>> drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +- >>> drivers/gpu/drm/i915/i915_drv.c | 1 - >>> drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +- >>> drivers/gpu/drm/i915/selftests/mock_gem_device.c | 1 - >>> include/drm/drm_device.h | 6 +++--- >>> 5 files changed, 5 insertions(+), 7 deletions(-) >>> >>> -- >>> 2.31.1 >>> >> -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/gem: Remove reference to struct drm_device.pdev
On Tue, 27 Apr 2021, Thomas Zimmermann wrote:
> References to struct drm_device.pdev should be used any longer as
> the field will be moved into the struct's legacy section. Add a fix
> for the rsp commit.
>
> Signed-off-by: Thomas Zimmermann
> Fixes: d57d4a1daf5e ("drm/i915: Create stolen memory region from local
> memory")
> Cc: CQ Tang
> Cc: Matthew Auld
> Cc: Tvrtko Ursulin
> Cc: Xinyun Liu
> Cc: Tvrtko Ursulin
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Cc: Rodrigo Vivi
> Cc: Chris Wilson
> Cc: Mika Kuoppala
> Cc: Daniel Vetter
> Cc: Maarten Lankhorst
> Cc: "Thomas Hellström"
> Cc: "Gustavo A. R. Silva"
> Cc: Dan Carpenter
> Cc: intel-gfx@lists.freedesktop.org
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> index c5b64b2400e8..e1a32672bbe8 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> @@ -773,7 +773,7 @@ struct intel_memory_region *
> i915_gem_stolen_lmem_setup(struct drm_i915_private *i915)
> {
> struct intel_uncore *uncore = >uncore;
> - struct pci_dev *pdev = i915->drm.pdev;
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> struct intel_memory_region *mem;
> resource_size_t io_start;
> resource_size_t lmem_size;
--
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Simplify userptr locking (rev2)
== Series Details ==
Series: drm/i915: Simplify userptr locking (rev2)
URL : https://patchwork.freedesktop.org/series/88974/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10016 -> Patchwork_2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_2:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live@gem_contexts:
- {fi-cml-drallion}: NOTRUN -> [DMESG-FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/fi-cml-drallion/igt@i915_selftest@live@gem_contexts.html
Known issues
Here are the changes found in Patchwork_2 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-soraka: [PASS][2] -> [INCOMPLETE][3] ([i915#155])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/fi-kbl-soraka/igt@gem_exec_susp...@basic-s0.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/fi-kbl-soraka/igt@gem_exec_susp...@basic-s0.html
* igt@gem_huc_copy@huc-copy:
- fi-glk-dsi: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/fi-glk-dsi/igt@gem_huc_c...@huc-copy.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-glk-dsi: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827]) +8
similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/fi-glk-dsi/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-glk-dsi: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#533])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/fi-glk-dsi/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@primary_page_flip:
- fi-glk-dsi: NOTRUN -> [SKIP][7] ([fdo#109271]) +28 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/fi-glk-dsi/igt@kms_psr@primary_page_flip.html
Possible fixes
* igt@gem_exec_suspend@basic-s0:
- {fi-cml-drallion}: [INCOMPLETE][8] ([i915#1614]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10016/fi-cml-drallion/igt@gem_exec_susp...@basic-s0.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/fi-cml-drallion/igt@gem_exec_susp...@basic-s0.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#1614]: https://gitlab.freedesktop.org/drm/intel/issues/1614
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (44 -> 38)
--
Additional (1): fi-glk-dsi
Missing(7): fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-bdw-gvtdvm
fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_10016 -> Patchwork_2
CI-20190529: 20190529
CI_DRM_10016: b8032d21f3a1dfc475d966479991b0a0a6162cf0 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_2: 2649dda6a356781eeb04bd3cf902f4312dfac60c @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2649dda6a356 drm/i915: Simplify userptr locking
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_2/index.html
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Re: [Intel-gfx] [PATCH 8/8] drm/modifiers: Enforce consistency between the cap an IN_FORMATS
On Tue, Apr 27, 2021 at 12:32:19PM +0100, Emil Velikov wrote:
> Hi Daniel,
>
> On Tue, 27 Apr 2021 at 10:20, Daniel Vetter wrote:
>
> > @@ -360,6 +373,9 @@ static int __drm_universal_plane_init(struct drm_device
> > *dev,
> > * drm_universal_plane_init() to let the DRM managed resource
> > infrastructure
> > * take care of cleanup and deallocation.
> > *
> > + * Drivers supporting modifiers must set @format_modifiers on all their
> > planes,
> > + * even those that only support DRM_FORMAT_MOD_LINEAR.
> > + *
> The comment says "must", yet we have an "if (format_modifiers)" in the
> codebase.
> Shouldn't we add a WARN_ON() + return -EINVAL (or similar) so people
> can see and fix their drivers?
This is a must only for drivers supporting modifiers, not all drivers.
Hence the check in the if. I did add WARN_ON for the combos that get stuff
wrong though (like only supply one side of the modifier info, not both).
> As a follow-up one could even go a step further, by erroring out when
> the driver hasn't provided valid modifier(s) and even removing
> config::allow_fb_modifiers all together.
Well that currently only exists to avoid walking the plane list (which we
need to do for validation that all planes are the same). It's quite tricky
code for tiny benefit, so I don't think it's worth it trying to remove
allow_fb_modifiers completely.
> Although for stable - this series + WARN_ON (no return since it might
> break buggy drivers) sounds good.
>
> > @@ -909,6 +909,8 @@ struct drm_mode_config {
> > * @allow_fb_modifiers:
> > *
> > * Whether the driver supports fb modifiers in the ADDFB2.1 ioctl
> > call.
> > +* Note that drivers should not set this directly, it is
> > automatically
> > +* set in drm_universal_plane_init().
> > *
> > * IMPORTANT:
> > *
> The new note and the existing IMPORTANT are in a weird mix.
> Quoting the latter since it doesn't show in the diff.
>
> If this is set the driver must fill out the full implicit modifier
> information in their _mode_config_funcs.fb_create hook for legacy
> userspace which does not set modifiers. Otherwise the GETFB2 ioctl is
> broken for modifier aware userspace.
>
> In particular:
> As the new note says "don't set it" and the existing note one says "if
> it's set". Yet no drivers do "if (config->allow_fb_modifiers)".
>
> Sadly, nothing comes to mind atm wrt alternative wording.
Yeah it's a bit disappointing.
> With the WARN_ON() added or s/must/should/ in the documentation, the series
> is:
With my clarification, can you please recheck whether as-is it's not
correct?
Thanks, Daniel
> Reviewed-by: Emil Velikov
>
> HTH
> -Emil
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH v7 0/4] drm: Move struct drm_device.pdev to legacy
Hi Jani Am 27.04.21 um 14:04 schrieb Jani Nikula: On Tue, 27 Apr 2021, Thomas Zimmermann wrote: V7 of the patchset fixes some bitrot in the intel driver. The pdev field in struct drm_device points to a PCI device structure and goes back to UMS-only days when all DRM drivers were for PCI devices. Meanwhile we also support USB, SPI and platform devices. Each of those uses the generic device stored in struct drm_device.dev. To reduce duplication and remove the special case of PCI, this patchset converts all modesetting drivers from pdev to dev and makes pdev a field for legacy UMS drivers. For PCI devices, the pointer in struct drm_device.dev can be upcasted to struct pci_device; or tested for PCI with dev_is_pci(). In several places the code can use the dev field directly. After converting all drivers and the DRM core, the pdev fields becomes only relevant for legacy drivers. In a later patchset, we may want to convert these as well and remove pdev entirely. On the series, Reviewed-by: Jani Nikula How should we merge these? Thanks for the quick reply. There is another pdev patch that I just sent out. [1] It has to go into the intel tree. After it landed, I want to get this patchset into drm-misc-next ASAP. Otherwise, drm-tip would stop building. This should fix things in the correct order and finally remove pdev for current drivers. Best regards Thomas [1] https://lore.kernel.org/dri-devel/20210427110747.2065-1-tzimmerm...@suse.de/T/#u v7: * fix instances of pdev that have benn added under i915/ v6: * also remove assignment in i915/selftests in later patch (Chris) v5: * remove assignment in later patch (Chris) v4: * merged several patches * moved core changes into separate patch * vmwgfx build fix v3: * merged several patches * fix one pdev reference in nouveau (Jeremy) * rebases v2: * move whitespace fixes into separate patches (Alex, Sam) * move i915 gt/ and gvt/ changes into separate patches (Joonas) Thomas Zimmermann (4): drm/i915/gt: Remove reference to struct drm_device.pdev drm/i915: Remove reference to struct drm_device.pdev drm/i915: Don't assign to struct drm_device.pdev drm: Move struct drm_device.pdev to legacy section drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +- drivers/gpu/drm/i915/i915_drv.c | 1 - drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 1 - include/drm/drm_device.h | 6 +++--- 5 files changed, 5 insertions(+), 7 deletions(-) -- 2.31.1 -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer OpenPGP_signature Description: OpenPGP digital signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v7 0/4] drm: Move struct drm_device.pdev to legacy
On Tue, 27 Apr 2021, Thomas Zimmermann wrote: > V7 of the patchset fixes some bitrot in the intel driver. > > The pdev field in struct drm_device points to a PCI device structure and > goes back to UMS-only days when all DRM drivers were for PCI devices. > Meanwhile we also support USB, SPI and platform devices. Each of those > uses the generic device stored in struct drm_device.dev. > > To reduce duplication and remove the special case of PCI, this patchset > converts all modesetting drivers from pdev to dev and makes pdev a field > for legacy UMS drivers. > > For PCI devices, the pointer in struct drm_device.dev can be upcasted to > struct pci_device; or tested for PCI with dev_is_pci(). In several places > the code can use the dev field directly. > > After converting all drivers and the DRM core, the pdev fields becomes > only relevant for legacy drivers. In a later patchset, we may want to > convert these as well and remove pdev entirely. On the series, Reviewed-by: Jani Nikula How should we merge these? > > v7: > * fix instances of pdev that have benn added under i915/ > v6: > * also remove assignment in i915/selftests in later patch (Chris) > v5: > * remove assignment in later patch (Chris) > v4: > * merged several patches > * moved core changes into separate patch > * vmwgfx build fix > v3: > * merged several patches > * fix one pdev reference in nouveau (Jeremy) > * rebases > v2: > * move whitespace fixes into separate patches (Alex, Sam) > * move i915 gt/ and gvt/ changes into separate patches (Joonas) > > Thomas Zimmermann (4): > drm/i915/gt: Remove reference to struct drm_device.pdev > drm/i915: Remove reference to struct drm_device.pdev > drm/i915: Don't assign to struct drm_device.pdev > drm: Move struct drm_device.pdev to legacy section > > drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +- > drivers/gpu/drm/i915/i915_drv.c | 1 - > drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +- > drivers/gpu/drm/i915/selftests/mock_gem_device.c | 1 - > include/drm/drm_device.h | 6 +++--- > 5 files changed, 5 insertions(+), 7 deletions(-) > > -- > 2.31.1 > -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/display: move crtc and dpll declarations where they belong
The definitions are in the crtc and dpll files; move the declarations to the corresponding headers. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/icl_dsi.c| 1 + drivers/gpu/drm/i915/display/intel_crt.c | 1 + drivers/gpu/drm/i915/display/intel_crtc.h | 3 +++ drivers/gpu/drm/i915/display/intel_ddi.c | 1 + drivers/gpu/drm/i915/display/intel_display.h | 6 -- drivers/gpu/drm/i915/display/intel_dp_mst.c | 1 + drivers/gpu/drm/i915/display/intel_dpll.h | 5 + drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 1 + drivers/gpu/drm/i915/display/intel_sdvo.c | 1 + drivers/gpu/drm/i915/display/vlv_dsi.c| 1 + drivers/gpu/drm/i915/i915_trace.h | 1 + 11 files changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 37e2d93d064c..781630a40f06 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -31,6 +31,7 @@ #include "intel_atomic.h" #include "intel_combo_phy.h" #include "intel_connector.h" +#include "intel_crtc.h" #include "intel_ddi.h" #include "intel_dsi.h" #include "intel_panel.h" diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index c85092eaa5c2..1aac8bead4eb 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -36,6 +36,7 @@ #include "i915_drv.h" #include "intel_connector.h" #include "intel_crt.h" +#include "intel_crtc.h" #include "intel_ddi.h" #include "intel_display_types.h" #include "intel_fdi.h" diff --git a/drivers/gpu/drm/i915/display/intel_crtc.h b/drivers/gpu/drm/i915/display/intel_crtc.h index 08112d557411..a5ae997581aa 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.h +++ b/drivers/gpu/drm/i915/display/intel_crtc.h @@ -18,5 +18,8 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe); struct intel_crtc_state *intel_crtc_state_alloc(struct intel_crtc *crtc); void intel_crtc_state_reset(struct intel_crtc_state *crtc_state, struct intel_crtc *crtc); +u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc); +void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state); +void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state); #endif diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index f4249f087fa7..93d94d50b63d 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -31,6 +31,7 @@ #include "intel_audio.h" #include "intel_combo_phy.h" #include "intel_connector.h" +#include "intel_crtc.h" #include "intel_ddi.h" #include "intel_ddi_buf_trans.h" #include "intel_display_types.h" diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index b68bcd502206..fc0df4c63e8d 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -557,9 +557,6 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port); int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); -u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc); -void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state); -void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state); int ilk_get_lanes_required(int target_clock, int link_bw, int bpp); void vlv_wait_port_ready(struct drm_i915_private *dev_priv, @@ -598,9 +595,6 @@ void intel_dp_get_m_n(struct intel_crtc *crtc, void intel_dp_set_m_n(const struct intel_crtc_state *crtc_state, enum link_m_n_set m_n); int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); -bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, - struct dpll *best_clock); -int chv_calc_dpll_params(int refclk, struct dpll *pll_clock); bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state); void hsw_enable_ips(const struct intel_crtc_state *crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 3558bce242ee..a30ca4380a06 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -32,6 +32,7 @@ #include "intel_atomic.h" #include "intel_audio.h" #include "intel_connector.h" +#include "intel_crtc.h" #include "intel_ddi.h" #include "intel_display_types.h" #include "intel_dp.h" diff --git a/drivers/gpu/drm/i915/display/intel_dpll.h b/drivers/gpu/drm/i915/display/intel_dpll.h index 7ff4b0d29ed1..88247027fd5a 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.h +++ b/drivers/gpu/drm/i915/display/intel_dpll.h @@ -6,6 +6,8 @@ #ifndef _INTEL_DPLL_H_
[Intel-gfx] [PATCH] drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordingly
Add separate intel_dp_hdcp.h to go with intel_dp_hdcp.c, and rename the
init function intel_dp_hdcp_init() to follow naming where function
prefix matches the file name.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 5 +++--
drivers/gpu/drm/i915/display/intel_dp.h | 3 ---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 5 +++--
drivers/gpu/drm/i915/display/intel_dp_hdcp.h | 15 +++
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +++--
5 files changed, 24 insertions(+), 9 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dp_hdcp.h
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 4ad12dde5938..dfa7da928ae5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -49,10 +49,11 @@
#include "intel_display_types.h"
#include "intel_dp.h"
#include "intel_dp_aux.h"
+#include "intel_dp_hdcp.h"
#include "intel_dp_link_training.h"
#include "intel_dp_mst.h"
-#include "intel_dpll.h"
#include "intel_dpio_phy.h"
+#include "intel_dpll.h"
#include "intel_fifo_underrun.h"
#include "intel_hdcp.h"
#include "intel_hdmi.h"
@@ -5348,7 +5349,7 @@ intel_dp_init_connector(struct intel_digital_port
*dig_port,
intel_dp_add_properties(intel_dp, connector);
if (is_hdcp_supported(dev_priv, port) && !intel_dp_is_edp(intel_dp)) {
- int ret = intel_dp_init_hdcp(dig_port, intel_connector);
+ int ret = intel_dp_hdcp_init(dig_port, intel_connector);
if (ret)
drm_dbg_kms(_priv->drm,
"HDCP init failed, skipping.\n");
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
b/drivers/gpu/drm/i915/display/intel_dp.h
index 8db5062f6c4a..680631b5b437 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -119,9 +119,6 @@ void intel_ddi_update_pipe(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
-int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
- struct intel_connector *intel_connector);
-
bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state);
void intel_dp_sync_state(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 2dd9360bdf9a..d7c3a74b81a3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -11,9 +11,10 @@
#include
#include
-#include "intel_display_types.h"
#include "intel_ddi.h"
+#include "intel_display_types.h"
#include "intel_dp.h"
+#include "intel_dp_hdcp.h"
#include "intel_hdcp.h"
static unsigned int transcoder_to_stream_enc_status(enum transcoder
cpu_transcoder)
@@ -835,7 +836,7 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim
= {
.protocol = HDCP_PROTOCOL_DP,
};
-int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
+int intel_dp_hdcp_init(struct intel_digital_port *dig_port,
struct intel_connector *intel_connector)
{
struct drm_device *dev = intel_connector->base.dev;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.h
b/drivers/gpu/drm/i915/display/intel_dp_hdcp.h
new file mode 100644
index ..eff5ec5c5021
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __INTEL_DP_HDCP___
+#define __INTEL_DP_HDCP___
+
+struct intel_connector;
+struct intel_digital_port;
+
+int intel_dp_hdcp_init(struct intel_digital_port *dig_port,
+ struct intel_connector *intel_connector);
+
+#endif /* __INTEL_DP_HDCP___ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 180f97cd74cb..3558bce242ee 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -34,11 +34,12 @@
#include "intel_connector.h"
#include "intel_ddi.h"
#include "intel_display_types.h"
-#include "intel_hotplug.h"
#include "intel_dp.h"
+#include "intel_dp_hdcp.h"
#include "intel_dp_mst.h"
#include "intel_dpio_phy.h"
#include "intel_hdcp.h"
+#include "intel_hotplug.h"
#include "skl_scaler.h"
static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
@@ -832,7 +833,7 @@ static struct drm_connector
*intel_dp_add_mst_connector(struct drm_dp_mst_topolo
intel_attach_broadcast_rgb_property(connector);
if (DISPLAY_VER(dev_priv) <= 12) {
- ret = intel_dp_init_hdcp(dig_port, intel_connector);
+ ret = intel_dp_hdcp_init(dig_port, intel_connector);
Re: [Intel-gfx] [PATCH 8/8] drm/modifiers: Enforce consistency between the cap an IN_FORMATS
Hi Daniel,
On Tue, 27 Apr 2021 at 10:20, Daniel Vetter wrote:
> @@ -360,6 +373,9 @@ static int __drm_universal_plane_init(struct drm_device
> *dev,
> * drm_universal_plane_init() to let the DRM managed resource infrastructure
> * take care of cleanup and deallocation.
> *
> + * Drivers supporting modifiers must set @format_modifiers on all their
> planes,
> + * even those that only support DRM_FORMAT_MOD_LINEAR.
> + *
The comment says "must", yet we have an "if (format_modifiers)" in the codebase.
Shouldn't we add a WARN_ON() + return -EINVAL (or similar) so people
can see and fix their drivers?
As a follow-up one could even go a step further, by erroring out when
the driver hasn't provided valid modifier(s) and even removing
config::allow_fb_modifiers all together.
Although for stable - this series + WARN_ON (no return since it might
break buggy drivers) sounds good.
> @@ -909,6 +909,8 @@ struct drm_mode_config {
> * @allow_fb_modifiers:
> *
> * Whether the driver supports fb modifiers in the ADDFB2.1 ioctl
> call.
> +* Note that drivers should not set this directly, it is automatically
> +* set in drm_universal_plane_init().
> *
> * IMPORTANT:
> *
The new note and the existing IMPORTANT are in a weird mix.
Quoting the latter since it doesn't show in the diff.
If this is set the driver must fill out the full implicit modifier
information in their _mode_config_funcs.fb_create hook for legacy
userspace which does not set modifiers. Otherwise the GETFB2 ioctl is
broken for modifier aware userspace.
In particular:
As the new note says "don't set it" and the existing note one says "if
it's set". Yet no drivers do "if (config->allow_fb_modifiers)".
Sadly, nothing comes to mind atm wrt alternative wording.
With the WARN_ON() added or s/must/should/ in the documentation, the series is:
Reviewed-by: Emil Velikov
HTH
-Emil
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/arm: Don't set allow_fb_modifiers explicitly
== Series Details ==
Series: series starting with [1/8] drm/arm: Don't set allow_fb_modifiers
explicitly
URL : https://patchwork.freedesktop.org/series/89531/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10015 -> Patchwork_1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_1:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_create@basic:
- {fi-cml-drallion}: NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/fi-cml-drallion/igt@gem_exec_cre...@basic.html
Known issues
Here are the changes found in Patchwork_1 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_prime@amd-to-i915:
- fi-tgl-y: NOTRUN -> [SKIP][2] ([fdo#109315] / [i915#2575])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/fi-tgl-y/igt@amdgpu/amd_pr...@amd-to-i915.html
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][3] -> [FAIL][4] ([i915#1888])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10015/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
Possible fixes
* igt@i915_selftest@live@gem_contexts:
- fi-tgl-u2: [DMESG-WARN][5] ([i915#2867] / [i915#3240]) ->
[PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10015/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
* igt@i915_selftest@live@workarounds:
- fi-tgl-u2: [DMESG-WARN][7] ([i915#2867]) -> [PASS][8] +15
similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10015/fi-tgl-u2/igt@i915_selftest@l...@workarounds.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/fi-tgl-u2/igt@i915_selftest@l...@workarounds.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3240]: https://gitlab.freedesktop.org/drm/intel/issues/3240
Participating hosts (40 -> 39)
--
Additional (1): fi-cml-drallion
Missing(2): fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_10015 -> Patchwork_1
CI-20190529: 20190529
CI_DRM_10015: feeb8bdec63b698624bf3c2f7970c5dbed6709cd @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6076: 9ab0820dbd07781161c1ace6973ea222fd24e53a @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_1: 1aee8463efc8483a708bb75301d38994fbfbdc46 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1aee8463efc8 drm/modifiers: Enforce consistency between the cap an IN_FORMATS
899a5341c78f drm/stm: Don't set allow_fb_modifiers explicitly
940e48334301 drm/nouveau: Don't set allow_fb_modifiers explicitly
e77663da9c1f drm/msm/mdp4: Fix modifier support enabling
64a789bb0aab drm/msm/dpu1: Don't set allow_fb_modifiers explicitly
4ba63830af10 drm/i915: Don't set allow_fb_modifiers explicitly
9d02b5e6f19f drm/arm/malidp: Always list modifiers
6bdfcd621a6a drm/arm: Don't set allow_fb_modifiers explicitly
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1/index.html
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[Intel-gfx] [PATCH v7 4/4] drm: Move struct drm_device.pdev to legacy section
Struct drm_device.pdev is being moved to legacy status as only legacy
DRM drivers use it. A possible follow-up patchset could remove pdev
entirely.
v4:
* rebased
Signed-off-by: Thomas Zimmermann
Reviewed-by: Chris Wilson
Acked-by: Sam Ravnborg
---
include/drm/drm_device.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index d647223e8390..c5a195676e8f 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -279,9 +279,6 @@ struct drm_device {
/** @agp: AGP data */
struct drm_agp_head *agp;
- /** @pdev: PCI device structure */
- struct pci_dev *pdev;
-
/** @num_crtcs: Number of CRTCs on this device */
unsigned int num_crtcs;
@@ -324,6 +321,9 @@ struct drm_device {
/* List of devices per driver for stealth attach cleanup */
struct list_head legacy_dev_list;
+ /* PCI device structure */
+ struct pci_dev *pdev;
+
#ifdef __alpha__
/** @hose: PCI hose, only used on ALPHA platforms. */
struct pci_controller *hose;
--
2.31.1
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[Intel-gfx] [PATCH v7 3/4] drm/i915: Don't assign to struct drm_device.pdev
Using struct drm_device.pdev is deprecated. Don't assign it. Users should upcast from struct drm_device.dev. v6: * also fix the assignment in selftests in this patch (Chris) Signed-off-by: Thomas Zimmermann Reviewed-by: Chris Wilson Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_drv.c | 1 - drivers/gpu/drm/i915/selftests/mock_gem_device.c | 1 - 2 files changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 785dcf20c77b..db513f93f0f5 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -758,7 +758,6 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent) if (IS_ERR(i915)) return i915; - i915->drm.pdev = pdev; pci_set_drvdata(pdev, i915); /* Device parameters start as a copy of module parameters. */ diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c index 2ffc763fe90d..cf40004bc92a 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c @@ -146,7 +146,6 @@ struct drm_i915_private *mock_gem_device(void) } pci_set_drvdata(pdev, i915); - i915->drm.pdev = pdev; dev_pm_domain_set(>dev, _domain); pm_runtime_enable(>dev); -- 2.31.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v7 1/4] drm/i915/gt: Remove reference to struct drm_device.pdev
References to struct drm_device.pdev should be used any longer as
the field will be moved into the struct's legacy section. Add a fix
for the rsp commit.
Signed-off-by: Thomas Zimmermann
Fixes: a50ca39fbd01 ("drm/i915: setup the LMEM region")
Cc: Lucas De Marchi
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Matthew Auld
Cc: Jani Nikula
Cc: Chris Wilson
Cc: Daniel Vetter
Cc: Tvrtko Ursulin
Cc: Daniele Ceraolo Spurio
Cc: Mika Kuoppala
Cc: Maarten Lankhorst
Cc: Venkata Sandeep Dhanalakota
Cc: "Michał Winiarski"
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index be6f2c8f5184..73fceb0c25fc 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -177,7 +177,7 @@ static struct intel_memory_region *setup_lmem(struct
intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
struct intel_uncore *uncore = gt->uncore;
- struct pci_dev *pdev = i915->drm.pdev;
+ struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
struct intel_memory_region *mem;
resource_size_t io_start;
resource_size_t lmem_size;
--
2.31.1
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[Intel-gfx] [PATCH v7 0/4] drm: Move struct drm_device.pdev to legacy
V7 of the patchset fixes some bitrot in the intel driver. The pdev field in struct drm_device points to a PCI device structure and goes back to UMS-only days when all DRM drivers were for PCI devices. Meanwhile we also support USB, SPI and platform devices. Each of those uses the generic device stored in struct drm_device.dev. To reduce duplication and remove the special case of PCI, this patchset converts all modesetting drivers from pdev to dev and makes pdev a field for legacy UMS drivers. For PCI devices, the pointer in struct drm_device.dev can be upcasted to struct pci_device; or tested for PCI with dev_is_pci(). In several places the code can use the dev field directly. After converting all drivers and the DRM core, the pdev fields becomes only relevant for legacy drivers. In a later patchset, we may want to convert these as well and remove pdev entirely. v7: * fix instances of pdev that have benn added under i915/ v6: * also remove assignment in i915/selftests in later patch (Chris) v5: * remove assignment in later patch (Chris) v4: * merged several patches * moved core changes into separate patch * vmwgfx build fix v3: * merged several patches * fix one pdev reference in nouveau (Jeremy) * rebases v2: * move whitespace fixes into separate patches (Alex, Sam) * move i915 gt/ and gvt/ changes into separate patches (Joonas) Thomas Zimmermann (4): drm/i915/gt: Remove reference to struct drm_device.pdev drm/i915: Remove reference to struct drm_device.pdev drm/i915: Don't assign to struct drm_device.pdev drm: Move struct drm_device.pdev to legacy section drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +- drivers/gpu/drm/i915/i915_drv.c | 1 - drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 1 - include/drm/drm_device.h | 6 +++--- 5 files changed, 5 insertions(+), 7 deletions(-) -- 2.31.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v7 2/4] drm/i915: Remove reference to struct drm_device.pdev
References to struct drm_device.pdev should be used any longer as
the field will be moved into the struct's legacy section. Fix a rsp
comment.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.h
b/drivers/gpu/drm/i915/intel_runtime_pm.h
index 1e4ddd11c12b..183ea2b187fe 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.h
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.h
@@ -49,7 +49,7 @@ enum i915_drm_suspend_mode {
*/
struct intel_runtime_pm {
atomic_t wakeref_count;
- struct device *kdev; /* points to i915->drm.pdev->dev */
+ struct device *kdev; /* points to i915->drm.dev */
bool available;
bool suspended;
bool irqs_enabled;
--
2.31.1
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[Intel-gfx] [PATCH] drm/i915/gem: Remove reference to struct drm_device.pdev
References to struct drm_device.pdev should be used any longer as
the field will be moved into the struct's legacy section. Add a fix
for the rsp commit.
Signed-off-by: Thomas Zimmermann
Fixes: d57d4a1daf5e ("drm/i915: Create stolen memory region from local memory")
Cc: CQ Tang
Cc: Matthew Auld
Cc: Tvrtko Ursulin
Cc: Xinyun Liu
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Cc: "Thomas Hellström"
Cc: "Gustavo A. R. Silva"
Cc: Dan Carpenter
Cc: intel-gfx@lists.freedesktop.org
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index c5b64b2400e8..e1a32672bbe8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -773,7 +773,7 @@ struct intel_memory_region *
i915_gem_stolen_lmem_setup(struct drm_i915_private *i915)
{
struct intel_uncore *uncore = >uncore;
- struct pci_dev *pdev = i915->drm.pdev;
+ struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
struct intel_memory_region *mem;
resource_size_t io_start;
resource_size_t lmem_size;
--
2.31.1
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Re: [Intel-gfx] [PATCH v2 01/13] vfio/mdev: Remove CONFIG_VFIO_MDEV_DEVICE
On Mon, 26 Apr 2021 17:00:03 -0300 Jason Gunthorpe wrote: > For some reason the vfio_mdev shim mdev_driver has its own module and > kconfig. As the next patch requires access to it from mdev.ko merge the > two modules together and remove VFIO_MDEV_DEVICE. > > A later patch deletes this driver entirely. > > Signed-off-by: Jason Gunthorpe > --- > Documentation/s390/vfio-ap.rst | 1 - > arch/s390/Kconfig| 2 +- > drivers/gpu/drm/i915/Kconfig | 2 +- > drivers/vfio/mdev/Kconfig| 7 --- > drivers/vfio/mdev/Makefile | 3 +-- > drivers/vfio/mdev/mdev_core.c| 16 ++-- > drivers/vfio/mdev/mdev_private.h | 2 ++ > drivers/vfio/mdev/vfio_mdev.c| 24 +--- > samples/Kconfig | 6 +++--- > 9 files changed, 23 insertions(+), 40 deletions(-) This also fixes the dependencies for vfio-ccw, which never depended on VFIO_MDEV_DEVICE directly... Reviewed-by: Cornelia Huck ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 15/16] drm/i915/pxp: black pixels on pxp disabled
When protected sufaces has flipped and pxp session is disabled,
display black pixels by using plane color CTM correction.
v2:
- Display black pixels in aysnc flip too.
Cc: Ville Syrjälä
Cc: Gaurav Kumar
Cc: Shankar Uma
Signed-off-by: Anshuman Gupta
Signed-off-by: Daniele Ceraolo Spurio
---
.../drm/i915/display/skl_universal_plane.c| 51 ++-
drivers/gpu/drm/i915/i915_reg.h | 46 +
2 files changed, 95 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 74489217e580..a666b86df726 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -934,6 +934,33 @@ static u32 glk_plane_color_ctl(const struct
intel_crtc_state *crtc_state,
return plane_color_ctl;
}
+static void intel_load_plane_csc_black(struct intel_plane *intel_plane)
+{
+ struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
+ enum pipe pipe = intel_plane->pipe;
+ enum plane_id plane = intel_plane->id;
+ u16 postoff = 0;
+
+ drm_dbg_kms(_priv->drm, "plane color CTM to black %s:%d\n",
+ intel_plane->base.name, plane);
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 0), 0);
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 1), 0);
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 2), 0);
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 3), 0);
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 4), 0);
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 5), 0);
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 0), 0);
+ intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 1), 0);
+ intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 2), 0);
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 0), postoff);
+ intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 1), postoff);
+ intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 2), postoff);
+}
+
static void
skl_program_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
@@ -1039,13 +1066,22 @@ skl_program_plane(struct intel_plane *plane,
*/
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr;
+ plane_color_ctl = intel_de_read_fw(dev_priv, PLANE_COLOR_CTL(pipe,
plane_id));
if (intel_pxp_is_active(_priv->gt.pxp) &&
- plane_state->plane_decryption)
+ plane_state->plane_decryption) {
plane_surf |= PLANE_SURF_DECRYPTION_ENABLED;
- else
+ plane_color_ctl &= ~PLANE_COLOR_PLANE_CSC_ENABLE;
+ } else if (plane_state->plane_decryption) {
+ intel_load_plane_csc_black(plane);
+ plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
+ } else {
plane_surf &= ~PLANE_SURF_DECRYPTION_ENABLED;
+ plane_color_ctl &= ~PLANE_COLOR_PLANE_CSC_ENABLE;
+ }
+ intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id),
+ plane_color_ctl);
intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), plane_surf);
if (plane_state->scaler_id >= 0)
@@ -1066,6 +1102,7 @@ skl_plane_async_flip(struct intel_plane *plane,
enum pipe pipe = plane->pipe;
u32 surf_addr = plane_state->view.color_plane[0].offset;
u32 plane_ctl = plane_state->ctl;
+ u32 plane_color_ctl = 0;
plane_ctl |= skl_plane_ctl_crtc(crtc_state);
@@ -1075,6 +1112,16 @@ skl_plane_async_flip(struct intel_plane *plane,
spin_lock_irqsave(_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
+
+ if (!intel_pxp_is_active(_priv->gt.pxp) &&
+ plane_state->plane_decryption) {
+ plane_color_ctl = intel_de_read_fw(dev_priv,
PLANE_COLOR_CTL(pipe, plane_id));
+ intel_load_plane_csc_black(plane);
+ plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
+ intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id),
+ plane_color_ctl);
+ }
+
intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
intel_plane_ggtt_offset(plane_state) + surf_addr);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index fbaf9199001d..0a4deca1098b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7119,6 +7119,7 @@ enum {
#define _PLANE_COLOR_CTL_3_A 0x703CC /* GLK+ */
#define PLANE_COLOR_PIPE_GAMMA_ENABLE(1 << 30) /* Pre-ICL */
#define
[Intel-gfx] [PATCH v3 14/16] drm/i915/pxp: Add plane decryption support
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PXP session is enabled.
2. Buffer object is protected.
v2:
- Used gen fb obj user_flags instead gem_object_metadata. [Krishna]
v3:
- intel_pxp_gem_object_status() API changes.
v4: use intel_pxp_is_active (Daniele)
v5: rebase and use the new protected object status checker (Daniele)
v6: used plane state for plane_decryption to handle async flip
as suggested by Ville.
Cc: Bommu Krishnaiah
Cc: Huang Sean Z
Cc: Gaurav Kumar
Cc: Ville Syrjälä
Signed-off-by: Anshuman Gupta
Signed-off-by: Daniele Ceraolo Spurio
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 3 ++
drivers/gpu/drm/i915/display/intel_display.c | 5 +++
.../drm/i915/display/intel_display_types.h| 3 ++
.../drm/i915/display/skl_universal_plane.c| 32 +--
.../drm/i915/display/skl_universal_plane.h| 1 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
6 files changed, 42 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 7bfb26ca0bd0..7057077a2b71 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -394,6 +394,7 @@ int intel_plane_atomic_check(struct intel_atomic_state
*state,
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
+ const struct drm_framebuffer *fb = new_plane_state->hw.fb;
if (new_crtc_state && new_crtc_state->bigjoiner_slave) {
struct intel_plane *master_plane =
@@ -409,6 +410,8 @@ int intel_plane_atomic_check(struct intel_atomic_state
*state,
intel_plane_copy_uapi_to_hw_state(new_plane_state,
new_master_plane_state,
crtc);
+ new_plane_state->plane_decryption =
+ i915_gem_object_has_valid_protection(intel_fb_obj(fb));
new_plane_state->uapi.visible = false;
if (!new_crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index a10e26380ef3..55ab2d0b92d8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -9367,6 +9367,10 @@ static int intel_atomic_check_async(struct
intel_atomic_state *state)
drm_dbg_kms(>drm, "Color range cannot be changed
in async flip\n");
return -EINVAL;
}
+
+ /* plane decryption is allow to change only in synchronous
flips */
+ if (old_plane_state->plane_decryption !=
new_plane_state->plane_decryption)
+ return -EINVAL;
}
return 0;
@@ -12350,6 +12354,7 @@ static void readout_plane_state(struct drm_i915_private
*dev_priv)
crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
crtc_state = to_intel_crtc_state(crtc->base.state);
+ intel_plane_read_hw_decryption(plane_state);
intel_set_plane_visible(crtc_state, plane_state, visible);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index e2e707c4dff5..76b3bb64a36a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -617,6 +617,9 @@ struct intel_plane_state {
struct intel_fb_view view;
+ /* Plane pxp decryption state */
+ bool plane_decryption;
+
/* plane control register */
u32 ctl;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 75d3ca3dbb37..74489217e580 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -17,6 +17,7 @@
#include "intel_sprite.h"
#include "skl_scaler.h"
#include "skl_universal_plane.h"
+#include "pxp/intel_pxp.h"
static const u32 skl_plane_formats[] = {
DRM_FORMAT_C8,
@@ -956,7 +957,7 @@ skl_program_plane(struct intel_plane *plane,
u8 alpha = plane_state->hw.alpha >> 8;
u32 plane_color_ctl = 0, aux_dist = 0;
unsigned long irqflags;
- u32 keymsk, keymax;
+ u32 keymsk, keymax, plane_surf;
u32 plane_ctl = plane_state->ctl;
plane_ctl |= skl_plane_ctl_crtc(crtc_state);
@@ -1037,8 +1038,15 @@ skl_program_plane(struct intel_plane *plane,
* the control register just before the surface register.
*/
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
- intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
-
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/8] drm/arm: Don't set allow_fb_modifiers explicitly
== Series Details ==
Series: series starting with [1/8] drm/arm: Don't set allow_fb_modifiers
explicitly
URL : https://patchwork.freedesktop.org/series/89531/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6bdfcd621a6a drm/arm: Don't set allow_fb_modifiers explicitly
-:8: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 890880ddfdbe ("drm: Auto-set
allow_fb_modifiers when given modifiers at plane init")'
#8:
commit 890880ddfdbe256083170866e49c87618b706ac7
-:47: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
mismatch: 'From: Daniel Vetter ' != 'Signed-off-by:
Daniel Vetter '
total: 1 errors, 1 warnings, 0 checks, 14 lines checked
9d02b5e6f19f drm/arm/malidp: Always list modifiers
-:23: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u64' over 'uint64_t'
#23: FILE: drivers/gpu/drm/arm/malidp_planes.c:930:
+static const uint64_t linear_only_modifiers[] = {
-:41: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
mismatch: 'From: Daniel Vetter ' != 'Signed-off-by:
Daniel Vetter '
total: 0 errors, 1 warnings, 1 checks, 21 lines checked
4ba63830af10 drm/i915: Don't set allow_fb_modifiers explicitly
-:11: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 890880ddfdbe ("drm: Auto-set
allow_fb_modifiers when given modifiers at plane init")'
#11:
commit 890880ddfdbe256083170866e49c87618b706ac7
-:44: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
mismatch: 'From: Daniel Vetter ' != 'Signed-off-by:
Daniel Vetter '
total: 1 errors, 1 warnings, 0 checks, 8 lines checked
64a789bb0aab drm/msm/dpu1: Don't set allow_fb_modifiers explicitly
-:8: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 890880ddfdbe ("drm: Auto-set
allow_fb_modifiers when given modifiers at plane init")'
#8:
commit 890880ddfdbe256083170866e49c87618b706ac7
-:44: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
mismatch: 'From: Daniel Vetter ' != 'Signed-off-by:
Daniel Vetter '
total: 1 errors, 1 warnings, 0 checks, 11 lines checked
e77663da9c1f drm/msm/mdp4: Fix modifier support enabling
-:41: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u64' over 'uint64_t'
#41: FILE: drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c:352:
+static const uint64_t supported_format_modifiers[] = {
-:58: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
mismatch: 'From: Daniel Vetter ' != 'Signed-off-by:
Daniel Vetter '
total: 0 errors, 1 warnings, 1 checks, 28 lines checked
940e48334301 drm/nouveau: Don't set allow_fb_modifiers explicitly
-:8: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 890880ddfdbe ("drm: Auto-set
allow_fb_modifiers when given modifiers at plane init")'
#8:
commit 890880ddfdbe256083170866e49c87618b706ac7
-:38: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
mismatch: 'From: Daniel Vetter ' != 'Signed-off-by:
Daniel Vetter '
total: 1 errors, 1 warnings, 0 checks, 7 lines checked
899a5341c78f drm/stm: Don't set allow_fb_modifiers explicitly
-:8: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 890880ddfdbe ("drm: Auto-set
allow_fb_modifiers when given modifiers at plane init")'
#8:
commit 890880ddfdbe256083170866e49c87618b706ac7
-:38: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
mismatch: 'From: Daniel Vetter ' != 'Signed-off-by:
Daniel Vetter '
total: 1 errors, 1 warnings, 0 checks, 8 lines checked
1aee8463efc8 drm/modifiers: Enforce consistency between the cap an IN_FORMATS
-:8: WARNING:TYPO_SPELLING: 'ommitted' may be misspelled - perhaps 'omitted'?
#8:
here, and some drivers screwed this up a bit. Most just ommitted the
-:89: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
mismatch: 'From: Daniel Vetter ' != 'Signed-off-by:
Daniel Vetter '
total: 0 errors, 2 warnings, 0 checks, 45 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Simplify userptr locking
Use an rwlock instead of spinlock for the global notifier lock
to reduce risk of contention in execbuf.
Protect object state with the object lock whenever possible rather
than with the global notifier lock
Don't take an explicit page_ref in userptr_submit_init() but rather
call get_pages() after obtaining the page list so that
get_pages() holds the page_ref. This means we don't need to call
userptr_submit_fini(), which is needed to avoid awkward locking
in our upcoming VM_BIND code.
Cc: Maarten Lankhorst
Cc: Daniel Vetter
Cc: Dave Airlie
Cc: dri-de...@lists.freedesktop.org
Cc: Intel Graphics Development
Signed-off-by: Thomas Hellström
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 21 +++---
drivers/gpu/drm/i915/gem/i915_gem_object.h| 2 -
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 72 ++-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
4 files changed, 31 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 297143511f99..407ad0f223e3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -994,7 +994,7 @@ eb_get_vma(const struct i915_execbuffer *eb, unsigned long
handle)
}
}
-static void eb_release_vmas(struct i915_execbuffer *eb, bool final, bool
release_userptr)
+static void eb_release_vmas(struct i915_execbuffer *eb, bool final)
{
const unsigned int count = eb->buffer_count;
unsigned int i;
@@ -1008,11 +1008,6 @@ static void eb_release_vmas(struct i915_execbuffer *eb,
bool final, bool release
eb_unreserve_vma(ev);
- if (release_userptr && ev->flags & __EXEC_OBJECT_USERPTR_INIT) {
- ev->flags &= ~__EXEC_OBJECT_USERPTR_INIT;
- i915_gem_object_userptr_submit_fini(vma->obj);
- }
-
if (final)
i915_vma_put(vma);
}
@@ -1990,7 +1985,7 @@ static noinline int eb_relocate_parse_slow(struct
i915_execbuffer *eb,
}
/* We may process another execbuffer during the unlock... */
- eb_release_vmas(eb, false, true);
+ eb_release_vmas(eb, false);
i915_gem_ww_ctx_fini(>ww);
if (rq) {
@@ -2094,7 +2089,7 @@ static noinline int eb_relocate_parse_slow(struct
i915_execbuffer *eb,
err:
if (err == -EDEADLK) {
- eb_release_vmas(eb, false, false);
+ eb_release_vmas(eb, false);
err = i915_gem_ww_ctx_backoff(>ww);
if (!err)
goto repeat_validate;
@@ -2191,7 +2186,7 @@ static int eb_relocate_parse(struct i915_execbuffer *eb)
err:
if (err == -EDEADLK) {
- eb_release_vmas(eb, false, false);
+ eb_release_vmas(eb, false);
err = i915_gem_ww_ctx_backoff(>ww);
if (!err)
goto retry;
@@ -2268,7 +2263,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
#ifdef CONFIG_MMU_NOTIFIER
if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) {
- spin_lock(>i915->mm.notifier_lock);
+ read_lock(>i915->mm.notifier_lock);
/*
* count is always at least 1, otherwise __EXEC_USERPTR_USED
@@ -2286,7 +2281,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
break;
}
- spin_unlock(>i915->mm.notifier_lock);
+ read_unlock(>i915->mm.notifier_lock);
}
#endif
@@ -3435,7 +3430,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
err = eb_lookup_vmas();
if (err) {
- eb_release_vmas(, true, true);
+ eb_release_vmas(, true);
goto err_engine;
}
@@ -3528,7 +3523,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
i915_request_put(eb.request);
err_vma:
- eb_release_vmas(, true, true);
+ eb_release_vmas(, true);
if (eb.trampoline)
i915_vma_unpin(eb.trampoline);
WARN_ON(err == -EDEADLK);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 4a7388ce472e..b6dbafd88a2e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -606,14 +606,12 @@ i915_gem_object_is_userptr(struct drm_i915_gem_object
*obj)
int i915_gem_object_userptr_submit_init(struct drm_i915_gem_object *obj);
int i915_gem_object_userptr_submit_done(struct drm_i915_gem_object *obj);
-void i915_gem_object_userptr_submit_fini(struct drm_i915_gem_object *obj);
int i915_gem_object_userptr_validate(struct drm_i915_gem_object *obj);
#else
static inline bool i915_gem_object_is_userptr(struct drm_i915_gem_object *obj)
{ return false; }
static inline int i915_gem_object_userptr_submit_init(struct
Re: [Intel-gfx] [PATCH] drm/i915: Stop using crtc->index as the pipe
On Mon, 26 Apr 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The pipe crc code slipped theough the net when we tried to
> eliminate all crtc->index==pipe abuses. Remedy that.
>
> And while at it get rid of those nasty intel_crtc+drm_crtc
> pointer aliases.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_pipe_crc.c | 51 ++-
> 1 file changed, 26 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> index 0f6de96e6d43..acc64b87d29f 100644
> --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> @@ -580,13 +580,14 @@ int intel_crtc_verify_crc_source(struct drm_crtc *crtc,
> const char *source_name,
> return -EINVAL;
> }
>
> -int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name)
> +int intel_crtc_set_crc_source(struct drm_crtc *_crtc, const char
> *source_name)
> {
> - struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> - struct intel_pipe_crc *pipe_crc = _crtc->pipe_crc;
> + struct intel_crtc *crtc = to_intel_crtc(_crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + struct intel_pipe_crc *pipe_crc = >pipe_crc;
> enum intel_display_power_domain power_domain;
> enum intel_pipe_crc_source source;
> + enum pipe pipe = crtc->pipe;
> intel_wakeref_t wakeref;
> u32 val = 0; /* shut up gcc */
> int ret = 0;
> @@ -597,7 +598,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc,
> const char *source_name)
> return -EINVAL;
> }
>
> - power_domain = POWER_DOMAIN_PIPE(crtc->index);
> + power_domain = POWER_DOMAIN_PIPE(pipe);
> wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
> if (!wakeref) {
> drm_dbg_kms(_priv->drm,
> @@ -607,64 +608,64 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc,
> const char *source_name)
>
> enable = source != INTEL_PIPE_CRC_SOURCE_NONE;
> if (enable)
> - intel_crtc_crc_setup_workarounds(to_intel_crtc(crtc), true);
> + intel_crtc_crc_setup_workarounds(crtc, true);
>
> - ret = get_new_crc_ctl_reg(dev_priv, crtc->index, , );
> + ret = get_new_crc_ctl_reg(dev_priv, pipe, , );
> if (ret != 0)
> goto out;
>
> pipe_crc->source = source;
> - intel_de_write(dev_priv, PIPE_CRC_CTL(crtc->index), val);
> - intel_de_posting_read(dev_priv, PIPE_CRC_CTL(crtc->index));
> + intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), val);
> + intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe));
>
> if (!source) {
> if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> - vlv_undo_pipe_scramble_reset(dev_priv, crtc->index);
> + vlv_undo_pipe_scramble_reset(dev_priv, pipe);
> }
>
> pipe_crc->skipped = 0;
>
> out:
> if (!enable)
> - intel_crtc_crc_setup_workarounds(to_intel_crtc(crtc), false);
> + intel_crtc_crc_setup_workarounds(crtc, false);
>
> intel_display_power_put(dev_priv, power_domain, wakeref);
>
> return ret;
> }
>
> -void intel_crtc_enable_pipe_crc(struct intel_crtc *intel_crtc)
> +void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
> {
> - struct drm_crtc *crtc = _crtc->base;
> - struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> - struct intel_pipe_crc *pipe_crc = _crtc->pipe_crc;
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + struct intel_pipe_crc *pipe_crc = >pipe_crc;
> + enum pipe pipe = crtc->pipe;
> u32 val = 0;
>
> - if (!crtc->crc.opened)
> + if (!crtc->base.crc.opened)
> return;
>
> - if (get_new_crc_ctl_reg(dev_priv, crtc->index, _crc->source, )
> < 0)
> + if (get_new_crc_ctl_reg(dev_priv, pipe, _crc->source, ) < 0)
> return;
>
> /* Don't need pipe_crc->lock here, IRQs are not generated. */
> pipe_crc->skipped = 0;
>
> - intel_de_write(dev_priv, PIPE_CRC_CTL(crtc->index), val);
> - intel_de_posting_read(dev_priv, PIPE_CRC_CTL(crtc->index));
> + intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), val);
> + intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe));
> }
>
> -void intel_crtc_disable_pipe_crc(struct intel_crtc *intel_crtc)
> +void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
> {
> - struct drm_crtc *crtc = _crtc->base;
> - struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> - struct intel_pipe_crc *pipe_crc = _crtc->pipe_crc;
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + struct intel_pipe_crc *pipe_crc = >pipe_crc;
> + enum pipe pipe = crtc->pipe;
>
> /* Swallow crc's until we stop
Re: [Intel-gfx] Intel-gfx Digest, Vol 159, Issue 337
___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 07/21] drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES
On Fri, Apr 23, 2021 at 05:31:17PM -0500, Jason Ekstrand wrote:
> This has never been used by any userspace except IGT and provides no
> real functionality beyond parroting back parameters userspace passed in
> as part of context creation or via setparam. If the context is in
> legacy mode (where you use I915_EXEC_RENDER and friends), it returns
> success with zero data so it's not useful for discovering what engines
> are in the context. It's also not a replacement for the recently
> removed I915_CONTEXT_CLONE_ENGINES because it doesn't return any of the
> balancing or bonding information.
>
> Signed-off-by: Jason Ekstrand
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 77 +
> 1 file changed, 1 insertion(+), 76 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index a72c9b256723b..e8179918fa306 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1725,78 +1725,6 @@ set_engines(struct i915_gem_context *ctx,
> return 0;
> }
>
> -static int
> -get_engines(struct i915_gem_context *ctx,
> - struct drm_i915_gem_context_param *args)
> -{
> - struct i915_context_param_engines __user *user;
> - struct i915_gem_engines *e;
> - size_t n, count, size;
> - bool user_engines;
> - int err = 0;
> -
> - e = __context_engines_await(ctx, _engines);
> - if (!e)
> - return -ENOENT;
> -
> - if (!user_engines) {
> - i915_sw_fence_complete(>fence);
> - args->size = 0;
> - return 0;
> - }
> -
> - count = e->num_engines;
> -
> - /* Be paranoid in case we have an impedance mismatch */
> - if (!check_struct_size(user, engines, count, )) {
> - err = -EINVAL;
> - goto err_free;
> - }
> - if (overflows_type(size, args->size)) {
> - err = -EINVAL;
> - goto err_free;
> - }
> -
> - if (!args->size) {
> - args->size = size;
> - goto err_free;
> - }
> -
> - if (args->size < size) {
> - err = -EINVAL;
> - goto err_free;
> - }
> -
> - user = u64_to_user_ptr(args->value);
> - if (put_user(0, >extensions)) {
> - err = -EFAULT;
> - goto err_free;
> - }
> -
> - for (n = 0; n < count; n++) {
> - struct i915_engine_class_instance ci = {
> - .engine_class = I915_ENGINE_CLASS_INVALID,
> - .engine_instance = I915_ENGINE_CLASS_INVALID_NONE,
> - };
> -
> - if (e->engines[n]) {
> - ci.engine_class = e->engines[n]->engine->uabi_class;
> - ci.engine_instance =
> e->engines[n]->engine->uabi_instance;
> - }
> -
> - if (copy_to_user(>engines[n], , sizeof(ci))) {
> - err = -EFAULT;
> - goto err_free;
> - }
> - }
> -
> - args->size = size;
> -
> -err_free:
> - i915_sw_fence_complete(>fence);
> - return err;
> -}
> -
> static int
> set_persistence(struct i915_gem_context *ctx,
> const struct drm_i915_gem_context_param *args)
> @@ -2127,10 +2055,6 @@ int i915_gem_context_getparam_ioctl(struct drm_device
> *dev, void *data,
> ret = get_ppgtt(file_priv, ctx, args);
> break;
>
> - case I915_CONTEXT_PARAM_ENGINES:
> - ret = get_engines(ctx, args);
> - break;
> -
> case I915_CONTEXT_PARAM_PERSISTENCE:
> args->size = 0;
> args->value = i915_gem_context_is_persistent(ctx);
> @@ -2138,6 +2062,7 @@ int i915_gem_context_getparam_ioctl(struct drm_device
> *dev, void *data,
>
> case I915_CONTEXT_PARAM_NO_ZEROMAP:
> case I915_CONTEXT_PARAM_BAN_PERIOD:
> + case I915_CONTEXT_PARAM_ENGINES:
> case I915_CONTEXT_PARAM_RINGSIZE:
I like how this list keeps growing. Same thing as usual about "pls check
igt coverage".
Reviewed-by: Daniel Vetter
> default:
> ret = -EINVAL;
> --
> 2.31.1
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Stop using crtc->index as the pipe
== Series Details == Series: drm/i915: Stop using crtc->index as the pipe URL : https://patchwork.freedesktop.org/series/89511/ State : success == Summary == CI Bug Log - changes from CI_DRM_10013_full -> Patchwork_19996_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_19996_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-clear: - shard-glk: [PASS][1] -> [FAIL][2] ([i915#1888] / [i915#3160]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10013/shard-glk2/igt@gem_cre...@create-clear.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-glk2/igt@gem_cre...@create-clear.html * igt@gem_create@create-massive: - shard-snb: NOTRUN -> [DMESG-WARN][3] ([i915#3002]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-snb6/igt@gem_cre...@create-massive.html * igt@gem_ctx_persistence@process: - shard-snb: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1099]) +4 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-snb5/igt@gem_ctx_persiste...@process.html * igt@gem_eio@in-flight-1us: - shard-skl: [PASS][5] -> [TIMEOUT][6] ([i915#3063]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10013/shard-skl10/igt@gem_...@in-flight-1us.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-skl4/igt@gem_...@in-flight-1us.html * igt@gem_eio@unwedge-stress: - shard-skl: [PASS][7] -> [TIMEOUT][8] ([i915#2369] / [i915#3063]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10013/shard-skl8/igt@gem_...@unwedge-stress.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-skl4/igt@gem_...@unwedge-stress.html - shard-iclb: [PASS][9] -> [TIMEOUT][10] ([i915#2369] / [i915#2481] / [i915#3070]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10013/shard-iclb1/igt@gem_...@unwedge-stress.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-iclb1/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglb: [PASS][11] -> [FAIL][12] ([i915#2842]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10013/shard-tglb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-tglb6/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@rcs0: - shard-glk: [PASS][13] -> [FAIL][14] ([i915#2842]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10013/shard-glk9/igt@gem_exec_fair@basic-n...@rcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-glk7/igt@gem_exec_fair@basic-n...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#2842]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10013/shard-iclb2/igt@gem_exec_fair@basic-p...@vcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-iclb4/igt@gem_exec_fair@basic-p...@vcs0.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-snb: NOTRUN -> [FAIL][17] ([i915#2389]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-snb5/igt@gem_exec_reloc@basic-wide-act...@rcs0.html * igt@gem_pwrite@basic-exhaustion: - shard-kbl: NOTRUN -> [WARN][18] ([i915#2658]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-kbl6/igt@gem_pwr...@basic-exhaustion.html * igt@gem_userptr_blits@vma-merge: - shard-skl: NOTRUN -> [FAIL][19] ([i915#3318]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-skl2/igt@gem_userptr_bl...@vma-merge.html * igt@i915_selftest@live@hangcheck: - shard-snb: NOTRUN -> [INCOMPLETE][20] ([i915#2782]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-snb7/igt@i915_selftest@l...@hangcheck.html * igt@kms_big_joiner@basic: - shard-apl: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#2705]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-apl7/igt@kms_big_joi...@basic.html * igt@kms_chamelium@vga-hpd: - shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [fdo#111827]) +22 similar issues [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-apl7/igt@kms_chamel...@vga-hpd.html * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: - shard-snb: NOTRUN -> [SKIP][23] ([fdo#109271] / [fdo#111827]) +14 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19996/shard-snb7/igt@kms_color_chamel...@pipe-a-ctm-blue-to-red.html * igt@kms_color_chamelium@pipe-b-ctm-0-25: - shard-kbl:
Re: [Intel-gfx] [PATCH 06/21] drm/i915: Implement SINGLE_TIMELINE with a syncobj (v3)
On Fri, Apr 23, 2021 at 05:31:16PM -0500, Jason Ekstrand wrote:
> This API is entirely unnecessary and I'd love to get rid of it. If
> userspace wants a single timeline across multiple contexts, they can
> either use implicit synchronization or a syncobj, both of which existed
> at the time this feature landed. The justification given at the time
> was that it would help GL drivers which are inherently single-timeline.
> However, neither of our GL drivers actually wanted the feature. i965
> was already in maintenance mode at the time and iris uses syncobj for
> everything.
>
> Unfortunately, as much as I'd love to get rid of it, it is used by the
> media driver so we can't do that. We can, however, do the next-best
> thing which is to embed a syncobj in the context and do exactly what
> we'd expect from userspace internally. This isn't an entirely identical
> implementation because it's no longer atomic if userspace races with
> itself by calling execbuffer2 twice simultaneously from different
> threads. It won't crash in that case; it just doesn't guarantee any
> ordering between those two submits.
>
> Moving SINGLE_TIMELINE to a syncobj emulation has a couple of technical
> advantages beyond mere annoyance. One is that intel_timeline is no
> longer an api-visible object and can remain entirely an implementation
> detail. This may be advantageous as we make scheduler changes going
> forward. Second is that, together with deleting the CLONE_CONTEXT API,
> we should now have a 1:1 mapping between intel_context and
> intel_timeline which may help us reduce locking.
>
> v2 (Jason Ekstrand):
> - Update the comment on i915_gem_context::syncobj to mention that it's
>an emulation and the possible race if userspace calls execbuffer2
>twice on the same context concurrently.
> - Wrap the checks for eb.gem_context->syncobj in unlikely()
> - Drop the dma_fence reference
> - Improved commit message
>
> v3 (Jason Ekstrand):
> - Move the dma_fence_put() to before the error exit
>
> Signed-off-by: Jason Ekstrand
> Cc: Maarten Lankhorst
> Cc: Matthew Brost
Reviewed-by: Daniel Vetter
I'm assuming that igt coverage is good enough. Otoh if CI didn't catch
that racing execbuf are now unsynced maybe it wasn't good enough, but
whatever :-)
-Daniel
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 49 +--
> .../gpu/drm/i915/gem/i915_gem_context_types.h | 14 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 16 ++
> 3 files changed, 40 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 2c2fefa912805..a72c9b256723b 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -67,6 +67,8 @@
> #include
> #include
>
> +#include
> +
> #include "gt/gen6_ppgtt.h"
> #include "gt/intel_context.h"
> #include "gt/intel_context_param.h"
> @@ -225,10 +227,6 @@ static void intel_context_set_gem(struct intel_context
> *ce,
> ce->vm = vm;
> }
>
> - GEM_BUG_ON(ce->timeline);
> - if (ctx->timeline)
> - ce->timeline = intel_timeline_get(ctx->timeline);
> -
> if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
> intel_engine_has_timeslices(ce->engine))
> __set_bit(CONTEXT_USE_SEMAPHORES, >flags);
> @@ -351,9 +349,6 @@ void i915_gem_context_release(struct kref *ref)
> mutex_destroy(>engines_mutex);
> mutex_destroy(>lut_mutex);
>
> - if (ctx->timeline)
> - intel_timeline_put(ctx->timeline);
> -
> put_pid(ctx->pid);
> mutex_destroy(>mutex);
>
> @@ -570,6 +565,9 @@ static void context_close(struct i915_gem_context *ctx)
> if (vm)
> i915_vm_close(vm);
>
> + if (ctx->syncobj)
> + drm_syncobj_put(ctx->syncobj);
> +
> ctx->file_priv = ERR_PTR(-EBADF);
>
> /*
> @@ -765,33 +763,11 @@ static void __assign_ppgtt(struct i915_gem_context *ctx,
> i915_vm_close(vm);
> }
>
> -static void __set_timeline(struct intel_timeline **dst,
> -struct intel_timeline *src)
> -{
> - struct intel_timeline *old = *dst;
> -
> - *dst = src ? intel_timeline_get(src) : NULL;
> -
> - if (old)
> - intel_timeline_put(old);
> -}
> -
> -static void __apply_timeline(struct intel_context *ce, void *timeline)
> -{
> - __set_timeline(>timeline, timeline);
> -}
> -
> -static void __assign_timeline(struct i915_gem_context *ctx,
> - struct intel_timeline *timeline)
> -{
> - __set_timeline(>timeline, timeline);
> - context_apply_all(ctx, __apply_timeline, timeline);
> -}
> -
> static struct i915_gem_context *
> i915_gem_create_context(struct drm_i915_private *i915, unsigned int flags)
> {
> struct i915_gem_context *ctx;
> + int ret;
>
> if (flags &
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for default state object
== Series Details ==
Series: series starting with [v2,1/7] drm/i915/dg1: Fix mapping type for
default state object
URL : https://patchwork.freedesktop.org/series/89529/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10014 -> Patchwork_19998
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/index.html
Known issues
Here are the changes found in Patchwork_19998 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_chamelium@dp-crc-fast:
- fi-bsw-nick:NOTRUN -> [SKIP][1] ([fdo#109271] / [fdo#111827]) +8
similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/fi-bsw-nick/igt@kms_chamel...@dp-crc-fast.html
* igt@prime_vgem@basic-fence-flip:
- fi-bsw-nick:NOTRUN -> [SKIP][2] ([fdo#109271]) +63 similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/fi-bsw-nick/igt@prime_v...@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
[i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
Participating hosts (39 -> 38)
--
Additional (1): fi-bsw-nick
Missing(2): fi-bsw-cyan fi-bdw-samus
Build changes
-
* Linux: CI_DRM_10014 -> Patchwork_19998
CI-20190529: 20190529
CI_DRM_10014: 7b75f7fa1e7155cfeb6f928895ed259aaf6b4c8e @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6075: ccf602c569257291045415ff504a6d2460986c28 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19998: e85d70bf7f2a2fd27c51c52bd6817a214b4c9d4c @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e85d70bf7f2a drm/i915: Return error value when bo not in LMEM for discrete
4c20b10e9301 drm/i915/lmem: Bypass aperture when lmem is available
87f851fc9c27 drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on
discrete
81f1a39eb04c drm/i915/gtt/dgfx: place the PD in LMEM
f501307a51b0 drm/i915/gtt: map the PD up front
6170c13d83ab drm/i915: Update the helper to set correct mapping
c40331cdc349 drm/i915/dg1: Fix mapping type for default state object
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19998/index.html
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Re: [Intel-gfx] [PATCH 05/21] drm/i915: Drop the CONTEXT_CLONE API
On Fri, Apr 23, 2021 at 05:31:15PM -0500, Jason Ekstrand wrote:
> This API allows one context to grab bits out of another context upon
> creation. It can be used as a short-cut for setparam(getparam()) for
> things like I915_CONTEXT_PARAM_VM. However, it's never been used by any
> real userspace. It's used by a few IGT tests and that's it. Since it
> doesn't add any real value (most of the stuff you can CLONE you can copy
> in other ways), drop it.
>
> There is one thing that this API allows you to clone which you cannot
> clone via getparam/setparam: timelines. However, timelines are an
> implementation detail of i915 and not really something that needs to be
> exposed to userspace. Also, sharing timelines between contexts isn't
> obviously useful and supporting it has the potential to complicate i915
> internally. It also doesn't add any functionality that the client can't
> get in other ways. If a client really wants a shared timeline, they can
> use a syncobj and set it as an in and out fence on every submit.
>
> Signed-off-by: Jason Ekstrand
> Cc: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 199 +---
> include/uapi/drm/i915_drm.h | 16 +-
> 2 files changed, 6 insertions(+), 209 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 8a77855123cec..2c2fefa912805 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1958,207 +1958,14 @@ static int create_setparam(struct
> i915_user_extension __user *ext, void *data)
> return ctx_setparam(arg->fpriv, arg->ctx, );
> }
>
> -static int clone_engines(struct i915_gem_context *dst,
> - struct i915_gem_context *src)
> +static int invalid_ext(struct i915_user_extension __user *ext, void *data)
> {
> - struct i915_gem_engines *clone, *e;
> - bool user_engines;
> - unsigned long n;
> -
> - e = __context_engines_await(src, _engines);
> - if (!e)
> - return -ENOENT;
> -
> - clone = alloc_engines(e->num_engines);
> - if (!clone)
> - goto err_unlock;
> -
> - for (n = 0; n < e->num_engines; n++) {
> - struct intel_engine_cs *engine;
> -
> - if (!e->engines[n]) {
> - clone->engines[n] = NULL;
> - continue;
> - }
> - engine = e->engines[n]->engine;
> -
> - /*
> - * Virtual engines are singletons; they can only exist
> - * inside a single context, because they embed their
> - * HW context... As each virtual context implies a single
> - * timeline (each engine can only dequeue a single request
> - * at any time), it would be surprising for two contexts
> - * to use the same engine. So let's create a copy of
> - * the virtual engine instead.
> - */
> - if (intel_engine_is_virtual(engine))
> - clone->engines[n] =
> - intel_execlists_clone_virtual(engine);
You forgot to gc this function here ^^
> - else
> - clone->engines[n] = intel_context_create(engine);
> - if (IS_ERR_OR_NULL(clone->engines[n])) {
> - __free_engines(clone, n);
> - goto err_unlock;
> - }
> -
> - intel_context_set_gem(clone->engines[n], dst);
Not peeked ahead, but I'm really hoping intel_context_set_gem gets removed
eventually too ...
> - }
> - clone->num_engines = n;
> - i915_sw_fence_complete(>fence);
> -
> - /* Serialised by constructor */
> - engines_idle_release(dst, rcu_replace_pointer(dst->engines, clone, 1));
> - if (user_engines)
> - i915_gem_context_set_user_engines(dst);
> - else
> - i915_gem_context_clear_user_engines(dst);
> - return 0;
> -
> -err_unlock:
> - i915_sw_fence_complete(>fence);
> - return -ENOMEM;
> -}
> -
> -static int clone_flags(struct i915_gem_context *dst,
> -struct i915_gem_context *src)
> -{
> - dst->user_flags = src->user_flags;
> - return 0;
> -}
> -
> -static int clone_schedattr(struct i915_gem_context *dst,
> -struct i915_gem_context *src)
> -{
> - dst->sched = src->sched;
> - return 0;
> -}
> -
> -static int clone_sseu(struct i915_gem_context *dst,
> - struct i915_gem_context *src)
> -{
> - struct i915_gem_engines *e = i915_gem_context_lock_engines(src);
> - struct i915_gem_engines *clone;
> - unsigned long n;
> - int err;
> -
> - /* no locking required; sole access under constructor*/
> - clone = __context_engines_static(dst);
> - if (e->num_engines != clone->num_engines) {
> - err = -EINVAL;
> - goto unlock;
> -
Re: [Intel-gfx] [PATCH 04/21] drm/i915/gem: Return void from context_apply_all
On Fri, Apr 23, 2021 at 05:31:14PM -0500, Jason Ekstrand wrote:
> None of the callbacks we use with it return an error code anymore; they
> all return 0 unconditionally.
>
> Signed-off-by: Jason Ekstrand
Nice.
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 26 +++--
> 1 file changed, 8 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 1091cc04a242a..8a77855123cec 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -718,32 +718,25 @@ __context_engines_await(const struct i915_gem_context
> *ctx,
> return engines;
> }
>
> -static int
> +static void
> context_apply_all(struct i915_gem_context *ctx,
> - int (*fn)(struct intel_context *ce, void *data),
> + void (*fn)(struct intel_context *ce, void *data),
> void *data)
> {
> struct i915_gem_engines_iter it;
> struct i915_gem_engines *e;
> struct intel_context *ce;
> - int err = 0;
>
> e = __context_engines_await(ctx, NULL);
> - for_each_gem_engine(ce, e, it) {
> - err = fn(ce, data);
> - if (err)
> - break;
> - }
> + for_each_gem_engine(ce, e, it)
> + fn(ce, data);
> i915_sw_fence_complete(>fence);
> -
> - return err;
> }
>
> -static int __apply_ppgtt(struct intel_context *ce, void *vm)
> +static void __apply_ppgtt(struct intel_context *ce, void *vm)
> {
> i915_vm_put(ce->vm);
> ce->vm = i915_vm_get(vm);
> - return 0;
> }
>
> static struct i915_address_space *
> @@ -783,10 +776,9 @@ static void __set_timeline(struct intel_timeline **dst,
> intel_timeline_put(old);
> }
>
> -static int __apply_timeline(struct intel_context *ce, void *timeline)
> +static void __apply_timeline(struct intel_context *ce, void *timeline)
> {
> __set_timeline(>timeline, timeline);
> - return 0;
> }
>
> static void __assign_timeline(struct i915_gem_context *ctx,
> @@ -1842,19 +1834,17 @@ set_persistence(struct i915_gem_context *ctx,
> return __context_set_persistence(ctx, args->value);
> }
>
> -static int __apply_priority(struct intel_context *ce, void *arg)
> +static void __apply_priority(struct intel_context *ce, void *arg)
> {
> struct i915_gem_context *ctx = arg;
>
> if (!intel_engine_has_timeslices(ce->engine))
> - return 0;
> + return;
>
> if (ctx->sched.priority >= I915_PRIORITY_NORMAL)
> intel_context_set_use_semaphores(ce);
> else
> intel_context_clear_use_semaphores(ce);
> -
> - return 0;
> }
>
> static int set_priority(struct i915_gem_context *ctx,
> --
> 2.31.1
>
> ___
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH] drm/i9i5/gt: Fix a double free in gen8_preallocate_top_level_pdp
On Mon, 26 Apr 2021 at 13:44, Lv Yunlong wrote:
>
> Our code analyzer reported a double free bug.
>
> In gen8_preallocate_top_level_pdp, pde and pde->pt.base are allocated
> via alloc_pd(vm) with one reference. If pin_pt_dma() failed, pde->pt.base
> is freed by i915_gem_object_put() with a reference dropped. Then free_pd
> calls free_px() defined in intel_ppgtt.c, which calls i915_gem_object_put()
> to put pde->pt.base again.
>
> As pde->pt.base is protected by refcount, so the second put will not free
> pde->pt.base actually. But, maybe it is better to remove the first put?
>
> Fixes: 82adf901138cc ("drm/i915/gt: Shrink i915_page_directory's slab bucket")
> Signed-off-by: Lv Yunlong
Yes, it looks like this fixes a potential use-after-free. Thanks for the patch,
Reviewed-by: Matthew Auld
Pushed to drm-intel-gt-next.
___
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Intel-gfx@lists.freedesktop.org
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Re: [Intel-gfx] [PATCH 03/21] drm/i915/gem: Set the watchdog timeout directly in intel_context_set_gem
On Fri, Apr 23, 2021 at 05:31:13PM -0500, Jason Ekstrand wrote:
> Instead of handling it like a context param, unconditionally set it when
> intel_contexts are created. This doesn't fix anything but does simplify
> the code a bit.
>
> Signed-off-by: Jason Ekstrand
So the idea here is that since years we've had a watchdog uapi floating
about. Aim was for media, so that they could set very tight deadlines for
their transcodes jobs, so that if you have a corrupt bitstream (especially
for decoding) you don't hang your desktop unecessarily wrong.
But it's been stuck in limbo since forever, plus I get how this gets a bit
in the way of the proto ctx work, so makes sense to remove this prep work
again.
Maybe include the above in the commit message for a notch more context.
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 43 +++
> .../gpu/drm/i915/gem/i915_gem_context_types.h | 4 --
> drivers/gpu/drm/i915/gt/intel_context_param.h | 3 +-
> 3 files changed, 6 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 35bcdeddfbf3f..1091cc04a242a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -233,7 +233,11 @@ static void intel_context_set_gem(struct intel_context
> *ce,
> intel_engine_has_timeslices(ce->engine))
> __set_bit(CONTEXT_USE_SEMAPHORES, >flags);
>
> - intel_context_set_watchdog_us(ce, ctx->watchdog.timeout_us);
> + if (IS_ACTIVE(CONFIG_DRM_I915_REQUEST_TIMEOUT) &&
> + ctx->i915->params.request_timeout_ms) {
> + unsigned int timeout_ms = ctx->i915->params.request_timeout_ms;
> + intel_context_set_watchdog_us(ce, (u64)timeout_ms * 1000);
> + }
> }
>
> static void __free_engines(struct i915_gem_engines *e, unsigned int count)
> @@ -792,41 +796,6 @@ static void __assign_timeline(struct i915_gem_context
> *ctx,
> context_apply_all(ctx, __apply_timeline, timeline);
> }
>
> -static int __apply_watchdog(struct intel_context *ce, void *timeout_us)
> -{
> - return intel_context_set_watchdog_us(ce, (uintptr_t)timeout_us);
> -}
> -
> -static int
> -__set_watchdog(struct i915_gem_context *ctx, unsigned long timeout_us)
> -{
> - int ret;
> -
> - ret = context_apply_all(ctx, __apply_watchdog,
> - (void *)(uintptr_t)timeout_us);
> - if (!ret)
> - ctx->watchdog.timeout_us = timeout_us;
> -
> - return ret;
> -}
> -
> -static void __set_default_fence_expiry(struct i915_gem_context *ctx)
> -{
> - struct drm_i915_private *i915 = ctx->i915;
> - int ret;
> -
> - if (!IS_ACTIVE(CONFIG_DRM_I915_REQUEST_TIMEOUT) ||
> - !i915->params.request_timeout_ms)
> - return;
> -
> - /* Default expiry for user fences. */
> - ret = __set_watchdog(ctx, i915->params.request_timeout_ms * 1000);
> - if (ret)
> - drm_notice(>drm,
> -"Failed to configure default fence expiry! (%d)",
> -ret);
> -}
> -
> static struct i915_gem_context *
> i915_gem_create_context(struct drm_i915_private *i915, unsigned int flags)
> {
> @@ -871,8 +840,6 @@ i915_gem_create_context(struct drm_i915_private *i915,
> unsigned int flags)
> intel_timeline_put(timeline);
> }
>
> - __set_default_fence_expiry(ctx);
> -
> trace_i915_context_create(ctx);
>
> return ctx;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> index 5ae71ec936f7c..676592e27e7d2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> @@ -153,10 +153,6 @@ struct i915_gem_context {
>*/
> atomic_t active_count;
>
> - struct {
> - u64 timeout_us;
> - } watchdog;
> -
> /**
>* @hang_timestamp: The last time(s) this context caused a GPU hang
>*/
> diff --git a/drivers/gpu/drm/i915/gt/intel_context_param.h
> b/drivers/gpu/drm/i915/gt/intel_context_param.h
> index dffedd983693d..0c69cb42d075c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_context_param.h
> +++ b/drivers/gpu/drm/i915/gt/intel_context_param.h
> @@ -10,11 +10,10 @@
>
> #include "intel_context.h"
>
> -static inline int
> +static inline void
> intel_context_set_watchdog_us(struct intel_context *ce, u64 timeout_us)
> {
> ce->watchdog.timeout_us = timeout_us;
> - return 0;
> }
>
> #endif /* INTEL_CONTEXT_PARAM_H */
> --
> 2.31.1
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx
[Intel-gfx] [PATCH v2 08/13] vfio/gvt: Convert to use vfio_register_group_dev()
While there is a confusing mess of pointers and structs in this driver,
the struct kvmgt_vdev (which in turn is 1:1 with a struct intel_vgpu) is
what holds the vfio_device. Replace all the drvdata's and weird
derivations of vgpu and vdev with container_of() or vdev->vgpu.
Signed-off-by: Jason Gunthorpe
---
drivers/gpu/drm/i915/gvt/kvmgt.c | 208 +--
1 file changed, 111 insertions(+), 97 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index 6bf176e8426e63..85ef300087e091 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -50,6 +50,7 @@
#include "gvt.h"
static const struct intel_gvt_ops *intel_gvt_ops;
+static const struct vfio_device_ops intel_vgpu_dev_ops;
/* helper macros copied from vfio-pci */
#define VFIO_PCI_OFFSET_SHIFT 40
@@ -109,8 +110,8 @@ struct gvt_dma {
};
struct kvmgt_vdev {
+ struct vfio_device vfio_device;
struct intel_vgpu *vgpu;
- struct mdev_device *mdev;
struct vfio_region *region;
int num_regions;
struct eventfd_ctx *intx_trigger;
@@ -130,7 +131,6 @@ struct kvmgt_vdev {
struct kvm *kvm;
struct work_struct release_work;
atomic_t released;
- struct vfio_device *vfio_device;
struct vfio_group *vfio_group;
};
@@ -144,7 +144,7 @@ static inline bool handle_valid(unsigned long handle)
return !!(handle & ~0xff);
}
-static int kvmgt_guest_init(struct mdev_device *mdev);
+static int kvmgt_guest_init(struct kvmgt_vdev *vdev);
static void intel_vgpu_release_work(struct work_struct *work);
static bool kvmgt_guest_exit(struct kvmgt_guest_info *info);
@@ -611,12 +611,7 @@ static int kvmgt_get_vfio_device(void *p_vgpu)
struct intel_vgpu *vgpu = (struct intel_vgpu *)p_vgpu;
struct kvmgt_vdev *vdev = kvmgt_vdev(vgpu);
- vdev->vfio_device = vfio_device_get_from_dev(
- mdev_dev(vdev->mdev));
- if (!vdev->vfio_device) {
- gvt_vgpu_err("failed to get vfio device\n");
- return -ENODEV;
- }
+ vfio_device_get(>vfio_device);
return 0;
}
@@ -683,16 +678,14 @@ static void kvmgt_put_vfio_device(void *vgpu)
{
struct kvmgt_vdev *vdev = kvmgt_vdev((struct intel_vgpu *)vgpu);
- if (WARN_ON(!vdev->vfio_device))
- return;
-
- vfio_device_put(vdev->vfio_device);
+ vfio_device_put(>vfio_device);
}
-static int intel_vgpu_create(struct mdev_device *mdev)
+static int intel_vgpu_probe(struct mdev_device *mdev)
{
struct intel_vgpu *vgpu = NULL;
struct intel_vgpu_type *type;
+ struct kvmgt_vdev *vdev;
struct device *pdev;
void *gvt;
int ret;
@@ -702,40 +695,40 @@ static int intel_vgpu_create(struct mdev_device *mdev)
type = intel_gvt_ops->gvt_find_vgpu_type(gvt,
mdev_get_type_group_id(mdev));
- if (!type) {
- ret = -EINVAL;
- goto out;
- }
+ if (!type)
+ return -EINVAL;
vgpu = intel_gvt_ops->vgpu_create(gvt, type);
if (IS_ERR_OR_NULL(vgpu)) {
- ret = vgpu == NULL ? -EFAULT : PTR_ERR(vgpu);
gvt_err("failed to create intel vgpu: %d\n", ret);
- goto out;
+ return vgpu == NULL ? -EFAULT : PTR_ERR(vgpu);
}
- INIT_WORK(_vdev(vgpu)->release_work, intel_vgpu_release_work);
+ vdev = kvmgt_vdev(vgpu);
+ INIT_WORK(>release_work, intel_vgpu_release_work);
+ vfio_init_group_dev(>vfio_device, >dev,
+ _vgpu_dev_ops);
- kvmgt_vdev(vgpu)->mdev = mdev;
- mdev_set_drvdata(mdev, vgpu);
+ ret = vfio_register_group_dev(>vfio_device);
+ if (ret) {
+ intel_gvt_ops->vgpu_destroy(vgpu);
+ return ret;
+ }
+ dev_set_drvdata(>dev, vdev);
gvt_dbg_core("intel_vgpu_create succeeded for mdev: %s\n",
dev_name(mdev_dev(mdev)));
- ret = 0;
-
-out:
- return ret;
+ return 0;
}
-static int intel_vgpu_remove(struct mdev_device *mdev)
+static void intel_vgpu_remove(struct mdev_device *mdev)
{
- struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
-
- if (handle_valid(vgpu->handle))
- return -EBUSY;
+ struct kvmgt_vdev *vdev = dev_get_drvdata(>dev);
+ struct intel_vgpu *vgpu = vdev->vgpu;
+ if (WARN_ON(handle_valid(vgpu->handle)))
+ return;
intel_gvt_ops->vgpu_destroy(vgpu);
- return 0;
}
static int intel_vgpu_iommu_notifier(struct notifier_block *nb,
@@ -788,10 +781,11 @@ static int intel_vgpu_group_notifier(struct
notifier_block *nb,
return NOTIFY_OK;
}
-static int intel_vgpu_open(struct mdev_device *mdev)
+static int intel_vgpu_open(struct vfio_device *vfio_dev)
{
- struct intel_vgpu *vgpu =
[Intel-gfx] [PATCH v2 01/13] vfio/mdev: Remove CONFIG_VFIO_MDEV_DEVICE
For some reason the vfio_mdev shim mdev_driver has its own module and
kconfig. As the next patch requires access to it from mdev.ko merge the
two modules together and remove VFIO_MDEV_DEVICE.
A later patch deletes this driver entirely.
Signed-off-by: Jason Gunthorpe
---
Documentation/s390/vfio-ap.rst | 1 -
arch/s390/Kconfig| 2 +-
drivers/gpu/drm/i915/Kconfig | 2 +-
drivers/vfio/mdev/Kconfig| 7 ---
drivers/vfio/mdev/Makefile | 3 +--
drivers/vfio/mdev/mdev_core.c| 16 ++--
drivers/vfio/mdev/mdev_private.h | 2 ++
drivers/vfio/mdev/vfio_mdev.c| 24 +---
samples/Kconfig | 6 +++---
9 files changed, 23 insertions(+), 40 deletions(-)
diff --git a/Documentation/s390/vfio-ap.rst b/Documentation/s390/vfio-ap.rst
index e15436599086b7..f57ae621f33e89 100644
--- a/Documentation/s390/vfio-ap.rst
+++ b/Documentation/s390/vfio-ap.rst
@@ -514,7 +514,6 @@ These are the steps:
* S390_AP_IOMMU
* VFIO
* VFIO_MDEV
- * VFIO_MDEV_DEVICE
* KVM
If using make menuconfig select the following to build the vfio_ap module::
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index c1ff874e6c2e63..dc7928e37fa409 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -773,7 +773,7 @@ config VFIO_CCW
config VFIO_AP
def_tristate n
prompt "VFIO support for AP devices"
- depends on S390_AP_IOMMU && VFIO_MDEV_DEVICE && KVM
+ depends on S390_AP_IOMMU && VFIO_MDEV && KVM
depends on ZCRYPT
help
This driver grants access to Adjunct Processor (AP) devices
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 483e9ff8ca1d23..388bc41aa1a75b 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -125,7 +125,7 @@ config DRM_I915_GVT_KVMGT
tristate "Enable KVM/VFIO support for Intel GVT-g"
depends on DRM_I915_GVT
depends on KVM
- depends on VFIO_MDEV && VFIO_MDEV_DEVICE
+ depends on VFIO_MDEV
default n
help
Choose this option if you want to enable KVMGT support for
diff --git a/drivers/vfio/mdev/Kconfig b/drivers/vfio/mdev/Kconfig
index 5da27f2100f9bd..763c877a1318bc 100644
--- a/drivers/vfio/mdev/Kconfig
+++ b/drivers/vfio/mdev/Kconfig
@@ -9,10 +9,3 @@ config VFIO_MDEV
See Documentation/driver-api/vfio-mediated-device.rst for more
details.
If you don't know what do here, say N.
-
-config VFIO_MDEV_DEVICE
- tristate "VFIO driver for Mediated devices"
- depends on VFIO && VFIO_MDEV
- default n
- help
- VFIO based driver for Mediated devices.
diff --git a/drivers/vfio/mdev/Makefile b/drivers/vfio/mdev/Makefile
index 101516fdf3753e..ff9ecd80212503 100644
--- a/drivers/vfio/mdev/Makefile
+++ b/drivers/vfio/mdev/Makefile
@@ -1,6 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
-mdev-y := mdev_core.o mdev_sysfs.o mdev_driver.o
+mdev-y := mdev_core.o mdev_sysfs.o mdev_driver.o vfio_mdev.o
obj-$(CONFIG_VFIO_MDEV) += mdev.o
-obj-$(CONFIG_VFIO_MDEV_DEVICE) += vfio_mdev.o
diff --git a/drivers/vfio/mdev/mdev_core.c b/drivers/vfio/mdev/mdev_core.c
index 2a85d6fcb7ddd0..ff8c1a84516698 100644
--- a/drivers/vfio/mdev/mdev_core.c
+++ b/drivers/vfio/mdev/mdev_core.c
@@ -360,11 +360,24 @@ int mdev_device_remove(struct mdev_device *mdev)
static int __init mdev_init(void)
{
- return mdev_bus_register();
+ int rc;
+
+ rc = mdev_bus_register();
+ if (rc)
+ return rc;
+ rc = mdev_register_driver(_mdev_driver);
+ if (rc)
+ goto err_bus;
+ return 0;
+err_bus:
+ mdev_bus_unregister();
+ return rc;
}
static void __exit mdev_exit(void)
{
+ mdev_unregister_driver(_mdev_driver);
+
if (mdev_bus_compat_class)
class_compat_unregister(mdev_bus_compat_class);
@@ -378,4 +391,3 @@ MODULE_VERSION(DRIVER_VERSION);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_SOFTDEP("post: vfio_mdev");
diff --git a/drivers/vfio/mdev/mdev_private.h b/drivers/vfio/mdev/mdev_private.h
index a656cfe0346c33..5461b67582289f 100644
--- a/drivers/vfio/mdev/mdev_private.h
+++ b/drivers/vfio/mdev/mdev_private.h
@@ -37,6 +37,8 @@ struct mdev_type {
#define to_mdev_type(_kobj)\
container_of(_kobj, struct mdev_type, kobj)
+extern struct mdev_driver vfio_mdev_driver;
+
int parent_create_sysfs_files(struct mdev_parent *parent);
void parent_remove_sysfs_files(struct mdev_parent *parent);
diff --git a/drivers/vfio/mdev/vfio_mdev.c b/drivers/vfio/mdev/vfio_mdev.c
index 922729071c5a8e..d5b4eede47c1a5 100644
--- a/drivers/vfio/mdev/vfio_mdev.c
+++ b/drivers/vfio/mdev/vfio_mdev.c
@@ -17,10 +17,6 @@
#include "mdev_private.h"
-#define DRIVER_VERSION "0.1"
-#define DRIVER_AUTHOR "NVIDIA Corporation"
-#define DRIVER_DESC "VFIO based driver for Mediated
Re: [Intel-gfx] [PATCH 01/12] vfio/mdev: Remove CONFIG_VFIO_MDEV_DEVICE
On Fri, Apr 23, 2021 at 05:08:10PM -0700, Randy Dunlap wrote: > On 4/23/21 4:02 PM, Jason Gunthorpe wrote: > > @@ -171,7 +171,7 @@ config SAMPLE_VFIO_MDEV_MDPY_FB > > > > config SAMPLE_VFIO_MDEV_MBOCHS > > tristate "Build VFIO mdpy example mediated device sample code -- > > loadable modules only" > > You can drop the ending of the prompt string. Hum, I see this whole sample kconfig file is filled with this '&& m' pattern, I wonder if there is a reason? I think I will put the '&& m' back, I thought it was some kconfig misunderstanding as it is very strange to see a naked '&& M'. Thanks Jason ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
