[Intel-gfx] [PULL] drm-intel-fixes
Hi Dave & Daniel - Sorry, late due to public holidays. drm-intel-fixes-2021-05-14: drm/i915 fixes for v5.13-rc2: - Fix active callback alignment annotations and subsequent crashes - Retract link training strategy to slow and wide, again - Avoid division by zero on gen2 - Use correct width reads for C0DRB3/C1DRB3 registers - Fix double free in pdp allocation failure path - Fix HDMI 2.1 PCON downstream caps check BR, Jani. The following changes since commit 6efb943b8616ec53a5e444193dccf1af9ad627b5: Linux 5.13-rc1 (2021-05-09 14:17:44 -0700) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2021-05-14 for you to fetch changes up to e4527420ed087f99c6aa2ac22c6d3458c7dc1a94: drm/i915: Use correct downstream caps for check Src-Ctl mode for PCON (2021-05-12 20:53:08 +0300) drm/i915 fixes for v5.13-rc2: - Fix active callback alignment annotations and subsequent crashes - Retract link training strategy to slow and wide, again - Avoid division by zero on gen2 - Use correct width reads for C0DRB3/C1DRB3 registers - Fix double free in pdp allocation failure path - Fix HDMI 2.1 PCON downstream caps check Ankit Nautiyal (1): drm/i915: Use correct downstream caps for check Src-Ctl mode for PCON Kai-Heng Feng (1): drm/i915/dp: Use slow and wide link training for everything Lv Yunlong (1): drm/i915/gt: Fix a double free in gen8_preallocate_top_level_pdp Stéphane Marchesin (1): drm/i915: Fix crash in auto_retire Tvrtko Ursulin (1): drm/i915/overlay: Fix active retire callback alignment Ville Syrjälä (2): drm/i915: Avoid div-by-zero on gen2 drm/i915: Read C0DRB3/C1DRB3 as 16 bits again drivers/gpu/drm/i915/display/intel_dp.c | 61 +++- drivers/gpu/drm/i915/display/intel_overlay.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 1 - drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +- drivers/gpu/drm/i915/i915_active.c | 3 +- 6 files changed, 12 insertions(+), 61 deletions(-) -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/display: Nuke has_infoframe
== Series Details ==
Series: series starting with [1/4] drm/i915/display: Nuke has_infoframe
URL : https://patchwork.freedesktop.org/series/90149/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20124
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20124:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@runner@aborted:
- {fi-rkl-11500t}:NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-rkl-11500t/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_20124 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fence@basic-await@vecs0:
- fi-glk-dsi: [PASS][2] -> [FAIL][3] ([i915#3457])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-glk-dsi/igt@gem_exec_fence@basic-aw...@vecs0.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-glk-dsi/igt@gem_exec_fence@basic-aw...@vecs0.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271]) +6 similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html
* igt@gem_exec_fence@nb-await@bcs0:
- fi-bsw-kefka: [PASS][5] -> [FAIL][6] ([i915#3457]) +2 similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@bcs0.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@bcs0.html
* igt@gem_exec_fence@nb-await@rcs0:
- fi-bsw-nick:[PASS][7] -> [FAIL][8] ([i915#3457]) +1 similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_exec_fence@nb-aw...@rcs0.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-bsw-nick/igt@gem_exec_fence@nb-aw...@rcs0.html
* igt@gem_exec_fence@nb-await@vecs0:
- fi-bsw-n3050: [PASS][9] -> [FAIL][10] ([i915#3457])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-n3050/igt@gem_exec_fence@nb-aw...@vecs0.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-bsw-n3050/igt@gem_exec_fence@nb-aw...@vecs0.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#2190])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_wait@wait@all:
- fi-bwr-2160:[PASS][12] -> [FAIL][13] ([i915#3457])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bwr-2160/igt@gem_wait@w...@all.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-bwr-2160/igt@gem_wait@w...@all.html
* igt@i915_module_load@reload:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][14] ([i915#1982] / [i915#3457])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-kbl-soraka/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][15] ([i915#2782] / [i915#3462]
/ [i915#794])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-kbl-soraka/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][16] ([i915#1886] / [i915#2291])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@mman:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][17] ([i915#3457])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-kbl-soraka/igt@i915_selftest@l...@mman.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +8
similar issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#533])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@read-crc-pipe-a:
- fi-elk-e7500: [PASS][20] -> [FAIL][21] ([i915#53]) +2 similar issues
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@kms_pipe_crc_ba...@read-crc-pipe-a.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20124/fi-elk-e7500/igt@kms_pip
Re: [Intel-gfx] [PATCH 0/7] Per client engine busyness
+ David, Christian On Thu, May 13, 2021 at 12:41 PM Tvrtko Ursulin wrote: > > > Hi, > > On 13/05/2021 16:48, Alex Deucher wrote: > > On Thu, May 13, 2021 at 7:00 AM Tvrtko Ursulin > > wrote: > >> > >> From: Tvrtko Ursulin > >> > >> Resurrect of the previosuly merged per client engine busyness patches. In a > >> nutshell it enables intel_gpu_top to be more top(1) like useful and show > >> not > >> only physical GPU engine usage but per process view as well. > >> > >> Example screen capture: > >> > >> intel-gpu-top - 906/ 955 MHz;0% RC6; 5.30 Watts; 933 irqs/s > >> > >>IMC reads: 4414 MiB/s > >> IMC writes: 3805 MiB/s > >> > >>ENGINE BUSY MI_SEMA > >> MI_WAIT > >> Render/3D/0 93.46% |▋ | 0% > >>0% > >> Blitter/00.00% | | 0% > >>0% > >> Video/00.00% | | 0% > >>0% > >>VideoEnhance/00.00% | | 0% > >>0% > >> > >>PIDNAME Render/3D BlitterVideo > >> VideoEnhance > >> 2733 neverball |██▌ |||||| > >>| > >> 2047Xorg |███▊|||||| > >>| > >> 2737glxgears |█▍ |||||| > >>| > >> 2128 xfwm4 ||||||| > >>| > >> 2047Xorg ||||||| > >>| > >> > >> > >> Internally we track time spent on engines for each struct intel_context, > >> both > >> for current and past contexts belonging to each open DRM file. > >> > >> This can serve as a building block for several features from the wanted > >> list: > >> smarter scheduler decisions, getrusage(2)-like per-GEM-context > >> functionality > >> wanted by some customers, setrlimit(2) like controls, cgroups controller, > >> dynamic SSEU tuning, ... > >> > >> To enable userspace access to the tracked data, we expose time spent on > >> GPU per > >> client and per engine class in sysfs with a hierarchy like the below: > >> > >> # cd /sys/class/drm/card0/clients/ > >> # tree > >> . > >> ├── 7 > >> │ ├── busy > >> │ │ ├── 0 > >> │ │ ├── 1 > >> │ │ ├── 2 > >> │ │ └── 3 > >> │ ├── name > >> │ └── pid > >> ├── 8 > >> │ ├── busy > >> │ │ ├── 0 > >> │ │ ├── 1 > >> │ │ ├── 2 > >> │ │ └── 3 > >> │ ├── name > >> │ └── pid > >> └── 9 > >> ├── busy > >> │ ├── 0 > >> │ ├── 1 > >> │ ├── 2 > >> │ └── 3 > >> ├── name > >> └── pid > >> > >> Files in 'busy' directories are numbered using the engine class ABI values > >> and > >> they contain accumulated nanoseconds each client spent on engines of a > >> respective class. > > > > We did something similar in amdgpu using the gpu scheduler. We then > > expose the data via fdinfo. See > > https://cgit.freedesktop.org/drm/drm-misc/commit/?id=1774baa64f9395fa884ea9ed494bcb043f3b83f5 > > https://cgit.freedesktop.org/drm/drm-misc/commit/?id=874442541133f78c78b6880b8cc495bab5c61704 > > Interesting! > > Is yours wall time or actual GPU time taking preemption and such into > account? Do you have some userspace tools parsing this data and how to > do you client discovery? Presumably there has to be a better way that > going through all open file descriptors? Wall time. It uses the fences in the scheduler to calculate engine time. We have some python scripts to make it look pretty, but mainly just reading the files directly. If you know the process, you can look it up in procfs. > > Our implementation was merged in January but Daniel took it out recently > because he wanted to have discussion about a common vendor framework for > this whole story on dri-devel. I think. +Daniel to comment. > > I couldn't find the patch you pasted on the mailing list to see if there > was any such discussion around your version. It was on the amd-gfx mailing list. Alex > > Regards, > > Tvrtko > > > > > Alex > > > > > >> > >> Tvrtko Ursulin (7): > >>drm/i915: Expose list of clients in sysfs > >>drm/i915: Update client name on context create > >>drm/i915: Make GEM contexts track DRM clients > >>drm/i915: Track runtime spent in closed and unreachable GEM contexts > >>drm/i915: Track all user contexts per client > >>drm/i915: Track context current activ
Re: [Intel-gfx] [PATCH] drm/i915: Fix a possible use of uninitialized variable in remap_io_sg()
On Thu, May 13, 2021 at 04:28:41PM -0700, José Roberto de Souza wrote: > If the do while loop breaks in 'if (!sg_dma_len(sgl))' in the first > iteration, err is uninitialized causing a wrong call to zap_vma_ptes(). But scatterlist must have at least one valid segment. So while the patch looks ok, please clearly mark that this is a false positive from the static checker in the commit log. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/display: Nuke has_infoframe
== Series Details == Series: series starting with [1/4] drm/i915/display: Nuke has_infoframe URL : https://patchwork.freedesktop.org/series/90149/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_reset.c:1329:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080) +./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080) +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock
[Intel-gfx] [PATCH 4/4] drm/i915/display: Fix fastsets involving PSR
Commit 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware
configuration read out") is not allowing fastsets to happen when PSR
states changes but PSR is a feature that can be enabled and disabled
during fastsets.
So here moving the PSR pipe conf checks to a block that is only
executed when checking if HW state matches with requested state, not
during the phase where it checks if fastset is possible or not.
There still a state mismatch not allowing fastsets between states
turning off or on PSR because of crtc_state->infoframes.enable
BIT(DP_SDP_VSC) but at least for now it will allow a fastset between
PSR1 <-> PSR2, that is a case heavilly used by CI due to pipe CRC not
work with PSR2, but the remaning issue will be fixed in a future patch.
Cc: Gwan-gyeong Mun
Cc: Radhakrishna Sripada
Reported-by: Ville Syrjälä
Fixes: 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware
configuration read out")
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 1be88c3a0eea..e9f1665c6d4b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8546,6 +8546,11 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
bp_gamma = intel_color_get_gamma_bit_precision(pipe_config);
if (bp_gamma)
PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut,
bp_gamma);
+
+ PIPE_CONF_CHECK_BOOL(has_psr);
+ PIPE_CONF_CHECK_BOOL(has_psr2);
+ PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
+ PIPE_CONF_CHECK_I(dc3co_exitline);
}
PIPE_CONF_CHECK_BOOL(double_wide);
@@ -8629,11 +8634,6 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
PIPE_CONF_CHECK_I(vrr.flipline);
PIPE_CONF_CHECK_I(vrr.pipeline_full);
- PIPE_CONF_CHECK_BOOL(has_psr);
- PIPE_CONF_CHECK_BOOL(has_psr2);
- PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
- PIPE_CONF_CHECK_I(dc3co_exitline);
-
#undef PIPE_CONF_CHECK_X
#undef PIPE_CONF_CHECK_I
#undef PIPE_CONF_CHECK_BOOL
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/4] drm/i915/display: Replace intel_dp_set_infoframes() disable calls by dig_port->set_infoframes()
Both do the same thing and this change help towards the goal of nuke intel_dp_set_infoframes() completely. Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_ddi.c| 5 ++--- drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 5bc5528f3091..ba2f98881638 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2762,7 +2762,6 @@ static void intel_ddi_pre_enable(struct intel_atomic_state *state, conn_state); /* FIXME precompute everything properly */ - /* FIXME how do we turn infoframes off again? */ if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) dig_port->set_infoframes(encoder, true, crtc_state, conn_state); @@ -2811,8 +2810,8 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state, enum phy phy = intel_port_to_phy(dev_priv, encoder->port); if (!is_mst) - intel_dp_set_infoframes(encoder, false, old_crtc_state, - old_conn_state); + dig_port->set_infoframes(encoder, false, old_crtc_state, +old_conn_state); /* * Power down sink before disabling the port, otherwise we end diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 1eb54f8ed51a..2866303279ed 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -435,8 +435,9 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, * the transcoder clock select is set to none. */ if (last_mst_stream) - intel_dp_set_infoframes(&dig_port->base, false, old_crtc_state, - old_conn_state); + dig_port->set_infoframes(&dig_port->base, false, old_crtc_state, +old_conn_state); + /* * From TGL spec: "If multi-stream slave transcoder: Configure * Transcoder Clock Select to direct no clock to the transcoder" -- 2.31.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/4] drm/i915/display: Replace intel_dp_set_infoframes() enable calls by dig_port->set_infoframes()
intel_dp_set_infoframes() and set_infoframes() hook had some code
overlapping that makes sense us try to drop it.
set_infoframes() is called during the pre_enable phase while
intel_dp_set_infoframes() was being called in the enable phase but
it was only enabling DP_SDP_VSC and HDMI_PACKET_TYPE_GAMUT_METADATA
infoframes, that were added back to hsw_set_infoframes() and
lspcon_set_infoframes().
Did not found any information about why this difference of phase but
if it is not supported our CI will probably catch it.
As hsw_set_infoframes() will now be called during the fastset updates
the assert_hdmi_transcoder_func_disabled() check needed to be dropped.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c| 11 ++-
drivers/gpu/drm/i915/display/intel_dp.c | 36 ++---
drivers/gpu/drm/i915/display/intel_dp.h | 6 ++--
drivers/gpu/drm/i915/display/intel_hdmi.c | 19 ---
drivers/gpu/drm/i915/display/intel_lspcon.c | 2 ++
5 files changed, 17 insertions(+), 57 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index ba2f98881638..04cf7815da2f 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2762,9 +2762,7 @@ static void intel_ddi_pre_enable(struct
intel_atomic_state *state,
conn_state);
/* FIXME precompute everything properly */
- if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink)
- dig_port->set_infoframes(encoder, true, crtc_state,
-conn_state);
+ dig_port->set_infoframes(encoder, true, crtc_state, conn_state);
}
}
@@ -3033,7 +3031,6 @@ static void intel_enable_ddi_dp(struct intel_atomic_state
*state,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
enum port port = encoder->port;
if (port == PORT_A && DISPLAY_VER(dev_priv) < 9)
@@ -3042,9 +3039,6 @@ static void intel_enable_ddi_dp(struct intel_atomic_state
*state,
intel_edp_backlight_on(crtc_state, conn_state);
intel_psr_enable(intel_dp, crtc_state, conn_state);
- if (!dig_port->lspcon.active || dig_port->dp.has_hdmi_sink)
- intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
-
intel_edp_drrs_enable(intel_dp, crtc_state);
if (crtc_state->has_audio)
@@ -3245,12 +3239,13 @@ static void intel_ddi_update_pipe_dp(struct
intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state
*conn_state)
{
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
intel_ddi_set_dp_msa(crtc_state, conn_state);
intel_psr_update(intel_dp, crtc_state, conn_state);
- intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
+ dig_port->set_infoframes(encoder, true, crtc_state, conn_state);
intel_edp_drrs_update(intel_dp, crtc_state);
intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 861409bc210d..270d9d7ac614 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2757,9 +2757,9 @@ intel_dp_hdr_metadata_infoframe_sdp_pack(const struct
hdmi_drm_infoframe *drm_in
return sizeof(struct dp_sdp_header) + 2 + HDMI_DRM_INFOFRAME_SIZE;
}
-static void intel_write_dp_sdp(struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- unsigned int type)
+void intel_write_dp_sdp(struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ unsigned int type)
{
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -2808,36 +2808,6 @@ void intel_write_dp_vsc_sdp(struct intel_encoder
*encoder,
&sdp, len);
}
-void intel_dp_set_infoframes(struct intel_encoder *encoder,
-bool enable,
-const struct intel_crtc_state *crtc_state,
-const struct drm_connector_state *conn_state)
-{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder);
- u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |
-
[Intel-gfx] [PATCH 1/4] drm/i915/display: Nuke has_infoframe
This was only reduntant information has_hdmi_sink can do the same job. set_infoframes() hooks will call intel_write_infoframe() for the supported infoframes types and it will only be enabled if given type is set in crtc_state->infoframes.enable. Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/g4x_hdmi.c | 22 ++- drivers/gpu/drm/i915/display/intel_ddi.c | 17 +- drivers/gpu/drm/i915/display/intel_display.c | 6 ++--- .../drm/i915/display/intel_display_types.h| 3 --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 ++-- drivers/gpu/drm/i915/display/intel_hdmi.c | 13 +-- 6 files changed, 22 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c index be352e9f0afc..f35db96e6239 100644 --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c @@ -105,9 +105,6 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder, pipe_config->infoframes.enable |= intel_hdmi_infoframes_enabled(encoder, pipe_config); - if (pipe_config->infoframes.enable) - pipe_config->has_infoframe = true; - if (tmp & HDMI_AUDIO_ENABLE) pipe_config->has_audio = true; @@ -343,9 +340,7 @@ static void intel_disable_hdmi(struct intel_atomic_state *state, intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); } - dig_port->set_infoframes(encoder, - false, - old_crtc_state, old_conn_state); + dig_port->set_infoframes(encoder, false, old_crtc_state, old_conn_state); intel_dp_dual_mode_set_tmds_output(intel_hdmi, false); } @@ -390,9 +385,8 @@ static void intel_hdmi_pre_enable(struct intel_atomic_state *state, intel_hdmi_prepare(encoder, pipe_config); - dig_port->set_infoframes(encoder, - pipe_config->has_infoframe, - pipe_config, conn_state); + dig_port->set_infoframes(encoder, pipe_config->has_hdmi_sink, +pipe_config, conn_state); } static void vlv_hdmi_pre_enable(struct intel_atomic_state *state, @@ -410,9 +404,8 @@ static void vlv_hdmi_pre_enable(struct intel_atomic_state *state, 0x2b245f5f, 0x2000, 0x5578b83a, 0x2b247878); - dig_port->set_infoframes(encoder, - pipe_config->has_infoframe, - pipe_config, conn_state); + dig_port->set_infoframes(encoder, pipe_config->has_hdmi_sink, +pipe_config, conn_state); g4x_enable_hdmi(state, encoder, pipe_config, conn_state); @@ -487,9 +480,8 @@ static void chv_hdmi_pre_enable(struct intel_atomic_state *state, /* Use 800mV-0dB */ chv_set_phy_signal_level(encoder, pipe_config, 128, 102, false); - dig_port->set_infoframes(encoder, - pipe_config->has_infoframe, - pipe_config, conn_state); + dig_port->set_infoframes(encoder, pipe_config->has_hdmi_sink, +pipe_config, conn_state); g4x_enable_hdmi(state, encoder, pipe_config, conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index b7a2fce684c9..5bc5528f3091 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2722,9 +2722,8 @@ static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state *state, intel_ddi_enable_pipe_clock(encoder, crtc_state); - dig_port->set_infoframes(encoder, -crtc_state->has_infoframe, -crtc_state, conn_state); + dig_port->set_infoframes(encoder, crtc_state->has_hdmi_sink, crtc_state, +conn_state); } static void intel_ddi_pre_enable(struct intel_atomic_state *state, @@ -2765,9 +2764,8 @@ static void intel_ddi_pre_enable(struct intel_atomic_state *state, /* FIXME precompute everything properly */ /* FIXME how do we turn infoframes off again? */ if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) - dig_port->set_infoframes(encoder, -crtc_state->has_infoframe, -crtc_state, conn_state); + dig_port->set_infoframes(encoder, true, crtc_state, +conn_state); } } @@ -2813,8 +2811,8 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state, enum phy phy = intel_port_to_phy(dev_priv,
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix a possible use of uninitialized variable in remap_io_sg()
== Series Details ==
Series: drm/i915: Fix a possible use of uninitialized variable in remap_io_sg()
URL : https://patchwork.freedesktop.org/series/90142/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10074_full -> Patchwork_20123_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_20123_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20123_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_20123_full:
### IGT changes ###
Possible regressions
* igt@api_intel_bb@intel-bb-blit-none:
- shard-glk: [PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk5/igt@api_intel...@intel-bb-blit-none.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-glk4/igt@api_intel...@intel-bb-blit-none.html
* igt@gem_mmap_gtt@fault-concurrent-y:
- shard-skl: NOTRUN -> [INCOMPLETE][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-skl1/igt@gem_mmap_...@fault-concurrent-y.html
* igt@kms_plane_cursor@pipe-b-primary-size-256:
- shard-snb: NOTRUN -> [FAIL][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-snb5/igt@kms_plane_cur...@pipe-b-primary-size-256.html
Warnings
* igt@gem_render_copy@yf-tiled-ccs-to-linear:
- shard-glk: [INCOMPLETE][5] ([i915#3468]) -> [INCOMPLETE][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk3/igt@gem_render_c...@yf-tiled-ccs-to-linear.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-glk5/igt@gem_render_c...@yf-tiled-ccs-to-linear.html
* igt@kms_plane_cursor@pipe-c-viewport-size-64:
- shard-tglb: [FAIL][7] ([i915#3457]) -> [FAIL][8] +2 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-tglb8/igt@kms_plane_cur...@pipe-c-viewport-size-64.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-tglb3/igt@kms_plane_cur...@pipe-c-viewport-size-64.html
### Piglit changes ###
Possible regressions
* spec@glsl-4.00@execution@built-in-functions@gs-op-mult-dmat4-double (NEW):
- {pig-icl-1065g7}: NOTRUN -> [INCOMPLETE][9] +1 similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/pig-icl-1065g7/spec@glsl-4.00@execution@built-in-functi...@gs-op-mult-dmat4-double.html
New tests
-
New tests have been introduced between CI_DRM_10074_full and
Patchwork_20123_full:
### New Piglit tests (2) ###
* spec@glsl-4.00@execution@built-in-functions@gs-op-mult-dmat3-dmat3:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
* spec@glsl-4.00@execution@built-in-functions@gs-op-mult-dmat4-double:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
Known issues
Here are the changes found in Patchwork_20123_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@api_intel_bb@blit-noreloc-purge-cache-random:
- shard-apl: NOTRUN -> [DMESG-FAIL][10] ([i915#3457])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-apl6/igt@api_intel...@blit-noreloc-purge-cache-random.html
* igt@api_intel_bb@intel-bb-blit-y:
- shard-glk: [PASS][11] -> [FAIL][12] ([i915#3471])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk8/igt@api_intel...@intel-bb-blit-y.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-glk7/igt@api_intel...@intel-bb-blit-y.html
* igt@api_intel_bb@offset-control:
- shard-skl: NOTRUN -> [DMESG-WARN][13] ([i915#3457])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-skl9/igt@api_intel...@offset-control.html
* igt@gem_ctx_exec@basic-close-race:
- shard-apl: NOTRUN -> [FAIL][14] ([i915#3457]) +2 similar issues
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-apl1/igt@gem_ctx_e...@basic-close-race.html
* igt@gem_ctx_persistence@idempotent:
- shard-snb: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#1099]) +6
similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-snb2/igt@gem_ctx_persiste...@idempotent.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][16] -> [TIMEOUT][17] ([i915#2369] /
[i915#3063] / [i915#3457])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-tglb5/igt@gem_...@unwedge-stress.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/shard-tglb2/igt@gem_...@unwedge-stress.html
- shard-snb:
Re: [Intel-gfx] linux-next: manual merge of the drm-intel tree with the drm tree
Hi all,
On Fri, 30 Apr 2021 08:23:21 +1000 Stephen Rothwell
wrote:
>
> On Thu, 18 Mar 2021 12:52:41 +1100 Stephen Rothwell
> wrote:
> >
> > On Wed, 17 Mar 2021 14:08:24 +1100 Stephen Rothwell
> > wrote:
> > >
> > > Today's linux-next merge of the drm-intel tree got a conflict in:
> > >
> > > drivers/gpu/drm/i915/display/intel_sprite.c
> > >
> > > between commit:
> > >
> > > 92f1d09ca4ed ("drm: Switch to %p4cc format modifier")
> > >
> > > from the drm tree and commit:
> > >
> > > 46d12f911821 ("drm/i915: migrate skl planes code new file (v5)")
> > >
> > > from the drm-intel tree.
> > >
> > > I fixed it up (I used the latter version of the file and applied the
> > > following patch) and can carry the fix as necessary. This is now fixed
> > > as far as linux-next is concerned, but any non trivial conflicts should
> > > be mentioned to your upstream maintainer when your tree is submitted for
> > > merging. You may also want to consider cooperating with the maintainer
> > > of the conflicting tree to minimise any particularly complex conflicts.
> > >
> > > From: Stephen Rothwell
> > > Date: Wed, 17 Mar 2021 14:05:42 +1100
> > > Subject: [PATCH] merge fix for "drm: Switch to %p4cc format modifier"
> > >
> > > Signed-off-by: Stephen Rothwell
> > > ---
> > > drivers/gpu/drm/i915/display/skl_universal_plane.c | 6 ++
> > > 1 file changed, 2 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > index 1f335cb09149..45ceff436bf7 100644
> > > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > > @@ -1120,7 +1120,6 @@ static int skl_plane_check_fb(const struct
> > > intel_crtc_state *crtc_state,
> > > struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> > > const struct drm_framebuffer *fb = plane_state->hw.fb;
> > > unsigned int rotation = plane_state->hw.rotation;
> > > - struct drm_format_name_buf format_name;
> > >
> > > if (!fb)
> > > return 0;
> > > @@ -1168,9 +1167,8 @@ static int skl_plane_check_fb(const struct
> > > intel_crtc_state *crtc_state,
> > > case DRM_FORMAT_XVYU12_16161616:
> > > case DRM_FORMAT_XVYU16161616:
> > > drm_dbg_kms(&dev_priv->drm,
> > > - "Unsupported pixel format %s for 90/270!\n",
> > > - drm_get_format_name(fb->format->format,
> > > - &format_name));
> > > + "Unsupported pixel format %p4cc for
> > > 90/270!\n",
> > > + &fb->format->format);
> > > return -EINVAL;
> > > default:
> > > break;
> > > --
> > > 2.30.0
> >
> > The above fix up patch now needs to be applied to the drm tree.
>
> I am still applying the above patch, but it applies to Linus' tree now.
I am going to stop applying this. You guys can apply it if you want to
some time.
--
Cheers,
Stephen Rothwell
pgpkQ_oriCcvB.pgp
Description: OpenPGP digital signature
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix a possible use of uninitialized variable in remap_io_sg()
== Series Details ==
Series: drm/i915: Fix a possible use of uninitialized variable in remap_io_sg()
URL : https://patchwork.freedesktop.org/series/90142/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20123
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20123:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@runner@aborted:
- {fi-rkl-11500t}:NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-rkl-11500t/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_20123 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fence@basic-await@vecs0:
- fi-bsw-n3050: [PASS][2] -> [FAIL][3] ([i915#3457]) +2 similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@vecs0.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@vecs0.html
- fi-glk-dsi: [PASS][4] -> [FAIL][5] ([i915#3457])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-glk-dsi/igt@gem_exec_fence@basic-aw...@vecs0.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-glk-dsi/igt@gem_exec_fence@basic-aw...@vecs0.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271]) +6 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html
* igt@gem_exec_fence@nb-await@vecs0:
- fi-bsw-kefka: [PASS][7] -> [FAIL][8] ([i915#3457]) +2 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@vecs0.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@vecs0.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#2190])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@i915_module_load@reload:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][10] ([i915#1982] / [i915#3457])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-kbl-soraka/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][11] ([i915#2782] / [i915#3462]
/ [i915#794])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-kbl-soraka/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][12] ([i915#1886] / [i915#2291])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@mman:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][13] ([i915#3457])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-kbl-soraka/igt@i915_selftest@l...@mman.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8
similar issues
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [PASS][15] -> [DMESG-WARN][16] ([i915#2868])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-elk-e7500: [PASS][17] -> [FAIL][18] ([i915#53])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-elk-e7500/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#533])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20123/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-bsw-kefka: [PASS][20] -> [FAIL][21] ([i915#53])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequen
[Intel-gfx] [PATCH] drm/i915: Fix a possible use of uninitialized variable in remap_io_sg()
If the do while loop breaks in 'if (!sg_dma_len(sgl))' in the first
iteration, err is uninitialized causing a wrong call to zap_vma_ptes().
Fixes: b12d691ea5e0 ("i915: fix remap_io_sg to verify the pgprot")
Cc: Christoph Hellwig
Signed-off-by: James Ausmus
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_mm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 4c8cd08c672d..25576fa73ff0 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -47,7 +47,7 @@ int remap_io_sg(struct vm_area_struct *vma,
struct scatterlist *sgl, resource_size_t iobase)
{
unsigned long pfn, len, remapped = 0;
- int err;
+ int err = 0;
/* We rely on prevalidation of the io-mapping to skip track_pfn(). */
GEM_BUG_ON((vma->vm_flags & EXPECTED_FLAGS) != EXPECTED_FLAGS);
--
2.31.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4
== Series Details ==
Series: drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4
URL : https://patchwork.freedesktop.org/series/90102/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10074_full -> Patchwork_20115_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_20115_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20115_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_20115_full:
### IGT changes ###
Possible regressions
* igt@kms_draw_crc@draw-method-xrgb-blt-untiled:
- shard-skl: NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/shard-skl8/igt@kms_draw_...@draw-method-xrgb-blt-untiled.html
* igt@kms_flip_tiling@flip-changes-tiling@hdmi-a-1-pipe-c:
- shard-glk: [PASS][2] -> [FAIL][3] +1 similar issue
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk8/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/shard-glk6/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html
* igt@kms_plane_cursor@pipe-b-primary-size-256:
- shard-snb: NOTRUN -> [FAIL][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/shard-snb5/igt@kms_plane_cur...@pipe-b-primary-size-256.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_plane@plane-position-hole@pipe-a-planes}:
- shard-glk: [FAIL][5] ([i915#3457]) -> [FAIL][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk9/igt@kms_plane@plane-position-h...@pipe-a-planes.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/shard-glk8/igt@kms_plane@plane-position-h...@pipe-a-planes.html
### Piglit changes ###
Possible regressions
*
spec@arb_gpu_shader_int64@execution@built-in-functions@fs-op-ne-uint64_t-uint64_t
(NEW):
- {pig-icl-1065g7}: NOTRUN -> [CRASH][7]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/pig-icl-1065g7/spec@arb_gpu_shader_int64@execution@built-in-functions@fs-op-ne-uint64_t-uint64_t.html
*
spec@arb_gpu_shader_int64@execution@built-in-functions@tcs-op-gt-uint64_t-uint64_t-using-if
(NEW):
- {pig-icl-1065g7}: NOTRUN -> [INCOMPLETE][8] +7 similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/pig-icl-1065g7/spec@arb_gpu_shader_int64@execution@built-in-functions@tcs-op-gt-uint64_t-uint64_t-using-if.html
New tests
-
New tests have been introduced between CI_DRM_10074_full and
Patchwork_20115_full:
### New Piglit tests (9) ###
*
spec@arb_gpu_shader_int64@execution@built-in-functions@cs-min-i64vec2-i64vec2:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
*
spec@arb_gpu_shader_int64@execution@built-in-functions@cs-op-mult-i64vec3-i64vec3:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
*
spec@arb_gpu_shader_int64@execution@built-in-functions@fs-op-ne-uint64_t-uint64_t:
- Statuses : 1 crash(s)
- Exec time: [0.76] s
*
spec@arb_gpu_shader_int64@execution@built-in-functions@gs-max-i64vec3-i64vec3:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
*
spec@arb_gpu_shader_int64@execution@built-in-functions@gs-op-mult-i64vec4-i64vec4:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
*
spec@arb_gpu_shader_int64@execution@built-in-functions@tcs-op-gt-uint64_t-uint64_t-using-if:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
*
spec@arb_gpu_shader_int64@execution@built-in-functions@tcs-op-mod-u64vec2-uint64_t:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
*
spec@arb_gpu_shader_int64@execution@built-in-functions@vs-op-add-uint64_t-u64vec2:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
*
spec@arb_gpu_shader_int64@execution@built-in-functions@vs-op-bitxor-uint64_t-uint64_t:
- Statuses : 1 incomplete(s)
- Exec time: [0.0] s
Known issues
Here are the changes found in Patchwork_20115_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@api_intel_bb@blit-noreloc-purge-cache-random:
- shard-apl: NOTRUN -> [DMESG-FAIL][9] ([i915#3457])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/shard-apl7/igt@api_intel...@blit-noreloc-purge-cache-random.html
* igt@api_intel_bb@intel-bb-blit-x:
- shard-glk: [PASS][10] -> [FAIL][11] ([i915#3471])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/jsl: Add W/A 1409054076 for JSL (rev2)
== Series Details ==
Series: drm/i915/jsl: Add W/A 1409054076 for JSL (rev2)
URL : https://patchwork.freedesktop.org/series/90129/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10074_full -> Patchwork_20122_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_20122_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20122_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_20122_full:
### IGT changes ###
Possible regressions
* igt@kms_draw_crc@draw-method-xrgb-blt-untiled:
- shard-skl: NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-skl9/igt@kms_draw_...@draw-method-xrgb-blt-untiled.html
* igt@kms_flip_tiling@flip-changes-tiling@hdmi-a-1-pipe-c:
- shard-glk: [PASS][2] -> [FAIL][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk8/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-glk4/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html
Warnings
* igt@kms_cursor_legacy@flip-vs-cursor-crc-legacy:
- shard-glk: [FAIL][4] ([i915#3457]) -> [FAIL][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk7/igt@kms_cursor_leg...@flip-vs-cursor-crc-legacy.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-glk3/igt@kms_cursor_leg...@flip-vs-cursor-crc-legacy.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_plane@plane-position-covered@pipe-b-planes}:
- shard-glk: [FAIL][6] ([i915#3457]) -> [FAIL][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk8/igt@kms_plane@plane-position-cove...@pipe-b-planes.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-glk2/igt@kms_plane@plane-position-cove...@pipe-b-planes.html
Known issues
Here are the changes found in Patchwork_20122_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@api_intel_bb@offset-control:
- shard-skl: NOTRUN -> [DMESG-WARN][8] ([i915#3457])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-skl9/igt@api_intel...@offset-control.html
* igt@gem_ctx_persistence@engines-persistence@bcs0:
- shard-apl: NOTRUN -> [FAIL][9] ([i915#3457]) +9 similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-apl1/igt@gem_ctx_persistence@engines-persiste...@bcs0.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process:
- shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099]) +4
similar issues
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-snb7/igt@gem_ctx_persiste...@legacy-engines-mixed-process.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][11] -> [FAIL][12] ([i915#2842] / [i915#3457])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-iclb4/igt@gem_exec_fair@basic-none-sh...@rcs0.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-iclb2/igt@gem_exec_fair@basic-none-sh...@rcs0.html
* igt@gem_exec_fair@basic-none@bcs0:
- shard-glk: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#3457])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-glk5/igt@gem_exec_fair@basic-n...@bcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-apl: [PASS][14] -> [FAIL][15] ([i915#3209] / [i915#3457])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-apl6/igt@gem_exec_fair@basic-p...@vcs0.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-apl8/igt@gem_exec_fair@basic-p...@vcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][16] -> [FAIL][17] ([i915#2842] / [i915#3457])
+1 similar issue
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-kbl7/igt@gem_exec_fair@basic-p...@vecs0.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-kbl7/igt@gem_exec_fair@basic-p...@vecs0.html
* igt@gem_exec_reloc@basic-wide-active@bcs0:
- shard-skl: NOTRUN -> [FAIL][18] ([i915#2389] / [i915#3457]) +3
similar issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/shard-skl4/igt@gem_exec_reloc@basic-wide-act...@bcs0.html
* igt@gem_exec_reloc@basic-wide-active@rcs0:
- shard-snb: NOTRUN -> [FAIL][19] ([
Re: [Intel-gfx] [PATCH v3 11/48] drm/i915: Get slice height before computing rc params
On Fri, May 07, 2021 at 07:27:43PM -0700, Matt Roper wrote: > From: Vandita Kulkarni > > We need slice height to calculate few RC parameters > hence assign slice height first. > > Cc: Manasi Navare > Signed-off-by: Vandita Kulkarni > Signed-off-by: Matt Roper Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/display/intel_dp.c | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 8ccb3c3888f7..b9b8a0b9889a 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1154,10 +1154,6 @@ static int intel_dp_dsc_compute_params(struct > intel_encoder *encoder, >*/ > vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; > > - ret = intel_dsc_compute_params(encoder, crtc_state); > - if (ret) > - return ret; > - > /* >* Slice Height of 8 works for all currently available panels. So start >* with that if pic_height is an integral multiple of 8. Eventually add > @@ -1170,6 +1166,10 @@ static int intel_dp_dsc_compute_params(struct > intel_encoder *encoder, > else > vdsc_cfg->slice_height = 2; > > + ret = intel_dsc_compute_params(encoder, crtc_state); > + if (ret) > + return ret; > + > vdsc_cfg->dsc_version_major = > (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] & >DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT; > -- > 2.25.4 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 10/48] drm/i915/xelpd: Support DP1.4 compression BPPs
On Fri, May 07, 2021 at 07:27:42PM -0700, Matt Roper wrote:
> From: Vandita Kulkarni
>
> Support compression BPPs from bpc to uncompressed BPP -1.
> So far we have 8,10,12 as valid compressed BPPS now the
> support is extended.
>
> Cc: Manasi Navare
> Signed-off-by: Vandita Kulkarni
> Signed-off-by: Matt Roper
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 32 ++---
> 1 file changed, 24 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index f163a669f40f..8ccb3c3888f7 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -109,6 +109,7 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
> }
>
> static void intel_dp_unset_edid(struct intel_dp *intel_dp);
> +static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8
> dsc_max_bpc);
>
> /* update sink rates from dpcd */
> static void intel_dp_set_sink_rates(struct intel_dp *intel_dp)
> @@ -494,7 +495,8 @@ small_joiner_ram_size_bits(struct drm_i915_private *i915)
> static u16 intel_dp_dsc_get_output_bpp(struct drm_i915_private *i915,
> u32 link_clock, u32 lane_count,
> u32 mode_clock, u32 mode_hdisplay,
> -bool bigjoiner)
> +bool bigjoiner,
> +u32 pipe_bpp)
> {
> u32 bits_per_pixel, max_bpp_small_joiner_ram;
> int i;
> @@ -519,6 +521,7 @@ static u16 intel_dp_dsc_get_output_bpp(struct
> drm_i915_private *i915,
> drm_dbg_kms(&i915->drm, "Max small joiner bpp: %u\n",
> max_bpp_small_joiner_ram);
>
> +
> /*
>* Greatest allowed DSC BPP = MIN (output BPP from available Link BW
>* check, output bpp from small joiner RAM check)
> @@ -541,12 +544,17 @@ static u16 intel_dp_dsc_get_output_bpp(struct
> drm_i915_private *i915,
> return 0;
> }
>
> - /* Find the nearest match in the array of known BPPs from VESA */
> - for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp) - 1; i++) {
> - if (bits_per_pixel < valid_dsc_bpp[i + 1])
> - break;
> + /* From XE_LPD onwards we support from bpc upto uncompressed bpp-1 BPPs
> */
> + if (DISPLAY_VER(i915) >= 13) {
> + bits_per_pixel = min(bits_per_pixel, pipe_bpp - 1);
> + } else {
> + /* Find the nearest match in the array of known BPPs from VESA
> */
> + for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp) - 1; i++) {
> + if (bits_per_pixel < valid_dsc_bpp[i + 1])
> + break;
> + }
> + bits_per_pixel = valid_dsc_bpp[i];
> }
> - bits_per_pixel = valid_dsc_bpp[i];
>
> /*
>* Compressed BPP in U6.4 format so multiply by 16, for Gen 11,
> @@ -780,6 +788,12 @@ intel_dp_mode_valid(struct drm_connector *connector,
>*/
> if (DISPLAY_VER(dev_priv) >= 10 &&
> drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) {
> + /*
> + * TBD pass the connector BPC,
> + * for now U8_MAX so that max BPC on that platform would be
> picked
> + */
> + int pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, U8_MAX);
> +
> if (intel_dp_is_edp(intel_dp)) {
> dsc_max_output_bpp =
> drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd)
> >> 4;
> @@ -793,7 +807,8 @@ intel_dp_mode_valid(struct drm_connector *connector,
> max_lanes,
> target_clock,
> mode->hdisplay,
> - bigjoiner) >> 4;
> + bigjoiner,
> + pipe_bpp) >> 4;
> dsc_slice_count =
> intel_dp_dsc_get_slice_count(intel_dp,
>target_clock,
> @@ -1240,7 +1255,8 @@ static int intel_dp_dsc_compute_config(struct intel_dp
> *intel_dp,
> pipe_config->lane_count,
> adjusted_mode->crtc_clock,
>
> adjusted_mode->crtc_hdisplay,
> - pipe_config->bigjoiner);
> + pipe_config->bigjoiner,
> + pipe_bpp);
> dsc_dp_slice_count =
> intel_dp_dsc_get_slice_count(intel_dp,
>
Re: [Intel-gfx] [PATCH v3 41/48] drm/i915/bigjoiner: atomic commit changes for uncompressed joiner
On Fri, May 07, 2021 at 07:28:13PM -0700, Matt Roper wrote:
> From: Animesh Manna
>
> Respective bit for master or slave to be set for uncompressed
> bigjoiner in dss_ctl1 register.
>
> Cc: Manasi Navare
> Signed-off-by: Animesh Manna
> Signed-off-by: Clinton Taylor
> Signed-off-by: Matt Roper
Looks good to me :
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 6 +++
> drivers/gpu/drm/i915/display/intel_vdsc.c| 40 +++-
> drivers/gpu/drm/i915/display/intel_vdsc.h| 2 +
> drivers/gpu/drm/i915/i915_reg.h | 2 +
> 4 files changed, 49 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 7ae1e3a53dc9..44aabb3ec2b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3411,6 +3411,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct
> intel_atomic_state *state,
>const struct intel_crtc_state
> *crtc_state)
> {
> struct intel_crtc *master = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *dev_priv = to_i915(master->base.dev);
> struct intel_crtc_state *master_crtc_state;
> struct drm_connector_state *conn_state;
> struct drm_connector *conn;
> @@ -3444,6 +3445,9 @@ static void icl_ddi_bigjoiner_pre_enable(struct
> intel_atomic_state *state,
> /* and DSC on slave */
> intel_dsc_enable(NULL, crtc_state);
> }
> +
> + if (DISPLAY_VER(dev_priv) >= 13)
> + intel_uncompressed_joiner_enable(crtc_state);
> }
>
> static void hsw_crtc_enable(struct intel_atomic_state *state,
> @@ -6252,6 +6256,8 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> }
>
> intel_dsc_get_config(pipe_config);
> + if (DISPLAY_VER(dev_priv) >= 13 && !pipe_config->dsc.compression_enable)
> + intel_uncompressed_joiner_get_config(pipe_config);
>
> if (!active) {
> /* bigjoiner slave doesn't enable transcoder */
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index afaf6187e255..19cd9531c115 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -1106,6 +1106,22 @@ static i915_reg_t dss_ctl2_reg(const struct
> intel_crtc_state *crtc_state)
> return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL2(pipe) : DSS_CTL2;
> }
>
> +void intel_uncompressed_joiner_enable(const struct intel_crtc_state
> *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + u32 dss_ctl1_val = 0;
> +
> + if (crtc_state->bigjoiner && !crtc_state->dsc.compression_enable) {
> + if (crtc_state->bigjoiner_slave)
> + dss_ctl1_val |= UNCOMPRESSED_JOINER_SLAVE;
> + else
> + dss_ctl1_val |= UNCOMPRESSED_JOINER_MASTER;
> +
> + intel_de_write(dev_priv, dss_ctl1_reg(crtc_state),
> dss_ctl1_val);
> + }
> +}
> +
> void intel_dsc_enable(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> @@ -1145,13 +1161,35 @@ void intel_dsc_disable(const struct intel_crtc_state
> *old_crtc_state)
> struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>
> - if (!old_crtc_state->dsc.compression_enable)
> + if (!(old_crtc_state->dsc.compression_enable &&
> + old_crtc_state->bigjoiner))
> return;
>
> intel_de_write(dev_priv, dss_ctl1_reg(old_crtc_state), 0);
> intel_de_write(dev_priv, dss_ctl2_reg(old_crtc_state), 0);
> }
>
> +void intel_uncompressed_joiner_get_config(struct intel_crtc_state
> *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + u32 dss_ctl1;
> +
> + dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc_state));
> + if (dss_ctl1 & UNCOMPRESSED_JOINER_MASTER) {
> + crtc_state->bigjoiner = true;
> + if (!WARN_ON(INTEL_NUM_PIPES(dev_priv) == crtc->pipe + 1))
> + crtc_state->bigjoiner_linked_crtc =
> + intel_get_crtc_for_pipe(dev_priv, crtc->pipe +
> 1);
> + } else if (dss_ctl1 & UNCOMPRESSED_JOINER_SLAVE) {
> + crtc_state->bigjoiner = true;
> + crtc_state->bigjoiner_slave = true;
> + if (!WARN_ON(crtc->pipe == PIPE_A))
> + crtc_state->bigjoiner_linked_crtc =
> + intel_get_crtc_for_pipe(dev_priv, crtc->pipe -
> 1);
> + }
> +}
> +
> void intel_dsc_get_config(struct
Re: [Intel-gfx] [PATCH v3 40/48] drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed bigjoiner
On Fri, May 07, 2021 at 07:28:12PM -0700, Matt Roper wrote:
> From: Animesh Manna
>
> For uncompressed big joiner DSC engine will not be used so will avoid
> compute config of DSC.
>
> Cc: Manasi Navare
> Signed-off-by: Animesh Manna
> Signed-off-by: Clinton Taylor
> Signed-off-by: Matt Roper
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 92d4c5ab32d7..a1a472ffef6d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1371,9 +1371,13 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
>*/
> ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits);
>
> - /* enable compression if the mode doesn't fit available BW */
> + /*
> + * Pipe joiner needs compression upto display12 due to BW limitation.
> DG2
> + * onwards pipe joiner can be enabled without compression.
> + */
> drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
> - if (ret || intel_dp->force_dsc_en || pipe_config->bigjoiner) {
> + if (ret || intel_dp->force_dsc_en || (DISPLAY_VER(i915) < 13 &&
> + pipe_config->bigjoiner)) {
> ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
> conn_state, &limits);
> if (ret < 0)
> --
> 2.25.4
>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 39/48] drm/i915/bigjoiner: Mode validation with uncompressed pipe joiner
On Fri, May 07, 2021 at 07:28:11PM -0700, Matt Roper wrote: > From: Animesh Manna > > No need for checking dsc flag for uncompressed pipe joiner mode > validation. > > Cc: Manasi Navare > Signed-off-by: Animesh Manna > Signed-off-by: Clinton Taylor > Signed-off-by: Matt Roper Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/display/intel_dp.c | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index b9b8a0b9889a..92d4c5ab32d7 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -819,8 +819,11 @@ intel_dp_mode_valid(struct drm_connector *connector, > dsc = dsc_max_output_bpp && dsc_slice_count; > } > > - /* big joiner configuration needs DSC */ > - if (bigjoiner && !dsc) > + /* > + * Big joiner configuration needs DSC for TGL which is not true for > + * XE_LPD where uncompressed joiner is supported. > + */ > + if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc) > return MODE_CLOCK_HIGH; > > if (mode_rate > max_rate && !dsc) > -- > 2.25.4 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Pin the L-shape quirked object as unshrinkable (rev2)
== Series Details == Series: drm/i915/gem: Pin the L-shape quirked object as unshrinkable (rev2) URL : https://patchwork.freedesktop.org/series/90065/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10074_full -> Patchwork_20121_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_20121_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20121_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_20121_full: ### IGT changes ### Possible regressions * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy: - shard-snb: NOTRUN -> [INCOMPLETE][1] +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-snb6/igt@gem_mmap_...@cpuset-basic-small-copy-xy.html * igt@kms_flip_tiling@flip-changes-tiling@hdmi-a-1-pipe-c: - shard-glk: [PASS][2] -> [FAIL][3] +1 similar issue [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk8/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-glk5/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html * igt@kms_plane_cursor@pipe-a-overlay-size-256: - shard-snb: NOTRUN -> [FAIL][4] +1 similar issue [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-snb6/igt@kms_plane_cur...@pipe-a-overlay-size-256.html Warnings * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy: - shard-skl: [INCOMPLETE][5] ([i915#3468]) -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-skl7/igt@gem_mmap_...@cpuset-basic-small-copy-xy.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-skl7/igt@gem_mmap_...@cpuset-basic-small-copy-xy.html * igt@gem_mmap_gtt@fault-concurrent-y: - shard-iclb: [INCOMPLETE][7] ([i915#3468]) -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-iclb7/igt@gem_mmap_...@fault-concurrent-y.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-iclb3/igt@gem_mmap_...@fault-concurrent-y.html Known issues Here are the changes found in Patchwork_20121_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@delta-check: - shard-apl: NOTRUN -> [DMESG-WARN][9] ([i915#3457]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-apl6/igt@api_intel...@delta-check.html * igt@api_intel_bb@offset-control: - shard-snb: NOTRUN -> [DMESG-WARN][10] ([i915#3457]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-snb6/igt@api_intel...@offset-control.html - shard-skl: NOTRUN -> [DMESG-WARN][11] ([i915#3457]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-skl8/igt@api_intel...@offset-control.html * igt@gem_ctx_isolation@preservation-s3@vcs0: - shard-kbl: NOTRUN -> [DMESG-WARN][12] ([i915#180] / [i915#3457]) +2 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-kbl3/igt@gem_ctx_isolation@preservation...@vcs0.html * igt@gem_ctx_persistence@legacy-engines-mixed-process: - shard-snb: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1099]) +5 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-snb6/igt@gem_ctx_persiste...@legacy-engines-mixed-process.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [PASS][14] -> [FAIL][15] ([i915#2842] / [i915#3457]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-iclb4/igt@gem_exec_fair@basic-none-sh...@rcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-iclb6/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@bcs0: - shard-glk: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3457]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-glk4/igt@gem_exec_fair@basic-n...@bcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-glk: [PASS][17] -> [FAIL][18] ([i915#3209] / [i915#3457]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk3/igt@gem_exec_fair@basic-p...@vcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-glk3/igt@gem_exec_fair@basic-p...@vcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][19] ([i915#2842] / [i915#3457]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/shard-iclb4/ig
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4
Re-reported.
-Original Message-
From: Deak, Imre
Sent: Wednesday, May 12, 2021 3:46 PM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana
Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915: Reenable LTTPR non-transparent
LT mode for DPCD_REV<1.4
Hi Lakshmi,
On Wed, May 12, 2021 at 10:23:59PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4
> URL : https://patchwork.freedesktop.org/series/90102/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20115
>
>
> Summary
> ---
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_20115 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_20115, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/index.html
>
> Possible new issues
> ---
>
> Here are the unknown changes that may have been introduced in
> Patchwork_20115:
>
> ### IGT changes ###
>
> Possible regressions
>
> * igt@runner@aborted:
> - fi-ilk-650: NOTRUN -> [FAIL][1]
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-ilk-650/ig
> t@run...@aborted.html
x86/PAT: kms_busy:4365 map pfn RAM range req write-combining for [mem
0x109055000-0x109055fff], got write-back ...
i915 :00:02.0: [drm] kms_busy[4365] context reset due to GPU hang
Looks like the same issue as
https://gitlab.freedesktop.org/drm/intel/-/issues/3457
>
>
> Warnings
>
> * igt@i915_selftest@live@execlists:
> - fi-bsw-nick:[INCOMPLETE][2] ([i915#2782] / [i915#2940]) ->
> [DMESG-FAIL][3]
>[2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
>[3]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-nick/i
> gt@i915_selftest@l...@execlists.html
>
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * igt@runner@aborted:
> - {fi-rkl-11500t}:NOTRUN -> [FAIL][4]
>[4]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-rkl-11500t
> /igt@run...@aborted.html
>
>
> Known issues
>
>
> Here are the changes found in Patchwork_20115 that come from known issues:
>
> ### IGT changes ###
>
> Issues hit
>
> * igt@gem_exec_fence@basic-await@vcs0:
> - fi-bsw-n3050: [PASS][5] -> [FAIL][6] ([i915#3457])
>[5]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@vcs0.html
>[6]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-n3050/
> igt@gem_exec_fence@basic-aw...@vcs0.html
>
> * igt@gem_exec_fence@basic-await@vecs0:
> - fi-glk-dsi: [PASS][7] -> [FAIL][8] ([i915#3457])
>[7]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-glk-dsi/igt@gem_exec_fence@basic-aw...@vecs0.html
>[8]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-glk-dsi/ig
> t@gem_exec_fence@basic-aw...@vecs0.html
>
> * igt@gem_exec_fence@basic-busy@bcs0:
> - fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271]) +6 similar issues
>[9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-kbl-soraka
> /igt@gem_exec_fence@basic-b...@bcs0.html
>
> * igt@gem_exec_fence@nb-await@vcs0:
> - fi-bsw-kefka: [PASS][10] -> [FAIL][11] ([i915#3457]) +2 similar
> issues
>[10]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@vcs0.html
>[11]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-kefka/
> igt@gem_exec_fence@nb-aw...@vcs0.html
>
> * igt@gem_exec_suspend@basic-s3:
> - fi-tgl-u2: [PASS][12] -> [FAIL][13] ([i915#1888])
>[12]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
>[13]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-tgl-u2/igt
> @gem_exec_susp...@basic-s3.html
>
> * igt@gem_huc_copy@huc-copy:
> - fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#2190])
>[14]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-kbl-soraka
> /igt@gem_huc_c...@huc-copy.html
>
> * igt@gem_wait@busy@all:
> - fi-bsw-nick:[PASS][15] -> [FAIL][16] ([i915#3177] / [i915#3457])
>[15]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_wait@b...@all.html
>[16]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-nick/i
> gt@gem_wait@b...@all.html
>
> * igt@gem_wait@wait@all:
> - fi-bsw-n
Re: [Intel-gfx] [PATCH 0/7] Per client engine busyness
Hi, On 13/05/2021 16:48, Alex Deucher wrote: On Thu, May 13, 2021 at 7:00 AM Tvrtko Ursulin wrote: From: Tvrtko Ursulin Resurrect of the previosuly merged per client engine busyness patches. In a nutshell it enables intel_gpu_top to be more top(1) like useful and show not only physical GPU engine usage but per process view as well. Example screen capture: intel-gpu-top - 906/ 955 MHz;0% RC6; 5.30 Watts; 933 irqs/s IMC reads: 4414 MiB/s IMC writes: 3805 MiB/s ENGINE BUSY MI_SEMA MI_WAIT Render/3D/0 93.46% |▋ | 0% 0% Blitter/00.00% | | 0% 0% Video/00.00% | | 0% 0% VideoEnhance/00.00% | | 0% 0% PIDNAME Render/3D BlitterVideo VideoEnhance 2733 neverball |██▌ ||||||| 2047Xorg |███▊||||||| 2737glxgears |█▍ ||||||| 2128 xfwm4 |||||||| 2047Xorg |||||||| Internally we track time spent on engines for each struct intel_context, both for current and past contexts belonging to each open DRM file. This can serve as a building block for several features from the wanted list: smarter scheduler decisions, getrusage(2)-like per-GEM-context functionality wanted by some customers, setrlimit(2) like controls, cgroups controller, dynamic SSEU tuning, ... To enable userspace access to the tracked data, we expose time spent on GPU per client and per engine class in sysfs with a hierarchy like the below: # cd /sys/class/drm/card0/clients/ # tree . ├── 7 │ ├── busy │ │ ├── 0 │ │ ├── 1 │ │ ├── 2 │ │ └── 3 │ ├── name │ └── pid ├── 8 │ ├── busy │ │ ├── 0 │ │ ├── 1 │ │ ├── 2 │ │ └── 3 │ ├── name │ └── pid └── 9 ├── busy │ ├── 0 │ ├── 1 │ ├── 2 │ └── 3 ├── name └── pid Files in 'busy' directories are numbered using the engine class ABI values and they contain accumulated nanoseconds each client spent on engines of a respective class. We did something similar in amdgpu using the gpu scheduler. We then expose the data via fdinfo. See https://cgit.freedesktop.org/drm/drm-misc/commit/?id=1774baa64f9395fa884ea9ed494bcb043f3b83f5 https://cgit.freedesktop.org/drm/drm-misc/commit/?id=874442541133f78c78b6880b8cc495bab5c61704 Interesting! Is yours wall time or actual GPU time taking preemption and such into account? Do you have some userspace tools parsing this data and how to do you client discovery? Presumably there has to be a better way that going through all open file descriptors? Our implementation was merged in January but Daniel took it out recently because he wanted to have discussion about a common vendor framework for this whole story on dri-devel. I think. +Daniel to comment. I couldn't find the patch you pasted on the mailing list to see if there was any such discussion around your version. Regards, Tvrtko Alex Tvrtko Ursulin (7): drm/i915: Expose list of clients in sysfs drm/i915: Update client name on context create drm/i915: Make GEM contexts track DRM clients drm/i915: Track runtime spent in closed and unreachable GEM contexts drm/i915: Track all user contexts per client drm/i915: Track context current active time drm/i915: Expose per-engine client busyness drivers/gpu/drm/i915/Makefile | 5 +- drivers/gpu/drm/i915/gem/i915_gem_context.c | 61 ++- .../gpu/drm/i915/gem/i915_gem_context_types.h | 16 +- drivers/gpu/drm/i915/gt/intel_context.c | 27 +- drivers/gpu/drm/i915/gt/intel_context.h | 15 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 24 +- .../drm/i915/gt/intel_execlists_submission.c | 23 +- .../gpu/drm/i915/gt/intel_gt_clock_utils.c| 4 + drivers/gpu/drm/i915/gt/intel_lrc.c | 27 +- drivers/gpu/drm/i915/gt/intel_lrc.h | 24 ++ drivers/gpu/drm/i915/gt/selftest_lrc.c| 10 +- drivers/gpu/drm/i915/i915_drm_client.c| 365 ++ drivers/gpu/drm/i915/i915_drm_client.h| 123 ++ drivers/gpu/drm/i915/i915_drv.c | 6 + drivers/gpu/drm/i9
[Intel-gfx] ✗ Fi.CI.IGT: failure for Per client engine busyness
== Series Details ==
Series: Per client engine busyness
URL : https://patchwork.freedesktop.org/series/90128/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10074_full -> Patchwork_20118_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_20118_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20118_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_20118_full:
### IGT changes ###
Possible regressions
* igt@kms_flip_tiling@flip-changes-tiling@hdmi-a-1-pipe-c:
- shard-glk: [PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk8/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-glk8/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html
* igt@kms_plane_cursor@pipe-b-overlay-size-128:
- shard-snb: NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-snb7/igt@kms_plane_cur...@pipe-b-overlay-size-128.html
Warnings
* igt@kms_plane_cursor@pipe-c-viewport-size-64:
- shard-tglb: [FAIL][4] ([i915#3457]) -> [FAIL][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-tglb8/igt@kms_plane_cur...@pipe-c-viewport-size-64.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-tglb8/igt@kms_plane_cur...@pipe-c-viewport-size-64.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_plane@plane-position-covered@pipe-b-planes}:
- shard-glk: [FAIL][6] ([i915#3457]) -> [FAIL][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk8/igt@kms_plane@plane-position-cove...@pipe-b-planes.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-glk5/igt@kms_plane@plane-position-cove...@pipe-b-planes.html
Known issues
Here are the changes found in Patchwork_20118_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@api_intel_bb@intel-bb-blit-x:
- shard-glk: [PASS][8] -> [FAIL][9] ([i915#3471])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk3/igt@api_intel...@intel-bb-blit-x.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-glk6/igt@api_intel...@intel-bb-blit-x.html
* igt@api_intel_bb@offset-control:
- shard-skl: NOTRUN -> [DMESG-WARN][10] ([i915#3457])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-skl4/igt@api_intel...@offset-control.html
* igt@gem_ctx_persistence@legacy-engines-queued:
- shard-snb: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099]) +2
similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-snb2/igt@gem_ctx_persiste...@legacy-engines-queued.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][12] -> [FAIL][13] ([i915#2842] / [i915#3457])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-iclb4/igt@gem_exec_fair@basic-none-sh...@rcs0.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-iclb4/igt@gem_exec_fair@basic-none-sh...@rcs0.html
* igt@gem_exec_fair@basic-none@bcs0:
- shard-glk: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#3457])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-glk8/igt@gem_exec_fair@basic-n...@bcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][15] ([i915#2842] / [i915#3457])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-iclb2/igt@gem_exec_fair@basic-n...@vcs1.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-glk: [PASS][16] -> [FAIL][17] ([i915#3209] / [i915#3457])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk3/igt@gem_exec_fair@basic-p...@vcs0.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-glk6/igt@gem_exec_fair@basic-p...@vcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][18] -> [FAIL][19] ([i915#2842] / [i915#3457])
+2 similar issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-kbl7/igt@gem_exec_fair@basic-p...@vecs0.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/shard-kbl6/igt@gem_exec_fair@basic-p...@vecs0.html
- shard-apl: [PASS][20] -> [INCOMPLETE][21] ([i915#3457])
[20]:
https://intel-gfx-ci.01.org/tree/d
Re: [Intel-gfx] [PATCH v2 1/1] drm/dp_mst: Use kHz as link rate units when settig source max link caps at init
Reviewed-by: Lyude Paul
Will let this sit on the list for a few days to see if anyone's got any
objections and then I'll go ahead and push it
On Wed, 2021-05-12 at 17:00 -0400, Nikola Cornij wrote:
> [why]
> Link rate in kHz is what is eventually required to calculate the link
> bandwidth, which makes kHz a more generic unit. This should also make
> forward-compatibility with new DP standards easier.
>
> [how]
> - Replace 'link rate DPCD code' with 'link rate in kHz' when used with
> drm_dp_mst_topology_mgr_init()
> - Add/remove related DPCD code conversion from/to kHz where applicable
>
> Signed-off-by: Nikola Cornij
> Acked-by: Jani Nikula
> ---
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
> drivers/gpu/drm/drm_dp_mst_topology.c | 8
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 ++--
> drivers/gpu/drm/nouveau/dispnv50/disp.c | 5 +++--
> drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +-
> include/drm/drm_dp_mst_helper.h | 8
> 6 files changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 4a0c24ce5f7d..f78dd021f591 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@ -458,8 +458,8 @@ void amdgpu_dm_initialize_dp_connector(struct
> amdgpu_display_manager *dm,
> &aconnector->dm_dp_aux.aux,
> 16,
> 4,
> - (u8)max_link_enc_cap.lane_count,
> - (u8)max_link_enc_cap.link_rate,
> + max_link_enc_cap.lane_count,
> + drm_dp_bw_code_to_link_rate(max_link_enc_cap.link_rate),
> aconnector->connector_id);
>
> drm_connector_attach_dp_subconnector_property(&aconnector->base);
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 54604633e65c..32b7f8983b94 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -3722,9 +3722,9 @@ int drm_dp_mst_topology_mgr_set_mst(struct
> drm_dp_mst_topology_mgr *mgr, bool ms
> }
>
> lane_count = min_t(int, mgr->dpcd[2] & DP_MAX_LANE_COUNT_MASK,
> mgr->max_lane_count);
> - link_rate = min_t(int, mgr->dpcd[1], mgr->max_link_rate);
> + link_rate = min_t(int, drm_dp_bw_code_to_link_rate(mgr-
> >dpcd[1]), mgr->max_link_rate);
> mgr->pbn_div = drm_dp_get_vc_payload_bw(mgr,
> -
>
> drm_dp_bw_code_to_link_r
> ate(link_rate),
> + link_rate,
> lane_count);
> if (mgr->pbn_div == 0) {
> ret = -EINVAL;
> @@ -5454,7 +5454,7 @@ EXPORT_SYMBOL(drm_atomic_get_mst_topology_state);
> * @max_dpcd_transaction_bytes: hw specific DPCD transaction limit
> * @max_payloads: maximum number of payloads this GPU can source
> * @max_lane_count: maximum number of lanes this GPU supports
> - * @max_link_rate: maximum link rate this GPU supports, units as in DPCD
> + * @max_link_rate: maximum link rate per lane this GPU supports in kHz
> * @conn_base_id: the connector object ID the MST device is connected to.
> *
> * Return 0 for success, or negative error code on failure
> @@ -5462,7 +5462,7 @@ EXPORT_SYMBOL(drm_atomic_get_mst_topology_state);
> int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr,
> struct drm_device *dev, struct drm_dp_aux
> *aux,
> int max_dpcd_transaction_bytes, int
> max_payloads,
> - u8 max_lane_count, u8 max_link_rate,
> + int max_lane_count, int max_link_rate,
> int conn_base_id)
> {
> struct drm_dp_mst_topology_state *mst_state;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index f608c0cb98f4..26f65445bc8a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -960,8 +960,8 @@ intel_dp_mst_encoder_init(struct intel_digital_port
> *dig_port, int conn_base_id)
> intel_dp_create_fake_mst_encoders(dig_port);
> ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
> &intel_dp->aux, 16, 3,
> - (u8)dig_port->max_lanes,
> -
> drm_dp_link_rate_to_bw_code(max_source_rate),
> + dig_port->max_lanes,
> +
Re: [Intel-gfx] [PATCH 0/7] Per client engine busyness
On Thu, May 13, 2021 at 7:00 AM Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > Resurrect of the previosuly merged per client engine busyness patches. In a > nutshell it enables intel_gpu_top to be more top(1) like useful and show not > only physical GPU engine usage but per process view as well. > > Example screen capture: > > intel-gpu-top - 906/ 955 MHz;0% RC6; 5.30 Watts; 933 irqs/s > > IMC reads: 4414 MiB/s > IMC writes: 3805 MiB/s > > ENGINE BUSY MI_SEMA > MI_WAIT > Render/3D/0 93.46% |▋ | 0% > 0% >Blitter/00.00% | | 0% > 0% > Video/00.00% | | 0% > 0% > VideoEnhance/00.00% | | 0% > 0% > > PIDNAME Render/3D BlitterVideo VideoEnhance > 2733 neverball |██▌ ||||||| > 2047Xorg |███▊||||||| > 2737glxgears |█▍ ||||||| > 2128 xfwm4 |||||||| > 2047Xorg |||||||| > > > Internally we track time spent on engines for each struct intel_context, both > for current and past contexts belonging to each open DRM file. > > This can serve as a building block for several features from the wanted list: > smarter scheduler decisions, getrusage(2)-like per-GEM-context functionality > wanted by some customers, setrlimit(2) like controls, cgroups controller, > dynamic SSEU tuning, ... > > To enable userspace access to the tracked data, we expose time spent on GPU > per > client and per engine class in sysfs with a hierarchy like the below: > > # cd /sys/class/drm/card0/clients/ > # tree > . > ├── 7 > │ ├── busy > │ │ ├── 0 > │ │ ├── 1 > │ │ ├── 2 > │ │ └── 3 > │ ├── name > │ └── pid > ├── 8 > │ ├── busy > │ │ ├── 0 > │ │ ├── 1 > │ │ ├── 2 > │ │ └── 3 > │ ├── name > │ └── pid > └── 9 > ├── busy > │ ├── 0 > │ ├── 1 > │ ├── 2 > │ └── 3 > ├── name > └── pid > > Files in 'busy' directories are numbered using the engine class ABI values and > they contain accumulated nanoseconds each client spent on engines of a > respective class. We did something similar in amdgpu using the gpu scheduler. We then expose the data via fdinfo. See https://cgit.freedesktop.org/drm/drm-misc/commit/?id=1774baa64f9395fa884ea9ed494bcb043f3b83f5 https://cgit.freedesktop.org/drm/drm-misc/commit/?id=874442541133f78c78b6880b8cc495bab5c61704 Alex > > Tvrtko Ursulin (7): > drm/i915: Expose list of clients in sysfs > drm/i915: Update client name on context create > drm/i915: Make GEM contexts track DRM clients > drm/i915: Track runtime spent in closed and unreachable GEM contexts > drm/i915: Track all user contexts per client > drm/i915: Track context current active time > drm/i915: Expose per-engine client busyness > > drivers/gpu/drm/i915/Makefile | 5 +- > drivers/gpu/drm/i915/gem/i915_gem_context.c | 61 ++- > .../gpu/drm/i915/gem/i915_gem_context_types.h | 16 +- > drivers/gpu/drm/i915/gt/intel_context.c | 27 +- > drivers/gpu/drm/i915/gt/intel_context.h | 15 +- > drivers/gpu/drm/i915/gt/intel_context_types.h | 24 +- > .../drm/i915/gt/intel_execlists_submission.c | 23 +- > .../gpu/drm/i915/gt/intel_gt_clock_utils.c| 4 + > drivers/gpu/drm/i915/gt/intel_lrc.c | 27 +- > drivers/gpu/drm/i915/gt/intel_lrc.h | 24 ++ > drivers/gpu/drm/i915/gt/selftest_lrc.c| 10 +- > drivers/gpu/drm/i915/i915_drm_client.c| 365 ++ > drivers/gpu/drm/i915/i915_drm_client.h| 123 ++ > drivers/gpu/drm/i915/i915_drv.c | 6 + > drivers/gpu/drm/i915/i915_drv.h | 5 + > drivers/gpu/drm/i915/i915_gem.c | 21 +- > drivers/gpu/drm/i915/i915_gpu_error.c | 31 +- > drivers/gpu/drm/i915/i915_gpu_error.h | 2 +- > drivers/gpu/drm/i915/i915_sysfs.c | 8 + > 19 files changed, 716 insertions(+), 81 deletions(-) > create mode 100644 drivers/gpu/drm/i915/i915_drm_client.c > create mode 100644 drivers/gpu/drm/i915/i915_drm_client.h > > -- > 2.30.2 > ___ Intel-gfx mailing list Intel-gf
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4
== Series Details ==
Series: drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4
URL : https://patchwork.freedesktop.org/series/90102/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20115
Summary
---
**WARNING**
Minor unknown changes coming with Patchwork_20115 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20115, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20115:
### IGT changes ###
Warnings
* igt@i915_selftest@live@execlists:
- fi-bsw-nick:[INCOMPLETE][1] ([i915#2782] / [i915#2940]) ->
[DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@runner@aborted:
- {fi-rkl-11500t}:NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-rkl-11500t/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_20115 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fence@basic-await@vcs0:
- fi-bsw-n3050: [PASS][4] -> [FAIL][5] ([i915#3457])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@vcs0.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@vcs0.html
* igt@gem_exec_fence@basic-await@vecs0:
- fi-glk-dsi: [PASS][6] -> [FAIL][7] ([i915#3457])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-glk-dsi/igt@gem_exec_fence@basic-aw...@vecs0.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-glk-dsi/igt@gem_exec_fence@basic-aw...@vecs0.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271]) +6 similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html
* igt@gem_exec_fence@nb-await@vcs0:
- fi-bsw-kefka: [PASS][9] -> [FAIL][10] ([i915#3457]) +2 similar
issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@vcs0.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@vcs0.html
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][11] -> [FAIL][12] ([i915#1888])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#2190])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_wait@busy@all:
- fi-bsw-nick:[PASS][14] -> [FAIL][15] ([i915#3177] / [i915#3457])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_wait@b...@all.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-nick/igt@gem_wait@b...@all.html
* igt@gem_wait@wait@all:
- fi-bsw-nick:[PASS][16] -> [FAIL][17] ([i915#3457]) +2 similar
issues
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_wait@w...@all.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-bsw-nick/igt@gem_wait@w...@all.html
* igt@i915_module_load@reload:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][18] ([i915#1982] / [i915#3457])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-kbl-soraka/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][19] ([i915#2782] / [i915#3462]
/ [i915#794])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-kbl-soraka/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][20] ([i915#1886] / [i915#2291])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20115/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@mman:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][21] ([i915#3457])
[21]:
http
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/jsl: Add W/A 1409054076 for JSL (rev2)
== Series Details ==
Series: drm/i915/jsl: Add W/A 1409054076 for JSL (rev2)
URL : https://patchwork.freedesktop.org/series/90129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20122
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20122:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@runner@aborted:
- {fi-rkl-11500t}:NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-rkl-11500t/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_20122 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +6 similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html
* igt@gem_exec_fence@nb-await@bcs0:
- fi-bsw-n3050: [PASS][3] -> [FAIL][4] ([i915#3457]) +2 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-n3050/igt@gem_exec_fence@nb-aw...@bcs0.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-bsw-n3050/igt@gem_exec_fence@nb-aw...@bcs0.html
* igt@gem_exec_fence@nb-await@rcs0:
- fi-bsw-kefka: [PASS][5] -> [FAIL][6] ([i915#3457])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@rcs0.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@rcs0.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_wait@wait@all:
- fi-bsw-nick:[PASS][8] -> [FAIL][9] ([i915#3457]) +1 similar issue
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_wait@w...@all.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-bsw-nick/igt@gem_wait@w...@all.html
* igt@i915_module_load@reload:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][10] ([i915#1982] / [i915#3457])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][11] ([i915#2782] / [i915#3462]
/ [i915#794])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][12] ([i915#1886] / [i915#2291])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@mman:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][13] ([i915#3457])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@i915_selftest@l...@mman.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8
similar issues
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#533])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@read-crc-pipe-a:
- fi-elk-e7500: [PASS][16] -> [FAIL][17] ([i915#53])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@kms_pipe_crc_ba...@read-crc-pipe-a.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-elk-e7500/igt@kms_pipe_crc_ba...@read-crc-pipe-a.html
* igt@runner@aborted:
- fi-kbl-soraka: NOTRUN -> [FAIL][18] ([i915#1436] / [i915#2426] /
[i915#3363])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-kbl-soraka/igt@run...@aborted.html
Possible fixes
* igt@gem_exec_fence@basic-await@rcs0:
- fi-elk-e7500: [FAIL][19] ([i915#3457]) -> [PASS][20] +1 similar
issue
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@gem_exec_fence@basic-aw...@rcs0.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20122/fi-elk-e7500/igt@gem_exec_fence@basic-aw...@rcs0.html
* igt@gem_exec_fence@basic-await@vcs0:
- fi-bsw-kefka: [FA
[Intel-gfx] [PULL] drm-misc-fixes
Hi Dave, Daniel, Here's the first round of drm-misc-fixes for 5.13 Maxime drm-misc-fixes-2021-05-13: A BO list maintainance fix for TTM, removing an unused function and a MAINTAINERS update. The following changes since commit 6efb943b8616ec53a5e444193dccf1af9ad627b5: Linux 5.13-rc1 (2021-05-09 14:17:44 -0700) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2021-05-13 for you to fetch changes up to c55b44c9386f3ee1b08752638559f19deaf6040d: Merge drm/drm-fixes into drm-misc-fixes (2021-05-11 13:35:52 +0200) A BO list maintainance fix for TTM, removing an unused function and a MAINTAINERS update. Jernej Skrabec (1): MAINTAINERS: Update my e-mail Jiapeng Chong (1): drm/vc4: remove unused function Maxime Ripard (1): Merge drm/drm-fixes into drm-misc-fixes xinhui pan (1): drm/ttm: Do not add non-system domain BO into swap list .mailmap | 1 + MAINTAINERS | 10 +- drivers/gpu/drm/vc4/vc4_vec.c | 6 -- 3 files changed, 6 insertions(+), 11 deletions(-) signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/jsl: Add W/A 1409054076 for JSL (rev2)
== Series Details == Series: drm/i915/jsl: Add W/A 1409054076 for JSL (rev2) URL : https://patchwork.freedesktop.org/series/90129/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +drivers/gpu/drm/i915/display/icl_dsi.c:1301:72: warning: dubious: x & !y ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/jsl: Add W/A 1409054076 for JSL (rev2)
== Series Details == Series: drm/i915/jsl: Add W/A 1409054076 for JSL (rev2) URL : https://patchwork.freedesktop.org/series/90129/ State : warning == Summary == $ dim checkpatch origin/drm-tip b258ec7f5e7f drm/i915/jsl: Add W/A 1409054076 for JSL -:61: CHECK:LINE_SPACING: Please don't use multiple blank lines #61: FILE: drivers/gpu/drm/i915/display/icl_dsi.c:1267: + total: 0 errors, 0 warnings, 1 checks, 75 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix "mitigations" parsing if i915 is builtin (rev4)
== Series Details == Series: drm/i915: Fix "mitigations" parsing if i915 is builtin (rev4) URL : https://patchwork.freedesktop.org/series/88998/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10074_full -> Patchwork_20117_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_20117_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20117_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_20117_full: ### IGT changes ### Possible regressions * igt@gem_mmap_gtt@cpuset-basic-small-copy-xy: - shard-snb: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-snb5/igt@gem_mmap_...@cpuset-basic-small-copy-xy.html * igt@kms_flip_tiling@flip-changes-tiling@hdmi-a-1-pipe-c: - shard-glk: [PASS][2] -> [FAIL][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk8/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-glk7/igt@kms_flip_tiling@flip-changes-til...@hdmi-a-1-pipe-c.html * igt@kms_plane_cursor@pipe-b-primary-size-256: - shard-snb: NOTRUN -> [FAIL][4] +2 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-snb5/igt@kms_plane_cur...@pipe-b-primary-size-256.html Warnings * igt@kms_cursor_legacy@flip-vs-cursor-crc-legacy: - shard-glk: [FAIL][5] ([i915#3457]) -> [FAIL][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk7/igt@kms_cursor_leg...@flip-vs-cursor-crc-legacy.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-glk3/igt@kms_cursor_leg...@flip-vs-cursor-crc-legacy.html * igt@kms_plane_cursor@pipe-c-viewport-size-64: - shard-tglb: [FAIL][7] ([i915#3457]) -> [FAIL][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-tglb8/igt@kms_plane_cur...@pipe-c-viewport-size-64.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-tglb7/igt@kms_plane_cur...@pipe-c-viewport-size-64.html Known issues Here are the changes found in Patchwork_20117_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@blit-noreloc-purge-cache-random: - shard-apl: NOTRUN -> [DMESG-WARN][9] ([i915#3457]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-apl6/igt@api_intel...@blit-noreloc-purge-cache-random.html * igt@api_intel_bb@intel-bb-blit-x: - shard-glk: [PASS][10] -> [FAIL][11] ([i915#3471]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-glk3/igt@api_intel...@intel-bb-blit-x.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-glk2/igt@api_intel...@intel-bb-blit-x.html * igt@api_intel_bb@offset-control: - shard-snb: NOTRUN -> [DMESG-WARN][12] ([i915#3457]) +2 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-snb6/igt@api_intel...@offset-control.html - shard-skl: NOTRUN -> [DMESG-WARN][13] ([i915#3457]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-skl1/igt@api_intel...@offset-control.html * igt@gem_ctx_isolation@preservation-s3@vcs0: - shard-kbl: NOTRUN -> [DMESG-WARN][14] ([i915#180] / [i915#3457]) +3 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-kbl2/igt@gem_ctx_isolation@preservation...@vcs0.html * igt@gem_ctx_persistence@engines-persistence@bcs0: - shard-apl: NOTRUN -> [FAIL][15] ([i915#3457]) +13 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-apl7/igt@gem_ctx_persistence@engines-persiste...@bcs0.html * igt@gem_ctx_persistence@idempotent: - shard-snb: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#1099]) +4 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-snb6/igt@gem_ctx_persiste...@idempotent.html * igt@gem_eio@unwedge-stress: - shard-snb: NOTRUN -> [FAIL][17] ([i915#3354] / [i915#3457]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-snb5/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [PASS][18] -> [FAIL][19] ([i915#2842] / [i915#3457]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/shard-iclb4/igt@gem_exec_fair@basic-none-sh...@rcs0.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/shard-iclb6/igt@gem
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Pin the L-shape quirked object as unshrinkable (rev2)
== Series Details == Series: drm/i915/gem: Pin the L-shape quirked object as unshrinkable (rev2) URL : https://patchwork.freedesktop.org/series/90065/ State : success == Summary == CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20121 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/index.html Known issues Here are the changes found in Patchwork_20121 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271]) +6 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_exec_fence@nb-await@vecs0: - fi-bsw-nick:[PASS][2] -> [FAIL][3] ([i915#3457]) +1 similar issue [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_exec_fence@nb-aw...@vecs0.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-bsw-nick/igt@gem_exec_fence@nb-aw...@vecs0.html * igt@gem_exec_suspend@basic-s0: - fi-tgl-u2: [PASS][4] -> [FAIL][5] ([i915#1888]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_wait@wait@all: - fi-bsw-kefka: [PASS][7] -> [FAIL][8] ([i915#3457]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_wait@w...@all.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-bsw-kefka/igt@gem_wait@w...@all.html * igt@i915_module_load@reload: - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][9] ([i915#1982] / [i915#3457]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@i915_module_l...@reload.html * igt@i915_selftest@live@execlists: - fi-kbl-soraka: NOTRUN -> [INCOMPLETE][10] ([i915#2782] / [i915#3462] / [i915#794]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@i915_selftest@l...@execlists.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][11] ([i915#1886] / [i915#2291]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@mman: - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][12] ([i915#3457]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@i915_selftest@l...@mman.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-soraka: NOTRUN -> [SKIP][13] ([fdo#109271] / [fdo#111827]) +8 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#533]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html * igt@kms_pipe_crc_basic@read-crc-pipe-a: - fi-elk-e7500: [PASS][15] -> [FAIL][16] ([i915#53]) +2 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@kms_pipe_crc_ba...@read-crc-pipe-a.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-elk-e7500/igt@kms_pipe_crc_ba...@read-crc-pipe-a.html * igt@runner@aborted: - fi-kbl-soraka: NOTRUN -> [FAIL][17] ([i915#1436] / [i915#2426] / [i915#3363]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-kbl-soraka/igt@run...@aborted.html Possible fixes * igt@gem_exec_fence@basic-await@rcs0: - fi-elk-e7500: [FAIL][18] ([i915#3457]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@gem_exec_fence@basic-aw...@rcs0.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-elk-e7500/igt@gem_exec_fence@basic-aw...@rcs0.html * igt@gem_exec_fence@basic-await@vcs0: - fi-bsw-kefka: [FAIL][20] ([i915#3457]) -> [PASS][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@basic-aw...@vcs0.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20121/fi-bsw-kefka/igt@gem_exec_fence@basic-aw...@vcs0.html * igt@gem_exec_fence@nb-await@bcs0: - fi-bsw-nick:[FAIL][22] ([i915#3457]) -> [PASS][23] +1 similar issue [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/jsl: Add W/A 1409054076 for JSL
== Series Details ==
Series: drm/i915/jsl: Add W/A 1409054076 for JSL
URL : https://patchwork.freedesktop.org/series/90129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20119
Summary
---
**WARNING**
Minor unknown changes coming with Patchwork_20119 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20119, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_20119:
### IGT changes ###
Warnings
* igt@i915_selftest@live@execlists:
- fi-bsw-nick:[INCOMPLETE][1] ([i915#2782] / [i915#2940]) ->
[DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
- fi-bsw-kefka: [INCOMPLETE][3] ([i915#2782] / [i915#2940]) ->
[DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@runner@aborted:
- {fi-rkl-11500t}:NOTRUN -> [FAIL][5]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-rkl-11500t/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_20119 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fence@basic-await@bcs0:
- fi-bsw-nick:[PASS][6] -> [FAIL][7] ([i915#3457])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_exec_fence@basic-aw...@bcs0.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-bsw-nick/igt@gem_exec_fence@basic-aw...@bcs0.html
* igt@gem_exec_fence@nb-await@vecs0:
- fi-bsw-kefka: [PASS][8] -> [FAIL][9] ([i915#3457])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@vecs0.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-bsw-kefka/igt@gem_exec_fence@nb-aw...@vecs0.html
* igt@gem_wait@busy@all:
- fi-bwr-2160:[PASS][10] -> [FAIL][11] ([i915#3457])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bwr-2160/igt@gem_wait@b...@all.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-bwr-2160/igt@gem_wait@b...@all.html
* igt@kms_frontbuffer_tracking@basic:
- fi-tgl-u2: [PASS][12] -> [FAIL][13] ([i915#2416])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-tgl-u2/igt@kms_frontbuffer_track...@basic.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-tgl-u2/igt@kms_frontbuffer_track...@basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-elk-e7500: [PASS][14] -> [FAIL][15] ([i915#53])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-elk-e7500/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
* igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
- fi-bsw-kefka: [PASS][16] -> [FAIL][17] ([i915#53]) +1 similar issue
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@kms_pipe_crc_ba...@read-crc-pipe-a-frame-sequence.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-bsw-kefka/igt@kms_pipe_crc_ba...@read-crc-pipe-a-frame-sequence.html
Possible fixes
* igt@gem_exec_fence@basic-await@rcs0:
- fi-elk-e7500: [FAIL][18] ([i915#3457]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@gem_exec_fence@basic-aw...@rcs0.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-elk-e7500/igt@gem_exec_fence@basic-aw...@rcs0.html
* igt@gem_exec_fence@nb-await@bcs0:
- fi-bsw-nick:[FAIL][20] ([i915#3457]) -> [PASS][21] +1 similar
issue
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_exec_fence@nb-aw...@bcs0.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20119/fi-bsw-nick/igt@gem_exec_fence@nb-aw...@bcs0.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-elk-e7500: [FAIL][22] ([i915#53]) -> [PASS][23] +1 similar issue
[Intel-gfx] [PATCH V2] drm/i915/jsl: Add W/A 1409054076 for JSL
When pipe A is disabled and MIPI DSI is enabled on pipe B,
the AMT KVMR feature will incorrectly see pipe A as enabled.
Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
it set while DSI is enabled on pipe B. No impact to setting
it all the time.
Changes since V1:
- ./dim checkpatch errors addressed
Signed-off-by: Tejas Upadhyay
---
drivers/gpu/drm/i915/display/icl_dsi.c | 38 ++
drivers/gpu/drm/i915/i915_reg.h| 1 +
2 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index ce544e20f35c..e5a6660861e8 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -40,6 +40,8 @@
#include "skl_scaler.h"
#include "skl_universal_plane.h"
+static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe);
static int header_credits_available(struct drm_i915_private *dev_priv,
enum transcoder dsi_trans)
{
@@ -1036,9 +1038,26 @@ static void gen11_dsi_enable_transcoder(struct
intel_encoder *encoder)
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum port port;
+ enum pipe pipe;
enum transcoder dsi_trans;
u32 tmp;
+ /*
+* WA 1409054076:JSL
+* When pipe A is disabled and MIPI DSI is enabled on pipe B,
+* the AMT KVMR feature will incorrectly see pipe A as enabled.
+* Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
+* it set while DSI is enabled on pipe B
+*/
+ gen11_dsi_get_hw_state(encoder, &pipe);
+ if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) &&
+ pipe == PIPE_B &&
+ dev_priv->active_pipes != BIT(PIPE_A) &&
+ !(intel_de_read(dev_priv, CHICKEN_PAR1_1) &
+ IGNORE_KVMR_PIPE_A)) {
+ intel_de_write(dev_priv, CHICKEN_PAR1_1,
+ intel_de_read(dev_priv, CHICKEN_PAR1_1) |
IGNORE_KVMR_PIPE_A);
+ }
for_each_dsi_port(port, intel_dsi->ports) {
dsi_trans = dsi_port_to_transcoder(port);
tmp = intel_de_read(dev_priv, PIPECONF(dsi_trans));
@@ -1245,6 +1264,7 @@ static void gen11_dsi_enable(struct intel_atomic_state
*state,
drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
+
/* step6d: enable dsi transcoder */
gen11_dsi_enable_transcoder(encoder);
@@ -1260,9 +1280,27 @@ static void gen11_dsi_disable_transcoder(struct
intel_encoder *encoder)
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum port port;
+ enum pipe pipe;
enum transcoder dsi_trans;
u32 tmp;
+ /*
+* WA 1409054076:JSL
+* When pipe A is disabled and MIPI DSI is enabled on pipe B,
+* the AMT KVMR feature will incorrectly see pipe A as enabled.
+* Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
+* it set while DSI is enabled on pipe B
+*/
+ gen11_dsi_get_hw_state(encoder, &pipe);
+ if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) &&
+ pipe == PIPE_B &&
+ dev_priv->active_pipes != BIT(PIPE_A) &&
+ (intel_de_read(dev_priv, CHICKEN_PAR1_1) &
+ IGNORE_KVMR_PIPE_A)) {
+ intel_de_write(dev_priv, CHICKEN_PAR1_1,
+ intel_de_read(dev_priv, CHICKEN_PAR1_1) &
+ !IGNORE_KVMR_PIPE_A);
+ }
for_each_dsi_port(port, intel_dsi->ports) {
dsi_trans = dsi_port_to_transcoder(port);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 871d839dfcb8..8b67cd14ff7e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8039,6 +8039,7 @@ enum {
# define CHICKEN3_DGMG_DONE_FIX_DISABLE(1 << 2)
#define CHICKEN_PAR1_1 _MMIO(0x42080)
+#define IGNORE_KVMR_PIPE_ABIT(23)
#define KBL_ARB_FILL_SPARE_22 REG_BIT(22)
#define DIS_RAM_BYPASS_PSR2_MAN_TRACK (1 << 16)
#define SKL_DE_COMPRESSED_HASH_MODE (1 << 15)
--
2.30.0
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[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 (rev2)
== Series Details == Series: drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 (rev2) URL : https://patchwork.freedesktop.org/series/89502/ State : failure == Summary == Applying: drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 error: corrupt patch at line 16 error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/gem: Pin the L-shape quirked object as unshrinkable
From: Chris Wilson
When instantiating a tiled object on an L-shaped memory machine, we mark
the object as unshrinkable to prevent the shrinker from trying to swap
out the pages. We have to do this as we do not know the swizzling on the
individual pages, and so the data will be scrambled across swap out/in.
Not only do we need to move the object off the shrinker list, we need to
mark the object with shrink_pin so that the counter is consistent across
calls to madvise.
v2: in the madvise ioctl we need to check if the object is currently
shrinkable/purgeable, not if the object type supports shrinking
Fixes: 0175969e489a ("drm/i915/gem: Use shrinkable status for unknown swizzle
quirks")
References: https://gitlab.freedesktop.org/drm/intel/-/issues/3293
Reported-by: Ville Syrjälä
Signed-off-by: Chris Wilson
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 2 ++
drivers/gpu/drm/i915/i915_gem.c | 11 +--
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index aed8a37ccdc9..7361971c177d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -63,6 +63,8 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object
*obj,
i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
GEM_BUG_ON(i915_gem_object_has_tiling_quirk(obj));
i915_gem_object_set_tiling_quirk(obj);
+ GEM_BUG_ON(!list_empty(&obj->mm.link));
+ atomic_inc(&obj->mm.shrink_pin);
shrinkable = false;
}
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d0018c5f88bd..cffd7f4f87dc 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1009,12 +1009,11 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void
*data,
obj->mm.madv = args->madv;
if (i915_gem_object_has_pages(obj)) {
- struct list_head *list;
+ unsigned long flags;
- if (i915_gem_object_is_shrinkable(obj)) {
- unsigned long flags;
-
- spin_lock_irqsave(&i915->mm.obj_lock, flags);
+ spin_lock_irqsave(&i915->mm.obj_lock, flags);
+ if (!list_empty(&obj->mm.link)) {
+ struct list_head *list;
if (obj->mm.madv != I915_MADV_WILLNEED)
list = &i915->mm.purge_list;
@@ -1022,8 +1021,8 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
list = &i915->mm.shrink_list;
list_move_tail(&obj->mm.link, list);
- spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
}
+ spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
}
/* if the object is no longer attached, discard its backing storage */
--
2.26.3
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/jsl: Add W/A 1409054076 for JSL
== Series Details == Series: drm/i915/jsl: Add W/A 1409054076 for JSL URL : https://patchwork.freedesktop.org/series/90129/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +drivers/gpu/drm/i915/display/icl_dsi.c:1302:73: warning: dubious: x & !y ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/jsl: Add W/A 1409054076 for JSL
== Series Details == Series: drm/i915/jsl: Add W/A 1409054076 for JSL URL : https://patchwork.freedesktop.org/series/90129/ State : warning == Summary == $ dim checkpatch origin/drm-tip 816593a3ccd4 drm/i915/jsl: Add W/A 1409054076 for JSL -:23: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #23: FILE: drivers/gpu/drm/i915/display/icl_dsi.c:44: +static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder, + enum pipe *pipe); -:44: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #44: FILE: drivers/gpu/drm/i915/display/icl_dsi.c:1054: + if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) && + pipe == PIPE_B && -:49: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #49: FILE: drivers/gpu/drm/i915/display/icl_dsi.c:1059: + intel_de_write(dev_priv, CHICKEN_PAR1_1, + intel_de_read(dev_priv, CHICKEN_PAR1_1) | IGNORE_KVMR_PIPE_A); -:58: CHECK:LINE_SPACING: Please don't use multiple blank lines #58: FILE: drivers/gpu/drm/i915/display/icl_dsi.c:1267: + -:70: CHECK:LINE_SPACING: Please don't use multiple blank lines #70: FILE: drivers/gpu/drm/i915/display/icl_dsi.c:1287: + -:80: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #80: FILE: drivers/gpu/drm/i915/display/icl_dsi.c:1297: + if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) && + pipe == PIPE_B && -:85: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #85: FILE: drivers/gpu/drm/i915/display/icl_dsi.c:1302: + intel_de_write(dev_priv, CHICKEN_PAR1_1, + intel_de_read(dev_priv, CHICKEN_PAR1_1) & total: 0 errors, 0 warnings, 7 checks, 76 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Per client engine busyness
== Series Details == Series: Per client engine busyness URL : https://patchwork.freedesktop.org/series/90128/ State : success == Summary == CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20118 Summary --- **WARNING** Minor unknown changes coming with Patchwork_20118 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20118, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_20118: ### IGT changes ### Warnings * igt@i915_selftest@live@execlists: - fi-bsw-kefka: [INCOMPLETE][1] ([i915#2782] / [i915#2940]) -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html Known issues Here are the changes found in Patchwork_20118 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_fence@basic-await@bcs0: - fi-bsw-n3050: [PASS][3] -> [FAIL][4] ([i915#3457]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@bcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@bcs0.html * igt@gem_exec_fence@basic-await@rcs0: - fi-bsw-kefka: [PASS][5] -> [FAIL][6] ([i915#3457]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@basic-aw...@rcs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-bsw-kefka/igt@gem_exec_fence@basic-aw...@rcs0.html * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271]) +6 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_exec_suspend@basic-s3: - fi-tgl-u2: [PASS][8] -> [FAIL][9] ([i915#1888]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-tgl-u2/igt@gem_exec_susp...@basic-s3.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#2190]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_wait@busy@all: - fi-bsw-nick:[PASS][11] -> [FAIL][12] ([i915#3177] / [i915#3457]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_wait@b...@all.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-bsw-nick/igt@gem_wait@b...@all.html * igt@gem_wait@wait@all: - fi-bwr-2160:[PASS][13] -> [FAIL][14] ([i915#3457]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bwr-2160/igt@gem_wait@w...@all.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-bwr-2160/igt@gem_wait@w...@all.html - fi-bsw-nick:[PASS][15] -> [FAIL][16] ([i915#3457]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_wait@w...@all.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-bsw-nick/igt@gem_wait@w...@all.html * igt@i915_module_load@reload: - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][17] ([i915#1982] / [i915#3457]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-kbl-soraka/igt@i915_module_l...@reload.html * igt@i915_selftest@live@execlists: - fi-kbl-soraka: NOTRUN -> [INCOMPLETE][18] ([i915#2782] / [i915#3462] / [i915#794]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-kbl-soraka/igt@i915_selftest@l...@execlists.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][19] ([i915#1886] / [i915#2291]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@mman: - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][20] ([i915#3457]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-kbl-soraka/igt@i915_selftest@l...@mman.html * igt@kms_busy@basic@modeset: - fi-ilk-650: [PASS][21] -> [INCOMPLETE][22] ([i915#3457]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-ilk-650/igt@kms_busy@ba...@modeset.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20118/fi-ilk-650/igt@kms_busy@ba...@modeset.htm
Re: [Intel-gfx] [PATCH] drm/i915: Fix wrong name announced on FB driver switching
Hi Jani,
On Mon, 3 May 2021 19:38:17 CEST Jani Nikula wrote:
> On Thu, 29 Apr 2021, Janusz Krzysztofik
wrote:
> > Commit 7a0f9ef9703d ("drm/i915: Use drm_fb_helper_fill_info")
> > effectively changed our FB driver name from "inteldrmfb" to
> > "i915drmfb". However, we are still using the old name when kicking out
> > a firmware fbdev driver potentially bound to our device. Use the new
> > name to avoid confusion.
> >
> > Note: since the new name is assigned by a DRM fbdev helper called at
> > the DRM driver registration time, that name is not available when we
> > kick the other driver out early, hence a hardcoded name must be used
> > unless the DRM layer exposes a macro for converting a DRM driver name
> > to its associated fbdev driver name.
> >
> > Signed-off-by: Janusz Krzysztofik
>
> LGTM, Daniel?
>
> Reviewed-by: Jani Nikula
Thanks for review. What are next steps? Please note I have no push
permissions.
Thanks,
Janusz
>
> $ dim fixes 7a0f9ef9703d
> Fixes: 7a0f9ef9703d ("drm/i915: Use drm_fb_helper_fill_info")
> Cc: Noralf Trønnes
> Cc: Alex Deucher
> Cc: Daniel Vetter
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Cc: Rodrigo Vivi
> Cc: intel-gfx@lists.freedesktop.org
> Cc: # v5.2+
>
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/
i915_drv.c
> > index 785dcf20c77b..46082490dc9a 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -554,7 +554,7 @@ static int i915_driver_hw_probe(struct
drm_i915_private *dev_priv)
> > if (ret)
> > goto err_perf;
> >
> > - ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev,
"inteldrmfb");
> > + ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev,
"i915drmfb");
> > if (ret)
> > goto err_ggtt;
>
>
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Re: [Intel-gfx] [PATCH] drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7
On Thu, May 13, 2021 at 10:18:49AM +1000, Dave Airlie wrote:
> Reviewed-by: Dave Airlie
>
> Can we get this fix in, having a regression spanning 3 kernels isn't a
> good look, we can work out why it matters later in life if anyone
> cares.
Agreed and pushed do drm-intel-next.
This triggered me to do an archeology work here and I found a possible
alternative for ILK:
+#define HIZ_UNIT_CLOCK_GATE_DISABLE REG_BIT(5)
#define FDI_PLL_FREQ_CTL_MMIO(0x46030)
#define FDI_PLL_FREQ_CHANGE_REQUEST(1 << 24)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 06d5b7cc8b62..6316b70978f7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6892,8 +6892,11 @@ static void ilk_init_clock_gating(struct
drm_i915_private *dev_priv)
intel_uncore_write(&dev_priv->uncore, PCH_3DCGDIS0,
MARIUNIT_CLOCK_GATE_DISABLE |
SVSMUNIT_CLOCK_GATE_DISABLE);
+
+ /* WaDisableHizUnitClockGating:ilk */
intel_uncore_write(&dev_priv->uncore, PCH_3DCGDIS1,
- VFMUNIT_CLOCK_GATE_DISABLE);
+ VFMUNIT_CLOCK_GATE_DISABLE |
+ HIZ_UNIT_CLOCK_GATE_DISABLE);
however I couldn't find anything for Baytrail, so let's move with this
one for now.
>
> Dave.
>
> On Tue, 27 Apr 2021 at 00:31, Simon Rettberg
> wrote:
> >
> > When resetting CACHE_MODE registers, don't enable HiZ Raw Stall
> > Optimization on Ivybridge GT1 and Baytrail, as it causes severe glitches
> > when rendering any kind of 3D accelerated content.
> > This optimization is disabled on these platforms by default according to
> > official documentation from 01.org.
> >
> > Fixes: ef99a60ffd9b ("drm/i915/gt: Clear CACHE_MODE prior to clearing
> > residuals")
> > Fixes: 520d05a77b28 ("drm/i915/gt: Clear CACHE_MODE prior to clearing
> > residuals")
> > BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/3081
> > BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/3404
> > BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/3071
> > Reviewed-By: Manuel Bentele
> > Signed-off-by: Simon Rettberg
> > ---
> > drivers/gpu/drm/i915/gt/gen7_renderclear.c | 5 -
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
> > b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
> > index de575fdb0..21f08e538 100644
> > --- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
> > +++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
> > @@ -397,7 +397,10 @@ static void emit_batch(struct i915_vma * const vma,
> > gen7_emit_pipeline_invalidate(&cmds);
> > batch_add(&cmds, MI_LOAD_REGISTER_IMM(2));
> > batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7));
> > - batch_add(&cmds, 0x);
> > + batch_add(&cmds, 0x |
> > + ((IS_IVB_GT1(i915) || IS_VALLEYVIEW(i915)) ?
> > +HIZ_RAW_STALL_OPT_DISABLE :
> > +0));
> > batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1));
> > batch_add(&cmds, 0x | PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);
> > gen7_emit_pipeline_invalidate(&cmds);
> > --
> > 2.25.1
> >
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Per client engine busyness
== Series Details == Series: Per client engine busyness URL : https://patchwork.freedesktop.org/series/90128/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/display/intel_display.c:1887:21:expected struct i915_vma *[assigned] vma +drivers/gpu/drm/i915/display/intel_display.c:1887:21:got void [noderef] __iomem *[assigned] iomem +drivers/gpu/drm/i915/display/intel_display.c:1887:21: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_reset.c:1329:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +drivers/gpu/drm/i915/gt/intel_ring_submission.c:1203:24: warning: Using plain integer as NULL pointer +drivers/gpu/drm/i915/i915_perf.c:1434:15: warning: memset with byte count of 16777216 +drivers/gpu/drm/i915/i915_perf.c:1488:15: warning: memset with byte count of 16777216 +./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080) +./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080) +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block +./include/linux
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Per client engine busyness
== Series Details == Series: Per client engine busyness URL : https://patchwork.freedesktop.org/series/90128/ State : warning == Summary == $ dim checkpatch origin/drm-tip 289c10899f79 drm/i915: Expose list of clients in sysfs -:89: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #89: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 402 lines checked d83c2db8842f drm/i915: Update client name on context create 71fdfda22feb drm/i915: Make GEM contexts track DRM clients c8194e95eb88 drm/i915: Track runtime spent in closed and unreachable GEM contexts fc8d2f8f24bf drm/i915: Track all user contexts per client 9ac58b591817 drm/i915: Track context current active time -:138: WARNING:LINE_SPACING: Missing a blank line after declarations #138: FILE: drivers/gpu/drm/i915/gt/intel_context_types.h:125: + u32 last; + I915_SELFTEST_DECLARE(u32 num_underflow); total: 0 errors, 1 warnings, 0 checks, 296 lines checked b83b94d7ebd7 drm/i915: Expose per-engine client busyness -:25: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #25: Render/3D/0 63.73% |███ | 3% 0% total: 0 errors, 1 warnings, 0 checks, 152 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/jsl: Add W/A 1409054076 for JSL
When pipe A is disabled and MIPI DSI is enabled on pipe B,
the AMT KVMR feature will incorrectly see pipe A as enabled.
Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
it set while DSI is enabled on pipe B. No impact to setting
it all the time.
Signed-off-by: Tejas Upadhyay
---
drivers/gpu/drm/i915/display/icl_dsi.c | 39 ++
drivers/gpu/drm/i915/i915_reg.h| 1 +
2 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index ce544e20f35c..7ca83b253d7e 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -40,6 +40,8 @@
#include "skl_scaler.h"
#include "skl_universal_plane.h"
+static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe);
static int header_credits_available(struct drm_i915_private *dev_priv,
enum transcoder dsi_trans)
{
@@ -1036,9 +1038,26 @@ static void gen11_dsi_enable_transcoder(struct
intel_encoder *encoder)
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum port port;
+ enum pipe pipe;
enum transcoder dsi_trans;
u32 tmp;
+ /*
+* WA 1409054076:JSL
+* When pipe A is disabled and MIPI DSI is enabled on pipe B,
+* the AMT KVMR feature will incorrectly see pipe A as enabled.
+* Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
+* it set while DSI is enabled on pipe B
+*/
+ gen11_dsi_get_hw_state(encoder, &pipe);
+ if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) &&
+ pipe == PIPE_B &&
+ dev_priv->active_pipes != BIT(PIPE_A) &&
+ !(intel_de_read(dev_priv, CHICKEN_PAR1_1) &
+ IGNORE_KVMR_PIPE_A)) {
+ intel_de_write(dev_priv, CHICKEN_PAR1_1,
+ intel_de_read(dev_priv, CHICKEN_PAR1_1) |
IGNORE_KVMR_PIPE_A);
+ }
for_each_dsi_port(port, intel_dsi->ports) {
dsi_trans = dsi_port_to_transcoder(port);
tmp = intel_de_read(dev_priv, PIPECONF(dsi_trans));
@@ -1245,6 +1264,7 @@ static void gen11_dsi_enable(struct intel_atomic_state
*state,
drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
+
/* step6d: enable dsi transcoder */
gen11_dsi_enable_transcoder(encoder);
@@ -1260,9 +1280,28 @@ static void gen11_dsi_disable_transcoder(struct
intel_encoder *encoder)
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum port port;
+ enum pipe pipe;
enum transcoder dsi_trans;
u32 tmp;
+
+ /*
+* WA 1409054076:JSL
+* When pipe A is disabled and MIPI DSI is enabled on pipe B,
+* the AMT KVMR feature will incorrectly see pipe A as enabled.
+* Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
+* it set while DSI is enabled on pipe B
+*/
+ gen11_dsi_get_hw_state(encoder, &pipe);
+ if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) &&
+ pipe == PIPE_B &&
+ dev_priv->active_pipes != BIT(PIPE_A) &&
+ (intel_de_read(dev_priv, CHICKEN_PAR1_1) &
+IGNORE_KVMR_PIPE_A)) {
+ intel_de_write(dev_priv, CHICKEN_PAR1_1,
+ intel_de_read(dev_priv, CHICKEN_PAR1_1) &
+ !IGNORE_KVMR_PIPE_A);
+ }
for_each_dsi_port(port, intel_dsi->ports) {
dsi_trans = dsi_port_to_transcoder(port);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 871d839dfcb8..bcad02d6f51b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8039,6 +8039,7 @@ enum {
# define CHICKEN3_DGMG_DONE_FIX_DISABLE(1 << 2)
#define CHICKEN_PAR1_1 _MMIO(0x42080)
+#define IGNORE_KVMR_PIPE_A(1 << 23)
#define KBL_ARB_FILL_SPARE_22 REG_BIT(22)
#define DIS_RAM_BYPASS_PSR2_MAN_TRACK (1 << 16)
#define SKL_DE_COMPRESSED_HASH_MODE (1 << 15)
--
2.30.0
___
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[Intel-gfx] [PATCH 7/7] drm/i915: Expose per-engine client busyness
From: Tvrtko Ursulin
Expose per-client and per-engine busyness under the previously added sysfs
client root.
The new files are one per-engine instance and located under the 'busy'
directory. Each contains a monotonically increasing nano-second resolution
times each client's jobs were executing on the GPU.
This enables userspace to create a top-like tool for GPU utilization:
==
intel-gpu-top - 935/ 935 MHz;0% RC6; 14.73 Watts; 1097 irqs/s
IMC reads: 1401 MiB/s
IMC writes:4 MiB/s
ENGINE BUSY MI_SEMA MI_WAIT
Render/3D/0 63.73% |███ | 3% 0%
Blitter/09.53% |██▊ | 6% 0%
Video/0 39.32% |███▊ | 16% 0%
Video/1 15.62% |▋ | 0% 0%
VideoEnhance/00.00% | | 0% 0%
PIDNAME RCS BCS VCS VECS
4084gem_wsim |█▌ ||█ || || |
4086gem_wsim |█▌ || ||███|| |
==
v2: Use intel_context_engine_get_busy_time.
v3: New directory structure.
v4: Rebase.
v5: sysfs_attr_init.
v6: Small tidy in i915_gem_add_client.
v7: Rebase to be engine class based.
v8:
* Always enable stats.
* Walk all client contexts.
v9:
* Skip unsupported engine classes. (Chris)
* Use scheduler caps. (Chris)
v10:
* Use pphwsp runtime only.
Link: https://patchwork.freedesktop.org/series/71182/ # intel_gpu_top
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
Link:
https://patchwork.freedesktop.org/patch/msgid/20210123153733.18139-8-ch...@chris-wilson.co.uk
Link:
https://patchwork.freedesktop.org/patch/msgid/20210124153136.19124-8-ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_drm_client.c | 101 -
drivers/gpu/drm/i915/i915_drm_client.h | 10 +++
2 files changed, 110 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index 0ca81a750895..1f8b08a413d4 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -9,6 +9,11 @@
#include
+#include
+
+#include "gem/i915_gem_context.h"
+#include "gt/intel_engine_user.h"
+
#include "i915_drm_client.h"
#include "i915_drv.h"
#include "i915_gem.h"
@@ -55,6 +60,95 @@ show_client_pid(struct device *kdev, struct device_attribute
*attr, char *buf)
return ret;
}
+static u64 busy_add(struct i915_gem_context *ctx, unsigned int class)
+{
+ struct i915_gem_engines_iter it;
+ struct intel_context *ce;
+ u64 total = 0;
+
+ for_each_gem_engine(ce, rcu_dereference(ctx->engines), it) {
+ if (ce->engine->uabi_class != class)
+ continue;
+
+ total += intel_context_get_total_runtime_ns(ce);
+ }
+
+ return total;
+}
+
+static ssize_t
+show_busy(struct device *kdev, struct device_attribute *attr, char *buf)
+{
+ struct i915_engine_busy_attribute *i915_attr =
+ container_of(attr, typeof(*i915_attr), attr);
+ unsigned int class = i915_attr->engine_class;
+ const struct i915_drm_client *client = i915_attr->client;
+ const struct list_head *list = &client->ctx_list;
+ u64 total = atomic64_read(&client->past_runtime[class]);
+ struct i915_gem_context *ctx;
+
+ rcu_read_lock();
+ list_for_each_entry_rcu(ctx, list, client_link)
+ total += busy_add(ctx, class);
+ rcu_read_unlock();
+
+ return sysfs_emit(buf, "%llu\n", total);
+}
+
+static const char * const uabi_class_names[] = {
+ [I915_ENGINE_CLASS_RENDER] = "0",
+ [I915_ENGINE_CLASS_COPY] = "1",
+ [I915_ENGINE_CLASS_VIDEO] = "2",
+ [I915_ENGINE_CLASS_VIDEO_ENHANCE] = "3",
+};
+
+static int __client_register_sysfs_busy(struct i915_drm_client *client)
+{
+ struct i915_drm_clients *clients = client->clients;
+ unsigned int i;
+ int ret = 0;
+
+ if (!(clients->i915->caps.scheduler &
I915_SCHEDULER_CAP_ENGINE_BUSY_STATS))
+ return 0;
+
+ client->busy_root = kobject_create_and_add("busy", client->root);
+ if (!client->busy_root)
+ return -ENOMEM;
+
+ for (i = 0; i < ARRAY_SIZE(uabi_class_names); i++) {
+ struct i915_engine_busy_attribute *i915_attr =
+ &client->attr.busy[i];
+ struct device_attribute *attr = &i915_attr->attr;
+
+ if (!intel_engine_lookup_user(clients->i915, i, 0))
+ continue;
+
+ i915_attr->client = client;
+
[Intel-gfx] [PATCH 6/7] drm/i915: Track context current active time
From: Tvrtko Ursulin
Track context active (on hardware) status together with the start
timestamp.
This will be used to provide better granularity of context
runtime reporting in conjunction with already tracked pphwsp accumulated
runtime.
The latter is only updated on context save so does not give us visibility
to any currently executing work.
As part of the patch the existing runtime tracking data is moved under the
new ce->stats member and updated under the seqlock. This provides the
ability to atomically read out accumulated plus active runtime.
v2:
* Rename and make __intel_context_get_active_time unlocked.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty # v1
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
Link:
https://patchwork.freedesktop.org/patch/msgid/20210123153733.18139-7-ch...@chris-wilson.co.uk
Link:
https://patchwork.freedesktop.org/patch/msgid/20210124153136.19124-7-ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/gt/intel_context.c | 27 ++-
drivers/gpu/drm/i915/gt/intel_context.h | 15 ---
drivers/gpu/drm/i915/gt/intel_context_types.h | 24 +++--
.../drm/i915/gt/intel_execlists_submission.c | 23
.../gpu/drm/i915/gt/intel_gt_clock_utils.c| 4 +++
drivers/gpu/drm/i915/gt/intel_lrc.c | 27 ++-
drivers/gpu/drm/i915/gt/intel_lrc.h | 24 +
drivers/gpu/drm/i915/gt/selftest_lrc.c| 10 +++
drivers/gpu/drm/i915/i915_gpu_error.c | 9 +++
drivers/gpu/drm/i915/i915_gpu_error.h | 2 +-
10 files changed, 116 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index 4033184f13b9..bc021244c3b2 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -373,7 +373,7 @@ intel_context_init(struct intel_context *ce, struct
intel_engine_cs *engine)
ce->sseu = engine->sseu;
ce->ring = __intel_context_ring_size(SZ_4K);
- ewma_runtime_init(&ce->runtime.avg);
+ ewma_runtime_init(&ce->stats.runtime.avg);
ce->vm = i915_vm_get(engine->gt->vm);
@@ -499,6 +499,31 @@ struct i915_request *intel_context_create_request(struct
intel_context *ce)
return rq;
}
+u64 intel_context_get_total_runtime_ns(const struct intel_context *ce)
+{
+ u64 total, active;
+
+ total = ce->stats.runtime.total;
+ if (ce->ops->flags & COPS_RUNTIME_CYCLES)
+ total *= ce->engine->gt->clock_period_ns;
+
+ active = READ_ONCE(ce->stats.active);
+ if (active)
+ active = intel_context_clock() - active;
+
+ return total + active;
+}
+
+u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
+{
+ u64 avg = ewma_runtime_read(&ce->stats.runtime.avg);
+
+ if (ce->ops->flags & COPS_RUNTIME_CYCLES)
+ avg *= ce->engine->gt->clock_period_ns;
+
+ return avg;
+}
+
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftest_context.c"
#endif
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index f83a73a2b39f..a9125768b1b4 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -250,18 +250,13 @@ intel_context_clear_nopreempt(struct intel_context *ce)
clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
}
-static inline u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
-{
- const u32 period = ce->engine->gt->clock_period_ns;
-
- return READ_ONCE(ce->runtime.total) * period;
-}
+u64 intel_context_get_total_runtime_ns(const struct intel_context *ce);
+u64 intel_context_get_avg_runtime_ns(struct intel_context *ce);
-static inline u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
+static inline u64 intel_context_clock(void)
{
- const u32 period = ce->engine->gt->clock_period_ns;
-
- return mul_u32_u32(ewma_runtime_read(&ce->runtime.avg), period);
+ /* As we mix CS cycles with CPU clocks, use the raw monotonic clock. */
+ return ktime_get_raw_fast_ns();
}
#endif /* __INTEL_CONTEXT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ed8c447a7346..65a5730a4f5b 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -33,6 +33,9 @@ struct intel_context_ops {
#define COPS_HAS_INFLIGHT_BIT 0
#define COPS_HAS_INFLIGHT BIT(COPS_HAS_INFLIGHT_BIT)
+#define COPS_RUNTIME_CYCLES_BIT 1
+#define COPS_RUNTIME_CYCLES BIT(COPS_RUNTIME_CYCLES_BIT)
+
int (*alloc)(struct intel_context *ce);
int (*pre_pin)(struct intel_context *ce, struct i915_gem_ww_ctx *ww,
void **vaddr);
@@ -110,14 +113,19 @@ struct intel_context {
} lrc;
u32 tag; /* cookie passed to HW to track this context on submission */
-
[Intel-gfx] [PATCH 4/7] drm/i915: Track runtime spent in closed and unreachable GEM contexts
From: Tvrtko Ursulin
As contexts are abandoned we want to remember how much GPU time they used
(per class) so later we can used it for smarter purposes.
As GEM contexts are closed we want to have the DRM client remember how
much GPU time they used (per class) so later we can used it for smarter
purposes.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
Link:
https://patchwork.freedesktop.org/patch/msgid/20210123153733.18139-5-ch...@chris-wilson.co.uk
Link:
https://patchwork.freedesktop.org/patch/msgid/20210124153136.19124-5-ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 24 +++--
drivers/gpu/drm/i915/i915_drm_client.h | 7 ++
2 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 5ea42d5b0b1a..b8d8366a2cce 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -262,23 +262,43 @@ static void free_engines_rcu(struct rcu_head *rcu)
free_engines(engines);
}
+static void accumulate_runtime(struct i915_drm_client *client,
+ struct i915_gem_engines *engines)
+{
+ struct i915_gem_engines_iter it;
+ struct intel_context *ce;
+
+ if (!client)
+ return;
+
+ /* Transfer accumulated runtime to the parent GEM context. */
+ for_each_gem_engine(ce, engines, it) {
+ unsigned int class = ce->engine->uabi_class;
+
+ GEM_BUG_ON(class >= ARRAY_SIZE(client->past_runtime));
+ atomic64_add(intel_context_get_total_runtime_ns(ce),
+&client->past_runtime[class]);
+ }
+}
+
static int __i915_sw_fence_call
engines_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
struct i915_gem_engines *engines =
container_of(fence, typeof(*engines), fence);
+ struct i915_gem_context *ctx = engines->ctx;
switch (state) {
case FENCE_COMPLETE:
if (!list_empty(&engines->link)) {
- struct i915_gem_context *ctx = engines->ctx;
unsigned long flags;
spin_lock_irqsave(&ctx->stale.lock, flags);
list_del(&engines->link);
spin_unlock_irqrestore(&ctx->stale.lock, flags);
}
- i915_gem_context_put(engines->ctx);
+ accumulate_runtime(ctx->client, engines);
+ i915_gem_context_put(ctx);
break;
case FENCE_FREE:
diff --git a/drivers/gpu/drm/i915/i915_drm_client.h
b/drivers/gpu/drm/i915/i915_drm_client.h
index 556a59d6b834..6f25e754e978 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.h
+++ b/drivers/gpu/drm/i915/i915_drm_client.h
@@ -15,6 +15,8 @@
#include
#include
+#include "gt/intel_engine_types.h"
+
struct drm_i915_private;
struct i915_drm_clients {
@@ -51,6 +53,11 @@ struct i915_drm_client {
struct device_attribute pid;
struct device_attribute name;
} attr;
+
+ /**
+* @past_runtime: Accumulation of pphwsp runtimes from closed contexts.
+*/
+ atomic64_t past_runtime[MAX_ENGINE_CLASS + 1];
};
void i915_drm_clients_init(struct i915_drm_clients *clients,
--
2.30.2
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/7] drm/i915: Track all user contexts per client
From: Tvrtko Ursulin
We soon want to start answering questions like how much GPU time is the
context belonging to a client which exited still using.
To enable this we start tracking all context belonging to a client on a
separate list.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
Link:
https://patchwork.freedesktop.org/patch/msgid/20210123153733.18139-6-ch...@chris-wilson.co.uk
Link:
https://patchwork.freedesktop.org/patch/msgid/20210124153136.19124-6-ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 12
drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 3 +++
drivers/gpu/drm/i915/i915_drm_client.c| 3 +++
drivers/gpu/drm/i915/i915_drm_client.h| 5 +
4 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index b8d8366a2cce..1595a608de92 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -573,6 +573,7 @@ static void set_closed_name(struct i915_gem_context *ctx)
static void context_close(struct i915_gem_context *ctx)
{
struct i915_address_space *vm;
+ struct i915_drm_client *client;
/* Flush any concurrent set_engines() */
mutex_lock(&ctx->engines_mutex);
@@ -601,6 +602,13 @@ static void context_close(struct i915_gem_context *ctx)
list_del(&ctx->link);
spin_unlock(&ctx->i915->gem.contexts.lock);
+ client = ctx->client;
+ if (client) {
+ spin_lock(&client->ctx_lock);
+ list_del_rcu(&ctx->client_link);
+ spin_unlock(&client->ctx_lock);
+ }
+
mutex_unlock(&ctx->mutex);
/*
@@ -943,6 +951,10 @@ static int gem_context_register(struct i915_gem_context
*ctx,
ctx->client = client;
+ spin_lock(&client->ctx_lock);
+ list_add_tail_rcu(&ctx->client_link, &client->ctx_list);
+ spin_unlock(&client->ctx_lock);
+
spin_lock(&i915->gem.contexts.lock);
list_add_tail(&ctx->link, &i915->gem.contexts.list);
spin_unlock(&i915->gem.contexts.lock);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index eb098f2896c5..8ea3fe3e7414 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -102,6 +102,9 @@ struct i915_gem_context {
/** client: struct i915_drm_client */
struct i915_drm_client *client;
+ /** link: &drm_client.context_list */
+ struct list_head client_link;
+
/**
* @ref: reference count
*
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index ad3d36c9dee2..0ca81a750895 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -196,6 +196,9 @@ i915_drm_client_add(struct i915_drm_clients *clients,
struct task_struct *task)
kref_init(&client->kref);
mutex_init(&client->update_lock);
+ spin_lock_init(&client->ctx_lock);
+ INIT_LIST_HEAD(&client->ctx_list);
+
client->clients = clients;
INIT_RCU_WORK(&client->rcu, __rcu_i915_drm_client_free);
diff --git a/drivers/gpu/drm/i915/i915_drm_client.h
b/drivers/gpu/drm/i915/i915_drm_client.h
index 6f25e754e978..13f92142e474 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.h
+++ b/drivers/gpu/drm/i915/i915_drm_client.h
@@ -9,10 +9,12 @@
#include
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
#include "gt/intel_engine_types.h"
@@ -46,6 +48,9 @@ struct i915_drm_client {
struct i915_drm_client_name __rcu *name;
bool closed;
+ spinlock_t ctx_lock; /* For add/remove from ctx_list. */
+ struct list_head ctx_list; /* List of contexts belonging to client. */
+
struct i915_drm_clients *clients;
struct kobject *root;
--
2.30.2
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/7] drm/i915: Make GEM contexts track DRM clients
From: Tvrtko Ursulin
If we make GEM contexts keep a reference to i915_drm_client for the whole
of their lifetime, we can consolidate the current task pid and name usage
by getting it from the client.
v2: Don't bother supporting selftests contexts from debugfs. (Chris)
v3 (Lucas): Finish constructing ctx before adding it to the list
v4 (Ram): Rebase on upstream
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Aravind Iddamsetty
Signed-off-by: Chris Wilson
Link:
https://patchwork.freedesktop.org/patch/msgid/20210123153733.18139-4-ch...@chris-wilson.co.uk
Link:
https://patchwork.freedesktop.org/patch/msgid/20210124153136.19124-4-ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 20 -
.../gpu/drm/i915/gem/i915_gem_context_types.h | 13 +++
drivers/gpu/drm/i915/i915_gpu_error.c | 22 +++
3 files changed, 30 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index e5f8d94666e8..5ea42d5b0b1a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -345,13 +345,14 @@ void i915_gem_context_release(struct kref *ref)
trace_i915_context_free(ctx);
GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
- mutex_destroy(&ctx->engines_mutex);
- mutex_destroy(&ctx->lut_mutex);
+ if (ctx->client)
+ i915_drm_client_put(ctx->client);
if (ctx->timeline)
intel_timeline_put(ctx->timeline);
- put_pid(ctx->pid);
+ mutex_destroy(&ctx->engines_mutex);
+ mutex_destroy(&ctx->lut_mutex);
mutex_destroy(&ctx->mutex);
kfree_rcu(ctx, rcu);
@@ -895,6 +896,7 @@ static int gem_context_register(struct i915_gem_context
*ctx,
u32 *id)
{
struct drm_i915_private *i915 = ctx->i915;
+ struct i915_drm_client *client;
struct i915_address_space *vm;
int ret;
@@ -906,15 +908,21 @@ static int gem_context_register(struct i915_gem_context
*ctx,
WRITE_ONCE(vm->file, fpriv); /* XXX */
mutex_unlock(&ctx->mutex);
- ctx->pid = get_task_pid(current, PIDTYPE_PID);
+ client = i915_drm_client_get(fpriv->client);
+
+ rcu_read_lock();
snprintf(ctx->name, sizeof(ctx->name), "%s[%d]",
-current->comm, pid_nr(ctx->pid));
+i915_drm_client_name(client),
+pid_nr(i915_drm_client_pid(client)));
+ rcu_read_unlock();
/* And finally expose ourselves to userspace via the idr */
ret = xa_alloc(&fpriv->context_xa, id, ctx, xa_limit_32b, GFP_KERNEL);
if (ret)
goto err_pid;
+ ctx->client = client;
+
spin_lock(&i915->gem.contexts.lock);
list_add_tail(&ctx->link, &i915->gem.contexts.list);
spin_unlock(&i915->gem.contexts.lock);
@@ -922,7 +930,7 @@ static int gem_context_register(struct i915_gem_context
*ctx,
return 0;
err_pid:
- put_pid(fetch_and_zero(&ctx->pid));
+ i915_drm_client_put(client);
return ret;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index 340473aa70de..eb098f2896c5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -96,19 +96,12 @@ struct i915_gem_context {
*/
struct i915_address_space __rcu *vm;
- /**
-* @pid: process id of creator
-*
-* Note that who created the context may not be the principle user,
-* as the context may be shared across a local socket. However,
-* that should only affect the default context, all contexts created
-* explicitly by the client are expected to be isolated.
-*/
- struct pid *pid;
-
/** link: place with &drm_i915_private.context_list */
struct list_head link;
+ /** client: struct i915_drm_client */
+ struct i915_drm_client *client;
+
/**
* @ref: reference count
*
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 99ca242ec13b..dc9eb6823270 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1235,7 +1235,9 @@ static void record_request(const struct i915_request
*request,
ctx = rcu_dereference(request->context->gem_context);
if (ctx)
- erq->pid = pid_nr(ctx->pid);
+ erq->pid = I915_SELFTEST_ONLY(!ctx->client) ?
+ 0 :
+ pid_nr(i915_drm_client_pid(ctx->client));
}
rcu_read_unlock();
}
@@ -1256,23 +1258,25 @@ static bool record_context(struct
i915_gem_context_coredump *e,
[Intel-gfx] [PATCH 2/7] drm/i915: Update client name on context create
From: Tvrtko Ursulin
Some clients have the DRM fd passed to them over a socket by the X server.
Grab the real client and pid when they create their first context and
update the exposed data for more useful enumeration.
To enable lockless access to client name and pid data from the following
patches, we also make these fields rcu protected. In this way asynchronous
code paths where both contexts which remain after the client exit, and
access to client name and pid as they are getting updated due context
creation running in parallel with name/pid queries.
v2:
* Do not leak the pid reference and borrow context idr_lock. (Chris)
v3:
* More avoiding leaks. (Chris)
v4:
* Move update completely to drm client. (Chris)
* Do not lose previous client data on failure to re-register and simplify
update to only touch what it needs.
v5:
* Reuse ext_data local. (Chris)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Aravind Iddamsetty
Signed-off-by: Chris Wilson
Link:
https://patchwork.freedesktop.org/patch/msgid/20210123153733.18139-3-ch...@chris-wilson.co.uk
Link:
https://patchwork.freedesktop.org/patch/msgid/20210124153136.19124-3-ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 5 ++
drivers/gpu/drm/i915/i915_drm_client.c | 93 +
drivers/gpu/drm/i915/i915_drm_client.h | 34 +++-
3 files changed, 115 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 188dee13e017..e5f8d94666e8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -76,6 +76,7 @@
#include "gt/intel_gpu_commands.h"
#include "gt/intel_ring.h"
+#include "i915_drm_client.h"
#include "i915_gem_context.h"
#include "i915_globals.h"
#include "i915_trace.h"
@@ -2321,6 +2322,10 @@ int i915_gem_context_create_ioctl(struct drm_device
*dev, void *data,
return -EIO;
}
+ ret = i915_drm_client_update(ext_data.fpriv->client, current);
+ if (ret)
+ return ret;
+
ext_data.ctx = i915_gem_create_context(i915, args->flags);
if (IS_ERR(ext_data.ctx))
return PTR_ERR(ext_data.ctx);
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index 7c2d36860ac1..ad3d36c9dee2 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -7,7 +7,10 @@
#include
#include
+#include
+
#include "i915_drm_client.h"
+#include "i915_drv.h"
#include "i915_gem.h"
#include "i915_utils.h"
@@ -25,10 +28,15 @@ show_client_name(struct device *kdev, struct
device_attribute *attr, char *buf)
{
struct i915_drm_client *client =
container_of(attr, typeof(*client), attr.name);
+ int ret;
- return sysfs_emit(buf,
- READ_ONCE(client->closed) ? "<%s>\n" : "%s\n",
- client->name);
+ rcu_read_lock();
+ ret = sysfs_emit(buf,
+READ_ONCE(client->closed) ? "<%s>\n" : "%s\n",
+i915_drm_client_name(client));
+ rcu_read_unlock();
+
+ return ret;
}
static ssize_t
@@ -36,10 +44,15 @@ show_client_pid(struct device *kdev, struct
device_attribute *attr, char *buf)
{
struct i915_drm_client *client =
container_of(attr, typeof(*client), attr.pid);
+ int ret;
+
+ rcu_read_lock();
+ ret = sysfs_emit(buf,
+READ_ONCE(client->closed) ? "<%u>\n" : "%u\n",
+pid_nr(i915_drm_client_pid(client)));
+ rcu_read_unlock();
- return sysfs_emit(buf,
- READ_ONCE(client->closed) ? "<%u>\n" : "%u\n",
- pid_nr(client->pid));
+ return ret;
}
static int __client_register_sysfs(struct i915_drm_client *client)
@@ -91,20 +104,46 @@ static void __client_unregister_sysfs(struct
i915_drm_client *client)
kobject_put(fetch_and_zero(&client->root));
}
+static struct i915_drm_client_name *get_name(struct i915_drm_client *client,
+struct task_struct *task)
+{
+ struct i915_drm_client_name *name;
+ int len = strlen(task->comm);
+
+ name = kmalloc(struct_size(name, name, len + 1), GFP_KERNEL);
+ if (!name)
+ return NULL;
+
+ init_rcu_head(&name->rcu);
+ name->client = client;
+ name->pid = get_task_pid(task, PIDTYPE_PID);
+ memcpy(name->name, task->comm, len + 1);
+
+ return name;
+}
+
+static void free_name(struct rcu_head *rcu)
+{
+ struct i915_drm_client_name *name =
+ container_of(rcu, typeof(*name), rcu);
+
+ put_pid(name->pid);
+ kfree(name);
+}
+
static int
__i915_drm_client_register(struct i915_drm_client *client,
struct task_
[Intel-gfx] [PATCH 0/7] Per client engine busyness
From: Tvrtko Ursulin Resurrect of the previosuly merged per client engine busyness patches. In a nutshell it enables intel_gpu_top to be more top(1) like useful and show not only physical GPU engine usage but per process view as well. Example screen capture: intel-gpu-top - 906/ 955 MHz;0% RC6; 5.30 Watts; 933 irqs/s IMC reads: 4414 MiB/s IMC writes: 3805 MiB/s ENGINE BUSY MI_SEMA MI_WAIT Render/3D/0 93.46% |▋ | 0% 0% Blitter/00.00% | | 0% 0% Video/00.00% | | 0% 0% VideoEnhance/00.00% | | 0% 0% PIDNAME Render/3D BlitterVideo VideoEnhance 2733 neverball |██▌ ||||||| 2047Xorg |███▊||||||| 2737glxgears |█▍ ||||||| 2128 xfwm4 |||||||| 2047Xorg |||||||| Internally we track time spent on engines for each struct intel_context, both for current and past contexts belonging to each open DRM file. This can serve as a building block for several features from the wanted list: smarter scheduler decisions, getrusage(2)-like per-GEM-context functionality wanted by some customers, setrlimit(2) like controls, cgroups controller, dynamic SSEU tuning, ... To enable userspace access to the tracked data, we expose time spent on GPU per client and per engine class in sysfs with a hierarchy like the below: # cd /sys/class/drm/card0/clients/ # tree . ├── 7 │ ├── busy │ │ ├── 0 │ │ ├── 1 │ │ ├── 2 │ │ └── 3 │ ├── name │ └── pid ├── 8 │ ├── busy │ │ ├── 0 │ │ ├── 1 │ │ ├── 2 │ │ └── 3 │ ├── name │ └── pid └── 9 ├── busy │ ├── 0 │ ├── 1 │ ├── 2 │ └── 3 ├── name └── pid Files in 'busy' directories are numbered using the engine class ABI values and they contain accumulated nanoseconds each client spent on engines of a respective class. Tvrtko Ursulin (7): drm/i915: Expose list of clients in sysfs drm/i915: Update client name on context create drm/i915: Make GEM contexts track DRM clients drm/i915: Track runtime spent in closed and unreachable GEM contexts drm/i915: Track all user contexts per client drm/i915: Track context current active time drm/i915: Expose per-engine client busyness drivers/gpu/drm/i915/Makefile | 5 +- drivers/gpu/drm/i915/gem/i915_gem_context.c | 61 ++- .../gpu/drm/i915/gem/i915_gem_context_types.h | 16 +- drivers/gpu/drm/i915/gt/intel_context.c | 27 +- drivers/gpu/drm/i915/gt/intel_context.h | 15 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 24 +- .../drm/i915/gt/intel_execlists_submission.c | 23 +- .../gpu/drm/i915/gt/intel_gt_clock_utils.c| 4 + drivers/gpu/drm/i915/gt/intel_lrc.c | 27 +- drivers/gpu/drm/i915/gt/intel_lrc.h | 24 ++ drivers/gpu/drm/i915/gt/selftest_lrc.c| 10 +- drivers/gpu/drm/i915/i915_drm_client.c| 365 ++ drivers/gpu/drm/i915/i915_drm_client.h| 123 ++ drivers/gpu/drm/i915/i915_drv.c | 6 + drivers/gpu/drm/i915/i915_drv.h | 5 + drivers/gpu/drm/i915/i915_gem.c | 21 +- drivers/gpu/drm/i915/i915_gpu_error.c | 31 +- drivers/gpu/drm/i915/i915_gpu_error.h | 2 +- drivers/gpu/drm/i915/i915_sysfs.c | 8 + 19 files changed, 716 insertions(+), 81 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_drm_client.c create mode 100644 drivers/gpu/drm/i915/i915_drm_client.h -- 2.30.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/7] drm/i915: Expose list of clients in sysfs
From: Tvrtko Ursulin
Expose a list of clients with open file handles in sysfs.
This will be a basis for a top-like utility showing per-client and per-
engine GPU load.
Currently we only expose each client's pid and name under opaque numbered
directories in /sys/class/drm/card0/clients/.
For instance:
/sys/class/drm/card0/clients/3/name: Xorg
/sys/class/drm/card0/clients/3/pid: 5664
v2:
Chris Wilson:
* Enclose new members into dedicated structs.
* Protect against failed sysfs registration.
v3:
* sysfs_attr_init.
v4:
* Fix for internal clients.
v5:
* Use cyclic ida for client id. (Chris)
* Do not leak pid reference. (Chris)
* Tidy code with some locals.
v6:
* Use xa_alloc_cyclic to simplify locking. (Chris)
* No need to unregister individial sysfs files. (Chris)
* Rebase on top of fpriv kref.
* Track client closed status and reflect in sysfs.
v7:
* Make drm_client more standalone concept.
v8:
* Simplify sysfs show. (Chris)
* Always track name and pid.
v9:
* Fix cyclic id assignment.
v10:
* No need for a mutex around xa_alloc_cyclic.
* Refactor sysfs into own function.
* Unregister sysfs before freeing pid and name.
* Move clients setup into own function.
v11:
* Call clients init directly from driver init. (Chris)
v12:
* Do not fail client add on id wrap. (Maciej)
v13 (Lucas): Rebase on upstream
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Aravind Iddamsetty # v11
Signed-off-by: Chris Wilson
Link:
https://patchwork.freedesktop.org/patch/msgid/20210123153733.18139-2-ch...@chris-wilson.co.uk
Link:
https://patchwork.freedesktop.org/patch/msgid/20210124153136.19124-2-ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/Makefile | 5 +-
drivers/gpu/drm/i915/i915_drm_client.c | 200 +
drivers/gpu/drm/i915/i915_drm_client.h | 71 +
drivers/gpu/drm/i915/i915_drv.c| 6 +
drivers/gpu/drm/i915/i915_drv.h| 5 +
drivers/gpu/drm/i915/i915_gem.c| 21 ++-
drivers/gpu/drm/i915/i915_sysfs.c | 8 +
7 files changed, 311 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_drm_client.c
create mode 100644 drivers/gpu/drm/i915/i915_drm_client.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index d0d936d9137b..e89ce541fe68 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -33,8 +33,9 @@ subdir-ccflags-y += -I$(srctree)/$(src)
# Please keep these build lists sorted!
# core driver code
-i915-y += i915_drv.o \
- i915_config.o \
+i915-y += i915_config.o \
+ i915_drm_client.o \
+ i915_drv.o \
i915_irq.o \
i915_getparam.o \
i915_mitigations.o \
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
new file mode 100644
index ..7c2d36860ac1
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2020 Intel Corporation
+ */
+
+#include
+#include
+#include
+
+#include "i915_drm_client.h"
+#include "i915_gem.h"
+#include "i915_utils.h"
+
+void i915_drm_clients_init(struct i915_drm_clients *clients,
+ struct drm_i915_private *i915)
+{
+ clients->i915 = i915;
+
+ clients->next_id = 0;
+ xa_init_flags(&clients->xarray, XA_FLAGS_ALLOC);
+}
+
+static ssize_t
+show_client_name(struct device *kdev, struct device_attribute *attr, char *buf)
+{
+ struct i915_drm_client *client =
+ container_of(attr, typeof(*client), attr.name);
+
+ return sysfs_emit(buf,
+ READ_ONCE(client->closed) ? "<%s>\n" : "%s\n",
+ client->name);
+}
+
+static ssize_t
+show_client_pid(struct device *kdev, struct device_attribute *attr, char *buf)
+{
+ struct i915_drm_client *client =
+ container_of(attr, typeof(*client), attr.pid);
+
+ return sysfs_emit(buf,
+ READ_ONCE(client->closed) ? "<%u>\n" : "%u\n",
+ pid_nr(client->pid));
+}
+
+static int __client_register_sysfs(struct i915_drm_client *client)
+{
+ const struct {
+ const char *name;
+ struct device_attribute *attr;
+ ssize_t (*show)(struct device *dev,
+ struct device_attribute *attr,
+ char *buf);
+ } files[] = {
+ { "name", &client->attr.name, show_client_name },
+ { "pid", &client->attr.pid, show_client_pid },
+ };
+ unsigned int i;
+ char buf[16];
+ int ret;
+
+ ret = scnprintf(buf, sizeof(buf), "%u", client->id);
+ if (ret == sizeof(buf))
+ return -EINVAL;
+
+ client->root = kobject_create_and_add(buf, client->clients->root);
+ if (!client->root)
+ return -ENOMEM;
+
+ for (i = 0; i < ARRAY_SIZE(fi
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix "mitigations" parsing if i915 is builtin (rev4)
== Series Details == Series: drm/i915: Fix "mitigations" parsing if i915 is builtin (rev4) URL : https://patchwork.freedesktop.org/series/88998/ State : success == Summary == CI Bug Log - changes from CI_DRM_10074 -> Patchwork_20117 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/index.html Known issues Here are the changes found in Patchwork_20117 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_fence@basic-await@bcs0: - fi-bsw-nick:[PASS][1] -> [FAIL][2] ([i915#3457]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_exec_fence@basic-aw...@bcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-bsw-nick/igt@gem_exec_fence@basic-aw...@bcs0.html * igt@gem_exec_fence@basic-await@vcs0: - fi-bsw-n3050: [PASS][3] -> [FAIL][4] ([i915#3457]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@vcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-bsw-n3050/igt@gem_exec_fence@basic-aw...@vcs0.html * igt@gem_exec_fence@basic-await@vecs0: - fi-bsw-kefka: [PASS][5] -> [FAIL][6] ([i915#3457]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_exec_fence@basic-aw...@vecs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-bsw-kefka/igt@gem_exec_fence@basic-aw...@vecs0.html * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271]) +6 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#2190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_wait@busy@all: - fi-bsw-nick:[PASS][9] -> [FAIL][10] ([i915#3177] / [i915#3457]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-nick/igt@gem_wait@b...@all.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-bsw-nick/igt@gem_wait@b...@all.html - fi-bsw-kefka: [PASS][11] -> [FAIL][12] ([i915#3177] / [i915#3457]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bsw-kefka/igt@gem_wait@b...@all.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-bsw-kefka/igt@gem_wait@b...@all.html * igt@gem_wait@wait@all: - fi-bwr-2160:[PASS][13] -> [FAIL][14] ([i915#3457]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-bwr-2160/igt@gem_wait@w...@all.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-bwr-2160/igt@gem_wait@w...@all.html * igt@i915_module_load@reload: - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][15] ([i915#1982] / [i915#3457]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-kbl-soraka/igt@i915_module_l...@reload.html * igt@i915_selftest@live@execlists: - fi-kbl-soraka: NOTRUN -> [INCOMPLETE][16] ([i915#2782] / [i915#3462] / [i915#794]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-kbl-soraka/igt@i915_selftest@l...@execlists.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][17] ([i915#1886] / [i915#2291]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@mman: - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][18] ([i915#3457]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-kbl-soraka/igt@i915_selftest@l...@mman.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-soraka: NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +8 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-kbl-soraka: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#533]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html * igt@kms_pipe_crc_basic@read-crc-pipe-a: - fi-elk-e7500: [PASS][21] -> [FAIL][22] ([i915#53]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10074/fi-elk-e7500/igt@kms_pipe_crc_ba...@read-crc-pipe-a.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20117/fi-elk-e7500/igt@kms_pipe_crc_ba...@read-crc-pipe-a.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-bsw-kefka: [PASS][23] -> [FAIL][24] ([i915#53]) [23]: https://intel-gfx-ci.01.org/tree/drm
[Intel-gfx] ✗ Fi.CI.BUILD: failure for Fix I915_GVT dependency (rev2)
== Series Details == Series: Fix I915_GVT dependency (rev2) URL : https://patchwork.freedesktop.org/series/89996/ State : failure == Summary == Applying: drm/i915/gvt: Move mdev attribute groups into kvmgt module Applying: Revert "vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV" Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/Kconfig Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/Kconfig CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/Kconfig error: Failed to merge in the changes. hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0002 Revert "vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV" When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH V3 RESEND] drm/i915: Fix "mitigations" parsing if i915 is builtin
I met below error during boot with i915 builtin if pass
"i915.mitigations=off":
[0.015589] Booting kernel: `off' invalid for parameter `i915.mitigations'
The reason is slab subsystem isn't ready at that time, so kstrdup()
returns NULL. Fix this issue by using stack var instead of kstrdup().
Fixes: 984cadea032b ("drm/i915: Allow the sysadmin to override security
mitigations")
Signed-off-by: Jisheng Zhang
---
Since v2:
- Use strscpy() per Ville's suggestion
Since v1:
- Ensure "str" is properly terminated. Thanks Ville for pointing this out
drivers/gpu/drm/i915/i915_mitigations.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_mitigations.c
b/drivers/gpu/drm/i915/i915_mitigations.c
index 84f12598d145..70944764a77e 100644
--- a/drivers/gpu/drm/i915/i915_mitigations.c
+++ b/drivers/gpu/drm/i915/i915_mitigations.c
@@ -29,15 +29,13 @@ bool i915_mitigate_clear_residuals(void)
static int mitigations_set(const char *val, const struct kernel_param *kp)
{
unsigned long new = ~0UL;
- char *str, *sep, *tok;
+ char str[64], *sep, *tok;
bool first = true;
int err = 0;
BUILD_BUG_ON(ARRAY_SIZE(names) >= BITS_PER_TYPE(mitigations));
- str = kstrdup(val, GFP_KERNEL);
- if (!str)
- return -ENOMEM;
+ strscpy(str, val, sizeof(str));
for (sep = str; (tok = strsep(&sep, ","));) {
bool enable = true;
@@ -86,7 +84,6 @@ static int mitigations_set(const char *val, const struct
kernel_param *kp)
break;
}
}
- kfree(str);
if (err)
return err;
--
2.31.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/gvt: Move mdev attribute groups into kvmgt module
As kvmgt module contains all handling for VFIO/mdev, leaving mdev attribute
groups in gvt module caused dependency issue. Although it was there for possible
other hypervisor usage, that turns out never to be true. So this moves all mdev
handling into kvmgt module completely to resolve dependency issue.
With this fix, no config workaround is required. So revert previous workaround
commits: adaeb718d46f ("vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV")
and 07e543f4f9d1 ("vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV").
Cc: Arnd Bergmann
Cc: Jason Gunthorpe
Cc: Alex Williamson
Signed-off-by: Zhenyu Wang
---
drivers/gpu/drm/i915/Kconfig | 1 -
drivers/gpu/drm/i915/gvt/gvt.c | 124 +--
drivers/gpu/drm/i915/gvt/gvt.h | 3 -
drivers/gpu/drm/i915/gvt/hypercall.h | 2 +-
drivers/gpu/drm/i915/gvt/kvmgt.c | 122 --
drivers/gpu/drm/i915/gvt/mpt.h | 4 +-
6 files changed, 118 insertions(+), 138 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 69f57ca9c68d..93f4d059fc89 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -102,7 +102,6 @@ config DRM_I915_GVT
bool "Enable Intel GVT-g graphics virtualization host support"
depends on DRM_I915
depends on 64BIT
- depends on VFIO_MDEV=y || VFIO_MDEV=DRM_I915
default n
help
Choose this option if you want to enable Intel GVT-g graphics
diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c
index e7c2babcee8b..cbac409f6c8a 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.c
+++ b/drivers/gpu/drm/i915/gvt/gvt.c
@@ -46,118 +46,6 @@ static const char * const supported_hypervisors[] = {
[INTEL_GVT_HYPERVISOR_KVM] = "KVM",
};
-static struct intel_vgpu_type *
-intel_gvt_find_vgpu_type(struct intel_gvt *gvt, unsigned int type_group_id)
-{
- if (WARN_ON(type_group_id >= gvt->num_types))
- return NULL;
- return &gvt->types[type_group_id];
-}
-
-static ssize_t available_instances_show(struct mdev_type *mtype,
- struct mdev_type_attribute *attr,
- char *buf)
-{
- struct intel_vgpu_type *type;
- unsigned int num = 0;
- void *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;
-
- type = intel_gvt_find_vgpu_type(gvt, mtype_get_type_group_id(mtype));
- if (!type)
- num = 0;
- else
- num = type->avail_instance;
-
- return sprintf(buf, "%u\n", num);
-}
-
-static ssize_t device_api_show(struct mdev_type *mtype,
- struct mdev_type_attribute *attr, char *buf)
-{
- return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
-}
-
-static ssize_t description_show(struct mdev_type *mtype,
- struct mdev_type_attribute *attr, char *buf)
-{
- struct intel_vgpu_type *type;
- void *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;
-
- type = intel_gvt_find_vgpu_type(gvt, mtype_get_type_group_id(mtype));
- if (!type)
- return 0;
-
- return sprintf(buf, "low_gm_size: %dMB\nhigh_gm_size: %dMB\n"
- "fence: %d\nresolution: %s\n"
- "weight: %d\n",
- BYTES_TO_MB(type->low_gm_size),
- BYTES_TO_MB(type->high_gm_size),
- type->fence, vgpu_edid_str(type->resolution),
- type->weight);
-}
-
-static MDEV_TYPE_ATTR_RO(available_instances);
-static MDEV_TYPE_ATTR_RO(device_api);
-static MDEV_TYPE_ATTR_RO(description);
-
-static struct attribute *gvt_type_attrs[] = {
- &mdev_type_attr_available_instances.attr,
- &mdev_type_attr_device_api.attr,
- &mdev_type_attr_description.attr,
- NULL,
-};
-
-static struct attribute_group *gvt_vgpu_type_groups[] = {
- [0 ... NR_MAX_INTEL_VGPU_TYPES - 1] = NULL,
-};
-
-static bool intel_get_gvt_attrs(struct attribute_group
***intel_vgpu_type_groups)
-{
- *intel_vgpu_type_groups = gvt_vgpu_type_groups;
- return true;
-}
-
-static int intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt)
-{
- int i, j;
- struct intel_vgpu_type *type;
- struct attribute_group *group;
-
- for (i = 0; i < gvt->num_types; i++) {
- type = &gvt->types[i];
-
- group = kzalloc(sizeof(struct attribute_group), GFP_KERNEL);
- if (WARN_ON(!group))
- goto unwind;
-
- group->name = type->name;
- group->attrs = gvt_type_attrs;
- gvt_vgpu_type_groups[i] = group;
- }
-
- return 0;
-
-unwind:
- for (j = 0; j < i; j++) {
- group = gvt_vgpu_type_groups[j];
- kfree(group);
- }
-
- return -ENOMEM;
-}
-
-static void intel_gvt_cleanup_vgpu_type_groups(st
