[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/ttm: Async migration (rev10)

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Async migration (rev10)
URL   : https://patchwork.freedesktop.org/series/96798/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/ttm: Async migration (rev9)

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Async migration (rev9)
URL   : https://patchwork.freedesktop.org/series/96798/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10917 -> Patchwork_21665


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21665 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21665, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/index.html

Participating hosts (40 -> 34)
--

  Missing(6): bat-dg1-6 fi-bsw-cyan bat-adlp-6 bat-adlp-4 bat-jsl-2 
bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21665:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@gt_pm:
- fi-bsw-n3050:   [PASS][1] -> [DMESG-FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-bsw-n3050/igt@i915_selftest@live@gt_pm.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-bsw-n3050/igt@i915_selftest@live@gt_pm.html

  
 Warnings 

  * igt@kms_psr@primary_page_flip:
- fi-skl-6600u:   [INCOMPLETE][3] ([i915#4547]) -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  
Known issues


  Here are the changes found in Patchwork_21665 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u:   NOTRUN -> [SKIP][5] ([fdo#109271]) +31 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g:   NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html

  * igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[PASS][7] -> [INCOMPLETE][8] ([i915#3921])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u:   NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-edid-read:
- fi-kbl-8809g:   NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-kbl-8809g/igt@kms_chamel...@hdmi-edid-read.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-8809g:   NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#533])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-kbl-8809g/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@cursor_plane_move:
- fi-kbl-8809g:   NOTRUN -> [SKIP][12] ([fdo#109271]) +41 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-kbl-8809g/igt@kms_psr@cursor_plane_move.html

  
 Possible fixes 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   [FAIL][13] -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-kbl-8809g/igt@core_a...@basic-auth.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-kbl-8809g/igt@core_a...@basic-auth.html

  * igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2:  [INCOMPLETE][15] ([i915#4006]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21665/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Build changes
-

  * Linux: CI_DRM_10917 -> Patchwork_21665

  CI-20190529: 20190529
  CI_DRM_10917: de9a03c2007f3c69c5fa86ef007841a4a9194aac @ 
git://anongit.freedesktop.org/gfx-ci/linux
  

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/ttm: Async migration (rev9)

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Async migration (rev9)
URL   : https://patchwork.freedesktop.org/series/96798/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: placate scripts/kernel-doc

[Patchwork]

== Series Details ==

Series: drm/i915/gem: placate scripts/kernel-doc
URL   : https://patchwork.freedesktop.org/series/97190/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10917 -> Patchwork_21664


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21664 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21664, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/index.html

Participating hosts (40 -> 34)
--

  Additional (1): fi-kbl-soraka 
  Missing(7): bat-dg1-6 fi-tgl-u2 fi-bsw-cyan bat-adlp-6 bat-adlp-4 
bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21664:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_suspend@basic-s3:
- fi-skl-6600u:   [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-skl-6600u/igt@gem_exec_susp...@basic-s3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-skl-6600u/igt@gem_exec_susp...@basic-s3.html

  
Known issues


  Here are the changes found in Patchwork_21664 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u:   NOTRUN -> [SKIP][3] ([fdo#109271]) +31 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html

  * igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka:  NOTRUN -> [SKIP][4] ([fdo#109271]) +2 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html

  * igt@gem_exec_suspend@basic-s0:
- fi-kbl-soraka:  NOTRUN -> [INCOMPLETE][5] ([i915#4221])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-kbl-soraka/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g:   NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html

  * igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[PASS][7] -> [INCOMPLETE][8] ([i915#3921])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u:   NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-edid-read:
- fi-kbl-8809g:   NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-kbl-8809g/igt@kms_chamel...@hdmi-edid-read.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-8809g:   NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#533])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-kbl-8809g/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@cursor_plane_move:
- fi-kbl-8809g:   NOTRUN -> [SKIP][12] ([fdo#109271]) +41 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-kbl-8809g/igt@kms_psr@cursor_plane_move.html

  
 Possible fixes 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   [FAIL][13] -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-kbl-8809g/igt@core_a...@basic-auth.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-kbl-8809g/igt@core_a...@basic-auth.html

  
 Warnings 

  * igt@runner@aborted:
- fi-skl-6600u:   [FAIL][15] ([i915#2722] / [i915#3363] / [i915#4312]) 
-> [FAIL][16] ([i915#3363] / [i915#4312])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10917/fi-skl-6600u/igt@run...@aborted.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21664/fi-skl-6600u/igt@run...@aborted.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4221]: https://gitlab.freedesktop.org/drm/intel/issues/4221
  [i915#4312]: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: placate scripts/kernel-doc

[Patchwork]

== Series Details ==

Series: drm/i915/gem: placate scripts/kernel-doc
URL   : https://patchwork.freedesktop.org/series/97190/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
960cb066fb23 drm/i915/gem: placate scripts/kernel-doc
-:11: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#11: 
i915_gem_object.c:103: warning: expecting prototype for i915_gem_object_fini(). 
Prototype was for __i915_gem_object_fini() instead

total: 0 errors, 1 warnings, 0 checks, 25 lines checked

[Intel-gfx] [PATCH] drm/i915/gem: placate scripts/kernel-doc

[Randy Dunlap]

Correct kernel-doc warnings in i915_drm_object.c:

i915_gem_object.c:103: warning: expecting prototype for i915_gem_object_fini(). 
Prototype was for __i915_gem_object_fini() instead
i915_gem_object.c:110: warning: This comment starts with '/**', but isn't a 
kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
 * Mark up the object's coherency levels for a given cache_level
i915_gem_object.c:110: warning: missing initial short description on line:
 * Mark up the object's coherency levels for a given cache_level
i915_gem_object.c:457: warning: No description found for return value of 
'i915_gem_object_read_from_page'

Signed-off-by: Randy Dunlap 
Reported-by: kernel test robot 
Cc: Thomas Hellström 
Cc: Matthew Auld 
Cc: Jani Nikula 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Tvrtko Ursulin 
Cc: intel-gfx@lists.freedesktop.org
---
 drivers/gpu/drm/i915/gem/i915_gem_object.c |7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

--- linux-next-2028.orig/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ linux-next-2028/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -91,7 +91,7 @@ void i915_gem_object_init(struct drm_i91
 }
 
 /**
- * i915_gem_object_fini - Clean up a GEM object initialization
+ * __i915_gem_object_fini - Clean up a GEM object initialization
  * @obj: The gem object to cleanup
  *
  * This function cleans up gem object fields that are set up by
@@ -107,7 +107,8 @@ void __i915_gem_object_fini(struct drm_i
 }
 
 /**
- * Mark up the object's coherency levels for a given cache_level
+ * i915_gem_object_set_cache_coherency - Mark up the object's coherency levels
+ * for a given cache_level
  * @obj: #drm_i915_gem_object
  * @cache_level: cache level
  */
@@ -450,7 +451,7 @@ i915_gem_object_read_from_page_iomap(str
  * from can't cross a page boundary. The caller must ensure that @obj pages
  * are pinned and that @obj is synced wrt. any related writes.
  *
- * Returns 0 on success or -ENODEV if the type of @obj's backing store is
+ * Return: %0 on success or -ENODEV if the type of @obj's backing store is
  * unsupported.
  */
 int i915_gem_object_read_from_page(struct drm_i915_gem_object *obj, u64 
offset, void *dst, int size)

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dg2: Tile 4 plane format support (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915/dg2: Tile 4 plane format support (rev5)
URL   : https://patchwork.freedesktop.org/series/95715/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10916_full -> Patchwork_21659_full


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_21659_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21659_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21659_full:

### IGT changes ###

 Warnings 

  * igt@kms_content_protection@mei_interface:
- shard-kbl:  [SKIP][1] ([fdo#109271]) -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/shard-kbl2/igt@kms_content_protection@mei_interface.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-kbl7/igt@kms_content_protection@mei_interface.html

  * igt@kms_sysfs_edid_timing:
- shard-kbl:  [FAIL][3] ([IGT#2]) -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/shard-kbl7/igt@kms_sysfs_edid_timing.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-kbl7/igt@kms_sysfs_edid_timing.html

  
Known issues


  Here are the changes found in Patchwork_21659_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-kbl:  [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +3 similar 
issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/shard-kbl4/igt@gem_ctx_isolation@preservation...@bcs0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-kbl6/igt@gem_ctx_isolation@preservation...@bcs0.html

  * igt@gem_exec_fair@basic-flow@rcs0:
- shard-skl:  NOTRUN -> [SKIP][7] ([fdo#109271]) +332 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-skl1/igt@gem_exec_fair@basic-f...@rcs0.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-kbl:  NOTRUN -> [FAIL][8] ([i915#2842])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-kbl2/igt@gem_exec_fair@basic-none-r...@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/shard-tglb1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-tglb6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
- shard-iclb: [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/shard-iclb3/igt@gem_exec_fair@basic-p...@bcs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-iclb5/igt@gem_exec_fair@basic-p...@bcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][13] -> [FAIL][14] ([i915#2849])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/shard-iclb3/igt@gem_exec_fair@basic-throt...@rcs0.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-iclb5/igt@gem_exec_fair@basic-throt...@rcs0.html

  * igt@gem_exec_suspend@basic-s0:
- shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#456])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/shard-tglb1/igt@gem_exec_susp...@basic-s0.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-tglb7/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_pread@exhaustion:
- shard-kbl:  NOTRUN -> [WARN][17] ([i915#2658])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-kbl6/igt@gem_pr...@exhaustion.html

  * igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-kbl:  NOTRUN -> [SKIP][18] ([fdo#109271]) +104 similar 
issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-kbl6/igt@gem_...@regular-baseline-src-copy-readible.html

  * igt@gem_userptr_blits@vma-merge:
- shard-skl:  NOTRUN -> [FAIL][19] ([i915#3318])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-skl1/igt@gem_userptr_bl...@vma-merge.html

  * igt@gen9_exec_parse@valid-registers:
- shard-tglb: NOTRUN -> [SKIP][20] ([i915#2856])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/shard-tglb5/igt@gen9_exec_pa...@valid-registers.html

  * igt@i915_pm_dc@dc6-dpms:
- shard-skl:  NOTRUN -> [FAIL][21] ([i915#454])
   [21]: 

[Intel-gfx] ✗ Fi.CI.IGT: failure for Ensure zero alignment on gens < 4

[Patchwork]

== Series Details ==

Series: Ensure zero alignment on gens < 4
URL   : https://patchwork.freedesktop.org/series/97177/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10915_full -> Patchwork_21658_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21658_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21658_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 10)
--

  Missing(1): shard-rkl 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21658_full:

### IGT changes ###

 Possible regressions 

  * igt@api_intel_bb@object-reloc-purge-cache:
- shard-snb:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-snb6/igt@api_intel...@object-reloc-purge-cache.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-snb7/igt@api_intel...@object-reloc-purge-cache.html
- shard-kbl:  [PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl4/igt@api_intel...@object-reloc-purge-cache.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl2/igt@api_intel...@object-reloc-purge-cache.html

  * igt@gem_fenced_exec_thrash@2-spare-fences:
- shard-snb:  [PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-snb2/igt@gem_fenced_exec_thr...@2-spare-fences.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-snb6/igt@gem_fenced_exec_thr...@2-spare-fences.html

  * igt@kms_plane_cursor@pipe-c-primary-size-256:
- shard-kbl:  [PASS][7] -> [INCOMPLETE][8] +1 similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl2/igt@kms_plane_cur...@pipe-c-primary-size-256.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl7/igt@kms_plane_cur...@pipe-c-primary-size-256.html

  * igt@kms_rotation_crc@primary-rotation-270:
- shard-kbl:  NOTRUN -> [INCOMPLETE][9]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl7/igt@kms_rotation_...@primary-rotation-270.html

  
 Warnings 

  * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
- shard-kbl:  [SKIP][10] ([fdo#109271]) -> [INCOMPLETE][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl2/igt@gem_...@verify-pxp-stale-buf-optout-execution.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl7/igt@gem_...@verify-pxp-stale-buf-optout-execution.html

  
Known issues


  Here are the changes found in Patchwork_21658_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][12] ([fdo#111827])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@feature_discov...@chamelium.html

  * igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-kbl:  NOTRUN -> [DMESG-WARN][13] ([i915#180])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl6/igt@gem_ctx_isolation@preservation...@rcs0.html

  * igt@gem_ctx_sseu@invalid-args:
- shard-tglb: NOTRUN -> [SKIP][14] ([i915#280])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb6/igt@gem_ctx_s...@invalid-args.html

  * igt@gem_exec_capture@pi@rcs0:
- shard-skl:  NOTRUN -> [INCOMPLETE][15] ([i915#2369])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl7/igt@gem_exec_capture@p...@rcs0.html

  * igt@gem_exec_fair@basic-deadline:
- shard-apl:  NOTRUN -> [FAIL][16] ([i915#2846])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl3/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][17] -> [FAIL][18] ([i915#2842])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb6/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-tglb: NOTRUN -> [FAIL][19] ([i915#2842]) +5 similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-none@vecs0:
- shard-apl:  NOTRUN -> [FAIL][20] ([i915#2842] / [i915#3468])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl4/igt@gem_exec_fair@basic-n...@vecs0.html

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Add GuC Error Capture Support (rev2)

[Patchwork]

== Series Details ==

Series: Add GuC Error Capture Support (rev2)
URL   : https://patchwork.freedesktop.org/series/97187/
State : failure

== Summary ==

Applying: drm/i915/guc: Add basic support for error capture lists
Applying: drm/i915/guc: Update GuC ADS size for error capture lists
Applying: drm/i915/guc: Populate XE_LP register lists for GuC error state 
capture.
Applying: drm/i915/guc: Add GuC's error state capture output structures.
Applying: drm/i915/guc: Update GuC's log-buffer-state access for error capture.
Applying: drm/i915/guc: Copy new GuC error capture logs upon G2H notification.
Applying: drm/i915/guc: Print the GuC error capture output register list.
error: corrupt patch at line 429
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0007 drm/i915/guc: Print the GuC error capture output register 
list.
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

Re: [Intel-gfx] [RFC 7/7] drm/i915/guc: Print the GuC error capture output register list.

[Teres Alexis, Alan Previn]

I realize I missed checkpatch on patch-7 before send-mail. Will fix that on 
next rev.
Patch #2 also has checkpatch failures which I was aware of - I'm still wresting 
with how to instance those register tables in a clean readable way using.

...alan

-Original Message-
From: Teres Alexis, Alan Previn  
Sent: Monday, November 22, 2021 3:04 PM
To: intel-gfx@lists.freedesktop.org
Cc: Teres Alexis, Alan Previn 
Subject: [RFC 7/7] drm/i915/guc: Print the GuC error capture output register 
list.

Print the GuC captured error state register list (offsets and values) when 
gpu_coredump_state printout is invoked.

Also, since the GuC can report multiple engine class registers in a single 
notification event, parse the captured data (appearing as a stream of 
structures) to identify multiple captures of different 
'engine-capture-group-outputs'.

Finally, for each 'engine-capture-group-output', identify the last running 
context and print already-identified vma's so that user's output report follows 
the same layout as execlist submission. I.e.
engine1-registers, engine1-context-vmas, engine2-registers, 
engine2-context-vmas, etc.

Signed-off-by: Alan Previn 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |   4 +-
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 389 ++
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h|   6 +
 drivers/gpu/drm/i915/i915_gpu_error.c |  53 ++-
 drivers/gpu/drm/i915/i915_gpu_error.h |   5 +
 5 files changed, 439 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 332756036007..5806e2c05212 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1595,9 +1595,7 @@ static void intel_engine_print_registers(struct 
intel_engine_cs *engine,
drm_printf(m, "\tIPEHR: 0x%08x\n", ENGINE_READ(engine, IPEHR));
}
 
-   if (intel_engine_uses_guc(engine)) {
-   /* nothing to print yet */
-   } else if (HAS_EXECLISTS(dev_priv)) {
+   if (HAS_EXECLISTS(dev_priv) && !intel_engine_uses_guc(engine)) {
struct i915_request * const *port, *rq;
const u32 *hws =
>status_page.addr[I915_HWS_CSB_BUF0_INDEX];
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index 459fe81c77ae..998ce1b474ed 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -415,8 +415,389 @@ int intel_guc_capture_output_min_size_est(struct 
intel_guc *guc)
  *   L--> intel_guc_capture_store_snapshot
  *L--> queue(__guc_capture_store_snapshot_work)
  * Copies from B (head->tail) into C
+ *
+ * GUC --> notify context reset:
+ * -
+ * --> G2H CONTEXT RESET
+ *   L--> guc_handle_context_reset --> i915_capture_error_state
+ *--> i915_gpu_coredump --> intel_guc_capture_store_ptr
+ *L--> keep a ptr to capture_store in
+ * i915_gpu_coredump struct.
+ *
+ * User Sysfs / Debugfs
+ * 
+ *  --> i915_gpu_coredump_copy_to_buffer->
+ *   L--> err_print_to_sgl --> err_print_gt
+ *L--> error_print_guc_captures
+ * L--> loop: 
intel_guc_capture_out_print_next_group
+ *
  */
 
+#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
+
+static char *
+guc_capture_register_string(const struct intel_guc *guc, u32 owner, u32 type,
+   u32 class, u32 id, u32 offset)
+{
+   struct __guc_mmio_reg_descr_group *reglists = guc->capture.reglists;
+   struct __guc_mmio_reg_descr_group *match;
+   int num_regs, j = 0;
+
+   if (!reglists)
+   return NULL;
+
+   match = guc_capture_get_one_list(reglists, owner, type, id);
+   if (match) {
+   num_regs = match->num_regs;
+   while (num_regs--) {
+   if (offset == match->list[j].reg.reg)
+   return match->list[j].regname;
+   ++j;
+   }
+   }
+
+   return NULL;
+}
+
+static inline int
+guc_capture_store_remove_dw(struct guc_capture_out_store *store, u32 
*bytesleft,
+   u32 *dw)
+{
+   int tries = 2;
+   int avail = 0;
+   u32 *src_data;
+
+   if (!*bytesleft)
+   return 0;
+
+   while (tries--) {
+   avail = CIRC_CNT_TO_END(store->head, store->tail, store->size);
+   if (avail >= sizeof(u32)) {
+   src_data = (u32 *)(store->addr + store->tail);
+   *dw = *src_data;
+   store->tail = (store->tail + 4) & (store->size - 1);
+   *bytesleft -= 

[Intel-gfx] ✗ Fi.CI.BAT: failure for Add GuC Error Capture Support

[Patchwork]

== Series Details ==

Series: Add GuC Error Capture Support
URL   : https://patchwork.freedesktop.org/series/97187/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10916 -> Patchwork_21662


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21662 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21662, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/index.html

Participating hosts (42 -> 34)
--

  Missing(8): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-bsw-cyan bat-adlp-6 
bat-adlp-4 bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21662:

### IGT changes ###

 Possible regressions 

  * igt@debugfs_test@read_all_entries:
- fi-elk-e7500:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-elk-e7500/igt@debugfs_test@read_all_entries.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-elk-e7500/igt@debugfs_test@read_all_entries.html
- fi-ivb-3770:[PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-ivb-3770/igt@debugfs_test@read_all_entries.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-ivb-3770/igt@debugfs_test@read_all_entries.html
- fi-snb-2600:[PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-snb-2600/igt@debugfs_test@read_all_entries.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-snb-2600/igt@debugfs_test@read_all_entries.html
- fi-bdw-gvtdvm:  [PASS][7] -> [INCOMPLETE][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bdw-gvtdvm/igt@debugfs_test@read_all_entries.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-bdw-gvtdvm/igt@debugfs_test@read_all_entries.html
- fi-bsw-kefka:   [PASS][9] -> [INCOMPLETE][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bsw-kefka/igt@debugfs_test@read_all_entries.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-bsw-kefka/igt@debugfs_test@read_all_entries.html
- fi-blb-e6850:   [PASS][11] -> [INCOMPLETE][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-blb-e6850/igt@debugfs_test@read_all_entries.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-blb-e6850/igt@debugfs_test@read_all_entries.html
- fi-bwr-2160:[PASS][13] -> [INCOMPLETE][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bwr-2160/igt@debugfs_test@read_all_entries.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-bwr-2160/igt@debugfs_test@read_all_entries.html
- fi-bdw-5557u:   [PASS][15] -> [INCOMPLETE][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bdw-5557u/igt@debugfs_test@read_all_entries.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-bdw-5557u/igt@debugfs_test@read_all_entries.html
- fi-snb-2520m:   [PASS][17] -> [INCOMPLETE][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-snb-2520m/igt@debugfs_test@read_all_entries.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-snb-2520m/igt@debugfs_test@read_all_entries.html
- fi-bsw-nick:[PASS][19] -> [INCOMPLETE][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bsw-nick/igt@debugfs_test@read_all_entries.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-bsw-nick/igt@debugfs_test@read_all_entries.html
- fi-ilk-650: [PASS][21] -> [INCOMPLETE][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-ilk-650/igt@debugfs_test@read_all_entries.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-ilk-650/igt@debugfs_test@read_all_entries.html
- fi-bsw-n3050:   [PASS][23] -> [INCOMPLETE][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bsw-n3050/igt@debugfs_test@read_all_entries.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-bsw-n3050/igt@debugfs_test@read_all_entries.html
- fi-hsw-4770:[PASS][25] -> [INCOMPLETE][26]
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-hsw-4770/igt@debugfs_test@read_all_entries.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21662/fi-hsw-4770/igt@debugfs_test@read_all_entries.html

  
Known issues


  Here are the changes found in Patchwork_21662 that come from known issues:

### IGT changes ###

 Issues hit 

[Intel-gfx] ✗ Fi.CI.IGT: failure for Revert "drm/i915/dmabuf: fix broken build"

[Patchwork]

== Series Details ==

Series: Revert "drm/i915/dmabuf: fix broken build"
URL   : https://patchwork.freedesktop.org/series/97174/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10915_full -> Patchwork_21657_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21657_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21657_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 10)
--

  Missing(1): shard-rkl 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21657_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_await@wide-contexts:
- shard-kbl:  NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-kbl7/igt@gem_exec_aw...@wide-contexts.html

  * igt@kms_vblank@pipe-b-query-busy-hang:
- shard-kbl:  [PASS][2] -> [INCOMPLETE][3] +2 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl2/igt@kms_vbl...@pipe-b-query-busy-hang.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-kbl7/igt@kms_vbl...@pipe-b-query-busy-hang.html

  
Known issues


  Here are the changes found in Patchwork_21657_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][4] ([fdo#111827])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-tglb3/igt@feature_discov...@chamelium.html

  * igt@gem_ctx_sseu@invalid-args:
- shard-tglb: NOTRUN -> [SKIP][5] ([i915#280])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-tglb6/igt@gem_ctx_s...@invalid-args.html

  * igt@gem_exec_fair@basic-deadline:
- shard-skl:  NOTRUN -> [FAIL][6] ([i915#2846])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-skl9/igt@gem_exec_f...@basic-deadline.html
- shard-apl:  NOTRUN -> [FAIL][7] ([i915#2846])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-apl3/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-tglb1/igt@gem_exec_fair@basic-f...@rcs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-tglb8/igt@gem_exec_fair@basic-f...@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar 
issue
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-iclb4/igt@gem_exec_fair@basic-none-sh...@rcs0.html
- shard-apl:  [PASS][12] -> [SKIP][13] ([fdo#109271])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-apl6/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-apl2/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-kbl:  NOTRUN -> [FAIL][14] ([i915#2842])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-kbl2/igt@gem_exec_fair@basic-none-...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-tglb: NOTRUN -> [FAIL][15] ([i915#2842]) +5 similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-tglb1/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][16] ([i915#2842])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-iclb2/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl:  [PASS][17] -> [SKIP][18] ([fdo#109271])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl2/igt@gem_exec_fair@basic-p...@rcs0.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-kbl4/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl:  [PASS][19] -> [FAIL][20] ([i915#2842])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl2/igt@gem_exec_fair@basic-p...@vecs0.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][21] -> [FAIL][22] ([i915#2849])
   [21]: 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add GuC Error Capture Support

[Patchwork]

== Series Details ==

Series: Add GuC Error Capture Support
URL   : https://patchwork.freedesktop.org/series/97187/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add GuC Error Capture Support

[Patchwork]

== Series Details ==

Series: Add GuC Error Capture Support
URL   : https://patchwork.freedesktop.org/series/97187/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
3b28aa6f3791 drm/i915/guc: Add basic support for error capture lists
-:101: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#101: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc.h:396:
+int intel_guc_error_capture_process_msg(struct intel_guc *guc,
+const u32 *msg, u32 len);

-:244: ERROR:OPEN_BRACE: open brace '{' following enum go on the same line
#244: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:289:
+enum
+{

-:340: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#340: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:4001:
+int intel_guc_error_capture_process_msg(struct intel_guc *guc,
+const u32 *msg, u32 len)

total: 1 errors, 0 warnings, 2 checks, 289 lines checked
5d7b43376e65 drm/i915/guc: Update GuC ADS size for error capture lists
-:315: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#315: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 578 lines checked
55daaa2dfbb8 drm/i915/guc: Populate XE_LP register lists for GuC error state 
capture.
-:35: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in 
parentheses
#35: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:22:
+#define COMMON_GEN12BASE_GLOBAL() \
+   {GEN12_FAULT_TLB_DATA0,0,  0, "GEN12_FAULT_TLB_DATA0"}, \
+   {GEN12_FAULT_TLB_DATA1,0,  0, "GEN12_FAULT_TLB_DATA1"}, \
+   {FORCEWAKE_MT, 0,  0, "FORCEWAKE_MT"}, \
+   {DERRMR,   0,  0, "DERRMR"}, \
+   {GEN12_AUX_ERR_DBG,0,  0, "GEN12_AUX_ERR_DBG"}, \
+   {GEN12_GAM_DONE,   0,  0, "GEN12_GAM_DONE"}, \
+   {GEN11_GUC_SG_INTR_ENABLE, 0,  0, "GEN11_GUC_SG_INTR_ENABLE"}, \
+   {GEN11_CRYPTO_RSVD_INTR_ENABLE, 0, 0, "GEN11_CRYPTO_RSVD_INTR_ENABLE"}, 
\
+   {GEN11_GUNIT_CSME_INTR_ENABLE, 0,  0, "GEN11_GUNIT_CSME_INTR_ENABLE"}, \
+   {GEN12_RING_FAULT_REG, 0,  0, "GEN12_RING_FAULT_REG"}

-:47: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in 
parentheses
#47: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:34:
+#define COMMON_GEN12BASE_ENGINE_INSTANCE() \
+   {RING_PSMI_CTL(0), 0,  0, "RING_PSMI_CTL"}, \
+   {RING_ESR(0),  0,  0, "RING_ESR"}, \
+   {RING_ESR(0),  0,  0, "RING_ESR"}, \
+   {RING_DMA_FADD(0), 0,  0, "RING_DMA_FADD_LOW32"}, \
+   {RING_DMA_FADD_UDW(0), 0,  0, "RING_DMA_FADD_UP32"}, \
+   {RING_IPEIR(0),0,  0, "RING_IPEIR"}, \
+   {RING_IPEHR(0),0,  0, "RING_IPEHR"}, \
+   {RING_INSTPS(0),   0,  0, "RING_INSTPS"}, \
+   {RING_BBADDR(0),   0,  0, "RING_BBADDR_LOW32"}, \
+   {RING_BBADDR_UDW(0),   0,  0, "RING_BBADDR_UP32"}, \
+   {RING_BBSTATE(0),  0,  0, "RING_BBSTATE"}, \
+   {CCID(0),  0,  0, "CCID"}, \
+   {RING_ACTHD(0),0,  0, "RING_ACTHD_LOW32"}, \
+   {RING_ACTHD_UDW(0),0,  0, "RING_ACTHD_UP32"}, \
+   {RING_INSTPM(0),   0,  0, "RING_INSTPM"}, \
+   {RING_NOPID(0),0,  0, "RING_NOPID"}, \
+   {RING_START(0),0,  0, "RING_START"}, \
+   {RING_HEAD(0), 0,  0, "RING_HEAD"}, \
+   {RING_TAIL(0), 0,  0, "RING_TAIL"}, \
+   {RING_CTL(0),  0,  0, "RING_CTL"}, \
+   {RING_MI_MODE(0),  0,  0, "RING_MI_MODE"}, \
+   {RING_CONTEXT_CONTROL(0),  0,  0, "RING_CONTEXT_CONTROL"}, \
+   {RING_INSTDONE(0), 0,  0, "RING_INSTDONE"}, \
+   {RING_HWS_PGA(0),  0,  0, "RING_HWS_PGA"}, \
+   {RING_MODE_GEN7(0),0,  0, "RING_MODE_GEN7"}, \
+   {GEN8_RING_PDP_LDW(0, 0),  0,  0, "GEN8_RING_PDP0_LDW"}, \
+   {GEN8_RING_PDP_UDW(0, 0),  0,  0, "GEN8_RING_PDP0_UDW"}, \
+   {GEN8_RING_PDP_LDW(0, 1),  0,  0, "GEN8_RING_PDP1_LDW"}, \
+   {GEN8_RING_PDP_UDW(0, 1),  0,  0, "GEN8_RING_PDP1_UDW"}, \
+   {GEN8_RING_PDP_LDW(0, 2),  0,  0, "GEN8_RING_PDP2_LDW"}, \
+   {GEN8_RING_PDP_UDW(0, 2),  0,  0, "GEN8_RING_PDP2_UDW"}, \
+   {GEN8_RING_PDP_LDW(0, 3),  0,  0, "GEN8_RING_PDP3_LDW"}, \
+   {GEN8_RING_PDP_UDW(0, 3),  0,  0, "GEN8_RING_PDP3_UDW"}

-:85: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in 
parentheses
#85: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:72:
+#define COMMON_GEN12BASE_RENDER() \
+   {GEN7_SC_INSTDONE, 0,  0, "GEN7_SC_INSTDONE"}, \
+   {GEN12_SC_INSTDONE_EXTRA,  0,  0, "GEN12_SC_INSTDONE_EXTRA"}, \
+   

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Fix synchronization of PMU callback with reset

[Umesh Nerlige Ramappa]

On Mon, Nov 22, 2021 at 03:44:29PM +, Tvrtko Ursulin wrote:


On 11/11/2021 16:48, Umesh Nerlige Ramappa wrote:

On Thu, Nov 11, 2021 at 02:37:43PM +, Tvrtko Ursulin wrote:


On 04/11/2021 22:04, Umesh Nerlige Ramappa wrote:

On Thu, Nov 04, 2021 at 05:37:37PM +, Tvrtko Ursulin wrote:


On 03/11/2021 22:47, Umesh Nerlige Ramappa wrote:

Since the PMU callback runs in irq context, it synchronizes with gt
reset using the reset count. We could run into a case where the PMU
callback could read the reset count before it is updated. This has a
potential of corrupting the busyness stats.

In addition to the reset count, check if the reset bit is set before
capturing busyness.

In addition save the previous stats only if you intend to update them.

Signed-off-by: Umesh Nerlige Ramappa 
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git 
a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

index 5cc49c0b3889..d83ade77ca07 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1183,6 +1183,7 @@ static ktime_t 
guc_engine_busyness(struct intel_engine_cs *engine, ktime_t 
*now)

 u64 total, gt_stamp_saved;
 unsigned long flags;
 u32 reset_count;
+    bool in_reset;
 spin_lock_irqsave(>timestamp.lock, flags);
@@ -1191,7 +1192,9 @@ static ktime_t 
guc_engine_busyness(struct intel_engine_cs *engine, ktime_t 
*now)

  * engine busyness from GuC, so we just use the driver stored
  * copy of busyness. Synchronize with gt reset using reset_count.
  */
-    reset_count = i915_reset_count(gpu_error);
+    rcu_read_lock();
+    in_reset = test_bit(I915_RESET_BACKOFF, >reset.flags);
+    rcu_read_unlock();


I don't really understand the point of rcu_read_lock over 
test_bit but I guess you copied it from the trylock loop.


Yes, I don't see other parts of code using the lock though. I 
can drop it.





 *now = ktime_get();
@@ -1201,9 +1204,10 @@ static ktime_t 
guc_engine_busyness(struct intel_engine_cs *engine, ktime_t 
*now)

  * start_gt_clk is derived from GuC state. To get a consistent
  * view of activity, we query the GuC state only if gt is awake.
  */
-    stats_saved = *stats;
-    gt_stamp_saved = guc->timestamp.gt_stamp;
-    if (intel_gt_pm_get_if_awake(gt)) {
+    if (intel_gt_pm_get_if_awake(gt) && !in_reset) {


What is the point of looking at the old value of in_reset 
here? Gut feeling says if there is a race this does not fix 
it.


I did not figure out from the commit message what does "could 
read the reset count before it is updated" mean?

I thought the point of reading


the reset count twice was that you are sure there was no reset 
while in here, in which case it is safe to update the software 
copy. I don't easily see what test_bit does on top.


This is what I see in the reset flow
---

R1) test_and_set_bit(I915_RESET_BACKOFF, >reset.flags)
R2) atomic_inc(>i915->gpu_error.reset_count)
R3) reset prepare
R4) do the HW reset

The reset count is updated only once above and that's before an 
actual HW reset happens.


PMU callback flow before this patch
---

P1) read reset count
P2) update stats
P3) read reset count
P4) if reset count changed, use old stats. if not use updated stats.

I am concerned that the PMU flow could run after step (R2). Then 
we wrongly conclude that the count stayed the same and no HW 
reset happened.


Here is the problematic sequence: Threads R and P.

R1) test_and_set_bit(I915_RESET_BACKOFF, >reset.flags)
R2) atomic_inc(>i915->gpu_error.reset_count)
P1) read reset count
P2) update stats
P3) read reset count
P4) if reset count changed, use old stats. if not use updated stats.
R3) reset prepare
R4) do the HW reset

Do you agree that this is racy? In thread P we don't know in if the 
reset flag was set or not when we captured the reset count in P1?




PMU callback flow with this patch
---
This would rely on the reset_count only if a reset is not in progress.

P0) test_bit for I915_RESET_BACKOFF
P1) read reset count if not in reset. if in reset, use old stats
P2) update stats
P3) read reset count
P4) if reset count changed, use old stats. if not use updated stats.

Now that I think about it more, I do see one sequence that still 
needs fixing though - P0, R1, R2, P1 - P4. For that, I think I 
need to re-read the BACKOFF bit after reading the reset_count 
for the first time.

Modified PMU callback sequence would be:
--

M0) test_bit for I915_RESET_BACKOFF
M1) read reset count if not in reset, if in reset, use old stats

M1.1) test_bit for I915_RESET_BACKOFF. if set, use old stats. if 
not, use reset_count to synchronize


M2) update stats
M3) read reset count
M4) if reset count changed, use old stats. if not use updated stats.


You did not end up 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: break intel_display_types.h dependency on i915_drv.h

[Patchwork]

== Series Details ==

Series: drm/i915: break intel_display_types.h dependency on i915_drv.h
URL   : https://patchwork.freedesktop.org/series/97173/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10915_full -> Patchwork_21656_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 10)
--

  Missing(1): shard-rkl 

Known issues


  Here are the changes found in Patchwork_21656_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][1] ([fdo#111827])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-tglb2/igt@feature_discov...@chamelium.html

  * igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][2] -> [TIMEOUT][3] ([i915#2369] / [i915#3063] 
/ [i915#3648])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-tglb2/igt@gem_...@unwedge-stress.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-tglb3/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_capture@pi@bcs0:
- shard-iclb: [PASS][4] -> [INCOMPLETE][5] ([i915#2369] / 
[i915#3371])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb8/igt@gem_exec_capture@p...@bcs0.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-iclb7/igt@gem_exec_capture@p...@bcs0.html

  * igt@gem_exec_fair@basic-deadline:
- shard-skl:  NOTRUN -> [FAIL][6] ([i915#2846])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-skl4/igt@gem_exec_f...@basic-deadline.html
- shard-apl:  NOTRUN -> [FAIL][7] ([i915#2846])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-apl4/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][8] -> [FAIL][9] ([i915#2842]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-iclb2/igt@gem_exec_fair@basic-none-sh...@rcs0.html
- shard-apl:  [PASS][10] -> [SKIP][11] ([fdo#109271])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-apl6/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-apl8/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-apl:  NOTRUN -> [FAIL][12] ([i915#2842])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-apl4/igt@gem_exec_fair@basic-n...@vcs0.html
- shard-tglb: NOTRUN -> [FAIL][13] ([i915#2842]) +4 similar issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-tglb3/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
- shard-tglb: [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-tglb3/igt@gem_exec_fair@basic-p...@vcs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-tglb5/igt@gem_exec_fair@basic-p...@vcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][16] ([i915#2842])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-iclb4/igt@gem_exec_fair@basic-p...@vcs1.html

  * igt@gem_huc_copy@huc-copy:
- shard-apl:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#2190])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-apl4/igt@gem_huc_c...@huc-copy.html
- shard-kbl:  NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#2190])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-kbl6/igt@gem_huc_c...@huc-copy.html
- shard-skl:  NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-skl7/igt@gem_huc_c...@huc-copy.html

  * igt@gem_pwrite@basic-exhaustion:
- shard-kbl:  NOTRUN -> [WARN][20] ([i915#2658])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-kbl2/igt@gem_pwr...@basic-exhaustion.html

  * igt@gem_pxp@create-regular-buffer:
- shard-tglb: NOTRUN -> [SKIP][21] ([i915#4270])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-tglb3/igt@gem_...@create-regular-buffer.html

  * igt@gem_userptr_blits@input-checking:
- shard-skl:  NOTRUN -> [DMESG-WARN][22] ([i915#3002])
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/shard-skl6/igt@gem_userptr_bl...@input-checking.html

  * igt@gem_userptr_blits@vma-merge:
- shard-glk:  NOTRUN -> [FAIL][23] ([i915#3318])
   [23]: 

[Intel-gfx] ✗ Fi.CI.BAT: failure for More preparation for multi gt patches (rev3)

[Patchwork]

== Series Details ==

Series: More preparation for multi gt patches (rev3)
URL   : https://patchwork.freedesktop.org/series/97020/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10916 -> Patchwork_21661


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21661 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21661, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/index.html

Participating hosts (42 -> 34)
--

  Additional (1): fi-icl-u2 
  Missing(9): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-bdw-gvtdvm fi-bsw-cyan 
bat-adlp-6 bat-adlp-4 bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21661:

### IGT changes ###

 Possible regressions 

  * igt@runner@aborted:
- fi-rkl-11600:   NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-rkl-11600/igt@run...@aborted.html
- fi-hsw-4770:NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-hsw-4770/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@runner@aborted:
- {fi-jsl-1}: NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-jsl-1/igt@run...@aborted.html
- {fi-ehl-2}: NOTRUN -> [FAIL][4]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-ehl-2/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_21661 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@runner@aborted:
- fi-snb-2600:NOTRUN -> [FAIL][5] ([i915#2426])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-snb-2600/igt@run...@aborted.html
- fi-ilk-650: NOTRUN -> [FAIL][6] ([i915#2426])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-ilk-650/igt@run...@aborted.html
- fi-bsw-kefka:   NOTRUN -> [FAIL][7] ([i915#3690])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-bsw-kefka/igt@run...@aborted.html
- fi-cfl-8700k:   NOTRUN -> [FAIL][8] ([i915#2426] / [i915#3363])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-cfl-8700k/igt@run...@aborted.html
- fi-cfl-8109u:   NOTRUN -> [FAIL][9] ([i915#2426] / [i915#3363])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-cfl-8109u/igt@run...@aborted.html
- fi-icl-u2:  NOTRUN -> [FAIL][10] ([i915#2426] / [i915#3363] / 
[i915#3690])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-icl-u2/igt@run...@aborted.html
- fi-glk-dsi: NOTRUN -> [FAIL][11] ([i915#2426] / [i915#3363] / 
[k.org#202321])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-glk-dsi/igt@run...@aborted.html
- fi-kbl-8809g:   NOTRUN -> [FAIL][12] ([i915#2426] / [i915#3363])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-kbl-8809g/igt@run...@aborted.html
- fi-snb-2520m:   NOTRUN -> [FAIL][13] ([i915#2426])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-snb-2520m/igt@run...@aborted.html
- fi-bdw-5557u:   NOTRUN -> [FAIL][14] ([i915#2426])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-bdw-5557u/igt@run...@aborted.html
- fi-bwr-2160:NOTRUN -> [FAIL][15] ([i915#4529])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-bwr-2160/igt@run...@aborted.html
- fi-kbl-soraka:  NOTRUN -> [FAIL][16] ([i915#2426] / [i915#3363])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-kbl-soraka/igt@run...@aborted.html
- fi-kbl-7500u:   NOTRUN -> [FAIL][17] ([i915#2426] / [i915#3363])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-kbl-7500u/igt@run...@aborted.html
- fi-kbl-guc: NOTRUN -> [FAIL][18] ([i915#2426] / [i915#3363])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-kbl-guc/igt@run...@aborted.html
- fi-cml-u2:  NOTRUN -> [FAIL][19] ([i915#2426] / [i915#3363])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-cml-u2/igt@run...@aborted.html
- fi-rkl-guc: NOTRUN -> [FAIL][20] ([i915#2426])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-rkl-guc/igt@run...@aborted.html
- fi-ivb-3770:NOTRUN -> [FAIL][21] ([i915#2426])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21661/fi-ivb-3770/igt@run...@aborted.html
  

[Intel-gfx] [RFC 2/7] drm/i915/guc: Update GuC ADS size for error capture lists

[Alan Previn]

Update GuC ADS size allocation to include space for
the lists of error state capture register descriptors.

Also, populate the lists of registers we want GuC to report back to
Host on engine reset events. This list should include global,
engine-class and engine-instance registers for every engine-class
type on the current hardware.

NOTE: Start with a fake table of register lists to layout the
framework before adding real registers in subsequent patch.

Signed-off-by: Alan Previn 
---
 drivers/gpu/drm/i915/Makefile |   1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  10 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|   5 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 176 -
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 232 ++
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h|  47 
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  19 +-
 7 files changed, 476 insertions(+), 14 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
 create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 074d6b8edd23..e3c4d5cea4c3 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -190,6 +190,7 @@ i915-y += gt/uc/intel_uc.o \
  gt/uc/intel_guc_rc.o \
  gt/uc/intel_guc_slpc.o \
  gt/uc/intel_guc_submission.o \
+ gt/uc/intel_guc_capture.o \
  gt/uc/intel_huc.o \
  gt/uc/intel_huc_debugfs.o \
  gt/uc/intel_huc_fw.o
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 5cf9ebd2ee55..458f0d248a5a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -335,9 +335,14 @@ int intel_guc_init(struct intel_guc *guc)
if (ret)
goto err_fw;
 
-   ret = intel_guc_ads_create(guc);
+   ret = intel_guc_capture_init(guc);
if (ret)
goto err_log;
+
+   ret = intel_guc_ads_create(guc);
+   if (ret)
+   goto err_capture;
+
GEM_BUG_ON(!guc->ads_vma);
 
ret = intel_guc_ct_init(>ct);
@@ -376,6 +381,8 @@ int intel_guc_init(struct intel_guc *guc)
intel_guc_ct_fini(>ct);
 err_ads:
intel_guc_ads_destroy(guc);
+err_capture:
+   intel_guc_capture_destroy(guc);
 err_log:
intel_guc_log_destroy(>log);
 err_fw:
@@ -403,6 +410,7 @@ void intel_guc_fini(struct intel_guc *guc)
intel_guc_ct_fini(>ct);
 
intel_guc_ads_destroy(guc);
+   intel_guc_capture_destroy(guc);
intel_guc_log_destroy(>log);
intel_uc_fw_fini(>fw);
 }
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 9de99772f916..d136c69abe12 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -16,6 +16,7 @@
 #include "intel_guc_log.h"
 #include "intel_guc_reg.h"
 #include "intel_guc_slpc_types.h"
+#include "intel_guc_capture.h"
 #include "intel_uc_fw.h"
 #include "i915_utils.h"
 #include "i915_vma.h"
@@ -37,6 +38,8 @@ struct intel_guc {
struct intel_guc_ct ct;
/** @slpc: sub-structure containing SLPC related data and objects */
struct intel_guc_slpc slpc;
+   /** @capture: the error-state-capture module's data and objects */
+   struct intel_guc_state_capture capture;
 
/** @sched_engine: Global engine used to submit requests to GuC */
struct i915_sched_engine *sched_engine;
@@ -138,6 +141,8 @@ struct intel_guc {
u32 ads_regset_size;
/** @ads_golden_ctxt_size: size of the golden contexts in the ADS */
u32 ads_golden_ctxt_size;
+   /** @ads_capture_size: size of register lists in the ADS used for error 
capture */
+   u32 ads_capture_size;
/** @ads_engine_usage_size: size of engine usage in the ADS */
u32 ads_engine_usage_size;
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 6c81ddd303d3..2780c0fadd01 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -10,6 +10,7 @@
 #include "gt/shmem_utils.h"
 #include "intel_guc_ads.h"
 #include "intel_guc_fwif.h"
+#include "intel_guc_capture.h"
 #include "intel_uc.h"
 #include "i915_drv.h"
 
@@ -71,8 +72,7 @@ static u32 guc_ads_golden_ctxt_size(struct intel_guc *guc)
 
 static u32 guc_ads_capture_size(struct intel_guc *guc)
 {
-   /* Basic support to init ADS without a proper GuC error capture list */
-   return PAGE_ALIGN(PAGE_SIZE);
+   return PAGE_ALIGN(guc->ads_capture_size);
 }
 
 static u32 guc_ads_private_data_size(struct intel_guc *guc)
@@ -519,24 +519,170 @@ static void guc_init_golden_context(struct intel_guc 
*guc)
GEM_BUG_ON(guc->ads_golden_ctxt_size != total_size);
 }
 
-static void guc_capture_prep_lists(struct intel_guc *guc, struct 

[Intel-gfx] [RFC 3/7] drm/i915/guc: Populate XE_LP register lists for GuC error state capture.

[Alan Previn]

Add device specific tables and register lists to cover different engines
class types for GuC error state capture.

Also, add runtime allocation and freeing of extended register lists
for registers that need steering identifiers that depend on
the detected HW config.

Signed-off-by: Alan Previn 
---
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 260 +-
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h|   2 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 +
 3 files changed, 197 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index c741c77b7fc8..eec1d193ac26 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -9,120 +9,245 @@
 #include "i915_drv.h"
 #include "i915_memcpy.h"
 #include "gt/intel_gt.h"
+#include "gt/intel_lrc_reg.h"
 
 #include "intel_guc_fwif.h"
 #include "intel_guc_capture.h"
 
-/* Define all device tables of GuC error capture register lists */
+/*
+ * Define all device tables of GuC error capture register lists
+ * NOTE: For engine-registers, GuC only needs the register offsets
+ *   from the engine-mmio-base
+ */
+#define COMMON_GEN12BASE_GLOBAL() \
+   {GEN12_FAULT_TLB_DATA0,0,  0, "GEN12_FAULT_TLB_DATA0"}, \
+   {GEN12_FAULT_TLB_DATA1,0,  0, "GEN12_FAULT_TLB_DATA1"}, \
+   {FORCEWAKE_MT, 0,  0, "FORCEWAKE_MT"}, \
+   {DERRMR,   0,  0, "DERRMR"}, \
+   {GEN12_AUX_ERR_DBG,0,  0, "GEN12_AUX_ERR_DBG"}, \
+   {GEN12_GAM_DONE,   0,  0, "GEN12_GAM_DONE"}, \
+   {GEN11_GUC_SG_INTR_ENABLE, 0,  0, "GEN11_GUC_SG_INTR_ENABLE"}, \
+   {GEN11_CRYPTO_RSVD_INTR_ENABLE, 0, 0, "GEN11_CRYPTO_RSVD_INTR_ENABLE"}, 
\
+   {GEN11_GUNIT_CSME_INTR_ENABLE, 0,  0, "GEN11_GUNIT_CSME_INTR_ENABLE"}, \
+   {GEN12_RING_FAULT_REG, 0,  0, "GEN12_RING_FAULT_REG"}
+
+#define COMMON_GEN12BASE_ENGINE_INSTANCE() \
+   {RING_PSMI_CTL(0), 0,  0, "RING_PSMI_CTL"}, \
+   {RING_ESR(0),  0,  0, "RING_ESR"}, \
+   {RING_ESR(0),  0,  0, "RING_ESR"}, \
+   {RING_DMA_FADD(0), 0,  0, "RING_DMA_FADD_LOW32"}, \
+   {RING_DMA_FADD_UDW(0), 0,  0, "RING_DMA_FADD_UP32"}, \
+   {RING_IPEIR(0),0,  0, "RING_IPEIR"}, \
+   {RING_IPEHR(0),0,  0, "RING_IPEHR"}, \
+   {RING_INSTPS(0),   0,  0, "RING_INSTPS"}, \
+   {RING_BBADDR(0),   0,  0, "RING_BBADDR_LOW32"}, \
+   {RING_BBADDR_UDW(0),   0,  0, "RING_BBADDR_UP32"}, \
+   {RING_BBSTATE(0),  0,  0, "RING_BBSTATE"}, \
+   {CCID(0),  0,  0, "CCID"}, \
+   {RING_ACTHD(0),0,  0, "RING_ACTHD_LOW32"}, \
+   {RING_ACTHD_UDW(0),0,  0, "RING_ACTHD_UP32"}, \
+   {RING_INSTPM(0),   0,  0, "RING_INSTPM"}, \
+   {RING_NOPID(0),0,  0, "RING_NOPID"}, \
+   {RING_START(0),0,  0, "RING_START"}, \
+   {RING_HEAD(0), 0,  0, "RING_HEAD"}, \
+   {RING_TAIL(0), 0,  0, "RING_TAIL"}, \
+   {RING_CTL(0),  0,  0, "RING_CTL"}, \
+   {RING_MI_MODE(0),  0,  0, "RING_MI_MODE"}, \
+   {RING_CONTEXT_CONTROL(0),  0,  0, "RING_CONTEXT_CONTROL"}, \
+   {RING_INSTDONE(0), 0,  0, "RING_INSTDONE"}, \
+   {RING_HWS_PGA(0),  0,  0, "RING_HWS_PGA"}, \
+   {RING_MODE_GEN7(0),0,  0, "RING_MODE_GEN7"}, \
+   {GEN8_RING_PDP_LDW(0, 0),  0,  0, "GEN8_RING_PDP0_LDW"}, \
+   {GEN8_RING_PDP_UDW(0, 0),  0,  0, "GEN8_RING_PDP0_UDW"}, \
+   {GEN8_RING_PDP_LDW(0, 1),  0,  0, "GEN8_RING_PDP1_LDW"}, \
+   {GEN8_RING_PDP_UDW(0, 1),  0,  0, "GEN8_RING_PDP1_UDW"}, \
+   {GEN8_RING_PDP_LDW(0, 2),  0,  0, "GEN8_RING_PDP2_LDW"}, \
+   {GEN8_RING_PDP_UDW(0, 2),  0,  0, "GEN8_RING_PDP2_UDW"}, \
+   {GEN8_RING_PDP_LDW(0, 3),  0,  0, "GEN8_RING_PDP3_LDW"}, \
+   {GEN8_RING_PDP_UDW(0, 3),  0,  0, "GEN8_RING_PDP3_UDW"}
+
+#define COMMON_GEN12BASE_HAS_EU() \
+   {EIR,  0,  0, "EIR"}
+
+#define COMMON_GEN12BASE_RENDER() \
+   {GEN7_SC_INSTDONE, 0,  0, "GEN7_SC_INSTDONE"}, \
+   {GEN12_SC_INSTDONE_EXTRA,  0,  0, "GEN12_SC_INSTDONE_EXTRA"}, \
+   {GEN12_SC_INSTDONE_EXTRA2, 0,  0, "GEN12_SC_INSTDONE_EXTRA2"}
+
+#define COMMON_GEN12BASE_VEC() \
+   {GEN11_VCS_VECS_INTR_ENABLE, 0,0, "GEN11_VCS_VECS_INTR_ENABLE"}, \
+   {GEN12_SFC_DONE(0),0,  0, "GEN12_SFC_DONE0"}, \
+   {GEN12_SFC_DONE(1),0,  0, "GEN12_SFC_DONE1"}, \
+   {GEN12_SFC_DONE(2),0,  0, "GEN12_SFC_DONE2"}, \
+   {GEN12_SFC_DONE(3),0,  0, "GEN12_SFC_DONE3"}
 
 

[Intel-gfx] [RFC 7/7] drm/i915/guc: Print the GuC error capture output register list.

[Alan Previn]

Print the GuC captured error state register list (offsets
and values) when gpu_coredump_state printout is invoked.

Also, since the GuC can report multiple engine class registers in a
single notification event, parse the captured data (appearing as a
stream of structures) to identify multiple captures of different
'engine-capture-group-outputs'.

Finally, for each 'engine-capture-group-output', identify the last
running context and print already-identified vma's so that user's
output report follows the same layout as execlist submission. I.e.
engine1-registers, engine1-context-vmas, engine2-registers,
engine2-context-vmas, etc.

Signed-off-by: Alan Previn 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |   4 +-
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 389 ++
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h|   6 +
 drivers/gpu/drm/i915/i915_gpu_error.c |  53 ++-
 drivers/gpu/drm/i915/i915_gpu_error.h |   5 +
 5 files changed, 439 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 332756036007..5806e2c05212 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1595,9 +1595,7 @@ static void intel_engine_print_registers(struct 
intel_engine_cs *engine,
drm_printf(m, "\tIPEHR: 0x%08x\n", ENGINE_READ(engine, IPEHR));
}
 
-   if (intel_engine_uses_guc(engine)) {
-   /* nothing to print yet */
-   } else if (HAS_EXECLISTS(dev_priv)) {
+   if (HAS_EXECLISTS(dev_priv) && !intel_engine_uses_guc(engine)) {
struct i915_request * const *port, *rq;
const u32 *hws =
>status_page.addr[I915_HWS_CSB_BUF0_INDEX];
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index 459fe81c77ae..998ce1b474ed 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -415,8 +415,389 @@ int intel_guc_capture_output_min_size_est(struct 
intel_guc *guc)
  *   L--> intel_guc_capture_store_snapshot
  *L--> queue(__guc_capture_store_snapshot_work)
  * Copies from B (head->tail) into C
+ *
+ * GUC --> notify context reset:
+ * -
+ * --> G2H CONTEXT RESET
+ *   L--> guc_handle_context_reset --> i915_capture_error_state
+ *--> i915_gpu_coredump --> intel_guc_capture_store_ptr
+ *L--> keep a ptr to capture_store in
+ * i915_gpu_coredump struct.
+ *
+ * User Sysfs / Debugfs
+ * 
+ *  --> i915_gpu_coredump_copy_to_buffer->
+ *   L--> err_print_to_sgl --> err_print_gt
+ *L--> error_print_guc_captures
+ * L--> loop: 
intel_guc_capture_out_print_next_group
+ *
  */
 
+#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
+
+static char *
+guc_capture_register_string(const struct intel_guc *guc, u32 owner, u32 type,
+   u32 class, u32 id, u32 offset)
+{
+   struct __guc_mmio_reg_descr_group *reglists = guc->capture.reglists;
+   struct __guc_mmio_reg_descr_group *match;
+   int num_regs, j = 0;
+
+   if (!reglists)
+   return NULL;
+
+   match = guc_capture_get_one_list(reglists, owner, type, id);
+   if (match) {
+   num_regs = match->num_regs;
+   while (num_regs--) {
+   if (offset == match->list[j].reg.reg)
+   return match->list[j].regname;
+   ++j;
+   }
+   }
+
+   return NULL;
+}
+
+static inline int
+guc_capture_store_remove_dw(struct guc_capture_out_store *store, u32 
*bytesleft,
+   u32 *dw)
+{
+   int tries = 2;
+   int avail = 0;
+   u32 *src_data;
+
+   if (!*bytesleft)
+   return 0;
+
+   while (tries--) {
+   avail = CIRC_CNT_TO_END(store->head, store->tail, store->size);
+   if (avail >= sizeof(u32)) {
+   src_data = (u32 *)(store->addr + store->tail);
+   *dw = *src_data;
+   store->tail = (store->tail + 4) & (store->size - 1);
+   *bytesleft -= 4;
+   return 4;
+   }
+   if (store->tail == (store->size - 1) && store->head > 0)
+   store->tail = 0;
+   }
+
+   return 0;
+}
+
+static int
+capture_store_get_group_hdr(const struct intel_guc *guc,
+   struct guc_capture_out_store *store, u32 *bytesleft,
+   struct intel_guc_capture_out_group_header *group)
+{
+   int read = 0;
+   int fullsize = sizeof(struct 

[Intel-gfx] [RFC 4/7] drm/i915/guc: Add GuC's error state capture output structures.

[Alan Previn]

Add GuC's error capture output structures and definitions as how
they would appear in GuC log buffer's error capture subregion after
an error state capture G2H event notification.

Signed-off-by: Alan Previn 
---
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h| 35 +++
 1 file changed, 35 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
index df420f0f49b3..b2454b6cd778 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
@@ -29,6 +29,41 @@ struct __guc_mmio_reg_descr_group {
struct __guc_mmio_reg_descr * ext;
 };
 
+struct intel_guc_capture_out_data_header {
+   u32 reserved1;
+   u32 info;
+   #define GUC_CAPTURE_DATAHDR_SRC_TYPE GENMASK(3, 0) /* as per 
enum guc_capture_type */
+   #define GUC_CAPTURE_DATAHDR_SRC_CLASS GENMASK(7, 4) /* as per 
GUC_MAX_ENGINE_CLASSES */
+   #define GUC_CAPTURE_DATAHDR_SRC_INSTANCE GENMASK(11, 8)
+   u32 lrca; /* if type-instance, LRCA (address) that hung, else set to ~0 
*/
+   u32 guc_ctx_id; /* if type-instance, context index of hung context, 
else set to ~0 */
+   u32 num_mmios;
+   #define GUC_CAPTURE_DATAHDR_NUM_MMIOS GENMASK(9, 0)
+};
+
+struct intel_guc_capture_out_data {
+   struct intel_guc_capture_out_data_header capture_header;
+   struct guc_mmio_reg capture_list[0];
+};
+
+enum guc_capture_group_types {
+   GUC_STATE_CAPTURE_GROUP_TYPE_FULL,
+   GUC_STATE_CAPTURE_GROUP_TYPE_PARTIAL,
+   GUC_STATE_CAPTURE_GROUP_TYPE_MAX,
+};
+
+struct intel_guc_capture_out_group_header {
+   u32 reserved1;
+   u32 info;
+   #define GUC_CAPTURE_GRPHDR_SRC_NUMCAPTURES GENMASK(7, 0)
+   #define GUC_CAPTURE_GRPHDR_SRC_CAPTURE_TYPE GENMASK(15, 8)
+};
+
+struct intel_guc_capture_out_group {
+   struct intel_guc_capture_out_group_header group_header;
+   struct intel_guc_capture_out_data group_lists[0];
+};
+
 struct intel_guc_state_capture {
struct __guc_mmio_reg_descr_group *reglists;
u16 
num_instance_regs[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
-- 
2.25.1

[Intel-gfx] [RFC 6/7] drm/i915/guc: Copy new GuC error capture logs upon G2H notification.

[Alan Previn]

Upon the G2H Notify-Err-Capture event, queue a worker to make a
snapshot of the error state capture logs from the GuC-log buffer
(error capture region) into an bigger interim circular buffer store
that can be parsed later during gpu coredump printing.

Also, call that worker function directly for the cases where we
are resetting GuC submission and need to flush outstanding logs.

Signed-off-by: Alan Previn 
---
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   7 +
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 206 ++
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h|  16 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c|  16 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h|   5 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  10 +-
 6 files changed, 256 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
index 5af03a486a13..c130f465c19a 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
@@ -178,4 +178,11 @@ enum intel_guc_sleep_state_status {
 #define GUC_LOG_CONTROL_VERBOSITY_MASK (0xF << GUC_LOG_CONTROL_VERBOSITY_SHIFT)
 #define GUC_LOG_CONTROL_DEFAULT_LOGGING(1 << 8)
 
+enum intel_guc_state_capture_event_status {
+   INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_SUCCESS = 0x0,
+   INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE = 0x1,
+};
+
+#define INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_MASK  0x1
+
 #endif /* _ABI_GUC_ACTIONS_ABI_H */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index 0cb358a98605..459fe81c77ae 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -11,8 +11,11 @@
 #include "gt/intel_gt.h"
 #include "gt/intel_lrc_reg.h"
 
+#include 
+
 #include "intel_guc_fwif.h"
 #include "intel_guc_capture.h"
+#include "i915_gpu_error.h"
 
 /*
  * Define all device tables of GuC error capture register lists
@@ -390,15 +393,218 @@ int intel_guc_capture_output_min_size_est(struct 
intel_guc *guc)
return (worst_min_size * 3);
 }
 
+/*
+ * KMD Init time flows:
+ * 
+ * --> alloc A: GuC input capture regs lists (registered via ADS)
+ *  List acquired via intel_guc_capture_list_count + 
intel_guc_capture_list_init
+ *  Size = global-reg-list + (class-reg-list) + (num-instances 
x instance-reg-list)
+ *  Device tables carry: 1x global, 1x per-class, 1x 
per-instance)
+ *  Caller needs to call per-class and per-instance multiplie 
times
+ *
+ * --> alloc B: GuC output capture buf (registered via 
guc_init_params(log_param))
+ *  Size = #define CAPTURE_BUFFER_SIZE (warns if on too-small)
+ *  Note2: 'x 3' to hold multiple capture groups
+ *
+ * --> alloc C: GuC capture interim circular buffer storage in system mem
+ *  Size = 'power_of_two(sizeof(B))' as per kernel circular 
buffer helper
+ *
+ * GUC Runtime notify capture:
+ * --
+ * --> G2H STATE_CAPTURE_NOTIFICATION
+ *   L--> intel_guc_capture_store_snapshot
+ *L--> queue(__guc_capture_store_snapshot_work)
+ * Copies from B (head->tail) into C
+ */
+
+static void guc_capture_store_insert(struct intel_guc *guc, struct 
guc_capture_out_store *store,
+unsigned char *new_data, size_t bytes)
+{
+   struct drm_i915_private *dev_priv = (guc_to_gt(guc))->i915;
+   unsigned char *dst_data = store->addr;
+   unsigned long h, t;
+   size_t tmp;
+
+   h = store->head;
+   t = store->tail;
+   if (CIRC_SPACE(h, t, store->size) >= bytes) {
+   while (bytes) {
+   tmp = CIRC_SPACE_TO_END(h, t, store->size);
+   if (tmp) {
+   tmp = tmp < bytes ? tmp : bytes;
+   i915_unaligned_memcpy_from_wc(_data[h], 
new_data, tmp);
+   bytes -= tmp;
+   new_data += tmp;
+   h = (h + tmp) & (store->size - 1);
+   } else {
+   drm_err(_priv->drm, "circbuf copy-to 
ptr-corruption!\n");
+   break;
+   }
+   }
+   store->head = h;
+   } else {
+   drm_err(_priv->drm, "GuC capture interim-store insufficient 
space!\n");
+   }
+}
+
+static void __guc_capture_store_snapshot_work(struct intel_guc *guc)
+{
+   struct drm_i915_private *dev_priv = (guc_to_gt(guc))->i915;
+   unsigned int buffer_size, read_offset, write_offset, bytes_to_copy, 
full_count;
+   struct guc_log_buffer_state *log_buf_state;
+   struct guc_log_buffer_state 

[Intel-gfx] [RFC 5/7] drm/i915/guc: Update GuC's log-buffer-state access for error capture.

[Alan Previn]

GuC log buffer regions for debug-log-events, crash-dumps and
error-state-capture are all a single bo allocation that includes
the guc_log_buffer_state structures.

Since the error-capture region is accessed with high priority at non-
deterministic times (as part of gpu coredump) while the debug-log-event
region is populated and accessed with different priorities, timings and
consumers, let's split out separate locks for buffer-state accesses
of each region.

Also, ensure a global mapping is made up front for the entire bo
throughout GuC operation so that dynamic mapping and unmapping isn't
required for error capture log access if relay-logging isn't running.

Additionally, while here, make some readibility improvements:
1. change previous function names with "capture_logs" to
   "copy_debug_logs" to help make the distinction clearer.
2. Update the guc log region mapping comments to order them
   according to the enum definition as per the GuC interface.

Signed-off-by: Alan Previn 
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|   2 +
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c|  46 +++
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h|   1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c| 120 --
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h|  14 +-
 5 files changed, 137 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index d136c69abe12..e0db21bbffdd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -34,6 +34,8 @@ struct intel_guc {
struct intel_uc_fw fw;
/** @log: sub-structure containing GuC log related data and objects */
struct intel_guc_log log;
+   /** @log_state: states and locks for each subregion of GuC's log buffer 
*/
+   struct intel_guc_log_stats log_state[GUC_MAX_LOG_BUFFER];
/** @ct: the command transport communication channel */
struct intel_guc_ct ct;
/** @slpc: sub-structure containing SLPC related data and objects */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index eec1d193ac26..0cb358a98605 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -344,6 +344,52 @@ int intel_guc_capture_list_init(struct intel_guc *guc, u32 
owner, u32 type, u32
return -ENODATA;
 }
 
+int intel_guc_capture_output_min_size_est(struct intel_guc *guc)
+{
+   struct intel_gt *gt = guc_to_gt(guc);
+   struct intel_engine_cs *engine;
+   enum intel_engine_id id;
+   int worst_min_size = 0, num_regs = 0;
+   u16 tmp = 0;
+
+   /*
+* If every single engine-instance suffered a failure in quick 
succession but
+* were all unrelated, then a burst of multiple error-capture events 
would dump
+* registers for every one engine instance, one at a time. In this 
case, GuC
+* would even dump the global-registers repeatedly.
+*
+* For each engine instance, there would be 1 x 
intel_guc_capture_out_group output
+* followed by 3 x intel_guc_capture_out_data lists. The latter is how 
the register
+* dumps are split across different register types (where the '3' are 
global vs class
+* vs instance). Finally, let's multiply the whole thing by 3x (just so 
we are
+* not limited to just 1 rounds of data in a  worst case full register 
dump log)
+*
+* NOTE: intel_guc_log that allocates the log buffer would round this 
size up to
+* a power of two.
+*/
+
+   for_each_engine(engine, gt, id) {
+   worst_min_size += sizeof(struct 
intel_guc_capture_out_group_header) +
+ (3 * sizeof(struct 
intel_guc_capture_out_data_header));
+
+   if (!intel_guc_capture_list_count(guc, 0, 
GUC_CAPTURE_LIST_TYPE_GLOBAL, 0, ))
+   num_regs += tmp;
+
+   if (!intel_guc_capture_list_count(guc, 0, 
GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS,
+ engine->class, )) {
+   num_regs += tmp;
+   }
+   if (!intel_guc_capture_list_count(guc, 0, 
GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE,
+ engine->class, )) {
+   num_regs += tmp;
+   }
+   }
+
+   worst_min_size += (num_regs * sizeof(struct guc_mmio_reg));
+
+   return (worst_min_size * 3);
+}
+
 void intel_guc_capture_destroy(struct intel_guc *guc)
 {
guc_capture_clear_ext_regs(guc->capture.reglists);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
index b2454b6cd778..839b53425e1e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
@@ -78,6 +78,7 @@ 

[Intel-gfx] [RFC 0/7] Add GuC Error Capture Support

[Alan Previn]

This series:
  1. Supports the roll out of an upcoming GuC feature to
 enable error-state-capture that allows the driver to
 register lists of MMIO registers that GuC will report
 during a GuC triggered engine-reset event.
  2. Updates the ADS blob creation to register lists
 of global and engine registers with GuC.
  3. Defines tables of register lists that are global or
 engine class or engine instance in scope.
  4. Separates GuC log-buffer access locks for relay logging
 vs the new region for the error state capture data.
  5. Allocates an additional interim circular buffer store
 to copy snapshots of new GuC reported error-state-capture
 dumps in response to the G2H notification.
  6. Connects the i915_gpu_coredump reporting function
 to the GuC error capture module to print all GuC
 error state capture dumps that is reported.

Alan Previn (6):
  drm/i915/guc: Update GuC ADS size for error capture lists
  drm/i915/guc: Populate XE_LP register lists for GuC error state
capture.
  drm/i915/guc: Add GuC's error state capture output structures.
  drm/i915/guc: Update GuC's log-buffer-state access for error capture.
  drm/i915/guc: Copy new GuC error capture logs upon G2H notification.
  drm/i915/guc: Print the GuC error capture output register list.

John Harrison (1):
  drm/i915/guc: Add basic support for error capture lists

 drivers/gpu/drm/i915/Makefile |   1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |   4 +-
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   8 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  52 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|   9 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 197 +++-
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 999 ++
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h| 107 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c |   3 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  40 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c| 141 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h|  21 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  22 +
 drivers/gpu/drm/i915/i915_gpu_error.c |  53 +-
 drivers/gpu/drm/i915/i915_gpu_error.h |   5 +
 15 files changed, 1581 insertions(+), 81 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
 create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h

-- 
2.25.1

[Intel-gfx] [RFC 1/7] drm/i915/guc: Add basic support for error capture lists

[Alan Previn]

From: John Harrison 

Add not-quite-support for GuC based error capture. GuC will add error
capture capability amongst other things. In order to load the
firmware, a minimum amount of support is required on the driver side.
This adds that bare minimum.

Signed-off-by: John Harrison 
Reviewed-by: Alan Previn 
---
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.c| 42 +++--
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  2 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 45 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c |  3 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   | 21 -
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c|  9 +++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h|  2 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 
 9 files changed, 126 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
index fe5d7d261797..5af03a486a13 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
@@ -145,6 +145,7 @@ enum intel_guc_action {
INTEL_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
INTEL_GUC_ACTION_RESET_CLIENT = 0x5507,
INTEL_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
+   INTEL_GUC_ACTION_STATE_CAPTURE_NOTIFICATION = 0x8002,
INTEL_GUC_ACTION_LIMIT
 };
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 6e228343e8cb..5cf9ebd2ee55 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -222,32 +222,48 @@ static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
u32 flags;
 
#if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0)
-   #define UNIT SZ_1M
-   #define FLAG GUC_LOG_ALLOC_IN_MEGABYTE
+   #define LOG_UNIT SZ_1M
+   #define LOG_FLAG GUC_LOG_LOG_ALLOC_UNITS
#else
-   #define UNIT SZ_4K
-   #define FLAG 0
+   #define LOG_UNIT SZ_4K
+   #define LOG_FLAG 0
+   #endif
+
+   #if (((CAPTURE_BUFFER_SIZE) % SZ_1M) == 0)
+   #define CAPTURE_UNIT SZ_1M
+   #define CAPTURE_FLAG GUC_LOG_CAPTURE_ALLOC_UNITS
+   #else
+   #define CAPTURE_UNIT SZ_4K
+   #define CAPTURE_FLAG 0
#endif
 
BUILD_BUG_ON(!CRASH_BUFFER_SIZE);
-   BUILD_BUG_ON(!IS_ALIGNED(CRASH_BUFFER_SIZE, UNIT));
+   BUILD_BUG_ON(!IS_ALIGNED(CRASH_BUFFER_SIZE, LOG_UNIT));
BUILD_BUG_ON(!DEBUG_BUFFER_SIZE);
-   BUILD_BUG_ON(!IS_ALIGNED(DEBUG_BUFFER_SIZE, UNIT));
+   BUILD_BUG_ON(!IS_ALIGNED(DEBUG_BUFFER_SIZE, LOG_UNIT));
+   BUILD_BUG_ON(!CAPTURE_BUFFER_SIZE);
+   BUILD_BUG_ON(!IS_ALIGNED(CAPTURE_BUFFER_SIZE, CAPTURE_UNIT));
 
-   BUILD_BUG_ON((CRASH_BUFFER_SIZE / UNIT - 1) >
+   BUILD_BUG_ON((CRASH_BUFFER_SIZE / LOG_UNIT - 1) >
(GUC_LOG_CRASH_MASK >> GUC_LOG_CRASH_SHIFT));
-   BUILD_BUG_ON((DEBUG_BUFFER_SIZE / UNIT - 1) >
+   BUILD_BUG_ON((DEBUG_BUFFER_SIZE / LOG_UNIT - 1) >
(GUC_LOG_DEBUG_MASK >> GUC_LOG_DEBUG_SHIFT));
+   BUILD_BUG_ON((CAPTURE_BUFFER_SIZE / CAPTURE_UNIT - 1) >
+   (GUC_LOG_CAPTURE_MASK >> GUC_LOG_CAPTURE_SHIFT));
 
flags = GUC_LOG_VALID |
GUC_LOG_NOTIFY_ON_HALF_FULL |
-   FLAG |
-   ((CRASH_BUFFER_SIZE / UNIT - 1) << GUC_LOG_CRASH_SHIFT) |
-   ((DEBUG_BUFFER_SIZE / UNIT - 1) << GUC_LOG_DEBUG_SHIFT) |
+   CAPTURE_FLAG |
+   LOG_FLAG |
+   ((CRASH_BUFFER_SIZE / LOG_UNIT - 1) << GUC_LOG_CRASH_SHIFT) |
+   ((DEBUG_BUFFER_SIZE / LOG_UNIT - 1) << GUC_LOG_DEBUG_SHIFT) |
+   ((CAPTURE_BUFFER_SIZE / CAPTURE_UNIT - 1) << 
GUC_LOG_CAPTURE_SHIFT) |
(offset << GUC_LOG_BUF_ADDR_SHIFT);
 
-   #undef UNIT
-   #undef FLAG
+   #undef LOG_UNIT
+   #undef LOG_FLAG
+   #undef CAPTURE_UNIT
+   #undef CAPTURE_FLAG
 
return flags;
 }
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 1cb46098030d..9de99772f916 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -392,6 +392,8 @@ int intel_guc_context_reset_process_msg(struct intel_guc 
*guc,
const u32 *msg, u32 len);
 int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
 const u32 *msg, u32 len);
+int intel_guc_error_capture_process_msg(struct intel_guc *guc,
+const u32 *msg, u32 len);
 
 void intel_guc_find_hung_context(struct intel_engine_cs *engine);
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 1a1edae67e4e..6c81ddd303d3 100644
--- 

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/ttm: Async migration (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Async migration (rev8)
URL   : https://patchwork.freedesktop.org/series/96798/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10916 -> Patchwork_21660


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21660 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21660, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21660/index.html

Participating hosts (42 -> 35)
--

  Missing(7): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-6 bat-adlp-4 
bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21660:

### IGT changes ###

 Possible regressions 

  * igt@gem_flink_basic@bad-flink:
- fi-skl-6600u:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-skl-6600u/igt@gem_flink_ba...@bad-flink.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21660/fi-skl-6600u/igt@gem_flink_ba...@bad-flink.html

  
Known issues


  Here are the changes found in Patchwork_21660 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-bsw-nick:NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21660/fi-bsw-nick/igt@amdgpu/amd_ba...@semaphore.html

  * igt@gem_exec_suspend@basic-s3:
- fi-tgl-1115g4:  [PASS][4] -> [FAIL][5] ([i915#1888])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21660/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_selftest@live@execlists:
- fi-bsw-kefka:   [PASS][6] -> [INCOMPLETE][7] ([i915#2940])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21660/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html

  * igt@runner@aborted:
- fi-bsw-kefka:   NOTRUN -> [FAIL][8] ([fdo#109271] / [i915#1436] / 
[i915#3428] / [i915#4312])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21660/fi-bsw-kefka/igt@run...@aborted.html

  
 Possible fixes 

  * igt@i915_selftest@live@execlists:
- fi-bsw-nick:[INCOMPLETE][9] ([i915#2940]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21660/fi-bsw-nick/igt@i915_selftest@l...@execlists.html

  
 Warnings 

  * igt@runner@aborted:
- fi-skl-6600u:   [FAIL][11] ([i915#3363] / [i915#4312]) -> [FAIL][12] 
([i915#2722] / [i915#3363] / [i915#4312])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-skl-6600u/igt@run...@aborted.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21660/fi-skl-6600u/igt@run...@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312


Build changes
-

  * Linux: CI_DRM_10916 -> Patchwork_21660

  CI-20190529: 20190529
  CI_DRM_10916: 876217519d26774d843128cc66640ae501a5c38d @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6286: cdcbf81f734fdb1d102e84490e49e9fec23760cd @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21660: 0457c46c087cd4764704749e4387cbe2a379509c @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0457c46c087c drm/i915/ttm: Update i915_gem_obj_copy_ttm() to be asynchronous
a128d5444c65 drm/i915/ttm: Implement asynchronous TTM moves
7466204ea747 drm/i915/ttm: Correctly handle waiting for gpu when shrinking
58b58fb5ac0f drm/i915/ttm: Drop region reference counting
054cdea3109a drm/i915/ttm: Move the i915_gem_obj_copy_ttm() function

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for More preparation for multi gt patches (rev3)

[Patchwork]

== Series Details ==

Series: More preparation for multi gt patches (rev3)
URL   : https://patchwork.freedesktop.org/series/97020/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v10 08/10] dyndbg: add print-to-tracefs, selftest with it - RFC

[jim . cromie]

On Mon, Nov 22, 2021 at 2:02 AM Pekka Paalanen  wrote:
>
> On Fri, 19 Nov 2021 11:21:36 -0500
> Jason Baron  wrote:
>
> > On 11/18/21 10:24 AM, Pekka Paalanen wrote:
> > > On Thu, 18 Nov 2021 09:29:27 -0500
> > > Jason Baron  wrote:
> > >
> > >> On 11/16/21 3:46 AM, Pekka Paalanen wrote:
> > >>> On Fri, 12 Nov 2021 10:08:41 -0500
> > >>> Jason Baron  wrote:
> > >>>
> >  On 11/12/21 6:49 AM, Vincent Whitchurch wrote:
> > > On Thu, Nov 11, 2021 at 03:02:04PM -0700, Jim Cromie wrote:
> > >> Sean Paul proposed, in:
> > >> https://urldefense.com/v3/__https://patchwork.freedesktop.org/series/78133/__;!!GjvTz_vk!HcKnMRByYkIdyF1apqQjlN5aBIomzJR1an3YWXM6KXs0EftVMQdrewRA8Dki4A$
> > >> drm/trace: Mirror DRM debug logs to tracefs
> > >>
> > >> His patchset's objective is to be able to independently steer some of
> > >> the drm.debug stream to an alternate tracing destination, by 
> > >> splitting
> > >> drm_debug_enabled() into syslog & trace flavors, and enabling them
> > >> separately.  2 advantages were identified:
> > >>
> > >> 1- syslog is heavyweight, tracefs is much lighter
> > >> 2- separate selection of enabled categories means less traffic
> > >>
> > >> Dynamic-Debug can do 2nd exceedingly well:
> > >>
> > >> A- all work is behind jump-label's NOOP, zero off cost.
> > >> B- exact site selectivity, precisely the useful traffic.
> > >>can tailor enabled set interactively, at shell.
> > >>
> > >> Since the tracefs interface is effective for drm (the threads suggest
> > >> so), adding that interface to dynamic-debug has real potential for
> > >> everyone including drm.
> > >>
> > >> if CONFIG_TRACING:
> > >>
> > >> Grab Sean's trace_init/cleanup code, use it to provide tracefs
> > >> available by default to all pr_debugs.  This will likely need some
> > >> further per-module treatment; perhaps something reflecting hierarchy
> > >> of module,file,function,line, maybe with a tuned flattening.
> > >>
> > >> endif CONFIG_TRACING
> > >>
> > >> Add a new +T flag to enable tracing, independent of +p, and add and
> > >> use 3 macros: dyndbg_site_is_enabled/logging/tracing(), to 
> > >> encapsulate
> > >> the flag checks.  Existing code treats T like other flags.
> > >
> > > I posted a patchset a while ago to do something very similar, but that
> > > got stalled for some reason and I unfortunately didn't follow it up:
> > >
> > >  
> > > https://urldefense.com/v3/__https://lore.kernel.org/lkml/20200825153338.17061-1-vincent.whitchu...@axis.com/__;!!GjvTz_vk!HcKnMRByYkIdyF1apqQjlN5aBIomzJR1an3YWXM6KXs0EftVMQdrewRGytKHPg$
> > >
> > > A key difference between that patchset and this patch (besides that
> > > small fact that I used +x instead of +T) was that my patchset allowed
> > > the dyndbg trace to be emitted to the main buffer and did not force 
> > > them
> > > to be in an instance-specific buffer.
> > 
> >  Yes, I agree I'd prefer that we print here to the 'main' buffer - it
> >  seems to keep things simpler and easier to combine the output from
> >  different sources as you mentioned.
> > >>>
> > >>> Hi,
> > >>>
> > >>> I'm not quite sure I understand this discussion, but I would like to
> > >>> remind you all of what Sean's original work is about:
> > >>>
> > >>> Userspace configures DRM tracing into a flight recorder buffer (I guess
> > >>> this is what you refer to "instance-specific buffer").
> > >>>
> > >>> Userspace runs happily for months, and then hits a problem: a failure
> > >>> in the DRM sub-system most likely, e.g. an ioctl that should never
> > >>> fail, failed. Userspace handles that failure by dumping the flight
> > >>> recorder buffer into a file and saving or sending a bug report. The
> > >>> flight recorder contents give a log of all relevant DRM in-kernel
> > >>> actions leading to the unexpected failure to help developers debug it.
> > >>>
> > >>> I don't mind if one can additionally send the flight recorder stream to
> > >>> the main buffer, but I do want the separate flight recorder buffer to
> > >>> be an option so that a) unrelated things cannot flood the interesting
> > >>> bits out of it, and b) the scope of collected information is relevant.
> > >>>
> > >>> The very reason for this work is problems that are very difficult to
> > >>> reproduce in practice, either because the problem itself is triggered
> > >>> very rarely and randomly, or because the end users of the system have
> > >>> either no knowledge or no access to reconfigure debug logging and then
> > >>> reproduce the problem with good debug logs.
> > >>>
> > >>> Thank you very much for pushing this work forward!
> > >>>
> > >>>
> > >>
> > >> So I think Vincent (earlier in the thread) was saying that he finds it
> > >> very helpful have dynamic debug output go to the 'main' trace buffer,
> > >> while you seem to 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: Tile 4 plane format support (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915/dg2: Tile 4 plane format support (rev5)
URL   : https://patchwork.freedesktop.org/series/95715/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10916 -> Patchwork_21659


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/index.html

Participating hosts (42 -> 35)
--

  Additional (1): fi-icl-u2 
  Missing(8): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-bsw-cyan bat-adlp-6 
bat-adlp-4 bat-jsl-2 bat-jsl-1 

Known issues


  Here are the changes found in Patchwork_21659 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-bsw-nick:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-bsw-nick/igt@amdgpu/amd_ba...@semaphore.html

  * igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2:  NOTRUN -> [SKIP][2] ([fdo#109315]) +17 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-icl-u2/igt@amdgpu/amd_cs_...@fork-gfx0.html

  * igt@gem_huc_copy@huc-copy:
- fi-icl-u2:  NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-icl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2:  NOTRUN -> [SKIP][4] ([i915#4555]) +3 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_selftest@live@execlists:
- fi-bsw-kefka:   [PASS][5] -> [INCOMPLETE][6] ([i915#2940])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2:  NOTRUN -> [SKIP][7] ([fdo#111827]) +8 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2:  NOTRUN -> [SKIP][8] ([fdo#109278]) +2 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2:  NOTRUN -> [SKIP][9] ([fdo#109285])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-icl-u2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@prime_vgem@basic-userptr:
- fi-icl-u2:  NOTRUN -> [SKIP][10] ([i915#3301])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-icl-u2/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-bsw-kefka:   NOTRUN -> [FAIL][11] ([fdo#109271] / [i915#1436] / 
[i915#3428] / [i915#4312])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-bsw-kefka/igt@run...@aborted.html

  
 Possible fixes 

  * igt@i915_selftest@live@execlists:
- fi-bsw-nick:[INCOMPLETE][12] ([i915#2940]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10916/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21659/fi-bsw-nick/igt@i915_selftest@l...@execlists.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4555]: https://gitlab.freedesktop.org/drm/intel/issues/4555


Build changes
-

  * Linux: CI_DRM_10916 -> Patchwork_21659

  CI-20190529: 20190529
  CI_DRM_10916: 876217519d26774d843128cc66640ae501a5c38d @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6286: cdcbf81f734fdb1d102e84490e49e9fec23760cd @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21659: 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/ttm: Async migration (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Async migration (rev8)
URL   : https://patchwork.freedesktop.org/series/96798/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Tile 4 plane format support

[Nanley Chery]

Hi Stanislav,

Are there IGT tests for this modifier?

On Mon, Nov 22, 2021 at 4:14 PM Stanislav Lisovskiy
 wrote:
>
> TileF(Tile4 in bspec) format is 4K tile organized into
> 64B subtiles with same basic shape as for legacy TileY
> which will be supported by Display13.
>
> v2: - Fixed wrong case condition(Jani Nikula)
> - Increased I915_FORMAT_MOD_F_TILED up to 12(Imre Deak)
>
> v3: - s/I915_TILING_F/TILING_4/g
> - s/I915_FORMAT_MOD_F_TILED/I915_FORMAT_MOD_4_TILED/g
> - Removed unneeded fencing code
>
> v4: - Rebased, fixed merge conflict with new table-oriented
>   format modifier checking(Stan)
> - Replaced the rest of "Tile F" mentions to "Tile 4"(Stan)
>
> v5: - Still had to remove some Tile F mentionings
> - Moved has_4tile from adlp to DG2(Ramalingam C)
> - Check specifically for DG2, but not the Display13(Imre)
>
> v6: - Moved Tile4 assocating struct for modifier/display to
>   the beginning(Imre Deak)
> - Removed unneeded case I915_FORMAT_MOD_4_TILED modifier
>   checks(Imre Deak)
> - Fixed I915_FORMAT_MOD_4_TILED to be 9 instead of 12
>   (Imre Deak)
>
> v7: - Fixed display_ver to { 13, 13 }(Imre Deak)
> - Removed redundant newline(Imre Deak)
>
> Reviewed-by: Imre Deak 
> Cc: Imre Deak 
> Cc: Matt Roper 
> Cc: Maarten Lankhorst 
> Signed-off-by: Stanislav Lisovskiy 
> Signed-off-by: Matt Roper 
> Signed-off-by: Juha-Pekka Heikkilä 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c  |  1 +
>  drivers/gpu/drm/i915/display/intel_fb.c   |  9 +
>  drivers/gpu/drm/i915/display/intel_fbc.c  |  1 +
>  .../drm/i915/display/intel_plane_initial.c|  1 +
>  .../drm/i915/display/skl_universal_plane.c| 20 +++
>  drivers/gpu/drm/i915/i915_drv.h   |  1 +
>  drivers/gpu/drm/i915/i915_pci.c   |  1 +
>  drivers/gpu/drm/i915/i915_reg.h   |  1 +
>  drivers/gpu/drm/i915/intel_device_info.h  |  1 +
>  drivers/gpu/drm/i915/intel_pm.c   |  1 +
>  include/uapi/drm/drm_fourcc.h |  8 
>  11 files changed, 37 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index f3c9208a30b1..7429965d3682 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7766,6 +7766,7 @@ static int intel_atomic_check_async(struct 
> intel_atomic_state *state, struct int
> case I915_FORMAT_MOD_X_TILED:
> case I915_FORMAT_MOD_Y_TILED:
> case I915_FORMAT_MOD_Yf_TILED:
> +   case I915_FORMAT_MOD_4_TILED:
> break;
> default:
> drm_dbg_kms(>drm,
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index c4a743d0913f..b7f1ef62072c 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -139,6 +139,9 @@ struct intel_modifier_desc {
>
>  static const struct intel_modifier_desc intel_modifiers[] = {
> {
> +   .modifier = I915_FORMAT_MOD_4_TILED,
> +   .display_ver = { 13, 13 },

I see that every other modifier has the plane_cap field set. Why is it
okay for it to be zero here?

> +   }, {
> .modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,
> .display_ver = { 12, 13 },
> .plane_caps = INTEL_PLANE_CAP_TILING_Y | 
> INTEL_PLANE_CAP_CCS_MC,
> @@ -544,6 +547,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, 
> int color_plane)
> return 128;
> else
> return 512;
> +   case I915_FORMAT_MOD_4_TILED:
> +   /*
> +* Each 4K tile consists of 64B(8*8) subtiles, with
> +* same shape as Y Tile(i.e 4*16B OWords)
> +*/
> +   return 128;
> case I915_FORMAT_MOD_Y_TILED_CCS:
> if (intel_fb_is_ccs_aux_plane(fb, color_plane))
> return 128;
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index d0c34bc3af6c..0ceabe40d8c9 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -898,6 +898,7 @@ static bool tiling_is_valid(struct drm_i915_private *i915,
> case I915_FORMAT_MOD_Y_TILED:
> case I915_FORMAT_MOD_Yf_TILED:
> return DISPLAY_VER(i915) >= 9;
> +   case I915_FORMAT_MOD_4_TILED:

The tile Y cases above check the display version. Should we do the same here?

> case I915_FORMAT_MOD_X_TILED:
> return true;
> default:
> diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c 
> b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> index dcd698a02da2..d80855ee9b96 100644
> --- 

[Intel-gfx] [PATCH v3 2/2] drm/i915: Use to_root_gt() to refer to the root tile

[Andi Shyti]

Starting from a patch from Matt to_root_gt() returns the
reference to the root tile in order to abstract the root tile
from th callers.

Being the root tile identified as tile '0', embed the id in the
name so that i915->gt becomes i915->gt0.

The renaming has been mostly done with the following command and
some manual fixes.

sed -i -e sed -i 's/\\->gt\./\_root_gt(i915)\->/g' \
-e sed -i 's/\_priv\->gt\./\_root_gt(dev_priv)\->/g' \
-e 's/\_priv\->gt/to_root_gt(dev_priv)/g' \
-e 's/\\->gt/to_root_gt(i915)/g' \
-e 's/dev_priv\->gt\./to_root_gt(dev_priv)\->/g' \
-e 's/i915\->gt\./to_root_gt(i915)\->/g' \
`find drivers/gpu/drm/i915/ -name *.[ch]`

Two small changes have been added to this commit:

 1. intel_reset_gpu() in intel_display.c retreives the gt from
to_scanout_gt()
 2. in set_scheduler_caps() the gt is taken from the engine and
not from i915.

Signed-off-by: Matt Roper 
Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Lucas De Marchi 
Cc: Rodrigo Vivi 
Cc: Tvrtko Ursulin 
---
 .../gpu/drm/i915/display/intel_atomic_plane.c |  4 +-
 drivers/gpu/drm/i915/display/intel_display.c  | 23 +---
 drivers/gpu/drm/i915/display/intel_dpt.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_overlay.c  |  2 +-
 .../drm/i915/display/skl_universal_plane.c|  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 22 
 drivers/gpu/drm/i915/gem/i915_gem_create.c|  2 +-
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  4 +-
 drivers/gpu/drm/i915/gem/i915_gem_mman.c  |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_phys.c  |  6 +-
 drivers/gpu/drm/i915/gem/i915_gem_pm.c|  6 +-
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_throttle.c  |  3 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c  | 12 ++--
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c   |  2 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |  4 +-
 .../i915/gem/selftests/i915_gem_client_blt.c  |  2 +-
 .../drm/i915/gem/selftests/i915_gem_context.c | 10 ++--
 .../drm/i915/gem/selftests/i915_gem_migrate.c |  2 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c| 28 +-
 drivers/gpu/drm/i915/gt/intel_engine_user.c   |  2 +-
 drivers/gpu/drm/i915/gt/intel_ggtt.c  |  2 +-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 12 ++--
 drivers/gpu/drm/i915/gt/intel_workarounds.c   |  3 +-
 drivers/gpu/drm/i915/gt/mock_engine.c | 10 ++--
 drivers/gpu/drm/i915/gt/selftest_context.c|  2 +-
 drivers/gpu/drm/i915/gt/selftest_engine.c |  2 +-
 drivers/gpu/drm/i915/gt/selftest_engine_cs.c  |  4 +-
 .../drm/i915/gt/selftest_engine_heartbeat.c   |  4 +-
 drivers/gpu/drm/i915/gt/selftest_execlists.c  |  6 +-
 drivers/gpu/drm/i915/gt/selftest_gt_pm.c  |  8 +--
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c  |  2 +-
 drivers/gpu/drm/i915/gt/selftest_lrc.c|  2 +-
 drivers/gpu/drm/i915/gt/selftest_migrate.c|  4 +-
 drivers/gpu/drm/i915/gt/selftest_mocs.c   |  2 +-
 drivers/gpu/drm/i915/gt/selftest_reset.c  |  2 +-
 .../drm/i915/gt/selftest_ring_submission.c|  4 +-
 drivers/gpu/drm/i915/gt/selftest_slpc.c   |  6 +-
 drivers/gpu/drm/i915/gt/selftest_timeline.c   |  6 +-
 .../gpu/drm/i915/gt/selftest_workarounds.c|  4 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c   |  2 +-
 drivers/gpu/drm/i915/gt/uc/selftest_guc.c |  2 +-
 .../drm/i915/gt/uc/selftest_guc_multi_lrc.c   |  2 +-
 drivers/gpu/drm/i915/gvt/gvt.c|  2 +-
 drivers/gpu/drm/i915/gvt/scheduler.c  |  2 +-
 drivers/gpu/drm/i915/i915_debugfs.c   | 38 ++---
 drivers/gpu/drm/i915/i915_debugfs_params.c|  4 +-
 drivers/gpu/drm/i915/i915_driver.c| 30 +-
 drivers/gpu/drm/i915/i915_drv.h   |  9 ++-
 drivers/gpu/drm/i915/i915_gem.c   | 16 +++---
 drivers/gpu/drm/i915/i915_getparam.c  | 10 ++--
 drivers/gpu/drm/i915/i915_gpu_error.c |  4 +-
 drivers/gpu/drm/i915/i915_irq.c   | 56 +--
 drivers/gpu/drm/i915/i915_perf.c  |  2 +-
 drivers/gpu/drm/i915/i915_pmu.c   | 14 ++---
 drivers/gpu/drm/i915/i915_query.c |  2 +-
 drivers/gpu/drm/i915/i915_sysfs.c | 22 
 drivers/gpu/drm/i915/intel_gvt.c  |  2 +-
 drivers/gpu/drm/i915/intel_wopcm.c|  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c  |  6 +-
 drivers/gpu/drm/i915/selftests/i915_active.c  |  2 +-
 drivers/gpu/drm/i915/selftests/i915_gem.c |  2 +-
 .../gpu/drm/i915/selftests/i915_gem_evict.c   |  6 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  4 +-
 drivers/gpu/drm/i915/selftests/i915_perf.c|  2 +-
 drivers/gpu/drm/i915/selftests/i915_request.c | 10 ++--
 .../gpu/drm/i915/selftests/i915_selftest.c|  4 +-
 .../gpu/drm/i915/selftests/igt_flush_test.c   |  2 +-
 .../gpu/drm/i915/selftests/igt_live_test.c|  4 +-
 .../drm/i915/selftests/intel_memory_region.c  

[Intel-gfx] [PATCH v3 1/2] drm/i915: Store backpointer to GT in uncore

[Andi Shyti]

From: Michał Winiarski 

We now support a per-gt uncore, yet we're not able to infer which GT
we're operating upon.  Let's store a backpointer for now.

Signed-off-by: Michał Winiarski 
Signed-off-by: Matt Roper 
Reviewed-by: Andi Shyti 
Signed-off-by: Andi Shyti 
---
 drivers/gpu/drm/i915/i915_driver.c   | 2 +-
 drivers/gpu/drm/i915/intel_uncore.c  | 9 +
 drivers/gpu/drm/i915/intel_uncore.h  | 3 ++-
 drivers/gpu/drm/i915/selftests/mock_gem_device.c | 3 +--
 drivers/gpu/drm/i915/selftests/mock_uncore.c | 2 +-
 5 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index a1327dad4..26e90e55d8ca9 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -316,7 +316,7 @@ static int i915_driver_early_probe(struct drm_i915_private 
*dev_priv)
intel_step_init(dev_priv);
 
intel_uncore_mmio_debug_init_early(_priv->mmio_debug);
-   intel_uncore_init_early(_priv->uncore, dev_priv);
+   intel_uncore_init_early(_priv->uncore, _priv->gt);
 
spin_lock_init(_priv->irq_lock);
spin_lock_init(_priv->gpu_error.lock);
diff --git a/drivers/gpu/drm/i915/intel_uncore.c 
b/drivers/gpu/drm/i915/intel_uncore.c
index abdac78d39766..fc25ebf1a593e 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -2061,12 +2061,13 @@ void intel_uncore_cleanup_mmio(struct intel_uncore 
*uncore)
 }
 
 void intel_uncore_init_early(struct intel_uncore *uncore,
-struct drm_i915_private *i915)
+struct intel_gt *gt)
 {
spin_lock_init(>lock);
-   uncore->i915 = i915;
-   uncore->rpm = >runtime_pm;
-   uncore->debug = >mmio_debug;
+   uncore->i915 = gt->i915;
+   uncore->gt = gt;
+   uncore->rpm = >i915->runtime_pm;
+   uncore->debug = >i915->mmio_debug;
 }
 
 static void uncore_raw_init(struct intel_uncore *uncore)
diff --git a/drivers/gpu/drm/i915/intel_uncore.h 
b/drivers/gpu/drm/i915/intel_uncore.h
index d1d17b04e29fc..210fe2a716129 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -129,6 +129,7 @@ struct intel_uncore {
void __iomem *regs;
 
struct drm_i915_private *i915;
+   struct intel_gt *gt;
struct intel_runtime_pm *rpm;
 
spinlock_t lock; /** lock is also taken in irq contexts. */
@@ -217,7 +218,7 @@ u32 intel_uncore_read_with_mcr_steering(struct intel_uncore 
*uncore,
 void
 intel_uncore_mmio_debug_init_early(struct intel_uncore_mmio_debug *mmio_debug);
 void intel_uncore_init_early(struct intel_uncore *uncore,
-struct drm_i915_private *i915);
+struct intel_gt *gt);
 int intel_uncore_setup_mmio(struct intel_uncore *uncore);
 int intel_uncore_init_mmio(struct intel_uncore *uncore);
 void intel_uncore_prune_engine_fw_domains(struct intel_uncore *uncore,
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c 
b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index d0e2e61de8d41..cdbeac375240c 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -175,12 +175,11 @@ struct drm_i915_private *mock_gem_device(void)
mkwrite_device_info(i915)->memory_regions = REGION_SMEM;
intel_memory_regions_hw_probe(i915);
 
-   mock_uncore_init(>uncore, i915);
-
spin_lock_init(>gpu_error.lock);
 
i915_gem_init__mm(i915);
intel_gt_init_early(>gt, i915);
+   mock_uncore_init(>uncore, i915);
atomic_inc(>gt.wakeref.count); /* disable; no hw support */
i915->gt.awake = -ENODEV;
 
diff --git a/drivers/gpu/drm/i915/selftests/mock_uncore.c 
b/drivers/gpu/drm/i915/selftests/mock_uncore.c
index ca57e4008701d..b3790ef137e41 100644
--- a/drivers/gpu/drm/i915/selftests/mock_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/mock_uncore.c
@@ -42,7 +42,7 @@ __nop_read(64)
 void mock_uncore_init(struct intel_uncore *uncore,
  struct drm_i915_private *i915)
 {
-   intel_uncore_init_early(uncore, i915);
+   intel_uncore_init_early(uncore, >gt);
 
ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, nop);
ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, nop);
-- 
2.33.1

[Intel-gfx] [PATCH v3 0/2] More preparation for multi gt patches

[Andi Shyti]

Hi,

the first of the two patches concludes the first stage of
refactoring which makes the use of intel_gt on the different
subsystem. It's taken from Matt's series and it has alread been
reviewed. The patch has just been replaced before any multitile
patches and I think it can be already pushed.

The second patch is on more step to prepare for the coming multi
tile. It's very invasive but it's an effort that can be paid once
and for all in order to have a cleaner way to refer to GTs.

Andi

Changelog:
==
v2 -> v3: https://patchwork.freedesktop.org/series/97020/
 - sed -i ... took too much freedom and changed more than it was
   supposed to.
 - fix a compile error which did not appear in my local build

v1 -> v2: https://patchwork.freedesktop.org/series/97020/
 - patch 2: do not use anymore the reference i915->gt but use
   to_root_gt(), coming from Matt Roper's patch.
 - fix some comments from Chris.


Andi Shyti (1):
  drm/i915: Use to_root_gt() to refer to the root tile

Michał Winiarski (1):
  drm/i915: Store backpointer to GT in uncore

 .../gpu/drm/i915/display/intel_atomic_plane.c |  4 +-
 drivers/gpu/drm/i915/display/intel_display.c  | 23 +---
 drivers/gpu/drm/i915/display/intel_dpt.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_overlay.c  |  2 +-
 .../drm/i915/display/skl_universal_plane.c|  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 22 
 drivers/gpu/drm/i915/gem/i915_gem_create.c|  2 +-
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  4 +-
 drivers/gpu/drm/i915/gem/i915_gem_mman.c  |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_phys.c  |  6 +-
 drivers/gpu/drm/i915/gem/i915_gem_pm.c|  6 +-
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_throttle.c  |  3 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c  | 12 ++--
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c   |  2 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |  4 +-
 .../i915/gem/selftests/i915_gem_client_blt.c  |  2 +-
 .../drm/i915/gem/selftests/i915_gem_context.c | 10 ++--
 .../drm/i915/gem/selftests/i915_gem_migrate.c |  2 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c| 28 +-
 drivers/gpu/drm/i915/gt/intel_engine_user.c   |  2 +-
 drivers/gpu/drm/i915/gt/intel_ggtt.c  |  2 +-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 12 ++--
 drivers/gpu/drm/i915/gt/intel_workarounds.c   |  3 +-
 drivers/gpu/drm/i915/gt/mock_engine.c | 10 ++--
 drivers/gpu/drm/i915/gt/selftest_context.c|  2 +-
 drivers/gpu/drm/i915/gt/selftest_engine.c |  2 +-
 drivers/gpu/drm/i915/gt/selftest_engine_cs.c  |  4 +-
 .../drm/i915/gt/selftest_engine_heartbeat.c   |  4 +-
 drivers/gpu/drm/i915/gt/selftest_execlists.c  |  6 +-
 drivers/gpu/drm/i915/gt/selftest_gt_pm.c  |  8 +--
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c  |  2 +-
 drivers/gpu/drm/i915/gt/selftest_lrc.c|  2 +-
 drivers/gpu/drm/i915/gt/selftest_migrate.c|  4 +-
 drivers/gpu/drm/i915/gt/selftest_mocs.c   |  2 +-
 drivers/gpu/drm/i915/gt/selftest_reset.c  |  2 +-
 .../drm/i915/gt/selftest_ring_submission.c|  4 +-
 drivers/gpu/drm/i915/gt/selftest_slpc.c   |  6 +-
 drivers/gpu/drm/i915/gt/selftest_timeline.c   |  6 +-
 .../gpu/drm/i915/gt/selftest_workarounds.c|  4 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c   |  2 +-
 drivers/gpu/drm/i915/gt/uc/selftest_guc.c |  2 +-
 .../drm/i915/gt/uc/selftest_guc_multi_lrc.c   |  2 +-
 drivers/gpu/drm/i915/gvt/gvt.c|  2 +-
 drivers/gpu/drm/i915/gvt/scheduler.c  |  2 +-
 drivers/gpu/drm/i915/i915_debugfs.c   | 38 ++---
 drivers/gpu/drm/i915/i915_debugfs_params.c|  4 +-
 drivers/gpu/drm/i915/i915_driver.c| 30 +-
 drivers/gpu/drm/i915/i915_drv.h   |  9 ++-
 drivers/gpu/drm/i915/i915_gem.c   | 16 +++---
 drivers/gpu/drm/i915/i915_getparam.c  | 10 ++--
 drivers/gpu/drm/i915/i915_gpu_error.c |  4 +-
 drivers/gpu/drm/i915/i915_irq.c   | 56 +--
 drivers/gpu/drm/i915/i915_perf.c  |  2 +-
 drivers/gpu/drm/i915/i915_pmu.c   | 14 ++---
 drivers/gpu/drm/i915/i915_query.c |  2 +-
 drivers/gpu/drm/i915/i915_sysfs.c | 22 
 drivers/gpu/drm/i915/intel_gvt.c  |  2 +-
 drivers/gpu/drm/i915/intel_uncore.c   |  9 +--
 drivers/gpu/drm/i915/intel_uncore.h   |  3 +-
 drivers/gpu/drm/i915/intel_wopcm.c|  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c  |  6 +-
 drivers/gpu/drm/i915/selftests/i915_active.c  |  2 +-
 drivers/gpu/drm/i915/selftests/i915_gem.c |  2 +-
 .../gpu/drm/i915/selftests/i915_gem_evict.c   |  6 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  4 +-
 drivers/gpu/drm/i915/selftests/i915_perf.c|  2 +-
 drivers/gpu/drm/i915/selftests/i915_request.c | 10 ++--
 .../gpu/drm/i915/selftests/i915_selftest.c|  4 +-
 .../gpu/drm/i915/selftests/igt_flush_test.c   |  2 

[Intel-gfx] [PATCH v7 5/6] drm/i915/ttm: Implement asynchronous TTM moves

[Thomas Hellström]

Don't wait sync while migrating, but rather make the GPU blit await the
dependencies and add a moving fence to the object.

This also enables asynchronous VRAM management in that on eviction,
rather than waiting for the moving fence to expire before freeing VRAM,
it is freed immediately and the fence is stored with the VRAM manager and
handed out to newly allocated objects to await before clears and swapins,
or for kernel objects before setting up gpu vmas or mapping.

To collect dependencies before migrating, add a set of utilities that
coalesce these to a single dma_fence.

What is still missing for fully asynchronous operation is asynchronous vma
unbinding, which is still to be implemented.

This commit substantially reduces execution time in the gem_lmem_swapping
test.

v2:
- Make a couple of functions static.
v4:
- Fix some style issues (Matthew Auld)
- Audit and add more checks for ghost objects (Matthew Auld)
- Add more documentation for the i915_deps utility (Mattew Auld)
- Simplify the i915_deps_sync() function
v6:
- Re-check for fence signaled before returning -EBUSY (Matthew Auld)
- Use dma_resv_iter_is_exclusive() (Matthew Auld)
- Await all dma-resv fences before a migration blit (Matthew Auld)

Signed-off-by: Thomas Hellström 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c  |  32 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm.h  |   2 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 342 +--
 drivers/gpu/drm/i915/gem/i915_gem_wait.c |   4 +-
 4 files changed, 348 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 4c3cae696cf0..218a9b3037c7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -248,10 +248,13 @@ static struct ttm_tt *i915_ttm_tt_create(struct 
ttm_buffer_object *bo,
struct ttm_resource_manager *man =
ttm_manager_type(bo->bdev, bo->resource->mem_type);
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
-   enum ttm_caching caching = i915_ttm_select_tt_caching(obj);
+   enum ttm_caching caching;
struct i915_ttm_tt *i915_tt;
int ret;
 
+   if (!obj)
+   return NULL;
+
i915_tt = kzalloc(sizeof(*i915_tt), GFP_KERNEL);
if (!i915_tt)
return NULL;
@@ -260,6 +263,7 @@ static struct ttm_tt *i915_ttm_tt_create(struct 
ttm_buffer_object *bo,
man->use_tt)
page_flags |= TTM_TT_FLAG_ZERO_ALLOC;
 
+   caching = i915_ttm_select_tt_caching(obj);
if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached) {
page_flags |= TTM_TT_FLAG_EXTERNAL |
  TTM_TT_FLAG_EXTERNAL_MAPPABLE;
@@ -326,6 +330,9 @@ static bool i915_ttm_eviction_valuable(struct 
ttm_buffer_object *bo,
 {
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
 
+   if (!obj)
+   return false;
+
/*
 * EXTERNAL objects should never be swapped out by TTM, instead we need
 * to handle that ourselves. TTM will already skip such objects for us,
@@ -552,8 +559,12 @@ i915_ttm_resource_get_st(struct drm_i915_gem_object *obj,
 static void i915_ttm_swap_notify(struct ttm_buffer_object *bo)
 {
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
-   int ret = i915_ttm_move_notify(bo);
+   int ret;
+
+   if (!obj)
+   return;
 
+   ret = i915_ttm_move_notify(bo);
GEM_WARN_ON(ret);
GEM_WARN_ON(obj->ttm.cached_io_rsgt);
if (!ret && obj->mm.madv != I915_MADV_WILLNEED)
@@ -575,17 +586,23 @@ static unsigned long i915_ttm_io_mem_pfn(struct 
ttm_buffer_object *bo,
 unsigned long page_offset)
 {
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
-   unsigned long base = obj->mm.region->iomap.base - 
obj->mm.region->region.start;
struct scatterlist *sg;
+   unsigned long base;
unsigned int ofs;
 
+   GEM_BUG_ON(!obj);
GEM_WARN_ON(bo->ttm);
 
+   base = obj->mm.region->iomap.base - obj->mm.region->region.start;
sg = __i915_gem_object_get_sg(obj, >ttm.get_io_page, page_offset, 
, true);
 
return ((base + sg_dma_address(sg)) >> PAGE_SHIFT) + ofs;
 }
 
+/*
+ * All callbacks need to take care not to downcast a struct ttm_buffer_object
+ * without checking its subclass, since it might be a TTM ghost object.
+ */
 static struct ttm_device_funcs i915_ttm_bo_driver = {
.ttm_tt_create = i915_ttm_tt_create,
.ttm_tt_populate = i915_ttm_tt_populate,
@@ -847,13 +864,16 @@ static void i915_ttm_delayed_free(struct 
drm_i915_gem_object *obj)
 static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
 {
struct vm_area_struct *area = vmf->vma;
-   struct drm_i915_gem_object *obj =
-   i915_ttm_to_gem(area->vm_private_data);
-   struct ttm_buffer_object 

[Intel-gfx] [PATCH v7 6/6] drm/i915/ttm: Update i915_gem_obj_copy_ttm() to be asynchronous

[Thomas Hellström]

Update the copy function i915_gem_obj_copy_ttm() to be asynchronous for
future users and update the only current user to sync the objects
as needed after this function.

Signed-off-by: Thomas Hellström 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 40 ++--
 drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c   |  2 +
 2 files changed, 30 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
index 43423d3976c3..80df9f592407 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
@@ -826,33 +826,49 @@ int i915_gem_obj_copy_ttm(struct drm_i915_gem_object *dst,
.interruptible = intr,
};
struct i915_refct_sgt *dst_rsgt;
-   struct dma_fence *copy_fence;
-   int ret;
+   struct dma_fence *copy_fence, *dep_fence;
+   struct i915_deps deps;
+   int ret, shared_err;
 
assert_object_held(dst);
assert_object_held(src);
+   i915_deps_init(, GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN);
 
/*
-* Sync for now. This will change with async moves.
+* We plan to add a shared fence only for the source. If that
+* fails, we await all source fences before commencing
+* the copy instead of only the exclusive.
 */
-   ret = ttm_bo_wait_ctx(dst_bo, );
+   shared_err = dma_resv_reserve_shared(src_bo->base.resv, 1);
+   ret = i915_deps_add_resv(, dst_bo->base.resv, true, false, );
if (!ret)
-   ret = ttm_bo_wait_ctx(src_bo, );
+   ret = i915_deps_add_resv(, src_bo->base.resv,
+!!shared_err, false, );
if (ret)
return ret;
 
+   dep_fence = i915_deps_to_fence(, );
+   if (IS_ERR(dep_fence))
+   return PTR_ERR(dep_fence);
+
dst_rsgt = i915_ttm_resource_get_st(dst, dst_bo->resource);
copy_fence = __i915_ttm_move(src_bo, false, dst_bo->resource,
-dst_bo->ttm, dst_rsgt, allow_accel, NULL);
+dst_bo->ttm, dst_rsgt, allow_accel,
+dep_fence);
 
i915_refct_sgt_put(dst_rsgt);
-   if (IS_ERR(copy_fence))
-   return PTR_ERR(copy_fence);
+   if (IS_ERR_OR_NULL(copy_fence))
+   return PTR_ERR_OR_ZERO(copy_fence);
 
-   if (copy_fence) {
-   dma_fence_wait(copy_fence, false);
-   dma_fence_put(copy_fence);
-   }
+   dma_resv_add_excl_fence(dst_bo->base.resv, copy_fence);
+
+   /* If we failed to reserve a shared slot, add an exclusive fence */
+   if (shared_err)
+   dma_resv_add_excl_fence(src_bo->base.resv, copy_fence);
+   else
+   dma_resv_add_shared_fence(src_bo->base.resv, copy_fence);
+
+   dma_fence_put(copy_fence);
 
return 0;
 }
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c
index 60d10ab55d1e..9aad84059d56 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c
@@ -80,6 +80,7 @@ static int i915_ttm_backup(struct i915_gem_apply_to_region 
*apply,
 
err = i915_gem_obj_copy_ttm(backup, obj, pm_apply->allow_gpu, false);
GEM_WARN_ON(err);
+   ttm_bo_wait_ctx(backup_bo, );
 
obj->ttm.backup = backup;
return 0;
@@ -170,6 +171,7 @@ static int i915_ttm_restore(struct i915_gem_apply_to_region 
*apply,
err = i915_gem_obj_copy_ttm(obj, backup, pm_apply->allow_gpu,
false);
GEM_WARN_ON(err);
+   ttm_bo_wait_ctx(backup_bo, );
 
obj->ttm.backup = NULL;
err = 0;
-- 
2.31.1

[Intel-gfx] [PATCH v7 4/6] drm/i915/ttm: Correctly handle waiting for gpu when shrinking

[Thomas Hellström]

With async migration, the shrinker may end up wanting to release the
pages of an object while the migration blit is still running, since
the GT migration code doesn't set up VMAs and the shrinker is thus
oblivious to the fact that the GPU is still using the pages.

Add waiting for gpu in the shrinker_release_pages() op and an
argument to that function indicating whether the shrinker expects it
to not wait for gpu. In the latter case the shrinker_release_pages()
op will return -EBUSY if the object is not idle.

Signed-off-by: Thomas Hellström 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 1 +
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c  | 7 ++-
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 604ed5ad77f5..f9f7e44099fe 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -59,6 +59,7 @@ struct drm_i915_gem_object_ops {
int (*truncate)(struct drm_i915_gem_object *obj);
void (*writeback)(struct drm_i915_gem_object *obj);
int (*shrinker_release_pages)(struct drm_i915_gem_object *obj,
+ bool no_gpu_wait,
  bool should_writeback);
 
int (*pread)(struct drm_i915_gem_object *obj,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index dde0a5c232f8..8b4b5f3a432a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -60,6 +60,7 @@ static int try_to_writeback(struct drm_i915_gem_object *obj, 
unsigned int flags)
 {
if (obj->ops->shrinker_release_pages)
return obj->ops->shrinker_release_pages(obj,
+   !(flags & 
I915_SHRINK_ACTIVE),
flags & 
I915_SHRINK_WRITEBACK);
 
switch (obj->mm.madv) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 6d3d2a558d0f..4c3cae696cf0 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -418,6 +418,7 @@ int i915_ttm_purge(struct drm_i915_gem_object *obj)
 }
 
 static int i915_ttm_shrinker_release_pages(struct drm_i915_gem_object *obj,
+  bool no_wait_gpu,
   bool should_writeback)
 {
struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
@@ -425,7 +426,7 @@ static int i915_ttm_shrinker_release_pages(struct 
drm_i915_gem_object *obj,
container_of(bo->ttm, typeof(*i915_tt), ttm);
struct ttm_operation_ctx ctx = {
.interruptible = true,
-   .no_wait_gpu = false,
+   .no_wait_gpu = no_wait_gpu,
};
struct ttm_placement place = {};
int ret;
@@ -438,6 +439,10 @@ static int i915_ttm_shrinker_release_pages(struct 
drm_i915_gem_object *obj,
if (!i915_tt->filp)
return 0;
 
+   ret = ttm_bo_wait_ctx(bo, );
+   if (ret)
+   return ret;
+
switch (obj->mm.madv) {
case I915_MADV_DONTNEED:
return i915_ttm_purge(obj);
-- 
2.31.1

[Intel-gfx] [PATCH v7 2/6] drm/i915/ttm: Move the i915_gem_obj_copy_ttm() function

[Thomas Hellström]

Move the i915_gem_obj_copy_ttm() function to i915_gem_ttm_move.h.
This will help keep a number of functions static when introducing
async moves.

Signed-off-by: Thomas Hellström 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c  | 47 ---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.h  |  4 --
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 63 
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.h | 10 ++--
 drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c   |  1 +
 5 files changed, 56 insertions(+), 69 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 02918b990b25..e9e78ac8f592 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -1063,50 +1063,3 @@ i915_gem_ttm_system_setup(struct drm_i915_private *i915,
intel_memory_region_set_name(mr, "system-ttm");
return mr;
 }
-
-/**
- * i915_gem_obj_copy_ttm - Copy the contents of one ttm-based gem object to
- * another
- * @dst: The destination object
- * @src: The source object
- * @allow_accel: Allow using the blitter. Otherwise TTM memcpy is used.
- * @intr: Whether to perform waits interruptible:
- *
- * Note: The caller is responsible for assuring that the underlying
- * TTM objects are populated if needed and locked.
- *
- * Return: Zero on success. Negative error code on error. If @intr == true,
- * then it may return -ERESTARTSYS or -EINTR.
- */
-int i915_gem_obj_copy_ttm(struct drm_i915_gem_object *dst,
- struct drm_i915_gem_object *src,
- bool allow_accel, bool intr)
-{
-   struct ttm_buffer_object *dst_bo = i915_gem_to_ttm(dst);
-   struct ttm_buffer_object *src_bo = i915_gem_to_ttm(src);
-   struct ttm_operation_ctx ctx = {
-   .interruptible = intr,
-   };
-   struct i915_refct_sgt *dst_rsgt;
-   int ret;
-
-   assert_object_held(dst);
-   assert_object_held(src);
-
-   /*
-* Sync for now. This will change with async moves.
-*/
-   ret = ttm_bo_wait_ctx(dst_bo, );
-   if (!ret)
-   ret = ttm_bo_wait_ctx(src_bo, );
-   if (ret)
-   return ret;
-
-   dst_rsgt = i915_ttm_resource_get_st(dst, dst_bo->resource);
-   __i915_ttm_move(src_bo, false, dst_bo->resource, dst_bo->ttm,
-   dst_rsgt, allow_accel);
-
-   i915_refct_sgt_put(dst_rsgt);
-
-   return 0;
-}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.h 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.h
index 074a7c08ff31..82cdabb542be 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.h
@@ -49,10 +49,6 @@ int __i915_gem_ttm_object_init(struct intel_memory_region 
*mem,
   resource_size_t page_size,
   unsigned int flags);
 
-int i915_gem_obj_copy_ttm(struct drm_i915_gem_object *dst,
- struct drm_i915_gem_object *src,
- bool allow_accel, bool intr);
-
 /* Internal I915 TTM declarations and definitions below. */
 
 #define I915_PL_LMEM0 TTM_PL_PRIV
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
index ef22d4ed66ad..f35b386c56ca 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
@@ -378,18 +378,10 @@ i915_ttm_memcpy_work_arm(struct i915_ttm_memcpy_work 
*work,
return >fence;
 }
 
-/**
- * __i915_ttm_move - helper to perform TTM moves or clears.
- * @bo: The source buffer object.
- * @clear: Whether this is a clear operation.
- * @dst_mem: The destination ttm resource.
- * @dst_ttm: The destination ttm page vector.
- * @dst_rsgt: The destination refcounted sg-list.
- * @allow_accel: Whether to allow acceleration.
- */
-void __i915_ttm_move(struct ttm_buffer_object *bo, bool clear,
-struct ttm_resource *dst_mem, struct ttm_tt *dst_ttm,
-struct i915_refct_sgt *dst_rsgt, bool allow_accel)
+static void __i915_ttm_move(struct ttm_buffer_object *bo, bool clear,
+   struct ttm_resource *dst_mem,
+   struct ttm_tt *dst_ttm,
+   struct i915_refct_sgt *dst_rsgt, bool allow_accel)
 {
struct i915_ttm_memcpy_work *copy_work = NULL;
struct i915_ttm_memcpy_arg _arg, *arg = &_arg;
@@ -521,3 +513,50 @@ int i915_ttm_move(struct ttm_buffer_object *bo, bool evict,
i915_ttm_adjust_gem_after_move(obj);
return 0;
 }
+
+/**
+ * i915_gem_obj_copy_ttm - Copy the contents of one ttm-based gem object to
+ * another
+ * @dst: The destination object
+ * @src: The source object
+ * @allow_accel: Allow using the blitter. Otherwise TTM memcpy is used.
+ * @intr: Whether to perform waits interruptible:
+ *
+ * Note: The caller is responsible for assuring that the underlying
+ * TTM 

[Intel-gfx] [PATCH v7 1/6] drm/i915: Add support for moving fence waiting

[Thomas Hellström]

From: Maarten Lankhorst 

For now, we will only allow async migration when TTM is used,
so the paths we care about are related to TTM.

The mmap path is handled by having the fence in ttm_bo->moving,
when pinning, the binding only becomes available after the moving
fence is signaled, and pinning a cpu map will only work after
the moving fence signals.

This should close all holes where userspace can read a buffer
before it's fully migrated.

v2:
- Fix a couple of SPARSE warnings
v3:
- Fix a NULL pointer dereference
v4:
- Ditch the moving fence waiting for i915_vma_pin_iomap() and
  replace with a verification that the vma is already bound.
  (Matthew Auld)
- Squash with a previous patch introducing moving fence waiting and
  accessing interfaces (Matthew Auld)
- Rename to indicated that we also add support for sync waiting.
v5:
- Fix check for NULL and unreferencing i915_vma_verify_bind_complete()
  (Matthew Auld)
- Fix compilation failure if !CONFIG_DRM_I915_DEBUG_GEM
- Fix include ordering. (Matthew Auld)
v7:
- Fix yet another compilation failure with clang if
  !CONFIG_DRM_I915_DEBUG_GEM

Co-developed-by: Thomas Hellström 
Signed-off-by: Thomas Hellström 
Signed-off-by: Maarten Lankhorst 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.c | 52 ++
 drivers/gpu/drm/i915/gem/i915_gem_object.h |  6 +++
 drivers/gpu/drm/i915/gem/i915_gem_pages.c  |  6 +++
 drivers/gpu/drm/i915/i915_vma.c| 43 +-
 4 files changed, 106 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 591ee3cb7275..24f83c432350 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -31,6 +31,7 @@
 #include "i915_gem_context.h"
 #include "i915_gem_mman.h"
 #include "i915_gem_object.h"
+#include "i915_gem_ttm.h"
 #include "i915_memcpy.h"
 #include "i915_trace.h"
 
@@ -726,6 +727,57 @@ static const struct drm_gem_object_funcs 
i915_gem_object_funcs = {
.export = i915_gem_prime_export,
 };
 
+/**
+ * i915_gem_object_get_moving_fence - Get the object's moving fence if any
+ * @obj: The object whose moving fence to get.
+ *
+ * A non-signaled moving fence means that there is an async operation
+ * pending on the object that needs to be waited on before setting up
+ * any GPU- or CPU PTEs to the object's pages.
+ *
+ * Return: A refcounted pointer to the object's moving fence if any,
+ * NULL otherwise.
+ */
+struct dma_fence *
+i915_gem_object_get_moving_fence(struct drm_i915_gem_object *obj)
+{
+   return dma_fence_get(i915_gem_to_ttm(obj)->moving);
+}
+
+/**
+ * i915_gem_object_wait_moving_fence - Wait for the object's moving fence if 
any
+ * @obj: The object whose moving fence to wait for.
+ * @intr: Whether to wait interruptible.
+ *
+ * If the moving fence signaled without an error, it is detached from the
+ * object and put.
+ *
+ * Return: 0 if successful, -ERESTARTSYS if the wait was interrupted,
+ * negative error code if the async operation represented by the
+ * moving fence failed.
+ */
+int i915_gem_object_wait_moving_fence(struct drm_i915_gem_object *obj,
+ bool intr)
+{
+   struct dma_fence *fence = i915_gem_to_ttm(obj)->moving;
+   int ret;
+
+   assert_object_held(obj);
+   if (!fence)
+   return 0;
+
+   ret = dma_fence_wait(fence, intr);
+   if (ret)
+   return ret;
+
+   if (fence->error)
+   return fence->error;
+
+   i915_gem_to_ttm(obj)->moving = NULL;
+   dma_fence_put(fence);
+   return 0;
+}
+
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 #include "selftests/huge_gem_object.c"
 #include "selftests/huge_pages.c"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 133963b46135..66f20b803b01 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -517,6 +517,12 @@ i915_gem_object_finish_access(struct drm_i915_gem_object 
*obj)
i915_gem_object_unpin_pages(obj);
 }
 
+struct dma_fence *
+i915_gem_object_get_moving_fence(struct drm_i915_gem_object *obj);
+
+int i915_gem_object_wait_moving_fence(struct drm_i915_gem_object *obj,
+ bool intr);
+
 void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object *obj,
 unsigned int cache_level);
 bool i915_gem_object_can_bypass_llc(struct drm_i915_gem_object *obj);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index c4f684b7cc51..49c6e55c68ce 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -418,6 +418,12 @@ void *i915_gem_object_pin_map(struct drm_i915_gem_object 
*obj,
}
 
if (!ptr) {
+   err = 

[Intel-gfx] [PATCH v7 3/6] drm/i915/ttm: Drop region reference counting

[Thomas Hellström]

There is an interesting refcounting loop:
struct intel_memory_region has a struct ttm_resource_manager,
ttm_resource_manager->move may hold a reference to i915_request,
i915_request may hold a reference to intel_context,
intel_context may hold a reference to drm_i915_gem_object,
drm_i915_gem_object may hold a reference to intel_memory_region.

Break this loop by dropping region reference counting.

In addition, Have regions with a manager moving fence make sure
that all region objects are released before freeing the region.

v6:
- Fix a code comment.

Signed-off-by: Thomas Hellström 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_region.c|  4 +--
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c |  3 +-
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c|  6 ++--
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c   |  3 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |  2 +-
 drivers/gpu/drm/i915/gt/intel_region_lmem.c   | 10 --
 drivers/gpu/drm/i915/intel_memory_region.c| 26 --
 drivers/gpu/drm/i915/intel_memory_region.h|  9 ++---
 drivers/gpu/drm/i915/intel_region_ttm.c   | 35 +--
 drivers/gpu/drm/i915/intel_region_ttm.h   |  2 +-
 .../drm/i915/selftests/intel_memory_region.c  |  8 ++---
 drivers/gpu/drm/i915/selftests/mock_region.c  |  7 ++--
 12 files changed, 69 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_region.c 
b/drivers/gpu/drm/i915/gem/i915_gem_region.c
index a016ccec36f3..a4350227e9ae 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_region.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_region.c
@@ -11,7 +11,7 @@
 void i915_gem_object_init_memory_region(struct drm_i915_gem_object *obj,
struct intel_memory_region *mem)
 {
-   obj->mm.region = intel_memory_region_get(mem);
+   obj->mm.region = mem;
 
mutex_lock(>objects.lock);
list_add(>mm.region_link, >objects.list);
@@ -25,8 +25,6 @@ void i915_gem_object_release_memory_region(struct 
drm_i915_gem_object *obj)
mutex_lock(>objects.lock);
list_del(>mm.region_link);
mutex_unlock(>objects.lock);
-
-   intel_memory_region_put(mem);
 }
 
 struct drm_i915_gem_object *
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 4a88c89b7a14..cc9fe258fba7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -664,9 +664,10 @@ static int init_shmem(struct intel_memory_region *mem)
return 0; /* Don't error, we can simply fallback to the kernel mnt */
 }
 
-static void release_shmem(struct intel_memory_region *mem)
+static int release_shmem(struct intel_memory_region *mem)
 {
i915_gemfs_fini(mem->i915);
+   return 0;
 }
 
 static const struct intel_memory_region_ops shmem_region_ops = {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index ddd37ccb1362..80680395bb3b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -720,9 +720,10 @@ static int init_stolen_smem(struct intel_memory_region 
*mem)
return i915_gem_init_stolen(mem);
 }
 
-static void release_stolen_smem(struct intel_memory_region *mem)
+static int release_stolen_smem(struct intel_memory_region *mem)
 {
i915_gem_cleanup_stolen(mem->i915);
+   return 0;
 }
 
 static const struct intel_memory_region_ops i915_region_stolen_smem_ops = {
@@ -759,10 +760,11 @@ static int init_stolen_lmem(struct intel_memory_region 
*mem)
return err;
 }
 
-static void release_stolen_lmem(struct intel_memory_region *mem)
+static int release_stolen_lmem(struct intel_memory_region *mem)
 {
io_mapping_fini(>iomap);
i915_gem_cleanup_stolen(mem->i915);
+   return 0;
 }
 
 static const struct intel_memory_region_ops i915_region_stolen_lmem_ops = {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index e9e78ac8f592..6d3d2a558d0f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -997,7 +997,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region 
*mem,
i915_gem_object_init(obj, _gem_ttm_obj_ops, _class, flags);
 
/* Don't put on a region list until we're either locked or fully 
initialized. */
-   obj->mm.region = intel_memory_region_get(mem);
+   obj->mm.region = mem;
INIT_LIST_HEAD(>mm.region_link);
 
INIT_RADIX_TREE(>ttm.get_io_page.radix, GFP_KERNEL | __GFP_NOWARN);
@@ -1044,6 +1044,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region 
*mem,
 
 static const struct intel_memory_region_ops ttm_system_region_ops = {
.init_object = __i915_gem_ttm_object_init,
+   .release = intel_region_ttm_fini,
 };
 
 struct intel_memory_region *
diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c 

[Intel-gfx] [PATCH v7 0/6] drm/i915/ttm: Async migration

[Thomas Hellström]

This patch series deals with async migration and async vram management.
It still leaves an important part out, which is async unbinding which
will reduce latency further, at least when trying to migrate already active
objects.

Patch 1/6 deals with accessing and waiting for the TTM moving
fence from i915 GEM.
Patch 2 is pure code reorganization, no functional change.
Patch 3 breaks a refcounting loop involving the TTM moving fence.
Patch 4 makes the i915 TTM shinking code handle async moves.
Patch 5 uses TTM to implement the ttm move() callback async, it also
introduces a utility to collect dependencies and turn them into a
single dma_fence, which is needed for the intel_migrate code.
This also affects the gem object migrate code.
Patch 6 makes the object copy utility async as well, mainly for future
users since the only current user, suspend backup and restore, typically
will want to sync anyway.

v2:
- Fix a couple of SPARSE warnings.
v3:
- Fix a NULL pointer dereference.
v4:
- Squash what was previously patch 1 and 2 to patch1
- Ditch the moving fence waiting in i915_vma_pin_iomap()
- Rework how the refcounting loop is broken in patch 3. Drop region
  reference counting.
- Break what is now patch 4 out of patch 5. Add support for avoiding
  waiting for gpu when shrinking.
- A number of changes in patch 5. See the commit message for details.
v5:
- Some fixes to i915_vma_verify_bind_complete() (Matthew Auld)
- Update patches with R-B.
v6:
- Code comment update
- Re-check for fence signaled before returning -EBUSY (Matthew Auld)
- Use dma_resv_iter_is_exclusive() (Matthew Auld)
- Await all dma-resv fences before a migration blit (Matthew Auld)
v7:
- Fix yet another compilation failure in patch 1.

Maarten Lankhorst (1):
  drm/i915: Add support for moving fence waiting

Thomas Hellström (5):
  drm/i915/ttm: Move the i915_gem_obj_copy_ttm() function
  drm/i915/ttm: Drop region reference counting
  drm/i915/ttm: Correctly handle waiting for gpu when shrinking
  drm/i915/ttm: Implement asynchronous TTM moves
  drm/i915/ttm: Update i915_gem_obj_copy_ttm() to be asynchronous

 drivers/gpu/drm/i915/gem/i915_gem_object.c|  52 +++
 drivers/gpu/drm/i915/gem/i915_gem_object.h|   6 +
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |   1 +
 drivers/gpu/drm/i915/gem/i915_gem_pages.c |   6 +
 drivers/gpu/drm/i915/gem/i915_gem_region.c|   4 +-
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c |   3 +-
 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c  |   1 +
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c|   6 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c   |  89 ++--
 drivers/gpu/drm/i915/gem/i915_gem_ttm.h   |   6 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c  | 409 --
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.h  |  10 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c|   3 +
 drivers/gpu/drm/i915/gem/i915_gem_wait.c  |   4 +-
 .../gpu/drm/i915/gem/selftests/huge_pages.c   |   2 +-
 drivers/gpu/drm/i915/gt/intel_region_lmem.c   |  10 +-
 drivers/gpu/drm/i915/i915_vma.c   |  43 +-
 drivers/gpu/drm/i915/intel_memory_region.c|  26 +-
 drivers/gpu/drm/i915/intel_memory_region.h|   9 +-
 drivers/gpu/drm/i915/intel_region_ttm.c   |  35 +-
 drivers/gpu/drm/i915/intel_region_ttm.h   |   2 +-
 .../drm/i915/selftests/intel_memory_region.c  |   8 +-
 drivers/gpu/drm/i915/selftests/mock_region.c  |   7 +-
 23 files changed, 599 insertions(+), 143 deletions(-)

-- 
2.31.1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/dg2: Tile 4 plane format support (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915/dg2: Tile 4 plane format support (rev5)
URL   : https://patchwork.freedesktop.org/series/95715/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dg2: Tile 4 plane format support (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915/dg2: Tile 4 plane format support (rev5)
URL   : https://patchwork.freedesktop.org/series/95715/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
5aed8d5e5781 drm/i915/dg2: Tile 4 plane format support
-:28: WARNING:TYPO_SPELLING: 'assocating' may be misspelled - perhaps 
'associating'?
#28: 
v6: - Moved Tile4 assocating struct for modifier/display to
  ^^

total: 0 errors, 1 warnings, 0 checks, 129 lines checked

[Intel-gfx] [PATCH] drm/i915/dg2: Tile 4 plane format support

[Stanislav Lisovskiy]

TileF(Tile4 in bspec) format is 4K tile organized into
64B subtiles with same basic shape as for legacy TileY
which will be supported by Display13.

v2: - Fixed wrong case condition(Jani Nikula)
- Increased I915_FORMAT_MOD_F_TILED up to 12(Imre Deak)

v3: - s/I915_TILING_F/TILING_4/g
- s/I915_FORMAT_MOD_F_TILED/I915_FORMAT_MOD_4_TILED/g
- Removed unneeded fencing code

v4: - Rebased, fixed merge conflict with new table-oriented
  format modifier checking(Stan)
- Replaced the rest of "Tile F" mentions to "Tile 4"(Stan)

v5: - Still had to remove some Tile F mentionings
- Moved has_4tile from adlp to DG2(Ramalingam C)
- Check specifically for DG2, but not the Display13(Imre)

v6: - Moved Tile4 assocating struct for modifier/display to
  the beginning(Imre Deak)
- Removed unneeded case I915_FORMAT_MOD_4_TILED modifier
  checks(Imre Deak)
- Fixed I915_FORMAT_MOD_4_TILED to be 9 instead of 12
  (Imre Deak)

v7: - Fixed display_ver to { 13, 13 }(Imre Deak)
- Removed redundant newline(Imre Deak)

Reviewed-by: Imre Deak 
Cc: Imre Deak 
Cc: Matt Roper 
Cc: Maarten Lankhorst 
Signed-off-by: Stanislav Lisovskiy 
Signed-off-by: Matt Roper 
Signed-off-by: Juha-Pekka Heikkilä 
---
 drivers/gpu/drm/i915/display/intel_display.c  |  1 +
 drivers/gpu/drm/i915/display/intel_fb.c   |  9 +
 drivers/gpu/drm/i915/display/intel_fbc.c  |  1 +
 .../drm/i915/display/intel_plane_initial.c|  1 +
 .../drm/i915/display/skl_universal_plane.c| 20 +++
 drivers/gpu/drm/i915/i915_drv.h   |  1 +
 drivers/gpu/drm/i915/i915_pci.c   |  1 +
 drivers/gpu/drm/i915/i915_reg.h   |  1 +
 drivers/gpu/drm/i915/intel_device_info.h  |  1 +
 drivers/gpu/drm/i915/intel_pm.c   |  1 +
 include/uapi/drm/drm_fourcc.h |  8 
 11 files changed, 37 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index f3c9208a30b1..7429965d3682 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7766,6 +7766,7 @@ static int intel_atomic_check_async(struct 
intel_atomic_state *state, struct int
case I915_FORMAT_MOD_X_TILED:
case I915_FORMAT_MOD_Y_TILED:
case I915_FORMAT_MOD_Yf_TILED:
+   case I915_FORMAT_MOD_4_TILED:
break;
default:
drm_dbg_kms(>drm,
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index c4a743d0913f..b7f1ef62072c 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -139,6 +139,9 @@ struct intel_modifier_desc {
 
 static const struct intel_modifier_desc intel_modifiers[] = {
{
+   .modifier = I915_FORMAT_MOD_4_TILED,
+   .display_ver = { 13, 13 },
+   }, {
.modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,
.display_ver = { 12, 13 },
.plane_caps = INTEL_PLANE_CAP_TILING_Y | INTEL_PLANE_CAP_CCS_MC,
@@ -544,6 +547,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, 
int color_plane)
return 128;
else
return 512;
+   case I915_FORMAT_MOD_4_TILED:
+   /*
+* Each 4K tile consists of 64B(8*8) subtiles, with
+* same shape as Y Tile(i.e 4*16B OWords)
+*/
+   return 128;
case I915_FORMAT_MOD_Y_TILED_CCS:
if (intel_fb_is_ccs_aux_plane(fb, color_plane))
return 128;
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index d0c34bc3af6c..0ceabe40d8c9 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -898,6 +898,7 @@ static bool tiling_is_valid(struct drm_i915_private *i915,
case I915_FORMAT_MOD_Y_TILED:
case I915_FORMAT_MOD_Yf_TILED:
return DISPLAY_VER(i915) >= 9;
+   case I915_FORMAT_MOD_4_TILED:
case I915_FORMAT_MOD_X_TILED:
return true;
default:
diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c 
b/drivers/gpu/drm/i915/display/intel_plane_initial.c
index dcd698a02da2..d80855ee9b96 100644
--- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
+++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
@@ -125,6 +125,7 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
case DRM_FORMAT_MOD_LINEAR:
case I915_FORMAT_MOD_X_TILED:
case I915_FORMAT_MOD_Y_TILED:
+   case I915_FORMAT_MOD_4_TILED:
break;
default:
drm_dbg(_priv->drm,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ttm: Async migration (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Async migration (rev7)
URL   : https://patchwork.freedesktop.org/series/96798/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10913_full -> Patchwork_21651_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21651_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21651_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21651_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_capture@pi@rcs0:
- shard-kbl:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-kbl1/igt@gem_exec_capture@p...@rcs0.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/shard-kbl7/igt@gem_exec_capture@p...@rcs0.html

  
 Warnings 

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-kbl:  [SKIP][3] ([fdo#109271] / [i915#3777]) -> 
[INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-kbl7/igt@kms_big...@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/shard-kbl7/igt@kms_big...@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  
Known issues


  Here are the changes found in Patchwork_21651_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-glk:  ([PASS][5], [PASS][6], [PASS][7], [PASS][8], 
[PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], 
[PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], 
[PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], 
[PASS][27], [PASS][28], [PASS][29]) -> ([PASS][30], [PASS][31], [PASS][32], 
[PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], 
[PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], 
[PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], 
[FAIL][51], [PASS][52], [PASS][53], [PASS][54]) ([i915#4392])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk1/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk1/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk1/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk2/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk2/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk2/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk2/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk3/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk3/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk4/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk4/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk4/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk5/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk5/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk5/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk6/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk6/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk6/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk7/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk7/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk7/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk8/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk8/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk9/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/shard-glk9/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/shard-glk9/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/shard-glk9/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/shard-glk8/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/shard-glk8/boot.html
   [34]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for Ensure zero alignment on gens < 4

[Patchwork]

== Series Details ==

Series: Ensure zero alignment on gens < 4
URL   : https://patchwork.freedesktop.org/series/97177/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10915 -> Patchwork_21658


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/index.html

Participating hosts (41 -> 36)
--

  Additional (2): fi-kbl-soraka fi-icl-u2 
  Missing(7): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-6 bat-adlp-4 
bat-jsl-2 bat-jsl-1 

Known issues


  Here are the changes found in Patchwork_21658 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2:  NOTRUN -> [SKIP][1] ([fdo#109315]) +17 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@amdgpu/amd_cs_...@fork-gfx0.html

  * igt@amdgpu/amd_cs_nop@sync-gfx0:
- fi-bsw-n3050:   NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-bsw-n3050/igt@amdgpu/amd_cs_...@sync-gfx0.html

  * igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2:  [PASS][3] -> [INCOMPLETE][4] ([i915#4006])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html

  * igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka:  NOTRUN -> [SKIP][5] ([fdo#109271]) +12 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html

  * igt@gem_flink_basic@bad-flink:
- fi-skl-6600u:   [PASS][6] -> [FAIL][7] ([i915#4547])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-skl-6600u/igt@gem_flink_ba...@bad-flink.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-skl-6600u/igt@gem_flink_ba...@bad-flink.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka:  NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#2190])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
- fi-icl-u2:  NOTRUN -> [SKIP][9] ([i915#2190])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2:  NOTRUN -> [SKIP][10] ([i915#4555]) +3 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka:  NOTRUN -> [DMESG-FAIL][11] ([i915#1886] / [i915#2291])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[PASS][12] -> [INCOMPLETE][13] ([i915#3921])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka:  NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2:  NOTRUN -> [SKIP][15] ([fdo#111827]) +8 similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2:  NOTRUN -> [SKIP][16] ([fdo#109278]) +2 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2:  NOTRUN -> [SKIP][17] ([fdo#109285])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka:  NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#533])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@prime_vgem@basic-userptr:
- fi-icl-u2:  NOTRUN -> [SKIP][19] ([i915#3301])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-skl-6600u:   NOTRUN -> [FAIL][20] ([i915#3363] / [i915#4312])
   [20]: 

Re: [Intel-gfx] [PATCH 2/2] drm/i915/backlight: Make ext_pwm_disable_backlight() call intel_backlight_set_pwm_level()

[Lyude Paul]

Reviewed-by: Lyude Paul 

On Sun, 2021-11-21 at 12:00 +0100, Hans de Goede wrote:
> At least the Bay Trail LPSS PWM controller used with DSI panels on many
> Bay Trail tablets seems to leave the PWM pin in whatever state it was
> (high or low) ATM that the PWM gets disabled. Combined with some panels
> not having a separate backlight-enable pin this leads to the backlight
> sometimes staying on while it should not (when the pin was high during
> PWM-disabling).
> 
> First calling intel_backlight_set_pwm_level() will ensure that the pin
> is always low (or high for inverted brightness panels) since the passed
> in duty-cycle is 0% (or 100%) when the PWM gets disabled fixing the
> backlight sometimes staying on.
> 
> With the exception of ext_pwm_disable_backlight() all other
> foo_disable_backlight() functions call intel_backlight_set_pwm_level()
> already before disabling the backlight, so this change also aligns
> ext_pwm_disable_backlight() with all the other disable() functions.
> 
> Signed-off-by: Hans de Goede 
> ---
>  drivers/gpu/drm/i915/display/intel_backlight.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
> b/drivers/gpu/drm/i915/display/intel_backlight.c
> index 03cd730c926a..2758a2f6c093 100644
> --- a/drivers/gpu/drm/i915/display/intel_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_backlight.c
> @@ -421,6 +421,8 @@ static void ext_pwm_disable_backlight(const struct
> drm_connector_state *old_conn
> struct intel_connector *connector =
> to_intel_connector(old_conn_state->connector);
> struct intel_panel *panel = >panel;
>  
> +   intel_backlight_set_pwm_level(old_conn_state, level);
> +
> panel->backlight.pwm_state.enabled = false;
> pwm_apply_state(panel->backlight.pwm, >backlight.pwm_state);
>  }

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat

Re: [Intel-gfx] [PATCH v6 1/6] drm/i915: Add support for moving fence waiting

[kernel test robot]

Hi "Thomas,

I love your patch! Yet something to improve:

[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on drm-exynos/exynos-drm-next drm/drm-next v5.16-rc2 
next-2028]
[cannot apply to drm-intel/for-linux-next tegra-drm/drm/tegra/for-next 
airlied/drm-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Thomas-Hellstr-m/drm-i915-ttm-Async-migration/20211122-162430
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a003-20211122 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 
c133fb321f7ca6083ce15b6aa5bf89de6600e649)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/0day-ci/linux/commit/387d80b6342f138213ce6e79e84459597b4a0394
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Thomas-Hellstr-m/drm-i915-ttm-Async-migration/20211122-162430
git checkout 387d80b6342f138213ce6e79e84459597b4a0394
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/i915_vma.c:356:12: error: function 
>> 'i915_vma_verify_bind_complete' is not needed and will not be emitted 
>> [-Werror,-Wunneeded-internal-declaration]
   static int i915_vma_verify_bind_complete(struct i915_vma *vma)
  ^
   1 error generated.


vim +/i915_vma_verify_bind_complete +356 drivers/gpu/drm/i915/i915_vma.c

   355  
 > 356  static int i915_vma_verify_bind_complete(struct i915_vma *vma)
   357  {
   358  int err = 0;
   359  
   360  if (i915_active_has_exclusive(>active)) {
   361  struct dma_fence *fence =
   362  i915_active_fence_get(>active.excl);
   363  
   364  if (!fence)
   365  return 0;
   366  
   367  if (dma_fence_is_signaled(fence))
   368  err = fence->error;
   369  else
   370  err = -EBUSY;
   371  
   372  dma_fence_put(fence);
   373  }
   374  
   375  return err;
   376  }
   377  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915/dsi: split out intel_dsi_vbt.h

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/dsi: split out intel_dsi_vbt.h
URL   : https://patchwork.freedesktop.org/series/97162/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10914_full -> Patchwork_21654_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21654_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21654_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21654_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- shard-kbl:  [PASS][1] -> [INCOMPLETE][2] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-kbl1/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/shard-kbl7/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html

  * igt@kms_plane_cursor@pipe-c-primary-size-64:
- shard-kbl:  NOTRUN -> [INCOMPLETE][3] +1 similar issue
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/shard-kbl7/igt@kms_plane_cur...@pipe-c-primary-size-64.html

  
Known issues


  Here are the changes found in Patchwork_21654_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-apl:  ([PASS][4], [PASS][5], [PASS][6], [PASS][7], 
[PASS][8], [FAIL][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], 
[PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], 
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], 
[PASS][26], [PASS][27], [PASS][28]) ([i915#4386]) -> ([PASS][29], [PASS][30], 
[PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], 
[PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], 
[PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], 
[PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl2/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl2/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl2/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl2/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl3/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl1/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl3/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl3/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl3/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl3/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl4/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl4/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl1/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl6/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl6/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl6/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl6/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl7/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl7/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl7/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl8/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl8/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl8/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl8/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/shard-apl1/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/shard-apl8/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/shard-apl8/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/shard-apl8/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/shard-apl7/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/shard-apl7/boot.html
 

[Intel-gfx] [PATCH 1/1] i915/gem/i915_gem_execbuffer: Disallow passing alignment

[Zbigniew Kempczyński]

Ensure passing alignment is not possible by UMD starting on gens4+.

Inspected UMD code - Mesa, Compute (NEO), Media-Driver, xf86-intel-video
seems to be alignment == 0 ready. Libdrm potentially uses alignment
but it is used in some IGTs which remains intact during libdrm removal
(there's no possibility to properly rewrite those tests due to specific
hw requirement - dual gpus).

Signed-off-by: Zbigniew Kempczyński 
Cc: Jason Ekstrand 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 9f7c6ecadb90..cc012d6ffa02 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -505,6 +505,14 @@ static bool platform_has_relocs_enabled(const struct 
i915_execbuffer *eb)
return false;
 }
 
+static bool platform_allows_pass_alignment(const struct i915_execbuffer *eb)
+{
+   if (GRAPHICS_VER(eb->i915) < 4)
+   return true;
+
+   return false;
+}
+
 static int
 eb_validate_vma(struct i915_execbuffer *eb,
struct drm_i915_gem_exec_object2 *entry,
@@ -513,6 +521,9 @@ eb_validate_vma(struct i915_execbuffer *eb,
if (entry->relocation_count && !platform_has_relocs_enabled(eb))
return -EINVAL;
 
+   if (entry->alignment && !platform_allows_pass_alignment(eb))
+   return -EINVAL;
+
if (unlikely(entry->flags & eb->invalid_flags))
return -EINVAL;
 
-- 
2.26.0

[Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4

[Zbigniew Kempczyński]

In short - we want to enforce alignment == 0 for gen4+ GEM object
settings.

Before we merge this we need to inspect all UMD we expect can use
this. My investigation was narrowed to UMD code:

1. IGT
2. Mesa
3. Media-Driver
4. NEO
5. libdrm
6. xf86-intel-video

I would like to ask subsystem developers / maintainers to confirm
my analysis.

1. IGT:
   We've already removed / fixed most of the code where alignment != 0.
   What left was few multi-card subtests I'm not able to rewrite due
   to lack of such hw (nv + intel on the board).

2. Mesa:
   gallium/drivers/iris/iris_batch.c,iris_bufmgr.c - it uses softpinning
   only with alignment handled by allocator, so drm_i915_gem_exec_object2
   alignment field == 0.

   drivers/dri/i965/brw_batch.c,brw_screen.c - it uses relocations but
   it is supported by allocator, there're no direct alignment settings
   to value != 0.

   vulcan/anv_batch_chain.c: drm_i915_gem_exec_object2 objects are
   initialized within anv_execbuf_add_bo() and .alignment field
   is set to 0 there. There's no other place where I've found vulcan
   driver touches it both for softpinning / relocations.

3. Media-Driver:
   It contains modified libdrm code and three functions which do
   allocations, all of them uses mos_gem_bo_alloc_internal():
   - mos_gem_bo_alloc() - internally uses alignment == 0, that's ok
   - mos_gem_bo_alloc_tiled() - same as mos_gem_bo_alloc()
   - mos_gem_bo_alloc_for_render() - this one passes alignment from
 the caller and it may be != 0. But I haven't found practical
 usage of this function externally (using mos_bo_alloc_for_render()
 wrapper).
   There's another userptr allocation function: mos_bo_alloc_userptr()
   but it doesn't use alignment.

4. NEO:
   Uses softpinning only with alignment == 0:
   source/os_interface/linux/drm_buffer_object.cpp: 
   void BufferObject::fillExecObject() has execObject.alignment = 0;

5. libdrm:
   Corresponding functions to Media-Driver:
   drm_intel_bo_alloc(), drm_intel_bo_alloc_for_render(), 
   drm_intel_bo_alloc_userptr() and drm_intel_bo_alloc_tiled().
   Alignment field is used in drm_intel_bo_alloc_for_render()
   so couple not rewritten IGTs may encounter issue here (alignment
   passed in IGTs which still uses libdrm == 4096).

6. xf86-intel-video:
   src/sna/kgem.c: _kgem_submit() - alignment is set to 0 so this
   shouldn't be a problem.


Cc: Petri Latvala 
Cc: Jason Ekstrand 
Cc: Dmitry Rogozhkin 
Cc: Michal Mrozek 
Cc: José Roberto de Souza 
Cc: Chris Wilson 
Cc: Daniel Vetter 

Zbigniew Kempczyński (1):
  i915/gem/i915_gem_execbuffer: Disallow passing alignment

 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 11 +++
 1 file changed, 11 insertions(+)

-- 
2.26.0

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915/dmabuf: fix broken build"

[Patchwork]

== Series Details ==

Series: Revert "drm/i915/dmabuf: fix broken build"
URL   : https://patchwork.freedesktop.org/series/97174/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10915 -> Patchwork_21657


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/index.html

Participating hosts (41 -> 34)
--

  Additional (1): fi-kbl-soraka 
  Missing(8): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-bsw-cyan bat-adlp-6 
bat-adlp-4 bat-jsl-2 bat-jsl-1 

Known issues


  Here are the changes found in Patchwork_21657 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_cs_nop@sync-gfx0:
- fi-bsw-n3050:   NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-bsw-n3050/igt@amdgpu/amd_cs_...@sync-gfx0.html

  * igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka:  NOTRUN -> [SKIP][2] ([fdo#109271]) +12 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-1115g4:  [PASS][3] -> [FAIL][4] ([i915#1888])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
- fi-kbl-8809g:   [PASS][5] -> [INCOMPLETE][6] ([i915#4221])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-kbl-8809g/igt@gem_exec_susp...@basic-s3.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-kbl-8809g/igt@gem_exec_susp...@basic-s3.html

  * igt@gem_flink_basic@bad-flink:
- fi-skl-6600u:   [PASS][7] -> [FAIL][8] ([i915#4547])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-skl-6600u/igt@gem_flink_ba...@bad-flink.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-skl-6600u/igt@gem_flink_ba...@bad-flink.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka:  NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#2190])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html

  * igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka:  NOTRUN -> [DMESG-FAIL][10] ([i915#1886] / [i915#2291])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka:  NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka:  NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#533])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@runner@aborted:
- fi-skl-6600u:   NOTRUN -> [FAIL][13] ([i915#3363] / [i915#4312])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-skl-6600u/igt@run...@aborted.html
- fi-skl-6700k2:  NOTRUN -> [FAIL][14] ([i915#2426] / [i915#3363] / 
[i915#4312])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-skl-6700k2/igt@run...@aborted.html

  
 Possible fixes 

  * igt@i915_selftest@live@gtt:
- {fi-tgl-dsi}:   [FAIL][15] ([i915#2927]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-dsi/igt@i915_selftest@l...@gtt.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-tgl-dsi/igt@i915_selftest@l...@gtt.html

  * igt@i915_selftest@live@late_gt_pm:
- fi-bsw-n3050:   [DMESG-FAIL][17] ([i915#2927] / [i915#3428]) -> 
[PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21657/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2426]: 

Re: [Intel-gfx] [PATCH 3/3] drm/i915/gt: Improve "race-to-idle" at low frequencies

[Rodrigo Vivi]

On Wed, Nov 17, 2021 at 02:49:55PM -0800, Vinay Belgaumkar wrote:
> From: Chris Wilson 
> 
> While the power consumption is proportional to the frequency, there is
> also a static draw for active gates. The longer we are able to powergate
> (rc6), the lower the static draw. Thus there is a sweetspot in the
> frequency/power curve where we run at higher frequency in order to sleep
> longer, aka race-to-idle. This is more evident at lower frequencies, so
> let's look to bump the frequency if we think we will benefit by sleeping
> longer at the higher frequency and so conserving power.
> 
> Signed-off-by: Chris Wilson 
> Cc: Vinay Belgaumkar 
> Cc: Tvrtko Ursulin 

Please let's not increase the complexity here, unless we have a very good
and documented reason.

Before trying to implement anything smart like this in the driver I'd like
to see data, power and performance results in different platforms and with
different workloads.

Thanks,
Rodrigo.

> ---
>  drivers/gpu/drm/i915/gt/intel_rps.c | 31 -
>  1 file changed, 26 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c 
> b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 3675ac93ded0..6af3231982af 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -63,6 +63,22 @@ static void set(struct intel_uncore *uncore, i915_reg_t 
> reg, u32 val)
>   intel_uncore_write_fw(uncore, reg, val);
>  }
>  
> +static bool race_to_idle(struct intel_rps *rps, u64 busy, u64 dt)
> +{
> + unsigned int this = rps->cur_freq;
> + unsigned int next = rps->cur_freq + 1;
> + u64 next_dt = next * max(busy, dt);
> +
> + /*
> +  * Compare estimated time spent in rc6 at the next power bin. If
> +  * we expect to sleep longer than the estimated increased power
> +  * cost of running at a higher frequency, it will be reduced power
> +  * consumption overall.
> +  */
> + return (((next_dt - this * busy) >> 10) * this * this >
> + ((next_dt - next * busy) >> 10) * next * next);
> +}
> +
>  static void rps_timer(struct timer_list *t)
>  {
>   struct intel_rps *rps = from_timer(rps, t, timer);
> @@ -133,7 +149,7 @@ static void rps_timer(struct timer_list *t)
>   if (!max_busy[i])
>   break;
>  
> - busy += div_u64(max_busy[i], 1 << i);
> + busy += max_busy[i] >> i;
>   }
>   GT_TRACE(rps_to_gt(rps),
>"busy:%lld [%d%%], max:[%lld, %lld, %lld], 
> interval:%d\n",
> @@ -141,13 +157,18 @@ static void rps_timer(struct timer_list *t)
>max_busy[0], max_busy[1], max_busy[2],
>rps->pm_interval);
>  
> - if (100 * busy > rps->power.up_threshold * dt &&
> - rps->cur_freq < rps->max_freq_softlimit) {
> + if (rps->cur_freq < rps->max_freq_softlimit &&
> + race_to_idle(rps, max_busy[0], dt)) {
> + rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
> + rps->pm_interval = 1;
> + schedule_work(>work);
> + } else if (rps->cur_freq < rps->max_freq_softlimit &&
> +100 * busy > rps->power.up_threshold * dt) {
>   rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
>   rps->pm_interval = 1;
>   schedule_work(>work);
> - } else if (100 * busy < rps->power.down_threshold * dt &&
> -rps->cur_freq > rps->min_freq_softlimit) {
> + } else if (rps->cur_freq > rps->min_freq_softlimit &&
> +100 * busy < rps->power.down_threshold * dt) {
>   rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
>   rps->pm_interval = 1;
>   schedule_work(>work);
> -- 
> 2.34.0
> 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Revert "drm/i915/dmabuf: fix broken build"

[Patchwork]

== Series Details ==

Series: Revert "drm/i915/dmabuf: fix broken build"
URL   : https://patchwork.freedesktop.org/series/97174/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915/dmabuf: fix broken build"

[Patchwork]

== Series Details ==

Series: Revert "drm/i915/dmabuf: fix broken build"
URL   : https://patchwork.freedesktop.org/series/97174/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
fddd3fca4b78 Revert "drm/i915/dmabuf: fix broken build"
-:12: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ 
chars of sha1> ("")' - ie: 'commit 304ac8032d3f ("Merge tag 
'drm-next-2021-11-12' of git://anongit.freedesktop.org/drm/drm")'
#12: 
now already contains the required include directive via 304ac8032d3f

-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#13: 
("Merge tag 'drm-next-2021-11-12' of git://anongit.freedesktop.org/drm/drm").

total: 1 errors, 1 warnings, 0 checks, 13 lines checked

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: break intel_display_types.h dependency on i915_drv.h

[Patchwork]

== Series Details ==

Series: drm/i915: break intel_display_types.h dependency on i915_drv.h
URL   : https://patchwork.freedesktop.org/series/97173/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10915 -> Patchwork_21656


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/index.html

Participating hosts (41 -> 35)
--

  Additional (1): fi-kbl-soraka 
  Missing(7): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-6 bat-adlp-4 
bat-jsl-2 bat-jsl-1 

Known issues


  Here are the changes found in Patchwork_21656 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_cs_nop@sync-gfx0:
- fi-bsw-n3050:   NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-bsw-n3050/igt@amdgpu/amd_cs_...@sync-gfx0.html

  * igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka:  NOTRUN -> [SKIP][2] ([fdo#109271]) +12 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka:  NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html

  * igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka:  NOTRUN -> [DMESG-FAIL][4] ([i915#1886] / [i915#2291])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka:  NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka:  NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#533])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@primary_page_flip:
- fi-skl-6600u:   [PASS][7] -> [FAIL][8] ([i915#4547])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  * igt@runner@aborted:
- fi-skl-6600u:   NOTRUN -> [FAIL][9] ([i915#3363] / [i915#4312])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-skl-6600u/igt@run...@aborted.html

  
 Possible fixes 

  * igt@i915_selftest@live@gtt:
- {fi-tgl-dsi}:   [FAIL][10] ([i915#2927]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-dsi/igt@i915_selftest@l...@gtt.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-tgl-dsi/igt@i915_selftest@l...@gtt.html

  * igt@i915_selftest@live@late_gt_pm:
- fi-bsw-n3050:   [DMESG-FAIL][12] ([i915#2927] / [i915#3428]) -> 
[PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2:  [DMESG-WARN][14] ([i915#4269]) -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html

  
 Warnings 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-guc: [SKIP][16] ([fdo#109271]) -> [FAIL][17] ([i915#3049])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21656/fi-kbl-guc/igt@i915_pm_...@basic-pci-d3-state.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2927]: https://gitlab.freedesktop.org/drm/intel/issues/2927
  [i915#3049]: https://gitlab.freedesktop.org/drm/intel/issues/3049
  [i915#3363]: 

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Skip remap_io_mapping() for non-x86 platforms (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Skip remap_io_mapping() for non-x86 platforms (rev3)
URL   : https://patchwork.freedesktop.org/series/96855/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10915 -> Patchwork_21655


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21655 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21655, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/index.html

Participating hosts (41 -> 35)
--

  Additional (2): fi-kbl-soraka fi-icl-u2 
  Missing(8): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-bsw-cyan bat-adlp-6 
bat-adlp-4 bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21655:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_suspend@basic-s3:
- fi-skl-6600u:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-skl-6600u/igt@gem_exec_susp...@basic-s3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-skl-6600u/igt@gem_exec_susp...@basic-s3.html

  
Known issues


  Here are the changes found in Patchwork_21655 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2:  NOTRUN -> [SKIP][3] ([fdo#109315]) +17 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-icl-u2/igt@amdgpu/amd_cs_...@fork-gfx0.html

  * igt@amdgpu/amd_cs_nop@sync-gfx0:
- fi-bsw-n3050:   NOTRUN -> [SKIP][4] ([fdo#109271]) +17 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-bsw-n3050/igt@amdgpu/amd_cs_...@sync-gfx0.html

  * igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka:  NOTRUN -> [SKIP][5] ([fdo#109271]) +12 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka:  NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
- fi-icl-u2:  NOTRUN -> [SKIP][7] ([i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-icl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2:  NOTRUN -> [SKIP][8] ([i915#4555]) +3 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka:  NOTRUN -> [DMESG-FAIL][9] ([i915#1886] / [i915#2291])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka:  NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2:  NOTRUN -> [SKIP][11] ([fdo#111827]) +8 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2:  NOTRUN -> [SKIP][12] ([fdo#109278]) +2 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2:  NOTRUN -> [SKIP][13] ([fdo#109285])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-icl-u2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka:  NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#533])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@prime_vgem@basic-userptr:
- fi-icl-u2:  NOTRUN -> [SKIP][15] ([i915#3301])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21655/fi-icl-u2/igt@prime_v...@basic-userptr.html

  
 Possible fixes 

  * igt@i915_selftest@live@gtt:
- {fi-tgl-dsi}:   [FAIL][16] ([i915#2927]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-dsi/igt@i915_selftest@l...@gtt.html
   [17]: 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: break intel_display_types.h dependency on i915_drv.h

[Patchwork]

== Series Details ==

Series: drm/i915: break intel_display_types.h dependency on i915_drv.h
URL   : https://patchwork.freedesktop.org/series/97173/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: break intel_display_types.h dependency on i915_drv.h

[Patchwork]

== Series Details ==

Series: drm/i915: break intel_display_types.h dependency on i915_drv.h
URL   : https://patchwork.freedesktop.org/series/97173/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
42a9e30e36a5 drm/i915/display: use drm_crtc_wait_one_vblank() directly when 
possible
35c9992782a8 drm/i915/display: remove intel_wait_for_vblank()
fbbf6148f0ec drm/i915/crtc: un-inline some crtc functions and move to 
intel_crtc.[ch]
7a468e807402 drm/i915/fb: move intel_fb_uses_dpt to intel_fb.c and un-inline
fe9d28ef63bd drm/i915: split out intel_pm_types.h
-:106: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#106: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 159 lines checked
6cb1c6ad0212 drm/i915: move enum hpd_pin to intel_display.h
-:41: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__pin' - possible 
side-effects?
#41: FILE: drivers/gpu/drm/i915/display/intel_display.h:370:
+#define for_each_hpd_pin(__pin) \
+   for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)

total: 0 errors, 0 warnings, 1 checks, 60 lines checked
0239a6a2079b drm/i915/display: convert dp_to_i915() to a macro
795d433c3faa drm/i915/display: stop including i915_drv.h from 
intel_display_types.h

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()

[Vudum, Lakshminarayana]

Filed https://gitlab.freedesktop.org/drm/intel/-/issues/4577 and re-reported.
igt@kms_flip@dpms-vs-vblank-race-interruptible@b-dp1 - incomplete - No 
warnings/errors

Thanks,
Lakshmi.

-Original Message-
From: Matthew Auld  
Sent: Monday, November 22, 2021 6:32 AM
To: Dan Carpenter ; Vudum, Lakshminarayana 

Cc: Intel Graphics Development 
Subject: Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ttm: Fix error code 
in i915_ttm_eviction_valuable()

On Mon, 22 Nov 2021 at 14:21, Dan Carpenter  wrote:
>
> On Mon, Nov 22, 2021 at 02:08:39PM -, Patchwork wrote:
> > == Series Details ==
> >
> > Series: drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()
> > URL   : https://patchwork.freedesktop.org/series/97151/
> > State : failure
>
> Who is supposed to be reading these?  I feel like there should be a 
> human reading them but it's not me...  The system is broken, but who 
> is fixing it?
>
> regards,
> dan carpenter
>
> >
> > == Summary ==
> >
> > CI Bug Log - changes from CI_DRM_10911_full -> Patchwork_21650_full 
> > 
> >
> > Summary
> > ---
> >
> >   **FAILURE**
> >
> >   Serious unknown changes coming with Patchwork_21650_full absolutely need 
> > to be
> >   verified manually.
> >
> >   If you think the reported changes have nothing to do with the changes
> >   introduced in Patchwork_21650_full, please notify your bug team to allow 
> > them
> >   to document this new failure mode, which will reduce false positives in 
> > CI.
> >
> >
> >
> > Participating hosts (11 -> 11)
> > --
> >
> >   No changes in participating hosts
> >
> > Possible new issues
> > ---
> >
> >   Here are the unknown changes that may have been introduced in 
> > Patchwork_21650_full:
> >
> > ### IGT changes ###
> >
> >  Possible regressions 
> >
> >   * igt@kms_flip@dpms-vs-vblank-race-interruptible@b-dp1:
> > - shard-kbl:  [PASS][1] -> [INCOMPLETE][2]
> >[1]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-kbl2/igt@kms_flip@dpms-vs-vblank-race-interrupti...@b-dp1.html
> >[2]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-kbl7/
> > igt@kms_flip@dpms-vs-vblank-race-interrupti...@b-dp1.html

Lakshmi, this one is for sure a false positive. Patch pushed to 
drm-intel-gt-next. Thanks.

> >
> >
> > Known issues
> > 
> >
> >   Here are the changes found in Patchwork_21650_full that come from known 
> > issues:
> >
> > ### CI changes ###
> >
> >  Possible fixes 
> >
> >   * boot:
> > - shard-glk:  ([FAIL][3], [PASS][4], [PASS][5], [PASS][6], 
> > [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], 
> > [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], 
> > [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], 
> > [PASS][25], [PASS][26], [PASS][27]) ([i915#4392]) -> ([PASS][28], 
> > [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], 
> > [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], 
> > [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], 
> > [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52])
> >[3]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
> >[4]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
> >[5]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
> >[6]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
> >[7]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
> >[8]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
> >[9]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
> >[10]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
> >[11]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
> >[12]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
> >[13]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html
> >[14]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html
> >[15]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html
> >[16]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html
> >[17]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
> >[18]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
> >[19]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
> >[20]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
> >[21]: 
> > 

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/ttm: Async migration (rev7)

[Vudum, Lakshminarayana]

We have https://gitlab.freedesktop.org/drm/intel/-/issues/4547 for the 
regression on SKL.
Few tests - fail - This test was killed due to a kernel taint, INFO: task 
kworker/.* blocked for more than 30 seconds.

Thanks,
Lakshmi.

From: Thomas Hellström 
Sent: Monday, November 22, 2021 6:54 AM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana 

Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915/ttm: Async migration (rev7)



On 11/22/21 15:02, Patchwork wrote:
Patch Details
Series:

drm/i915/ttm: Async migration (rev7)

URL:

https://patchwork.freedesktop.org/series/96798/

State:

failure

Details:

https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/index.html

CI Bug Log - changes from CI_DRM_10913 -> Patchwork_21651
Summary

FAILURE

Serious unknown changes coming with Patchwork_21651 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21651, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/index.html

Participating hosts (43 -> 34)

Missing (9): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-icl-u2 fi-bsw-cyan bat-adlp-6 
bat-adlp-4 bat-jsl-2 bat-jsl-1

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_21651:

IGT changes
Possible regressions

  *   igt@gem_exec_suspend@basic-s3:

 *   fi-skl-6600u: 
PASS
 -> 
INCOMPLETE


Lakshmi,

This failure is unrelated, and occurs on the same machine with a more or less 
identical signature on CI_DRM_10901

Thanks,
Thomas

Re: [Intel-gfx] RPM raw-wakeref not held in intel_pxp_fini_hw

[Lubart, Vitaly]

CC Tomas and Sasha

> -Original Message-
> From: Ceraolo Spurio, Daniele 
> Sent: Monday, November 22, 2021 18:54
> To: Jason A. Donenfeld ; Lubart, Vitaly
> ; Gupta, Anshuman ;
> Surendrakumar Upadhyay, TejaskumarX
> 
> Cc: LKML ; intel-gfx@lists.freedesktop.org; dri-
> devel 
> Subject: Re: RPM raw-wakeref not held in intel_pxp_fini_hw
> 
> Hi,
> 
> The fix for this is in flight:
> 
> https://patchwork.freedesktop.org/series/96658/
> 
> It just needs a last round of testing before we merge it.
> 
> Thanks,
> Daniele
> 
> On 11/22/2021 8:47 AM, Jason A. Donenfeld wrote:
> > Hey Intel PXPers,
> >
> > I hit this splat on 5.16-rc1 during system suspend:
> >
> > Nov 22 13:54:09 thinkpad systemd-logind[934]: Lid closed.
> > Nov 22 13:54:09 thinkpad systemd[1]: Reached target Sleep.
> > Nov 22 13:54:09 thinkpad systemd[1]: Starting System Suspend...
> > Nov 22 13:54:09 thinkpad systemd-sleep[519259]: Entering sleep state
> > 'suspend'...
> > Nov 22 13:54:09 thinkpad kernel: PM: suspend entry (s2idle) Nov 22
> > 15:22:05 thinkpad kernel: Filesystems sync: 0.124 seconds Nov 22
> > 15:22:05 thinkpad kernel: Freezing user space processes ...
> > (elapsed 0.001 seconds) done.
> > Nov 22 15:22:05 thinkpad kernel: OOM killer disabled.
> > Nov 22 15:22:05 thinkpad kernel: Freezing remaining freezable tasks
> > ... (elapsed 0.001 seconds) done.
> > Nov 22 15:22:05 thinkpad kernel: printk: Suspending console(s) (use
> > no_console_suspend to debug) Nov 22 15:22:05 thinkpad kernel:
> > [ cut here ] Nov 22 15:22:05 thinkpad kernel:
> > RPM wakelock ref not held during HW access Nov 22 15:22:05 thinkpad
> > kernel: WARNING: CPU: 10 PID: 519259 at
> > drivers/gpu/drm/i915/intel_runtime_pm.h:112
> > fwtable_write32+0x1cb/0x200 [i915]
> > Nov 22 15:22:05 thinkpad kernel: Modules linked in: cdc_mbim cdc_wdm
> > cdc_ncm cdc_ether usbnet mii snd_seq_dummy snd_hrtimer snd_seq
> > snd_seq_device rfcomm cmac algif_skcipher bnep uvcvideo
> > videobuf2_vmalloc videobuf2_memops videobuf2_v4l2 btusb
> > videobuf2_common btintel blue> Nov 22 15:22:05 thinkpad kernel:
> > i2c_designware_platform i2c_designware_core mei_pxp mei_hdcp ac97_bus
> > kvm_intel snd_hda_intel snd_intel_dspcfg intel_rapl_msr think_lmi
> > snd_intel_sdw_acpi i915 firmware_attributes_class wmi_bmof
> > snd_hda_codec kvm i2c_algo_bit snd_hwdep int> Nov 22 15:22:05 thinkpad
> > kernel: CPU: 10 PID: 519259 Comm:
> > systemd-sleep Tainted: G S   U5.16.0-rc1+ #192
> > Nov 22 15:22:05 thinkpad kernel: Hardware name: LENOVO
> > 20Y5CTO1WW/20Y5CTO1WW, BIOS N40ET28W (1.10 ) 09/09/2021 Nov 22
> > 15:22:05 thinkpad kernel: RIP: 0010:fwtable_write32+0x1cb/0x200 [i915]
> > Nov 22 15:22:05 thinkpad kernel: Code: 21 cb df 0f 0b e9 85 fe ff ff
> > 80 3d 36 68 1f 00 00 0f 85 82 fe ff ff 48 c7 c7 70 cf c4 a1 c6 05 22
> > 68 1f 00 01 e8 1c 21 cb df <0f> 0b e9 68 fe ff ff 48 8b bb 40 01 00 00
> > e8 a2 cf ce df b9 01 00
> > Nov 22 15:22:05 thinkpad kernel: RSP: 0018:88821d283c80 EFLAGS:
> > 00010282 Nov 22 15:22:05 thinkpad kernel: RAX: 002a RBX:
> > 88813df707d0 RCX: 0027 Nov 22 15:22:05 thinkpad
> > kernel: RDX: 88901f69b448 RSI:
> > 0001 RDI: 88901f69b440 Nov 22 15:22:05 thinkpad
> > kernel: RBP: 000320f0 R08:
> > 0d17 R09: 88821d283c20 Nov 22 15:22:05 thinkpad
> > kernel: R10: 3fff R11:
> > fff93a78 R12: 4000 Nov 22 15:22:05 thinkpad
> > kernel: R13:  R14:
> > 888101311150 R15: 81491b20 Nov 22 15:22:05 thinkpad
> > kernel: FS:  7efcfaa87800()
> > GS:88901f68() knlGS: Nov 22 15:22:05
> > thinkpad kernel: CS:  0010 DS:  ES:  CR0:
> > 80050033
> > Nov 22 15:22:05 thinkpad kernel: CR2: 7efcfb41e6f0 CR3:
> > 0005ed937004 CR4: 00770ee0 Nov 22 15:22:05 thinkpad
> > kernel: PKRU: 5554 Nov 22 15:22:05 thinkpad kernel: Call Trace:
> > Nov 22 15:22:05 thinkpad kernel:   Nov 22 15:22:05 thinkpad
> > kernel:  intel_pxp_fini_hw+0x23/0x30 [i915] Nov 22 15:22:05 thinkpad
> > kernel:  intel_pxp_suspend+0x2f/0x40 [i915] Nov 22 15:22:05 thinkpad
> > kernel:  i915_gem_backup_suspend+0x6e/0x150 [i915] Nov 22 15:22:05
> > thinkpad kernel:  ? pci_target_state+0xc/0xc0 Nov 22 15:22:05 thinkpad
> > kernel:  pci_pm_prepare+0x28/0x60 Nov 22 15:22:05 thinkpad kernel:
> > dpm_prepare+0xbd/0x370 Nov 22 15:22:05 thinkpad kernel:
> > dpm_suspend_start+0x16/0x80 Nov 22 15:22:05 thinkpad kernel:
> > suspend_devices_and_enter+0x104/0x6d0
> > Nov 22 15:22:05 thinkpad kernel:  pm_suspend.cold+0x2f6/0x33d Nov 22
> > 15:22:05 thinkpad kernel:  state_store+0x6b/0xe0 Nov 22 15:22:05
> > thinkpad kernel:  kernfs_fop_write_iter+0x107/0x190 Nov 22 15:22:05
> > thinkpad kernel:  new_sync_write+0x100/0x170 Nov 22 15:22:05 thinkpad
> > kernel:  vfs_write+0x1c5/0x260 Nov 22 15:22:05 thinkpad kernel:
> > ksys_write+0x4a/0xc0 Nov 22 15:22:05 thinkpad kernel:
> > 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Skip remap_io_mapping() for non-x86 platforms (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Skip remap_io_mapping() for non-x86 platforms (rev3)
URL   : https://patchwork.freedesktop.org/series/96855/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Skip remap_io_mapping() for non-x86 platforms (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Skip remap_io_mapping() for non-x86 platforms (rev3)
URL   : https://patchwork.freedesktop.org/series/96855/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
235bc0244f4a drm/i915: Skip remap_io_mapping() for non-x86 platforms
-:57: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#57: 
new file mode 100644

-:78: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#78: FILE: drivers/gpu/drm/i915/i915_mm.h:17:
+int remap_io_mapping(struct vm_area_struct *vma,
+   unsigned long addr, unsigned long pfn, unsigned long size,

-:82: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#82: FILE: drivers/gpu/drm/i915/i915_mm.h:21:
+static inline int remap_io_mapping(struct vm_area_struct *vma,
+   unsigned long addr, unsigned long pfn, unsigned long size,

total: 0 errors, 1 warnings, 2 checks, 60 lines checked

Re: [Intel-gfx] [PATCH V4] drm/i915/gt: Hold RPM wakelock during PXP suspend

[Daniele Ceraolo Spurio]

On 11/18/2021 11:35 AM, Daniele Ceraolo Spurio wrote:



On 11/16/2021 10:03 PM, Tejas Upadhyay wrote:

selftest --r live shows failure in suspend tests when
RPM wakelock is not acquired during suspend.

This changes addresses below error :
<4> [154.177535] RPM wakelock ref not held during HW access
<4> [154.177575] WARNING: CPU: 4 PID: 5772 at
drivers/gpu/drm/i915/intel_runtime_pm.h:113
fwtable_write32+0x240/0x320 [i915]
<4> [154.177974] Modules linked in: i915(+) vgem drm_shmem_helper
fuse snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic
ledtrig_audio mei_hdcp mei_pxp x86_pkg_temp_thermal coretemp
crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_intel_dspcfg
snd_hda_codec snd_hwdep igc snd_hda_core ttm mei_me ptp
snd_pcm prime_numbers mei i2c_i801 pps_core i2c_smbus intel_lpss_pci
btusb btrtl btbcm btintel bluetooth ecdh_generic ecc [last unloaded: 
i915]

<4> [154.178143] CPU: 4 PID: 5772 Comm: i915_selftest Tainted: G
U    5.15.0-rc6-CI-Patchwork_21432+ #1
<4> [154.178154] Hardware name: ASUS System Product Name/TUF GAMING
Z590-PLUS WIFI, BIOS 0811 04/06/2021
<4> [154.178160] RIP: 0010:fwtable_write32+0x240/0x320 [i915]
<4> [154.178604] Code: 15 7b e1 0f 0b e9 34 fe ff ff 80 3d a9 89 31
00 00 0f 85 31 fe ff ff 48 c7 c7 88 9e 4f a0 c6 05 95 89 31 00 01 e8
c0 15 7b e1 <0f> 0b e9 17 fe ff ff 8b 05 0f 83 58 e2 85 c0 0f 85 8d
00 00 00 48
<4> [154.178614] RSP: 0018:c900016279f0 EFLAGS: 00010286
<4> [154.178626] RAX:  RBX: 888204fe0ee0
RCX: 0001
<4> [154.178634] RDX: 8001 RSI: 823142b5
RDI: 
<4> [154.178641] RBP: 000320f0 R08: 
R09: c000cd5a
<4> [154.178647] R10: 000f8c90 R11: c90001627808
R12: 
<4> [154.178654] R13: 4000 R14: a04d12e0
R15: 
<4> [154.178660] FS:  7f7390aa4c00() GS:88844f00()
knlGS:
<4> [154.178669] CS:  0010 DS:  ES:  CR0: 80050033
<4> [154.178675] CR2: 55bc40595028 CR3: 000204474005
CR4: 00770ee0
<4> [154.178682] PKRU: 5554
<4> [154.178687] Call Trace:
<4> [154.178706]  intel_pxp_fini_hw+0x23/0x30 [i915]
<4> [154.179284]  intel_pxp_suspend+0x1f/0x30 [i915]
<4> [154.179807]  live_gt_resume+0x5b/0x90 [i915]

Changes since V2 :
- Remove boolean in intel_pxp_runtime_preapre for
  non-pxp configs. Solves build error
Changes since V2 :
- Open-code intel_pxp_runtime_suspend - Daniele
- Remove boolean in intel_pxp_runtime_preapre - Daniele
Changes since V1 :
- split the HW access parts in gt_suspend_late - Daniele
- Remove default PXP configs



Just realized this is also missing a fixes tag:

Fixes: 0cfab4cb3c4e ("drm/i915/pxp: Enable PXP power management")

Daniele

Signed-off-by: Tejas Upadhyay 



Reviewed-by: Daniele Ceraolo Spurio 

Can you send a trybot with the PXP config enabled before we merge 
this, just to make sure the issue is gone?


Thanks,
Daniele


---
  drivers/gpu/drm/i915/gt/intel_gt_pm.c   |  7 +++--
  drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 37 +
  drivers/gpu/drm/i915/pxp/intel_pxp_pm.h | 19 +++--
  3 files changed, 46 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c 
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c

index b4a8594bc46c..c0fa41e4c803 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -303,7 +303,7 @@ void intel_gt_suspend_prepare(struct intel_gt *gt)
  user_forcewake(gt, true);
  wait_for_suspend(gt);
  -    intel_pxp_suspend(>pxp, false);
+    intel_pxp_suspend_prepare(>pxp);
  }
    static suspend_state_t pm_suspend_target(void)
@@ -328,6 +328,7 @@ void intel_gt_suspend_late(struct intel_gt *gt)
  GEM_BUG_ON(gt->awake);
    intel_uc_suspend(>uc);
+    intel_pxp_suspend(>pxp);
    /*
   * On disabling the device, we want to turn off HW access to 
memory

@@ -355,7 +356,7 @@ void intel_gt_suspend_late(struct intel_gt *gt)
    void intel_gt_runtime_suspend(struct intel_gt *gt)
  {
-    intel_pxp_suspend(>pxp, true);
+    intel_pxp_runtime_suspend(>pxp);
  intel_uc_runtime_suspend(>uc);
    GT_TRACE(gt, "\n");
@@ -373,7 +374,7 @@ int intel_gt_runtime_resume(struct intel_gt *gt)
  if (ret)
  return ret;
  -    intel_pxp_resume(>pxp);
+    intel_pxp_runtime_resume(>pxp);
    return 0;
  }
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c 
b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c

index 23fd86de5a24..6a7d4e2ee138 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
@@ -7,26 +7,29 @@
  #include "intel_pxp_irq.h"
  #include "intel_pxp_pm.h"
  #include "intel_pxp_session.h"
+#include "i915_drv.h"
  -void intel_pxp_suspend(struct intel_pxp *pxp, bool runtime)
+void intel_pxp_suspend_prepare(struct intel_pxp *pxp)
  {
  if (!intel_pxp_is_enabled(pxp))
  return;
    

Re: [Intel-gfx] RPM raw-wakeref not held in intel_pxp_fini_hw

[Daniele Ceraolo Spurio]

Hi,

The fix for this is in flight:

https://patchwork.freedesktop.org/series/96658/

It just needs a last round of testing before we merge it.

Thanks,
Daniele

On 11/22/2021 8:47 AM, Jason A. Donenfeld wrote:

Hey Intel PXPers,

I hit this splat on 5.16-rc1 during system suspend:

Nov 22 13:54:09 thinkpad systemd-logind[934]: Lid closed.
Nov 22 13:54:09 thinkpad systemd[1]: Reached target Sleep.
Nov 22 13:54:09 thinkpad systemd[1]: Starting System Suspend...
Nov 22 13:54:09 thinkpad systemd-sleep[519259]: Entering sleep state
'suspend'...
Nov 22 13:54:09 thinkpad kernel: PM: suspend entry (s2idle)
Nov 22 15:22:05 thinkpad kernel: Filesystems sync: 0.124 seconds
Nov 22 15:22:05 thinkpad kernel: Freezing user space processes ...
(elapsed 0.001 seconds) done.
Nov 22 15:22:05 thinkpad kernel: OOM killer disabled.
Nov 22 15:22:05 thinkpad kernel: Freezing remaining freezable tasks
... (elapsed 0.001 seconds) done.
Nov 22 15:22:05 thinkpad kernel: printk: Suspending console(s) (use
no_console_suspend to debug)
Nov 22 15:22:05 thinkpad kernel: [ cut here ]
Nov 22 15:22:05 thinkpad kernel: RPM wakelock ref not held during HW access
Nov 22 15:22:05 thinkpad kernel: WARNING: CPU: 10 PID: 519259 at
drivers/gpu/drm/i915/intel_runtime_pm.h:112
fwtable_write32+0x1cb/0x200 [i915]
Nov 22 15:22:05 thinkpad kernel: Modules linked in: cdc_mbim cdc_wdm
cdc_ncm cdc_ether usbnet mii snd_seq_dummy snd_hrtimer snd_seq
snd_seq_device rfcomm cmac algif_skcipher bnep uvcvideo
videobuf2_vmalloc videobuf2_memops videobuf2_v4l2 btusb
videobuf2_common btintel blue>
Nov 22 15:22:05 thinkpad kernel:  i2c_designware_platform
i2c_designware_core mei_pxp mei_hdcp ac97_bus kvm_intel snd_hda_intel
snd_intel_dspcfg intel_rapl_msr think_lmi snd_intel_sdw_acpi i915
firmware_attributes_class wmi_bmof snd_hda_codec kvm i2c_algo_bit
snd_hwdep int>
Nov 22 15:22:05 thinkpad kernel: CPU: 10 PID: 519259 Comm:
systemd-sleep Tainted: G S   U5.16.0-rc1+ #192
Nov 22 15:22:05 thinkpad kernel: Hardware name: LENOVO
20Y5CTO1WW/20Y5CTO1WW, BIOS N40ET28W (1.10 ) 09/09/2021
Nov 22 15:22:05 thinkpad kernel: RIP: 0010:fwtable_write32+0x1cb/0x200 [i915]
Nov 22 15:22:05 thinkpad kernel: Code: 21 cb df 0f 0b e9 85 fe ff ff
80 3d 36 68 1f 00 00 0f 85 82 fe ff ff 48 c7 c7 70 cf c4 a1 c6 05 22
68 1f 00 01 e8 1c 21 cb df <0f> 0b e9 68 fe ff ff 48 8b bb 40 01 00 00
e8 a2 cf ce df b9 01 00
Nov 22 15:22:05 thinkpad kernel: RSP: 0018:88821d283c80 EFLAGS: 00010282
Nov 22 15:22:05 thinkpad kernel: RAX: 002a RBX:
88813df707d0 RCX: 0027
Nov 22 15:22:05 thinkpad kernel: RDX: 88901f69b448 RSI:
0001 RDI: 88901f69b440
Nov 22 15:22:05 thinkpad kernel: RBP: 000320f0 R08:
0d17 R09: 88821d283c20
Nov 22 15:22:05 thinkpad kernel: R10: 3fff R11:
fff93a78 R12: 4000
Nov 22 15:22:05 thinkpad kernel: R13:  R14:
888101311150 R15: 81491b20
Nov 22 15:22:05 thinkpad kernel: FS:  7efcfaa87800()
GS:88901f68() knlGS:
Nov 22 15:22:05 thinkpad kernel: CS:  0010 DS:  ES:  CR0:
80050033
Nov 22 15:22:05 thinkpad kernel: CR2: 7efcfb41e6f0 CR3:
0005ed937004 CR4: 00770ee0
Nov 22 15:22:05 thinkpad kernel: PKRU: 5554
Nov 22 15:22:05 thinkpad kernel: Call Trace:
Nov 22 15:22:05 thinkpad kernel:  
Nov 22 15:22:05 thinkpad kernel:  intel_pxp_fini_hw+0x23/0x30 [i915]
Nov 22 15:22:05 thinkpad kernel:  intel_pxp_suspend+0x2f/0x40 [i915]
Nov 22 15:22:05 thinkpad kernel:  i915_gem_backup_suspend+0x6e/0x150 [i915]
Nov 22 15:22:05 thinkpad kernel:  ? pci_target_state+0xc/0xc0
Nov 22 15:22:05 thinkpad kernel:  pci_pm_prepare+0x28/0x60
Nov 22 15:22:05 thinkpad kernel:  dpm_prepare+0xbd/0x370
Nov 22 15:22:05 thinkpad kernel:  dpm_suspend_start+0x16/0x80
Nov 22 15:22:05 thinkpad kernel:  suspend_devices_and_enter+0x104/0x6d0
Nov 22 15:22:05 thinkpad kernel:  pm_suspend.cold+0x2f6/0x33d
Nov 22 15:22:05 thinkpad kernel:  state_store+0x6b/0xe0
Nov 22 15:22:05 thinkpad kernel:  kernfs_fop_write_iter+0x107/0x190
Nov 22 15:22:05 thinkpad kernel:  new_sync_write+0x100/0x170
Nov 22 15:22:05 thinkpad kernel:  vfs_write+0x1c5/0x260
Nov 22 15:22:05 thinkpad kernel:  ksys_write+0x4a/0xc0
Nov 22 15:22:05 thinkpad kernel:  do_syscall_64+0x35/0x80
Nov 22 15:22:05 thinkpad kernel:  entry_SYSCALL_64_after_hwframe+0x44/0xae
Nov 22 15:22:05 thinkpad kernel: RIP: 0033:0x7efcfb27ccb3
Nov 22 15:22:05 thinkpad kernel: Code: 8b 15 81 11 0f 00 f7 d8 64 89
02 48 c7 c0 ff ff ff ff eb b7 0f 1f 00 64 8b 04 25 18 00 00 00 85 c0
75 14 b8 01 00 00 00 0f 05 <48> 3d 00 f0 ff ff 77 55 c3 0f 1f 40 00 48
83 ec 28 48 89 54 24 18
Nov 22 15:22:05 thinkpad kernel: RSP: 002b:7fff279a5308 EFLAGS:
0246 ORIG_RAX: 0001
Nov 22 15:22:05 thinkpad kernel: RAX: ffda RBX:
0004 RCX: 7efcfb27ccb3
Nov 22 15:22:05 thinkpad kernel: RDX: 0004 RSI:
7fff279a5400 RDI: 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()
URL   : https://patchwork.freedesktop.org/series/97151/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10911_full -> Patchwork_21650_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Known issues


  Here are the changes found in Patchwork_21650_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-glk:  ([FAIL][1], [PASS][2], [PASS][3], [PASS][4], 
[PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], 
[PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], 
[PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], 
[PASS][24], [PASS][25]) ([i915#4392]) -> ([PASS][26], [PASS][27], [PASS][28], 
[PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], 
[PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], 
[PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], 
[PASS][47], [PASS][48], [PASS][49], [PASS][50])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk2/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk2/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk8/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk1/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk1/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk1/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk2/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk2/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk2/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk3/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk3/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk3/boot.html
   [36]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk4/boot.html
   [37]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk4/boot.html
   [38]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk4/boot.html
   [39]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk5/boot.html
   [40]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk5/boot.html
   [41]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk6/boot.html
   [42]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk6/boot.html
   [43]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk6/boot.html
   [44]: 

[Intel-gfx] RPM raw-wakeref not held in intel_pxp_fini_hw

[Jason A. Donenfeld]

Hey Intel PXPers,

I hit this splat on 5.16-rc1 during system suspend:

Nov 22 13:54:09 thinkpad systemd-logind[934]: Lid closed.
Nov 22 13:54:09 thinkpad systemd[1]: Reached target Sleep.
Nov 22 13:54:09 thinkpad systemd[1]: Starting System Suspend...
Nov 22 13:54:09 thinkpad systemd-sleep[519259]: Entering sleep state
'suspend'...
Nov 22 13:54:09 thinkpad kernel: PM: suspend entry (s2idle)
Nov 22 15:22:05 thinkpad kernel: Filesystems sync: 0.124 seconds
Nov 22 15:22:05 thinkpad kernel: Freezing user space processes ...
(elapsed 0.001 seconds) done.
Nov 22 15:22:05 thinkpad kernel: OOM killer disabled.
Nov 22 15:22:05 thinkpad kernel: Freezing remaining freezable tasks
... (elapsed 0.001 seconds) done.
Nov 22 15:22:05 thinkpad kernel: printk: Suspending console(s) (use
no_console_suspend to debug)
Nov 22 15:22:05 thinkpad kernel: [ cut here ]
Nov 22 15:22:05 thinkpad kernel: RPM wakelock ref not held during HW access
Nov 22 15:22:05 thinkpad kernel: WARNING: CPU: 10 PID: 519259 at
drivers/gpu/drm/i915/intel_runtime_pm.h:112
fwtable_write32+0x1cb/0x200 [i915]
Nov 22 15:22:05 thinkpad kernel: Modules linked in: cdc_mbim cdc_wdm
cdc_ncm cdc_ether usbnet mii snd_seq_dummy snd_hrtimer snd_seq
snd_seq_device rfcomm cmac algif_skcipher bnep uvcvideo
videobuf2_vmalloc videobuf2_memops videobuf2_v4l2 btusb
videobuf2_common btintel blue>
Nov 22 15:22:05 thinkpad kernel:  i2c_designware_platform
i2c_designware_core mei_pxp mei_hdcp ac97_bus kvm_intel snd_hda_intel
snd_intel_dspcfg intel_rapl_msr think_lmi snd_intel_sdw_acpi i915
firmware_attributes_class wmi_bmof snd_hda_codec kvm i2c_algo_bit
snd_hwdep int>
Nov 22 15:22:05 thinkpad kernel: CPU: 10 PID: 519259 Comm:
systemd-sleep Tainted: G S   U5.16.0-rc1+ #192
Nov 22 15:22:05 thinkpad kernel: Hardware name: LENOVO
20Y5CTO1WW/20Y5CTO1WW, BIOS N40ET28W (1.10 ) 09/09/2021
Nov 22 15:22:05 thinkpad kernel: RIP: 0010:fwtable_write32+0x1cb/0x200 [i915]
Nov 22 15:22:05 thinkpad kernel: Code: 21 cb df 0f 0b e9 85 fe ff ff
80 3d 36 68 1f 00 00 0f 85 82 fe ff ff 48 c7 c7 70 cf c4 a1 c6 05 22
68 1f 00 01 e8 1c 21 cb df <0f> 0b e9 68 fe ff ff 48 8b bb 40 01 00 00
e8 a2 cf ce df b9 01 00
Nov 22 15:22:05 thinkpad kernel: RSP: 0018:88821d283c80 EFLAGS: 00010282
Nov 22 15:22:05 thinkpad kernel: RAX: 002a RBX:
88813df707d0 RCX: 0027
Nov 22 15:22:05 thinkpad kernel: RDX: 88901f69b448 RSI:
0001 RDI: 88901f69b440
Nov 22 15:22:05 thinkpad kernel: RBP: 000320f0 R08:
0d17 R09: 88821d283c20
Nov 22 15:22:05 thinkpad kernel: R10: 3fff R11:
fff93a78 R12: 4000
Nov 22 15:22:05 thinkpad kernel: R13:  R14:
888101311150 R15: 81491b20
Nov 22 15:22:05 thinkpad kernel: FS:  7efcfaa87800()
GS:88901f68() knlGS:
Nov 22 15:22:05 thinkpad kernel: CS:  0010 DS:  ES:  CR0:
80050033
Nov 22 15:22:05 thinkpad kernel: CR2: 7efcfb41e6f0 CR3:
0005ed937004 CR4: 00770ee0
Nov 22 15:22:05 thinkpad kernel: PKRU: 5554
Nov 22 15:22:05 thinkpad kernel: Call Trace:
Nov 22 15:22:05 thinkpad kernel:  
Nov 22 15:22:05 thinkpad kernel:  intel_pxp_fini_hw+0x23/0x30 [i915]
Nov 22 15:22:05 thinkpad kernel:  intel_pxp_suspend+0x2f/0x40 [i915]
Nov 22 15:22:05 thinkpad kernel:  i915_gem_backup_suspend+0x6e/0x150 [i915]
Nov 22 15:22:05 thinkpad kernel:  ? pci_target_state+0xc/0xc0
Nov 22 15:22:05 thinkpad kernel:  pci_pm_prepare+0x28/0x60
Nov 22 15:22:05 thinkpad kernel:  dpm_prepare+0xbd/0x370
Nov 22 15:22:05 thinkpad kernel:  dpm_suspend_start+0x16/0x80
Nov 22 15:22:05 thinkpad kernel:  suspend_devices_and_enter+0x104/0x6d0
Nov 22 15:22:05 thinkpad kernel:  pm_suspend.cold+0x2f6/0x33d
Nov 22 15:22:05 thinkpad kernel:  state_store+0x6b/0xe0
Nov 22 15:22:05 thinkpad kernel:  kernfs_fop_write_iter+0x107/0x190
Nov 22 15:22:05 thinkpad kernel:  new_sync_write+0x100/0x170
Nov 22 15:22:05 thinkpad kernel:  vfs_write+0x1c5/0x260
Nov 22 15:22:05 thinkpad kernel:  ksys_write+0x4a/0xc0
Nov 22 15:22:05 thinkpad kernel:  do_syscall_64+0x35/0x80
Nov 22 15:22:05 thinkpad kernel:  entry_SYSCALL_64_after_hwframe+0x44/0xae
Nov 22 15:22:05 thinkpad kernel: RIP: 0033:0x7efcfb27ccb3
Nov 22 15:22:05 thinkpad kernel: Code: 8b 15 81 11 0f 00 f7 d8 64 89
02 48 c7 c0 ff ff ff ff eb b7 0f 1f 00 64 8b 04 25 18 00 00 00 85 c0
75 14 b8 01 00 00 00 0f 05 <48> 3d 00 f0 ff ff 77 55 c3 0f 1f 40 00 48
83 ec 28 48 89 54 24 18
Nov 22 15:22:05 thinkpad kernel: RSP: 002b:7fff279a5308 EFLAGS:
0246 ORIG_RAX: 0001
Nov 22 15:22:05 thinkpad kernel: RAX: ffda RBX:
0004 RCX: 7efcfb27ccb3
Nov 22 15:22:05 thinkpad kernel: RDX: 0004 RSI:
7fff279a5400 RDI: 0004
Nov 22 15:22:05 thinkpad kernel: RBP: 5571997e72d0 R08:
0007 R09: 5571997eb4a0
Nov 22 15:22:05 thinkpad kernel: R10: 11500bc5676901a3 R11:
0246 R12: 0004
Nov 22 

Re: [Intel-gfx] [PATCH v6 2/4] drm/i915: Use __GFP_KSWAPD_RECLAIM in the capture code

[Ramalingam C]

On 2021-11-08 at 18:45:45 +0100, Thomas Hellström wrote:
> The capture code is typically run entirely in the fence signalling
> critical path. We're about to add lockdep annotation in an upcoming patch
> which reveals a lockdep splat similar to the below one.
> 
> Fix the associated potential deadlocks using __GFP_KSWAPD_RECLAIM
> (which is the same as GFP_WAIT, but open-coded for clarity) rather than
> GFP_KERNEL for memory allocation in the capture path. This has the
> potential drawback that capture might fail in situations with memory
> pressure.
> 
> [  234.842048] WARNING: possible circular locking dependency detected
> [  234.842050] 5.15.0-rc7+ #20 Tainted: G U  W
> [  234.842052] --
> [  234.842054] gem_exec_captur/1180 is trying to acquire lock:
> [  234.842056] a3e51c00 (fs_reclaim){+.+.}-{0:0}, at: 
> __kmalloc+0x4d/0x330
> [  234.842063]
>but task is already holding lock:
> [  234.842064] a3f57620 (dma_fence_map){}-{0:0}, at: 
> i915_vma_snapshot_resource_pin+0x27/0x30 [i915]
> [  234.842138]
>which lock already depends on the new lock.
> 
> [  234.842140]
>the existing dependency chain (in reverse order) is:
> [  234.842142]
>-> #2 (dma_fence_map){}-{0:0}:
> [  234.842145]__dma_fence_might_wait+0x41/0xa0
> [  234.842149]dma_resv_lockdep+0x1dc/0x28f
> [  234.842151]do_one_initcall+0x58/0x2d0
> [  234.842154]kernel_init_freeable+0x273/0x2bf
> [  234.842157]kernel_init+0x16/0x120
> [  234.842160]ret_from_fork+0x1f/0x30
> [  234.842163]
>-> #1 (mmu_notifier_invalidate_range_start){+.+.}-{0:0}:
> [  234.842166]fs_reclaim_acquire+0x6d/0xd0
> [  234.842168]__kmalloc_node+0x51/0x3a0
> [  234.842171]alloc_cpumask_var_node+0x1b/0x30
> [  234.842174]native_smp_prepare_cpus+0xc7/0x292
> [  234.842177]kernel_init_freeable+0x160/0x2bf
> [  234.842179]kernel_init+0x16/0x120
> [  234.842181]ret_from_fork+0x1f/0x30
> [  234.842184]
>-> #0 (fs_reclaim){+.+.}-{0:0}:
> [  234.842186]__lock_acquire+0x1161/0x1dc0
> [  234.842189]lock_acquire+0xb5/0x2b0
> [  234.842192]fs_reclaim_acquire+0xa1/0xd0
> [  234.842193]__kmalloc+0x4d/0x330
> [  234.842196]i915_vma_coredump_create+0x78/0x5b0 [i915]
> [  234.842253]intel_engine_coredump_add_vma+0x36/0xe0 [i915]
> [  234.842307]__i915_gpu_coredump+0x290/0x5e0 [i915]
> [  234.842365]i915_capture_error_state+0x57/0xa0 [i915]
> [  234.842415]intel_gt_handle_error+0x348/0x3e0 [i915]
> [  234.842462]intel_gt_debugfs_reset_store+0x3c/0x90 [i915]
> [  234.842504]simple_attr_write+0xc1/0xe0
> [  234.842507]full_proxy_write+0x53/0x80
> [  234.842509]vfs_write+0xbc/0x350
> [  234.842513]ksys_write+0x58/0xd0
> [  234.842514]do_syscall_64+0x38/0x90
> [  234.842516]entry_SYSCALL_64_after_hwframe+0x44/0xae
> [  234.842519]
>other info that might help us debug this:
> 
> [  234.842521] Chain exists of:
>  fs_reclaim --> mmu_notifier_invalidate_range_start --> 
> dma_fence_map
> 
> [  234.842526]  Possible unsafe locking scenario:
> 
> [  234.842528]CPU0CPU1
> [  234.842529]
> [  234.842531]   lock(dma_fence_map);
> [  234.842532]
> lock(mmu_notifier_invalidate_range_start);
> [  234.842535]lock(dma_fence_map);
> [  234.842537]   lock(fs_reclaim);
> [  234.842539]
> *** DEADLOCK ***
> 
> [  234.842540] 4 locks held by gem_exec_captur/1180:
> [  234.842543]  #0: 9007812d9460 (sb_writers#17){.+.+}-{0:0}, at: 
> ksys_write+0x58/0xd0
> [  234.842547]  #1: 900781d9ecb8 (>mutex){+.+.}-{3:3}, at: 
> simple_attr_write+0x3a/0xe0
> [  234.842552]  #2: c11913a8 (capture_mutex){+.+.}-{3:3}, at: 
> i915_capture_error_state+0x1a/0xa0 [i915]
> [  234.842602]  #3: a3f57620 (dma_fence_map){}-{0:0}, at: 
> i915_vma_snapshot_resource_pin+0x27/0x30 [i915]
> [  234.842656]
>stack backtrace:
> [  234.842658] CPU: 0 PID: 1180 Comm: gem_exec_captur Tainted: G U  W 
> 5.15.0-rc7+ #20
> [  234.842661] Hardware name: ASUS System Product Name/PRIME B560M-A AC, BIOS 
> 0403 01/26/2021
> [  234.842664] Call Trace:
> [  234.842666]  dump_stack_lvl+0x57/0x72
> [  234.842669]  check_noncircular+0xde/0x100
> [  234.842672]  ? __lock_acquire+0x3bf/0x1dc0
> [  234.842675]  __lock_acquire+0x1161/0x1dc0
> [  234.842678]  lock_acquire+0xb5/0x2b0
> [  234.842680]  ? __kmalloc+0x4d/0x330
> [  234.842683]  ? finish_task_switch.isra.0+0xf2/0x360
> [  234.842686]  ? i915_vma_coredump_create+0x78/0x5b0 [i915]
> [  234.842734]  fs_reclaim_acquire+0xa1/0xd0
> [  234.842737]  ? __kmalloc+0x4d/0x330
> [  

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ttm: Async migration (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Async migration (rev7)
URL   : https://patchwork.freedesktop.org/series/96798/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10913 -> Patchwork_21651


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/index.html

Participating hosts (43 -> 34)
--

  Missing(9): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-icl-u2 fi-bsw-cyan 
bat-adlp-6 bat-adlp-4 bat-jsl-2 bat-jsl-1 

Known issues


  Here are the changes found in Patchwork_21651 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u:   NOTRUN -> [SKIP][1] ([fdo#109271]) +31 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-1115g4:  [PASS][2] -> [FAIL][3] ([i915#1888])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
- fi-skl-6600u:   [PASS][4] -> [INCOMPLETE][5] ([i915#4547])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-skl-6600u/igt@gem_exec_susp...@basic-s3.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-skl-6600u/igt@gem_exec_susp...@basic-s3.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u:   NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html

  * igt@runner@aborted:
- fi-skl-6600u:   NOTRUN -> [FAIL][7] ([i915#2722] / [i915#3363] / 
[i915#4312])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-skl-6600u/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0:
- fi-glk-dsi: [DMESG-WARN][8] ([i915#2943]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-glk-dsi/igt@gem_exec_susp...@basic-s0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-glk-dsi/igt@gem_exec_susp...@basic-s0.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [DMESG-FAIL][10] ([i915#295]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   [DMESG-WARN][12] ([i915#295]) -> [PASS][13] +10 
similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943
  [i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547


Build changes
-

  * Linux: CI_DRM_10913 -> Patchwork_21651

  CI-20190529: 20190529
  CI_DRM_10913: 2350312b9d034c596a510f1eabff0f74de5f2ab7 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6286: cdcbf81f734fdb1d102e84490e49e9fec23760cd @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21651: 5259cbae353e9edd51ac80a7721d10624f04ae9c @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5259cbae353e drm/i915/ttm: Update i915_gem_obj_copy_ttm() to be asynchronous
e133b2236211 drm/i915/ttm: Implement asynchronous TTM moves
0e5dbd15f6bf drm/i915/ttm: Correctly handle waiting for gpu when shrinking
aa379114fb27 drm/i915/ttm: Drop region reference counting
ae72d5add158 drm/i915/ttm: Move the i915_gem_obj_copy_ttm() function
afc130e0c643 drm/i915: Add support for moving fence waiting

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/index.html

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/dsi: split out intel_dsi_vbt.h

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/dsi: split out intel_dsi_vbt.h
URL   : https://patchwork.freedesktop.org/series/97162/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10914 -> Patchwork_21654


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/index.html

Participating hosts (41 -> 36)
--

  Additional (1): fi-tgl-1115g4 
  Missing(6): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-6 bat-jsl-2 
bat-jsl-1 

Known issues


  Here are the changes found in Patchwork_21654 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@query-info:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][1] ([fdo#109315])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@amdgpu/amd_ba...@query-info.html

  * igt@amdgpu/amd_basic@semaphore:
- fi-bsw-nick:NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-bsw-nick/igt@amdgpu/amd_ba...@semaphore.html

  * igt@amdgpu/amd_cs_nop@nop-gfx0:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][3] ([fdo#109315] / [i915#2575]) +16 
similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@amdgpu/amd_cs_...@nop-gfx0.html

  * igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2:  [PASS][4] -> [INCOMPLETE][5] ([i915#4006])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html

  * igt@gem_huc_copy@huc-copy:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][7] ([i915#4555])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][8] ([i915#4555] / [i915#4565]) +2 
similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@gem_lmem_swapp...@verify-random.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][9] ([i915#1155])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[PASS][10] -> [INCOMPLETE][11] ([i915#3921])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][12] ([fdo#111827]) +8 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][13] ([i915#4103]) +1 similar issue
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][14] ([fdo#109285])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2:  [PASS][15] -> [DMESG-WARN][16] ([i915#4269])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html

  * igt@kms_psr@primary_mmap_gtt:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][17] ([i915#1072]) +3 similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html

  * igt@kms_psr@primary_page_flip:
- fi-skl-6600u:   [PASS][18] -> [FAIL][19] ([i915#4547])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10914/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  * igt@prime_vgem@basic-userptr:
- fi-tgl-1115g4:  NOTRUN -> [SKIP][20] ([i915#3301])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21654/fi-tgl-1115g4/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-skl-6600u:   NOTRUN -> 

Re: [Intel-gfx] [PATCH 1/4] drm/i915/dsi: split out intel_dsi_vbt.h

[Hans de Goede]

Hi,

On 11/22/21 12:15, Jani Nikula wrote:
> Follow the convention of corresponding .h for .c.
> 
> Signed-off-by: Jani Nikula 

This series looks good to me:

Reviewed-by: Hans de Goede 

For the series.

Regards,

Hans

> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c   |  1 +
>  drivers/gpu/drm/i915/display/intel_dsi.h |  9 
>  drivers/gpu/drm/i915/display/intel_dsi_vbt.c |  1 +
>  drivers/gpu/drm/i915/display/intel_dsi_vbt.h | 22 
>  drivers/gpu/drm/i915/display/vlv_dsi.c   |  1 +
>  5 files changed, 25 insertions(+), 9 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_dsi_vbt.h
> 
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index edc38fbd2545..2f15b322d78f 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -36,6 +36,7 @@
>  #include "intel_ddi.h"
>  #include "intel_de.h"
>  #include "intel_dsi.h"
> +#include "intel_dsi_vbt.h"
>  #include "intel_panel.h"
>  #include "intel_vdsc.h"
>  #include "skl_scaler.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h 
> b/drivers/gpu/drm/i915/display/intel_dsi.h
> index fbc40ffdc02e..e3571ca7db5c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsi.h
> @@ -210,13 +210,4 @@ void bxt_dsi_reset_clocks(struct intel_encoder *encoder, 
> enum port port);
>  void assert_dsi_pll_enabled(struct drm_i915_private *i915);
>  void assert_dsi_pll_disabled(struct drm_i915_private *i915);
>  
> -/* intel_dsi_vbt.c */
> -bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
> -void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);
> -void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi);
> -void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
> -  enum mipi_seq seq_id);
> -void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
> -void intel_dsi_log_params(struct intel_dsi *intel_dsi);
> -
>  #endif /* _INTEL_DSI_H */
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c 
> b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> index f241bedb8597..c29a13619224 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> @@ -41,6 +41,7 @@
>  #include "i915_drv.h"
>  #include "intel_display_types.h"
>  #include "intel_dsi.h"
> +#include "intel_dsi_vbt.h"
>  #include "vlv_sideband.h"
>  
>  #define MIPI_TRANSFER_MODE_SHIFT 0
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.h 
> b/drivers/gpu/drm/i915/display/intel_dsi_vbt.h
> new file mode 100644
> index ..dc642c1fe7ef
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.h
> @@ -0,0 +1,22 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2021 Intel Corporation
> + */
> +
> +#ifndef __INTEL_DSI_VBT_H__
> +#define __INTEL_DSI_VBT_H__
> +
> +#include 
> +
> +enum mipi_seq;
> +struct intel_dsi;
> +
> +bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
> +void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);
> +void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi);
> +void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
> +  enum mipi_seq seq_id);
> +void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
> +void intel_dsi_log_params(struct intel_dsi *intel_dsi);
> +
> +#endif /* __INTEL_DSI_VBT_H__ */
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c 
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 59ebfbd46e6f..be070a1afcd0 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -38,6 +38,7 @@
>  #include "intel_de.h"
>  #include "intel_display_types.h"
>  #include "intel_dsi.h"
> +#include "intel_dsi_vbt.h"
>  #include "intel_fifo_underrun.h"
>  #include "intel_panel.h"
>  #include "skl_scaler.h"
> 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Remove unused intel_gmbus_set_speed() function

[Hans de Goede]

Hi,

On 11/21/21 22:03, Patchwork wrote:
> *Patch Details*
> *Series:* drm/i915: Remove unused intel_gmbus_set_speed() function
> *URL:*https://patchwork.freedesktop.org/series/97141/ 
> 
> *State:*  failure
> *Details:*
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21648/index.html 
> 
> 
> 
>   CI Bug Log - changes from CI_DRM_10908_full -> Patchwork_21648_full
> 
> 
> Summary
> 
> *FAILURE*
> 
> Serious unknown changes coming with Patchwork_21648_full absolutely need to be
> verified manually.
> 
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_21648_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
> 
> 
> Participating hosts (11 -> 11)
> 
> No changes in participating hosts
> 
> 
> Possible new issues
> 
> Here are the unknown changes that may have been introduced in 
> Patchwork_21648_full:
> 
> 
>   IGT changes
> 
> 
> Possible regressions
> 
>   *
> 
> igt@kms_cursor_legacy@flip-vs-cursor-atomic:
> 
>   o shard-kbl: PASS 
> 
>  -> INCOMPLETE 
> 
>  +2 similar issues
>   *
> 
> igt@kms_flip@basic-plain-flip@c-edp1:
> 
>   o shard-tglb: PASS 
> 
>  -> INCOMPLETE 
> 

Both false-positives.

This patch only removes an unused function, so the only kind of regressions
this can cause are build failures.

Regards,

Hans





> 
> 
> Suppressed
> 
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
> 
>   * igt@kms_frontbuffer_tracking@fbc-badstride:
>   o {shard-rkl}: SKIP 
> 
>  ([i915#1849]) -> FAIL 
> 
> 
> 
> Known issues
> 
> Here are the changes found in Patchwork_21648_full that come from known 
> issues:
> 
> 
>   IGT changes
> 
> 
> Issues hit
> 
>   *
> 
> igt@gem_create@create-massive:
> 
>   o shard-kbl: NOTRUN -> DMESG-WARN 
> 
>  ([i915#3002])
>   *
> 
> igt@gem_eio@unwedge-stress:
> 
>   o shard-iclb: PASS 
> 
>  -> TIMEOUT 
> 
>  ([i915#2369] / [i915#2481] / [i915#3070])
>   *
> 
> igt@gem_exec_capture@pi@rcs0:
> 
>   o shard-skl: PASS 
> 
>  -> INCOMPLETE 
> 
>  ([i915#2369])
>   *
> 
> igt@gem_exec_capture@pi@vcs0:
> 
>   o shard-tglb: PASS 
> 
>  -> INCOMPLETE 
> 
>  ([i915#2369] / [i915#3371])
>   *
> 
> igt@gem_exec_fair@basic-none-share@rcs0:
> 
>   o shard-tglb: NOTRUN -> FAIL 
> 
>  ([i915#2842])
>   *
> 
> igt@gem_exec_fair@basic-pace-share@rcs0:
> 
>   o
> 
> shard-tglb: PASS 
> 
>  -> FAIL 
> 
>  ([i915#2842])
> 
>   o
> 
> shard-glk: PASS 
> 
>  -> FAIL 
> 
>  ([i915#2842]) +1 similar issue
> 
>   *
> 
> igt@gem_exec_fair@basic-pace@rcs0:
> 
>   o shard-kbl: PASS 
> 
>  

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/backlight: Drop duplicate intel_panel_actually_set_backlight()

[Hans de Goede]

Hi,

On 11/21/21 14:03, Patchwork wrote:
> *Patch Details*
> *Series:* series starting with [1/2] drm/i915/backlight: Drop duplicate 
> intel_panel_actually_set_backlight()
> *URL:*https://patchwork.freedesktop.org/series/97134/ 
> 
> *State:*  failure
> *Details:*
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21646/index.html 
> 
> 
> 
>   CI Bug Log - changes from CI_DRM_10908_full -> Patchwork_21646_full
> 
> 
> Summary
> 
> *FAILURE*
> 
> Serious unknown changes coming with Patchwork_21646_full absolutely need to be
> verified manually.
> 
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_21646_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
> 
> 
> Participating hosts (11 -> 11)
> 
> No changes in participating hosts
> 
> 
> Possible new issues
> 
> Here are the unknown changes that may have been introduced in 
> Patchwork_21646_full:
> 
> 
>   IGT changes
> 
> 
> Possible regressions
> 
>   *
> 
> igt@i915_pm_backlight@fade_with_dpms:
> 
>   o shard-iclb: PASS 
> 
>  -> FAIL 
> 
>  +1 similar issue
>   *

This one seems like it might be related, but it must be a false-positive fail,
because patch 1. in this series makes no functional changes (I have triple
checked this) and patch 2 only changes ops used in ext_pwm_funcs and that
only gets used as panel->backlight.pwm_funcs on BYT and CHT and this is
an ICL failure.

> 
> igt@kms_vblank@pipe-c-wait-busy:
> 
>   o shard-kbl: PASS 
> 
>  -> INCOMPLETE 
> 

And this is definitely a false-positive since this series only makes
backlight PWM handling changes.

Regards,

Hans





> 
> 
> Suppressed
> 
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
> 
>   * igt@i915_pm_backlight@fade:
>   o {shard-rkl}: SKIP 
> 
>  ([i915#3012]) -> FAIL 
> 
>  +1 similar issue
> 
> 
> Known issues
> 
> Here are the changes found in Patchwork_21646_full that come from known 
> issues:
> 
> 
>   IGT changes
> 
> 
> Issues hit
> 
>   *
> 
> igt@gem_create@create-massive:
> 
>   o shard-kbl: NOTRUN -> DMESG-WARN 
> 
>  ([i915#3002])
>   *
> 
> igt@gem_eio@unwedge-stress:
> 
>   o shard-iclb: PASS 
> 
>  -> TIMEOUT 
> 
>  ([i915#2369] / [i915#2481] / [i915#3070])
>   *
> 
> igt@gem_exec_capture@pi@rcs0:
> 
>   o shard-skl: PASS 
> 
>  -> INCOMPLETE 
> 
>  ([i915#2369])
>   *
> 
> igt@gem_exec_capture@pi@vecs0:
> 
>   o shard-iclb: PASS 
> 
>  -> INCOMPLETE 
> 
>  ([i915#2369] / [i915#3371])
>   *
> 
> igt@gem_exec_fair@basic-none-share@rcs0:
> 
>   o shard-apl: PASS 
> 
>  -> SKIP 
> 
>  ([fdo#109271])
>   *
> 
> igt@gem_exec_fair@basic-pace-share@rcs0:
> 
>   o shard-tglb: PASS 
> 
>  -> FAIL 
> 
>  ([i915#2842]) +1 similar issue
>   *
> 
> igt@gem_exec_fair@basic-throttle@rcs0:
> 
>   o shard-iclb: PASS 
> 

Re: [Intel-gfx] [PATCH v6 1/6] drm/i915: Add support for moving fence waiting

[kernel test robot]

Hi "Thomas,

I love your patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on drm-exynos/exynos-drm-next drm/drm-next v5.16-rc2 
next-2028]
[cannot apply to drm-intel/for-linux-next tegra-drm/drm/tegra/for-next 
airlied/drm-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Thomas-Hellstr-m/drm-i915-ttm-Async-migration/20211122-162430
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a004-20211122 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 
c133fb321f7ca6083ce15b6aa5bf89de6600e649)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/0day-ci/linux/commit/387d80b6342f138213ce6e79e84459597b4a0394
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Thomas-Hellstr-m/drm-i915-ttm-Async-migration/20211122-162430
git checkout 387d80b6342f138213ce6e79e84459597b4a0394
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/i915_vma.c:356:12: warning: function 
>> 'i915_vma_verify_bind_complete' is not needed and will not be emitted 
>> [-Wunneeded-internal-declaration]
   static int i915_vma_verify_bind_complete(struct i915_vma *vma)
  ^
   1 warning generated.


vim +/i915_vma_verify_bind_complete +356 drivers/gpu/drm/i915/i915_vma.c

   355  
 > 356  static int i915_vma_verify_bind_complete(struct i915_vma *vma)
   357  {
   358  int err = 0;
   359  
   360  if (i915_active_has_exclusive(>active)) {
   361  struct dma_fence *fence =
   362  i915_active_fence_get(>active.excl);
   363  
   364  if (!fence)
   365  return 0;
   366  
   367  if (dma_fence_is_signaled(fence))
   368  err = fence->error;
   369  else
   370  err = -EBUSY;
   371  
   372  dma_fence_put(fence);
   373  }
   374  
   375  return err;
   376  }
   377  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/dsi: split out intel_dsi_vbt.h

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/dsi: split out intel_dsi_vbt.h
URL   : https://patchwork.freedesktop.org/series/97162/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2558d62547b2 drm/i915/dsi: split out intel_dsi_vbt.h
-:53: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#53: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 56 lines checked
f56b55be556b drm/i915/dsi: split out vlv_dsi_pll.h
-:92: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#92: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 94 lines checked
6981d71d1918 drm/i915/dsi: split out vlv_dsi.h
-:68: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#68: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 56 lines checked
f1c6e92268d0 drm/i915/dsi: split out icl_dsi.h
-:24: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#24: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 48 lines checked

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Fix synchronization of PMU callback with reset

[Tvrtko Ursulin]

On 11/11/2021 16:48, Umesh Nerlige Ramappa wrote:

On Thu, Nov 11, 2021 at 02:37:43PM +, Tvrtko Ursulin wrote:


On 04/11/2021 22:04, Umesh Nerlige Ramappa wrote:

On Thu, Nov 04, 2021 at 05:37:37PM +, Tvrtko Ursulin wrote:


On 03/11/2021 22:47, Umesh Nerlige Ramappa wrote:

Since the PMU callback runs in irq context, it synchronizes with gt
reset using the reset count. We could run into a case where the PMU
callback could read the reset count before it is updated. This has a
potential of corrupting the busyness stats.

In addition to the reset count, check if the reset bit is set before
capturing busyness.

In addition save the previous stats only if you intend to update them.

Signed-off-by: Umesh Nerlige Ramappa 
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

index 5cc49c0b3889..d83ade77ca07 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1183,6 +1183,7 @@ static ktime_t guc_engine_busyness(struct 
intel_engine_cs *engine, ktime_t *now)

 u64 total, gt_stamp_saved;
 unsigned long flags;
 u32 reset_count;
+    bool in_reset;
 spin_lock_irqsave(>timestamp.lock, flags);
@@ -1191,7 +1192,9 @@ static ktime_t guc_engine_busyness(struct 
intel_engine_cs *engine, ktime_t *now)

  * engine busyness from GuC, so we just use the driver stored
  * copy of busyness. Synchronize with gt reset using reset_count.
  */
-    reset_count = i915_reset_count(gpu_error);
+    rcu_read_lock();
+    in_reset = test_bit(I915_RESET_BACKOFF, >reset.flags);
+    rcu_read_unlock();


I don't really understand the point of rcu_read_lock over test_bit 
but I guess you copied it from the trylock loop.


Yes, I don't see other parts of code using the lock though. I can 
drop it.





 *now = ktime_get();
@@ -1201,9 +1204,10 @@ static ktime_t guc_engine_busyness(struct 
intel_engine_cs *engine, ktime_t *now)

  * start_gt_clk is derived from GuC state. To get a consistent
  * view of activity, we query the GuC state only if gt is awake.
  */
-    stats_saved = *stats;
-    gt_stamp_saved = guc->timestamp.gt_stamp;
-    if (intel_gt_pm_get_if_awake(gt)) {
+    if (intel_gt_pm_get_if_awake(gt) && !in_reset) {


What is the point of looking at the old value of in_reset here? Gut 
feeling says if there is a race this does not fix it.


I did not figure out from the commit message what does "could read 
the reset count before it is updated" mean?

I thought the point of reading


the reset count twice was that you are sure there was no reset while 
in here, in which case it is safe to update the software copy. I 
don't easily see what test_bit does on top.


This is what I see in the reset flow
---

R1) test_and_set_bit(I915_RESET_BACKOFF, >reset.flags)
R2) atomic_inc(>i915->gpu_error.reset_count)
R3) reset prepare
R4) do the HW reset

The reset count is updated only once above and that's before an 
actual HW reset happens.


PMU callback flow before this patch
---

P1) read reset count
P2) update stats
P3) read reset count
P4) if reset count changed, use old stats. if not use updated stats.

I am concerned that the PMU flow could run after step (R2). Then we 
wrongly conclude that the count stayed the same and no HW reset 
happened.


Here is the problematic sequence: Threads R and P.

R1) test_and_set_bit(I915_RESET_BACKOFF, >reset.flags)
R2) atomic_inc(>i915->gpu_error.reset_count)
 P1) read reset count
 P2) update stats
 P3) read reset count
 P4) if reset count changed, use old stats. if not use updated stats.
R3) reset prepare
R4) do the HW reset

Do you agree that this is racy? In thread P we don't know in if the 
reset flag was set or not when we captured the reset count in P1?




PMU callback flow with this patch
---
This would rely on the reset_count only if a reset is not in progress.

P0) test_bit for I915_RESET_BACKOFF
P1) read reset count if not in reset. if in reset, use old stats
P2) update stats
P3) read reset count
P4) if reset count changed, use old stats. if not use updated stats.

Now that I think about it more, I do see one sequence that still 
needs fixing though - P0, R1, R2, P1 - P4. For that, I think I need 
to re-read the BACKOFF bit after reading the reset_count for the 
first time.

Modified PMU callback sequence would be:
--

M0) test_bit for I915_RESET_BACKOFF
M1) read reset count if not in reset, if in reset, use old stats

M1.1) test_bit for I915_RESET_BACKOFF. if set, use old stats. if not, 
use reset_count to synchronize


M2) update stats
M3) read reset count
M4) if reset count changed, use old stats. if not use updated stats.


You did not end up implementing this flow? Have you later changed your 
mind whether it 

Re: [Intel-gfx] [PATCH] Revert "drm/i915/dmabuf: fix broken build"

[Tvrtko Ursulin]

On 22/11/2021 14:04, Matthew Auld wrote:

On 22/11/2021 13:57, Tvrtko Ursulin wrote:

From: Tvrtko Ursulin 

This reverts commit 777226dac058d119286b4081953cb5aa2cb7394b.

Approach taken in the patch was rejected by Linus and the upstream tree
now already contains the required include directive via 304ac8032d3f
("Merge tag 'drm-next-2021-11-12' of 
git://anongit.freedesktop.org/drm/drm").


Signed-off-by: Tvrtko Ursulin 
Fixes: 777226dac058 ("drm/i915/dmabuf: fix broken build")
Cc: Matthew Auld 
Cc: Thomas Hellström 
Cc: Daniel Vetter 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Jani Nikula 


Acked-by: Matthew Auld 

This was copy-paste from gem/i915_gem_pm.c, does that need a similar patch?


Personally I don't think we need to act immediately and can wait until 
the !x86 build efforts crystalize things for us a bit.


At least the commentary and commit in i915_gem_pm.c give rationale on 
pros and cons of clflush vs wbinvd. And commentary in i915_gem_dmabuf.c 
makes it sound we cannot simply go to clflush there in all cases.


Regards,

Tvrtko




---
  drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 7 ---
  1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c 
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c

index f291cf4c3886..1b526039a60d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -17,13 +17,6 @@
  MODULE_IMPORT_NS(DMA_BUF);
-#if defined(CONFIG_X86)
-#include 
-#else
-#define wbinvd_on_all_cpus() \
-    pr_warn(DRIVER_NAME ": Missing cache flush in %s\n", __func__)
-#endif
-
  I915_SELFTEST_DECLARE(static bool force_different_devices;)
  static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)

Re: [Intel-gfx] [PATCH v6 1/4] drm/i915: Avoid allocating a page array for the gpu coredump

[Ramalingam C]

On 2021-11-08 at 18:45:44 +0100, Thomas Hellström wrote:
> The gpu coredump typically takes place in a dma_fence signalling
> critical path, and hence can't use GFP_KERNEL allocations, as that
> means we might hit deadlocks under memory pressure. However
> changing to __GFP_KSWAPD_RECLAIM which will be done in an upcoming
> patch will instead mean a lower chance of the allocation succeeding.
> In particular large contigous allocations like the coredump page
> vector.
> Remove the page vector in favor of a linked list of single pages.
> Use the page lru list head as the list link, as the page owner is
> allowed to do that.
> 
> Signed-off-by: Thomas Hellström 

Looks good to me

Reviewed-by: Ramalingam C 

> ---
>  drivers/gpu/drm/i915/i915_gpu_error.c | 50 +++
>  drivers/gpu/drm/i915/i915_gpu_error.h |  4 +--
>  2 files changed, 28 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 2a2d7643b551..14de64282697 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -275,16 +275,16 @@ static bool compress_start(struct i915_vma_compress *c)
>  static void *compress_next_page(struct i915_vma_compress *c,
>   struct i915_vma_coredump *dst)
>  {
> - void *page;
> + void *page_addr;
> + struct page *page;
>  
> - if (dst->page_count >= dst->num_pages)
> - return ERR_PTR(-ENOSPC);
> -
> - page = pool_alloc(>pool, ALLOW_FAIL);
> - if (!page)
> + page_addr = pool_alloc(>pool, ALLOW_FAIL);
> + if (!page_addr)
>   return ERR_PTR(-ENOMEM);
>  
> - return dst->pages[dst->page_count++] = page;
> + page = virt_to_page(page_addr);
> + list_add_tail(>lru, >page_list);
> + return page_addr;
>  }
>  
>  static int compress_page(struct i915_vma_compress *c,
> @@ -397,7 +397,7 @@ static int compress_page(struct i915_vma_compress *c,
>  
>   if (!(wc && i915_memcpy_from_wc(ptr, src, PAGE_SIZE)))
>   memcpy(ptr, src, PAGE_SIZE);
> - dst->pages[dst->page_count++] = ptr;
> + list_add_tail(_to_page(ptr)->lru, >page_list);
>   cond_resched();
>  
>   return 0;
> @@ -614,7 +614,7 @@ static void print_error_vma(struct 
> drm_i915_error_state_buf *m,
>   const struct i915_vma_coredump *vma)
>  {
>   char out[ASCII85_BUFSZ];
> - int page;
> + struct page *page;
>  
>   if (!vma)
>   return;
> @@ -628,16 +628,17 @@ static void print_error_vma(struct 
> drm_i915_error_state_buf *m,
>   err_printf(m, "gtt_page_sizes = 0x%08x\n", vma->gtt_page_sizes);
>  
>   err_compression_marker(m);
> - for (page = 0; page < vma->page_count; page++) {
> + list_for_each_entry(page, >page_list, lru) {
>   int i, len;
> + const u32 *addr = page_address(page);
>  
>   len = PAGE_SIZE;
> - if (page == vma->page_count - 1)
> + if (page == list_last_entry(>page_list, typeof(*page), 
> lru))
>   len -= vma->unused;
>   len = ascii85_encode_len(len);
>  
>   for (i = 0; i < len; i++)
> - err_puts(m, ascii85_encode(vma->pages[page][i], out));
> + err_puts(m, ascii85_encode(addr[i], out));
>   }
>   err_puts(m, "\n");
>  }
> @@ -946,10 +947,12 @@ static void i915_vma_coredump_free(struct 
> i915_vma_coredump *vma)
>  {
>   while (vma) {
>   struct i915_vma_coredump *next = vma->next;
> - int page;
> + struct page *page, *n;
>  
> - for (page = 0; page < vma->page_count; page++)
> - free_page((unsigned long)vma->pages[page]);
> + list_for_each_entry_safe(page, n, >page_list, lru) {
> + list_del_init(>lru);
> + __free_page(page);
> + }
>  
>   kfree(vma);
>   vma = next;
> @@ -1016,7 +1019,6 @@ i915_vma_coredump_create(const struct intel_gt *gt,
>   struct i915_ggtt *ggtt = gt->ggtt;
>   const u64 slot = ggtt->error_capture.start;
>   struct i915_vma_coredump *dst;
> - unsigned long num_pages;
>   struct sgt_iter iter;
>   int ret;
>  
> @@ -1025,9 +1027,7 @@ i915_vma_coredump_create(const struct intel_gt *gt,
>   if (!vma || !vma->pages || !compress)
>   return NULL;
>  
> - num_pages = min_t(u64, vma->size, vma->obj->base.size) >> PAGE_SHIFT;
> - num_pages = DIV_ROUND_UP(10 * num_pages, 8); /* worstcase zlib growth */
> - dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), ALLOW_FAIL);
> + dst = kmalloc(sizeof(*dst), ALLOW_FAIL);
>   if (!dst)
>   return NULL;
>  
> @@ -1036,14 +1036,13 @@ i915_vma_coredump_create(const struct intel_gt *gt,
>   return NULL;
>   }
>  
> + INIT_LIST_HEAD(>page_list);
>   

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/ttm: Async migration (rev7)

[Thomas Hellström]

On 11/22/21 15:02, Patchwork wrote:

Project List - Patchwork *Patch Details*
*Series:*   drm/i915/ttm: Async migration (rev7)
*URL:*  https://patchwork.freedesktop.org/series/96798/
*State:*failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/index.html



  CI Bug Log - changes from CI_DRM_10913 -> Patchwork_21651


Summary

*FAILURE*

Serious unknown changes coming with Patchwork_21651 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21651, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives 
in CI.


External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/index.html



Participating hosts (43 -> 34)

Missing (9): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-icl-u2 fi-bsw-cyan 
bat-adlp-6 bat-adlp-4 bat-jsl-2 bat-jsl-1



Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_21651:



  IGT changes


Possible regressions

  * igt@gem_exec_suspend@basic-s3:
  o fi-skl-6600u: PASS


-> INCOMPLETE





Lakshmi,

This failure is unrelated, and occurs on the same machine with a more or 
less identical signature on CI_DRM_10901


Thanks,
Thomas

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: Use to_root_gt() to refer to the root tile

[kernel test robot]

Hi Andi,

I love your patch! Yet something to improve:

[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on next-2028]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next 
drm/drm-next tegra-drm/drm/tegra/for-next airlied/drm-next v5.16-rc2]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Andi-Shyti/More-preparation-for-multi-gt-patches/20211121-213526
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-c007-20211121 (attached as .config)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/0day-ci/linux/commit/068a75571292e317e35752c1b078605dda122741
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Andi-Shyti/More-preparation-for-multi-gt-patches/20211121-213526
git checkout 068a75571292e317e35752c1b078605dda122741
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   In file included from :4:
   In file included from drivers/gpu/drm/i915/display/intel_de.h:9:
>> drivers/gpu/drm/i915/i915_drv.h:1756:1: error: all paths through this 
>> function will call itself [-Werror,-Winfinite-recursion]
   {
   ^
   1 error generated.
--
   In file included from drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:12:
>> drivers/gpu/drm/i915/i915_drv.h:1756:1: error: all paths through this 
>> function will call itself [-Werror,-Winfinite-recursion]
   {
   ^
   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:59:6: error: no previous 
prototype for function 'intel_pxp_debugfs_register' 
[-Werror,-Wmissing-prototypes]
   void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry 
*gt_root)
^
   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c:59:1: note: declare 'static' if 
the function is not intended to be used outside of this translation unit
   void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry 
*gt_root)
   ^
   static 
   2 errors generated.
--
   In file included from drivers/gpu/drm/i915/pxp/intel_pxp_tee.c:11:
>> drivers/gpu/drm/i915/i915_drv.h:1756:1: error: all paths through this 
>> function will call itself [-Werror,-Winfinite-recursion]
   {
   ^
>> drivers/gpu/drm/i915/pxp/intel_pxp_tee.c:19:35: error: no member named 'gt' 
>> in 'struct drm_i915_private'
   return _to_i915(i915_kdev)->gt.pxp;
   ~~~  ^
   2 errors generated.
--
   In file included from drivers/gpu/drm/i915/selftests/igt_reset.c:12:
>> drivers/gpu/drm/i915/selftests/../i915_drv.h:1756:1: error: all paths 
>> through this function will call itself [-Werror,-Winfinite-recursion]
   {
   ^
   1 error generated.


vim +1756 drivers/gpu/drm/i915/i915_drv.h

  1750  
  1751  /* Only valid when HAS_DISPLAY() is true */
  1752  #define INTEL_DISPLAY_ENABLED(dev_priv) \
  1753  (drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), 
!(dev_priv)->params.disable_display)
  1754  
  1755  static inline struct intel_gt *to_root_gt(struct drm_i915_private *i915)
> 1756  {
  1757  return to_root_gt(i915);
  1758  }
  1759  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip

[Intel-gfx] ✗ Fi.CI.BAT: failure for treewide: add missing includes masked by cgroup -> bpf dependency

[Patchwork]

== Series Details ==

Series: treewide: add missing includes masked by cgroup -> bpf dependency
URL   : https://patchwork.freedesktop.org/series/97159/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10913 -> Patchwork_21653


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21653 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21653, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/index.html

Participating hosts (43 -> 35)
--

  Missing(8): bat-dg1-6 bat-dg1-5 fi-icl-u2 fi-bsw-cyan bat-adlp-6 
bat-adlp-4 bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21653:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@requests:
- fi-kbl-soraka:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-kbl-soraka/igt@i915_selftest@l...@requests.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-kbl-soraka/igt@i915_selftest@l...@requests.html

  
Known issues


  Here are the changes found in Patchwork_21653 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u:   NOTRUN -> [SKIP][3] ([fdo#109271]) +31 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u:   NOTRUN -> [SKIP][4] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html

  * igt@runner@aborted:
- fi-kbl-soraka:  NOTRUN -> [FAIL][5] ([i915#1436] / [i915#3363] / 
[i915#4312])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-kbl-soraka/igt@run...@aborted.html

  
 Possible fixes 

  * igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2:  [INCOMPLETE][6] ([i915#4006]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html

  * igt@gem_exec_suspend@basic-s0:
- fi-glk-dsi: [DMESG-WARN][8] ([i915#2943]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-glk-dsi/igt@gem_exec_susp...@basic-s0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-glk-dsi/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
- fi-tgl-1115g4:  [FAIL][10] ([i915#1888]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [DMESG-FAIL][12] ([i915#295]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   [DMESG-WARN][14] ([i915#295]) -> [PASS][15] +10 
similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21653/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943
  [i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312


Build changes
-

  * Linux: CI_DRM_10913 -> Patchwork_21653

  CI-20190529: 20190529
  CI_DRM_10913: 2350312b9d034c596a510f1eabff0f74de5f2ab7 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6286: cdcbf81f734fdb1d102e84490e49e9fec23760cd @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21653: 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()

[Matthew Auld]

On Mon, 22 Nov 2021 at 14:21, Dan Carpenter  wrote:
>
> On Mon, Nov 22, 2021 at 02:08:39PM -, Patchwork wrote:
> > == Series Details ==
> >
> > Series: drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()
> > URL   : https://patchwork.freedesktop.org/series/97151/
> > State : failure
>
> Who is supposed to be reading these?  I feel like there should be a
> human reading them but it's not me...  The system is broken, but who is
> fixing it?
>
> regards,
> dan carpenter
>
> >
> > == Summary ==
> >
> > CI Bug Log - changes from CI_DRM_10911_full -> Patchwork_21650_full
> > 
> >
> > Summary
> > ---
> >
> >   **FAILURE**
> >
> >   Serious unknown changes coming with Patchwork_21650_full absolutely need 
> > to be
> >   verified manually.
> >
> >   If you think the reported changes have nothing to do with the changes
> >   introduced in Patchwork_21650_full, please notify your bug team to allow 
> > them
> >   to document this new failure mode, which will reduce false positives in 
> > CI.
> >
> >
> >
> > Participating hosts (11 -> 11)
> > --
> >
> >   No changes in participating hosts
> >
> > Possible new issues
> > ---
> >
> >   Here are the unknown changes that may have been introduced in 
> > Patchwork_21650_full:
> >
> > ### IGT changes ###
> >
> >  Possible regressions 
> >
> >   * igt@kms_flip@dpms-vs-vblank-race-interruptible@b-dp1:
> > - shard-kbl:  [PASS][1] -> [INCOMPLETE][2]
> >[1]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-kbl2/igt@kms_flip@dpms-vs-vblank-race-interrupti...@b-dp1.html
> >[2]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-kbl7/igt@kms_flip@dpms-vs-vblank-race-interrupti...@b-dp1.html

Lakshmi, this one is for sure a false positive. Patch pushed to
drm-intel-gt-next. Thanks.

> >
> >
> > Known issues
> > 
> >
> >   Here are the changes found in Patchwork_21650_full that come from known 
> > issues:
> >
> > ### CI changes ###
> >
> >  Possible fixes 
> >
> >   * boot:
> > - shard-glk:  ([FAIL][3], [PASS][4], [PASS][5], [PASS][6], 
> > [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], 
> > [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], 
> > [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], 
> > [PASS][25], [PASS][26], [PASS][27]) ([i915#4392]) -> ([PASS][28], 
> > [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], 
> > [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], 
> > [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], 
> > [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52])
> >[3]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
> >[4]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
> >[5]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
> >[6]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
> >[7]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
> >[8]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
> >[9]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
> >[10]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
> >[11]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
> >[12]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
> >[13]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html
> >[14]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html
> >[15]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html
> >[16]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html
> >[17]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
> >[18]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
> >[19]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
> >[20]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
> >[21]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
> >[22]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
> >[23]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk2/boot.html
> >[24]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk2/boot.html
> >[25]: 
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html
> >[26]: 
> > 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()

[Dan Carpenter]

On Mon, Nov 22, 2021 at 02:08:39PM -, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()
> URL   : https://patchwork.freedesktop.org/series/97151/ 
> State : failure

Who is supposed to be reading these?  I feel like there should be a
human reading them but it's not me...  The system is broken, but who is
fixing it?

regards,
dan carpenter

> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10911_full -> Patchwork_21650_full
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_21650_full absolutely need to 
> be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_21650_full, please notify your bug team to allow 
> them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Participating hosts (11 -> 11)
> --
> 
>   No changes in participating hosts
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_21650_full:
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@kms_flip@dpms-vs-vblank-race-interruptible@b-dp1:
> - shard-kbl:  [PASS][1] -> [INCOMPLETE][2]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-kbl2/igt@kms_flip@dpms-vs-vblank-race-interrupti...@b-dp1.html
>  
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-kbl7/igt@kms_flip@dpms-vs-vblank-race-interrupti...@b-dp1.html
>  
> 
>   
> Known issues
> 
> 
>   Here are the changes found in Patchwork_21650_full that come from known 
> issues:
> 
> ### CI changes ###
> 
>  Possible fixes 
> 
>   * boot:
> - shard-glk:  ([FAIL][3], [PASS][4], [PASS][5], [PASS][6], 
> [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], 
> [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], 
> [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], 
> [PASS][25], [PASS][26], [PASS][27]) ([i915#4392]) -> ([PASS][28], [PASS][29], 
> [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], 
> [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], 
> [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], 
> [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52])
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html 
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html 
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html 
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html 
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html 
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html 
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html 
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html 
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html 
>[12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html 
>[13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html 
>[14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html 
>[15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html 
>[16]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html 
>[17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html 
>[18]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html 
>[19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html 
>[20]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html 
>[21]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html 
>[22]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html 
>[23]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk2/boot.html 
>[24]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk2/boot.html 
>[25]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html 
>[26]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html 
>[27]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html 
>[28]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk8/boot.html 
>[29]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk1/boot.html 
>[30]: 
> 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for treewide: add missing includes masked by cgroup -> bpf dependency

[Patchwork]

== Series Details ==

Series: treewide: add missing includes masked by cgroup -> bpf dependency
URL   : https://patchwork.freedesktop.org/series/97159/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable()
URL   : https://patchwork.freedesktop.org/series/97151/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10911_full -> Patchwork_21650_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21650_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21650_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21650_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_flip@dpms-vs-vblank-race-interruptible@b-dp1:
- shard-kbl:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-kbl2/igt@kms_flip@dpms-vs-vblank-race-interrupti...@b-dp1.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-kbl7/igt@kms_flip@dpms-vs-vblank-race-interrupti...@b-dp1.html

  
Known issues


  Here are the changes found in Patchwork_21650_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-glk:  ([FAIL][3], [PASS][4], [PASS][5], [PASS][6], 
[PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], 
[PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], 
[PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], 
[PASS][25], [PASS][26], [PASS][27]) ([i915#4392]) -> ([PASS][28], [PASS][29], 
[PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], 
[PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], 
[PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], 
[PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk9/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk8/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk7/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk6/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk5/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk4/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk3/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk2/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk2/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10911/shard-glk1/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk8/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk1/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk1/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk1/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk2/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk2/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk2/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21650/shard-glk3/boot.html
   [36]: 

Re: [Intel-gfx] [PATCH v3] drm/i915/rpm: Enable runtime pm autosuspend by default

[Rodrigo Vivi]

On Mon, Nov 22, 2021 at 07:18:17PM +0530, Anshuman Gupta wrote:
> On 2021-11-16 at 21:22:38 +0530, Tilak Tangudu wrote:
> > v1: Enable runtime pm autosuspend by default for Gen12
> > and later versions.
> > 
> > v2: Enable runtime pm autosuspend by default for all
> > platforms(Syrjala Ville)
> > 
> > v3: Change commit message(Nikula Jani)
> It would require to reorder the commit log, version log
> need to move after commit message.

Well noticed. I changed while pushing.

So, for the record:

Reviewed-by: Rodrigo Vivi 
Signed-off-by: Rodrigo Vivi 

> Thanks,
> Anshuman.
> > Let's enable runtime pm autosuspend by default everywhere.
> > So, we can allow D3hot and bigger power savings on idle scenarios.
> > 
> > But at this time let's not touch the autosuspend_delay time,
> > what caused some regression on our previous attempt.
> > 
> > Also, the latest identified issue on GuC PM has been fixed by
> > commit 1a52faed3131 ("drm/i915/guc: Take GT PM ref when deregistering
> > context")
> > 
> > Signed-off-by: Tilak Tangudu 
> > ---
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 0d85f3c5c526..22dab36afcb6 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -590,6 +590,9 @@ void intel_runtime_pm_enable(struct intel_runtime_pm 
> > *rpm)
> > pm_runtime_use_autosuspend(kdev);
> > }
> >  
> > +   /* Enable by default */
> > +   pm_runtime_allow(kdev);
> > +
> > /*
> >  * The core calls the driver load handler with an RPM reference held.
> >  * We drop that here and will reacquire it during unloading in
> > -- 
> > 2.25.1
> > 

Re: [Intel-gfx] [PATCH] Revert "drm/i915/dmabuf: fix broken build"

[Matthew Auld]

On 22/11/2021 13:57, Tvrtko Ursulin wrote:

From: Tvrtko Ursulin 

This reverts commit 777226dac058d119286b4081953cb5aa2cb7394b.

Approach taken in the patch was rejected by Linus and the upstream tree
now already contains the required include directive via 304ac8032d3f
("Merge tag 'drm-next-2021-11-12' of git://anongit.freedesktop.org/drm/drm").

Signed-off-by: Tvrtko Ursulin 
Fixes: 777226dac058 ("drm/i915/dmabuf: fix broken build")
Cc: Matthew Auld 
Cc: Thomas Hellström 
Cc: Daniel Vetter 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Jani Nikula 


Acked-by: Matthew Auld 

This was copy-paste from gem/i915_gem_pm.c, does that need a similar patch?


---
  drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 7 ---
  1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c 
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index f291cf4c3886..1b526039a60d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -17,13 +17,6 @@
  
  MODULE_IMPORT_NS(DMA_BUF);
  
-#if defined(CONFIG_X86)

-#include 
-#else
-#define wbinvd_on_all_cpus() \
-   pr_warn(DRIVER_NAME ": Missing cache flush in %s\n", __func__)
-#endif
-
  I915_SELFTEST_DECLARE(static bool force_different_devices;)
  
  static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/ttm: Async migration (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915/ttm: Async migration (rev7)
URL   : https://patchwork.freedesktop.org/series/96798/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10913 -> Patchwork_21651


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21651 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21651, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/index.html

Participating hosts (43 -> 34)
--

  Missing(9): bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-icl-u2 fi-bsw-cyan 
bat-adlp-6 bat-adlp-4 bat-jsl-2 bat-jsl-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21651:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_suspend@basic-s3:
- fi-skl-6600u:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-skl-6600u/igt@gem_exec_susp...@basic-s3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-skl-6600u/igt@gem_exec_susp...@basic-s3.html

  
Known issues


  Here are the changes found in Patchwork_21651 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u:   NOTRUN -> [SKIP][3] ([fdo#109271]) +31 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-1115g4:  [PASS][4] -> [FAIL][5] ([i915#1888])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u:   NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html

  * igt@runner@aborted:
- fi-skl-6600u:   NOTRUN -> [FAIL][7] ([i915#2722] / [i915#3363] / 
[i915#4312])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-skl-6600u/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0:
- fi-glk-dsi: [DMESG-WARN][8] ([i915#2943]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-glk-dsi/igt@gem_exec_susp...@basic-s0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-glk-dsi/igt@gem_exec_susp...@basic-s0.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [DMESG-FAIL][10] ([i915#295]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   [DMESG-WARN][12] ([i915#295]) -> [PASS][13] +10 
similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10913/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21651/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943
  [i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312


Build changes
-

  * Linux: CI_DRM_10913 -> Patchwork_21651

  CI-20190529: 20190529
  CI_DRM_10913: 2350312b9d034c596a510f1eabff0f74de5f2ab7 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6286: cdcbf81f734fdb1d102e84490e49e9fec23760cd @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21651: 5259cbae353e9edd51ac80a7721d10624f04ae9c @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5259cbae353e drm/i915/ttm: Update i915_gem_obj_copy_ttm() to be asynchronous
e133b2236211 drm/i915/ttm: Implement 

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/request: Remove unused variables

[Patchwork]

== Series Details ==

Series: drm/i915/request: Remove unused variables
URL   : https://patchwork.freedesktop.org/series/97158/
State : failure

== Summary ==

CALLscripts/checksyscalls.sh
  CALLscripts/atomic/check-atomics.sh
  DESCEND objtool
  CHK include/generated/compile.h
  CC [M]  drivers/gpu/drm/i915/i915_request.o
drivers/gpu/drm/i915/i915_request.c:2032:12: error: ‘print_sched_attr’ defined 
but not used [-Werror=unused-function]
 static int print_sched_attr(const struct i915_sched_attr *attr,
^~~~
cc1: all warnings being treated as errors
scripts/Makefile.build:287: recipe for target 
'drivers/gpu/drm/i915/i915_request.o' failed
make[4]: *** [drivers/gpu/drm/i915/i915_request.o] Error 1
scripts/Makefile.build:549: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:549: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:549: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1846: recipe for target 'drivers' failed
make: *** [drivers] Error 2

[Intel-gfx] [PATCH] Revert "drm/i915/dmabuf: fix broken build"

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

This reverts commit 777226dac058d119286b4081953cb5aa2cb7394b.

Approach taken in the patch was rejected by Linus and the upstream tree
now already contains the required include directive via 304ac8032d3f
("Merge tag 'drm-next-2021-11-12' of git://anongit.freedesktop.org/drm/drm").

Signed-off-by: Tvrtko Ursulin 
Fixes: 777226dac058 ("drm/i915/dmabuf: fix broken build")
Cc: Matthew Auld 
Cc: Thomas Hellström 
Cc: Daniel Vetter 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Jani Nikula 
---
 drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c 
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index f291cf4c3886..1b526039a60d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -17,13 +17,6 @@
 
 MODULE_IMPORT_NS(DMA_BUF);
 
-#if defined(CONFIG_X86)
-#include 
-#else
-#define wbinvd_on_all_cpus() \
-   pr_warn(DRIVER_NAME ": Missing cache flush in %s\n", __func__)
-#endif
-
 I915_SELFTEST_DECLARE(static bool force_different_devices;)
 
 static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
-- 
2.32.0

[Intel-gfx] [PATCH 8/8] drm/i915/display: stop including i915_drv.h from intel_display_types.h

[Jani Nikula]

Break the dependency on i915_drv.h.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display_types.h|  9 -
 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c |  1 +
 drivers/gpu/drm/i915/display/intel_dp_link_training.c |  2 +-
 drivers/gpu/drm/i915/display/intel_dsi.c  |  2 ++
 drivers/gpu/drm/i915/display/intel_fb.c   |  1 +
 drivers/gpu/drm/i915/display/intel_fb_pin.c   | 10 +-
 drivers/gpu/drm/i915/display/intel_plane_initial.c|  5 +++--
 drivers/gpu/drm/i915/display/intel_quirks.c   |  1 +
 8 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 158740cd27c4..ee1c437f6fab 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -46,13 +47,19 @@
 #include 
 #include 
 
-#include "i915_drv.h"
+#include "i915_vma.h"
+#include "i915_vma_types.h"
+#include "intel_bios.h"
+#include "intel_display.h"
+#include "intel_display_power.h"
+#include "intel_dpll_mgr.h"
 #include "intel_pm_types.h"
 
 struct drm_printer;
 struct __intel_global_objs_state;
 struct intel_ddi_buf_trans;
 struct intel_fbc;
+struct intel_connector;
 
 /*
  * Display related stuff
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c 
b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 8b9c925c4c16..846aeca1f031 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -34,6 +34,7 @@
  * for some reason.
  */
 
+#include "i915_drv.h"
 #include "intel_backlight.h"
 #include "intel_display_types.h"
 #include "intel_dp_aux_backlight.h"
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index e264467de8ed..9451f336f28f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -21,11 +21,11 @@
  * IN THE SOFTWARE.
  */
 
+#include "i915_drv.h"
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_dp_link_training.h"
 
-
 static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp)
 {
memset(intel_dp->lttpr_common_caps, 0, 
sizeof(intel_dp->lttpr_common_caps));
diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c 
b/drivers/gpu/drm/i915/display/intel_dsi.c
index 6b0301ba046e..a50422e03a7e 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi.c
@@ -4,6 +4,8 @@
  */
 
 #include 
+
+#include "i915_drv.h"
 #include "intel_dsi.h"
 #include "intel_panel.h"
 
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index 99769132c35b..23cfe2e5ce2a 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 
+#include "i915_drv.h"
 #include "intel_display.h"
 #include "intel_display_types.h"
 #include "intel_dpt.h"
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c 
b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 3b20f69e0240..31c15e5fca95 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -7,13 +7,13 @@
  * DOC: display pinning helpers
  */
 
-#include "intel_display_types.h"
-#include "intel_fb_pin.h"
-#include "intel_fb.h"
+#include "gem/i915_gem_object.h"
 
+#include "i915_drv.h"
+#include "intel_display_types.h"
 #include "intel_dpt.h"
-
-#include "gem/i915_gem_object.h"
+#include "intel_fb.h"
+#include "intel_fb_pin.h"
 
 static struct i915_vma *
 intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c 
b/drivers/gpu/drm/i915/display/intel_plane_initial.c
index dcd698a02da2..01ce1d72297f 100644
--- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
+++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
@@ -3,11 +3,12 @@
  * Copyright © 2021 Intel Corporation
  */
 
-#include "intel_display_types.h"
-#include "intel_plane_initial.h"
+#include "i915_drv.h"
 #include "intel_atomic_plane.h"
 #include "intel_display.h"
+#include "intel_display_types.h"
 #include "intel_fb.h"
+#include "intel_plane_initial.h"
 
 static bool
 intel_reuse_initial_plane_obj(struct drm_i915_private *i915,
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c 
b/drivers/gpu/drm/i915/display/intel_quirks.c
index 8a52b7a16774..c8488f5ebd04 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -5,6 +5,7 @@
 
 #include 
 
+#include "i915_drv.h"
 #include "intel_display_types.h"
 #include "intel_quirks.h"
 
-- 
2.30.2

[Intel-gfx] [PATCH 7/8] drm/i915/display: convert dp_to_i915() to a macro

[Jani Nikula]

Avoid looking into the guts of struct drm_i915_private in
headers. Again, converting an inline function to a macro is less than
ideal, but avoids having to pull in i915_drv.h just for the to_i915()
part.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 091f748ede7c..158740cd27c4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1880,11 +1880,7 @@ dp_to_lspcon(struct intel_dp *intel_dp)
return _to_dig_port(intel_dp)->lspcon;
 }
 
-static inline struct drm_i915_private *
-dp_to_i915(struct intel_dp *intel_dp)
-{
-   return to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
-}
+#define dp_to_i915(__intel_dp) 
to_i915(dp_to_dig_port(__intel_dp)->base.base.dev)
 
 #define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
   (intel_dp)->psr.source_support)
-- 
2.30.2

[Intel-gfx] [PATCH 6/8] drm/i915: move enum hpd_pin to intel_display.h

[Jani Nikula]

It's not the ideal location, but a better alternative than
i915_drv.h. The goal is to break the intel_display_types.h to i915_drv.h
dependency.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display.h | 24 
 drivers/gpu/drm/i915/i915_drv.h  | 24 
 2 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h 
b/drivers/gpu/drm/i915/display/intel_display.h
index 38c15ec30ee7..8d8725b45d99 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -346,6 +346,30 @@ enum phy_fia {
FIA3,
 };
 
+enum hpd_pin {
+   HPD_NONE = 0,
+   HPD_TV = HPD_NONE, /* TV is known to be unreliable */
+   HPD_CRT,
+   HPD_SDVO_B,
+   HPD_SDVO_C,
+   HPD_PORT_A,
+   HPD_PORT_B,
+   HPD_PORT_C,
+   HPD_PORT_D,
+   HPD_PORT_E,
+   HPD_PORT_TC1,
+   HPD_PORT_TC2,
+   HPD_PORT_TC3,
+   HPD_PORT_TC4,
+   HPD_PORT_TC5,
+   HPD_PORT_TC6,
+
+   HPD_NUM_PINS
+};
+
+#define for_each_hpd_pin(__pin) \
+   for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)
+
 #define for_each_pipe(__dev_priv, __p) \
for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
for_each_if(INTEL_INFO(__dev_priv)->pipe_mask & BIT(__p))
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e2ccc0696df7..27677bb18a6b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -117,30 +117,6 @@
 
 struct drm_i915_gem_object;
 
-enum hpd_pin {
-   HPD_NONE = 0,
-   HPD_TV = HPD_NONE, /* TV is known to be unreliable */
-   HPD_CRT,
-   HPD_SDVO_B,
-   HPD_SDVO_C,
-   HPD_PORT_A,
-   HPD_PORT_B,
-   HPD_PORT_C,
-   HPD_PORT_D,
-   HPD_PORT_E,
-   HPD_PORT_TC1,
-   HPD_PORT_TC2,
-   HPD_PORT_TC3,
-   HPD_PORT_TC4,
-   HPD_PORT_TC5,
-   HPD_PORT_TC6,
-
-   HPD_NUM_PINS
-};
-
-#define for_each_hpd_pin(__pin) \
-   for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)
-
 /* Threshold == 5 for long IRQs, 50 for short */
 #define HPD_STORM_DEFAULT_THRESHOLD 50
 
-- 
2.30.2

[Intel-gfx] [PATCH 5/8] drm/i915: split out intel_pm_types.h

[Jani Nikula]

This is far from ideal, but it reduces the i915_drv.h dependency from
intel_display_types.h. Maybe in the future we'll need a better split.

Signed-off-by: Jani Nikula 
---
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/i915_drv.h   | 64 +---
 drivers/gpu/drm/i915/intel_pm_types.h | 76 +++
 3 files changed, 78 insertions(+), 63 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_pm_types.h

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 338ac3bd08ac..091f748ede7c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -47,6 +47,7 @@
 #include 
 
 #include "i915_drv.h"
+#include "intel_pm_types.h"
 
 struct drm_printer;
 struct __intel_global_objs_state;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1bfadd9127fc..e2ccc0696df7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -89,6 +89,7 @@
 #include "intel_device_info.h"
 #include "intel_memory_region.h"
 #include "intel_pch.h"
+#include "intel_pm_types.h"
 #include "intel_runtime_pm.h"
 #include "intel_step.h"
 #include "intel_uncore.h"
@@ -730,69 +731,6 @@ struct intel_vbt_data {
struct sdvo_device_mapping sdvo_mappings[2];
 };
 
-enum intel_ddb_partitioning {
-   INTEL_DDB_PART_1_2,
-   INTEL_DDB_PART_5_6, /* IVB+ */
-};
-
-struct ilk_wm_values {
-   u32 wm_pipe[3];
-   u32 wm_lp[3];
-   u32 wm_lp_spr[3];
-   bool enable_fbc_wm;
-   enum intel_ddb_partitioning partitioning;
-};
-
-struct g4x_pipe_wm {
-   u16 plane[I915_MAX_PLANES];
-   u16 fbc;
-};
-
-struct g4x_sr_wm {
-   u16 plane;
-   u16 cursor;
-   u16 fbc;
-};
-
-struct vlv_wm_ddl_values {
-   u8 plane[I915_MAX_PLANES];
-};
-
-struct vlv_wm_values {
-   struct g4x_pipe_wm pipe[3];
-   struct g4x_sr_wm sr;
-   struct vlv_wm_ddl_values ddl[3];
-   u8 level;
-   bool cxsr;
-};
-
-struct g4x_wm_values {
-   struct g4x_pipe_wm pipe[2];
-   struct g4x_sr_wm sr;
-   struct g4x_sr_wm hpll;
-   bool cxsr;
-   bool hpll_en;
-   bool fbc_en;
-};
-
-struct skl_ddb_entry {
-   u16 start, end; /* in number of blocks, 'end' is exclusive */
-};
-
-static inline u16 skl_ddb_entry_size(const struct skl_ddb_entry *entry)
-{
-   return entry->end - entry->start;
-}
-
-static inline bool skl_ddb_entry_equal(const struct skl_ddb_entry *e1,
-  const struct skl_ddb_entry *e2)
-{
-   if (e1->start == e2->start && e1->end == e2->end)
-   return true;
-
-   return false;
-}
-
 struct i915_frontbuffer_tracking {
spinlock_t lock;
 
diff --git a/drivers/gpu/drm/i915/intel_pm_types.h 
b/drivers/gpu/drm/i915/intel_pm_types.h
new file mode 100644
index ..211632f58751
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_pm_types.h
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __INTEL_PM_TYPES_H__
+#define __INTEL_PM_TYPES_H__
+
+#include 
+
+#include "display/intel_display.h"
+
+enum intel_ddb_partitioning {
+   INTEL_DDB_PART_1_2,
+   INTEL_DDB_PART_5_6, /* IVB+ */
+};
+
+struct ilk_wm_values {
+   u32 wm_pipe[3];
+   u32 wm_lp[3];
+   u32 wm_lp_spr[3];
+   bool enable_fbc_wm;
+   enum intel_ddb_partitioning partitioning;
+};
+
+struct g4x_pipe_wm {
+   u16 plane[I915_MAX_PLANES];
+   u16 fbc;
+};
+
+struct g4x_sr_wm {
+   u16 plane;
+   u16 cursor;
+   u16 fbc;
+};
+
+struct vlv_wm_ddl_values {
+   u8 plane[I915_MAX_PLANES];
+};
+
+struct vlv_wm_values {
+   struct g4x_pipe_wm pipe[3];
+   struct g4x_sr_wm sr;
+   struct vlv_wm_ddl_values ddl[3];
+   u8 level;
+   bool cxsr;
+};
+
+struct g4x_wm_values {
+   struct g4x_pipe_wm pipe[2];
+   struct g4x_sr_wm sr;
+   struct g4x_sr_wm hpll;
+   bool cxsr;
+   bool hpll_en;
+   bool fbc_en;
+};
+
+struct skl_ddb_entry {
+   u16 start, end; /* in number of blocks, 'end' is exclusive */
+};
+
+static inline u16 skl_ddb_entry_size(const struct skl_ddb_entry *entry)
+{
+   return entry->end - entry->start;
+}
+
+static inline bool skl_ddb_entry_equal(const struct skl_ddb_entry *e1,
+  const struct skl_ddb_entry *e2)
+{
+   if (e1->start == e2->start && e1->end == e2->end)
+   return true;
+
+   return false;
+}
+
+#endif /* __INTEL_PM_TYPES_H__ */
-- 
2.30.2

[Intel-gfx] [PATCH 4/8] drm/i915/fb: move intel_fb_uses_dpt to intel_fb.c and un-inline

[Jani Nikula]

Move fb functions where they belong, and un-inline to avoid looking into
struct drm_i915_private guts in header files.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 10 --
 drivers/gpu/drm/i915/display/intel_fb.c| 10 ++
 drivers/gpu/drm/i915/display/intel_fb.h|  2 ++
 3 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 06edc92e4f7c..338ac3bd08ac 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1987,16 +1987,6 @@ intel_crtc_needs_modeset(const struct intel_crtc_state 
*crtc_state)
return drm_atomic_crtc_needs_modeset(_state->uapi);
 }
 
-static inline bool intel_modifier_uses_dpt(struct drm_i915_private *i915, u64 
modifier)
-{
-   return DISPLAY_VER(i915) >= 13 && modifier != DRM_FORMAT_MOD_LINEAR;
-}
-
-static inline bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
-{
-   return fb && intel_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);
-}
-
 static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state 
*plane_state)
 {
return i915_ggtt_offset(plane_state->ggtt_vma);
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index c4a743d0913f..99769132c35b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -658,6 +658,16 @@ static unsigned int intel_fb_modifier_to_tiling(u64 
fb_modifier)
}
 }
 
+static bool intel_modifier_uses_dpt(struct drm_i915_private *i915, u64 
modifier)
+{
+   return DISPLAY_VER(i915) >= 13 && modifier != DRM_FORMAT_MOD_LINEAR;
+}
+
+bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
+{
+   return fb && intel_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);
+}
+
 unsigned int intel_cursor_alignment(const struct drm_i915_private *i915)
 {
if (IS_I830(i915))
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
b/drivers/gpu/drm/i915/display/intel_fb.h
index b54997175d6d..ba9df8986c1e 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -90,4 +90,6 @@ intel_user_framebuffer_create(struct drm_device *dev,
  struct drm_file *filp,
  const struct drm_mode_fb_cmd2 *user_mode_cmd);
 
+bool intel_fb_uses_dpt(const struct drm_framebuffer *fb);
+
 #endif /* __INTEL_FB_H__ */
-- 
2.30.2

[Intel-gfx] [PATCH 3/8] drm/i915/crtc: un-inline some crtc functions and move to intel_crtc.[ch]

[Jani Nikula]

Move a number of crtc/pipe related functions to intel_crtc.[ch], and
un-inline to avoid looking into struct drm_i915_private guts in header
files.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_crtc.c | 37 ++
 drivers/gpu/drm/i915/display/intel_crtc.h |  9 +
 .../drm/i915/display/intel_display_types.h| 38 ---
 3 files changed, 46 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c 
b/drivers/gpu/drm/i915/display/intel_crtc.c
index eb5444f90e77..ef39b03ba173 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -36,6 +36,43 @@ static void assert_vblank_disabled(struct drm_crtc *crtc)
drm_crtc_vblank_put(crtc);
 }
 
+bool intel_pipe_valid(struct drm_i915_private *i915, enum pipe pipe)
+{
+   return (pipe >= 0 &&
+   pipe < ARRAY_SIZE(i915->pipe_to_crtc_mapping) &&
+   INTEL_INFO(i915)->pipe_mask & BIT(pipe) &&
+   i915->pipe_to_crtc_mapping[pipe]);
+}
+
+struct intel_crtc *intel_get_first_crtc(struct drm_i915_private *i915)
+{
+   return to_intel_crtc(drm_crtc_from_index(>drm, 0));
+}
+
+struct intel_crtc *intel_get_crtc_for_pipe(struct drm_i915_private *i915,
+  enum pipe pipe)
+{
+   /* pipe_to_crtc_mapping may have hole on any of 3 display pipe system */
+   drm_WARN_ON(>drm,
+   !(INTEL_INFO(i915)->pipe_mask & BIT(pipe)));
+   return i915->pipe_to_crtc_mapping[pipe];
+}
+
+struct intel_crtc *intel_get_crtc_for_plane(struct drm_i915_private *i915,
+   enum i9xx_plane_id plane)
+{
+   return i915->plane_to_crtc_mapping[plane];
+}
+
+void intel_wait_for_vblank_if_active(struct drm_i915_private *i915,
+enum pipe pipe)
+{
+   struct intel_crtc *crtc = intel_get_crtc_for_pipe(i915, pipe);
+
+   if (crtc->active)
+   drm_crtc_wait_one_vblank(>base);
+}
+
 u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc)
 {
struct drm_device *dev = crtc->base.dev;
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.h 
b/drivers/gpu/drm/i915/display/intel_crtc.h
index a0039fdb1eb0..ef3eeb399a32 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.h
+++ b/drivers/gpu/drm/i915/display/intel_crtc.h
@@ -8,6 +8,7 @@
 
 #include 
 
+enum i9xx_plane_id;
 enum pipe;
 struct drm_display_mode;
 struct drm_i915_private;
@@ -28,5 +29,13 @@ void intel_crtc_vblank_off(const struct intel_crtc_state 
*crtc_state);
 void intel_pipe_update_start(struct intel_crtc_state *new_crtc_state);
 void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state);
 void intel_wait_for_vblank_workers(struct intel_atomic_state *state);
+bool intel_pipe_valid(struct drm_i915_private *i915, enum pipe pipe);
+struct intel_crtc *intel_get_first_crtc(struct drm_i915_private *i915);
+struct intel_crtc *intel_get_crtc_for_pipe(struct drm_i915_private *i915,
+  enum pipe pipe);
+struct intel_crtc *intel_get_crtc_for_plane(struct drm_i915_private *i915,
+   enum i9xx_plane_id plane);
+void intel_wait_for_vblank_if_active(struct drm_i915_private *i915,
+enum pipe pipe);
 
 #endif
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 2a18c4e554ef..06edc92e4f7c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1770,35 +1770,6 @@ vlv_pipe_to_channel(enum pipe pipe)
}
 }
 
-static inline bool intel_pipe_valid(struct drm_i915_private *i915, enum pipe 
pipe)
-{
-   return (pipe >= 0 &&
-   pipe < ARRAY_SIZE(i915->pipe_to_crtc_mapping) &&
-   INTEL_INFO(i915)->pipe_mask & BIT(pipe) &&
-   i915->pipe_to_crtc_mapping[pipe]);
-}
-
-static inline struct intel_crtc *
-intel_get_first_crtc(struct drm_i915_private *dev_priv)
-{
-   return to_intel_crtc(drm_crtc_from_index(_priv->drm, 0));
-}
-
-static inline struct intel_crtc *
-intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
-{
-   /* pipe_to_crtc_mapping may have hole on any of 3 display pipe system */
-   drm_WARN_ON(_priv->drm,
-   !(INTEL_INFO(dev_priv)->pipe_mask & BIT(pipe)));
-   return dev_priv->pipe_to_crtc_mapping[pipe];
-}
-
-static inline struct intel_crtc *
-intel_get_crtc_for_plane(struct drm_i915_private *dev_priv, enum i9xx_plane_id 
plane)
-{
-   return dev_priv->plane_to_crtc_mapping[plane];
-}
-
 struct intel_load_detect_pipe {
struct drm_atomic_state *restore_state;
 };
@@ -2016,15 +1987,6 @@ intel_crtc_needs_modeset(const struct intel_crtc_state 
*crtc_state)
return drm_atomic_crtc_needs_modeset(_state->uapi);
 }
 
-static inline 

[Intel-gfx] [PATCH 2/8] drm/i915/display: remove intel_wait_for_vblank()

[Jani Nikula]

There are only three call sites remaining for
intel_wait_for_vblank(). Remove the function, and open code it to avoid
new users from showing up.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
 drivers/gpu/drm/i915/display/intel_crt.c   | 2 +-
 drivers/gpu/drm/i915/display/intel_display.c   | 8 ++--
 drivers/gpu/drm/i915/display/intel_display_types.h | 8 
 4 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 91c19e0a98d7..e3b863ee0bbb 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1690,7 +1690,7 @@ static void bxt_set_cdclk(struct drm_i915_private 
*dev_priv,
intel_de_write(dev_priv, CDCLK_CTL, val);
 
if (pipe != INVALID_PIPE)
-   intel_wait_for_vblank(dev_priv, pipe);
+   drm_crtc_wait_one_vblank(_get_crtc_for_pipe(dev_priv, 
pipe)->base);
 
if (DISPLAY_VER(dev_priv) >= 11) {
ret = sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c 
b/drivers/gpu/drm/i915/display/intel_crt.c
index 8796527f74e5..43b3f6044f96 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -721,7 +721,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
intel_uncore_posting_read(uncore, pipeconf_reg);
/* Wait for next Vblank to substitue
 * border color for Color info */
-   intel_wait_for_vblank(dev_priv, pipe);
+   drm_crtc_wait_one_vblank(_get_crtc_for_pipe(dev_priv, 
pipe)->base);
st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE);
status = ((st00 & (1 << 4)) != 0) ?
connector_status_connected :
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 48d93d1f6c1a..1fc602bdfde1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2098,8 +2098,12 @@ static void hsw_crtc_enable(struct intel_atomic_state 
*state,
 * to change the workaround. */
hsw_workaround_pipe = new_crtc_state->hsw_workaround_pipe;
if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != INVALID_PIPE) {
-   intel_wait_for_vblank(dev_priv, hsw_workaround_pipe);
-   intel_wait_for_vblank(dev_priv, hsw_workaround_pipe);
+   struct intel_crtc *wa_crtc;
+
+   wa_crtc = intel_get_crtc_for_pipe(dev_priv, 
hsw_workaround_pipe);
+
+   drm_crtc_wait_one_vblank(_crtc->base);
+   drm_crtc_wait_one_vblank(_crtc->base);
}
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index a5508b8cdf63..2a18c4e554ef 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -2016,14 +2016,6 @@ intel_crtc_needs_modeset(const struct intel_crtc_state 
*crtc_state)
return drm_atomic_crtc_needs_modeset(_state->uapi);
 }
 
-static inline void
-intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
-{
-   struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
-
-   drm_crtc_wait_one_vblank(>base);
-}
-
 static inline void
 intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe 
pipe)
 {
-- 
2.30.2

[Intel-gfx] [PATCH 1/8] drm/i915/display: use drm_crtc_wait_one_vblank() directly when possible

[Jani Nikula]

intel_wait_for_vblank() goes through a pipe to crtc lookup, while in
most cases we already have the crtc available. Avoid the extra lookups.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_crt.c  |  4 +--
 drivers/gpu/drm/i915/display/intel_display.c  | 29 +--
 .../drm/i915/display/intel_display_types.h|  4 +--
 drivers/gpu/drm/i915/display/intel_dp.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_sdvo.c |  2 +-
 drivers/gpu/drm/i915/display/intel_tv.c   |  7 ++---
 6 files changed, 23 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crt.c 
b/drivers/gpu/drm/i915/display/intel_crt.c
index f0f28572dfdc..8796527f74e5 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -321,8 +321,8 @@ static void hsw_enable_crt(struct intel_atomic_state *state,
 
intel_crt_set_dpms(encoder, crtc_state, DRM_MODE_DPMS_ON);
 
-   intel_wait_for_vblank(dev_priv, pipe);
-   intel_wait_for_vblank(dev_priv, pipe);
+   drm_crtc_wait_one_vblank(>base);
+   drm_crtc_wait_one_vblank(>base);
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index f3c9208a30b1..48d93d1f6c1a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -772,7 +772,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
 */
if (HAS_GMCH(dev_priv) &&
intel_set_memory_cxsr(dev_priv, false))
-   intel_wait_for_vblank(dev_priv, crtc->pipe);
+   drm_crtc_wait_one_vblank(>base);
 
/*
 * Gen2 reports pipe underruns whenever all planes are disabled.
@@ -782,7 +782,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, 
false);
 
intel_plane_disable_arm(plane, crtc_state);
-   intel_wait_for_vblank(dev_priv, crtc->pipe);
+   drm_crtc_wait_one_vblank(>base);
 }
 
 unsigned int
@@ -1155,7 +1155,7 @@ void hsw_disable_ips(const struct intel_crtc_state 
*crtc_state)
}
 
/* We need to wait for a vblank before we can disable the plane. */
-   intel_wait_for_vblank(dev_priv, crtc->pipe);
+   drm_crtc_wait_one_vblank(>base);
 }
 
 static void intel_crtc_dpms_overlay_disable(struct intel_crtc *crtc)
@@ -1386,7 +1386,6 @@ static void intel_crtc_disable_flip_done(struct 
intel_atomic_state *state,
 static void intel_crtc_async_flip_disable_wa(struct intel_atomic_state *state,
 struct intel_crtc *crtc)
 {
-   struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
const struct intel_crtc_state *new_crtc_state =
@@ -1412,7 +1411,7 @@ static void intel_crtc_async_flip_disable_wa(struct 
intel_atomic_state *state,
}
 
if (need_vbl_wait)
-   intel_wait_for_vblank(i915, crtc->pipe);
+   drm_crtc_wait_one_vblank(>base);
 }
 
 static void intel_pre_plane_update(struct intel_atomic_state *state,
@@ -1431,7 +1430,7 @@ static void intel_pre_plane_update(struct 
intel_atomic_state *state,
hsw_disable_ips(old_crtc_state);
 
if (intel_fbc_pre_update(state, crtc))
-   intel_wait_for_vblank(dev_priv, pipe);
+   drm_crtc_wait_one_vblank(>base);
 
if (!needs_async_flip_vtd_wa(old_crtc_state) &&
needs_async_flip_vtd_wa(new_crtc_state))
@@ -1463,7 +1462,7 @@ static void intel_pre_plane_update(struct 
intel_atomic_state *state,
 */
if (HAS_GMCH(dev_priv) && old_crtc_state->hw.active &&
new_crtc_state->disable_cxsr && intel_set_memory_cxsr(dev_priv, 
false))
-   intel_wait_for_vblank(dev_priv, pipe);
+   drm_crtc_wait_one_vblank(>base);
 
/*
 * IVB workaround: must disable low power watermarks for at least
@@ -1474,7 +1473,7 @@ static void intel_pre_plane_update(struct 
intel_atomic_state *state,
 */
if (old_crtc_state->hw.active &&
new_crtc_state->disable_lp_wm && ilk_disable_lp_wm(dev_priv))
-   intel_wait_for_vblank(dev_priv, pipe);
+   drm_crtc_wait_one_vblank(>base);
 
/*
 * If we're doing a modeset we don't need to do any
@@ -1890,8 +1889,8 @@ static void ilk_crtc_enable(struct intel_atomic_state 
*state,
 * in case there are more corner cases we don't know about.
 */
if (new_crtc_state->has_pch_encoder) {
-   intel_wait_for_vblank(dev_priv, pipe);
-   intel_wait_for_vblank(dev_priv, pipe);
+   

[Intel-gfx] [PATCH 0/8] drm/i915: break intel_display_types.h dependency on i915_drv.h

[Jani Nikula]

Basically the rule of thumb should be that no headers include
i915_drv.h. It's just too big and includes the world. One of the worst
is intel_display_types.h. Untangle the mess a bit. There are some
changes here that are less than perfect, and there's further cleanup to
be done, but with the dependency gone, it should gradually get easier.

BR,
Jani.

Jani Nikula (8):
  drm/i915/display: use drm_crtc_wait_one_vblank() directly when
possible
  drm/i915/display: remove intel_wait_for_vblank()
  drm/i915/crtc: un-inline some crtc functions and move to
intel_crtc.[ch]
  drm/i915/fb: move intel_fb_uses_dpt to intel_fb.c and un-inline
  drm/i915: split out intel_pm_types.h
  drm/i915: move enum hpd_pin to intel_display.h
  drm/i915/display: convert dp_to_i915() to a macro
  drm/i915/display: stop including i915_drv.h from intel_display_types.h

 drivers/gpu/drm/i915/display/intel_cdclk.c|  2 +-
 drivers/gpu/drm/i915/display/intel_crt.c  |  6 +-
 drivers/gpu/drm/i915/display/intel_crtc.c | 37 
 drivers/gpu/drm/i915/display/intel_crtc.h |  9 ++
 drivers/gpu/drm/i915/display/intel_display.c  | 37 
 drivers/gpu/drm/i915/display/intel_display.h  | 24 +
 .../drm/i915/display/intel_display_types.h| 72 +++
 drivers/gpu/drm/i915/display/intel_dp.c   |  2 +-
 .../drm/i915/display/intel_dp_aux_backlight.c |  1 +
 .../drm/i915/display/intel_dp_link_training.c |  2 +-
 drivers/gpu/drm/i915/display/intel_dsi.c  |  2 +
 drivers/gpu/drm/i915/display/intel_fb.c   | 11 +++
 drivers/gpu/drm/i915/display/intel_fb.h   |  2 +
 drivers/gpu/drm/i915/display/intel_fb_pin.c   | 10 +--
 .../drm/i915/display/intel_plane_initial.c|  5 +-
 drivers/gpu/drm/i915/display/intel_quirks.c   |  1 +
 drivers/gpu/drm/i915/display/intel_sdvo.c |  2 +-
 drivers/gpu/drm/i915/display/intel_tv.c   |  7 +-
 drivers/gpu/drm/i915/i915_drv.h   | 88 +--
 drivers/gpu/drm/i915/intel_pm_types.h | 76 
 20 files changed, 212 insertions(+), 184 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_pm_types.h

-- 
2.30.2