[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Decouple engine->sanitize callback on removing the status page
== Series Details ==
Series: drm/i915: Decouple engine->sanitize callback on removing the status page
URL : https://patchwork.freedesktop.org/series/101679/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11398 -> Patchwork_22656
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/index.html
Participating hosts (44 -> 43)
--
Additional (5): bat-dg2-8 bat-dg2-9 fi-kbl-8809g bat-rpls-1 bat-jsl-1
Missing(6): shard-tglu fi-hsw-4200u bat-adlm-1 fi-bsw-cyan fi-ctg-p8600
fi-bdw-samus
Known issues
Here are the changes found in Patchwork_22656 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s0@smem:
- fi-kbl-8809g: NOTRUN -> [DMESG-WARN][1] ([i915#4962]) +1 similar
issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/fi-kbl-8809g/igt@gem_exec_suspend@basic...@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@random-engines:
- fi-kbl-8809g: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3
similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/fi-kbl-8809g/igt@gem_lmem_swapp...@random-engines.html
* igt@i915_pm_rpm@basic-rte:
- fi-kbl-8809g: NOTRUN -> [SKIP][4] ([fdo#109271]) +54 similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/fi-kbl-8809g/igt@i915_pm_...@basic-rte.html
* igt@kms_chamelium@hdmi-edid-read:
- fi-kbl-8809g: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827]) +8
similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/fi-kbl-8809g/igt@kms_chamel...@hdmi-edid-read.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-kbl-8809g: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#5341])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/fi-kbl-8809g/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-8809g: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#533])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/fi-kbl-8809g/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
Possible fixes
* igt@i915_selftest@live@gt_timelines:
- {bat-rpls-2}: [DMESG-WARN][8] ([i915#4391]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11398/bat-rpls-2/igt@i915_selftest@live@gt_timelines.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/bat-rpls-2/igt@i915_selftest@live@gt_timelines.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-6}: [DMESG-WARN][10] ([i915#3576]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11398/bat-adlp-6/igt@kms_busy@ba...@modeset.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/bat-adlp-6/igt@kms_busy@ba...@modeset.html
Warnings
* igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u: [DMESG-WARN][12] ([i915#295]) -> [DMESG-FAIL][13]
([i915#295])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11398/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22656/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
[i915#3003]: https://gitlab.freedesktop.org/drm/intel/issues/3003
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3576]:
Re: [Intel-gfx] [v8 3/5] drm/edid: read HF-EEODB ext block
On Wed, 23 Mar 2022, Simon Ser wrote: > On Wednesday, March 23rd, 2022 at 13:02, Jani Nikula > wrote: > >> Simon and Daniel also tell me on IRC we can't just modify the base block >> extension count to match HF-EEODB to dodge the problem, because the EDID >> gets exposed to userspace. > > I'm not familiar how the EDID blob gets exposed to user-space. If the > EDID data gets copied when creating the blob, and the blob is created > before the kernel mutates the EDID to accomodate for HF-EEODB, then > this proposal might still be workable. You'd still end up with tracking separate copies of the EDID, which is not necessarily easier. There are almost 70 calls to update the connector EDID property that gets exposed to userspace, and the call sites would need to know which copy to pass. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [v8 3/5] drm/edid: read HF-EEODB ext block
On Wednesday, March 23rd, 2022 at 13:02, Jani Nikula wrote: > Simon and Daniel also tell me on IRC we can't just modify the base block > extension count to match HF-EEODB to dodge the problem, because the EDID > gets exposed to userspace. I'm not familiar how the EDID blob gets exposed to user-space. If the EDID data gets copied when creating the blob, and the blob is created before the kernel mutates the EDID to accomodate for HF-EEODB, then this proposal might still be workable.
Re: [Intel-gfx] [v8 3/5] drm/edid: read HF-EEODB ext block
On Wed, 23 Mar 2022, Jani Nikula wrote:
> On Thu, 17 Mar 2022, Lee Shawn C wrote:
>> According to HDMI 2.1 spec.
>>
>> "The HDMI Forum EDID Extension Override Data Block (HF-EEODB)
>> is utilized by Sink Devices to provide an alternate method to
>> indicate an EDID Extension Block count larger than 1, while
>> avoiding the need to present a VESA Block Map in the first
>> E-EDID Extension Block."
>>
>> It is a mandatory for HDMI 2.1 protocol compliance as well.
>> This patch help to know how many HF_EEODB blocks report by sink
>> and read allo HF_EEODB blocks back.
>
> It still just boggles my mind that they've implemented something like
> this. They cite avoiding the EDID Block Map as the rationale... but it's
> been optional since E-EDID structure v1.4, published in 2006. 15+ years
> ago.
>
> Can anyone tell me a sane reason for this? What does it provide that
> E-EDID 1.4 does not? Do they want to use E-EDID v1.3 with this? Why?
Oh, and the main problem with the whole thing, and this implementation?
If you have a struct edid *, there's no way way to tell if whoever
allocated the memory or copied the block was actually HF-EEODB aware.
Basically we'd have to audit every single piece of EDID handling code
across all drivers to see if they handle HF-EEODB properly. If we don't,
it's a question of time a struct edid * with HF-EEODB but no memory
allocated for the extensions gets passed to a function that understands
it, and overflows the buffer.
Simon and Daniel also tell me on IRC we can't just modify the base block
extension count to match HF-EEODB to dodge the problem, because the EDID
gets exposed to userspace.
BR,
Jani.
>
> BR,
> Jani.
>
>
>>
>> v2: support to find CEA block, check EEODB block format, and return
>> available block number in drm_edid_read_hf_eeodb_blk_count().
>>
>> Cc: Jani Nikula
>> Cc: Ville Syrjala
>> Cc: Ankit Nautiyal
>> Cc: intel-gfx
>> Signed-off-by: Lee Shawn C
>> ---
>> drivers/gpu/drm/drm_connector.c | 8 +++-
>> drivers/gpu/drm/drm_edid.c | 71 +++--
>> include/drm/drm_edid.h | 2 +-
>> 3 files changed, 74 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_connector.c
>> b/drivers/gpu/drm/drm_connector.c
>> index a50c82bc2b2f..16011023c12e 100644
>> --- a/drivers/gpu/drm/drm_connector.c
>> +++ b/drivers/gpu/drm/drm_connector.c
>> @@ -2129,7 +2129,7 @@ int drm_connector_update_edid_property(struct
>> drm_connector *connector,
>> const struct edid *edid)
>> {
>> struct drm_device *dev = connector->dev;
>> -size_t size = 0;
>> +size_t size = 0, hf_eeodb_blk_count;
>> int ret;
>> const struct edid *old_edid;
>>
>> @@ -2137,8 +2137,12 @@ int drm_connector_update_edid_property(struct
>> drm_connector *connector,
>> if (connector->override_edid)
>> return 0;
>>
>> -if (edid)
>> +if (edid) {
>> size = EDID_LENGTH * (1 + edid->extensions);
>> +hf_eeodb_blk_count = drm_edid_read_hf_eeodb_blk_count(edid);
>> +if (hf_eeodb_blk_count)
>> +size = EDID_LENGTH * (1 + hf_eeodb_blk_count);
>> +}
>>
>> /* Set the display info, using edid if available, otherwise
>> * resetting the values to defaults. This duplicates the work
>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
>> index ef65dd97d700..890038758660 100644
>> --- a/drivers/gpu/drm/drm_edid.c
>> +++ b/drivers/gpu/drm/drm_edid.c
>> @@ -1992,6 +1992,7 @@ struct edid *drm_do_get_edid(struct drm_connector
>> *connector,
>> {
>> int i, j = 0, valid_extensions = 0;
>> u8 *edid, *new;
>> +size_t hf_eeodb_blk_count;
>> struct edid *override;
>>
>> override = drm_get_override_edid(connector);
>> @@ -2051,7 +2052,35 @@ struct edid *drm_do_get_edid(struct drm_connector
>> *connector,
>> }
>>
>> kfree(edid);
>> +return (struct edid *)new;
>> +}
>> +
>> +hf_eeodb_blk_count = drm_edid_read_hf_eeodb_blk_count((struct edid
>> *)edid);
>> +if (hf_eeodb_blk_count >= 2) {
>> +new = krealloc(edid, (hf_eeodb_blk_count + 1) * EDID_LENGTH,
>> GFP_KERNEL);
>> +if (!new)
>> +goto out;
>> edid = new;
>> +
>> +valid_extensions = hf_eeodb_blk_count - 1;
>> +for (j = 2; j <= hf_eeodb_blk_count; j++) {
>> +u8 *block = edid + j * EDID_LENGTH;
>> +
>> +for (i = 0; i < 4; i++) {
>> +if (get_edid_block(data, block, j, EDID_LENGTH))
>> +goto out;
>> +if (drm_edid_block_valid(block, j, false, NULL))
>> +break;
>> +}
>> +
>> +if (i == 4)
>> +valid_extensions--;
>> +}
>> +
>> +if
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Decouple engine->sanitize callback on removing the status page
== Series Details == Series: drm/i915: Decouple engine->sanitize callback on removing the status page URL : https://patchwork.freedesktop.org/series/101679/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not found ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_disable' not found
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Decouple engine->sanitize callback on removing the status page
== Series Details == Series: drm/i915: Decouple engine->sanitize callback on removing the status page URL : https://patchwork.freedesktop.org/series/101679/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Decouple engine->sanitize callback on removing the status page
== Series Details == Series: drm/i915: Decouple engine->sanitize callback on removing the status page URL : https://patchwork.freedesktop.org/series/101679/ State : warning == Summary == $ dim checkpatch origin/drm-tip 716dbea36f93 drm/i915: Decouple engine->sanitize callback on removing the status page -:17: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #17: <3> [306.359604] BUG: KASAN: slab-out-of-bounds in xcs_sanitize+0x4a/0x110 [i915] total: 0 errors, 1 warnings, 0 checks, 91 lines checked
[Intel-gfx] ✓ Fi.CI.BAT: success for Remove check for ComboPHY I/O voltage for DP source rate (rev5)
== Series Details ==
Series: Remove check for ComboPHY I/O voltage for DP source rate (rev5)
URL : https://patchwork.freedesktop.org/series/96293/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11398 -> Patchwork_22655
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/index.html
Participating hosts (43 -> 42)
--
Additional (5): bat-dg2-8 bat-dg2-9 fi-kbl-8809g bat-rpls-1 bat-jsl-1
Missing(6): fi-hsw-4200u bat-adlm-1 fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510
fi-bdw-samus
Known issues
Here are the changes found in Patchwork_22655 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html
* igt@gem_exec_suspend@basic-s0@smem:
- fi-kbl-8809g: NOTRUN -> [DMESG-WARN][2] ([i915#4962]) +1 similar
issue
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-kbl-8809g/igt@gem_exec_suspend@basic...@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@random-engines:
- fi-kbl-8809g: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3
similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-kbl-8809g/igt@gem_lmem_swapp...@random-engines.html
* igt@i915_module_load@reload:
- fi-kbl-soraka: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11398/fi-kbl-soraka/igt@i915_module_l...@reload.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-kbl-soraka/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@execlists:
- fi-bsw-n3050: [PASS][7] -> [INCOMPLETE][8] ([i915#2940])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11398/fi-bsw-n3050/igt@i915_selftest@l...@execlists.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-bsw-n3050/igt@i915_selftest@l...@execlists.html
* igt@kms_chamelium@hdmi-edid-read:
- fi-kbl-8809g: NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) +8
similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-kbl-8809g/igt@kms_chamel...@hdmi-edid-read.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-kbl-8809g: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#5341])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-kbl-8809g/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-8809g: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#533])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-kbl-8809g/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@cursor_plane_move:
- fi-kbl-8809g: NOTRUN -> [SKIP][12] ([fdo#109271]) +54 similar issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-kbl-8809g/igt@kms_psr@cursor_plane_move.html
* igt@runner@aborted:
- fi-bsw-n3050: NOTRUN -> [FAIL][13] ([fdo#109271] / [i915#1436] /
[i915#3428] / [i915#4312])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-bsw-n3050/igt@run...@aborted.html
Possible fixes
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[INCOMPLETE][14] ([i915#3921]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11398/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-6}: [DMESG-WARN][16] ([i915#3576]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11398/bat-adlp-6/igt@kms_busy@ba...@modeset.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/bat-adlp-6/igt@kms_busy@ba...@modeset.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u: [DMESG-WARN][18] ([i915#295]) -> [PASS][19] +10
similar issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11398/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22655/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-cfl-8109u: [DMESG-WARN][20] ([i915#295] / [i915#5341]) ->
[PASS][21]
[20]:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: add a check to verify the size alignment (rev2)
== Series Details ==
Series: drm: add a check to verify the size alignment (rev2)
URL : https://patchwork.freedesktop.org/series/101569/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11397_full -> Patchwork_22653_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_22653_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22653_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (12 -> 12)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_22653_full:
### IGT changes ###
Possible regressions
* igt@gem_eio@in-flight-suspend:
- shard-iclb: [PASS][1] -> [SKIP][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-iclb5/igt@gem_...@in-flight-suspend.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-iclb5/igt@gem_...@in-flight-suspend.html
* igt@gem_exec_whisper@basic-fds-priority-all:
- shard-skl: NOTRUN -> [INCOMPLETE][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-skl7/igt@gem_exec_whis...@basic-fds-priority-all.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_schedule@smoketest@vecs0:
- {shard-rkl}:[PASS][4] -> ([INCOMPLETE][5], [PASS][6])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-rkl-1/igt@gem_exec_schedule@smoket...@vecs0.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-rkl-5/igt@gem_exec_schedule@smoket...@vecs0.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-rkl-4/igt@gem_exec_schedule@smoket...@vecs0.html
Known issues
Here are the changes found in Patchwork_22653_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][7] ([i915#4991])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-skl4/igt@gem_cre...@create-massive.html
* igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][8] -> [TIMEOUT][9] ([i915#2481] / [i915#3070])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-iclb1/igt@gem_...@unwedge-stress.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-iclb3/igt@gem_...@unwedge-stress.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-kbl: [PASS][10] -> [FAIL][11] ([i915#2842])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-kbl1/igt@gem_exec_fair@basic-none-r...@rcs0.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-kbl3/igt@gem_exec_fair@basic-none-r...@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-glk: [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar
issue
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk4/igt@gem_exec_fair@basic-p...@vcs0.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-glk7/igt@gem_exec_fair@basic-p...@vcs0.html
* igt@gem_exec_whisper@basic-queues-priority:
- shard-iclb: [PASS][14] -> [INCOMPLETE][15] ([i915#1895])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-iclb4/igt@gem_exec_whis...@basic-queues-priority.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-iclb7/igt@gem_exec_whis...@basic-queues-priority.html
* igt@gem_lmem_swapping@parallel-random:
- shard-skl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613]) +2
similar issues
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-skl7/igt@gem_lmem_swapp...@parallel-random.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-tglb: NOTRUN -> [SKIP][17] ([i915#3323])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-tglb8/igt@gem_userptr_bl...@dmabuf-sync.html
* igt@gem_userptr_blits@unsync-unmap-after-close:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#3297])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-tglb8/igt@gem_userptr_bl...@unsync-unmap-after-close.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][19] -> [FAIL][20] ([i915#454])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-iclb1/igt@i915_pm...@dc6-psr.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/shard-iclb3/igt@i915_pm...@dc6-psr.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180:
- shard-tglb: NOTRUN ->
Re: [Intel-gfx] [PATCH v11] drm/amdgpu: add drm buddy support to amdgpu
Hi Arunpravin, Thank you for the patch! Yet something to improve: [auto build test ERROR on a678f97326454b60ffbbde6abf52d23997d71a27] url: https://github.com/0day-ci/linux/commits/Arunpravin-Paneer-Selvam/drm-amdgpu-add-drm-buddy-support-to-amdgpu/20220323-142749 base: a678f97326454b60ffbbde6abf52d23997d71a27 config: arc-allyesconfig (https://download.01.org/0day-ci/archive/20220323/202203231911.crbwbizj-...@intel.com/config) compiler: arceb-elf-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/5aa85728d353f9bcca7e25e17f800d014d77dee2 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Arunpravin-Paneer-Selvam/drm-amdgpu-add-drm-buddy-support-to-amdgpu/20220323-142749 git checkout 5aa85728d353f9bcca7e25e17f800d014d77dee2 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arc SHELL=/bin/bash If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): In file included from drivers/gpu/drm/amd/amdgpu/amdgpu.h:73, from drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:29: >> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h:29:10: fatal error: >> amdgpu_vram_mgr.h: No such file or directory 29 | #include "amdgpu_vram_mgr.h" | ^~~ compilation terminated. -- In file included from drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:73, from drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/arcturus_ppt.c:27: >> drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_ttm.h:29:10: fatal error: >> amdgpu_vram_mgr.h: No such file or directory 29 | #include "amdgpu_vram_mgr.h" | ^~~ compilation terminated. -- In file included from drivers/gpu/drm/amd/amdgpu/../display/dmub/dmub_srv.h:67, from drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:35: drivers/gpu/drm/amd/amdgpu/../display/dmub/inc/dmub_cmd.h: In function 'dmub_rb_flush_pending': drivers/gpu/drm/amd/amdgpu/../display/dmub/inc/dmub_cmd.h:3049:26: warning: variable 'temp' set but not used [-Wunused-but-set-variable] 3049 | uint64_t temp; | ^~~~ In file included from drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:73, from drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:44: drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_ttm.h: At top level: >> drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_ttm.h:29:10: fatal error: >> amdgpu_vram_mgr.h: No such file or directory 29 | #include "amdgpu_vram_mgr.h" | ^~~ compilation terminated. vim +29 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h 26 27 #include 28 #include > 29 #include "amdgpu_vram_mgr.h" 30 #include "amdgpu.h" 31 -- 0-DAY CI Kernel Test Service https://01.org/lkp
[Intel-gfx] ✗ Fi.CI.DOCS: warning for Remove check for ComboPHY I/O voltage for DP source rate (rev5)
== Series Details == Series: Remove check for ComboPHY I/O voltage for DP source rate (rev5) URL : https://patchwork.freedesktop.org/series/96293/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not found ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_disable' not found
Re: [Intel-gfx] [PATCH] drm/i915: Decouple engine->sanitize callback on removing the status page
On Wed, 23 Mar 2022 at 09:44, Gwan-gyeong Mun wrote:
>
> From: Chris Wilson
>
> We have to be careful not to call into the submission backend's sanitize
> callback if we abort the module load and free the status page. Since we
> are only using the sanitize callback to cleanup the status page when we
> suspect its contents may have been lost (first load, upon resume etc)
> let us move the callback to engine->status_page and remove it as we free
> the status page.
>
> <3> [306.359604] BUG: KASAN: slab-out-of-bounds in xcs_sanitize+0x4a/0x110
> [i915]
> <3> [306.360346] Write of size 4096 at addr 88806d5e8000 by task
> i915_module_loa/1052
> <3> [306.360561]
> <4> [306.360627] CPU: 1 PID: 1052 Comm: i915_module_loa Tainted: G U
> 5.12.0-rc2-g249f72def27bf-kasan_218+ #1
> <4> [306.360650] Hardware name: GIGABYTE GB-BXBT-1900/MZBAYAB-00, BIOS F6
> 02/17/2015
> <4> [306.360667] Call Trace:
> <4> [306.360688] dump_stack+0xa4/0xe5
> <4> [306.360727] ? xcs_sanitize+0x4a/0x110 [i915]
> <4> [306.361274] print_address_description.constprop.9+0x3a/0x60
> <4> [306.361311] ? xcs_sanitize+0x4a/0x110 [i915]
> <4> [306.361855] ? xcs_sanitize+0x4a/0x110 [i915]
> <4> [306.362408] kasan_report.cold.14+0x7c/0xd8
> <4> [306.362456] ? xcs_sanitize+0x4a/0x110 [i915]
> <4> [306.363015] kasan_check_range+0x1c1/0x1e0
> <4> [306.363056] memset+0x1f/0x40
> <4> [306.363093] xcs_sanitize+0x4a/0x110 [i915]
> <4> [306.363661] gt_sanitize+0x2f7/0x6d0 [i915]
> <4> [306.364221] ? __pm_runtime_suspend+0x186/0x2e0
> <4> [306.364270] intel_gt_suspend_late+0x126/0x2c0 [i915]
> <4> [306.364833] i915_gem_suspend_late+0x9d/0x470 [i915]
> <4> [306.365402] ? intel_wakeref_auto+0x3ba/0x520 [i915]
> <4> [306.365939] ? i915_gem_suspend+0x180/0x180 [i915]
> <4> [306.366521] i915_gem_driver_remove+0x25/0x1f0 [i915]
> <4> [306.367071] ? lockdep_hardirqs_on+0xbf/0x130
> <4> [306.367124] i915_driver_remove+0xba/0xf0 [i915]
> <4> [306.367670] i915_pci_remove+0x34/0x70 [i915]
> <4> [306.368224] pci_device_remove+0xa3/0x1e0
> <4> [306.368275] device_release_driver_internal+0x1e0/0x4a0
> <4> [306.368320] driver_detach+0xbc/0x180
> <4> [306.368364] bus_remove_driver+0x15e/0x2d0
> <4> [306.368404] pci_unregister_driver+0x28/0x220
> <4> [306.368456] i915_exit+0x1b/0x26 [i915]
> <4> [306.369055] __x64_sys_delete_module+0x257/0x370
> <4> [306.369093] ? __ia32_sys_delete_module+0x370/0x370
> <4> [306.369146] ? lockdep_hardirqs_on+0xbf/0x130
> <4> [306.369185] do_syscall_64+0x33/0x80
> <4> [306.369212] entry_SYSCALL_64_after_hwframe+0x44/0xae
> <4> [306.369237] RIP: 0033:0x7f7a7020fbcb
> <4> [306.369259] Code: 73 01 c3 48 8b 0d c5 82 0c 00 f7 d8 64 89 01 48 83 c8
> ff c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa b8 b0 00 00 00 0f 05 <48>
> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 95 82 0c 00 f7 d8 64 89 01 48
> <4> [306.369281] RSP: 002b:7ffc22d2ef78 EFLAGS: 0206 ORIG_RAX:
> 00b0
> <4> [306.369315] RAX: ffda RBX: 55724a324db0 RCX:
> 7f7a7020fbcb
> <4> [306.369334] RDX: 7f7a702d8be0 RSI: 0800 RDI:
> 55724a324e18
> <4> [306.369352] RBP: 7f7a70392702 R08: R09:
> 7f7a702d8da0
> <4> [306.369370] R10: 55724a2ee010 R11: 0206 R12:
>
> <4> [306.369388] R13: 7ffc22d2f670 R14: R15:
>
>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4105
> Fixes: b436a5f8b6c8 ("drm/i915/gt: Track all timelines created using the
> HWSP")
> Signed-off-by: Chris Wilson
> Signed-off-by: Gwan-gyeong Mun
> Cc: Thomas Hellström
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c| 7 +--
> drivers/gpu/drm/i915/gt/intel_engine_types.h | 4 +++-
> drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 4 +---
> drivers/gpu/drm/i915/gt/intel_gt_pm.c| 4 ++--
> drivers/gpu/drm/i915/gt/intel_ring_submission.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c| 4 ++--
> 6 files changed, 14 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 98b61ff13c95..7e3a65b0661c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -844,6 +844,9 @@ static void cleanup_status_page(struct intel_engine_cs
> *engine)
>
> i915_gem_object_unpin_map(vma->obj);
> i915_gem_object_put(vma->obj);
> +
> + /* no longer in control, nothing left to sanitize */
> + engine->status_page.sanitize = NULL;
> }
>
> static int pin_ggtt_status_page(struct intel_engine_cs *engine,
> @@ -1542,8 +1545,8 @@ void intel_engines_reset_default_submission(struct
> intel_gt *gt)
> enum intel_engine_id id;
>
> for_each_engine(engine, gt, id) {
> - if (engine->sanitize)
> - engine->sanitize(engine);
> + if
Re: [Intel-gfx] [PATCH] drm/edid: filter DisplayID v2.0 CTA block in audio detection
On Wed, 23 Mar 2022, "Lee, Shawn C" wrote: > On Wednesday, March 23, 2022 6:04 PM, Nikula, Jani > wrote : >>On Mon, 21 Mar 2022, Cooper Chiou wrote: >>> In DisplayID v2.0 CTS data block 0x81 case, there is no any audio >>> information definition, but drm_detect_monitor_audio didn't filter it >>> so that it caused eDP dummy audio card be detected improperly. >>> >>> We observed this issue on some AUO/BOE eDP panel with DID v2.0 CTA >>> block, and fix issue by adding filter for edid_ext[0]=DATA_BLOCK_CTA >>> case. >> >>Out of curiosity, what does the CTA DisplayID Data Block have for Data Block >>revision? >> >>I haven't found any mention anywhere that it should have any correspondence >>to the CEA *extension* revision number, which is supposed to be 1..3, and >>really only 3 for about a decade now. >> >>Both the DisplayID v1.3 and v2.0 specs only mention revision 0. >> >>BR, >>Jani. >> > > We don't get many issues in EDID with DisplayID structure. In this case, the > revision number is "0" as well. > As you mentioned, DisplayID v1.3 and v2.0 spec define the block revision > value is always 0. Do you think it would cause any problem? A lot of places in the EDID parser expect CEA revision >= 3. This isn't true for DisplayID data blocks, so we end up skipping a bunch of stuff if there's no CEA extension and only a DisplayID block. I'm fixing this in my series. BR, Jani. > > Best regards, > Shawn > >>> >>> Cc: Jani Nikula >>> Cc: Shawn C Lee >>> >>> Signed-off-by: Cooper Chiou >>> --- >>> drivers/gpu/drm/drm_edid.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c >>> index f5f5de362ff2..6c9ae4b130bd 100644 >>> --- a/drivers/gpu/drm/drm_edid.c >>> +++ b/drivers/gpu/drm/drm_edid.c >>> @@ -4845,7 +4845,7 @@ bool drm_detect_monitor_audio(struct edid *edid) >>> int start_offset, end_offset; >>> >>> edid_ext = drm_find_cea_extension(edid); >>> -if (!edid_ext) >>> +if (!edid_ext || (edid_ext[0] == DATA_BLOCK_CTA)) >>> goto end; >>> >>> has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); >> >>-- >>Jani Nikula, Intel Open Source Graphics Center >> -- Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] ✓ Fi.CI.BAT: success for Improve on resume time with VT-d enabled
== Series Details ==
Series: Improve on resume time with VT-d enabled
URL : https://patchwork.freedesktop.org/series/101676/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11397 -> Patchwork_22654
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/index.html
Participating hosts (49 -> 41)
--
Missing(8): shard-tglu fi-hsw-4200u bat-adlm-1 fi-bsw-cyan fi-ctg-p8600
shard-rkl shard-dg1 fi-bdw-samus
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_22654:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live@hugepages:
- {bat-rpls-2}: NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/bat-rpls-2/igt@i915_selftest@l...@hugepages.html
Known issues
Here are the changes found in Patchwork_22654 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@semaphore:
- fi-hsw-4770:NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#109315]) +17
similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/fi-hsw-4770/igt@amdgpu/amd_ba...@semaphore.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@smem:
- fi-glk-dsi: [DMESG-WARN][3] ([i915#2943]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-glk-dsi/igt@gem_exec_suspend@basic...@smem.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/fi-glk-dsi/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@coherency:
- {bat-rpls-2}: [INCOMPLETE][5] -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-rpls-2/igt@i915_selftest@l...@coherency.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/bat-rpls-2/igt@i915_selftest@l...@coherency.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [DMESG-FAIL][7] ([i915#4494] / [i915#4957]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html
- fi-hsw-4770:[INCOMPLETE][9] ([i915#3303]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
- {fi-hsw-g3258}: [INCOMPLETE][11] ([i915#4785]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
* igt@kms_busy@basic@flip:
- {bat-adlp-6}: [DMESG-WARN][13] ([i915#3576]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-adlp-6/igt@kms_busy@ba...@flip.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/bat-adlp-6/igt@kms_busy@ba...@flip.html
Warnings
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-rkl-guc: [SKIP][15] ([i915#4103]) -> [SKIP][16] ([i915#4070] /
[i915#4103]) +1 similar issue
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-rkl-guc/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/fi-rkl-guc/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-rkl-guc: [SKIP][17] ([i915#533]) -> [SKIP][18] ([i915#4070] /
[i915#533])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-rkl-guc/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22654/fi-rkl-guc/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2190]:
Re: [Intel-gfx] [PATCH] drm/edid: filter DisplayID v2.0 CTA block in audio detection
On Wednesday, March 23, 2022 6:04 PM, Nikula, Jani wrote : >On Mon, 21 Mar 2022, Cooper Chiou wrote: >> In DisplayID v2.0 CTS data block 0x81 case, there is no any audio >> information definition, but drm_detect_monitor_audio didn't filter it >> so that it caused eDP dummy audio card be detected improperly. >> >> We observed this issue on some AUO/BOE eDP panel with DID v2.0 CTA >> block, and fix issue by adding filter for edid_ext[0]=DATA_BLOCK_CTA >> case. > >Out of curiosity, what does the CTA DisplayID Data Block have for Data Block >revision? > >I haven't found any mention anywhere that it should have any correspondence to >the CEA *extension* revision number, which is supposed to be 1..3, and really >only 3 for about a decade now. > >Both the DisplayID v1.3 and v2.0 specs only mention revision 0. > >BR, >Jani. > We don't get many issues in EDID with DisplayID structure. In this case, the revision number is "0" as well. As you mentioned, DisplayID v1.3 and v2.0 spec define the block revision value is always 0. Do you think it would cause any problem? Best regards, Shawn >> >> Cc: Jani Nikula >> Cc: Shawn C Lee >> >> Signed-off-by: Cooper Chiou >> --- >> drivers/gpu/drm/drm_edid.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c >> index f5f5de362ff2..6c9ae4b130bd 100644 >> --- a/drivers/gpu/drm/drm_edid.c >> +++ b/drivers/gpu/drm/drm_edid.c >> @@ -4845,7 +4845,7 @@ bool drm_detect_monitor_audio(struct edid *edid) >> int start_offset, end_offset; >> >> edid_ext = drm_find_cea_extension(edid); >> -if (!edid_ext) >> +if (!edid_ext || (edid_ext[0] == DATA_BLOCK_CTA)) >> goto end; >> >> has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); > >-- >Jani Nikula, Intel Open Source Graphics Center >
Re: [Intel-gfx] [v8 3/5] drm/edid: read HF-EEODB ext block
On Thu, 17 Mar 2022, Lee Shawn C wrote:
> According to HDMI 2.1 spec.
>
> "The HDMI Forum EDID Extension Override Data Block (HF-EEODB)
> is utilized by Sink Devices to provide an alternate method to
> indicate an EDID Extension Block count larger than 1, while
> avoiding the need to present a VESA Block Map in the first
> E-EDID Extension Block."
>
> It is a mandatory for HDMI 2.1 protocol compliance as well.
> This patch help to know how many HF_EEODB blocks report by sink
> and read allo HF_EEODB blocks back.
It still just boggles my mind that they've implemented something like
this. They cite avoiding the EDID Block Map as the rationale... but it's
been optional since E-EDID structure v1.4, published in 2006. 15+ years
ago.
Can anyone tell me a sane reason for this? What does it provide that
E-EDID 1.4 does not? Do they want to use E-EDID v1.3 with this? Why?
BR,
Jani.
>
> v2: support to find CEA block, check EEODB block format, and return
> available block number in drm_edid_read_hf_eeodb_blk_count().
>
> Cc: Jani Nikula
> Cc: Ville Syrjala
> Cc: Ankit Nautiyal
> Cc: intel-gfx
> Signed-off-by: Lee Shawn C
> ---
> drivers/gpu/drm/drm_connector.c | 8 +++-
> drivers/gpu/drm/drm_edid.c | 71 +++--
> include/drm/drm_edid.h | 2 +-
> 3 files changed, 74 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index a50c82bc2b2f..16011023c12e 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -2129,7 +2129,7 @@ int drm_connector_update_edid_property(struct
> drm_connector *connector,
> const struct edid *edid)
> {
> struct drm_device *dev = connector->dev;
> - size_t size = 0;
> + size_t size = 0, hf_eeodb_blk_count;
> int ret;
> const struct edid *old_edid;
>
> @@ -2137,8 +2137,12 @@ int drm_connector_update_edid_property(struct
> drm_connector *connector,
> if (connector->override_edid)
> return 0;
>
> - if (edid)
> + if (edid) {
> size = EDID_LENGTH * (1 + edid->extensions);
> + hf_eeodb_blk_count = drm_edid_read_hf_eeodb_blk_count(edid);
> + if (hf_eeodb_blk_count)
> + size = EDID_LENGTH * (1 + hf_eeodb_blk_count);
> + }
>
> /* Set the display info, using edid if available, otherwise
>* resetting the values to defaults. This duplicates the work
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index ef65dd97d700..890038758660 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -1992,6 +1992,7 @@ struct edid *drm_do_get_edid(struct drm_connector
> *connector,
> {
> int i, j = 0, valid_extensions = 0;
> u8 *edid, *new;
> + size_t hf_eeodb_blk_count;
> struct edid *override;
>
> override = drm_get_override_edid(connector);
> @@ -2051,7 +2052,35 @@ struct edid *drm_do_get_edid(struct drm_connector
> *connector,
> }
>
> kfree(edid);
> + return (struct edid *)new;
> + }
> +
> + hf_eeodb_blk_count = drm_edid_read_hf_eeodb_blk_count((struct edid
> *)edid);
> + if (hf_eeodb_blk_count >= 2) {
> + new = krealloc(edid, (hf_eeodb_blk_count + 1) * EDID_LENGTH,
> GFP_KERNEL);
> + if (!new)
> + goto out;
> edid = new;
> +
> + valid_extensions = hf_eeodb_blk_count - 1;
> + for (j = 2; j <= hf_eeodb_blk_count; j++) {
> + u8 *block = edid + j * EDID_LENGTH;
> +
> + for (i = 0; i < 4; i++) {
> + if (get_edid_block(data, block, j, EDID_LENGTH))
> + goto out;
> + if (drm_edid_block_valid(block, j, false, NULL))
> + break;
> + }
> +
> + if (i == 4)
> + valid_extensions--;
> + }
> +
> + if (valid_extensions != hf_eeodb_blk_count - 1) {
> + DRM_ERROR("Not able to retrieve proper EDID contain
> HF-EEODB data.\n");
> + goto out;
> + }
> }
>
> return (struct edid *)edid;
> @@ -3315,15 +3344,17 @@ add_detailed_modes(struct drm_connector *connector,
> struct edid *edid,
> #define VIDEO_BLOCK 0x02
> #define VENDOR_BLOCK0x03
> #define SPEAKER_BLOCK0x04
> -#define HDR_STATIC_METADATA_BLOCK0x6
> -#define USE_EXTENDED_TAG 0x07
> -#define EXT_VIDEO_CAPABILITY_BLOCK 0x00
> +#define EXT_VIDEO_CAPABILITY_BLOCK 0x00
> +#define HDR_STATIC_METADATA_BLOCK0x06
> +#define USE_EXTENDED_TAG 0x07
> #define EXT_VIDEO_DATA_BLOCK_420 0x0E
> -#define EXT_VIDEO_CAP_BLOCK_Y420CMDB 0x0F
> +#define EXT_VIDEO_CAP_BLOCK_Y420CMDB 0x0F
> +#define
[Intel-gfx] ✗ Fi.CI.DOCS: warning for Improve on resume time with VT-d enabled
== Series Details == Series: Improve on resume time with VT-d enabled URL : https://patchwork.freedesktop.org/series/101676/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not found ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_disable' not found
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Improve on resume time with VT-d enabled
== Series Details == Series: Improve on resume time with VT-d enabled URL : https://patchwork.freedesktop.org/series/101676/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] [PATCH] drm/edid: fix CEA extension byte #3 parsing
Only an EDID CEA extension has byte #3, while the CTA DisplayID Data
Block does not. Don't interpret bogus data for color formats.
For most displays it's probably an unlikely scenario you'd have a CTA
DisplayID Data Block without a CEA extension, but they do exist.
Fixes: e28ad544f462 ("drm/edid: parse CEA blocks embedded in DisplayID")
Cc: # v4.15
Cc: Shawn C Lee
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
commit e28ad544f462 was merged in v5.3, but it has Cc: stable for v4.15.
This is also fixed in my CEA data block iteration series [1], but we'll
want the simple fix for stable first.
Hum, CTA is formerly CEA, I and the code seem to use both, should we use
only one or the other?
[1] https://patchwork.freedesktop.org/series/101659/
---
drivers/gpu/drm/drm_edid.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 561f53831e29..ccf7031a6797 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5187,10 +5187,14 @@ static void drm_parse_cea_ext(struct drm_connector
*connector,
/* The existence of a CEA block should imply RGB support */
info->color_formats = DRM_COLOR_FORMAT_RGB444;
- if (edid_ext[3] & EDID_CEA_YCRCB444)
- info->color_formats |= DRM_COLOR_FORMAT_YCBCR444;
- if (edid_ext[3] & EDID_CEA_YCRCB422)
- info->color_formats |= DRM_COLOR_FORMAT_YCBCR422;
+
+ /* CTA DisplayID Data Block does not have byte #3 */
+ if (edid_ext[0] == CEA_EXT) {
+ if (edid_ext[3] & EDID_CEA_YCRCB444)
+ info->color_formats |= DRM_COLOR_FORMAT_YCBCR444;
+ if (edid_ext[3] & EDID_CEA_YCRCB422)
+ info->color_formats |= DRM_COLOR_FORMAT_YCBCR422;
+ }
if (cea_db_offsets(edid_ext, , ))
return;
--
2.30.2
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Improve on resume time with VT-d enabled
== Series Details == Series: Improve on resume time with VT-d enabled URL : https://patchwork.freedesktop.org/series/101676/ State : warning == Summary == $ dim checkpatch origin/drm-tip f21c5b663eaf drm/i915: Wrap all access to i915_vma.node.start|size b41b256f8934 drm/i915: Introduce guard pages to i915_vma -:219: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_node' - possible side-effects? #219: FILE: drivers/gpu/drm/i915/i915_vma_resource.c:37: +#define VMA_RES_START(_node) ((_node)->start - (_node)->guard) -:220: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_node' - possible side-effects? #220: FILE: drivers/gpu/drm/i915/i915_vma_resource.c:38: +#define VMA_RES_LAST(_node) ((_node)->start + (_node)->node_size + (_node)->guard - 1) total: 0 errors, 0 warnings, 2 checks, 196 lines checked 725484e79fb0 drm/i915: Refine VT-d scanout workaround
[Intel-gfx] ✓ Fi.CI.BAT: success for drm: add a check to verify the size alignment (rev2)
== Series Details ==
Series: drm: add a check to verify the size alignment (rev2)
URL : https://patchwork.freedesktop.org/series/101569/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11397 -> Patchwork_22653
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/index.html
Participating hosts (49 -> 42)
--
Additional (1): fi-pnv-d510
Missing(8): shard-tglu fi-hsw-4200u bat-adlm-1 fi-bsw-cyan fi-ctg-p8600
shard-rkl shard-dg1 fi-bdw-samus
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_22653:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live@active:
- {bat-rpls-2}: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-rpls-2/igt@i915_selftest@l...@active.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/bat-rpls-2/igt@i915_selftest@l...@active.html
Known issues
Here are the changes found in Patchwork_22653 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-pnv-d510:NOTRUN -> [SKIP][3] ([fdo#109271]) +57 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/fi-pnv-d510/igt@gem_huc_c...@huc-copy.html
* igt@i915_selftest@live@gt_engines:
- bat-dg1-6: [PASS][4] -> [INCOMPLETE][5] ([i915#4418])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg1-6/igt@i915_selftest@live@gt_engines.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/bat-dg1-6/igt@i915_selftest@live@gt_engines.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-pnv-d510:NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#5341])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/fi-pnv-d510/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-c.html
* igt@runner@aborted:
- bat-dg1-6: NOTRUN -> [FAIL][7] ([i915#4312] / [i915#5257])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/bat-dg1-6/igt@run...@aborted.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@smem:
- fi-glk-dsi: [DMESG-WARN][8] ([i915#2943]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-glk-dsi/igt@gem_exec_suspend@basic...@smem.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/fi-glk-dsi/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@hangcheck:
- {fi-hsw-g3258}: [INCOMPLETE][10] ([i915#4785]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
Warnings
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-rkl-guc: [SKIP][12] ([i915#4103]) -> [SKIP][13] ([i915#4070] /
[i915#4103]) +1 similar issue
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-rkl-guc/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/fi-rkl-guc/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-rkl-guc: [SKIP][14] ([i915#533]) -> [SKIP][15] ([i915#4070] /
[i915#533])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-rkl-guc/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22653/fi-rkl-guc/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4418]: https://gitlab.freedesktop.org/drm/intel/issues/4418
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
Re: [Intel-gfx] [PATCH] drm/edid: filter DisplayID v2.0 CTA block in audio detection
On Mon, 21 Mar 2022, Cooper Chiou wrote: > In DisplayID v2.0 CTS data block 0x81 case, there is no any audio > information definition, but drm_detect_monitor_audio didn't filter > it so that it caused eDP dummy audio card be detected improperly. > > We observed this issue on some AUO/BOE eDP panel with DID v2.0 CTA > block, and fix issue by adding filter for edid_ext[0]=DATA_BLOCK_CTA > case. Out of curiosity, what does the CTA DisplayID Data Block have for Data Block revision? I haven't found any mention anywhere that it should have any correspondence to the CEA *extension* revision number, which is supposed to be 1..3, and really only 3 for about a decade now. Both the DisplayID v1.3 and v2.0 specs only mention revision 0. BR, Jani. > > Cc: Jani Nikula > Cc: Shawn C Lee > > Signed-off-by: Cooper Chiou > --- > drivers/gpu/drm/drm_edid.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index f5f5de362ff2..6c9ae4b130bd 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -4845,7 +4845,7 @@ bool drm_detect_monitor_audio(struct edid *edid) > int start_offset, end_offset; > > edid_ext = drm_find_cea_extension(edid); > - if (!edid_ext) > + if (!edid_ext || (edid_ext[0] == DATA_BLOCK_CTA)) > goto end; > > has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); -- Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/edid: filter DisplayID v2.0 CTA block in audio detection (rev2)
== Series Details ==
Series: drm/edid: filter DisplayID v2.0 CTA block in audio detection (rev2)
URL : https://patchwork.freedesktop.org/series/101565/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11397_full -> Patchwork_22650_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (12 -> 11)
--
Missing(1): pig-kbl-iris
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_22650_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_parallel@basic@vcs0:
- {shard-rkl}:NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-rkl-5/igt@gem_exec_parallel@ba...@vcs0.html
Known issues
Here are the changes found in Patchwork_22650_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_capture@pi@bcs0:
- shard-skl: [PASS][2] -> [INCOMPLETE][3] ([i915#4547])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-skl9/igt@gem_exec_capture@p...@bcs0.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-skl9/igt@gem_exec_capture@p...@bcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [PASS][4] -> [FAIL][5] ([i915#2842]) +1 similar issue
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-apl6/igt@gem_exec_fair@basic-n...@vcs0.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-apl3/igt@gem_exec_fair@basic-n...@vcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [PASS][6] -> [FAIL][7] ([i915#2842])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk4/igt@gem_exec_fair@basic-p...@rcs0.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-glk3/igt@gem_exec_fair@basic-p...@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-iclb: [PASS][8] -> [FAIL][9] ([i915#2842])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-iclb7/igt@gem_exec_fair@basic-p...@vecs0.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-iclb6/igt@gem_exec_fair@basic-p...@vecs0.html
* igt@gem_lmem_swapping@parallel-random:
- shard-skl: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#4613]) +3
similar issues
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-skl7/igt@gem_lmem_swapp...@parallel-random.html
* igt@gem_mmap_gtt@fault-concurrent-x:
- shard-snb: [PASS][11] -> [INCOMPLETE][12] ([i915#5161])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-snb2/igt@gem_mmap_...@fault-concurrent-x.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-snb5/igt@gem_mmap_...@fault-concurrent-x.html
* igt@gem_workarounds@reset-fd:
- shard-snb: [PASS][13] -> [TIMEOUT][14] ([i915#4995])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-snb4/igt@gem_workarou...@reset-fd.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-snb7/igt@gem_workarou...@reset-fd.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][15] -> [DMESG-WARN][16] ([i915#1436] /
[i915#716])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-skl1/igt@gen9_exec_pa...@allowed-single.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-skl10/igt@gen9_exec_pa...@allowed-single.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-iclb: NOTRUN -> [SKIP][17] ([i915#5286])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-iclb7/igt@kms_big...@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#5286])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-tglb3/igt@kms_big...@4-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-tglb: NOTRUN -> [SKIP][19] ([fdo#111614])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-tglb3/igt@kms_big...@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-skl: NOTRUN -> [FAIL][20] ([i915#3743]) +1 similar issue
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/shard-skl4/igt@kms_big...@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-skl: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#3777]) +2
similar issues
[21]:
[Intel-gfx] [PATCH] drm/i915: Decouple engine->sanitize callback on removing the status page
From: Chris Wilson
We have to be careful not to call into the submission backend's sanitize
callback if we abort the module load and free the status page. Since we
are only using the sanitize callback to cleanup the status page when we
suspect its contents may have been lost (first load, upon resume etc)
let us move the callback to engine->status_page and remove it as we free
the status page.
<3> [306.359604] BUG: KASAN: slab-out-of-bounds in xcs_sanitize+0x4a/0x110
[i915]
<3> [306.360346] Write of size 4096 at addr 88806d5e8000 by task
i915_module_loa/1052
<3> [306.360561]
<4> [306.360627] CPU: 1 PID: 1052 Comm: i915_module_loa Tainted: G U
5.12.0-rc2-g249f72def27bf-kasan_218+ #1
<4> [306.360650] Hardware name: GIGABYTE GB-BXBT-1900/MZBAYAB-00, BIOS F6
02/17/2015
<4> [306.360667] Call Trace:
<4> [306.360688] dump_stack+0xa4/0xe5
<4> [306.360727] ? xcs_sanitize+0x4a/0x110 [i915]
<4> [306.361274] print_address_description.constprop.9+0x3a/0x60
<4> [306.361311] ? xcs_sanitize+0x4a/0x110 [i915]
<4> [306.361855] ? xcs_sanitize+0x4a/0x110 [i915]
<4> [306.362408] kasan_report.cold.14+0x7c/0xd8
<4> [306.362456] ? xcs_sanitize+0x4a/0x110 [i915]
<4> [306.363015] kasan_check_range+0x1c1/0x1e0
<4> [306.363056] memset+0x1f/0x40
<4> [306.363093] xcs_sanitize+0x4a/0x110 [i915]
<4> [306.363661] gt_sanitize+0x2f7/0x6d0 [i915]
<4> [306.364221] ? __pm_runtime_suspend+0x186/0x2e0
<4> [306.364270] intel_gt_suspend_late+0x126/0x2c0 [i915]
<4> [306.364833] i915_gem_suspend_late+0x9d/0x470 [i915]
<4> [306.365402] ? intel_wakeref_auto+0x3ba/0x520 [i915]
<4> [306.365939] ? i915_gem_suspend+0x180/0x180 [i915]
<4> [306.366521] i915_gem_driver_remove+0x25/0x1f0 [i915]
<4> [306.367071] ? lockdep_hardirqs_on+0xbf/0x130
<4> [306.367124] i915_driver_remove+0xba/0xf0 [i915]
<4> [306.367670] i915_pci_remove+0x34/0x70 [i915]
<4> [306.368224] pci_device_remove+0xa3/0x1e0
<4> [306.368275] device_release_driver_internal+0x1e0/0x4a0
<4> [306.368320] driver_detach+0xbc/0x180
<4> [306.368364] bus_remove_driver+0x15e/0x2d0
<4> [306.368404] pci_unregister_driver+0x28/0x220
<4> [306.368456] i915_exit+0x1b/0x26 [i915]
<4> [306.369055] __x64_sys_delete_module+0x257/0x370
<4> [306.369093] ? __ia32_sys_delete_module+0x370/0x370
<4> [306.369146] ? lockdep_hardirqs_on+0xbf/0x130
<4> [306.369185] do_syscall_64+0x33/0x80
<4> [306.369212] entry_SYSCALL_64_after_hwframe+0x44/0xae
<4> [306.369237] RIP: 0033:0x7f7a7020fbcb
<4> [306.369259] Code: 73 01 c3 48 8b 0d c5 82 0c 00 f7 d8 64 89 01 48 83 c8 ff
c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa b8 b0 00 00 00 0f 05 <48> 3d 01
f0 ff ff 73 01 c3 48 8b 0d 95 82 0c 00 f7 d8 64 89 01 48
<4> [306.369281] RSP: 002b:7ffc22d2ef78 EFLAGS: 0206 ORIG_RAX:
00b0
<4> [306.369315] RAX: ffda RBX: 55724a324db0 RCX:
7f7a7020fbcb
<4> [306.369334] RDX: 7f7a702d8be0 RSI: 0800 RDI:
55724a324e18
<4> [306.369352] RBP: 7f7a70392702 R08: R09:
7f7a702d8da0
<4> [306.369370] R10: 55724a2ee010 R11: 0206 R12:
<4> [306.369388] R13: 7ffc22d2f670 R14: R15:
Fixes: b436a5f8b6c8 ("drm/i915/gt: Track all timelines created using the HWSP")
Signed-off-by: Chris Wilson
Signed-off-by: Gwan-gyeong Mun
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 7 +--
drivers/gpu/drm/i915/gt/intel_engine_types.h | 4 +++-
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 4 +---
drivers/gpu/drm/i915/gt/intel_gt_pm.c| 4 ++--
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c| 4 ++--
6 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 98b61ff13c95..7e3a65b0661c 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -844,6 +844,9 @@ static void cleanup_status_page(struct intel_engine_cs
*engine)
i915_gem_object_unpin_map(vma->obj);
i915_gem_object_put(vma->obj);
+
+ /* no longer in control, nothing left to sanitize */
+ engine->status_page.sanitize = NULL;
}
static int pin_ggtt_status_page(struct intel_engine_cs *engine,
@@ -1542,8 +1545,8 @@ void intel_engines_reset_default_submission(struct
intel_gt *gt)
enum intel_engine_id id;
for_each_engine(engine, gt, id) {
- if (engine->sanitize)
- engine->sanitize(engine);
+ if (engine->status_page.sanitize)
+ engine->status_page.sanitize(engine);
engine->set_default_submission(engine);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index eac20112709c..268249efd76c 100644
---
[Intel-gfx] [PATCH v5 2/2] drm/i915/intel_combo_phy: Print I/O voltage info
Print I/O voltage and process info for each combo phy ports.
v2: Used drm_dbg_kms for logs. (Jani)
Added names for different voltage levels. (Imre)
v3: Used const char * for names. (Jani)
v4: Dropped the procom values and changed commit msg (Imre)
Suggested-by: Imre Deak
Signed-off-by: Ankit Nautiyal
Reviewed-by: Imre Deak
---
.../gpu/drm/i915/display/intel_combo_phy.c| 35 +--
1 file changed, 25 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c
b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index 4dfe77351b8b..64890f39c3cc 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
@@ -25,18 +25,29 @@ enum {
};
static const struct icl_procmon {
+ const char *name;
u32 dw1, dw9, dw10;
} icl_procmon_values[] = {
- [PROCMON_0_85V_DOT_0] =
- { .dw1 = 0x, .dw9 = 0x62AB67BB, .dw10 = 0x51914F96, },
- [PROCMON_0_95V_DOT_0] =
- { .dw1 = 0x, .dw9 = 0x86E172C7, .dw10 = 0x77CA5EAB, },
- [PROCMON_0_95V_DOT_1] =
- { .dw1 = 0x, .dw9 = 0x93F87FE1, .dw10 = 0x8AE871C5, },
- [PROCMON_1_05V_DOT_0] =
- { .dw1 = 0x, .dw9 = 0x98FA82DD, .dw10 = 0x89E46DC1, },
- [PROCMON_1_05V_DOT_1] =
- { .dw1 = 0x0044, .dw9 = 0x9A00AB25, .dw10 = 0x8AE38FF1, },
+ [PROCMON_0_85V_DOT_0] = {
+ .name = "0.85V dot0 (low-voltage)",
+ .dw1 = 0x, .dw9 = 0x62AB67BB, .dw10 = 0x51914F96,
+ },
+ [PROCMON_0_95V_DOT_0] = {
+ .name = "0.95V dot0",
+ .dw1 = 0x, .dw9 = 0x86E172C7, .dw10 = 0x77CA5EAB,
+ },
+ [PROCMON_0_95V_DOT_1] = {
+ .name = "0.95V dot1",
+ .dw1 = 0x, .dw9 = 0x93F87FE1, .dw10 = 0x8AE871C5,
+ },
+ [PROCMON_1_05V_DOT_0] = {
+ .name = "1.05V dot0",
+ .dw1 = 0x, .dw9 = 0x98FA82DD, .dw10 = 0x89E46DC1,
+ },
+ [PROCMON_1_05V_DOT_1] = {
+ .name = "1.05V dot1",
+ .dw1 = 0x0044, .dw9 = 0x9A00AB25, .dw10 = 0x8AE38FF1,
+ },
};
static const struct icl_procmon *
@@ -113,6 +124,10 @@ static bool icl_verify_procmon_ref_values(struct
drm_i915_private *dev_priv,
procmon = icl_get_procmon_ref_values(dev_priv, phy);
+ drm_dbg_kms(_priv->drm,
+ "Combo PHY %c Voltage/Process Info : %s\n",
+ phy_name(phy), procmon->name);
+
ret = check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW1(phy),
(0xff << 16) | 0xff, procmon->dw1);
ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW9(phy),
--
2.25.1
Re: [Intel-gfx] [v2] drm/edid: check basic audio support on CEA extension block
On Wed, 23 Mar 2022, Lee Shawn C wrote:
> From: Cooper Chiou
>
> Tag code stored in bit7:5 for CTA block byte[3] is not the same as
> CEA extension block definition. Only check CEA block has
> basic audio support.
>
> Cc: Jani Nikula
> Cc: Shawn C Lee
> Cc: intel-gfx
> Signed-off-by: Cooper Chiou
> Signed-off-by: Lee Shawn C
Fixes: e28ad544f462 ("drm/edid: parse CEA blocks embedded in DisplayID")
Cc: # v4.15
Reviewed-by: Jani Nikula
(commit e28ad544f462 was merged in v5.3, but it has Cc: stable for
v4.15.)
Also drm_edid_to_eld() and drm_parse_cea_ext() are affected by the same
issue. For the former, it doesn't really matter all that much, it just
ends up using the DisplayID data block version instead, but the latter
adds bogus color formats and should be fixed. Patch follows.
All of these are fixed in my recent series [1], but we'll want the
simple fixes for stable first.
BR,
Jani.
[1] https://patchwork.freedesktop.org/series/101659/
> ---
> drivers/gpu/drm/drm_edid.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 561f53831e29..f07af6786cec 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -4859,7 +4859,8 @@ bool drm_detect_monitor_audio(struct edid *edid)
> if (!edid_ext)
> goto end;
>
> - has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
> + has_audio = (edid_ext[0] == CEA_EXT &&
> + (edid_ext[3] & EDID_BASIC_AUDIO) != 0);
>
> if (has_audio) {
> DRM_DEBUG_KMS("Monitor has basic audio support\n");
--
Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm: add a check to verify the size alignment (rev2)
== Series Details == Series: drm: add a check to verify the size alignment (rev2) URL : https://patchwork.freedesktop.org/series/101569/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not found ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_disable' not found
[Intel-gfx] ✗ Fi.CI.BAT: failure for Revert "drm/i915/dg2: Add relocation exception"
== Series Details ==
Series: Revert "drm/i915/dg2: Add relocation exception"
URL : https://patchwork.freedesktop.org/series/101669/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11397 -> Patchwork_22652
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_22652 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22652, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/index.html
Participating hosts (49 -> 41)
--
Missing(8): shard-tglu fi-hsw-4200u bat-adlm-1 fi-bsw-cyan fi-ctg-p8600
shard-rkl shard-dg1 fi-bdw-samus
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_22652:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@hangcheck:
- fi-snb-2520m: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-snb-2520m/igt@i915_selftest@l...@hangcheck.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/fi-snb-2520m/igt@i915_selftest@l...@hangcheck.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_gttfill@basic:
- {bat-dg2-9}:[PASS][3] -> [SKIP][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg2-9/igt@gem_exec_gttf...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/bat-dg2-9/igt@gem_exec_gttf...@basic.html
- {bat-dg2-8}:[PASS][5] -> [SKIP][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg2-8/igt@gem_exec_gttf...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/bat-dg2-8/igt@gem_exec_gttf...@basic.html
* igt@gem_exec_parallel@engines@basic:
- {bat-dg2-9}:[PASS][7] -> [FAIL][8] +3 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg2-9/igt@gem_exec_parallel@engi...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/bat-dg2-9/igt@gem_exec_parallel@engi...@basic.html
* igt@gem_exec_parallel@engines@contexts:
- {bat-dg2-8}:[PASS][9] -> [FAIL][10] +3 similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg2-8/igt@gem_exec_parallel@engi...@contexts.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/bat-dg2-8/igt@gem_exec_parallel@engi...@contexts.html
* igt@gem_exec_suspend@basic-s0@smem:
- {bat-dg2-9}:[DMESG-WARN][11] ([i915#5193]) -> [FAIL][12] +3
similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html
* igt@gem_exec_suspend@basic-s3@smem:
- {bat-dg2-8}:[DMESG-WARN][13] ([i915#5193]) -> [FAIL][14] +3
similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg2-8/igt@gem_exec_suspend@basic...@smem.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/bat-dg2-8/igt@gem_exec_suspend@basic...@smem.html
Known issues
Here are the changes found in Patchwork_22652 that come from known issues:
### IGT changes ###
Possible fixes
* igt@gem_exec_suspend@basic-s0@smem:
- fi-glk-dsi: [DMESG-WARN][15] ([i915#2943]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-glk-dsi/igt@gem_exec_suspend@basic...@smem.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/fi-glk-dsi/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@coherency:
- {bat-rpls-2}: [INCOMPLETE][17] -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-rpls-2/igt@i915_selftest@l...@coherency.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22652/bat-rpls-2/igt@i915_selftest@l...@coherency.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
[i915#5193]: https://gitlab.freedesktop.org/drm/intel/issues/5193
[i915#5337]: https://gitlab.freedesktop.org/drm/intel/issues/5337
[i915#5339]:
[Intel-gfx] ✗ Fi.CI.DOCS: warning for Revert "drm/i915/dg2: Add relocation exception"
== Series Details == Series: Revert "drm/i915/dg2: Add relocation exception" URL : https://patchwork.freedesktop.org/series/101669/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not found ./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_disable' not found
[Intel-gfx] [PATCH v4 3/3] drm/i915: Refine VT-d scanout workaround
From: Chris Wilson
VT-d may cause overfetch of the scanout PTE, both before and after the
vma (depending on the scanout orientation). bspec recommends that we
provide a tile-row in either directions, and suggests using 168 PTE,
warning that the accesses will wrap around the ends of the GGTT.
Currently, we fill the entire GGTT with scratch pages when using VT-d to
always ensure there are valid entries around every vma, including
scanout. However, writing every PTE is slow as on recent devices we
perform 8MiB of uncached writes, incurring an extra 100ms during resume.
If instead we focus on only putting guard pages around scanout, we can
avoid touching the whole GGTT. To avoid having to introduce extra nodes
around each scanout vma, we adjust the scanout drm_mm_node to be smaller
than the allocated space, and fixup the extra PTE during dma binding.
Signed-off-by: Chris Wilson
Signed-off-by: Tejas Upadhyay
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 13 +++
drivers/gpu/drm/i915/gt/intel_ggtt.c | 25 +-
drivers/gpu/drm/i915/i915_vma.c| 9
3 files changed, 23 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 3e5d6057b3ef..35dbb76459af 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -17,6 +17,8 @@
#include "i915_gem_object.h"
#include "i915_vma.h"
+#define VTD_GUARD (168u * I915_GTT_PAGE_SIZE) /* 168 or tile-row PTE padding */
+
static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
@@ -424,6 +426,17 @@ i915_gem_object_pin_to_display_plane(struct
drm_i915_gem_object *obj,
if (ret)
return ERR_PTR(ret);
+ /* VT-d may overfetch before/after the vma, so pad with scratch */
+ if (intel_scanout_needs_vtd_wa(i915)) {
+ unsigned int guard = VTD_GUARD;
+
+ if (i915_gem_object_is_tiled(obj))
+ guard = max(guard,
+ i915_gem_object_get_tile_row_size(obj));
+
+ flags |= PIN_OFFSET_GUARD | guard;
+ }
+
/*
* As the user may map the buffer once pinned in the display plane
* (e.g. libkms for the bootup splash), we have to ensure that we
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index cec5f9fe862d..5cef3a1e7f32 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -364,27 +364,6 @@ static void nop_clear_range(struct i915_address_space *vm,
{
}
-static void gen8_ggtt_clear_range(struct i915_address_space *vm,
- u64 start, u64 length)
-{
- struct i915_ggtt *ggtt = i915_vm_to_ggtt(vm);
- unsigned int first_entry = start / I915_GTT_PAGE_SIZE;
- unsigned int num_entries = length / I915_GTT_PAGE_SIZE;
- const gen8_pte_t scratch_pte = vm->scratch[0]->encode;
- gen8_pte_t __iomem *gtt_base =
- (gen8_pte_t __iomem *)ggtt->gsm + first_entry;
- const int max_entries = ggtt_total_entries(ggtt) - first_entry;
- int i;
-
- if (WARN(num_entries > max_entries,
-"First entry = %d; Num entries = %d (max=%d)\n",
-first_entry, num_entries, max_entries))
- num_entries = max_entries;
-
- for (i = 0; i < num_entries; i++)
- gen8_set_pte(_base[i], scratch_pte);
-}
-
static void bxt_vtd_ggtt_wa(struct i915_address_space *vm)
{
/*
@@ -982,8 +961,6 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.cleanup = gen6_gmch_remove;
ggtt->vm.insert_page = gen8_ggtt_insert_page;
ggtt->vm.clear_range = nop_clear_range;
- if (intel_scanout_needs_vtd_wa(i915))
- ggtt->vm.clear_range = gen8_ggtt_clear_range;
ggtt->vm.insert_entries = gen8_ggtt_insert_entries;
@@ -1130,7 +1107,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.alloc_scratch_dma = alloc_pt_dma;
ggtt->vm.clear_range = nop_clear_range;
- if (!HAS_FULL_PPGTT(i915) || intel_scanout_needs_vtd_wa(i915))
+ if (!HAS_FULL_PPGTT(i915))
ggtt->vm.clear_range = gen6_ggtt_clear_range;
ggtt->vm.insert_page = gen6_ggtt_insert_page;
ggtt->vm.insert_entries = gen6_ggtt_insert_entries;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index fb5053f4bbd9..86d5d261386d 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -667,6 +667,10 @@ bool i915_vma_misplaced(const struct i915_vma *vma,
i915_vma_offset(vma) != (flags & PIN_OFFSET_MASK))
return true;
+ if (flags & PIN_OFFSET_GUARD &&
+ vma->guard < (flags & PIN_OFFSET_MASK))
+ return
[Intel-gfx] [PATCH v4 2/3] drm/i915: Introduce guard pages to i915_vma
From: Chris Wilson Introduce the concept of padding the i915_vma with guard pages before and aft. The major consequence is that all ordinary uses of i915_vma must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size directly, as the drm_mm_node will include the guard pages that surround our object. The biggest connundrum is how exactly to mix requesting a fixed address with guard pages, particularly through the existing uABI. The user does not know about guard pages, so such must be transparent to the user, and so the execobj.offset must be that of the object itself excluding the guard. So a PIN_OFFSET_FIXED must then be exclusive of the guard pages. The caveat is that some placements will be impossible with guard pages, as wrap arounds need to be avoided, and the vma itself will require a larger node. We must we not report EINVAL but ENOSPC as these are unavailable locations within the GTT rather than conflicting user requirements. In the next patch, we start using guard pages for scanout objects. While these are limited to GGTT vma, on a few platforms these vma (or at least an alias of the vma) is shared with userspace, so we may leak the existence of such guards if we are not careful to ensure that the execobj.offset is transparent and excludes the guards. (On such platforms like ivb, without full-ppgtt, userspace has to use relocations so the presence of more untouchable regions within its GTT such be of no further issue.) v2: Include the guard range in the overflow checks and placement restrictions. v3: Fix the check on the placement upper bound. The request user offset is relative to the guard offset (not the node.start) and so we should not include the initial guard offset again when computing the upper bound of the node. v4: - Rebase on upstream vma resources. - Use iowrite32 instead of gen8_set_pte() in gen6_ggtt_insert_entries() Signed-off-by: Chris Wilson Signed-off-by: Tejas Upadhyay --- drivers/gpu/drm/i915/gt/intel_ggtt.c | 14 drivers/gpu/drm/i915/i915_gem_gtt.h | 3 ++- drivers/gpu/drm/i915/i915_vma.c | 27 ++-- drivers/gpu/drm/i915/i915_vma.h | 5 +++-- drivers/gpu/drm/i915/i915_vma_resource.c | 4 ++-- drivers/gpu/drm/i915/i915_vma_resource.h | 7 +- drivers/gpu/drm/i915/i915_vma_types.h| 3 ++- 7 files changed, 46 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c index 04191fe2ee34..cec5f9fe862d 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -284,8 +284,11 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm, */ gte = (gen8_pte_t __iomem *)ggtt->gsm; - gte += vma_res->start / I915_GTT_PAGE_SIZE; - end = gte + vma_res->node_size / I915_GTT_PAGE_SIZE; + gte += (vma_res->start - vma_res->guard) / I915_GTT_PAGE_SIZE; + end = gte + vma_res->guard / I915_GTT_PAGE_SIZE; + while (gte < end) + gen8_set_pte(gte++, vm->scratch[0]->encode); + end += (vma_res->node_size + vma_res->guard) / I915_GTT_PAGE_SIZE; for_each_sgt_daddr(addr, iter, vma_res->bi.pages) gen8_set_pte(gte++, pte_encode | addr); @@ -335,9 +338,12 @@ static void gen6_ggtt_insert_entries(struct i915_address_space *vm, dma_addr_t addr; gte = (gen6_pte_t __iomem *)ggtt->gsm; - gte += vma_res->start / I915_GTT_PAGE_SIZE; - end = gte + vma_res->node_size / I915_GTT_PAGE_SIZE; + gte += (vma_res->start - vma_res->guard) / I915_GTT_PAGE_SIZE; + end = gte + vma_res->guard / I915_GTT_PAGE_SIZE; + while (gte < end) + iowrite32(vm->scratch[0]->encode, gte++); + end += (vma_res->node_size + vma_res->guard) / I915_GTT_PAGE_SIZE; for_each_sgt_daddr(addr, iter, vma_res->bi.pages) iowrite32(vm->pte_encode(addr, level, flags), gte++); GEM_BUG_ON(gte > end); diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 8c2f57eb5dda..243419783052 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -44,7 +44,8 @@ int i915_gem_gtt_insert(struct i915_address_space *vm, #define PIN_HIGH BIT_ULL(5) #define PIN_OFFSET_BIASBIT_ULL(6) #define PIN_OFFSET_FIXED BIT_ULL(7) -#define PIN_VALIDATE BIT_ULL(8) /* validate placement only, no need to call unpin() */ +#define PIN_OFFSET_GUARD BIT_ULL(8) +#define PIN_VALIDATE BIT_ULL(9) /* validate placement only, no need to call unpin() */ #define PIN_GLOBAL BIT_ULL(10) /* I915_VMA_GLOBAL_BIND */ #define PIN_USER BIT_ULL(11) /* I915_VMA_LOCAL_BIND */ diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index 7210a2c51329..fb5053f4bbd9 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++
[Intel-gfx] [PATCH v4 1/3] drm/i915: Wrap all access to i915_vma.node.start|size
From: Chris Wilson
We already wrap i915_vma.node.start for use with the GGTT, as there we
can perform additional sanity checks that the node belongs to the GGTT
and fits within the 32b registers. In the next couple of patches, we
will introduce guard pages around the objects _inside_ the drm_mm_node
allocation. That is we will offset the vma->pages so that the first page
is at drm_mm_node.start + vma->guard (not 0 as is currently the case).
All users must then not use i915_vma.node.start directly, but compute
the guard offset, thus all users are converted to use a
i915_vma_offset() wrapper.
The notable exceptions are the selftests that are testing exact
behaviour of i915_vma_pin/i915_vma_insert.
v2:
- Rebased on drm-tip.
v3:
- Rebase on drm-tip reworked. The vma resources still used for the
vm backend interface, but the meaning of start and node_size updated.
Documentation update.
Signed-off-by: Chris Wilson
Signed-off-by: Tejas Upadhyay
Co-developed-by: Thomas Hellström
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/i915/display/intel_fbdev.c| 2 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 33 ++--
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_tiling.c| 4 +-
.../gpu/drm/i915/gem/selftests/huge_pages.c | 2 +-
.../i915/gem/selftests/i915_gem_client_blt.c | 15 +++---
.../drm/i915/gem/selftests/i915_gem_context.c | 15 +++---
.../drm/i915/gem/selftests/i915_gem_mman.c| 2 +-
.../drm/i915/gem/selftests/igt_gem_utils.c| 7 +--
drivers/gpu/drm/i915/gt/gen7_renderclear.c| 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 3 +-
drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 +-
.../gpu/drm/i915/gt/intel_ring_submission.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 8 +--
drivers/gpu/drm/i915/gt/selftest_execlists.c | 18 +++
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 15 +++---
drivers/gpu/drm/i915/gt/selftest_lrc.c| 16 +++---
.../drm/i915/gt/selftest_ring_submission.c| 2 +-
drivers/gpu/drm/i915/gt/selftest_rps.c| 12 ++---
.../gpu/drm/i915/gt/selftest_workarounds.c| 8 +--
drivers/gpu/drm/i915/i915_cmd_parser.c| 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_perf.c | 2 +-
drivers/gpu/drm/i915/i915_vma.c | 25 -
drivers/gpu/drm/i915/i915_vma.h | 51 +--
drivers/gpu/drm/i915/i915_vma_resource.h | 10 ++--
drivers/gpu/drm/i915/selftests/i915_request.c | 20
drivers/gpu/drm/i915/selftests/igt_spinner.c | 8 +--
29 files changed, 176 insertions(+), 118 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 221336178991..a3c71b9bfcc6 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -278,7 +278,7 @@ static int intelfb_create(struct drm_fb_helper *helper,
/* Our framebuffer is the entirety of fbdev's system memory */
info->fix.smem_start =
- (unsigned long)(ggtt->gmadr.start + vma->node.start);
+ (unsigned long)(ggtt->gmadr.start +
i915_ggtt_offset(vma));
info->fix.smem_len = vma->size;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 42a49fd2f2ab..3f41d1307e3b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -379,22 +379,25 @@ eb_vma_misplaced(const struct drm_i915_gem_exec_object2
*entry,
const struct i915_vma *vma,
unsigned int flags)
{
- if (vma->node.size < entry->pad_to_size)
+ const u64 start = i915_vma_offset(vma);
+ const u64 size = i915_vma_size(vma);
+
+ if (size < entry->pad_to_size)
return true;
- if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment))
+ if (entry->alignment && !IS_ALIGNED(start, entry->alignment))
return true;
if (flags & EXEC_OBJECT_PINNED &&
- vma->node.start != entry->offset)
+ start != entry->offset)
return true;
if (flags & __EXEC_OBJECT_NEEDS_BIAS &&
- vma->node.start < BATCH_OFFSET_BIAS)
+ start < BATCH_OFFSET_BIAS)
return true;
if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
- (vma->node.start + vma->node.size + 4095) >> 32)
+ (start + size + 4095) >> 32)
return true;
if (flags & __EXEC_OBJECT_NEEDS_MAP &&
@@ -440,7 +443,7 @@ eb_pin_vma(struct i915_execbuffer *eb,
int err;
if (vma->node.size)
- pin_flags = vma->node.start;
+ pin_flags =
[Intel-gfx] [PATCH v4 0/3] Improve on resume time with VT-d enabled
When DMAR / VT-d is enabled, the display engine uses overfetching, presumably to deal with the increased latency. To avoid display engine errors and DMAR faults, as a workaround the GGTT is populated with scatch PTEs when VT-d is enabled. However starting with gen10, Write-combined writing of scratch PTES is no longer possible and as a result, populating the full GGTT with scratch PTEs like on resume becomes very slow as uncached access is needed. Therefore, replace filling the GGTT entirely with scratch pages with only filling surrounding scanout vma with guard pages. This eliminates the 100+ms delay in resume where we have to repopulate the GGTT with scratch. While 100+ms might appear like a short time it's 10% to 20% of total resume time and important in some applications. Additional considerations: Since GPUs where VT-d might be present should have at least 2GiB worth of GGTT space, the extra guard pages should not really have a significant impact on GGTT contention. Neither should there be a problem with not populating GGTT with scratch PTEs on unbind since that's typically not done when VT-d is not enabled either. Finally, discrete GPUs should ideally not overfetch even with VT-d enabled, but removing the workaround for discrete GPUs needs thorough testing and will be done, if needed, as a follow up. Patch 1 introduces accessors for vma.node.start and vma.node.size. While this patch is the most invasive, the end result is actually something we might want event without the introduced guard pages. Patch 2 introduces the concept of guard pages to i915_vma and wraps the needed arithmetic in the accessors. Patch 3 uses the guard pages to replace the old VT-d workaround. v4: Completely rebase on drm-tip: - Avoid vmas in the binding backends - Make sure vma PIN flags don't clash - Add some kernedoc and rewrite cover-letter. Chris Wilson (3): drm/i915: Wrap all access to i915_vma.node.start|size drm/i915: Introduce guard pages to i915_vma drm/i915: Refine VT-d scanout workaround drivers/gpu/drm/i915/display/intel_fbdev.c| 2 +- drivers/gpu/drm/i915/gem/i915_gem_domain.c| 13 .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 33 ++- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_tiling.c| 4 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 2 +- .../i915/gem/selftests/i915_gem_client_blt.c | 15 ++--- .../drm/i915/gem/selftests/i915_gem_context.c | 15 +++-- .../drm/i915/gem/selftests/i915_gem_mman.c| 2 +- .../drm/i915/gem/selftests/igt_gem_utils.c| 7 ++- drivers/gpu/drm/i915/gt/gen7_renderclear.c| 2 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 39 drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 3 +- drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 +- .../gpu/drm/i915/gt/intel_ring_submission.c | 2 +- drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 8 +-- drivers/gpu/drm/i915/gt/selftest_execlists.c | 18 +++--- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 15 ++--- drivers/gpu/drm/i915/gt/selftest_lrc.c| 16 ++--- .../drm/i915/gt/selftest_ring_submission.c| 2 +- drivers/gpu/drm/i915/gt/selftest_rps.c| 12 ++-- .../gpu/drm/i915/gt/selftest_workarounds.c| 8 +-- drivers/gpu/drm/i915/i915_cmd_parser.c| 4 +- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 3 +- drivers/gpu/drm/i915/i915_perf.c | 2 +- drivers/gpu/drm/i915/i915_vma.c | 59 +-- drivers/gpu/drm/i915/i915_vma.h | 52 +++- drivers/gpu/drm/i915/i915_vma_resource.c | 4 +- drivers/gpu/drm/i915/i915_vma_resource.h | 17 -- drivers/gpu/drm/i915/i915_vma_types.h | 3 +- drivers/gpu/drm/i915/selftests/i915_request.c | 20 +++ drivers/gpu/drm/i915/selftests/igt_spinner.c | 8 +-- 34 files changed, 242 insertions(+), 156 deletions(-) -- 2.34.1
[Intel-gfx] Commit messages (was: [PATCH v11] drm/amdgpu: add drm buddy support to amdgpu)
Dear Christian, Am 23.03.22 um 08:42 schrieb Christian König: Am 23.03.22 um 07:42 schrieb Paul Menzel: Am 23.03.22 um 07:25 schrieb Arunpravin Paneer Selvam: - Remove drm_mm references and replace with drm buddy functionalities The commit message summary to me suggested, you can somehow use both allocators now. Two suggestions below: 1. Switch to drm buddy allocator 2. Use drm buddy alllocator - Add res cursor support for drm buddy As an allocator switch sounds invasive, could you please extend the commit message, briefly describing the current situation, saying what the downsides are, and why the buddy allocator is “better”. Well, Paul please stop bothering developers with those requests. It's my job as maintainer to supervise the commit messages and it is certainly NOT require to explain all the details of the current situation in a commit message. That is just overkill. I did not request all the details, and I think my requests are totally reasonable. But let’s change the perspective. If there were not any AMD graphics drivers bug, I would have never needed to look at the code and deal with it. Unfortunately the AMD graphics driver situation – which improved a lot in recent years – with no public documentation, proprietary firmware and complex devices is still not optimal, and a lot of bugs get reported, and I am also hit by bugs, taking time to deal with them, and maybe reporting and helping to analyze them. So to keep your wording, if you would stop bothering users with bugs and requesting their help in fixing them – asking the user to bisect the issue is often the first thing. Actually it should not be unreasonable for customers buying an AMD device to expect get bug free drivers. It’s strange and a sad fact, that the software industry succeeded to sway that valid expectation and customers now except they need to regularly install software updates, and do not get, for example, a price reduction when there are bugs. Also, as stated everywhere, reviewer time is scarce, so commit authors should make it easy to attract new folks. A simple note that we are switching from the drm_mm backend to the buddy backend is sufficient, and that is exactly what the commit message is saying here. Sorry, I disagree. The motivation needs to be part of the commit message. For example see recent discussion on the LWN article *Donenfeld: Random number generator enhancements for Linux 5.17 and 5.18* [1]. How much the commit message should be extended, I do not know, but the current state is insufficient (too terse). Kind regards, Paul [1]: https://lwn.net/Articles/888413/ "Donenfeld: Random number generator enhancements for Linux 5.17 and 5.18"
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/4] drm/i915/display: Program PIPE_MBUS_DBOX_CTL with adl-p values
== Series Details ==
Series: series starting with [v2,1/4] drm/i915/display: Program
PIPE_MBUS_DBOX_CTL with adl-p values
URL : https://patchwork.freedesktop.org/series/101661/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11397_full -> Patchwork_22649_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_22649_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_plane_multiple@atomic-pipe-c-tiling-4:
- {shard-rkl}:NOTRUN -> [SKIP][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-rkl-4/igt@kms_plane_multi...@atomic-pipe-c-tiling-4.html
Known issues
Here are the changes found in Patchwork_22649_full that come from known
issues:
### CI changes ###
Issues hit
* boot:
- shard-glk: ([PASS][2], [PASS][3], [PASS][4], [PASS][5],
[PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12],
[PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18],
[PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24],
[PASS][25], [PASS][26]) -> ([PASS][27], [PASS][28], [PASS][29], [PASS][30],
[PASS][31], [PASS][32], [FAIL][33], [PASS][34], [PASS][35], [PASS][36],
[PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42],
[PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48],
[PASS][49], [PASS][50], [PASS][51]) ([i915#4392])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk1/boot.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk9/boot.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk9/boot.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk9/boot.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk1/boot.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk8/boot.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk2/boot.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk8/boot.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk8/boot.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk8/boot.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk7/boot.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk7/boot.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk7/boot.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk6/boot.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk6/boot.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk6/boot.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk5/boot.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk5/boot.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk4/boot.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk4/boot.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk2/boot.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk3/boot.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk2/boot.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk3/boot.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk3/boot.html
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk1/boot.html
[28]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk1/boot.html
[29]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk1/boot.html
[30]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk2/boot.html
[31]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk2/boot.html
[32]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk2/boot.html
[33]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk3/boot.html
[34]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk3/boot.html
[35]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk3/boot.html
[36]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk3/boot.html
[37]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk4/boot.html
[38]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22649/shard-glk4/boot.html
[Intel-gfx] [PATCH] [topic/core-for-CI] Revert "drm/i915/dg2: Add relocation exception"
This reverts commit 904ebf2ba89edaeba5c7c10540e43dba63541dc6. Failures on dg2 tests were caused by invalid alignment when local memory was in use. Changes which adopt alignment according to gen were already merged in IGT so lets revert relocation temporary enabler for dg2. Keeping it is a little bit problematic for IGT because on premerge we would see results with kernel which supports relocation. To see no-relocation results we need to send disabler (like this revert), point IGT with "Test-with" tag what is cumbersome and time consuming so lets do this permanently. If we will see some failures they need to be fixed instead of keeping relocation enabler. Signed-off-by: Zbigniew Kempczyński Cc: Lucas De Marchi Cc: Dave Airlie Cc: Daniel Vetter Cc: Jason Ekstrand Cc: Rodrigo Vivi --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 42a49fd2f2ab..8b0b4aeb6716 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -501,7 +501,7 @@ static bool platform_has_relocs_enabled(const struct i915_execbuffer *eb) */ if (GRAPHICS_VER(eb->i915) < 12 || IS_TIGERLAKE(eb->i915) || IS_ROCKETLAKE(eb->i915) || IS_ALDERLAKE_S(eb->i915) || - IS_ALDERLAKE_P(eb->i915) || IS_DG2(eb->i915)) + IS_ALDERLAKE_P(eb->i915)) return true; return false; -- 2.32.0
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/amdgpu: add drm buddy support to amdgpu (rev2)
== Series Details == Series: drm/amdgpu: add drm buddy support to amdgpu (rev2) URL : https://patchwork.freedesktop.org/series/100908/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o In file included from drivers/gpu/drm/amd/amdgpu/amdgpu.h:73, from drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c:43: drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h:29:10: fatal error: amdgpu_vram_mgr.h: No such file or directory #include "amdgpu_vram_mgr.h" ^~~ compilation terminated. scripts/Makefile.build:288: recipe for target 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o' failed make[4]: *** [drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o] Error 1 scripts/Makefile.build:550: recipe for target 'drivers/gpu/drm/amd/amdgpu' failed make[3]: *** [drivers/gpu/drm/amd/amdgpu] Error 2 scripts/Makefile.build:550: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:550: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1831: recipe for target 'drivers' failed make: *** [drivers] Error 2
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/edid: overhaul CEA data block iteration
== Series Details ==
Series: drm/edid: overhaul CEA data block iteration
URL : https://patchwork.freedesktop.org/series/101659/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11397_full -> Patchwork_22648_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_22648_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_fence@expired-history:
- {shard-rkl}:[PASS][1] -> [INCOMPLETE][2] +3 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-rkl-5/igt@gem_exec_fe...@expired-history.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-rkl-5/igt@gem_exec_fe...@expired-history.html
* igt@syncobj_timeline@wait-all-for-submit-snapshot:
- {shard-rkl}:[PASS][3] -> [DMESG-WARN][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-rkl-6/igt@syncobj_timel...@wait-all-for-submit-snapshot.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-rkl-5/igt@syncobj_timel...@wait-all-for-submit-snapshot.html
Known issues
Here are the changes found in Patchwork_22648_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_persistence@legacy-engines-hang@blt:
- shard-skl: NOTRUN -> [SKIP][5] ([fdo#109271]) +231 similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-skl9/igt@gem_ctx_persistence@legacy-engines-h...@blt.html
* igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][6] -> [TIMEOUT][7] ([i915#2481] / [i915#3070])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-iclb1/igt@gem_...@unwedge-stress.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-iclb4/igt@gem_...@unwedge-stress.html
* igt@gem_exec_capture@pi@rcs0:
- shard-skl: [PASS][8] -> [INCOMPLETE][9] ([i915#4547])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-skl9/igt@gem_exec_capture@p...@rcs0.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-skl8/igt@gem_exec_capture@p...@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [PASS][10] -> [FAIL][11] ([i915#2842])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-apl6/igt@gem_exec_fair@basic-n...@vcs0.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-apl6/igt@gem_exec_fair@basic-n...@vcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-glk: [PASS][12] -> [FAIL][13] ([i915#2842]) +2 similar
issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk4/igt@gem_exec_fair@basic-p...@vecs0.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-glk5/igt@gem_exec_fair@basic-p...@vecs0.html
- shard-iclb: [PASS][14] -> [FAIL][15] ([i915#2842])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-iclb7/igt@gem_exec_fair@basic-p...@vecs0.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-iclb3/igt@gem_exec_fair@basic-p...@vecs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][16] -> [SKIP][17] ([i915#2190])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-tglb2/igt@gem_huc_c...@huc-copy.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-tglb6/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@parallel-random:
- shard-skl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) +3
similar issues
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-skl9/igt@gem_lmem_swapp...@parallel-random.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [PASS][19] -> [DMESG-WARN][20] ([i915#1436] /
[i915#716])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-glk8/igt@gen9_exec_pa...@allowed-all.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-glk5/igt@gen9_exec_pa...@allowed-all.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][21] -> [DMESG-WARN][22] ([i915#1436] /
[i915#716])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/shard-skl1/igt@gen9_exec_pa...@allowed-single.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22648/shard-skl2/igt@gen9_exec_pa...@allowed-single.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][23] -> [FAIL][24] ([i915#454])
[23]:
Re: [Intel-gfx] [PATCH] drm/i915/rps: Centralize computation of freq caps
On 23-03-2022 00:26, Ashutosh Dixit wrote:
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do identical computation for these caps in multiple
places, here we centralize the computation of these caps. This makes the
code cleaner and also more extensible for the future.
v2: Clarify that caps are in "hw units" in comments (Lucas De Marchi)
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 24 +
drivers/gpu/drm/i915/gt/intel_rps.c | 101 ++
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +-
drivers/gpu/drm/i915/gt/intel_rps_types.h | 10 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 14 +--
5 files changed, 79 insertions(+), 72 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
index 31dbb2b96738..f5fbb74ed076 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
@@ -342,17 +342,16 @@ void intel_gt_pm_frequency_dump(struct intel_gt *gt,
struct drm_printer *p)
} else if (GRAPHICS_VER(i915) >= 6) {
u32 rp_state_limits;
u32 gt_perf_status;
- u32 rp_state_cap;
+ struct intel_rps_freq_caps caps;
u32 rpmodectl, rpinclimit, rpdeclimit;
u32 rpstat, cagf, reqf;
u32 rpcurupei, rpcurup, rpprevup;
u32 rpcurdownei, rpcurdown, rpprevdown;
u32 rpupei, rpupt, rpdownei, rpdownt;
u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask;
- int max_freq;
rp_state_limits = intel_uncore_read(uncore, GEN6_RP_STATE_LIMITS);
- rp_state_cap = intel_rps_read_state_cap(rps);
+ intel_rps_get_freq_caps(rps, );
if (IS_GEN9_LP(i915))
gt_perf_status = intel_uncore_read(uncore,
BXT_GT_PERF_STATUS);
else
@@ -474,25 +473,12 @@ void intel_gt_pm_frequency_dump(struct intel_gt *gt,
struct drm_printer *p)
drm_printf(p, "RP DOWN THRESHOLD: %d (%lldns)\n",
rpdownt, intel_gt_pm_interval_to_ns(gt, rpdownt));
- max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 0 :
- rp_state_cap >> 16) & 0xff;
- max_freq *= (IS_GEN9_BC(i915) ||
-GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
drm_printf(p, "Lowest (RPN) frequency: %dMHz\n",
- intel_gpu_freq(rps, max_freq));
-
- max_freq = (rp_state_cap & 0xff00) >> 8;
- max_freq *= (IS_GEN9_BC(i915) ||
-GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
+ intel_gpu_freq(rps, caps.min_freq));
drm_printf(p, "Nominal (RP1) frequency: %dMHz\n",
- intel_gpu_freq(rps, max_freq));
-
- max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 16 :
- rp_state_cap >> 0) & 0xff;
- max_freq *= (IS_GEN9_BC(i915) ||
-GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
+ intel_gpu_freq(rps, caps.rp1_freq));
drm_printf(p, "Max non-overclocked (RP0) frequency: %dMHz\n",
- intel_gpu_freq(rps, max_freq));
+ intel_gpu_freq(rps, caps.rp0_freq));
drm_printf(p, "Max overclocked frequency: %dMHz\n",
intel_gpu_freq(rps, rps->max_freq));
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 6c9fdf7906c5..4528da9db590 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -1070,23 +1070,59 @@ int intel_rps_set(struct intel_rps *rps, u8 val)
return 0;
}
-static void gen6_rps_init(struct intel_rps *rps)
+static u32 intel_rps_read_state_cap(struct intel_rps *rps)
{
struct drm_i915_private *i915 = rps_to_i915(rps);
- u32 rp_state_cap = intel_rps_read_state_cap(rps);
+ struct intel_uncore *uncore = rps_to_uncore(rps);
- /* All of these values are in units of 50MHz */
+ if (IS_XEHPSDV(i915))
+ return intel_uncore_read(uncore, XEHPSDV_RP_STATE_CAP);
+ else if (IS_GEN9_LP(i915))
+ return intel_uncore_read(uncore, BXT_RP_STATE_CAP);
+ else
+ return intel_uncore_read(uncore, GEN6_RP_STATE_CAP);
+}
+
+/* "Caps" frequencies should be converted to MHz using intel_gpu_freq() */
+void intel_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps
*capSis)
Since this function is covering gen6 and above it would be good to
rename it as
Re: [Intel-gfx] [PATCH v11] drm/amdgpu: add drm buddy support to amdgpu
Dear Arunprivin,
Thank you for your patch.
Am 23.03.22 um 07:25 schrieb Arunpravin Paneer Selvam:
- Remove drm_mm references and replace with drm buddy functionalities
The commit message summary to me suggested, you can somehow use both
allocators now. Two suggestions below:
1. Switch to drm buddy allocator
2. Use drm buddy alllocator
- Add res cursor support for drm buddy
As an allocator switch sounds invasive, could you please extend the
commit message, briefly describing the current situation, saying what
the downsides are, and why the buddy allocator is “better”.
How did you test it? How can it be tested, that there are no regressions?
v2(Matthew Auld):
Nit: I’d add a space before (.
Kind regards,
Paul
- replace spinlock with mutex as we call kmem_cache_zalloc
(..., GFP_KERNEL) in drm_buddy_alloc() function
- lock drm_buddy_block_trim() function as it calls
mark_free/mark_split are all globally visible
v3(Matthew Auld):
- remove trim method error handling as we address the failure case
at drm_buddy_block_trim() function
v4:
- fix warnings reported by kernel test robot
v5:
- fix merge conflict issue
v6:
- fix warnings reported by kernel test robot
v7:
- remove DRM_BUDDY_RANGE_ALLOCATION flag usage
v8:
- keep DRM_BUDDY_RANGE_ALLOCATION flag usage
- resolve conflicts created by drm/amdgpu: remove VRAM accounting v2
v9(Christian):
- merged the below patch
- drm/amdgpu: move vram inline functions into a header
- rename label name as fallback
- move struct amdgpu_vram_mgr to amdgpu_vram_mgr.h
- remove unnecessary flags from struct amdgpu_vram_reservation
- rewrite block NULL check condition
- change else style as per coding standard
- rewrite the node max size
- add a helper function to fetch the first entry from the list
v10(Christian):
- rename amdgpu_get_node() function name as amdgpu_vram_mgr_first_block
v11:
- if size is not aligned with min_page_size, enable is_contiguous flag,
therefore, the size round up to the power of two and trimmed to the
original size.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/Kconfig | 1 +
.../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h| 97 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 10 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 263 ++
4 files changed, 234 insertions(+), 137 deletions(-)
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index f1422bee3dcc..5133c3f028ab 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -280,6 +280,7 @@ config DRM_AMDGPU
select HWMON
select BACKLIGHT_CLASS_DEVICE
select INTERVAL_TREE
+ select DRM_BUDDY
help
Choose this option if you have a recent AMD Radeon graphics card.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index acfa207cf970..864c609ba00b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -30,12 +30,15 @@
#include
#include
+#include "amdgpu_vram_mgr.h"
+
/* state back for walking over vram_mgr and gtt_mgr allocations */
struct amdgpu_res_cursor {
uint64_tstart;
uint64_tsize;
uint64_tremaining;
- struct drm_mm_node *node;
+ void*node;
+ uint32_tmem_type;
};
/**
@@ -52,27 +55,63 @@ static inline void amdgpu_res_first(struct ttm_resource
*res,
uint64_t start, uint64_t size,
struct amdgpu_res_cursor *cur)
{
+ struct drm_buddy_block *block;
+ struct list_head *head, *next;
struct drm_mm_node *node;
- if (!res || res->mem_type == TTM_PL_SYSTEM) {
- cur->start = start;
- cur->size = size;
- cur->remaining = size;
- cur->node = NULL;
- WARN_ON(res && start + size > res->num_pages << PAGE_SHIFT);
- return;
- }
+ if (!res)
+ goto fallback;
BUG_ON(start + size > res->num_pages << PAGE_SHIFT);
- node = to_ttm_range_mgr_node(res)->mm_nodes;
- while (start >= node->size << PAGE_SHIFT)
- start -= node++->size << PAGE_SHIFT;
+ cur->mem_type = res->mem_type;
+
+ switch (cur->mem_type) {
+ case TTM_PL_VRAM:
+ head = _amdgpu_vram_mgr_node(res)->blocks;
+
+ block = list_first_entry_or_null(head,
+struct drm_buddy_block,
+link);
+ if (!block)
+ goto fallback;
+
+ while (start >= amdgpu_node_size(block)) {
+ start -=
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/edid: filter DisplayID v2.0 CTA block in audio detection (rev2)
== Series Details ==
Series: drm/edid: filter DisplayID v2.0 CTA block in audio detection (rev2)
URL : https://patchwork.freedesktop.org/series/101565/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11397 -> Patchwork_22650
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/index.html
Participating hosts (49 -> 41)
--
Missing(8): shard-tglu fi-hsw-4200u bat-adlm-1 fi-bsw-cyan fi-ctg-p8600
shard-rkl shard-dg1 fi-bdw-samus
Known issues
Here are the changes found in Patchwork_22650 that come from known issues:
### IGT changes ###
Possible fixes
* igt@gem_exec_suspend@basic-s0@smem:
- fi-glk-dsi: [DMESG-WARN][1] ([i915#2943]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-glk-dsi/igt@gem_exec_suspend@basic...@smem.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/fi-glk-dsi/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [DMESG-FAIL][3] ([i915#4494] / [i915#4957]) ->
[PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html
- {fi-hsw-g3258}: [INCOMPLETE][5] ([i915#4785]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
Warnings
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[INCOMPLETE][7] ([i915#3303]) -> [INCOMPLETE][8]
([i915#4785])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11397/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#5339]: https://gitlab.freedesktop.org/drm/intel/issues/5339
[i915#5340]: https://gitlab.freedesktop.org/drm/intel/issues/5340
[i915#5342]: https://gitlab.freedesktop.org/drm/intel/issues/5342
Build changes
-
* Linux: CI_DRM_11397 -> Patchwork_22650
CI-20190529: 20190529
CI_DRM_11397: 056d47eaf6ea753fa2e21da31f9cbd8b721bbb7b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6387: 04d012b18355b53798af5a55a8915afb1a421bba @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22650: 67ac8aa43118c5586e781cf65eeb03681d40788e @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
67ac8aa43118 drm/edid: check basic audio support on CEA extension block
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22650/index.html
