[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] iosys-map: Add per-word read (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] iosys-map: Add per-word read (rev2)
URL   : https://patchwork.freedesktop.org/series/105692/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11816 -> Patchwork_105692v2


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105692v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105692v2, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/index.html

Participating hosts (40 -> 38)
--

  Additional (3): fi-hsw-4770 bat-dg2-9 bat-adls-5 
  Missing(5): fi-rkl-11600 bat-dg1-5 bat-adlp-4 bat-adln-1 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105692v2:

### IGT changes ###

 Possible regressions 

  * igt@core_hotunplug@unbind-rebind:
- bat-dg1-6:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg1-6/igt@core_hotunp...@unbind-rebind.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/bat-dg1-6/igt@core_hotunp...@unbind-rebind.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@core_hotunplug@unbind-rebind:
- {bat-dg2-9}:NOTRUN -> [INCOMPLETE][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/bat-dg2-9/igt@core_hotunp...@unbind-rebind.html
- {bat-dg2-8}:[DMESG-WARN][4] ([i915#5763]) -> [INCOMPLETE][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg2-8/igt@core_hotunp...@unbind-rebind.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/bat-dg2-8/igt@core_hotunp...@unbind-rebind.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {fi-ehl-2}: [PASS][6] -> [INCOMPLETE][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-ehl-2/igt@i915_susp...@basic-s2idle-without-i915.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-ehl-2/igt@i915_susp...@basic-s2idle-without-i915.html

  
Known issues


  Here are the changes found in Patchwork_105692v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#3012])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@gem:
- fi-blb-e6850:   NOTRUN -> [DMESG-FAIL][9] ([i915#4528])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-blb-e6850/igt@i915_selftest@l...@gem.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][10] ([i915#4785])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271]) +9 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-hsw-4770:NOTRUN -> [SKIP][12] ([fdo#109271] / [fdo#111827]) +7 
similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-hsw-4770/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
- fi-bsw-kefka:   [PASS][13] -> [FAIL][14] ([i915#6298])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions.html

  * igt@kms_flip@basic-flip-vs-modeset@a-edp1:
- fi-tgl-u2:  [PASS][15] -> [DMESG-WARN][16] ([i915#402])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-tgl-u2/igt@kms_flip@basic-flip-vs-mode...@a-edp1.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-tgl-u2/igt@kms_flip@basic-flip-vs-mode...@a-edp1.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#1072]) +3 
similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v2/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html

  * igt@runner@aborted:
- fi-hsw-4770:NOTRUN -> [FAIL][18] ([fdo#109271] / [i915#4312] / 
[i915#5594] / [i915

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] iosys-map: Add per-word read (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] iosys-map: Add per-word read (rev2)
URL   : https://patchwork.freedesktop.org/series/105692/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] iosys-map: Add per-word read (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] iosys-map: Add per-word read (rev2)
URL   : https://patchwork.freedesktop.org/series/105692/
State : warning

== Summary ==

Error: dim checkpatch failed
40dfd8d9e7ab iosys-map: Add per-word read
-:88: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#88: FILE: include/linux/iosys-map.h:339:
+   u64: val_ = readq(vaddr_iomem_)
   ^

-:88: WARNING:INDENTED_LABEL: labels should not be indented
#88: FILE: include/linux/iosys-map.h:339:
+   u64: val_ = readq(vaddr_iomem_)

-:91: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#91: FILE: include/linux/iosys-map.h:342:
+   u64: memcpy_fromio(&(val_), vaddr_iomem_, sizeof(u64))
   ^

-:91: WARNING:INDENTED_LABEL: labels should not be indented
#91: FILE: include/linux/iosys-map.h:342:
+   u64: memcpy_fromio(&(val_), vaddr_iomem_, sizeof(u64))

-:94: CHECK:CAMELCASE: Avoid CamelCase: <_Generic>
#94: FILE: include/linux/iosys-map.h:345:
+#define __iosys_map_rd_io(val__, vaddr_iomem__, type__) _Generic(val__,
\

-:94: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val__' - possible 
side-effects?
#94: FILE: include/linux/iosys-map.h:345:
+#define __iosys_map_rd_io(val__, vaddr_iomem__, type__) _Generic(val__,
\
+   u8: val__ = readb(vaddr_iomem__),   
\
+   u16: val__ = readw(vaddr_iomem__),  
\
+   u32: val__ = readl(vaddr_iomem__),  
\
+   __iosys_map_rd_io_u64_case(val__, vaddr_iomem__))

-:94: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'vaddr_iomem__' - possible 
side-effects?
#94: FILE: include/linux/iosys-map.h:345:
+#define __iosys_map_rd_io(val__, vaddr_iomem__, type__) _Generic(val__,
\
+   u8: val__ = readb(vaddr_iomem__),   
\
+   u16: val__ = readw(vaddr_iomem__),  
\
+   u32: val__ = readl(vaddr_iomem__),  
\
+   __iosys_map_rd_io_u64_case(val__, vaddr_iomem__))

-:95: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#95: FILE: include/linux/iosys-map.h:346:
+   u8: val__ = readb(vaddr_iomem__),   
\
  ^

-:95: WARNING:INDENTED_LABEL: labels should not be indented
#95: FILE: include/linux/iosys-map.h:346:
+   u8: val__ = readb(vaddr_iomem__),   
\

-:96: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#96: FILE: include/linux/iosys-map.h:347:
+   u16: val__ = readw(vaddr_iomem__),  
\
   ^

-:96: WARNING:INDENTED_LABEL: labels should not be indented
#96: FILE: include/linux/iosys-map.h:347:
+   u16: val__ = readw(vaddr_iomem__),  
\

-:97: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#97: FILE: include/linux/iosys-map.h:348:
+   u32: val__ = readl(vaddr_iomem__),  
\
   ^

-:97: WARNING:INDENTED_LABEL: labels should not be indented
#97: FILE: include/linux/iosys-map.h:348:
+   u32: val__ = readl(vaddr_iomem__),  
\

-:100: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'type__' may be better as 
'(type__)' to avoid precedence issues
#100: FILE: include/linux/iosys-map.h:351:
+#define __iosys_map_rd_sys(val__, vaddr__, type__) ({  
\
+   compiletime_assert(sizeof(type__) <= sizeof(u64),   
\
+  "Unsupported access size for __iosys_map_rd_sys()"); 
\
+   val__ = READ_ONCE(*((type__ *)vaddr__));
\
+})

-:126: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'map__' - possible 
side-effects?
#126: FILE: include/linux/iosys-map.h:371:
+#define iosys_map_rd(map__, offset__, type__) ({   
\
+   type__ val; 
\
+   if ((map__)->is_iomem) {
\
+   __iosys_map_rd_io(val, (map__)->vaddr_iomem + (offset__), 
type__);\
+   } else {
\
+   __iosys_map_rd_sys(val, (map__)->vaddr + (offset__), type__);   
\
+   }   
\
+   val;
\
 })

-:126: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'offset__' - possible 
side-effects?
#126: FILE: include/linux/iosys-map.h:371:
+#define iosys_map_rd(map__, offset__, type__) ({   
\
+   type__ val; 
\
+   if ((map__)->is_iomem) {
\
+

[Intel-gfx] [Intel-gfx 2/2] drm/i915/guc: Add delay to disable scheduling after pin count goes to zero

[Alan Previn]

From: Matthew Brost 

Add a delay, configurable via debugs (default 100ms), to disable
scheduling of a context after the pin count goes to zero. Disable
scheduling is somewhat costly operation so the idea is a delay allows
the resubmit something before doing this operation. This delay is only
done if the context isn't close and less than 3/4 of the guc_ids are in
use.

As temporary WA disable this feature for the selftests. Selftests are
very timing sensitive and any change in timing can cause failure. A
follow up patch will fixup the selftests to understand this delay.

Alan Previn: Matt Brost first introduced this series back in Oct 2021.
However no real world workload with measured performance impact was
available to prove the intended results. Today, this series is being
republished in response to a real world workload that benefited greatly
from it along with measured performance improvement.

Workload description: 36 containers were created on a DG2 device where
each container was performing a combination of 720p 3d game rendering
and 30fps video encoding. The workload density was configured in way
that guaranteed each container to ALWAYS be able to render and
encode no less than 30fps with a predefined maximum render + encode
latency time. That means that the totality of all 36 containers and its
workloads were not saturating the utilized hw engines to its max
(in order to maintain just enough headrooom to meet the minimum fps and
latencies of incoming container submissions).

Problem statement: It was observed that the CPU utilization of the CPU
core that was pinned to i915 soft IRQ work was experiencing severe load.
Using tracelogs and an instrumentation patch to count specific i915 IRQ
events, it was confirmed that the majority of the CPU cycles were caused
by the gen11_other_irq_handler() -> guc_irq_handler() code path. The vast
majority of the cycles was determined to be processing a specific G2H IRQ
which was INTEL_GUC_ACTION_SCHED_CONTEXT_MODE_DONE. This IRQ is send by
the GuC in response to the i915 KMD sending the H2G requests
INTEL_GUC_ACTION_SCHED_CONTEXT_MODE_SET to the GuC. That request is sent
when the context is idle to unpin the context from any GuC access. The
high CPU utilization % symptom was limiting the density scaling.

Root Cause Analysis: Because the incoming execution buffers were spread
across 36 different containers (each with multiple contexts) but the
system in totality was NOT saturated to the max, it was assumed that each
context was constantly idling between submissions. This was causing thrashing
of unpinning a context from GuC at one moment, followed by repinning it
due to incoming workload the very next moment. Both of these event-pairs
were being triggered across multiple contexts per container, across all
containers at the rate of > 30 times per sec per context.

Metrics: When running this workload without this patch, we measured an average
of ~69K INTEL_GUC_ACTION_SCHED_CONTEXT_MODE_DONE events every 10 seconds or
~10 million times over ~25+ mins. With this patch, the count reduced to ~480
every 10 seconds or about ~28K over ~10 mins. The improvement observed is
~99% for the average counts per 10 seconds.

Signed-off-by: Matthew Brost 
Acked-by: Alan Previn 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   |   2 +-
 drivers/gpu/drm/i915/gt/intel_context.h   |   9 ++
 drivers/gpu/drm/i915/gt/intel_context_types.h |   8 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  10 ++
 .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c|  28 
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 132 ++
 drivers/gpu/drm/i915/i915_selftest.h  |   2 +
 drivers/gpu/drm/i915/i915_trace.h |  10 ++
 8 files changed, 175 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index dabdfe09f5e5..df7fd1b019ec 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1454,7 +1454,7 @@ static void engines_idle_release(struct i915_gem_context 
*ctx,
int err;
 
/* serialises with execbuf */
-   set_bit(CONTEXT_CLOSED_BIT, &ce->flags);
+   intel_context_close(ce);
if (!intel_context_pin_if_active(ce))
continue;
 
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h 
b/drivers/gpu/drm/i915/gt/intel_context.h
index 8e2d70630c49..7cc4bb9ad042 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -276,6 +276,15 @@ static inline bool intel_context_is_barrier(const struct 
intel_context *ce)
return test_bit(CONTEXT_BARRIER_BIT, &ce->flags);
 }
 
+static inline void intel_context_close(struct intel_context *ce)
+{
+   set_bit(CONTEXT_CLOSED_BIT, &ce->flags);
+
+   trace_intel_context_close(ce);
+   if (ce->ops->close)
+   ce->ops->close(ce);
+}
+
 stati

[Intel-gfx] [Intel-gfx 1/2] drm/i915/selftests: Use correct selfest calls for live tests

[Alan Previn]

From: Matthew Brost 

This will help in an upcoming patch where the live selftest wrappers
are extended to do more.

Signed-off-by: Matthew Brost 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 +-
 drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c| 2 +-
 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c  | 2 +-
 drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c| 2 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c   | 2 +-
 drivers/gpu/drm/i915/selftests/i915_perf.c  | 2 +-
 drivers/gpu/drm/i915/selftests/i915_request.c   | 2 +-
 drivers/gpu/drm/i915/selftests/i915_vma.c   | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index 13b088cc787e..a666d7e610f5 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -434,5 +434,5 @@ int i915_gem_coherency_live_selftests(struct 
drm_i915_private *i915)
SUBTEST(igt_gem_coherency),
};
 
-   return i915_subtests(tests, i915);
+   return i915_live_subtests(tests, i915);
 }
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
index 62c61af77a42..51ed824b020c 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
@@ -476,5 +476,5 @@ int i915_gem_dmabuf_live_selftests(struct drm_i915_private 
*i915)
SUBTEST(igt_dmabuf_import_same_driver_lmem_smem),
};
 
-   return i915_subtests(tests, i915);
+   return i915_live_subtests(tests, i915);
 }
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 5bc93a1ce3e3..f705e2b5c082 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -1761,5 +1761,5 @@ int i915_gem_mman_live_selftests(struct drm_i915_private 
*i915)
SUBTEST(igt_mmap_gpu),
};
 
-   return i915_subtests(tests, i915);
+   return i915_live_subtests(tests, i915);
 }
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
index fe0a890775e2..bdf5bb40ccf1 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
@@ -95,5 +95,5 @@ int i915_gem_object_live_selftests(struct drm_i915_private 
*i915)
SUBTEST(igt_gem_huge),
};
 
-   return i915_subtests(tests, i915);
+   return i915_live_subtests(tests, i915);
 }
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 8633bec18fa7..5813dbe929de 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -2324,5 +2324,5 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private 
*i915)
 
GEM_BUG_ON(offset_in_page(to_gt(i915)->ggtt->vm.total));
 
-   return i915_subtests(tests, i915);
+   return i915_live_subtests(tests, i915);
 }
diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c 
b/drivers/gpu/drm/i915/selftests/i915_perf.c
index 88db2e3d81d0..429c6d73b159 100644
--- a/drivers/gpu/drm/i915/selftests/i915_perf.c
+++ b/drivers/gpu/drm/i915/selftests/i915_perf.c
@@ -431,7 +431,7 @@ int i915_perf_live_selftests(struct drm_i915_private *i915)
if (err)
return err;
 
-   err = i915_subtests(tests, i915);
+   err = i915_live_subtests(tests, i915);
 
destroy_empty_config(&i915->perf);
 
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c 
b/drivers/gpu/drm/i915/selftests/i915_request.c
index c56a0c2cd2f7..b0d2fe119561 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -1821,7 +1821,7 @@ int i915_request_live_selftests(struct drm_i915_private 
*i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
 
-   return i915_subtests(tests, i915);
+   return i915_live_subtests(tests, i915);
 }
 
 static int switch_to_kernel_sync(struct intel_context *ce, int err)
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c 
b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 6921ba128015..e3821398a5b0 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -1103,5 +1103,5 @@ int i915_vma_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_vma_remapped_gtt),
};
 
-   return i915_subtests(tests, i915);
+   return i915_live_subtests(tests, i915);
 }
-- 
2.25.1

[Intel-gfx] [Intel-gfx 0/2] Delay disabling scheduling on a context

[Alan Previn]

This is a revival of the same series posted by Matthew Brost
back in October 2021 (https://patchwork.freedesktop.org/series/96167/).
Additional real world measured metrics is included this time around
that has proven the effectiveness of this series.

This series adds a delay before disabling scheduling on a context. 2nd patch 
should
explain it quite well.

Matthew Brost (2):
  drm/i915/selftests: Use correct selfest calls for live tests
  drm/i915/guc: Add delay to disable scheduling after pin count goes to
zero

 drivers/gpu/drm/i915/gem/i915_gem_context.c   |   2 +-
 .../i915/gem/selftests/i915_gem_coherency.c   |   2 +-
 .../drm/i915/gem/selftests/i915_gem_dmabuf.c  |   2 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c|   2 +-
 .../drm/i915/gem/selftests/i915_gem_object.c  |   2 +-
 drivers/gpu/drm/i915/gt/intel_context.h   |   9 ++
 drivers/gpu/drm/i915/gt/intel_context_types.h |   8 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  10 ++
 .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c|  28 
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 132 ++
 drivers/gpu/drm/i915/i915_selftest.h  |   2 +
 drivers/gpu/drm/i915/i915_trace.h |  10 ++
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |   2 +-
 drivers/gpu/drm/i915/selftests/i915_perf.c|   2 +-
 drivers/gpu/drm/i915/selftests/i915_request.c |   2 +-
 drivers/gpu/drm/i915/selftests/i915_vma.c |   2 +-
 16 files changed, 183 insertions(+), 34 deletions(-)


base-commit: ab91e54f0a9cec3fba39a2beae980ffbb8f7cea7
-- 
2.25.1

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc/slpc: Add a new SLPC selftest (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915/guc/slpc: Add a new SLPC selftest (rev4)
URL   : https://patchwork.freedesktop.org/series/105005/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11816 -> Patchwork_105005v4


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105005v4 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105005v4, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/index.html

Participating hosts (40 -> 39)
--

  Additional (3): fi-hsw-4770 bat-adlm-1 fi-icl-u2 
  Missing(4): bat-dg2-8 fi-rkl-11600 fi-bdw-samus bat-dg1-5 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105005v4:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@workarounds:
- fi-bdw-5557u:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bdw-5557u/igt@i915_selftest@l...@workarounds.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-bdw-5557u/igt@i915_selftest@l...@workarounds.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@perf:
- {bat-adln-1}:   NOTRUN -> [DMESG-FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/bat-adln-1/igt@i915_selftest@l...@perf.html

  
Known issues


  Here are the changes found in Patchwork_105005v4 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-icl-u2:  NOTRUN -> [SKIP][4] ([i915#2190])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-icl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@random-engines:
- fi-icl-u2:  NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-icl-u2/igt@gem_lmem_swapp...@random-engines.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770:NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#3012])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_pm_rpm@module-reload:
- fi-cfl-8109u:   [PASS][7] -> [DMESG-FAIL][8] ([i915#62])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-cfl-8109u/igt@i915_pm_...@module-reload.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-cfl-8109u/igt@i915_pm_...@module-reload.html
- bat-adlp-4: [PASS][9] -> [DMESG-WARN][10] ([i915#3576]) +1 
similar issue
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adlp-4/igt@i915_pm_...@module-reload.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/bat-adlp-4/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@execlists:
- fi-bsw-nick:[PASS][11] -> [INCOMPLETE][12] ([i915#5847])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-bsw-nick/igt@i915_selftest@l...@execlists.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258:   [PASS][13] -> [INCOMPLETE][14] ([i915#4785])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@ring_submission:
- fi-cfl-8109u:   [PASS][15] -> [DMESG-WARN][16] ([i915#5904]) +11 
similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-cfl-8109u:   [PASS][17] -> [DMESG-WARN][18] ([i915#5904] / 
[i915#62])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-icl-u2:  NOTRUN -> [SKIP][19] ([i915#5903])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105005v4/fi-icl-u2/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-l

Re: [Intel-gfx] [PATCH] drm/i915/guc/slpc: Add a new SLPC selftest

[Dixit, Ashutosh]

On Mon, 27 Jun 2022 16:03:46 -0700, Vinay Belgaumkar wrote:
>
>   /* Actual frequency should rise above min */
> - if (max_act_freq == slpc_min_freq) {
> + if (max_act_freq <= slpc_min_freq) {
>   pr_err("Actual freq did not rise above min\n");
> + pr_err("Perf Limit Reasons: 0x%x\n",
> +intel_uncore_read(gt->uncore, 
> GT0_PERF_LIMIT_REASONS));
>   err = -EINVAL;
>   }

Maybe to be clear, we should combine these two pr_err's into a single
pr_err.

In any case this patch is:

Reviewed-by: Ashutosh Dixit 

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] iosys-map: Add per-word read

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] iosys-map: Add per-word read
URL   : https://patchwork.freedesktop.org/series/105692/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11816 -> Patchwork_105692v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105692v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105692v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/index.html

Participating hosts (40 -> 42)
--

  Additional (4): fi-hsw-4770 fi-icl-u2 bat-adls-5 bat-dg2-9 
  Missing(2): fi-rkl-11600 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105692v1:

### IGT changes ###

 Possible regressions 

  * igt@core_hotunplug@unbind-rebind:
- bat-dg1-5:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg1-5/igt@core_hotunp...@unbind-rebind.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/bat-dg1-5/igt@core_hotunp...@unbind-rebind.html
- bat-dg1-6:  [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg1-6/igt@core_hotunp...@unbind-rebind.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/bat-dg1-6/igt@core_hotunp...@unbind-rebind.html

  * igt@gem_exec_parallel@engines@fds:
- fi-bsw-kefka:   [PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bsw-kefka/igt@gem_exec_parallel@engi...@fds.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-bsw-kefka/igt@gem_exec_parallel@engi...@fds.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@core_hotunplug@unbind-rebind:
- {bat-dg2-9}:NOTRUN -> [INCOMPLETE][7]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/bat-dg2-9/igt@core_hotunp...@unbind-rebind.html
- {bat-dg2-8}:[DMESG-WARN][8] ([i915#5763]) -> [INCOMPLETE][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg2-8/igt@core_hotunp...@unbind-rebind.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/bat-dg2-8/igt@core_hotunp...@unbind-rebind.html

  
Known issues


  Here are the changes found in Patchwork_105692v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-icl-u2:  NOTRUN -> [SKIP][10] ([i915#2190])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-icl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@random-engines:
- fi-icl-u2:  NOTRUN -> [SKIP][11] ([i915#4613]) +3 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-icl-u2/igt@gem_lmem_swapp...@random-engines.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770:NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#3012])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[PASS][13] -> [INCOMPLETE][14] ([i915#3921])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-icl-u2:  NOTRUN -> [SKIP][15] ([i915#5903])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-icl-u2/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][16] ([fdo#109271]) +9 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-hsw-4770:NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-hsw-4770/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2:  NOTRUN -> [SKIP][18] ([fdo#111827]) +8 similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105692v1/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-icl-u2:  NOTRUN -> [SKIP][19] ([i915#4103])
   [19]: 
https://

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] iosys-map: Add per-word read

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] iosys-map: Add per-word read
URL   : https://patchwork.freedesktop.org/series/105692/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] iosys-map: Add per-word read

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/2] iosys-map: Add per-word read
URL   : https://patchwork.freedesktop.org/series/105692/
State : warning

== Summary ==

Error: dim checkpatch failed
e6ff19d2ffd3 iosys-map: Add per-word read
-:88: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#88: FILE: include/linux/iosys-map.h:339:
+   u64: val_ = readq(vaddr_iomem_)
   ^

-:88: WARNING:INDENTED_LABEL: labels should not be indented
#88: FILE: include/linux/iosys-map.h:339:
+   u64: val_ = readq(vaddr_iomem_)

-:91: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#91: FILE: include/linux/iosys-map.h:342:
+   u64: memcpy_fromio(&(val_), vaddr_iomem_, sizeof(u64))
   ^

-:91: WARNING:INDENTED_LABEL: labels should not be indented
#91: FILE: include/linux/iosys-map.h:342:
+   u64: memcpy_fromio(&(val_), vaddr_iomem_, sizeof(u64))

-:94: CHECK:CAMELCASE: Avoid CamelCase: <_Generic>
#94: FILE: include/linux/iosys-map.h:345:
+#define __iosys_map_rd_io(val__, vaddr_iomem__, type__) _Generic(val__,
\

-:94: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val__' - possible 
side-effects?
#94: FILE: include/linux/iosys-map.h:345:
+#define __iosys_map_rd_io(val__, vaddr_iomem__, type__) _Generic(val__,
\
+   u8: val__ = readb(vaddr_iomem__),   
\
+   u16: val__ = readw(vaddr_iomem__),  
\
+   u32: val__ = readl(vaddr_iomem__),  
\
+   __iosys_map_rd_io_u64_case(val__, vaddr_iomem__))

-:94: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'vaddr_iomem__' - possible 
side-effects?
#94: FILE: include/linux/iosys-map.h:345:
+#define __iosys_map_rd_io(val__, vaddr_iomem__, type__) _Generic(val__,
\
+   u8: val__ = readb(vaddr_iomem__),   
\
+   u16: val__ = readw(vaddr_iomem__),  
\
+   u32: val__ = readl(vaddr_iomem__),  
\
+   __iosys_map_rd_io_u64_case(val__, vaddr_iomem__))

-:95: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#95: FILE: include/linux/iosys-map.h:346:
+   u8: val__ = readb(vaddr_iomem__),   
\
  ^

-:95: WARNING:INDENTED_LABEL: labels should not be indented
#95: FILE: include/linux/iosys-map.h:346:
+   u8: val__ = readb(vaddr_iomem__),   
\

-:96: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#96: FILE: include/linux/iosys-map.h:347:
+   u16: val__ = readw(vaddr_iomem__),  
\
   ^

-:96: WARNING:INDENTED_LABEL: labels should not be indented
#96: FILE: include/linux/iosys-map.h:347:
+   u16: val__ = readw(vaddr_iomem__),  
\

-:97: ERROR:SPACING: spaces required around that ':' (ctx:VxW)
#97: FILE: include/linux/iosys-map.h:348:
+   u32: val__ = readl(vaddr_iomem__),  
\
   ^

-:97: WARNING:INDENTED_LABEL: labels should not be indented
#97: FILE: include/linux/iosys-map.h:348:
+   u32: val__ = readl(vaddr_iomem__),  
\

-:100: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'type__' may be better as 
'(type__)' to avoid precedence issues
#100: FILE: include/linux/iosys-map.h:351:
+#define __iosys_map_rd_sys(val__, vaddr__, type__) ({  
\
+   compiletime_assert(sizeof(type__) <= sizeof(u64),   
\
+  "Unsupported access size for __iosys_map_rd_sys()"); 
\
+   val__ = READ_ONCE(*((type__ *)vaddr__));
\
+})

-:126: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'map__' - possible 
side-effects?
#126: FILE: include/linux/iosys-map.h:371:
+#define iosys_map_rd(map__, offset__, type__) ({   
\
+   type__ val; 
\
+   if ((map__)->is_iomem) {
\
+   __iosys_map_rd_io(val, (map__)->vaddr_iomem + (offset__), 
type__);\
+   } else {
\
+   __iosys_map_rd_sys(val, (map__)->vaddr + (offset__), type__);   
\
+   }   
\
+   val;
\
 })

-:126: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'offset__' - possible 
side-effects?
#126: FILE: include/linux/iosys-map.h:371:
+#define iosys_map_rd(map__, offset__, type__) ({   
\
+   type__ val; 
\
+   if ((map__)->is_iomem) {
\
+   __io

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: ADL-N should use the same GuC FW as ADL-S (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: ADL-N should use the same GuC FW as ADL-S (rev2)
URL   : https://patchwork.freedesktop.org/series/105444/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11816 -> Patchwork_105444v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/index.html

Participating hosts (40 -> 39)
--

  Additional (1): fi-hsw-4770 
  Missing(2): bat-adln-1 fi-bdw-samus 

Known issues


  Here are the changes found in Patchwork_105444v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770:NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#3012])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@gem:
- fi-pnv-d510:NOTRUN -> [DMESG-FAIL][2] ([i915#4528])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-pnv-d510/igt@i915_selftest@l...@gem.html

  * igt@i915_selftest@live@gem_contexts:
- fi-bdw-5557u:   [PASS][3] -> [INCOMPLETE][4] ([i915#5502])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bdw-5557u/igt@i915_selftest@live@gem_contexts.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-bdw-5557u/igt@i915_selftest@live@gem_contexts.html

  * igt@i915_selftest@live@gt_engines:
- bat-dg1-5:  [PASS][5] -> [INCOMPLETE][6] ([i915#4418])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg1-5/igt@i915_selftest@live@gt_engines.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/bat-dg1-5/igt@i915_selftest@live@gt_engines.html
- bat-dg1-6:  [PASS][7] -> [INCOMPLETE][8] ([i915#4418])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg1-6/igt@i915_selftest@live@gt_engines.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/bat-dg1-6/igt@i915_selftest@live@gt_engines.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][9] ([fdo#109271]) +9 similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_busy@basic@flip:
- bat-adlp-4: [PASS][10] -> [DMESG-WARN][11] ([i915#3576])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adlp-4/igt@kms_busy@ba...@flip.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/bat-adlp-4/igt@kms_busy@ba...@flip.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-hsw-4770:NOTRUN -> [SKIP][12] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-hsw-4770/igt@kms_chamel...@dp-crc-fast.html

  * 
igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka:   [PASS][13] -> [FAIL][14] ([i915#6298])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html

  * igt@kms_flip@basic-flip-vs-dpms@a-edp1:
- fi-tgl-u2:  [PASS][15] -> [DMESG-WARN][16] ([i915#402])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-tgl-u2/igt@kms_flip@basic-flip-vs-d...@a-edp1.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-tgl-u2/igt@kms_flip@basic-flip-vs-d...@a-edp1.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#1072]) +3 
similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_lrc:
- fi-rkl-11600:   [DMESG-FAIL][18] ([i915#2373]) -> [PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-rkl-11600/igt@i915_selftest@live@gt_lrc.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-rkl-11600/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gtt:
- fi-bdw-5557u:   [DMESG-FAIL][20] ([i915#3674]) -> [PASS][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105444v2/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[DMESG-FAIL][22] ([i915#4528]) -> [PASS][23]
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-pnv-d510/igt@i915_

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: handle null ptr at sg traversing

[Patchwork]

== Series Details ==

Series: drm/i915/gt: handle null ptr at sg traversing
URL   : https://patchwork.freedesktop.org/series/105683/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11816 -> Patchwork_105683v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/index.html

Participating hosts (40 -> 38)
--

  Additional (1): fi-hsw-4770 
  Missing(3): fi-bdw-samus fi-rkl-11600 bat-adlp-4 

Known issues


  Here are the changes found in Patchwork_105683v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770:NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#3012])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@gem:
- fi-blb-e6850:   NOTRUN -> [DMESG-FAIL][2] ([i915#4528])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-blb-e6850/igt@i915_selftest@l...@gem.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271]) +9 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_busy@basic@modeset:
- fi-tgl-u2:  [PASS][4] -> [DMESG-WARN][5] ([i915#402])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-tgl-u2/igt@kms_busy@ba...@modeset.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-tgl-u2/igt@kms_busy@ba...@modeset.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-hsw-4770:NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-hsw-4770/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1072]) +3 
similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html

  * igt@prime_vgem@basic-userptr:
- fi-tgl-u2:  NOTRUN -> [SKIP][8] ([fdo#109295] / [i915#3301])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-tgl-u2/igt@prime_v...@basic-userptr.html

  
 Possible fixes 

  * igt@i915_selftest@live@gtt:
- fi-bdw-5557u:   [DMESG-FAIL][9] ([i915#3674]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-6:  [DMESG-FAIL][11] ([i915#4494] / [i915#4957]) -> 
[PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-blb-e6850:   [DMESG-FAIL][13] ([i915#4528]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-blb-e6850/igt@i915_selftest@l...@requests.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/fi-blb-e6850/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@reset:
- {bat-adlp-6}:   [DMESG-FAIL][15] ([i915#4983]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adlp-6/igt@i915_selftest@l...@reset.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/bat-adlp-6/igt@i915_selftest@l...@reset.html

  * igt@kms_busy@basic@flip:
- {bat-adln-1}:   [DMESG-WARN][17] ([i915#3576]) -> [PASS][18] +1 
similar issue
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adln-1/igt@kms_busy@ba...@flip.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/bat-adln-1/igt@kms_busy@ba...@flip.html

  * igt@kms_flip@basic-flip-vs-modeset@b-edp1:
- {bat-adlp-6}:   [DMESG-WARN][19] ([i915#3576]) -> [PASS][20] +2 
similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adlp-6/igt@kms_flip@basic-flip-vs-mode...@b-edp1.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105683v1/bat-adlp-6/igt@kms_flip@basic-flip-vs-mode...@b-edp1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/dr

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix a lockdep warning at error capture (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix a lockdep warning at error capture (rev2)
URL   : https://patchwork.freedesktop.org/series/105291/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11803_full -> Patchwork_105291v2_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105291v2_full:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-512x170:
- {shard-dg1}:NOTRUN -> [SKIP][1] +7 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-dg1-13/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-512x170.html

  
Known issues


  Here are the changes found in Patchwork_105291v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ccs@block-copy-inplace:
- shard-tglb: NOTRUN -> [SKIP][2] ([i915#3555] / [i915#5325])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-tglb6/igt@gem_...@block-copy-inplace.html

  * igt@gem_exec_balancer@parallel-out-fence:
- shard-iclb: [PASS][3] -> [SKIP][4] ([i915#4525]) +1 similar issue
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-iclb4/igt@gem_exec_balan...@parallel-out-fence.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-iclb7/igt@gem_exec_balan...@parallel-out-fence.html

  * igt@gem_exec_fair@basic-flow@rcs0:
- shard-glk:  NOTRUN -> [FAIL][5] ([i915#2842])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-glk6/igt@gem_exec_fair@basic-f...@rcs0.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl:  [PASS][6] -> [FAIL][7] ([i915#2842])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-apl4/igt@gem_exec_fair@basic-none-s...@rcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-apl7/igt@gem_exec_fair@basic-none-s...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl:  [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs1.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar 
issue
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk9/igt@gem_exec_fair@basic-p...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-glk3/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
- shard-tglb: [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar 
issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-tglb7/igt@gem_exec_fair@basic-p...@vcs1.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-tglb3/igt@gem_exec_fair@basic-p...@vcs1.html

  * igt@gem_exec_params@no-bsd:
- shard-tglb: NOTRUN -> [SKIP][14] ([fdo#109283]) +1 similar issue
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-tglb3/igt@gem_exec_par...@no-bsd.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
- shard-skl:  NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-skl10/igt@gem_lmem_swapp...@heavy-verify-multi-ccs.html

  * igt@gem_lmem_swapping@random:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#4613]) +2 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-tglb6/igt@gem_lmem_swapp...@random.html

  * igt@gem_lmem_swapping@verify-random:
- shard-glk:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#4613])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-glk6/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_pwrite@basic-exhaustion:
- shard-tglb: NOTRUN -> [WARN][18] ([i915#2658])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-tglb6/igt@gem_pwr...@basic-exhaustion.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
- shard-kbl:  NOTRUN -> [SKIP][19] ([fdo#109271]) +22 similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/shard-kbl3/igt@gem_...@protected-raw-src-copy-not-readible.html
- shard-tglb: NOTRUN -> [SKIP][20] ([i915#4270])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: Add performance workaround 18019455067 (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dg2: Add performance workaround 18019455067 (rev2)
URL   : https://patchwork.freedesktop.org/series/105512/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11816 -> Patchwork_105512v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/index.html

Participating hosts (40 -> 39)
--

  Additional (1): bat-dg2-9 
  Missing(2): fi-bdw-samus bat-adlp-4 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105512v2:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@perf:
- {bat-adln-1}:   NOTRUN -> [DMESG-FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/bat-adln-1/igt@i915_selftest@l...@perf.html

  
Known issues


  Here are the changes found in Patchwork_105512v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@gem:
- fi-pnv-d510:NOTRUN -> [DMESG-FAIL][2] ([i915#4528])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/fi-pnv-d510/igt@i915_selftest@l...@gem.html

  * igt@i915_selftest@live@gem_contexts:
- fi-bdw-5557u:   [PASS][3] -> [INCOMPLETE][4] ([i915#5502])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bdw-5557u/igt@i915_selftest@live@gem_contexts.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/fi-bdw-5557u/igt@i915_selftest@live@gem_contexts.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
- fi-bsw-kefka:   [PASS][5] -> [FAIL][6] ([i915#6298])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions.html

  * igt@prime_vgem@basic-userptr:
- fi-tgl-u2:  NOTRUN -> [SKIP][7] ([fdo#109295] / [i915#3301])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/fi-tgl-u2/igt@prime_v...@basic-userptr.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_contexts:
- {bat-adln-1}:   [DMESG-FAIL][8] -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adln-1/igt@i915_selftest@live@gt_contexts.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/bat-adln-1/igt@i915_selftest@live@gt_contexts.html

  * igt@i915_selftest@live@gt_lrc:
- fi-rkl-11600:   [DMESG-FAIL][10] ([i915#2373]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-rkl-11600/igt@i915_selftest@live@gt_lrc.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/fi-rkl-11600/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gtt:
- fi-bdw-5557u:   [DMESG-FAIL][12] ([i915#3674]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  [DMESG-FAIL][14] ([i915#4494] / [i915#4957]) -> 
[PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
- bat-dg1-6:  [DMESG-FAIL][16] ([i915#4494] / [i915#4957]) -> 
[PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[DMESG-FAIL][18] ([i915#4528]) -> [PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@reset:
- {bat-adlp-6}:   [DMESG-FAIL][20] ([i915#4983]) -> [PASS][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adlp-6/igt@i915_selftest@l...@reset.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v2/bat-adlp-6/igt@i915_selftest@l...@reset.html

  * igt@kms_busy@basic@flip:
- {bat-adln-1}:   [DMESG-WARN][22] ([i915#3576]) -> [PASS][23]
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adln-1/igt@kms

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: wait on timeout before retry

[Patchwork]

== Series Details ==

Series: drm/i915/dp: wait on timeout before retry
URL   : https://patchwork.freedesktop.org/series/105660/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11816 -> Patchwork_105660v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/index.html

Participating hosts (40 -> 42)
--

  Additional (3): fi-hsw-4770 fi-icl-u2 bat-dg2-9 
  Missing(1): fi-bdw-samus 

Known issues


  Here are the changes found in Patchwork_105660v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-icl-u2:  NOTRUN -> [SKIP][1] ([i915#2190])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-icl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@random-engines:
- fi-icl-u2:  NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-icl-u2/igt@gem_lmem_swapp...@random-engines.html

  * igt@gem_softpin@allocator-basic-reserve:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271]) +9 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770:NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#3012])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@gem:
- fi-blb-e6850:   NOTRUN -> [DMESG-FAIL][5] ([i915#4528])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-blb-e6850/igt@i915_selftest@l...@gem.html
- fi-pnv-d510:NOTRUN -> [DMESG-FAIL][6] ([i915#4528])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-pnv-d510/igt@i915_selftest@l...@gem.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][7] ([i915#4785])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-icl-u2:  NOTRUN -> [SKIP][8] ([i915#5903])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-icl-u2/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_busy@basic@modeset:
- bat-adlp-4: [PASS][9] -> [DMESG-WARN][10] ([i915#3576]) +1 
similar issue
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/bat-adlp-4/igt@kms_busy@ba...@modeset.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/bat-adlp-4/igt@kms_busy@ba...@modeset.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +7 
similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-hsw-4770/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2:  NOTRUN -> [SKIP][12] ([fdo#111827]) +8 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-icl-u2:  NOTRUN -> [SKIP][13] ([i915#4103])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1:
- fi-tgl-u2:  [PASS][14] -> [DMESG-WARN][15] ([i915#402])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11816/fi-tgl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@a-edp1.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-tgl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@a-edp1.html

  * igt@kms_force_connector_basic@force-connector-state:
- fi-icl-u2:  NOTRUN -> [WARN][16] ([i915#6008])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-icl-u2/igt@kms_force_connector_ba...@force-connector-state.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2:  NOTRUN -> [SKIP][17] ([fdo#109285])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-icl-u2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#1072]) +3 
similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-icl-u2:  NOTRUN -> [SKIP][19] ([i915#3555])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105660v1/fi-icl-u2/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-userptr:
- fi-icl-u2:  

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: wait on timeout before retry

[Patchwork]

== Series Details ==

Series: drm/i915/dp: wait on timeout before retry
URL   : https://patchwork.freedesktop.org/series/105660/
State : warning

== Summary ==

Error: dim checkpatch failed
642e16d10d1e drm/i915/dp: wait on timeout before retry
-:9: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ 
chars of sha1> ("")' - ie: 'commit 74ebf294a1dd ("drm/i915: Add a 
delay in Displayport AUX transactions for compliance testing")'
#9: 
74ebf294a1dd816bdc248ac733009a8915d59eb5

total: 1 errors, 0 warnings, 0 checks, 15 lines checked

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: tweak the ordering in cpu_write_needs_clflush

[Patchwork]

== Series Details ==

Series: drm/i915: tweak the ordering in cpu_write_needs_clflush
URL   : https://patchwork.freedesktop.org/series/105503/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_105503v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105503v1_full:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-512x170:
- {shard-dg1}:NOTRUN -> [SKIP][1] +7 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-dg1-16/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-512x170.html

  
Known issues


  Here are the changes found in Patchwork_105503v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@hang:
- shard-skl:  NOTRUN -> [SKIP][2] ([fdo#109271]) +230 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-skl4/igt@gem_ctx_persiste...@hang.html

  * igt@gem_exec_balancer@parallel-balancer:
- shard-iclb: [PASS][3] -> [SKIP][4] ([i915#4525])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-iclb4/igt@gem_exec_balan...@parallel-balancer.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-iclb3/igt@gem_exec_balan...@parallel-balancer.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk:  [PASS][5] -> [FAIL][6] ([i915#2842])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-glk8/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-glk2/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl:  [PASS][7] -> [FAIL][8] ([i915#2842]) +2 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs1.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-tglb: [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-tglb5/igt@gem_exec_fair@basic-pace-s...@rcs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-tglb2/igt@gem_exec_fair@basic-pace-s...@rcs0.html

  * igt@gem_exec_suspend@basic-s3@smem:
- shard-skl:  [PASS][11] -> [INCOMPLETE][12] ([i915#4939])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-skl4/igt@gem_exec_suspend@basic...@smem.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-skl1/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
- shard-apl:  NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-apl8/igt@gem_lmem_swapp...@heavy-verify-multi.html
- shard-tglb: NOTRUN -> [SKIP][14] ([i915#4613])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-tglb5/igt@gem_lmem_swapp...@heavy-verify-multi.html

  * igt@gem_lmem_swapping@smem-oom:
- shard-skl:  NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613]) +2 
similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-skl6/igt@gem_lmem_swapp...@smem-oom.html

  * igt@gem_lmem_swapping@verify-random:
- shard-kbl:  NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-kbl4/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_pread@exhaustion:
- shard-kbl:  NOTRUN -> [WARN][17] ([i915#2658])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-kbl1/igt@gem_pr...@exhaustion.html

  * igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#4270])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-tglb5/igt@gem_...@regular-baseline-src-copy-readible.html

  * igt@gem_softpin@evict-snoop-interruptible:
- shard-iclb: NOTRUN -> [SKIP][19] ([fdo#109312])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-iclb4/igt@gem_soft...@evict-snoop-interruptible.html

  * igt@gen7_exec_parse@chained-batch:
- shard-tglb: NOTRUN -> [SKIP][20] ([fdo#109289])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-tglb5/igt@gen7_exec_pa

[Intel-gfx] [PATCH] drm/i915/guc/slpc: Add a new SLPC selftest

[Vinay Belgaumkar]

This test will validate we can achieve actual frequency of RP0. Pcode
grants frequencies based on what GuC is requesting. However, thermal
throttling can limit what is being granted. Add a test to request for
max, but don't fail the test if RP0 is not granted due to throttle
reasons.

Also optimize the selftest by using a common run_test function to avoid
code duplication. Rename the "clamp" tests to vary_max_freq and
vary_min_freq.

v2: Fix compile warning
v3: Review comments (Ashutosh). Added a FIXME for the media RP0 case.
v4: Checkpatch (strict) fixes, remove FIXME and other comments (Ashutosh)

Fixes commit 8ee2c227822e ("drm/i915/guc/slpc: Add SLPC selftest")

Cc: Ashutosh Dixit 
Signed-off-by: Vinay Belgaumkar 
---
 drivers/gpu/drm/i915/gt/selftest_slpc.c | 323 
 1 file changed, 155 insertions(+), 168 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c 
b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index b768cea5943d..ac29691e0b1a 100644
--- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
@@ -8,6 +8,11 @@
 #define delay_for_h2g() usleep_range(H2G_DELAY, H2G_DELAY + 1)
 #define FREQUENCY_REQ_UNIT DIV_ROUND_CLOSEST(GT_FREQUENCY_MULTIPLIER, \
  GEN9_FREQ_SCALER)
+enum test_type {
+   VARY_MIN,
+   VARY_MAX,
+   MAX_GRANTED
+};
 
 static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
 {
@@ -36,147 +41,114 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, 
u32 freq)
return ret;
 }
 
-static int live_slpc_clamp_min(void *arg)
+static int vary_max_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
+u32 *max_act_freq)
 {
-   struct drm_i915_private *i915 = arg;
-   struct intel_gt *gt = to_gt(i915);
-   struct intel_guc_slpc *slpc = >->uc.guc.slpc;
-   struct intel_rps *rps = >->rps;
-   struct intel_engine_cs *engine;
-   enum intel_engine_id id;
-   struct igt_spinner spin;
-   u32 slpc_min_freq, slpc_max_freq;
+   u32 step, max_freq, req_freq;
+   u32 act_freq;
int err = 0;
 
-   if (!intel_uc_uses_guc_slpc(>->uc))
-   return 0;
+   /* Go from max to min in 5 steps */
+   step = (slpc->rp0_freq - slpc->min_freq) / NUM_STEPS;
+   *max_act_freq = slpc->min_freq;
+   for (max_freq = slpc->rp0_freq; max_freq > slpc->min_freq;
+   max_freq -= step) {
+   err = slpc_set_max_freq(slpc, max_freq);
+   if (err)
+   break;
 
-   if (igt_spinner_init(&spin, gt))
-   return -ENOMEM;
+   req_freq = intel_rps_read_punit_req_frequency(rps);
 
-   if (intel_guc_slpc_get_max_freq(slpc, &slpc_max_freq)) {
-   pr_err("Could not get SLPC max freq\n");
-   return -EIO;
-   }
+   /* GuC requests freq in multiples of 50/3 MHz */
+   if (req_freq > (max_freq + FREQUENCY_REQ_UNIT)) {
+   pr_err("SWReq is %d, should be at most %d\n", req_freq,
+  max_freq + FREQUENCY_REQ_UNIT);
+   err = -EINVAL;
+   }
 
-   if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) {
-   pr_err("Could not get SLPC min freq\n");
-   return -EIO;
-   }
+   act_freq =  intel_rps_read_actual_frequency(rps);
+   if (act_freq > *max_act_freq)
+   *max_act_freq = act_freq;
 
-   if (slpc_min_freq == slpc_max_freq) {
-   pr_err("Min/Max are fused to the same value\n");
-   return -EINVAL;
+   if (err)
+   break;
}
 
-   intel_gt_pm_wait_for_idle(gt);
-   intel_gt_pm_get(gt);
-   for_each_engine(engine, gt, id) {
-   struct i915_request *rq;
-   u32 step, min_freq, req_freq;
-   u32 act_freq, max_act_freq;
+   return err;
+}
 
-   if (!intel_engine_can_store_dword(engine))
-   continue;
+static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
+u32 *max_act_freq)
+{
+   u32 step, min_freq, req_freq;
+   u32 act_freq;
+   int err = 0;
 
-   /* Go from min to max in 5 steps */
-   step = (slpc_max_freq - slpc_min_freq) / NUM_STEPS;
-   max_act_freq = slpc_min_freq;
-   for (min_freq = slpc_min_freq; min_freq < slpc_max_freq;
-   min_freq += step) {
-   err = slpc_set_min_freq(slpc, min_freq);
-   if (err)
-   break;
-
-   st_engine_heartbeat_disable(engine);
-
-   rq = igt_spinner_create_request(&spin,
-   engine->kernel_context,

Re: [Intel-gfx] [PATCH] drm/i915/guc/slpc: Add a new SLPC selftest

[Belgaumkar, Vinay]

On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:

On Thu, 23 Jun 2022 16:33:20 -0700, Vinay Belgaumkar wrote:

+static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps 
*rps, u32 *max_act_freq)
+{
+   struct intel_gt *gt = rps_to_gt(rps);
+   u32 perf_limit_reasons;
+   int err = 0;

-   igt_spinner_end(&spin);
-   st_engine_heartbeat_enable(engine);
-   }
+   err = slpc_set_min_freq(slpc, slpc->rp0_freq);
+   if (err)
+   return err;

-   pr_info("Max actual frequency for %s was %d\n",
-   engine->name, max_act_freq);
+   *max_act_freq =  intel_rps_read_actual_frequency(rps);
+   if (!(*max_act_freq == slpc->rp0_freq)) {

nit but '*max_act_freq != slpc->rp0_freq'



+   /* Check if there was some throttling by pcode */
+   perf_limit_reasons = intel_uncore_read(gt->uncore, 
GT0_PERF_LIMIT_REASONS);

-   /* Actual frequency should rise above min */
-   if (max_act_freq == slpc_min_freq) {
-   pr_err("Actual freq did not rise above min\n");
+   /* If not, this is an error */
+   if (!(perf_limit_reasons && GT0_PERF_LIMIT_REASONS_MASK)) {

Still wrong, should be & not &&


+   pr_err("Pcode did not grant max freq\n");
err = -EINVAL;
-   }
+   } else {
+   pr_info("Pcode throttled frequency 0x%x\n", 
perf_limit_reasons);

Another question, why are we using pr_err/info here rather than
drm_err/info? pr_err/info is ok for mock selftests since there is no drm
device but that is not the case here, I think this is done in other
selftests too but maybe fix this as well if we are making so many changes
here? Anyway can do later too.


Yup, will send a separate patch to change them to drm_err/info.

Thanks,

Vinay.



So let's settle issues in v2 thread first.

Thanks.
--
Ashutosh

Re: [Intel-gfx] [PATCH] drm/i915/guc/slpc: Add a new SLPC selftest

[Belgaumkar, Vinay]

On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:

On Thu, 23 Jun 2022 16:21:46 -0700, Belgaumkar, Vinay wrote:

On 6/22/2022 1:32 PM, Dixit, Ashutosh wrote:

On Fri, 10 Jun 2022 16:47:12 -0700, Vinay Belgaumkar wrote:

This test will validate we can achieve actual frequency of RP0. Pcode
grants frequencies based on what GuC is requesting. However, thermal
throttling can limit what is being granted. Add a test to request for
max, but don't fail the test if RP0 is not granted due to throttle
reasons.

Also optimize the selftest by using a common run_test function to avoid
code duplication.

The refactoring does change the order of operations (changing the freq vs
spawning the spinner) but should be fine I think.

Yes, we now start the spinner outside the for loop, so that freq changes
occur quickly. This ensures we don't mess with SLPC algorithm's history by
frequently restarting the WL in the for loop.

Rename the "clamp" tests to vary_max_freq and vary_min_freq.

Either is ok, but maybe "clamp" names were ok I think since they verify req
freq is clamped at min/max.

True, though clamp usually is associated with limiting, whereas we actually
increase the min.

v2: Fix compile warning

Fixes 8ee2c227822e ("drm/i915/guc/slpc: Add SLPC selftest")
Signed-off-by: Vinay Belgaumkar 
---
   drivers/gpu/drm/i915/gt/selftest_slpc.c | 323 
   1 file changed, 158 insertions(+), 165 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c 
b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index b768cea5943d..099129aae9a5 100644
--- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
@@ -8,6 +8,11 @@
   #define delay_for_h2g() usleep_range(H2G_DELAY, H2G_DELAY + 1)
   #define FREQUENCY_REQ_UNIT   DIV_ROUND_CLOSEST(GT_FREQUENCY_MULTIPLIER, \
  GEN9_FREQ_SCALER)
+enum test_type {
+   VARY_MIN,
+   VARY_MAX,
+   MAX_GRANTED
+};

   static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
   {
@@ -36,147 +41,120 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, 
u32 freq)
return ret;
   }

-static int live_slpc_clamp_min(void *arg)
+static int vary_max_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
+ u32 *max_act_freq)

Please run checkpatch, indentation seems off.

I had run it. Not sure why this wasn't caught.

Need to use 'checkpatch --strict'.

ok.



   {
-   struct drm_i915_private *i915 = arg;
-   struct intel_gt *gt = to_gt(i915);
-   struct intel_guc_slpc *slpc = >->uc.guc.slpc;
-   struct intel_rps *rps = >->rps;
-   struct intel_engine_cs *engine;
-   enum intel_engine_id id;
-   struct igt_spinner spin;
+   u32 step, max_freq, req_freq;
+   u32 act_freq;
u32 slpc_min_freq, slpc_max_freq;
int err = 0;

-   if (!intel_uc_uses_guc_slpc(>->uc))
-   return 0;
-
-   if (igt_spinner_init(&spin, gt))
-   return -ENOMEM;
+   slpc_min_freq = slpc->min_freq;
+   slpc_max_freq = slpc->rp0_freq;

nit but we don't really need such variables since we don't change their
values, we should just use slpc->min_freq, slpc->rp0_freq directly. I'd
change this in all places in this patch.

I will remove it from the sub-functions, but will need to keep the one in
the main run_test(). We should query SLPC's min and max and then restore
that at the end of the test. It is possible that SLPC's min is different
from platform min for certain skus.

Sorry, I am not following. The tests are varying freq between platform min
to platform max correct? And platform min can be different from slpc min?
So why don't the tests start at slpc min rather than platform min? Can't
this return error?
Will start the tests from platform min -> platform max, that way we 
remain consistent.


And shouldn't slpc->min set to the real slpc min rather than to the
platform min when slpc initializes (in intel_guc_slpc_enable() or
slpc_get_rp_values())? (I am assuming the issue is only for the min and not
the max but not sure).
Certain conditions may result in SLPC setting the min to a different 
value. We can worry about that in a different patch.


So I'd expect everywhere a consistent set of freq's be used, in run_test()
and the actual vary_min/max_freq tests and also in the main driver.

Agree.



-   if (intel_guc_slpc_get_max_freq(slpc, &slpc_max_freq)) {
-   pr_err("Could not get SLPC max freq\n");
-   return -EIO;
-   }
-
-   if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) {
-   pr_err("Could not get SLPC min freq\n");
-   return -EIO;

Why do we need these two function calls? Can't we just use slpc->rp0_freq
and slpc->min_freq as we are doing in the vary_min/max_freq() functions
above?

Same as above.

Also, as mentioned below I think here we should just do:

  slpc_set_max_freq(slpc, slpc->rp0_freq);
  slpc_set

Re: [Intel-gfx] [PATCH] drm/i915/guc/slpc: Add a new SLPC selftest

[Belgaumkar, Vinay]

On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:

On Thu, 23 Jun 2022 16:33:20 -0700, Vinay Belgaumkar wrote:

+static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps 
*rps, u32 *max_act_freq)
+{
+   struct intel_gt *gt = rps_to_gt(rps);
+   u32 perf_limit_reasons;
+   int err = 0;

-   igt_spinner_end(&spin);
-   st_engine_heartbeat_enable(engine);
-   }
+   err = slpc_set_min_freq(slpc, slpc->rp0_freq);
+   if (err)
+   return err;

-   pr_info("Max actual frequency for %s was %d\n",
-   engine->name, max_act_freq);
+   *max_act_freq =  intel_rps_read_actual_frequency(rps);
+   if (!(*max_act_freq == slpc->rp0_freq)) {

nit but '*max_act_freq != slpc->rp0_freq'

ok.




+   /* Check if there was some throttling by pcode */
+   perf_limit_reasons = intel_uncore_read(gt->uncore, 
GT0_PERF_LIMIT_REASONS);

-   /* Actual frequency should rise above min */
-   if (max_act_freq == slpc_min_freq) {
-   pr_err("Actual freq did not rise above min\n");
+   /* If not, this is an error */
+   if (!(perf_limit_reasons && GT0_PERF_LIMIT_REASONS_MASK)) {

Still wrong, should be & not &&

yup, third time's the charm.



+   pr_err("Pcode did not grant max freq\n");
err = -EINVAL;
-   }
+   } else {
+   pr_info("Pcode throttled frequency 0x%x\n", 
perf_limit_reasons);

Another question, why are we using pr_err/info here rather than
drm_err/info? pr_err/info is ok for mock selftests since there is no drm
device but that is not the case here, I think this is done in other
selftests too but maybe fix this as well if we are making so many changes
here? Anyway can do later too.

So let's settle issues in v2 thread first.


Thanks,

Vinay.



Thanks.
--
Ashutosh

[Intel-gfx] [CI 2/2] iosys-map: Add per-word write

[Lucas De Marchi]

Like was done for read, provide the equivalent for write. Even if
current users are not in the hot path, this should future-proof it.

v2:
  - Remove default from _Generic() - callers wanting to write more
than u64 should use iosys_map_memcpy_to()
  - Add WRITE_ONCE() cases dereferencing the pointer when using system
memory

Signed-off-by: Lucas De Marchi 
Reviewed-by: Reviewed-by: Christian König  # v1
Reviewed-by: Thomas Zimmermann 
---
 include/linux/iosys-map.h | 42 ++-
 1 file changed, 33 insertions(+), 9 deletions(-)

diff --git a/include/linux/iosys-map.h b/include/linux/iosys-map.h
index ec81ed995c59..9ed976bc5822 100644
--- a/include/linux/iosys-map.h
+++ b/include/linux/iosys-map.h
@@ -337,9 +337,13 @@ static inline void iosys_map_memset(struct iosys_map *dst, 
size_t offset,
 #ifdef CONFIG_64BIT
 #define __iosys_map_rd_io_u64_case(val_, vaddr_iomem_) 
\
u64: val_ = readq(vaddr_iomem_)
+#define __iosys_map_wr_io_u64_case(val_, vaddr_iomem_) 
\
+   u64: writeq(val_, vaddr_iomem_)
 #else
 #define __iosys_map_rd_io_u64_case(val_, vaddr_iomem_) 
\
u64: memcpy_fromio(&(val_), vaddr_iomem_, sizeof(u64))
+#define __iosys_map_wr_io_u64_case(val_, vaddr_iomem_) 
\
+   u64: memcpy_toio(vaddr_iomem_, &(val_), sizeof(u64))
 #endif
 
 #define __iosys_map_rd_io(val__, vaddr_iomem__, type__) _Generic(val__,
\
@@ -354,6 +358,19 @@ static inline void iosys_map_memset(struct iosys_map *dst, 
size_t offset,
val__ = READ_ONCE(*((type__ *)vaddr__));
\
 })
 
+#define __iosys_map_wr_io(val__, vaddr_iomem__, type__) _Generic(val__,
\
+   u8: writeb(val__, vaddr_iomem__),   
\
+   u16: writew(val__, vaddr_iomem__),  
\
+   u32: writel(val__, vaddr_iomem__),  
\
+   __iosys_map_wr_io_u64_case(val__, vaddr_iomem__))
+
+#define __iosys_map_wr_sys(val__, vaddr__, type__) ({  
\
+   compiletime_assert(sizeof(type__) <= sizeof(u64),   
\
+  "Unsupported access size for __iosys_map_wr_sys()"); 
\
+   WRITE_ONCE(*((type__ *)vaddr__), val__);
\
+})
+
+
 /**
  * iosys_map_rd - Read a C-type value from the iosys_map
  *
@@ -386,12 +403,17 @@ static inline void iosys_map_memset(struct iosys_map 
*dst, size_t offset,
  * @type__:Type of the value being written
  * @val__: Value to write
  *
- * Write a C-type value to the iosys_map, handling possible un-aligned accesses
- * to the mapping.
+ * Write a C type value (u8, u16, u32 and u64) to the iosys_map. For other 
types
+ * or if pointer may be unaligned (and problematic for the architecture
+ * supported), use iosys_map_memcpy_to()
  */
-#define iosys_map_wr(map__, offset__, type__, val__) ({
\
-   type__ val = (val__);   \
-   iosys_map_memcpy_to(map__, offset__, &val, sizeof(val));\
+#define iosys_map_wr(map__, offset__, type__, val__) ({
\
+   type__ val = (val__);   
\
+   if ((map__)->is_iomem) {
\
+   __iosys_map_wr_io(val, (map__)->vaddr_iomem + (offset__), 
type__);\
+   } else {
\
+   __iosys_map_wr_sys(val, (map__)->vaddr + (offset__), type__);   
\
+   }   
\
 })
 
 /**
@@ -472,10 +494,12 @@ static inline void iosys_map_memset(struct iosys_map 
*dst, size_t offset,
  * @field__:   Member of the struct to read
  * @val__: Value to write
  *
- * Write a value to the iosys_map considering its layout is described by a C 
struct
- * starting at @struct_offset__. The field offset and size is calculated and 
the
- * @val__ is written handling possible un-aligned memory accesses. Refer to
- * iosys_map_rd_field() for expected usage and memory layout.
+ * Write a value to the iosys_map considering its layout is described by a C
+ * struct starting at @struct_offset__. The field offset and size is calculated
+ * and the @val__ is written. If the field access would incur in un-aligned
+ * access, then either iosys_map_memcpy_to() needs to be used or the
+ * architecture must support it. Refer to iosys_map_rd_field() for expected
+ * usage and memory layout.
  */
 #define iosys_map_wr_field(map__, struct_offset__, struct_type__, field__, 
val__) ({   \
struct_type__ *s;   
\
-- 
2.36.1

[Intel-gfx] [CI 1/2] iosys-map: Add per-word read

[Lucas De Marchi]

Instead of always falling back to memcpy_fromio() for any size, prefer
using read{b,w,l}(). When reading struct members it's common to read
individual integer variables individually. Going through memcpy_fromio()
for each of them poses a high penalty.

Employ a similar trick as __seqprop() by using _Generic() to generate
only the specific call based on a type-compatible variable.

For a pariticular i915 workload producing GPU context switches,
__get_engine_usage_record() is particularly hot since the engine usage
is read from device local memory with dgfx, possibly multiple times
since it's racy. Test execution time for this test shows a ~12.5%
improvement with DG2:

Before:
nrepeats = 1000; min = 7.63243e+06; max = 1.01817e+07;
median = 9.52548e+06; var = 526149;
After:
nrepeats = 1000; min = 7.03402e+06; max = 8.8832e+06;
median = 8.33955e+06; var = 333113;

Other things attempted that didn't prove very useful:
1) Change the _Generic() on x86 to just dereference the memory address
2) Change __get_engine_usage_record() to do just 1 read per loop,
   comparing with the previous value read
3) Change __get_engine_usage_record() to access the fields directly as it
   was before the conversion to iosys-map

(3) did gave a small improvement (~3%), but doesn't seem to scale well
to other similar cases in the driver.

Additional test by Chris Wilson using gem_create from igt with some
changes to track object creation time. This happens to accidentally
stress this code path:

Pre iosys_map conversion of engine busyness:
lmem0: Creating262144 4KiB objects took 59274.2ms

Unpatched:
lmem0: Creating262144 4KiB objects took 108830.2ms

With readl (this patch):
lmem0: Creating262144 4KiB objects took 61348.6ms

s/readl/READ_ONCE/
lmem0: Creating262144 4KiB objects took 61333.2ms

So we do take a little bit more time than before the conversion, but
that is due to other factors: bringing the READ_ONCE back would be as
good as just doing this conversion.

v2:
- Remove default from _Generic() - callers wanting to read more
  than u64 should use iosys_map_memcpy_from()
- Add READ_ONCE() cases dereferencing the pointer when using system
  memory

Signed-off-by: Lucas De Marchi 
Reviewed-by: Christian König  # v1
Reviewed-by: Thomas Zimmermann 
---
 include/linux/iosys-map.h | 45 +++
 1 file changed, 36 insertions(+), 9 deletions(-)

diff --git a/include/linux/iosys-map.h b/include/linux/iosys-map.h
index 4b8406ee8bc4..ec81ed995c59 100644
--- a/include/linux/iosys-map.h
+++ b/include/linux/iosys-map.h
@@ -6,6 +6,7 @@
 #ifndef __IOSYS_MAP_H__
 #define __IOSYS_MAP_H__
 
+#include 
 #include 
 #include 
 
@@ -333,6 +334,26 @@ static inline void iosys_map_memset(struct iosys_map *dst, 
size_t offset,
memset(dst->vaddr + offset, value, len);
 }
 
+#ifdef CONFIG_64BIT
+#define __iosys_map_rd_io_u64_case(val_, vaddr_iomem_) 
\
+   u64: val_ = readq(vaddr_iomem_)
+#else
+#define __iosys_map_rd_io_u64_case(val_, vaddr_iomem_) 
\
+   u64: memcpy_fromio(&(val_), vaddr_iomem_, sizeof(u64))
+#endif
+
+#define __iosys_map_rd_io(val__, vaddr_iomem__, type__) _Generic(val__,
\
+   u8: val__ = readb(vaddr_iomem__),   
\
+   u16: val__ = readw(vaddr_iomem__),  
\
+   u32: val__ = readl(vaddr_iomem__),  
\
+   __iosys_map_rd_io_u64_case(val__, vaddr_iomem__))
+
+#define __iosys_map_rd_sys(val__, vaddr__, type__) ({  
\
+   compiletime_assert(sizeof(type__) <= sizeof(u64),   
\
+  "Unsupported access size for __iosys_map_rd_sys()"); 
\
+   val__ = READ_ONCE(*((type__ *)vaddr__));
\
+})
+
 /**
  * iosys_map_rd - Read a C-type value from the iosys_map
  *
@@ -340,16 +361,21 @@ static inline void iosys_map_memset(struct iosys_map 
*dst, size_t offset,
  * @offset__:  The offset from which to read
  * @type__:Type of the value being read
  *
- * Read a C type value from iosys_map, handling possible un-aligned accesses to
- * the mapping.
+ * Read a C type value (u8, u16, u32 and u64) from iosys_map. For other types 
or
+ * if pointer may be unaligned (and problematic for the architecture 
supported),
+ * use iosys_map_memcpy_from().
  *
  * Returns:
  * The value read from the mapping.
  */
-#define iosys_map_rd(map__, offset__, type__) ({   \
-   type__ val; \
-   iosys_map_memcpy_from(&val, map__, offset__, sizeof(val));  \
-   val;\
+#define iosys_map_rd(map__, offset__, type__) ({   
\
+   type__ val; 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: stop HPD workers before display driver unregister

[Andrzej Hajda]

On 27.06.2022 18:00, Patchwork wrote:

*Patch Details*
*Series:*	drm/i915/display: stop HPD workers before display driver 
unregister
*URL:*	https://patchwork.freedesktop.org/series/105557/ 


*State:*failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v1/index.html 




  CI Bug Log - changes from CI_DRM_11799_full -> Patchwork_105557v1_full


Summary

*FAILURE*

Serious unknown changes coming with Patchwork_105557v1_full absolutely 
need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_105557v1_full, please notify your bug team to 
allow them

to document this new failure mode, which will reduce false positives in CI.


Participating hosts (13 -> 13)

No changes in participating hosts


Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_105557v1_full:



  IGT changes


Possible regressions

  *

{igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10} (NEW):

  o {shard-dg1}: NOTRUN -> SKIP


+15 similar issues
  *

igt@kms_cursor_legacy@torture-move@all-pipes:

  o shard-glk: PASS


-> INCOMPLETE





These does not seem to be related, they do not touch driver remove path.

Regards
Andrzej





Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *

{igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:

  o {shard-dg1}: NOTRUN -> SKIP


+15 similar issues
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-edp-1-32x32:

  o {shard-rkl}: NOTRUN -> SKIP


+3 similar issues


New tests

New tests have been introduced between CI_DRM_11799_full and 
Patchwork_105557v1_full:



  New IGT tests (43)

  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x128:

  o Statuses : 1 pass(s)
  o Exec time: [0.25] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x42:

  o Statuses : 1 pass(s)
  o Exec time: [0.26] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x256:

  o Statuses : 1 pass(s)
  o Exec time: [0.25] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x85:

  o Statuses : 1 pass(s)
  o Exec time: [0.25] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10:

  o Statuses : 1 skip(s)
  o Exec time: [0.01] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x32:

  o Statuses : 1 skip(s)
  o Exec time: [0.01] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x170:

  o Statuses : 1 skip(s)
  o Exec time: [0.0] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x512:

  o Statuses : 1 skip(s)
  o Exec time: [0.0] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x21:

  o Statuses : 1 pass(s)
  o Exec time: [0.25] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x64:

  o Statuses : 1 pass(s)
  o Exec time: [0.29] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x128:

  o Statuses : 1 pass(s)
  o Exec time: [0.23] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x42:

  o Statuses : 1 pass(s)
  o Exec time: [0.23] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x256:

  o Statuses : 1 pass(s)
  o Exec time: [0.24] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x85:

  o Statuses : 1 pass(s)
  o Exec time: [0.23] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x10:

  o Statuses : 1 skip(s)
  o Exec time: [0.01] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x32:

  o Statuses : 1 skip(s)
  o Exec time: [0.01] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-512x170:

  o Statuses : 1 skip(s)
  o Exec time: [0.0] s
  *

igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-512x512:

Re: [Intel-gfx] [PATCH][next] treewide: uapi: Replace zero-length arrays with flexible-array members

[Dan Williams]

Gustavo A. R. Silva wrote:
> There is a regular need in the kernel to provide a way to declare
> having a dynamically sized set of trailing elements in a structure.
> Kernel code should always use “flexible array members”[1] for these
> cases. The older style of one-element or zero-length arrays should
> no longer be used[2].
> 
> This code was transformed with the help of Coccinelle:
> (linux-5.19-rc2$ spatch --jobs $(getconf _NPROCESSORS_ONLN) --sp-file 
> script.cocci --include-headers --dir . > output.patch)
> 
> @@
> identifier S, member, array;
> type T1, T2;
> @@
> 
> struct S {
>   ...
>   T1 member;
>   T2 array[
> - 0
>   ];
> };
> 
> -fstrict-flex-arrays=3 is coming and we need to land these changes
> to prevent issues like these in the short future:
> 
> ../fs/minix/dir.c:337:3: warning: 'strcpy' will always overflow; destination 
> buffer has size 0,
> but the source string has length 2 (including NUL byte) [-Wfortify-source]
>   strcpy(de3->name, ".");
>   ^
> 
> Since these are all [0] to [] changes, the risk to UAPI is nearly zero. If
> this breaks anything, we can use a union with a new member name.
> 
> [1] https://en.wikipedia.org/wiki/Flexible_array_member
> [2] 
> https://www.kernel.org/doc/html/v5.16/process/deprecated.html#zero-length-and-one-element-arrays
> 
> Link: https://github.com/KSPP/linux/issues/78
> Build-tested-by: 
> https://lore.kernel.org/lkml/62b675ec.wkx6aoz6cbe71vtf%25...@intel.com/
> Signed-off-by: Gustavo A. R. Silva 
> ---
> Hi all!
> 
> JFYI: I'm adding this to my -next tree. :)
> 
[..]
>  include/uapi/linux/ndctl.h| 10 +--

For ndctl.h

Acked-by: Dan Williams 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/doc/rfc: i915 VM_BIND feature design + uapi

[Patchwork]

== Series Details ==

Series: drm/doc/rfc: i915 VM_BIND feature design + uapi
URL   : https://patchwork.freedesktop.org/series/105635/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11805_full -> Patchwork_105635v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105635v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105635v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105635v1_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_reloc@basic-cpu-read-active:
- shard-tglb: [PASS][1] -> [SKIP][2] +4 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-tglb3/igt@gem_exec_re...@basic-cpu-read-active.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105635v1/shard-tglb2/igt@gem_exec_re...@basic-cpu-read-active.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-tglb: [PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-tglb3/igt@kms_big...@x-tiled-32bpp-rotate-180.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105635v1/shard-tglb2/igt@kms_big...@x-tiled-32bpp-rotate-180.html

  * igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
- shard-skl:  [PASS][5] -> [FAIL][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-skl10/igt@kms_cursor_legacy@flip-vs-cur...@varying-size.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105635v1/shard-skl3/igt@kms_cursor_legacy@flip-vs-cur...@varying-size.html

  
 Warnings 

  * igt@gem_ccs@block-copy-inplace:
- shard-tglb: [SKIP][7] ([i915#3555] / [i915#5325]) -> [SKIP][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-tglb3/igt@gem_...@block-copy-inplace.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105635v1/shard-tglb2/igt@gem_...@block-copy-inplace.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_panel_fitting@legacy:
- {shard-dg1}:NOTRUN -> [SKIP][9]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105635v1/shard-dg1-15/igt@kms_panel_fitt...@legacy.html

  
Known issues


  Here are the changes found in Patchwork_105635v1_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-glk:  ([PASS][10], [PASS][11], [PASS][12], [PASS][13], 
[PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], 
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], 
[PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], 
[PASS][32], [PASS][33], [PASS][34]) -> ([PASS][35], [PASS][36], [PASS][37], 
[PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], 
[PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], 
[FAIL][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], 
[PASS][56], [PASS][57], [PASS][58], [PASS][59]) ([i915#4392])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk9/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk9/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk9/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk8/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk8/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk8/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk8/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk7/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk7/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk7/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk6/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk6/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk6/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk5/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk5/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk5/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11805/shard-glk3/boot.html

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Correct duplicated/misplaced GT register definitions

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Correct duplicated/misplaced GT 
register definitions
URL   : https://patchwork.freedesktop.org/series/105619/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11805_full -> Patchwork_105619v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105619v1_full:

### IGT changes ###

 Possible regressions 

  * {igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-32x32} (NEW):
- {shard-dg1}:NOTRUN -> [SKIP][1] +15 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105619v1/shard-dg1-18/igt@kms_cursor_crc@cursor-slid...@pipe-c-hdmi-a-3-32x32.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_panel_fitting@legacy:
- {shard-dg1}:NOTRUN -> [SKIP][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105619v1/shard-dg1-12/igt@kms_panel_fitt...@legacy.html

  
New tests
-

  New tests have been introduced between CI_DRM_11805_full and 
Patchwork_105619v1_full:

### New IGT tests (40) ###

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.52] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.47] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [5.47] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [5.46] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [5.46] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [5.59] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.52] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.49] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [5.61] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [5.48] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [5.50] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [5.50] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.40] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.44] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [5.54] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [5.60] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [5.47] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [5.46] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-d-hdmi-a-3-128x128:
- Statuses : 1 pass

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: i915: fix a possible refcount leak in intel_dp_add_mst_connector()

[Patchwork]

== Series Details ==

Series: drm: i915: fix a possible refcount leak in intel_dp_add_mst_connector()
URL   : https://patchwork.freedesktop.org/series/105601/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11803_full -> Patchwork_105601v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105601v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105601v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105601v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@cursor-vs-flip@legacy:
- shard-iclb: [PASS][1] -> [FAIL][2] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-iclb5/igt@kms_cursor_legacy@cursor-vs-f...@legacy.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105601v1/shard-iclb7/igt@kms_cursor_legacy@cursor-vs-f...@legacy.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-512x170:
- {shard-dg1}:NOTRUN -> [SKIP][3] +7 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105601v1/shard-dg1-16/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-512x170.html

  
Known issues


  Here are the changes found in Patchwork_105601v1_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-glk:  ([PASS][4], [PASS][5], [PASS][6], [PASS][7], 
[PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], 
[PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], 
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], 
[PASS][26], [PASS][27]) -> ([PASS][28], [PASS][29], [FAIL][30], [PASS][31], 
[PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], 
[PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], 
[PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], 
[PASS][50], [PASS][51], [PASS][52]) ([i915#4392])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk8/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk7/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk7/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk6/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk6/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk8/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk8/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk9/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk9/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk9/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk6/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk5/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk5/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk5/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk5/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk3/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk3/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk2/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk2/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk2/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk1/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk1/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk1/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/shard-glk7/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105601v1/shard-glk5/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105601v1/shard-glk3/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105601v1/shard-glk1/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105601v1/shard-glk1/boot.html
   [32]: 
https://intel-gfx-

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: fix subtraction overflow bug

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: fix subtraction overflow bug
URL   : https://patchwork.freedesktop.org/series/105597/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11803_full -> Patchwork_105597v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105597v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105597v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105597v1_full:

### IGT changes ###

 Possible regressions 

  * {igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10} (NEW):
- {shard-dg1}:NOTRUN -> [SKIP][1] +15 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105597v1/shard-dg1-18/igt@kms_cursor_crc@cursor-rapid-movem...@pipe-a-hdmi-a-3-32x10.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1:
- shard-kbl:  NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105597v1/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-1.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-512x170:
- {shard-dg1}:NOTRUN -> [SKIP][3] +7 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105597v1/shard-dg1-12/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-512x170.html

  
New tests
-

  New tests have been introduced between CI_DRM_11803_full and 
Patchwork_105597v1_full:

### New IGT tests (40) ###

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.26] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [0.26] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [0.29] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

Re: [Intel-gfx] [PATCH][next] treewide: uapi: Replace zero-length arrays with flexible-array members

[Stephen Hemminger]

On Mon, 27 Jun 2022 20:04:32 +0200
"Gustavo A. R. Silva"  wrote:

> There is a regular need in the kernel to provide a way to declare
> having a dynamically sized set of trailing elements in a structure.
> Kernel code should always use “flexible array members”[1] for these
> cases. The older style of one-element or zero-length arrays should
> no longer be used[2].
> 
> This code was transformed with the help of Coccinelle:
> (linux-5.19-rc2$ spatch --jobs $(getconf _NPROCESSORS_ONLN) --sp-file 
> script.cocci --include-headers --dir . > output.patch)
> 
> @@
> identifier S, member, array;
> type T1, T2;
> @@
> 
> struct S {
>   ...
>   T1 member;
>   T2 array[
> - 0
>   ];
> };
> 
> -fstrict-flex-arrays=3 is coming and we need to land these changes
> to prevent issues like these in the short future:
> 
> ../fs/minix/dir.c:337:3: warning: 'strcpy' will always overflow; destination 
> buffer has size 0,
> but the source string has length 2 (including NUL byte) [-Wfortify-source]
>   strcpy(de3->name, ".");
>   ^
> 
> Since these are all [0] to [] changes, the risk to UAPI is nearly zero. If
> this breaks anything, we can use a union with a new member name.
> 
> [1] https://en.wikipedia.org/wiki/Flexible_array_member
> [2] 
> https://www.kernel.org/doc/html/v5.16/process/deprecated.html#zero-length-and-one-element-arrays
> 
> Link: https://github.com/KSPP/linux/issues/78
> Build-tested-by: 
> https://lore.kernel.org/lkml/62b675ec.wkx6aoz6cbe71vtf%25...@intel.com/
> Signed-off-by: Gustavo A. R. Silva 

Thanks this fixes warning with gcc-12 in iproute2.
In function ‘xfrm_algo_parse’,
inlined from ‘xfrm_state_modify.constprop’ at xfrm_state.c:573:5:
xfrm_state.c:162:32: warning: writing 1 byte into a region of size 0 
[-Wstringop-overflow=]
  162 | buf[j] = val;
  | ~~~^

Re: [Intel-gfx] [PATCH v3 3/3] drm/doc/rfc: VM_BIND uapi definition

[Zeng, Oak]

Thanks,
Oak

> -Original Message-
> From: Tvrtko Ursulin 
> Sent: June 27, 2022 4:30 AM
> To: Zeng, Oak ; Landwerlin, Lionel G
> ; Vishwanathapura, Niranjana
> 
> Cc: Zanoni, Paulo R ; intel-
> g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Hellstrom,
> Thomas ; Wilson, Chris P
> ; Vetter, Daniel ;
> christian.koe...@amd.com; Auld, Matthew 
> Subject: Re: [Intel-gfx] [PATCH v3 3/3] drm/doc/rfc: VM_BIND uapi definition
> 
> 
> On 24/06/2022 21:23, Zeng, Oak wrote:
> > Let's compare "tlb invalidate at vm unbind" vs "tlb invalidate at backing
> storage":
> >
> > Correctness:
> > consider this sequence of:
> > 1. unbind va1 from pa1,
> > 2. then bind va1 to pa2. //user space has the freedom to do this as it
> > manages virtual address space 3. Submit shader code using va1, 4. Then
> > retire pa1.
> >
> > If you don't perform tlb invalidate at step #1, in step #3, shader will use
> stale entries in tlb and pa1 will be used for the shader. User want to use 
> pa2.
> So I don't think invalidate tlb at step #4 make correctness.
> 
> Define step 3. Is it a new execbuf? If so then there will be a TLB flush 
> there.
> Unless the plan is to stop doing that with eb3 but I haven't picked up on that
> anywhere so far.

In Niranjana's latest patch series, he removed the TLB flushing from vm_unbind. 
He also said explicitly TLB invalidation will be performed at job submission 
and backing storage releasing time, which is the existing behavior of the 
current i915 driver.

I think if we invalidate TLB on each vm_unbind, then we don't need to 
invalidate at submission and backing storage releasing. It doesn't make a lot 
of sense to me to perform a tlb invalidation at execbuf time. Maybe it is a 
behavior for the old implicit binding programming model. For vm_bind and eb3, 
we separate the binding and job submission into two APIs. It is more natural 
the TLB invalidation be coupled with the vm bind/unbind, not job submission. So 
in my opinion we should remove tlb invalidation from submission and backing 
storage releasing and add it to vm unbind. This is method is cleaner to me.

Regarding performance, we don't have data. In my opinion, we should make things 
work in a most straight forward way as the first step. Then consider 
performance improvement if necessary. Consider some delayed tlb invalidation at 
submission and backing release time without performance data support wasn't a 
good decision.

Regards,
Oak

> 
> > Performance:
> > It is straight forward to invalidate tlb at step 1. If platform support 
> > range
> based tlb invalidation, we can perform range based invalidation easily at
> step1.
> 
> If the platform supports range base yes. If it doesn't _and_ the flush at
> unbind is not needed for 99% of use cases then it is simply a waste.
> 
> > If you do it at step 4, you either need to perform a whole gt tlb 
> > invalidation
> (worse performance), or you need to record all the VAs that this pa has been
> bound to and invalidate all the VA ranges - ugly program.
> 
> Someone can setup some benchmarking? :)
> 
> Regards,
> 
> Tvrtko
> 
> >
> >
> > Thanks,
> > Oak
> >
> >> -Original Message-
> >> From: Tvrtko Ursulin 
> >> Sent: June 24, 2022 4:32 AM
> >> To: Zeng, Oak ; Landwerlin, Lionel G
> >> ; Vishwanathapura, Niranjana
> >> 
> >> Cc: Zanoni, Paulo R ; intel-
> >> g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
> >> Hellstrom, Thomas ; Wilson, Chris P
> >> ; Vetter, Daniel ;
> >> christian.koe...@amd.com; Auld, Matthew 
> >> Subject: Re: [Intel-gfx] [PATCH v3 3/3] drm/doc/rfc: VM_BIND uapi
> >> definition
> >>
> >>
> >> On 23/06/2022 22:05, Zeng, Oak wrote:
>  -Original Message-
>  From: Intel-gfx  On Behalf
>  Of Tvrtko Ursulin
>  Sent: June 23, 2022 7:06 AM
>  To: Landwerlin, Lionel G ;
>  Vishwanathapura, Niranjana 
>  Cc: Zanoni, Paulo R ;
>  intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>  Hellstrom, Thomas ; Wilson, Chris P
>  ; Vetter, Daniel
>  ; christian.koe...@amd.com; Auld,
> Matthew
>  
>  Subject: Re: [Intel-gfx] [PATCH v3 3/3] drm/doc/rfc: VM_BIND uapi
>  definition
> 
> 
>  On 23/06/2022 09:57, Lionel Landwerlin wrote:
> > On 23/06/2022 11:27, Tvrtko Ursulin wrote:
> >>>
> >>> After a vm_unbind, UMD can re-bind to same VA range against an
> >>> active VM.
> >>> Though I am not sue with Mesa usecase if that new mapping is
> >>> required for running GPU job or it will be for the next
> >>> submission. But ensuring the tlb flush upon unbind, KMD can
> >>> ensure correctness.
> >>
> >> Isn't that their problem? If they re-bind for submitting _new_
> >> work then they get the flush as part of batch buffer pre-amble.
> >
> > In the non sparse case, if a VA range is unbound, it is invalid to
> > use that range for anything until it has been rebound by something
> else.
> >
> > We'll take the fence

Re: [Intel-gfx] [PATCH][next] treewide: uapi: Replace zero-length arrays with flexible-array members

[Daniel Borkmann]

On 6/27/22 8:04 PM, Gustavo A. R. Silva wrote:

There is a regular need in the kernel to provide a way to declare
having a dynamically sized set of trailing elements in a structure.
Kernel code should always use “flexible array members”[1] for these
cases. The older style of one-element or zero-length arrays should
no longer be used[2].

This code was transformed with the help of Coccinelle:
(linux-5.19-rc2$ spatch --jobs $(getconf _NPROCESSORS_ONLN) --sp-file script.cocci 
--include-headers --dir . > output.patch)

@@
identifier S, member, array;
type T1, T2;
@@

struct S {
   ...
   T1 member;
   T2 array[
- 0
   ];
};

-fstrict-flex-arrays=3 is coming and we need to land these changes
to prevent issues like these in the short future:

../fs/minix/dir.c:337:3: warning: 'strcpy' will always overflow; destination 
buffer has size 0,
but the source string has length 2 (including NUL byte) [-Wfortify-source]
strcpy(de3->name, ".");
^

Since these are all [0] to [] changes, the risk to UAPI is nearly zero. If
this breaks anything, we can use a union with a new member name.

[1] https://en.wikipedia.org/wiki/Flexible_array_member
[2] 
https://www.kernel.org/doc/html/v5.16/process/deprecated.html#zero-length-and-one-element-arrays

Link: https://github.com/KSPP/linux/issues/78
Build-tested-by: 
https://lore.kernel.org/lkml/62b675ec.wkx6aoz6cbe71vtf%25...@intel.com/
Signed-off-by: Gustavo A. R. Silva 
---
Hi all!

JFYI: I'm adding this to my -next tree. :)


Fyi, this breaks BPF CI:

https://github.com/kernel-patches/bpf/runs/7078719372?check_suite_focus=true

  [...]
  progs/map_ptr_kern.c:314:26: error: field 'trie_key' with variable sized type 
'struct bpf_lpm_trie_key' not at the end of a struct or class is a GNU 
extension [-Werror,-Wgnu-variable-sized-type-not-at-end]
  struct bpf_lpm_trie_key trie_key;
  ^
  1 error generated.
  make: *** [Makefile:519: 
/tmp/runner/work/bpf/bpf/tools/testing/selftests/bpf/map_ptr_kern.o] Error 1
  make: *** Waiting for unfinished jobs
  Error: Process completed with exit code 2.

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix error code in icl_compute_combo_phy_dpll()

[Patchwork]

== Series Details ==

Series: drm/i915: Fix error code in icl_compute_combo_phy_dpll()
URL   : https://patchwork.freedesktop.org/series/105583/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11802_full -> Patchwork_105583v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105583v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105583v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105583v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1:
- shard-skl:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11802/shard-skl7/igt@kms_cursor_crc@cursor-susp...@pipe-a-edp-1.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-skl4/igt@kms_cursor_crc@cursor-susp...@pipe-a-edp-1.html

  
New tests
-

  New tests have been introduced between CI_DRM_11802_full and 
Patchwork_105583v1_full:

### New IGT tests (7) ###

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.29] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.17] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.16] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.15] s

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [3.22] s

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [3.22] s

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [3.28] s

  

Known issues


  Here are the changes found in Patchwork_105583v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl:  [PASS][3] -> [FAIL][4] ([i915#2842])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11802/shard-apl2/igt@gem_exec_fair@basic-none-s...@rcs0.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-apl4/igt@gem_exec_fair@basic-none-s...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-glk:  [PASS][5] -> [FAIL][6] ([i915#2842])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11802/shard-glk5/igt@gem_exec_fair@basic-n...@vcs0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-glk3/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl:  NOTRUN -> [FAIL][7] ([i915#2842]) +1 similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl:  [PASS][8] -> [FAIL][9] ([i915#2842]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11802/shard-kbl7/igt@gem_exec_fair@basic-p...@vecs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-kbl1/igt@gem_exec_fair@basic-p...@vecs0.html

  * igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][10] -> [SKIP][11] ([i915#2190])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11802/shard-tglb2/igt@gem_huc_c...@huc-copy.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-tglb6/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@heavy-verify-random:
- shard-kbl:  NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-kbl4/igt@gem_lmem_swapp...@heavy-verify-random.html

  * igt@gem_lmem_swapping@smem-oom:
- shard-skl:  NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613]) +2 
similar issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-skl4/igt@gem_lmem_swapp...@smem-oom.html

  * igt@gem_lmem_swapping@verify-random:
- shard-apl:  NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-apl2/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_pread@exhaustion:
- shard-kbl:  NOTRUN -> [WARN][15] ([i915#2658])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105583v1/shard-kbl1/ig

[Intel-gfx] [PATCH] drm/i915/gt: handle null ptr at sg traversing

[Ramalingam C]

When calculating the starting address for ccs data in smem scatterlist,
handle the NULL pointer returned from sg_next, incase of scatterlist
less than required size..

Signed-off-by: Ramalingam C 
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c 
b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 2c35324b5f68..c206fb4f4186 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -669,7 +669,7 @@ calculate_chunk_sz(struct drm_i915_private *i915, bool 
src_is_lmem,
}
 }
 
-static void get_ccs_sg_sgt(struct sgt_dma *it, u32 bytes_to_cpy)
+static int get_ccs_sg_sgt(struct sgt_dma *it, u32 bytes_to_cpy)
 {
u32 len;
 
@@ -684,9 +684,13 @@ static void get_ccs_sg_sgt(struct sgt_dma *it, u32 
bytes_to_cpy)
bytes_to_cpy -= len;
 
it->sg = __sg_next(it->sg);
+   if (!it->sg)
+   return -EINVAL;
it->dma = sg_dma_address(it->sg);
it->max = it->dma + sg_dma_len(it->sg);
} while (bytes_to_cpy);
+
+   return 0;
 }
 
 int
@@ -745,8 +749,11 @@ intel_context_migrate_copy(struct intel_context *ce,
 * Need to fix it.
 */
ccs_bytes_to_cpy = src_sz != dst_sz ? GET_CCS_BYTES(i915, 
bytes_to_cpy) : 0;
-   if (ccs_bytes_to_cpy)
-   get_ccs_sg_sgt(&it_ccs, bytes_to_cpy);
+   if (ccs_bytes_to_cpy) {
+   err = get_ccs_sg_sgt(&it_ccs, bytes_to_cpy);
+   if (err)
+   return err;
+   }
}
 
src_offset = 0;
-- 
2.20.1

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/doc/rfc: i915 VM_BIND feature design + uapi

[Patchwork]

== Series Details ==

Series: drm/doc/rfc: i915 VM_BIND feature design + uapi
URL   : https://patchwork.freedesktop.org/series/105577/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11802_full -> Patchwork_105577v1_full


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_105577v1_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105577v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105577v1_full:

### IGT changes ###

 Possible regressions 

  * {igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10} (NEW):
- {shard-dg1}:NOTRUN -> [SKIP][1] +15 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105577v1/shard-dg1-18/igt@kms_cursor_crc@cursor-rapid-movem...@pipe-a-hdmi-a-3-32x10.html

  
 Warnings 

  * igt@i915_pm_dc@dc6-psr:
- shard-skl:  [FAIL][2] ([i915#454]) -> [INCOMPLETE][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11802/shard-skl4/igt@i915_pm...@dc6-psr.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105577v1/shard-skl3/igt@i915_pm...@dc6-psr.html

  
New tests
-

  New tests have been introduced between CI_DRM_11802_full and 
Patchwork_105577v1_full:

### New IGT tests (43) ###

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [0.29] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
 

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Do not use reserved requests for virtual engines

[Ramalingam C]

On 2022-06-27 at 10:18:59 -0700, Matthew Brost wrote:
> On Wed, Jun 15, 2022 at 12:13:48AM +0530, Ramalingam C wrote:
> > Do not use reserved requests for virtual engines as this is only
> > needed for kernel contexts.
> > 
> > Signed-off-by: Ramalingam C 
> > Suggested-by: Matthew Brost 
> 
> With the patch squashed into the previous patch:
> Reviewed-by: Matthew Brost 
Thank you Matthew. I will squash them while merging.

Ram
> 
> > ---
> >  drivers/gpu/drm/i915/i915_request.c | 5 -
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_request.c 
> > b/drivers/gpu/drm/i915/i915_request.c
> > index c71905d8e154..f0392b053bca 100644
> > --- a/drivers/gpu/drm/i915/i915_request.c
> > +++ b/drivers/gpu/drm/i915/i915_request.c
> > @@ -135,6 +135,8 @@ static void i915_fence_release(struct dma_fence *fence)
> >  
> > /*
> >  * Keep one request on each engine for reserved use under mempressure
> > +* do not use with virtual engines as this really is only needed for
> > +* kernel contexts.
> >  *
> >  * We do not hold a reference to the engine here and so have to be
> >  * very careful in what rq->engine we poke. The virtual engine is
> > @@ -164,7 +166,8 @@ static void i915_fence_release(struct dma_fence *fence)
> >  * know that if the rq->execution_mask is a single bit, rq->engine
> >  * can be a physical engine with the exact corresponding mask.
> >  */
> > -   if (is_power_of_2(rq->execution_mask) &&
> > +   if (!intel_engine_is_virtual(rq->engine) &&
> > +   is_power_of_2(rq->execution_mask) &&
> > !cmpxchg(&rq->engine->request_pool, NULL, rq))
> > return;
> >  
> > -- 
> > 2.20.1
> > 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: tweak the ordering in cpu_write_needs_clflush

[Vudum, Lakshminarayana]

Issue is related to https://gitlab.freedesktop.org/drm/intel/-/issues/2346
igt@kms_cursor_legacy@flip-vs-cursor - fail - Failed assertion: 
kmstest_get_vblank(display->drm_fd, pipe, 0) == vblank_start|Failed assertion: 
kmstest_get_vblank(display->drm_fd, pipe, 0) <= vblank_start + 1

Thanks,
Lakshmi.
-Original Message-
From: Matthew Auld  
Sent: Monday, June 27, 2022 5:04 AM
To: Intel Graphics Development ; Vudum, 
Lakshminarayana 
Cc: Auld, Matthew 
Subject: Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: tweak the ordering 
in cpu_write_needs_clflush

On Mon, 27 Jun 2022 at 12:49, Patchwork
 wrote:
>
> Patch Details
> Series:drm/i915: tweak the ordering in cpu_write_needs_clflush 
> URL:https://patchwork.freedesktop.org/series/105503/
> State:failure
> Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/in
> dex.html
>
> CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_105503v1_full
>
> Summary
>
> FAILURE
>
> Serious unknown changes coming with Patchwork_105503v1_full absolutely 
> need to be verified manually.
>
> If you think the reported changes have nothing to do with the changes 
> introduced in Patchwork_105503v1_full, please notify your bug team to 
> allow them to document this new failure mode, which will reduce false 
> positives in CI.
>
> Participating hosts (13 -> 13)
>
> No changes in participating hosts
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in 
> Patchwork_105503v1_full:
>
> IGT changes
>
> Possible regressions
>
> igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
>
> shard-skl: NOTRUN -> FAIL +1 similar issue

For sure unrelated. Patch only impacts discrete.

>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
>
> {shard-dg1}: NOTRUN -> SKIP +15 similar issues
>
> igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-edp-1-32x32:
>
> {shard-rkl}: NOTRUN -> SKIP +3 similar issues
>
> New tests
>
> New tests have been introduced between CI_DRM_11795_full and 
> Patchwork_105503v1_full:
>
> New IGT tests (7)
>
> igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-128x128:
>
> Statuses : 1 pass(s)
> Exec time: [3.23] s
>
> igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-256x256:
>
> Statuses : 1 pass(s)
> Exec time: [3.23] s
>
> igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-64x64:
>
> Statuses : 1 pass(s)
> Exec time: [3.30] s
>
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-hdmi-a-3:
>
> Statuses : 1 pass(s)
> Exec time: [0.56] s
>
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-hdmi-a-3:
>
> Statuses : 1 pass(s)
> Exec time: [0.46] s
>
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-hdmi-a-3:
>
> Statuses : 1 pass(s)
> Exec time: [0.46] s
>
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-hdmi-a-3:
>
> Statuses : 1 pass(s)
> Exec time: [0.46] s
>
> Known issues
>
> Here are the changes found in Patchwork_105503v1_full that come from known 
> issues:
>
> IGT changes
>
> Issues hit
>
> igt@gem_ctx_persistence@hang:
>
> shard-skl: NOTRUN -> SKIP (fdo#109271) +230 similar issues
>
> igt@gem_exec_balancer@parallel-balancer:
>
> shard-iclb: PASS -> SKIP (i915#4525)
>
> igt@gem_exec_fair@basic-none-share@rcs0:
>
> shard-glk: PASS -> FAIL (i915#2842)
>
> igt@gem_exec_fair@basic-none@vcs1:
>
> shard-kbl: PASS -> FAIL (i915#2842) +2 similar issues
>
> igt@gem_exec_fair@basic-pace-solo@rcs0:
>
> shard-tglb: PASS -> FAIL (i915#2842)
>
> igt@gem_exec_suspend@basic-s3@smem:
>
> shard-skl: PASS -> INCOMPLETE (i915#4939)
>
> igt@gem_lmem_swapping@heavy-verify-multi:
>
> shard-apl: NOTRUN -> SKIP (fdo#109271 / i915#4613)
>
> shard-tglb: NOTRUN -> SKIP (i915#4613)
>
> igt@gem_lmem_swapping@smem-oom:
>
> shard-skl: NOTRUN -> SKIP (fdo#109271 / i915#4613) +2 similar issues
>
> igt@gem_lmem_swapping@verify-random:
>
> shard-kbl: NOTRUN -> SKIP (fdo#109271 / i915#4613)
>
> igt@gem_pread@exhaustion:
>
> shard-kbl: NOTRUN -> WARN (i915#2658)
>
> igt@gem_pxp@regular-baseline-src-copy-readible:
>
> shard-tglb: NOTRUN -> SKIP (i915#4270)
>
> igt@gem_softpin@evict-snoop-interruptible:
>
> shard-iclb: NOTRUN -> SKIP (fdo#109312)
>
> igt@gen7_exec_parse@chained-batch:
>
> shard-tglb: NOTRUN -> SKIP (fdo#109289)
>
> igt@gen9_exec_parse@allowed-all:
>
> shard-glk: PASS -> DMESG-WARN (i915#5566 / i915#716) +1 similar issue
>
> igt@gen9_exec_parse@allowed-single:
>
> shard-apl: PASS -> DMESG-WARN (i915#5566 / i915#716)
>
> igt@gen9_exec_parse@shadow-peek:
>
> shard-iclb: NOTRUN -> SKIP (i915#2856)
>
> igt@i915_module_load@reload-no-display:
>
> shard-tglb: PASS -> DMESG-WARN (i915#2867)
>
> igt@i915_query@query-topology-unsupported:
>
> shard-tglb: NOTRUN -> SKIP (fdo#109302)
>
> igt@i915_suspend@forcewake:
>
> shard-kbl: PASS -> DMESG-WARN (i915#180) +1 similar issue
>
> igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
>
> shard-ic

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Do not use reserved requests for virtual engines

[Matthew Brost]

On Wed, Jun 15, 2022 at 12:13:48AM +0530, Ramalingam C wrote:
> Do not use reserved requests for virtual engines as this is only
> needed for kernel contexts.
> 
> Signed-off-by: Ramalingam C 
> Suggested-by: Matthew Brost 

With the patch squashed into the previous patch:
Reviewed-by: Matthew Brost 

> ---
>  drivers/gpu/drm/i915/i915_request.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_request.c 
> b/drivers/gpu/drm/i915/i915_request.c
> index c71905d8e154..f0392b053bca 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -135,6 +135,8 @@ static void i915_fence_release(struct dma_fence *fence)
>  
>   /*
>* Keep one request on each engine for reserved use under mempressure
> +  * do not use with virtual engines as this really is only needed for
> +  * kernel contexts.
>*
>* We do not hold a reference to the engine here and so have to be
>* very careful in what rq->engine we poke. The virtual engine is
> @@ -164,7 +166,8 @@ static void i915_fence_release(struct dma_fence *fence)
>* know that if the rq->execution_mask is a single bit, rq->engine
>* can be a physical engine with the exact corresponding mask.
>*/
> - if (is_power_of_2(rq->execution_mask) &&
> + if (!intel_engine_is_virtual(rq->engine) &&
> + is_power_of_2(rq->execution_mask) &&
>   !cmpxchg(&rq->engine->request_pool, NULL, rq))
>   return;
>  
> -- 
> 2.20.1
> 

Re: [Intel-gfx] [PATCH 2/3] Revert "drm/i915: Hold reference to intel_context over life of i915_request"

[Matthew Brost]

On Wed, Jun 15, 2022 at 12:13:47AM +0530, Ramalingam C wrote:
> From: Niranjana Vishwanathapura 
> 
> This reverts commit 1e98d8c52ed5dfbaf273c4423c636525c2ce59e7.
> 
> The problem with this patch is that it makes i915_request to hold a
> reference to intel_context, which in turn holds a reference on the VM.
> This strong back referencing can lead to reference loops which leads
> to resource leak.
> 
> An example is the upcoming VM_BIND work which requires VM to hold
> a reference to some shared VM specific BO. But this BO's dma-resv
> fences holds reference to the i915_request thus leading to reference
> loop.
> 
> Signed-off-by: Niranjana Vishwanathapura 
> Signed-off-by: Ramalingam C 
> Suggested-by: Matthew Brost 

Talked with Ram, this patch needs to be squashed with the following
patch. The reasoning is with just this patch, the tree is broken -
parallel submission contexts will leak requests.

With the patches squashed:

Reviewed-by: Mathew Brost 

> ---
>  drivers/gpu/drm/i915/i915_request.c | 55 +
>  1 file changed, 32 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_request.c 
> b/drivers/gpu/drm/i915/i915_request.c
> index 7f6998bf390c..c71905d8e154 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -134,17 +134,39 @@ static void i915_fence_release(struct dma_fence *fence)
>   i915_sw_fence_fini(&rq->semaphore);
>  
>   /*
> -  * Keep one request on each engine for reserved use under mempressure,
> -  * do not use with virtual engines as this really is only needed for
> -  * kernel contexts.
> +  * Keep one request on each engine for reserved use under mempressure
> +  *
> +  * We do not hold a reference to the engine here and so have to be
> +  * very careful in what rq->engine we poke. The virtual engine is
> +  * referenced via the rq->context and we released that ref during
> +  * i915_request_retire(), ergo we must not dereference a virtual
> +  * engine here. Not that we would want to, as the only consumer of
> +  * the reserved engine->request_pool is the power management parking,
> +  * which must-not-fail, and that is only run on the physical engines.
> +  *
> +  * Since the request must have been executed to be have completed,
> +  * we know that it will have been processed by the HW and will
> +  * not be unsubmitted again, so rq->engine and rq->execution_mask
> +  * at this point is stable. rq->execution_mask will be a single
> +  * bit if the last and _only_ engine it could execution on was a
> +  * physical engine, if it's multiple bits then it started on and
> +  * could still be on a virtual engine. Thus if the mask is not a
> +  * power-of-two we assume that rq->engine may still be a virtual
> +  * engine and so a dangling invalid pointer that we cannot dereference
> +  *
> +  * For example, consider the flow of a bonded request through a virtual
> +  * engine. The request is created with a wide engine mask (all engines
> +  * that we might execute on). On processing the bond, the request mask
> +  * is reduced to one or more engines. If the request is subsequently
> +  * bound to a single engine, it will then be constrained to only
> +  * execute on that engine and never returned to the virtual engine
> +  * after timeslicing away, see __unwind_incomplete_requests(). Thus we
> +  * know that if the rq->execution_mask is a single bit, rq->engine
> +  * can be a physical engine with the exact corresponding mask.
>*/
> - if (!intel_engine_is_virtual(rq->engine) &&
> - !cmpxchg(&rq->engine->request_pool, NULL, rq)) {
> - intel_context_put(rq->context);
> + if (is_power_of_2(rq->execution_mask) &&
> + !cmpxchg(&rq->engine->request_pool, NULL, rq))
>   return;
> - }
> -
> - intel_context_put(rq->context);
>  
>   kmem_cache_free(slab_requests, rq);
>  }
> @@ -921,19 +943,7 @@ __i915_request_create(struct intel_context *ce, gfp_t 
> gfp)
>   }
>   }
>  
> - /*
> -  * Hold a reference to the intel_context over life of an i915_request.
> -  * Without this an i915_request can exist after the context has been
> -  * destroyed (e.g. request retired, context closed, but user space holds
> -  * a reference to the request from an out fence). In the case of GuC
> -  * submission + virtual engine, the engine that the request references
> -  * is also destroyed which can trigger bad pointer dref in fence ops
> -  * (e.g. i915_fence_get_driver_name). We could likely change these
> -  * functions to avoid touching the engine but let's just be safe and
> -  * hold the intel_context reference. In execlist mode the request always
> -  * eventually points to a physical engine so this isn't an issue.
> -  */
> - rq->context = intel_co

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Do not access rq->engine without a reference

[Matthew Brost]

On Wed, Jun 15, 2022 at 12:13:46AM +0530, Ramalingam C wrote:
> From: Niranjana Vishwanathapura 
> 
> In i915_fence_get_driver_name(), user may not hold a
> reference to rq->engine. Hence do not access it. Instead,
> store required device private pointer in 'rq->i915' and use it.
> 
> Signed-off-by: Niranjana Vishwanathapura 
> Suggested-by: Matthew Brost 

Reviewed-by: Matthew Brost 

> ---
>  drivers/gpu/drm/i915/i915_request.c | 3 ++-
>  drivers/gpu/drm/i915/i915_request.h | 2 ++
>  2 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_request.c 
> b/drivers/gpu/drm/i915/i915_request.c
> index 73d5195146b0..7f6998bf390c 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -60,7 +60,7 @@ static struct kmem_cache *slab_execute_cbs;
>  
>  static const char *i915_fence_get_driver_name(struct dma_fence *fence)
>  {
> - return dev_name(to_request(fence)->engine->i915->drm.dev);
> + return dev_name(to_request(fence)->i915->drm.dev);
>  }
>  
>  static const char *i915_fence_get_timeline_name(struct dma_fence *fence)
> @@ -937,6 +937,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)
>   rq->engine = ce->engine;
>   rq->ring = ce->ring;
>   rq->execution_mask = ce->engine->mask;
> + rq->i915 = ce->engine->i915;
>  
>   ret = intel_timeline_get_seqno(tl, rq, &seqno);
>   if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_request.h 
> b/drivers/gpu/drm/i915/i915_request.h
> index 28b1f9db5487..47041ec68df8 100644
> --- a/drivers/gpu/drm/i915/i915_request.h
> +++ b/drivers/gpu/drm/i915/i915_request.h
> @@ -196,6 +196,8 @@ struct i915_request {
>   struct dma_fence fence;
>   spinlock_t lock;
>  
> + struct drm_i915_private *i915;
> +
>   /**
>* Context and ring buffer related to this request
>* Contexts are refcounted, so when this request is associated with a
> -- 
> 2.20.1
> 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix a lockdep warning at error capture (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix a lockdep warning at error capture (rev2)
URL   : https://patchwork.freedesktop.org/series/105291/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11803 -> Patchwork_105291v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/index.html

Participating hosts (36 -> 37)
--

  Additional (4): fi-kbl-soraka bat-adlm-1 fi-bdw-5557u bat-adlp-6 
  Missing(3): bat-dg2-8 fi-bdw-samus fi-pnv-d510 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105291v2:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@reload:
- {bat-adln-1}:   [PASS][1] -> [DMESG-WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/bat-adln-1/igt@i915_module_l...@reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/bat-adln-1/igt@i915_module_l...@reload.html

  * igt@i915_selftest@live@hangcheck:
- {bat-adlm-1}:   NOTRUN -> [INCOMPLETE][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/bat-adlm-1/igt@i915_selftest@l...@hangcheck.html

  
Known issues


  Here are the changes found in Patchwork_105291v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_gttfill@basic:
- fi-kbl-soraka:  NOTRUN -> [SKIP][4] ([fdo#109271]) +8 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-kbl-soraka/igt@gem_exec_gttf...@basic.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka:  NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-apl-guc/igt@gem_lmem_swapp...@basic.html
- fi-kbl-soraka:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html

  * igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka:  NOTRUN -> [DMESG-FAIL][8] ([i915#1886])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258:   [PASS][9] -> [INCOMPLETE][10] ([i915#4785])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11803/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
- fi-bdw-5557u:   NOTRUN -> [INCOMPLETE][11] ([i915#3921])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-bdw-5557u/igt@i915_selftest@l...@hangcheck.html
- bat-dg1-6:  NOTRUN -> [DMESG-FAIL][12] ([i915#4494] / [i915#4957])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-6:  NOTRUN -> [INCOMPLETE][13] ([i915#6011])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/bat-dg1-6/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-4770:NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-hsw-4770/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-snb-2600:NOTRUN -> [SKIP][15] ([fdo#109271] / [fdo#111827])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u:   NOTRUN -> [SKIP][16] ([fdo#109271] / [fdo#111827]) +7 
similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-crc-fast:
- fi-apl-guc: NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-apl-guc/igt@kms_chamel...@hdmi-crc-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-soraka:  NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +7 
similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105291v2/fi-kbl-soraka/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
- fi-bsw-kefka:   [PASS

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: ttm for stolen (rev5)

[Robert Beckett]

On 22/06/2022 10:05, Tvrtko Ursulin wrote:


On 21/06/2022 20:11, Robert Beckett wrote:



On 21/06/2022 18:37, Patchwork wrote:

*Patch Details*
*Series:*    drm/i915: ttm for stolen (rev5)
*URL:*    https://patchwork.freedesktop.org/series/101396/ 


*State:*    failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101396v5/index.html  




  CI Bug Log - changes from CI_DRM_11790 -> Patchwork_101396v5


    Summary

*FAILURE*

Serious unknown changes coming with Patchwork_101396v5 absolutely 
need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_101396v5, please notify your bug team to 
allow them
to document this new failure mode, which will reduce false positives 
in CI.


External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101396v5/index.html



    Participating hosts (40 -> 41)

Additional (2): fi-icl-u2 bat-dg2-9
Missing (1): fi-bdw-samus


    Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_101396v5:



  IGT changes


    Possible regressions

  * igt@i915_selftest@live@reset:
  o bat-adlp-4: PASS
 


    -> DMESG-FAIL
 





I keep hitting clobbered pages during engine resets on bat-adlp-4.
It seems to happen most of the time on that machine and occasionally 
on bat-adlp-6.


Should bat-adlp-4 be considered an unreliable machine like bat-adlp-6 
is for now?


Alternatively, seeing the history of this in

commit 3da3c5c1c9825c24168f27b021339e90af37e969 "drm/i915: Exclude low 
pages (128KiB) of stolen from use"


could this be an indication that maybe the original issue is worse on 
adlp machines?
I have only ever seen page page 135 or 136 clobbered across many runs 
via trybot, so it looks fairly consistent.

Though excluding the use of over 540K of stolen might be too severe.


Don't know but I see that on the latest version you even hit pages 165/166.

Any history of hitting this in CI without your series? If not, are there 
some other changes which could explain it? Are you touching the selftest 
itself?


Hexdump of the clobbered page looks quite complex. Especially 
POISON_FREE. Any idea how that ends up there?



(see 
https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_105517v4/fi-rkl-guc/igt@i915_selftest@l...@reset.html#dmesg-warnings702)


after lots of slow debug via CI, it looks like the issue is that a ring 
buffer was allocated and taking up that page during the initial crc 
capture in the test, but by the time it came to check for corruption, it 
had been freed from that page.


The test has a number of weaknesses:

1. the busy check is done twice, without taking in to account any change 
in between. I assume previously this could be relied on never to occur, 
but now it can for some reason (more on that later)


2. the engine reset returns early with an error for guc submission 
engines, but it is silently ignored in the test. Perhaps it should 
ignore guc submission engines as it is a largely useless test for those 
situations.



A quick obvious fix is to have a busy bitmask that remembers each page's 
busy state initially and only check for corruption if it was busy during 
both checks.


However, the main question is why this is occurring now with my changes.
I have added more debug to check where the stolen memory is being freed, 
but the first run last night didn't hit the issue for once.
I am running again now, will report back if I figure out where it is 
being freed.


I am pretty sure the "corruption" (which isn't actually corruption) is 
from a ring buffer.
The POISON_FREE is the only difference between the captured before and 
after dumps:


[0040]  0280 6b6b6b6b 6b6b6b6b 6b6b6b6b 6b6b6b6b 6b6b6b6b 
6b6b6b6b


with the 2nd dword being the MI_ARB_CHECK used for the spinner.
I think this is the request poisoning from i915_request_retire()

The bit I don't know yet is why a ring buffer was freed between the 
initial crc capture and the corruption check. The spinner should be 
active across the entire test, maintaining a ref on the context and it's 
ring.


hopefully my latest debug will give more answers.




Btw what is the benefit of converting stolen to start with? It's not 
much of a backend since it just uses the drm range manager. So quite 
thin and uneventful. Diffstats for the series also do not look like you 
end up with much code reduction?


Regards,

Tvrtko

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Don't update engine busyness stats too frequently

[Teres Alexis, Alan Previn]

WRT possible new issues below, the patches i made does not impact any display 
or even execution operation.
Unfortunately, i cant seem to access the "possible regression" failure below. 
Additionally, GuC is not supported on SKL.
thus we can safely ignore these.


On Mon, 2022-06-27 at 12:47 +, Patchwork wrote:
Patch Details
Series: drm/i915/guc: Don't update engine busyness stats too frequently
URL:https://patchwork.freedesktop.org/series/105525/
State:  failure
Details:

...
...
Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_105525v1_full:

IGT changes
Possible regressions

  *   igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
 *   shard-skl: NOTRUN -> 
FAIL
 +3 similar issues

Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *   {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
 *   {shard-dg1}: NOTRUN -> 
SKIP
 +15 similar issues

Re: [Intel-gfx] [PATCH v6 1/3] drm/doc/rfc: VM_BIND feature design document

[Daniel Vetter]

On Sat, Jun 25, 2022 at 06:49:14PM -0700, Niranjana Vishwanathapura wrote:
> VM_BIND design document with description of intended use cases.
> 
> v2: Reduce the scope to simple Mesa use case.
> v3: Expand documentation on dma-resv usage, TLB flushing and
> execbuf3.
> v4: Remove vm_bind tlb flush request support.
> v5: Update TLB flushing documentation.
> v6: Update out of order completion documentation.
> 
> Signed-off-by: Niranjana Vishwanathapura 

Reviewed-by: Daniel Vetter 

Aside on the tlb flush discussion: I think that one doesn't have a big
impact if we need to later on fix it with a flag, and what's currently
specified here is the solution that fits best into the existing semantics.
So feels like a solid path until we have this all up&running and can do
real benchmarks with applications.
-Daniel

> ---
>  Documentation/gpu/rfc/i915_vm_bind.rst | 246 +
>  Documentation/gpu/rfc/index.rst|   4 +
>  2 files changed, 250 insertions(+)
>  create mode 100644 Documentation/gpu/rfc/i915_vm_bind.rst
> 
> diff --git a/Documentation/gpu/rfc/i915_vm_bind.rst 
> b/Documentation/gpu/rfc/i915_vm_bind.rst
> new file mode 100644
> index ..032ee32b885c
> --- /dev/null
> +++ b/Documentation/gpu/rfc/i915_vm_bind.rst
> @@ -0,0 +1,246 @@
> +==
> +I915 VM_BIND feature design and use cases
> +==
> +
> +VM_BIND feature
> +
> +DRM_I915_GEM_VM_BIND/UNBIND ioctls allows UMD to bind/unbind GEM buffer
> +objects (BOs) or sections of a BOs at specified GPU virtual addresses on a
> +specified address space (VM). These mappings (also referred to as persistent
> +mappings) will be persistent across multiple GPU submissions (execbuf calls)
> +issued by the UMD, without user having to provide a list of all required
> +mappings during each submission (as required by older execbuf mode).
> +
> +The VM_BIND/UNBIND calls allow UMDs to request a timeline out fence for
> +signaling the completion of bind/unbind operation.
> +
> +VM_BIND feature is advertised to user via I915_PARAM_HAS_VM_BIND.
> +User has to opt-in for VM_BIND mode of binding for an address space (VM)
> +during VM creation time via I915_VM_CREATE_FLAGS_USE_VM_BIND extension.
> +
> +VM_BIND/UNBIND ioctl calls executed on different CPU threads concurrently are
> +not ordered. Furthermore, parts of the VM_BIND/UNBIND operations can be done
> +asynchronously, when valid out fence is specified.
> +
> +VM_BIND features include:
> +
> +* Multiple Virtual Address (VA) mappings can map to the same physical pages
> +  of an object (aliasing).
> +* VA mapping can map to a partial section of the BO (partial binding).
> +* Support capture of persistent mappings in the dump upon GPU error.
> +* Support for userptr gem objects (no special uapi is required for this).
> +
> +TLB flush consideration
> +
> +The i915 driver flushes the TLB for each submission and when an object's
> +pages are released. The VM_BIND/UNBIND operation will not do any additional
> +TLB flush. Any VM_BIND mapping added will be in the working set for 
> subsequent
> +submissions on that VM and will not be in the working set for currently 
> running
> +batches (which would require additional TLB flushes, which is not supported).
> +
> +Execbuf ioctl in VM_BIND mode
> +---
> +A VM in VM_BIND mode will not support older execbuf mode of binding.
> +The execbuf ioctl handling in VM_BIND mode differs significantly from the
> +older execbuf2 ioctl (See struct drm_i915_gem_execbuffer2).
> +Hence, a new execbuf3 ioctl has been added to support VM_BIND mode. (See
> +struct drm_i915_gem_execbuffer3). The execbuf3 ioctl will not accept any
> +execlist. Hence, no support for implicit sync. It is expected that the below
> +work will be able to support requirements of object dependency setting in all
> +use cases:
> +
> +"dma-buf: Add an API for exporting sync files"
> +(https://lwn.net/Articles/859290/)
> +
> +The new execbuf3 ioctl only works in VM_BIND mode and the VM_BIND mode only
> +works with execbuf3 ioctl for submission. All BOs mapped on that VM (through
> +VM_BIND call) at the time of execbuf3 call are deemed required for that
> +submission.
> +
> +The execbuf3 ioctl directly specifies the batch addresses instead of as
> +object handles as in execbuf2 ioctl. The execbuf3 ioctl will also not
> +support many of the older features like in/out/submit fences, fence array,
> +default gem context and many more (See struct drm_i915_gem_execbuffer3).
> +
> +In VM_BIND mode, VA allocation is completely managed by the user instead of
> +the i915 driver. Hence all VA assignment, eviction are not applicable in
> +VM_BIND mode. Also, for determining object activeness, VM_BIND mode will not
> +be using the i915_vma active reference tracking. It will instead use dma-resv
> +object for that (See `VM_BIND dma_resv usage`_).
> +
> +So, a lot of 

[Intel-gfx] [PATCH i-g-t 2/3] tests/i915/kms_mmap_write_crc: handle missing gem_get_caching()

[Matthew Auld]

The kernel is meant to force the caching level for the object to
CACHE_NONE or CACHE_WT when first scanning out the object, since the
display engine is not coherent (assuming userspace hasn't already done
this). On discrete we no longer support set/get_caching, but we can only
do the scanout from lmem, which can only be mapped as WC and so should
always be coherent for scanout. Adjust the test and ensure it still
passes as expected.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5303
Signed-off-by: Matthew Auld 
Cc: Gwan-gyeong Mun 
---
 tests/i915/kms_mmap_write_crc.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/tests/i915/kms_mmap_write_crc.c b/tests/i915/kms_mmap_write_crc.c
index b17e5fdb..da7312d6 100644
--- a/tests/i915/kms_mmap_write_crc.c
+++ b/tests/i915/kms_mmap_write_crc.c
@@ -78,7 +78,6 @@ static void test(data_t *data)
drmModeModeInfo *mode;
cairo_t *cr;
char *ptr;
-   uint32_t caching;
void *buf;
igt_crc_t crc;
 
@@ -102,9 +101,13 @@ static void test(data_t *data)
igt_plane_set_fb(data->primary, &data->fb[0]);
igt_display_commit(display);
 
-   /* make sure caching mode has become UC/WT */
-   caching = gem_get_caching(data->drm_fd, fb->gem_handle);
-   igt_assert(caching == I915_CACHING_NONE || caching == 
I915_CACHING_DISPLAY);
+   if (!gem_has_lmem(data->drm_fd)) {
+   uint32_t caching;
+
+   /* make sure caching mode has become UC/WT */
+   caching = gem_get_caching(data->drm_fd, fb->gem_handle);
+   igt_assert(caching == I915_CACHING_NONE || caching == 
I915_CACHING_DISPLAY);
+   }
 
/*
 * firstly demonstrate the need for DMA_BUF_SYNC_START 
("begin_cpu_access")
-- 
2.36.1

[Intel-gfx] [PATCH i-g-t 3/3] tests/i915: adapt __copy_ccs for discrete

[Matthew Auld]

We can't explicitly control the mmap caching type for discrete, but
using mmap_device_coherent should be good enough here on such devices.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4842
Signed-off-by: Matthew Auld 
Cc: Gwan-gyeong Mun 
---
 lib/intel_bufops.c | 15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index 05c0b0d4..c63a5760 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -451,11 +451,16 @@ static void __copy_ccs(struct buf_ops *bops, struct 
intel_buf *buf,
ccs_size = CCS_SIZE(gen, buf);
size = offset + ccs_size;
 
-   map = __gem_mmap_offset__wc(bops->fd, buf->handle, 0, size,
-   PROT_READ | PROT_WRITE);
-   if (!map)
-   map = gem_mmap__wc(bops->fd, buf->handle, 0, size,
-  PROT_READ | PROT_WRITE);
+   if (gem_has_lmem(bops->fd)) {
+   map = gem_mmap__device_coherent(bops->fd, buf->handle, 0, size,
+   PROT_READ | PROT_WRITE);
+   } else {
+   map = __gem_mmap_offset__wc(bops->fd, buf->handle, 0, size,
+   PROT_READ | PROT_WRITE);
+   if (!map)
+   map = gem_mmap__wc(bops->fd, buf->handle, 0, size,
+  PROT_READ | PROT_WRITE);
+   }
 
switch (dir) {
case CCS_LINEAR_TO_BUF:
-- 
2.36.1

[Intel-gfx] [PATCH i-g-t 1/3] tests/i915/gem_eio: fix uaf

[Matthew Auld]

../tests/i915/gem_eio.c:277:20: warning: pointer ‘ctx’ used after ‘free’ 
[-Wuse-after-free]
  277 | igt_assert(igt_sysfs_printf(ctx->debugfs, "i915_drop_caches",
../lib/igt_core.h:667:20: note: in definition of macro ‘igt_assert’
  667 | do { if (!(expr)) \
  |^~~~
../tests/i915/gem_eio.c:274:9: note: call to ‘free’ here
  274 | free(ctx);

Signed-off-by: Matthew Auld 
Cc: Gwan-gyeong Mun 
---
 tests/i915/gem_eio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 913a21f9..6cbae6eb 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -270,11 +270,11 @@ static void hang_handler(union sigval arg)
  igt_nsec_elapsed(&ctx->delay) / 1000.0);
 
igt_assert_eq(timer_delete(ctx->timer), 0);
-   free(ctx);
 
/* flush any excess work before we start timing our reset */
igt_assert(igt_sysfs_printf(ctx->debugfs, "i915_drop_caches",
"%d", DROP_RCU));
+   free(ctx);
 
igt_nsec_elapsed(ts);
igt_assert(igt_sysfs_printf(dir, "i915_wedged", "%llu", -1ull));
-- 
2.36.1

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: stop HPD workers before display driver unregister

[Patchwork]

== Series Details ==

Series: drm/i915/display: stop HPD workers before display driver unregister
URL   : https://patchwork.freedesktop.org/series/105557/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11799_full -> Patchwork_105557v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105557v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105557v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105557v1_full:

### IGT changes ###

 Possible regressions 

  * {igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10} (NEW):
- {shard-dg1}:NOTRUN -> [SKIP][1] +15 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v1/shard-dg1-18/igt@kms_cursor_crc@cursor-rapid-movem...@pipe-a-hdmi-a-3-32x10.html

  * igt@kms_cursor_legacy@torture-move@all-pipes:
- shard-glk:  [PASS][2] -> [INCOMPLETE][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11799/shard-glk7/igt@kms_cursor_legacy@torture-m...@all-pipes.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v1/shard-glk5/igt@kms_cursor_legacy@torture-m...@all-pipes.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][4] +15 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v1/shard-dg1-19/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-edp-1-32x32:
- {shard-rkl}:NOTRUN -> [SKIP][5] +3 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v1/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movem...@pipe-b-edp-1-32x32.html

  
New tests
-

  New tests have been introduced between CI_DRM_11799_full and 
Patchwork_105557v1_full:

### New IGT tests (43) ###

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.26] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [0.29] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-c-hdmi-a-3-128x128:
- Sta

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/fourcc: Document the Intel CCS modifiers' CC plane expected pitch

[Patchwork]

== Series Details ==

Series: drm/fourcc: Document the Intel CCS modifiers' CC plane expected pitch
URL   : https://patchwork.freedesktop.org/series/105550/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11799_full -> Patchwork_105550v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105550v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105550v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105550v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_async_flips@crc@pipe-c-dp-1:
- shard-kbl:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11799/shard-kbl7/igt@kms_async_flips@c...@pipe-c-dp-1.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105550v1/shard-kbl7/igt@kms_async_flips@c...@pipe-c-dp-1.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][3] +15 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105550v1/shard-dg1-19/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  * igt@perf_pmu@module-unload:
- {shard-tglu}:   [PASS][4] -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11799/shard-tglu-2/igt@perf_...@module-unload.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105550v1/shard-tglu-8/igt@perf_...@module-unload.html

  
New tests
-

  New tests have been introduced between CI_DRM_11799_full and 
Patchwork_105550v1_full:

### New IGT tests (6) ###

  * igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [3.22] s

  * igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [3.23] s

  * igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [3.29] s

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [3.22] s

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [3.22] s

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [3.29] s

  

Known issues


  Here are the changes found in Patchwork_105550v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
- shard-kbl:  [PASS][6] -> [DMESG-WARN][7] ([i915#180]) +2 similar 
issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11799/shard-kbl6/igt@gem_ctx_isolation@preservation...@vcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105550v1/shard-kbl6/igt@gem_ctx_isolation@preservation...@vcs0.html

  * igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: [PASS][8] -> [SKIP][9] ([i915#4525]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11799/shard-iclb2/igt@gem_exec_balan...@parallel-contexts.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105550v1/shard-iclb3/igt@gem_exec_balan...@parallel-contexts.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11799/shard-glk5/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105550v1/shard-glk2/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl:  [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar 
issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11799/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105550v1/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: [PASS][14] -> [FAIL][15] ([i915#2842]) +2 similar 
issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11799/shard-tglb1/igt@gem_exec_fair@basic-p...@bcs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105550v1/shard-tglb3/igt@gem_exec_fair@basic-p...@bcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][16] ([i915#2842])
   [16]: 
https://intel-gf

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Display info cleanup

[Patchwork]

== Series Details ==

Series: drm/i915: Display info cleanup
URL   : https://patchwork.freedesktop.org/series/105544/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11797_full -> Patchwork_105544v1_full


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_105544v1_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105544v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105544v1_full:

### IGT changes ###

 Warnings 

  * igt@gem_pwrite@basic-exhaustion:
- shard-tglb: [WARN][1] ([i915#2658]) -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11797/shard-tglb6/igt@gem_pwr...@basic-exhaustion.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-tglb7/igt@gem_pwr...@basic-exhaustion.html

  
Known issues


  Here are the changes found in Patchwork_105544v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][3] -> [FAIL][4] ([i915#6268])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11797/shard-tglb7/igt@gem_ctx_e...@basic-nohangcheck.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-tglb2/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
- shard-kbl:  [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +4 similar 
issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11797/shard-kbl7/igt@gem_ctx_isolation@preservation...@vcs0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-kbl6/igt@gem_ctx_isolation@preservation...@vcs0.html

  * igt@gem_ctx_persistence@hang:
- shard-skl:  NOTRUN -> [SKIP][7] ([fdo#109271]) +390 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-skl3/igt@gem_ctx_persiste...@hang.html

  * igt@gem_exec_fair@basic-deadline:
- shard-skl:  NOTRUN -> [FAIL][8] ([i915#6141])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-skl9/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][9] ([i915#2842]) +1 similar issue
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-iclb2/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11797/shard-glk7/igt@gem_exec_fair@basic-p...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-glk9/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl:  [PASS][12] -> [FAIL][13] ([i915#2842])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11797/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
- shard-skl:  NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613]) +4 
similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-skl7/igt@gem_lmem_swapp...@heavy-verify-multi.html

  * igt@gem_lmem_swapping@verify-random:
- shard-apl:  NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-apl3/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_pwrite@basic-exhaustion:
- shard-glk:  NOTRUN -> [WARN][16] ([i915#2658])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-glk5/igt@gem_pwr...@basic-exhaustion.html

  * igt@gem_render_copy@y-tiled-to-vebox-y-tiled:
- shard-glk:  NOTRUN -> [SKIP][17] ([fdo#109271]) +4 similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-glk5/igt@gem_render_c...@y-tiled-to-vebox-y-tiled.html

  * igt@gem_userptr_blits@input-checking:
- shard-glk:  NOTRUN -> [DMESG-WARN][18] ([i915#4991])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-glk5/igt@gem_userptr_bl...@input-checking.html

  * igt@gem_userptr_blits@vma-merge:
- shard-kbl:  NOTRUN -> [FAIL][19] ([i915#3318])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105544v1/shard-kbl7/igt@gem_userptr_bl...@vma-merge.html
- shard-skl:  NOTRUN -> [FAIL][20] ([i915#3318])

Re: [Intel-gfx] [PATCH v3 00/14] GSC support for XeHP SDV and DG2 platforms

[Greg Kroah-Hartman]

On Sun, Jun 19, 2022 at 04:37:07PM +0300, Alexander Usyskin wrote:
> Add GSC support for XeHP SDV and DG2 platforms.
> 
> The series includes changes for the mei driver:
> - add ability to use polling instead of interrupts
> - add ability to use extended timeouts
> - setup extended operational memory for GSC
> 
> The series includes changes for the i915 driver:
> - allocate extended operational memory for GSC
> - GSC on XeHP SDV offsets and definitions
> 
> Greg KH, please review and ACK the MEI patches.
> We are pushing these patches through gfx tree as
> the auxiliary device belongs there.

patch 13 in the series obviously needs work, the others are fine with
me.

thanks,

greg k-h

Re: [Intel-gfx] [PATCH v3 13/14] mei: debugfs: add pxp mode to devstate in debugfs

[Greg Kroah-Hartman]

On Sun, Jun 19, 2022 at 04:37:20PM +0300, Alexander Usyskin wrote:
> From: Tomas Winkler 
> 
> CC: Vitaly Lubart 
> Signed-off-by: Tomas Winkler 

We can not take patches without any changelog text, you know this :(

> ---
>  drivers/misc/mei/debugfs.c | 17 +
>  1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/misc/mei/debugfs.c b/drivers/misc/mei/debugfs.c
> index 1ce61e9e24fc..4074fec866a6 100644
> --- a/drivers/misc/mei/debugfs.c
> +++ b/drivers/misc/mei/debugfs.c
> @@ -86,6 +86,20 @@ static int mei_dbgfs_active_show(struct seq_file *m, void 
> *unused)
>  }
>  DEFINE_SHOW_ATTRIBUTE(mei_dbgfs_active);
>  
> +static const char *mei_dev_pxp_mode_str(enum mei_dev_pxp_mode state)
> +{
> +#define MEI_PXP_MODE(state) case MEI_DEV_PXP_##state: return #state
> + switch (state) {
> + MEI_PXP_MODE(DEFAULT);
> + MEI_PXP_MODE(INIT);
> + MEI_PXP_MODE(SETUP);
> + MEI_PXP_MODE(READY);

Just spell out the case and return lines, don't create macros for no
good reason please.

thanks,

greg k-h

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/edid: expand on struct drm_edid usage (rev6)

[Patchwork]

== Series Details ==

Series: drm/edid: expand on struct drm_edid usage (rev6)
URL   : https://patchwork.freedesktop.org/series/104309/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_104309v6_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_104309v6_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_104309v6_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_104309v6_full:

### IGT changes ###

 Possible regressions 

  * {igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10} (NEW):
- {shard-dg1}:NOTRUN -> [SKIP][1] +15 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v6/shard-dg1-18/igt@kms_cursor_crc@cursor-rapid-movem...@pipe-a-hdmi-a-3-32x10.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk:  [PASS][2] -> [FAIL][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-glk5/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v6/shard-glk8/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-skl:  NOTRUN -> [FAIL][4] +1 similar issue
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v6/shard-skl1/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions-varying-size.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][5] +15 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v6/shard-dg1-19/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  * igt@kms_flip@flip-vs-modeset-vs-hang@d-hdmi-a1:
- {shard-dg1}:NOTRUN -> [INCOMPLETE][6]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v6/shard-dg1-12/igt@kms_flip@flip-vs-modeset-vs-h...@d-hdmi-a1.html

  * igt@syncobj_timeline@device-signal-unordered:
- {shard-dg1}:[PASS][7] -> [TIMEOUT][8] +2 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-18/igt@syncobj_timel...@device-signal-unordered.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v6/shard-dg1-12/igt@syncobj_timel...@device-signal-unordered.html

  
New tests
-

  New tests have been introduced between CI_DRM_11795_full and 
Patchwork_104309v6_full:

### New IGT tests (40) ###

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.26] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [0.25] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [0.31] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [0.23] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe

[Intel-gfx] [PATCH v2] drm/i915/dg2: Add performance workaround 18019455067

[Lionel Landwerlin]

The recommended number of stackIDs for Ray Tracing subsystem is 512
rather than 2048 (default HW programming).

v2: Move the programming to dg2_ctx_gt_tuning_init() (Lucas)

Signed-off-by: Lionel Landwerlin 
---
 drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 07ef111947b8c..12fc87b957425 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1112,6 +1112,10 @@
 #define   GEN12_PUSH_CONST_DEREF_HOLD_DIS  REG_BIT(8)
 
 #define RT_CTRL_MMIO(0xe530)
+#define   RT_CTRL_NUMBER_OF_STACKIDS_MASK  REG_GENMASK(6, 5)
+#define   NUMBER_OF_STACKIDS_512   2
+#define   NUMBER_OF_STACKIDS_1024  1
+#define   NUMBER_OF_STACKIDS_2048  0
 #define   DIS_NULL_QUERY   REG_BIT(10)
 
 #define EU_PERF_CNTL1  _MMIO(0xe558)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3213c593a55f4..4d80716b957d4 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -575,6 +575,11 @@ static void dg2_ctx_gt_tuning_init(struct intel_engine_cs 
*engine,
   FF_MODE2_TDS_TIMER_MASK,
   FF_MODE2_TDS_TIMER_128,
   0, false);
+   wa_write_clr_set(wal,
+RT_CTRL,
+RT_CTRL_NUMBER_OF_STACKIDS_MASK,
+REG_FIELD_PREP(RT_CTRL_NUMBER_OF_STACKIDS_MASK,
+   NUMBER_OF_STACKIDS_512));
 }
 
 /*
-- 
2.34.1

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Increase timeout for live_parallel_switch (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Increase timeout for live_parallel_switch (rev2)
URL   : https://patchwork.freedesktop.org/series/105490/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_105490v2_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105490v2_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105490v2_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105490v2_full:

### IGT changes ###

 Possible regressions 

  * igt@i915_pm_rpm@gem-mmap-type@gtt-smem0:
- shard-iclb: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-iclb1/igt@i915_pm_rpm@gem-mmap-t...@gtt-smem0.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-iclb4/igt@i915_pm_rpm@gem-mmap-t...@gtt-smem0.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-b-edp-1:
- shard-skl:  [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-skl1/igt@kms_cursor_crc@cursor-susp...@pipe-b-edp-1.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-skl1/igt@kms_cursor_crc@cursor-susp...@pipe-b-edp-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
- shard-skl:  NOTRUN -> [FAIL][5] +5 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-skl3/igt@kms_cursor_legacy@flip-vs-cur...@varying-size.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen@pipe-b-edp-1-32x32:
- {shard-rkl}:NOTRUN -> [SKIP][6] +3 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-rkl-6/igt@kms_cursor_crc@cursor-offscr...@pipe-b-edp-1-32x32.html

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][7] +15 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-dg1-17/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  
Known issues


  Here are the changes found in Patchwork_105490v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@hang:
- shard-skl:  NOTRUN -> [SKIP][8] ([fdo#109271]) +230 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-skl7/igt@gem_ctx_persiste...@hang.html

  * igt@gem_exec_balancer@parallel-balancer:
- shard-iclb: [PASS][9] -> [SKIP][10] ([i915#4525])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-iclb4/igt@gem_exec_balan...@parallel-balancer.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-iclb7/igt@gem_exec_balan...@parallel-balancer.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl:  [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-apl8/igt@gem_exec_fair@basic-none-s...@rcs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-apl4/igt@gem_exec_fair@basic-none-s...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl:  [PASS][13] -> [FAIL][14] ([i915#2842]) +3 similar 
issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs1.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-tglb: [PASS][15] -> [FAIL][16] ([i915#2842])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-tglb5/igt@gem_exec_fair@basic-pace-s...@rcs0.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-tglb2/igt@gem_exec_fair@basic-pace-s...@rcs0.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
- shard-tglb: NOTRUN -> [SKIP][17] ([i915#4613])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-tglb5/igt@gem_lmem_swapp...@heavy-verify-multi.html

  * igt@gem_lmem_swapping@smem-oom:
- shard-skl:  NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) +2 
similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v2/shard-skl6/igt@gem_lmem_swapp...@smem-oom.html

  * igt@gem_lmem_swapping@verify-random:
- shard-kbl:  NOT

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Don't update engine busyness stats too frequently

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Don't update engine busyness stats too frequently
URL   : https://patchwork.freedesktop.org/series/105525/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_105525v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105525v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105525v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105525v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
- shard-skl:  NOTRUN -> [FAIL][1] +3 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-skl7/igt@kms_cursor_legacy@flip-vs-cur...@varying-size.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][2] +15 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-dg1-15/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  
New tests
-

  New tests have been introduced between CI_DRM_11795_full and 
Patchwork_105525v1_full:

### New IGT tests (4) ###

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.50] s

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.34] s

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.35] s

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.34] s

  

Known issues


  Here are the changes found in Patchwork_105525v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@hang:
- shard-skl:  NOTRUN -> [SKIP][3] ([fdo#109271]) +230 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-skl10/igt@gem_ctx_persiste...@hang.html

  * igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: NOTRUN -> [SKIP][4] ([i915#4525])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-iclb3/igt@gem_exec_balan...@parallel-contexts.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [PASS][5] -> [SKIP][6] ([i915#4525]) +1 similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-iclb1/igt@gem_exec_balan...@parallel-keep-in-fence.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-iclb3/igt@gem_exec_balan...@parallel-keep-in-fence.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl:  [PASS][7] -> [FAIL][8] ([i915#2842]) +5 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs1.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-none@vecs0:
- shard-glk:  [PASS][9] -> [FAIL][10] ([i915#2842]) +1 similar issue
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-glk5/igt@gem_exec_fair@basic-n...@vecs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-glk3/igt@gem_exec_fair@basic-n...@vecs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-tglb: [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-tglb5/igt@gem_exec_fair@basic-pace-s...@rcs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-tglb2/igt@gem_exec_fair@basic-pace-s...@rcs0.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
- shard-apl:  NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-apl7/igt@gem_lmem_swapp...@heavy-verify-multi.html
- shard-tglb: NOTRUN -> [SKIP][14] ([i915#4613])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-tglb5/igt@gem_lmem_swapp...@heavy-verify-multi.html

  * igt@gem_lmem_swapping@smem-oom:
- shard-skl:  NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613]) +2 
similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105525v1/shard-skl1/i

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc/slpc: Use non-blocking H2G for waitboost (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/guc/slpc: Use non-blocking H2G for waitboost (rev3)
URL   : https://patchwork.freedesktop.org/series/103598/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_103598v3_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_103598v3_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_103598v3_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_103598v3_full:

### IGT changes ###

 Possible regressions 

  * {igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-3-512x512} (NEW):
- {shard-dg1}:NOTRUN -> [SKIP][1] +15 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103598v3/shard-dg1-18/igt@kms_cursor_crc@cursor-ran...@pipe-b-hdmi-a-3-512x512.html

  * igt@kms_cursor_legacy@cursor-vs-flip@toggle:
- shard-iclb: [PASS][2] -> [FAIL][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-iclb8/igt@kms_cursor_legacy@cursor-vs-f...@toggle.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103598v3/shard-iclb7/igt@kms_cursor_legacy@cursor-vs-f...@toggle.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-skl:  NOTRUN -> [FAIL][4] +1 similar issue
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103598v3/shard-skl6/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions-varying-size.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][5] +15 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103598v3/shard-dg1-16/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  * igt@kms_flip@flip-vs-modeset-vs-hang@d-hdmi-a1:
- {shard-dg1}:NOTRUN -> [INCOMPLETE][6]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103598v3/shard-dg1-12/igt@kms_flip@flip-vs-modeset-vs-h...@d-hdmi-a1.html

  * igt@syncobj_timeline@device-signal-unordered:
- {shard-dg1}:[PASS][7] -> [TIMEOUT][8] +2 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-18/igt@syncobj_timel...@device-signal-unordered.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103598v3/shard-dg1-12/igt@syncobj_timel...@device-signal-unordered.html

  
New tests
-

  New tests have been introduced between CI_DRM_11795_full and 
Patchwork_103598v3_full:

### New IGT tests (44) ###

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.67] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.70] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [5.65] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [5.65] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-64x21:
- Statuses : 1 pass(s)
- Exec time: [5.87] s

  * igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [5.77] s

  * igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.73] s

  * igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-3-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.73] s

  * igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [5.56] s

  * igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-3-256x85:
- Statuses : 1 pass(s)
- Exec time: [5.70] s

  * igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-3-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-3-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-3-512x170:
- Statuses : 1 skip(s)

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dg2: Add performance workaround 18019455067

[Patchwork]

== Series Details ==

Series: drm/i915/dg2: Add performance workaround 18019455067
URL   : https://patchwork.freedesktop.org/series/105512/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_105512v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105512v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105512v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105512v1_full:

### CI changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * boot:
- {shard-dg1}:([PASS][1], [PASS][2], [PASS][3], [PASS][4], 
[PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], 
[PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], 
[PASS][18]) -> ([PASS][19], [PASS][20], [PASS][21], [FAIL][22], [PASS][23], 
[PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], 
[PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], 
[PASS][36])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-12/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-12/boot.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-12/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-13/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-13/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-15/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-15/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-16/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-17/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-17/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-17/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-18/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-18/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-18/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-18/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-19/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-19/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-dg1-19/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-12/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-12/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-13/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-13/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-13/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-15/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-15/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-15/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-16/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-16/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-16/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-17/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-17/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-18/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-18/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-18/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-19/boot.html
   [36]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105512v1/shard-dg1-19/boot.html

  

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-skl:  NOTRUN -> [FAIL][37] +1 similar issue
   [37]: 
https://intel-gfx-ci.01.o

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dgfx: Disable d3cold Correctly (rev2)

[Anshuman Gupta]

On 2022-06-17 at 00:16:25 +, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/dgfx: Disable d3cold Correctly (rev2)
> URL   : https://patchwork.freedesktop.org/series/104770/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_11768_full -> Patchwork_104770v2_full
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_104770v2_full absolutely need 
> to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_104770v2_full, please notify your bug team to allow 
> them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Participating hosts (12 -> 10)
> --
> 
>   Missing(2): shard-rkl shard-tglu 
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_104770v2_full:
> 
> ### IGT changes ###
> 
>  Possible regressions 
Below are unrelated failures on GLK, not cause by this patch.
Pushed to drm-intel-next, thanks for Ack and Review.
Br,
Anshuman Gupta.
> 
>   * igt@kms_concurrent@pipe-b:
> - shard-glk:  NOTRUN -> [TIMEOUT][1]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-glk7/igt@kms_concurr...@pipe-b.html
> 
>   * igt@perf@enable-disable:
> - shard-glk:  [PASS][2] -> [TIMEOUT][3] +1 similar issue
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-glk7/igt@p...@enable-disable.html
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-glk7/igt@p...@enable-disable.html
> 
>   
>  Warnings 
> 
>   * igt@kms_chamelium@dp-crc-single:
> - shard-glk:  [SKIP][4] ([fdo#109271] / [fdo#111827]) -> 
> [TIMEOUT][5]
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-glk7/igt@kms_chamel...@dp-crc-single.html
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-glk7/igt@kms_chamel...@dp-crc-single.html
> 
>   
> Known issues
> 
> 
>   Here are the changes found in Patchwork_104770v2_full that come from known 
> issues:
> 
> ### IGT changes ###
> 
>  Issues hit 
> 
>   * igt@gem_eio@in-flight-contexts-immediate:
> - shard-apl:  [PASS][6] -> [TIMEOUT][7] ([i915#3063])
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-apl6/igt@gem_...@in-flight-contexts-immediate.html
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-apl4/igt@gem_...@in-flight-contexts-immediate.html
> 
>   * igt@gem_eio@in-flight-immediate:
> - shard-tglb: [PASS][8] -> [TIMEOUT][9] ([i915#3063]) +1 similar 
> issue
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-tglb3/igt@gem_...@in-flight-immediate.html
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-tglb3/igt@gem_...@in-flight-immediate.html
> 
>   * igt@gem_eio@suspend:
> - shard-skl:  [PASS][10] -> [DMESG-WARN][11] ([i915#1982])
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-skl10/igt@gem_...@suspend.html
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-skl9/igt@gem_...@suspend.html
> 
>   * igt@gem_eio@unwedge-stress:
> - shard-tglb: [PASS][12] -> [FAIL][13] ([i915#5784])
>[12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-tglb7/igt@gem_...@unwedge-stress.html
>[13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-tglb1/igt@gem_...@unwedge-stress.html
> 
>   * igt@gem_exec_balancer@parallel:
> - shard-iclb: [PASS][14] -> [SKIP][15] ([i915#4525])
>[14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-iclb1/igt@gem_exec_balan...@parallel.html
>[15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-iclb5/igt@gem_exec_balan...@parallel.html
> 
>   * igt@gem_exec_capture@pi@vcs0:
> - shard-iclb: [PASS][16] -> [INCOMPLETE][17] ([i915#3371])
>[16]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-iclb1/igt@gem_exec_capture@p...@vcs0.html
>[17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-iclb5/igt@gem_exec_capture@p...@vcs0.html
> 
>   * igt@gem_exec_fair@basic-none@vcs0:
> - shard-kbl:  [PASS][18] -> [FAIL][19] ([i915#2842]) +2 similar 
> issues
>[18]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs0.html
>[19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104770v2/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs0.html
> 
>   * igt@gem_exec_fair@basic-pace-share@rcs0:
> - shard-glk:  [PASS][20] -> [FAIL][21] ([i915#2842])
>[20]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11768/shard-glk8/igt@gem_exe

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: tweak the ordering in cpu_write_needs_clflush

[Matthew Auld]

On Mon, 27 Jun 2022 at 12:49, Patchwork
 wrote:
>
> Patch Details
> Series:drm/i915: tweak the ordering in cpu_write_needs_clflush
> URL:https://patchwork.freedesktop.org/series/105503/
> State:failure
> Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/index.html
>
> CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_105503v1_full
>
> Summary
>
> FAILURE
>
> Serious unknown changes coming with Patchwork_105503v1_full absolutely need 
> to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_105503v1_full, please notify your bug team to allow 
> them
> to document this new failure mode, which will reduce false positives in CI.
>
> Participating hosts (13 -> 13)
>
> No changes in participating hosts
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in 
> Patchwork_105503v1_full:
>
> IGT changes
>
> Possible regressions
>
> igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
>
> shard-skl: NOTRUN -> FAIL +1 similar issue

For sure unrelated. Patch only impacts discrete.

>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
>
> {shard-dg1}: NOTRUN -> SKIP +15 similar issues
>
> igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-edp-1-32x32:
>
> {shard-rkl}: NOTRUN -> SKIP +3 similar issues
>
> New tests
>
> New tests have been introduced between CI_DRM_11795_full and 
> Patchwork_105503v1_full:
>
> New IGT tests (7)
>
> igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-128x128:
>
> Statuses : 1 pass(s)
> Exec time: [3.23] s
>
> igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-256x256:
>
> Statuses : 1 pass(s)
> Exec time: [3.23] s
>
> igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-64x64:
>
> Statuses : 1 pass(s)
> Exec time: [3.30] s
>
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-hdmi-a-3:
>
> Statuses : 1 pass(s)
> Exec time: [0.56] s
>
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-hdmi-a-3:
>
> Statuses : 1 pass(s)
> Exec time: [0.46] s
>
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-hdmi-a-3:
>
> Statuses : 1 pass(s)
> Exec time: [0.46] s
>
> igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-hdmi-a-3:
>
> Statuses : 1 pass(s)
> Exec time: [0.46] s
>
> Known issues
>
> Here are the changes found in Patchwork_105503v1_full that come from known 
> issues:
>
> IGT changes
>
> Issues hit
>
> igt@gem_ctx_persistence@hang:
>
> shard-skl: NOTRUN -> SKIP (fdo#109271) +230 similar issues
>
> igt@gem_exec_balancer@parallel-balancer:
>
> shard-iclb: PASS -> SKIP (i915#4525)
>
> igt@gem_exec_fair@basic-none-share@rcs0:
>
> shard-glk: PASS -> FAIL (i915#2842)
>
> igt@gem_exec_fair@basic-none@vcs1:
>
> shard-kbl: PASS -> FAIL (i915#2842) +2 similar issues
>
> igt@gem_exec_fair@basic-pace-solo@rcs0:
>
> shard-tglb: PASS -> FAIL (i915#2842)
>
> igt@gem_exec_suspend@basic-s3@smem:
>
> shard-skl: PASS -> INCOMPLETE (i915#4939)
>
> igt@gem_lmem_swapping@heavy-verify-multi:
>
> shard-apl: NOTRUN -> SKIP (fdo#109271 / i915#4613)
>
> shard-tglb: NOTRUN -> SKIP (i915#4613)
>
> igt@gem_lmem_swapping@smem-oom:
>
> shard-skl: NOTRUN -> SKIP (fdo#109271 / i915#4613) +2 similar issues
>
> igt@gem_lmem_swapping@verify-random:
>
> shard-kbl: NOTRUN -> SKIP (fdo#109271 / i915#4613)
>
> igt@gem_pread@exhaustion:
>
> shard-kbl: NOTRUN -> WARN (i915#2658)
>
> igt@gem_pxp@regular-baseline-src-copy-readible:
>
> shard-tglb: NOTRUN -> SKIP (i915#4270)
>
> igt@gem_softpin@evict-snoop-interruptible:
>
> shard-iclb: NOTRUN -> SKIP (fdo#109312)
>
> igt@gen7_exec_parse@chained-batch:
>
> shard-tglb: NOTRUN -> SKIP (fdo#109289)
>
> igt@gen9_exec_parse@allowed-all:
>
> shard-glk: PASS -> DMESG-WARN (i915#5566 / i915#716) +1 similar issue
>
> igt@gen9_exec_parse@allowed-single:
>
> shard-apl: PASS -> DMESG-WARN (i915#5566 / i915#716)
>
> igt@gen9_exec_parse@shadow-peek:
>
> shard-iclb: NOTRUN -> SKIP (i915#2856)
>
> igt@i915_module_load@reload-no-display:
>
> shard-tglb: PASS -> DMESG-WARN (i915#2867)
>
> igt@i915_query@query-topology-unsupported:
>
> shard-tglb: NOTRUN -> SKIP (fdo#109302)
>
> igt@i915_suspend@forcewake:
>
> shard-kbl: PASS -> DMESG-WARN (i915#180) +1 similar issue
>
> igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
>
> shard-iclb: NOTRUN -> SKIP (i915#5286)
>
> igt@kms_big_fb@linear-32bpp-rotate-270:
>
> shard-tglb: NOTRUN -> SKIP (fdo#111614)
>
> igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
>
> shard-skl: NOTRUN -> FAIL (i915#3743)
>
> igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
>
> shard-skl: NOTRUN -> FAIL (i915#3763)
>
> igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
>
> shard-skl: NOTRUN -> SKIP (fdo#109271 / i915#3886) +10 similar issues
>
> shard-iclb: NOTRUN -> SKIP (fdo#109278 / i915#3886) +1 similar issue
>
> igt@kms_ccs@pipe-b-

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: tweak the ordering in cpu_write_needs_clflush

[Patchwork]

== Series Details ==

Series: drm/i915: tweak the ordering in cpu_write_needs_clflush
URL   : https://patchwork.freedesktop.org/series/105503/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11795_full -> Patchwork_105503v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105503v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105503v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105503v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-skl:  NOTRUN -> [FAIL][1] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-skl10/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions-varying-size.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][2] +15 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-dg1-16/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement@pipe-b-edp-1-32x32:
- {shard-rkl}:NOTRUN -> [SKIP][3] +3 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movem...@pipe-b-edp-1-32x32.html

  
New tests
-

  New tests have been introduced between CI_DRM_11795_full and 
Patchwork_105503v1_full:

### New IGT tests (7) ###

  * igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [3.23] s

  * igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [3.23] s

  * igt@kms_cursor_edge_walk@right-edge@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [3.30] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.56] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.46] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.46] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.46] s

  

Known issues


  Here are the changes found in Patchwork_105503v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@hang:
- shard-skl:  NOTRUN -> [SKIP][4] ([fdo#109271]) +230 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-skl4/igt@gem_ctx_persiste...@hang.html

  * igt@gem_exec_balancer@parallel-balancer:
- shard-iclb: [PASS][5] -> [SKIP][6] ([i915#4525])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-iclb4/igt@gem_exec_balan...@parallel-balancer.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-iclb3/igt@gem_exec_balan...@parallel-balancer.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk:  [PASS][7] -> [FAIL][8] ([i915#2842])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-glk8/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-glk2/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl:  [PASS][9] -> [FAIL][10] ([i915#2842]) +2 similar 
issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs1.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-tglb: [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-tglb5/igt@gem_exec_fair@basic-pace-s...@rcs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105503v1/shard-tglb2/igt@gem_exec_fair@basic-pace-s...@rcs0.html

  * igt@gem_exec_suspend@basic-s3@smem:
- shard-skl:  [PASS][13] -> [INCOMPLETE][14] ([i915#4939])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11795/shard-skl4/igt@gem_exec_suspend@basic...@smem.html
   [14]: 
https://intel-gfx

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3)
URL   : https://patchwork.freedesktop.org/series/90164/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11794_full -> Patchwork_90164v3_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_90164v3_full absolutely need to 
be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_90164v3_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_90164v3_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-glk7/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-glk2/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-32x32:
- {shard-tglu}:   NOTRUN -> [SKIP][3] +23 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglu-1/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-32x32.html

  * igt@kms_cursor_crc@cursor-onscreen@pipe-a-hdmi-a-1-32x10:
- {shard-dg1}:NOTRUN -> [SKIP][4] +31 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-dg1-13/igt@kms_cursor_crc@cursor-onscr...@pipe-a-hdmi-a-1-32x10.html

  
New tests
-

  New tests have been introduced between CI_DRM_11794_full and 
Patchwork_90164v3_full:

### New IGT tests (3) ###

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [3.21] s

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [3.23] s

  * igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [3.29] s

  

Known issues


  Here are the changes found in Patchwork_90164v3_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-skl:  ([PASS][5], [PASS][6], [PASS][7], [PASS][8], 
[PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], 
[PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], 
[PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26]) -> 
([PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], 
[PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], 
[PASS][39], [FAIL][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], 
[PASS][45], [PASS][46], [PASS][47]) ([i915#5032])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl9/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl9/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl9/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl7/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl7/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl6/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl6/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl6/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl3/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl3/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl3/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl2/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl2/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl10/boot.html
   [25]: 
https://intel-gfx-ci.01.o

[Intel-gfx] [PATCH] drm/i915/dp: wait on timeout before retry

[Arun R Murthy]

On linktraining error/timeout before retry need to wait for 400usec as
per the DP CTS spec1.2
The patch with commit id
74ebf294a1dd816bdc248ac733009a8915d59eb5
drm/i915: Add a delay in Displayport AUX transactions for
compliance testing
removes this delay mentioning the hardware already meets this
requirement, but as per the spec the delay mentioned in the spec
specifies how long to wait for the receiver response before timeout. So
the delay here to wait for timeout and not a delay after timeout. The DP
spec specifies a delay after timeout and hence adding this delay.

Signed-off-by: Arun R Murthy 
---
 drivers/gpu/drm/i915/display/intel_dp_aux.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c 
b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 2bc119374555..a1fef1645d6a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -286,13 +286,9 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
/*
 * DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2
 *   400us delay required for errors and timeouts
-*   Timeout errors from the HW already meet this
-*   requirement so skip to next iteration
 */
-   if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR)
-   continue;
-
-   if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
+   if (status & (DP_AUX_CH_CTL_RECEIVE_ERROR |
+   DP_AUX_CH_CTL_TIME_OUT_ERROR)) {
usleep_range(400, 500);
continue;
}
-- 
2.25.1

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Increase timeout for live_parallel_switch

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Increase timeout for live_parallel_switch
URL   : https://patchwork.freedesktop.org/series/105490/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11794_full -> Patchwork_105490v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105490v1_full:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_render_copy@yf-tiled-to-vebox-x-tiled:
- {shard-rkl}:NOTRUN -> [SKIP][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v1/shard-rkl-5/igt@gem_render_c...@yf-tiled-to-vebox-x-tiled.html

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-32x32:
- {shard-tglu}:   NOTRUN -> [SKIP][2] +23 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v1/shard-tglu-1/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-32x32.html

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][3] +15 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105490v1/shard-dg1-12/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  
New tests
-

  New tests have been introduced between CI_DRM_11794_full and 
Patchwork_105490v1_full:

### New IGT tests (8) ###

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.31] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.15] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.17] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.15] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.73] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.23] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.31] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.27] s

  

Known issues


  Here are the changes found in Patchwork_105490v1_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-apl:  ([PASS][4], [PASS][5], [PASS][6], [PASS][7], 
[PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], 
[PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], 
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], 
[PASS][26], [FAIL][27], [PASS][28]) ([i915#4386]) -> ([PASS][29], [PASS][30], 
[PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], 
[PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], 
[PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], 
[PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [22]: 
https://intel-gfx-ci.01.org

Re: [Intel-gfx] [PATCH v2 10/12] drm/i915/ttm: handle blitter failure on DG2

[Matthew Auld]

On Thu, 23 Jun 2022 at 16:31, Matthew Auld  wrote:
>
> On 23/06/2022 15:52, Christian König wrote:
> > Am 23.06.22 um 16:13 schrieb Matthew Auld:
> >> [SNIP]
>  TTM_BO_VM_NUM_PREFAULT);
>  +   /*
>  +* Ensure we check for any fatal errors if we had to
>  move/clear
>  +* the object. The device should already be wedged if
>  we hit
>  +* such an error.
>  +*/
>  +   if (i915_gem_object_wait_moving_fence(obj, true))
>  +   ret = VM_FAULT_SIGBUS;
> >>>
> >>> We should check with Christian here whether it's ok to export
> >>> ttm_bo_vm_fault_idle() as a helper, so that we release the proper locks
> >>> while waiting. The above is not a bug, but causes us to wait for the
> >>> moving fence under the mmap_lock, which is considered bad.
> >>
> >> Christian, any chance we can export ttm_bo_vm_fault_idle() for use
> >> here? Or is that NACK?
> >
> > Well question is why you want to do this? E.g. what's the background?
>
> Right, so basically we need to prevent userspace from being able to
> access the pages for the object, if the ttm blit/move hits an error
> (some kind of GPU error). Normally we can just fall back to
> memcpy/memset to ensure we never leak anything (i915 is never allowed to
> hand userspace non-zeroed memory even for VRAM), but with small-BAR
> systems this might not be possible. Anyway, if we do hit an error during
> the ttm move we might now mark the object as being in an "unknown state"
> before signalling the fence. Later when binding the GPU page-tables we
> check for the "unknown state" and skip the bind (it will end up just
> pointing to some scratch pages instead). And then here on the CPU side,
> we need to sync against all the kernel fences, before then checking for
> the potential "unknown state", which is then handled by returning SIBUS.
> The i915_gem_object_wait_moving_fence() is basically doing exactly that,
> but it looks dumb compared to what ttm_bo_vm_fault_idle() is doing. And
> then while all this going on we then also "wedge" the device to
> basically signal that it's busted, which should prevent further work
> being submitted to the gpu.

Gentle ping?

>
> >
> > Regards,
> > Christian.

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/edid: expand on struct drm_edid usage (rev4)

[Patchwork]

== Series Details ==

Series: drm/edid: expand on struct drm_edid usage (rev4)
URL   : https://patchwork.freedesktop.org/series/104309/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11794_full -> Patchwork_104309v4_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_104309v4_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_104309v4_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_104309v4_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-glk7/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v4/shard-glk7/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html

  * igt@syncobj_timeline@wait-all-for-submit-snapshot:
- shard-skl:  [PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl10/igt@syncobj_timel...@wait-all-for-submit-snapshot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v4/shard-skl9/igt@syncobj_timel...@wait-all-for-submit-snapshot.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-32x32:
- {shard-tglu}:   NOTRUN -> [SKIP][5] +23 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v4/shard-tglu-3/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-32x32.html

  * igt@kms_cursor_crc@cursor-onscreen@pipe-a-hdmi-a-1-32x10:
- {shard-dg1}:NOTRUN -> [SKIP][6] +31 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104309v4/shard-dg1-15/igt@kms_cursor_crc@cursor-onscr...@pipe-a-hdmi-a-1-32x10.html

  
New tests
-

  New tests have been introduced between CI_DRM_11794_full and 
Patchwork_104309v4_full:

### New IGT tests (8) ###

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.31] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.18] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.17] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.15] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.78] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.34] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.22] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.28] s

  

Known issues


  Here are the changes found in Patchwork_104309v4_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-apl:  ([PASS][7], [PASS][8], [PASS][9], [PASS][10], 
[PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], 
[PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], 
[PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], 
[PASS][29], [FAIL][30], [PASS][31]) ([i915#4386]) -> ([PASS][32], [PASS][33], 
[PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], 
[PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], 
[PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], 
[PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [15]: 
https:/

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dsi: add payload receiving code (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: add payload receiving code (rev6)
URL   : https://patchwork.freedesktop.org/series/105096/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11794_full -> Patchwork_105096v6_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105096v6_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105096v6_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105096v6_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-glk7/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105096v6/shard-glk2/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-32x32:
- {shard-tglu}:   NOTRUN -> [SKIP][3] +23 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105096v6/shard-tglu-2/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-32x32.html

  * {igt@kms_cursor_crc@cursor-offscreen@pipe-d-hdmi-a-1-32x10}:
- {shard-dg1}:NOTRUN -> [SKIP][4] +15 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105096v6/shard-dg1-15/igt@kms_cursor_crc@cursor-offscr...@pipe-d-hdmi-a-1-32x10.html

  
Known issues


  Here are the changes found in Patchwork_105096v6_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-apl:  ([PASS][5], [PASS][6], [PASS][7], [PASS][8], 
[PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], 
[PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], 
[PASS][21], [PASS][22], [PASS][23], [PASS][24], [FAIL][25], [PASS][26], 
[PASS][27], [PASS][28], [PASS][29]) ([i915#4386]) -> ([PASS][30], [PASS][31], 
[PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], 
[PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], 
[PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], 
[PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [30]: 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: i915_irq - drop unexpected word "the" in the comments

[Patchwork]

== Series Details ==

Series: drm/i915: i915_irq - drop unexpected word "the" in the comments
URL   : https://patchwork.freedesktop.org/series/105477/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11794_full -> Patchwork_105477v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105477v1_full:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_render_copy@yf-tiled-to-vebox-x-tiled:
- {shard-rkl}:NOTRUN -> [SKIP][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105477v1/shard-rkl-5/igt@gem_render_c...@yf-tiled-to-vebox-x-tiled.html

  * igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-32x32:
- {shard-tglu}:   NOTRUN -> [SKIP][2] +23 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105477v1/shard-tglu-4/igt@kms_cursor_crc@cursor-offscr...@pipe-c-hdmi-a-1-32x32.html

  * igt@kms_cursor_crc@cursor-onscreen@pipe-a-hdmi-a-1-32x10:
- {shard-dg1}:NOTRUN -> [SKIP][3] +31 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105477v1/shard-dg1-17/igt@kms_cursor_crc@cursor-onscr...@pipe-a-hdmi-a-1-32x10.html

  
New tests
-

  New tests have been introduced between CI_DRM_11794_full and 
Patchwork_105477v1_full:

### New IGT tests (8) ###

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.33] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.16] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.16] s

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [2.15] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.59] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.25] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.34] s

  * igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [17.22] s

  

Known issues


  Here are the changes found in Patchwork_105477v1_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-apl:  ([PASS][4], [PASS][5], [PASS][6], [PASS][7], 
[PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], 
[PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], 
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], 
[PASS][26], [FAIL][27], [PASS][28]) ([i915#4386]) -> ([PASS][29], [PASS][30], 
[PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], 
[PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], 
[PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], 
[PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
   [22]: 
https://intel-gfx-ci.01.org/t

Re: [Intel-gfx] [PATCH v6 3/3] drm/doc/rfc: VM_BIND uapi definition

[Daniel Vetter]

On Sat, Jun 25, 2022 at 06:08:21PM -0700, Niranjana Vishwanathapura wrote:
> On Sat, Jun 25, 2022 at 12:02:19PM -0700, Niranjana Vishwanathapura wrote:
> > On Fri, Jun 24, 2022 at 10:07:26PM +0200, Daniel Vetter wrote:
> > > On Fri, Jun 24, 2022 at 10:49:36AM -0700, Niranjana Vishwanathapura wrote:
> > > > VM_BIND and related uapi definitions
> > > > 
> > > > v2: Reduce the scope to simple Mesa use case.
> > > > v3: Expand VM_UNBIND documentation and add
> > > >I915_GEM_VM_BIND/UNBIND_FENCE_VALID
> > > >and I915_GEM_VM_BIND_TLB_FLUSH flags.
> > > > v4: Remove I915_GEM_VM_BIND_TLB_FLUSH flag and add additional
> > > >documentation for vm_bind/unbind.
> > > > v5: Remove TLB flush requirement on VM_UNBIND.
> > > >Add version support to stage implementation.
> > > > v6: Define and use drm_i915_gem_timeline_fence structure for
> > > >all timeline fences.
> > > > 
> > > > Signed-off-by: Niranjana Vishwanathapura 
> > > > 
> > > > ---
> > > > Documentation/gpu/rfc/i915_vm_bind.h | 286 +++
> > > > 1 file changed, 286 insertions(+)
> > > > create mode 100644 Documentation/gpu/rfc/i915_vm_bind.h
> > > > 
> > > > diff --git a/Documentation/gpu/rfc/i915_vm_bind.h 
> > > > b/Documentation/gpu/rfc/i915_vm_bind.h
> > > > new file mode 100644
> > > > index ..c784dc0c48b3
> > > > --- /dev/null
> > > > +++ b/Documentation/gpu/rfc/i915_vm_bind.h
> > > > @@ -0,0 +1,286 @@
> > > > +/* SPDX-License-Identifier: MIT */
> > > > +/*
> > > > + * Copyright © 2022 Intel Corporation
> > > > + */
> > > > +
> > > > +/**
> > > > + * DOC: I915_PARAM_HAS_VM_BIND
> > > > + *
> > > > + * VM_BIND feature availability.
> > > > + * See typedef drm_i915_getparam_t param.
> > > > + * bit[0]: If set, VM_BIND is supported, otherwise not.
> > > > + * bits[8-15]: VM_BIND implementation version.
> > > > + * Version 0 requires in VM_UNBIND call, UMDs to specify the exact 
> > > > mapping
> > > > + * created previously with the VM_BIND call. i.e., i915 will not 
> > > > support
> > > > + * splitting/merging of the mappings created with VM_BIND call (See
> > > > + * struct drm_i915_gem_vm_bind and struct drm_i915_gem_vm_unbind).
> > > 
> > > I think this would read a lot clearer when you make it an itemized list
> > > (or whatever it's called) like we do for atomic properties. Also it reads
> > > a bit strange, so
> > > 
> > > * The following versions of VM_BIND have been defined already:
> > > *
> > > * 0: In VM_UNBIND calls the UMD must specify the exact mappings created
> > > *previously with VM_BIND, the ioctl will not support unbinding
> > > *multiple mappings or splitting them. Similar restriction applies to
> > > *VM_BIND.
> > > *
> > > * 1: The restrictions on unbinding partial or multiple mappings is
> > > *lifted, similarly binding will replace any mappings in the given 
> > > range.
> > > 
> > > Pls check I got the formatting right, I didn't check with sphinx :-)
> > > 
> > > Bikeshed aside: This is a bit a strange encoding, usually we just use a
> > > simple number and start with 1 (so that 0 is reserved for "doesn't exist")
> > > and then have a #define for each version.
> > > 
> > 
> > Thanks Daniel,
> > 
> > Ok, will eloborate and define the versions.
> 
> Will rename this field to I915_PARAM_VM_BIND_VERSION with 0 meaning no vm_bind
> support.
> 
> > 
> > > > + */
> > > > +#define I915_PARAM_HAS_VM_BIND 57
> > > > +
> > > > +/**
> > > > + * DOC: I915_VM_CREATE_FLAGS_USE_VM_BIND
> > > > + *
> > > > + * Flag to opt-in for VM_BIND mode of binding during VM creation.
> > > > + * See struct drm_i915_gem_vm_control flags.
> > > > + *
> > > > + * The older execbuf2 ioctl will not support VM_BIND mode of operation.
> > > > + * For VM_BIND mode, we have new execbuf3 ioctl which will not accept 
> > > > any
> > > > + * execlist (See struct drm_i915_gem_execbuffer3 for more details).
> > > > + *
> > > 
> > > Empty line here.
> > 
> > Ok, will fix.
> > 
> > > 
> > > > + */
> > > > +#define I915_VM_CREATE_FLAGS_USE_VM_BIND   (1 << 0)
> > > > +
> > > > +/* VM_BIND related ioctls */
> > > > +#define DRM_I915_GEM_VM_BIND   0x3d
> > > > +#define DRM_I915_GEM_VM_UNBIND 0x3e
> > > > +#define DRM_I915_GEM_EXECBUFFER3   0x3f
> > > > +
> > > > +#define DRM_IOCTL_I915_GEM_VM_BIND 
> > > > DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_BIND, struct 
> > > > drm_i915_gem_vm_bind)
> > > > +#define DRM_IOCTL_I915_GEM_VM_UNBIND   
> > > > DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_UNBIND, struct 
> > > > drm_i915_gem_vm_bind)
> > > > +#define DRM_IOCTL_I915_GEM_EXECBUFFER3 
> > > > DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER3, struct 
> > > > drm_i915_gem_execbuffer3)
> > > > +
> > > > +/**
> > > > + * struct drm_i915_gem_timeline_fence - An input or output timeline 
> > > > fence.
> > > > + *
> > > > + * The operation will wait for input fence to signal.
> > > > + *
> > > > + * The returned output fence will be signaled after the 

Re: [Intel-gfx] [PATCH v6 3/3] drm/doc/rfc: VM_BIND uapi definition

[Daniel Vetter]

On Sat, Jun 25, 2022 at 12:02:19PM -0700, Niranjana Vishwanathapura wrote:
> On Fri, Jun 24, 2022 at 10:07:26PM +0200, Daniel Vetter wrote:
> > On Fri, Jun 24, 2022 at 10:49:36AM -0700, Niranjana Vishwanathapura wrote:
> > > VM_BIND and related uapi definitions
> > > 
> > > v2: Reduce the scope to simple Mesa use case.
> > > v3: Expand VM_UNBIND documentation and add
> > > I915_GEM_VM_BIND/UNBIND_FENCE_VALID
> > > and I915_GEM_VM_BIND_TLB_FLUSH flags.
> > > v4: Remove I915_GEM_VM_BIND_TLB_FLUSH flag and add additional
> > > documentation for vm_bind/unbind.
> > > v5: Remove TLB flush requirement on VM_UNBIND.
> > > Add version support to stage implementation.
> > > v6: Define and use drm_i915_gem_timeline_fence structure for
> > > all timeline fences.
> > > 
> > > Signed-off-by: Niranjana Vishwanathapura 
> > > 
> > > ---
> > >  Documentation/gpu/rfc/i915_vm_bind.h | 286 +++
> > >  1 file changed, 286 insertions(+)
> > >  create mode 100644 Documentation/gpu/rfc/i915_vm_bind.h
> > > 
> > > diff --git a/Documentation/gpu/rfc/i915_vm_bind.h 
> > > b/Documentation/gpu/rfc/i915_vm_bind.h
> > > new file mode 100644
> > > index ..c784dc0c48b3
> > > --- /dev/null
> > > +++ b/Documentation/gpu/rfc/i915_vm_bind.h
> > > @@ -0,0 +1,286 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright © 2022 Intel Corporation
> > > + */
> > > +
> > > +/**
> > > + * DOC: I915_PARAM_HAS_VM_BIND
> > > + *
> > > + * VM_BIND feature availability.
> > > + * See typedef drm_i915_getparam_t param.
> > > + * bit[0]: If set, VM_BIND is supported, otherwise not.
> > > + * bits[8-15]: VM_BIND implementation version.
> > > + * Version 0 requires in VM_UNBIND call, UMDs to specify the exact 
> > > mapping
> > > + * created previously with the VM_BIND call. i.e., i915 will not support
> > > + * splitting/merging of the mappings created with VM_BIND call (See
> > > + * struct drm_i915_gem_vm_bind and struct drm_i915_gem_vm_unbind).
> > 
> > I think this would read a lot clearer when you make it an itemized list
> > (or whatever it's called) like we do for atomic properties. Also it reads
> > a bit strange, so
> > 
> > * The following versions of VM_BIND have been defined already:
> > *
> > * 0: In VM_UNBIND calls the UMD must specify the exact mappings created
> > *previously with VM_BIND, the ioctl will not support unbinding
> > *multiple mappings or splitting them. Similar restriction applies to
> > *VM_BIND.
> > *
> > * 1: The restrictions on unbinding partial or multiple mappings is
> > *lifted, similarly binding will replace any mappings in the given range.
> > 
> > Pls check I got the formatting right, I didn't check with sphinx :-)
> > 
> > Bikeshed aside: This is a bit a strange encoding, usually we just use a
> > simple number and start with 1 (so that 0 is reserved for "doesn't exist")
> > and then have a #define for each version.
> > 
> 
> Thanks Daniel,
> 
> Ok, will eloborate and define the versions.
> 
> > > + */
> > > +#define I915_PARAM_HAS_VM_BIND   57
> > > +
> > > +/**
> > > + * DOC: I915_VM_CREATE_FLAGS_USE_VM_BIND
> > > + *
> > > + * Flag to opt-in for VM_BIND mode of binding during VM creation.
> > > + * See struct drm_i915_gem_vm_control flags.
> > > + *
> > > + * The older execbuf2 ioctl will not support VM_BIND mode of operation.
> > > + * For VM_BIND mode, we have new execbuf3 ioctl which will not accept any
> > > + * execlist (See struct drm_i915_gem_execbuffer3 for more details).
> > > + *
> > 
> > Empty line here.
> 
> Ok, will fix.
> 
> > 
> > > + */
> > > +#define I915_VM_CREATE_FLAGS_USE_VM_BIND (1 << 0)
> > > +
> > > +/* VM_BIND related ioctls */
> > > +#define DRM_I915_GEM_VM_BIND 0x3d
> > > +#define DRM_I915_GEM_VM_UNBIND   0x3e
> > > +#define DRM_I915_GEM_EXECBUFFER3 0x3f
> > > +
> > > +#define DRM_IOCTL_I915_GEM_VM_BIND   
> > > DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_BIND, struct 
> > > drm_i915_gem_vm_bind)
> > > +#define DRM_IOCTL_I915_GEM_VM_UNBIND 
> > > DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_UNBIND, struct 
> > > drm_i915_gem_vm_bind)
> > > +#define DRM_IOCTL_I915_GEM_EXECBUFFER3   
> > > DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER3, struct 
> > > drm_i915_gem_execbuffer3)
> > > +
> > > +/**
> > > + * struct drm_i915_gem_timeline_fence - An input or output timeline 
> > > fence.
> > > + *
> > > + * The operation will wait for input fence to signal.
> > > + *
> > > + * The returned output fence will be signaled after the completion of the
> > > + * operation.
> > > + */
> > > +struct drm_i915_gem_timeline_fence {
> > > + /** @handle: User's handle for a drm_syncobj to wait on or signal. */
> > > + __u32 handle;
> > > +
> > > + /**
> > > +  * @flags: Supported flags are:
> > > +  *
> > > +  * I915_TIMELINE_FENCE_WAIT:
> > > +  * Wait for the input fence before the operation.
> > > +  *
> > > +  * I915_TIMELINE_FENCE_SIGNAL:
> > > +  * Ret

Re: [Intel-gfx] [PATCH v3 3/3] drm/doc/rfc: VM_BIND uapi definition

[Tvrtko Ursulin]

On 24/06/2022 21:23, Zeng, Oak wrote:

Let's compare "tlb invalidate at vm unbind" vs "tlb invalidate at backing 
storage":

Correctness:
consider this sequence of:
1. unbind va1 from pa1,
2. then bind va1 to pa2. //user space has the freedom to do this as it manages 
virtual address space
3. Submit shader code using va1,
4. Then retire pa1.

If you don't perform tlb invalidate at step #1, in step #3, shader will use 
stale entries in tlb and pa1 will be used for the shader. User want to use pa2. 
So I don't think invalidate tlb at step #4 make correctness.


Define step 3. Is it a new execbuf? If so then there will be a TLB flush 
there. Unless the plan is to stop doing that with eb3 but I haven't 
picked up on that anywhere so far.



Performance:
It is straight forward to invalidate tlb at step 1. If platform support range 
based tlb invalidation, we can perform range based invalidation easily at step1.


If the platform supports range base yes. If it doesn't _and_ the flush 
at unbind is not needed for 99% of use cases then it is simply a waste.



If you do it at step 4, you either need to perform a whole gt tlb invalidation 
(worse performance), or you need to record all the VAs that this pa has been 
bound to and invalidate all the VA ranges - ugly program.


Someone can setup some benchmarking? :)

Regards,

Tvrtko




Thanks,
Oak


-Original Message-
From: Tvrtko Ursulin 
Sent: June 24, 2022 4:32 AM
To: Zeng, Oak ; Landwerlin, Lionel G
; Vishwanathapura, Niranjana

Cc: Zanoni, Paulo R ; intel-
g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Hellstrom,
Thomas ; Wilson, Chris P
; Vetter, Daniel ;
christian.koe...@amd.com; Auld, Matthew 
Subject: Re: [Intel-gfx] [PATCH v3 3/3] drm/doc/rfc: VM_BIND uapi definition


On 23/06/2022 22:05, Zeng, Oak wrote:

-Original Message-
From: Intel-gfx  On Behalf
Of Tvrtko Ursulin
Sent: June 23, 2022 7:06 AM
To: Landwerlin, Lionel G ;
Vishwanathapura, Niranjana 
Cc: Zanoni, Paulo R ;
intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
Hellstrom, Thomas ; Wilson, Chris P
; Vetter, Daniel ;
christian.koe...@amd.com; Auld, Matthew 
Subject: Re: [Intel-gfx] [PATCH v3 3/3] drm/doc/rfc: VM_BIND uapi
definition


On 23/06/2022 09:57, Lionel Landwerlin wrote:

On 23/06/2022 11:27, Tvrtko Ursulin wrote:


After a vm_unbind, UMD can re-bind to same VA range against an
active VM.
Though I am not sue with Mesa usecase if that new mapping is
required for running GPU job or it will be for the next
submission. But ensuring the tlb flush upon unbind, KMD can ensure
correctness.


Isn't that their problem? If they re-bind for submitting _new_ work
then they get the flush as part of batch buffer pre-amble.


In the non sparse case, if a VA range is unbound, it is invalid to
use that range for anything until it has been rebound by something else.

We'll take the fence provided by vm_bind and put it as a wait fence
on the next execbuffer.

It might be safer in case of memory over fetching?


TLB flush will have to happen at some point right?

What's the alternative to do it in unbind?


Currently TLB flush happens from the ring before every BB_START and
also when i915 returns the backing store pages to the system.



Can you explain more why tlb flush when i915 retire the backing storage? I

never figured that out when I looked at the codes. As I understand it, tlb
caches the gpu page tables which map a va to a pa. So it is straight forward to
me that we perform a tlb flush when we change the page table (either at vm
bind time or unbind time. Better at unbind time for performance reason).

I don't know what performs better - someone can measure the two
approaches? Certainly on platforms where we only have global TLB flushing
the cost is quite high so my thinking was to allow i915 to control when it will
be done and not guarantee it in the uapi if it isn't needed for security 
reasons.


But it is rather tricky to me to flush tlb when we retire a backing storage. I

don't see how backing storage can be connected to page table. Let's say user
unbind va1 from pa1, then bind va1 to pa2. Then retire pa1. Submit shader
code using va1. If we don't tlb flush after unbind va1, the new shader code
which is supposed to use pa2 will still use pa1 due to the stale entries in tlb,
right? The point is, tlb cached is tagged with virtual address, not physical
address. so after we unbind va1 from pa1, regardless we retire pa1 or not,
va1 can be bound to another pa2.

When you say "retire pa1" I will assume you meant release backing storage
for pa1. At this point i915 currently does do the TLB flush and that ensures no
PTE can point to pa1.

This approach deals with security of the system as a whole. Client may still
cause rendering corruption or a GPU hang for itself but that should be
completely isolated. (This is the part where you say "regardless if we retire
pa1 or not" I think.)

But I think those are advanced use cases where userspace wants to
manipul

Re: [Intel-gfx] [PATCH] drm/i915: tweak the ordering in cpu_write_needs_clflush

[Gwan-gyeong Mun]

Thanks for fixing this issue.
Looks good to me.

Reviewed-by: Gwan-gyeong Mun 

On 6/22/22 6:59 PM, Matthew Auld wrote:

For imported dma-buf objects we leave the object as cache_coherent = 0
across all platforms, which is reasonable given that have no clue what
the memory underneath is, and its not like the driver can ever manually
clflush the pages anyway (like with i915_gem_clflush_object) for such
objects. However on discrete we choose to treat cache_dirty = true as a
programmer error, leading to a warning. The simplest fix looks to be to
just change the ordering in cpu_write_needs_clflush to prevent ever
setting cache_dirty for dma-buf objects on discrete.

Fixes: d028a7690d87 ("drm/i915/dmabuf: Fix prime_mmap to work when using LMEM")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5266
Signed-off-by: Matthew Auld 
Cc: Thomas Hellström 
Cc: Gwan-gyeong Mun 
---
  drivers/gpu/drm/i915/gem/i915_gem_domain.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c 
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 3e5d6057b3ef..1674b0c5802b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -35,12 +35,12 @@ bool i915_gem_cpu_write_needs_clflush(struct 
drm_i915_gem_object *obj)
if (obj->cache_dirty)
return false;
  
-	if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE))

-   return true;
-
if (IS_DGFX(i915))
return false;
  
+	if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE))

+   return true;
+
/* Currently in use by HW (display engine)? Keep flushed. */
return i915_gem_object_is_framebuffer(obj);
  }

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/reset: Add additional steps for Wa_22011802037 for execlist backend (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/reset: Add additional steps for Wa_22011802037 for execlist 
backend (rev3)
URL   : https://patchwork.freedesktop.org/series/103837/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11793_full -> Patchwork_103837v3_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 12)
--

  Missing(1): shard-dg1 

Known issues


  Here are the changes found in Patchwork_103837v3_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-glk:  ([PASS][1], [PASS][2], [PASS][3], [PASS][4], 
[PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], 
[PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], 
[PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], 
[PASS][24], [PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], 
[PASS][30], [PASS][31], [FAIL][32], [PASS][33], [PASS][34], [PASS][35], 
[PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], 
[PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], 
[PASS][48], [PASS][49], [PASS][50]) ([i915#4392])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk9/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk9/boot.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk9/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk9/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk2/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk3/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk2/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk2/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk3/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk3/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk1/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk5/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk5/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk1/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk1/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk5/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk6/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk6/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk6/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk7/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk7/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk7/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk8/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk8/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11793/shard-glk8/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk9/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk1/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk1/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk1/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk2/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk2/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk2/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk2/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk3/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk3/boot.html
   [36]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk3/boot.html
   [37]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk5/boot.html
   [38]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk5/boot.html
   [39]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk5/boot.html
   [40]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk6/boot.html
   [41]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk6/boot.html
   [42]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v3/shard-glk6/boot.html
   [43]: 
https://intel-gfx-ci.01.org/tree/

Re: [Intel-gfx] [PATCH 2/2] iosys-map: Add per-word write

[Thomas Zimmermann]

Hi Lucas

Am 26.06.22 um 23:01 schrieb Lucas De Marchi:

On Fri, Jun 17, 2022 at 01:52:04AM -0700, Lucas De Marchi wrote:

Like was done for read, provide the equivalent for write. Even if
current users are not in the hot path, this should future-proof it.

v2:
 - Remove default from _Generic() - callers wanting to write more
   than u64 should use iosys_map_memcpy_to()
 - Add WRITE_ONCE() cases dereferencing the pointer when using system
   memory


Thomas, do you have any additional concern on this patch regarding your
previous review?


Sorry, your patches simply fell through the cracks. For the patchset:

Reviewed-by: Thomas Zimmermann 

Thanks for the effort you put into this.

Best regards
Thomas



thanks
Lucas De Marchi



Signed-off-by: Lucas De Marchi 
Reviewed-by: Reviewed-by: Christian König  # v1
---
include/linux/iosys-map.h | 42 ++-
1 file changed, 33 insertions(+), 9 deletions(-)

diff --git a/include/linux/iosys-map.h b/include/linux/iosys-map.h
index f59dd00ed202..580e14cd360c 100644
--- a/include/linux/iosys-map.h
+++ b/include/linux/iosys-map.h
@@ -337,9 +337,13 @@ static inline void iosys_map_memset(struct 
iosys_map *dst, size_t offset,

#ifdef CONFIG_64BIT
#define __iosys_map_rd_io_u64_case(val_, vaddr_iomem_)    \
u64: val_ = readq(vaddr_iomem_)
+#define __iosys_map_wr_io_u64_case(val_, vaddr_iomem_)    \
+    u64: writeq(val_, vaddr_iomem_)
#else
#define __iosys_map_rd_io_u64_case(val_, vaddr_iomem_)    \
u64: memcpy_fromio(&(val_), vaddr_iomem__, sizeof(u64))
+#define __iosys_map_wr_io_u64_case(val_, vaddr_iomem_)    \
+    u64: memcpy_toio(vaddr_iomem_, &(val_), sizeof(u64))
#endif

#define __iosys_map_rd_io(val__, vaddr_iomem__, type__) 
_Generic(val__,    \
@@ -354,6 +358,19 @@ static inline void iosys_map_memset(struct 
iosys_map *dst, size_t offset,

val__ = READ_ONCE(*((type__ *)vaddr__));    \
})

+#define __iosys_map_wr_io(val__, vaddr_iomem__, type__) 
_Generic(val__,    \

+    u8: writeb(val__, vaddr_iomem__),    \
+    u16: writew(val__, vaddr_iomem__),    \
+    u32: writel(val__, vaddr_iomem__),    \
+    __iosys_map_wr_io_u64_case(val__, vaddr_iomem__))
+
+#define __iosys_map_wr_sys(val__, vaddr__, type__) ({    \
+    compiletime_assert(sizeof(type__) <= sizeof(u64),    \
+   "Unsupported access size for __iosys_map_wr_sys()"); \
+    WRITE_ONCE(*((type__ *)vaddr__), val__);    \
+})
+
+
/**
 * iosys_map_rd - Read a C-type value from the iosys_map
 *
@@ -386,12 +403,17 @@ static inline void iosys_map_memset(struct 
iosys_map *dst, size_t offset,

 * @type__:    Type of the value being written
 * @val__:    Value to write
 *
- * Write a C-type value to the iosys_map, handling possible 
un-aligned accesses

- * to the mapping.
+ * Write a C type value (u8, u16, u32 and u64) to the iosys_map. For 
other types

+ * or if pointer may be unaligned (and problematic for the architecture
+ * supported), use iosys_map_memcpy_to()
 */
-#define iosys_map_wr(map__, offset__, type__, val__) ({    \
-    type__ val = (val__);    \
-    iosys_map_memcpy_to(map__, offset__, &val, sizeof(val));    \
+#define iosys_map_wr(map__, offset__, type__, val__) ({    \
+    type__ val = (val__);    \
+    if ((map__)->is_iomem) {    \
+    __iosys_map_wr_io(val, (map__)->vaddr_iomem + (offset__), 
type__);\

+    } else {    \
+    __iosys_map_wr_sys(val, (map__)->vaddr + (offset__), 
type__);    \

+    }    \
})

/**
@@ -472,10 +494,12 @@ static inline void iosys_map_memset(struct 
iosys_map *dst, size_t offset,

 * @field__:    Member of the struct to read
 * @val__:    Value to write
 *
- * Write a value to the iosys_map considering its layout is described 
by a C struct
- * starting at @struct_offset__. The field offset and size is 
calculated and the
- * @val__ is written handling possible un-aligned memory accesses. 
Refer to

- * iosys_map_rd_field() for expected usage and memory layout.
+ * Write a value to the iosys_map considering its layout is described 
by a C
+ * struct starting at @struct_offset__. The field offset and size is 
calculated
+ * and the @val__ is written. If the field access would incur in 
un-aligned

+ * access, then either iosys_map_memcpy_to() needs to be used or the
+ * architecture must support it. Refer to iosys_map_rd_field() for 
expected

+ * usage and memory layout.
 */
#define iosys_map_wr_field(map__, struct_offset__, struct_type__, 
field__, val__) ({    \

struct_type__ *s;    \
--
2.36.1



--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Ivo Totev