Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/gt: Only kick the signal worker if there's been an update
Hi Rodrigo,
Many thanks for taking another look at the patches.
On 08.07.2022 16:40, Rodrigo Vivi wrote:
On Fri, Jul 08, 2022 at 04:20:13PM +0200, Karolina Drobnik wrote:
From: Chris Wilson
One impact of commit 047a1b877ed4 ("dma-buf & drm/amdgpu: remove
dma_resv workaround") is that it stores many, many more fences. Whereas
adding an exclusive fence used to remove the shared fence list, that
list is now preserved and the write fences included into the list. Not
just a single write fence, but now a write/read fence per context. That
causes us to have to track more fences than before (albeit half of those
are redundant), and we trigger more interrupts for multi-engine
workloads.
As part of reducing the impact from handling more signaling, we observe
we only need to kick the signal worker after adding a fence iff we have
s/iff/if
This is fine, it means "if, and only if"
good cause to believe that there is work to be done in processing the
fence i.e. we either need to enable the interrupt or the request is
already complete but we don't know if we saw the interrupt and so need
to check signaling.
References: 047a1b877ed4 ("dma-buf & drm/amdgpu: remove dma_resv workaround")
Signed-off-by: Chris Wilson
Signed-off-by: Karolina Drobnik
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
index 9dc9dccf7b09..ecc990ec1b95 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
@@ -399,7 +399,8 @@ static void insert_breadcrumb(struct i915_request *rq)
* the request as it may have completed and raised the interrupt as
* we were attaching it into the lists.
*/
- irq_work_queue(&b->irq_work);
+ if (!b->irq_armed || __i915_request_is_complete(rq))
would we need the READ_ONCE(irq_armed) ?
would we need to use the irq_lock?
I'll rephrase Chris' answer here:
No, it doesn't need either, the workqueuing is unrelated to the
irq_lock. The worker enables the interrupt if there are any breadcrumbs
at the end of its task. When queuing the work, we have to consider the
race conditions:
- If the worker is running and b->irq_armed at this point, we know the
irq will remain armed
- If the worker is running and !b->irq_armed at this point, we will
kick the worker again -- it doesn't make any difference then if the
worker is in the process of trying to arm the irq
- If the worker is not running, b->irq_armed is constant, no race
Ergo, the only race condition is where the worker is trying to arm the
irq, and we end up running the worker a second time.
The only danger to consider is _not_ running the worker when we need to.
Once we put the breadcrumb on the signal, it has to be removed at some
point. Normally this is only performed by the worker, so we have to
confident that the worker will be run. We know that if the irq is armed
(after we have attached this breadcrumb) there must be another run of
the worker.
The other condition then, if the irq is armed, but the breadcrumb is
already completed, we may not see an interrupt from the gpu as the
breadcrumb may have completed as we attached it, keeping the worker
alive, but not noticing the completed breadcrumb in that case, we have
to simulate the interrupt ourselves and give the worker a kick.
The irq_lock is immaterial in both cases.
+ irq_work_queue(&b->irq_work);
}
bool i915_request_enable_breadcrumb(struct i915_request *rq)
--
2.25.1
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Ensure PSR gets disabled if no encoders in new state (rev3)
== Series Details == Series: drm/i915/display: Ensure PSR gets disabled if no encoders in new state (rev3) URL : https://patchwork.freedesktop.org/series/106168/ State : success == Summary == CI Bug Log - changes from CI_DRM_11870 -> Patchwork_106168v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/index.html Participating hosts (33 -> 42) -- Additional (11): fi-kbl-soraka bat-dg1-5 bat-dg2-8 bat-dg2-9 bat-adlp-6 bat-adlp-4 fi-hsw-4770 bat-adln-1 bat-jsl-3 bat-rpls-2 bat-jsl-1 Missing(2): fi-ctg-p8600 fi-hsw-4200u Known issues Here are the changes found in Patchwork_106168v3 that come from known issues: ### IGT changes ### Issues hit * igt@fbdev@nullptr: - bat-dg1-5: NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-dg1-5/igt@fb...@nullptr.html * igt@gem_exec_gttfill@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +8 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/fi-kbl-soraka/igt@gem_exec_gttf...@basic.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-adlp-4: NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-adlp-4/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#4083]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-dg1-5/igt@gem_m...@basic.html * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770:NOTRUN -> [SKIP][7] ([fdo#109271]) +9 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html * igt@gem_tiled_blits@basic: - bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#4077]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-dg1-5/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-5: NOTRUN -> [SKIP][9] ([i915#4079]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-dg1-5/igt@gem_tiled_pread_basic.html - bat-adlp-4: NOTRUN -> [SKIP][10] ([i915#3282]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-adlp-4/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#3012]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html - bat-dg1-5: NOTRUN -> [SKIP][12] ([i915#1155]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gem: - fi-pnv-d510:NOTRUN -> [DMESG-FAIL][13] ([i915#4528]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/fi-pnv-d510/igt@i915_selftest@l...@gem.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][14] ([i915#1886]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-dg1-5: NOTRUN -> [INCOMPLETE][15] ([i915#6011]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html * igt@i915_suspend@basic-s3-without-i915: - bat-adlp-4: NOTRUN -> [SKIP][16] ([i915#5903]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-adlp-4/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][17] ([i915#4212]) +7 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][18] ([i915#4215]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v3/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_busy@basic: - bat-dg1-5: NOTRUN -> [SKIP][19] ([i915#1845] / [i915#4303]) [1
Re: [Intel-gfx] [PATCH] drm/i915/tgl+: Fix HDMI transcoder clock vs. DDI BUF disabling order
Change is according to the specs. I see similar thing for DP as well, and its already taken care in disable DP path, seems like it was missing only for HDMI. LGTM. Reviewed-by: Ankit Nautiyal On 6/17/2022 4:58 PM, Imre Deak wrote: Starting with TGL the disabling order of HDMI transcoder clock vs. DDI BUF has swapped, fix this. There hasn't been any issues seen related to this, but let's follow the spec. Reported-by: Sandeep K Lakkakula Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_ddi.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 272e1bf6006be..4b874c31398a2 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2691,10 +2691,14 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state, dig_port->set_infoframes(encoder, false, old_crtc_state, old_conn_state); - intel_ddi_disable_pipe_clock(old_crtc_state); + if (DISPLAY_VER(dev_priv) < 12) + intel_ddi_disable_pipe_clock(old_crtc_state); intel_disable_ddi_buf(encoder, old_crtc_state); + if (DISPLAY_VER(dev_priv) >= 12) + intel_ddi_disable_pipe_clock(old_crtc_state); + intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain, fetch_and_zero(&dig_port->ddi_io_wakeref));
Re: [Intel-gfx] [PATCH 04/32] drm/i915: gvt: fix kernel-doc trivial warnings
On 2022.07.11 21:24:49 +0100, Mauro Carvalho Chehab wrote: > Some functions seem to have been renamed without updating the kernel-doc > markup causing warnings. Also, struct intel_vgpu_dmabuf_obj is not > properly documented, but has a kerneld-doc markup. > > Fix those warnings: > drivers/gpu/drm/i915/gvt/aperture_gm.c:308: warning: expecting > prototype for inte_gvt_free_vgpu_resource(). Prototype was for > intel_vgpu_free_resource() instead > drivers/gpu/drm/i915/gvt/aperture_gm.c:344: warning: expecting > prototype for intel_alloc_vgpu_resource(). Prototype was for > intel_vgpu_alloc_resource() instead > drivers/gpu/drm/i915/gvt/cfg_space.c:257: warning: expecting prototype > for intel_vgpu_emulate_cfg_read(). Prototype was for > intel_vgpu_emulate_cfg_write() instead > drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or > member 'vgpu' not described in 'intel_vgpu_dmabuf_obj' > drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or > member 'info' not described in 'intel_vgpu_dmabuf_obj' > drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or > member 'dmabuf_id' not described in 'intel_vgpu_dmabuf_obj' > drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or > member 'kref' not described in 'intel_vgpu_dmabuf_obj' > drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or > member 'initref' not described in 'intel_vgpu_dmabuf_obj' > drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or > member 'list' not described in 'intel_vgpu_dmabuf_obj' > drivers/gpu/drm/i915/gvt/handlers.c:3066: warning: expecting prototype > for intel_t_default_mmio_write(). Prototype was for > intel_vgpu_default_mmio_write() instead > drivers/gpu/drm/i915/gvt/mmio_context.c:560: warning: expecting > prototype for intel_gvt_switch_render_mmio(). Prototype was for > intel_gvt_switch_mmio() instead > drivers/gpu/drm/i915/gvt/page_track.c:131: warning: expecting prototype > for intel_vgpu_enable_page_track(). Prototype was for > intel_vgpu_disable_page_track() instead > drivers/gpu/drm/i915/gvt/vgpu.c:215: warning: expecting prototype for > intel_gvt_active_vgpu(). Prototype was for intel_gvt_activate_vgpu() instead > drivers/gpu/drm/i915/gvt/vgpu.c:230: warning: expecting prototype for > intel_gvt_deactive_vgpu(). Prototype was for intel_gvt_deactivate_vgpu() > instead > drivers/gpu/drm/i915/gvt/vgpu.c:358: warning: expecting prototype for > intel_gvt_destroy_vgpu(). Prototype was for intel_gvt_destroy_idle_vgpu() > instead > > Signed-off-by: Mauro Carvalho Chehab > --- Hi, thanks for this, but there're already several fixes in queue right now, e.g https://patchwork.freedesktop.org/series/104302/ and https://patchwork.freedesktop.org/series/104640/, but looks there're other uncaught issues. I'd like to submit current in queue first, then maybe you could update for others? signature.asc Description: PGP signature
Re: [Intel-gfx] susetting the remaining swioltb couplin in DRM
On Mon, Jul 11, 2022 at 04:31:49PM -0400, Rodrigo Vivi wrote: > On Mon, Jul 11, 2022 at 10:26:14AM +0200, Christoph Hellwig wrote: > > Hi i915 and nouveau maintainers, > > > > any chance I could get some help to remove the remaining direct > > driver calls into swiotlb, namely swiotlb_max_segment and > > is_swiotlb_active. Either should not matter to a driver as they > > should be written to the DMA API. > > Hi Christoph, > > while we take a look here, could you please share the reasons > behind sunsetting this calls? Because they are a completely broken layering violation. A driver has absolutely no business knowing the dma-mapping violation. The DMA API reports what we think is all useful constraints (e.g. dma_max_mapping_size()), and provides useful APIs to (e.g. dma_alloc_noncoherent or dma_alloc_noncontiguous) to allocate pages that can be mapped without bounce buffering and drivers should use the proper API instead of poking into one particular implementation and restrict it from changing. swiotlb_max_segment in particular returns a value that isn't actually correct (a driver can't just use all of swiotlb) AND actually doesn't work as is in various scenarious that are becoming more common, most notably host with memory encryption schemes that always require bounce buffering.
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: fix kernel-doc issues
== Series Details ==
Series: drm/i915: fix kernel-doc issues
URL : https://patchwork.freedesktop.org/series/106224/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11870_full -> Patchwork_106224v1_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_106224v1_full:
### IGT changes ###
Possible regressions
* {igt@kms_cursor_crc@cursor-random@pipe-b-hdmi-a-4-32x32} (NEW):
- {shard-dg1}:NOTRUN -> [SKIP][1] +15 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/shard-dg1-12/igt@kms_cursor_crc@cursor-ran...@pipe-b-hdmi-a-4-32x32.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@device_reset@unbind-reset-rebind:
- {shard-dg1}:[PASS][2] -> [INCOMPLETE][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-15/igt@device_re...@unbind-reset-rebind.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/shard-dg1-17/igt@device_re...@unbind-reset-rebind.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-rkl}:NOTRUN -> [WARN][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-i...@vcs0.html
* igt@kms_cursor_legacy@single-move:
- {shard-rkl}:NOTRUN -> [SKIP][5] +1 similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/shard-rkl-5/igt@kms_cursor_leg...@single-move.html
New tests
-
New tests have been introduced between CI_DRM_11870_full and
Patchwork_106224v1_full:
### New IGT tests (113) ###
* igt@kms_async_flips@invalid-async-flip@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.35] s
* igt@kms_async_flips@invalid-async-flip@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_async_flips@invalid-async-flip@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.15] s
* igt@kms_async_flips@invalid-async-flip@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.15] s
* igt@kms_async_flips@test-time-stamp@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.36] s
* igt@kms_async_flips@test-time-stamp@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.21] s
* igt@kms_async_flips@test-time-stamp@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.19] s
* igt@kms_async_flips@test-time-stamp@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.18] s
* igt@kms_color@ctm-green-to-red@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.64] s
* igt@kms_color@ctm-green-to-red@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.40] s
* igt@kms_color@ctm-green-to-red@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.41] s
* igt@kms_color@ctm-green-to-red@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.43] s
* igt@kms_color@ctm-red-to-blue@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.61] s
* igt@kms_color@ctm-red-to-blue@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.43] s
* igt@kms_color@ctm-red-to-blue@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.43] s
* igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.43] s
* igt@kms_cursor_crc@cursor-alpha-opaque@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.50] s
* igt@kms_cursor_crc@cursor-alpha-opaque@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.31] s
* igt@kms_cursor_crc@cursor-alpha-opaque@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.31] s
* igt@kms_cursor_crc@cursor-alpha-opaque@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.32] s
* igt@kms_cursor_crc@cursor-dpms@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.88] s
* igt@kms_cursor_crc@cursor-dpms@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.71] s
* igt@kms_cursor_crc@cursor-dpms@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.70] s
* igt@kms_cursor_crc@cursor-dpms@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.71] s
* igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-4-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.68] s
* igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-4-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.72] s
* igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-4-256x256:
- Statuses : 1 pass(s)
- Exec time: [5.74] s
* igt@kms_cursor_crc@cursor-random@pipe-a-hdmi-a-4-256x85:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: fix kernel-doc issues
== Series Details == Series: drm/i915: fix kernel-doc issues URL : https://patchwork.freedesktop.org/series/106224/ State : success == Summary == CI Bug Log - changes from CI_DRM_11870 -> Patchwork_106224v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/index.html Participating hosts (33 -> 41) -- Additional (11): fi-kbl-soraka bat-dg1-5 bat-dg2-9 bat-adlp-6 bat-adlp-4 fi-hsw-4770 bat-adln-1 bat-jsl-3 bat-rpls-1 bat-rpls-2 bat-jsl-1 Missing(3): fi-ctg-p8600 fi-hsw-4200u fi-bsw-n3050 Known issues Here are the changes found in Patchwork_106224v1 that come from known issues: ### IGT changes ### Issues hit * igt@fbdev@nullptr: - bat-dg1-5: NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-dg1-5/igt@fb...@nullptr.html * igt@gem_exec_gttfill@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +8 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/fi-kbl-soraka/igt@gem_exec_gttf...@basic.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-adlp-4: NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-adlp-4/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#4083]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-dg1-5/igt@gem_m...@basic.html * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770:NOTRUN -> [SKIP][7] ([fdo#109271]) +9 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html * igt@gem_tiled_blits@basic: - bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#4077]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-dg1-5/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-5: NOTRUN -> [SKIP][9] ([i915#4079]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-dg1-5/igt@gem_tiled_pread_basic.html - bat-adlp-4: NOTRUN -> [SKIP][10] ([i915#3282]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-adlp-4/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#3012]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html - bat-dg1-5: NOTRUN -> [SKIP][12] ([i915#1155]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][13] ([i915#1886]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@hangcheck: - fi-hsw-g3258: [PASS][14] -> [INCOMPLETE][15] ([i915#4785]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html - bat-dg1-5: NOTRUN -> [DMESG-FAIL][16] ([i915#4494] / [i915#4957]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-dg1-5: NOTRUN -> [INCOMPLETE][17] ([i915#6011]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html * igt@i915_suspend@basic-s3-without-i915: - bat-adlp-4: NOTRUN -> [SKIP][18] ([i915#5903]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-adlp-4/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][19] ([i915#4212]) +7 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106224v1/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-le
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: fix kernel-doc issues
== Series Details == Series: drm/i915: fix kernel-doc issues URL : https://patchwork.freedesktop.org/series/106224/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: fix kernel-doc issues
== Series Details == Series: drm/i915: fix kernel-doc issues URL : https://patchwork.freedesktop.org/series/106224/ State : warning == Summary == Error: dim checkpatch failed 637d83030bc5 drm/i915: fix kernel-doc trivial warnings on i915/*.[ch] files -:117: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #117: FILE: drivers/gpu/drm/i915/i915_gem.c:532: + * ^Ithe data directly from the$ -:136: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #136: FILE: drivers/gpu/drm/i915/i915_gem.c:803: + * ^Ithis buffer$ total: 0 errors, 2 warnings, 0 checks, 176 lines checked 073c8a7b305a drm/i915: display: fix kernel-doc markup warnings fbe4bfb7ef75 drm/i915: gt: fix some Kernel-doc issues 713822b2064e drm/i915: gvt: fix kernel-doc trivial warnings 1a5f8f7d38f1 drm/i915: gem: fix some Kernel-doc issues -:72: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #72: FILE: drivers/gpu/drm/i915/gem/i915_gem_domain.c:117: + * ^Iand possibly write domain.$ -:102: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #102: FILE: drivers/gpu/drm/i915/gem/i915_gem_domain.c:460: + * ^Iand possibly write domain.$ total: 0 errors, 2 warnings, 0 checks, 89 lines checked dce4ef39aef7 drm/i915: intel_wakeref.h: fix some kernel-doc markups b967aad62fef drm/i915: i915_gem_ttm: fix a kernel-doc markup 93de7c0dc0c3 drm/i915: i915_gem_ttm_pm.c: fix kernel-doc markups -:31: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #31: FILE: drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:127: + * ^I%I915_TTM_BACKUP_ALLOW_GPU: allow the gpu blitter for this backup;$ -:32: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #32: FILE: drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:128: + * ^I%I915_TTM_BACKUP_PINNED: backup also pinned objects.$ -:42: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #42: FILE: drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:193: + * ^I%I915_TTM_BACKUP_ALLOW_GPU: allow the gpu blitter for this backup;$ total: 0 errors, 3 warnings, 0 checks, 20 lines checked e44cf507d008 drm/i915: gem: add missing trivial function parameters -:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one total: 0 errors, 1 warnings, 0 checks, 29 lines checked af06d22be0ec drm/i915: i915_gpu_error.c: document dump_flags -:22: WARNING:SPACE_BEFORE_TAB: please, no space before tabs #22: FILE: drivers/gpu/drm/i915/i915_gpu_error.c:2100: + * ^Idump engine record registers and execlists.$ total: 0 errors, 1 warnings, 0 checks, 9 lines checked 52425777acff drm/i915: document kernel-doc trivial issues a3aee77f7bd7 drm/i915: intel_dp_link_training.c: fix kernel-doc markup 3370381206b1 drm/i915: intel_fb: fix a kernel-doc issue with Sphinx 96b0d3634a47 drm/i915: skl_scaler: fix return value kernel-doc markup fb962cfc2364 drm/i915: intel_pm.c: fix some ascii artwork at kernel-doc -:14: WARNING:TYPO_SPELLING: 'indended' may be misspelled - perhaps 'intended'? #14: followed by a blank line and indended lines. total: 0 errors, 1 warnings, 0 checks, 49 lines checked 0349040e61b4 drm/i915: i915_gem_region.h: fix i915_gem_apply_to_region_ops doc 22bf310fbd82 drm/i915: i915_gem_wait.c: fix a kernel-doc markup fb2f8aa51360 drm/i915: fix i915_gem_ttm_move.c DOC: markup 2e79a6d68cb9 drm/i915: stop using kernel-doc markups for something else a3b5750da84d drm/i915: dvo_ch7xxx.c: use SPDX header Traceback (most recent call last): File "scripts/spdxcheck.py", line 11, in import git ModuleNotFoundError: No module named 'git' e6cb27da02d4 drm/i915: dvo_sil164.c: use SPDX header Traceback (most recent call last): File "scripts/spdxcheck.py", line 11, in import git ModuleNotFoundError: No module named 'git' 5200aaa9391e drm/i915: i915_vma_resource.c: fix some kernel-doc markups a486a184edf0 drm/i915: i915_gem.c fix a kernel-doc issue 50e414bc1c71 drm/i915: i915_scatterlist.h: fix some kernel-doc markups 012f4494d6c2 drm/i915: i915_deps: use a shorter title markup de077fe0b140 docs: gpu: i915.rst: display: add kernel-doc markups f222331d0d28 docs: gpu: i915.rst: gt: add more kernel-doc markups 0de22eca0eb4 docs: gpu: i915.rst: GuC: add more kernel-doc markups aad864ee367d docs: gpu: i915.rst: GVT: add more kernel-doc markups 8c350397e64c docs: gpu: i915.rst: PM: add more kernel-doc markups e87e866fdf6d docs: gpu: i915.rst: GEM/TTM: add more kernel-doc markups e2a602177209 docs: gpu: i915.rst: add the remaining kernel-doc markup files -:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #9: $ git grep -l "/\*\*" $(git ls-files|grep drivers/gpu/drm/i915/) >kernel-doc-files total: 0 errors, 1 warnings, 0 checks, 123 lines checked
Re: [Intel-gfx] susetting the remaining swioltb couplin in DRM
On Mon, Jul 11, 2022 at 10:26:14AM +0200, Christoph Hellwig wrote: > Hi i915 and nouveau maintainers, > > any chance I could get some help to remove the remaining direct > driver calls into swiotlb, namely swiotlb_max_segment and > is_swiotlb_active. Either should not matter to a driver as they > should be written to the DMA API. Hi Christoph, while we take a look here, could you please share the reasons behind sunsetting this calls? > > In the i915 case it seems like the driver should use > dma_alloc_noncontiguous and/or dma_alloc_noncoherent to allocate > DMAable memory instead of using alloc_page and the streaming > dma mapping helpers. > > For the latter it seems like it should just stop passing > use_dma_alloc == true to ttm_device_init and/or that function > should switch to use dma_alloc_noncoherent.
[Intel-gfx] [PATCH 20/32] drm/i915: dvo_ch7xxx.c: use SPDX header
This file is licensed with MIT license. Change its license text to use SPDX. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 33 +-- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c index 1c1fe1f29675..b4d94a565fdb 100644 --- a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c +++ b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c @@ -1,30 +1,9 @@ -/** - -Copyright © 2006 Dave Airlie - -All Rights Reserved. - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sub license, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial portions -of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS -OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. -IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -**/ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2006 Dave Airlie + * + * All Rights Reserved. + */ #include "intel_display_types.h" #include "intel_dvo_dev.h" -- 2.36.1
[Intel-gfx] [PATCH 04/32] drm/i915: gvt: fix kernel-doc trivial warnings
Some functions seem to have been renamed without updating the kernel-doc
markup causing warnings. Also, struct intel_vgpu_dmabuf_obj is not
properly documented, but has a kerneld-doc markup.
Fix those warnings:
drivers/gpu/drm/i915/gvt/aperture_gm.c:308: warning: expecting
prototype for inte_gvt_free_vgpu_resource(). Prototype was for
intel_vgpu_free_resource() instead
drivers/gpu/drm/i915/gvt/aperture_gm.c:344: warning: expecting
prototype for intel_alloc_vgpu_resource(). Prototype was for
intel_vgpu_alloc_resource() instead
drivers/gpu/drm/i915/gvt/cfg_space.c:257: warning: expecting prototype
for intel_vgpu_emulate_cfg_read(). Prototype was for
intel_vgpu_emulate_cfg_write() instead
drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or
member 'vgpu' not described in 'intel_vgpu_dmabuf_obj'
drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or
member 'info' not described in 'intel_vgpu_dmabuf_obj'
drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or
member 'dmabuf_id' not described in 'intel_vgpu_dmabuf_obj'
drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or
member 'kref' not described in 'intel_vgpu_dmabuf_obj'
drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or
member 'initref' not described in 'intel_vgpu_dmabuf_obj'
drivers/gpu/drm/i915/gvt/dmabuf.h:61: warning: Function parameter or
member 'list' not described in 'intel_vgpu_dmabuf_obj'
drivers/gpu/drm/i915/gvt/handlers.c:3066: warning: expecting prototype
for intel_t_default_mmio_write(). Prototype was for
intel_vgpu_default_mmio_write() instead
drivers/gpu/drm/i915/gvt/mmio_context.c:560: warning: expecting
prototype for intel_gvt_switch_render_mmio(). Prototype was for
intel_gvt_switch_mmio() instead
drivers/gpu/drm/i915/gvt/page_track.c:131: warning: expecting prototype
for intel_vgpu_enable_page_track(). Prototype was for
intel_vgpu_disable_page_track() instead
drivers/gpu/drm/i915/gvt/vgpu.c:215: warning: expecting prototype for
intel_gvt_active_vgpu(). Prototype was for intel_gvt_activate_vgpu() instead
drivers/gpu/drm/i915/gvt/vgpu.c:230: warning: expecting prototype for
intel_gvt_deactive_vgpu(). Prototype was for intel_gvt_deactivate_vgpu() instead
drivers/gpu/drm/i915/gvt/vgpu.c:358: warning: expecting prototype for
intel_gvt_destroy_vgpu(). Prototype was for intel_gvt_destroy_idle_vgpu()
instead
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/gvt/aperture_gm.c | 4 ++--
drivers/gpu/drm/i915/gvt/cfg_space.c| 2 +-
drivers/gpu/drm/i915/gvt/dmabuf.h | 2 +-
drivers/gpu/drm/i915/gvt/handlers.c | 2 +-
drivers/gpu/drm/i915/gvt/mmio_context.c | 2 +-
drivers/gpu/drm/i915/gvt/page_track.c | 2 +-
drivers/gpu/drm/i915/gvt/vgpu.c | 6 +++---
7 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c
b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 557f3314291a..c6498414a0cc 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -298,7 +298,7 @@ static int alloc_resource(struct intel_vgpu *vgpu,
}
/**
- * inte_gvt_free_vgpu_resource - free HW resource owned by a vGPU
+ * intel_vgpu_free_resource - free HW resource owned by a vGPU
* @vgpu: a vGPU
*
* This function is used to free the HW resource owned by a vGPU.
@@ -328,7 +328,7 @@ void intel_vgpu_reset_resource(struct intel_vgpu *vgpu)
}
/**
- * intel_alloc_vgpu_resource - allocate HW resource for a vGPU
+ * intel_vgpu_alloc_resource - allocate HW resource for a vGPU
* @vgpu: vGPU
* @param: vGPU creation params
*
diff --git a/drivers/gpu/drm/i915/gvt/cfg_space.c
b/drivers/gpu/drm/i915/gvt/cfg_space.c
index dad3a6054335..a0fc6d356588 100644
--- a/drivers/gpu/drm/i915/gvt/cfg_space.c
+++ b/drivers/gpu/drm/i915/gvt/cfg_space.c
@@ -243,7 +243,7 @@ static void emulate_pci_bar_write(struct intel_vgpu *vgpu,
unsigned int offset,
}
/**
- * intel_vgpu_emulate_cfg_read - emulate vGPU configuration space write
+ * intel_vgpu_emulate_cfg_write - emulate vGPU configuration space write
* @vgpu: target vgpu
* @offset: offset
* @p_data: write data ptr
diff --git a/drivers/gpu/drm/i915/gvt/dmabuf.h
b/drivers/gpu/drm/i915/gvt/dmabuf.h
index 5f8f03fb1d1b..3dcdb6570eda 100644
--- a/drivers/gpu/drm/i915/gvt/dmabuf.h
+++ b/drivers/gpu/drm/i915/gvt/dmabuf.h
@@ -48,7 +48,7 @@ struct intel_vgpu_fb_info {
struct intel_vgpu_dmabuf_obj *obj;
};
-/**
+/*
* struct intel_vgpu_dmabuf_obj- Intel vGPU device buffer object
*/
struct intel_vgpu_dmabuf_obj {
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
b/drivers/gpu/drm/i915/gvt/handlers.c
index bee
[Intel-gfx] [PATCH 01/32] drm/i915: fix kernel-doc trivial warnings on i915/*.[ch] files
There are several trivial warnings there, due to trivial things: - lack of function name at the kerneldoc markup; - renamed functions; - wrong parameter syntax. Fix such warnings: drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'active' not described in '__i915_active_fence_init' drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'fence' not described in '__i915_active_fence_init' drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'fn' not described in '__i915_active_fence_init' drivers/gpu/drm/i915/i915_active.h:89: warning: Function parameter or member 'active' not described in 'i915_active_fence_set' drivers/gpu/drm/i915/i915_active.h:89: warning: Function parameter or member 'rq' not described in 'i915_active_fence_set' drivers/gpu/drm/i915/i915_active.h:102: warning: Function parameter or member 'active' not described in 'i915_active_fence_get' drivers/gpu/drm/i915/i915_active.h:122: warning: Function parameter or member 'active' not described in 'i915_active_fence_isset' drivers/gpu/drm/i915/i915_gem.c:443: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Reads data from the object referenced by handle. drivers/gpu/drm/i915/i915_gem.c:532: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * This is the fast pwrite path, where we copy the data directly from the drivers/gpu/drm/i915/i915_gem.c:717: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Writes data to the object referenced by handle. drivers/gpu/drm/i915/i915_gem.c:802: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Called when user space has done writes to this buffer drivers/gpu/drm/i915/i915_pmu.h:22: warning: cannot understand function prototype: 'enum i915_pmu_tracked_events ' drivers/gpu/drm/i915/i915_pmu.h:33: warning: cannot understand function prototype: 'enum ' drivers/gpu/drm/i915/i915_pmu.h:42: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * How many different events we track in the global PMU mask. drivers/gpu/drm/i915/i915_request.h:177: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Request queue structure. drivers/gpu/drm/i915/i915_request.h:473: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Returns true if seq1 is later than seq2. drivers/gpu/drm/i915/i915_scatterlist.c:63: warning: Function parameter or member 'size' not described in 'i915_refct_sgt_init' drivers/gpu/drm/i915/i915_scatterlist.h:153: warning: Incorrect use of kernel-doc format: * release() - Free the memory of the struct i915_refct_sgt drivers/gpu/drm/i915/i915_scatterlist.h:157: warning: Function parameter or member 'release' not described in 'i915_refct_sgt_ops' drivers/gpu/drm/i915/i915_scatterlist.h:180: warning: Function parameter or member 'rsgt' not described in 'i915_refct_sgt_put' drivers/gpu/drm/i915/i915_scatterlist.h:191: warning: Function parameter or member 'rsgt' not described in 'i915_refct_sgt_get' drivers/gpu/drm/i915/i915_scatterlist.h:207: warning: Function parameter or member 'rsgt' not described in '__i915_refct_sgt_init' drivers/gpu/drm/i915/i915_utils.h:291: warning: Function parameter or member 'OP' not described in '__wait_for' drivers/gpu/drm/i915/i915_utils.h:291: warning: Function parameter or member 'COND' not described in '__wait_for' drivers/gpu/drm/i915/i915_utils.h:291: warning: Function parameter or member 'US' not described in '__wait_for' drivers/gpu/drm/i915/i915_utils.h:291: warning: Function parameter or member 'Wmin' not described in '__wait_for' drivers/gpu/drm/i915/i915_utils.h:291: warning: Function parameter or member 'Wmax' not described in '__wait_for' drivers/gpu/drm/i915/i915_vma_resource.h:88: warning: Incorrect use of kernel-doc format: * struct i915_vma_bindinfo - Information needed for async bind drivers/gpu/drm/i915/i915_vma_resource.h:123: warning: Function parameter or member 'bi' not described in 'i915_vma_resource' Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i91
[Intel-gfx] [PATCH 03/32] drm/i915: gt: fix some Kernel-doc issues
There are several trivial warnings there, due to trivial things: - lack of function name at the kerneldoc markup; - undocumented structs with kernel-doc markups; - wrong parameter syntax. Fix such warnings: drivers/gpu/drm/i915/gt/intel_context.h:107: warning: Function parameter or member 'ce' not described in 'intel_context_lock_pinned' drivers/gpu/drm/i915/gt/intel_context.h:122: warning: Function parameter or member 'ce' not described in 'intel_context_is_pinned' drivers/gpu/drm/i915/gt/intel_context.h:141: warning: Function parameter or member 'ce' not described in 'intel_context_unlock_pinned' drivers/gpu/drm/i915/gt/intel_gtt.h:510: warning: Function parameter or member 'vm' not described in 'i915_vm_resv_put' drivers/gpu/drm/i915/gt/intel_gtt.h:510: warning: Excess function parameter 'resv' description in 'i915_vm_resv_put' drivers/gpu/drm/i915/gt/intel_gtt.h:615: warning: Function parameter or member 'i915' not described in 'i915_ggtt_mark_pte_lost' drivers/gpu/drm/i915/gt/intel_gtt.h:615: warning: Function parameter or member 'val' not described in 'i915_ggtt_mark_pte_lost' drivers/gpu/drm/i915/gt/intel_rps.c:2343: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Tells the intel_ips driver that the i915 driver is now loaded, if drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:28: warning: Function parameter or member 'size' not described in '__guc_capture_bufstate' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:28: warning: Function parameter or member 'data' not described in '__guc_capture_bufstate' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:28: warning: Function parameter or member 'rd' not described in '__guc_capture_bufstate' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:28: warning: Function parameter or member 'wr' not described in '__guc_capture_bufstate' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:60: warning: Function parameter or member 'link' not described in '__guc_capture_parsed_output' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:60: warning: Function parameter or member 'is_partial' not described in '__guc_capture_parsed_output' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:60: warning: Function parameter or member 'eng_class' not described in '__guc_capture_parsed_output' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:60: warning: Function parameter or member 'eng_inst' not described in '__guc_capture_parsed_output' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:60: warning: Function parameter or member 'guc_id' not described in '__guc_capture_parsed_output' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:60: warning: Function parameter or member 'lrca' not described in '__guc_capture_parsed_output' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:60: warning: Function parameter or member 'reginfo' not described in '__guc_capture_parsed_output' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:63: warning: wrong kernel-doc identifier on line: * struct guc_debug_capture_list_header / struct guc_debug_capture_list drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:81: warning: wrong kernel-doc identifier on line: * struct __guc_mmio_reg_descr / struct __guc_mmio_reg_descr_group drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:106: warning: wrong kernel-doc identifier on line: * struct guc_state_capture_header_t / struct guc_state_capture_t / drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:164: warning: Function parameter or member 'is_valid' not described in '__guc_capture_ads_cache' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:164: warning: Function parameter or member 'ptr' not described in '__guc_capture_ads_cache' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:164: warning: Function parameter or member 'size' not described in '__guc_capture_ads_cache' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:164: warning: Function parameter or member 'status' not described in '__guc_capture_ads_cache' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:217: warning: Function parameter or member 'ads_null_cache' not described in 'intel_guc_state_capture' drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:217: warning: Function parameter or member 'max_mmio_per_node' not described in 'intel_guc_state_capture' drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:401: warning: Function parameter or member 'marker' not described in 'guc_log_buffer_state' drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:401: warning: Function parameter or member 'read_ptr' not described in 'guc_log_buffer_state' drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:401: warning: Function parameter or member 'write_ptr' not described in 'guc_log_buffer_state
[Intel-gfx] [PATCH 05/32] drm/i915: gem: fix some Kernel-doc issues
There are several trivial issueson kernel-doc markups at gem:
drivers/gpu/drm/i915/gem/i915_gem_create.c:146: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
drivers/gpu/drm/i915/gem/i915_gem_create.c:217: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
drivers/gpu/drm/i915/gem/i915_gem_create.c:401: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
drivers/gpu/drm/i915/gem/i915_gem_domain.c:116: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
drivers/gpu/drm/i915/gem/i915_gem_domain.c:177: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
drivers/gpu/drm/i915/gem/i915_gem_domain.c:262: warning: expecting
prototype for Changes the cache(). Prototype was for
i915_gem_object_set_cache_level() instead
drivers/gpu/drm/i915/gem/i915_gem_domain.c:456: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
drivers/gpu/drm/i915/gem/i915_gem_domain.c:500: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
drivers/gpu/drm/i915/gem/i915_gem_object.h:110: warning: Function
parameter or member 'file' not described in 'i915_gem_object_lookup_rcu'
drivers/gpu/drm/i915/gem/i915_gem_object.h:110: warning: Excess
function parameter 'filp' description in 'i915_gem_object_lookup_rcu'
drivers/gpu/drm/i915/gem/i915_gem_region.h:35: warning: Function
parameter or member 'process_obj' not described in
'i915_gem_apply_to_region_ops'
drivers/gpu/drm/i915/gem/i915_gem_wait.c:130: warning: This comment
starts with '/**', but isn't a kernel-doc comment. Refer
Documentation/doc-guide/kernel-doc.rst
Caused by:
- lack of function name at the kernel-doc markup;
- renamed parameters.
Address them.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/gem/i915_gem_create.c | 8 +---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 17 +++--
drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 2 +-
4 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 33673fe7ee0a..8cb2eb092031 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -143,7 +143,8 @@ __i915_gem_object_create_user_ext(struct drm_i915_private
*i915, u64 size,
}
/**
- * Creates a new object using the same path as DRM_I915_GEM_CREATE_EXT
+ * __i915_gem_object_create_user - Creates a new object using the same path
+ * as DRM_I915_GEM_CREATE_EXT
* @i915: i915 private
* @size: size of the buffer, in bytes
* @placements: possible placement regions, in priority order
@@ -214,7 +215,7 @@ i915_gem_dumb_create(struct drm_file *file,
}
/**
- * Creates a new mm object and returns a handle to it.
+ * i915_gem_create_ioctl - Creates a new mm object and returns a handle to it.
* @dev: drm device pointer
* @data: ioctl data blob
* @file: drm file pointer
@@ -398,7 +399,8 @@ static const i915_user_extension_fn create_extensions[] = {
};
/**
- * Creates a new mm object and returns a handle to it.
+ * i915_gem_create_ext_ioctl - Creates a new mm object and returns a handle
+ * to it.
* @dev: drm device pointer
* @data: ioctl data blob
* @file: drm file pointer
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 1674b0c5802b..23635aaa4b4d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -113,7 +113,8 @@ void i915_gem_object_flush_if_display_locked(struct
drm_i915_gem_object *obj)
}
/**
- * Moves a single object to the WC read, and possibly write domain.
+ * i915_gem_object_set_to_wc_domain - Moves a single object to the WC read,
+ * and possibly write domain.
* @obj: object to act on
* @write: ask for write access or read only
*
@@ -174,7 +175,8 @@ i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object
*obj, bool write)
}
/**
- * Moves a single object to the GTT read, and possibly write domain.
+ * i915_gem_object_set_to_gtt_domain - Moves a single object to the GTT read,
+ * and possibly write domain.
* @obj: object to act on
* @write: ask for write access or read only
*
@@ -243,7 +245,8 @@ i915_gem_obj
[Intel-gfx] [PATCH 08/32] drm/i915: i915_gem_ttm_pm.c: fix kernel-doc markups
The documentation for the flags field is missing there. It sounds that some last-time change converted some bools into flags, but the kernel-doc change didn't follow it. Fix those warnings: drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:135: warning: Function parameter or member 'flags' not described in 'i915_ttm_backup_region' drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:135: warning: Excess function parameter 'allow_gpu' description in 'i915_ttm_backup_region' drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:135: warning: Excess function parameter 'backup_pinned' description in 'i915_ttm_backup_region' drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:199: warning: Function parameter or member 'flags' not described in 'i915_ttm_restore_region' drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c:199: warning: Excess function parameter 'allow_gpu' description in 'i915_ttm_restore_region' Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c index 9aad84059d56..1c4b576a2540 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c @@ -123,8 +123,9 @@ void i915_ttm_recover_region(struct intel_memory_region *mr) /** * i915_ttm_backup_region - Back up all objects of a region to smem. * @mr: The memory region - * @allow_gpu: Whether to allow the gpu blitter for this backup. - * @backup_pinned: Backup also pinned objects. + * @flags: Bitmap field with the following flags: + * %I915_TTM_BACKUP_ALLOW_GPU: allow the gpu blitter for this backup; + * %I915_TTM_BACKUP_PINNED: backup also pinned objects. * * Loops over all objects of a region and either evicts them if they are * evictable or backs them up using a backup object if they are pinned. @@ -188,7 +189,8 @@ static int i915_ttm_restore(struct i915_gem_apply_to_region *apply, /** * i915_ttm_restore_region - Restore backed-up objects of a region from smem. * @mr: The memory region - * @allow_gpu: Whether to allow the gpu blitter to recover. + * @flags: Bitmap field with the following flags: + * %I915_TTM_BACKUP_ALLOW_GPU: allow the gpu blitter for this backup; * * Loops over all objects of a region and if they are backed-up, restores * them from smem. -- 2.36.1
[Intel-gfx] [PATCH 10/32] drm/i915: i915_gpu_error.c: document dump_flags
Kernel-doc dump_flags parameter is missing at i915_capture_error_state().
Document it.
Fixes: a6f0f9cf330a ("drm/i915/guc: Plumb GuC-capture into gpu_coredump")
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/i915_gpu_error.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 32e92651ef7c..faec4aebbc3d 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -2096,7 +2096,8 @@ void i915_error_state_store(struct i915_gpu_coredump
*error)
* i915_capture_error_state - capture an error record for later analysis
* @gt: intel_gt which originated the hang
* @engine_mask: hung engines
- *
+ * @dump_flags: bitmap flags. When %CORE_DUMP_FLAG_IS_GUC_CAPTURE is used,
+ * dump engine record registers and execlists.
*
* Should be called when an error is detected (either a hang or an error
* interrupt) to capture error state from the time of the error. Fills
--
2.36.1
[Intel-gfx] [PATCH 21/32] drm/i915: dvo_sil164.c: use SPDX header
This file is licensed with MIT license. Change its license text to use SPDX. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/display/dvo_sil164.c | 32 +-- 1 file changed, 6 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/display/dvo_sil164.c b/drivers/gpu/drm/i915/display/dvo_sil164.c index 0dfa0a0209ff..12974f7c9dc1 100644 --- a/drivers/gpu/drm/i915/display/dvo_sil164.c +++ b/drivers/gpu/drm/i915/display/dvo_sil164.c @@ -1,30 +1,10 @@ -/** +// SPDX-License-Identifier: MIT -Copyright © 2006 Dave Airlie - -All Rights Reserved. - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sub license, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial portions -of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS -OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. -IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -**/ +/* + * Copyright © 2006 Dave Airlie + * + * All Rights Reserved. + */ #include "intel_display_types.h" #include "intel_dvo_dev.h" -- 2.36.1
[Intel-gfx] [PATCH 17/32] drm/i915: i915_gem_wait.c: fix a kernel-doc markup
The return codes for i915_gem_wait_ioctl() have identation issues, and will be displayed on a very confusing way. Use lists to improve its output. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/gem/i915_gem_wait.c | 24 +--- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_wait.c b/drivers/gpu/drm/i915/gem/i915_gem_wait.c index bdba05492582..7b4e216a295b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_wait.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_wait.c @@ -176,23 +176,25 @@ static unsigned long to_wait_timeout(s64 timeout_ns) * @data: ioctl data blob * @file: drm file pointer * - * Returns 0 if successful, else an error is returned with the remaining time in - * the timeout parameter. - * -ETIME: object is still busy after timeout - * -ERESTARTSYS: signal interrupted the wait - * -ENONENT: object doesn't exist - * Also possible, but rare: - * -EAGAIN: incomplete, restart syscall - * -ENOMEM: damn - * -ENODEV: Internal IRQ fail - * -E?: The add request failed - * * The wait ioctl with a timeout of 0 reimplements the busy ioctl. With any * non-zero timeout parameter the wait ioctl will wait for the given number of * nanoseconds on an object becoming unbusy. Since the wait itself does so * without holding struct_mutex the object may become re-busied before this * function completes. A similar but shorter * race condition exists in the busy * ioctl + * + * Returns: + * 0 if successful, else an error is returned with the remaining time in + * the timeout parameter. + * * -ETIME: object is still busy after timeout + * * -ERESTARTSYS: signal interrupted the wait + * * -ENONENT: object doesn't exist + * + * Also possible, but rare: + * * -EAGAIN: incomplete, restart syscall + * * -ENOMEM: damn + * * -ENODEV: Internal IRQ fail + * * -E?: The add request failed */ int i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file) -- 2.36.1
[Intel-gfx] [PATCH 23/32] drm/i915: i915_gem.c fix a kernel-doc issue
Prevent this Sphinx warning: Documentation/foo/i915:728: ./drivers/gpu/drm/i915/i915_gem.c:447: WARNING: Inline emphasis start-string without end-string. By using @data to identify the data field, as expected by kernel-doc. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/i915_gem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f01f0896ff5c..0bc895c6a1fc 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -444,7 +444,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj, * @data: ioctl data blob * @file: drm file pointer * - * On error, the contents of *data are undefined. + * On error, the contents of @data is undefined. */ int i915_gem_pread_ioctl(struct drm_device *dev, void *data, -- 2.36.1
[Intel-gfx] [PATCH 14/32] drm/i915: skl_scaler: fix return value kernel-doc markup
The way it is, it produces this warning: Documentation/gpu/i915:150: ./drivers/gpu/drm/i915/display/skl_scaler.c:213: WARNING: Block quote ends without a blank line; unexpected unindent. Use list markups to suppress the warning. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/display/skl_scaler.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index 4092679be21e..59099f793d3e 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -208,9 +208,9 @@ int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state) * @crtc_state: crtc's scaler state * @plane_state: atomic plane state to update * - * Return - * 0 - scaler_usage updated successfully - *error - requested scaling cannot be supported or other error condition + * Return: + * * 0 - scaler_usage updated successfully + * * error - requested scaling cannot be supported or other error condition */ int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state) -- 2.36.1
[Intel-gfx] [PATCH 19/32] drm/i915: stop using kernel-doc markups for something else
There are some occurrences of "/**" that aren't actually part of
a kernel-doc markup. Replace them by "/*", in order to make easier
to identify what i915 files contain kernel-doc markups.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/display/dvo_ch7017.c | 26
drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 6 +-
.../drm/i915/display/intel_display_types.h| 2 +-
drivers/gpu/drm/i915/display/intel_dvo_dev.h | 6 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 4 +-
drivers/gpu/drm/i915/display/intel_tv.c | 2 +-
drivers/gpu/drm/i915/gt/intel_context_types.h | 63 +--
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_types.h | 12 ++--
drivers/gpu/drm/i915/gt/intel_reset_types.h | 4 +-
.../gpu/drm/i915/gt/intel_timeline_types.h| 6 +-
.../drm/i915/gt/shaders/clear_kernel/hsw.asm | 4 +-
.../drm/i915/gt/shaders/clear_kernel/ivb.asm | 4 +-
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 10 +--
drivers/gpu/drm/i915/i915_drm_client.h| 2 +-
drivers/gpu/drm/i915/i915_drv.h | 30 -
drivers/gpu/drm/i915/i915_file_private.h | 8 +--
drivers/gpu/drm/i915/i915_gpu_error.h | 4 +-
drivers/gpu/drm/i915/i915_pmu.h | 32 +-
drivers/gpu/drm/i915/intel_uncore.h | 4 +-
20 files changed, 115 insertions(+), 116 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/dvo_ch7017.c
b/drivers/gpu/drm/i915/display/dvo_ch7017.c
index 0589994dde11..581e29ab77e4 100644
--- a/drivers/gpu/drm/i915/display/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/display/dvo_ch7017.c
@@ -55,13 +55,13 @@
#define CH7017_TEST_PATTERN0x48
#define CH7017_POWER_MANAGEMENT0x49
-/** Enables the TV output path. */
+/* Enables the TV output path. */
#define CH7017_TV_EN (1 << 0)
#define CH7017_DAC0_POWER_DOWN (1 << 1)
#define CH7017_DAC1_POWER_DOWN (1 << 2)
#define CH7017_DAC2_POWER_DOWN (1 << 3)
#define CH7017_DAC3_POWER_DOWN (1 << 4)
-/** Powers down the TV out block, and DAC0-3 */
+/* Powers down the TV out block, and DAC0-3 */
#define CH7017_TV_POWER_DOWN_EN(1 << 5)
#define CH7017_VERSION_ID 0x4a
@@ -84,26 +84,26 @@
#define CH7017_UP_SCALER_HORIZONTAL_INC_1 0x5e
#define CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT 0x5f
-/**< Low bits of horizontal active pixel input */
+/* Low bits of horizontal active pixel input */
#define CH7017_ACTIVE_INPUT_LINE_OUTPUT0x60
-/** High bits of horizontal active pixel input */
+/* High bits of horizontal active pixel input */
#define CH7017_LVDS_HAP_INPUT_MASK (0x7 << 0)
-/** High bits of vertical active line output */
+/* High bits of vertical active line output */
#define CH7017_LVDS_VAL_HIGH_MASK (0x7 << 3)
#define CH7017_VERTICAL_ACTIVE_LINE_OUTPUT 0x61
-/**< Low bits of vertical active line output */
+/* Low bits of vertical active line output */
#define CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT 0x62
-/**< Low bits of horizontal active pixel output */
+/* Low bits of horizontal active pixel output */
#define CH7017_LVDS_POWER_DOWN 0x63
-/** High bits of horizontal active pixel output */
+/* High bits of horizontal active pixel output */
#define CH7017_LVDS_HAP_HIGH_MASK (0x7 << 0)
-/** Enables the LVDS power down state transition */
+/* Enables the LVDS power down state transition */
#define CH7017_LVDS_POWER_DOWN_EN (1 << 6)
-/** Enables the LVDS upscaler */
+/* Enables the LVDS upscaler */
#define CH7017_LVDS_UPSCALER_EN(1 << 7)
#define CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED 0x08
@@ -116,9 +116,9 @@
#define CH7017_LVDS_ENCODING_2 0x65
#define CH7017_LVDS_PLL_CONTROL0x66
-/** Enables the LVDS panel output path */
+/* Enables the LVDS panel output path */
#define CH7017_LVDS_PANEN (1 << 0)
-/** Enables the LVDS panel backlight */
+/* Enables the LVDS panel backlight */
#define CH7017_LVDS_BKLEN (1 << 3)
#define CH7017_POWER_SEQUENCING_T1 0x67
@@ -197,7 +197,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, u8
addr, u8 val)
return i2c_transfer(dvo->i2c_bus, &msg, 1) == 1;
}
-/** Probes for a CH7017 on the given bus and slave address. */
+/* Probes for a CH7017 on the given bus and slave address. */
static bool ch7017_init(struct intel_dvo_device *dvo,
struct i2c_adapter *adapter)
{
diff --git a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
index 54f58ba44b9f..1c1fe1f29675 100644
--- a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
@@ -81,7 +81,7 @@ SOFTWA
[Intel-gfx] [PATCH 09/32] drm/i915: gem: add missing trivial function parameters
Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 ++ drivers/gpu/drm/i915/gem/i915_gem_ttm.h | 1 + drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 ++ 3 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index ccec4055fde3..b5dd43405355 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -820,6 +820,8 @@ int i915_gem_object_wait_moving_fence(struct drm_i915_gem_object *obj, * in an unknown_state. This means that userspace must NEVER be allowed to touch * the pages, with either the GPU or CPU. * + * @obj: The object to check its state. + * * ONLY valid to be called after ensuring that all kernel fences have signalled * (in particular the fence for moving/clearing the object). */ diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.h b/drivers/gpu/drm/i915/gem/i915_gem_ttm.h index e4842b4296fc..64151f40098f 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.h @@ -30,6 +30,7 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo); /** * i915_ttm_to_gem - Convert a struct ttm_buffer_object to an embedding * struct drm_i915_gem_object. + * @bo: The ttm buffer object. * * Return: Pointer to the embedding struct ttm_buffer_object, or NULL * if the object was not an i915 ttm object. diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c index 9a7e50534b84..56217d324a9b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c @@ -237,6 +237,7 @@ static struct dma_fence *i915_ttm_accel_move(struct ttm_buffer_object *bo, * @_src_iter: Storage space for the source kmap iterator. * @dst_iter: Pointer to the destination kmap iterator. * @src_iter: Pointer to the source kmap iterator. + * @num_pages: Number of pages to copy or to be cleared. * @clear: Whether to clear instead of copy. * @src_rsgt: Refcounted scatter-gather list of source memory. * @dst_rsgt: Refcounted scatter-gather list of destination memory. @@ -541,6 +542,7 @@ __i915_ttm_move(struct ttm_buffer_object *bo, * i915_ttm_move - The TTM move callback used by i915. * @bo: The buffer object. * @evict: Whether this is an eviction. + * @ctx: Pointer to a struct ttm_operation_ctx * @dst_mem: The destination ttm resource. * @hop: If we need multihop, what temporary memory type to move to. * -- 2.36.1
[Intel-gfx] [PATCH 24/32] drm/i915: i915_scatterlist.h: fix some kernel-doc markups
Building docs currently produces this warning: Documentation/foo/i915:159: ./drivers/gpu/drm/i915/i915_scatterlist.h:73: WARNING: Inline strong start-string without end-string. That's because @foo evaluates into **foo**, and placing anything after it without spaces cause Sphinx to warn and do the wrong thing.. So, replace them by a different Sphinx-compatible tag. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/i915_scatterlist.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h index 2e112362e4f1..0c7ffcfaff5b 100644 --- a/drivers/gpu/drm/i915/i915_scatterlist.h +++ b/drivers/gpu/drm/i915/i915_scatterlist.h @@ -70,7 +70,7 @@ static inline struct scatterlist *sg_next(struct scatterlist *sg) * * Description: * If the entry is the last, return NULL; otherwise, step to the next - * element in the array (@sg@+1). If that's a chain pointer, follow it; + * element in the array (``sg@+1``). If that's a chain pointer, follow it; * otherwise just return the pointer to the current element. **/ static inline struct scatterlist *__sg_next(struct scatterlist *sg) -- 2.36.1
[Intel-gfx] [PATCH 27/32] docs: gpu: i915.rst: gt: add more kernel-doc markups
There are several documented GT kAPI that aren't currently part of the docs. Add them, as this allows identifying issues with badly-formatted tags. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ Documentation/gpu/i915.rst | 43 +- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index 2ad7941a79f2..afd8c0e3c689 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -149,7 +149,6 @@ Misc display functions .. kernel-doc:: drivers/gpu/drm/i915/display/skl_scaler.c - Plane Configuration --- @@ -308,6 +307,48 @@ Multicast/Replicated (MCR) Registers .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gt_mcr.c :internal: +GT engine +- + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_engine_types.h + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_engine_cs.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_engine_pm.c + +GT context +-- + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_context.h + +Graphics Translation Tables +--- + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt.c + +Other GT functionality +-- + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gsc.h + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gtt.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gtt.h + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_migrate.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_mocs.h + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_rc6.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_reset.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_rps_types.h + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_rps.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_sseu.c + Memory Management and Command Submission -- 2.36.1
[Intel-gfx] [PATCH 18/32] drm/i915: fix i915_gem_ttm_move.c DOC: markup
The doc markup should not end with ":", as it would generate a warning on Sphinx while generating the cross-reference tag. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c index 56217d324a9b..16dd4991d527 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c @@ -20,7 +20,7 @@ #include "gt/intel_migrate.h" /** - * DOC: Selftest failure modes for failsafe migration: + * DOC: Selftest failure modes for failsafe migration * * For fail_gpu_migration, the gpu blit scheduled is always a clear blit * rather than a copy blit, and then we force the failure paths as if -- 2.36.1
[Intel-gfx] [PATCH 11/32] drm/i915: document kernel-doc trivial issues
Fix those kernel-doc warnings:
drivers/gpu/drm/i915/intel_region_ttm.c:199: warning: Function
parameter or member 'offset' not described in 'intel_region_ttm_resource_alloc'
drivers/gpu/drm/i915/i915_vma_resource.h:123: warning: Function
parameter or member 'wakeref' not described in 'i915_vma_resource'
drivers/gpu/drm/i915/i915_vma.c:1703: warning: Function parameter or
member 'vma' not described in 'i915_vma_destroy_locked'
drivers/gpu/drm/i915/i915_vma.c:751: warning: Function parameter or
member 'ww' not described in 'i915_vma_insert'
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:159: warning: Function
parameter or member 'gt' not described in 'intel_gt_fini_hwconfig'
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:146: warning: Function
parameter or member 'gt' not described in 'intel_gt_init_hwconfig'
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:113: warning: expecting
prototype for intel_guc_hwconfig_init(). Prototype was for guc_hwconfig_init()
instead
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:113: warning: Function
parameter or member 'gt' not described in 'guc_hwconfig_init'
drivers/gpu/drm/i915/gt/intel_engine_types.h:276: warning: Function
parameter or member 'preempt_hang' not described in 'intel_engine_execlists'
That are due undocumented parameters.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/gt/intel_engine_types.h| 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 5 -
drivers/gpu/drm/i915/i915_vma.c | 2 ++
drivers/gpu/drm/i915/i915_vma_resource.h| 1 +
drivers/gpu/drm/i915/intel_region_ttm.c | 3 ++-
5 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 633a7e5dba3b..7c5ad9071fe7 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -271,6 +271,7 @@ struct intel_engine_execlists {
*/
u8 csb_head;
+ /* private: Used only in selftests */
I915_SELFTEST_DECLARE(struct st_preempt_hang preempt_hang;)
};
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
index 4781fccc2687..76f7447302a6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
@@ -103,7 +103,8 @@ static bool has_table(struct drm_i915_private *i915)
}
/**
- * intel_guc_hwconfig_init - Initialize the HWConfig
+ * guc_hwconfig_init - Initialize the HWConfig
+ * @gt: GT structure
*
* Retrieve the HWConfig table from the GuC and save it locally.
* It can then be queried on demand by other users later on.
@@ -138,6 +139,7 @@ static int guc_hwconfig_init(struct intel_gt *gt)
/**
* intel_gt_init_hwconfig - Initialize the HWConfig if available
+ * @gt: GT structure
*
* Retrieve the HWConfig table if available on the current platform.
*/
@@ -151,6 +153,7 @@ int intel_gt_init_hwconfig(struct intel_gt *gt)
/**
* intel_gt_fini_hwconfig - Finalize the HWConfig
+ * @gt: GT structure
*
* Free up the memory allocation holding the table.
*/
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index ef3b04c7e153..ddf348c597b0 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -733,6 +733,7 @@ bool i915_gem_valid_gtt_space(struct i915_vma *vma,
unsigned long color)
/**
* i915_vma_insert - finds a slot for the vma in its address space
* @vma: the vma
+ * @ww: An optional struct i915_gem_ww_ctx
* @size: requested size in bytes (can be larger than the VMA)
* @alignment: required alignment
* @flags: mask of PIN_* flags to use
@@ -1675,6 +1676,7 @@ static void release_references(struct i915_vma *vma,
struct intel_gt *gt,
/**
* i915_vma_destroy_locked - Remove all weak reference to the vma and put
* the initial reference.
+ * @vma: VMA to destroy
*
* This function should be called when it's decided the vma isn't needed
* anymore. The caller must assure that it doesn't race with another lookup
diff --git a/drivers/gpu/drm/i915/i915_vma_resource.h
b/drivers/gpu/drm/i915/i915_vma_resource.h
index 14a0327b2080..a15271d96b7e 100644
--- a/drivers/gpu/drm/i915/i915_vma_resource.h
+++ b/drivers/gpu/drm/i915/i915_vma_resource.h
@@ -49,6 +49,7 @@ struct i915_page_sizes {
* @__subtree_last: Interval tree private member.
* @vm: non-refcounted pointer to the vm. This is for internal use only and
* this member is cleared after vm_resource unbind.
+ * @wakeref: wakeref used for runtime PM reference.
* @mr: The memory region of the object pointed to by the vma.
* @ops: Pointer to the back
[Intel-gfx] [PATCH 12/32] drm/i915: intel_dp_link_training.c: fix kernel-doc markup
The return code table is not properly marked, causing warnings
and being badly parsed by Sphinx:
Documentation/gpu/i915:130:
./drivers/gpu/drm/i915/display/intel_dp_link_training.c:183: WARNING: Block
quote ends without a blank line; unexpected unindent.
Documentation/gpu/i915:130:
./drivers/gpu/drm/i915/display/intel_dp_link_training.c:186: WARNING:
Definition list ends without a blank line; unexpected unindent.
Use table markups to fix it.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 9feaf1a589f3..23a269fcf6ca 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -177,12 +177,14 @@ static int intel_dp_init_lttpr(struct intel_dp *intel_dp,
const u8 dpcd[DP_RECEI
* transparent mode link training mode.
*
* Returns:
+ * =
* >0 if LTTPRs were detected and the non-transparent LT mode was set. The
* DPRX capabilities are read out.
*0 if no LTTPRs or more than 8 LTTPRs were detected or in case of a
* detection failure and the transparent LT mode was set. The DPRX
* capabilities are read out.
* <0 Reading out the DPRX capabilities failed.
+ * =
*/
int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)
{
--
2.36.1
[Intel-gfx] [PATCH 16/32] drm/i915: i915_gem_region.h: fix i915_gem_apply_to_region_ops doc
The kernel-doc markup for i915_gem_apply_to_region_ops() has some
issues:
1. The field should be marked as @process_obj;
2. The callback parameters aren't document properly, as sphinx
will consider them to be placed at the wrong place.
Fix (1) and change the way the parameters are described, using
a list, in order for it to be properly parsed during documentation
build time.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/gem/i915_gem_region.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_region.h
b/drivers/gpu/drm/i915/gem/i915_gem_region.h
index 2dfcc41c0170..b0134bf4b1b7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_region.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_region.h
@@ -22,9 +22,11 @@ struct i915_gem_apply_to_region;
*/
struct i915_gem_apply_to_region_ops {
/**
-* process_obj - Process the current object
-* @apply: Embed this for private data.
-* @obj: The current object.
+* @process_obj: Callback function to process the current object
+* it requires two arguments:
+*
+* - @apply: Embed this for private data.
+* - @obj: The current object.
*
* Note that if this function is part of a ww transaction, and
* if returns -EDEADLK for one of the objects, it may be
--
2.36.1
[Intel-gfx] [PATCH 31/32] docs: gpu: i915.rst: GEM/TTM: add more kernel-doc markups
There are several documented GEM/TTM kAPI that aren't currently part of the docs. Add them, as this allows identifying issues with badly-formatted tags. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ Documentation/gpu/i915.rst | 38 ++ 1 file changed, 38 insertions(+) diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index c32409c03d32..974754586be8 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -615,6 +615,44 @@ Protected Objects .. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp_types.h +Table Manager (TTM) +--- + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_ttm.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_ttm.h + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c + +Graphics Execution Manager (GEM) + + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_create.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_domain.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_internal.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_lmem.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_mman.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_object.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_object.h + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_object_types.h + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_region.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_region.h + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_userptr.c + +.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_wait.c + Microcontrollers -- 2.36.1
[Intel-gfx] [PATCH 29/32] docs: gpu: i915.rst: GVT: add more kernel-doc markups
There are several documented GVT kAPI that aren't currently part of the docs. Add them, as this allows identifying issues with badly-formatted tags. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ Documentation/gpu/i915.rst | 41 ++ 1 file changed, 41 insertions(+) diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index 70f2f4826eba..3ee121a0ea62 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -58,6 +58,47 @@ Intel GVT-g Host Support(vGPU device model) .. kernel-doc:: drivers/gpu/drm/i915/intel_gvt.c :internal: +Other Intel GVT-g interfaces + + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/gvt.h + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/aperture_gm.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/cfg_space.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/debugfs.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/display.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/edid.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/fb_decoder.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/firmware.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/gtt.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/handlers.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/interrupt.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/kvmgt.c + +.. kernel-doc:: drivers/gpu/drm/i915/intel_gvt_mmio_table.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/mmio.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/mmio_context.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/opregion.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/page_track.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/scheduler.c + +.. kernel-doc:: drivers/gpu/drm/i915/gvt/vgpu.c + Workarounds --- -- 2.36.1
[Intel-gfx] [PATCH 32/32] docs: gpu: i915.rst: add the remaining kernel-doc markup files
There are other files with kernel-doc markups: $ git grep -l "/\*\*" $(git ls-files|grep drivers/gpu/drm/i915/) >kernel-doc-files $ for i in $(cat kernel-doc-files); do if [ "$(git grep $i Documentation/)" == "" ]; then echo "$i"; fi; done >aaa Add them to i915.rst as well. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ Documentation/gpu/i915.rst | 87 ++ 1 file changed, 87 insertions(+) diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index 974754586be8..6bb50edc6d79 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -13,6 +13,11 @@ Core Driver Infrastructure This section covers core driver infrastructure used by both the display and the GEM parts of the driver. +Core driver +--- + +.. kernel-doc:: drivers/gpu/drm/i915/i915_driver.c + Runtime Power Management @@ -29,6 +34,10 @@ Runtime Power Management .. kernel-doc:: drivers/gpu/drm/i915/intel_pm.c +.. kernel-doc:: drivers/gpu/drm/i915/intel_wakeref.h + +.. kernel-doc:: drivers/gpu/drm/i915/i915_active.h + Interrupt Handling -- @@ -44,6 +53,28 @@ Interrupt Handling .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c :functions: intel_runtime_pm_enable_interrupts +Error handling +-- + +.. kernel-doc:: drivers/gpu/drm/i915/i915_gpu_error.c + +Memory Handling +--- + +.. kernel-doc:: drivers/gpu/drm/i915/i915_vma_resource.h + +.. kernel-doc:: drivers/gpu/drm/i915/i915_vma_resource.c + +.. kernel-doc:: drivers/gpu/drm/i915/i915_vma.h + +.. kernel-doc:: drivers/gpu/drm/i915/i915_vma.c + +.. kernel-doc:: drivers/gpu/drm/i915/i915_mm.c + +.. kernel-doc:: drivers/gpu/drm/i915/intel_memory_region.c + +.. kernel-doc:: drivers/gpu/drm/i915/i915_memcpy.c + Intel GVT-g Guest Support(vGPU) --- @@ -109,6 +140,54 @@ Workarounds .. kernel-doc:: drivers/gpu/drm/i915/gt/intel_workarounds.c :doc: Hardware workarounds +32-bits compatible ioctl Logic +-- + +.. kernel-doc:: drivers/gpu/drm/i915/i915_ioc32.c + +Scatterlist handling + + +.. kernel-doc:: drivers/gpu/drm/i915/i915_scatterlist.h + +.. kernel-doc:: drivers/gpu/drm/i915/i915_scatterlist.c + +i915 request + + +.. kernel-doc:: drivers/gpu/drm/i915/i915_request.h + +.. kernel-doc:: drivers/gpu/drm/i915/i915_request.c + +Ancillary routines +-- + +.. kernel-doc:: drivers/gpu/drm/i915/i915_deps.c + +.. kernel-doc:: drivers/gpu/drm/i915/i915_deps.h + +.. kernel-doc:: drivers/gpu/drm/i915/intel_device_info.c + +.. kernel-doc:: drivers/gpu/drm/i915/i915_params.c + +.. kernel-doc:: drivers/gpu/drm/i915/i915_sw_fence_work.h + +.. kernel-doc:: drivers/gpu/drm/i915/i915_syncmap.c + +.. kernel-doc:: drivers/gpu/drm/i915/intel_pcode.c + +.. kernel-doc:: drivers/gpu/drm/i915/i915_reg_defs.h + +.. kernel-doc:: drivers/gpu/drm/i915/intel_wopcm.h + + +PXP +--- + +.. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp_irq.c + +.. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp_tee.c + Display Hardware Handling = @@ -618,6 +697,12 @@ Protected Objects Table Manager (TTM) --- +.. kernel-doc:: drivers/gpu/drm/i915/i915_ttm_buddy_manager.h + +.. kernel-doc:: drivers/gpu/drm/i915/i915_ttm_buddy_manager.c + +.. kernel-doc:: drivers/gpu/drm/i915/intel_region_ttm.c + .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_ttm.c .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_ttm.h @@ -627,6 +712,8 @@ Table Manager (TTM) Graphics Execution Manager (GEM) +.. kernel-doc:: drivers/gpu/drm/i915/i915_gem.c + .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_create.c .. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_domain.c -- 2.36.1
[Intel-gfx] [PATCH 26/32] docs: gpu: i915.rst: display: add kernel-doc markups
There are several documented kAPI at the display side that aren't currently part of the docs. Add them, as this allows identifying issues with badly-formatted tags. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ Documentation/gpu/i915.rst | 50 ++ 1 file changed, 50 insertions(+) diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index 4e59db1cfb00..2ad7941a79f2 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -100,6 +100,56 @@ Display FIFO Underrun Reporting .. kernel-doc:: drivers/gpu/drm/i915/display/intel_fifo_underrun.c :internal: +Atomic Modeset Support +-- + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_atomic.c + +Display Power Domain + + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_display_power.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_display_power_map.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_display_power_well.c + +Misc display functions +-- + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_backlight.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_crtc.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_connector.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_display_debugfs.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dp.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dp_link_training.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpt.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_fb.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_fb_pin.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_gmbus.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_lvds.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_opregion.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_snps_phy.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/intel_tc.c + +.. kernel-doc:: drivers/gpu/drm/i915/display/skl_scaler.c + + Plane Configuration --- -- 2.36.1
[Intel-gfx] [PATCH 00/32] drm/i915: fix kernel-doc issues
There are several kernel-doc markups along the i915 driver that aren't part of the i915.rst file, nor are included on any other file under Documentation. Maybe due to that, there are several kernel-doc markups that report problems when checked with scripts/kernel-doc. More than that, some of them also have problems when actually integrated at the building system, as reported by Sphinx. Along the issues we have: - renamed symbols where the prototype doesn't match the kernel-doc name; - some markups doesn't have the symbol name on it; - typos when defining parameter; - some parameters are missing; - some ascii artwork aren't properly displayed after parsed by Sphinx; - some other tags produce bad results and warnings after parsed by html build; - some "/**" patterns exist on places that aren't kernel-doc markups. This series, against drm-tip, fix all the above issues and all all such files to i915.rst. This way, it will be easier to avoid other problems to be introduced. While here, I also added SPDX on two display files. Besides being the current way to indicate the license, it also makes easier to find all files with kernel-doc markups, as all it is needed is to search for "/**" at i915 files to know what of them have embedded documentation. Mauro Carvalho Chehab (32): drm/i915: fix kernel-doc trivial warnings on i915/*.[ch] files drm/i915: display: fix kernel-doc markup warnings drm/i915: gt: fix some Kernel-doc issues drm/i915: gvt: fix kernel-doc trivial warnings drm/i915: gem: fix some Kernel-doc issues drm/i915: intel_wakeref.h: fix some kernel-doc markups drm/i915: i915_gem_ttm: fix a kernel-doc markup drm/i915: i915_gem_ttm_pm.c: fix kernel-doc markups drm/i915: gem: add missing trivial function parameters drm/i915: i915_gpu_error.c: document dump_flags drm/i915: document kernel-doc trivial issues drm/i915: intel_dp_link_training.c: fix kernel-doc markup drm/i915: intel_fb: fix a kernel-doc issue with Sphinx drm/i915: skl_scaler: fix return value kernel-doc markup drm/i915: intel_pm.c: fix some ascii artwork at kernel-doc drm/i915: i915_gem_region.h: fix i915_gem_apply_to_region_ops doc drm/i915: i915_gem_wait.c: fix a kernel-doc markup drm/i915: fix i915_gem_ttm_move.c DOC: markup drm/i915: stop using kernel-doc markups for something else drm/i915: dvo_ch7xxx.c: use SPDX header drm/i915: dvo_sil164.c: use SPDX header drm/i915: i915_vma_resource.c: fix some kernel-doc markups drm/i915: i915_gem.c fix a kernel-doc issue drm/i915: i915_scatterlist.h: fix some kernel-doc markups drm/i915: i915_deps: use a shorter title markup docs: gpu: i915.rst: display: add kernel-doc markups docs: gpu: i915.rst: gt: add more kernel-doc markups docs: gpu: i915.rst: GuC: add more kernel-doc markups docs: gpu: i915.rst: GVT: add more kernel-doc markups docs: gpu: i915.rst: PM: add more kernel-doc markups docs: gpu: i915.rst: GEM/TTM: add more kernel-doc markups docs: gpu: i915.rst: add the remaining kernel-doc markup files Documentation/gpu/i915.rst| 283 ++ drivers/gpu/drm/i915/display/dvo_ch7017.c | 26 +- drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 39 +-- drivers/gpu/drm/i915/display/dvo_sil164.c | 32 +- .../drm/i915/display/intel_display_debugfs.c | 2 +- .../drm/i915/display/intel_display_power.c| 2 +- .../drm/i915/display/intel_display_types.h| 2 +- .../drm/i915/display/intel_dp_link_training.c | 2 + drivers/gpu/drm/i915/display/intel_dvo_dev.h | 6 +- drivers/gpu/drm/i915/display/intel_fb.c | 2 +- drivers/gpu/drm/i915/display/intel_sdvo.c | 4 +- drivers/gpu/drm/i915/display/intel_tc.c | 2 +- drivers/gpu/drm/i915/display/intel_tv.c | 2 +- drivers/gpu/drm/i915/display/skl_scaler.c | 6 +- drivers/gpu/drm/i915/gem/i915_gem_create.c| 8 +- drivers/gpu/drm/i915/gem/i915_gem_domain.c| 17 +- drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 + drivers/gpu/drm/i915/gem/i915_gem_object.h| 2 +- drivers/gpu/drm/i915/gem/i915_gem_region.h| 8 +- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 + drivers/gpu/drm/i915/gem/i915_gem_ttm.h | 1 + drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 4 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c| 8 +- drivers/gpu/drm/i915/gem/i915_gem_wait.c | 26 +- drivers/gpu/drm/i915/gt/intel_context.h | 6 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 63 ++-- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h | 2 +- drivers/gpu/drm/i915/gt/intel_gt_types.h | 12 +- drivers/gpu/drm/i915/gt/intel_gtt.h | 6 +- drivers/gpu/drm/i915/gt/intel_reset_types.h | 4 +- drivers/gpu/drm/i915/gt/intel_rps.c | 4 +- .../gpu/drm/i915/gt/intel_timeline_types.h| 6 +- .../drm/i915/gt/shaders/clear_kernel/hsw.asm
[Intel-gfx] [PATCH 02/32] drm/i915: display: fix kernel-doc markup warnings
There are a couple of issues at i915 display kernel-doc markups: drivers/gpu/drm/i915/display/intel_display_debugfs.c:2238: warning: Function parameter or member 'intel_connector' not described in 'intel_connector_debugfs_add' drivers/gpu/drm/i915/display/intel_display_debugfs.c:2238: warning: Excess function parameter 'connector' description in 'intel_connector_debugfs_add' drivers/gpu/drm/i915/display/intel_display_power.c:700: warning: expecting prototype for intel_display_power_put_async(). Prototype was for __intel_display_power_put_async() instead drivers/gpu/drm/i915/display/intel_tc.c:807: warning: Function parameter or member 'work' not described in 'intel_tc_port_disconnect_phy_work' drivers/gpu/drm/i915/display/intel_tc.c:807: warning: Excess function parameter 'dig_port' description in 'intel_tc_port_disconnect_phy_work' Those are due to wrong parameter of function name. Address them. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +- drivers/gpu/drm/i915/display/intel_display_power.c | 2 +- drivers/gpu/drm/i915/display/intel_tc.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 6c3954479047..1e35eb01742b 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -2229,7 +2229,7 @@ DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); /** * intel_connector_debugfs_add - add i915 specific connector debugfs files - * @connector: pointer to a registered drm_connector + * @intel_connector: pointer to a registered drm_connector * * Cleanup will be done by drm_connector_unregister() through a call to * drm_debugfs_connector_remove(). diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 589af257edeb..fd6b71160a06 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -685,7 +685,7 @@ intel_display_power_put_async_work(struct work_struct *work) } /** - * intel_display_power_put_async - release a power domain reference asynchronously + * __intel_display_power_put_async - release a power domain reference asynchronously * @i915: i915 device instance * @domain: power domain to reference * @wakeref: wakeref acquired for the reference that is being released diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 6773840f6cc7..7ce0cbe0de05 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -797,7 +797,7 @@ void intel_tc_port_lock(struct intel_digital_port *dig_port) /** * intel_tc_port_disconnect_phy_work: disconnect TypeC PHY from display port - * @dig_port: digital port + * @work: workqueue struct * * Disconnect the given digital port from its TypeC PHY (handing back the * control of the PHY to the TypeC subsystem). This will happen in a delayed -- 2.36.1
[Intel-gfx] [PATCH 28/32] docs: gpu: i915.rst: GuC: add more kernel-doc markups
There are several documented GuC kAPI that aren't currently part of the docs. Add them, as this allows identifying issues with badly-formatted tags. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ Documentation/gpu/i915.rst | 22 ++ 1 file changed, 22 insertions(+) diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index afd8c0e3c689..70f2f4826eba 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -596,6 +596,28 @@ GuC .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.h +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_log.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_uc.c + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c + GuC Firmware Layout ~~~ -- 2.36.1
[Intel-gfx] [PATCH 07/32] drm/i915: i915_gem_ttm: fix a kernel-doc markup
Two new fields were added to __i915_gem_ttm_object_init() without
their corresponding documentation.
Document them.
Fixes: 9b78b5dade2d ("drm/i915: add i915_gem_object_create_region_at()")
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 4b54ef3d1f74..6446748c4a70 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -1180,7 +1180,9 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
* __i915_gem_ttm_object_init - Initialize a ttm-backed i915 gem object
* @mem: The initial memory region for the object.
* @obj: The gem object.
+ * @offset: The range start.
* @size: Object size in bytes.
+ * @page_size: The requested page size in bytes for this object.
* @flags: gem object flags.
*
* Return: 0 on success, negative error code on failure.
--
2.36.1
[Intel-gfx] [PATCH 30/32] docs: gpu: i915.rst: PM: add more kernel-doc markups
Both intel_runtime_pm.h and intel_pm.c contains kAPI for runtime PM. So, add them to the documentation. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ Documentation/gpu/i915.rst | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index 3ee121a0ea62..c32409c03d32 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -25,6 +25,10 @@ Runtime Power Management .. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c :internal: +.. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.h + +.. kernel-doc:: drivers/gpu/drm/i915/intel_pm.c + Interrupt Handling -- -- 2.36.1
[Intel-gfx] [PATCH 22/32] drm/i915: i915_vma_resource.c: fix some kernel-doc markups
Building docs currently produces two warnings: Documentation/foo/i915:71: ./drivers/gpu/drm/i915/i915_vma_resource.c:286: WARNING: Inline strong start-string without end-string. Documentation/foo/i915:71: ./drivers/gpu/drm/i915/i915_vma_resource.c:370: WARNING: Inline strong start-string without end-string. That's because @foo evaluates into **foo**, and placing anything after it without spaces cause Sphinx to warn and do the wrong thing.. So, replace them by a different Sphinx-compatible tag. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/i915_vma_resource.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_vma_resource.c b/drivers/gpu/drm/i915/i915_vma_resource.c index 27c55027387a..fa5a678018d9 100644 --- a/drivers/gpu/drm/i915/i915_vma_resource.c +++ b/drivers/gpu/drm/i915/i915_vma_resource.c @@ -283,7 +283,7 @@ i915_vma_resource_color_adjust_range(struct i915_address_space *vm, * * The function needs to be called with the vm lock held. * - * Return: Zero on success, -ERESTARTSYS if interrupted and @intr==true + * Return: Zero on success, -ERESTARTSYS if interrupted and ``intr==true`` */ int i915_vma_resource_bind_dep_sync(struct i915_address_space *vm, u64 offset, @@ -367,7 +367,7 @@ void i915_vma_resource_bind_dep_sync_all(struct i915_address_space *vm) * this means that during heavy memory pressure, we will sync in this * function. * - * Return: Zero on success, -ERESTARTSYS if interrupted and @intr==true + * Return: Zero on success, -ERESTARTSYS if interrupted and ``intr==true`` */ int i915_vma_resource_bind_dep_await(struct i915_address_space *vm, struct i915_sw_fence *sw_fence, -- 2.36.1
[Intel-gfx] [PATCH 13/32] drm/i915: intel_fb: fix a kernel-doc issue with Sphinx
We can't use %foo[] as this produces a bad markup. Use instead, the emphasis markup directly. Fix this issue: Documentation/gpu/i915:136: ./drivers/gpu/drm/i915/display/intel_fb.c:280: WARNING: Inline strong start-string without end-string. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/display/intel_fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c index b191915ab351..fe72c75a9c79 100644 --- a/drivers/gpu/drm/i915/display/intel_fb.c +++ b/drivers/gpu/drm/i915/display/intel_fb.c @@ -276,7 +276,7 @@ lookup_format_info(const struct drm_format_info formats[], * @cmd: FB add command structure * * Returns: - * Returns the format information for @cmd->pixel_format specific to @cmd->modifier[0], + * Returns the format information for @cmd->pixel_format specific to **cmd->modifier[0]**, * or %NULL if the modifier doesn't override the format. */ const struct drm_format_info * -- 2.36.1
[Intel-gfx] [PATCH 25/32] drm/i915: i915_deps: use a shorter title markup
The DOC: tag waits for a one-line short title for the doc section. Using multiple lines will produce a weird output. So, add a shorter description for the title, while keeping the current content below it. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/i915_deps.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_deps.c b/drivers/gpu/drm/i915/i915_deps.c index 297b8e4e42ee..df6af832e3f2 100644 --- a/drivers/gpu/drm/i915/i915_deps.c +++ b/drivers/gpu/drm/i915/i915_deps.c @@ -11,7 +11,9 @@ #include "i915_deps.h" /** - * DOC: Set of utilities to dynamically collect dependencies into a + * DOC: Utilities to collect dependencies for GT migration code + * + * Set of utilities to dynamically collect dependencies into a * structure which is fed into the GT migration code. * * Once we can do async unbinding, this is also needed to coalesce -- 2.36.1
[Intel-gfx] [PATCH 06/32] drm/i915: intel_wakeref.h: fix some kernel-doc markups
Two documented functions don't match the kernel-doc comments, as reported by kernel-doc: drivers/gpu/drm/i915/intel_wakeref.h:117: warning: expecting prototype for intel_wakeref_get_if_in_use(). Prototype was for intel_wakeref_get_if_active() instead drivers/gpu/drm/i915/intel_wakeref.h:149: warning: expecting prototype for intel_wakeref_put_flags(). Prototype was for __intel_wakeref_put() instead Fix them. Additionally, improve title for intel_wakeref_get_if_active(). Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/ drivers/gpu/drm/i915/intel_wakeref.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_wakeref.h b/drivers/gpu/drm/i915/intel_wakeref.h index 4f4c2e15e736..63e539c9b1f3 100644 --- a/drivers/gpu/drm/i915/intel_wakeref.h +++ b/drivers/gpu/drm/i915/intel_wakeref.h @@ -104,7 +104,7 @@ __intel_wakeref_get(struct intel_wakeref *wf) } /** - * intel_wakeref_get_if_in_use: Acquire the wakeref + * intel_wakeref_get_if_active: Acquire the wakeref if active * @wf: the wakeref * * Acquire a hold on the wakeref, but only if the wakeref is already @@ -130,7 +130,7 @@ intel_wakeref_might_get(struct intel_wakeref *wf) } /** - * intel_wakeref_put_flags: Release the wakeref + * __intel_wakeref_put: Release the wakeref * @wf: the wakeref * @flags: control flags * -- 2.36.1
[Intel-gfx] [PATCH 15/32] drm/i915: intel_pm.c: fix some ascii artwork at kernel-doc
Preserving ascii artwork on kernel-docs is tricky, as it needs
to respect both the Sphinx rules and be properly parsed by
kernel-doc script.
The Sphinx syntax require code-blocks, which is:
::
followed by a blank line and indended lines.
But kernel-doc only works fine if the first and the last line
are indented with the same amount of spaces.
Also, a "\" at the end means that the next line should be merged
with the first one.
Change the ascii artwork to be on code-blocks, starting all
lines at the same characters and not ending with a backslash.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH 00/32] at:
https://lore.kernel.org/all/cover.1657565224.git.mche...@kernel.org/
drivers/gpu/drm/i915/intel_pm.c | 33 ++---
1 file changed, 18 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f06babdb3a8c..d3393752b04b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -684,18 +684,20 @@ static const struct intel_watermark_params i845_wm_info =
{
* FIFO is relatively small compared to the amount of data
* fetched.
*
- * The FIFO level vs. time graph might look something like:
+ * The FIFO level vs. time graph might look something like::
*
- * |\ |\
- * | \ | \
- * __---__---__ (- plane active, _ blanking)
- * -> time
+ * ^
+ * | |\ |\ ( )
+ * | | \ | \ ( )
+ * | __---__---__ (- plane active, _ blanking)
+ * +---> time
*
- * or perhaps like this:
+ * or perhaps like this::
*
- * |\|\ |\|\
- * ______ (- plane active, _ blanking)
- * -> time
+ * ^
+ * | |\|\ |\|\ ( )
+ * | ______ (- plane active, _ blanking)
+ * +---> time
*
* Returns:
* The watermark in bytes
@@ -731,13 +733,14 @@ static unsigned int intel_wm_method1(unsigned int
pixel_rate,
* FIFO is relatively large compared to the amount of data
* fetched.
*
- * The FIFO level vs. time graph might look something like:
+ * The FIFO level vs. time graph might look something like::
*
- *|\___ |\___
- *|\___ |\___
- *|\ |\
- * __ --__--__--__--__--__--__ (- plane active, _ blanking)
- * -> time
+ * ^
+ * | |\___ |\___( )
+ * | |\___ |\___( )
+ * | |\ |\ ( )
+ * | __ --__--__--__--__--__--__ (- plane active, _ blanking)
+ * +-> time
*
* Returns:
* The watermark in bytes
--
2.36.1
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Fix TLB invalidate issues with Broadwell (rev5)
On Mon, Jul 11, 2022 at 05:11:23PM +0200, Mauro Carvalho Chehab wrote: > On Mon, 11 Jul 2022 10:06:38 -0400 > Rodrigo Vivi wrote: > > > On Mon, Jul 11, 2022 at 08:22:33AM -, Patchwork wrote: > > >Patch Details > > > > > >Series: Fix TLB invalidate issues with Broadwell (rev5) > > >URL: [1]https://patchwork.freedesktop.org/series/105167/ > > >State: failure > > >Details: > > >[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/index.ht > > >ml > > > > > > CI Bug Log - changes from CI_DRM_11862 -> Patchwork_105167v5 > > > > > > Summary > > > > > >FAILURE > > > > > >Serious unknown changes coming with Patchwork_105167v5 absolutely need > > >to be > > >verified manually. > > > > > >If you think the reported changes have nothing to do with the changes > > >introduced in Patchwork_105167v5, please notify your bug team to allow > > >them > > >to document this new failure mode, which will reduce false positives in > > >CI. > > > > > >External URL: > > >https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/index.html > > > > > > Participating hosts (45 -> 42) > > > > > >Additional (2): bat-rpls-1 bat-dg1-5 > > >Missing (5): fi-cml-u2 fi-hsw-4200u fi-icl-u2 fi-ctg-p8600 bat-jsl-3 > > > > > > Possible new issues > > > > > >Here are the unknown changes that may have been introduced in > > >Patchwork_105167v5: > > > > > > IGT changes > > > > > > Possible regressions > > > > > > * igt@i915_selftest@live@gem: > > > + fi-elk-e7500: [3]PASS -> [4]DMESG-FAIL > > > > I also believe this is a false positive... > > triggered a retest... > > Yeah, the latest test gave success: > > Subject: [Intel-gfx] ✓ Fi.CI.BAT: success for Fix TLB invalidate issues > with Broadwell (rev6) > Date: Mon, 11 Jul 2022 14:53:40 - > Reply-To: intel-gfx@lists.freedesktop.org > Sender: "Intel-gfx" > > == Series Details == > > Series: Fix TLB invalidate issues with Broadwell (rev6) > URL : https://patchwork.freedesktop.org/series/105167/ > State : success > > > > > hoping to get this series merged today... > > Yeah, it would be great to have this merged, as it is a regression > fix. we got yet another false positive... I was tired and decided to ignore and move ahead. but then I noticed that the author and sign-off-bys are not right... :( please fix that... the author needs to sign-off-by... > > Regards, > Mauro
Re: [Intel-gfx] [PATCH] drm/i915/selftests: fix subtraction overflow bug
Hi Andrzej,
On Fri, Jun 24, 2022 at 01:35:28PM +0200, Andrzej Hajda wrote:
> On some machines hole_end can be small enough to cause subtraction
> overflow. On the other side (addr + 2 * min_alignment) can overflow
> in case of mock tests. This patch should handle both cases.
>
> Fixes: e1c5f754067b59 ("drm/i915: Avoid overflow in computing pot_hole loop
> termination")
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3674
> Signed-off-by: Andrzej Hajda
pushed in drm-intel-next-fixes
Thanks,
Andi
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/doc/rfc: VM_BIND fix a few grammatical slip-ups and typos
== Series Details == Series: drm/doc/rfc: VM_BIND fix a few grammatical slip-ups and typos URL : https://patchwork.freedesktop.org/series/106202/ State : success == Summary == CI Bug Log - changes from CI_DRM_11870 -> Patchwork_106202v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/index.html Participating hosts (33 -> 42) -- Additional (11): fi-kbl-soraka bat-dg1-5 bat-dg2-8 bat-adlp-6 bat-adlp-4 fi-hsw-4770 bat-adln-1 bat-jsl-3 bat-rpls-1 bat-rpls-2 bat-jsl-1 Missing(2): fi-ctg-p8600 fi-hsw-4200u Known issues Here are the changes found in Patchwork_106202v1 that come from known issues: ### IGT changes ### Issues hit * igt@fbdev@nullptr: - bat-dg1-5: NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@fb...@nullptr.html * igt@gem_exec_gttfill@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +8 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/fi-kbl-soraka/igt@gem_exec_gttf...@basic.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-adlp-4: NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-adlp-4/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#4083]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@gem_m...@basic.html * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770:NOTRUN -> [SKIP][7] ([fdo#109271]) +9 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html * igt@gem_tiled_blits@basic: - bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#4077]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-5: NOTRUN -> [SKIP][9] ([i915#4079]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@gem_tiled_pread_basic.html - bat-adlp-4: NOTRUN -> [SKIP][10] ([i915#3282]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-adlp-4/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#3012]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html - bat-dg1-5: NOTRUN -> [SKIP][12] ([i915#1155]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][13] ([i915#1886]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@hangcheck: - bat-dg1-5: NOTRUN -> [DMESG-FAIL][14] ([i915#4494] / [i915#4957]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html * igt@i915_selftest@live@reset: - bat-adlp-4: NOTRUN -> [DMESG-FAIL][15] ([i915#4983]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-adlp-4/igt@i915_selftest@l...@reset.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-dg1-5: NOTRUN -> [INCOMPLETE][16] ([i915#6011]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][17] ([i915#4212]) +7 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][18] ([i915#4215]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106202v1/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_busy@basic: - bat-dg1-5: NOTRUN -> [SKIP][19] ([i915#1845] / [i915#4303]) [19]: h
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Add debug print for scaler filter
== Series Details ==
Series: drm/i915/display: Add debug print for scaler filter
URL : https://patchwork.freedesktop.org/series/105954/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11850_full -> Patchwork_105954v1_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (10 -> 13)
--
Additional (3): shard-rkl shard-dg1 shard-tglu
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_105954v1_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_plane_lowres@tiling-4:
- {shard-rkl}:NOTRUN -> [SKIP][1] +2 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-rkl-5/igt@kms_plane_low...@tiling-4.html
Known issues
Here are the changes found in Patchwork_105954v1_full that come from known
issues:
### CI changes ###
Possible fixes
* boot:
- shard-glk: ([PASS][2], [PASS][3], [PASS][4], [PASS][5],
[PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12],
[PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18],
[PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24],
[FAIL][25], [PASS][26]) ([i915#4392]) -> ([PASS][27], [PASS][28], [PASS][29],
[PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35],
[PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41],
[PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47],
[PASS][48], [PASS][49], [PASS][50], [PASS][51])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk8/boot.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk8/boot.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk8/boot.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk7/boot.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk7/boot.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk7/boot.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk6/boot.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk6/boot.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk6/boot.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk5/boot.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk5/boot.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk5/boot.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk3/boot.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk3/boot.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk3/boot.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk2/boot.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk2/boot.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk2/boot.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk1/boot.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk1/boot.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk1/boot.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk9/boot.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk9/boot.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk9/boot.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk9/boot.html
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk8/boot.html
[28]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk7/boot.html
[29]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk1/boot.html
[30]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk1/boot.html
[31]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk2/boot.html
[32]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk2/boot.html
[33]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk2/boot.html
[34]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk9/boot.html
[35]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk2/boot.html
[36]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk9/boot.html
[37]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk9/boot.html
[38]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk3/boot
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: stop HPD workers before display driver unregister (rev3)
== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev3)
URL : https://patchwork.freedesktop.org/series/105557/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11870_full -> Patchwork_105557v3_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_105557v3_full absolutely need
to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_105557v3_full, please notify your bug team to allow
them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 12)
--
Missing(1): shard-dg1
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_105557v3_full:
### IGT changes ###
Possible regressions
* igt@kms_atomic_transition@plane-all-transition-nonblocking@edp-1-pipe-b:
- shard-tglb: [PASS][1] -> [FAIL][2] +1 similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-tglb8/igt@kms_atomic_transition@plane-all-transition-nonblock...@edp-1-pipe-b.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-tglb2/igt@kms_atomic_transition@plane-all-transition-nonblock...@edp-1-pipe-b.html
* igt@kms_invalid_mode@zero-vdisplay@edp-1-pipe-a:
- shard-tglb: [PASS][3] -> [WARN][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-tglb8/igt@kms_invalid_mode@zero-vdisp...@edp-1-pipe-a.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-tglb2/igt@kms_invalid_mode@zero-vdisp...@edp-1-pipe-a.html
Warnings
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-skl: [FAIL][5] ([i915#2346]) -> [FAIL][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-skl7/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-skl4/igt@kms_cursor_legacy@flip-vs-cur...@atomic-transitions.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_rmfb@rmfb-ioctl@pipe-d-edp-1}:
- shard-tglb: [PASS][7] -> [FAIL][8] +3 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-tglb8/igt@kms_rmfb@rmfb-io...@pipe-d-edp-1.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-tglb2/igt@kms_rmfb@rmfb-io...@pipe-d-edp-1.html
Known issues
Here are the changes found in Patchwork_105557v3_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@drm_fdinfo@busy-hang:
- shard-snb: NOTRUN -> [SKIP][9] ([fdo#109271]) +7 similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-snb7/igt@drm_fdi...@busy-hang.html
* igt@gem_ctx_persistence@engines-hostile:
- shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-snb7/igt@gem_ctx_persiste...@engines-hostile.html
* igt@gem_eio@unwedge-stress:
- shard-skl: NOTRUN -> [TIMEOUT][11] ([i915#3063])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-skl1/igt@gem_...@unwedge-stress.html
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [PASS][12] -> [SKIP][13] ([i915#4525])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-iclb2/igt@gem_exec_balan...@parallel-keep-submit-fence.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-iclb6/igt@gem_exec_balan...@parallel-keep-submit-fence.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][14] ([i915#2842])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-iclb4/igt@gem_exec_fair@basic-n...@vcs1.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-kbl: [PASS][15] -> [FAIL][16] ([i915#2842]) +1 similar
issue
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-kbl6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-kbl1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [PASS][17] -> [FAIL][18] ([i915#2842]) +1 similar
issue
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-glk3/igt@gem_exec_fair@basic-p...@rcs0.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/shard-glk2/igt@gem_exec_fair@basic-p...@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][19] -> [FAIL][20] ([i915#2849])
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Fix TLB invalidate issues with Broadwell (rev5)
On Mon, 11 Jul 2022 10:06:38 -0400 Rodrigo Vivi wrote: > On Mon, Jul 11, 2022 at 08:22:33AM -, Patchwork wrote: > >Patch Details > > > >Series: Fix TLB invalidate issues with Broadwell (rev5) > >URL: [1]https://patchwork.freedesktop.org/series/105167/ > >State: failure > >Details: > >[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/index.ht > >ml > > > > CI Bug Log - changes from CI_DRM_11862 -> Patchwork_105167v5 > > > > Summary > > > >FAILURE > > > >Serious unknown changes coming with Patchwork_105167v5 absolutely need > >to be > >verified manually. > > > >If you think the reported changes have nothing to do with the changes > >introduced in Patchwork_105167v5, please notify your bug team to allow > >them > >to document this new failure mode, which will reduce false positives in > >CI. > > > >External URL: > >https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/index.html > > > > Participating hosts (45 -> 42) > > > >Additional (2): bat-rpls-1 bat-dg1-5 > >Missing (5): fi-cml-u2 fi-hsw-4200u fi-icl-u2 fi-ctg-p8600 bat-jsl-3 > > > > Possible new issues > > > >Here are the unknown changes that may have been introduced in > >Patchwork_105167v5: > > > > IGT changes > > > > Possible regressions > > > > * igt@i915_selftest@live@gem: > > + fi-elk-e7500: [3]PASS -> [4]DMESG-FAIL > > I also believe this is a false positive... > triggered a retest... Yeah, the latest test gave success: Subject: [Intel-gfx] ✓ Fi.CI.BAT: success for Fix TLB invalidate issues with Broadwell (rev6) Date: Mon, 11 Jul 2022 14:53:40 - Reply-To: intel-gfx@lists.freedesktop.org Sender: "Intel-gfx" == Series Details == Series: Fix TLB invalidate issues with Broadwell (rev6) URL : https://patchwork.freedesktop.org/series/105167/ State : success > > hoping to get this series merged today... Yeah, it would be great to have this merged, as it is a regression fix. Regards, Mauro
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Add debug print for scaler filter
== Series Details ==
Series: drm/i915/display: Add debug print for scaler filter
URL : https://patchwork.freedesktop.org/series/105954/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11850_full -> Patchwork_105954v1_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_105954v1_full absolutely need
to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_105954v1_full, please notify your bug team to allow
them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 13)
--
Additional (3): shard-rkl shard-dg1 shard-tglu
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_105954v1_full:
### IGT changes ###
Possible regressions
* igt@gem_partial_pwrite_pread@write-uncached:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-skl2/igt@gem_partial_pwrite_pr...@write-uncached.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-skl3/igt@gem_partial_pwrite_pr...@write-uncached.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_plane_lowres@tiling-4:
- {shard-rkl}:NOTRUN -> [SKIP][3] +2 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-rkl-5/igt@kms_plane_low...@tiling-4.html
Known issues
Here are the changes found in Patchwork_105954v1_full that come from known
issues:
### CI changes ###
Possible fixes
* boot:
- shard-glk: ([PASS][4], [PASS][5], [PASS][6], [PASS][7],
[PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13],
[PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19],
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25],
[PASS][26], [FAIL][27], [PASS][28]) ([i915#4392]) -> ([PASS][29], [PASS][30],
[PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36],
[PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42],
[PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48],
[PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk8/boot.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk8/boot.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk8/boot.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk7/boot.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk7/boot.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk7/boot.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk6/boot.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk6/boot.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk6/boot.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk5/boot.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk5/boot.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk5/boot.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk3/boot.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk3/boot.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk3/boot.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk2/boot.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk2/boot.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk2/boot.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk1/boot.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk1/boot.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk1/boot.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk9/boot.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk9/boot.html
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk9/boot.html
[28]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11850/shard-glk9/boot.html
[29]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk3/boot.html
[30]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk3/boot.html
[31]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk3/boot.html
[32]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105954v1/shard-glk2/boot.html
[33]
[Intel-gfx] ✓ Fi.CI.BAT: success for Fix TLB invalidate issues with Broadwell (rev6)
== Series Details == Series: Fix TLB invalidate issues with Broadwell (rev6) URL : https://patchwork.freedesktop.org/series/105167/ State : success == Summary == CI Bug Log - changes from CI_DRM_11870 -> Patchwork_105167v6 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/index.html Participating hosts (33 -> 33) -- Additional (3): fi-kbl-soraka fi-hsw-4770 bat-jsl-3 Missing(3): fi-ctg-p8600 fi-rkl-11600 fi-hsw-4200u Known issues Here are the changes found in Patchwork_105167v6 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_gttfill@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271]) +8 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-kbl-soraka/igt@gem_exec_gttf...@basic.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@i915_pm_backlight@basic-brightness: - fi-hsw-4770:NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#3012]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@execlists: - fi-bsw-n3050: [PASS][5] -> [INCOMPLETE][6] ([i915#2940]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/fi-bsw-n3050/igt@i915_selftest@l...@execlists.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-bsw-n3050/igt@i915_selftest@l...@execlists.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271]) +9 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-bsw-nick:NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-bsw-nick/igt@kms_chamel...@common-hpd-after-suspend.html - fi-snb-2600:NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html * igt@kms_chamelium@dp-crc-fast: - fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +8 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-hsw-4770/igt@kms_chamel...@dp-crc-fast.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271] / [fdo#111827]) +7 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-kbl-soraka/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_pipe_crc_basic@suspend-read-crc: - fi-bsw-nick:NOTRUN -> [SKIP][13] ([fdo#109271]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-bsw-nick/igt@kms_pipe_crc_ba...@suspend-read-crc.html * igt@kms_psr@sprite_plane_onoff: - fi-hsw-4770:NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#1072]) +3 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html * igt@runner@aborted: - fi-bsw-n3050: NOTRUN -> [FAIL][15] ([fdo#109271] / [i915#4312]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-bsw-n3050/igt@run...@aborted.html Possible fixes * igt@i915_selftest@live@hangcheck: - fi-snb-2600:[INCOMPLETE][16] ([i915#3921]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html * igt@i915_selftest@live@late_gt_pm: - fi-bsw-nick:[DMESG-FAIL][18] ([i915#3428]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v6/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size: - fi-
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Fix TLB invalidate issues with Broadwell (rev6)
== Series Details == Series: Fix TLB invalidate issues with Broadwell (rev6) URL : https://patchwork.freedesktop.org/series/105167/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/intel_reset.c:1410:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix TLB invalidate issues with Broadwell (rev6)
== Series Details == Series: Fix TLB invalidate issues with Broadwell (rev6) URL : https://patchwork.freedesktop.org/series/105167/ State : warning == Summary == Error: dim checkpatch failed abc5913bfada drm/i915/gt: Serialize GRDOM access between multiple engine resets d9d75927a8fd drm/i915/gt: Serialize TLB invalidates with GT resets -:60: ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Chris Wilson ' total: 1 errors, 0 warnings, 0 checks, 27 lines checked
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ttm: fix sg_table construction (rev3)
== Series Details ==
Series: drm/i915/ttm: fix sg_table construction (rev3)
URL : https://patchwork.freedesktop.org/series/106048/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11870_full -> Patchwork_106048v3_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_106048v3_full:
### CI changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* boot:
- {shard-dg1}:([PASS][1], [PASS][2], [PASS][3], [PASS][4],
[PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11],
[PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17],
[PASS][18]) -> ([PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23],
[PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29],
[PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [FAIL][35])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-19/boot.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-19/boot.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-19/boot.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-17/boot.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-17/boot.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-17/boot.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-16/boot.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-16/boot.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-15/boot.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-15/boot.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-15/boot.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-13/boot.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-13/boot.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-13/boot.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-13/boot.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-13/boot.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-12/boot.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/shard-dg1-12/boot.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-12/boot.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-12/boot.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-12/boot.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-12/boot.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-13/boot.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-13/boot.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-15/boot.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-15/boot.html
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-15/boot.html
[28]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-16/boot.html
[29]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-16/boot.html
[30]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-16/boot.html
[31]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-17/boot.html
[32]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-17/boot.html
[33]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-17/boot.html
[34]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-19/boot.html
[35]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/shard-dg1-19/boot.html
New tests
-
New tests have been introduced between CI_DRM_11870_full and
Patchwork_106048v3_full:
### New IGT tests (84) ###
* igt@kms_atomic_interruptible@legacy-setmode@hdmi-a-4-pipe-a:
- Statuses : 1 pass(s)
- Exec time: [6.13] s
* igt@kms_atomic_interruptible@universal-setplane-cursor@hdmi-a-4-pipe-a:
- Statuses : 1 pass(s)
- Exec time: [6.14] s
* igt@kms_color@ctm-0-50@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.55] s
* igt@kms_color@ctm-0-50@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.41] s
* igt@kms_color@ctm-0-50@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Introduce Meteorlake
On Mon, Jul 11, 2022 at 07:09:20AM +, Vudum, Lakshminarayana wrote:
> Issue is related to https://gitlab.freedesktop.org/drm/intel/-/issues/6169
> Few tests - incomplete - pstore logs, Kernel panic - not syncing: Software
> Watchdog Timer expired, RIP: 0010:cpuidle_enter_state
For a moment I though you were suggesting that this series caused this
instability.
So I reviewed the series again to see that it is impossible...
Then I noticed the giving link above is actually instability issue from 1 month
ago.
So we are good with this Series to stay in this branch and propagate to 5.20.
Thanks,
Rodrigo.
>
> Thanks,
> Lakshmi.
>
> -Original Message-
> From: Roper, Matthew D
> Sent: Friday, July 8, 2022 1:34 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Sripada, Radhakrishna ; Vudum,
> Lakshminarayana ; Vivi, Rodrigo
>
> Subject: Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Introduce Meteorlake
>
> On Fri, Jul 08, 2022 at 04:38:48PM +, Patchwork wrote:
> > == Series Details ==
> >
> > Series: i915: Introduce Meteorlake
> > URL : https://patchwork.freedesktop.org/series/106075/
> > State : failure
> >
> > == Summary ==
> >
> > CI Bug Log - changes from CI_DRM_11859_full -> Patchwork_106075v1_full
> >
> >
> > Summary
> > ---
> >
> > **FAILURE**
> >
> > Serious unknown changes coming with Patchwork_106075v1_full absolutely
> > need to be
> > verified manually.
> >
> > If you think the reported changes have nothing to do with the changes
> > introduced in Patchwork_106075v1_full, please notify your bug team to
> > allow them
> > to document this new failure mode, which will reduce false positives in
> > CI.
> >
> >
> >
> > Participating hosts (13 -> 13)
> > --
> >
> > No changes in participating hosts
> >
> > Possible new issues
> > ---
> >
> > Here are the unknown changes that may have been introduced in
> > Patchwork_106075v1_full:
> >
> > ### IGT changes ###
> >
> > Possible regressions
> >
> > * igt@gem_exec_schedule@wide@vcs1:
> > - shard-kbl: [PASS][1] -> [INCOMPLETE][2]
> >[1]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-kbl4/igt@gem_exec_schedule@w...@vcs1.html
> >[2]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106075v1/shard-kbl1/igt@gem_exec_schedule@w...@vcs1.html
>
> Test actually finished executing, but then there were some NVME errors,
> followed by
>
> <2>[ 334.527621] softdog: Initiating panic
> <0>[ 334.529807] Kernel panic - not syncing: Software Watchdog Timer expired
>
> This looks like general system instability, likely not related to
> graphics at all.
>
>
> Series applied to drm-intel-gt-next (as suggested by Rodrigo, since this
> will allow the IS_METEORLAKE definitions to be cross-pollinated across
> both drm-intel branches most easily).
>
> Thanks for the patches.
>
>
> Matt
>
> >
> >
> > Suppressed
> >
> > The following results come from untrusted machines, tests, or statuses.
> > They do not affect the overall result.
> >
> > * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
> > - {shard-rkl}:NOTRUN -> [WARN][3]
> >[3]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106075v1/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-i...@vcs0.html
> >
> > * igt@kms_cursor_legacy@cursor-vs-flip@atomic:
> > - {shard-dg1}:[PASS][4] -> [FAIL][5] +4 similar issues
> >[4]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-dg1-12/igt@kms_cursor_legacy@cursor-vs-f...@atomic.html
> >[5]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106075v1/shard-dg1-15/igt@kms_cursor_legacy@cursor-vs-f...@atomic.html
> >
> >
> > Known issues
> >
> >
> > Here are the changes found in Patchwork_106075v1_full that come from
> > known issues:
> >
> > ### CI changes ###
> >
> > Possible fixes
> >
> > * boot:
> > - shard-skl: ([PASS][6], [PASS][7], [PASS][8], [PASS][9],
> > [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15],
> > [PASS][16], [FAIL][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21],
> > [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27],
> > [PASS][28], [PASS][29], [PASS][30]) ([i915#5032]) -> ([PASS][31],
> > [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37],
> > [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43],
> > [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49],
> > [PASS][50], [PASS][51], [PASS][52])
> >[6]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl10/boot.html
> >[7]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl10/boot.html
> >[8]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl10/boot.html
> >[9]:
> > https://intel-gfx-ci.01.org/t
[Intel-gfx] [PATCH] drm/doc/rfc: VM_BIND fix a few grammatical slip-ups and typos
Just a trivial review of an the vm bind document that is still an rfc document. Signed-off-by: Andi Shyti --- Hi, I'm not a big fan of this kind of patches, but while reading and reviewing this document I spotted few potential grammatical fixes. Andi Documentation/gpu/rfc/i915_vm_bind.rst | 52 +- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/Documentation/gpu/rfc/i915_vm_bind.rst b/Documentation/gpu/rfc/i915_vm_bind.rst index 9a1dcdf2799ef..78c17f345d82c 100644 --- a/Documentation/gpu/rfc/i915_vm_bind.rst +++ b/Documentation/gpu/rfc/i915_vm_bind.rst @@ -4,17 +4,17 @@ I915 VM_BIND feature design and use cases VM_BIND feature -DRM_I915_GEM_VM_BIND/UNBIND ioctls allows UMD to bind/unbind GEM buffer +DRM_I915_GEM_VM_BIND/UNBIND ioctls allow UMD to bind/unbind GEM buffer objects (BOs) or sections of a BOs at specified GPU virtual addresses on a specified address space (VM). These mappings (also referred to as persistent mappings) will be persistent across multiple GPU submissions (execbuf calls) -issued by the UMD, without user having to provide a list of all required +issued by the UMD, without the user having to provide a list of all required mappings during each submission (as required by older execbuf mode). The VM_BIND/UNBIND calls allow UMDs to request a timeline out fence for signaling the completion of bind/unbind operation. -VM_BIND feature is advertised to user via I915_PARAM_VM_BIND_VERSION. +VM_BIND feature is advertised to the user via I915_PARAM_VM_BIND_VERSION. User has to opt-in for VM_BIND mode of binding for an address space (VM) during VM creation time via I915_VM_CREATE_FLAGS_USE_VM_BIND extension. @@ -33,8 +33,8 @@ VM_BIND features include: TLB flush consideration The i915 driver flushes the TLB for each submission and when an object's -pages are released. The VM_BIND/UNBIND operation will not do any additional -TLB flush. Any VM_BIND mapping added will be in the working set for subsequent +page is released. The VM_BIND/UNBIND operation will not do any additional TLB +flush. Any VM_BIND mapping added will be in the working set for subsequent submissions on that VM and will not be in the working set for currently running batches (which would require additional TLB flushes, which is not supported). @@ -57,13 +57,13 @@ works with execbuf3 ioctl for submission. All BOs mapped on that VM (through VM_BIND call) at the time of execbuf3 call are deemed required for that submission. -The execbuf3 ioctl directly specifies the batch addresses instead of as -object handles as in execbuf2 ioctl. The execbuf3 ioctl will also not +The execbuf3 ioctl directly specifies the batch addresses instead of an +object handle as in execbuf2 ioctl. The execbuf3 ioctl will also not support many of the older features like in/out/submit fences, fence array, default gem context and many more (See struct drm_i915_gem_execbuffer3). In VM_BIND mode, VA allocation is completely managed by the user instead of -the i915 driver. Hence all VA assignment, eviction are not applicable in +the i915 driver. Hence all VA assignments and eviction are not applicable in VM_BIND mode. Also, for determining object activeness, VM_BIND mode will not be using the i915_vma active reference tracking. It will instead use dma-resv object for that (See `VM_BIND dma_resv usage`_). @@ -81,7 +81,7 @@ exported. Hence these BOs are referred to as Shared BOs. During each execbuf submission, the request fence must be added to the dma-resv fence list of all shared BOs mapped on the VM. -VM_BIND feature introduces an optimization where user can create BO which +VM_BIND feature introduces an optimization where the user can create a BO which is private to a specified VM via I915_GEM_CREATE_EXT_VM_PRIVATE flag during BO creation. Unlike Shared BOs, these VM private BOs can only be mapped on the VM they are private to and can't be dma-buf exported. @@ -95,7 +95,7 @@ VM_BIND locking hirarchy The locking design here supports the older (execlist based) execbuf mode, the newer VM_BIND mode, the VM_BIND mode with GPU page faults and possible future system allocator support (See `Shared Virtual Memory (SVM) support`_). -The older execbuf mode and the newer VM_BIND mode without page faults manages +The older execbuf mode and the newer VM_BIND mode without page faults manage residency of backing storage using dma_fence. The VM_BIND mode with page faults and the system allocator support do not use any dma_fence at all. @@ -105,10 +105,10 @@ VM_BIND locking order is as below. vm_bind/vm_unbind ioctl calls, in the execbuf path and while releasing the mapping. - In future, when GPU page faults are supported, we can potentially use a + In future, when GPU page faults will be supported, we will potentially use a rwsem instead, so that multiple page fault handlers can take the read side lock to lookup the mappi
Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/gt: Only kick the signal worker if there's been an update
On Fri, Jul 08, 2022 at 10:40:24AM -0400, Rodrigo Vivi wrote:
> On Fri, Jul 08, 2022 at 04:20:13PM +0200, Karolina Drobnik wrote:
> > From: Chris Wilson
> >
> > One impact of commit 047a1b877ed4 ("dma-buf & drm/amdgpu: remove
> > dma_resv workaround") is that it stores many, many more fences. Whereas
> > adding an exclusive fence used to remove the shared fence list, that
> > list is now preserved and the write fences included into the list. Not
> > just a single write fence, but now a write/read fence per context. That
> > causes us to have to track more fences than before (albeit half of those
> > are redundant), and we trigger more interrupts for multi-engine
> > workloads.
> >
> > As part of reducing the impact from handling more signaling, we observe
> > we only need to kick the signal worker after adding a fence iff we have
>
> s/iff/if
>
> > good cause to believe that there is work to be done in processing the
> > fence i.e. we either need to enable the interrupt or the request is
> > already complete but we don't know if we saw the interrupt and so need
> > to check signaling.
> >
> > References: 047a1b877ed4 ("dma-buf & drm/amdgpu: remove dma_resv
> > workaround")
> > Signed-off-by: Chris Wilson
> > Signed-off-by: Karolina Drobnik
> > ---
> > drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> > b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> > index 9dc9dccf7b09..ecc990ec1b95 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> > @@ -399,7 +399,8 @@ static void insert_breadcrumb(struct i915_request *rq)
> > * the request as it may have completed and raised the interrupt as
> > * we were attaching it into the lists.
> > */
> > - irq_work_queue(&b->irq_work);
> > + if (!b->irq_armed || __i915_request_is_complete(rq))
>
> would we need the READ_ONCE(irq_armed) ?
> would we need to use the irq_lock?
gentle ping on these questions here so maybe we can get this ready
for 5.20 still...
Thanks,
Rodrigo.
>
> > + irq_work_queue(&b->irq_work);
> > }
> >
> > bool i915_request_enable_breadcrumb(struct i915_request *rq)
> > --
> > 2.25.1
> >
Re: [Intel-gfx] [PATCH v2] drm/i915/display: Ensure PSR gets disabled if no encoders in new state
On Mon, Jul 11, 2022 at 02:17:50PM +0300, Jouni Högander wrote:
> Currently PSR is left enabled when all planes are disabled if there
> is no attached encoder in new state. This seems to be causing FIFO
> underruns.
>
> Fix this by checking if encoder exists in new crtc state and disable
> PSR if it doesn't.
>
> v2: Unify disable logic with existing
Reviewed-by: Stanislav Lisovskiy
>
> Cc: Mika Kahola
> Reported-by: Stanislav Lisovskiy
> Signed-off-by: Jouni Högander
> Signed-off-by: Stanislav Lisovskiy
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 53 ++--
> 1 file changed, 31 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index e6a870641cd2..90599dd1cb1b 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1863,36 +1863,45 @@ void intel_psr_pre_plane_update(struct
> intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> struct drm_i915_private *i915 = to_i915(state->base.dev);
> - const struct intel_crtc_state *crtc_state =
> - intel_atomic_get_new_crtc_state(state, crtc);
> - struct intel_encoder *encoder;
> + struct intel_crtc_state *new_crtc_state, *old_crtc_state;
> + int i;
>
> if (!HAS_PSR(i915))
> return;
>
> - for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> - crtc_state->uapi.encoder_mask) {
> - struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> - struct intel_psr *psr = &intel_dp->psr;
> - bool needs_to_disable = false;
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> + new_crtc_state, i) {
> + struct intel_encoder *encoder;
> + u32 old_new_encoder_mask = old_crtc_state->uapi.encoder_mask |
> + new_crtc_state->uapi.encoder_mask;
>
> - mutex_lock(&psr->lock);
> + for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> + old_new_encoder_mask) {
> + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> + struct intel_psr *psr = &intel_dp->psr;
> + bool needs_to_disable = false;
>
> - /*
> - * Reasons to disable:
> - * - PSR disabled in new state
> - * - All planes will go inactive
> - * - Changing between PSR versions
> - */
> - needs_to_disable |= intel_crtc_needs_modeset(crtc_state);
> - needs_to_disable |= !crtc_state->has_psr;
> - needs_to_disable |= !crtc_state->active_planes;
> - needs_to_disable |= crtc_state->has_psr2 != psr->psr2_enabled;
> + mutex_lock(&psr->lock);
>
> - if (psr->enabled && needs_to_disable)
> - intel_psr_disable_locked(intel_dp);
> + /*
> + * Reasons to disable:
> + * - PSR disabled in new state
> + * - All planes will go inactive
> + * - Changing between PSR versions
> + * - Encoder isn't present in new mask
> + */
> + needs_to_disable |=
> intel_crtc_needs_modeset(new_crtc_state);
> + needs_to_disable |= !new_crtc_state->has_psr;
> + needs_to_disable |= !new_crtc_state->active_planes;
> + needs_to_disable |= new_crtc_state->has_psr2 !=
> psr->psr2_enabled;
> + needs_to_disable |= !(new_crtc_state->uapi.encoder_mask
> &
> +
> drm_encoder_mask(&(encoder)->base));
>
> - mutex_unlock(&psr->lock);
> + if (psr->enabled && needs_to_disable)
> + intel_psr_disable_locked(intel_dp);
> +
> + mutex_unlock(&psr->lock);
> + }
> }
> }
>
> --
> 2.25.1
>
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Fix TLB invalidate issues with Broadwell (rev5)
On Mon, Jul 11, 2022 at 08:22:33AM -, Patchwork wrote:
>Patch Details
>
>Series: Fix TLB invalidate issues with Broadwell (rev5)
>URL: [1]https://patchwork.freedesktop.org/series/105167/
>State: failure
>Details:
>[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/index.ht
>ml
>
> CI Bug Log - changes from CI_DRM_11862 -> Patchwork_105167v5
>
> Summary
>
>FAILURE
>
>Serious unknown changes coming with Patchwork_105167v5 absolutely need
>to be
>verified manually.
>
>If you think the reported changes have nothing to do with the changes
>introduced in Patchwork_105167v5, please notify your bug team to allow
>them
>to document this new failure mode, which will reduce false positives in
>CI.
>
>External URL:
>https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/index.html
>
> Participating hosts (45 -> 42)
>
>Additional (2): bat-rpls-1 bat-dg1-5
>Missing (5): fi-cml-u2 fi-hsw-4200u fi-icl-u2 fi-ctg-p8600 bat-jsl-3
>
> Possible new issues
>
>Here are the unknown changes that may have been introduced in
>Patchwork_105167v5:
>
> IGT changes
>
> Possible regressions
>
> * igt@i915_selftest@live@gem:
> + fi-elk-e7500: [3]PASS -> [4]DMESG-FAIL
I also believe this is a false positive...
triggered a retest...
hoping to get this series merged today...
>
> Suppressed
>
>The following results come from untrusted machines, tests, or statuses.
>They do not affect the overall result.
> * igt@i915_selftest@live@guc:
> + {bat-rpls-1}: NOTRUN -> [5]DMESG-WARN
>
> Known issues
>
>Here are the changes found in Patchwork_105167v5 that come from known
>issues:
>
> IGT changes
>
> Issues hit
>
> * igt@fbdev@nullptr:
> + bat-dg1-5: NOTRUN -> [6]SKIP ([7]i915#2582) +4 similar issues
> * igt@gem_mmap@basic:
> + bat-dg1-5: NOTRUN -> [8]SKIP ([9]i915#4083)
> * igt@gem_tiled_blits@basic:
> + bat-dg1-5: NOTRUN -> [10]SKIP ([11]i915#4077) +2 similar
> issues
> * igt@gem_tiled_pread_basic:
> + bat-dg1-5: NOTRUN -> [12]SKIP ([13]i915#4079) +1 similar issue
> * igt@i915_pm_backlight@basic-brightness:
> + bat-dg1-5: NOTRUN -> [14]SKIP ([15]i915#1155)
> * igt@i915_suspend@basic-s2idle-without-i915:
> + bat-dg1-5: NOTRUN -> [16]INCOMPLETE ([17]i915#6011)
> * igt@kms_addfb_basic@basic-x-tiled-legacy:
> + bat-dg1-5: NOTRUN -> [18]SKIP ([19]i915#4212) +7 similar
> issues
> * igt@kms_addfb_basic@basic-y-tiled-legacy:
> + bat-dg1-5: NOTRUN -> [20]SKIP ([21]i915#4215)
> * igt@kms_busy@basic:
> + bat-dg1-5: NOTRUN -> [22]SKIP ([23]i915#1845 / [24]i915#4303)
> * igt@kms_chamelium@common-hpd-after-suspend:
> + fi-snb-2600: NOTRUN -> [25]SKIP ([26]fdo#109271 /
> [27]fdo#111827)
> + fi-rkl-11600: NOTRUN -> [28]SKIP ([29]fdo#111827)
> * igt@kms_chamelium@dp-crc-fast:
> + bat-dg1-5: NOTRUN -> [30]SKIP ([31]fdo#111827) +7 similar
> issues
> * igt@kms_flip@basic-flip-vs-modeset@b-edp1:
> + bat-adlp-4: [32]PASS -> [33]DMESG-WARN ([34]i915#3576) +1
> similar issue
> * igt@kms_force_connector_basic@force-load-detect:
> + bat-dg1-5: NOTRUN -> [35]SKIP ([36]fdo#109285)
> * igt@kms_pipe_crc_basic@nonblocking-crc:
> + bat-dg1-5: NOTRUN -> [37]SKIP ([38]i915#4078) +13 similar
> issues
> * igt@kms_psr@primary_page_flip:
> + bat-dg1-5: NOTRUN -> [39]SKIP ([40]i915#1072 / [41]i915#4078)
> +3 similar issues
> * igt@kms_setmode@basic-clone-single-crtc:
> + bat-dg1-5: NOTRUN -> [42]SKIP ([43]i915#3555)
> * igt@prime_vgem@basic-fence-flip:
> + bat-dg1-5: NOTRUN -> [44]SKIP ([45]i915#1845 / [46]i915#3708)
> * igt@prime_vgem@basic-fence-read:
> + bat-dg1-5: NOTRUN -> [47]SKIP ([48]i915#3708) +2 similar
> issues
> * igt@prime_vgem@basic-gtt:
> + bat-dg1-5: NOTRUN -> [49]SKIP ([50]i915#3708 / [51]i915#4077)
> +1 similar issue
> * igt@prime_vgem@basic-userptr:
> + bat-dg1-5: NOTRUN -> [52]SKIP ([53]i915#3708 / [54]i915#4873)
> * igt@runner@aborted:
> + fi-elk-e7500: NOTRUN -> [55]FAIL ([56]fdo#109271 /
> [57]i915#4312)
> + bat-dg1-5: NOTRUN -> [58]FAIL ([59]i915#4312 / [60]i915#5257)
>
> Possible fixes
>
> * igt@i915_selftest@live@hangcheck:
> + fi-snb-2600: [61]INCOMPLETE ([62]i915#3921) -> [63]PASS
> + bat-dg1-6: [64]DMESG-FAIL ([65]i915#4494 / [66]i915#4957) ->
> [67]PASS
> * igt@i915_suspend@basic-s3-without-i915:
> + fi-rkl-11600: [68]INCOMPLETE ([69]i915#5982) -> [70]PASS
> * igt@vgem_basic@setversion:
> + fi-kbl-soraka: [71]INCOMPLETE -> [72]PASS
Re: [Intel-gfx] [PATCH v4 2/2] drm/i915: Add lmem_bar_size modparam
On 7/10/2022 7:29 PM, priyanka.dandam...@intel.com wrote:
From: Priyanka Dandamudi
For testing purposes, support forcing the lmem_bar_size through a new
modparam. In CI we only have a limited number of configurations for DG2,
but we still need to be reasonably sure we get a usable device (also
verifying we report the correct values for things like
probed_cpu_visible_size etc) with all the potential lmem_bar sizes that
we might expect see in the wild.
v2: Update commit message and a minor modification.(Matt)
v3: Optimised lmem bar size code and modified code to resize
bar maximum upto lmem_size instead of maximum supported size.(Nirmoy)
v4: Optimised lmem bar size code.(Nirmoy)
Cc: Matthew Auld
Cc: Nirmoy Das
Signed-off-by: Priyanka Dandamudi
|Reviewed-by: Nirmoy Das |
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 33 +
drivers/gpu/drm/i915/i915_params.c | 2 ++
drivers/gpu/drm/i915/i915_params.h | 1 +
3 files changed, 31 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 129e5d8b080d..22dbf986217c 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -51,15 +51,38 @@ static void i915_resize_lmem_bar(struct drm_i915_private
*i915, resource_size_t
struct pci_bus *root = pdev->bus;
struct resource *root_res;
resource_size_t rebar_size;
+ resource_size_t current_size;
u32 pci_cmd;
int i;
- rebar_size = roundup_pow_of_two(pci_resource_len(pdev, LMEM_BAR_NUM));
+ current_size = roundup_pow_of_two(pci_resource_len(pdev, LMEM_BAR_NUM));
- if (rebar_size != roundup_pow_of_two(lmem_size))
- rebar_size = lmem_size;
- else
- return;
+ if (i915->params.lmem_bar_size) {
+ u32 bar_sizes;
+
+ rebar_size = i915->params.lmem_bar_size *
+ (resource_size_t)SZ_1M;
+ bar_sizes = pci_rebar_get_possible_sizes(pdev,
+LMEM_BAR_NUM);
+
+ if (rebar_size == current_size)
+ return;
+
+ if (!(bar_sizes & BIT(pci_rebar_bytes_to_size(rebar_size))) ||
+ rebar_size >= roundup_pow_of_two(lmem_size)) {
+ rebar_size = lmem_size;
+
+ drm_info(&i915->drm, "Given bar size is not within
supported size,"
+"setting it to default:
%llu\n", lmem_size);
+ }
+ } else {
+ rebar_size = current_size;
+
+ if (rebar_size != roundup_pow_of_two(lmem_size))
+ rebar_size = lmem_size;
+ else
+ return;
+ }
/* Find out if root bus contains 64bit memory addressing */
while (root->parent)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 701fbc98afa0..6fc475a5db61 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -204,6 +204,8 @@ i915_param_named_unsafe(request_timeout_ms, uint, 0600,
i915_param_named_unsafe(lmem_size, uint, 0400,
"Set the lmem size(in MiB) for each region. (default: 0, all
memory)");
+i915_param_named_unsafe(lmem_bar_size, uint, 0400,
+ "Set the lmem bar size(in MiB).");
static __always_inline void _print_param(struct drm_printer *p,
const char *name,
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index b5e7ea45d191..2733cb6cfe09 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -74,6 +74,7 @@ struct drm_printer;
param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \
param(unsigned int, request_timeout_ms,
CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
param(unsigned int, lmem_size, 0, 0400) \
+ param(unsigned int, lmem_bar_size, 0, 0400) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, load_detect_test, false, 0600) \
Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928
Re: [Intel-gfx] [PATCH v4 1/2] drm/i915: Add support for LMEM PCIe resizable bar
On 7/10/2022 7:29 PM, priyanka.dandam...@intel.com wrote:
From: Akeem G Abodunrin
Add support for the local memory PICe resizable bar, so that
local memory can be resized to the maximum size supported by the device,
and mapped correctly to the PCIe memory bar. It is usual that GPU
devices expose only 256MB BARs primarily to be compatible with 32-bit
systems. So, those devices cannot claim larger memory BAR windows size due
to the system BIOS limitation. With this change, it would be possible to
reprogram the windows of the bridge directly above the requesting device
on the same BAR type.
v2:Moved code to gt/intel_region_lmem.c and used only
single underscore for function names.(Jani)
v3: Optimised code.
Signed-off-by: Akeem G Abodunrin
Signed-off-by: Michał Winiarski
Cc: Stuart Summers
Cc: Michael J Ruhl
Cc: Prathap Kumar Valsan
Cc: Jani Nikula
Signed-off-by: Priyanka Dandamudi
Reviewed-by: Matthew Auld
|Reviewed-by: Nirmoy Das|
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 75 +
1 file changed, 75 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index fa7b86f83e7b..129e5d8b080d 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -15,6 +15,79 @@
#include "gt/intel_gt_mcr.h"
#include "gt/intel_gt_regs.h"
+static void _release_bars(struct pci_dev *pdev)
+{
+ int resno;
+
+ for (resno = PCI_STD_RESOURCES; resno < PCI_STD_RESOURCE_END; resno++) {
+ if (pci_resource_len(pdev, resno))
+ pci_release_resource(pdev, resno);
+ }
+}
+
+static void
+_resize_bar(struct drm_i915_private *i915, int resno, resource_size_t size)
+{
+ struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+ int bar_size = pci_rebar_bytes_to_size(size);
+ int ret;
+
+ _release_bars(pdev);
+
+ ret = pci_resize_resource(pdev, resno, bar_size);
+ if (ret) {
+ drm_info(&i915->drm, "Failed to resize BAR%d to %dM (%pe)\n",
+resno, 1 << bar_size, ERR_PTR(ret));
+ return;
+ }
+
+ drm_info(&i915->drm, "BAR%d resized to %dM\n", resno, 1 << bar_size);
+}
+
+#define LMEM_BAR_NUM 2
+static void i915_resize_lmem_bar(struct drm_i915_private *i915,
resource_size_t lmem_size)
+{
+ struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+ struct pci_bus *root = pdev->bus;
+ struct resource *root_res;
+ resource_size_t rebar_size;
+ u32 pci_cmd;
+ int i;
+
+ rebar_size = roundup_pow_of_two(pci_resource_len(pdev, LMEM_BAR_NUM));
+
+ if (rebar_size != roundup_pow_of_two(lmem_size))
+ rebar_size = lmem_size;
+ else
+ return;
+
+ /* Find out if root bus contains 64bit memory addressing */
+ while (root->parent)
+ root = root->parent;
+
+ pci_bus_for_each_resource(root, root_res, i) {
+ if (root_res && root_res->flags & (IORESOURCE_MEM |
+ IORESOURCE_MEM_64) && root_res->start >
0x1ull)
+ break;
+ }
+
+ /* pci_resize_resource will fail anyways */
+ if (!root_res) {
+ drm_info(&i915->drm, "Can't resize LMEM BAR - platform support is
missing\n");
+ return;
+ }
+
+ /* First disable PCI memory decoding references */
+ pci_read_config_dword(pdev, PCI_COMMAND, &pci_cmd);
+ pci_write_config_dword(pdev, PCI_COMMAND,
+ pci_cmd & ~PCI_COMMAND_MEMORY);
+
+ _resize_bar(i915, LMEM_BAR_NUM, rebar_size);
+
+ pci_assign_unassigned_bus_resources(pdev->bus);
+ pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd);
+}
+
static int
region_lmem_release(struct intel_memory_region *mem)
{
@@ -128,6 +201,8 @@ static struct intel_memory_region *setup_lmem(struct
intel_gt *gt)
lmem_size = intel_uncore_read64(&i915->uncore, GEN12_GSMBASE);
}
+ i915_resize_lmem_bar(i915, lmem_size);
+
if (i915->params.lmem_size > 0) {
lmem_size = min_t(resource_size_t, lmem_size,
mul_u32_u32(i915->params.lmem_size, SZ_1M));
Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Ensure PSR gets disabled if no encoders in new state (rev2)
== Series Details == Series: drm/i915/display: Ensure PSR gets disabled if no encoders in new state (rev2) URL : https://patchwork.freedesktop.org/series/106168/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11870 -> Patchwork_106168v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_106168v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_106168v2, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/index.html Participating hosts (33 -> 41) -- Additional (11): fi-kbl-soraka bat-dg1-5 bat-dg2-8 bat-dg2-9 bat-adlp-6 bat-adlp-4 fi-hsw-4770 bat-adln-1 bat-jsl-3 bat-rpls-2 bat-jsl-1 Missing(3): fi-ctg-p8600 fi-skl-guc fi-hsw-4200u Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_106168v2: ### IGT changes ### Possible regressions * igt@i915_selftest@live@requests: - fi-elk-e7500: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11870/fi-elk-e7500/igt@i915_selftest@l...@requests.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-elk-e7500/igt@i915_selftest@l...@requests.html Known issues Here are the changes found in Patchwork_106168v2 that come from known issues: ### IGT changes ### Issues hit * igt@fbdev@nullptr: - bat-dg1-5: NOTRUN -> [SKIP][3] ([i915#2582]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/bat-dg1-5/igt@fb...@nullptr.html * igt@gem_exec_gttfill@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271]) +8 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-kbl-soraka/igt@gem_exec_gttf...@basic.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-adlp-4: NOTRUN -> [SKIP][7] ([i915#4613]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/bat-adlp-4/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#4083]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/bat-dg1-5/igt@gem_m...@basic.html * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770:NOTRUN -> [SKIP][9] ([fdo#109271]) +9 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html * igt@gem_tiled_blits@basic: - bat-dg1-5: NOTRUN -> [SKIP][10] ([i915#4077]) +2 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/bat-dg1-5/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-5: NOTRUN -> [SKIP][11] ([i915#4079]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/bat-dg1-5/igt@gem_tiled_pread_basic.html - bat-adlp-4: NOTRUN -> [SKIP][12] ([i915#3282]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/bat-adlp-4/igt@gem_tiled_pread_basic.html * igt@i915_module_load@load: - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][13] ([i915#1982]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-kbl-soraka/igt@i915_module_l...@load.html * igt@i915_pm_backlight@basic-brightness: - fi-hsw-4770:NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#3012]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html - bat-dg1-5: NOTRUN -> [SKIP][15] ([i915#1155]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gem: - fi-blb-e6850: NOTRUN -> [DMESG-FAIL][16] ([i915#4528]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-blb-e6850/igt@i915_selftest@l...@gem.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][17] ([i915#1886]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftes
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: stop HPD workers before display driver unregister (rev3)
== Series Details ==
Series: drm/i915/display: stop HPD workers before display driver unregister
(rev3)
URL : https://patchwork.freedesktop.org/series/105557/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11870 -> Patchwork_105557v3
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/index.html
Participating hosts (33 -> 41)
--
Additional (11): fi-kbl-soraka bat-dg1-5 bat-dg2-8 bat-dg2-9 bat-adlp-6
bat-adlp-4 fi-hsw-4770 bat-adln-1 bat-rpls-1 bat-rpls-2 bat-jsl-1
Missing(3): fi-ctg-p8600 fi-rkl-11600 fi-hsw-4200u
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_105557v3:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_flip@basic-flip-vs-dpms@b-dp2:
- {bat-rpls-1}: NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-rpls-1/igt@kms_flip@basic-flip-vs-d...@b-dp2.html
Known issues
Here are the changes found in Patchwork_105557v3 that come from known issues:
### IGT changes ###
Issues hit
* igt@fbdev@nullptr:
- bat-dg1-5: NOTRUN -> [SKIP][2] ([i915#2582]) +4 similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-dg1-5/igt@fb...@nullptr.html
* igt@gem_exec_gttfill@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271]) +8 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/fi-kbl-soraka/igt@gem_exec_gttf...@basic.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613]) +3
similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlp-4: NOTRUN -> [SKIP][6] ([i915#4613]) +3 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-adlp-4/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@gem_mmap@basic:
- bat-dg1-5: NOTRUN -> [SKIP][7] ([i915#4083])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-dg1-5/igt@gem_m...@basic.html
* igt@gem_softpin@allocator-basic-reserve:
- fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271]) +10 similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html
* igt@gem_tiled_blits@basic:
- bat-dg1-5: NOTRUN -> [SKIP][9] ([i915#4077]) +2 similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-dg1-5/igt@gem_tiled_bl...@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg1-5: NOTRUN -> [SKIP][10] ([i915#4079]) +1 similar issue
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-4: NOTRUN -> [SKIP][11] ([i915#3282])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-adlp-4/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770:NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#3012])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html
- bat-dg1-5: NOTRUN -> [SKIP][13] ([i915#1155])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][14] ([i915#1886])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-5: NOTRUN -> [DMESG-FAIL][15] ([i915#4957])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
* igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5: NOTRUN -> [INCOMPLETE][16] ([i915#6011])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-adlp-4: NOTRUN -> [SKIP][17] ([i915#5903])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v3/bat-adlp-4/igt@i915_susp...@basic-s3-without-i915.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:
Re: [Intel-gfx] [PATCH v3] drm/i915/dg2: Add performance workaround 18019455067
Ping?
On 30/06/2022 11:35, Lionel Landwerlin wrote:
The recommended number of stackIDs for Ray Tracing subsystem is 512
rather than 2048 (default HW programming).
v2: Move the programming to dg2_ctx_gt_tuning_init() (Lucas)
v3: Move programming to general_render_compute_wa_init() (Matt)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4
drivers/gpu/drm/i915/gt/intel_workarounds.c | 9 +
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 07ef111947b8c..12fc87b957425 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1112,6 +1112,10 @@
#define GEN12_PUSH_CONST_DEREF_HOLD_DIS REG_BIT(8)
#define RT_CTRL _MMIO(0xe530)
+#define RT_CTRL_NUMBER_OF_STACKIDS_MASK REG_GENMASK(6, 5)
+#define NUMBER_OF_STACKIDS_512 2
+#define NUMBER_OF_STACKIDS_1024 1
+#define NUMBER_OF_STACKIDS_2048 0
#define DIS_NULL_QUERY REG_BIT(10)
#define EU_PERF_CNTL1_MMIO(0xe558)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3213c593a55f4..ea674e456cd76 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2737,6 +2737,15 @@ general_render_compute_wa_init(struct intel_engine_cs
*engine, struct i915_wa_li
wa_write_or(wal, VDBX_MOD_CTRL, FORCE_MISS_FTLB);
wa_write_or(wal, VEBX_MOD_CTRL, FORCE_MISS_FTLB);
}
+
+ if (IS_DG2(i915)) {
+ /* Performance tuning for Ray-tracing */
+ wa_write_clr_set(wal,
+RT_CTRL,
+RT_CTRL_NUMBER_OF_STACKIDS_MASK,
+REG_FIELD_PREP(RT_CTRL_NUMBER_OF_STACKIDS_MASK,
+ NUMBER_OF_STACKIDS_512));
+ }
}
static void
[Intel-gfx] [PATCH v2] drm/i915/display: Ensure PSR gets disabled if no encoders in new state
Currently PSR is left enabled when all planes are disabled if there
is no attached encoder in new state. This seems to be causing FIFO
underruns.
Fix this by checking if encoder exists in new crtc state and disable
PSR if it doesn't.
v2: Unify disable logic with existing
Cc: Mika Kahola
Reported-by: Stanislav Lisovskiy
Signed-off-by: Jouni Högander
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_psr.c | 53 ++--
1 file changed, 31 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index e6a870641cd2..90599dd1cb1b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1863,36 +1863,45 @@ void intel_psr_pre_plane_update(struct
intel_atomic_state *state,
struct intel_crtc *crtc)
{
struct drm_i915_private *i915 = to_i915(state->base.dev);
- const struct intel_crtc_state *crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_encoder *encoder;
+ struct intel_crtc_state *new_crtc_state, *old_crtc_state;
+ int i;
if (!HAS_PSR(i915))
return;
- for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
-crtc_state->uapi.encoder_mask) {
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- struct intel_psr *psr = &intel_dp->psr;
- bool needs_to_disable = false;
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
+ new_crtc_state, i) {
+ struct intel_encoder *encoder;
+ u32 old_new_encoder_mask = old_crtc_state->uapi.encoder_mask |
+ new_crtc_state->uapi.encoder_mask;
- mutex_lock(&psr->lock);
+ for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
+old_new_encoder_mask) {
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ struct intel_psr *psr = &intel_dp->psr;
+ bool needs_to_disable = false;
- /*
-* Reasons to disable:
-* - PSR disabled in new state
-* - All planes will go inactive
-* - Changing between PSR versions
-*/
- needs_to_disable |= intel_crtc_needs_modeset(crtc_state);
- needs_to_disable |= !crtc_state->has_psr;
- needs_to_disable |= !crtc_state->active_planes;
- needs_to_disable |= crtc_state->has_psr2 != psr->psr2_enabled;
+ mutex_lock(&psr->lock);
- if (psr->enabled && needs_to_disable)
- intel_psr_disable_locked(intel_dp);
+ /*
+* Reasons to disable:
+* - PSR disabled in new state
+* - All planes will go inactive
+* - Changing between PSR versions
+* - Encoder isn't present in new mask
+*/
+ needs_to_disable |=
intel_crtc_needs_modeset(new_crtc_state);
+ needs_to_disable |= !new_crtc_state->has_psr;
+ needs_to_disable |= !new_crtc_state->active_planes;
+ needs_to_disable |= new_crtc_state->has_psr2 !=
psr->psr2_enabled;
+ needs_to_disable |= !(new_crtc_state->uapi.encoder_mask
&
+
drm_encoder_mask(&(encoder)->base));
- mutex_unlock(&psr->lock);
+ if (psr->enabled && needs_to_disable)
+ intel_psr_disable_locked(intel_dp);
+
+ mutex_unlock(&psr->lock);
+ }
}
}
--
2.25.1
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ttm: fix sg_table construction (rev3)
== Series Details == Series: drm/i915/ttm: fix sg_table construction (rev3) URL : https://patchwork.freedesktop.org/series/106048/ State : success == Summary == CI Bug Log - changes from CI_DRM_11870 -> Patchwork_106048v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/index.html Participating hosts (33 -> 42) -- Additional (11): fi-kbl-soraka bat-dg1-5 bat-dg2-8 bat-dg2-9 bat-adlp-6 bat-adlp-4 fi-hsw-4770 bat-adln-1 bat-jsl-3 bat-rpls-2 bat-jsl-1 Missing(2): fi-ctg-p8600 fi-hsw-4200u Known issues Here are the changes found in Patchwork_106048v3 that come from known issues: ### IGT changes ### Issues hit * igt@fbdev@nullptr: - bat-dg1-5: NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-dg1-5/igt@fb...@nullptr.html * igt@gem_exec_gttfill@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +8 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/fi-kbl-soraka/igt@gem_exec_gttf...@basic.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-adlp-4: NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-adlp-4/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#4083]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-dg1-5/igt@gem_m...@basic.html * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770:NOTRUN -> [SKIP][7] ([fdo#109271]) +9 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html * igt@gem_tiled_blits@basic: - bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#4077]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-dg1-5/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-5: NOTRUN -> [SKIP][9] ([i915#4079]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-dg1-5/igt@gem_tiled_pread_basic.html - bat-adlp-4: NOTRUN -> [SKIP][10] ([i915#3282]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-adlp-4/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#3012]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/fi-hsw-4770/igt@i915_pm_backli...@basic-brightness.html - bat-dg1-5: NOTRUN -> [SKIP][12] ([i915#1155]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gem: - fi-pnv-d510:NOTRUN -> [DMESG-FAIL][13] ([i915#4528]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/fi-pnv-d510/igt@i915_selftest@l...@gem.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][14] ([i915#1886]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-dg1-5: NOTRUN -> [INCOMPLETE][15] ([i915#6011]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html * igt@i915_suspend@basic-s3-without-i915: - bat-adlp-4: NOTRUN -> [SKIP][16] ([i915#5903]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-adlp-4/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][17] ([i915#4212]) +7 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-5: NOTRUN -> [SKIP][18] ([i915#4215]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106048v3/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_busy@basic: - bat-dg1-5: NOTRUN -> [SKIP][19] ([i915#1845] / [i915#4303]) [19]: https://intel-gfx-ci.01.org
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/ttm: fix sg_table construction (rev3)
== Series Details == Series: drm/i915/ttm: fix sg_table construction (rev3) URL : https://patchwork.freedesktop.org/series/106048/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH v3] drm/i915/ttm: fix sg_table construction
On 7/11/2022 10:58 AM, Matthew Auld wrote:
If we encounter some monster sized local-memory page that exceeds the
maximum sg length (UINT32_MAX), ensure that don't end up with some
misaligned address in the entry that follows, leading to fireworks
later. Also ensure we have some coverage of this in the selftests.
v2(Chris):
- Use round_down consistently to avoid udiv errors
v3(Nirmoy):
- Also update the max_segment in the selftest
Fixes: f701b16d4cc5 ("drm/i915/ttm: add i915_sg_from_buddy_resource")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6379
Signed-off-by: Matthew Auld
Reviewed-by: Nirmoy Das
Cc: Thomas Hellström
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 11 --
drivers/gpu/drm/i915/i915_scatterlist.c | 19 +
drivers/gpu/drm/i915/i915_scatterlist.h | 6 --
drivers/gpu/drm/i915/intel_region_ttm.c | 10 ++---
drivers/gpu/drm/i915/intel_region_ttm.h | 3 ++-
.../drm/i915/selftests/intel_memory_region.c | 21 +--
drivers/gpu/drm/i915/selftests/mock_region.c | 3 ++-
7 files changed, 58 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 7e1f8b83077f..c5c8aa1f8558 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -602,10 +602,15 @@ i915_ttm_resource_get_st(struct drm_i915_gem_object *obj,
struct ttm_resource *res)
{
struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
+ u64 page_alignment;
if (!i915_ttm_gtt_binds_lmem(res))
return i915_ttm_tt_get_st(bo->ttm);
+ page_alignment = bo->page_alignment << PAGE_SHIFT;
+ if (!page_alignment)
+ page_alignment = obj->mm.region->min_page_size;
+
/*
* If CPU mapping differs, we need to add the ttm_tt pages to
* the resulting st. Might make sense for GGTT.
@@ -616,7 +621,8 @@ i915_ttm_resource_get_st(struct drm_i915_gem_object *obj,
struct i915_refct_sgt *rsgt;
rsgt = intel_region_ttm_resource_to_rsgt(obj->mm.region,
-res);
+res,
+
page_alignment);
if (IS_ERR(rsgt))
return rsgt;
@@ -625,7 +631,8 @@ i915_ttm_resource_get_st(struct drm_i915_gem_object *obj,
return i915_refct_sgt_get(obj->ttm.cached_io_rsgt);
}
- return intel_region_ttm_resource_to_rsgt(obj->mm.region, res);
+ return intel_region_ttm_resource_to_rsgt(obj->mm.region, res,
+page_alignment);
}
static int i915_ttm_truncate(struct drm_i915_gem_object *obj)
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.c
b/drivers/gpu/drm/i915/i915_scatterlist.c
index 159571b9bd24..f63b50b71e10 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.c
+++ b/drivers/gpu/drm/i915/i915_scatterlist.c
@@ -68,6 +68,7 @@ void i915_refct_sgt_init(struct i915_refct_sgt *rsgt, size_t
size)
* drm_mm_node
* @node: The drm_mm_node.
* @region_start: An offset to add to the dma addresses of the sg list.
+ * @page_alignment: Required page alignment for each sg entry. Power of two.
*
* Create a struct sg_table, initializing it from a struct drm_mm_node,
* taking a maximum segment length into account, splitting into segments
@@ -77,15 +78,18 @@ void i915_refct_sgt_init(struct i915_refct_sgt *rsgt,
size_t size)
* error code cast to an error pointer on failure.
*/
struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct drm_mm_node *node,
- u64 region_start)
+ u64 region_start,
+ u64 page_alignment)
{
- const u64 max_segment = SZ_1G; /* Do we have a limit on this? */
+ const u64 max_segment = round_down(UINT_MAX, page_alignment);
u64 segment_pages = max_segment >> PAGE_SHIFT;
u64 block_size, offset, prev_end;
struct i915_refct_sgt *rsgt;
struct sg_table *st;
struct scatterlist *sg;
+ GEM_BUG_ON(!max_segment);
+
rsgt = kmalloc(sizeof(*rsgt), GFP_KERNEL);
if (!rsgt)
return ERR_PTR(-ENOMEM);
@@ -112,6 +116,8 @@ struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct
drm_mm_node *node,
sg = __sg_next(sg);
sg_dma_address(sg) = region_start + offset;
+ GEM_BUG_ON(!IS_ALIGNED(sg_dma_address(sg),
+ page_alignment));
sg_dma_len(sg) = 0;
sg->length = 0;
st->nents++;
@@ -138,6
Re: [Intel-gfx] [PATCH v2] drm/i915/selftests: fix a couple IS_ERR() vs NULL tests
On 08/07/2022 10:41, Dan Carpenter wrote:
The shmem_pin_map() function doesn't return error pointers, it returns
NULL.
Fixes: be1cb55a07bf ("drm/i915/gt: Keep a no-frills swappable copy of the default
context state")
Signed-off-by: Dan Carpenter
Reviewed-by: Matthew Auld
Pushed to drm-intel-gt-next. Thanks for the fix.
---
v2: Correct the Fixes tag. Add Matthew's reviewed-by tag.
drivers/gpu/drm/i915/gt/selftest_lrc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c
b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 8b2c11dbe354..1109088fe8f6 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -176,8 +176,8 @@ static int live_lrc_layout(void *arg)
continue;
hw = shmem_pin_map(engine->default_state);
- if (IS_ERR(hw)) {
- err = PTR_ERR(hw);
+ if (!hw) {
+ err = -ENOMEM;
break;
}
hw += LRC_STATE_OFFSET / sizeof(*hw);
@@ -365,8 +365,8 @@ static int live_lrc_fixed(void *arg)
continue;
hw = shmem_pin_map(engine->default_state);
- if (IS_ERR(hw)) {
- err = PTR_ERR(hw);
+ if (!hw) {
+ err = -ENOMEM;
break;
}
hw += LRC_STATE_OFFSET / sizeof(*hw);
Re: [Intel-gfx] [PATCH] drm/i915/display: Ensure PSR gets disabled if no encoders in new state
On Mon, Jul 11, 2022 at 09:16:01AM +0300, Jouni Högander wrote:
> Currently PSR is left enabled when all planes are disabled if there
> is no attached encoder in new state. This seems to be causing FIFO
> underruns.
>
> Fix this by checking if old and new crtc encoder masks are differing.
> PSR is disabled for encoders not in new crtc state encoder mask.
>
> Cc: Mika Kahola
> Reported-by: Stanislav Lisovskiy
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 72 +---
> 1 file changed, 51 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index e6a870641cd2..710cc31ace22 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1863,36 +1863,66 @@ void intel_psr_pre_plane_update(struct
> intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> struct drm_i915_private *i915 = to_i915(state->base.dev);
> - const struct intel_crtc_state *crtc_state =
> - intel_atomic_get_new_crtc_state(state, crtc);
> + struct intel_crtc_state *new_crtc_state, *old_crtc_state;
> struct intel_encoder *encoder;
> + struct intel_dp *intel_dp;
> + struct intel_psr *psr;
> + int i;
>
> if (!HAS_PSR(i915))
> return;
>
> - for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> - crtc_state->uapi.encoder_mask) {
> - struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> - struct intel_psr *psr = &intel_dp->psr;
> - bool needs_to_disable = false;
> -
> - mutex_lock(&psr->lock);
> -
> + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> + new_crtc_state, i) {
> /*
> - * Reasons to disable:
> - * - PSR disabled in new state
> - * - All planes will go inactive
> - * - Changing between PSR versions
> + * Check if encoder exists in new state and disable
> + * psr if it doesn't. Otherwise we will end update
> + * having all planes disabled and psr enabled which
> + * seems to be causing problems.
>*/
> - needs_to_disable |= intel_crtc_needs_modeset(crtc_state);
> - needs_to_disable |= !crtc_state->has_psr;
> - needs_to_disable |= !crtc_state->active_planes;
> - needs_to_disable |= crtc_state->has_psr2 != psr->psr2_enabled;
> + if (old_crtc_state->uapi.encoder_mask !=
> new_crtc_state->uapi.encoder_mask) {
> + for_each_intel_encoder_mask_with_psr(state->base.dev,
> encoder,
> +
> old_crtc_state->uapi.encoder_mask) {
> + intel_dp = enc_to_intel_dp(encoder);
> + psr = &intel_dp->psr;
>
> - if (psr->enabled && needs_to_disable)
> - intel_psr_disable_locked(intel_dp);
> + if (new_crtc_state->uapi.encoder_mask &
> + drm_encoder_mask(&(encoder)->base))
> + continue;
>
> - mutex_unlock(&psr->lock);
> + mutex_lock(&psr->lock);
> +
> + if (psr->enabled)
> + intel_psr_disable_locked(intel_dp);
> +
> + mutex_unlock(&psr->lock);
> + }
> + }
> + for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> +
> new_crtc_state->uapi.encoder_mask) {
> + bool needs_to_disable = false;
> +
> + intel_dp = enc_to_intel_dp(encoder);
> + psr = &intel_dp->psr;
> +
> + mutex_lock(&psr->lock);
> +
> + /*
> + * Reasons to disable:
> + * - PSR disabled in new state
> + * - All planes will go inactive
> + * - Changing between PSR versions
> + */
> + needs_to_disable |=
> intel_crtc_needs_modeset(new_crtc_state);
> + needs_to_disable |= !new_crtc_state->has_psr;
> + needs_to_disable |= !new_crtc_state->active_planes;
> + needs_to_disable |= new_crtc_state->has_psr2 !=
> psr->psr2_enabled;
> +
> + if (psr->enabled && needs_to_disable)
> + intel_psr_disable_locked(intel_dp);
> +
> + mutex_unlock(&psr->lock);
> + }
> }
> }
Looks correct to me, the only thing that we could
[Intel-gfx] [PATCH v3] drm/i915/ttm: fix sg_table construction
If we encounter some monster sized local-memory page that exceeds the
maximum sg length (UINT32_MAX), ensure that don't end up with some
misaligned address in the entry that follows, leading to fireworks
later. Also ensure we have some coverage of this in the selftests.
v2(Chris):
- Use round_down consistently to avoid udiv errors
v3(Nirmoy):
- Also update the max_segment in the selftest
Fixes: f701b16d4cc5 ("drm/i915/ttm: add i915_sg_from_buddy_resource")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6379
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 11 --
drivers/gpu/drm/i915/i915_scatterlist.c | 19 +
drivers/gpu/drm/i915/i915_scatterlist.h | 6 --
drivers/gpu/drm/i915/intel_region_ttm.c | 10 ++---
drivers/gpu/drm/i915/intel_region_ttm.h | 3 ++-
.../drm/i915/selftests/intel_memory_region.c | 21 +--
drivers/gpu/drm/i915/selftests/mock_region.c | 3 ++-
7 files changed, 58 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 7e1f8b83077f..c5c8aa1f8558 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -602,10 +602,15 @@ i915_ttm_resource_get_st(struct drm_i915_gem_object *obj,
struct ttm_resource *res)
{
struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
+ u64 page_alignment;
if (!i915_ttm_gtt_binds_lmem(res))
return i915_ttm_tt_get_st(bo->ttm);
+ page_alignment = bo->page_alignment << PAGE_SHIFT;
+ if (!page_alignment)
+ page_alignment = obj->mm.region->min_page_size;
+
/*
* If CPU mapping differs, we need to add the ttm_tt pages to
* the resulting st. Might make sense for GGTT.
@@ -616,7 +621,8 @@ i915_ttm_resource_get_st(struct drm_i915_gem_object *obj,
struct i915_refct_sgt *rsgt;
rsgt = intel_region_ttm_resource_to_rsgt(obj->mm.region,
-res);
+res,
+
page_alignment);
if (IS_ERR(rsgt))
return rsgt;
@@ -625,7 +631,8 @@ i915_ttm_resource_get_st(struct drm_i915_gem_object *obj,
return i915_refct_sgt_get(obj->ttm.cached_io_rsgt);
}
- return intel_region_ttm_resource_to_rsgt(obj->mm.region, res);
+ return intel_region_ttm_resource_to_rsgt(obj->mm.region, res,
+page_alignment);
}
static int i915_ttm_truncate(struct drm_i915_gem_object *obj)
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.c
b/drivers/gpu/drm/i915/i915_scatterlist.c
index 159571b9bd24..f63b50b71e10 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.c
+++ b/drivers/gpu/drm/i915/i915_scatterlist.c
@@ -68,6 +68,7 @@ void i915_refct_sgt_init(struct i915_refct_sgt *rsgt, size_t
size)
* drm_mm_node
* @node: The drm_mm_node.
* @region_start: An offset to add to the dma addresses of the sg list.
+ * @page_alignment: Required page alignment for each sg entry. Power of two.
*
* Create a struct sg_table, initializing it from a struct drm_mm_node,
* taking a maximum segment length into account, splitting into segments
@@ -77,15 +78,18 @@ void i915_refct_sgt_init(struct i915_refct_sgt *rsgt,
size_t size)
* error code cast to an error pointer on failure.
*/
struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct drm_mm_node *node,
- u64 region_start)
+ u64 region_start,
+ u64 page_alignment)
{
- const u64 max_segment = SZ_1G; /* Do we have a limit on this? */
+ const u64 max_segment = round_down(UINT_MAX, page_alignment);
u64 segment_pages = max_segment >> PAGE_SHIFT;
u64 block_size, offset, prev_end;
struct i915_refct_sgt *rsgt;
struct sg_table *st;
struct scatterlist *sg;
+ GEM_BUG_ON(!max_segment);
+
rsgt = kmalloc(sizeof(*rsgt), GFP_KERNEL);
if (!rsgt)
return ERR_PTR(-ENOMEM);
@@ -112,6 +116,8 @@ struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct
drm_mm_node *node,
sg = __sg_next(sg);
sg_dma_address(sg) = region_start + offset;
+ GEM_BUG_ON(!IS_ALIGNED(sg_dma_address(sg),
+ page_alignment));
sg_dma_len(sg) = 0;
sg->length = 0;
st->nents++;
@@ -138,6 +144,7 @@ struct i915_refct_sgt *i915_rsgt_from_mm_nod
[Intel-gfx] susetting the remaining swioltb couplin in DRM
Hi i915 and nouveau maintainers, any chance I could get some help to remove the remaining direct driver calls into swiotlb, namely swiotlb_max_segment and is_swiotlb_active. Either should not matter to a driver as they should be written to the DMA API. In the i915 case it seems like the driver should use dma_alloc_noncontiguous and/or dma_alloc_noncoherent to allocate DMAable memory instead of using alloc_page and the streaming dma mapping helpers. For the latter it seems like it should just stop passing use_dma_alloc == true to ttm_device_init and/or that function should switch to use dma_alloc_noncoherent.
[Intel-gfx] ✗ Fi.CI.BAT: failure for Fix TLB invalidate issues with Broadwell (rev5)
== Series Details ==
Series: Fix TLB invalidate issues with Broadwell (rev5)
URL : https://patchwork.freedesktop.org/series/105167/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11862 -> Patchwork_105167v5
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_105167v5 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_105167v5, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/index.html
Participating hosts (45 -> 42)
--
Additional (2): bat-rpls-1 bat-dg1-5
Missing(5): fi-cml-u2 fi-hsw-4200u fi-icl-u2 fi-ctg-p8600 bat-jsl-3
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_105167v5:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@gem:
- fi-elk-e7500: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/fi-elk-e7500/igt@i915_selftest@l...@gem.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/fi-elk-e7500/igt@i915_selftest@l...@gem.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live@guc:
- {bat-rpls-1}: NOTRUN -> [DMESG-WARN][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-rpls-1/igt@i915_selftest@l...@guc.html
Known issues
Here are the changes found in Patchwork_105167v5 that come from known issues:
### IGT changes ###
Issues hit
* igt@fbdev@nullptr:
- bat-dg1-5: NOTRUN -> [SKIP][4] ([i915#2582]) +4 similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@fb...@nullptr.html
* igt@gem_mmap@basic:
- bat-dg1-5: NOTRUN -> [SKIP][5] ([i915#4083])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@gem_m...@basic.html
* igt@gem_tiled_blits@basic:
- bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#4077]) +2 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@gem_tiled_bl...@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg1-5: NOTRUN -> [SKIP][7] ([i915#4079]) +1 similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#1155])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html
* igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5: NOTRUN -> [INCOMPLETE][9] ([i915#6011])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5: NOTRUN -> [SKIP][10] ([i915#4212]) +7 similar issues
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5: NOTRUN -> [SKIP][11] ([i915#4215])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html
* igt@kms_busy@basic:
- bat-dg1-5: NOTRUN -> [SKIP][12] ([i915#1845] / [i915#4303])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@kms_b...@basic.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-snb-2600:NOTRUN -> [SKIP][13] ([fdo#109271] / [fdo#111827])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-rkl-11600: NOTRUN -> [SKIP][14] ([fdo#111827])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/fi-rkl-11600/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-crc-fast:
- bat-dg1-5: NOTRUN -> [SKIP][15] ([fdo#111827]) +7 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-dg1-5/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_flip@basic-flip-vs-modeset@b-edp1:
- bat-adlp-4: [PASS][16] -> [DMESG-WARN][17] ([i915#3576]) +1
similar issue
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/bat-adlp-4/igt@kms_flip@basic-flip-vs-mode...@b-edp1.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105167v5/bat-adlp-4/igt@kms_flip@basic-flip-vs-mode...@b-edp1.html
* igt@kms_force_connector_basic@force-load-
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Ensure PSR gets disabled if no encoders in new state
== Series Details == Series: drm/i915/display: Ensure PSR gets disabled if no encoders in new state URL : https://patchwork.freedesktop.org/series/106168/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11862_full -> Patchwork_106168v1_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_106168v1_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_106168v1_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (10 -> 13) -- Additional (3): shard-rkl shard-dg1 shard-tglu Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_106168v1_full: ### IGT changes ### Possible regressions * igt@kms_invalid_mode@clock-too-high@edp-1-pipe-d: - shard-tglb: NOTRUN -> [SKIP][1] +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-tglb3/igt@kms_invalid_mode@clock-too-h...@edp-1-pipe-d.html Known issues Here are the changes found in Patchwork_106168v1_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_create@create-massive: - shard-kbl: NOTRUN -> [DMESG-WARN][2] ([i915#4991]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-kbl4/igt@gem_cre...@create-massive.html - shard-apl: NOTRUN -> [DMESG-WARN][3] ([i915#4991]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-apl4/igt@gem_cre...@create-massive.html * igt@gem_ctx_exec@basic-nohangcheck: - shard-tglb: [PASS][4] -> [FAIL][5] ([i915#6268]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-tglb3/igt@gem_ctx_e...@basic-nohangcheck.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-tglb7/igt@gem_ctx_e...@basic-nohangcheck.html * igt@gem_ctx_persistence@engines-hostile-preempt: - shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-snb4/igt@gem_ctx_persiste...@engines-hostile-preempt.html * igt@gem_ctx_persistence@hostile: - shard-tglb: NOTRUN -> [FAIL][7] ([i915#2410]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-tglb3/igt@gem_ctx_persiste...@hostile.html * igt@gem_exec_balancer@parallel-balancer: - shard-snb: NOTRUN -> [SKIP][8] ([fdo#109271]) +26 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-snb4/igt@gem_exec_balan...@parallel-balancer.html * igt@gem_exec_endless@dispatch@vecs0: - shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([i915#3778]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-tglb3/igt@gem_exec_endless@dispa...@vecs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-tglb1/igt@gem_exec_endless@dispa...@vecs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-glk: NOTRUN -> [FAIL][11] ([i915#2842]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-glk2/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][12] -> [FAIL][13] ([i915#2842]) +3 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-kbl: NOTRUN -> [FAIL][14] ([i915#2842]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-kbl1/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#2842]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-iclb1/igt@gem_exec_fair@basic-p...@bcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-iclb3/igt@gem_exec_fair@basic-p...@bcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-glk: [PASS][17] -> [FAIL][18] ([i915#2842]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-glk9/igt@gem_exec_fair@basic-p...@rcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-glk2/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_lmem_swapping@heavy-verify-random: - shard-skl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4613]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106168v1/shard-skl7/igt@gem_lmem_swapp...@heavy-ver
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix TLB invalidate issues with Broadwell (rev5)
== Series Details == Series: Fix TLB invalidate issues with Broadwell (rev5) URL : https://patchwork.freedesktop.org/series/105167/ State : warning == Summary == Error: dim checkpatch failed dc7354e61b50 drm/i915/gt: Serialize GRDOM access between multiple engine resets 7c8e464dec21 drm/i915/gt: Serialize TLB invalidates with GT resets -:60: ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Chris Wilson ' total: 1 errors, 0 warnings, 0 checks, 27 lines checked
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Introduce Meteorlake
Issue is related to https://gitlab.freedesktop.org/drm/intel/-/issues/6169
Few tests - incomplete - pstore logs, Kernel panic - not syncing: Software
Watchdog Timer expired, RIP: 0010:cpuidle_enter_state
Thanks,
Lakshmi.
-Original Message-
From: Roper, Matthew D
Sent: Friday, July 8, 2022 1:34 PM
To: intel-gfx@lists.freedesktop.org
Cc: Sripada, Radhakrishna ; Vudum,
Lakshminarayana ; Vivi, Rodrigo
Subject: Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Introduce Meteorlake
On Fri, Jul 08, 2022 at 04:38:48PM +, Patchwork wrote:
> == Series Details ==
>
> Series: i915: Introduce Meteorlake
> URL : https://patchwork.freedesktop.org/series/106075/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11859_full -> Patchwork_106075v1_full
>
>
> Summary
> ---
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_106075v1_full absolutely need
> to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_106075v1_full, please notify your bug team to allow
> them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Participating hosts (13 -> 13)
> --
>
> No changes in participating hosts
>
> Possible new issues
> ---
>
> Here are the unknown changes that may have been introduced in
> Patchwork_106075v1_full:
>
> ### IGT changes ###
>
> Possible regressions
>
> * igt@gem_exec_schedule@wide@vcs1:
> - shard-kbl: [PASS][1] -> [INCOMPLETE][2]
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-kbl4/igt@gem_exec_schedule@w...@vcs1.html
>[2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106075v1/shard-kbl1/igt@gem_exec_schedule@w...@vcs1.html
Test actually finished executing, but then there were some NVME errors,
followed by
<2>[ 334.527621] softdog: Initiating panic
<0>[ 334.529807] Kernel panic - not syncing: Software Watchdog Timer expired
This looks like general system instability, likely not related to
graphics at all.
Series applied to drm-intel-gt-next (as suggested by Rodrigo, since this
will allow the IS_METEORLAKE definitions to be cross-pollinated across
both drm-intel branches most easily).
Thanks for the patches.
Matt
>
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
> - {shard-rkl}:NOTRUN -> [WARN][3]
>[3]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106075v1/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-i...@vcs0.html
>
> * igt@kms_cursor_legacy@cursor-vs-flip@atomic:
> - {shard-dg1}:[PASS][4] -> [FAIL][5] +4 similar issues
>[4]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-dg1-12/igt@kms_cursor_legacy@cursor-vs-f...@atomic.html
>[5]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106075v1/shard-dg1-15/igt@kms_cursor_legacy@cursor-vs-f...@atomic.html
>
>
> Known issues
>
>
> Here are the changes found in Patchwork_106075v1_full that come from known
> issues:
>
> ### CI changes ###
>
> Possible fixes
>
> * boot:
> - shard-skl: ([PASS][6], [PASS][7], [PASS][8], [PASS][9],
> [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15],
> [PASS][16], [FAIL][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21],
> [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27],
> [PASS][28], [PASS][29], [PASS][30]) ([i915#5032]) -> ([PASS][31], [PASS][32],
> [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38],
> [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44],
> [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50],
> [PASS][51], [PASS][52])
>[6]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl10/boot.html
>[7]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl10/boot.html
>[8]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl10/boot.html
>[9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl1/boot.html
>[10]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl1/boot.html
>[11]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl3/boot.html
>[12]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl3/boot.html
>[13]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl3/boot.html
>[14]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl4/boot.html
>[15]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl4/boot.html
>[16]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11859/shard-skl4/boot.html
>[1
