Re: [Intel-gfx] [RFC 02/10] drm/i915/vm_bind: Bind and unbind mappings

[Niranjana Vishwanathapura]

On Mon, Jul 18, 2022 at 11:55:41AM +0100, Tvrtko Ursulin wrote:


On 01/07/2022 23:50, Niranjana Vishwanathapura wrote:

Bind and unbind the mappings upon VM_BIND and VM_UNBIND calls.

Signed-off-by: Niranjana Vishwanathapura 
Signed-off-by: Prathap Kumar Valsan 
---
 drivers/gpu/drm/i915/Makefile |   1 +
 drivers/gpu/drm/i915/gem/i915_gem_create.c|  10 +-
 drivers/gpu/drm/i915/gem/i915_gem_object.h|   2 +
 drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h   |  38 +++
 .../drm/i915/gem/i915_gem_vm_bind_object.c| 233 ++
 drivers/gpu/drm/i915/gt/intel_gtt.c   |   7 +
 drivers/gpu/drm/i915/gt/intel_gtt.h   |   9 +
 drivers/gpu/drm/i915/i915_driver.c|  11 +-
 drivers/gpu/drm/i915/i915_vma.c   |   7 +-
 drivers/gpu/drm/i915/i915_vma.h   |   2 -
 drivers/gpu/drm/i915/i915_vma_types.h |   8 +
 11 files changed, 318 insertions(+), 10 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
 create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 522ef9b4aff3..4e1627e96c6e 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -165,6 +165,7 @@ gem-y += \
gem/i915_gem_ttm_move.o \
gem/i915_gem_ttm_pm.o \
gem/i915_gem_userptr.o \
+   gem/i915_gem_vm_bind_object.o \
gem/i915_gem_wait.o \
gem/i915_gemfs.o
 i915-y += \
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c 
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 33673fe7ee0a..927a87e5ec59 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -15,10 +15,10 @@
 #include "i915_trace.h"
 #include "i915_user_extensions.h"
-static u32 object_max_page_size(struct intel_memory_region **placements,
-   unsigned int n_placements)
+u32 i915_gem_object_max_page_size(struct intel_memory_region **placements,
+ unsigned int n_placements)
 {
-   u32 max_page_size = 0;
+   u32 max_page_size = I915_GTT_PAGE_SIZE_4K;
int i;
for (i = 0; i < n_placements; i++) {
@@ -28,7 +28,6 @@ static u32 object_max_page_size(struct intel_memory_region 
**placements,
max_page_size = max_t(u32, max_page_size, mr->min_page_size);
}
-   GEM_BUG_ON(!max_page_size);
return max_page_size;
 }
@@ -99,7 +98,8 @@ __i915_gem_object_create_user_ext(struct drm_i915_private 
*i915, u64 size,
i915_gem_flush_free_objects(i915);
-   size = round_up(size, object_max_page_size(placements, n_placements));
+   size = round_up(size, i915_gem_object_max_page_size(placements,
+   n_placements));
if (size == 0)
return ERR_PTR(-EINVAL);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 6f0a3ce35567..650de2224843 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -47,6 +47,8 @@ static inline bool i915_gem_object_size_2big(u64 size)
 }
 void i915_gem_init__objects(struct drm_i915_private *i915);
+u32 i915_gem_object_max_page_size(struct intel_memory_region **placements,
+ unsigned int n_placements);
 void i915_objects_module_exit(void);
 int i915_objects_module_init(void);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h 
b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
new file mode 100644
index ..642cdb559f17
--- /dev/null
+++ b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef __I915_GEM_VM_BIND_H
+#define __I915_GEM_VM_BIND_H
+
+#include "i915_drv.h"
+
+#define assert_vm_bind_held(vm)   lockdep_assert_held(&(vm)->vm_bind_lock)
+
+static inline void i915_gem_vm_bind_lock(struct i915_address_space *vm)
+{
+   mutex_lock(>vm_bind_lock);
+}
+
+static inline int
+i915_gem_vm_bind_lock_interruptible(struct i915_address_space *vm)
+{
+   return mutex_lock_interruptible(>vm_bind_lock);
+}
+
+static inline void i915_gem_vm_bind_unlock(struct i915_address_space *vm)
+{
+   mutex_unlock(>vm_bind_lock);
+}
+
+struct i915_vma *
+i915_gem_vm_bind_lookup_vma(struct i915_address_space *vm, u64 va);
+void i915_gem_vm_bind_remove(struct i915_vma *vma, bool release_obj);
+int i915_gem_vm_bind_obj(struct i915_address_space *vm,
+struct drm_i915_gem_vm_bind *va,
+struct drm_file *file);
+int i915_gem_vm_unbind_obj(struct i915_address_space *vm,
+  struct drm_i915_gem_vm_unbind *va);
+
+#endif /* __I915_GEM_VM_BIND_H */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
new file 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Cleanup intel_phy_is_combo() (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Cleanup intel_phy_is_combo() (rev3)
URL   : https://patchwork.freedesktop.org/series/106450/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11935_full -> Patchwork_106450v3_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_106450v3_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_106450v3_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106450v3_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_whisper@basic-queues-forked:
- shard-iclb: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb2/igt@gem_exec_whis...@basic-queues-forked.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-iclb8/igt@gem_exec_whis...@basic-queues-forked.html

  
New tests
-

  New tests have been introduced between CI_DRM_11935_full and 
Patchwork_106450v3_full:

### New IGT tests (1) ###

  * igt@kms_flip@plain-flip-interruptible@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [0.58, 0.65] s

  

Known issues


  Here are the changes found in Patchwork_106450v3_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@display-4x:
- shard-tglb: NOTRUN -> [SKIP][3] ([i915#1839])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-tglb8/igt@feature_discov...@display-4x.html

  * igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: [PASS][4] -> [SKIP][5] ([i915#4525])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb2/igt@gem_exec_balan...@parallel-contexts.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-iclb8/igt@gem_exec_balan...@parallel-contexts.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk:  [PASS][6] -> [FAIL][7] ([i915#2842])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-glk8/igt@gem_exec_fair@basic-p...@rcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-glk3/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
- shard-kbl:  [PASS][8] -> [SKIP][9] ([fdo#109271])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-kbl4/igt@gem_exec_fair@basic-p...@vcs1.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-kbl1/igt@gem_exec_fair@basic-p...@vcs1.html

  * igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl:  [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-kbl1/igt@gem_exec_fair@basic-p...@vecs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][12] -> [FAIL][13] ([i915#2849])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb7/igt@gem_exec_fair@basic-throt...@rcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-iclb8/igt@gem_exec_fair@basic-throt...@rcs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-tglb: NOTRUN -> [SKIP][14] ([fdo#109313])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-tglb8/igt@gem_exec_fl...@basic-batch-kernel-default-cmd.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-skl:  NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-skl9/igt@gem_lmem_swapp...@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@verify-random:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#4613])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-tglb8/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-tglb: NOTRUN -> [SKIP][17] ([i915#4270])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-tglb8/igt@gem_...@verify-pxp-key-change-after-suspend-resume.html

  * igt@gem_userptr_blits@coherency-unsync:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#3297])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/shard-tglb8/igt@gem_userptr_bl...@coherency-unsync.html

  * igt@gen7_exec_parse@basic-allocation:
- shard-tglb: NOTRUN -> 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Cleanup intel_phy_is_combo() (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Cleanup intel_phy_is_combo() (rev3)
URL   : https://patchwork.freedesktop.org/series/106450/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11935 -> Patchwork_106450v3


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/index.html

Participating hosts (36 -> 33)
--

  Additional (2): bat-dg2-9 bat-dg1-5 
  Missing(5): fi-bxt-dsi fi-hsw-4200u fi-ctg-p8600 fi-kbl-x1275 
fi-bdw-samus 

Known issues


  Here are the changes found in Patchwork_106450v3 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@fbdev@read:
- bat-dg1-5:  NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@fb...@read.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][2] ([i915#4083])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][3] ([i915#4077]) +2 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][4] ([i915#4079]) +1 similar issue
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- bat-dg1-5:  NOTRUN -> [SKIP][5] ([i915#1155])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@execlists:
- fi-bsw-nick:[PASS][6] -> [INCOMPLETE][7] ([i915#5847])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/fi-bsw-nick/igt@i915_selftest@l...@execlists.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-bsw-kefka:   [PASS][8] -> [DMESG-FAIL][9] ([i915#5334])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-bsw-kefka/igt@i915_selftest@live@gt_heartbeat.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/fi-bsw-kefka/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  NOTRUN -> [DMESG-FAIL][10] ([i915#4494] / [i915#4957])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5:  NOTRUN -> [INCOMPLETE][11] ([i915#6011])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][12] ([i915#4212]) +7 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#4215])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_busy@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][14] ([i915#1845] / [i915#4303])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@kms_b...@basic.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][15] ([fdo#109271] / [fdo#111827])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-hsw-4770:NOTRUN -> [SKIP][16] ([fdo#109271] / [fdo#111827])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/fi-hsw-4770/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-blb-e6850:   NOTRUN -> [SKIP][17] ([fdo#109271])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/fi-blb-e6850/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-pnv-d510:NOTRUN -> [SKIP][18] ([fdo#109271])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/fi-pnv-d510/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- bat-dg1-5:  NOTRUN -> [SKIP][19] ([fdo#111827]) +7 similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v3/bat-dg1-5/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-dg1-5:  NOTRUN -> [SKIP][20] ([fdo#109285])
   [20]: 

Re: [Intel-gfx] [PATCH v3] drm/i915/dg2: Add performance workaround 18019455067

[Matt Roper]

I think you may have missed Lucas' reply to your v3:

https://lists.freedesktop.org/archives/intel-gfx/2022-June/300712.html

Also, here's the reply to v2 that he's referring to:

https://lists.freedesktop.org/archives/intel-gfx/2022-June/300646.html

I.e., he wants this to be called from a new 'tuning_init' function that
is itself called from general_render_compute_wa_init, since we expect
more of these things to show up in the future so it makes sense to have
a dedicated place for them.


Matt

On Wed, Jul 20, 2022 at 11:19:18AM +0300, Lionel Landwerlin wrote:
> Ping?
> 
> On 11/07/2022 14:30, Lionel Landwerlin wrote:
> > Ping?
> > 
> > On 30/06/2022 11:35, Lionel Landwerlin wrote:
> > > The recommended number of stackIDs for Ray Tracing subsystem is 512
> > > rather than 2048 (default HW programming).
> > > 
> > > v2: Move the programming to dg2_ctx_gt_tuning_init() (Lucas)
> > > 
> > > v3: Move programming to general_render_compute_wa_init() (Matt)
> > > 
> > > Signed-off-by: Lionel Landwerlin 
> > > ---
> > >   drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 
> > >   drivers/gpu/drm/i915/gt/intel_workarounds.c | 9 +
> > >   2 files changed, 13 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > > b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > > index 07ef111947b8c..12fc87b957425 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > > @@ -1112,6 +1112,10 @@
> > >   #define   GEN12_PUSH_CONST_DEREF_HOLD_DIS    REG_BIT(8)
> > >     #define RT_CTRL    _MMIO(0xe530)
> > > +#define   RT_CTRL_NUMBER_OF_STACKIDS_MASK    REG_GENMASK(6, 5)
> > > +#define   NUMBER_OF_STACKIDS_512    2
> > > +#define   NUMBER_OF_STACKIDS_1024    1
> > > +#define   NUMBER_OF_STACKIDS_2048    0
> > >   #define   DIS_NULL_QUERY    REG_BIT(10)
> > >     #define EU_PERF_CNTL1    _MMIO(0xe558)
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > index 3213c593a55f4..ea674e456cd76 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > > @@ -2737,6 +2737,15 @@ general_render_compute_wa_init(struct
> > > intel_engine_cs *engine, struct i915_wa_li
> > >   wa_write_or(wal, VDBX_MOD_CTRL, FORCE_MISS_FTLB);
> > >   wa_write_or(wal, VEBX_MOD_CTRL, FORCE_MISS_FTLB);
> > >   }
> > > +
> > > +    if (IS_DG2(i915)) {
> > > +    /* Performance tuning for Ray-tracing */
> > > +    wa_write_clr_set(wal,
> > > + RT_CTRL,
> > > + RT_CTRL_NUMBER_OF_STACKIDS_MASK,
> > > + REG_FIELD_PREP(RT_CTRL_NUMBER_OF_STACKIDS_MASK,
> > > +    NUMBER_OF_STACKIDS_512));
> > > +    }
> > >   }
> > >     static void
> > 
> > 
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation

[Intel-gfx] [PATCH] drm/i915/display: Cleanup intel_phy_is_combo()

[Anusha Srivatsa]

Cleanup the intel_phy_is_combo
to accommodate for cases where combo phy is not available.

v2: retain comment that explains DG2 returning false from
intel_phy_is_combo() (Arun)

Cc: Arun R Murthy 
Cc: Matt Roper 
Signed-off-by: Anusha Srivatsa 
Reviewed-by: Matt Roper 
Reviewed-by: Arun R Murthy 
---
 drivers/gpu/drm/i915/display/intel_display.c | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index a0f84cbe974f..b9d0be7753a8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2082,22 +2082,20 @@ bool intel_phy_is_combo(struct drm_i915_private 
*dev_priv, enum phy phy)
 {
if (phy == PHY_NONE)
return false;
-   else if (IS_DG2(dev_priv))
-   /*
-* DG2 outputs labelled as "combo PHY" in the bspec use
-* SNPS PHYs with completely different programming,
-* hence we always return false here.
-*/
-   return false;
else if (IS_ALDERLAKE_S(dev_priv))
return phy <= PHY_E;
else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
return phy <= PHY_D;
else if (IS_JSL_EHL(dev_priv))
return phy <= PHY_C;
-   else if (DISPLAY_VER(dev_priv) >= 11)
+   else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11, 12))
return phy <= PHY_B;
else
+   /*
+* DG2 outputs labelled as "combo PHY" in the bspec use
+* SNPS PHYs with completely different programming,
+* hence we always return false here.
+*/
return false;
 }
 
-- 
2.25.1

Re: [Intel-gfx] [PATCH v4 00/10] cover-letter: Update vfio_pin/unpin_pages API

[Alex Williamson]

On Fri, 22 Jul 2022 19:02:46 -0700
Nicolin Chen  wrote:

> This is a preparatory series for IOMMUFD v2 patches. It prepares for
> replacing vfio_iommu_type1 implementations of vfio_pin/unpin_pages()
> with IOMMUFD version.
> 
> There's a gap between these two versions: the vfio_iommu_type1 version
> inputs a non-contiguous PFN list and outputs another PFN list for the
> pinned physical page list, while the IOMMUFD version only supports a
> contiguous address input by accepting the starting IO virtual address
> of a set of pages to pin and by outputting to a physical page list.
> 
> The nature of existing callers mostly aligns with the IOMMUFD version,
> except s390's vfio_ccw_cp code where some additional change is needed
> along with this series. Overall, updating to "iova" and "phys_page"
> does improve the caller side to some extent.
> 
> Also fix a misuse of physical address and virtual address in the s390's
> crypto code. And update the input naming at the adjacent vfio_dma_rw().
> 
> This is on github:
> https://github.com/nicolinc/iommufd/commits/vfio_pin_pages-v4
> 
> Terrence has tested this series on i915; Eric has tested on s390.
> 
> Thanks!
> 
> Changelog
> v4:
>  * Dropped double-shifting at two gvt_unpin_guest_page calls, fixing
>a bug that's discovered by Alex
>  * Added Reviewed-by from Anthony Krowiak
>  * Rebased on top of linux-vfio's next
> v3: https://lore.kernel.org/kvm/20220708224427.1245-1-nicol...@nvidia.com/
>  * Added a patch to replace roundup with DIV_ROUND_UP in i915 gvt
>  * Dropped the "driver->ops->unpin_pages" and NULL checks in PATCH-1
>  * Changed to use WARN_ON and separate into lines in PATCH-1
>  * Replaced "guest" words with "user" and fix typo in PATCH-5
>  * Updated commit log of PATCH-1, PATCH-6, and PATCH-10
>  * Added Reviewed/Acked-by from Christoph, Jason, Kirti, Kevin and Eric
>  * Added Tested-by from Terrence (i915) and Eric (s390)
> v2: https://lore.kernel.org/kvm/20220706062759.24946-1-nicol...@nvidia.com/
>  * Added a patch to make vfio_unpin_pages return void
>  * Added two patches to remove PFN list from two s390 callers
>  * Renamed "phys_page" parameter to "pages" for vfio_pin_pages
>  * Updated commit log of kmap_local_page() patch
>  * Added Harald's "Reviewed-by" to pa_ind patch
>  * Rebased on top of Alex's extern removal path
> v1: https://lore.kernel.org/kvm/20220616235212.15185-1-nicol...@nvidia.com/
> 
> Nicolin Chen (10):
>   vfio: Make vfio_unpin_pages() return void
>   drm/i915/gvt: Replace roundup with DIV_ROUND_UP
>   vfio/ap: Pass in physical address of ind to ap_aqic()
>   vfio/ccw: Only pass in contiguous pages
>   vfio: Pass in starting IOVA to vfio_pin/unpin_pages API
>   vfio/ap: Change saved_pfn to saved_iova
>   vfio/ccw: Change pa_pfn list to pa_iova list
>   vfio: Rename user_iova of vfio_dma_rw()
>   vfio/ccw: Add kmap_local_page() for memcpy
>   vfio: Replace phys_pfn with pages for vfio_pin_pages()
> 
>  .../driver-api/vfio-mediated-device.rst   |   6 +-
>  arch/s390/include/asm/ap.h|   6 +-
>  drivers/gpu/drm/i915/gvt/kvmgt.c  |  45 ++--
>  drivers/s390/cio/vfio_ccw_cp.c| 195 +++---
>  drivers/s390/crypto/ap_queue.c|   2 +-
>  drivers/s390/crypto/vfio_ap_ops.c |  54 +++--
>  drivers/s390/crypto/vfio_ap_private.h |   4 +-
>  drivers/vfio/vfio.c   |  54 ++---
>  drivers/vfio/vfio.h   |   8 +-
>  drivers/vfio/vfio_iommu_type1.c   |  45 ++--
>  include/linux/vfio.h  |   9 +-
>  11 files changed, 213 insertions(+), 215 deletions(-)
> 

Applied to vfio next branch for v5.20.  Thanks,

Alex

Re: [Intel-gfx] [PATCH] drm/i915/display: Cleanup intel_phy_is_combo()

[Matt Roper]

On Mon, Jul 25, 2022 at 09:45:57AM -0700, Srivatsa, Anusha wrote:
> 
> 
> > -Original Message-
> > From: Roper, Matthew D 
> > Sent: Thursday, July 21, 2022 1:50 PM
> > To: Srivatsa, Anusha 
> > Cc: intel-gfx@lists.freedesktop.org; Murthy, Arun R
> > 
> > Subject: Re: [PATCH] drm/i915/display: Cleanup intel_phy_is_combo()
> > 
> > On Thu, Jul 21, 2022 at 01:17:54PM -0700, Anusha Srivatsa wrote:
> > > No functional change. Cleanup the intel_phy_is_combo
> > 
> > But there actually is a functional change here --- display version 14 will 
> > now
> > (properly) fall through to the 'else' branch instead of being picked up by 
> > the
> > 11/12/adl branch.  I believe that was your original motivation for this 
> > patch,
> > so you may want to mention that in the commit message (and drop the "no
> > functional change" statement).
> > 
> > The code change itself looks fine to me since it seems like the traditional
> > combo PHYs may be a thing of the past and we don't want to keep assuming
> > future platforms will have any.
> > 
> With the change in commit message can I add your reviewed-by laong with 
> Arun's?

Yeah, with an updated commit message,

Reviewed-by: Matt Roper 

> 
> Anusha
> > Matt
> > 
> > > to accommodate for cases where combo phy is not available.
> > >
> > > v2: retain comment that explains DG2 returning false from
> > > intel_phy_is_combo() (Arun)
> > >
> > > Cc: Arun R Murthy 
> > > Cc: Matt Roper 
> > > Signed-off-by: Anusha Srivatsa 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.c | 14 ++
> > >  1 file changed, 6 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index a0f84cbe974f..b9d0be7753a8 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -2082,22 +2082,20 @@ bool intel_phy_is_combo(struct
> > > drm_i915_private *dev_priv, enum phy phy)  {
> > >   if (phy == PHY_NONE)
> > >   return false;
> > > - else if (IS_DG2(dev_priv))
> > > - /*
> > > -  * DG2 outputs labelled as "combo PHY" in the bspec use
> > > -  * SNPS PHYs with completely different programming,
> > > -  * hence we always return false here.
> > > -  */
> > > - return false;
> > >   else if (IS_ALDERLAKE_S(dev_priv))
> > >   return phy <= PHY_E;
> > >   else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
> > >   return phy <= PHY_D;
> > >   else if (IS_JSL_EHL(dev_priv))
> > >   return phy <= PHY_C;
> > > - else if (DISPLAY_VER(dev_priv) >= 11)
> > > + else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11,
> > > +12))
> > >   return phy <= PHY_B;
> > >   else
> > > + /*
> > > +  * DG2 outputs labelled as "combo PHY" in the bspec use
> > > +  * SNPS PHYs with completely different programming,
> > > +  * hence we always return false here.
> > > +  */
> > >   return false;
> > >  }
> > >
> > > --
> > > 2.25.1
> > >
> > 
> > --
> > Matt Roper
> > Graphics Software Engineer
> > VTT-OSGC Platform Enablement
> > Intel Corporation

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Sanitycheck PCI BARs

[Patchwork]

== Series Details ==

Series: Sanitycheck PCI BARs
URL   : https://patchwork.freedesktop.org/series/106686/
State : failure

== Summary ==

Error: make failed
  CALLscripts/checksyscalls.sh
  CALLscripts/atomic/check-atomics.sh
  DESCEND objtool
  CHK include/generated/compile.h
  LD [M]  drivers/gpu/drm/i915/i915.o
  CC [M]  drivers/gpu/drm/i915/gvt/cfg_space.o
In file included from ./drivers/gpu/drm/i915/display/intel_opregion.h:29,
 from ./drivers/gpu/drm/i915/i915_drv.h:50,
 from drivers/gpu/drm/i915/gvt/cfg_space.c:34:
drivers/gpu/drm/i915/gvt/cfg_space.c: In function ‘intel_vgpu_init_cfg_space’:
drivers/gpu/drm/i915/gvt/cfg_space.c:356:26: error: ‘GTTMMADR_BAR’ undeclared 
(first use in this function)
   pci_resource_len(pdev, GTTMMADR_BAR);
  ^~~~
./include/linux/pci.h:1951:54: note: in definition of macro ‘pci_resource_end’
 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
  ^~~
drivers/gpu/drm/i915/gvt/cfg_space.c:356:3: note: in expansion of macro 
‘pci_resource_len’
   pci_resource_len(pdev, GTTMMADR_BAR);
   ^~~~
drivers/gpu/drm/i915/gvt/cfg_space.c:356:26: note: each undeclared identifier 
is reported only once for each function it appears in
   pci_resource_len(pdev, GTTMMADR_BAR);
  ^~~~
./include/linux/pci.h:1951:54: note: in definition of macro ‘pci_resource_end’
 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
  ^~~
drivers/gpu/drm/i915/gvt/cfg_space.c:356:3: note: in expansion of macro 
‘pci_resource_len’
   pci_resource_len(pdev, GTTMMADR_BAR);
   ^~~~
drivers/gpu/drm/i915/gvt/cfg_space.c:358:26: error: ‘GTT_APERTURE_BAR’ 
undeclared (first use in this function); did you mean ‘GVT_PORT_MAX’?
   pci_resource_len(pdev, GTT_APERTURE_BAR);
  ^~~~
./include/linux/pci.h:1951:54: note: in definition of macro ‘pci_resource_end’
 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
  ^~~
drivers/gpu/drm/i915/gvt/cfg_space.c:358:3: note: in expansion of macro 
‘pci_resource_len’
   pci_resource_len(pdev, GTT_APERTURE_BAR);
   ^~~~
scripts/Makefile.build:249: recipe for target 
'drivers/gpu/drm/i915/gvt/cfg_space.o' failed
make[4]: *** [drivers/gpu/drm/i915/gvt/cfg_space.o] Error 1
scripts/Makefile.build:466: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:466: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:466: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1843: recipe for target 'drivers' failed
make: *** [drivers] Error 2

[Intel-gfx] [PATCH 2/2] drm/i915: Sanitycheck PCI BARs

[Piorkowski, Piotr]

From: Piotr Piórkowski 

For proper operation of i915 we need usable PCI GTTMMADDR BAR 0
(1 for GEN2). In most cases we also need usable PCI GFXMEM BAR 2.
Let's add functions to check if BARs are set, and that it have
a size greater than 0.
In case GTTMMADDR BAR, let's validate at the beginning of i915 initialization.
For other BARs, let's validate before first use.

Signed-off-by: Piotr Piórkowski 
Cc: Jani Nikula 
Cc: Lucas De Marchi 
Cc: Matt Roper 
---
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c  |  4 
 drivers/gpu/drm/i915/gt/intel_ggtt.c|  7 ++
 drivers/gpu/drm/i915/gt/intel_region_lmem.c |  4 
 drivers/gpu/drm/i915/i915_pci.c | 25 +
 drivers/gpu/drm/i915/i915_pci.h |  4 
 5 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index c369cfd185bc..4f4c9461a23b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -18,6 +18,7 @@
 #include "gt/intel_region_lmem.h"
 #include "i915_drv.h"
 #include "i915_gem_stolen.h"
+#include "i915_pci.h"
 #include "i915_reg.h"
 #include "i915_utils.h"
 #include "i915_vgpu.h"
@@ -828,6 +829,9 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, 
u16 type,
if (WARN_ON_ONCE(instance))
return ERR_PTR(-ENODEV);
 
+   if (!i915_pci_resource_valid(pdev, GEN12_LMEM_BAR))
+   return ERR_PTR(-ENXIO);
+
/* Use DSM base address instead for stolen memory */
dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE);
if (IS_DG1(uncore->i915)) {
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c 
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 8214e07a0f5b..30cf5c3369d9 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -18,6 +18,7 @@
 #include "intel_gt_regs.h"
 #include "intel_pci_config.h"
 #include "i915_drv.h"
+#include "i915_pci.h"
 #include "i915_scatterlist.h"
 #include "i915_utils.h"
 #include "i915_vgpu.h"
@@ -931,6 +932,9 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
u16 snb_gmch_ctl;
 
if (!HAS_LMEM(i915)) {
+   if (!i915_pci_resource_valid(pdev, GTT_APERTURE_BAR))
+   return -ENXIO;
+
ggtt->gmadr = pci_resource(pdev, GTT_APERTURE_BAR);
ggtt->mappable_end = resource_size(>gmadr);
}
@@ -1085,6 +1089,9 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
unsigned int size;
u16 snb_gmch_ctl;
 
+   if (!i915_pci_resource_valid(pdev, GTT_APERTURE_BAR))
+   return -ENXIO;
+
ggtt->gmadr = pci_resource(pdev, GTT_APERTURE_BAR);
ggtt->mappable_end = resource_size(>gmadr);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c 
b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 0b78a5f3a996..360b11fd57bb 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -4,6 +4,7 @@
  */
 
 #include "i915_drv.h"
+#include "i915_pci.h"
 #include "i915_reg.h"
 #include "intel_memory_region.h"
 #include "intel_pci_config.h"
@@ -197,6 +198,9 @@ static struct intel_memory_region *setup_lmem(struct 
intel_gt *gt)
if (!IS_DGFX(i915))
return ERR_PTR(-ENODEV);
 
+   if (!i915_pci_resource_valid(pdev, GEN12_LMEM_BAR))
+   return ERR_PTR(-ENXIO);
+
if (HAS_FLAT_CCS(i915)) {
resource_size_t lmem_range;
u64 tile_stolen, flat_ccs_base;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index aacc10f2e73f..9fd788e147a3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -30,6 +30,7 @@
 #include "i915_drv.h"
 #include "i915_pci.h"
 #include "i915_reg.h"
+#include "intel_pci_config.h"
 
 #define PLATFORM(x) .platform = (x)
 #define GEN(x) \
@@ -1262,6 +1263,27 @@ static bool force_probe(u16 device_id, const char 
*devices)
return ret;
 }
 
+bool i915_pci_resource_valid(struct pci_dev *pdev, int bar)
+{
+   if (!pci_resource_flags(pdev, bar))
+   return false;
+
+   if (pci_resource_flags(pdev, bar) & IORESOURCE_UNSET)
+   return false;
+
+   if (!pci_resource_len(pdev, bar))
+   return false;
+
+   return true;
+}
+
+static bool intel_mmio_bar_valid(struct pci_dev *pdev, struct 
intel_device_info *intel_info)
+{
+   int gttmmaddr_bar = intel_info->graphics.ver == 2 ? GEN2_GTTMMADR_BAR : 
GTTMMADR_BAR;
+
+   return i915_pci_resource_valid(pdev, gttmmaddr_bar);
+}
+
 static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id 
*ent)
 {
struct intel_device_info *intel_info =
@@ -1287,6 +1309,9 @@ static int i915_pci_probe(struct pci_dev *pdev, const 
struct pci_device_id *ent)
if (PCI_FUNC(pdev->devfn))
return -ENODEV;
 
+   if 

[Intel-gfx] [PATCH 1/2] drm/i915: Use of BARs names instead of numbers

[Piorkowski, Piotr]

From: Piotr Piórkowski 

At the moment, when we refer to some PCI BAR we use the number of
this BAR in the code. The meaning of BARs between different platforms
may be different. Therefore, in order to organize the code,
let's start using defined names instead of numbers.

Signed-off-by: Piotr Piórkowski 
Cc: Jani Nikula 
Cc: Lucas De Marchi 
Cc: Matt Roper 
---
 drivers/gpu/drm/i915/display/intel_lpe_audio.c |  5 +++--
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c |  7 ---
 drivers/gpu/drm/i915/gt/intel_ggtt.c   |  9 +
 drivers/gpu/drm/i915/gt/intel_gt.c |  3 ++-
 drivers/gpu/drm/i915/gt/intel_region_lmem.c| 13 ++---
 drivers/gpu/drm/i915/gvt/cfg_space.c   |  4 ++--
 drivers/gpu/drm/i915/intel_pci_config.h|  7 +++
 7 files changed, 29 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c 
b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
index 4970bf146c4a..1e18696aaecf 100644
--- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
@@ -73,6 +73,7 @@
 #include "i915_drv.h"
 #include "intel_de.h"
 #include "intel_lpe_audio.h"
+#include "intel_pci_config.h"
 
 #define HAS_LPE_AUDIO(dev_priv) ((dev_priv)->audio.lpe.platdev != NULL)
 
@@ -100,9 +101,9 @@ lpe_audio_platdev_create(struct drm_i915_private *dev_priv)
rsc[0].flags= IORESOURCE_IRQ;
rsc[0].name = "hdmi-lpe-audio-irq";
 
-   rsc[1].start= pci_resource_start(pdev, 0) +
+   rsc[1].start= pci_resource_start(pdev, GTTMMADR_BAR) +
I915_HDMI_LPE_AUDIO_BASE;
-   rsc[1].end  = pci_resource_start(pdev, 0) +
+   rsc[1].end  = pci_resource_start(pdev, GTTMMADR_BAR) +
I915_HDMI_LPE_AUDIO_BASE + I915_HDMI_LPE_AUDIO_SIZE - 1;
rsc[1].flags= IORESOURCE_MEM;
rsc[1].name = "hdmi-lpe-audio-mmio";
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 166d0a4b9e8c..c369cfd185bc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -22,6 +22,7 @@
 #include "i915_utils.h"
 #include "i915_vgpu.h"
 #include "intel_mchbar_regs.h"
+#include "intel_pci_config.h"
 
 /*
  * The BIOS typically reserves some of the system's memory for the exclusive
@@ -830,7 +831,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, 
u16 type,
/* Use DSM base address instead for stolen memory */
dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE);
if (IS_DG1(uncore->i915)) {
-   lmem_size = pci_resource_len(pdev, 2);
+   lmem_size = pci_resource_len(pdev, GEN12_LMEM_BAR);
if (WARN_ON(lmem_size < dsm_base))
return ERR_PTR(-ENODEV);
} else {
@@ -842,11 +843,11 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, 
u16 type,
}
 
dsm_size = lmem_size - dsm_base;
-   if (pci_resource_len(pdev, 2) < lmem_size) {
+   if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) {
io_start = 0;
io_size = 0;
} else {
-   io_start = pci_resource_start(pdev, 2) + dsm_base;
+   io_start = pci_resource_start(pdev, GEN12_LMEM_BAR) + dsm_base;
io_size = dsm_size;
}
 
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c 
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 15a915bb4088..8214e07a0f5b 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -16,6 +16,7 @@
 #include "intel_ggtt_gmch.h"
 #include "intel_gt.h"
 #include "intel_gt_regs.h"
+#include "intel_pci_config.h"
 #include "i915_drv.h"
 #include "i915_scatterlist.h"
 #include "i915_utils.h"
@@ -869,8 +870,8 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 
size)
u32 pte_flags;
int ret;
 
-   GEM_WARN_ON(pci_resource_len(pdev, 0) != gen6_gttmmadr_size(i915));
-   phys_addr = pci_resource_start(pdev, 0) + gen6_gttadr_offset(i915);
+   GEM_WARN_ON(pci_resource_len(pdev, GTTMMADR_BAR) != 
gen6_gttmmadr_size(i915));
+   phys_addr = pci_resource_start(pdev, GTTMMADR_BAR) + 
gen6_gttadr_offset(i915);
 
/*
 * On BXT+/ICL+ writes larger than 64 bit to the GTT pagetable range
@@ -930,7 +931,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
u16 snb_gmch_ctl;
 
if (!HAS_LMEM(i915)) {
-   ggtt->gmadr = pci_resource(pdev, 2);
+   ggtt->gmadr = pci_resource(pdev, GTT_APERTURE_BAR);
ggtt->mappable_end = resource_size(>gmadr);
}
 
@@ -1084,7 +1085,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
unsigned int size;
u16 snb_gmch_ctl;
 
-   ggtt->gmadr = pci_resource(pdev, 2);
+   ggtt->gmadr = pci_resource(pdev, GTT_APERTURE_BAR);
ggtt->mappable_end = resource_size(>gmadr);
 
/*
diff 

[Intel-gfx] [PATCH 0/2] Sanitycheck PCI BARs

[Piorkowski, Piotr]

From: Piotr Piórkowski 

When initializing the i915, we want to be sure that the PCI
BARs have been properly initialized.
As part of this series, I have prepared two patches,
one that introduces BARs names to use in code instead of numbers,
and another that adds function to validate BARs before use.
This is an evolution of the concept I presented in the patch:
https://patchwork.freedesktop.org/patch/470184/?series=99094
The main difference between the original patch and what I have
prepared here is that previously I checked all BARs at the beginning
of i915 initialization, and now I only check BAR 0 at beginning.
This is due to the fact that I have noticed that it can happen that only
BAR 0 is available (I have observed this in the case of virtualization,
on some platforms).
Therefore, at the beginning, let's verify only BAR 0, and the others only
before the first use.

Signed-off-by: Piotr Piórkowski 
Cc: Jani Nikula 
Cc: Lucas De Marchi 
Cc: Matt Roper 

Piotr Piórkowski (2):
  drm/i915: Use of BARs names instead of numbers
  drm/i915: Sanitycheck PCI BARs

 .../gpu/drm/i915/display/intel_lpe_audio.c|  5 ++--
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 11 +---
 drivers/gpu/drm/i915/gt/intel_ggtt.c  | 16 +---
 drivers/gpu/drm/i915/gt/intel_gt.c|  3 ++-
 drivers/gpu/drm/i915/gt/intel_region_lmem.c   | 17 +++--
 drivers/gpu/drm/i915/gvt/cfg_space.c  |  4 +--
 drivers/gpu/drm/i915/i915_pci.c   | 25 +++
 drivers/gpu/drm/i915/i915_pci.h   |  4 +++
 drivers/gpu/drm/i915/intel_pci_config.h   |  7 ++
 9 files changed, 73 insertions(+), 19 deletions(-)

-- 
2.25.1

Re: [Intel-gfx] [PATCH] drm/i915: Pass drm_i915_private struct instead of gt for gen11_gu_misc_irq_handler/ack()

[Srivatsa, Anusha]

@Ursulin, Tvrtko Is this wat you had in mind?

Anusha

> -Original Message-
> From: Srivatsa, Anusha 
> Sent: Thursday, July 21, 2022 3:51 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Srivatsa, Anusha ; Ursulin, Tvrtko
> ; Roper, Matthew D
> 
> Subject: [PATCH] drm/i915: Pass drm_i915_private struct instead of gt for
> gen11_gu_misc_irq_handler/ack()
> 
> gen11_gu_misc_irq_handler() and gen11_gu_misc_ack() do nothing tile
> specific.
> 
> v2: gen11_gu_misc_irq_ack() tile agnostic like gen11_gu_misc_irq_handler()
> (Tvrtko)
> 
> Cc: Tvrtko Ursulin 
> Cc: Matt Roper 
> Signed-off-by: Anusha Srivatsa 
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 16 
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c index 73cebc6aa650..eb37b6bacaac
> 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2653,9 +2653,9 @@ static irqreturn_t gen8_irq_handler(int irq, void
> *arg)  }
> 
>  static u32
> -gen11_gu_misc_irq_ack(struct intel_gt *gt, const u32 master_ctl)
> +gen11_gu_misc_irq_ack(struct drm_i915_private *i915, const u32
> +master_ctl)
>  {
> - void __iomem * const regs = gt->uncore->regs;
> + void __iomem * const regs = i915->uncore.regs;
>   u32 iir;
> 
>   if (!(master_ctl & GEN11_GU_MISC_IRQ)) @@ -2669,10 +2669,10
> @@ gen11_gu_misc_irq_ack(struct intel_gt *gt, const u32 master_ctl)  }
> 
>  static void
> -gen11_gu_misc_irq_handler(struct intel_gt *gt, const u32 iir)
> +gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir)
>  {
>   if (iir & GEN11_GU_MISC_GSE)
> - intel_opregion_asle_intr(gt->i915);
> + intel_opregion_asle_intr(i915);
>  }
> 
>  static inline u32 gen11_master_intr_disable(void __iomem * const regs) @@
> -2736,11 +2736,11 @@ static irqreturn_t gen11_irq_handler(int irq, void
> *arg)
>   if (master_ctl & GEN11_DISPLAY_IRQ)
>   gen11_display_irq_handler(i915);
> 
> - gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
> + gu_misc_iir = gen11_gu_misc_irq_ack(i915, master_ctl);
> 
>   gen11_master_intr_enable(regs);
> 
> - gen11_gu_misc_irq_handler(gt, gu_misc_iir);
> + gen11_gu_misc_irq_handler(i915, gu_misc_iir);
> 
>   pmu_irq_stats(i915, IRQ_HANDLED);
> 
> @@ -2801,11 +2801,11 @@ static irqreturn_t dg1_irq_handler(int irq, void
> *arg)
>   if (master_ctl & GEN11_DISPLAY_IRQ)
>   gen11_display_irq_handler(i915);
> 
> - gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
> + gu_misc_iir = gen11_gu_misc_irq_ack(i915, master_ctl);
> 
>   dg1_master_intr_enable(regs);
> 
> - gen11_gu_misc_irq_handler(gt, gu_misc_iir);
> + gen11_gu_misc_irq_handler(i915, gu_misc_iir);
> 
>   pmu_irq_stats(i915, IRQ_HANDLED);
> 
> --
> 2.25.1

Re: [Intel-gfx] [PATCH] drm/i915/guc: Check for ct enabled while waiting for response

[Dixit, Ashutosh]

On Fri, 15 Jul 2022 14:13:13 -0700, Zhanjun Dong wrote:
>
> -static int wait_for_ct_request_update(struct ct_request *req, u32 *status)
> +static int wait_for_ct_request_update(struct intel_guc_ct *ct, struct 
> ct_request *req, u32 *status)
>  {
>   int err;
> + bool ct_enabled;
>
>   /*
>* Fast commands should complete in less than 10us, so sample quickly
> @@ -481,12 +483,15 @@ static int wait_for_ct_request_update(struct ct_request 
> *req, u32 *status)
>  #define GUC_CTB_RESPONSE_TIMEOUT_SHORT_MS 10
>  #define GUC_CTB_RESPONSE_TIMEOUT_LONG_MS 1000
>  #define done \
> - (FIELD_GET(GUC_HXG_MSG_0_ORIGIN, READ_ONCE(req->status)) == \
> + (!(ct_enabled = intel_guc_ct_enabled(ct)) || \
> +  FIELD_GET(GUC_HXG_MSG_0_ORIGIN, READ_ONCE(req->status)) == \
>GUC_HXG_ORIGIN_GUC)
>   err = wait_for_us(done, GUC_CTB_RESPONSE_TIMEOUT_SHORT_MS);
>   if (err)
>   err = wait_for(done, GUC_CTB_RESPONSE_TIMEOUT_LONG_MS);
>  #undef done
> + if (!ct_enabled)
> + err = -ENODEV;

Good, -ENODEV seems to be the correct return value in this case.

>
>   *status = req->status;
>   return err;
> @@ -703,11 +708,18 @@ static int ct_send(struct intel_guc_ct *ct,
>
>   intel_guc_notify(ct_to_guc(ct));
>
> - err = wait_for_ct_request_update(, status);
> + err = wait_for_ct_request_update(ct, , status);
>   g2h_release_space(ct, GUC_CTB_HXG_MSG_MAX_LEN);
>   if (unlikely(err)) {
> - CT_ERROR(ct, "No response for request %#x (fence %u)\n",
> -  action[0], request.fence);
> + if (err == -ENODEV)
> + /* wait_for_ct_request_update returns -ENODEV on 
> reset/suspend in progress.
> +  * In this case, output is debug rather than error info
> +  */
> + CT_DEBUG(ct, "Request %#x (fence %u) cancelled as CTB 
> is disabled\n",
> +  action[0], request.fence);
> + else
> + CT_ERROR(ct, "No response for request %#x (fence %u)\n",
> +  action[0], request.fence);

A nit but I would probably prefer to move the CT_DEBUG() inside
wait_for_ct_request_update() (so we only keep 'if (err != -ENODEV)' checks
here) though it would mean adding the action argument also to
wait_for_ct_request_update().

In any case, since we have discussed this patch ad nauseam previously, this
is now:

Reviewed-by: Ashutosh Dixit 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: stop using swiotlb (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: stop using swiotlb (rev4)
URL   : https://patchwork.freedesktop.org/series/106589/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11935_full -> Patchwork_106589v4_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106589v4_full:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-75:
- {shard-rkl}:NOTRUN -> [SKIP][1] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-rkl-5/igt@kms_plane_scal...@plane-downscale-with-modifiers-factor-0-75.html

  
New tests
-

  New tests have been introduced between CI_DRM_11935_full and 
Patchwork_106589v4_full:

### New IGT tests (3) ###

  * 
igt@kms_atomic_transition@plane-use-after-nonblocking-unbind@hdmi-a-4-pipe-a:
- Statuses : 1 pass(s)
- Exec time: [0.09] s

  * 
igt@kms_atomic_transition@plane-use-after-nonblocking-unbind@hdmi-a-4-pipe-b:
- Statuses : 1 pass(s)
- Exec time: [0.14] s

  * igt@kms_flip@plain-flip-interruptible@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [0.59, 0.66] s

  

Known issues


  Here are the changes found in Patchwork_106589v4_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@display-4x:
- shard-tglb: NOTRUN -> [SKIP][2] ([i915#1839])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-tglb7/igt@feature_discov...@display-4x.html

  * igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][3] -> [TIMEOUT][4] ([i915#3070])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb3/igt@gem_...@unwedge-stress.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-iclb3/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][5] ([i915#2842])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-iclb4/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-kbl:  [PASS][6] -> [FAIL][7] ([i915#2842]) +1 similar issue
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-kbl7/igt@gem_exec_fair@basic-pace-s...@rcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-kbl4/igt@gem_exec_fair@basic-pace-s...@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk:  [PASS][8] -> [FAIL][9] ([i915#2842])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-glk8/igt@gem_exec_fair@basic-p...@rcs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-glk5/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl:  [PASS][10] -> [SKIP][11] ([fdo#109271])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-kbl6/igt@gem_exec_fair@basic-p...@vecs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-tglb: NOTRUN -> [SKIP][12] ([fdo#109313])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-tglb7/igt@gem_exec_fl...@basic-batch-kernel-default-cmd.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-skl:  NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-skl6/igt@gem_lmem_swapp...@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@verify-random:
- shard-tglb: NOTRUN -> [SKIP][14] ([i915#4613])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-tglb7/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-tglb: NOTRUN -> [SKIP][15] ([i915#4270])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-tglb7/igt@gem_...@verify-pxp-key-change-after-suspend-resume.html

  * igt@gem_userptr_blits@coherency-unsync:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#3297])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-tglb7/igt@gem_userptr_bl...@coherency-unsync.html

  * igt@gen7_exec_parse@basic-allocation:
- shard-tglb: NOTRUN -> [SKIP][17] ([fdo#109289])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/shard-tglb7/igt@gen7_exec_pa...@basic-allocation.html

  * 

Re: [Intel-gfx] [PATCH] drm/i915/display: Cleanup intel_phy_is_combo()

[Srivatsa, Anusha]

> -Original Message-
> From: Roper, Matthew D 
> Sent: Thursday, July 21, 2022 1:50 PM
> To: Srivatsa, Anusha 
> Cc: intel-gfx@lists.freedesktop.org; Murthy, Arun R
> 
> Subject: Re: [PATCH] drm/i915/display: Cleanup intel_phy_is_combo()
> 
> On Thu, Jul 21, 2022 at 01:17:54PM -0700, Anusha Srivatsa wrote:
> > No functional change. Cleanup the intel_phy_is_combo
> 
> But there actually is a functional change here --- display version 14 will now
> (properly) fall through to the 'else' branch instead of being picked up by the
> 11/12/adl branch.  I believe that was your original motivation for this patch,
> so you may want to mention that in the commit message (and drop the "no
> functional change" statement).
> 
> The code change itself looks fine to me since it seems like the traditional
> combo PHYs may be a thing of the past and we don't want to keep assuming
> future platforms will have any.
> 
With the change in commit message can I add your reviewed-by laong with Arun's?

Anusha
> Matt
> 
> > to accommodate for cases where combo phy is not available.
> >
> > v2: retain comment that explains DG2 returning false from
> > intel_phy_is_combo() (Arun)
> >
> > Cc: Arun R Murthy 
> > Cc: Matt Roper 
> > Signed-off-by: Anusha Srivatsa 
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 14 ++
> >  1 file changed, 6 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index a0f84cbe974f..b9d0be7753a8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -2082,22 +2082,20 @@ bool intel_phy_is_combo(struct
> > drm_i915_private *dev_priv, enum phy phy)  {
> > if (phy == PHY_NONE)
> > return false;
> > -   else if (IS_DG2(dev_priv))
> > -   /*
> > -* DG2 outputs labelled as "combo PHY" in the bspec use
> > -* SNPS PHYs with completely different programming,
> > -* hence we always return false here.
> > -*/
> > -   return false;
> > else if (IS_ALDERLAKE_S(dev_priv))
> > return phy <= PHY_E;
> > else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
> > return phy <= PHY_D;
> > else if (IS_JSL_EHL(dev_priv))
> > return phy <= PHY_C;
> > -   else if (DISPLAY_VER(dev_priv) >= 11)
> > +   else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11,
> > +12))
> > return phy <= PHY_B;
> > else
> > +   /*
> > +* DG2 outputs labelled as "combo PHY" in the bspec use
> > +* SNPS PHYs with completely different programming,
> > +* hence we always return false here.
> > +*/
> > return false;
> >  }
> >
> > --
> > 2.25.1
> >
> 
> --
> Matt Roper
> Graphics Software Engineer
> VTT-OSGC Platform Enablement
> Intel Corporation

Re: [Intel-gfx] [CI v4 12/13] drm/i915/ttm: disallow CPU fallback mode for ccs pages

[Tvrtko Ursulin]

On 25/07/2022 16:09, Matthew Auld wrote:

Hi,

On 25/07/2022 15:55, Tvrtko Ursulin wrote:


Hi Matt,

On 29/06/2022 18:43, Matthew Auld wrote:

Falling back to memcpy/memset shouldn't be allowed if we know we have
CCS state to manage using the blitter. Otherwise we are potentially
leaving the aux CCS state in an unknown state, which smells like an info
leak.

Fixes: 48760ffe923a ("drm/i915/gt: Clear compress metadata for 
Flat-ccs objects")


This is marking the patch for 5.19-rc, but it not apply since the code 
seems a bit different. There is no i915_ttm_memcpy_allowed to start 
with, which only comes in bfe53be268af ("drm/i915/ttm: handle blitter 
failure on DG2"), which is for 5.20.


Do you think a version of this patch for 5.19 is needed and if so 
could you, or someone in the know, cook one up today or tomorrow at 
the latest?


It needs almost everything in bfe53be268af to close all the holes, 
AFAIK. But then again this is only for DG2, which is still hidden behind 
the force_probe stuff (I think), so perhaps not strictly needed for 
5.19? What do you think?


It is under force probe. Good point - I agree we then do not have to be 
concerned by it. Thanks!


Regards,

Tvrtko





Regards,

Tvrtko


Signed-off-by: Matthew Auld 
Cc: Thomas Hellström 
Cc: Lionel Landwerlin 
Cc: Tvrtko Ursulin 
Cc: Jon Bloomfield 
Cc: Daniel Vetter 
Cc: Jordan Justen 
Cc: Kenneth Graunke 
Cc: Akeem G Abodunrin 
Cc: Ramalingam C 
---
  drivers/gpu/drm/i915/gem/i915_gem_object.c   | 26 
  drivers/gpu/drm/i915/gem/i915_gem_object.h   |  2 ++
  drivers/gpu/drm/i915/gem/i915_gem_ttm.c  | 18 --
  drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c |  3 +++
  4 files changed, 31 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c

index 642a5d59ce26..ccec4055fde3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -717,6 +717,32 @@ bool i915_gem_object_placement_possible(struct 
drm_i915_gem_object *obj,

  return false;
  }
+/**
+ * i915_gem_object_needs_ccs_pages - Check whether the object 
requires extra
+ * pages when placed in system-memory, in order to save and later 
restore the

+ * flat-CCS aux state when the object is moved between local-memory and
+ * system-memory
+ * @obj: Pointer to the object
+ *
+ * Return: True if the object needs extra ccs pages. False otherwise.
+ */
+bool i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj)
+{
+    bool lmem_placement = false;
+    int i;
+
+    for (i = 0; i < obj->mm.n_placements; i++) {
+    /* Compression is not allowed for the objects with smem 
placement */

+    if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM)
+    return false;
+    if (!lmem_placement &&
+    obj->mm.placements[i]->type == INTEL_MEMORY_LOCAL)
+    lmem_placement = true;
+    }
+
+    return lmem_placement;
+}
+
  void i915_gem_init__objects(struct drm_i915_private *i915)
  {
  INIT_DELAYED_WORK(>mm.free_work, __i915_gem_free_work);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h

index 0bf3ee27a2a8..6f0a3ce35567 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -618,6 +618,8 @@ int i915_gem_object_wait_migration(struct 
drm_i915_gem_object *obj,
  bool i915_gem_object_placement_possible(struct drm_i915_gem_object 
*obj,

  enum intel_memory_type type);
+bool i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj);
+
  int shmem_sg_alloc_table(struct drm_i915_private *i915, struct 
sg_table *st,

   size_t size, struct intel_memory_region *mr,
   struct address_space *mapping,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c

index 098409a33e10..7e1f8b83077f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -266,24 +266,6 @@ static const struct i915_refct_sgt_ops 
tt_rsgt_ops = {

  .release = i915_ttm_tt_release
  };
-static inline bool
-i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj)
-{
-    bool lmem_placement = false;
-    int i;
-
-    for (i = 0; i < obj->mm.n_placements; i++) {
-    /* Compression is not allowed for the objects with smem 
placement */

-    if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM)
-    return false;
-    if (!lmem_placement &&
-    obj->mm.placements[i]->type == INTEL_MEMORY_LOCAL)
-    lmem_placement = true;
-    }
-
-    return lmem_placement;
-}
-
  static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo,
   uint32_t page_flags)
  {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

index df14ac81c128..9a7e50534b84 100644

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: stop using swiotlb (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: stop using swiotlb (rev4)
URL   : https://patchwork.freedesktop.org/series/106589/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11935 -> Patchwork_106589v4


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/index.html

Participating hosts (36 -> 31)
--

  Additional (3): bat-dg2-9 bat-adlp-4 bat-dg1-5 
  Missing(8): fi-bxt-dsi fi-hsw-4200u fi-bsw-n3050 fi-ctg-p8600 
fi-glk-j4005 fi-kbl-x1275 fi-bsw-kefka fi-bdw-samus 

Known issues


  Here are the changes found in Patchwork_106589v4 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@fbdev@read:
- bat-dg1-5:  NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@fb...@read.html

  * igt@gem_lmem_swapping@verify-random:
- bat-adlp-4: NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-adlp-4/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][3] ([i915#4083])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][4] ([i915#4077]) +2 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][5] ([i915#4079]) +1 similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-4: NOTRUN -> [SKIP][6] ([i915#3282])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-adlp-4/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- bat-dg1-5:  NOTRUN -> [SKIP][7] ([i915#1155])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  NOTRUN -> [DMESG-FAIL][8] ([i915#4494] / [i915#4957])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-blb-e6850:   [PASS][9] -> [DMESG-FAIL][10] ([i915#4528])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-blb-e6850/igt@i915_selftest@l...@requests.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/fi-blb-e6850/igt@i915_selftest@l...@requests.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5:  NOTRUN -> [INCOMPLETE][11] ([i915#6011])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-adlp-4: NOTRUN -> [SKIP][12] ([i915#5903])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-adlp-4/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#4212]) +7 similar issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][14] ([i915#4215])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_busy@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][15] ([i915#1845] / [i915#4303])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@kms_b...@basic.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][16] ([fdo#109271] / [fdo#111827])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@dp-crc-fast:
- bat-adlp-4: NOTRUN -> [SKIP][17] ([fdo#111827]) +8 similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-adlp-4/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- bat-dg1-5:  NOTRUN -> [SKIP][18] ([fdo#111827]) +7 similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v4/bat-dg1-5/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- bat-adlp-4: NOTRUN -> [SKIP][19] ([i915#4103])
   [19]: 

Re: [Intel-gfx] [CI v4 12/13] drm/i915/ttm: disallow CPU fallback mode for ccs pages

[Matthew Auld]

Hi,

On 25/07/2022 15:55, Tvrtko Ursulin wrote:


Hi Matt,

On 29/06/2022 18:43, Matthew Auld wrote:

Falling back to memcpy/memset shouldn't be allowed if we know we have
CCS state to manage using the blitter. Otherwise we are potentially
leaving the aux CCS state in an unknown state, which smells like an info
leak.

Fixes: 48760ffe923a ("drm/i915/gt: Clear compress metadata for 
Flat-ccs objects")


This is marking the patch for 5.19-rc, but it not apply since the code 
seems a bit different. There is no i915_ttm_memcpy_allowed to start 
with, which only comes in bfe53be268af ("drm/i915/ttm: handle blitter 
failure on DG2"), which is for 5.20.


Do you think a version of this patch for 5.19 is needed and if so could 
you, or someone in the know, cook one up today or tomorrow at the latest?


It needs almost everything in bfe53be268af to close all the holes, 
AFAIK. But then again this is only for DG2, which is still hidden behind 
the force_probe stuff (I think), so perhaps not strictly needed for 
5.19? What do you think?




Regards,

Tvrtko


Signed-off-by: Matthew Auld 
Cc: Thomas Hellström 
Cc: Lionel Landwerlin 
Cc: Tvrtko Ursulin 
Cc: Jon Bloomfield 
Cc: Daniel Vetter 
Cc: Jordan Justen 
Cc: Kenneth Graunke 
Cc: Akeem G Abodunrin 
Cc: Ramalingam C 
---
  drivers/gpu/drm/i915/gem/i915_gem_object.c   | 26 
  drivers/gpu/drm/i915/gem/i915_gem_object.h   |  2 ++
  drivers/gpu/drm/i915/gem/i915_gem_ttm.c  | 18 --
  drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c |  3 +++
  4 files changed, 31 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c

index 642a5d59ce26..ccec4055fde3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -717,6 +717,32 @@ bool i915_gem_object_placement_possible(struct 
drm_i915_gem_object *obj,

  return false;
  }
+/**
+ * i915_gem_object_needs_ccs_pages - Check whether the object 
requires extra
+ * pages when placed in system-memory, in order to save and later 
restore the

+ * flat-CCS aux state when the object is moved between local-memory and
+ * system-memory
+ * @obj: Pointer to the object
+ *
+ * Return: True if the object needs extra ccs pages. False otherwise.
+ */
+bool i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj)
+{
+    bool lmem_placement = false;
+    int i;
+
+    for (i = 0; i < obj->mm.n_placements; i++) {
+    /* Compression is not allowed for the objects with smem 
placement */

+    if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM)
+    return false;
+    if (!lmem_placement &&
+    obj->mm.placements[i]->type == INTEL_MEMORY_LOCAL)
+    lmem_placement = true;
+    }
+
+    return lmem_placement;
+}
+
  void i915_gem_init__objects(struct drm_i915_private *i915)
  {
  INIT_DELAYED_WORK(>mm.free_work, __i915_gem_free_work);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h

index 0bf3ee27a2a8..6f0a3ce35567 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -618,6 +618,8 @@ int i915_gem_object_wait_migration(struct 
drm_i915_gem_object *obj,
  bool i915_gem_object_placement_possible(struct drm_i915_gem_object 
*obj,

  enum intel_memory_type type);
+bool i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj);
+
  int shmem_sg_alloc_table(struct drm_i915_private *i915, struct 
sg_table *st,

   size_t size, struct intel_memory_region *mr,
   struct address_space *mapping,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c

index 098409a33e10..7e1f8b83077f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -266,24 +266,6 @@ static const struct i915_refct_sgt_ops 
tt_rsgt_ops = {

  .release = i915_ttm_tt_release
  };
-static inline bool
-i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj)
-{
-    bool lmem_placement = false;
-    int i;
-
-    for (i = 0; i < obj->mm.n_placements; i++) {
-    /* Compression is not allowed for the objects with smem 
placement */

-    if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM)
-    return false;
-    if (!lmem_placement &&
-    obj->mm.placements[i]->type == INTEL_MEMORY_LOCAL)
-    lmem_placement = true;
-    }
-
-    return lmem_placement;
-}
-
  static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo,
   uint32_t page_flags)
  {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c

index df14ac81c128..9a7e50534b84 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
@@ -435,6 +435,9 @@ i915_ttm_memcpy_work_arm(struct 

Re: [Intel-gfx] [CI v4 12/13] drm/i915/ttm: disallow CPU fallback mode for ccs pages

[Tvrtko Ursulin]

Hi Matt,

On 29/06/2022 18:43, Matthew Auld wrote:

Falling back to memcpy/memset shouldn't be allowed if we know we have
CCS state to manage using the blitter. Otherwise we are potentially
leaving the aux CCS state in an unknown state, which smells like an info
leak.

Fixes: 48760ffe923a ("drm/i915/gt: Clear compress metadata for Flat-ccs 
objects")


This is marking the patch for 5.19-rc, but it not apply since the code 
seems a bit different. There is no i915_ttm_memcpy_allowed to start 
with, which only comes in bfe53be268af ("drm/i915/ttm: handle blitter 
failure on DG2"), which is for 5.20.


Do you think a version of this patch for 5.19 is needed and if so could 
you, or someone in the know, cook one up today or tomorrow at the latest?


Regards,

Tvrtko


Signed-off-by: Matthew Auld 
Cc: Thomas Hellström 
Cc: Lionel Landwerlin 
Cc: Tvrtko Ursulin 
Cc: Jon Bloomfield 
Cc: Daniel Vetter 
Cc: Jordan Justen 
Cc: Kenneth Graunke 
Cc: Akeem G Abodunrin 
Cc: Ramalingam C 
---
  drivers/gpu/drm/i915/gem/i915_gem_object.c   | 26 
  drivers/gpu/drm/i915/gem/i915_gem_object.h   |  2 ++
  drivers/gpu/drm/i915/gem/i915_gem_ttm.c  | 18 --
  drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c |  3 +++
  4 files changed, 31 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 642a5d59ce26..ccec4055fde3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -717,6 +717,32 @@ bool i915_gem_object_placement_possible(struct 
drm_i915_gem_object *obj,
return false;
  }
  
+/**

+ * i915_gem_object_needs_ccs_pages - Check whether the object requires extra
+ * pages when placed in system-memory, in order to save and later restore the
+ * flat-CCS aux state when the object is moved between local-memory and
+ * system-memory
+ * @obj: Pointer to the object
+ *
+ * Return: True if the object needs extra ccs pages. False otherwise.
+ */
+bool i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj)
+{
+   bool lmem_placement = false;
+   int i;
+
+   for (i = 0; i < obj->mm.n_placements; i++) {
+   /* Compression is not allowed for the objects with smem 
placement */
+   if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM)
+   return false;
+   if (!lmem_placement &&
+   obj->mm.placements[i]->type == INTEL_MEMORY_LOCAL)
+   lmem_placement = true;
+   }
+
+   return lmem_placement;
+}
+
  void i915_gem_init__objects(struct drm_i915_private *i915)
  {
INIT_DELAYED_WORK(>mm.free_work, __i915_gem_free_work);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 0bf3ee27a2a8..6f0a3ce35567 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -618,6 +618,8 @@ int i915_gem_object_wait_migration(struct 
drm_i915_gem_object *obj,
  bool i915_gem_object_placement_possible(struct drm_i915_gem_object *obj,
enum intel_memory_type type);
  
+bool i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj);

+
  int shmem_sg_alloc_table(struct drm_i915_private *i915, struct sg_table *st,
 size_t size, struct intel_memory_region *mr,
 struct address_space *mapping,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 098409a33e10..7e1f8b83077f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -266,24 +266,6 @@ static const struct i915_refct_sgt_ops tt_rsgt_ops = {
.release = i915_ttm_tt_release
  };
  
-static inline bool

-i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj)
-{
-   bool lmem_placement = false;
-   int i;
-
-   for (i = 0; i < obj->mm.n_placements; i++) {
-   /* Compression is not allowed for the objects with smem 
placement */
-   if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM)
-   return false;
-   if (!lmem_placement &&
-   obj->mm.placements[i]->type == INTEL_MEMORY_LOCAL)
-   lmem_placement = true;
-   }
-
-   return lmem_placement;
-}
-
  static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo,
 uint32_t page_flags)
  {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
index df14ac81c128..9a7e50534b84 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
@@ -435,6 +435,9 @@ i915_ttm_memcpy_work_arm(struct i915_ttm_memcpy_work *work,
  static bool i915_ttm_memcpy_allowed(struct ttm_buffer_object *bo,
 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: stop using swiotlb (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: stop using swiotlb (rev4)
URL   : https://patchwork.freedesktop.org/series/106589/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: stop using swiotlb (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: stop using swiotlb (rev4)
URL   : https://patchwork.freedesktop.org/series/106589/
State : warning

== Summary ==

Error: dim checkpatch failed
e8b51ebb32db drm/i915: stop using swiotlb
-:147: WARNING:LINE_SPACING: Missing a blank line after declarations
#147: FILE: drivers/gpu/drm/i915/i915_scatterlist.h:133:
+   size_t max = min_t(size_t, UINT_MAX, dma_max_mapping_size(dev));
+   return round_down(max, PAGE_SIZE);

total: 0 errors, 1 warnings, 0 checks, 95 lines checked

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop using swiotlb (rev3)

[Tvrtko Ursulin]

On 25/07/2022 15:13, Robert Beckett wrote:

On 25/07/2022 09:23, Tvrtko Ursulin wrote:


On 22/07/2022 20:21, Robert Beckett wrote:

On 22/07/2022 19:05, Patchwork wrote:

*Patch Details*
*Series:*    drm/i915: stop using swiotlb (rev3)
*URL:*    https://patchwork.freedesktop.org/series/106589/ 


*State:*    failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v3/index.html 
 




  CI Bug Log - changes from CI_DRM_11935_full -> 
Patchwork_106589v3_full



    Summary

*FAILURE*

Serious unknown changes coming with Patchwork_106589v3_full 
absolutely need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_106589v3_full, please notify your bug team 
to allow them
to document this new failure mode, which will reduce false positives 
in CI.



    Participating hosts (10 -> 12)

Additional (2): shard-rkl shard-tglu


    Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_106589v3_full:



  IGT changes


    Possible regressions

  *

    igt@gem_mmap_offset@clear:

  o

    shard-tglb: PASS
 


    -> INCOMPLETE
 





I've no idea why CI is seeing a NULL deref here.
Testing locally on my TGL board, it passes fine.
I think I would need some help testing this on other systems to track 
this down.


Is it possible that dma_direct_max_mapping_size can return a whole 
range of "unexpected" values akin to swiotlb_max_segment? Anything 
below PAGE_SIZE, including zero, would confuse the driver.


oh really? scatterlist happily supports non page aligned segments. If 
this is an i915 restriction, it sounds like there could do with being 
some GEM_BUG_ON somewhere to catch this more obviously.


Well zero or one as values returned from swiotlb_max_segment did not 
really make much sense. Hence special handling was put in 
i915_sg_segment_size to correctly interpret them.


So yes a GEM_BUG_ON to ensure value returned from dma_max_mapping_size() 
is at least PAGE_SIZE would be safest. Unless it manages to trigger, in 
which special handling needs to be put back in.


Alternatively we'd need to try to figure out possible return values from 
dma_max_mapping_size(). There doesn't seem to be kernel doc for it 
currently.



Oh..

   return min_t(size_t, UINT_MAX, dma_max_mapping_size(dev)); >
Wrap the min_t value in rounddown(..., PAGE_SIZE).


I'll issue a v5


Or you meant if this one was a i915 limitation? I don't really remember 
and did not do a deep dive to remind myself. Just finger in the air "if 
it is a null sg entry, why would the iterator ever encounter it". So I 
was thinking some sort of a mismatch between found and expected number 
of entries, and hence suspected the lack of rounddown after the 
conversion as the other remaining difference. But as said, did not 
really think it through and checked what in the code would go wrong if 
it wasn't page aligned.


Regards,

Tvrtko



Regards,

Tvrtko




  o

    shard-iclb: PASS
 


    -> INCOMPLETE
 




    Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *

    igt@gem_mmap_offset@clear:

  o

    {shard-rkl}: NOTRUN -> INCOMPLETE
 



  o

    {shard-tglu}: NOTRUN -> INCOMPLETE
 


    +1 similar issue


    New tests

New tests have been introduced between CI_DRM_11935_full and 
Patchwork_106589v3_full:



  New IGT tests (27)

  *

    igt@kms_flip@basic-flip-vs-dpms@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.66] s
  *

    igt@kms_flip@basic-flip-vs-modeset@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.62] s
  *

    igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.59] s
  *

    igt@kms_flip@blocking-absolute-wf_vblank@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.62] s
  *

    igt@kms_flip@bo-too-big-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.39] s
  *

    igt@kms_flip@bo-too-big@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.41] s
  *

    igt@kms_flip@busy-flip@d-hdmi-a1:

  o 

[Intel-gfx] [PATCH v4] drm/i915: stop using swiotlb

[Robert Beckett]

Calling swiotlb functions directly is nowadays considered harmful. See
https://lore.kernel.org/intel-gfx/20220711082614.ga29...@lst.de/

Replace swiotlb_max_segment() calls with dma_max_mapping_size().
In i915_gem_object_get_pages_internal() no longer consider max_segment
only if CONFIG_SWIOTLB is enabled. There can be other (iommu related)
causes of specific max segment sizes.

Cc: Christoph Hellwig 
Cc: Tvrtko Ursulin 
Cc: Thomas Hellstrom 
Cc: Matthew Auld 

v2: - restore UINT_MAX clamp in i915_sg_segment_size()
- drop PAGE_SIZE check as it will always be >= PAGE_SIZE
v3: - actually clamp to UINT_MAX in i915_sg_segment_size()
v4: - round down max segment size to PAGE_SIZE

Reviewed-by: Christoph Hellwig 
Reviewed-by: Tvrtko Ursulin 
Signed-off-by: Robert Beckett 
---
 drivers/gpu/drm/i915/gem/i915_gem_internal.c | 19 ---
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c|  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c  |  4 ++--
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c  |  2 +-
 drivers/gpu/drm/i915/i915_scatterlist.h  | 17 -
 5 files changed, 12 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c 
b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
index c698f95af15f..24f37658f1bb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
@@ -6,7 +6,6 @@
 
 #include 
 #include 
-#include 
 
 #include "i915_drv.h"
 #include "i915_gem.h"
@@ -38,22 +37,12 @@ static int i915_gem_object_get_pages_internal(struct 
drm_i915_gem_object *obj)
struct scatterlist *sg;
unsigned int sg_page_sizes;
unsigned int npages;
-   int max_order;
+   int max_order = MAX_ORDER;
+   unsigned int max_segment;
gfp_t gfp;
 
-   max_order = MAX_ORDER;
-#ifdef CONFIG_SWIOTLB
-   if (is_swiotlb_active(obj->base.dev->dev)) {
-   unsigned int max_segment;
-
-   max_segment = swiotlb_max_segment();
-   if (max_segment) {
-   max_segment = max_t(unsigned int, max_segment,
-   PAGE_SIZE) >> PAGE_SHIFT;
-   max_order = min(max_order, ilog2(max_segment));
-   }
-   }
-#endif
+   max_segment = i915_sg_segment_size(i915->drm.dev) >> PAGE_SHIFT;
+   max_order = min(max_order, ilog2(max_segment));
 
gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
if (IS_I965GM(i915) || IS_I965G(i915)) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 4eed3dd90ba8..34b9c76cd8e6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -194,7 +194,7 @@ static int shmem_get_pages(struct drm_i915_gem_object *obj)
struct intel_memory_region *mem = obj->mm.region;
struct address_space *mapping = obj->base.filp->f_mapping;
const unsigned long page_count = obj->base.size / PAGE_SIZE;
-   unsigned int max_segment = i915_sg_segment_size();
+   unsigned int max_segment = i915_sg_segment_size(i915->drm.dev);
struct sg_table *st;
struct sgt_iter sgt_iter;
struct page *page;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 5a5cf332d8a5..7a828c9c0f6d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -189,7 +189,7 @@ static int i915_ttm_tt_shmem_populate(struct ttm_device 
*bdev,
struct drm_i915_private *i915 = container_of(bdev, typeof(*i915), bdev);
struct intel_memory_region *mr = i915->mm.regions[INTEL_MEMORY_SYSTEM];
struct i915_ttm_tt *i915_tt = container_of(ttm, typeof(*i915_tt), ttm);
-   const unsigned int max_segment = i915_sg_segment_size();
+   const unsigned int max_segment = i915_sg_segment_size(i915->drm.dev);
const size_t size = (size_t)ttm->num_pages << PAGE_SHIFT;
struct file *filp = i915_tt->filp;
struct sgt_iter sgt_iter;
@@ -568,7 +568,7 @@ static struct i915_refct_sgt *i915_ttm_tt_get_st(struct 
ttm_tt *ttm)
ret = sg_alloc_table_from_pages_segment(st,
ttm->pages, ttm->num_pages,
0, (unsigned long)ttm->num_pages << PAGE_SHIFT,
-   i915_sg_segment_size(), GFP_KERNEL);
+   i915_sg_segment_size(i915_tt->dev), GFP_KERNEL);
if (ret) {
st->sgl = NULL;
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c 
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 094f06b4ce33..dfc35905dba2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -129,7 +129,7 @@ static void i915_gem_object_userptr_drop_ref(struct 
drm_i915_gem_object *obj)
 static int i915_gem_userptr_get_pages(struct drm_i915_gem_object 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop using swiotlb (rev3)

[Robert Beckett]

On 25/07/2022 09:23, Tvrtko Ursulin wrote:


On 22/07/2022 20:21, Robert Beckett wrote:

On 22/07/2022 19:05, Patchwork wrote:

*Patch Details*
*Series:*    drm/i915: stop using swiotlb (rev3)
*URL:*    https://patchwork.freedesktop.org/series/106589/ 


*State:*    failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v3/index.html  




  CI Bug Log - changes from CI_DRM_11935_full -> Patchwork_106589v3_full


    Summary

*FAILURE*

Serious unknown changes coming with Patchwork_106589v3_full 
absolutely need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_106589v3_full, please notify your bug team to 
allow them
to document this new failure mode, which will reduce false positives 
in CI.



    Participating hosts (10 -> 12)

Additional (2): shard-rkl shard-tglu


    Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_106589v3_full:



  IGT changes


    Possible regressions

  *

    igt@gem_mmap_offset@clear:

  o

    shard-tglb: PASS
 


    -> INCOMPLETE
 





I've no idea why CI is seeing a NULL deref here.
Testing locally on my TGL board, it passes fine.
I think I would need some help testing this on other systems to track 
this down.


Is it possible that dma_direct_max_mapping_size can return a whole range 
of "unexpected" values akin to swiotlb_max_segment? Anything below 
PAGE_SIZE, including zero, would confuse the driver.


oh really? scatterlist happily supports non page aligned segments. If 
this is an i915 restriction, it sounds like there could do with being 
some GEM_BUG_ON somewhere to catch this more obviously.




Oh..

   return min_t(size_t, UINT_MAX, dma_max_mapping_size(dev)); >
Wrap the min_t value in rounddown(..., PAGE_SIZE).


I'll issue a v5



Regards,

Tvrtko




  o

    shard-iclb: PASS
 


    -> INCOMPLETE
 




    Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *

    igt@gem_mmap_offset@clear:

  o

    {shard-rkl}: NOTRUN -> INCOMPLETE
 



  o

    {shard-tglu}: NOTRUN -> INCOMPLETE
 


    +1 similar issue


    New tests

New tests have been introduced between CI_DRM_11935_full and 
Patchwork_106589v3_full:



  New IGT tests (27)

  *

    igt@kms_flip@basic-flip-vs-dpms@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.66] s
  *

    igt@kms_flip@basic-flip-vs-modeset@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.62] s
  *

    igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.59] s
  *

    igt@kms_flip@blocking-absolute-wf_vblank@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.62] s
  *

    igt@kms_flip@bo-too-big-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.39] s
  *

    igt@kms_flip@bo-too-big@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.41] s
  *

    igt@kms_flip@busy-flip@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.62] s
  *

    igt@kms_flip@dpms-off-confusion-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.60] s
  *

    igt@kms_flip@dpms-vs-vblank-race-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [2.72] s
  *

    igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [8.03] s
  *

    igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.60] s
  *

    igt@kms_flip@flip-vs-dpms-off-vs-modeset@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.57] s
  *

    igt@kms_flip@flip-vs-fences-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.62] s
  *

    igt@kms_flip@flip-vs-fences@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.66] s
  *

    igt@kms_flip@flip-vs-modeset-vs-hang@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [30.02] s
  *

    igt@kms_flip@flip-vs-panning-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
 

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/6] drm/ttm: Add new callbacks to ttm res mgr

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/6] drm/ttm: Add new callbacks to ttm res mgr
URL   : https://patchwork.freedesktop.org/series/106662/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11935 -> Patchwork_106662v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_106662v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_106662v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106662v1/index.html

Participating hosts (36 -> 32)
--

  Missing(4): fi-ctg-p8600 fi-kbl-x1275 fi-bdw-samus fi-hsw-4200u 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106662v1:

### CI changes ###

 Possible regressions 

  * boot:
- fi-ilk-650: [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-ilk-650/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106662v1/fi-ilk-650/boot.html

  
Known issues


  Here are the changes found in Patchwork_106662v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@requests:
- fi-blb-e6850:   [PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-blb-e6850/igt@i915_selftest@l...@requests.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106662v1/fi-blb-e6850/igt@i915_selftest@l...@requests.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106662v1/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [PASS][6] -> [DMESG-WARN][7] ([i915#62]) +13 similar 
issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106662v1/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  
 Possible fixes 

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][8] ([i915#146]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106662v1/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62


Build changes
-

  * Linux: CI_DRM_11935 -> Patchwork_106662v1

  CI-20190529: 20190529
  CI_DRM_11935: 2df3752997eeeba0843b7b1b9a27204a4e831355 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6594: 326629f105459f9bd201456a0454759628e6a43d @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_106662v1: 2df3752997eeeba0843b7b1b9a27204a4e831355 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

e83b838a8ff4 drm/ttm: Switch to using the new res callback
d8f950ba36e2 drm/nouveau: Implement intersect/compatible functions
6b2308e15f16 drm/i915: Implement intersect/compatible functions
1e1ab96676d7 drm/amdgpu: Implement intersect/compatible functions
4eebcc30a802 drm/ttm: Implement intersect/compatible functions
4c8ced2b165a drm/ttm: Add new callbacks to ttm res mgr

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106662v1/index.html

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/6] drm/ttm: Add new callbacks to ttm res mgr

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/6] drm/ttm: Add new callbacks to ttm res mgr
URL   : https://patchwork.freedesktop.org/series/106662/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.IGT: failure for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev10)

[Patchwork]

== Series Details ==

Series: Fixes integer overflow or integer truncation issues in page lookups, 
ttm place configuration and scatterlist creation (rev10)
URL   : https://patchwork.freedesktop.org/series/104704/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11935_full -> Patchwork_104704v10_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_104704v10_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_104704v10_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_104704v10_full:

### IGT changes ###

 Possible regressions 

  * igt@i915_pm_rpm@pm-caching:
- shard-iclb: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb7/igt@i915_pm_...@pm-caching.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-iclb4/igt@i915_pm_...@pm-caching.html

  
New tests
-

  New tests have been introduced between CI_DRM_11935_full and 
Patchwork_104704v10_full:

### New IGT tests (11) ###

  * igt@kms_flip@basic-flip-vs-modeset@d-hdmi-a1:
- Statuses : 1 pass(s)
- Exec time: [0.60] s

  * igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [7.59, 7.80] s

  * igt@kms_flip@blocking-absolute-wf_vblank@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [7.62, 7.82] s

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [7.72, 8.09] s

  * igt@kms_flip@flip-vs-modeset-vs-hang@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [29.94, 30.02] s

  * igt@kms_flip@flip-vs-panning-interruptible@d-hdmi-a1:
- Statuses : 1 pass(s)
- Exec time: [7.59] s

  * igt@kms_flip@modeset-vs-vblank-race@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [2.77, 2.97] s

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [7.73, 7.95] s

  * igt@kms_flip@plain-flip-interruptible@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [0.60, 0.66] s

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [0.62, 0.65] s

  * igt@kms_flip@wf_vblank-ts-check@d-hdmi-a1:
- Statuses : 2 pass(s)
- Exec time: [7.78, 8.10] s

  

Known issues


  Here are the changes found in Patchwork_104704v10_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@display-4x:
- shard-tglb: NOTRUN -> [SKIP][3] ([i915#1839])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-tglb3/igt@feature_discov...@display-4x.html

  * igt@gem_ccs@ctrl-surf-copy:
- shard-tglb: NOTRUN -> [SKIP][4] ([i915#3555] / [i915#5325])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-tglb7/igt@gem_...@ctrl-surf-copy.html
- shard-iclb: NOTRUN -> [SKIP][5] ([i915#5327])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-iclb1/igt@gem_...@ctrl-surf-copy.html

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-kbl:  [PASS][6] -> [DMESG-WARN][7] ([i915#180]) +9 similar 
issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-kbl4/igt@gem_ctx_isolation@preservation...@bcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-kbl1/igt@gem_ctx_isolation@preservation...@bcs0.html

  * igt@gem_ctx_persistence@hostile:
- shard-snb:  NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1099])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-snb5/igt@gem_ctx_persiste...@hostile.html
- shard-tglb: NOTRUN -> [FAIL][9] ([i915#2410])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-tglb7/igt@gem_ctx_persiste...@hostile.html

  * igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: NOTRUN -> [SKIP][10] ([i915#4525])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-iclb5/igt@gem_exec_balan...@parallel-bb-first.html

  * igt@gem_exec_capture@pi@vecs0:
- shard-iclb: [PASS][11] -> [INCOMPLETE][12] ([i915#3371])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb2/igt@gem_exec_capture@p...@vecs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/shard-iclb6/igt@gem_exec_capture@p...@vecs0.html

  * igt@gem_exec_fair@basic-deadline:
- 

Re: [Intel-gfx] [PATCH v5 7/7] drm/i915: Remove truncation warning for large objects

[Andrzej Hajda]

On 25.07.2022 11:25, Gwan-gyeong Mun wrote:

From: Chris Wilson 

Having addressed the issues surrounding incorrect types for local
variables and potential integer truncation in using the scatterlist API,
we have closed all the loop holes we had previously identified with
dangerously large object creation. As such, we can eliminate the warning
put in place to remind us to complete the review.

Signed-off-by: Chris Wilson 
Signed-off-by: Gwan-gyeong Mun 
Cc: Tvrtko Ursulin 
Cc: Brian Welty 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Testcase: igt@gem_create@create-massive
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4991
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 


Reviewed-by: Andrzej Hajda 

Regards
Andrzej

Re: [Intel-gfx] [PATCH v5 6/7] drm/i915: Use error code as -E2BIG when the size of gem ttm object is too large

[Andrzej Hajda]

On 25.07.2022 11:25, Gwan-gyeong Mun wrote:

The ttm_bo_init_reserved() functions returns -ENOSPC if the size is too big
to add vma. The direct function that returns -ENOSPC is 
drm_mm_insert_node_in_range().
To handle the same error as other code returning -E2BIG when the size is
too large, it converts return value to -E2BIG.

Signed-off-by: Gwan-gyeong Mun 
Cc: Chris Wilson 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 


Reviewed-by: Andrzej Hajda 

Regards
Andrzej

---
  drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 11 +++
  1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 88f2887627dc..4d478bf325be 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -1249,6 +1249,17 @@ int __i915_gem_ttm_object_init(struct 
intel_memory_region *mem,
ret = ttm_bo_init_reserved(>bdev, i915_gem_to_ttm(obj), bo_type,
   _sys_placement, page_size >> PAGE_SHIFT,
   , NULL, NULL, i915_ttm_bo_destroy);
+
+   /*
+* XXX: The ttm_bo_init_reserved() functions returns -ENOSPC if the size
+* is too big to add vma. The direct function that returns -ENOSPC is
+* drm_mm_insert_node_in_range(). To handle the same error as other code
+* that returns -E2BIG when the size is too large, it converts -ENOSPC 
to
+* -E2BIG.
+*/
+   if (size >> PAGE_SHIFT > INT_MAX && ret == -ENOSPC)
+   ret = -E2BIG;
+
if (ret)
return i915_ttm_err_to_gem(ret);
  

Re: [Intel-gfx] [PATCH v5 5/7] drm/i915: Check if the size is too big while creating shmem file

[Andrzej Hajda]

On 25.07.2022 11:25, Gwan-gyeong Mun wrote:

The __shmem_file_setup() function returns -EINVAL if size is greater than
MAX_LFS_FILESIZE. To handle the same error as other code that returns
-E2BIG when the size is too large, it add a code that returns -E2BIG when
the size is larger than the size that can be handled.

v4: If BITS_PER_LONG is 32, size > MAX_LFS_FILESIZE is always false, so it
 checks only when BITS_PER_LONG is 64.

Signed-off-by: Gwan-gyeong Mun 
Cc: Chris Wilson 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 
Reported-by: kernel test robot 


Reviewed-by: Andrzej Hajda 

Regards
Andrzej

Re: [Intel-gfx] [PATCH v5 4/7] drm/i915: Check for integer truncation on the configuration of ttm place

[Andrzej Hajda]

On 25.07.2022 11:25, Gwan-gyeong Mun wrote:

There is an impedance mismatch between the first/last valid page
frame number of ttm place in unsigned and our memory/page accounting in
unsigned long.
As the object size is under the control of userspace, we have to be prudent
and catch the conversion errors.
To catch the implicit truncation as we switch from unsigned long to
unsigned, we use overflows_type check and report E2BIG or overflow_type
prior to the operation.

v3: Not to change execution inside a macro. (Mauro)
 Add safe_conversion_gem_bug_on() macro and remove temporal
 SAFE_CONVERSION() macro.

v4: Fix unhandled GEM_BUG_ON() macro call from safe_conversion_gem_bug_on()

Signed-off-by: Gwan-gyeong Mun 
Cc: Chris Wilson 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 
Reported-by: kernel test robot 


Reviewed-by: Andrzej Hajda 

Regards
Andrzej

Re: [Intel-gfx] [PATCH v5 3/7] drm/i915: Check for integer truncation on scatterlist creation

[Andrzej Hajda]

On 25.07.2022 11:25, Gwan-gyeong Mun wrote:

From: Chris Wilson 

There is an impedance mismatch between the scatterlist API using unsigned
int and our memory/page accounting in unsigned long. That is we may try
to create a scatterlist for a large object that overflows returning a
small table into which we try to fit very many pages. As the object size
is under control of userspace, we have to be prudent and catch the
conversion errors.

To catch the implicit truncation as we switch from unsigned long into the
scatterlist's unsigned int, we use overflows_type check and report
E2BIG prior to the operation. This is already used in our create ioctls to
indicate if the uABI request is simply too large for the backing store.
Failing that type check, we have a second check at sg_alloc_table time
to make sure the values we are passing into the scatterlist API are not
truncated.

It uses pgoff_t for locals that are dealing with page indices, in this
case, the page count is the limit of the page index.
And it uses safe_conversion() macro which performs a type conversion (cast)
of an integer value into a new variable, checking that the destination is
large enough to hold the source value.

v2: Move added i915_utils's macro into drm_util header (Jani N)
v5: Fix macros to be enclosed in parentheses for complex values
 Fix too long line warning

Signed-off-by: Chris Wilson 
Signed-off-by: Gwan-gyeong Mun 
Cc: Tvrtko Ursulin 
Cc: Brian Welty 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 

Reviewed-by: Andrzej Hajda 

Regards
Andrzej

Re: [Intel-gfx] [PATCH v5 2/7] drm/i915/gem: Typecheck page lookups

[Andrzej Hajda]

On 25.07.2022 11:25, Gwan-gyeong Mun wrote:

From: Chris Wilson 

We need to check that we avoid integer overflows when looking up a page,
and so fix all the instances where we have mistakenly used a plain
integer instead of a more suitable long. Be pedantic and add integer
typechecking to the lookup so that we can be sure that we are safe.
And it also uses pgoff_t as our page lookups must remain compatible with
the page cache, pgoff_t is currently exactly unsigned long.

v2: Move added i915_utils's macro into drm_util header (Jani N)
v3: Make not use the same macro name on a function. (Mauro)
 For kernel-doc, macros and functions are handled in the same namespace,
 the same macro name on a function prevents ever adding documentation
 for it.
v4: Add kernel-doc markups to the kAPI functions and macros (Mauoro)
v5: Fix an alignment to match open parenthesis

Signed-off-by: Chris Wilson 
Signed-off-by: Gwan-gyeong Mun 
Cc: Tvrtko Ursulin 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 


Reviewed-by: Andrzej Hajda 

Regards
Andrzej

Re: [Intel-gfx] [PATCH v5 1/7] drm: Move and add a few utility macros into drm util header

[Andrzej Hajda]

On 25.07.2022 11:25, Gwan-gyeong Mun wrote:

It moves overflows_type utility macro into drm util header from i915_utils
header. The overflows_type can be used to catch the truncation between data
types. And it adds safe_conversion() macro which performs a type conversion
(cast) of an source value into a new variable, checking that the
destination is large enough to hold the source value.
And it adds exact_type and exactly_pgoff_t macro to catch type mis-match
while compiling.

v3: Add is_type_unsigned() macro (Mauro)
 Modify overflows_type() macro to consider signed data types (Mauro)
 Fix the problem that safe_conversion() macro always returns true
v4: Fix kernel-doc markups

Signed-off-by: Gwan-gyeong Mun 
Cc: Thomas Hellström 
Cc: Matthew Auld 
Cc: Nirmoy Das 
Cc: Jani Nikula 
Reviewed-by: Mauro Carvalho Chehab 
---
  drivers/gpu/drm/i915/i915_utils.h |  5 +-
  include/drm/drm_util.h| 77 +++
  2 files changed, 78 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_utils.h 
b/drivers/gpu/drm/i915/i915_utils.h
index c10d68cdc3ca..345e5b2dc1cd 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -32,6 +32,7 @@
  #include 
  #include 
  #include 
+#include 
  
  #ifdef CONFIG_X86

  #include 
@@ -111,10 +112,6 @@ bool i915_error_injected(void);
  #define range_overflows_end_t(type, start, size, max) \
range_overflows_end((type)(start), (type)(size), (type)(max))
  
-/* Note we don't consider signbits :| */

-#define overflows_type(x, T) \
-   (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
-
  #define ptr_mask_bits(ptr, n) ({  \
unsigned long __v = (unsigned long)(ptr);   \
(typeof(ptr))(__v & -BIT(n));   \
diff --git a/include/drm/drm_util.h b/include/drm/drm_util.h
index 79952d8c4bba..1de9ee5704fa 100644
--- a/include/drm/drm_util.h
+++ b/include/drm/drm_util.h
@@ -62,6 +62,83 @@
   */
  #define for_each_if(condition) if (!(condition)) {} else
  
+/**

+ * is_type_unsigned - helper for checking data type which is an unsigned data
+ * type or not
+ * @x: The data type to check
+ *
+ * Returns:
+ * True if the data type is an unsigned data type, false otherwise.
+ */
+#define is_type_unsigned(x) ((typeof(x))-1 >= (typeof(x))0)
+
+/**
+ * overflows_type - helper for checking the truncation between data types
+ * @x: Source for overflow type comparison
+ * @T: Destination for overflow type comparison
+ *
+ * It compares the values and size of each data type between the first and
+ * second argument to check whether truncation can occur when assigning the
+ * first argument to the variable of the second argument.
+ * Source and Destination can be used with or without sign bit.
+ * Composite data structures such as union and structure are not considered.
+ * Enum data types are not considered.
+ * Floating point data types are not considered.
+ *
+ * Returns:
+ * True if truncation can occur, false otherwise.
+ */
+
+#define overflows_type(x, T) \
+   (is_type_unsigned(x) ? \
+   is_type_unsigned(T) ? \
+   (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T)) ? 1 
: 0 \
+   : (sizeof(x) >= sizeof(T) && (x) >> (BITS_PER_TYPE(T) - 
1)) ? 1 : 0 \
+   : is_type_unsigned(T) ? \
+   ((x) < 0) ? 1 : (sizeof(x) > sizeof(T) && (x) >> 
BITS_PER_TYPE(T)) ? 1 : 0 \
+   : (sizeof(x) > sizeof(T)) ? \
+   ((x) < 0) ? (((x) * -1) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+   : ((x) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+   : 0)



It became quite big and hard to read. I wonder if we could not just 
check the effects of the conversion, sth like:

#define overflows_type(x, T) ((T)(x) != (x))

Regards
Andrzej



+
+/**
+ * exact_type - break compile if source type and destination value's type are
+ * not the same
+ * @T: Source type
+ * @n: Destination value
+ *
+ * It is a helper macro for a poor man's -Wconversion: only allow variables of
+ * an exact type. It determines whether the source type and destination value's
+ * type are the same while compiling, and it breaks compile if two types are
+ * not the same
+ */
+#define exact_type(T, n) \
+   BUILD_BUG_ON(!__builtin_constant_p(n) && 
!__builtin_types_compatible_p(T, typeof(n)))
+
+/**
+ * exactly_pgoff_t - helper to check if the type of a value is pgoff_t
+ * @n: value to compare pgoff_t type
+ *
+ * It breaks compile if the argument value's type is not pgoff_t type.
+ */
+#define exactly_pgoff_t(n) exact_type(pgoff_t, n)
+
+/**
+ * safe_conversion - perform a type conversion (cast) of an source value into
+ * a new variable, checking that the destination is large enough to hold the
+ * source value.
+ * @ptr: Destination pointer address
+ * @value: Source value
+ *
+ * Returns:
+ * If the value would overflow the 

Re: [Intel-gfx] [PATCH 10/12] drm/i915/guc: Support larger contexts on newer hardware

[Tvrtko Ursulin]

On 22/07/2022 20:32, John Harrison wrote:

On 7/19/2022 02:56, Tvrtko Ursulin wrote:

On 19/07/2022 01:13, John Harrison wrote:

On 7/18/2022 05:35, Tvrtko Ursulin wrote:


On 13/07/2022 00:31, john.c.harri...@intel.com wrote:

From: Matthew Brost 

The GuC needs a copy of a golden context for implementing watchdog
resets (aka media resets). This context is larger on newer platforms.
So adjust the size being allocated/copied accordingly.


What were the consequences of this being too small? Media watchdog 
reset broken impacting userspace? Platforms? Do we have an IGT 
testcase? Do we need a Fixes: tag? Copy stable?
Yes. Not sure if we have an IGT for the media watchdog. I recall 
writing something a long time back but I don't think it ever got 
merged due to push back that I don't recall right now. And no because 
it only affects DG2 onwards which is still forceprobed.


Right, hm, I don't know if the MBD SKU promise for DG2 relies on force 
probe removal or not. My impression certainly was that a bunch of uapi 
we recently merged made people happy in that respect - that we 
satisfied the commit to deliver that support with 5.19. Maybe I am 
wrong, or perhaps to err on the side of safety you could add the right 
Fixes: tag regardless? Pick some patch which enables GuC for DG2 if 
there isn't anything better I guess. Or you could check with James.
Adding "Fixes: random patch that is actually irrelevant" seems like the 
wrong thing to do. This is not a bug fix. It is new platform support. 
And it is not the only thing required to support that new platform that 
is not currently in 5.19. E.g. DG2 requires at least GuC v70.4.2 to 
support some hardware w/a's. The guidance for that was to not add Fixes 
tags but to send a manual pull request once everything is ready.


All I know is that some people were really interested(*) that 5.19 
contains everything needed for DG2. Hence I suggested to err on the side 
of safety, or at least check with folks.


Bottom line is, if you want this fix to be in 5.19, or even 5.20, you 
should add a Fixes: tag. Otherwise it will be in 5.21 at the earliest. 
Your call, I only tried to be helpful and avoid another failure.


Regards,

Tvrtko

*) To the point of actively pining the maintainers to ensure patches do 
not miss the merge window.

Re: [Intel-gfx] [PATCH v4 00/10] cover-letter: Update vfio_pin/unpin_pages API

[Xu, Terrence]

> -Original Message-
> From: intel-gvt-dev  On
> Behalf Of Nicolin Chen
> 
> This is a preparatory series for IOMMUFD v2 patches. It prepares for
> replacing vfio_iommu_type1 implementations of vfio_pin/unpin_pages()
> with IOMMUFD version.
> 
> There's a gap between these two versions: the vfio_iommu_type1 version
> inputs a non-contiguous PFN list and outputs another PFN list for the
> pinned physical page list, while the IOMMUFD version only supports a
> contiguous address input by accepting the starting IO virtual address of a
> set of pages to pin and by outputting to a physical page list.
> 
> The nature of existing callers mostly aligns with the IOMMUFD version,
> except s390's vfio_ccw_cp code where some additional change is needed
> along with this series. Overall, updating to "iova" and "phys_page"
> does improve the caller side to some extent.
> 
> Also fix a misuse of physical address and virtual address in the s390's crypto
> code. And update the input naming at the adjacent vfio_dma_rw().
> 
> This is on github:
> https://github.com/nicolinc/iommufd/commits/vfio_pin_pages-v4
> 
> Terrence has tested this series on i915; Eric has tested on s390.
> 
> Thanks!
> 
> Changelog
> v4:
>  * Dropped double-shifting at two gvt_unpin_guest_page calls, fixing
>a bug that's discovered by Alex
>  * Added Reviewed-by from Anthony Krowiak
>  * Rebased on top of linux-vfio's next
> v3: https://lore.kernel.org/kvm/20220708224427.1245-1-
> nicol...@nvidia.com/
>  * Added a patch to replace roundup with DIV_ROUND_UP in i915 gvt
>  * Dropped the "driver->ops->unpin_pages" and NULL checks in PATCH-1
>  * Changed to use WARN_ON and separate into lines in PATCH-1
>  * Replaced "guest" words with "user" and fix typo in PATCH-5
>  * Updated commit log of PATCH-1, PATCH-6, and PATCH-10
>  * Added Reviewed/Acked-by from Christoph, Jason, Kirti, Kevin and Eric
>  * Added Tested-by from Terrence (i915) and Eric (s390)
> v2: https://lore.kernel.org/kvm/20220706062759.24946-1-
> nicol...@nvidia.com/
>  * Added a patch to make vfio_unpin_pages return void
>  * Added two patches to remove PFN list from two s390 callers
>  * Renamed "phys_page" parameter to "pages" for vfio_pin_pages
>  * Updated commit log of kmap_local_page() patch
>  * Added Harald's "Reviewed-by" to pa_ind patch
>  * Rebased on top of Alex's extern removal path
> v1: https://lore.kernel.org/kvm/20220616235212.15185-1-
> nicol...@nvidia.com/
> 
> Nicolin Chen (10):
>   vfio: Make vfio_unpin_pages() return void
>   drm/i915/gvt: Replace roundup with DIV_ROUND_UP
>   vfio/ap: Pass in physical address of ind to ap_aqic()
>   vfio/ccw: Only pass in contiguous pages
>   vfio: Pass in starting IOVA to vfio_pin/unpin_pages API
>   vfio/ap: Change saved_pfn to saved_iova
>   vfio/ccw: Change pa_pfn list to pa_iova list
>   vfio: Rename user_iova of vfio_dma_rw()
>   vfio/ccw: Add kmap_local_page() for memcpy
>   vfio: Replace phys_pfn with pages for vfio_pin_pages()
> 
>  .../driver-api/vfio-mediated-device.rst   |   6 +-
>  arch/s390/include/asm/ap.h|   6 +-
>  drivers/gpu/drm/i915/gvt/kvmgt.c  |  45 ++--
>  drivers/s390/cio/vfio_ccw_cp.c| 195 +++---
>  drivers/s390/crypto/ap_queue.c|   2 +-
>  drivers/s390/crypto/vfio_ap_ops.c |  54 +++--
>  drivers/s390/crypto/vfio_ap_private.h |   4 +-
>  drivers/vfio/vfio.c   |  54 ++---
>  drivers/vfio/vfio.h   |   8 +-
>  drivers/vfio/vfio_iommu_type1.c   |  45 ++--
>  include/linux/vfio.h  |   9 +-
>  11 files changed, 213 insertions(+), 215 deletions(-)

Verified the Intel KVMGT feature, no regression be introduced by v4 patch 
series, the previous Call Trace issue already gone.
Tested-by: Terrence Xu 
> --
> 2.17.1

[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev10)

[Patchwork]

== Series Details ==

Series: Fixes integer overflow or integer truncation issues in page lookups, 
ttm place configuration and scatterlist creation (rev10)
URL   : https://patchwork.freedesktop.org/series/104704/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11935 -> Patchwork_104704v10


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/index.html

Participating hosts (36 -> 38)
--

  Additional (8): bat-dg1-5 bat-adlm-1 bat-dg2-9 bat-adlp-6 bat-adln-1 
bat-rplp-1 bat-rpls-2 bat-jsl-1 
  Missing(6): fi-bxt-dsi fi-hsw-4200u fi-ctg-p8600 fi-kbl-x1275 bat-jsl-3 
fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_104704v10:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- {bat-rplp-1}:   NOTRUN -> [SKIP][1] +6 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-rplp-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor.html

  
Known issues


  Here are the changes found in Patchwork_104704v10 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@fbdev@read:
- bat-dg1-5:  NOTRUN -> [SKIP][2] ([i915#2582]) +4 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@fb...@read.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][3] ([i915#4083])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][4] ([i915#4077]) +2 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][5] ([i915#4079]) +1 similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- bat-dg1-5:  NOTRUN -> [SKIP][6] ([i915#1155])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  NOTRUN -> [DMESG-FAIL][7] ([i915#4494] / [i915#4957])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-blb-e6850:   [PASS][8] -> [DMESG-FAIL][9] ([i915#4528])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-blb-e6850/igt@i915_selftest@l...@requests.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/fi-blb-e6850/igt@i915_selftest@l...@requests.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5:  NOTRUN -> [INCOMPLETE][10] ([i915#6011])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][11] ([i915#4212]) +7 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][12] ([i915#4215])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_busy@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#1845] / [i915#4303])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@kms_b...@basic.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- bat-dg1-5:  NOTRUN -> [SKIP][15] ([fdo#111827]) +7 similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-dg1-5:  NOTRUN -> [SKIP][16] ([fdo#109285])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v10/bat-dg1-5/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-dg1-5:  NOTRUN -> [SKIP][17] ([i915#4078]) +13 similar issues
   [17]: 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev10)

[Patchwork]

== Series Details ==

Series: Fixes integer overflow or integer truncation issues in page lookups, 
ttm place configuration and scatterlist creation (rev10)
URL   : https://patchwork.freedesktop.org/series/104704/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] [PATCH v5 5/7] drm/i915: Check if the size is too big while creating shmem file

[Gwan-gyeong Mun]

The __shmem_file_setup() function returns -EINVAL if size is greater than
MAX_LFS_FILESIZE. To handle the same error as other code that returns
-E2BIG when the size is too large, it add a code that returns -E2BIG when
the size is larger than the size that can be handled.

v4: If BITS_PER_LONG is 32, size > MAX_LFS_FILESIZE is always false, so it
checks only when BITS_PER_LONG is 64.

Signed-off-by: Gwan-gyeong Mun 
Cc: Chris Wilson 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 
Reported-by: kernel test robot 
---
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 604e8829e8ea..d41569ca6999 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -541,6 +541,20 @@ static int __create_shmem(struct drm_i915_private *i915,
 
drm_gem_private_object_init(>drm, obj, size);
 
+   /* XXX: The __shmem_file_setup() function returns -EINVAL if size is
+* greater than MAX_LFS_FILESIZE.
+* To handle the same error as other code that returns -E2BIG when
+* the size is too large, we add a code that returns -E2BIG when the
+* size is larger than the size that can be handled.
+* If BITS_PER_LONG is 32, size > MAX_LFS_FILESIZE is always false,
+* so we only needs to check when BITS_PER_LONG is 64.
+* If BITS_PER_LONG is 32, E2BIG checks are processed when
+* i915_gem_object_size_2big() is called before init_object() callback
+* is called.
+*/
+   if (BITS_PER_LONG == 64 && size > MAX_LFS_FILESIZE)
+   return -E2BIG;
+
if (i915->mm.gemfs)
filp = shmem_file_setup_with_mnt(i915->mm.gemfs, "i915", size,
 flags);
-- 
2.34.1

[Intel-gfx] [PATCH v5 4/7] drm/i915: Check for integer truncation on the configuration of ttm place

[Gwan-gyeong Mun]

There is an impedance mismatch between the first/last valid page
frame number of ttm place in unsigned and our memory/page accounting in
unsigned long.
As the object size is under the control of userspace, we have to be prudent
and catch the conversion errors.
To catch the implicit truncation as we switch from unsigned long to
unsigned, we use overflows_type check and report E2BIG or overflow_type
prior to the operation.

v3: Not to change execution inside a macro. (Mauro)
Add safe_conversion_gem_bug_on() macro and remove temporal
SAFE_CONVERSION() macro.

v4: Fix unhandled GEM_BUG_ON() macro call from safe_conversion_gem_bug_on()

Signed-off-by: Gwan-gyeong Mun 
Cc: Chris Wilson 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 
Reported-by: kernel test robot 
---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c |  6 +++---
 drivers/gpu/drm/i915/i915_gem.h |  4 
 drivers/gpu/drm/i915/intel_region_ttm.c | 20 +---
 3 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 9f2be1892b6c..88f2887627dc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -140,14 +140,14 @@ i915_ttm_place_from_region(const struct 
intel_memory_region *mr,
if (flags & I915_BO_ALLOC_CONTIGUOUS)
place->flags |= TTM_PL_FLAG_CONTIGUOUS;
if (offset != I915_BO_INVALID_OFFSET) {
-   place->fpfn = offset >> PAGE_SHIFT;
-   place->lpfn = place->fpfn + (size >> PAGE_SHIFT);
+   safe_conversion_gem_bug_on(>fpfn, offset >> PAGE_SHIFT);
+   safe_conversion_gem_bug_on(>lpfn, place->fpfn + (size >> 
PAGE_SHIFT));
} else if (mr->io_size && mr->io_size < mr->total) {
if (flags & I915_BO_ALLOC_GPU_ONLY) {
place->flags |= TTM_PL_FLAG_TOPDOWN;
} else {
place->fpfn = 0;
-   place->lpfn = mr->io_size >> PAGE_SHIFT;
+   safe_conversion_gem_bug_on(>lpfn, mr->io_size >> 
PAGE_SHIFT);
}
}
 }
diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h
index 68d8d52bd541..327dacedd5d1 100644
--- a/drivers/gpu/drm/i915/i915_gem.h
+++ b/drivers/gpu/drm/i915/i915_gem.h
@@ -83,5 +83,9 @@ struct drm_i915_private;
 #endif
 
 #define I915_GEM_IDLE_TIMEOUT (HZ / 5)
+#define safe_conversion_gem_bug_on(ptr, value) !({ \
+   safe_conversion(ptr, value) ? 0 \
+   : (({ GEM_BUG_ON(overflows_type(value, *ptr)); }), 1); \
+})
 
 #endif /* __I915_GEM_H__ */
diff --git a/drivers/gpu/drm/i915/intel_region_ttm.c 
b/drivers/gpu/drm/i915/intel_region_ttm.c
index 575d67bc6ffe..f0d143948725 100644
--- a/drivers/gpu/drm/i915/intel_region_ttm.c
+++ b/drivers/gpu/drm/i915/intel_region_ttm.c
@@ -209,14 +209,26 @@ intel_region_ttm_resource_alloc(struct 
intel_memory_region *mem,
if (flags & I915_BO_ALLOC_CONTIGUOUS)
place.flags |= TTM_PL_FLAG_CONTIGUOUS;
if (offset != I915_BO_INVALID_OFFSET) {
-   place.fpfn = offset >> PAGE_SHIFT;
-   place.lpfn = place.fpfn + (size >> PAGE_SHIFT);
+   if (!safe_conversion_gem_bug_on(,
+   offset >> PAGE_SHIFT)) {
+   ret = -E2BIG;
+   goto out;
+   }
+   if (!safe_conversion_gem_bug_on(,
+   place.fpfn + (size >> 
PAGE_SHIFT))) {
+   ret = -E2BIG;
+   goto out;
+   }
} else if (mem->io_size && mem->io_size < mem->total) {
if (flags & I915_BO_ALLOC_GPU_ONLY) {
place.flags |= TTM_PL_FLAG_TOPDOWN;
} else {
place.fpfn = 0;
-   place.lpfn = mem->io_size >> PAGE_SHIFT;
+   if (!safe_conversion_gem_bug_on(,
+   mem->io_size >> 
PAGE_SHIFT)) {
+   ret = -E2BIG;
+   goto out;
+   }
}
}
 
@@ -224,6 +236,8 @@ intel_region_ttm_resource_alloc(struct intel_memory_region 
*mem,
mock_bo.bdev = >i915->bdev;
 
ret = man->func->alloc(man, _bo, , );
+
+out:
if (ret == -ENOSPC)
ret = -ENXIO;
if (!ret)
-- 
2.34.1

[Intel-gfx] [PATCH v5 3/7] drm/i915: Check for integer truncation on scatterlist creation

[Gwan-gyeong Mun]

From: Chris Wilson 

There is an impedance mismatch between the scatterlist API using unsigned
int and our memory/page accounting in unsigned long. That is we may try
to create a scatterlist for a large object that overflows returning a
small table into which we try to fit very many pages. As the object size
is under control of userspace, we have to be prudent and catch the
conversion errors.

To catch the implicit truncation as we switch from unsigned long into the
scatterlist's unsigned int, we use overflows_type check and report
E2BIG prior to the operation. This is already used in our create ioctls to
indicate if the uABI request is simply too large for the backing store.
Failing that type check, we have a second check at sg_alloc_table time
to make sure the values we are passing into the scatterlist API are not
truncated.

It uses pgoff_t for locals that are dealing with page indices, in this
case, the page count is the limit of the page index.
And it uses safe_conversion() macro which performs a type conversion (cast)
of an integer value into a new variable, checking that the destination is
large enough to hold the source value.

v2: Move added i915_utils's macro into drm_util header (Jani N)
v5: Fix macros to be enclosed in parentheses for complex values
Fix too long line warning

Signed-off-by: Chris Wilson 
Signed-off-by: Gwan-gyeong Mun 
Cc: Tvrtko Ursulin 
Cc: Brian Welty 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 
---
 drivers/gpu/drm/i915/gem/i915_gem_internal.c |  6 --
 drivers/gpu/drm/i915/gem/i915_gem_object.h   |  3 ---
 drivers/gpu/drm/i915/gem/i915_gem_phys.c |  4 
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c|  5 -
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c  |  4 
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c  |  5 -
 drivers/gpu/drm/i915/gvt/dmabuf.c|  9 +
 drivers/gpu/drm/i915/i915_scatterlist.h  | 11 +++
 8 files changed, 36 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c 
b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
index c698f95af15f..ff2e6e780631 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
@@ -37,10 +37,13 @@ static int i915_gem_object_get_pages_internal(struct 
drm_i915_gem_object *obj)
struct sg_table *st;
struct scatterlist *sg;
unsigned int sg_page_sizes;
-   unsigned int npages;
+   pgoff_t npages; /* restricted by sg_alloc_table */
int max_order;
gfp_t gfp;
 
+   if (!safe_conversion(, obj->base.size >> PAGE_SHIFT))
+   return -E2BIG;
+
max_order = MAX_ORDER;
 #ifdef CONFIG_SWIOTLB
if (is_swiotlb_active(obj->base.dev->dev)) {
@@ -67,7 +70,6 @@ static int i915_gem_object_get_pages_internal(struct 
drm_i915_gem_object *obj)
if (!st)
return -ENOMEM;
 
-   npages = obj->base.size / PAGE_SIZE;
if (sg_alloc_table(st, npages, GFP_KERNEL)) {
kfree(st);
return -ENOMEM;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 5da872afc4ba..0cf31adbfd41 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -26,9 +26,6 @@ enum intel_region_id;
  * this and catch if we ever need to fix it. In the meantime, if you do
  * spot such a local variable, please consider fixing!
  *
- * Aside from our own locals (for which we have no excuse!):
- * - sg_table embeds unsigned int for nents
- *
  * We can check for invalidly typed locals with typecheck(), see for example
  * i915_gem_object_get_sg().
  */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c 
b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
index 0d0e46dae559..88ba7266a3a5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
@@ -28,6 +28,10 @@ static int i915_gem_object_get_pages_phys(struct 
drm_i915_gem_object *obj)
void *dst;
int i;
 
+   /* Contiguous chunk, with a single scatterlist element */
+   if (overflows_type(obj->base.size, sg->length))
+   return -E2BIG;
+
if (GEM_WARN_ON(i915_gem_object_needs_bit17_swizzle(obj)))
return -EINVAL;
 
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 4eed3dd90ba8..604e8829e8ea 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -193,13 +193,16 @@ static int shmem_get_pages(struct drm_i915_gem_object 
*obj)
struct drm_i915_private *i915 = to_i915(obj->base.dev);
struct intel_memory_region *mem = obj->mm.region;
struct address_space *mapping = obj->base.filp->f_mapping;
-   const unsigned long page_count = obj->base.size / PAGE_SIZE;
unsigned int max_segment = 

[Intel-gfx] [PATCH v5 7/7] drm/i915: Remove truncation warning for large objects

[Gwan-gyeong Mun]

From: Chris Wilson 

Having addressed the issues surrounding incorrect types for local
variables and potential integer truncation in using the scatterlist API,
we have closed all the loop holes we had previously identified with
dangerously large object creation. As such, we can eliminate the warning
put in place to remind us to complete the review.

Signed-off-by: Chris Wilson 
Signed-off-by: Gwan-gyeong Mun 
Cc: Tvrtko Ursulin 
Cc: Brian Welty 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Testcase: igt@gem_create@create-massive
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4991
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.h | 15 ---
 1 file changed, 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 0cf31adbfd41..dd2762da332f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -20,25 +20,10 @@
 
 enum intel_region_id;
 
-/*
- * XXX: There is a prevalence of the assumption that we fit the
- * object's page count inside a 32bit _signed_ variable. Let's document
- * this and catch if we ever need to fix it. In the meantime, if you do
- * spot such a local variable, please consider fixing!
- *
- * We can check for invalidly typed locals with typecheck(), see for example
- * i915_gem_object_get_sg().
- */
-#define GEM_CHECK_SIZE_OVERFLOW(sz) \
-   GEM_WARN_ON((sz) >> PAGE_SHIFT > INT_MAX)
-
 static inline bool i915_gem_object_size_2big(u64 size)
 {
struct drm_i915_gem_object *obj;
 
-   if (GEM_CHECK_SIZE_OVERFLOW(size))
-   return true;
-
if (overflows_type(size, obj->base.size))
return true;
 
-- 
2.34.1

[Intel-gfx] [PATCH v5 2/7] drm/i915/gem: Typecheck page lookups

[Gwan-gyeong Mun]

From: Chris Wilson 

We need to check that we avoid integer overflows when looking up a page,
and so fix all the instances where we have mistakenly used a plain
integer instead of a more suitable long. Be pedantic and add integer
typechecking to the lookup so that we can be sure that we are safe.
And it also uses pgoff_t as our page lookups must remain compatible with
the page cache, pgoff_t is currently exactly unsigned long.

v2: Move added i915_utils's macro into drm_util header (Jani N)
v3: Make not use the same macro name on a function. (Mauro)
For kernel-doc, macros and functions are handled in the same namespace,
the same macro name on a function prevents ever adding documentation
for it.
v4: Add kernel-doc markups to the kAPI functions and macros (Mauoro)
v5: Fix an alignment to match open parenthesis

Signed-off-by: Chris Wilson 
Signed-off-by: Gwan-gyeong Mun 
Cc: Tvrtko Ursulin 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 
---
 drivers/gpu/drm/i915/gem/i915_gem_object.c|   7 +-
 drivers/gpu/drm/i915/gem/i915_gem_object.h| 293 --
 drivers/gpu/drm/i915/gem/i915_gem_pages.c |  27 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c   |   2 +-
 .../drm/i915/gem/selftests/i915_gem_context.c |  12 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c|   8 +-
 .../drm/i915/gem/selftests/i915_gem_object.c  |   8 +-
 drivers/gpu/drm/i915/i915_gem.c   |  18 +-
 drivers/gpu/drm/i915/i915_vma.c   |   8 +-
 9 files changed, 322 insertions(+), 61 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index ccec4055fde3..90996fe8ad45 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -421,10 +421,11 @@ void __i915_gem_object_invalidate_frontbuffer(struct 
drm_i915_gem_object *obj,
 static void
 i915_gem_object_read_from_page_kmap(struct drm_i915_gem_object *obj, u64 
offset, void *dst, int size)
 {
+   pgoff_t idx = offset >> PAGE_SHIFT;
void *src_map;
void *src_ptr;
 
-   src_map = kmap_atomic(i915_gem_object_get_page(obj, offset >> 
PAGE_SHIFT));
+   src_map = kmap_atomic(i915_gem_object_get_page(obj, idx));
 
src_ptr = src_map + offset_in_page(offset);
if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
@@ -437,9 +438,10 @@ i915_gem_object_read_from_page_kmap(struct 
drm_i915_gem_object *obj, u64 offset,
 static void
 i915_gem_object_read_from_page_iomap(struct drm_i915_gem_object *obj, u64 
offset, void *dst, int size)
 {
+   pgoff_t idx = offset >> PAGE_SHIFT;
+   dma_addr_t dma = i915_gem_object_get_dma_address(obj, idx);
void __iomem *src_map;
void __iomem *src_ptr;
-   dma_addr_t dma = i915_gem_object_get_dma_address(obj, offset >> 
PAGE_SHIFT);
 
src_map = io_mapping_map_wc(>mm.region->iomap,
dma - obj->mm.region->region.start,
@@ -468,6 +470,7 @@ i915_gem_object_read_from_page_iomap(struct 
drm_i915_gem_object *obj, u64 offset
  */
 int i915_gem_object_read_from_page(struct drm_i915_gem_object *obj, u64 
offset, void *dst, int size)
 {
+   GEM_BUG_ON(overflows_type(offset >> PAGE_SHIFT, pgoff_t));
GEM_BUG_ON(offset >= obj->base.size);
GEM_BUG_ON(offset_in_page(offset) > PAGE_SIZE - size);
GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 6f0a3ce35567..5da872afc4ba 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -27,8 +27,10 @@ enum intel_region_id;
  * spot such a local variable, please consider fixing!
  *
  * Aside from our own locals (for which we have no excuse!):
- * - sg_table embeds unsigned int for num_pages
- * - get_user_pages*() mixed ints with longs
+ * - sg_table embeds unsigned int for nents
+ *
+ * We can check for invalidly typed locals with typecheck(), see for example
+ * i915_gem_object_get_sg().
  */
 #define GEM_CHECK_SIZE_OVERFLOW(sz) \
GEM_WARN_ON((sz) >> PAGE_SHIFT > INT_MAX)
@@ -363,44 +365,289 @@ i915_gem_object_get_tile_row_size(const struct 
drm_i915_gem_object *obj)
 int i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
   unsigned int tiling, unsigned int stride);
 
+/**
+ * __i915_gem_object_page_iter_get_sg - helper to find the target scatterlist
+ * pointer and the target page position using pgoff_t n input argument and
+ * i915_gem_object_page_iter
+ * @obj: i915 GEM buffer object
+ * @iter: i915 GEM buffer object page iterator
+ * @n: page offset
+ * @offset: searched physical offset,
+ *  it will be used for returning physical page offset value
+ *
+ * Context: Takes and releases the mutex lock of the i915_gem_object_page_iter.
+ *  Takes and releases the RCU 

[Intel-gfx] [PATCH v5 6/7] drm/i915: Use error code as -E2BIG when the size of gem ttm object is too large

[Gwan-gyeong Mun]

The ttm_bo_init_reserved() functions returns -ENOSPC if the size is too big
to add vma. The direct function that returns -ENOSPC is 
drm_mm_insert_node_in_range().
To handle the same error as other code returning -E2BIG when the size is
too large, it converts return value to -E2BIG.

Signed-off-by: Gwan-gyeong Mun 
Cc: Chris Wilson 
Cc: Matthew Auld 
Cc: Thomas Hellström 
Reviewed-by: Nirmoy Das 
Reviewed-by: Mauro Carvalho Chehab 
---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 88f2887627dc..4d478bf325be 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -1249,6 +1249,17 @@ int __i915_gem_ttm_object_init(struct 
intel_memory_region *mem,
ret = ttm_bo_init_reserved(>bdev, i915_gem_to_ttm(obj), bo_type,
   _sys_placement, page_size >> PAGE_SHIFT,
   , NULL, NULL, i915_ttm_bo_destroy);
+
+   /*
+* XXX: The ttm_bo_init_reserved() functions returns -ENOSPC if the size
+* is too big to add vma. The direct function that returns -ENOSPC is
+* drm_mm_insert_node_in_range(). To handle the same error as other code
+* that returns -E2BIG when the size is too large, it converts -ENOSPC 
to
+* -E2BIG.
+*/
+   if (size >> PAGE_SHIFT > INT_MAX && ret == -ENOSPC)
+   ret = -E2BIG;
+
if (ret)
return i915_ttm_err_to_gem(ret);
 
-- 
2.34.1

[Intel-gfx] [PATCH v5 1/7] drm: Move and add a few utility macros into drm util header

[Gwan-gyeong Mun]

It moves overflows_type utility macro into drm util header from i915_utils
header. The overflows_type can be used to catch the truncation between data
types. And it adds safe_conversion() macro which performs a type conversion
(cast) of an source value into a new variable, checking that the
destination is large enough to hold the source value.
And it adds exact_type and exactly_pgoff_t macro to catch type mis-match
while compiling.

v3: Add is_type_unsigned() macro (Mauro)
Modify overflows_type() macro to consider signed data types (Mauro)
Fix the problem that safe_conversion() macro always returns true
v4: Fix kernel-doc markups

Signed-off-by: Gwan-gyeong Mun 
Cc: Thomas Hellström 
Cc: Matthew Auld 
Cc: Nirmoy Das 
Cc: Jani Nikula 
Reviewed-by: Mauro Carvalho Chehab 
---
 drivers/gpu/drm/i915/i915_utils.h |  5 +-
 include/drm/drm_util.h| 77 +++
 2 files changed, 78 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_utils.h 
b/drivers/gpu/drm/i915/i915_utils.h
index c10d68cdc3ca..345e5b2dc1cd 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -32,6 +32,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_X86
 #include 
@@ -111,10 +112,6 @@ bool i915_error_injected(void);
 #define range_overflows_end_t(type, start, size, max) \
range_overflows_end((type)(start), (type)(size), (type)(max))
 
-/* Note we don't consider signbits :| */
-#define overflows_type(x, T) \
-   (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
-
 #define ptr_mask_bits(ptr, n) ({   \
unsigned long __v = (unsigned long)(ptr);   \
(typeof(ptr))(__v & -BIT(n));   \
diff --git a/include/drm/drm_util.h b/include/drm/drm_util.h
index 79952d8c4bba..1de9ee5704fa 100644
--- a/include/drm/drm_util.h
+++ b/include/drm/drm_util.h
@@ -62,6 +62,83 @@
  */
 #define for_each_if(condition) if (!(condition)) {} else
 
+/**
+ * is_type_unsigned - helper for checking data type which is an unsigned data
+ * type or not
+ * @x: The data type to check
+ *
+ * Returns:
+ * True if the data type is an unsigned data type, false otherwise.
+ */
+#define is_type_unsigned(x) ((typeof(x))-1 >= (typeof(x))0)
+
+/**
+ * overflows_type - helper for checking the truncation between data types
+ * @x: Source for overflow type comparison
+ * @T: Destination for overflow type comparison
+ *
+ * It compares the values and size of each data type between the first and
+ * second argument to check whether truncation can occur when assigning the
+ * first argument to the variable of the second argument.
+ * Source and Destination can be used with or without sign bit.
+ * Composite data structures such as union and structure are not considered.
+ * Enum data types are not considered.
+ * Floating point data types are not considered.
+ *
+ * Returns:
+ * True if truncation can occur, false otherwise.
+ */
+
+#define overflows_type(x, T) \
+   (is_type_unsigned(x) ? \
+   is_type_unsigned(T) ? \
+   (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T)) ? 1 
: 0 \
+   : (sizeof(x) >= sizeof(T) && (x) >> (BITS_PER_TYPE(T) - 
1)) ? 1 : 0 \
+   : is_type_unsigned(T) ? \
+   ((x) < 0) ? 1 : (sizeof(x) > sizeof(T) && (x) >> 
BITS_PER_TYPE(T)) ? 1 : 0 \
+   : (sizeof(x) > sizeof(T)) ? \
+   ((x) < 0) ? (((x) * -1) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+   : ((x) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+   : 0)
+
+/**
+ * exact_type - break compile if source type and destination value's type are
+ * not the same
+ * @T: Source type
+ * @n: Destination value
+ *
+ * It is a helper macro for a poor man's -Wconversion: only allow variables of
+ * an exact type. It determines whether the source type and destination value's
+ * type are the same while compiling, and it breaks compile if two types are
+ * not the same
+ */
+#define exact_type(T, n) \
+   BUILD_BUG_ON(!__builtin_constant_p(n) && 
!__builtin_types_compatible_p(T, typeof(n)))
+
+/**
+ * exactly_pgoff_t - helper to check if the type of a value is pgoff_t
+ * @n: value to compare pgoff_t type
+ *
+ * It breaks compile if the argument value's type is not pgoff_t type.
+ */
+#define exactly_pgoff_t(n) exact_type(pgoff_t, n)
+
+/**
+ * safe_conversion - perform a type conversion (cast) of an source value into
+ * a new variable, checking that the destination is large enough to hold the
+ * source value.
+ * @ptr: Destination pointer address
+ * @value: Source value
+ *
+ * Returns:
+ * If the value would overflow the destination, it returns false.
+ */
+#define safe_conversion(ptr, value) ({ \
+   typeof(value) __v = (value); \
+   typeof(ptr) __ptr = (ptr); \
+   overflows_type(__v, *__ptr) ? 0 : ((*__ptr = (typeof(*__ptr))__v), 1); \
+})
+
 /**
  * 

[Intel-gfx] [PATCH v5 0/7] Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation

[Gwan-gyeong Mun]

This patch series fixes integer overflow or integer truncation issues in
page lookups, ttm place configuration and scatterlist creation, etc.
We need to check that we avoid integer overflows when looking up a page,
and so fix all the instances where we have mistakenly used a plain integer
instead of a more suitable long.
And there is an impedance mismatch between the scatterlist API using
unsigned int and our memory/page accounting in unsigned long. That is we
may try to create a scatterlist for a large object that overflows returning
a small table into which we try to fit very many pages. As the object size
is under the control of userspace, we have to be prudent and catch the
conversion errors. To catch the implicit truncation as we switch from
unsigned long into the scatterlist's unsigned int, we use our overflows_type
check and report E2BIG prior to the operation. This is already used in
our create ioctls to indicate if the uABI request is simply too large for
the backing store. 
And ttm place also has the same problem with scatterlist creation,
and we fix the integer truncation problem with the way approached by
scatterlist creation.
And It corrects the error code to return -E2BIG when creating gem objects
using ttm or shmem, if the size is too large in each case.
In order to provide a common macro, it moves and adds a few utility macros into 
drm util header

v5: Fix an alignment to match open parenthesis
Fix macros to be enclosed in parentheses for complex values
Fix too long line warning
v4: Fix build warnins that reported by kernel test robot. (kernel test robot 
)
Add kernel-doc markups to the kAPI functions and macros (Mauoro)
v3: Modify overflows_type() macro to consider signed data types and
add is_type_unsigned() macro (Mauro)
Make not use the same macro name on a function. (Mauro)
For kernel-doc, macros and functions are handled in the same namespace,
the same macro name on a function prevents ever adding documentation for it.
Not to change execution inside a macro. (Mauro)
Fix the problem that safe_conversion() macro always returns true (G.G)
Add safe_conversion_gem_bug_on() macro and remove temporal 
SAFE_CONVERSION() macro. (G.G.)

Chris Wilson (3):
  drm/i915/gem: Typecheck page lookups
  drm/i915: Check for integer truncation on scatterlist creation
  drm/i915: Remove truncation warning for large objects

Gwan-gyeong Mun (4):
  drm: Move and add a few utility macros into drm util header
  drm/i915: Check for integer truncation on the configuration of ttm
place
  drm/i915: Check if the size is too big while creating shmem file
  drm/i915: Use error code as -E2BIG when the size of gem ttm object is
too large

 drivers/gpu/drm/i915/gem/i915_gem_internal.c  |   6 +-
 drivers/gpu/drm/i915/gem/i915_gem_object.c|   7 +-
 drivers/gpu/drm/i915/gem/i915_gem_object.h| 303 +++---
 drivers/gpu/drm/i915/gem/i915_gem_pages.c |  27 +-
 drivers/gpu/drm/i915/gem/i915_gem_phys.c  |   4 +
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c |  19 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c   |  23 +-
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c   |   5 +-
 .../drm/i915/gem/selftests/i915_gem_context.c |  12 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c|   8 +-
 .../drm/i915/gem/selftests/i915_gem_object.c  |   8 +-
 drivers/gpu/drm/i915/gvt/dmabuf.c |   9 +-
 drivers/gpu/drm/i915/i915_gem.c   |  18 +-
 drivers/gpu/drm/i915/i915_gem.h   |   4 +
 drivers/gpu/drm/i915/i915_scatterlist.h   |  11 +
 drivers/gpu/drm/i915/i915_utils.h |   5 +-
 drivers/gpu/drm/i915/i915_vma.c   |   8 +-
 drivers/gpu/drm/i915/intel_region_ttm.c   |  20 +-
 include/drm/drm_util.h|  77 +
 19 files changed, 481 insertions(+), 93 deletions(-)

-- 
2.34.1

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop using swiotlb (rev3)

[Tvrtko Ursulin]

On 22/07/2022 20:21, Robert Beckett wrote:

On 22/07/2022 19:05, Patchwork wrote:

*Patch Details*
*Series:*    drm/i915: stop using swiotlb (rev3)
*URL:*    https://patchwork.freedesktop.org/series/106589/ 


*State:*    failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v3/index.html 




  CI Bug Log - changes from CI_DRM_11935_full -> Patchwork_106589v3_full


    Summary

*FAILURE*

Serious unknown changes coming with Patchwork_106589v3_full absolutely 
need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_106589v3_full, please notify your bug team to 
allow them
to document this new failure mode, which will reduce false positives 
in CI.



    Participating hosts (10 -> 12)

Additional (2): shard-rkl shard-tglu


    Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_106589v3_full:



  IGT changes


    Possible regressions

  *

    igt@gem_mmap_offset@clear:

  o

    shard-tglb: PASS

 


    -> INCOMPLETE

 





I've no idea why CI is seeing a NULL deref here.
Testing locally on my TGL board, it passes fine.
I think I would need some help testing this on other systems to track 
this down.


Is it possible that dma_direct_max_mapping_size can return a whole range 
of "unexpected" values akin to swiotlb_max_segment? Anything below 
PAGE_SIZE, including zero, would confuse the driver.


Oh..

  return min_t(size_t, UINT_MAX, dma_max_mapping_size(dev));

Wrap the min_t value in rounddown(..., PAGE_SIZE).

Regards,

Tvrtko




  o

    shard-iclb: PASS

 


    -> INCOMPLETE

 




    Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *

    igt@gem_mmap_offset@clear:

  o

    {shard-rkl}: NOTRUN -> INCOMPLETE

 



  o

    {shard-tglu}: NOTRUN -> INCOMPLETE

 


    +1 similar issue


    New tests

New tests have been introduced between CI_DRM_11935_full and 
Patchwork_106589v3_full:



  New IGT tests (27)

  *

    igt@kms_flip@basic-flip-vs-dpms@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.66] s
  *

    igt@kms_flip@basic-flip-vs-modeset@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.62] s
  *

    igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.59] s
  *

    igt@kms_flip@blocking-absolute-wf_vblank@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.62] s
  *

    igt@kms_flip@bo-too-big-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.39] s
  *

    igt@kms_flip@bo-too-big@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.41] s
  *

    igt@kms_flip@busy-flip@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.62] s
  *

    igt@kms_flip@dpms-off-confusion-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.60] s
  *

    igt@kms_flip@dpms-vs-vblank-race-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [2.72] s
  *

    igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [8.03] s
  *

    igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.60] s
  *

    igt@kms_flip@flip-vs-dpms-off-vs-modeset@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.57] s
  *

    igt@kms_flip@flip-vs-fences-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.62] s
  *

    igt@kms_flip@flip-vs-fences@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.66] s
  *

    igt@kms_flip@flip-vs-modeset-vs-hang@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [30.02] s
  *

    igt@kms_flip@flip-vs-panning-interruptible@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.60] s
  *

    igt@kms_flip@flip-vs-panning@d-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [7.62] s
  *

    igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a1:

  o Statuses : 1