Re: [Intel-gfx] [PATCH 7/7] drm/i915/hwmon: Extend power/energy for XEHPSDV

2022-08-29 Thread Dixit, Ashutosh
On Thu, 25 Aug 2022 06:21:18 -0700, Badal Nilawar wrote:
>
> From: Dale B Stimson 
>
> Extend hwmon power/energy for XEHPSDV especially per gt level energy
> usage.

A couple of very minor nits below which need to be fixed. But otherwise
this patch is:

Reviewed-by: Ashutosh Dixit 

> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c 
> b/drivers/gpu/drm/i915/i915_hwmon.c
> index b8ac52f07681..76d73216c54e 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.c
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c
> @@ -12,6 +12,7 @@
>  #include "i915_reg.h"
>  #include "intel_mchbar_regs.h"
>  #include "intel_pcode.h"
> +#include "gt/intel_gt.h"
>  #include "gt/intel_gt_regs.h"
>
>  /*
> @@ -21,7 +22,7 @@
>   * - curr   - milliamperes
>   * - energy - microjoules
>   */
> -#define SF_TIME1000
> +#define SF_TIME  1000

This change should not be in this patch, it seems an unnecessary space has
been inserted.

> @@ -622,6 +690,10 @@ void i915_hwmon_register(struct drm_i915_private *i915)
>   struct i915_hwmon *hwmon;
>   struct device *hwmon_dev;
>   struct hwm_drvdata *ddat;
> + struct hwm_drvdata *ddat_gt;
> + struct intel_gt *gt;
> + const char *ddname;

Variable is not needed, let's delete it and directly use ddat_gt->name.

>  void i915_hwmon_unregister(struct drm_i915_private *i915)
>  {
>   struct i915_hwmon *hwmon;
>   struct hwm_drvdata *ddat;
> + struct intel_gt *gt;
> + int i;
>
>   hwmon = fetch_and_zero(>hwmon);
>   if (!hwmon)
>   return;
>
>   ddat = >ddat;
> +
> + for_each_gt(gt, i915, i) {
> + struct hwm_drvdata *ddat_gt;
> +
> + ddat_gt = hwmon->ddat_gt + i;
> +
> + if (ddat_gt->hwmon_dev) {
> + hwmon_device_unregister(ddat_gt->hwmon_dev);
> + ddat_gt->hwmon_dev = NULL;

No need to set to NULL, we are doing 'kfree(hwmon)' below, let's just
delete this line.

Thanks.
--
Ashutosh


Re: [Intel-gfx] [PATCH 4/7] drm/i915/hwmon: Show device level energy usage

2022-08-29 Thread Dixit, Ashutosh
On Thu, 25 Aug 2022 06:21:15 -0700, Badal Nilawar wrote:
>
> From: Dale B Stimson 
>
> Use i915 HWMON to display device level energy input.
>
> v2:
>   - Updated the date and kernel version in feature description

A few things to delete below but since no other changes this is:

Reviewed-by: Ashutosh Dixit 

> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon 
> b/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon
> index 9a2d10edfce8..03d71c6869d3 100644
> --- a/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon
> @@ -25,3 +25,11 @@ Contact:   dri-de...@lists.freedesktop.org
>  Description: RO. Card default power limit (default TDP setting).
>
>   Only supported for particular Intel i915 graphics platforms.
> +
> +What:/sys/devices/.../hwmon/hwmon/energy1_input
> +Date:June 2022
> +KernelVersion:   5.19

Need to update kernel version on all patches now at least to 6.0 if not
6.1.

> +static int
> +hwm_energy(struct hwm_drvdata *ddat, long *energy)
> +{
> + struct intel_uncore *uncore = ddat->uncore;
> + struct i915_hwmon *hwmon = ddat->hwmon;
> + struct hwm_energy_info *ei = >ei;
> + intel_wakeref_t wakeref;
> + i915_reg_t rgaddr;
> + u32 reg_val;
> +
> + rgaddr = hwmon->rg.energy_status_all;
> +
> + if (!i915_mmio_reg_valid(rgaddr))
> + return -EOPNOTSUPP;

Delete two lines above. Something like this is only needed if we have
i915_hwmon_energy_status_get() which we are deleting
below. hwm_energy_is_visible() takes care of making the sysfs node
invisible when something cannot be supported and has the same check.

> +int
> +i915_hwmon_energy_status_get(struct drm_i915_private *i915, long *energy)
> +{
> + struct i915_hwmon *hwmon = i915->hwmon;
> + struct hwm_drvdata *ddat = >ddat;
> +
> + return hwm_energy(ddat, energy);
> +}

Let's delete this function, there are no users for it at present.

> diff --git a/drivers/gpu/drm/i915/i915_hwmon.h 
> b/drivers/gpu/drm/i915/i915_hwmon.h
> index 7ca9cf2c34c9..4e5b6c149f3a 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.h
> +++ b/drivers/gpu/drm/i915/i915_hwmon.h
> @@ -17,4 +17,5 @@ static inline void i915_hwmon_register(struct 
> drm_i915_private *i915) { };
>  static inline void i915_hwmon_unregister(struct drm_i915_private *i915) { };
>  #endif
>
> +int i915_hwmon_energy_status_get(struct drm_i915_private *i915, long 
> *energy);

Delete.


Re: [Intel-gfx] [PATCH 3/7] drm/i915/hwmon: Power PL1 limit and TDP setting

2022-08-29 Thread Dixit, Ashutosh
On Thu, 25 Aug 2022 06:21:14 -0700, Badal Nilawar wrote:
>
> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c 
> b/drivers/gpu/drm/i915/i915_hwmon.c
> index 2192d0fd4c66..922463da65bf 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.c
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c
> @@ -13,8 +13,22 @@
>  #include "intel_mchbar_regs.h"
>  #include "gt/intel_gt_regs.h"
>
> +/*
> + * SF_* - scale factors for particular quantities according to hwmon spec.
> + * - power  - microwatts
> + */
> +#define SF_POWER 100
> +
> +#define FIELD_SHIFT(__mask)  \
> + (BUILD_BUG_ON_ZERO(!__builtin_constant_p(__mask)) + \
> + BUILD_BUG_ON_ZERO((__mask) == 0) +  \
> + __bf_shf(__mask))

Let's remove this macro, it's not needed, see below.

> +/*
> + * This function's return type of u64 allows for the case where the scaling
> + * of the field taken from the 32-bit register value might cause a result to
> + * exceed 32 bits.
> + */
> +static u64
> +hwm_field_read_and_scale(struct hwm_drvdata *ddat, i915_reg_t rgadr,
> +  u32 field_msk, int field_shift,

Let's remove field_shift arg.

> +  int nshift, u32 scale_factor)
> +{
> + struct intel_uncore *uncore = ddat->uncore;
> + intel_wakeref_t wakeref;
> + u32 reg_value;
> +
> + with_intel_runtime_pm(uncore->rpm, wakeref)
> + reg_value = intel_uncore_read(uncore, rgadr);
> +
> + reg_value = (reg_value & field_msk) >> field_shift;

This is just 'REG_FIELD_GET(field_msk, reg_value)'.

> +
> + return mul_u64_u32_shr(reg_value, scale_factor, nshift);
> +}
> +
> +static void
> +hwm_field_scale_and_write(struct hwm_drvdata *ddat, i915_reg_t rgadr,
> +   u32 field_msk, int field_shift,

Let's remove field_shift arg.

> +   int nshift, unsigned int scale_factor, long lval)
> +{
> + u32 nval;
> + u32 bits_to_clear;
> + u32 bits_to_set;
> +
> + /* Computation in 64-bits to avoid overflow. Round to nearest. */
> + nval = DIV_ROUND_CLOSEST_ULL((u64)lval << nshift, scale_factor);
> +
> + bits_to_clear = field_msk;
> + bits_to_set = (nval << field_shift) & field_msk;

This is just 'REG_FIELD_PREP(field_msk, nval)'.

> @@ -118,11 +260,40 @@ static void
>  hwm_get_preregistration_info(struct drm_i915_private *i915)
>  {
>   struct i915_hwmon *hwmon = i915->hwmon;
> + struct intel_uncore *uncore = >uncore;
> + intel_wakeref_t wakeref;
> + u32 val_sku_unit;
>
> - if (IS_DG1(i915) || IS_DG2(i915))
> + if (IS_DG1(i915) || IS_DG2(i915)) {
>   hwmon->rg.gt_perf_status = GEN12_RPSTAT1;
> - else
> + hwmon->rg.pkg_power_sku_unit = PCU_PACKAGE_POWER_SKU_UNIT;
> + hwmon->rg.pkg_power_sku = INVALID_MMIO_REG;
> + hwmon->rg.pkg_rapl_limit = PCU_PACKAGE_RAPL_LIMIT;
> + } else {
>   hwmon->rg.gt_perf_status = INVALID_MMIO_REG;
> + hwmon->rg.pkg_power_sku_unit = INVALID_MMIO_REG;
> + hwmon->rg.pkg_power_sku = INVALID_MMIO_REG;
> + hwmon->rg.pkg_rapl_limit = INVALID_MMIO_REG;
> + }
> +
> + with_intel_runtime_pm(uncore->rpm, wakeref) {
> + /*
> +  * The contents of register hwmon->rg.pkg_power_sku_unit do not 
> change,
> +  * so read it once and store the shift values.
> +  *
> +  * For some platforms, this value is defined as available "for 
> all
> +  * tiles", with the values consistent across all tiles.
> +  * In this case, use the tile 0 value for all.
> +  */

Let's delete this 2nd paragraph above, if values are available per tile we
should just be using per tile counters consistently (this is only true for
energy in our case, that patch will need to be fixed).

> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 2e3aa684cf1b..fd13411a28d9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1866,6 +1866,22 @@
>  #define   POWER_LIMIT_1_MASK REG_BIT(11)
>  #define   POWER_LIMIT_2_MASK REG_BIT(12)
>
> +/*
> + * *_PACKAGE_POWER_SKU - SKU power and timing parameters.
> + * Used herein as a 64-bit register.
> + * These masks are defined using GENMASK_ULL as REG_GENMASK is limited to u32
> + * and as GENMASK is "long" and therefore 32-bits on a 32-bit system.
> + * PKG_PKG_TDP, PKG_MIN_PWR, and PKG_MAX_PWR are scaled in the same way as
> + * PKG_PWR_LIM_*, above.
> + * PKG_MAX_WIN has sub-fields for x and y, and has the value: is 1.x * 2^y.
> + */
> +#define   PKG_PKG_TDPGENMASK_ULL(14, 0)
> +#define   PKG_MIN_PWRGENMASK_ULL(30, 16)
> +#define   PKG_MAX_PWRGENMASK_ULL(46, 32)
> +#define   PKG_MAX_WINGENMASK_ULL(54, 48)
> +#define PKG_MAX_WIN_YGENMASK_ULL(54, 53)
> +#define 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/bios: Copy the whole MIPI sequence block (rev2)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915/bios: Copy the whole MIPI sequence block (rev2)
URL   : https://patchwork.freedesktop.org/series/107896/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12046 -> Patchwork_107896v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v2/index.html

Participating hosts (37 -> 34)
--

  Additional (1): bat-dg2-8 
  Missing(4): fi-ctg-p8600 fi-hsw-4200u fi-bdw-samus bat-jsl-3 

Known issues


  Here are the changes found in Patchwork_107896v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][1] -> [INCOMPLETE][2] ([i915#4785])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12046/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v2/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12046/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v2/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-g3258:   NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v2/fi-hsw-g3258/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@runner@aborted:
- fi-hsw-4770:NOTRUN -> [FAIL][6] ([fdo#109271] / [i915#4312] / 
[i915#5594] / [i915#6246])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v2/fi-hsw-4770/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s3@smem:
- {bat-rplp-1}:   [DMESG-WARN][7] ([i915#2867]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12046/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v2/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258:   [INCOMPLETE][9] ([i915#3303] / [i915#4785]) -> 
[PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12046/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v2/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
  [i915#6246]: https://gitlab.freedesktop.org/drm/intel/issues/6246
  [i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
  [i915#6380]: https://gitlab.freedesktop.org/drm/intel/issues/6380
  [i915#6530]: https://gitlab.freedesktop.org/drm/intel/issues/6530
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6645]: 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: allow misaligned_pin test work with unmappable memory

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915/selftests: allow misaligned_pin test work with unmappable 
memory
URL   : https://patchwork.freedesktop.org/series/107760/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12025_full -> Patchwork_107760v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_107760v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_107760v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 12)
--

  Additional (2): shard-rkl shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_107760v1_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_busy@close-race:
- shard-snb:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-snb5/igt@gem_b...@close-race.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-snb5/igt@gem_b...@close-race.html

  
Known issues


  Here are the changes found in Patchwork_107760v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_eio@in-flight-suspend:
- shard-kbl:  NOTRUN -> [DMESG-WARN][3] ([i915#180])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-kbl1/igt@gem_...@in-flight-suspend.html

  * igt@gem_exec_balancer@parallel-ordering:
- shard-kbl:  NOTRUN -> [FAIL][4] ([i915#6117])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-kbl4/igt@gem_exec_balan...@parallel-ordering.html

  * igt@gem_exec_capture@capture-recoverable:
- shard-tglb: NOTRUN -> [SKIP][5] ([i915#6344])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-tglb1/igt@gem_exec_capt...@capture-recoverable.html

  * igt@gem_exec_endless@dispatch@vcs0:
- shard-tglb: [PASS][6] -> [INCOMPLETE][7] ([i915#3778])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-tglb8/igt@gem_exec_endless@dispa...@vcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-tglb7/igt@gem_exec_endless@dispa...@vcs0.html

  * igt@gem_exec_fair@basic-deadline:
- shard-kbl:  NOTRUN -> [FAIL][8] ([i915#2846])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-kbl4/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl:  NOTRUN -> [FAIL][9] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-glk1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-glk8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
- shard-tglb: [PASS][12] -> [FAIL][13] ([i915#2842])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-tglb8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-tglb6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl:  [PASS][14] -> [FAIL][15] ([i915#2842]) +2 similar 
issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-kbl1/igt@gem_exec_fair@basic-p...@vecs0.html

  * igt@gem_exec_params@no-bsd:
- shard-tglb: NOTRUN -> [SKIP][16] ([fdo#109283])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-tglb1/igt@gem_exec_par...@no-bsd.html

  * igt@gem_exec_params@secure-non-root:
- shard-tglb: NOTRUN -> [SKIP][17] ([fdo#112283])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-tglb1/igt@gem_exec_par...@secure-non-root.html

  * igt@gem_exec_reloc@basic-wc-cpu-active:
- shard-apl:  [PASS][18] -> [DMESG-WARN][19] ([i915#62]) +8 similar 
issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-apl8/igt@gem_exec_re...@basic-wc-cpu-active.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107760v1/shard-apl3/igt@gem_exec_re...@basic-wc-cpu-active.html

  * igt@gem_lmem_swapping@parallel-random-verify:
- shard-kbl:  NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#4613]) +5 
similar issues
   [20]: 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: do not try misaligned_pin test on unmappable memory

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915/selftests: do not try misaligned_pin test on unmappable memory
URL   : https://patchwork.freedesktop.org/series/107758/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12025_full -> Patchwork_107758v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 12)
--

  Additional (2): shard-rkl shard-tglu 

Known issues


  Here are the changes found in Patchwork_107758v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_eio@in-flight-contexts-immediate:
- shard-tglb: [PASS][1] -> [TIMEOUT][2] ([i915#3063])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-tglb8/igt@gem_...@in-flight-contexts-immediate.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-tglb8/igt@gem_...@in-flight-contexts-immediate.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [PASS][3] -> [SKIP][4] ([i915#4525]) +2 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-iclb2/igt@gem_exec_balan...@parallel-keep-in-fence.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-iclb7/igt@gem_exec_balan...@parallel-keep-in-fence.html

  * igt@gem_exec_balancer@parallel-ordering:
- shard-kbl:  NOTRUN -> [FAIL][5] ([i915#6117])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-kbl4/igt@gem_exec_balan...@parallel-ordering.html

  * igt@gem_exec_capture@capture-recoverable:
- shard-tglb: NOTRUN -> [SKIP][6] ([i915#6344])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-tglb5/igt@gem_exec_capt...@capture-recoverable.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl:  [PASS][7] -> [FAIL][8] ([i915#2842])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-apl3/igt@gem_exec_fair@basic-none-s...@rcs0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-apl3/igt@gem_exec_fair@basic-none-s...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl:  NOTRUN -> [FAIL][9] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl:  [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar 
issue
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html

  * igt@gem_exec_params@no-bsd:
- shard-tglb: NOTRUN -> [SKIP][12] ([fdo#109283])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-tglb5/igt@gem_exec_par...@no-bsd.html

  * igt@gem_exec_params@secure-non-root:
- shard-tglb: NOTRUN -> [SKIP][13] ([fdo#112283])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-tglb5/igt@gem_exec_par...@secure-non-root.html

  * igt@gem_lmem_swapping@parallel-random-verify:
- shard-kbl:  NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-kbl7/igt@gem_lmem_swapp...@parallel-random-verify.html

  * igt@gem_pread@exhaustion:
- shard-kbl:  NOTRUN -> [WARN][15] ([i915#2658])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-kbl1/igt@gem_pr...@exhaustion.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#4270]) +1 similar issue
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-tglb5/igt@gem_...@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_softpin@evict-snoop-interruptible:
- shard-tglb: NOTRUN -> [SKIP][17] ([fdo#109312])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-tglb6/igt@gem_soft...@evict-snoop-interruptible.html

  * igt@gem_userptr_blits@vma-merge:
- shard-kbl:  NOTRUN -> [FAIL][18] ([i915#3318])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-kbl1/igt@gem_userptr_bl...@vma-merge.html

  * igt@gen7_exec_parse@basic-rejected:
- shard-tglb: NOTRUN -> [SKIP][19] ([fdo#109289])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-tglb6/igt@gen7_exec_pa...@basic-rejected.html

  * igt@gen9_exec_parse@basic-rejected-ctx-param:
- shard-tglb: NOTRUN -> [SKIP][20] ([i915#2527] / [i915#2856]) +1 
similar issue
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107758v1/shard-tglb5/igt@gen9_exec_pa...@basic-rejected-ctx-param.html

  * igt@i915_pm_rpm@modeset-pc8-residency-stress:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/kms: Stop registering multiple /sys/class/backlight devs for a single display

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/kms: Stop registering multiple /sys/class/backlight devs for a 
single display
URL   : https://patchwork.freedesktop.org/series/107755/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12025_full -> Patchwork_107755v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 12)
--

  Additional (2): shard-rkl shard-tglu 

Known issues


  Here are the changes found in Patchwork_107755v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [PASS][1] -> [SKIP][2] ([i915#4525]) +2 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-iclb2/igt@gem_exec_balan...@parallel-keep-in-fence.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-iclb6/igt@gem_exec_balan...@parallel-keep-in-fence.html

  * igt@gem_exec_balancer@parallel-ordering:
- shard-kbl:  NOTRUN -> [FAIL][3] ([i915#6117])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-kbl7/igt@gem_exec_balan...@parallel-ordering.html

  * igt@gem_exec_capture@capture-recoverable:
- shard-tglb: NOTRUN -> [SKIP][4] ([i915#6344])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-tglb3/igt@gem_exec_capt...@capture-recoverable.html

  * igt@gem_exec_fair@basic-deadline:
- shard-kbl:  NOTRUN -> [FAIL][5] ([i915#2846])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-kbl1/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl:  [PASS][6] -> [FAIL][7] ([i915#2842]) +1 similar issue
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-apl3/igt@gem_exec_fair@basic-none-s...@rcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-apl8/igt@gem_exec_fair@basic-none-s...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][8] ([i915#2842])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-iclb2/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-none@vecs0:
- shard-kbl:  NOTRUN -> [FAIL][9] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-kbl1/igt@gem_exec_fair@basic-n...@vecs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12025/shard-glk1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-glk9/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_params@no-bsd:
- shard-tglb: NOTRUN -> [SKIP][12] ([fdo#109283])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-tglb3/igt@gem_exec_par...@no-bsd.html

  * igt@gem_exec_params@secure-non-root:
- shard-tglb: NOTRUN -> [SKIP][13] ([fdo#112283])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-tglb3/igt@gem_exec_par...@secure-non-root.html

  * igt@gem_lmem_swapping@parallel-random-verify:
- shard-kbl:  NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613]) +5 
similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-kbl7/igt@gem_lmem_swapp...@parallel-random-verify.html

  * igt@gem_pread@exhaustion:
- shard-kbl:  NOTRUN -> [WARN][15] ([i915#2658])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-kbl1/igt@gem_pr...@exhaustion.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#4270]) +1 similar issue
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-tglb3/igt@gem_...@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_softpin@evict-snoop-interruptible:
- shard-tglb: NOTRUN -> [SKIP][17] ([fdo#109312])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-tglb7/igt@gem_soft...@evict-snoop-interruptible.html

  * igt@gem_userptr_blits@vma-merge:
- shard-kbl:  NOTRUN -> [FAIL][18] ([i915#3318])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-kbl1/igt@gem_userptr_bl...@vma-merge.html

  * igt@gen7_exec_parse@basic-rejected:
- shard-tglb: NOTRUN -> [SKIP][19] ([fdo#109289])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107755v1/shard-tglb7/igt@gen7_exec_pa...@basic-rejected.html

  * igt@gen9_exec_parse@allowed-single:
- shard-glk:  [PASS][20] -> [DMESG-WARN][21] ([i915#5566] / 
[i915#716])
   [20]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for i915: Add "standalone media" support for MTL (rev2)

2022-08-29 Thread Patchwork
== Series Details ==

Series: i915: Add "standalone media" support for MTL (rev2)
URL   : https://patchwork.freedesktop.org/series/107908/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107908v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/index.html

Participating hosts (40 -> 34)
--

  Missing(6): fi-hsw-4200u bat-dg1-5 bat-adlp-4 fi-ctg-p8600 bat-dg2-11 
fi-bdw-samus 

Known issues


  Here are the changes found in Patchwork_107908v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_rpm@module-reload:
- fi-cfl-8109u:   [PASS][1] -> [DMESG-FAIL][2] ([i915#62])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-cfl-8109u/igt@i915_pm_...@module-reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/fi-cfl-8109u/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@ring_submission:
- fi-cfl-8109u:   [PASS][5] -> [DMESG-WARN][6] ([i915#5904]) +30 
similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-cfl-8109u:   [PASS][7] -> [DMESG-WARN][8] ([i915#5904] / [i915#62])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  * 
igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka:   [PASS][10] -> [FAIL][11] ([i915#6298])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [PASS][12] -> [DMESG-WARN][13] ([i915#62]) +11 
similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}:   [DMESG-WARN][14] ([i915#2867]) -> [PASS][15] +1 
similar issue
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][16] ([i915#146] / [i915#6598]) -> 
[PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v2/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
  [i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
  [i915#5904]: https://gitlab.freedesktop.org/drm/intel/issues/5904
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#6298]: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Add "standalone media" support for MTL (rev2)

2022-08-29 Thread Patchwork
== Series Details ==

Series: i915: Add "standalone media" support for MTL (rev2)
URL   : https://patchwork.freedesktop.org/series/107908/
State : warning

== Summary ==

Error: dim checkpatch failed
b89acd14d33e drm/i915: Move locking and unclaimed check into 
mmio_debug_{suspend, resume}
f45cffb31b0a drm/i915: Only hook up uncore->debug for primary uncore
56a84766b498 drm/i915: Use managed allocations for extra uncore objects
999eb6f42ba7 drm/i915: Prepare more multi-GT initialization
-:76: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written 
"gtdef->setup"
#76: FILE: drivers/gpu/drm/i915/gt/intel_gt.c:845:
+gtdef->setup != NULL;

total: 0 errors, 0 warnings, 1 checks, 145 lines checked
f0fd6fde9ebe drm/i915: Rename and expose common GT early init routine
fe239df10fe1 drm/i915/xelpmp: Expose media as another GT
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 11, in 
import git
ModuleNotFoundError: No module named 'git'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 11, in 
import git
ModuleNotFoundError: No module named 'git'
-:83: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#83: 
new file mode 100644

-:119: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written 
"!uncore->regs"
#119: FILE: drivers/gpu/drm/i915/gt/intel_sa_media.c:32:
+   if (drm_WARN_ON(>drm, uncore->regs == NULL))

total: 0 errors, 1 warnings, 1 checks, 233 lines checked
0bda84aacacf drm/i915/mtl: Use primary GT's irq lock for media GT
-:81: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#81: FILE: drivers/gpu/drm/i915/gt/intel_gt.c:795:
+   spinlock_t *irq_lock;

-:227: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#227: FILE: drivers/gpu/drm/i915/gt/intel_gt_types.h:160:
+   spinlock_t *irq_lock;

total: 0 errors, 0 warnings, 2 checks, 459 lines checked
4c2b96042803 drm/i915/mtl: Hook up interrupts for standalone media




[Intel-gfx] [PATCH v2 4/8] drm/i915: Prepare more multi-GT initialization

2022-08-29 Thread Matt Roper
We're going to introduce an additional intel_gt for MTL's media unit
soon.  Let's provide a bit more multi-GT initialization framework in
preparation for that.  The initialization will pull the list of GTs for
a platform from the device info structure.  Although necessary for the
immediate MTL media enabling, this same framework will also be used
farther down the road when we enable remote tiles on xehpsdv and pvc.

v2:
 - Re-add missing test for !HAS_EXTRA_GT_LIST in intel_gt_probe_all().

Cc: Aravind Iddamsetty 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  2 +-
 drivers/gpu/drm/i915/gt/intel_gt.c| 51 +--
 drivers/gpu/drm/i915/gt/intel_gt.h|  1 -
 drivers/gpu/drm/i915/gt/intel_gt_types.h  |  3 ++
 drivers/gpu/drm/i915/i915_drv.h   |  2 +
 drivers/gpu/drm/i915/intel_device_info.h  | 16 ++
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 +
 7 files changed, 70 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 275ad72940c1..41acc285e8bf 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -736,7 +736,7 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt 
*gt)
u16 vdbox_mask;
u16 vebox_mask;
 
-   info->engine_mask = RUNTIME_INFO(i915)->platform_engine_mask;
+   GEM_BUG_ON(!info->engine_mask);
 
if (GRAPHICS_VER(i915) < 11)
return info->engine_mask;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index cf7aab7adb30..7b880dbed6ce 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -807,17 +807,16 @@ static void
 intel_gt_tile_cleanup(struct intel_gt *gt)
 {
intel_uncore_cleanup_mmio(gt->uncore);
-
-   if (!gt_is_root(gt))
-   kfree(gt);
 }
 
 int intel_gt_probe_all(struct drm_i915_private *i915)
 {
struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
struct intel_gt *gt = >gt0;
+   const struct intel_gt_definition *gtdef;
phys_addr_t phys_addr;
unsigned int mmio_bar;
+   unsigned int i;
int ret;
 
mmio_bar = GRAPHICS_VER(i915) == 2 ? GEN2_GTTMMADR_BAR : GTTMMADR_BAR;
@@ -828,14 +827,58 @@ int intel_gt_probe_all(struct drm_i915_private *i915)
 * and it has been already initialized early during probe
 * in i915_driver_probe()
 */
+   gt->i915 = i915;
+   gt->name = "Primary GT";
+   gt->info.engine_mask = RUNTIME_INFO(i915)->platform_engine_mask;
+
+   drm_dbg(>drm, "Setting up %s\n", gt->name);
ret = intel_gt_tile_setup(gt, phys_addr);
if (ret)
return ret;
 
i915->gt[0] = gt;
 
-   /* TODO: add more tiles */
+   if (!HAS_EXTRA_GT_LIST(i915))
+   return 0;
+
+   for (i = 1, gtdef = _INFO(i915)->extra_gt_list[i - 1];
+gtdef->setup != NULL;
+i++, gtdef = _INFO(i915)->extra_gt_list[i - 1]) {
+   gt = drmm_kzalloc(>drm, sizeof(*gt), GFP_KERNEL);
+   if (!gt) {
+   ret = -ENOMEM;
+   goto err;
+   }
+
+   gt->i915 = i915;
+   gt->name = gtdef->name;
+   gt->type = gtdef->type;
+   gt->info.engine_mask = gtdef->engine_mask;
+   gt->info.id = i;
+
+   drm_dbg(>drm, "Setting up %s\n", gt->name);
+   if (GEM_WARN_ON(range_overflows_t(resource_size_t,
+ gtdef->mapping_base,
+ SZ_16M,
+ pci_resource_len(pdev, 
mmio_bar {
+   ret = -ENODEV;
+   goto err;
+   }
+
+   ret = gtdef->setup(gt, phys_addr + gtdef->mapping_base);
+   if (ret)
+   goto err;
+
+   i915->gt[i] = gt;
+   }
+
return 0;
+
+err:
+   i915_probe_error(i915, "Failed to initialize %s! (%d)\n", gtdef->name, 
ret);
+   intel_gt_release_all(i915);
+
+   return ret;
 }
 
 int intel_gt_tiles_init(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h 
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 40b06adf509a..4d8779529cc2 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -54,7 +54,6 @@ void intel_gt_driver_register(struct intel_gt *gt);
 void intel_gt_driver_unregister(struct intel_gt *gt);
 void intel_gt_driver_remove(struct intel_gt *gt);
 void intel_gt_driver_release(struct intel_gt *gt);
-
 void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
 
 int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h 

[Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Add "standalone media" support for MTL

2022-08-29 Thread Patchwork
== Series Details ==

Series: i915: Add "standalone media" support for MTL
URL   : https://patchwork.freedesktop.org/series/107908/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107908v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_107908v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_107908v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/index.html

Participating hosts (40 -> 35)
--

  Missing(5): fi-rkl-11600 fi-hsw-4200u fi-ctg-p8600 bat-jsl-3 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_107908v1:

### IGT changes ###

 Possible regressions 

  * igt@i915_module_load@load:
- fi-skl-6600u:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-skl-6600u/igt@i915_module_l...@load.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-skl-6600u/igt@i915_module_l...@load.html
- bat-dg1-5:  [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg1-5/igt@i915_module_l...@load.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/bat-dg1-5/igt@i915_module_l...@load.html
- fi-bdw-gvtdvm:  [PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-gvtdvm/igt@i915_module_l...@load.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-bdw-gvtdvm/igt@i915_module_l...@load.html
- fi-pnv-d510:[PASS][7] -> [INCOMPLETE][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_module_l...@load.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-pnv-d510/igt@i915_module_l...@load.html
- fi-snb-2520m:   [PASS][9] -> [INCOMPLETE][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-snb-2520m/igt@i915_module_l...@load.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-snb-2520m/igt@i915_module_l...@load.html
- fi-glk-j4005:   [PASS][11] -> [INCOMPLETE][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-glk-j4005/igt@i915_module_l...@load.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-glk-j4005/igt@i915_module_l...@load.html
- fi-rkl-guc: [PASS][13] -> [INCOMPLETE][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-rkl-guc/igt@i915_module_l...@load.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-rkl-guc/igt@i915_module_l...@load.html
- fi-skl-6700k2:  [PASS][15] -> [INCOMPLETE][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-skl-6700k2/igt@i915_module_l...@load.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-skl-6700k2/igt@i915_module_l...@load.html
- fi-kbl-7567u:   [PASS][17] -> [INCOMPLETE][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-kbl-7567u/igt@i915_module_l...@load.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-kbl-7567u/igt@i915_module_l...@load.html
- fi-cfl-8700k:   [PASS][19] -> [INCOMPLETE][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-cfl-8700k/igt@i915_module_l...@load.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-cfl-8700k/igt@i915_module_l...@load.html
- fi-elk-e7500:   [PASS][21] -> [INCOMPLETE][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-elk-e7500/igt@i915_module_l...@load.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-elk-e7500/igt@i915_module_l...@load.html
- fi-hsw-g3258:   [PASS][23] -> [INCOMPLETE][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-hsw-g3258/igt@i915_module_l...@load.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-hsw-g3258/igt@i915_module_l...@load.html
- fi-bsw-kefka:   [PASS][25] -> [INCOMPLETE][26]
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bsw-kefka/igt@i915_module_l...@load.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-bsw-kefka/igt@i915_module_l...@load.html
- fi-adl-ddr5:[PASS][27] -> [INCOMPLETE][28]
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-adl-ddr5/igt@i915_module_l...@load.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107908v1/fi-adl-ddr5/igt@i915_module_l...@load.html
- fi-cfl-guc: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Add "standalone media" support for MTL

2022-08-29 Thread Patchwork
== Series Details ==

Series: i915: Add "standalone media" support for MTL
URL   : https://patchwork.freedesktop.org/series/107908/
State : warning

== Summary ==

Error: dim checkpatch failed
2d07e36f0a4f drm/i915: Move locking and unclaimed check into 
mmio_debug_{suspend, resume}
943c8e30fc24 drm/i915: Only hook up uncore->debug for primary uncore
005c7f1709b6 drm/i915: Use managed allocations for extra uncore objects
001d8b25313a drm/i915: Prepare more multi-GT initialization
-:70: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written 
"gtdef->setup"
#70: FILE: drivers/gpu/drm/i915/gt/intel_gt.c:842:
+gtdef->setup != NULL;

total: 0 errors, 0 warnings, 1 checks, 142 lines checked
6e44c6e54b94 drm/i915: Rename and expose common GT early init routine
2c5537309641 drm/i915/xelpmp: Expose media as another GT
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in 
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in 
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:83: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#83: 
new file mode 100644

-:119: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written 
"!uncore->regs"
#119: FILE: drivers/gpu/drm/i915/gt/intel_sa_media.c:32:
+   if (drm_WARN_ON(>drm, uncore->regs == NULL))

total: 0 errors, 1 warnings, 1 checks, 233 lines checked
06eba434c957 drm/i915/mtl: Use primary GT's irq lock for media GT
-:81: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#81: FILE: drivers/gpu/drm/i915/gt/intel_gt.c:795:
+   spinlock_t *irq_lock;

-:227: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#227: FILE: drivers/gpu/drm/i915/gt/intel_gt_types.h:160:
+   spinlock_t *irq_lock;

total: 0 errors, 0 warnings, 2 checks, 459 lines checked
3be80c873513 drm/i915/mtl: Hook up interrupts for standalone media




[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Fix warning callstack for imbalance wakeref (rev6)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915/display: Fix warning callstack for imbalance wakeref (rev6)
URL   : https://patchwork.freedesktop.org/series/107211/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107211v6


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/index.html

Participating hosts (40 -> 35)
--

  Missing(5): fi-rkl-11600 fi-hsw-4200u fi-cfl-8700k fi-ctg-p8600 
fi-bdw-samus 

Known issues


  Here are the changes found in Patchwork_107211v6 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][1] -> [INCOMPLETE][2] ([i915#4785])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s3@smem:
- {bat-rplp-1}:   [DMESG-WARN][6] ([i915#2867]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_pm:
- bat-adlp-4: [DMESG-FAIL][8] ([i915#3987]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-adlp-4/igt@i915_selftest@live@gt_pm.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/bat-adlp-4/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][10] ([i915#146] / [i915#6598]) -> 
[PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
 Warnings 

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  [DMESG-FAIL][12] ([i915#4957]) -> [DMESG-FAIL][13] 
([i915#4494] / [i915#4957])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
  [i915#6380]: https://gitlab.freedesktop.org/drm/intel/issues/6380
  [i915#6523]: https://gitlab.freedesktop.org/drm/intel/issues/6523
  [i915#6530]: https://gitlab.freedesktop.org/drm/intel/issues/6530
  [i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598


Build changes
-

  * Linux: CI_DRM_12044 -> Patchwork_107211v6

  CI-20190529: 20190529
  CI_DRM_12044: 287ad23d60ce7aa8befbe8dd1fea6fb705bd08ac @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6637: a23e8aed0b54018339647d0817267431bd2b7075 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_107211v6: 287ad23d60ce7aa8befbe8dd1fea6fb705bd08ac @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

09dbe6ddc537 drm/i915/display: Fix warning callstack for imbalance wakeref

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107211v6/index.html


[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add HWMON support (rev5)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915: Add HWMON support (rev5)
URL   : https://patchwork.freedesktop.org/series/104278/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12024_full -> Patchwork_104278v5_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_104278v5_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_104278v5_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 12)
--

  Additional (1): shard-rkl 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_104278v5_full:

### IGT changes ###

 Possible regressions 

  * igt@perf_pmu@rc6-suspend:
- shard-iclb: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-iclb6/igt@perf_...@rc6-suspend.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-iclb2/igt@perf_...@rc6-suspend.html

  
Known issues


  Here are the changes found in Patchwork_104278v5_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-glk:  ([PASS][3], [PASS][4], [PASS][5], [PASS][6], 
[PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], 
[PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], 
[PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], 
[PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], 
[PASS][31], [PASS][32], [FAIL][33], [PASS][34], [PASS][35], [PASS][36], 
[PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], 
[PASS][43], [PASS][44], [PASS][45], [FAIL][46], [PASS][47], [PASS][48], 
[PASS][49], [PASS][50]) ([i915#4392])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk2/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk2/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk2/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk3/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk3/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk3/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk5/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk5/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk5/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk6/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk6/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk6/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk6/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk7/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk7/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk7/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk8/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk8/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk8/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk9/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk9/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk9/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk9/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk1/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk1/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk1/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk1/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk2/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk2/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk3/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk3/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk3/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk5/boot.html
   [36]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104278v5/shard-glk5/boot.html
   [37]: 

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/bios: Copy the whole MIPI sequence block

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915/bios: Copy the whole MIPI sequence block
URL   : https://patchwork.freedesktop.org/series/107896/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107896v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_107896v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_107896v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/index.html

Participating hosts (40 -> 36)
--

  Missing(4): fi-ctg-p8600 bat-dg2-10 fi-bdw-samus fi-hsw-4200u 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_107896v1:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_suspend@basic-s0@smem:
- fi-skl-6600u:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-skl-6600u/igt@gem_exec_suspend@basic...@smem.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/fi-skl-6600u/igt@gem_exec_suspend@basic...@smem.html

  
Known issues


  Here are the changes found in Patchwork_107896v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}:   [DMESG-WARN][6] ([i915#2867]) -> [PASS][7] +1 similar 
issue
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_pm:
- bat-adlp-4: [DMESG-FAIL][8] ([i915#3987]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-adlp-4/igt@i915_selftest@live@gt_pm.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/bat-adlp-4/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@reset:
- {bat-rpls-1}:   [DMESG-FAIL][10] ([i915#4983] / [i915#5828]) -> 
[PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rpls-1/igt@i915_selftest@l...@reset.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/bat-rpls-1/igt@i915_selftest@l...@reset.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][12] ([i915#146] / [i915#6598]) -> 
[PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
 Warnings 

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  [DMESG-FAIL][14] ([i915#4957]) -> [DMESG-FAIL][15] 
([i915#4494] / [i915#4957])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107896v1/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
  [i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598


Build changes
-

  * Linux: CI_DRM_12044 -> Patchwork_107896v1

  CI-20190529: 20190529
  CI_DRM_12044: 

[Intel-gfx] ✓ Fi.CI.BAT: success for Add DP MST DSC support to i915 (rev10)

2022-08-29 Thread Patchwork
== Series Details ==

Series: Add DP MST DSC support to i915 (rev10)
URL   : https://patchwork.freedesktop.org/series/101492/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_101492v10


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/index.html

Participating hosts (40 -> 36)
--

  Missing(4): fi-ctg-p8600 fi-rkl-11600 fi-bdw-samus fi-hsw-4200u 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_101492v10:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@hugepages:
- {bat-dg2-10}:   NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/bat-dg2-10/igt@i915_selftest@l...@hugepages.html

  
Known issues


  Here are the changes found in Patchwork_101492v10 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][2] -> [DMESG-FAIL][3] ([i915#4528])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][4] ([fdo#109271] / [fdo#111827])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  * 
igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka:   [PASS][5] -> [FAIL][6] ([i915#6298])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}:   [DMESG-WARN][7] ([i915#2867]) -> [PASS][8] +1 similar 
issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@coherency:
- {bat-dg2-10}:   [DMESG-FAIL][9] -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg2-10/igt@i915_selftest@l...@coherency.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/bat-dg2-10/igt@i915_selftest@l...@coherency.html

  * igt@i915_selftest@live@gt_pm:
- bat-adlp-4: [DMESG-FAIL][11] ([i915#3987]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-adlp-4/igt@i915_selftest@live@gt_pm.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/bat-adlp-4/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][13] ([i915#146] / [i915#6598]) -> 
[PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_101492v10/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6565]: https://gitlab.freedesktop.org/drm/intel/issues/6565
  [i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598


Build changes
-

  * Linux: CI_DRM_12044 -> Patchwork_101492v10

  CI-20190529: 20190529
  CI_DRM_12044: 287ad23d60ce7aa8befbe8dd1fea6fb705bd08ac @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6637: a23e8aed0b54018339647d0817267431bd2b7075 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_101492v10: 287ad23d60ce7aa8befbe8dd1fea6fb705bd08ac @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

1a408a1aa455 drm/i915: Extract drm_dp_atomic_find_vcpi_slots cycle 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add DP MST DSC support to i915 (rev10)

2022-08-29 Thread Patchwork
== Series Details ==

Series: Add DP MST DSC support to i915 (rev10)
URL   : https://patchwork.freedesktop.org/series/101492/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DP MST DSC support to i915 (rev10)

2022-08-29 Thread Patchwork
== Series Details ==

Series: Add DP MST DSC support to i915 (rev10)
URL   : https://patchwork.freedesktop.org/series/101492/
State : warning

== Summary ==

Error: dim checkpatch failed
ded7d35c7112 drm: Add missing DP DSC extended capability definitions.
e15a191fd540 drm/i915: Fix intel_dp_mst_compute_link_config
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#6: 
We currently always exit that bpp loop because drm_dp_atomic_find_vcpi_slots

total: 0 errors, 1 warnings, 0 checks, 30 lines checked
66422796eb1a drm/i915: Add DSC support to MST path
178b526eb821 drm/i915: Extract drm_dp_atomic_find_vcpi_slots cycle to separate 
function
-:85: CHECK:LINE_SPACING: Please don't use multiple blank lines
#85: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:116:
+
+

total: 0 errors, 0 warnings, 1 checks, 145 lines checked




[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm: Analog TV Improvements

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm: Analog TV Improvements
URL   : https://patchwork.freedesktop.org/series/107892/
State : failure

== Summary ==

Error: make failed
  CALLscripts/checksyscalls.sh
  CALLscripts/atomic/check-atomics.sh
  DESCEND objtool
  CHK include/generated/compile.h
  CC  drivers/gpu/drm/drm_connector.o
drivers/gpu/drm/drm_connector.c:1030:1: error: expected ‘;’ before ‘static’
 static const struct drm_prop_enum_list drm_tv_select_enum_list[] = {
 ^~
In file included from ./include/linux/cpumask.h:10,
 from ./include/linux/smp.h:13,
 from ./include/linux/lockdep.h:14,
 from ./include/linux/radix-tree.h:14,
 from ./include/linux/idr.h:15,
 from ./include/drm/drm_auth.h:31,
 from drivers/gpu/drm/drm_connector.c:23:
drivers/gpu/drm/drm_connector.c: In function ‘drm_get_tv_select_name’:
drivers/gpu/drm/drm_connector.c:1037:42: error: ‘drm_tv_select_enum_list’ 
undeclared (first use in this function); did you mean 
‘drm_dvi_i_select_enum_list’?
 DRM_ENUM_NAME_FN(drm_get_tv_select_name, drm_tv_select_enum_list)
  ^~~
./include/linux/kernel.h:55:33: note: in definition of macro ‘ARRAY_SIZE’
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
 ^~~
drivers/gpu/drm/drm_connector.c:1037:1: note: in expansion of macro 
‘DRM_ENUM_NAME_FN’
 DRM_ENUM_NAME_FN(drm_get_tv_select_name, drm_tv_select_enum_list)
 ^~~~
drivers/gpu/drm/drm_connector.c:1037:42: note: each undeclared identifier is 
reported only once for each function it appears in
 DRM_ENUM_NAME_FN(drm_get_tv_select_name, drm_tv_select_enum_list)
  ^~~
./include/linux/kernel.h:55:33: note: in definition of macro ‘ARRAY_SIZE’
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
 ^~~
drivers/gpu/drm/drm_connector.c:1037:1: note: in expansion of macro 
‘DRM_ENUM_NAME_FN’
 DRM_ENUM_NAME_FN(drm_get_tv_select_name, drm_tv_select_enum_list)
 ^~~~
In file included from ./include/linux/bits.h:22,
 from ./include/linux/bitops.h:6,
 from ./include/linux/radix-tree.h:11,
 from ./include/linux/idr.h:15,
 from ./include/drm/drm_auth.h:31,
 from drivers/gpu/drm/drm_connector.c:23:
./include/linux/build_bug.h:16:51: error: bit-field ‘’ width not an 
integer constant
 #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
   ^
./include/linux/compiler.h:240:28: note: in expansion of macro 
‘BUILD_BUG_ON_ZERO’
 #define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
^
./include/linux/kernel.h:55:59: note: in expansion of macro ‘__must_be_array’
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
   ^~~
./include/drm/drm_mode_object.h:114:19: note: in expansion of macro ‘ARRAY_SIZE’
   for (i = 0; i < ARRAY_SIZE(list); i++) { \
   ^~
drivers/gpu/drm/drm_connector.c:1037:1: note: in expansion of macro 
‘DRM_ENUM_NAME_FN’
 DRM_ENUM_NAME_FN(drm_get_tv_select_name, drm_tv_select_enum_list)
 ^~~~
drivers/gpu/drm/drm_connector.c: In function 
‘drm_mode_create_tv_properties_legacy’:
drivers/gpu/drm/drm_connector.c:1718:8: error: ‘drm_tv_select_enum_list’ 
undeclared (first use in this function); did you mean 
‘drm_dvi_i_select_enum_list’?
drm_tv_select_enum_list,
^~~
drm_dvi_i_select_enum_list
In file included from ./include/linux/bits.h:22,
 from ./include/linux/bitops.h:6,
 from ./include/linux/radix-tree.h:11,
 from ./include/linux/idr.h:15,
 from ./include/drm/drm_auth.h:31,
 from drivers/gpu/drm/drm_connector.c:23:
./include/linux/build_bug.h:16:51: error: bit-field ‘’ width not an 
integer constant
 #define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
   ^
./include/linux/compiler.h:240:28: note: in expansion of macro 
‘BUILD_BUG_ON_ZERO’
 #define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
^
./include/linux/kernel.h:55:59: note: in expansion of macro ‘__must_be_array’
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
   ^~~
drivers/gpu/drm/drm_connector.c:1719:8: note: in expansion of macro ‘ARRAY_SIZE’
ARRAY_SIZE(drm_tv_select_enum_list));
^~
scripts/Makefile.build:249: recipe for 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add display sub-struct to drm_i915_private (rev3)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915: add display sub-struct to drm_i915_private (rev3)
URL   : https://patchwork.freedesktop.org/series/107170/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107170v3


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/index.html

Participating hosts (40 -> 37)
--

  Missing(3): fi-ctg-p8600 fi-bdw-samus fi-hsw-4200u 

Known issues


  Here are the changes found in Patchwork_107170v3 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][1] -> [INCOMPLETE][2] ([i915#4785])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@runner@aborted:
- fi-hsw-4770:NOTRUN -> [FAIL][6] ([fdo#109271] / [i915#4312] / 
[i915#5594] / [i915#6246])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/fi-hsw-4770/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}:   [DMESG-WARN][7] ([i915#2867]) -> [PASS][8] +1 similar 
issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_pm:
- bat-adlp-4: [DMESG-FAIL][9] ([i915#3987]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-adlp-4/igt@i915_selftest@live@gt_pm.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/bat-adlp-4/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][11] ([i915#146] / [i915#6598]) -> 
[PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
 Warnings 

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  [DMESG-FAIL][13] ([i915#4957]) -> [DMESG-FAIL][14] 
([i915#4494] / [i915#4957])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107170v3/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
  [i915#6246]: https://gitlab.freedesktop.org/drm/intel/issues/6246
  [i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
  [i915#6380]: https://gitlab.freedesktop.org/drm/intel/issues/6380
  [i915#6523]: https://gitlab.freedesktop.org/drm/intel/issues/6523
  [i915#6530]: https://gitlab.freedesktop.org/drm/intel/issues/6530
  [i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598


Build changes
-

  * Linux: CI_DRM_12044 -> Patchwork_107170v3

  CI-20190529: 20190529
  CI_DRM_12044: 287ad23d60ce7aa8befbe8dd1fea6fb705bd08ac @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6637: a23e8aed0b54018339647d0817267431bd2b7075 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: add display sub-struct to drm_i915_private (rev3)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915: add display sub-struct to drm_i915_private (rev3)
URL   : https://patchwork.freedesktop.org/series/107170/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: add display sub-struct to drm_i915_private (rev3)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915: add display sub-struct to drm_i915_private (rev3)
URL   : https://patchwork.freedesktop.org/series/107170/
State : warning

== Summary ==

Error: dim checkpatch failed
b9427de47e84 drm/i915: move and group hdcp under display.hdcp
38c5ef38c07f drm/i915: move and group max_bw and bw_obj under display.bw
188be8254ff5 drm/i915: move opregion to display.opregion
4a5d9830abcd drm/i915: move and group cdclk under display.cdclk
-:43: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#43: FILE: drivers/gpu/drm/i915/display/intel_audio.c:974:
+   get_aud_ts_cdclk_m_n(i915->display.cdclk.hw.ref, 
i915->display.cdclk.hw.cdclk, _ts);

-:704: WARNING:LONG_LINE: line length of 120 exceeds 100 columns
#704: FILE: drivers/gpu/drm/i915/display/intel_cdclk.h:80:
+   to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, 
_i915(state->base.dev)->display.cdclk.obj))

-:707: WARNING:LONG_LINE: line length of 120 exceeds 100 columns
#707: FILE: drivers/gpu/drm/i915/display/intel_cdclk.h:82:
+   to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, 
_i915(state->base.dev)->display.cdclk.obj))

-:735: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#735: FILE: drivers/gpu/drm/i915/display/intel_display.c:8401:
+   cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw;

total: 0 errors, 3 warnings, 1 checks, 815 lines checked
dc34d78592ca drm/i915: move backlight to display.backlight
0f8dc6218ed1 drm/i915: move mipi_mmio_base to display.dsi
5b04974fa687 drm/i915: move vbt to display.vbt
-:124: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#124: FILE: drivers/gpu/drm/i915/display/intel_bios.c:1157:
+   i915->display.vbt.override_afc_startup_val = 
general->afc_startup_config == 0x1 ? 0x0 : 0x7;

-:931: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#931: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2773:
+   pll_state->div0 = 
TGL_DPLL0_DIV0_AFC_STARTUP(i915->display.vbt.override_afc_startup_val);

total: 0 errors, 2 warnings, 0 checks, 1031 lines checked
dde24b693f2b drm/i915: move fbc to display.fbc
ee6883528cb3 drm/i915: move and group power related members under display.power
-:388: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#388: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:1916:
+   
  POWER_DOMAIN_INIT);

-:403: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#403: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:1942:
+   
fetch_and_zero(>display.power.domains.disable_wakeref));

-:448: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#448: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:2063:
+   
fetch_and_zero(>display.power.domains.disable_wakeref));

total: 0 errors, 3 warnings, 0 checks, 685 lines checked
a10ed581da9a drm/i915: move and group fdi members under display.fdi
9ac4a6704fb4 drm/i915: move fb_tracking under display sub-struct
-:27: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#27: FILE: drivers/gpu/drm/i915/display/intel_display_core.h:124:
+   spinlock_t lock;

-:33: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#33: FILE: drivers/gpu/drm/i915/display/intel_display_core.h:130:
+   unsigned busy_bits;

-:34: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#34: FILE: drivers/gpu/drm/i915/display/intel_display_core.h:131:
+   unsigned flip_bits;

total: 0 errors, 2 warnings, 1 checks, 200 lines checked
cee54e8c5f62 drm/i915: move dbuf under display sub-struct
-:182: WARNING:LONG_LINE: line length of 118 exceeds 100 columns
#182: FILE: drivers/gpu/drm/i915/intel_pm.h:80:
+   to_intel_dbuf_state(intel_atomic_get_old_global_obj_state(state, 
_i915(state->base.dev)->display.dbuf.obj))

-:185: WARNING:LONG_LINE: line length of 118 exceeds 100 columns
#185: FILE: drivers/gpu/drm/i915/intel_pm.h:82:
+   to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state, 
_i915(state->base.dev)->display.dbuf.obj))

total: 0 errors, 2 warnings, 0 checks, 136 lines checked
d01d1ea53004 drm/i915: move and group modeset_wq and flip_wq under display.wq
649d16ff4f98 drm/i915/quirks: abstract checking for display quirks
-:40: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#40: FILE: drivers/gpu/drm/i915/display/intel_backlight.c:132:
+   (dev_priv->params.invert_brightness == 0 && 
intel_has_quirk(dev_priv, QUIRK_INVERT_BRIGHTNESS)))

total: 0 errors, 1 warnings, 0 checks, 105 lines checked
18f3f330cd08 drm/i915/quirks: abstract quirks further by making quirk ids an 
enum
9cb21285a019 drm/i915: move quirks under display sub-struct
0b5f46827012 drm/i915: move atomic_helper under display sub-struct
69ef45caaf55 drm/i915: move 

[Intel-gfx] ✓ Fi.CI.BAT: success for Move all drivers to a common dma-buf locking convention

2022-08-29 Thread Patchwork
== Series Details ==

Series: Move all drivers to a common dma-buf locking convention
URL   : https://patchwork.freedesktop.org/series/107884/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107884v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/index.html

Participating hosts (40 -> 35)
--

  Missing(5): fi-hsw-4200u fi-adl-ddr5 fi-ctg-p8600 bat-jsl-3 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_107884v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@dmabuf:
- {bat-dg2-10}:   [PASS][1] -> [DMESG-FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg2-10/igt@i915_selftest@l...@dmabuf.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/bat-dg2-10/igt@i915_selftest@l...@dmabuf.html

  
Known issues


  Here are the changes found in Patchwork_107884v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@execlists:
- fi-bdw-gvtdvm:  [PASS][3] -> [INCOMPLETE][4] ([i915#2940])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-gvtdvm/igt@i915_selftest@l...@execlists.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/fi-bdw-gvtdvm/igt@i915_selftest@l...@execlists.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258:   [PASS][5] -> [INCOMPLETE][6] ([i915#3303] / 
[i915#4785])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-bdw-5557u:   NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html

  * 
igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka:   [PASS][8] -> [FAIL][9] ([i915#6298])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html

  * igt@runner@aborted:
- fi-hsw-g3258:   NOTRUN -> [FAIL][10] ([fdo#109271] / [i915#4312] / 
[i915#6246])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/fi-hsw-g3258/igt@run...@aborted.html
- fi-bdw-gvtdvm:  NOTRUN -> [FAIL][11] ([i915#4312])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/fi-bdw-gvtdvm/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}:   [DMESG-WARN][12] ([i915#2867]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_pm:
- bat-adlp-4: [DMESG-FAIL][14] ([i915#3987]) -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-adlp-4/igt@i915_selftest@live@gt_pm.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/bat-adlp-4/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  [DMESG-FAIL][16] ([i915#4957]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@reset:
- {bat-rpls-1}:   [DMESG-FAIL][18] ([i915#4983] / [i915#5828]) -> 
[PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rpls-1/igt@i915_selftest@l...@reset.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/bat-rpls-1/igt@i915_selftest@l...@reset.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][20] ([i915#146] / [i915#6598]) -> 
[PASS][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107884v1/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
  {name}: This element is suppressed. This means it 

[Intel-gfx] ✓ Fi.CI.IGT: success for DGFX mmap with rpm (rev2)

2022-08-29 Thread Patchwork
== Series Details ==

Series: DGFX mmap with rpm (rev2)
URL   : https://patchwork.freedesktop.org/series/107400/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12024_full -> Patchwork_107400v2_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Known issues


  Here are the changes found in Patchwork_107400v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [PASS][1] -> [SKIP][2] ([i915#4525]) +2 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-iclb2/igt@gem_exec_balan...@parallel-bb-first.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-iclb8/igt@gem_exec_balan...@parallel-bb-first.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-tglb: [PASS][3] -> [FAIL][4] ([i915#2842]) +1 similar issue
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-tglb6/igt@gem_exec_fair@basic-none-...@rcs0.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-tglb7/igt@gem_exec_fair@basic-none-...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][5] ([i915#2842])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-iclb1/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl:  [PASS][6] -> [FAIL][7] ([i915#2842]) +2 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-kbl4/igt@gem_exec_fair@basic-p...@rcs0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-kbl7/igt@gem_exec_fair@basic-p...@rcs0.html
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2876])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-tglb6/igt@gem_exec_fair@basic-p...@rcs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-tglb3/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_lmem_swapping@verify-random-ccs:
- shard-kbl:  NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#4613])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-kbl1/igt@gem_lmem_swapp...@verify-random-ccs.html

  * igt@gem_userptr_blits@input-checking:
- shard-glk:  NOTRUN -> [DMESG-WARN][11] ([i915#4991])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-glk7/igt@gem_userptr_bl...@input-checking.html

  * igt@i915_pm_rpm@dpms-lpsp:
- shard-kbl:  NOTRUN -> [SKIP][12] ([fdo#109271]) +27 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-kbl7/igt@i915_pm_...@dpms-lpsp.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-0:
- shard-snb:  [PASS][13] -> [SKIP][14] ([fdo#109271])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-snb2/igt@kms_big...@x-tiled-64bpp-rotate-0.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-snb2/igt@kms_big...@x-tiled-64bpp-rotate-0.html

  * igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
- shard-apl:  NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#3886])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-apl8/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- shard-kbl:  NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3886])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-kbl7/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-glk:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#3886]) +4 
similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-glk7/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-edid-change-during-suspend:
- shard-glk:  NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +4 
similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-glk7/igt@kms_chamel...@dp-edid-change-during-suspend.html

  * igt@kms_chamelium@hdmi-mode-timings:
- shard-kbl:  NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +1 
similar issue
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v2/shard-kbl7/igt@kms_chamel...@hdmi-mode-timings.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk:  [PASS][20] -> [FAIL][21] ([i915#2122])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12024/shard-glk6/igt@kms_flip@2x-plain-flip-fb-recreate-interrupti...@ab-hdmi-a1-hdmi-a2.html
   [21]: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Move all drivers to a common dma-buf locking convention

2022-08-29 Thread Patchwork
== Series Details ==

Series: Move all drivers to a common dma-buf locking convention
URL   : https://patchwork.freedesktop.org/series/107884/
State : warning

== Summary ==

Error: dim checkpatch failed
95c5249c37bb dma-buf: Add _unlocked postfix to function names
-:770: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#770: FILE: drivers/infiniband/core/umem_dmabuf.c:153:
+   umem_dmabuf->attach = dma_buf_dynamic_attach_unlocked(

-:1101: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct 
dma_buf_attachment *' should also have an identifier name
#1101: FILE: include/linux/dma-buf.h:623:
+struct sg_table *dma_buf_map_attachment_unlocked(struct dma_buf_attachment *,

-:1103: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct 
dma_buf_attachment *' should also have an identifier name
#1103: FILE: include/linux/dma-buf.h:625:
+void dma_buf_unmap_attachment_unlocked(struct dma_buf_attachment *,

-:1103: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct 
sg_table *' should also have an identifier name
#1103: FILE: include/linux/dma-buf.h:625:
+void dma_buf_unmap_attachment_unlocked(struct dma_buf_attachment *,

-:1117: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct 
dma_buf *' should also have an identifier name
#1117: FILE: include/linux/dma-buf.h:635:
+int dma_buf_mmap_unlocked(struct dma_buf *, struct vm_area_struct *,

-:1117: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct 
vm_area_struct *' should also have an identifier name
#1117: FILE: include/linux/dma-buf.h:635:
+int dma_buf_mmap_unlocked(struct dma_buf *, struct vm_area_struct *,

-:1117: WARNING:FUNCTION_ARGUMENTS: function definition argument 'unsigned 
long' should also have an identifier name
#1117: FILE: include/linux/dma-buf.h:635:
+int dma_buf_mmap_unlocked(struct dma_buf *, struct vm_area_struct *,

total: 0 errors, 6 warnings, 1 checks, 930 lines checked
ef7c7ae61fc1 dma-buf: Add locked variant of dma_buf_vmap/vunmap()
45c3f7da798e drm/gem: Take reservation lock for vmap/vunmap operations
d3cf2e46efe0 dma-buf: Move dma_buf_vmap/vunmap_unlocked() to dynamic locking 
specification
10a7c6c7933c dma-buf: Move dma_buf_mmap_unlocked() to dynamic locking 
specification
bcf19d059221 dma-buf: Move dma-buf attachment to dynamic locking specification
-:387: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct 
dma_buf_attachment *' should also have an identifier name
#387: FILE: include/linux/dma-buf.h:629:
+struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *,

total: 0 errors, 1 warnings, 0 checks, 331 lines checked
d260753b3e2c dma-buf: Document dynamic locking convention
ed8551958b67 media: videobuf2: Stop using internal dma-buf lock
1738dcaeddcf dma-buf: Remove internal lock




[Intel-gfx] [PATCH 7/8] drm/i915/mtl: Use primary GT's irq lock for media GT

2022-08-29 Thread Matt Roper
When we hook up interrupts (in the next patch), interrupts for the media
GT are still processed as part of the primary GT's interrupt flow.  As
such, we should share the same IRQ lock with the primary GT.  Let's
convert gt->irq_lock into a pointer and just point the media GT's
instance at the same lock the primary GT is using.

Cc: Daniele Ceraolo Spurio 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  8 +++---
 drivers/gpu/drm/i915/gt/intel_gt.c| 15 +--
 drivers/gpu/drm/i915/gt/intel_gt.h|  2 +-
 drivers/gpu/drm/i915/gt/intel_gt_irq.c| 16 ++--
 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c |  8 +++---
 drivers/gpu/drm/i915/gt/intel_gt_types.h  |  2 +-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 26 +--
 drivers/gpu/drm/i915/gt/intel_sa_media.c  |  1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.c| 24 -
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  4 +--
 drivers/gpu/drm/i915/gt/uc/intel_uc.c |  4 +--
 drivers/gpu/drm/i915/i915_driver.c|  4 ++-
 drivers/gpu/drm/i915/i915_irq.c   |  4 +--
 drivers/gpu/drm/i915/pxp/intel_pxp.c  |  4 +--
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c  | 14 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_session.c  |  4 +--
 16 files changed, 77 insertions(+), 63 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 41acc285e8bf..6e0122b3dca2 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1688,9 +1688,9 @@ bool intel_engine_irq_enable(struct intel_engine_cs 
*engine)
return false;
 
/* Caller disables interrupts */
-   spin_lock(>gt->irq_lock);
+   spin_lock(engine->gt->irq_lock);
engine->irq_enable(engine);
-   spin_unlock(>gt->irq_lock);
+   spin_unlock(engine->gt->irq_lock);
 
return true;
 }
@@ -1701,9 +1701,9 @@ void intel_engine_irq_disable(struct intel_engine_cs 
*engine)
return;
 
/* Caller disables interrupts */
-   spin_lock(>gt->irq_lock);
+   spin_lock(engine->gt->irq_lock);
engine->irq_disable(engine);
-   spin_unlock(>gt->irq_lock);
+   spin_unlock(engine->gt->irq_lock);
 }
 
 void intel_engines_reset_default_submission(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 2a29502289cb..b974a6d23281 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -37,7 +37,7 @@
 
 void intel_gt_common_init_early(struct intel_gt *gt)
 {
-   spin_lock_init(>irq_lock);
+   spin_lock_init(gt->irq_lock);
 
INIT_LIST_HEAD(>closed_vma);
spin_lock_init(>closed_lock);
@@ -58,14 +58,19 @@ void intel_gt_common_init_early(struct intel_gt *gt)
 }
 
 /* Preliminary initialization of Tile 0 */
-void intel_root_gt_init_early(struct drm_i915_private *i915)
+int intel_root_gt_init_early(struct drm_i915_private *i915)
 {
struct intel_gt *gt = to_gt(i915);
 
gt->i915 = i915;
gt->uncore = >uncore;
+   gt->irq_lock = drmm_kzalloc(>drm, sizeof(*gt->irq_lock), 
GFP_KERNEL);
+   if (!gt->irq_lock)
+   return -ENOMEM;
 
intel_gt_common_init_early(gt);
+
+   return 0;
 }
 
 static int intel_gt_probe_lmem(struct intel_gt *gt)
@@ -787,12 +792,18 @@ static int intel_gt_tile_setup(struct intel_gt *gt,
 
if (!gt_is_root(gt)) {
struct intel_uncore *uncore;
+   spinlock_t *irq_lock;
 
uncore = drmm_kzalloc(>i915->drm, sizeof(*uncore), 
GFP_KERNEL);
if (!uncore)
return -ENOMEM;
 
+   irq_lock = drmm_kzalloc(>i915->drm, sizeof(*irq_lock), 
GFP_KERNEL);
+   if (!irq_lock)
+   return -ENOMEM;
+
gt->uncore = uncore;
+   gt->irq_lock = irq_lock;
 
intel_gt_common_init_early(gt);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h 
b/drivers/gpu/drm/i915/gt/intel_gt.h
index c9a359f35d0f..2ee582e287c8 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -45,7 +45,7 @@ static inline struct intel_gt *gsc_to_gt(struct intel_gsc 
*gsc)
 }
 
 void intel_gt_common_init_early(struct intel_gt *gt);
-void intel_root_gt_init_early(struct drm_i915_private *i915);
+int intel_root_gt_init_early(struct drm_i915_private *i915);
 int intel_gt_assign_ggtt(struct intel_gt *gt);
 int intel_gt_init_mmio(struct intel_gt *gt);
 int __must_check intel_gt_init_hw(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c 
b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 3a72d4fd0214..0dfd0c42d00d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -29,7 +29,7 @@ 

[Intel-gfx] [PATCH 8/8] drm/i915/mtl: Hook up interrupts for standalone media

2022-08-29 Thread Matt Roper
Top-level handling of standalone media interrupts will be processed as
part of the primary GT's interrupt handler (since primary and media GTs
share an MMIO space, unlike remote tile setups).  When we get down to
the point of handling engine interrupts, we need to take care to lookup
VCS and VECS engines in the media GT rather than the primary.

There are also a couple of additional "other" instance bits that
correspond to the media GT's GuC and media GT's power management
interrupts; we need to direct those to the media GT instance as well.

Bspec: 45605
Cc: Anusha Srivatsa 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/gt/intel_gt_irq.c   | 19 +++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h  |  2 ++
 drivers/gpu/drm/i915/gt/intel_sa_media.c |  7 +++
 drivers/gpu/drm/i915/i915_drv.h  |  3 +++
 4 files changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c 
b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 0dfd0c42d00d..f26882fdc24c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -59,11 +59,17 @@ static void
 gen11_other_irq_handler(struct intel_gt *gt, const u8 instance,
const u16 iir)
 {
+   struct intel_gt *media_gt = gt->i915->media_gt;
+
if (instance == OTHER_GUC_INSTANCE)
return guc_irq_handler(>uc.guc, iir);
+   if (instance == OTHER_MEDIA_GUC_INSTANCE && media_gt)
+   return guc_irq_handler(_gt->uc.guc, iir);
 
if (instance == OTHER_GTPM_INSTANCE)
return gen11_rps_irq_handler(>rps, iir);
+   if (instance == OTHER_MEDIA_GTPM_INSTANCE && media_gt)
+   return gen11_rps_irq_handler(_gt->rps, iir);
 
if (instance == OTHER_KCR_INSTANCE)
return intel_pxp_irq_handler(>pxp, iir);
@@ -81,6 +87,18 @@ gen11_engine_irq_handler(struct intel_gt *gt, const u8 class,
 {
struct intel_engine_cs *engine;
 
+   /*
+* Platforms with standalone media have their media engines in another
+* GT.
+*/
+   if (MEDIA_VER(gt->i915) >= 13 &&
+   (class == VIDEO_DECODE_CLASS || class == VIDEO_ENHANCEMENT_CLASS)) {
+   if (!gt->i915->media_gt)
+   goto err;
+
+   gt = gt->i915->media_gt;
+   }
+
if (instance <= MAX_ENGINE_INSTANCE)
engine = gt->engine_class[class][instance];
else
@@ -89,6 +107,7 @@ gen11_engine_irq_handler(struct intel_gt *gt, const u8 class,
if (likely(engine))
return intel_engine_cs_irq(engine, iir);
 
+err:
WARN_ONCE(1, "unhandled engine interrupt class=0x%x, instance=0x%x\n",
  class, instance);
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 05a40ef33258..21c7a225157f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1552,6 +1552,8 @@
 #define   OTHER_GTPM_INSTANCE  1
 #define   OTHER_KCR_INSTANCE   4
 #define   OTHER_GSC_INSTANCE   6
+#define   OTHER_MEDIA_GUC_INSTANCE 16
+#define   OTHER_MEDIA_GTPM_INSTANCE17
 
 #define GEN11_IIR_REG_SELECTOR(x)  _MMIO(0x190070 + ((x) * 4))
 
diff --git a/drivers/gpu/drm/i915/gt/intel_sa_media.c 
b/drivers/gpu/drm/i915/gt/intel_sa_media.c
index cf3053710bbf..41c270f103cf 100644
--- a/drivers/gpu/drm/i915/gt/intel_sa_media.c
+++ b/drivers/gpu/drm/i915/gt/intel_sa_media.c
@@ -36,5 +36,12 @@ int intel_sa_mediagt_setup(struct intel_gt *gt, phys_addr_t 
phys_addr,
gt->uncore = uncore;
gt->phys_addr = phys_addr;
 
+   /*
+* For current platforms we can assume there's only a single
+* media GT and cache it for quick lookup.
+*/
+   drm_WARN_ON(>drm, i915->media_gt);
+   i915->media_gt = gt;
+
return 0;
 }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d45dca70bfa6..917958d42805 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -497,6 +497,9 @@ struct drm_i915_private {
 
struct kobject *sysfs_gt;
 
+   /* Quick lookup of media GT (current platforms only have one) */
+   struct intel_gt *media_gt;
+
struct {
struct i915_gem_contexts {
spinlock_t lock; /* locks list */
-- 
2.37.2



[Intel-gfx] [PATCH 6/8] drm/i915/xelpmp: Expose media as another GT

2022-08-29 Thread Matt Roper
Xe_LPM+ platforms have "standalone media."  I.e., the media unit is
designed as an additional GT with its own engine list, GuC, forcewake,
etc.  Let's allow platforms to include media GTs in their device info.

Cc: Aravind Iddamsetty 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/Makefile|  1 +
 drivers/gpu/drm/i915/gt/intel_gt.c   | 12 ++--
 drivers/gpu/drm/i915/gt/intel_gt_regs.h  |  8 +
 drivers/gpu/drm/i915/gt/intel_sa_media.c | 39 
 drivers/gpu/drm/i915/gt/intel_sa_media.h | 15 +
 drivers/gpu/drm/i915/i915_pci.c  | 15 +
 drivers/gpu/drm/i915/intel_device_info.h |  5 ++-
 drivers/gpu/drm/i915/intel_uncore.c  | 16 --
 drivers/gpu/drm/i915/intel_uncore.h  | 20 ++--
 9 files changed, 123 insertions(+), 8 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 522ef9b4aff3..e83e4cd46968 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -123,6 +123,7 @@ gt-y += \
gt/intel_ring.o \
gt/intel_ring_submission.o \
gt/intel_rps.o \
+   gt/intel_sa_media.o \
gt/intel_sseu.o \
gt/intel_sseu_debugfs.o \
gt/intel_timeline.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index d21ec11346a5..2a29502289cb 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -776,10 +776,15 @@ void intel_gt_driver_late_release_all(struct 
drm_i915_private *i915)
}
 }
 
-static int intel_gt_tile_setup(struct intel_gt *gt, phys_addr_t phys_addr)
+static int intel_gt_tile_setup(struct intel_gt *gt,
+  phys_addr_t phys_addr,
+  u32 gsi_offset)
 {
int ret;
 
+   /* GSI offset is only applicable for media GTs */
+   drm_WARN_ON(>i915->drm, gsi_offset);
+
if (!gt_is_root(gt)) {
struct intel_uncore *uncore;
 
@@ -832,7 +837,7 @@ int intel_gt_probe_all(struct drm_i915_private *i915)
gt->info.engine_mask = RUNTIME_INFO(i915)->platform_engine_mask;
 
drm_dbg(>drm, "Setting up %s\n", gt->name);
-   ret = intel_gt_tile_setup(gt, phys_addr);
+   ret = intel_gt_tile_setup(gt, phys_addr, 0);
if (ret)
return ret;
 
@@ -862,7 +867,8 @@ int intel_gt_probe_all(struct drm_i915_private *i915)
goto err;
}
 
-   ret = gtdef->setup(gt, phys_addr + gtdef->mapping_base);
+   ret = gtdef->setup(gt, phys_addr + gtdef->mapping_base,
+  gtdef->gsi_offset);
if (ret)
goto err;
 
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 94f9ddcfb3a5..05a40ef33258 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1576,4 +1576,12 @@
 
 #define GEN12_SFC_DONE(n)  _MMIO(0x1cc000 + (n) * 0x1000)
 
+/*
+ * Standalone Media's non-engine GT registers are located at their regular GT
+ * offsets plus 0x38.  This extra offset is stored inside the intel_uncore
+ * structure so that the existing code can be used for both GTs without
+ * modification.
+ */
+#define MTL_MEDIA_GSI_BASE 0x38
+
 #endif /* __INTEL_GT_REGS__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_sa_media.c 
b/drivers/gpu/drm/i915/gt/intel_sa_media.c
new file mode 100644
index ..8c5c519457cc
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_sa_media.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#include 
+
+#include "i915_drv.h"
+#include "gt/intel_gt.h"
+#include "gt/intel_sa_media.h"
+
+int intel_sa_mediagt_setup(struct intel_gt *gt, phys_addr_t phys_addr,
+  u32 gsi_offset)
+{
+   struct drm_i915_private *i915 = gt->i915;
+   struct intel_uncore *uncore;
+
+   uncore = drmm_kzalloc(>drm, sizeof(*uncore), GFP_KERNEL);
+   if (!uncore)
+   return -ENOMEM;
+
+   uncore->gsi_offset = gsi_offset;
+
+   intel_gt_common_init_early(gt);
+   intel_uncore_init_early(uncore, gt);
+
+   /*
+* Standalone media shares the general MMIO space with the primary
+* GT.  We'll re-use the primary GT's mapping.
+*/
+   uncore->regs = i915->uncore.regs;
+   if (drm_WARN_ON(>drm, uncore->regs == NULL))
+   return -EIO;
+
+   gt->uncore = uncore;
+   gt->phys_addr = phys_addr;
+
+   return 0;
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_sa_media.h 
b/drivers/gpu/drm/i915/gt/intel_sa_media.h
new file mode 100644
index ..3afb310de932
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_sa_media.h

[Intel-gfx] [PATCH 1/8] drm/i915: Move locking and unclaimed check into mmio_debug_{suspend, resume}

2022-08-29 Thread Matt Roper
Moving the locking for MMIO debug (and the final check for unclaimed
accesses when resuming debug after a userspace-initiated forcewake) will
make it simpler to completely skip MMIO debug handling on uncores that
don't support it in future patches.

Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/intel_uncore.c | 41 +++--
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c 
b/drivers/gpu/drm/i915/intel_uncore.c
index 9b81b2543ce2..e717ea55484a 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -50,23 +50,33 @@ intel_uncore_mmio_debug_init_early(struct 
intel_uncore_mmio_debug *mmio_debug)
mmio_debug->unclaimed_mmio_check = 1;
 }
 
-static void mmio_debug_suspend(struct intel_uncore_mmio_debug *mmio_debug)
+static void mmio_debug_suspend(struct intel_uncore *uncore)
 {
-   lockdep_assert_held(_debug->lock);
+   spin_lock(>debug->lock);
 
/* Save and disable mmio debugging for the user bypass */
-   if (!mmio_debug->suspend_count++) {
-   mmio_debug->saved_mmio_check = mmio_debug->unclaimed_mmio_check;
-   mmio_debug->unclaimed_mmio_check = 0;
+   if (!uncore->debug->suspend_count++) {
+   uncore->debug->saved_mmio_check = 
uncore->debug->unclaimed_mmio_check;
+   uncore->debug->unclaimed_mmio_check = 0;
}
+
+   spin_unlock(>debug->lock);
 }
 
-static void mmio_debug_resume(struct intel_uncore_mmio_debug *mmio_debug)
+static bool check_for_unclaimed_mmio(struct intel_uncore *uncore);
+
+static void mmio_debug_resume(struct intel_uncore *uncore)
 {
-   lockdep_assert_held(_debug->lock);
+   spin_lock(>debug->lock);
+
+   if (!--uncore->debug->suspend_count)
+   uncore->debug->unclaimed_mmio_check = 
uncore->debug->saved_mmio_check;
 
-   if (!--mmio_debug->suspend_count)
-   mmio_debug->unclaimed_mmio_check = mmio_debug->saved_mmio_check;
+   if (check_for_unclaimed_mmio(uncore))
+   drm_info(>i915->drm,
+"Invalid mmio detected during user access\n");
+
+   spin_unlock(>debug->lock);
 }
 
 static const char * const forcewake_domain_names[] = {
@@ -677,9 +687,7 @@ void intel_uncore_forcewake_user_get(struct intel_uncore 
*uncore)
spin_lock_irq(>lock);
if (!uncore->user_forcewake_count++) {
intel_uncore_forcewake_get__locked(uncore, FORCEWAKE_ALL);
-   spin_lock(>debug->lock);
-   mmio_debug_suspend(uncore->debug);
-   spin_unlock(>debug->lock);
+   mmio_debug_suspend(uncore);
}
spin_unlock_irq(>lock);
 }
@@ -695,14 +703,7 @@ void intel_uncore_forcewake_user_put(struct intel_uncore 
*uncore)
 {
spin_lock_irq(>lock);
if (!--uncore->user_forcewake_count) {
-   spin_lock(>debug->lock);
-   mmio_debug_resume(uncore->debug);
-
-   if (check_for_unclaimed_mmio(uncore))
-   drm_info(>i915->drm,
-"Invalid mmio detected during user access\n");
-   spin_unlock(>debug->lock);
-
+   mmio_debug_resume(uncore);
intel_uncore_forcewake_put__locked(uncore, FORCEWAKE_ALL);
}
spin_unlock_irq(>lock);
-- 
2.37.2



[Intel-gfx] [PATCH 5/8] drm/i915: Rename and expose common GT early init routine

2022-08-29 Thread Matt Roper
The common early GT init is needed for initialization of all GT types
(root/primary, remote tile, standalone media).  Since standalone media
(coming in the next patch) will be implemented in a separate file,
rename and expose the function for use.

Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/gt/intel_gt.c | 6 +++---
 drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 7c0525e96155..d21ec11346a5 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -35,7 +35,7 @@
 #include "intel_uncore.h"
 #include "shmem_utils.h"
 
-static void __intel_gt_init_early(struct intel_gt *gt)
+void intel_gt_common_init_early(struct intel_gt *gt)
 {
spin_lock_init(>irq_lock);
 
@@ -65,7 +65,7 @@ void intel_root_gt_init_early(struct drm_i915_private *i915)
gt->i915 = i915;
gt->uncore = >uncore;
 
-   __intel_gt_init_early(gt);
+   intel_gt_common_init_early(gt);
 }
 
 static int intel_gt_probe_lmem(struct intel_gt *gt)
@@ -789,7 +789,7 @@ static int intel_gt_tile_setup(struct intel_gt *gt, 
phys_addr_t phys_addr)
 
gt->uncore = uncore;
 
-   __intel_gt_init_early(gt);
+   intel_gt_common_init_early(gt);
}
 
intel_uncore_init_early(gt->uncore, gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h 
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 4d8779529cc2..c9a359f35d0f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -44,6 +44,7 @@ static inline struct intel_gt *gsc_to_gt(struct intel_gsc 
*gsc)
return container_of(gsc, struct intel_gt, gsc);
 }
 
+void intel_gt_common_init_early(struct intel_gt *gt);
 void intel_root_gt_init_early(struct drm_i915_private *i915);
 int intel_gt_assign_ggtt(struct intel_gt *gt);
 int intel_gt_init_mmio(struct intel_gt *gt);
-- 
2.37.2



[Intel-gfx] [PATCH 2/8] drm/i915: Only hook up uncore->debug for primary uncore

2022-08-29 Thread Matt Roper
The original intent of intel_uncore_mmio_debug as described in commit
0a9b26306d6a ("drm/i915: split out uncore_mmio_debug") was to be a
singleton structure that could be shared between multiple GTs' uncore
objects in a multi-tile system.  Somehow we went off track and
started allocating separate instances of this structure for each GT,
which defeats that original goal.

But in reality, there isn't even a need to share the mmio_debug between
multiple GTs; on all modern platforms (i.e., everything after gen7)
unclaimed register accesses are something that can only be detected for
display registers.  There's no point in grabbing the debug spinlock and
checking for unclaimed accesses on an uncore used by an xehpsdv or pvc
remote tile GT, or the uncore used by a mtl standalone media GT since
all of the display accesses go through the primary intel_uncore.

The simplest solution is to simply leave uncore->debug NULL on all
intel_uncore instances except for the primary one.  This will allow us
to avoid the pointless debug spinlock acquisition we've been doing on
MMIO accesses coming in through these intel_uncores.

Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/gt/intel_gt.c  |  9 -
 drivers/gpu/drm/i915/i915_driver.c  |  2 +-
 drivers/gpu/drm/i915/intel_uncore.c | 23 ++-
 drivers/gpu/drm/i915/intel_uncore.h |  3 +--
 4 files changed, 20 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index e4bac2431e41..a82b5e2e0d83 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -781,21 +781,13 @@ static int intel_gt_tile_setup(struct intel_gt *gt, 
phys_addr_t phys_addr)
int ret;
 
if (!gt_is_root(gt)) {
-   struct intel_uncore_mmio_debug *mmio_debug;
struct intel_uncore *uncore;
 
uncore = kzalloc(sizeof(*uncore), GFP_KERNEL);
if (!uncore)
return -ENOMEM;
 
-   mmio_debug = kzalloc(sizeof(*mmio_debug), GFP_KERNEL);
-   if (!mmio_debug) {
-   kfree(uncore);
-   return -ENOMEM;
-   }
-
gt->uncore = uncore;
-   gt->uncore->debug = mmio_debug;
 
__intel_gt_init_early(gt);
}
@@ -817,7 +809,6 @@ intel_gt_tile_cleanup(struct intel_gt *gt)
intel_uncore_cleanup_mmio(gt->uncore);
 
if (!gt_is_root(gt)) {
-   kfree(gt->uncore->debug);
kfree(gt->uncore);
kfree(gt);
}
diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index 053a7dab5506..de9020771836 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -326,7 +326,7 @@ static int i915_driver_early_probe(struct drm_i915_private 
*dev_priv)
intel_device_info_subplatform_init(dev_priv);
intel_step_init(dev_priv);
 
-   intel_uncore_mmio_debug_init_early(_priv->mmio_debug);
+   intel_uncore_mmio_debug_init_early(dev_priv);
 
spin_lock_init(_priv->irq_lock);
spin_lock_init(_priv->gpu_error.lock);
diff --git a/drivers/gpu/drm/i915/intel_uncore.c 
b/drivers/gpu/drm/i915/intel_uncore.c
index e717ea55484a..6841f76533f9 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -44,14 +44,19 @@ fw_domains_get(struct intel_uncore *uncore, enum 
forcewake_domains fw_domains)
 }
 
 void
-intel_uncore_mmio_debug_init_early(struct intel_uncore_mmio_debug *mmio_debug)
+intel_uncore_mmio_debug_init_early(struct drm_i915_private *i915)
 {
-   spin_lock_init(_debug->lock);
-   mmio_debug->unclaimed_mmio_check = 1;
+   spin_lock_init(>mmio_debug.lock);
+   i915->mmio_debug.unclaimed_mmio_check = 1;
+
+   i915->uncore.debug = >mmio_debug;
 }
 
 static void mmio_debug_suspend(struct intel_uncore *uncore)
 {
+   if (!uncore->debug)
+   return;
+
spin_lock(>debug->lock);
 
/* Save and disable mmio debugging for the user bypass */
@@ -67,6 +72,9 @@ static bool check_for_unclaimed_mmio(struct intel_uncore 
*uncore);
 
 static void mmio_debug_resume(struct intel_uncore *uncore)
 {
+   if (!uncore->debug)
+   return;
+
spin_lock(>debug->lock);
 
if (!--uncore->debug->suspend_count)
@@ -1705,7 +1713,7 @@ unclaimed_reg_debug(struct intel_uncore *uncore,
const bool read,
const bool before)
 {
-   if (likely(!uncore->i915->params.mmio_debug))
+   if (likely(!uncore->i915->params.mmio_debug) || !uncore->debug)
return;
 
/* interrupts are disabled and re-enabled around uncore->lock usage */
@@ -2267,7 +2275,6 @@ void intel_uncore_init_early(struct intel_uncore *uncore,
uncore->i915 = gt->i915;
uncore->gt = gt;
uncore->rpm = >i915->runtime_pm;
-   

[Intel-gfx] [PATCH 4/8] drm/i915: Prepare more multi-GT initialization

2022-08-29 Thread Matt Roper
We're going to introduce an additional intel_gt for MTL's media unit
soon.  Let's provide a bit more multi-GT initialization framework in
preparation for that.  The initialization will pull the list of GTs for
a platform from the device info structure.  Although necessary for the
immediate MTL media enabling, this same framework will also be used
farther down the road when we enable remote tiles on xehpsdv and pvc.

Cc: Aravind Iddamsetty 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  2 +-
 drivers/gpu/drm/i915/gt/intel_gt.c| 48 +--
 drivers/gpu/drm/i915/gt/intel_gt.h|  1 -
 drivers/gpu/drm/i915/gt/intel_gt_types.h  |  3 ++
 drivers/gpu/drm/i915/i915_drv.h   |  2 +
 drivers/gpu/drm/i915/intel_device_info.h  | 16 +++
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 +
 7 files changed, 67 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 275ad72940c1..41acc285e8bf 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -736,7 +736,7 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt 
*gt)
u16 vdbox_mask;
u16 vebox_mask;
 
-   info->engine_mask = RUNTIME_INFO(i915)->platform_engine_mask;
+   GEM_BUG_ON(!info->engine_mask);
 
if (GRAPHICS_VER(i915) < 11)
return info->engine_mask;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index cf7aab7adb30..7c0525e96155 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -807,17 +807,16 @@ static void
 intel_gt_tile_cleanup(struct intel_gt *gt)
 {
intel_uncore_cleanup_mmio(gt->uncore);
-
-   if (!gt_is_root(gt))
-   kfree(gt);
 }
 
 int intel_gt_probe_all(struct drm_i915_private *i915)
 {
struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
struct intel_gt *gt = >gt0;
+   const struct intel_gt_definition *gtdef;
phys_addr_t phys_addr;
unsigned int mmio_bar;
+   unsigned int i;
int ret;
 
mmio_bar = GRAPHICS_VER(i915) == 2 ? GEN2_GTTMMADR_BAR : GTTMMADR_BAR;
@@ -828,14 +827,55 @@ int intel_gt_probe_all(struct drm_i915_private *i915)
 * and it has been already initialized early during probe
 * in i915_driver_probe()
 */
+   gt->i915 = i915;
+   gt->name = "Primary GT";
+   gt->info.engine_mask = RUNTIME_INFO(i915)->platform_engine_mask;
+
+   drm_dbg(>drm, "Setting up %s\n", gt->name);
ret = intel_gt_tile_setup(gt, phys_addr);
if (ret)
return ret;
 
i915->gt[0] = gt;
 
-   /* TODO: add more tiles */
+   for (i = 1, gtdef = _INFO(i915)->extra_gt_list[i - 1];
+gtdef->setup != NULL;
+i++, gtdef = _INFO(i915)->extra_gt_list[i - 1]) {
+   gt = drmm_kzalloc(>drm, sizeof(*gt), GFP_KERNEL);
+   if (!gt) {
+   ret = -ENOMEM;
+   goto err;
+   }
+
+   gt->i915 = i915;
+   gt->name = gtdef->name;
+   gt->type = gtdef->type;
+   gt->info.engine_mask = gtdef->engine_mask;
+   gt->info.id = i;
+
+   drm_dbg(>drm, "Setting up %s\n", gt->name);
+   if (GEM_WARN_ON(range_overflows_t(resource_size_t,
+ gtdef->mapping_base,
+ SZ_16M,
+ pci_resource_len(pdev, 
mmio_bar {
+   ret = -ENODEV;
+   goto err;
+   }
+
+   ret = gtdef->setup(gt, phys_addr + gtdef->mapping_base);
+   if (ret)
+   goto err;
+
+   i915->gt[i] = gt;
+   }
+
return 0;
+
+err:
+   i915_probe_error(i915, "Failed to initialize %s! (%d)\n", gtdef->name, 
ret);
+   intel_gt_release_all(i915);
+
+   return ret;
 }
 
 int intel_gt_tiles_init(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h 
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 40b06adf509a..4d8779529cc2 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -54,7 +54,6 @@ void intel_gt_driver_register(struct intel_gt *gt);
 void intel_gt_driver_unregister(struct intel_gt *gt);
 void intel_gt_driver_remove(struct intel_gt *gt);
 void intel_gt_driver_release(struct intel_gt *gt);
-
 void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
 
 int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h 
b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 4d56f7d5a3be..3bd36caee321 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ 

[Intel-gfx] [PATCH 3/8] drm/i915: Use managed allocations for extra uncore objects

2022-08-29 Thread Matt Roper
We're slowly transitioning the init-time kzalloc's of the driver over to
DRM-managed allocations; let's make sure the uncore objects allocated
for non-root GTs are thus allocated.

Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/gt/intel_gt.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index a82b5e2e0d83..cf7aab7adb30 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -783,7 +783,7 @@ static int intel_gt_tile_setup(struct intel_gt *gt, 
phys_addr_t phys_addr)
if (!gt_is_root(gt)) {
struct intel_uncore *uncore;
 
-   uncore = kzalloc(sizeof(*uncore), GFP_KERNEL);
+   uncore = drmm_kzalloc(>i915->drm, sizeof(*uncore), 
GFP_KERNEL);
if (!uncore)
return -ENOMEM;
 
@@ -808,10 +808,8 @@ intel_gt_tile_cleanup(struct intel_gt *gt)
 {
intel_uncore_cleanup_mmio(gt->uncore);
 
-   if (!gt_is_root(gt)) {
-   kfree(gt->uncore);
+   if (!gt_is_root(gt))
kfree(gt);
-   }
 }
 
 int intel_gt_probe_all(struct drm_i915_private *i915)
-- 
2.37.2



[Intel-gfx] [PATCH 0/8] i915: Add "standalone media" support for MTL

2022-08-29 Thread Matt Roper
Starting with MTL, media functionality has moved into a new, second GT
at the hardware level.  This new GT, referred to as "standalone media"
in the spec, has its own GuC, power management/forcewake, etc.  The
general non-engine GT registers for standalone media start at 0x38,
but otherwise use the same MMIO offsets as the primary GT.

Standalone media has a lot of similarity to the remote tiles
present on platforms like xehpsdv and pvc, and our i915 implementation 
can share much of the general "multi GT" infrastructure between the two
types of platforms.  However there are a few notable differences
we must deal with:
 - The 0x38 offset only applies to the non-engine GT registers
   (which the specs refer to as "GSI" registers).  The engine registers
   remain at their usual locations (e.g., 0x1C for VCS0).
 - Unlike platforms with remote tiles, all interrupt handling for
   standalone media still happens via the primary GT.


Matt Roper (8):
  drm/i915: Move locking and unclaimed check into
mmio_debug_{suspend,resume}
  drm/i915: Only hook up uncore->debug for primary uncore
  drm/i915: Use managed allocations for extra uncore objects
  drm/i915: Prepare more multi-GT initialization
  drm/i915: Rename and expose common GT early init routine
  drm/i915/xelpmp: Expose media as another GT
  drm/i915/mtl: Use primary GT's irq lock for media GT
  drm/i915/mtl: Hook up interrupts for standalone media

 drivers/gpu/drm/i915/Makefile |  1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 10 +--
 drivers/gpu/drm/i915/gt/intel_gt.c| 88 ++-
 drivers/gpu/drm/i915/gt/intel_gt.h|  4 +-
 drivers/gpu/drm/i915/gt/intel_gt_irq.c| 35 ++--
 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c |  8 +-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 10 +++
 drivers/gpu/drm/i915/gt/intel_gt_types.h  |  5 +-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 26 +++---
 drivers/gpu/drm/i915/gt/intel_sa_media.c  | 47 ++
 drivers/gpu/drm/i915/gt/intel_sa_media.h  | 15 
 drivers/gpu/drm/i915/gt/uc/intel_guc.c| 24 ++---
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  4 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c |  4 +-
 drivers/gpu/drm/i915/i915_driver.c|  6 +-
 drivers/gpu/drm/i915/i915_drv.h   |  5 ++
 drivers/gpu/drm/i915/i915_irq.c   |  4 +-
 drivers/gpu/drm/i915/i915_pci.c   | 15 
 drivers/gpu/drm/i915/intel_device_info.h  | 19 
 drivers/gpu/drm/i915/intel_uncore.c   | 80 +++--
 drivers/gpu/drm/i915/intel_uncore.h   | 23 -
 drivers/gpu/drm/i915/pxp/intel_pxp.c  |  4 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c  | 14 +--
 drivers/gpu/drm/i915/pxp/intel_pxp_session.c  |  4 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 +
 25 files changed, 340 insertions(+), 116 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.h

-- 
2.37.2



Re: [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support

2022-08-29 Thread Dixit, Ashutosh
On Thu, 25 Aug 2022 06:21:13 -0700, Badal Nilawar wrote:
>
> From: Riana Tauro 
>
> Use i915 HWMON subsystem to display current input voltage.

A couple of suggestions to improve comments in this patch below and after
addressing those this patch is:

Reviewed-by: Ashutosh Dixit 

> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c 
> b/drivers/gpu/drm/i915/i915_hwmon.c
> index 103dd543a214..2192d0fd4c66 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.c
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c
> @@ -11,8 +11,10 @@
>  #include "i915_hwmon.h"
>  #include "i915_reg.h"
>  #include "intel_mchbar_regs.h"
> +#include "gt/intel_gt_regs.h"

In later patches we have added units for different quantities here. So I
think we should add those units for voltage to this patch too. It's in
Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon but I think it's
better to add to this file too otherwise if anyone looks at it is seems to
be missing.

So I would add the following to this patch:

/*
 * SF_* - scale factors for particular quantities according to hwmon spec.
 * - voltage - millivolts
 */
#define SF_VOLTAGE  1000

> +static int
> +hwm_in_read(struct hwm_drvdata *ddat, u32 attr, long *val)
> +{
> + struct i915_hwmon *hwmon = ddat->hwmon;
> + intel_wakeref_t wakeref;
> + u32 reg_value;
> +
> + switch (attr) {
> + case hwmon_in_input:
> + with_intel_runtime_pm(ddat->uncore->rpm, wakeref)
> + reg_value = intel_uncore_read(ddat->uncore, 
> hwmon->rg.gt_perf_status);
> + /* In units of 2.5 millivolt */
> + *val = DIV_ROUND_CLOSEST(REG_FIELD_GET(GEN12_VOLTAGE_MASK, 
> reg_value) * 25, 10);

Let's complete this comment to so that it is clear what's happening:

/* HW register value is in units of 2.5 millivolt */


[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: fix repeated words in comments (rev3)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915: fix repeated words in comments (rev3)
URL   : https://patchwork.freedesktop.org/series/107885/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107885v3


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107885v3/index.html

Participating hosts (40 -> 36)
--

  Missing(4): fi-ctg-p8600 bat-dg2-8 fi-bdw-samus fi-hsw-4200u 

Known issues


  Here are the changes found in Patchwork_107885v3 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][1] -> [DMESG-FAIL][2] ([i915#4528])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107885v3/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@runner@aborted:
- fi-bdw-5557u:   NOTRUN -> [FAIL][3] ([i915#4312])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107885v3/fi-bdw-5557u/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}:   [DMESG-WARN][4] ([i915#2867]) -> [PASS][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107885v3/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_pm:
- bat-adlp-4: [DMESG-FAIL][6] ([i915#3987]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-adlp-4/igt@i915_selftest@live@gt_pm.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107885v3/bat-adlp-4/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][8] ([i915#146] / [i915#6598]) -> 
[PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107885v3/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
 Warnings 

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  [DMESG-FAIL][10] ([i915#4957]) -> [DMESG-FAIL][11] 
([i915#4494] / [i915#4957])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107885v3/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
  [i915#6380]: https://gitlab.freedesktop.org/drm/intel/issues/6380
  [i915#6579]: https://gitlab.freedesktop.org/drm/intel/issues/6579
  [i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598


Build changes
-

  * Linux: CI_DRM_12044 -> Patchwork_107885v3

  CI-20190529: 20190529
  CI_DRM_12044: 287ad23d60ce7aa8befbe8dd1fea6fb705bd08ac @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6637: a23e8aed0b54018339647d0817267431bd2b7075 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_107885v3: 287ad23d60ce7aa8befbe8dd1fea6fb705bd08ac @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107885v3/index.html


Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-29 Thread Dixit, Ashutosh
On Thu, 25 Aug 2022 06:21:12 -0700, Badal Nilawar wrote:
>

A couple of minor observations below but otherwise this patch is:

Reviewed-by: Ashutosh Dixit 

> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c 
> b/drivers/gpu/drm/i915/i915_hwmon.c
> new file mode 100644
> index ..103dd543a214
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c

/snip/

> +struct hwm_reg {
> +};
> +
> +struct hwm_drvdata {
> + struct i915_hwmon *hwmon;
> + struct intel_uncore *uncore;

Instead of 'struct intel_uncore' we could have a 'struct intel_gt' here
since intel_gt is a higher level but I think uncore is fine and anyway has
a backpointer to intel_gt should we need it. So no changes needed.

> + struct device *hwmon_dev;
> + char name[12];
> +};
> +
> +struct i915_hwmon {
> + struct hwm_drvdata ddat;
> + struct mutex hwmon_lock;/* counter overflow logic and 
> rmw */
> + struct hwm_reg rg;
> +};

Somebody looking at just this patch might wonder why we have two data
structs hwm_drvdata and i915_hwmon, rather than just one. The answer
becomes clear in a later patch and that of course is that i915 exposes
multiple hwmon devices. Anyway, just an observation, no changes required.


[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: fix repeated words in comments (rev3)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915: fix repeated words in comments (rev3)
URL   : https://patchwork.freedesktop.org/series/107885/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2




[Intel-gfx] ✓ Fi.CI.BAT: success for i915/display: fix repeated words in comments

2022-08-29 Thread Patchwork
== Series Details ==

Series: i915/display: fix repeated words in comments
URL   : https://patchwork.freedesktop.org/series/107887/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107887v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/index.html

Participating hosts (40 -> 36)
--

  Missing(4): fi-ctg-p8600 bat-dg2-11 fi-bdw-samus fi-hsw-4200u 

Known issues


  Here are the changes found in Patchwork_107887v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s3@smem:
- fi-rkl-11600:   NOTRUN -> [FAIL][1] ([fdo#103375])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/fi-rkl-11600/igt@gem_exec_suspend@basic...@smem.html
- fi-bdw-5557u:   NOTRUN -> [INCOMPLETE][2] ([i915#146] / [i915#6598])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/fi-bdw-5557u/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-rkl-11600:   NOTRUN -> [SKIP][5] ([fdo#111827])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/fi-rkl-11600/igt@kms_chamel...@common-hpd-after-suspend.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}:   [DMESG-WARN][6] ([i915#2867]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@coherency:
- {bat-dg2-10}:   [DMESG-FAIL][8] -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg2-10/igt@i915_selftest@l...@coherency.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/bat-dg2-10/igt@i915_selftest@l...@coherency.html

  * igt@i915_selftest@live@gt_pm:
- bat-adlp-4: [DMESG-FAIL][10] ([i915#3987]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-adlp-4/igt@i915_selftest@live@gt_pm.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/bat-adlp-4/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600:   [INCOMPLETE][12] ([i915#5982]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-rkl-11600/igt@i915_susp...@basic-s3-without-i915.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/fi-rkl-11600/igt@i915_susp...@basic-s3-without-i915.html
- fi-bdw-5557u:   [INCOMPLETE][14] ([i915#146] / [i915#6598]) -> 
[PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
 Warnings 

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  [DMESG-FAIL][16] ([i915#4957]) -> [DMESG-FAIL][17] 
([i915#4494] / [i915#4957])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107887v1/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#5134]: https://gitlab.freedesktop.org/drm/intel/issues/5134
  [i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
  [i915#6011]: https://gitlab.freedesktop.org/drm/intel/issues/6011
  [i915#6503]: https://gitlab.freedesktop.org/drm/intel/issues/6503
  [i915#6565]: 

Re: [Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for imbalance wakeref

2022-08-29 Thread Golani, Mitulkumar Ajitkumar
Hi Imre,

> -Original Message-
> From: Deak, Imre 
> Sent: 29 August 2022 20:16
> To: Golani, Mitulkumar Ajitkumar 
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for
> imbalance wakeref
> 
> On Mon, Aug 29, 2022 at 09:45:53AM +0300, Golani, Mitulkumar Ajitkumar
> wrote:
> > Hi Imre,
> >
> > > [...]
> > > Still not sure what's going. Both i915_pci_probe() and
> > > i915_pci_remove()->i915_driver_remove() is called with a runtime PM
> > > reference - taken at local_pci_probe() and pci_device_remove() - and
> > > so the device should be runtime resumed at those points.
> > >
> >
> > Yes reference is being taken at local_pci_probe() and
> > pci_device_remove() but During i915_selftest@perf, it is loading and
> > unloading i915_pci_probe() and i915_pci_remove(), here
> > pci_device_remove() is not being called, that's why runtime PM reference is
> not present during i915_driver_remove().
> 
> Ok, that explains it. Taking an actual RPM reference unconditionally in
> i915_driver_remove() should fix this (instead of the
> disable/enable_rpm_wakeref_asserts() calls there):
> 
> wakeref = intel_runtime_pm_get();
> ...
> intel_runtime_pm_put(wakeref);
> 
> While at it the same change should be applied in i915_driver_release() as
> well for consistency.
> 

Thanks Imre. Verified on Target. This works.

Pushed changes : 
https://patchwork.freedesktop.org/patch/500180/?series=107211=6


[Intel-gfx] ✓ Fi.CI.BAT: success for i915/gvt: fix repeated words in comments

2022-08-29 Thread Patchwork
== Series Details ==

Series: i915/gvt: fix repeated words in comments
URL   : https://patchwork.freedesktop.org/series/107883/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12044 -> Patchwork_107883v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/index.html

Participating hosts (40 -> 37)
--

  Missing(3): fi-ctg-p8600 fi-bdw-samus fi-hsw-4200u 

Known issues


  Here are the changes found in Patchwork_107883v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258:   [PASS][1] -> [INCOMPLETE][2] ([i915#3303] / 
[i915#4785])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
- fi-bsw-kefka:   [PASS][5] -> [FAIL][6] ([i915#6298])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions.html

  * igt@runner@aborted:
- fi-bdw-5557u:   NOTRUN -> [FAIL][7] ([i915#4312])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/fi-bdw-5557u/igt@run...@aborted.html
- fi-hsw-g3258:   NOTRUN -> [FAIL][8] ([fdo#109271] / [i915#4312] / 
[i915#6246])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/fi-hsw-g3258/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}:   [DMESG-WARN][9] ([i915#2867]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_pm:
- bat-adlp-4: [DMESG-FAIL][11] ([i915#3987]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-adlp-4/igt@i915_selftest@live@gt_pm.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/bat-adlp-4/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@reset:
- {bat-rpls-1}:   [DMESG-FAIL][13] ([i915#4983] / [i915#5828]) -> 
[PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/bat-rpls-1/igt@i915_selftest@l...@reset.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/bat-rpls-1/igt@i915_selftest@l...@reset.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u:   [INCOMPLETE][15] ([i915#146] / [i915#6598]) -> 
[PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12044/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107883v1/fi-bdw-5557u/igt@i915_susp...@basic-s3-without-i915.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5153]: https://gitlab.freedesktop.org/drm/intel/issues/5153
  [i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
  [i915#6246]: https://gitlab.freedesktop.org/drm/intel/issues/6246
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
  [i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
  [i915#6643]: https://gitlab.freedesktop.org/drm/intel/issues/6643


Build changes
-

  * Linux: CI_DRM_12044 -> Patchwork_107883v1

  CI-20190529: 20190529
  

[Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for imbalance wakeref

2022-08-29 Thread Mitul Golani
While executing i915_selftest, wakeref imbalance warning is seen
with i915_selftest failure.

Currently when Driver is suspended, while doing unregister
it is taking wakeref without resuming the device.
This patch is resuming the device, if driver is already suspended
and doing unregister process. It will check the suspend state and
if driver is not resumed before taking wakeref then resume before
it.

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/i915_driver.c | 16 
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index 1332c70370a6..281bf6cd5e4c 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -953,7 +953,11 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
pci_device_id *ent)
 
 void i915_driver_remove(struct drm_i915_private *i915)
 {
-   disable_rpm_wakeref_asserts(>runtime_pm);
+   intel_wakeref_t wakeref = 0;
+   /*
+* Resuming Device if already suspended to complete driver 
unregistration
+*/
+   wakeref = intel_runtime_pm_get(>runtime_pm);
 
i915_driver_unregister(i915);
 
@@ -977,18 +981,20 @@ void i915_driver_remove(struct drm_i915_private *i915)
 
i915_driver_hw_remove(i915);
 
-   enable_rpm_wakeref_asserts(>runtime_pm);
+   if (wakeref)
+   intel_runtime_pm_put(>runtime_pm, wakeref);
 }
 
 static void i915_driver_release(struct drm_device *dev)
 {
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_runtime_pm *rpm = _priv->runtime_pm;
+   intel_wakeref_t wakeref = 0;
 
if (!dev_priv->do_release)
return;
 
-   disable_rpm_wakeref_asserts(rpm);
+   wakeref = intel_runtime_pm_get(rpm);
 
i915_gem_driver_release(dev_priv);
 
@@ -999,7 +1005,9 @@ static void i915_driver_release(struct drm_device *dev)
 
i915_driver_mmio_release(dev_priv);
 
-   enable_rpm_wakeref_asserts(rpm);
+   if (wakeref)
+   intel_runtime_pm_put(rpm, wakeref);
+
intel_runtime_pm_driver_release(rpm);
 
i915_driver_late_release(dev_priv);
-- 
2.25.1



Re: [Intel-gfx] [PATCH] Revert "drm/i915/dg2: Add preemption changes for Wa_14015141709"

2022-08-29 Thread Matt Atwood
On Fri, Aug 26, 2022 at 02:02:33PM -0700, Matt Roper wrote:
> This reverts commit ca6920811aa5428270dd78af0a7a36b10119065a.
> 
> The intent of Wa_14015141709 was to inform us that userspace can no
> longer control object-level preemption as it has on past platforms
> (i.e., by twiddling register bit CS_CHICKEN1[0]).  The description of
> the workaround in the spec wasn't terribly well-written, and when we
> requested clarification from the hardware teams we were told that on the
> kernel side we should also probably stop setting
> FF_SLICE_CS_CHICKEN1[14], which is the register bit that directs the
> hardware to honor the settings in per-context register CS_CHICKEN1.  It
> turns out that this guidance about FF_SLICE_CS_CHICKEN1[14] was a
> mistake; even though CS_CHICKEN1[0] is non-operational and useless to
> userspace, there are other bits in the register that do still work and
> might need to be adjusted by userspace in the future (e.g., to implement
> other workarounds that show up).  If we don't set
> FF_SLICE_CS_CHICKEN1[14] in i915, then those future workarounds would
> not take effect.
> 
> This miscommunication came to light because another workaround
> (Wa_16013994831) has now shown up that requires userspace to adjust the
> value of CS_CHICKEN[10] in certain circumstances.  To ensure userspace's
> updates to this chicken bit are handled properly by the hardware, we
> need to make sure that FF_SLICE_CS_CHICKEN1[14] is once again set by the
> kernel.
> 
Reviewed-by: Matt Atwood 
> Signed-off-by: Matt Roper 
> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
>  drivers/gpu/drm/i915/i915_drv.h | 3 ---
>  2 files changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdb8294e13f..69a0c6a74474 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2389,7 +2389,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, 
> struct i915_wa_list *wal)
>FF_DOP_CLOCK_GATE_DISABLE);
>   }
>  
> - if (HAS_PERCTX_PREEMPT_CTRL(i915)) {
> + if (IS_GRAPHICS_VER(i915, 9, 12)) {
>   /* 
> FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl,tgl */
>   wa_masked_en(wal,
>GEN7_FF_SLICE_CS_CHICKEN1,
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2b00ef3626db..d6a1ab6f65de 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1352,9 +1352,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define HAS_GUC_DEPRIVILEGE(dev_priv) \
>   (INTEL_INFO(dev_priv)->has_guc_deprivilege)
>  
> -#define HAS_PERCTX_PREEMPT_CTRL(i915) \
> - ((GRAPHICS_VER(i915) >= 9) &&  GRAPHICS_VER_FULL(i915) < IP_VER(12, 55))
> -
>  #define HAS_D12_PLANE_MINIMIZATION(dev_priv) (IS_ROCKETLAKE(dev_priv) || \
> IS_ALDERLAKE_S(dev_priv))
>  
> -- 
> 2.37.2
> 


Re: [Intel-gfx] [PATCH] drm/i915/ats-m: Add thread execution tuning setting

2022-08-29 Thread Matt Atwood
On Fri, Aug 26, 2022 at 02:27:18PM -0700, Matt Roper wrote:
> On client DG2 platforms, optimal performance is achieved with the
> hardware's default "age based" thread execution setting.  However on
> ATS-M, switching this to "round robin after dependencies" provides
> better performance.  We'll add a new "tuning" feature flag to the ATS-M
> device info to enable/disable this setting.
> 
> Bspec: 68331
> Cc: Lucas De Marchi 
Reviewed-by: Matt Atwood 
> Signed-off-by: Matt Roper 
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 ++
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 9 +
>  drivers/gpu/drm/i915/i915_pci.c | 1 +
>  drivers/gpu/drm/i915/intel_device_info.h| 1 +
>  4 files changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
> b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index 94f9ddcfb3a5..d414785003cc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> @@ -1110,6 +1110,8 @@
>  #define   GEN12_DISABLE_TDL_PUSH REG_BIT(9)
>  #define   GEN11_DIS_PICK_2ND_EU  REG_BIT(7)
>  #define   GEN12_DISABLE_HDR_PAST_PAYLOAD_HOLD_FIXREG_BIT(4)
> +#define   THREAD_EX_ARB_MODE REG_GENMASK(3, 2)
> +#define   THREAD_EX_ARB_MODE_RR_AFTER_DEP
> REG_FIELD_PREP(THREAD_EX_ARB_MODE, 0x2)
>  
>  #define HSW_ROW_CHICKEN3 _MMIO(0xe49c)
>  #define   HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdb8294e13f..ff8c3735abc9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2700,6 +2700,15 @@ add_render_compute_tuning_settings(struct 
> drm_i915_private *i915,
>  0 /* write-only, so skip validation */,
>  true);
>   }
> +
> + /*
> +  * This tuning setting proves beneficial only on ATS-M designs; the
> +  * default "age based" setting is optimal on regular DG2 and other
> +  * platforms.
> +  */
> + if (INTEL_INFO(i915)->tuning_thread_rr_after_dep)
> + wa_masked_field_set(wal, GEN9_ROW_CHICKEN4, THREAD_EX_ARB_MODE,
> + THREAD_EX_ARB_MODE_RR_AFTER_DEP);
>  }
>  
>  /*
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 857e8bb6865c..26b25d9434d6 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -1080,6 +1080,7 @@ static const struct intel_device_info ats_m_info = {
>   DG2_FEATURES,
>   .display = { 0 },
>   .require_force_probe = 1,
> + .tuning_thread_rr_after_dep = 1,
>  };
>  
>  #define XE_HPC_FEATURES \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
> b/drivers/gpu/drm/i915/intel_device_info.h
> index 0ccde94b225f..6904ad03ca19 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -171,6 +171,7 @@ enum intel_ppgtt_type {
>   func(has_runtime_pm); \
>   func(has_snoop); \
>   func(has_coherent_ggtt); \
> + func(tuning_thread_rr_after_dep); \
>   func(unfenced_needs_alignment); \
>   func(hws_needs_physical);
>  
> -- 
> 2.37.2
> 


[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ttm: Abort suspend on i915_ttm_backup failure

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/i915/ttm: Abort suspend on i915_ttm_backup failure
URL   : https://patchwork.freedesktop.org/series/107877/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12041 -> Patchwork_107877v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107877v1/index.html

Participating hosts (39 -> 36)
--

  Additional (1): bat-dg2-10 
  Missing(4): fi-ctg-p8600 fi-hsw-4770 fi-bdw-samus fi-hsw-4200u 

Known issues


  Here are the changes found in Patchwork_107877v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * 
igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka:   [PASS][1] -> [FAIL][2] ([i915#6298])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107877v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html

  
 Possible fixes 

  * igt@i915_pm_rpm@module-reload:
- fi-cfl-8109u:   [DMESG-FAIL][3] ([i915#62]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-cfl-8109u/igt@i915_pm_...@module-reload.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107877v1/fi-cfl-8109u/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@requests:
- {bat-rplp-1}:   [INCOMPLETE][5] -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/bat-rplp-1/igt@i915_selftest@l...@requests.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107877v1/bat-rplp-1/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@reset:
- {bat-rpls-1}:   [DMESG-FAIL][7] ([i915#4983] / [i915#5828]) -> 
[PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/bat-rpls-1/igt@i915_selftest@l...@reset.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107877v1/bat-rpls-1/igt@i915_selftest@l...@reset.html

  * igt@i915_selftest@live@ring_submission:
- fi-cfl-8109u:   [DMESG-WARN][9] ([i915#5904]) -> [PASS][10] +30 
similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107877v1/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-cfl-8109u:   [DMESG-WARN][11] ([i915#5904] / [i915#62]) -> 
[PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107877v1/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [DMESG-WARN][13] ([i915#62]) -> [PASS][14] +13 
similar issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107877v1/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
  [i915#5904]: https://gitlab.freedesktop.org/drm/intel/issues/5904
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6579]: https://gitlab.freedesktop.org/drm/intel/issues/6579


Build changes
-

  * Linux: CI_DRM_12041 -> Patchwork_107877v1

  CI-20190529: 20190529
  CI_DRM_12041: 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/edid: Range descriptor stuff (rev2)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/edid: Range descriptor stuff (rev2)
URL   : https://patchwork.freedesktop.org/series/107824/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12041 -> Patchwork_107824v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107824v2/index.html

Participating hosts (39 -> 36)
--

  Additional (1): bat-dg2-10 
  Missing(4): fi-ctg-p8600 fi-rkl-11600 fi-bdw-samus fi-hsw-4200u 

Known issues


  Here are the changes found in Patchwork_107824v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][1] -> [INCOMPLETE][2] ([i915#4785])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107824v2/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@runner@aborted:
- fi-hsw-4770:NOTRUN -> [FAIL][3] ([fdo#109271] / [i915#4312] / 
[i915#5594] / [i915#6246])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107824v2/fi-hsw-4770/igt@run...@aborted.html

  
 Possible fixes 

  * igt@i915_pm_rpm@module-reload:
- fi-cfl-8109u:   [DMESG-FAIL][4] ([i915#62]) -> [PASS][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-cfl-8109u/igt@i915_pm_...@module-reload.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107824v2/fi-cfl-8109u/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@requests:
- {bat-rplp-1}:   [INCOMPLETE][6] -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/bat-rplp-1/igt@i915_selftest@l...@requests.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107824v2/bat-rplp-1/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@ring_submission:
- fi-cfl-8109u:   [DMESG-WARN][8] ([i915#5904]) -> [PASS][9] +30 
similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107824v2/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-cfl-8109u:   [DMESG-WARN][10] ([i915#5904] / [i915#62]) -> 
[PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107824v2/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [DMESG-WARN][12] ([i915#62]) -> [PASS][13] +13 
similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12041/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107824v2/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#5153]: https://gitlab.freedesktop.org/drm/intel/issues/5153
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
  [i915#5904]: https://gitlab.freedesktop.org/drm/intel/issues/5904
  [i915#6106]: https://gitlab.freedesktop.org/drm/intel/issues/6106
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#6246]: https://gitlab.freedesktop.org/drm/intel/issues/6246
  [i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
  [i915#6380]: https://gitlab.freedesktop.org/drm/intel/issues/6380
  [i915#6530]: https://gitlab.freedesktop.org/drm/intel/issues/6530
  [i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599


Build changes
-

  * Linux: CI_DRM_12041 -> Patchwork_107824v2

  

Re: [Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for imbalance wakeref

2022-08-29 Thread Imre Deak
On Mon, Aug 29, 2022 at 09:45:53AM +0300, Golani, Mitulkumar Ajitkumar wrote:
> Hi Imre,
> 
> > [...]
> > Still not sure what's going. Both i915_pci_probe() and
> > i915_pci_remove()->i915_driver_remove() is called with a runtime PM
> > reference - taken at local_pci_probe() and pci_device_remove() - and so the
> > device should be runtime resumed at those points.
> >
> 
> Yes reference is being taken at local_pci_probe() and pci_device_remove() but
> During i915_selftest@perf, it is loading and unloading i915_pci_probe() and
> i915_pci_remove(), here pci_device_remove() is not being called, that's why
> runtime PM reference is not present during i915_driver_remove().

Ok, that explains it. Taking an actual RPM reference unconditionally in
i915_driver_remove() should fix this (instead of the
disable/enable_rpm_wakeref_asserts() calls there):

wakeref = intel_runtime_pm_get();
...
intel_runtime_pm_put(wakeref);

While at it the same change should be applied in i915_driver_release()
as well for consistency.

> > > > > >   disable_rpm_wakeref_asserts(rpm);
> > > > > >
> > > > > >   intel_opregion_notify_adapter(dev_priv, PCI_D0);
> > > > > > --
> > > > > > 2.25.1
> > > > > >


Re: [Intel-gfx] [PATCH 4/4] drm/i915: Extract drm_dp_atomic_find_vcpi_slots cycle to separate function

2022-08-29 Thread Govindapillai, Vinod
Hi Stan,

I wonder if it is better if you reorder the 3 and 4 patches in this - move this 
4/4 before the 3rd
one and modify the 3rd one accordingly.

Also, instead of getting rid of limits, keep limits and populate the limits 
according to dsc or
normal dp_mst. What do you think?

BR
vinod


On Mon, 2022-08-29 at 12:58 +0300, Stanislav Lisovskiy wrote:
> We are using almost same code to loop through bpps while calling
> drm_dp_atomic_find_vcpi_slots - lets remove this duplication by
> introducing a new function intel_dp_mst_find_vcpi_slots_for_bpp
> 
> Signed-off-by: Stanislav Lisovskiy 
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 88 +++--
>  1 file changed, 46 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 94d7e7f84c51..2a524816dbfd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -44,10 +44,14 @@
>  #include "intel_hotplug.h"
>  #include "skl_scaler.h"
>  
> -static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> -   struct intel_crtc_state 
> *crtc_state,
> -   struct drm_connector_state 
> *conn_state,
> -   struct link_config_limits *limits)
> +static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder 
> *encoder,
> +   struct intel_crtc_state 
> *crtc_state,
> +   int max_bpp,
> +   int min_bpp,
> +   struct link_config_limits 
> *limits,
> +   struct drm_connector_state 
> *conn_state,
> +   int step,
> +   bool dsc)
>  {
> struct drm_atomic_state *state = crtc_state->uapi.state;
> struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> @@ -58,7 +62,6 @@ static int intel_dp_mst_compute_link_config(struct 
> intel_encoder *encoder,
> struct drm_i915_private *i915 = to_i915(connector->base.dev);
> const struct drm_display_mode *adjusted_mode =
> _state->hw.adjusted_mode;
> -   bool constant_n = drm_dp_has_quirk(_dp->desc, 
> DP_DPCD_QUIRK_CONSTANT_N);
> int bpp, slots = -EINVAL;
> int ret = 0;
>  
> @@ -71,19 +74,21 @@ static int intel_dp_mst_compute_link_config(struct 
> intel_encoder *encoder,
>  
> // TODO: Handle pbn_div changes by adding a new MST helper
> if (!mst_state->pbn_div) {
> -   mst_state->pbn_div = 
> drm_dp_get_vc_payload_bw(_dp->mst_mgr,
> - 
> limits->max_rate,
> - 
> limits->max_lane_count);
> +   mst_state->pbn_div = !dsc ? 
> drm_dp_get_vc_payload_bw(_dp->mst_mgr,
> +    
> crtc_state->port_clock,
> +    
> crtc_state->lane_count) : 0;
> }
>  
> -   for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
> +   for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
> crtc_state->pipe_bpp = bpp;
>  
> crtc_state->pbn = 
> drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
> -  crtc_state->pipe_bpp,
> -  false);
> +  dsc ? bpp << 4 : 
> crtc_state->pipe_bpp,
> +  dsc);
> +
> slots = drm_dp_atomic_find_time_slots(state, 
> _dp->mst_mgr,
> - connector->port, 
> crtc_state->pbn);
> + connector->port,
> + crtc_state->pbn);
> if (slots == -EDEADLK)
> return slots;
> if (slots >= 0) {
> @@ -101,11 +106,32 @@ static int intel_dp_mst_compute_link_config(struct 
> intel_encoder *encoder,
> if (ret && slots >= 0)
> slots = ret;
>  
> -   if (slots < 0) {
> +   if (slots < 0)
> drm_dbg_kms(>drm, "failed finding vcpi slots:%d\n",
>     slots);
> +
> +   return slots;
> +}
> +
> +
> +static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> +   struct intel_crtc_state 
> *crtc_state,
> +   struct drm_connector_state 
> *conn_state,
> +   

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Range descriptor stuff (rev2)

2022-08-29 Thread Patchwork
== Series Details ==

Series: drm/edid: Range descriptor stuff (rev2)
URL   : https://patchwork.freedesktop.org/series/107824/
State : warning

== Summary ==

Error: dim checkpatch failed
8832b89186e8 drm/edid: Handle EDID 1.4 range descriptor h/vfreq offsets
c2a4eb80d064 drm/edid: Clarify why we only accept the "range limits only" 
descriptor
92673ded77d7 drm/edid: s/monitor_rage/vrr_range/
d47c52e9df8f drm/edid: Define more flags
-:23: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#23: FILE: drivers/gpu/drm/drm_edid.c:2987:
+   descriptor->data.other_data.data.range.formula.cvt.flags & 
DRM_EDID_CVT_FLAGS_REDUCED_BLANKING)

total: 0 errors, 1 warnings, 0 checks, 90 lines checked
d31b088f72c7 drm/edid: Only parse VRR range for continuous frequency displays
44fa3e3e3bc4 drm/edid: Extract drm_gtf2_mode()
7ef21d39de4e drm/edid: Use GTF2 for inferred modes
e3004178b3e6 drm/edid: Use the correct formula for standard timings
dc47d7350b3d drm/edid: Unconfuse preferred timing stuff a bit
282c8dbe500f drm/edid: Make version checks less convoluted
d26fd258ed68 drm/i915: Infer vrefresh range for eDP if the EDID omits it




Re: [Intel-gfx] [PATCH 2/4] drm/i915: Fix intel_dp_mst_compute_link_config

2022-08-29 Thread Govindapillai, Vinod
Reviewed-by: Vinod Govindapillai 


On Mon, 2022-08-29 at 12:58 +0300, Stanislav Lisovskiy wrote:
> We currently always exit that bpp loop because drm_dp_atomic_find_vcpi_slots
> doesn't care if we actually can fit those or not.
> I think that wasn't the initial intention here, especially when
> we keep trying with lower bpps, we are supposed to keep trying
> until we actually find some _working_ configuration, which isn't the
> case here.
> So added that drm_dp_mst_check here, so that we can make sure
> that try all the bpps before we fail.
> 
> Signed-off-by: Stanislav Lisovskiy 
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 16 ++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 13abe2b2170e..c4f92edbdd08 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -60,6 +60,7 @@ static int intel_dp_mst_compute_link_config(struct 
> intel_encoder *encoder,
> _state->hw.adjusted_mode;
> bool constant_n = drm_dp_has_quirk(_dp->desc, 
> DP_DPCD_QUIRK_CONSTANT_N);
> int bpp, slots = -EINVAL;
> +   int ret = 0;
>  
> mst_state = drm_atomic_get_mst_topology_state(state, 
> _dp->mst_mgr);
> if (IS_ERR(mst_state))
> @@ -85,10 +86,21 @@ static int intel_dp_mst_compute_link_config(struct 
> intel_encoder *encoder,
>   connector->port, 
> crtc_state->pbn);
> if (slots == -EDEADLK)
> return slots;
> -   if (slots >= 0)
> -   break;
> +   if (slots >= 0) {
> +   ret = drm_dp_mst_atomic_check(state);
> +   /*
> +    * If we got slots >= 0 and we can fit those based on 
> check
> +    * then we can exit the loop. Otherwise keep trying.
> +    */
> +   if (!ret)
> +   break;
> +   }
> }
>  
> +   /* Despite slots are non-zero, we still failed the atomic check */
> +   if (ret && slots >= 0)
> +   slots = ret;
> +
> if (slots < 0) {
> drm_dbg_kms(>drm, "failed finding vcpi slots:%d\n",
>     slots);



Re: [Intel-gfx] [PATCH] drm/i915: fix repeated words in comments

2022-08-29 Thread Jani Nikula
On Tue, 23 Aug 2022, Jilin Yuan  wrote:
>  Delete the redundant word 'other'.
>  Delete the redundant word 'the'.
>  Delete the redundant word 'will'.
>
> Signed-off-by: Jilin Yuan 

Doesn't apply because some of the hunks were already fixed by other
commits.

BR,
Jani.


> ---
>  drivers/gpu/drm/i915/i915_gem_evict.c | 2 +-
>  drivers/gpu/drm/i915/i915_irq.c   | 4 ++--
>  drivers/gpu/drm/i915/i915_memcpy.h| 2 +-
>  3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c 
> b/drivers/gpu/drm/i915/i915_gem_evict.c
> index f025ee4fa526..028e509e1628 100644
> --- a/drivers/gpu/drm/i915/i915_gem_evict.c
> +++ b/drivers/gpu/drm/i915/i915_gem_evict.c
> @@ -256,7 +256,7 @@ i915_gem_evict_something(struct i915_address_space *vm,
>   goto search_again;
>  
>  found:
> - /* drm_mm doesn't allow any other other operations while
> + /* drm_mm doesn't allow any other operations while
>* scanning, therefore store to-be-evicted objects on a
>* temporary list and take a reference for all before
>* calling unbind (which may remove the active reference
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 73cebc6aa650..1e4a705bc5cc 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -65,7 +65,7 @@
>  
>  /*
>   * Interrupt statistic for PMU. Increments the counter only if the
> - * interrupt originated from the the GPU so interrupts from a device which
> + * interrupt originated from the GPU so interrupts from a device which
>   * shares the interrupt line are not accounted.
>   */
>  static inline void pmu_irq_stats(struct drm_i915_private *i915,
> @@ -2175,7 +2175,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
>   raw_reg_write(regs, DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL);
>  
>   /* Disable south interrupts. We'll only write to SDEIIR once, so further
> -  * interrupts will will be stored on its back queue, and then we'll be
> +  * interrupts will be stored on its back queue, and then we'll be
>* able to process them after we restore SDEIER (as soon as we restore
>* it, we'll get an interrupt if SDEIIR still has something to process
>* due to its back queue). */
> diff --git a/drivers/gpu/drm/i915/i915_memcpy.h 
> b/drivers/gpu/drm/i915/i915_memcpy.h
> index 3df063a3293b..126dfb4352f0 100644
> --- a/drivers/gpu/drm/i915/i915_memcpy.h
> +++ b/drivers/gpu/drm/i915/i915_memcpy.h
> @@ -18,7 +18,7 @@ void i915_unaligned_memcpy_from_wc(void *dst, const void 
> *src, unsigned long len
>  /* The movntdqa instructions used for memcpy-from-wc require 16-byte 
> alignment,
>   * as well as SSE4.1 support. i915_memcpy_from_wc() will report if it cannot
>   * perform the operation. To check beforehand, pass in the parameters to
> - * to i915_can_memcpy_from_wc() - since we only care about the low 4 bits,
> + * i915_can_memcpy_from_wc() - since we only care about the low 4 bits,
>   * you only need to pass in the minor offsets, page-aligned pointers are
>   * always valid.
>   *

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH] drm/i915: fix repeated words in comments

2022-08-29 Thread Jani Nikula
On Tue, 23 Aug 2022, wangjianli  wrote:
>  Delete the redundant word 'the'.
>
> Signed-off-by: wangjianli 

Already fixed by commit 78f48aa6f50b ("drm/i915/irq: Fix a "the the"
typo").

What is this sudden influx of patches fixing repeated words everywhere?

BR,
Jani.


> ---
>  drivers/gpu/drm/i915/i915_irq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 73cebc6aa650..783a6ca41a61 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -65,7 +65,7 @@
>  
>  /*
>   * Interrupt statistic for PMU. Increments the counter only if the
> - * interrupt originated from the the GPU so interrupts from a device which
> + * interrupt originated from the GPU so interrupts from a device which
>   * shares the interrupt line are not accounted.
>   */
>  static inline void pmu_irq_stats(struct drm_i915_private *i915,

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 14/19] drm/i915/perf: Add Wa_1608133521:dg2

2022-08-29 Thread Jani Nikula
On Tue, 23 Aug 2022, Umesh Nerlige Ramappa  
wrote:
> DG2 introduces 64 bit counters and OA reports that have 64 bit values
> for fields in the report header - report_id, timestamp, context_id and
> gpu ticks. i915 uses report_id, timestamp and context_id to check for
> valid reports.
>
> In some DG2 variants, only the lower dwords for timestamp, report_id and
> context_id are accessible. Add workaround for such reports.
>
> Signed-off-by: Umesh Nerlige Ramappa 
> ---
>  drivers/gpu/drm/i915/i915_perf.c | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c 
> b/drivers/gpu/drm/i915/i915_perf.c
> index a28f07923d8f..a858ce57e465 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -310,7 +310,7 @@ static u32 i915_oa_max_sample_rate = 10;
>   * be used as a mask to align the OA tail pointer. In some of the
>   * formats, R is used to denote reserved field.
>   */
> -static const struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
> +static struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {

Can't do this. This is shared between devices, and once you make it
mutable and change it, you'll change it for *all* devices.

Your options are having const data for all variants you need, or you
make a device specific copy and modify. The former is generally better
if you usually don't need to modify it.

BR,
Jani.


>   [I915_OA_FORMAT_A13]= { 0, 64 },
>   [I915_OA_FORMAT_A29]= { 1, 128 },
>   [I915_OA_FORMAT_A13_B8_C8]  = { 2, 128 },
> @@ -4746,6 +4746,13 @@ static void oa_init_supported_formats(struct i915_perf 
> *perf)
>   /* Wa_16010703925:dg2 */
>   clear_bit(I915_OAR_FORMAT_A36u64_B8_C8, perf->format_mask);
>   }
> +
> + if (IS_DG2_GRAPHICS_STEP(i915, G10, STEP_A0, STEP_B0) ||
> + IS_DG2_GRAPHICS_STEP(i915, G11, STEP_A0, STEP_FOREVER)) {
> + /* Wa_1608133521:dg2 */
> + oa_formats[I915_OAR_FORMAT_A36u64_B8_C8].header = HDR_32_BIT;
> + oa_formats[I915_OA_FORMAT_A38u64_R2u64_B8_C8].header = 
> HDR_32_BIT;
> + }
>  }
>  
>  static void i915_perf_init_info(struct drm_i915_private *i915)

-- 
Jani Nikula, Intel Open Source Graphics Center


[Intel-gfx] [PATCH] drm/i915/bios: Copy the whole MIPI sequence block

2022-08-29 Thread Ville Syrjala
From: Ville Syrjälä 

Turns out the MIPI sequence block version number and
new block size fields are considered part of the block
header and are not included in the reported new block size
field itself. Bump up the block size appropriately so that
we'll copy over the last five bytes of the block as well.

For this particular machine those last five bytes included
parts of the GPIO op for the backlight on sequence, causing
the backlight no longer to turn back on:

Sequence 6 - MIPI_SEQ_BACKLIGHT_ON
Delay: 2 us
-   GPIO index 0, number 0, set 0 (0x00)
+   GPIO index 1, number 70, set 1 (0x01)

Cc: sta...@vger.kernel.org
Fixes: e163cfb4c96d ("drm/i915/bios: Make copies of VBT data blocks")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6652
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_bios.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index 81d6cfbd2615..d493d04f4049 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -479,6 +479,13 @@ init_bdb_block(struct drm_i915_private *i915,
 
block_size = get_blocksize(block);
 
+   /*
+* Version number and new block size are considered
+* part of the header for MIPI sequenece block v3+.
+*/
+   if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
+   block_size += 5;
+
entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
GFP_KERNEL);
if (!entry) {
-- 
2.35.1



Re: [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de

2022-08-29 Thread Ville Syrjälä
On Tue, Aug 23, 2022 at 11:01:28AM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst 
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c   |  8 ++--
>  drivers/gpu/drm/i915/display/intel_crt.c  | 33 +++--
>  drivers/gpu/drm/i915/display/intel_de.h   | 47 +++
>  .../drm/i915/display/intel_display_power.c|  2 +-
>  drivers/gpu/drm/i915/display/intel_dmc.c  |  6 +--
>  drivers/gpu/drm/i915/display/intel_dp_aux.c   | 30 ++--
>  drivers/gpu/drm/i915/display/intel_dpio_phy.c |  9 ++--
>  drivers/gpu/drm/i915/display/intel_fbc.c  | 10 +---
>  drivers/gpu/drm/i915/display/intel_gmbus.c| 42 -
>  drivers/gpu/drm/i915/display/intel_hdcp.c |  6 +--
>  drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++---
>  11 files changed, 118 insertions(+), 86 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index 8ecf4e3e2bc6..1ca588e31dc9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -42,7 +42,7 @@ static int dg1_mchbar_read_qgv_point_info(struct 
> drm_i915_private *dev_priv,
>   u32 dclk_ratio, dclk_reference;
>   u32 val;
>  
> - val = intel_uncore_read(_priv->uncore, 
> SA_PERF_STATUS_0_0_0_MCHBAR_PC);
> + val = intel_de_read(dev_priv, SA_PERF_STATUS_0_0_0_MCHBAR_PC);

Surely these aren't display engine registers? If we start (ab)using
intel_de_*() for everything we may end up in a bigger mess for the
upcoming forcewake thing...

-- 
Ville Syrjälä
Intel


[Intel-gfx] [PATCH 4/4] drm/i915: Extract drm_dp_atomic_find_vcpi_slots cycle to separate function

2022-08-29 Thread Stanislav Lisovskiy
We are using almost same code to loop through bpps while calling
drm_dp_atomic_find_vcpi_slots - lets remove this duplication by
introducing a new function intel_dp_mst_find_vcpi_slots_for_bpp

v2: Fix pbn_div calculation - shouldn't matter if its DSC or not.

Signed-off-by: Stanislav Lisovskiy 
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 86 +++--
 1 file changed, 45 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 94d7e7f84c51..7dcbdcd1cb48 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -44,10 +44,14 @@
 #include "intel_hotplug.h"
 #include "skl_scaler.h"
 
-static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
-   struct intel_crtc_state *crtc_state,
-   struct drm_connector_state 
*conn_state,
-   struct link_config_limits *limits)
+static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
+   struct intel_crtc_state 
*crtc_state,
+   int max_bpp,
+   int min_bpp,
+   struct link_config_limits 
*limits,
+   struct drm_connector_state 
*conn_state,
+   int step,
+   bool dsc)
 {
struct drm_atomic_state *state = crtc_state->uapi.state;
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
@@ -58,7 +62,6 @@ static int intel_dp_mst_compute_link_config(struct 
intel_encoder *encoder,
struct drm_i915_private *i915 = to_i915(connector->base.dev);
const struct drm_display_mode *adjusted_mode =
_state->hw.adjusted_mode;
-   bool constant_n = drm_dp_has_quirk(_dp->desc, 
DP_DPCD_QUIRK_CONSTANT_N);
int bpp, slots = -EINVAL;
int ret = 0;
 
@@ -72,18 +75,20 @@ static int intel_dp_mst_compute_link_config(struct 
intel_encoder *encoder,
// TODO: Handle pbn_div changes by adding a new MST helper
if (!mst_state->pbn_div) {
mst_state->pbn_div = 
drm_dp_get_vc_payload_bw(_dp->mst_mgr,
- limits->max_rate,
- 
limits->max_lane_count);
+ 
crtc_state->port_clock,
+ 
crtc_state->lane_count);
}
 
-   for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
+   for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
crtc_state->pipe_bpp = bpp;
 
crtc_state->pbn = 
drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
-  crtc_state->pipe_bpp,
-  false);
+  dsc ? bpp << 4 : 
crtc_state->pipe_bpp,
+  dsc);
+
slots = drm_dp_atomic_find_time_slots(state, _dp->mst_mgr,
- connector->port, 
crtc_state->pbn);
+ connector->port,
+ crtc_state->pbn);
if (slots == -EDEADLK)
return slots;
if (slots >= 0) {
@@ -101,11 +106,32 @@ static int intel_dp_mst_compute_link_config(struct 
intel_encoder *encoder,
if (ret && slots >= 0)
slots = ret;
 
-   if (slots < 0) {
+   if (slots < 0)
drm_dbg_kms(>drm, "failed finding vcpi slots:%d\n",
slots);
+
+   return slots;
+}
+
+
+static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
+   struct intel_crtc_state *crtc_state,
+   struct drm_connector_state 
*conn_state,
+   struct link_config_limits *limits)
+{
+   const struct drm_display_mode *adjusted_mode =
+   _state->hw.adjusted_mode;
+   struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
+   struct intel_dp *intel_dp = _mst->primary->dp;
+   bool constant_n = drm_dp_has_quirk(_dp->desc, 
DP_DPCD_QUIRK_CONSTANT_N);
+   int slots = -EINVAL;
+
+   slots = intel_dp_mst_find_vcpi_slots_for_bpp(encoder, crtc_state, 
limits->max_bpp,
+limits->min_bpp, limits,
+   

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de

2022-08-29 Thread Jani Nikula
On Mon, 29 Aug 2022, Jani Nikula  wrote:
> On Tue, 23 Aug 2022, Maarten Lankhorst  
> wrote:
>
> Commit message!
>
> I think this is doing a bit too much at once. The straightforward
> conversions are fine I think, but adding new de helpers and using them
> here along with everything else is a bit much.

Also, nitpick, there were a bunch of places where the following lines
need to be reindented.

>
> BR,
> Jani.
>
>
>> Signed-off-by: Maarten Lankhorst 
>> ---
>>  drivers/gpu/drm/i915/display/intel_bw.c   |  8 ++--
>>  drivers/gpu/drm/i915/display/intel_crt.c  | 33 +++--
>>  drivers/gpu/drm/i915/display/intel_de.h   | 47 +++
>>  .../drm/i915/display/intel_display_power.c|  2 +-
>>  drivers/gpu/drm/i915/display/intel_dmc.c  |  6 +--
>>  drivers/gpu/drm/i915/display/intel_dp_aux.c   | 30 ++--
>>  drivers/gpu/drm/i915/display/intel_dpio_phy.c |  9 ++--
>>  drivers/gpu/drm/i915/display/intel_fbc.c  | 10 +---
>>  drivers/gpu/drm/i915/display/intel_gmbus.c| 42 -
>>  drivers/gpu/drm/i915/display/intel_hdcp.c |  6 +--
>>  drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++---
>>  11 files changed, 118 insertions(+), 86 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
>> b/drivers/gpu/drm/i915/display/intel_bw.c
>> index 8ecf4e3e2bc6..1ca588e31dc9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bw.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
>> @@ -42,7 +42,7 @@ static int dg1_mchbar_read_qgv_point_info(struct 
>> drm_i915_private *dev_priv,
>>  u32 dclk_ratio, dclk_reference;
>>  u32 val;
>>  
>> -val = intel_uncore_read(_priv->uncore, 
>> SA_PERF_STATUS_0_0_0_MCHBAR_PC);
>> +val = intel_de_read(dev_priv, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
>>  dclk_ratio = REG_FIELD_GET(DG1_QCLK_RATIO_MASK, val);
>>  if (val & DG1_QCLK_REFERENCE)
>>  dclk_reference = 6; /* 6 * 16.666 MHz = 100 MHz */
>> @@ -50,18 +50,18 @@ static int dg1_mchbar_read_qgv_point_info(struct 
>> drm_i915_private *dev_priv,
>>  dclk_reference = 8; /* 8 * 16.666 MHz = 133 MHz */
>>  sp->dclk = DIV_ROUND_UP((16667 * dclk_ratio * dclk_reference) + 500, 
>> 1000);
>>  
>> -val = intel_uncore_read(_priv->uncore, 
>> SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
>> +val = intel_de_read(dev_priv, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
>>  if (val & DG1_GEAR_TYPE)
>>  sp->dclk *= 2;
>>  
>>  if (sp->dclk == 0)
>>  return -EINVAL;
>>  
>> -val = intel_uncore_read(_priv->uncore, 
>> MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
>> +val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
>>  sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val);
>>  sp->t_rdpre = REG_FIELD_GET(DG1_DRAM_T_RDPRE_MASK, val);
>>  
>> -val = intel_uncore_read(_priv->uncore, 
>> MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
>> +val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
>>  sp->t_rcd = REG_FIELD_GET(DG1_DRAM_T_RCD_MASK, val);
>>  sp->t_ras = REG_FIELD_GET(DG1_DRAM_T_RAS_MASK, val);
>>  
>> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c 
>> b/drivers/gpu/drm/i915/display/intel_crt.c
>> index 6a3893c8ff22..5f64d1d600b7 100644
>> --- a/drivers/gpu/drm/i915/display/intel_crt.c
>> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
>> @@ -679,7 +679,6 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>>  {
>>  struct drm_device *dev = crt->base.base.dev;
>>  struct drm_i915_private *dev_priv = to_i915(dev);
>> -struct intel_uncore *uncore = _priv->uncore;
>>  u32 save_bclrpat;
>>  u32 save_vtotal;
>>  u32 vtotal, vactive;
>> @@ -700,9 +699,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>>  pipeconf_reg = PIPECONF(pipe);
>>  pipe_dsl_reg = PIPEDSL(pipe);
>>  
>> -save_bclrpat = intel_uncore_read(uncore, bclrpat_reg);
>> -save_vtotal = intel_uncore_read(uncore, vtotal_reg);
>> -vblank = intel_uncore_read(uncore, vblank_reg);
>> +save_bclrpat = intel_de_read(dev_priv, bclrpat_reg);
>> +save_vtotal = intel_de_read(dev_priv, vtotal_reg);
>> +vblank = intel_de_read(dev_priv, vblank_reg);
>>  
>>  vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
>>  vactive = (save_vtotal & 0x7ff) + 1;
>> @@ -711,23 +710,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>>  vblank_end = ((vblank >> 16) & 0xfff) + 1;
>>  
>>  /* Set the border color to purple. */
>> -intel_uncore_write(uncore, bclrpat_reg, 0x500050);
>> +intel_de_write(dev_priv, bclrpat_reg, 0x500050);
>>  
>>  if (DISPLAY_VER(dev_priv) != 2) {
>> -u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
>> -intel_uncore_write(uncore,
>> +u32 pipeconf = intel_de_read(dev_priv, pipeconf_reg);
>> +intel_de_write(dev_priv,
>> pipeconf_reg,
>> pipeconf | PIPECONF_FORCE_BORDER);
>> -

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move display pcode requests to intel_de

2022-08-29 Thread Jani Nikula
On Tue, 23 Aug 2022, Maarten Lankhorst  
wrote:
> This will allow us not to use uncore from display code directly any more.

Mmh, a bit tedious but I guess this is what we'll need to do. See also
ee421bb4cb95 ("drm/i915/pcode: Extend pcode functions for multiple
gt's").

Reviewed-by: Jani Nikula 


BR,
Jain.


>
> Signed-off-by: Maarten Lankhorst 
> ---
>  drivers/gpu/drm/i915/display/hsw_ips.c|  7 ++-
>  drivers/gpu/drm/i915/display/intel_bw.c   | 22 -
>  drivers/gpu/drm/i915/display/intel_cdclk.c| 45 +--
>  drivers/gpu/drm/i915/display/intel_de.h   | 30 +
>  drivers/gpu/drm/i915/display/intel_display.c  |  1 -
>  .../drm/i915/display/intel_display_power.c|  3 +-
>  .../i915/display/intel_display_power_well.c   |  7 ++-
>  drivers/gpu/drm/i915/display/intel_hdcp.c |  3 +-
>  8 files changed, 71 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c 
> b/drivers/gpu/drm/i915/display/hsw_ips.c
> index 861dcd2eb890..ab0032b78d7f 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -8,7 +8,6 @@
>  #include "i915_reg.h"
>  #include "intel_de.h"
>  #include "intel_display_types.h"
> -#include "intel_pcode.h"
>  
>  static void hsw_ips_enable(const struct intel_crtc_state *crtc_state)
>  {
> @@ -28,8 +27,8 @@ static void hsw_ips_enable(const struct intel_crtc_state 
> *crtc_state)
>  
>   if (IS_BROADWELL(i915)) {
>   drm_WARN_ON(>drm,
> - snb_pcode_write(>uncore, DISPLAY_IPS_CONTROL,
> - IPS_ENABLE | IPS_PCODE_CONTROL));
> + intel_de_pcode_write(i915, DISPLAY_IPS_CONTROL,
> +  IPS_ENABLE | 
> IPS_PCODE_CONTROL));
>   /*
>* Quoting Art Runyan: "its not safe to expect any particular
>* value in IPS_CTL bit 31 after enabling IPS through the
> @@ -62,7 +61,7 @@ bool hsw_ips_disable(const struct intel_crtc_state 
> *crtc_state)
>  
>   if (IS_BROADWELL(i915)) {
>   drm_WARN_ON(>drm,
> - snb_pcode_write(>uncore, DISPLAY_IPS_CONTROL, 
> 0));
> + intel_de_pcode_write(i915, DISPLAY_IPS_CONTROL, 0));
>   /*
>* Wait for PCODE to finish disabling IPS. The BSpec specified
>* 42ms timeout value leads to occasional timeouts so use 100ms
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index 79269d2c476b..8ecf4e3e2bc6 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -10,9 +10,9 @@
>  #include "intel_atomic.h"
>  #include "intel_bw.h"
>  #include "intel_cdclk.h"
> +#include "intel_de.h"
>  #include "intel_display_types.h"
>  #include "intel_mchbar_regs.h"
> -#include "intel_pcode.h"
>  #include "intel_pm.h"
>  
>  /* Parameters for Qclk Geyserville (QGV) */
> @@ -78,9 +78,9 @@ static int icl_pcode_read_qgv_point_info(struct 
> drm_i915_private *dev_priv,
>   u16 dclk;
>   int ret;
>  
> - ret = snb_pcode_read(_priv->uncore, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> -  ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point),
> -  , );
> + ret = intel_de_pcode_read(dev_priv, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> +   ICL_PCODE_MEM_SS_READ_QGV_POINT_INFO(point),
> +   , );
>   if (ret)
>   return ret;
>  
> @@ -104,8 +104,8 @@ static int adls_pcode_read_psf_gv_point_info(struct 
> drm_i915_private *dev_priv,
>   int ret;
>   int i;
>  
> - ret = snb_pcode_read(_priv->uncore, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> -  ADL_PCODE_MEM_SS_READ_PSF_GV_INFO, , NULL);
> + ret = intel_de_pcode_read(dev_priv, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> +   ADL_PCODE_MEM_SS_READ_PSF_GV_INFO, , 
> NULL);
>   if (ret)
>   return ret;
>  
> @@ -123,11 +123,11 @@ int icl_pcode_restrict_qgv_points(struct 
> drm_i915_private *dev_priv,
>   int ret;
>  
>   /* bspec says to keep retrying for at least 1 ms */
> - ret = skl_pcode_request(_priv->uncore, 
> ICL_PCODE_SAGV_DE_MEM_SS_CONFIG,
> - points_mask,
> - ICL_PCODE_REP_QGV_MASK | 
> ADLS_PCODE_REP_PSF_MASK,
> - ICL_PCODE_REP_QGV_SAFE | 
> ADLS_PCODE_REP_PSF_SAFE,
> - 1);
> + ret = intel_de_pcode_request(dev_priv, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG,
> +  points_mask,
> +  ICL_PCODE_REP_QGV_MASK | 
> ADLS_PCODE_REP_PSF_MASK,
> +  ICL_PCODE_REP_QGV_SAFE | 
> ADLS_PCODE_REP_PSF_SAFE,
> +  1);
>  
>   if (ret < 0) {
>   

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Replace remaining display uncore references to use intel_de

2022-08-29 Thread Jani Nikula
On Tue, 23 Aug 2022, Maarten Lankhorst  
wrote:

Commit message!

I think this is doing a bit too much at once. The straightforward
conversions are fine I think, but adding new de helpers and using them
here along with everything else is a bit much.

BR,
Jani.


> Signed-off-by: Maarten Lankhorst 
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c   |  8 ++--
>  drivers/gpu/drm/i915/display/intel_crt.c  | 33 +++--
>  drivers/gpu/drm/i915/display/intel_de.h   | 47 +++
>  .../drm/i915/display/intel_display_power.c|  2 +-
>  drivers/gpu/drm/i915/display/intel_dmc.c  |  6 +--
>  drivers/gpu/drm/i915/display/intel_dp_aux.c   | 30 ++--
>  drivers/gpu/drm/i915/display/intel_dpio_phy.c |  9 ++--
>  drivers/gpu/drm/i915/display/intel_fbc.c  | 10 +---
>  drivers/gpu/drm/i915/display/intel_gmbus.c| 42 -
>  drivers/gpu/drm/i915/display/intel_hdcp.c |  6 +--
>  drivers/gpu/drm/i915/display/intel_snps_phy.c | 11 ++---
>  11 files changed, 118 insertions(+), 86 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index 8ecf4e3e2bc6..1ca588e31dc9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -42,7 +42,7 @@ static int dg1_mchbar_read_qgv_point_info(struct 
> drm_i915_private *dev_priv,
>   u32 dclk_ratio, dclk_reference;
>   u32 val;
>  
> - val = intel_uncore_read(_priv->uncore, 
> SA_PERF_STATUS_0_0_0_MCHBAR_PC);
> + val = intel_de_read(dev_priv, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
>   dclk_ratio = REG_FIELD_GET(DG1_QCLK_RATIO_MASK, val);
>   if (val & DG1_QCLK_REFERENCE)
>   dclk_reference = 6; /* 6 * 16.666 MHz = 100 MHz */
> @@ -50,18 +50,18 @@ static int dg1_mchbar_read_qgv_point_info(struct 
> drm_i915_private *dev_priv,
>   dclk_reference = 8; /* 8 * 16.666 MHz = 133 MHz */
>   sp->dclk = DIV_ROUND_UP((16667 * dclk_ratio * dclk_reference) + 500, 
> 1000);
>  
> - val = intel_uncore_read(_priv->uncore, 
> SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
> + val = intel_de_read(dev_priv, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
>   if (val & DG1_GEAR_TYPE)
>   sp->dclk *= 2;
>  
>   if (sp->dclk == 0)
>   return -EINVAL;
>  
> - val = intel_uncore_read(_priv->uncore, 
> MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
> + val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
>   sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val);
>   sp->t_rdpre = REG_FIELD_GET(DG1_DRAM_T_RDPRE_MASK, val);
>  
> - val = intel_uncore_read(_priv->uncore, 
> MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
> + val = intel_de_read(dev_priv, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
>   sp->t_rcd = REG_FIELD_GET(DG1_DRAM_T_RCD_MASK, val);
>   sp->t_ras = REG_FIELD_GET(DG1_DRAM_T_RAS_MASK, val);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c 
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index 6a3893c8ff22..5f64d1d600b7 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -679,7 +679,6 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>  {
>   struct drm_device *dev = crt->base.base.dev;
>   struct drm_i915_private *dev_priv = to_i915(dev);
> - struct intel_uncore *uncore = _priv->uncore;
>   u32 save_bclrpat;
>   u32 save_vtotal;
>   u32 vtotal, vactive;
> @@ -700,9 +699,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>   pipeconf_reg = PIPECONF(pipe);
>   pipe_dsl_reg = PIPEDSL(pipe);
>  
> - save_bclrpat = intel_uncore_read(uncore, bclrpat_reg);
> - save_vtotal = intel_uncore_read(uncore, vtotal_reg);
> - vblank = intel_uncore_read(uncore, vblank_reg);
> + save_bclrpat = intel_de_read(dev_priv, bclrpat_reg);
> + save_vtotal = intel_de_read(dev_priv, vtotal_reg);
> + vblank = intel_de_read(dev_priv, vblank_reg);
>  
>   vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
>   vactive = (save_vtotal & 0x7ff) + 1;
> @@ -711,23 +710,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
>   vblank_end = ((vblank >> 16) & 0xfff) + 1;
>  
>   /* Set the border color to purple. */
> - intel_uncore_write(uncore, bclrpat_reg, 0x500050);
> + intel_de_write(dev_priv, bclrpat_reg, 0x500050);
>  
>   if (DISPLAY_VER(dev_priv) != 2) {
> - u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
> - intel_uncore_write(uncore,
> + u32 pipeconf = intel_de_read(dev_priv, pipeconf_reg);
> + intel_de_write(dev_priv,
>  pipeconf_reg,
>  pipeconf | PIPECONF_FORCE_BORDER);
> - intel_uncore_posting_read(uncore, pipeconf_reg);
> + intel_de_posting_read(dev_priv, pipeconf_reg);
>   /* Wait for next Vblank to substitue
>* border color for 

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Remove uncore from intel_bios.c

2022-08-29 Thread Jani Nikula
On Tue, 23 Aug 2022, Maarten Lankhorst  
wrote:

Commit message!

> Signed-off-by: Maarten Lankhorst 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 25 ---
>  1 file changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 198a2f4920cc..c209d0b35041 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -29,9 +29,10 @@
>  #include 
>  #include 
>  
> -#include "display/intel_display.h"
> -#include "display/intel_display_types.h"
> -#include "display/intel_gmbus.h"
> +#include "intel_de.h"
> +#include "intel_display.h"
> +#include "intel_display_types.h"
> +#include "intel_gmbus.h"
>  
>  #include "i915_drv.h"
>  #include "i915_reg.h"
> @@ -2960,16 +2961,16 @@ static struct vbt_header *spi_oprom_get_vbt(struct 
> drm_i915_private *i915)
>   u16 vbt_size;
>   u32 *vbt;
>  
> - static_region = intel_uncore_read(>uncore, SPI_STATIC_REGIONS);
> + static_region = intel_de_read(i915, SPI_STATIC_REGIONS);
>   static_region &= OPTIONROM_SPI_REGIONID_MASK;
> - intel_uncore_write(>uncore, PRIMARY_SPI_REGIONID, static_region);
> + intel_de_write(i915, PRIMARY_SPI_REGIONID, static_region);
>  
> - oprom_offset = intel_uncore_read(>uncore, OROM_OFFSET);
> + oprom_offset = intel_de_read(i915, OROM_OFFSET);
>   oprom_offset &= OROM_OFFSET_MASK;
>  
>   for (count = 0; count < oprom_size; count += 4) {
> - intel_uncore_write(>uncore, PRIMARY_SPI_ADDRESS, 
> oprom_offset + count);
> - data = intel_uncore_read(>uncore, PRIMARY_SPI_TRIGGER);
> + intel_de_write(i915, PRIMARY_SPI_ADDRESS, oprom_offset + count);
> + data = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
>  
>   if (data == *((const u32 *)"$VBT")) {
>   found = oprom_offset + count;
> @@ -2981,9 +2982,9 @@ static struct vbt_header *spi_oprom_get_vbt(struct 
> drm_i915_private *i915)
>   goto err_not_found;
>  
>   /* Get VBT size and allocate space for the VBT */
> - intel_uncore_write(>uncore, PRIMARY_SPI_ADDRESS, found +
> + intel_de_write(i915, PRIMARY_SPI_ADDRESS, found +
>  offsetof(struct vbt_header, vbt_size));
> - vbt_size = intel_uncore_read(>uncore, PRIMARY_SPI_TRIGGER);
> + vbt_size = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
>   vbt_size &= 0x;
>  
>   vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
> @@ -2991,8 +2992,8 @@ static struct vbt_header *spi_oprom_get_vbt(struct 
> drm_i915_private *i915)
>   goto err_not_found;
>  
>   for (count = 0; count < vbt_size; count += 4) {
> - intel_uncore_write(>uncore, PRIMARY_SPI_ADDRESS, found + 
> count);
> - data = intel_uncore_read(>uncore, PRIMARY_SPI_TRIGGER);
> + intel_de_write(i915, PRIMARY_SPI_ADDRESS, found + count);
> + data = intel_de_read(i915, PRIMARY_SPI_TRIGGER);
>   *(vbt + store++) = data;
>   }

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: [Intel-gfx] [PATCH 2/4] drm/i915: Remove uncore from intel_tc.c

2022-08-29 Thread Jani Nikula
On Tue, 23 Aug 2022, Maarten Lankhorst  
wrote:
> Use the intel_de macro's instead of referencing uncore directly.
>
> Signed-off-by: Maarten Lankhorst 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 55 -
>  1 file changed, 18 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c 
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 6773840f6cc7..4ee69821728d 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -5,6 +5,7 @@
>  
>  #include "i915_drv.h"
>  #include "i915_reg.h"
> +#include "intel_de.h"
>  #include "intel_display.h"
>  #include "intel_display_power_map.h"
>  #include "intel_display_types.h"
> @@ -119,11 +120,9 @@ assert_tc_cold_blocked(struct intel_digital_port 
> *dig_port)
>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
>  {
>   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = >uncore;
>   u32 lane_mask;
>  
> - lane_mask = intel_uncore_read(uncore,
> -   PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> + lane_mask = intel_de_read(i915, 
> PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
>  
>   drm_WARN_ON(>drm, lane_mask == 0x);
>   assert_tc_cold_blocked(dig_port);
> @@ -135,11 +134,9 @@ u32 intel_tc_port_get_lane_mask(struct 
> intel_digital_port *dig_port)
>  u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port 
> *dig_port)
>  {
>   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = >uncore;
>   u32 pin_mask;
>  
> - pin_mask = intel_uncore_read(uncore,
> -  PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
> + pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
>  
>   drm_WARN_ON(>drm, pin_mask == 0x);
>   assert_tc_cold_blocked(dig_port);
> @@ -185,7 +182,6 @@ void intel_tc_port_set_fia_lane_count(struct 
> intel_digital_port *dig_port,
>  {
>   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>   bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
> - struct intel_uncore *uncore = >uncore;
>   u32 val;
>  
>   drm_WARN_ON(>drm,
> @@ -193,8 +189,7 @@ void intel_tc_port_set_fia_lane_count(struct 
> intel_digital_port *dig_port,
>  
>   assert_tc_cold_blocked(dig_port);
>  
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
>   val &= ~DFLEXDPMLE1_DPMLETC_MASK(dig_port->tc_phy_fia_idx);
>  
>   switch (required_lanes) {
> @@ -215,8 +210,7 @@ void intel_tc_port_set_fia_lane_count(struct 
> intel_digital_port *dig_port,
>   MISSING_CASE(required_lanes);
>   }
>  
> - intel_uncore_write(uncore,
> -PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
> + intel_de_write(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
>  }
>  
>  static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> @@ -245,13 +239,11 @@ static void tc_port_fixup_legacy_flag(struct 
> intel_digital_port *dig_port,
>  static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
>  {
>   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = >uncore;
>   u32 isr_bit = i915->hotplug.pch_hpd[dig_port->base.hpd_pin];
>   u32 mask = 0;
>   u32 val;
>  
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
>  
>   if (val == 0x) {
>   drm_dbg_kms(>drm,
> @@ -265,7 +257,7 @@ static u32 icl_tc_port_live_status_mask(struct 
> intel_digital_port *dig_port)
>   if (val & TC_LIVE_STATE_TC(dig_port->tc_phy_fia_idx))
>   mask |= BIT(TC_PORT_DP_ALT);
>  
> - if (intel_uncore_read(uncore, SDEISR) & isr_bit)
> + if (intel_de_read(i915, SDEISR) & isr_bit)
>   mask |= BIT(TC_PORT_LEGACY);
>  
>   /* The sink can be connected only in a single mode. */
> @@ -280,7 +272,6 @@ static u32 adl_tc_port_live_status_mask(struct 
> intel_digital_port *dig_port)
>   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>   enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
>   u32 isr_bit = i915->hotplug.pch_hpd[dig_port->base.hpd_pin];
> - struct intel_uncore *uncore = >uncore;
>   u32 val, mask = 0;
>  
>   /*
> @@ -288,13 +279,13 @@ static u32 adl_tc_port_live_status_mask(struct 
> intel_digital_port *dig_port)
>* registers in IOM. Note that this doesn't apply to PHY and FIA
>* registers.
>*/
> - val = 

[Intel-gfx] [PATCH v2 18/41] drm/connector: Add a function to lookup a TV mode by its name

2022-08-29 Thread Maxime Ripard
As part of the command line parsing rework coming in the next patches,
we'll need to lookup drm_connector_tv_mode values by their name, already
defined in drm_tv_mode_enum_list.

In order to avoid any code duplication, let's do a function that will
perform a lookup of a TV mode name and return its value.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index b1fcacd150e8..0fe01a1c20ad 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1003,6 +1003,30 @@ static const struct drm_prop_enum_list 
drm_tv_mode_enum_list[] = {
 };
 DRM_ENUM_NAME_FN(drm_get_tv_mode_name, drm_tv_mode_enum_list)
 
+/**
+ * drm_get_tv_mode_from_name - Translates a TV mode name into its enum value
+ * @name: TV Mode name we want to convert
+ * @len: Length of @name
+ *
+ * Translates @name into an enum drm_connector_tv_mode.
+ *
+ * Returns: the enum value on success, a negative errno otherwise.
+ */
+int drm_get_tv_mode_from_name(const char *name, size_t len)
+{
+   unsigned int i;
+
+   for (i = 0; i < ARRAY_SIZE(drm_tv_mode_enum_list); i++) {
+   const struct drm_prop_enum_list *item = 
_tv_mode_enum_list[i];
+
+   if (strlen(item->name) == len && !strncmp(item->name, name, 
len))
+   return item->type;
+   }
+
+   return -EINVAL;
+}
+EXPORT_SYMBOL(drm_get_tv_mode_from_name)
+
 static const struct drm_prop_enum_list drm_tv_select_enum_list[] = {
{ DRM_MODE_SUBCONNECTOR_Automatic, "Automatic" }, /* DVI-I and TV-out */
{ DRM_MODE_SUBCONNECTOR_Composite, "Composite" }, /* TV-out */
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index bb39d2bb806e..49d261977d4e 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1943,6 +1943,8 @@ const char *drm_get_dp_subconnector_name(int val);
 const char *drm_get_content_protection_name(int val);
 const char *drm_get_hdcp_content_type_name(int val);
 
+int drm_get_tv_mode_from_name(const char *name, size_t len);
+
 int drm_mode_create_dvi_i_properties(struct drm_device *dev);
 void drm_connector_attach_dp_subconnector_property(struct drm_connector 
*connector);
 

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 26/41] drm/vc4: vec: Refactor VEC TV mode setting

2022-08-29 Thread Maxime Ripard
From: Mateusz Kwiatkowski 

Change the mode_set function pointer logic to declarative config0,
config1 and custom_freq fields, to make TV mode setting logic more
concise and uniform.

Signed-off-by: Mateusz Kwiatkowski 
Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 72eee0cbb615..9a37c3fcc295 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -194,7 +194,9 @@ enum vc4_vec_tv_mode_id {
 
 struct vc4_vec_tv_mode {
const struct drm_display_mode *mode;
-   void (*mode_set)(struct vc4_vec *vec);
+   u32 config0;
+   u32 config1;
+   u32 custom_freq;
 };
 
 static const struct debugfs_reg32 vec_regs[] = {
@@ -224,34 +226,6 @@ static const struct debugfs_reg32 vec_regs[] = {
VC4_REG32(VEC_DAC_MISC),
 };
 
-static void vc4_vec_ntsc_mode_set(struct vc4_vec *vec)
-{
-   struct drm_device *drm = vec->connector.dev;
-   int idx;
-
-   if (!drm_dev_enter(drm, ))
-   return;
-
-   VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN);
-   VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
-
-   drm_dev_exit(idx);
-}
-
-static void vc4_vec_ntsc_j_mode_set(struct vc4_vec *vec)
-{
-   struct drm_device *drm = vec->connector.dev;
-   int idx;
-
-   if (!drm_dev_enter(drm, ))
-   return;
-
-   VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD);
-   VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
-
-   drm_dev_exit(idx);
-}
-
 static const struct drm_display_mode ntsc_mode = {
DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,
 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
@@ -259,37 +233,6 @@ static const struct drm_display_mode ntsc_mode = {
 DRM_MODE_FLAG_INTERLACE)
 };
 
-static void vc4_vec_pal_mode_set(struct vc4_vec *vec)
-{
-   struct drm_device *drm = vec->connector.dev;
-   int idx;
-
-   if (!drm_dev_enter(drm, ))
-   return;
-
-   VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD);
-   VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);
-
-   drm_dev_exit(idx);
-}
-
-static void vc4_vec_pal_m_mode_set(struct vc4_vec *vec)
-{
-   struct drm_device *drm = vec->connector.dev;
-   int idx;
-
-   if (!drm_dev_enter(drm, ))
-   return;
-
-   VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD);
-   VEC_WRITE(VEC_CONFIG1,
- VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ);
-   VEC_WRITE(VEC_FREQ3_2, 0x223b);
-   VEC_WRITE(VEC_FREQ1_0, 0x61d1);
-
-   drm_dev_exit(idx);
-}
-
 static const struct drm_display_mode pal_mode = {
DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,
 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
@@ -300,19 +243,24 @@ static const struct drm_display_mode pal_mode = {
 static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
[VC4_VEC_TV_MODE_NTSC] = {
.mode = _mode,
-   .mode_set = vc4_vec_ntsc_mode_set,
+   .config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN,
+   .config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
[VC4_VEC_TV_MODE_NTSC_J] = {
.mode = _mode,
-   .mode_set = vc4_vec_ntsc_j_mode_set,
+   .config0 = VEC_CONFIG0_NTSC_STD,
+   .config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
[VC4_VEC_TV_MODE_PAL] = {
.mode = _mode,
-   .mode_set = vc4_vec_pal_mode_set,
+   .config0 = VEC_CONFIG0_PAL_BDGHI_STD,
+   .config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
[VC4_VEC_TV_MODE_PAL_M] = {
.mode = _mode,
-   .mode_set = vc4_vec_pal_m_mode_set,
+   .config0 = VEC_CONFIG0_PAL_BDGHI_STD,
+   .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
+   .custom_freq = 0x223b61d1,
},
 };
 
@@ -470,7 +418,16 @@ static void vc4_vec_encoder_enable(struct drm_encoder 
*encoder,
/* Mask all interrupts. */
VEC_WRITE(VEC_MASK0, 0);
 
-   vec->tv_mode->mode_set(vec);
+   VEC_WRITE(VEC_CONFIG0, vec->tv_mode->config0);
+   VEC_WRITE(VEC_CONFIG1, vec->tv_mode->config1);
+
+   if (vec->tv_mode->custom_freq != 0) {
+   VEC_WRITE(VEC_FREQ3_2,
+ (vec->tv_mode->custom_freq >> 16) &
+ 0x);
+   VEC_WRITE(VEC_FREQ1_0,
+ vec->tv_mode->custom_freq & 0x);
+   }
 
VEC_WRITE(VEC_DAC_MISC,
  VEC_DAC_MISC_VID_ACT | VEC_DAC_MISC_DAC_RST_N);

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 34/41] drm/sun4i: tv: Remove unused mode_valid

2022-08-29 Thread Maxime Ripard
The mode_valid implementation is pretty much a nop, let's remove it.

Signed-off-by: Maxime Ripard 
Reviewed-by: Jernej Skrabec 

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 94883abe0dfd..53152d77c392 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -497,16 +497,8 @@ static int sun4i_tv_comp_get_modes(struct drm_connector 
*connector)
return i;
 }
 
-static int sun4i_tv_comp_mode_valid(struct drm_connector *connector,
-   struct drm_display_mode *mode)
-{
-   /* TODO */
-   return MODE_OK;
-}
-
 static const struct drm_connector_helper_funcs 
sun4i_tv_comp_connector_helper_funcs = {
.get_modes  = sun4i_tv_comp_get_modes,
-   .mode_valid = sun4i_tv_comp_mode_valid,
 };
 
 static void

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 23/41] drm/atomic-helper: Add an analog TV atomic_check implementation

2022-08-29 Thread Maxime Ripard
The analog TV connector drivers share some atomic_check logic, and the new
TV standard property have created a bunch of new constraints that needs to
be shared across drivers too.

Let's create an atomic_check helper for those use cases.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
b/drivers/gpu/drm/drm_atomic_state_helper.c
index 0373c3dc824b..d64733c6aae3 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -556,6 +556,42 @@ void drm_atomic_helper_connector_tv_reset(struct 
drm_connector *connector)
 }
 EXPORT_SYMBOL(drm_atomic_helper_connector_tv_reset);
 
+/**
+ * @drm_atomic_helper_connector_tv_check: Validate an analog TV connector state
+ * @connector: DRM Connector
+ * @state: the DRM State object
+ *
+ * Checks the state object to see if the requested state is valid for an
+ * analog TV connector.
+ *
+ * Returns:
+ * Zero for success, a negative error code on error.
+ */
+int drm_atomic_helper_connector_tv_check(struct drm_connector *connector,
+struct drm_atomic_state *state)
+{
+   struct drm_connector_state *old_conn_state =
+   drm_atomic_get_old_connector_state(state, connector);
+   struct drm_connector_state *new_conn_state =
+   drm_atomic_get_new_connector_state(state, connector);
+   struct drm_crtc_state *crtc_state;
+   struct drm_crtc *crtc;
+
+   crtc = new_conn_state->crtc;
+   if (!crtc)
+   return 0;
+
+   crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
+   if (!crtc_state)
+   return -EINVAL;
+
+   if (old_conn_state->tv.mode != new_conn_state->tv.mode)
+   crtc_state->mode_changed = true;
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_atomic_helper_connector_tv_check);
+
 /**
  * __drm_atomic_helper_connector_duplicate_state - copy atomic connector state
  * @connector: connector object
diff --git a/include/drm/drm_atomic_state_helper.h 
b/include/drm/drm_atomic_state_helper.h
index c8fbce795ee7..b9740edb2658 100644
--- a/include/drm/drm_atomic_state_helper.h
+++ b/include/drm/drm_atomic_state_helper.h
@@ -26,6 +26,7 @@
 
 #include 
 
+struct drm_atomic_state;
 struct drm_bridge;
 struct drm_bridge_state;
 struct drm_crtc;
@@ -71,6 +72,8 @@ void __drm_atomic_helper_connector_reset(struct drm_connector 
*connector,
 struct drm_connector_state 
*conn_state);
 void drm_atomic_helper_connector_reset(struct drm_connector *connector);
 void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector);
+int drm_atomic_helper_connector_tv_check(struct drm_connector *connector,
+struct drm_atomic_state *state);
 void drm_atomic_helper_connector_tv_margins_reset(struct drm_connector 
*connector);
 void
 __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector,

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 38/41] drm/sun4i: tv: Remove useless destroy function

2022-08-29 Thread Maxime Ripard
Our destroy implementation is just calling the generic helper, so let's
just remove our function and directly use the helper.

Signed-off-by: Maxime Ripard 
Reviewed-by: Jernej Skrabec 

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 52bbba8f19dc..6d7e1d51569a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -491,15 +491,9 @@ static const struct drm_connector_helper_funcs 
sun4i_tv_comp_connector_helper_fu
.get_modes  = sun4i_tv_comp_get_modes,
 };
 
-static void
-sun4i_tv_comp_connector_destroy(struct drm_connector *connector)
-{
-   drm_connector_cleanup(connector);
-}
-
 static const struct drm_connector_funcs sun4i_tv_comp_connector_funcs = {
.fill_modes = drm_helper_probe_single_connector_modes,
-   .destroy= sun4i_tv_comp_connector_destroy,
+   .destroy= drm_connector_cleanup,
.reset  = drm_atomic_helper_connector_reset,
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state   = drm_atomic_helper_connector_destroy_state,

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 19/41] drm/modes: Introduce the tv_mode property as a command-line option

2022-08-29 Thread Maxime Ripard
Our new tv mode option allows to specify the TV mode from a property.
However, it can still be useful, for example to avoid any boot time
artifact, to set that property directly from the kernel command line.

Let's add some code to allow it, and some unit tests to exercise that code.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 73d01e755496..a759a4ba0036 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2115,6 +2115,30 @@ static int drm_mode_parse_panel_orientation(const char 
*delim,
return 0;
 }
 
+static int drm_mode_parse_tv_mode(const char *delim,
+ struct drm_cmdline_mode *mode)
+{
+   const char *value;
+   unsigned int len;
+   int ret;
+
+   if (*delim != '=')
+   return -EINVAL;
+
+   value = delim + 1;
+   delim = strchr(value, ',');
+   if (!delim)
+   delim = value + strlen(value);
+
+   ret = drm_get_tv_mode_from_name(value, delim - value);
+   if (ret < 0)
+   return ret;
+
+   mode->tv_mode = ret;
+
+   return 0;
+}
+
 static int drm_mode_parse_cmdline_options(const char *str,
  bool freestanding,
  const struct drm_connector *connector,
@@ -2184,6 +2208,9 @@ static int drm_mode_parse_cmdline_options(const char *str,
} else if (!strncmp(option, "panel_orientation", delim - 
option)) {
if (drm_mode_parse_panel_orientation(delim, mode))
return -EINVAL;
+   } else if (!strncmp(option, "tv_mode", delim - option)) {
+   if (drm_mode_parse_tv_mode(delim, mode))
+   return -EINVAL;
} else {
return -EINVAL;
}
@@ -2212,20 +2239,22 @@ struct drm_named_mode {
unsigned int xres;
unsigned int yres;
unsigned int flags;
+   unsigned int tv_mode;
 };
 
-#define NAMED_MODE(_name, _pclk, _x, _y, _flags)   \
+#define NAMED_MODE(_name, _pclk, _x, _y, _flags, _mode)\
{   \
.name = _name,  \
.pixel_clock_khz = _pclk,   \
.xres = _x, \
.yres = _y, \
.flags = _flags,\
+   .tv_mode = _mode,   \
}
 
 static const struct drm_named_mode drm_named_modes[] = {
-   NAMED_MODE("NTSC", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE),
-   NAMED_MODE("PAL", 13500, 720, 576, DRM_MODE_FLAG_INTERLACE),
+   NAMED_MODE("NTSC", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_NTSC_M),
+   NAMED_MODE("PAL", 13500, 720, 576, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_PAL_B),
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
@@ -2271,6 +2300,7 @@ static int drm_mode_parse_cmdline_named_mode(const char 
*name,
cmdline_mode->xres = mode->xres;
cmdline_mode->yres = mode->yres;
cmdline_mode->interlace = !!(mode->flags & 
DRM_MODE_FLAG_INTERLACE);
+   cmdline_mode->tv_mode = mode->tv_mode;
cmdline_mode->specified = true;
 
return 1;
diff --git a/drivers/gpu/drm/tests/drm_cmdline_parser_test.c 
b/drivers/gpu/drm/tests/drm_cmdline_parser_test.c
index 59b29cdfdd35..f1e73ed65be0 100644
--- a/drivers/gpu/drm/tests/drm_cmdline_parser_test.c
+++ b/drivers/gpu/drm/tests/drm_cmdline_parser_test.c
@@ -885,6 +885,201 @@ static void drm_cmdline_test_multiple_options(struct 
kunit *test)
KUNIT_EXPECT_EQ(test, mode.force, DRM_FORCE_UNSPECIFIED);
 }
 
+static void drm_cmdline_test_tv_options(struct kunit *test,
+   const char *cmdline,
+   const struct drm_display_mode 
*expected_mode,
+   unsigned int expected_tv_mode)
+{
+   struct drm_cmdline_mode mode = { };
+
+   KUNIT_EXPECT_TRUE(test, 
drm_mode_parse_command_line_for_connector(cmdline,
+ 
_connector, ));
+   KUNIT_EXPECT_TRUE(test, mode.specified);
+   KUNIT_EXPECT_EQ(test, mode.xres, expected_mode->hdisplay);
+   KUNIT_EXPECT_EQ(test, mode.yres, expected_mode->vdisplay);
+   KUNIT_EXPECT_EQ(test, mode.tv_mode, expected_tv_mode);
+
+   KUNIT_EXPECT_FALSE(test, mode.refresh_specified);
+
+   KUNIT_EXPECT_FALSE(test, mode.bpp_specified);
+
+   KUNIT_EXPECT_FALSE(test, mode.rb);
+   KUNIT_EXPECT_FALSE(test, mode.cvt);
+   KUNIT_EXPECT_EQ(test, mode.interlace, !!(expected_mode->flags & 
DRM_MODE_FLAG_INTERLACE));
+   KUNIT_EXPECT_FALSE(test, 

[Intel-gfx] [PATCH v2 24/41] drm/vc4: vec: Remove empty mode_fixup

2022-08-29 Thread Maxime Ripard
The mode_fixup hooks are deprecated, and the behaviour we implement is the
default one anyway. Let's remove it.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index d5140fe0be4f..d521ffd8d75c 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -483,14 +483,6 @@ static void vc4_vec_encoder_enable(struct drm_encoder 
*encoder)
drm_dev_exit(idx);
 }
 
-
-static bool vc4_vec_encoder_mode_fixup(struct drm_encoder *encoder,
-  const struct drm_display_mode *mode,
-  struct drm_display_mode *adjusted_mode)
-{
-   return true;
-}
-
 static void vc4_vec_encoder_atomic_mode_set(struct drm_encoder *encoder,
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
@@ -518,7 +510,6 @@ static int vc4_vec_encoder_atomic_check(struct drm_encoder 
*encoder,
 static const struct drm_encoder_helper_funcs vc4_vec_encoder_helper_funcs = {
.disable = vc4_vec_encoder_disable,
.enable = vc4_vec_encoder_enable,
-   .mode_fixup = vc4_vec_encoder_mode_fixup,
.atomic_check = vc4_vec_encoder_atomic_check,
.atomic_mode_set = vc4_vec_encoder_atomic_mode_set,
 };

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 36/41] drm/sun4i: tv: Merge mode_set into atomic_enable

2022-08-29 Thread Maxime Ripard
Our mode_set implementation can be merged into our atomic_enable
implementation to simplify things, so let's do this.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index f7aad995ab5b..3944da9a3c34 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -359,23 +359,13 @@ static void sun4i_tv_enable(struct drm_encoder *encoder,
 {
struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
-
-   DRM_DEBUG_DRIVER("Enabling the TV Output\n");
-
-   sunxi_engine_apply_color_correction(crtc->engine);
-
-   regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
-  SUN4I_TVE_EN_ENABLE,
-  SUN4I_TVE_EN_ENABLE);
-}
-
-static void sun4i_tv_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
-{
-   struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
+   struct drm_crtc_state *crtc_state =
+   drm_atomic_get_new_crtc_state(state, encoder->crtc);
+   struct drm_display_mode *mode = _state->mode;
const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode);
 
+   DRM_DEBUG_DRIVER("Enabling the TV Output\n");
+
/* Enable and map the DAC to the output */
regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
   SUN4I_TVE_EN_DAC_MAP_MASK,
@@ -468,12 +458,17 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder,
  SUN4I_TVE_RESYNC_FIELD : 0));
 
regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0);
+
+   sunxi_engine_apply_color_correction(crtc->engine);
+
+   regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
+  SUN4I_TVE_EN_ENABLE,
+  SUN4I_TVE_EN_ENABLE);
 }
 
 static const struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = {
.atomic_disable = sun4i_tv_disable,
.atomic_enable  = sun4i_tv_enable,
-   .mode_set   = sun4i_tv_mode_set,
 };
 
 static int sun4i_tv_comp_get_modes(struct drm_connector *connector)

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 20/41] drm/modes: Properly generate a drm_display_mode from a named mode

2022-08-29 Thread Maxime Ripard
The framework will get the drm_display_mode from the drm_cmdline_mode it
got by parsing the video command line argument by calling
drm_connector_pick_cmdline_mode().

The heavy lifting will then be done by the drm_mode_create_from_cmdline_mode()
function.

In the case of the named modes though, there's no real code to make that
translation and we rely on the drivers to guess which actual display mode
we meant.

Let's modify drm_mode_create_from_cmdline_mode() to properly generate the
drm_display_mode we mean when passing a named mode.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index a759a4ba0036..065dbfbd815e 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2480,6 +2480,36 @@ bool drm_mode_parse_command_line_for_connector(const 
char *mode_option,
 }
 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
 
+static struct drm_display_mode *drm_named_mode(struct drm_device *dev,
+  struct drm_cmdline_mode *cmd)
+{
+   struct drm_display_mode *mode;
+   unsigned int i;
+
+   for (i = 0; i < ARRAY_SIZE(drm_named_modes); i++) {
+   const struct drm_named_mode *named_mode = _named_modes[i];
+
+   if (strcmp(cmd->name, named_mode->name))
+   continue;
+
+   if (!named_mode->tv_mode)
+   continue;
+
+   mode = drm_analog_tv_mode(dev,
+ named_mode->tv_mode,
+ named_mode->pixel_clock_khz * 1000,
+ named_mode->xres,
+ named_mode->yres,
+ named_mode->flags & 
DRM_MODE_FLAG_INTERLACE);
+   if (!mode)
+   return NULL;
+
+   return mode;
+   }
+
+   return NULL;
+}
+
 /**
  * drm_mode_create_from_cmdline_mode - convert a command line modeline into a 
DRM display mode
  * @dev: DRM device to create the new mode for
@@ -2497,7 +2527,9 @@ drm_mode_create_from_cmdline_mode(struct drm_device *dev,
if (cmd->xres == 0 || cmd->yres == 0)
return NULL;
 
-   if (cmd->cvt)
+   if (strlen(cmd->name))
+   mode = drm_named_mode(dev, cmd);
+   else if (cmd->cvt)
mode = drm_cvt_mode(dev,
cmd->xres, cmd->yres,
cmd->refresh_specified ? cmd->refresh : 60,
diff --git a/drivers/gpu/drm/tests/drm_client_modeset_test.c 
b/drivers/gpu/drm/tests/drm_client_modeset_test.c
index 46335de7bc6b..4380cf670fb4 100644
--- a/drivers/gpu/drm/tests/drm_client_modeset_test.c
+++ b/drivers/gpu/drm/tests/drm_client_modeset_test.c
@@ -26,6 +26,20 @@ static int drm_client_modeset_connector_get_modes(struct 
drm_connector *connecto
 
count = drm_add_modes_noedid(connector, 1920, 1200);
 
+   mode = drm_mode_analog_ntsc_480i(connector->dev);
+   if (!mode)
+   return -ENOMEM;
+
+   drm_mode_probed_add(connector, mode);
+   count += 1;
+
+   mode = drm_mode_analog_pal_576i(connector->dev);
+   if (!mode)
+   return -ENOMEM;
+
+   drm_mode_probed_add(connector, mode);
+   count += 1;
+
return count;
 }
 
@@ -58,6 +72,9 @@ static int drm_client_modeset_test_init(struct kunit *test)
return ret;
drm_connector_helper_add(>connector, 
_client_modeset_connector_helper_funcs);
 
+   priv->connector.interlace_allowed = true;
+   priv->connector.doublescan_allowed = true;
+
return 0;
 }
 
@@ -97,8 +114,62 @@ static void drm_pick_cmdline_res_1920_1080_60(struct kunit 
*test)
KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected_mode, mode));
 }
 
+static void drm_pick_cmdline_named_ntsc(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+   struct drm_device *drm = priv->drm;
+   struct drm_connector *connector = >connector;
+   struct drm_cmdline_mode *cmdline_mode = >cmdline_mode;
+   struct drm_display_mode *mode;
+   const char *cmdline = "NTSC";
+   int ret;
+
+   KUNIT_ASSERT_TRUE(test,
+ drm_mode_parse_command_line_for_connector(cmdline,
+   connector,
+   
cmdline_mode));
+
+   mutex_lock(>mode_config.mutex);
+   ret = drm_helper_probe_single_connector_modes(connector, 1920, 1080);
+   mutex_unlock(>mode_config.mutex);
+   KUNIT_ASSERT_GT(test, ret, 0);
+
+   mode = drm_connector_pick_cmdline_mode(connector);
+   KUNIT_ASSERT_PTR_NE(test, mode, NULL);
+
+   KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_ntsc_480i(drm), 
mode));
+}
+
+static void drm_pick_cmdline_named_pal(struct kunit *test)

[Intel-gfx] [PATCH v2 39/41] drm/sun4i: tv: Rename error label

2022-08-29 Thread Maxime Ripard
The other error labels in sun4i_tv_bind() are named after the task they
perform (err_disable_clk to call clk_disable_unprepare for example).

However, the err_cleanup_connector is named after the calling site
(drm_connector_init failing) and will actually cleanup the encoder. Let's
rename it to err_cleanup_encoder to be consistent.

Signed-off-by: Maxime Ripard 
Reviewed-by: Jernej Skrabec 

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 6d7e1d51569a..ad6a3739bfa9 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -580,7 +580,7 @@ static int sun4i_tv_bind(struct device *dev, struct device 
*master,
if (ret) {
dev_err(dev,
"Couldn't initialise the Composite connector\n");
-   goto err_cleanup_connector;
+   goto err_cleanup_encoder;
}
tv->connector.interlace_allowed = true;
 
@@ -588,7 +588,7 @@ static int sun4i_tv_bind(struct device *dev, struct device 
*master,
 
return 0;
 
-err_cleanup_connector:
+err_cleanup_encoder:
drm_encoder_cleanup(>encoder);
 err_disable_clk:
clk_disable_unprepare(tv->clk);

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 41/41] drm/sun4i: tv: Convert to the new TV mode property

2022-08-29 Thread Maxime Ripard
Now that the core can deal fine with analog TV modes, let's convert the
sun4i TV driver to leverage those new features.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 74ff5ad6a8b9..10c0d727d700 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -140,23 +140,14 @@ struct resync_parameters {
 struct tv_mode {
char*name;
 
+   unsigned inttv_mode;
+
u32 mode;
u32 chroma_freq;
u16 back_porch;
u16 front_porch;
-   u16 line_number;
u16 vblank_level;
 
-   u32 hdisplay;
-   u16 hfront_porch;
-   u16 hsync_len;
-   u16 hback_porch;
-
-   u32 vdisplay;
-   u16 vfront_porch;
-   u16 vsync_len;
-   u16 vback_porch;
-
boolyc_en;
booldac3_en;
booldac_bit25_en;
@@ -212,7 +203,7 @@ static const struct resync_parameters pal_resync_parameters 
= {
 
 static const struct tv_mode tv_modes[] = {
{
-   .name   = "NTSC",
+   .tv_mode= DRM_MODE_TV_MODE_NTSC_M,
.mode   = SUN4I_TVE_CFG0_RES_480i,
.chroma_freq= 0x21f07c1f,
.yc_en  = true,
@@ -221,17 +212,6 @@ static const struct tv_mode tv_modes[] = {
 
.back_porch = 118,
.front_porch= 32,
-   .line_number= 525,
-
-   .hdisplay   = 720,
-   .hfront_porch   = 18,
-   .hsync_len  = 2,
-   .hback_porch= 118,
-
-   .vdisplay   = 480,
-   .vfront_porch   = 26,
-   .vsync_len  = 2,
-   .vback_porch= 17,
 
.vblank_level   = 240,
 
@@ -241,23 +221,12 @@ static const struct tv_mode tv_modes[] = {
.resync_params  = _resync_parameters,
},
{
-   .name   = "PAL",
+   .tv_mode= DRM_MODE_TV_MODE_PAL_B,
.mode   = SUN4I_TVE_CFG0_RES_576i,
.chroma_freq= 0x2a098acb,
 
.back_porch = 138,
.front_porch= 24,
-   .line_number= 625,
-
-   .hdisplay   = 720,
-   .hfront_porch   = 3,
-   .hsync_len  = 2,
-   .hback_porch= 139,
-
-   .vdisplay   = 576,
-   .vfront_porch   = 28,
-   .vsync_len  = 2,
-   .vback_porch= 19,
 
.vblank_level   = 252,
 
@@ -275,63 +244,21 @@ drm_encoder_to_sun4i_tv(struct drm_encoder *encoder)
encoder);
 }
 
-/*
- * FIXME: If only the drm_display_mode private field was usable, this
- * could go away...
- *
- * So far, it doesn't seem to be preserved when the mode is passed by
- * to mode_set for some reason.
- */
-static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct 
drm_display_mode *mode)
+static const struct tv_mode *
+sun4i_tv_find_tv_by_mode(unsigned int mode)
 {
int i;
 
-   /* First try to identify the mode by name */
for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
const struct tv_mode *tv_mode = _modes[i];
 
-   DRM_DEBUG_DRIVER("Comparing mode %s vs %s",
-mode->name, tv_mode->name);
-
-   if (!strcmp(mode->name, tv_mode->name))
-   return tv_mode;
-   }
-
-   /* Then by number of lines */
-   for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
-   const struct tv_mode *tv_mode = _modes[i];
-
-   DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)",
-mode->name, tv_mode->name,
-mode->vdisplay, tv_mode->vdisplay);
-
-   if (mode->vdisplay == tv_mode->vdisplay)
+   if (tv_mode->tv_mode == mode)
return tv_mode;
}
 
return NULL;
 }
 
-static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode,
- struct drm_display_mode *mode)
-{
-   DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name);
-
-   mode->type = DRM_MODE_TYPE_DRIVER;
-   mode->clock = 13500;
-   mode->flags = DRM_MODE_FLAG_INTERLACE;
-
-   mode->hdisplay = tv_mode->hdisplay;
-   mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch;
-   mode->hsync_end = mode->hsync_start + tv_mode->hsync_len;
-   mode->htotal = mode->hsync_end  + tv_mode->hback_porch;
-
-   mode->vdisplay = tv_mode->vdisplay;
-   mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch;
-   mode->vsync_end = 

[Intel-gfx] [PATCH v2 27/41] drm/vc4: vec: Remove redundant atomic_mode_set

2022-08-29 Thread Maxime Ripard
From: Mateusz Kwiatkowski 

Let's remove the superfluous tv_mode field, which was redundant with the
mode field in struct drm_tv_connector_state.

Signed-off-by: Mateusz Kwiatkowski 
Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 9a37c3fcc295..4d7bc7c20704 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -171,8 +171,6 @@ struct vc4_vec {
 
struct clk *clock;
 
-   const struct vc4_vec_tv_mode *tv_mode;
-
struct debugfs_regset32 regset;
 };
 
@@ -316,7 +314,6 @@ static int vc4_vec_connector_init(struct drm_device *dev, 
struct vc4_vec *vec)
drm_object_attach_property(>base,
   dev->mode_config.legacy_tv_mode_property,
   VC4_VEC_TV_MODE_NTSC);
-   vec->tv_mode = _vec_tv_modes[VC4_VEC_TV_MODE_NTSC];
 
drm_connector_attach_encoder(connector, >encoder.base);
 
@@ -360,6 +357,11 @@ static void vc4_vec_encoder_enable(struct drm_encoder 
*encoder,
 {
struct drm_device *drm = encoder->dev;
struct vc4_vec *vec = encoder_to_vc4_vec(encoder);
+   struct drm_connector *connector = >connector;
+   struct drm_connector_state *conn_state =
+   drm_atomic_get_new_connector_state(state, connector);
+   const struct vc4_vec_tv_mode *tv_mode =
+   _vec_tv_modes[conn_state->tv.mode];
int idx, ret;
 
if (!drm_dev_enter(drm, ))
@@ -418,15 +420,14 @@ static void vc4_vec_encoder_enable(struct drm_encoder 
*encoder,
/* Mask all interrupts. */
VEC_WRITE(VEC_MASK0, 0);
 
-   VEC_WRITE(VEC_CONFIG0, vec->tv_mode->config0);
-   VEC_WRITE(VEC_CONFIG1, vec->tv_mode->config1);
+   VEC_WRITE(VEC_CONFIG0, tv_mode->config0);
+   VEC_WRITE(VEC_CONFIG1, tv_mode->config1);
 
-   if (vec->tv_mode->custom_freq != 0) {
+   if (tv_mode->custom_freq != 0) {
VEC_WRITE(VEC_FREQ3_2,
- (vec->tv_mode->custom_freq >> 16) &
- 0x);
+ (tv_mode->custom_freq >> 16) & 0x);
VEC_WRITE(VEC_FREQ1_0,
- vec->tv_mode->custom_freq & 0x);
+ tv_mode->custom_freq & 0x);
}
 
VEC_WRITE(VEC_DAC_MISC,
@@ -442,15 +443,6 @@ static void vc4_vec_encoder_enable(struct drm_encoder 
*encoder,
drm_dev_exit(idx);
 }
 
-static void vc4_vec_encoder_atomic_mode_set(struct drm_encoder *encoder,
-   struct drm_crtc_state *crtc_state,
-   struct drm_connector_state *conn_state)
-{
-   struct vc4_vec *vec = encoder_to_vc4_vec(encoder);
-
-   vec->tv_mode = _vec_tv_modes[conn_state->tv.mode];
-}
-
 static int vc4_vec_encoder_atomic_check(struct drm_encoder *encoder,
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
@@ -470,7 +462,6 @@ static const struct drm_encoder_helper_funcs 
vc4_vec_encoder_helper_funcs = {
.atomic_check = vc4_vec_encoder_atomic_check,
.atomic_disable = vc4_vec_encoder_disable,
.atomic_enable = vc4_vec_encoder_enable,
-   .atomic_mode_set = vc4_vec_encoder_atomic_mode_set,
 };
 
 static int vc4_vec_late_register(struct drm_encoder *encoder)

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 37/41] drm/sun4i: tv: Remove useless function

2022-08-29 Thread Maxime Ripard
The drm_connector_to_sun4i_tv() function isn't used anywhere in the driver,
so let's remove it.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 3944da9a3c34..52bbba8f19dc 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -275,13 +275,6 @@ drm_encoder_to_sun4i_tv(struct drm_encoder *encoder)
encoder);
 }
 
-static inline struct sun4i_tv *
-drm_connector_to_sun4i_tv(struct drm_connector *connector)
-{
-   return container_of(connector, struct sun4i_tv,
-   connector);
-}
-
 /*
  * FIXME: If only the drm_display_mode private field was usable, this
  * could go away...

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 35/41] drm/sun4i: tv: Convert to atomic hooks

2022-08-29 Thread Maxime Ripard
The sun4i TV driver still uses legacy enable and disable hook
implementation. Let's convert to the atomic variants.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 53152d77c392..f7aad995ab5b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -339,7 +339,8 @@ static void sun4i_tv_mode_to_drm_mode(const struct tv_mode 
*tv_mode,
mode->vtotal = mode->vsync_end  + tv_mode->vback_porch;
 }
 
-static void sun4i_tv_disable(struct drm_encoder *encoder)
+static void sun4i_tv_disable(struct drm_encoder *encoder,
+   struct drm_atomic_state *state)
 {
struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
@@ -353,7 +354,8 @@ static void sun4i_tv_disable(struct drm_encoder *encoder)
sunxi_engine_disable_color_correction(crtc->engine);
 }
 
-static void sun4i_tv_enable(struct drm_encoder *encoder)
+static void sun4i_tv_enable(struct drm_encoder *encoder,
+   struct drm_atomic_state *state)
 {
struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
@@ -469,8 +471,8 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder,
 }
 
 static const struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = {
-   .disable= sun4i_tv_disable,
-   .enable = sun4i_tv_enable,
+   .atomic_disable = sun4i_tv_disable,
+   .atomic_enable  = sun4i_tv_enable,
.mode_set   = sun4i_tv_mode_set,
 };
 

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 28/41] drm/vc4: vec: Fix timings for VEC modes

2022-08-29 Thread Maxime Ripard
From: Mateusz Kwiatkowski 

This commit fixes vertical timings of the VEC (composite output) modes
to accurately represent the 525-line ("NTSC") and 625-line ("PAL") ITU-R
standards.

Previous timings were actually defined as 502 and 601 lines, resulting
in non-standard 62.69 Hz and 52 Hz signals being generated,
respectively.

Signed-off-by: Mateusz Kwiatkowski 
Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 4d7bc7c20704..d1d40b69279e 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -227,14 +227,14 @@ static const struct debugfs_reg32 vec_regs[] = {
 static const struct drm_display_mode ntsc_mode = {
DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,
 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
-480, 480 + 3, 480 + 3 + 3, 480 + 3 + 3 + 16, 0,
+480, 480 + 7, 480 + 7 + 6, 525, 0,
 DRM_MODE_FLAG_INTERLACE)
 };
 
 static const struct drm_display_mode pal_mode = {
DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,
 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
-576, 576 + 2, 576 + 2 + 3, 576 + 2 + 3 + 20, 0,
+576, 576 + 4, 576 + 4 + 6, 625, 0,
 DRM_MODE_FLAG_INTERLACE)
 };
 

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 16/41] drm/modes: Fill drm_cmdline mode from named modes

2022-08-29 Thread Maxime Ripard
The current code to deal with named modes will only set the mode name, and
then it's up to drivers to try to match that name to whatever mode or
configuration they see fit.

The plan is to remove that need and move the named mode handling out of
drivers and into the core, and only rely on modes and properties. Let's
start by properly filling drm_cmdline_mode from a named mode.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 1fdfa004b139..5e898699b532 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2208,11 +2208,22 @@ static int drm_mode_parse_cmdline_options(const char 
*str,
 
 struct drm_named_mode {
const char *name;
+   unsigned int xres;
+   unsigned int yres;
+   unsigned int flags;
 };
 
+#define NAMED_MODE(_name, _x, _y, _flags)  \
+   {   \
+   .name = _name,  \
+   .xres = _x, \
+   .yres = _y, \
+   .flags = _flags,\
+   }
+
 static const struct drm_named_mode drm_named_modes[] = {
-   { "NTSC", },
-   { "PAL", },
+   NAMED_MODE("NTSC", 720, 480, DRM_MODE_FLAG_INTERLACE),
+   NAMED_MODE("PAL", 720, 576, DRM_MODE_FLAG_INTERLACE),
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
@@ -2254,6 +2265,9 @@ static int drm_mode_parse_cmdline_named_mode(const char 
*name,
continue;
 
strcpy(cmdline_mode->name, mode->name);
+   cmdline_mode->xres = mode->xres;
+   cmdline_mode->yres = mode->yres;
+   cmdline_mode->interlace = !!(mode->flags & 
DRM_MODE_FLAG_INTERLACE);
cmdline_mode->specified = true;
 
return 1;

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 29/41] drm/vc4: vec: Switch for common modes

2022-08-29 Thread Maxime Ripard
Now that the core has a definition for the 525 and 625 lines analog TV
modes, let's switch to it for vc4.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index d1d40b69279e..63e4e617e321 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -224,38 +224,24 @@ static const struct debugfs_reg32 vec_regs[] = {
VC4_REG32(VEC_DAC_MISC),
 };
 
-static const struct drm_display_mode ntsc_mode = {
-   DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,
-720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
-480, 480 + 7, 480 + 7 + 6, 525, 0,
-DRM_MODE_FLAG_INTERLACE)
-};
-
-static const struct drm_display_mode pal_mode = {
-   DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,
-720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
-576, 576 + 4, 576 + 4 + 6, 625, 0,
-DRM_MODE_FLAG_INTERLACE)
-};
-
 static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
[VC4_VEC_TV_MODE_NTSC] = {
-   .mode = _mode,
+   .mode = _mode_480i,
.config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
[VC4_VEC_TV_MODE_NTSC_J] = {
-   .mode = _mode,
+   .mode = _mode_480i,
.config0 = VEC_CONFIG0_NTSC_STD,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
[VC4_VEC_TV_MODE_PAL] = {
-   .mode = _mode,
+   .mode = _mode_576i,
.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
[VC4_VEC_TV_MODE_PAL_M] = {
-   .mode = _mode,
+   .mode = _mode_576i,
.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
.config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
.custom_freq = 0x223b61d1,

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 25/41] drm/vc4: vec: Convert to atomic helpers

2022-08-29 Thread Maxime Ripard
The VC4 VEC driver still uses legacy enable and disable hook
implementation. Let's convert to the atomic variants.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index d521ffd8d75c..72eee0cbb615 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -375,7 +375,8 @@ static int vc4_vec_connector_init(struct drm_device *dev, 
struct vc4_vec *vec)
return 0;
 }
 
-static void vc4_vec_encoder_disable(struct drm_encoder *encoder)
+static void vc4_vec_encoder_disable(struct drm_encoder *encoder,
+   struct drm_atomic_state *state)
 {
struct drm_device *drm = encoder->dev;
struct vc4_vec *vec = encoder_to_vc4_vec(encoder);
@@ -406,7 +407,8 @@ static void vc4_vec_encoder_disable(struct drm_encoder 
*encoder)
drm_dev_exit(idx);
 }
 
-static void vc4_vec_encoder_enable(struct drm_encoder *encoder)
+static void vc4_vec_encoder_enable(struct drm_encoder *encoder,
+  struct drm_atomic_state *state)
 {
struct drm_device *drm = encoder->dev;
struct vc4_vec *vec = encoder_to_vc4_vec(encoder);
@@ -508,9 +510,9 @@ static int vc4_vec_encoder_atomic_check(struct drm_encoder 
*encoder,
 }
 
 static const struct drm_encoder_helper_funcs vc4_vec_encoder_helper_funcs = {
-   .disable = vc4_vec_encoder_disable,
-   .enable = vc4_vec_encoder_enable,
.atomic_check = vc4_vec_encoder_atomic_check,
+   .atomic_disable = vc4_vec_encoder_disable,
+   .atomic_enable = vc4_vec_encoder_enable,
.atomic_mode_set = vc4_vec_encoder_atomic_mode_set,
 };
 

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 15/41] drm/modes: Switch to named mode descriptors

2022-08-29 Thread Maxime Ripard
The current named mode parsing relies only the mode name, and doesn't allow
to specify any other parameter.

Let's convert that string list to an array of a custom structure that will
hold the name and some additional parameters in the future.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 0636cb707544..1fdfa004b139 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2206,9 +2206,13 @@ static int drm_mode_parse_cmdline_options(const char 
*str,
return 0;
 }
 
-static const char * const drm_named_modes_whitelist[] = {
-   "NTSC",
-   "PAL",
+struct drm_named_mode {
+   const char *name;
+};
+
+static const struct drm_named_mode drm_named_modes[] = {
+   { "NTSC", },
+   { "PAL", },
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
@@ -2241,14 +2245,15 @@ static int drm_mode_parse_cmdline_named_mode(const char 
*name,
 * We're sure we're a named mode at that point, iterate over the
 * list of modes we're aware of.
 */
-   for (i = 0; i < ARRAY_SIZE(drm_named_modes_whitelist); i++) {
+   for (i = 0; i < ARRAY_SIZE(drm_named_modes); i++) {
+   const struct drm_named_mode *mode = _named_modes[i];
int ret;
 
-   ret = str_has_prefix(name, drm_named_modes_whitelist[i]);
+   ret = str_has_prefix(name, mode->name);
if (ret != name_end)
continue;
 
-   strcpy(cmdline_mode->name, drm_named_modes_whitelist[i]);
+   strcpy(cmdline_mode->name, mode->name);
cmdline_mode->specified = true;
 
return 1;

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 22/41] drm/atomic-helper: Add a TV properties reset helper

2022-08-29 Thread Maxime Ripard
The drm_tv_create_properties() function will create a bunch of properties,
but it's up to each and every driver using that function to properly reset
the state of these properties leading to inconsistent behaviours.

Let's create a helper that will take care of it.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
b/drivers/gpu/drm/drm_atomic_state_helper.c
index dfb57217253b..0373c3dc824b 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -481,6 +481,81 @@ void drm_atomic_helper_connector_tv_margins_reset(struct 
drm_connector *connecto
 }
 EXPORT_SYMBOL(drm_atomic_helper_connector_tv_margins_reset);
 
+/**
+ * drm_atomic_helper_connector_tv_reset - Resets Analog TV connector properties
+ * @connector: DRM connector
+ *
+ * Resets the analog TV properties attached to a connector
+ */
+void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector)
+{
+   struct drm_device *dev = connector->dev;
+   struct drm_cmdline_mode *cmdline = >cmdline_mode;
+   struct drm_connector_state *state = connector->state;
+   struct drm_property *prop;
+   uint64_t val;
+
+   prop = dev->mode_config.tv_mode_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.mode = val;
+
+   if (cmdline->tv_mode)
+   state->tv.mode = cmdline->tv_mode;
+
+   prop = dev->mode_config.tv_select_subconnector_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.select_subconnector = val;
+
+   prop = dev->mode_config.tv_subconnector_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.subconnector = val;
+
+   prop = dev->mode_config.tv_brightness_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.brightness = val;
+
+   prop = dev->mode_config.tv_contrast_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.contrast = val;
+
+   prop = dev->mode_config.tv_flicker_reduction_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.flicker_reduction = val;
+
+   prop = dev->mode_config.tv_overscan_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.overscan = val;
+
+   prop = dev->mode_config.tv_saturation_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.saturation = val;
+
+   prop = dev->mode_config.tv_hue_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.hue = val;
+
+   drm_atomic_helper_connector_tv_margins_reset(connector);
+}
+EXPORT_SYMBOL(drm_atomic_helper_connector_tv_reset);
+
 /**
  * __drm_atomic_helper_connector_duplicate_state - copy atomic connector state
  * @connector: connector object
diff --git a/include/drm/drm_atomic_state_helper.h 
b/include/drm/drm_atomic_state_helper.h
index 192766656b88..c8fbce795ee7 100644
--- a/include/drm/drm_atomic_state_helper.h
+++ b/include/drm/drm_atomic_state_helper.h
@@ -70,6 +70,7 @@ void __drm_atomic_helper_connector_state_reset(struct 
drm_connector_state *conn_
 void __drm_atomic_helper_connector_reset(struct drm_connector *connector,
 struct drm_connector_state 
*conn_state);
 void drm_atomic_helper_connector_reset(struct drm_connector *connector);
+void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector);
 void drm_atomic_helper_connector_tv_margins_reset(struct drm_connector 
*connector);
 void
 __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector,

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 30/41] drm/vc4: vec: Fix definition of PAL-M mode

2022-08-29 Thread Maxime Ripard
From: Mateusz Kwiatkowski 

PAL-M is a Brazilian analog TV standard that uses a PAL-style chroma
subcarrier at 3.575611[888111] MHz on top of 525-line (480i60) timings.
This commit makes the driver actually use the proper VEC preset for this
mode instead of just changing PAL subcarrier frequency.

Signed-off-by: Mateusz Kwiatkowski 
Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 63e4e617e321..fa85dd260742 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -69,6 +69,7 @@
 #define VEC_CONFIG0_STD_MASK   GENMASK(1, 0)
 #define VEC_CONFIG0_NTSC_STD   0
 #define VEC_CONFIG0_PAL_BDGHI_STD  1
+#define VEC_CONFIG0_PAL_M_STD  2
 #define VEC_CONFIG0_PAL_N_STD  3
 
 #define VEC_SCHPH  0x108
@@ -241,10 +242,9 @@ static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
[VC4_VEC_TV_MODE_PAL_M] = {
-   .mode = _mode_576i,
-   .config0 = VEC_CONFIG0_PAL_BDGHI_STD,
-   .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
-   .custom_freq = 0x223b61d1,
+   .mode = _mode_480i,
+   .config0 = VEC_CONFIG0_PAL_M_STD,
+   .config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
 };
 

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 40/41] drm/sun4i: tv: Add missing reset assertion

2022-08-29 Thread Maxime Ripard
The reset line is deasserted at bind, and asserted if we ever encounter an
error there. However, it's never asserted in unbind which will lead to a
resource unbalance.

Signed-off-by: Maxime Ripard 
Reviewed-by: Jernej Skrabec 

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index ad6a3739bfa9..74ff5ad6a8b9 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -605,6 +605,7 @@ static void sun4i_tv_unbind(struct device *dev, struct 
device *master,
drm_connector_cleanup(>connector);
drm_encoder_cleanup(>encoder);
clk_disable_unprepare(tv->clk);
+   reset_control_assert(tv->reset);
 }
 
 static const struct component_ops sun4i_tv_ops = {

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 33/41] drm/vc4: vec: Add support for more analog TV standards

2022-08-29 Thread Maxime Ripard
From: Mateusz Kwiatkowski 

Add support for the following composite output modes (all of them are
somewhat more obscure than the previously defined ones):

- NTSC_443 - NTSC-style signal with the chroma subcarrier shifted to
  4.43361875 MHz (the PAL subcarrier frequency). Never used for
  broadcasting, but sometimes used as a hack to play NTSC content in PAL
  regions (e.g. on VCRs).
- PAL_N - PAL with alternative chroma subcarrier frequency,
  3.58205625 MHz. Used as a broadcast standard in Argentina, Paraguay
  and Uruguay to fit 576i50 with colour in 6 MHz channel raster.
- PAL60 - 480i60 signal with PAL-style color at normal European PAL
  frequency. Another non-standard, non-broadcast mode, used in similar
  contexts as NTSC_443. Some displays support one but not the other.
- SECAM - French frequency-modulated analog color standard; also have
  been broadcast in Eastern Europe and various parts of Africa and Asia.
  Uses the same 576i50 timings as PAL.

Also added some comments explaining color subcarrier frequency
registers.

Signed-off-by: Mateusz Kwiatkowski 
Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 58286acf4b9e..55f6f490877c 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -46,6 +46,7 @@
 #define VEC_CONFIG0_YDEL(x)((x) << 26)
 #define VEC_CONFIG0_CDEL_MASK  GENMASK(25, 24)
 #define VEC_CONFIG0_CDEL(x)((x) << 24)
+#define VEC_CONFIG0_SECAM_STD  BIT(21)
 #define VEC_CONFIG0_PBPR_FIL   BIT(18)
 #define VEC_CONFIG0_CHROMA_GAIN_MASK   GENMASK(17, 16)
 #define VEC_CONFIG0_CHROMA_GAIN_UNITY  (0 << 16)
@@ -76,6 +77,27 @@
 #define VEC_SOFT_RESET 0x10c
 #define VEC_CLMP0_START0x144
 #define VEC_CLMP0_END  0x148
+
+/*
+ * These set the color subcarrier frequency
+ * if VEC_CONFIG1_CUSTOM_FREQ is enabled.
+ *
+ * VEC_FREQ1_0 contains the most significant 16-bit half-word,
+ * VEC_FREQ3_2 contains the least significant 16-bit half-word.
+ * 0x8000 seems to be equivalent to the pixel clock
+ * (which itself is the VEC clock divided by 8).
+ *
+ * Reference values (with the default pixel clock of 13.5 MHz):
+ *
+ * NTSC  (3579545.[45] Hz) - 0x21F07C1F
+ * PAL   (4433618.75 Hz)   - 0x2A098ACB
+ * PAL-M (3575611.[888111] Hz) - 0x21E6EFE3
+ * PAL-N (3582056.25 Hz)   - 0x21F69446
+ *
+ * NOTE: For SECAM, it is used as the Dr center frequency,
+ * regardless of whether VEC_CONFIG1_CUSTOM_FREQ is enabled or not;
+ * that is specified as 4406250 Hz, which corresponds to 0x29C71C72.
+ */
 #define VEC_FREQ3_20x180
 #define VEC_FREQ1_00x184
 
@@ -118,6 +140,14 @@
 
 #define VEC_INTERRUPT_CONTROL  0x190
 #define VEC_INTERRUPT_STATUS   0x194
+
+/*
+ * Db center frequency for SECAM; the clock for this is the same as for
+ * VEC_FREQ3_2/VEC_FREQ1_0, which is used for Dr center frequency.
+ *
+ * This is specified as 425 Hz, which corresponds to 0x284BDA13.
+ * That is also the default value, so no need to set it explicitly.
+ */
 #define VEC_FCW_SECAM_B0x198
 #define VEC_SECAM_GAIN_VAL 0x19c
 
@@ -194,9 +224,13 @@ connector_to_vc4_vec(struct drm_connector *connector)
 
 enum vc4_vec_tv_mode_id {
VC4_VEC_TV_MODE_NTSC,
+   VC4_VEC_TV_MODE_NTSC_443,
VC4_VEC_TV_MODE_NTSC_J,
VC4_VEC_TV_MODE_PAL,
+   VC4_VEC_TV_MODE_PAL_60,
VC4_VEC_TV_MODE_PAL_M,
+   VC4_VEC_TV_MODE_PAL_N,
+   VC4_VEC_TV_MODE_SECAM,
 };
 
 struct vc4_vec_tv_mode {
@@ -234,6 +268,12 @@ static const struct debugfs_reg32 vec_regs[] = {
 };
 
 static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
+   {
+   .mode = DRM_MODE_TV_MODE_NTSC_443,
+   .config0 = VEC_CONFIG0_NTSC_STD,
+   .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
+   .custom_freq = 0x2a098acb,
+   },
{
.mode = DRM_MODE_TV_MODE_NTSC_M,
.config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN,
@@ -244,6 +284,12 @@ static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
.config0 = VEC_CONFIG0_NTSC_STD,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
+   {
+   .mode = DRM_MODE_TV_MODE_PAL_60,
+   .config0 = VEC_CONFIG0_PAL_M_STD,
+   .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
+   .custom_freq = 0x2a098acb,
+   },
{
.mode = DRM_MODE_TV_MODE_PAL_B,
.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
@@ -254,6 +300,17 @@ static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
.config0 = VEC_CONFIG0_PAL_M_STD,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
+   {
+   .mode = DRM_MODE_TV_MODE_PAL_N,
+   .config0 = VEC_CONFIG0_PAL_N_STD,
+

[Intel-gfx] [PATCH v2 32/41] drm/vc4: vec: Convert to the new TV mode property

2022-08-29 Thread Maxime Ripard
Now that the core can deal fine with analog TV modes, let's convert the vc4
VEC driver to leverage those new features.

We've added some backward compatibility to support the old TV mode property
and translate it into the new TV norm property.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index ba6f81908923..58286acf4b9e 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -172,6 +172,8 @@ struct vc4_vec {
 
struct clk *clock;
 
+   struct drm_property *legacy_tv_mode_property;
+
struct debugfs_regset32 regset;
 };
 
@@ -184,6 +186,12 @@ encoder_to_vc4_vec(struct drm_encoder *encoder)
return container_of(encoder, struct vc4_vec, encoder.base);
 }
 
+static inline struct vc4_vec *
+connector_to_vc4_vec(struct drm_connector *connector)
+{
+   return container_of(connector, struct vc4_vec, connector);
+}
+
 enum vc4_vec_tv_mode_id {
VC4_VEC_TV_MODE_NTSC,
VC4_VEC_TV_MODE_NTSC_J,
@@ -192,7 +200,7 @@ enum vc4_vec_tv_mode_id {
 };
 
 struct vc4_vec_tv_mode {
-   const struct drm_display_mode *mode;
+   unsigned int mode;
u32 config0;
u32 config1;
u32 custom_freq;
@@ -226,28 +234,50 @@ static const struct debugfs_reg32 vec_regs[] = {
 };
 
 static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = {
-   [VC4_VEC_TV_MODE_NTSC] = {
-   .mode = _mode_480i,
+   {
+   .mode = DRM_MODE_TV_MODE_NTSC_M,
.config0 = VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
-   [VC4_VEC_TV_MODE_NTSC_J] = {
-   .mode = _mode_480i,
+   {
+   .mode = DRM_MODE_TV_MODE_NTSC_J,
.config0 = VEC_CONFIG0_NTSC_STD,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
-   [VC4_VEC_TV_MODE_PAL] = {
-   .mode = _mode_576i,
+   {
+   .mode = DRM_MODE_TV_MODE_PAL_B,
.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
-   [VC4_VEC_TV_MODE_PAL_M] = {
-   .mode = _mode_480i,
+   {
+   .mode = DRM_MODE_TV_MODE_PAL_M,
.config0 = VEC_CONFIG0_PAL_M_STD,
.config1 = VEC_CONFIG1_C_CVBS_CVBS,
},
 };
 
+static inline const struct vc4_vec_tv_mode *
+vc4_vec_tv_mode_lookup(unsigned int mode)
+{
+   unsigned int i;
+
+   for (i = 0; i < ARRAY_SIZE(vc4_vec_tv_modes); i++) {
+   const struct vc4_vec_tv_mode *tv_mode = _vec_tv_modes[i];
+
+   if (tv_mode->mode == mode)
+   return tv_mode;
+   }
+
+   return NULL;
+}
+
+static const struct drm_prop_enum_list tv_mode_names[] = {
+   { VC4_VEC_TV_MODE_NTSC, "NTSC", },
+   { VC4_VEC_TV_MODE_NTSC_J, "NTSC-J", },
+   { VC4_VEC_TV_MODE_PAL, "PAL", },
+   { VC4_VEC_TV_MODE_PAL_M, "PAL-M", },
+};
+
 static enum drm_connector_status
 vc4_vec_connector_detect(struct drm_connector *connector, bool force)
 {
@@ -262,19 +292,98 @@ static void vc4_vec_connector_reset(struct drm_connector 
*connector)
 
 static int vc4_vec_connector_get_modes(struct drm_connector *connector)
 {
-   struct drm_connector_state *state = connector->state;
struct drm_display_mode *mode;
+   int count = 0;
 
-   mode = drm_mode_duplicate(connector->dev,
- vc4_vec_tv_modes[state->tv.mode].mode);
+   mode = drm_mode_analog_ntsc_480i(connector->dev);
if (!mode) {
DRM_ERROR("Failed to create a new display mode\n");
return -ENOMEM;
}
 
drm_mode_probed_add(connector, mode);
+   count += 1;
 
-   return 1;
+   mode = drm_mode_analog_pal_576i(connector->dev);
+   if (!mode) {
+   DRM_ERROR("Failed to create a new display mode\n");
+   return -ENOMEM;
+   }
+
+   drm_mode_probed_add(connector, mode);
+   count += 1;
+
+   return count;
+}
+
+static int
+vc4_vec_connector_set_property(struct drm_connector *connector,
+  struct drm_connector_state *state,
+  struct drm_property *property,
+  uint64_t val)
+{
+   struct vc4_vec *vec = connector_to_vc4_vec(connector);
+
+   if (property != vec->legacy_tv_mode_property)
+   return -EINVAL;
+
+   switch (val) {
+   case VC4_VEC_TV_MODE_NTSC:
+   state->tv.mode = DRM_MODE_TV_MODE_NTSC_M;
+   break;
+
+   case VC4_VEC_TV_MODE_NTSC_J:
+   state->tv.mode = DRM_MODE_TV_MODE_NTSC_J;
+   break;
+
+   case VC4_VEC_TV_MODE_PAL:
+   state->tv.mode = DRM_MODE_TV_MODE_PAL_B;
+   break;
+
+   case VC4_VEC_TV_MODE_PAL_M:
+   state->tv.mode = DRM_MODE_TV_MODE_PAL_M;
+   break;
+
+   

[Intel-gfx] [PATCH v2 17/41] drm/connector: Add pixel clock to cmdline mode

2022-08-29 Thread Maxime Ripard
We'll need to get the pixel clock to generate proper display modes for
all the current named modes. Let's add it to struct drm_cmdline_mode and
fill it when parsing the named mode.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 5e898699b532..73d01e755496 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2208,22 +2208,24 @@ static int drm_mode_parse_cmdline_options(const char 
*str,
 
 struct drm_named_mode {
const char *name;
+   unsigned int pixel_clock_khz;
unsigned int xres;
unsigned int yres;
unsigned int flags;
 };
 
-#define NAMED_MODE(_name, _x, _y, _flags)  \
+#define NAMED_MODE(_name, _pclk, _x, _y, _flags)   \
{   \
.name = _name,  \
+   .pixel_clock_khz = _pclk,   \
.xres = _x, \
.yres = _y, \
.flags = _flags,\
}
 
 static const struct drm_named_mode drm_named_modes[] = {
-   NAMED_MODE("NTSC", 720, 480, DRM_MODE_FLAG_INTERLACE),
-   NAMED_MODE("PAL", 720, 576, DRM_MODE_FLAG_INTERLACE),
+   NAMED_MODE("NTSC", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE),
+   NAMED_MODE("PAL", 13500, 720, 576, DRM_MODE_FLAG_INTERLACE),
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
@@ -2265,6 +2267,7 @@ static int drm_mode_parse_cmdline_named_mode(const char 
*name,
continue;
 
strcpy(cmdline_mode->name, mode->name);
+   cmdline_mode->pixel_clock = mode->pixel_clock_khz;
cmdline_mode->xres = mode->xres;
cmdline_mode->yres = mode->yres;
cmdline_mode->interlace = !!(mode->flags & 
DRM_MODE_FLAG_INTERLACE);
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 7d3881f35e7c..bb39d2bb806e 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1352,6 +1352,13 @@ struct drm_cmdline_mode {
 */
bool bpp_specified;
 
+   /**
+* @pixel_clock:
+*
+* Pixel Clock in kHz. Optional.
+*/
+   unsigned int pixel_clock;
+
/**
 * @xres:
 *

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 31/41] drm/vc4: vec: Use TV Reset implementation

2022-08-29 Thread Maxime Ripard
The analog TV properties created by the drm_mode_create_tv_properties() are
not properly initialised at reset. Let's switch our implementation to call
drm_atomic_helper_connector_tv_reset().

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index fa85dd260742..ba6f81908923 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -254,6 +254,12 @@ vc4_vec_connector_detect(struct drm_connector *connector, 
bool force)
return connector_status_unknown;
 }
 
+static void vc4_vec_connector_reset(struct drm_connector *connector)
+{
+   drm_atomic_helper_connector_reset(connector);
+   drm_atomic_helper_connector_tv_reset(connector);
+}
+
 static int vc4_vec_connector_get_modes(struct drm_connector *connector)
 {
struct drm_connector_state *state = connector->state;
@@ -274,7 +280,7 @@ static int vc4_vec_connector_get_modes(struct drm_connector 
*connector)
 static const struct drm_connector_funcs vc4_vec_connector_funcs = {
.detect = vc4_vec_connector_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
-   .reset = drm_atomic_helper_connector_reset,
+   .reset = vc4_vec_connector_reset,
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 };

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 21/41] drm/modes: Introduce more named modes

2022-08-29 Thread Maxime Ripard
Now that we can easily extend the named modes list, let's add a few more
analog TV modes that were used in the wild, and some unit tests to make
sure it works as intended.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 065dbfbd815e..7d769de4d31b 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2254,7 +2254,9 @@ struct drm_named_mode {
 
 static const struct drm_named_mode drm_named_modes[] = {
NAMED_MODE("NTSC", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_NTSC_M),
+   NAMED_MODE("NTSC_J", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_NTSC_J),
NAMED_MODE("PAL", 13500, 720, 576, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_PAL_B),
+   NAMED_MODE("PAL_M", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_PAL_M),
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
diff --git a/drivers/gpu/drm/tests/drm_client_modeset_test.c 
b/drivers/gpu/drm/tests/drm_client_modeset_test.c
index 4380cf670fb4..d6ecb5fbe159 100644
--- a/drivers/gpu/drm/tests/drm_client_modeset_test.c
+++ b/drivers/gpu/drm/tests/drm_client_modeset_test.c
@@ -140,6 +140,32 @@ static void drm_pick_cmdline_named_ntsc(struct kunit *test)
KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_ntsc_480i(drm), 
mode));
 }
 
+static void drm_pick_cmdline_named_ntsc_j(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+   struct drm_device *drm = priv->drm;
+   struct drm_connector *connector = >connector;
+   struct drm_cmdline_mode *cmdline_mode = >cmdline_mode;
+   struct drm_display_mode *mode;
+   const char *cmdline = "NTSC_J";
+   int ret;
+
+   KUNIT_ASSERT_TRUE(test,
+ drm_mode_parse_command_line_for_connector(cmdline,
+   connector,
+   
cmdline_mode));
+
+   mutex_lock(>mode_config.mutex);
+   ret = drm_helper_probe_single_connector_modes(connector, 1920, 1080);
+   mutex_unlock(>mode_config.mutex);
+   KUNIT_ASSERT_GT(test, ret, 0);
+
+   mode = drm_connector_pick_cmdline_mode(connector);
+   KUNIT_ASSERT_PTR_NE(test, mode, NULL);
+
+   KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_ntsc_480i(drm), 
mode));
+}
+
 static void drm_pick_cmdline_named_pal(struct kunit *test)
 {
struct drm_client_modeset_test_priv *priv = test->priv;
@@ -166,10 +192,38 @@ static void drm_pick_cmdline_named_pal(struct kunit *test)
KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_pal_576i(drm), 
mode));
 }
 
+static void drm_pick_cmdline_named_pal_m(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+   struct drm_device *drm = priv->drm;
+   struct drm_connector *connector = >connector;
+   struct drm_cmdline_mode *cmdline_mode = >cmdline_mode;
+   struct drm_display_mode *mode;
+   const char *cmdline = "PAL_M";
+   int ret;
+
+   KUNIT_ASSERT_TRUE(test,
+ drm_mode_parse_command_line_for_connector(cmdline,
+   connector,
+   
cmdline_mode));
+
+   mutex_lock(>mode_config.mutex);
+   ret = drm_helper_probe_single_connector_modes(connector, 1920, 1080);
+   mutex_unlock(>mode_config.mutex);
+   KUNIT_ASSERT_GT(test, ret, 0);
+
+   mode = drm_connector_pick_cmdline_mode(connector);
+   KUNIT_ASSERT_PTR_NE(test, mode, NULL);
+
+   KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_ntsc_480i(drm), 
mode));
+}
+
 static struct kunit_case drm_pick_cmdline_tests[] = {
KUNIT_CASE(drm_pick_cmdline_res_1920_1080_60),
KUNIT_CASE(drm_pick_cmdline_named_ntsc),
+   KUNIT_CASE(drm_pick_cmdline_named_ntsc_j),
KUNIT_CASE(drm_pick_cmdline_named_pal),
+   KUNIT_CASE(drm_pick_cmdline_named_pal_m),
{}
 };
 

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PULL] drm-intel-next

2022-08-29 Thread Jani Nikula


Hi Dave & Daniel -

drm-intel-next-2022-08-29:
drm/i915 feature pull for v6.1:

Features and functionality:
- Early Meteorlake (MTL) enabling (José, Radhakrishna, Clint, Imre, Vandita, 
Ville, Jani)
- Support more HDMI pixel clock frequencies on DG2 (Clint)
- Sanity check PCI BARs (Piotr Piórkowski)
- Enable DC5 on DG2 (Anusha)
- DG2 DMC firmware version bump to v2.07 (Madhumitha)
- New ADL-S PCI ID (José)

Refactoring and cleanups:
- Add display sub-struct to struct drm_i915_private (Jani)
- Add initial runtime info to device info (Jani)
- Split out HDCP and backlight registers to separate files (Jani)

Fixes:
- Skip wm/ddb readout for disabled pipes (Ville)
- HDMI port timing quirk for GLK ECS Liva Q2 (Diego Santa Cruz)
- Fix bw init null pointer dereference (Łukasz Bartosik)
- Disable PPS power hook for DP AUX backlight (Jouni)
- Avoid warnings on registering multiple backlight devices (Arun)
- Fix dual-link DSI backlight and CABC ports for display 11+ (Jani)
- Fix Type-C PHY ownership programming in HDMI legacy mode (Imre)
- Fix unclaimed register access while loading PIPEDMC-C/D (Imre)
- Bump up CDCLK for DG2 (Stan)
- Prune modes that require HDMI 2.1 FRL (Ankit)
- Disable FBC when PSR1 is enabled in display 12-13 (Matt)
- Fix TGL+ HDMI transcoder clock and DDI BUF disable order (Imre)
- Disable PSR before disable pipe (José)
- Disable DMC handlers during firmware loading/disabling on display 12+ (Imre)
- Disable clock gating for PIPEDMC-A/B as a workaround (Imre)

Merges:
- Two drm-next backmerges (Rodrigo, Jani)

BR,
Jani.

The following changes since commit 2c2d7a67defa198a8b8148dbaddc9e5554efebc8:

  Merge tag 'drm-intel-gt-next-2022-08-24' of 
git://anongit.freedesktop.org/drm/drm-intel into drm-next (2022-08-26 10:03:43 
+1000)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2022-08-29

for you to fetch changes up to 917bda9ab155032a02be1a57ebd4d949ae9e1528:

  Merge drm/drm-next into drm-intel-next (2022-08-29 15:14:59 +0300)


drm/i915 feature pull for v6.1:

Features and functionality:
- Early Meteorlake (MTL) enabling (José, Radhakrishna, Clint, Imre, Vandita, 
Ville, Jani)
- Support more HDMI pixel clock frequencies on DG2 (Clint)
- Sanity check PCI BARs (Piotr Piórkowski)
- Enable DC5 on DG2 (Anusha)
- DG2 DMC firmware version bump to v2.07 (Madhumitha)
- New ADL-S PCI ID (José)

Refactoring and cleanups:
- Add display sub-struct to struct drm_i915_private (Jani)
- Add initial runtime info to device info (Jani)
- Split out HDCP and backlight registers to separate files (Jani)

Fixes:
- Skip wm/ddb readout for disabled pipes (Ville)
- HDMI port timing quirk for GLK ECS Liva Q2 (Diego Santa Cruz)
- Fix bw init null pointer dereference (Łukasz Bartosik)
- Disable PPS power hook for DP AUX backlight (Jouni)
- Avoid warnings on registering multiple backlight devices (Arun)
- Fix dual-link DSI backlight and CABC ports for display 11+ (Jani)
- Fix Type-C PHY ownership programming in HDMI legacy mode (Imre)
- Fix unclaimed register access while loading PIPEDMC-C/D (Imre)
- Bump up CDCLK for DG2 (Stan)
- Prune modes that require HDMI 2.1 FRL (Ankit)
- Disable FBC when PSR1 is enabled in display 12-13 (Matt)
- Fix TGL+ HDMI transcoder clock and DDI BUF disable order (Imre)
- Disable PSR before disable pipe (José)
- Disable DMC handlers during firmware loading/disabling on display 12+ (Imre)
- Disable clock gating for PIPEDMC-A/B as a workaround (Imre)

Merges:
- Two drm-next backmerges (Rodrigo, Jani)


Ankit Nautiyal (1):
  drm/i915/hdmi: Prune modes that require HDMI2.1 FRL

Anusha Srivatsa (3):
  drm/i915/display: Cleanup intel_phy_is_combo()
  drm/i915: Pass drm_i915_private struct instead of gt for 
gen11_gu_misc_irq_handler/ack()
  drm/i915/dg2: Add support for DC5 state

Arun R Murthy (1):
  drm/i915/display: avoid warnings when registering dual panel backlight

Bo Liu (1):
  drm/i915/irq: Fix a "the the" typo

Clint Taylor (1):
  drm/i915/mtl: Fix rawclk for Meteorlake PCH

Diego Santa Cruz (1):
  drm/i915/glk: ECS Liva Q2 needs GLK HDMI port timing quirk

Imre Deak (6):
  drm/i915/tgl+: Fix HDMI transcoder clock vs. DDI BUF disabling order
  drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware
  drm/i915/d13: Add Wa_16015201720 disabling clock gating for PIPEDMC-A/B
  drm/i915/xelpd: Fix unclaimed accesses while loading PIPEDMC-C/D
  drm/i915/tc: Fix PHY ownership programming in HDMI legacy mode
  drm/i915/mtl: Add VBT port and AUX_CH mapping

Jani Nikula (42):
  drm/i915/hdcp: split out hdcp registers to a separate file
  drm/i915/hdcp: replace BIT() with REG_BIT() in register definitions
  drm/i915/backlight: split out backlight registers to a separate file
  drm/i915/dsi: filter invalid backlight and CABC 

[Intel-gfx] [PATCH v2 10/41] drm/modes: Add a function to generate analog display modes

2022-08-29 Thread Maxime Ripard
Multiple drivers (meson, vc4, sun4i) define analog TV 525-lines and
625-lines modes in their drivers.

Since those modes are fairly standard, and that we'll need to use them
in more places in the future, it makes sense to move their definition
into the core framework.

However, analog display usually have fairly loose timings requirements,
the only discrete parameters being the total number of lines and pixel
clock frequency. Thus, we created a function that will create a display
mode from the standard, the pixel frequency and the active area.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 304004fb80aa..ee581ee17171 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -116,6 +116,459 @@ void drm_mode_probed_add(struct drm_connector *connector,
 }
 EXPORT_SYMBOL(drm_mode_probed_add);
 
+enum drm_mode_analog {
+   DRM_MODE_ANALOG_NTSC,
+   DRM_MODE_ANALOG_PAL,
+};
+
+/*
+ * The timings come from:
+ * - 
https://web.archive.org/web/20220406232708/http://www.kolumbus.fi/pami1/video/pal_ntsc.html
+ * - 
https://web.archive.org/web/20220406124914/http://martin.hinner.info/vga/pal.html
+ * - 
https://web.archive.org/web/20220609202433/http://www.batsocks.co.uk/readme/video_timing.htm
+ */
+#define NTSC_LINE_DURATION_NS  63556U
+#define NTSC_LINES_NUMBER  525
+
+#define NTSC_HBLK_DURATION_TYP_NS  10900U
+#define NTSC_HBLK_DURATION_MIN_NS  (NTSC_HBLK_DURATION_TYP_NS - 200)
+#define NTSC_HBLK_DURATION_MAX_NS  (NTSC_HBLK_DURATION_TYP_NS + 200)
+
+#define NTSC_HACT_DURATION_TYP_NS  (NTSC_LINE_DURATION_NS - 
NTSC_HBLK_DURATION_TYP_NS)
+#define NTSC_HACT_DURATION_MIN_NS  (NTSC_LINE_DURATION_NS - 
NTSC_HBLK_DURATION_MAX_NS)
+#define NTSC_HACT_DURATION_MAX_NS  (NTSC_LINE_DURATION_NS - 
NTSC_HBLK_DURATION_MIN_NS)
+
+#define NTSC_HFP_DURATION_TYP_NS   1500
+#define NTSC_HFP_DURATION_MIN_NS   1270
+#define NTSC_HFP_DURATION_MAX_NS   2220
+
+#define NTSC_HSLEN_DURATION_TYP_NS 4700
+#define NTSC_HSLEN_DURATION_MIN_NS (NTSC_HSLEN_DURATION_TYP_NS - 100)
+#define NTSC_HSLEN_DURATION_MAX_NS (NTSC_HSLEN_DURATION_TYP_NS + 100)
+
+#define NTSC_HBP_DURATION_TYP_NS   4700
+
+/*
+ * I couldn't find the actual tolerance for the back porch, so let's
+ * just reuse the sync length ones.
+ */
+#define NTSC_HBP_DURATION_MIN_NS   (NTSC_HBP_DURATION_TYP_NS - 100)
+#define NTSC_HBP_DURATION_MAX_NS   (NTSC_HBP_DURATION_TYP_NS + 100)
+
+#define PAL_LINE_DURATION_NS   64000U
+#define PAL_LINES_NUMBER   625
+
+#define PAL_HACT_DURATION_TYP_NS   51950U
+#define PAL_HACT_DURATION_MIN_NS   (PAL_HACT_DURATION_TYP_NS - 100)
+#define PAL_HACT_DURATION_MAX_NS   (PAL_HACT_DURATION_TYP_NS + 400)
+
+#define PAL_HBLK_DURATION_TYP_NS   (PAL_LINE_DURATION_NS - 
PAL_HACT_DURATION_TYP_NS)
+#define PAL_HBLK_DURATION_MIN_NS   (PAL_LINE_DURATION_NS - 
PAL_HACT_DURATION_MAX_NS)
+#define PAL_HBLK_DURATION_MAX_NS   (PAL_LINE_DURATION_NS - 
PAL_HACT_DURATION_MIN_NS)
+
+#define PAL_HFP_DURATION_TYP_NS1650
+#define PAL_HFP_DURATION_MIN_NS(PAL_HFP_DURATION_TYP_NS - 100)
+#define PAL_HFP_DURATION_MAX_NS(PAL_HFP_DURATION_TYP_NS + 400)
+
+#define PAL_HSLEN_DURATION_TYP_NS  4700
+#define PAL_HSLEN_DURATION_MIN_NS  (PAL_HSLEN_DURATION_TYP_NS - 200)
+#define PAL_HSLEN_DURATION_MAX_NS  (PAL_HSLEN_DURATION_TYP_NS + 200)
+
+#define PAL_HBP_DURATION_TYP_NS5700
+#define PAL_HBP_DURATION_MIN_NS(PAL_HBP_DURATION_TYP_NS - 200)
+#define PAL_HBP_DURATION_MAX_NS(PAL_HBP_DURATION_TYP_NS + 200)
+
+#define PAL_VFP_INTERLACE_LINES5
+#define PAL_VSLEN_INTERLACE_LINES  5
+
+#define PAL_SHORT_SYNC_DURATION_NS ((2 + 30) * NSEC_PER_USEC)
+#define PAL_LONG_SYNC_DURATION_NS  ((30 + 2) * NSEC_PER_USEC)
+
+struct analog_param_field {
+   unsigned int even, odd;
+};
+
+#define PARAM_FIELD(_odd, _even)   \
+   { .even = _even, .odd = _odd }
+
+struct analog_param_range {
+   unsigned intmin, typ, max;
+};
+
+#define PARAM_RANGE(_min, _typ, _max)  \
+   { .min = _min, .typ = _typ, .max = _max }
+
+struct analog_parameters {
+   unsigned intnum_lines;
+   unsigned intline_duration_ns;
+
+   struct analog_param_range   hact_ns;
+   struct analog_param_range   hfp_ns;
+   struct analog_param_range   hslen_ns;
+   struct analog_param_range   hbp_ns;
+   struct analog_param_range   hblk_ns;
+
+   struct analog_param_field   vfp_lines;
+   struct analog_param_field   vslen_lines;
+   struct analog_param_field   vbp_lines;
+};
+
+#define TV_MODE_PARAMETER(_mode, _lines, _line_dur, _hact, _hfp, _hslen, _hbp, 
_hblk, _vfp, _vslen, _vbp) \
+   [_mode] = { \
+

[Intel-gfx] [PATCH v2 02/41] drm/tests: Add Kunit Helpers

2022-08-29 Thread Maxime Ripard
As the number of kunit tests in KMS grows further, we start to have
multiple test suites that, for example, need to register a mock DRM
driver to interact with the KMS function they are supposed to test.

Let's add a file meant to provide those kind of helpers to avoid
duplication.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/tests/Makefile b/drivers/gpu/drm/tests/Makefile
index 2d9f49b62ecb..b29ef1085cad 100644
--- a/drivers/gpu/drm/tests/Makefile
+++ b/drivers/gpu/drm/tests/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_KUNIT_TEST) += \
drm_format_helper_test.o \
drm_format_test.o \
drm_framebuffer_test.o \
+   drm_kunit_helpers.o \
drm_mm_test.o \
drm_plane_helper_test.o \
drm_rect_test.o
diff --git a/drivers/gpu/drm/tests/drm_kunit_helpers.c 
b/drivers/gpu/drm/tests/drm_kunit_helpers.c
new file mode 100644
index ..7ebd620481c1
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_kunit_helpers.c
@@ -0,0 +1,54 @@
+#include 
+#include 
+
+#include 
+
+static const struct drm_mode_config_funcs drm_mode_config_funcs = {
+};
+
+static const struct drm_driver drm_mode_driver = {
+};
+
+static void drm_kunit_free_device(struct drm_device *drm, void *ptr)
+{
+   struct device *dev = ptr;
+
+   root_device_unregister(dev);
+}
+
+struct drm_device *drm_kunit_device_init(const char *name)
+{
+   struct drm_device *drm;
+   struct device *dev;
+   int ret;
+
+   dev = root_device_register(name);
+   if (IS_ERR(dev))
+   return ERR_CAST(dev);
+
+   drm = drm_dev_alloc(_mode_driver, dev);
+   if (IS_ERR(drm)) {
+   root_device_unregister(dev);
+   return ERR_CAST(drm);
+   }
+   drm->mode_config.funcs = _mode_config_funcs;
+
+   ret = drmm_add_action_or_reset(drm, drm_kunit_free_device, dev);
+   if (ret)
+   goto err_put_device;
+
+   ret = drmm_mode_config_init(drm);
+   if (ret)
+   return ERR_PTR(ret);
+
+   return drm;
+
+err_put_device:
+   drm_dev_put(drm);
+   return ERR_PTR(ret);
+}
+
+void drm_kunit_device_exit(struct drm_device *drm)
+{
+   drm_dev_put(drm);
+}
diff --git a/drivers/gpu/drm/tests/drm_kunit_helpers.h 
b/drivers/gpu/drm/tests/drm_kunit_helpers.h
new file mode 100644
index ..5015a327a8c1
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_kunit_helpers.h
@@ -0,0 +1,9 @@
+#ifndef DRM_KUNIT_HELPERS_H_
+#define DRM_KUNIT_HELPERS_H_
+
+struct drm_device;
+
+struct drm_device *drm_kunit_device_init(const char *name);
+void drm_kunit_device_exit(struct drm_device *drm);
+
+#endif // DRM_KUNIT_HELPERS_H_

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 06/41] drm/connector: Rename legacy TV property

2022-08-29 Thread Maxime Ripard
The current tv_mode has driver-specific values that don't allow to
easily share code using it, either at the userspace or kernel level.

Since we're going to introduce a new, generic, property that fit the
same purpose, let's rename this one to legacy_tv_mode to make it
obvious we should move away from it.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index c06d0639d552..7f2b9a07fbdf 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -698,8 +698,8 @@ static int drm_atomic_connector_set_property(struct 
drm_connector *connector,
state->tv.margins.top = val;
} else if (property == config->tv_bottom_margin_property) {
state->tv.margins.bottom = val;
-   } else if (property == config->tv_mode_property) {
-   state->tv.mode = val;
+   } else if (property == config->legacy_tv_mode_property) {
+   state->tv.legacy_mode = val;
} else if (property == config->tv_brightness_property) {
state->tv.brightness = val;
} else if (property == config->tv_contrast_property) {
@@ -808,8 +808,8 @@ drm_atomic_connector_get_property(struct drm_connector 
*connector,
*val = state->tv.margins.top;
} else if (property == config->tv_bottom_margin_property) {
*val = state->tv.margins.bottom;
-   } else if (property == config->tv_mode_property) {
-   *val = state->tv.mode;
+   } else if (property == config->legacy_tv_mode_property) {
+   *val = state->tv.legacy_mode;
} else if (property == config->tv_brightness_property) {
*val = state->tv.brightness;
} else if (property == config->tv_contrast_property) {
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index e3142c8142b3..ede6025638d7 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1686,14 +1686,14 @@ int drm_mode_create_tv_properties(struct drm_device 
*dev,
if (drm_mode_create_tv_margin_properties(dev))
goto nomem;
 
-   dev->mode_config.tv_mode_property =
+   dev->mode_config.legacy_tv_mode_property =
drm_property_create(dev, DRM_MODE_PROP_ENUM,
"mode", num_modes);
-   if (!dev->mode_config.tv_mode_property)
+   if (!dev->mode_config.legacy_tv_mode_property)
goto nomem;
 
for (i = 0; i < num_modes; i++)
-   drm_property_add_enum(dev->mode_config.tv_mode_property,
+   drm_property_add_enum(dev->mode_config.legacy_tv_mode_property,
  i, modes[i]);
 
dev->mode_config.tv_brightness_property =
diff --git a/drivers/gpu/drm/gud/gud_connector.c 
b/drivers/gpu/drm/gud/gud_connector.c
index fa636206f232..caf82e9095b4 100644
--- a/drivers/gpu/drm/gud/gud_connector.c
+++ b/drivers/gpu/drm/gud/gud_connector.c
@@ -424,7 +424,7 @@ gud_connector_property_lookup(struct drm_connector 
*connector, u16 prop)
case GUD_PROPERTY_TV_BOTTOM_MARGIN:
return config->tv_bottom_margin_property;
case GUD_PROPERTY_TV_MODE:
-   return config->tv_mode_property;
+   return config->legacy_tv_mode_property;
case GUD_PROPERTY_TV_BRIGHTNESS:
return config->tv_brightness_property;
case GUD_PROPERTY_TV_CONTRAST:
diff --git a/drivers/gpu/drm/i2c/ch7006_drv.c b/drivers/gpu/drm/i2c/ch7006_drv.c
index b91e48d2190d..d29b63fd6178 100644
--- a/drivers/gpu/drm/i2c/ch7006_drv.c
+++ b/drivers/gpu/drm/i2c/ch7006_drv.c
@@ -264,7 +264,7 @@ static int ch7006_encoder_create_resources(struct 
drm_encoder *encoder,
  priv->hmargin);
drm_object_attach_property(>base, 
conf->tv_bottom_margin_property,
  priv->vmargin);
-   drm_object_attach_property(>base, conf->tv_mode_property,
+   drm_object_attach_property(>base, 
conf->legacy_tv_mode_property,
  priv->norm);
drm_object_attach_property(>base, 
conf->tv_brightness_property,
  priv->brightness);
@@ -315,7 +315,7 @@ static int ch7006_encoder_set_property(struct drm_encoder 
*encoder,
ch7006_load_reg(client, state, CH7006_POV);
ch7006_load_reg(client, state, CH7006_VPOS);
 
-   } else if (property == conf->tv_mode_property) {
+   } else if (property == conf->legacy_tv_mode_property) {
if (connector->dpms != DRM_MODE_DPMS_OFF)
return -EINVAL;
 
diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 
b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
index be28e7bd7490..1a15534adc60 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
@@ -662,7 +662,7 @@ static 

[Intel-gfx] [PATCH v2 04/41] drm/connector: Rename subconnector state variable

2022-08-29 Thread Maxime Ripard
There is two TV subconnector related properties registered by
drm_mode_create_tv_properties(): subconnector and select subconnector.

While the select subconnector property is stored in the kernel by the
drm_tv_connector_state structure, the subconnector property isn't stored
anywhere.

Worse, the select subconnector property is stored in a field called
subconnector, creating some ambiguity about which property content we're
accessing.

Let's rename that field to one called select_subconnector to make it move
obvious what it's about.

Signed-off-by: Maxime Ripard 
Reviewed-by: Noralf Trønnes 

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index 79730fa1dd8e..c74c78a28171 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -687,7 +687,7 @@ static int drm_atomic_connector_set_property(struct 
drm_connector *connector,
 */
return -EINVAL;
} else if (property == config->tv_select_subconnector_property) {
-   state->tv.subconnector = val;
+   state->tv.select_subconnector = val;
} else if (property == config->tv_left_margin_property) {
state->tv.margins.left = val;
} else if (property == config->tv_right_margin_property) {
@@ -795,7 +795,7 @@ drm_atomic_connector_get_property(struct drm_connector 
*connector,
else
*val = connector->dpms;
} else if (property == config->tv_select_subconnector_property) {
-   *val = state->tv.subconnector;
+   *val = state->tv.select_subconnector;
} else if (property == config->tv_left_margin_property) {
*val = state->tv.margins.left;
} else if (property == config->tv_right_margin_property) {
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 23112f0c11cf..60b5662dec7c 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -703,7 +703,7 @@ struct drm_connector_tv_margins {
  * @hue: hue in percent
  */
 struct drm_tv_connector_state {
-   enum drm_mode_subconnector subconnector;
+   enum drm_mode_subconnector select_subconnector;
struct drm_connector_tv_margins margins;
unsigned int mode;
unsigned int brightness;

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 11/41] drm/modes: Only consider bpp and refresh before options

2022-08-29 Thread Maxime Ripard
Some video= options might have a value that contains a dash. However, the
command line parsing mode considers all dashes as the separator between the
mode and the bpp count.

Let's rework the parsing code a bit to only consider a dash as the bpp
separator if it before a comma, the options separator.

A follow-up patch will add a unit-test for this once such an option is
introduced.

Signed-off-by: Maxime Ripard 
Reviewed-by: Geert Uytterhoeven 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index ee581ee17171..b4e1ff56b4d8 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2254,20 +2254,22 @@ bool drm_mode_parse_command_line_for_connector(const 
char *mode_option,
 
name = mode_option;
 
+   /* Locate the start of named options */
+   options_ptr = strchr(name, ',');
+   if (options_ptr)
+   options_off = options_ptr - name;
+   else
+   options_off = strlen(name);
+
/* Try to locate the bpp and refresh specifiers, if any */
-   bpp_ptr = strchr(name, '-');
+   bpp_ptr = strnchr(name, options_off, '-');
if (bpp_ptr)
bpp_off = bpp_ptr - name;
 
-   refresh_ptr = strchr(name, '@');
+   refresh_ptr = strnchr(name, options_off, '@');
if (refresh_ptr)
refresh_off = refresh_ptr - name;
 
-   /* Locate the start of named options */
-   options_ptr = strchr(name, ',');
-   if (options_ptr)
-   options_off = options_ptr - name;
-
/* Locate the end of the name / resolution, and parse it */
if (bpp_ptr) {
mode_end = bpp_off;

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 07/41] drm/connector: Only register TV mode property if present

2022-08-29 Thread Maxime Ripard
The drm_create_tv_properties() will create the TV mode property
unconditionally.

However, since we'll gradually phase it out, let's register it only if we
have a list passed as an argument. This will make the transition easier.

Signed-off-by: Maxime Ripard 
Acked-by: Noralf Trønnes 

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index ede6025638d7..17a5913cefe3 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1686,15 +1686,18 @@ int drm_mode_create_tv_properties(struct drm_device 
*dev,
if (drm_mode_create_tv_margin_properties(dev))
goto nomem;
 
-   dev->mode_config.legacy_tv_mode_property =
-   drm_property_create(dev, DRM_MODE_PROP_ENUM,
-   "mode", num_modes);
-   if (!dev->mode_config.legacy_tv_mode_property)
-   goto nomem;
 
-   for (i = 0; i < num_modes; i++)
-   drm_property_add_enum(dev->mode_config.legacy_tv_mode_property,
- i, modes[i]);
+   if (num_modes) {
+   dev->mode_config.legacy_tv_mode_property =
+   drm_property_create(dev, DRM_MODE_PROP_ENUM,
+   "mode", num_modes);
+   if (!dev->mode_config.legacy_tv_mode_property)
+   goto nomem;
+
+   for (i = 0; i < num_modes; i++)
+   
drm_property_add_enum(dev->mode_config.legacy_tv_mode_property,
+ i, modes[i]);
+   }
 
dev->mode_config.tv_brightness_property =
drm_property_create_range(dev, 0, "brightness", 0, 100);

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 05/41] drm/atomic: Add TV subconnector property to get/set_property

2022-08-29 Thread Maxime Ripard
The subconnector property was created by drm_mode_create_tv_properties(),
but wasn't exposed to the userspace through the generic
atomic_get/set_property implementation, and wasn't stored in any generic
state structure.

Let's solve this.

Signed-off-by: Maxime Ripard 
Reviewed-by: Noralf Trønnes 

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index c74c78a28171..c06d0639d552 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -688,6 +688,8 @@ static int drm_atomic_connector_set_property(struct 
drm_connector *connector,
return -EINVAL;
} else if (property == config->tv_select_subconnector_property) {
state->tv.select_subconnector = val;
+   } else if (property == config->tv_subconnector_property) {
+   state->tv.subconnector = val;
} else if (property == config->tv_left_margin_property) {
state->tv.margins.left = val;
} else if (property == config->tv_right_margin_property) {
@@ -796,6 +798,8 @@ drm_atomic_connector_get_property(struct drm_connector 
*connector,
*val = connector->dpms;
} else if (property == config->tv_select_subconnector_property) {
*val = state->tv.select_subconnector;
+   } else if (property == config->tv_subconnector_property) {
+   *val = state->tv.subconnector;
} else if (property == config->tv_left_margin_property) {
*val = state->tv.margins.left;
} else if (property == config->tv_right_margin_property) {
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 60b5662dec7c..1d5e3cccb9e3 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -693,6 +693,7 @@ struct drm_connector_tv_margins {
 /**
  * struct drm_tv_connector_state - TV connector related states
  * @select_subconnector: selected subconnector
+ * @subconnector: detected subconnector
  * @margins: TV margins
  * @mode: TV mode
  * @brightness: brightness in percent
@@ -704,6 +705,7 @@ struct drm_connector_tv_margins {
  */
 struct drm_tv_connector_state {
enum drm_mode_subconnector select_subconnector;
+   enum drm_mode_subconnector subconnector;
struct drm_connector_tv_margins margins;
unsigned int mode;
unsigned int brightness;

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 08/41] drm/connector: Rename drm_mode_create_tv_properties

2022-08-29 Thread Maxime Ripard
drm_mode_create_tv_properties(), among other things, will create the
"mode" property that stores the analog TV mode that connector is
supposed to output.

However, that property is getting deprecated, so let's rename that
function to mention it's deprecated. We'll introduce a new variant of
that function creating the property superseeding it in a later patch.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 17a5913cefe3..4e4fbc9e0049 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1600,7 +1600,7 @@ EXPORT_SYMBOL(drm_connector_attach_tv_margin_properties);
  * Called by a driver's HDMI connector initialization routine, this function
  * creates the TV margin properties for a given device. No need to call this
  * function for an SDTV connector, it's already called from
- * drm_mode_create_tv_properties().
+ * drm_mode_create_tv_properties_legacy().
  *
  * Returns:
  * 0 on success or a negative error code on failure.
@@ -1635,7 +1635,7 @@ int drm_mode_create_tv_margin_properties(struct 
drm_device *dev)
 EXPORT_SYMBOL(drm_mode_create_tv_margin_properties);
 
 /**
- * drm_mode_create_tv_properties - create TV specific connector properties
+ * drm_mode_create_tv_properties_legacy - create TV specific connector 
properties
  * @dev: DRM device
  * @num_modes: number of different TV formats (modes) supported
  * @modes: array of pointers to strings containing name of each format
@@ -1648,9 +1648,9 @@ EXPORT_SYMBOL(drm_mode_create_tv_margin_properties);
  * Returns:
  * 0 on success or a negative error code on failure.
  */
-int drm_mode_create_tv_properties(struct drm_device *dev,
- unsigned int num_modes,
- const char * const modes[])
+int drm_mode_create_tv_properties_legacy(struct drm_device *dev,
+unsigned int num_modes,
+const char * const modes[])
 {
struct drm_property *tv_selector;
struct drm_property *tv_subconnector;
@@ -1733,7 +1733,7 @@ int drm_mode_create_tv_properties(struct drm_device *dev,
 nomem:
return -ENOMEM;
 }
-EXPORT_SYMBOL(drm_mode_create_tv_properties);
+EXPORT_SYMBOL(drm_mode_create_tv_properties_legacy);
 
 /**
  * drm_mode_create_scaling_mode_property - create scaling mode property
diff --git a/drivers/gpu/drm/gud/gud_connector.c 
b/drivers/gpu/drm/gud/gud_connector.c
index caf82e9095b4..4026eb0132bd 100644
--- a/drivers/gpu/drm/gud/gud_connector.c
+++ b/drivers/gpu/drm/gud/gud_connector.c
@@ -400,7 +400,7 @@ static int gud_connector_add_tv_mode(struct gud_device 
*gdrm, struct drm_connect
for (i = 0; i < num_modes; i++)
modes[i] = [i * GUD_CONNECTOR_TV_MODE_NAME_LEN];
 
-   ret = drm_mode_create_tv_properties(connector->dev, num_modes, modes);
+   ret = drm_mode_create_tv_properties_legacy(connector->dev, num_modes, 
modes);
 free:
kfree(buf);
if (ret < 0)
@@ -539,7 +539,7 @@ static int gud_connector_add_properties(struct gud_device 
*gdrm, struct gud_conn
fallthrough;
case GUD_PROPERTY_TV_HUE:
/* This is a no-op if already added. */
-   ret = drm_mode_create_tv_properties(drm, 0, NULL);
+   ret = drm_mode_create_tv_properties_legacy(drm, 0, 
NULL);
if (ret)
goto out;
break;
diff --git a/drivers/gpu/drm/i2c/ch7006_drv.c b/drivers/gpu/drm/i2c/ch7006_drv.c
index d29b63fd6178..506f6f932518 100644
--- a/drivers/gpu/drm/i2c/ch7006_drv.c
+++ b/drivers/gpu/drm/i2c/ch7006_drv.c
@@ -250,7 +250,7 @@ static int ch7006_encoder_create_resources(struct 
drm_encoder *encoder,
struct drm_device *dev = encoder->dev;
struct drm_mode_config *conf = >mode_config;
 
-   drm_mode_create_tv_properties(dev, NUM_TV_NORMS, ch7006_tv_norm_names);
+   drm_mode_create_tv_properties_legacy(dev, NUM_TV_NORMS, 
ch7006_tv_norm_names);
 
priv->scale_property = drm_property_create_range(dev, 0, "scale", 0, 2);
if (!priv->scale_property)
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c 
b/drivers/gpu/drm/i915/display/intel_tv.c
index 9379f3463344..7fd2c6f01ad6 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1984,7 +1984,7 @@ intel_tv_init(struct drm_i915_private *dev_priv)
 
tv_format_names[i] = tv_modes[i].name;
}
-   drm_mode_create_tv_properties(dev, i, tv_format_names);
+   drm_mode_create_tv_properties_legacy(dev, i, tv_format_names);
 
drm_object_attach_property(>base, 
dev->mode_config.tv_mode_property,
   state->tv.mode);
diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 
b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
index 

[Intel-gfx] [PATCH v2 03/41] drm/atomic-helper: Rename drm_atomic_helper_connector_tv_reset to avoid ambiguity

2022-08-29 Thread Maxime Ripard
We currently have two sets of TV properties.

The first one is there to deal with analog TV properties, creating
properties such as the TV mode, subconnectors, saturation, hue and so on.
It's created by calling the drm_mode_create_tv_properties() function.

The second one is there to deal with properties that might be useful on a
TV, creating the overscan margins for example. It's created by calling the
drm_mode_create_tv_margin_properties().

However, we also have a drm_atomic_helper_connector_tv_reset() function
that will reset the TV margin properties to their default values, and thus
is supposed to be called for the latter set. This creates an ambiguity due
to the inconsistent naming.

We can thus rename the drm_atomic_helper_connector_tv_reset() function to
drm_atomic_helper_connector_tv_margins_reset() to remove that ambiguity
and hopefully make it more obvious.

Signed-off-by: Maxime Ripard 
Reviewed-by: Noralf Trønnes 

diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
b/drivers/gpu/drm/drm_atomic_state_helper.c
index bf31b9d92094..dfb57217253b 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -464,12 +464,12 @@ void drm_atomic_helper_connector_reset(struct 
drm_connector *connector)
 EXPORT_SYMBOL(drm_atomic_helper_connector_reset);
 
 /**
- * drm_atomic_helper_connector_tv_reset - Resets TV connector properties
+ * drm_atomic_helper_connector_tv_margins_reset - Resets TV connector 
properties
  * @connector: DRM connector
  *
  * Resets the TV-related properties attached to a connector.
  */
-void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector)
+void drm_atomic_helper_connector_tv_margins_reset(struct drm_connector 
*connector)
 {
struct drm_cmdline_mode *cmdline = >cmdline_mode;
struct drm_connector_state *state = connector->state;
@@ -479,7 +479,7 @@ void drm_atomic_helper_connector_tv_reset(struct 
drm_connector *connector)
state->tv.margins.top = cmdline->tv_margins.top;
state->tv.margins.bottom = cmdline->tv_margins.bottom;
 }
-EXPORT_SYMBOL(drm_atomic_helper_connector_tv_reset);
+EXPORT_SYMBOL(drm_atomic_helper_connector_tv_margins_reset);
 
 /**
  * __drm_atomic_helper_connector_duplicate_state - copy atomic connector state
diff --git a/drivers/gpu/drm/gud/gud_connector.c 
b/drivers/gpu/drm/gud/gud_connector.c
index d0addd478815..fa636206f232 100644
--- a/drivers/gpu/drm/gud/gud_connector.c
+++ b/drivers/gpu/drm/gud/gud_connector.c
@@ -355,7 +355,7 @@ static void gud_connector_reset(struct drm_connector 
*connector)
drm_atomic_helper_connector_reset(connector);
connector->state->tv = gconn->initial_tv_state;
/* Set margins from command line */
-   drm_atomic_helper_connector_tv_reset(connector);
+   drm_atomic_helper_connector_tv_margins_reset(connector);
if (gconn->initial_brightness >= 0)
connector->state->tv.brightness = gconn->initial_brightness;
 }
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 84e5a91c2ea7..6877add8e1fa 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -396,7 +396,7 @@ static void vc4_hdmi_connector_reset(struct drm_connector 
*connector)
new_state->base.max_bpc = 8;
new_state->base.max_requested_bpc = 8;
new_state->output_format = VC4_HDMI_OUTPUT_RGB;
-   drm_atomic_helper_connector_tv_reset(connector);
+   drm_atomic_helper_connector_tv_margins_reset(connector);
 }
 
 static struct drm_connector_state *
diff --git a/include/drm/drm_atomic_state_helper.h 
b/include/drm/drm_atomic_state_helper.h
index 3f8f1d627f7c..192766656b88 100644
--- a/include/drm/drm_atomic_state_helper.h
+++ b/include/drm/drm_atomic_state_helper.h
@@ -70,7 +70,7 @@ void __drm_atomic_helper_connector_state_reset(struct 
drm_connector_state *conn_
 void __drm_atomic_helper_connector_reset(struct drm_connector *connector,
 struct drm_connector_state 
*conn_state);
 void drm_atomic_helper_connector_reset(struct drm_connector *connector);
-void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector);
+void drm_atomic_helper_connector_tv_margins_reset(struct drm_connector 
*connector);
 void
 __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector,
   struct drm_connector_state *state);
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 248206bbd975..23112f0c11cf 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -692,7 +692,7 @@ struct drm_connector_tv_margins {
 
 /**
  * struct drm_tv_connector_state - TV connector related states
- * @subconnector: selected subconnector
+ * @select_subconnector: selected subconnector
  * @margins: TV margins
  * @mode: TV mode
  * @brightness: brightness in percent

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 12/41] drm/modes: parse_cmdline: Add support for named modes containing dashes

2022-08-29 Thread Maxime Ripard
From: Geert Uytterhoeven 

It is fairly common for named video modes to contain dashes (e.g.
"tt-mid" on Atari, "dblntsc-ff" on Amiga).  Currently such mode names
are not recognized, as the dash is considered to be a separator between
mode name and bpp.

Fix this by skipping any dashes that are not followed immediately by a
digit when looking for the separator.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Hans de Goede 
Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index b4e1ff56b4d8..99a21e5cd00d 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2263,6 +2263,8 @@ bool drm_mode_parse_command_line_for_connector(const char 
*mode_option,
 
/* Try to locate the bpp and refresh specifiers, if any */
bpp_ptr = strnchr(name, options_off, '-');
+   while (bpp_ptr && !isdigit(bpp_ptr[1]))
+   bpp_ptr = strnchr(bpp_ptr + 1, options_off, '-');
if (bpp_ptr)
bpp_off = bpp_ptr - name;
 

-- 
b4 0.10.0-dev-65ba7


[Intel-gfx] [PATCH v2 13/41] drm/client: Add some tests for drm_connector_pick_cmdline_mode()

2022-08-29 Thread Maxime Ripard
drm_connector_pick_cmdline_mode() is in charge of finding a proper
drm_display_mode from the definition we got in the video= command line
argument.

Let's add some unit tests to make sure we're not getting any regressions
there.

Signed-off-by: Maxime Ripard 

diff --git a/drivers/gpu/drm/drm_client_modeset.c 
b/drivers/gpu/drm/drm_client_modeset.c
index bbc535cc50dd..d553e793e673 100644
--- a/drivers/gpu/drm/drm_client_modeset.c
+++ b/drivers/gpu/drm/drm_client_modeset.c
@@ -1237,3 +1237,7 @@ int drm_client_modeset_dpms(struct drm_client_dev 
*client, int mode)
return ret;
 }
 EXPORT_SYMBOL(drm_client_modeset_dpms);
+
+#ifdef CONFIG_DRM_KUNIT_TEST
+#include "tests/drm_client_modeset_test.c"
+#endif
diff --git a/drivers/gpu/drm/tests/drm_client_modeset_test.c 
b/drivers/gpu/drm/tests/drm_client_modeset_test.c
new file mode 100644
index ..46335de7bc6b
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_client_modeset_test.c
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 Maxime Ripard 
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "drm_kunit_helpers.h"
+
+struct drm_client_modeset_test_priv {
+   struct drm_device *drm;
+   struct drm_connector connector;
+};
+
+static int drm_client_modeset_connector_get_modes(struct drm_connector 
*connector)
+{
+   struct drm_display_mode *mode;
+   int count;
+
+   count = drm_add_modes_noedid(connector, 1920, 1200);
+
+   return count;
+}
+
+static const struct drm_connector_helper_funcs 
drm_client_modeset_connector_helper_funcs = {
+   .get_modes = drm_client_modeset_connector_get_modes,
+};
+
+static const struct drm_connector_funcs drm_client_modeset_connector_funcs = {
+};
+
+static int drm_client_modeset_test_init(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv;
+   int ret;
+
+   priv = kunit_kzalloc(test, sizeof(*priv), GFP_KERNEL);
+   if (!priv)
+   return -ENOMEM;
+   test->priv = priv;
+
+   priv->drm = drm_kunit_device_init("drm-client-modeset-test");
+   if (IS_ERR(priv->drm))
+   return PTR_ERR(priv->drm);
+
+   ret = drmm_connector_init(priv->drm, >connector,
+ _client_modeset_connector_funcs,
+ DRM_MODE_CONNECTOR_Unknown,
+ NULL);
+   if (ret)
+   return ret;
+   drm_connector_helper_add(>connector, 
_client_modeset_connector_helper_funcs);
+
+   return 0;
+}
+
+static void drm_client_modeset_test_exit(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+
+   drm_kunit_device_exit(priv->drm);
+}
+
+static void drm_pick_cmdline_res_1920_1080_60(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+   struct drm_device *drm = priv->drm;
+   struct drm_connector *connector = >connector;
+   struct drm_cmdline_mode *cmdline_mode = >cmdline_mode;
+   struct drm_display_mode *expected_mode, *mode;
+   const char *cmdline = "1920x1080@60";
+   int ret;
+
+   expected_mode = drm_mode_find_dmt(priv->drm, 1920, 1080, 60, false);
+   KUNIT_ASSERT_PTR_NE(test, expected_mode, NULL);
+
+   KUNIT_ASSERT_TRUE(test,
+ drm_mode_parse_command_line_for_connector(cmdline,
+   connector,
+   
cmdline_mode));
+
+   mutex_lock(>mode_config.mutex);
+   ret = drm_helper_probe_single_connector_modes(connector, 1920, 1080);
+   mutex_unlock(>mode_config.mutex);
+   KUNIT_ASSERT_GT(test, ret, 0);
+
+   mode = drm_connector_pick_cmdline_mode(connector);
+   KUNIT_ASSERT_PTR_NE(test, mode, NULL);
+
+   KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected_mode, mode));
+}
+
+static struct kunit_case drm_pick_cmdline_tests[] = {
+   KUNIT_CASE(drm_pick_cmdline_res_1920_1080_60),
+   {}
+};
+
+static struct kunit_suite drm_pick_cmdline_test_suite = {
+   .name = "drm_pick_cmdline",
+   .init = drm_client_modeset_test_init,
+   .exit = drm_client_modeset_test_exit,
+   .test_cases = drm_pick_cmdline_tests
+};
+
+kunit_test_suite(drm_pick_cmdline_test_suite);
+MODULE_AUTHOR("Maxime Ripard ");
+MODULE_LICENSE("GPL");

-- 
b4 0.10.0-dev-65ba7


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