[Intel-gfx] [PATCH v6 20/23] drm/vc4: vec: Check for VEC output constraints

[maxime]

From: Mateusz Kwiatkowski 

The VEC can accept pretty much any relatively reasonable mode, but still
has a bunch of constraints to meet.

Let's create an atomic_check() implementation that will make sure we
don't end up accepting a non-functional mode.

Acked-by: Noralf Trønnes 
Signed-off-by: Mateusz Kwiatkowski 
Signed-off-by: Maxime Ripard 

---

Changes in v6:
- Used htotal instead of vtotal to discriminate PAL against NTSC
---
 drivers/gpu/drm/vc4/vc4_vec.c | 50 +++
 1 file changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 90e375a8a8f9..bfa8a58dba30 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -453,6 +453,7 @@ static int vc4_vec_encoder_atomic_check(struct drm_encoder 
*encoder,
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
 {
+   const struct drm_display_mode *mode = _state->adjusted_mode;
const struct vc4_vec_tv_mode *vec_mode;
 
vec_mode = _vec_tv_modes[conn_state->tv.legacy_mode];
@@ -461,6 +462,55 @@ static int vc4_vec_encoder_atomic_check(struct drm_encoder 
*encoder,
!drm_mode_equal(vec_mode->mode, _state->adjusted_mode))
return -EINVAL;
 
+   if (mode->crtc_hdisplay % 4)
+   return -EINVAL;
+
+   if (!(mode->crtc_hsync_end - mode->crtc_hsync_start))
+   return -EINVAL;
+
+   switch (mode->htotal) {
+   /* NTSC */
+   case 858:
+   if (mode->crtc_vtotal > 262)
+   return -EINVAL;
+
+   if (mode->crtc_vdisplay < 1 || mode->crtc_vdisplay > 253)
+   return -EINVAL;
+
+   if (!(mode->crtc_vsync_start - mode->crtc_vdisplay))
+   return -EINVAL;
+
+   if ((mode->crtc_vsync_end - mode->crtc_vsync_start) != 3)
+   return -EINVAL;
+
+   if ((mode->crtc_vtotal - mode->crtc_vsync_end) < 4)
+   return -EINVAL;
+
+   break;
+
+   /* PAL/SECAM */
+   case 864:
+   if (mode->crtc_vtotal > 312)
+   return -EINVAL;
+
+   if (mode->crtc_vdisplay < 1 || mode->crtc_vdisplay > 305)
+   return -EINVAL;
+
+   if (!(mode->crtc_vsync_start - mode->crtc_vdisplay))
+   return -EINVAL;
+
+   if ((mode->crtc_vsync_end - mode->crtc_vsync_start) != 3)
+   return -EINVAL;
+
+   if ((mode->crtc_vtotal - mode->crtc_vsync_end) < 2)
+   return -EINVAL;
+
+   break;
+
+   default:
+   return -EINVAL;
+   }
+
return 0;
 }
 

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 23/23] drm/sun4i: tv: Convert to the new TV mode property

[maxime]

Now that the core can deal fine with analog TV modes, let's convert the
sun4i TV driver to leverage those new features.

Acked-by: Noralf Trønnes 
Reviewed-by: Jernej Skrabec 
Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Convert to new get_modes helper

Changes in v5:
- Removed the count variable in get_modes
- Removed spurious vc4 change
---
 drivers/gpu/drm/sun4i/sun4i_tv.c | 141 ++-
 1 file changed, 34 insertions(+), 107 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index c65f0a89b6b0..9625a00a48ba 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -141,23 +141,14 @@ struct resync_parameters {
 struct tv_mode {
char*name;
 
+   unsigned inttv_mode;
+
u32 mode;
u32 chroma_freq;
u16 back_porch;
u16 front_porch;
-   u16 line_number;
u16 vblank_level;
 
-   u32 hdisplay;
-   u16 hfront_porch;
-   u16 hsync_len;
-   u16 hback_porch;
-
-   u32 vdisplay;
-   u16 vfront_porch;
-   u16 vsync_len;
-   u16 vback_porch;
-
boolyc_en;
booldac3_en;
booldac_bit25_en;
@@ -213,7 +204,7 @@ static const struct resync_parameters pal_resync_parameters 
= {
 
 static const struct tv_mode tv_modes[] = {
{
-   .name   = "NTSC",
+   .tv_mode= DRM_MODE_TV_MODE_NTSC,
.mode   = SUN4I_TVE_CFG0_RES_480i,
.chroma_freq= 0x21f07c1f,
.yc_en  = true,
@@ -222,17 +213,6 @@ static const struct tv_mode tv_modes[] = {
 
.back_porch = 118,
.front_porch= 32,
-   .line_number= 525,
-
-   .hdisplay   = 720,
-   .hfront_porch   = 18,
-   .hsync_len  = 2,
-   .hback_porch= 118,
-
-   .vdisplay   = 480,
-   .vfront_porch   = 26,
-   .vsync_len  = 2,
-   .vback_porch= 17,
 
.vblank_level   = 240,
 
@@ -242,23 +222,12 @@ static const struct tv_mode tv_modes[] = {
.resync_params  = _resync_parameters,
},
{
-   .name   = "PAL",
+   .tv_mode= DRM_MODE_TV_MODE_PAL,
.mode   = SUN4I_TVE_CFG0_RES_576i,
.chroma_freq= 0x2a098acb,
 
.back_porch = 138,
.front_porch= 24,
-   .line_number= 625,
-
-   .hdisplay   = 720,
-   .hfront_porch   = 3,
-   .hsync_len  = 2,
-   .hback_porch= 139,
-
-   .vdisplay   = 576,
-   .vfront_porch   = 28,
-   .vsync_len  = 2,
-   .vback_porch= 19,
 
.vblank_level   = 252,
 
@@ -276,63 +245,21 @@ drm_encoder_to_sun4i_tv(struct drm_encoder *encoder)
encoder);
 }
 
-/*
- * FIXME: If only the drm_display_mode private field was usable, this
- * could go away...
- *
- * So far, it doesn't seem to be preserved when the mode is passed by
- * to mode_set for some reason.
- */
-static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct 
drm_display_mode *mode)
+static const struct tv_mode *
+sun4i_tv_find_tv_by_mode(unsigned int mode)
 {
int i;
 
-   /* First try to identify the mode by name */
for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
const struct tv_mode *tv_mode = _modes[i];
 
-   DRM_DEBUG_DRIVER("Comparing mode %s vs %s",
-mode->name, tv_mode->name);
-
-   if (!strcmp(mode->name, tv_mode->name))
-   return tv_mode;
-   }
-
-   /* Then by number of lines */
-   for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
-   const struct tv_mode *tv_mode = _modes[i];
-
-   DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)",
-mode->name, tv_mode->name,
-mode->vdisplay, tv_mode->vdisplay);
-
-   if (mode->vdisplay == tv_mode->vdisplay)
+   if (tv_mode->tv_mode == mode)
return tv_mode;
}
 
return NULL;
 }
 
-static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode,
- struct drm_display_mode *mode)
-{
-   DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name);
-
-   mode->type = DRM_MODE_TYPE_DRIVER;
-   mode->clock = 13500;
-   mode->flags = DRM_MODE_FLAG_INTERLACE;
-
-   mode->hdisplay = tv_mode->hdisplay;
-   

[Intel-gfx] [PATCH v6 15/23] drm/modes: Introduce more named modes

[maxime]

Now that we can easily extend the named modes list, let's add a few more
analog TV modes that were used in the wild, and some unit tests to make
sure it works as intended.

Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Renamed the tests to follow DRM test naming convention

Changes in v5:
- Switched to KUNIT_ASSERT_NOT_NULL
---
 drivers/gpu/drm/drm_modes.c |  2 +
 drivers/gpu/drm/tests/drm_client_modeset_test.c | 54 +
 2 files changed, 56 insertions(+)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 85aa9898c229..530516a166bc 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2272,7 +2272,9 @@ struct drm_named_mode {
 
 static const struct drm_named_mode drm_named_modes[] = {
NAMED_MODE("NTSC", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_NTSC),
+   NAMED_MODE("NTSC-J", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_NTSC_J),
NAMED_MODE("PAL", 13500, 720, 576, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_PAL),
+   NAMED_MODE("PAL-M", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_PAL_M),
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
diff --git a/drivers/gpu/drm/tests/drm_client_modeset_test.c 
b/drivers/gpu/drm/tests/drm_client_modeset_test.c
index fdfe9e20702e..b3820d25beca 100644
--- a/drivers/gpu/drm/tests/drm_client_modeset_test.c
+++ b/drivers/gpu/drm/tests/drm_client_modeset_test.c
@@ -133,6 +133,32 @@ static void drm_test_pick_cmdline_named_ntsc(struct kunit 
*test)
KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_ntsc_480i(drm), 
mode));
 }
 
+static void drm_test_pick_cmdline_named_ntsc_j(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+   struct drm_device *drm = priv->drm;
+   struct drm_connector *connector = >connector;
+   struct drm_cmdline_mode *cmdline_mode = >cmdline_mode;
+   struct drm_display_mode *mode;
+   const char *cmdline = "NTSC-J";
+   int ret;
+
+   KUNIT_ASSERT_TRUE(test,
+ drm_mode_parse_command_line_for_connector(cmdline,
+   connector,
+   
cmdline_mode));
+
+   mutex_lock(>mode_config.mutex);
+   ret = drm_helper_probe_single_connector_modes(connector, 1920, 1080);
+   mutex_unlock(>mode_config.mutex);
+   KUNIT_ASSERT_GT(test, ret, 0);
+
+   mode = drm_connector_pick_cmdline_mode(connector);
+   KUNIT_ASSERT_NOT_NULL(test, mode);
+
+   KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_ntsc_480i(drm), 
mode));
+}
+
 static void drm_test_pick_cmdline_named_pal(struct kunit *test)
 {
struct drm_client_modeset_test_priv *priv = test->priv;
@@ -159,10 +185,38 @@ static void drm_test_pick_cmdline_named_pal(struct kunit 
*test)
KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_pal_576i(drm), 
mode));
 }
 
+static void drm_test_pick_cmdline_named_pal_m(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+   struct drm_device *drm = priv->drm;
+   struct drm_connector *connector = >connector;
+   struct drm_cmdline_mode *cmdline_mode = >cmdline_mode;
+   struct drm_display_mode *mode;
+   const char *cmdline = "PAL-M";
+   int ret;
+
+   KUNIT_ASSERT_TRUE(test,
+ drm_mode_parse_command_line_for_connector(cmdline,
+   connector,
+   
cmdline_mode));
+
+   mutex_lock(>mode_config.mutex);
+   ret = drm_helper_probe_single_connector_modes(connector, 1920, 1080);
+   mutex_unlock(>mode_config.mutex);
+   KUNIT_ASSERT_GT(test, ret, 0);
+
+   mode = drm_connector_pick_cmdline_mode(connector);
+   KUNIT_ASSERT_NOT_NULL(test, mode);
+
+   KUNIT_EXPECT_TRUE(test, drm_mode_equal(drm_mode_analog_ntsc_480i(drm), 
mode));
+}
+
 static struct kunit_case drm_test_pick_cmdline_tests[] = {
KUNIT_CASE(drm_test_pick_cmdline_res_1920_1080_60),
KUNIT_CASE(drm_test_pick_cmdline_named_ntsc),
+   KUNIT_CASE(drm_test_pick_cmdline_named_ntsc_j),
KUNIT_CASE(drm_test_pick_cmdline_named_pal),
+   KUNIT_CASE(drm_test_pick_cmdline_named_pal_m),
{}
 };
 

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 17/23] drm/atomic-helper: Add a TV properties reset helper

[maxime]

The drm_tv_create_properties() function will create a bunch of properties,
but it's up to each and every driver using that function to properly reset
the state of these properties leading to inconsistent behaviours.

Let's create a helper that will take care of it.

Reviewed-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Use tv_mode_specified instead of a !0 tv_mode to set the default
---
 drivers/gpu/drm/drm_atomic_state_helper.c | 75 +++
 include/drm/drm_atomic_state_helper.h |  1 +
 2 files changed, 76 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
b/drivers/gpu/drm/drm_atomic_state_helper.c
index dfb57217253b..e1fc3f26340a 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -481,6 +481,81 @@ void drm_atomic_helper_connector_tv_margins_reset(struct 
drm_connector *connecto
 }
 EXPORT_SYMBOL(drm_atomic_helper_connector_tv_margins_reset);
 
+/**
+ * drm_atomic_helper_connector_tv_reset - Resets Analog TV connector properties
+ * @connector: DRM connector
+ *
+ * Resets the analog TV properties attached to a connector
+ */
+void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector)
+{
+   struct drm_device *dev = connector->dev;
+   struct drm_cmdline_mode *cmdline = >cmdline_mode;
+   struct drm_connector_state *state = connector->state;
+   struct drm_property *prop;
+   uint64_t val;
+
+   prop = dev->mode_config.tv_mode_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.mode = val;
+
+   if (cmdline->tv_mode_specified)
+   state->tv.mode = cmdline->tv_mode;
+
+   prop = dev->mode_config.tv_select_subconnector_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.select_subconnector = val;
+
+   prop = dev->mode_config.tv_subconnector_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.subconnector = val;
+
+   prop = dev->mode_config.tv_brightness_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.brightness = val;
+
+   prop = dev->mode_config.tv_contrast_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.contrast = val;
+
+   prop = dev->mode_config.tv_flicker_reduction_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.flicker_reduction = val;
+
+   prop = dev->mode_config.tv_overscan_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.overscan = val;
+
+   prop = dev->mode_config.tv_saturation_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.saturation = val;
+
+   prop = dev->mode_config.tv_hue_property;
+   if (prop)
+   if (!drm_object_property_get_default_value(>base,
+  prop, ))
+   state->tv.hue = val;
+
+   drm_atomic_helper_connector_tv_margins_reset(connector);
+}
+EXPORT_SYMBOL(drm_atomic_helper_connector_tv_reset);
+
 /**
  * __drm_atomic_helper_connector_duplicate_state - copy atomic connector state
  * @connector: connector object
diff --git a/include/drm/drm_atomic_state_helper.h 
b/include/drm/drm_atomic_state_helper.h
index 192766656b88..c8fbce795ee7 100644
--- a/include/drm/drm_atomic_state_helper.h
+++ b/include/drm/drm_atomic_state_helper.h
@@ -70,6 +70,7 @@ void __drm_atomic_helper_connector_state_reset(struct 
drm_connector_state *conn_
 void __drm_atomic_helper_connector_reset(struct drm_connector *connector,
 struct drm_connector_state 
*conn_state);
 void drm_atomic_helper_connector_reset(struct drm_connector *connector);
+void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector);
 void drm_atomic_helper_connector_tv_margins_reset(struct drm_connector 
*connector);
 void
 __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector,

-- 
b4 

[Intel-gfx] [PATCH v6 19/23] drm/vc4: vec: Use TV Reset implementation

[maxime]

The analog TV properties created by the drm_mode_create_tv_properties() are
not properly initialised at reset. Let's switch our implementation to call
drm_atomic_helper_connector_tv_reset().

Reviewed-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_vec.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index adc9bf99e3fd..90e375a8a8f9 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -268,6 +268,12 @@ vc4_vec_connector_detect(struct drm_connector *connector, 
bool force)
return connector_status_unknown;
 }
 
+static void vc4_vec_connector_reset(struct drm_connector *connector)
+{
+   drm_atomic_helper_connector_reset(connector);
+   drm_atomic_helper_connector_tv_reset(connector);
+}
+
 static int vc4_vec_connector_get_modes(struct drm_connector *connector)
 {
struct drm_connector_state *state = connector->state;
@@ -288,7 +294,7 @@ static int vc4_vec_connector_get_modes(struct drm_connector 
*connector)
 static const struct drm_connector_funcs vc4_vec_connector_funcs = {
.detect = vc4_vec_connector_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
-   .reset = drm_atomic_helper_connector_reset,
+   .reset = vc4_vec_connector_reset,
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 };

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 16/23] drm/probe-helper: Provide a TV get_modes helper

[maxime]

Most of the TV connectors will need a similar get_modes implementation
that will, depending on the drivers' capabilities, register the 480i and
576i modes.

That implementation will also need to set the preferred flag and order
the modes based on the driver and users preferrence.

This is especially important to guarantee that a userspace stack such as
Xorg can start and pick up the preferred mode while maintaining a
working output.

Signed-off-by: Maxime Ripard 

---
Changes in v6:
- New patch
---
 drivers/gpu/drm/drm_probe_helper.c | 97 ++
 include/drm/drm_probe_helper.h |  1 +
 2 files changed, 98 insertions(+)

diff --git a/drivers/gpu/drm/drm_probe_helper.c 
b/drivers/gpu/drm/drm_probe_helper.c
index 69b0b2b9cc1c..4a60575f5c66 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -1147,3 +1147,100 @@ int drm_connector_helper_get_modes(struct drm_connector 
*connector)
return count;
 }
 EXPORT_SYMBOL(drm_connector_helper_get_modes);
+
+static bool tv_mode_supported(struct drm_connector *connector,
+ enum drm_connector_tv_mode mode)
+{
+   struct drm_device *dev = connector->dev;
+   struct drm_property *property = dev->mode_config.tv_mode_property;
+
+   unsigned int i;
+
+   for (i = 0; i < property->num_values; i++)
+   if (property->values[i] == mode)
+   return true;
+
+   return false;
+}
+
+/**
+ * drm_connector_helper_tv_get_modes - Fills the modes availables to a TV 
connector
+ * @connector: The connector
+ *
+ * Fills the available modes for a TV connector based on the supported
+ * TV modes, and the default mode expressed by the kernel command line.
+ *
+ * This can be used as the default TV connector helper .get_modes() hook
+ * if the driver does not need any special processing.
+ *
+ * Returns:
+ * The number of modes added to the connector.
+ */
+int drm_connector_helper_tv_get_modes(struct drm_connector *connector)
+{
+   struct drm_device *dev = connector->dev;
+   struct drm_cmdline_mode *cmdline = >cmdline_mode;
+   struct drm_display_mode *tv_modes[2] = {};
+   struct drm_display_mode *mode;
+   unsigned int first_mode_idx;
+   unsigned int count = 0;
+   uint64_t default_mode;
+   int ret;
+
+   if (!dev->mode_config.tv_mode_property)
+   return 0;
+
+   if (tv_mode_supported(connector, DRM_MODE_TV_MODE_NTSC) ||
+   tv_mode_supported(connector, DRM_MODE_TV_MODE_NTSC_443) ||
+   tv_mode_supported(connector, DRM_MODE_TV_MODE_NTSC_J) ||
+   tv_mode_supported(connector, DRM_MODE_TV_MODE_PAL_M)) {
+   mode = drm_mode_analog_ntsc_480i(connector->dev);
+   if (!mode)
+   return 0;
+
+   tv_modes[count++] = mode;
+   }
+
+   if (tv_mode_supported(connector, DRM_MODE_TV_MODE_PAL) ||
+   tv_mode_supported(connector, DRM_MODE_TV_MODE_PAL_N) ||
+   tv_mode_supported(connector, DRM_MODE_TV_MODE_SECAM)) {
+   mode = drm_mode_analog_pal_576i(connector->dev);
+   if (!mode)
+   return 0;
+
+   tv_modes[count++] = mode;
+   }
+
+   if (count == 1) {
+   mode->type |= DRM_MODE_TYPE_PREFERRED;
+   drm_mode_probed_add(connector, mode);
+   return count;
+   }
+
+   ret = drm_object_property_get_default_value(>base,
+   
dev->mode_config.tv_mode_property,
+   _mode);
+   if (ret)
+   return 0;
+
+   if (cmdline->tv_mode_specified)
+   default_mode = cmdline->tv_mode;
+
+   if ((default_mode == DRM_MODE_TV_MODE_NTSC) ||
+   (default_mode == DRM_MODE_TV_MODE_NTSC_443) ||
+   (default_mode == DRM_MODE_TV_MODE_NTSC_J) ||
+   (default_mode == DRM_MODE_TV_MODE_PAL_M))
+   first_mode_idx = 0;
+   else
+   first_mode_idx = 1;
+
+   mode = tv_modes[first_mode_idx];
+   mode->type |= DRM_MODE_TYPE_PREFERRED;
+   drm_mode_probed_add(connector, mode);
+
+   mode = first_mode_idx ? tv_modes[0] : tv_modes[1];
+   drm_mode_probed_add(connector, mode);
+
+   return count;
+}
+EXPORT_SYMBOL(drm_connector_helper_tv_get_modes);
diff --git a/include/drm/drm_probe_helper.h b/include/drm/drm_probe_helper.h
index 5880daa14624..4977e0ab72db 100644
--- a/include/drm/drm_probe_helper.h
+++ b/include/drm/drm_probe_helper.h
@@ -35,5 +35,6 @@ int drm_connector_helper_get_modes_from_ddc(struct 
drm_connector *connector);
 int drm_connector_helper_get_modes_fixed(struct drm_connector *connector,
 const struct drm_display_mode 
*fixed_mode);
 int drm_connector_helper_get_modes(struct drm_connector *connector);
+int drm_connector_helper_tv_get_modes(struct 

[Intel-gfx] [PATCH v6 18/23] drm/atomic-helper: Add an analog TV atomic_check implementation

[maxime]

The analog TV connector drivers share some atomic_check logic, and the new
TV standard property have created some boilerplate that can be be shared
across drivers too.

Let's create an atomic_check helper for those use cases.

Reviewed-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_atomic_state_helper.c | 49 +++
 include/drm/drm_atomic_state_helper.h |  3 ++
 2 files changed, 52 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
b/drivers/gpu/drm/drm_atomic_state_helper.c
index e1fc3f26340a..3a467013c656 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -556,6 +556,55 @@ void drm_atomic_helper_connector_tv_reset(struct 
drm_connector *connector)
 }
 EXPORT_SYMBOL(drm_atomic_helper_connector_tv_reset);
 
+/**
+ * @drm_atomic_helper_connector_tv_check: Validate an analog TV connector state
+ * @connector: DRM Connector
+ * @state: the DRM State object
+ *
+ * Checks the state object to see if the requested state is valid for an
+ * analog TV connector.
+ *
+ * Returns:
+ * Zero for success, a negative error code on error.
+ */
+int drm_atomic_helper_connector_tv_check(struct drm_connector *connector,
+struct drm_atomic_state *state)
+{
+   struct drm_connector_state *old_conn_state =
+   drm_atomic_get_old_connector_state(state, connector);
+   struct drm_connector_state *new_conn_state =
+   drm_atomic_get_new_connector_state(state, connector);
+   struct drm_crtc_state *crtc_state;
+   struct drm_crtc *crtc;
+
+   crtc = new_conn_state->crtc;
+   if (!crtc)
+   return 0;
+
+   crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
+   if (!crtc_state)
+   return -EINVAL;
+
+   if (old_conn_state->tv.mode != new_conn_state->tv.mode)
+   crtc_state->mode_changed = true;
+
+   if ((old_conn_state->tv.margins.left != 
new_conn_state->tv.margins.left) ||
+   (old_conn_state->tv.margins.right != 
new_conn_state->tv.margins.right) ||
+   (old_conn_state->tv.margins.top != new_conn_state->tv.margins.top) 
||
+   (old_conn_state->tv.margins.bottom != 
new_conn_state->tv.margins.bottom) ||
+   (old_conn_state->tv.mode != new_conn_state->tv.mode) ||
+   (old_conn_state->tv.brightness != new_conn_state->tv.brightness) ||
+   (old_conn_state->tv.contrast != new_conn_state->tv.contrast) ||
+   (old_conn_state->tv.flicker_reduction != 
new_conn_state->tv.flicker_reduction) ||
+   (old_conn_state->tv.overscan != new_conn_state->tv.overscan) ||
+   (old_conn_state->tv.saturation != new_conn_state->tv.saturation) ||
+   (old_conn_state->tv.hue != new_conn_state->tv.hue))
+   crtc_state->connectors_changed = true;
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_atomic_helper_connector_tv_check);
+
 /**
  * __drm_atomic_helper_connector_duplicate_state - copy atomic connector state
  * @connector: connector object
diff --git a/include/drm/drm_atomic_state_helper.h 
b/include/drm/drm_atomic_state_helper.h
index c8fbce795ee7..b9740edb2658 100644
--- a/include/drm/drm_atomic_state_helper.h
+++ b/include/drm/drm_atomic_state_helper.h
@@ -26,6 +26,7 @@
 
 #include 
 
+struct drm_atomic_state;
 struct drm_bridge;
 struct drm_bridge_state;
 struct drm_crtc;
@@ -71,6 +72,8 @@ void __drm_atomic_helper_connector_reset(struct drm_connector 
*connector,
 struct drm_connector_state 
*conn_state);
 void drm_atomic_helper_connector_reset(struct drm_connector *connector);
 void drm_atomic_helper_connector_tv_reset(struct drm_connector *connector);
+int drm_atomic_helper_connector_tv_check(struct drm_connector *connector,
+struct drm_atomic_state *state);
 void drm_atomic_helper_connector_tv_margins_reset(struct drm_connector 
*connector);
 void
 __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector,

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 14/23] drm/modes: Properly generate a drm_display_mode from a named mode

[maxime]

The framework will get the drm_display_mode from the drm_cmdline_mode it
got by parsing the video command line argument by calling
drm_connector_pick_cmdline_mode().

The heavy lifting will then be done by the drm_mode_create_from_cmdline_mode()
function.

In the case of the named modes though, there's no real code to make that
translation and we rely on the drivers to guess which actual display mode
we meant.

Let's modify drm_mode_create_from_cmdline_mode() to properly generate the
drm_display_mode we mean when passing a named mode.

Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Fix get_modes to return 0 instead of an error code
- Rename the tests to follow the DRM test naming convention

Changes in v5:
- Switched to KUNIT_ASSERT_NOT_NULL
---
 drivers/gpu/drm/drm_modes.c | 34 ++-
 drivers/gpu/drm/tests/drm_client_modeset_test.c | 77 -
 2 files changed, 109 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index dc037f7ceb37..85aa9898c229 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2497,6 +2497,36 @@ bool drm_mode_parse_command_line_for_connector(const 
char *mode_option,
 }
 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
 
+static struct drm_display_mode *drm_named_mode(struct drm_device *dev,
+  struct drm_cmdline_mode *cmd)
+{
+   struct drm_display_mode *mode;
+   unsigned int i;
+
+   for (i = 0; i < ARRAY_SIZE(drm_named_modes); i++) {
+   const struct drm_named_mode *named_mode = _named_modes[i];
+
+   if (strcmp(cmd->name, named_mode->name))
+   continue;
+
+   if (!named_mode->tv_mode)
+   continue;
+
+   mode = drm_analog_tv_mode(dev,
+ named_mode->tv_mode,
+ named_mode->pixel_clock_khz * 1000,
+ named_mode->xres,
+ named_mode->yres,
+ named_mode->flags & 
DRM_MODE_FLAG_INTERLACE);
+   if (!mode)
+   return NULL;
+
+   return mode;
+   }
+
+   return NULL;
+}
+
 /**
  * drm_mode_create_from_cmdline_mode - convert a command line modeline into a 
DRM display mode
  * @dev: DRM device to create the new mode for
@@ -2514,7 +2544,9 @@ drm_mode_create_from_cmdline_mode(struct drm_device *dev,
if (cmd->xres == 0 || cmd->yres == 0)
return NULL;
 
-   if (cmd->cvt)
+   if (strlen(cmd->name))
+   mode = drm_named_mode(dev, cmd);
+   else if (cmd->cvt)
mode = drm_cvt_mode(dev,
cmd->xres, cmd->yres,
cmd->refresh_specified ? cmd->refresh : 60,
diff --git a/drivers/gpu/drm/tests/drm_client_modeset_test.c 
b/drivers/gpu/drm/tests/drm_client_modeset_test.c
index 3aa1acfe75df..fdfe9e20702e 100644
--- a/drivers/gpu/drm/tests/drm_client_modeset_test.c
+++ b/drivers/gpu/drm/tests/drm_client_modeset_test.c
@@ -21,7 +21,26 @@ struct drm_client_modeset_test_priv {
 
 static int drm_client_modeset_connector_get_modes(struct drm_connector 
*connector)
 {
-   return drm_add_modes_noedid(connector, 1920, 1200);
+   struct drm_display_mode *mode;
+   int count;
+
+   count = drm_add_modes_noedid(connector, 1920, 1200);
+
+   mode = drm_mode_analog_ntsc_480i(connector->dev);
+   if (!mode)
+   return count;
+
+   drm_mode_probed_add(connector, mode);
+   count += 1;
+
+   mode = drm_mode_analog_pal_576i(connector->dev);
+   if (!mode)
+   return count;
+
+   drm_mode_probed_add(connector, mode);
+   count += 1;
+
+   return count;
 }
 
 static const struct drm_connector_helper_funcs 
drm_client_modeset_connector_helper_funcs = {
@@ -52,6 +71,9 @@ static int drm_client_modeset_test_init(struct kunit *test)
 
drm_connector_helper_add(>connector, 
_client_modeset_connector_helper_funcs);
 
+   priv->connector.interlace_allowed = true;
+   priv->connector.doublescan_allowed = true;
+
return 0;
 
 }
@@ -85,9 +107,62 @@ static void drm_test_pick_cmdline_res_1920_1080_60(struct 
kunit *test)
KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected_mode, mode));
 }
 
+static void drm_test_pick_cmdline_named_ntsc(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+   struct drm_device *drm = priv->drm;
+   struct drm_connector *connector = >connector;
+   struct drm_cmdline_mode *cmdline_mode = >cmdline_mode;
+   struct drm_display_mode *mode;
+   const char *cmdline = "NTSC";
+   int ret;
+
+   KUNIT_ASSERT_TRUE(test,
+ drm_mode_parse_command_line_for_connector(cmdline,
+   

[Intel-gfx] [PATCH v6 12/23] drm/connector: Add a function to lookup a TV mode by its name

[maxime]

As part of the command line parsing rework coming in the next patches,
we'll need to lookup drm_connector_tv_mode values by their name, already
defined in drm_tv_mode_enum_list.

In order to avoid any code duplication, let's do a function that will
perform a lookup of a TV mode name and return its value.

Reviewed-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_connector.c | 24 
 include/drm/drm_connector.h |  2 ++
 2 files changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 820f4c730b38..30611c616435 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -991,6 +991,30 @@ static const struct drm_prop_enum_list 
drm_tv_mode_enum_list[] = {
 };
 DRM_ENUM_NAME_FN(drm_get_tv_mode_name, drm_tv_mode_enum_list)
 
+/**
+ * drm_get_tv_mode_from_name - Translates a TV mode name into its enum value
+ * @name: TV Mode name we want to convert
+ * @len: Length of @name
+ *
+ * Translates @name into an enum drm_connector_tv_mode.
+ *
+ * Returns: the enum value on success, a negative errno otherwise.
+ */
+int drm_get_tv_mode_from_name(const char *name, size_t len)
+{
+   unsigned int i;
+
+   for (i = 0; i < ARRAY_SIZE(drm_tv_mode_enum_list); i++) {
+   const struct drm_prop_enum_list *item = 
_tv_mode_enum_list[i];
+
+   if (strlen(item->name) == len && !strncmp(item->name, name, 
len))
+   return item->type;
+   }
+
+   return -EINVAL;
+}
+EXPORT_SYMBOL(drm_get_tv_mode_from_name);
+
 static const struct drm_prop_enum_list drm_tv_select_enum_list[] = {
{ DRM_MODE_SUBCONNECTOR_Automatic, "Automatic" }, /* DVI-I and TV-out */
{ DRM_MODE_SUBCONNECTOR_Composite, "Composite" }, /* TV-out */
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 5c5e67de2296..276f5cb0f351 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1864,6 +1864,8 @@ const char *drm_get_dp_subconnector_name(int val);
 const char *drm_get_content_protection_name(int val);
 const char *drm_get_hdcp_content_type_name(int val);
 
+int drm_get_tv_mode_from_name(const char *name, size_t len);
+
 int drm_mode_create_dvi_i_properties(struct drm_device *dev);
 void drm_connector_attach_dp_subconnector_property(struct drm_connector 
*connector);
 

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 10/23] drm/modes: Fill drm_cmdline mode from named modes

[maxime]

The current code to deal with named modes will only set the mode name, and
then it's up to drivers to try to match that name to whatever mode or
configuration they see fit.

The plan is to remove that need and move the named mode handling out of
drivers and into the core, and only rely on modes and properties. Let's
start by properly filling drm_cmdline_mode from a named mode.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_modes.c | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 7594b657f86a..acee23e1a8b7 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2226,11 +2226,22 @@ static int drm_mode_parse_cmdline_options(const char 
*str,
 
 struct drm_named_mode {
const char *name;
+   unsigned int xres;
+   unsigned int yres;
+   unsigned int flags;
 };
 
+#define NAMED_MODE(_name, _x, _y, _flags)  \
+   {   \
+   .name = _name,  \
+   .xres = _x, \
+   .yres = _y, \
+   .flags = _flags,\
+   }
+
 static const struct drm_named_mode drm_named_modes[] = {
-   { "NTSC", },
-   { "PAL", },
+   NAMED_MODE("NTSC", 720, 480, DRM_MODE_FLAG_INTERLACE),
+   NAMED_MODE("PAL", 720, 576, DRM_MODE_FLAG_INTERLACE),
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
@@ -2271,6 +2282,9 @@ static int drm_mode_parse_cmdline_named_mode(const char 
*name,
continue;
 
strcpy(cmdline_mode->name, mode->name);
+   cmdline_mode->xres = mode->xres;
+   cmdline_mode->yres = mode->yres;
+   cmdline_mode->interlace = !!(mode->flags & 
DRM_MODE_FLAG_INTERLACE);
cmdline_mode->specified = true;
 
return 1;

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 13/23] drm/modes: Introduce the tv_mode property as a command-line option

[maxime]

Our new tv mode option allows to specify the TV mode from a property.
However, it can still be useful, for example to avoid any boot time
artifact, to set that property directly from the kernel command line.

Let's add some code to allow it, and some unit tests to exercise that code.

Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Add a tv_mode_specified field

Changes in v4:
- Add Documentation of the command-line option to modedb.rst
---
 Documentation/fb/modedb.rst |  2 +
 drivers/gpu/drm/drm_modes.c | 37 --
 drivers/gpu/drm/tests/drm_cmdline_parser_test.c | 67 +
 include/drm/drm_connector.h | 12 +
 4 files changed, 115 insertions(+), 3 deletions(-)

diff --git a/Documentation/fb/modedb.rst b/Documentation/fb/modedb.rst
index 4d2411e32ebb..5d6361a77f3c 100644
--- a/Documentation/fb/modedb.rst
+++ b/Documentation/fb/modedb.rst
@@ -65,6 +65,8 @@ Valid options are::
   - reflect_y (boolean): Perform an axial symmetry on the Y axis
   - rotate (integer): Rotate the initial framebuffer by x
 degrees. Valid values are 0, 90, 180 and 270.
+  - tv_mode: Analog TV mode. One of "NTSC", "NTSC-443", "NTSC-J", "PAL",
+"PAL-M", "PAL-N", or "SECAM".
   - panel_orientation, one of "normal", "upside_down", "left_side_up", or
 "right_side_up". For KMS drivers only, this sets the "panel orientation"
 property on the kms connector as hint for kms users.
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index c826f9583a1d..dc037f7ceb37 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2133,6 +2133,30 @@ static int drm_mode_parse_panel_orientation(const char 
*delim,
return 0;
 }
 
+static int drm_mode_parse_tv_mode(const char *delim,
+ struct drm_cmdline_mode *mode)
+{
+   const char *value;
+   int ret;
+
+   if (*delim != '=')
+   return -EINVAL;
+
+   value = delim + 1;
+   delim = strchr(value, ',');
+   if (!delim)
+   delim = value + strlen(value);
+
+   ret = drm_get_tv_mode_from_name(value, delim - value);
+   if (ret < 0)
+   return ret;
+
+   mode->tv_mode_specified = true;
+   mode->tv_mode = ret;
+
+   return 0;
+}
+
 static int drm_mode_parse_cmdline_options(const char *str,
  bool freestanding,
  const struct drm_connector *connector,
@@ -2202,6 +2226,9 @@ static int drm_mode_parse_cmdline_options(const char *str,
} else if (!strncmp(option, "panel_orientation", delim - 
option)) {
if (drm_mode_parse_panel_orientation(delim, mode))
return -EINVAL;
+   } else if (!strncmp(option, "tv_mode", delim - option)) {
+   if (drm_mode_parse_tv_mode(delim, mode))
+   return -EINVAL;
} else {
return -EINVAL;
}
@@ -2230,20 +2257,22 @@ struct drm_named_mode {
unsigned int xres;
unsigned int yres;
unsigned int flags;
+   unsigned int tv_mode;
 };
 
-#define NAMED_MODE(_name, _pclk, _x, _y, _flags)   \
+#define NAMED_MODE(_name, _pclk, _x, _y, _flags, _mode)\
{   \
.name = _name,  \
.pixel_clock_khz = _pclk,   \
.xres = _x, \
.yres = _y, \
.flags = _flags,\
+   .tv_mode = _mode,   \
}
 
 static const struct drm_named_mode drm_named_modes[] = {
-   NAMED_MODE("NTSC", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE),
-   NAMED_MODE("PAL", 13500, 720, 576, DRM_MODE_FLAG_INTERLACE),
+   NAMED_MODE("NTSC", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_NTSC),
+   NAMED_MODE("PAL", 13500, 720, 576, DRM_MODE_FLAG_INTERLACE, 
DRM_MODE_TV_MODE_PAL),
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
@@ -2288,6 +2317,8 @@ static int drm_mode_parse_cmdline_named_mode(const char 
*name,
cmdline_mode->xres = mode->xres;
cmdline_mode->yres = mode->yres;
cmdline_mode->interlace = !!(mode->flags & 
DRM_MODE_FLAG_INTERLACE);
+   cmdline_mode->tv_mode = mode->tv_mode;
+   cmdline_mode->tv_mode_specified = true;
cmdline_mode->specified = true;
 
return 1;
diff --git a/drivers/gpu/drm/tests/drm_cmdline_parser_test.c 
b/drivers/gpu/drm/tests/drm_cmdline_parser_test.c
index 34790e7a3760..3e711b83b823 100644
--- a/drivers/gpu/drm/tests/drm_cmdline_parser_test.c
+++ b/drivers/gpu/drm/tests/drm_cmdline_parser_test.c
@@ -927,6 +927,14 @@ 

[Intel-gfx] [PATCH v6 09/23] drm/modes: Switch to named mode descriptors

[maxime]

The current named mode parsing relies only the mode name, and doesn't allow
to specify any other parameter.

Let's convert that string list to an array of a custom structure that will
hold the name and some additional parameters in the future.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_modes.c | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 37542612912b..7594b657f86a 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2224,9 +2224,13 @@ static int drm_mode_parse_cmdline_options(const char 
*str,
return 0;
 }
 
-static const char * const drm_named_modes_whitelist[] = {
-   "NTSC",
-   "PAL",
+struct drm_named_mode {
+   const char *name;
+};
+
+static const struct drm_named_mode drm_named_modes[] = {
+   { "NTSC", },
+   { "PAL", },
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
@@ -2258,14 +2262,15 @@ static int drm_mode_parse_cmdline_named_mode(const char 
*name,
 * We're sure we're a named mode at this point, iterate over the
 * list of modes we're aware of.
 */
-   for (i = 0; i < ARRAY_SIZE(drm_named_modes_whitelist); i++) {
+   for (i = 0; i < ARRAY_SIZE(drm_named_modes); i++) {
+   const struct drm_named_mode *mode = _named_modes[i];
int ret;
 
-   ret = str_has_prefix(name, drm_named_modes_whitelist[i]);
+   ret = str_has_prefix(name, mode->name);
if (ret != name_end)
continue;
 
-   strcpy(cmdline_mode->name, drm_named_modes_whitelist[i]);
+   strcpy(cmdline_mode->name, mode->name);
cmdline_mode->specified = true;
 
return 1;

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 11/23] drm/connector: Add pixel clock to cmdline mode

[maxime]

We'll need to get the pixel clock to generate proper display modes for
all the current named modes. Let's add it to struct drm_cmdline_mode and
fill it when parsing the named mode.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_modes.c | 9 ++---
 include/drm/drm_connector.h | 7 +++
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index acee23e1a8b7..c826f9583a1d 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2226,22 +2226,24 @@ static int drm_mode_parse_cmdline_options(const char 
*str,
 
 struct drm_named_mode {
const char *name;
+   unsigned int pixel_clock_khz;
unsigned int xres;
unsigned int yres;
unsigned int flags;
 };
 
-#define NAMED_MODE(_name, _x, _y, _flags)  \
+#define NAMED_MODE(_name, _pclk, _x, _y, _flags)   \
{   \
.name = _name,  \
+   .pixel_clock_khz = _pclk,   \
.xres = _x, \
.yres = _y, \
.flags = _flags,\
}
 
 static const struct drm_named_mode drm_named_modes[] = {
-   NAMED_MODE("NTSC", 720, 480, DRM_MODE_FLAG_INTERLACE),
-   NAMED_MODE("PAL", 720, 576, DRM_MODE_FLAG_INTERLACE),
+   NAMED_MODE("NTSC", 13500, 720, 480, DRM_MODE_FLAG_INTERLACE),
+   NAMED_MODE("PAL", 13500, 720, 576, DRM_MODE_FLAG_INTERLACE),
 };
 
 static int drm_mode_parse_cmdline_named_mode(const char *name,
@@ -2282,6 +2284,7 @@ static int drm_mode_parse_cmdline_named_mode(const char 
*name,
continue;
 
strcpy(cmdline_mode->name, mode->name);
+   cmdline_mode->pixel_clock = mode->pixel_clock_khz;
cmdline_mode->xres = mode->xres;
cmdline_mode->yres = mode->yres;
cmdline_mode->interlace = !!(mode->flags & 
DRM_MODE_FLAG_INTERLACE);
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 96b2e4e12334..5c5e67de2296 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1273,6 +1273,13 @@ struct drm_cmdline_mode {
 */
bool bpp_specified;
 
+   /**
+* @pixel_clock:
+*
+* Pixel Clock in kHz. Optional.
+*/
+   unsigned int pixel_clock;
+
/**
 * @xres:
 *

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 08/23] drm/modes: Move named modes parsing to a separate function

[maxime]

The current construction of the named mode parsing doesn't allow to extend
it easily. Let's move it to a separate function so we can add more
parameters and modes.

In order for the tests to still pass, some extra checks are needed, so
it's not a 1:1 move.

Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Simplify the test for connection status extras
- Simplify the code path to call drm_mode_parse_cmdline_named_mode

Changes in v4:
- Fold down all the named mode patches that were split into a single
  patch again to maintain bisectability
---
 drivers/gpu/drm/drm_modes.c | 70 +
 1 file changed, 58 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 71c050c3ee6b..37542612912b 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -2229,6 +2229,51 @@ static const char * const drm_named_modes_whitelist[] = {
"PAL",
 };
 
+static int drm_mode_parse_cmdline_named_mode(const char *name,
+unsigned int name_end,
+struct drm_cmdline_mode 
*cmdline_mode)
+{
+   unsigned int i;
+
+   if (!name_end)
+   return 0;
+
+   /* If the name starts with a digit, it's not a named mode */
+   if (isdigit(name[0]))
+   return 0;
+
+   /*
+* If there's an equal sign in the name, the command-line
+* contains only an option and no mode.
+*/
+   if (strnchr(name, name_end, '='))
+   return 0;
+
+   /* The connection status extras can be set without a mode. */
+   if (name_end == 1 &&
+   (name[0] == 'd' || name[0] == 'D' || name[0] == 'e'))
+   return 0;
+
+   /*
+* We're sure we're a named mode at this point, iterate over the
+* list of modes we're aware of.
+*/
+   for (i = 0; i < ARRAY_SIZE(drm_named_modes_whitelist); i++) {
+   int ret;
+
+   ret = str_has_prefix(name, drm_named_modes_whitelist[i]);
+   if (ret != name_end)
+   continue;
+
+   strcpy(cmdline_mode->name, drm_named_modes_whitelist[i]);
+   cmdline_mode->specified = true;
+
+   return 1;
+   }
+
+   return -EINVAL;
+}
+
 /**
  * drm_mode_parse_command_line_for_connector - parse command line modeline for 
connector
  * @mode_option: optional per connector mode option
@@ -2265,7 +2310,7 @@ bool drm_mode_parse_command_line_for_connector(const char 
*mode_option,
const char *bpp_ptr = NULL, *refresh_ptr = NULL, *extra_ptr = NULL;
const char *options_ptr = NULL;
char *bpp_end_ptr = NULL, *refresh_end_ptr = NULL;
-   int i, len, ret;
+   int len, ret;
 
memset(mode, 0, sizeof(*mode));
mode->panel_orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
@@ -2306,18 +2351,19 @@ bool drm_mode_parse_command_line_for_connector(const 
char *mode_option,
parse_extras = true;
}
 
-   /* First check for a named mode */
-   for (i = 0; i < ARRAY_SIZE(drm_named_modes_whitelist); i++) {
-   ret = str_has_prefix(name, drm_named_modes_whitelist[i]);
-   if (ret == mode_end) {
-   if (refresh_ptr)
-   return false; /* named + refresh is invalid */
+   if (!mode_end)
+   return false;
 
-   strcpy(mode->name, drm_named_modes_whitelist[i]);
-   mode->specified = true;
-   break;
-   }
-   }
+   ret = drm_mode_parse_cmdline_named_mode(name, mode_end, mode);
+   if (ret < 0)
+   return false;
+
+   /*
+* Having a mode that starts by a letter (and thus is named) and
+* an at-sign (used to specify a refresh rate) is disallowed.
+*/
+   if (ret && refresh_ptr)
+   return false;
 
/* No named mode? Check for a normal mode argument, e.g. 1024x768 */
if (!mode->specified && isdigit(name[0])) {

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 06/23] drm/modes: Add a function to generate analog display modes

[maxime]

Multiple drivers (meson, vc4, sun4i) define analog TV 525-lines and
625-lines modes in their drivers.

Since those modes are fairly standard, and that we'll need to use them
in more places in the future, it makes sense to move their definition
into the core framework.

However, analog display usually have fairly loose timings requirements,
the only discrete parameters being the total number of lines and pixel
clock frequency. Thus, we created a function that will create a display
mode from the standard, the pixel frequency and the active area.

Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Fix typo

Changes in v4:
- Reworded the line length check comment
- Switch to HZ_PER_KHZ in tests
- Use previous timing to fill our mode
- Move the number of lines check earlier
---
 drivers/gpu/drm/drm_modes.c| 474 +
 drivers/gpu/drm/tests/Makefile |   1 +
 drivers/gpu/drm/tests/drm_modes_test.c | 144 ++
 include/drm/drm_modes.h|  17 ++
 4 files changed, 636 insertions(+)

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 5d4ac79381c4..71c050c3ee6b 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -116,6 +116,480 @@ void drm_mode_probed_add(struct drm_connector *connector,
 }
 EXPORT_SYMBOL(drm_mode_probed_add);
 
+enum drm_mode_analog {
+   DRM_MODE_ANALOG_NTSC, /* 525 lines, 60Hz */
+   DRM_MODE_ANALOG_PAL, /* 625 lines, 50Hz */
+};
+
+/*
+ * The timings come from:
+ * - 
https://web.archive.org/web/20220406232708/http://www.kolumbus.fi/pami1/video/pal_ntsc.html
+ * - 
https://web.archive.org/web/20220406124914/http://martin.hinner.info/vga/pal.html
+ * - 
https://web.archive.org/web/20220609202433/http://www.batsocks.co.uk/readme/video_timing.htm
+ */
+#define NTSC_LINE_DURATION_NS  63556U
+#define NTSC_LINES_NUMBER  525
+
+#define NTSC_HBLK_DURATION_TYP_NS  10900U
+#define NTSC_HBLK_DURATION_MIN_NS  (NTSC_HBLK_DURATION_TYP_NS - 200)
+#define NTSC_HBLK_DURATION_MAX_NS  (NTSC_HBLK_DURATION_TYP_NS + 200)
+
+#define NTSC_HACT_DURATION_TYP_NS  (NTSC_LINE_DURATION_NS - 
NTSC_HBLK_DURATION_TYP_NS)
+#define NTSC_HACT_DURATION_MIN_NS  (NTSC_LINE_DURATION_NS - 
NTSC_HBLK_DURATION_MAX_NS)
+#define NTSC_HACT_DURATION_MAX_NS  (NTSC_LINE_DURATION_NS - 
NTSC_HBLK_DURATION_MIN_NS)
+
+#define NTSC_HFP_DURATION_TYP_NS   1500
+#define NTSC_HFP_DURATION_MIN_NS   1270
+#define NTSC_HFP_DURATION_MAX_NS   2220
+
+#define NTSC_HSLEN_DURATION_TYP_NS 4700
+#define NTSC_HSLEN_DURATION_MIN_NS (NTSC_HSLEN_DURATION_TYP_NS - 100)
+#define NTSC_HSLEN_DURATION_MAX_NS (NTSC_HSLEN_DURATION_TYP_NS + 100)
+
+#define NTSC_HBP_DURATION_TYP_NS   4700
+
+/*
+ * I couldn't find the actual tolerance for the back porch, so let's
+ * just reuse the sync length ones.
+ */
+#define NTSC_HBP_DURATION_MIN_NS   (NTSC_HBP_DURATION_TYP_NS - 100)
+#define NTSC_HBP_DURATION_MAX_NS   (NTSC_HBP_DURATION_TYP_NS + 100)
+
+#define PAL_LINE_DURATION_NS   64000U
+#define PAL_LINES_NUMBER   625
+
+#define PAL_HACT_DURATION_TYP_NS   51950U
+#define PAL_HACT_DURATION_MIN_NS   (PAL_HACT_DURATION_TYP_NS - 100)
+#define PAL_HACT_DURATION_MAX_NS   (PAL_HACT_DURATION_TYP_NS + 400)
+
+#define PAL_HBLK_DURATION_TYP_NS   (PAL_LINE_DURATION_NS - 
PAL_HACT_DURATION_TYP_NS)
+#define PAL_HBLK_DURATION_MIN_NS   (PAL_LINE_DURATION_NS - 
PAL_HACT_DURATION_MAX_NS)
+#define PAL_HBLK_DURATION_MAX_NS   (PAL_LINE_DURATION_NS - 
PAL_HACT_DURATION_MIN_NS)
+
+#define PAL_HFP_DURATION_TYP_NS1650
+#define PAL_HFP_DURATION_MIN_NS(PAL_HFP_DURATION_TYP_NS - 100)
+#define PAL_HFP_DURATION_MAX_NS(PAL_HFP_DURATION_TYP_NS + 400)
+
+#define PAL_HSLEN_DURATION_TYP_NS  4700
+#define PAL_HSLEN_DURATION_MIN_NS  (PAL_HSLEN_DURATION_TYP_NS - 200)
+#define PAL_HSLEN_DURATION_MAX_NS  (PAL_HSLEN_DURATION_TYP_NS + 200)
+
+#define PAL_HBP_DURATION_TYP_NS5700
+#define PAL_HBP_DURATION_MIN_NS(PAL_HBP_DURATION_TYP_NS - 200)
+#define PAL_HBP_DURATION_MAX_NS(PAL_HBP_DURATION_TYP_NS + 200)
+
+struct analog_param_field {
+   unsigned int even, odd;
+};
+
+#define PARAM_FIELD(_odd, _even)   \
+   { .even = _even, .odd = _odd }
+
+struct analog_param_range {
+   unsigned intmin, typ, max;
+};
+
+#define PARAM_RANGE(_min, _typ, _max)  \
+   { .min = _min, .typ = _typ, .max = _max }
+
+struct analog_parameters {
+   unsigned intnum_lines;
+   unsigned intline_duration_ns;
+
+   struct analog_param_range   hact_ns;
+   struct analog_param_range   hfp_ns;
+   struct analog_param_range   hslen_ns;
+   struct analog_param_range   hbp_ns;
+   struct analog_param_range   hblk_ns;
+
+   unsigned intbt601_hfp;
+
+   

[Intel-gfx] [PATCH v6 05/23] drm/connector: Add TV standard property

[maxime]

The TV mode property has been around for a while now to select and get the
current TV mode output on an analog TV connector.

Despite that property name being generic, its content isn't and has been
driver-specific which makes it hard to build any generic behaviour on top
of it, both in kernel and user-space.

Let's create a new enum tv norm property, that can contain any of the
analog TV standards currently supported by kernel drivers. Each driver can
then pass in a bitmask of the modes it supports, and the property
creation function will filter out the modes not supported.

We'll then be able to phase out the older tv mode property.

Signed-off-by: Maxime Ripard 

---
Changes in v5:
- Create an analog TV properties documentation section, and document TV
  Mode there instead of the csv file

Changes in v4:
- Add property documentation to kms-properties.csv
- Fix documentation
---
 Documentation/gpu/drm-kms.rst |   6 ++
 drivers/gpu/drm/drm_atomic_uapi.c |   4 ++
 drivers/gpu/drm/drm_connector.c   | 122 +-
 include/drm/drm_connector.h   |  64 
 include/drm/drm_mode_config.h |   8 +++
 5 files changed, 203 insertions(+), 1 deletion(-)

diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
index b4377a545425..321f2f582c64 100644
--- a/Documentation/gpu/drm-kms.rst
+++ b/Documentation/gpu/drm-kms.rst
@@ -520,6 +520,12 @@ HDMI Specific Connector Properties
 .. kernel-doc:: drivers/gpu/drm/drm_connector.c
:doc: HDMI connector properties
 
+Analog TV Specific Connector Properties
+--
+
+.. kernel-doc:: drivers/gpu/drm/drm_connector.c
+   :doc: Analog TV Connector Properties
+
 Standard CRTC Properties
 
 
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index 7f2b9a07fbdf..d867e7f9f2cd 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -700,6 +700,8 @@ static int drm_atomic_connector_set_property(struct 
drm_connector *connector,
state->tv.margins.bottom = val;
} else if (property == config->legacy_tv_mode_property) {
state->tv.legacy_mode = val;
+   } else if (property == config->tv_mode_property) {
+   state->tv.mode = val;
} else if (property == config->tv_brightness_property) {
state->tv.brightness = val;
} else if (property == config->tv_contrast_property) {
@@ -810,6 +812,8 @@ drm_atomic_connector_get_property(struct drm_connector 
*connector,
*val = state->tv.margins.bottom;
} else if (property == config->legacy_tv_mode_property) {
*val = state->tv.legacy_mode;
+   } else if (property == config->tv_mode_property) {
+   *val = state->tv.mode;
} else if (property == config->tv_brightness_property) {
*val = state->tv.brightness;
} else if (property == config->tv_contrast_property) {
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 4e4fbc9e0049..820f4c730b38 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -980,6 +980,17 @@ static const struct drm_prop_enum_list 
drm_dvi_i_subconnector_enum_list[] = {
 DRM_ENUM_NAME_FN(drm_get_dvi_i_subconnector_name,
 drm_dvi_i_subconnector_enum_list)
 
+static const struct drm_prop_enum_list drm_tv_mode_enum_list[] = {
+   { DRM_MODE_TV_MODE_NTSC, "NTSC" },
+   { DRM_MODE_TV_MODE_NTSC_443, "NTSC-443" },
+   { DRM_MODE_TV_MODE_NTSC_J, "NTSC-J" },
+   { DRM_MODE_TV_MODE_PAL, "PAL" },
+   { DRM_MODE_TV_MODE_PAL_M, "PAL-M" },
+   { DRM_MODE_TV_MODE_PAL_N, "PAL-N" },
+   { DRM_MODE_TV_MODE_SECAM, "SECAM" },
+};
+DRM_ENUM_NAME_FN(drm_get_tv_mode_name, drm_tv_mode_enum_list)
+
 static const struct drm_prop_enum_list drm_tv_select_enum_list[] = {
{ DRM_MODE_SUBCONNECTOR_Automatic, "Automatic" }, /* DVI-I and TV-out */
{ DRM_MODE_SUBCONNECTOR_Composite, "Composite" }, /* TV-out */
@@ -1548,6 +1559,71 @@ 
EXPORT_SYMBOL(drm_connector_attach_dp_subconnector_property);
  * infoframe values is done through drm_hdmi_avi_infoframe_content_type().
  */
 
+/*
+ * TODO: Document the properties:
+ *   - left margin
+ *   - right margin
+ *   - top margin
+ *   - bottom margin
+ *   - brightness
+ *   - contrast
+ *   - flicker reduction
+ *   - hue
+ *   - mode
+ *   - overscan
+ *   - saturation
+ *   - select subconnector
+ *   - subconnector
+ */
+/**
+ * DOC: Analog TV Connector Properties
+ *
+ * TV Mode:
+ * Indicates the TV Mode used on an analog TV connector. The value
+ * of this property can be one of the following:
+ *
+ * NTSC:
+ * TV Mode is CCIR System M (aka 525-lines) together with
+ * the NTSC Color Encoding.
+ *
+ * NTSC-443:
+ *
+ * TV Mode is CCIR System M (aka 525-lines) together with
+ *

[Intel-gfx] [PATCH v6 03/23] drm/connector: Only register TV mode property if present

[maxime]

The drm_create_tv_properties() will create the TV mode property
unconditionally.

However, since we'll gradually phase it out, let's register it only if we
have a list passed as an argument. This will make the transition easier.

Acked-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_connector.c | 19 +++
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index ede6025638d7..17a5913cefe3 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1686,15 +1686,18 @@ int drm_mode_create_tv_properties(struct drm_device 
*dev,
if (drm_mode_create_tv_margin_properties(dev))
goto nomem;
 
-   dev->mode_config.legacy_tv_mode_property =
-   drm_property_create(dev, DRM_MODE_PROP_ENUM,
-   "mode", num_modes);
-   if (!dev->mode_config.legacy_tv_mode_property)
-   goto nomem;
 
-   for (i = 0; i < num_modes; i++)
-   drm_property_add_enum(dev->mode_config.legacy_tv_mode_property,
- i, modes[i]);
+   if (num_modes) {
+   dev->mode_config.legacy_tv_mode_property =
+   drm_property_create(dev, DRM_MODE_PROP_ENUM,
+   "mode", num_modes);
+   if (!dev->mode_config.legacy_tv_mode_property)
+   goto nomem;
+
+   for (i = 0; i < num_modes; i++)
+   
drm_property_add_enum(dev->mode_config.legacy_tv_mode_property,
+ i, modes[i]);
+   }
 
dev->mode_config.tv_brightness_property =
drm_property_create_range(dev, 0, "brightness", 0, 100);

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 00/23] drm: Analog TV Improvements

[maxime]

Hi,

Here's a series aiming at improving the command line named modes support,
and more importantly how we deal with all the analog TV variants.

The named modes support were initially introduced to allow to specify the
analog TV mode to be used.

However, this was causing multiple issues:

  * The mode name parsed on the command line was passed directly to the
driver, which had to figure out which mode it was suppose to match;

  * Figuring that out wasn't really easy, since the video= argument or what
the userspace might not even have a name in the first place, but
instead could have passed a mode with the same timings;

  * The fallback to matching on the timings was mostly working as long as
we were supporting one 525 lines (most likely NSTC) and one 625 lines
(PAL), but couldn't differentiate between two modes with the same
timings (NTSC vs PAL-M vs NSTC-J for example);

  * There was also some overlap with the tv mode property registered by
drm_mode_create_tv_properties(), but named modes weren't interacting
with that property at all.

  * Even though that property was generic, its possible values were
specific to each drivers, which made some generic support difficult.

Thus, I chose to tackle in multiple steps:

  * A new TV mode property was introduced, with generic values, each driver
reporting through a bitmask what standard it supports to the userspace;

  * This option was added to the command line parsing code to be able to
specify it on the kernel command line, and new atomic_check and reset
helpers were created to integrate properly into atomic KMS;

  * The named mode parsing code is now creating a proper display mode for
the given named mode, and the TV standard will thus be part of the
connector state;

  * Two drivers were converted and tested for now (vc4 and sun4i), with
some backward compatibility code to translate the old TV mode to the
new TV mode;

Unit tests were created along the way.

One can switch from NTSC to PAL now using (on vc4)

modetest -M vc4  -s 53:720x480i -w 53:'TV mode':1 # NTSC
modetest -M vc4  -s 53:720x576i -w 53:'TV mode':4 # PAL

Let me know what you think,
Maxime

To: David Airlie 
To: Daniel Vetter 
To: Maarten Lankhorst 
To: Maxime Ripard 
To: Thomas Zimmermann 
To: Emma Anholt 
To: Jani Nikula 
To: Joonas Lahtinen 
To: Rodrigo Vivi 
To: Tvrtko Ursulin 
To: Ben Skeggs 
To: Karol Herbst 
To: Lyude Paul 
To: Chen-Yu Tsai 
To: Jernej Skrabec 
To: Samuel Holland 
Cc: Geert Uytterhoeven 
Cc: Mateusz Kwiatkowski 
Cc: "Noralf Trønnes" 
Cc: Dave Stevenson 
Cc: Dom Cobley 
Cc: Phil Elwell 
Cc: 
Cc: linux-ker...@vger.kernel.org
Cc: intel-gfx@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-su...@lists.linux.dev
Cc: Hans de Goede 
Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Add and convert to a new get_modes helper to create the PAL and NTSC modes in
  the proper order, with the right preferred mode flag, depending on the driver
  capabilities and defaults.
- Support PAL60
- Renamed tests to be consistent with DRM tests naming convention
- Simplified a bit the named mode parsing code
- Add a tv_mode_specified field
- Return 0 in get_modes implementations instead of error codes
- Link to v5: 
https://lore.kernel.org/r/20220728-rpi-analog-tv-properties-v5-0-d841cc64f...@cerno.tech

Changes in v5:
- Dropped TV Standard documentation removal
- Switched the TV Mode documentation from CSV to actual documentation
- Switched to kunit assertions where possible
- Switched to KUNIT_ASSERT_NOT_NULL instead of KUNIT_ASSERT_PTR_NE(..., NULL)
- Shuffled a bit the introduction of drm_client_modeset_connector_get_modes 
between patches
- Renamed tv_mode_names to legacy_tv_mode_names
- Removed the count variable in sun4i_tv_comp_get_modes
- Rebased on top of current drm-misc-next
- Link to v4: 
https://lore.kernel.org/r/20220728-rpi-analog-tv-properties-v4-0-60d38873f...@cerno.tech

Changes in v4:
- Removed the unused TV Standard property documentation
- Added the TV Mode property documentation to kms-properties.csv
- Fixed the documentation of drm_mode_create_tv_properties()
- Removed DRM_MODE_TV_MODE_NONE
- Reworded the line length check comment in drm_mode_analog_tv tests
- Switched to HZ_PER_KHZ in drm_mode_analog_tv tests
- Reworked drm_mode_analog_tv to fill our mode using the previously computed
  timings
- Added the command-line option documentation to modedb.rst
- Improved the Kunit helpers cleanup
- Moved the subconnector documentation renaming to the proper patch
- Added the various review tags
- Removed the count variable in vc4_vec_connector_get_modes
- Rebased on drm-misc-next-2022-09-23 and fixed a merge conflict
- Folded all the named mode parsing improvements in a single patch
- Link to v3: 
https://lore.kernel.org/r/20220728-rpi-analog-tv-properties-v2-0-f733a0ed9...@cerno.tech

Changes in v3:
- Applied some of the fixes to vc4 and sun4i
- 

[Intel-gfx] [PATCH v6 07/23] drm/client: Add some tests for drm_connector_pick_cmdline_mode()

[maxime]

drm_connector_pick_cmdline_mode() is in charge of finding a proper
drm_display_mode from the definition we got in the video= command line
argument.

Let's add some unit tests to make sure we're not getting any regressions
there.

Acked-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 

---
Changes in v6:
- Rename tests to be consistent with DRM tests naming convention

Changes in v5:
- Removed useless (for now) count and modes intermediate variables in
  get_modes
- Switched to kunit assertions in test init, and to KUNIT_ASSERT_NOT_NULL
  instead of KUNIT_ASSERT_PTR_NE(..., NULL)

Changes in v4:
- Removed MODULE macros
---
 drivers/gpu/drm/drm_client_modeset.c|   4 +
 drivers/gpu/drm/tests/drm_client_modeset_test.c | 100 
 2 files changed, 104 insertions(+)

diff --git a/drivers/gpu/drm/drm_client_modeset.c 
b/drivers/gpu/drm/drm_client_modeset.c
index bbc535cc50dd..d553e793e673 100644
--- a/drivers/gpu/drm/drm_client_modeset.c
+++ b/drivers/gpu/drm/drm_client_modeset.c
@@ -1237,3 +1237,7 @@ int drm_client_modeset_dpms(struct drm_client_dev 
*client, int mode)
return ret;
 }
 EXPORT_SYMBOL(drm_client_modeset_dpms);
+
+#ifdef CONFIG_DRM_KUNIT_TEST
+#include "tests/drm_client_modeset_test.c"
+#endif
diff --git a/drivers/gpu/drm/tests/drm_client_modeset_test.c 
b/drivers/gpu/drm/tests/drm_client_modeset_test.c
new file mode 100644
index ..3aa1acfe75df
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_client_modeset_test.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 Maxime Ripard 
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "drm_kunit_helpers.h"
+
+struct drm_client_modeset_test_priv {
+   struct drm_device *drm;
+   struct drm_connector connector;
+};
+
+static int drm_client_modeset_connector_get_modes(struct drm_connector 
*connector)
+{
+   return drm_add_modes_noedid(connector, 1920, 1200);
+}
+
+static const struct drm_connector_helper_funcs 
drm_client_modeset_connector_helper_funcs = {
+   .get_modes = drm_client_modeset_connector_get_modes,
+};
+
+static const struct drm_connector_funcs drm_client_modeset_connector_funcs = {
+};
+
+static int drm_client_modeset_test_init(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv;
+   int ret;
+
+   priv = kunit_kzalloc(test, sizeof(*priv), GFP_KERNEL);
+   KUNIT_ASSERT_NOT_NULL(test, priv);
+
+   test->priv = priv;
+
+   priv->drm = drm_kunit_device_init(test, "drm-client-modeset-test");
+   KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv->drm);
+
+   ret = drmm_connector_init(priv->drm, >connector,
+ _client_modeset_connector_funcs,
+ DRM_MODE_CONNECTOR_Unknown,
+ NULL);
+   KUNIT_ASSERT_EQ(test, ret, 0);
+
+   drm_connector_helper_add(>connector, 
_client_modeset_connector_helper_funcs);
+
+   return 0;
+
+}
+
+static void drm_test_pick_cmdline_res_1920_1080_60(struct kunit *test)
+{
+   struct drm_client_modeset_test_priv *priv = test->priv;
+   struct drm_device *drm = priv->drm;
+   struct drm_connector *connector = >connector;
+   struct drm_cmdline_mode *cmdline_mode = >cmdline_mode;
+   struct drm_display_mode *expected_mode, *mode;
+   const char *cmdline = "1920x1080@60";
+   int ret;
+
+   expected_mode = drm_mode_find_dmt(priv->drm, 1920, 1080, 60, false);
+   KUNIT_ASSERT_NOT_NULL(test, expected_mode);
+
+   KUNIT_ASSERT_TRUE(test,
+ drm_mode_parse_command_line_for_connector(cmdline,
+   connector,
+   
cmdline_mode));
+
+   mutex_lock(>mode_config.mutex);
+   ret = drm_helper_probe_single_connector_modes(connector, 1920, 1080);
+   mutex_unlock(>mode_config.mutex);
+   KUNIT_ASSERT_GT(test, ret, 0);
+
+   mode = drm_connector_pick_cmdline_mode(connector);
+   KUNIT_ASSERT_NOT_NULL(test, mode);
+
+   KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected_mode, mode));
+}
+
+
+static struct kunit_case drm_test_pick_cmdline_tests[] = {
+   KUNIT_CASE(drm_test_pick_cmdline_res_1920_1080_60),
+   {}
+};
+
+static struct kunit_suite drm_test_pick_cmdline_test_suite = {
+   .name = "drm_test_pick_cmdline",
+   .init = drm_client_modeset_test_init,
+   .test_cases = drm_test_pick_cmdline_tests
+};
+
+kunit_test_suite(drm_test_pick_cmdline_test_suite);

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] [PATCH v6 02/23] drm/connector: Rename legacy TV property

[maxime]

The current tv_mode has driver-specific values that don't allow to
easily share code using it, either at the userspace or kernel level.

Since we're going to introduce a new, generic, property that fit the
same purpose, let's rename this one to legacy_tv_mode to make it
obvious we should move away from it.

Acked-by: Thomas Zimmermann 
Reviewed-by: Lyude Paul  # nouveau
Reviewed-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_atomic_uapi.c | 8 
 drivers/gpu/drm/drm_connector.c   | 6 +++---
 drivers/gpu/drm/gud/gud_connector.c   | 6 +++---
 drivers/gpu/drm/i2c/ch7006_drv.c  | 4 ++--
 drivers/gpu/drm/i915/display/intel_tv.c   | 3 ++-
 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c | 4 ++--
 drivers/gpu/drm/vc4/vc4_vec.c | 8 
 include/drm/drm_connector.h   | 4 ++--
 include/drm/drm_mode_config.h | 6 --
 9 files changed, 26 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index c06d0639d552..7f2b9a07fbdf 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -698,8 +698,8 @@ static int drm_atomic_connector_set_property(struct 
drm_connector *connector,
state->tv.margins.top = val;
} else if (property == config->tv_bottom_margin_property) {
state->tv.margins.bottom = val;
-   } else if (property == config->tv_mode_property) {
-   state->tv.mode = val;
+   } else if (property == config->legacy_tv_mode_property) {
+   state->tv.legacy_mode = val;
} else if (property == config->tv_brightness_property) {
state->tv.brightness = val;
} else if (property == config->tv_contrast_property) {
@@ -808,8 +808,8 @@ drm_atomic_connector_get_property(struct drm_connector 
*connector,
*val = state->tv.margins.top;
} else if (property == config->tv_bottom_margin_property) {
*val = state->tv.margins.bottom;
-   } else if (property == config->tv_mode_property) {
-   *val = state->tv.mode;
+   } else if (property == config->legacy_tv_mode_property) {
+   *val = state->tv.legacy_mode;
} else if (property == config->tv_brightness_property) {
*val = state->tv.brightness;
} else if (property == config->tv_contrast_property) {
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index e3142c8142b3..ede6025638d7 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1686,14 +1686,14 @@ int drm_mode_create_tv_properties(struct drm_device 
*dev,
if (drm_mode_create_tv_margin_properties(dev))
goto nomem;
 
-   dev->mode_config.tv_mode_property =
+   dev->mode_config.legacy_tv_mode_property =
drm_property_create(dev, DRM_MODE_PROP_ENUM,
"mode", num_modes);
-   if (!dev->mode_config.tv_mode_property)
+   if (!dev->mode_config.legacy_tv_mode_property)
goto nomem;
 
for (i = 0; i < num_modes; i++)
-   drm_property_add_enum(dev->mode_config.tv_mode_property,
+   drm_property_add_enum(dev->mode_config.legacy_tv_mode_property,
  i, modes[i]);
 
dev->mode_config.tv_brightness_property =
diff --git a/drivers/gpu/drm/gud/gud_connector.c 
b/drivers/gpu/drm/gud/gud_connector.c
index fa636206f232..86e992b2108b 100644
--- a/drivers/gpu/drm/gud/gud_connector.c
+++ b/drivers/gpu/drm/gud/gud_connector.c
@@ -303,7 +303,7 @@ static int gud_connector_atomic_check(struct drm_connector 
*connector,
old_state->tv.margins.right != new_state->tv.margins.right ||
old_state->tv.margins.top != new_state->tv.margins.top ||
old_state->tv.margins.bottom != new_state->tv.margins.bottom ||
-   old_state->tv.mode != new_state->tv.mode ||
+   old_state->tv.legacy_mode != new_state->tv.legacy_mode ||
old_state->tv.brightness != new_state->tv.brightness ||
old_state->tv.contrast != new_state->tv.contrast ||
old_state->tv.flicker_reduction != new_state->tv.flicker_reduction 
||
@@ -424,7 +424,7 @@ gud_connector_property_lookup(struct drm_connector 
*connector, u16 prop)
case GUD_PROPERTY_TV_BOTTOM_MARGIN:
return config->tv_bottom_margin_property;
case GUD_PROPERTY_TV_MODE:
-   return config->tv_mode_property;
+   return config->legacy_tv_mode_property;
case GUD_PROPERTY_TV_BRIGHTNESS:
return config->tv_brightness_property;
case GUD_PROPERTY_TV_CONTRAST:
@@ -454,7 +454,7 @@ static unsigned int *gud_connector_tv_state_val(u16 prop, 
struct drm_tv_connecto
case GUD_PROPERTY_TV_BOTTOM_MARGIN:
return >margins.bottom;
case 

[Intel-gfx] [PATCH v6 04/23] drm/connector: Rename drm_mode_create_tv_properties

[maxime]

drm_mode_create_tv_properties(), among other things, will create the
"mode" property that stores the analog TV mode that connector is
supposed to output.

However, that property is getting deprecated, so let's rename that
function to mention it's deprecated. We'll introduce a new variant of
that function creating the property superseeding it in a later patch.

Reviewed-by: Lyude Paul  # nouveau
Reviewed-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_connector.c   | 12 ++--
 drivers/gpu/drm/gud/gud_connector.c   |  4 ++--
 drivers/gpu/drm/i2c/ch7006_drv.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_tv.c   |  2 +-
 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c |  2 +-
 drivers/gpu/drm/vc4/vc4_vec.c |  5 +++--
 include/drm/drm_connector.h   |  6 +++---
 7 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 17a5913cefe3..4e4fbc9e0049 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -1600,7 +1600,7 @@ EXPORT_SYMBOL(drm_connector_attach_tv_margin_properties);
  * Called by a driver's HDMI connector initialization routine, this function
  * creates the TV margin properties for a given device. No need to call this
  * function for an SDTV connector, it's already called from
- * drm_mode_create_tv_properties().
+ * drm_mode_create_tv_properties_legacy().
  *
  * Returns:
  * 0 on success or a negative error code on failure.
@@ -1635,7 +1635,7 @@ int drm_mode_create_tv_margin_properties(struct 
drm_device *dev)
 EXPORT_SYMBOL(drm_mode_create_tv_margin_properties);
 
 /**
- * drm_mode_create_tv_properties - create TV specific connector properties
+ * drm_mode_create_tv_properties_legacy - create TV specific connector 
properties
  * @dev: DRM device
  * @num_modes: number of different TV formats (modes) supported
  * @modes: array of pointers to strings containing name of each format
@@ -1648,9 +1648,9 @@ EXPORT_SYMBOL(drm_mode_create_tv_margin_properties);
  * Returns:
  * 0 on success or a negative error code on failure.
  */
-int drm_mode_create_tv_properties(struct drm_device *dev,
- unsigned int num_modes,
- const char * const modes[])
+int drm_mode_create_tv_properties_legacy(struct drm_device *dev,
+unsigned int num_modes,
+const char * const modes[])
 {
struct drm_property *tv_selector;
struct drm_property *tv_subconnector;
@@ -1733,7 +1733,7 @@ int drm_mode_create_tv_properties(struct drm_device *dev,
 nomem:
return -ENOMEM;
 }
-EXPORT_SYMBOL(drm_mode_create_tv_properties);
+EXPORT_SYMBOL(drm_mode_create_tv_properties_legacy);
 
 /**
  * drm_mode_create_scaling_mode_property - create scaling mode property
diff --git a/drivers/gpu/drm/gud/gud_connector.c 
b/drivers/gpu/drm/gud/gud_connector.c
index 86e992b2108b..034e78360d4f 100644
--- a/drivers/gpu/drm/gud/gud_connector.c
+++ b/drivers/gpu/drm/gud/gud_connector.c
@@ -400,7 +400,7 @@ static int gud_connector_add_tv_mode(struct gud_device 
*gdrm, struct drm_connect
for (i = 0; i < num_modes; i++)
modes[i] = [i * GUD_CONNECTOR_TV_MODE_NAME_LEN];
 
-   ret = drm_mode_create_tv_properties(connector->dev, num_modes, modes);
+   ret = drm_mode_create_tv_properties_legacy(connector->dev, num_modes, 
modes);
 free:
kfree(buf);
if (ret < 0)
@@ -539,7 +539,7 @@ static int gud_connector_add_properties(struct gud_device 
*gdrm, struct gud_conn
fallthrough;
case GUD_PROPERTY_TV_HUE:
/* This is a no-op if already added. */
-   ret = drm_mode_create_tv_properties(drm, 0, NULL);
+   ret = drm_mode_create_tv_properties_legacy(drm, 0, 
NULL);
if (ret)
goto out;
break;
diff --git a/drivers/gpu/drm/i2c/ch7006_drv.c b/drivers/gpu/drm/i2c/ch7006_drv.c
index ef69f9bdeace..b63bad04b09d 100644
--- a/drivers/gpu/drm/i2c/ch7006_drv.c
+++ b/drivers/gpu/drm/i2c/ch7006_drv.c
@@ -250,7 +250,7 @@ static int ch7006_encoder_create_resources(struct 
drm_encoder *encoder,
struct drm_device *dev = encoder->dev;
struct drm_mode_config *conf = >mode_config;
 
-   drm_mode_create_tv_properties(dev, NUM_TV_NORMS, ch7006_tv_norm_names);
+   drm_mode_create_tv_properties_legacy(dev, NUM_TV_NORMS, 
ch7006_tv_norm_names);
 
priv->scale_property = drm_property_create_range(dev, 0, "scale", 0, 2);
if (!priv->scale_property)
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c 
b/drivers/gpu/drm/i915/display/intel_tv.c
index b2f42bf929e2..748821ebdf65 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1995,7 +1995,7 @@ 

[Intel-gfx] [PATCH v6 01/23] drm/tests: Add Kunit Helpers

[maxime]

As the number of kunit tests in KMS grows further, we start to have
multiple test suites that, for example, need to register a mock DRM
driver to interact with the KMS function they are supposed to test.

Let's add a file meant to provide those kind of helpers to avoid
duplication.

Reviewed-by: Noralf Trønnes 
Signed-off-by: Maxime Ripard 

---
Changes in v4:
- Simplified the DRM device cleanup patch using devm_drm_dev_alloc()
---
 drivers/gpu/drm/tests/Makefile|  1 +
 drivers/gpu/drm/tests/drm_kunit_helpers.c | 61 +++
 drivers/gpu/drm/tests/drm_kunit_helpers.h |  9 +
 3 files changed, 71 insertions(+)

diff --git a/drivers/gpu/drm/tests/Makefile b/drivers/gpu/drm/tests/Makefile
index 2d9f49b62ecb..b29ef1085cad 100644
--- a/drivers/gpu/drm/tests/Makefile
+++ b/drivers/gpu/drm/tests/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_KUNIT_TEST) += \
drm_format_helper_test.o \
drm_format_test.o \
drm_framebuffer_test.o \
+   drm_kunit_helpers.o \
drm_mm_test.o \
drm_plane_helper_test.o \
drm_rect_test.o
diff --git a/drivers/gpu/drm/tests/drm_kunit_helpers.c 
b/drivers/gpu/drm/tests/drm_kunit_helpers.c
new file mode 100644
index ..3524d6a1fa9a
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_kunit_helpers.c
@@ -0,0 +1,61 @@
+#include 
+#include 
+
+#include 
+
+#include 
+
+struct kunit_dev {
+   struct drm_device base;
+};
+
+static const struct drm_mode_config_funcs drm_mode_config_funcs = {
+};
+
+static const struct drm_driver drm_mode_driver = {
+};
+
+static int dev_init(struct kunit_resource *res, void *ptr)
+{
+   char *name = ptr;
+   struct device *dev;
+
+   dev = root_device_register(name);
+   if (IS_ERR(dev))
+   return PTR_ERR(dev);
+
+   res->data = dev;
+   return 0;
+}
+
+static void dev_free(struct kunit_resource *res)
+{
+   struct device *dev = res->data;
+
+   root_device_unregister(dev);
+}
+
+struct drm_device *drm_kunit_device_init(struct kunit *test, char *name)
+{
+   struct kunit_dev *kdev;
+   struct drm_device *drm;
+   struct device *dev;
+   int ret;
+
+   dev = kunit_alloc_resource(test, dev_init, dev_free, GFP_KERNEL, name);
+   if (!dev)
+   return ERR_PTR(-ENOMEM);
+
+   kdev = devm_drm_dev_alloc(dev, _mode_driver, struct kunit_dev, 
base);
+   if (IS_ERR(kdev))
+   return ERR_CAST(kdev);
+
+   drm = >base;
+   drm->mode_config.funcs = _mode_config_funcs;
+
+   ret = drmm_mode_config_init(drm);
+   if (ret)
+   return ERR_PTR(ret);
+
+   return drm;
+}
diff --git a/drivers/gpu/drm/tests/drm_kunit_helpers.h 
b/drivers/gpu/drm/tests/drm_kunit_helpers.h
new file mode 100644
index ..a9354f9bda4e
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_kunit_helpers.h
@@ -0,0 +1,9 @@
+#ifndef DRM_KUNIT_HELPERS_H_
+#define DRM_KUNIT_HELPERS_H_
+
+struct drm_device;
+struct kunit;
+
+struct drm_device *drm_kunit_device_init(struct kunit *test, char *name);
+
+#endif // DRM_KUNIT_HELPERS_H_

-- 
b4 0.11.0-dev-99e3a

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/slpc: Optmize waitboost for SLPC (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915/slpc: Optmize waitboost for SLPC (rev7)
URL   : https://patchwork.freedesktop.org/series/109840/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12294_full -> Patchwork_109840v7_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_109840v7_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_109840v7_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_109840v7_full:

### IGT changes ###

 Possible regressions 

  * igt@i915_suspend@forcewake:
- shard-skl:  [PASS][1] -> [INCOMPLETE][2] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl4/igt@i915_susp...@forcewake.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-skl9/igt@i915_susp...@forcewake.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_pwrite@basic-exhaustion:
- {shard-rkl}:[SKIP][3] ([i915#3282]) -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-rkl-1/igt@gem_pwr...@basic-exhaustion.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-rkl-5/igt@gem_pwr...@basic-exhaustion.html

  
New tests
-

  New tests have been introduced between CI_DRM_12294_full and 
Patchwork_109840v7_full:

### New IGT tests (6) ###

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@bcs0:
- Statuses : 5 pass(s)
- Exec time: [0.12, 0.25] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@rcs0:
- Statuses : 5 pass(s)
- Exec time: [0.12, 0.30] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs0:
- Statuses : 5 pass(s)
- Exec time: [0.12, 0.26] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1:
- Statuses : 1 pass(s)
- Exec time: [0.13] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vecs0:
- Statuses : 5 pass(s)
- Exec time: [0.11, 0.23] s

  

Known issues


  Here are the changes found in Patchwork_109840v7_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][5] -> [FAIL][6] ([i915#6268])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-tglb2/igt@gem_ctx_e...@basic-nohangcheck.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-tglb8/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_exec_balancer@parallel-out-fence:
- shard-iclb: [PASS][7] -> [SKIP][8] ([i915#4525]) +1 similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-iclb2/igt@gem_exec_balan...@parallel-out-fence.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-iclb6/igt@gem_exec_balan...@parallel-out-fence.html

  * igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-tglb1/igt@gem_exec_fair@basic-f...@rcs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html

  * igt@gem_lmem_swapping@smem-oom:
- shard-glk:  NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-glk9/igt@gem_lmem_swapp...@smem-oom.html

  * igt@gem_lmem_swapping@verify-random-ccs:
- shard-skl:  NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-skl9/igt@gem_lmem_swapp...@verify-random-ccs.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-tglb: NOTRUN -> [SKIP][13] ([i915#4270])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-tglb1/igt@gem_...@verify-pxp-key-change-after-suspend-resume.html

  * igt@gen3_render_tiledy_blits:
- shard-tglb: NOTRUN -> [SKIP][14] ([fdo#109289])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109840v7/shard-tglb1/igt@gen3_render_tiledy_blits.html

  * igt@gen9_exec_parse@allowed-single:
- shard-apl:  [PASS][15] -> [DMESG-WARN][16] ([i915#5566] / 
[i915#716])
   [15]: 

[Intel-gfx] ✗ Fi.CI.BAT: failure for Fix Guc-Err-Capture sizing warning

[Patchwork]

== Series Details ==

Series: Fix Guc-Err-Capture sizing warning
URL   : https://patchwork.freedesktop.org/series/110176/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12297 -> Patchwork_110176v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_110176v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_110176v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/index.html

Participating hosts (40 -> 39)
--

  Additional (3): fi-cml-u2 fi-bdw-gvtdvm fi-bxt-dsi 
  Missing(4): fi-ctg-p8600 fi-rkl-11600 fi-icl-u2 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_110176v1:

### IGT changes ###

 Possible regressions 

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-bdw-gvtdvm:  NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-bdw-gvtdvm/igt@i915_susp...@basic-s2idle-without-i915.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@requests:
- {bat-rpls-1}:   [PASS][2] -> [INCOMPLETE][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12297/bat-rpls-1/igt@i915_selftest@l...@requests.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/bat-rpls-1/igt@i915_selftest@l...@requests.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-3:
- {bat-dg2-11}:   NOTRUN -> [FAIL][4] +2 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-d-dp-3.html

  
Known issues


  Here are the changes found in Patchwork_110176v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_fence@basic-busy@bcs0:
- fi-cml-u2:  NOTRUN -> [SKIP][5] ([i915#1208]) +1 similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-cml-u2/igt@gem_exec_fence@basic-b...@bcs0.html

  * igt@gem_huc_copy@huc-copy:
- fi-cml-u2:  NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-cml-u2/igt@gem_huc_c...@huc-copy.html
- fi-bxt-dsi: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-bxt-dsi/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-apl-guc/igt@gem_lmem_swapp...@basic.html
- fi-bdw-gvtdvm:  NOTRUN -> [SKIP][9] ([fdo#109271]) +37 similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-bdw-gvtdvm/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-cml-u2:  NOTRUN -> [SKIP][10] ([i915#4613]) +3 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-cml-u2/igt@gem_lmem_swapp...@parallel-random-engines.html
- fi-bxt-dsi: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-bxt-dsi/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_tiled_blits@basic:
- fi-bxt-dsi: NOTRUN -> [SKIP][12] ([fdo#109271]) +12 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-bxt-dsi/igt@gem_tiled_bl...@basic.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2:  NOTRUN -> [SKIP][13] ([fdo#109284] / [fdo#111827]) +8 
similar issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-crc-fast:
- fi-apl-guc: NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-apl-guc/igt@kms_chamel...@hdmi-crc-fast.html

  * igt@kms_chamelium@hdmi-edid-read:
- fi-bxt-dsi: NOTRUN -> [SKIP][15] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110176v1/fi-bxt-dsi/igt@kms_chamel...@hdmi-edid-read.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-bdw-gvtdvm:  NOTRUN -> [SKIP][16] ([fdo#109271] / [fdo#111827]) +7 
similar issues
   [16]: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix Guc-Err-Capture sizing warning

[Patchwork]

== Series Details ==

Series: Fix Guc-Err-Capture sizing warning
URL   : https://patchwork.freedesktop.org/series/110176/
State : warning

== Summary ==

Error: dim checkpatch failed
7872137a691b drm/i915/guc: Fix GuC error capture sizing estimation and reporting
-:24: WARNING:BAD_FIXES_TAG: Please use correct Fixes: style 'Fixes: <12 chars 
of sha1> ("")' - ie: 'Fixes: d7c15d76a554 ("drm/i915/guc: Check 
sizing of guc_capture output")'
#24: 
Fixes: d7c15d76a5547 ("drm/i915/guc: Check sizing of guc_capture output")

total: 0 errors, 1 warnings, 0 checks, 86 lines checked

[Intel-gfx] ✗ Fi.CI.BAT: failure for freezer, sched: Rewrite core freezer logic fix

[Patchwork]

== Series Details ==

Series: freezer, sched: Rewrite core freezer logic fix
URL   : https://patchwork.freedesktop.org/series/110173/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12297 -> Patchwork_110173v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_110173v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_110173v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/index.html

Participating hosts (40 -> 41)
--

  Additional (3): fi-cml-u2 fi-bdw-gvtdvm fi-tgl-dsi 
  Missing(2): fi-ctg-p8600 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_110173v1:

### IGT changes ###

 Possible regressions 

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-bdw-gvtdvm:  NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-bdw-gvtdvm/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor@varying-size:
- fi-bsw-kefka:   [PASS][2] -> [FAIL][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12297/fi-bsw-kefka/igt@kms_cursor_legacy@basic-flip-after-cur...@varying-size.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-flip-after-cur...@varying-size.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@basic-rte:
- {bat-adln-1}:   [PASS][4] -> [DMESG-WARN][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12297/bat-adln-1/igt@i915_pm_...@basic-rte.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/bat-adln-1/igt@i915_pm_...@basic-rte.html

  
Known issues


  Here are the changes found in Patchwork_110173v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_fence@basic-busy@bcs0:
- fi-cml-u2:  NOTRUN -> [SKIP][6] ([i915#1208]) +1 similar issue
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-cml-u2/igt@gem_exec_fence@basic-b...@bcs0.html

  * igt@gem_huc_copy@huc-copy:
- fi-cml-u2:  NOTRUN -> [SKIP][7] ([i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-cml-u2/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-apl-guc/igt@gem_lmem_swapp...@basic.html
- fi-bdw-gvtdvm:  NOTRUN -> [SKIP][9] ([fdo#109271]) +37 similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-bdw-gvtdvm/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-cml-u2:  NOTRUN -> [SKIP][10] ([i915#4613]) +3 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-cml-u2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: NOTRUN -> [DMESG-FAIL][11] ([i915#5334])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- fi-rkl-guc: [PASS][12] -> [INCOMPLETE][13] ([i915#4983])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12297/fi-rkl-guc/igt@i915_selftest@l...@hangcheck.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-rkl-guc/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2:  NOTRUN -> [SKIP][14] ([fdo#109284] / [fdo#111827]) +8 
similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-crc-fast:
- fi-apl-guc: NOTRUN -> [SKIP][15] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-apl-guc/igt@kms_chamel...@hdmi-crc-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-bdw-gvtdvm:  NOTRUN -> [SKIP][16] ([fdo#109271] / [fdo#111827]) +7 
similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110173v1/fi-bdw-gvtdvm/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-cml-u2:  NOTRUN -> [SKIP][17] ([i915#4213])
   [17]: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for freezer, sched: Rewrite core freezer logic fix

[Patchwork]

== Series Details ==

Series: freezer, sched: Rewrite core freezer logic fix
URL   : https://patchwork.freedesktop.org/series/110173/
State : warning

== Summary ==

Error: dim checkpatch failed
873d9a285e35 freezer, sched: Rewrite core freezer logic fix
-:12: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#12: 
> <4>[  355.438418]  #0: 88844693b758 (>__lock){-.-.}-{2:2}, at: 
> raw_spin_rq_lock_nested+0x1b/0x30

-:112: WARNING:MEMORY_BARRIER: memory barrier without comment
#112: FILE: kernel/sched/core.c:4226:
+   smp_rmb();

-:152: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)

total: 1 errors, 2 warnings, 0 checks, 66 lines checked

[Intel-gfx] [PATCH v5 1/1] drm/i915/guc: Fix GuC error capture sizing estimation and reporting

[Alan Previn]

During GuC error capture initialization, we estimate the amount of size
we need for the error-capture-region of the shared GuC-log-buffer.
This calculation was incorrect so fix that. With the fixed calculation
we can reduce the allocation of error-capture region from 4MB to 1MB
(see note2 below for reasoning). Additionally, switch from drm_notice to
drm_debug for the 3X spare size check since that would be impossible to
hit without redesigning gpu_coredump framework to hold multiple captures.

NOTE1: Even for 1x the min size estimation case, actually running out
of space is a corner case because it can only occur if all engine
instances get reset all at once and i915 isn't able extract the capture
data fast enough within G2H handler worker.

NOTE2: With the corrected calculation, a DG2 part required ~77K and a PVC
required ~115K (1X min-est-size that is calculated as one-shot all-engine-
reset scenario).

Fixes: d7c15d76a5547 ("drm/i915/guc: Check sizing of guc_capture output")

Signed-off-by: Alan Previn 
Reviewed-by: John Harrison 
---
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 29 ---
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c|  6 ++--
 2 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index c4bee3bc15a9..4e6dca707d94 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -559,8 +559,9 @@ guc_capture_getlistsize(struct intel_guc *guc, u32 owner, 
u32 type, u32 classid,
if (!num_regs)
return -ENODATA;
 
-   *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
-  (num_regs * sizeof(struct guc_mmio_reg)));
+   if (size)
+   *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
+  (num_regs * sizeof(struct guc_mmio_reg)));
 
return 0;
 }
@@ -670,7 +671,7 @@ guc_capture_output_min_size_est(struct intel_guc *guc)
struct intel_gt *gt = guc_to_gt(guc);
struct intel_engine_cs *engine;
enum intel_engine_id id;
-   int worst_min_size = 0, num_regs = 0;
+   int worst_min_size = 0;
size_t tmp = 0;
 
if (!guc->capture)
@@ -692,20 +693,18 @@ guc_capture_output_min_size_est(struct intel_guc *guc)
 (3 * sizeof(struct 
guc_state_capture_header_t));
 
if (!guc_capture_getlistsize(guc, 0, 
GUC_CAPTURE_LIST_TYPE_GLOBAL, 0, , true))
-   num_regs += tmp;
+   worst_min_size += tmp;
 
if (!guc_capture_getlistsize(guc, 0, 
GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS,
 engine->class, , true)) {
-   num_regs += tmp;
+   worst_min_size += tmp;
}
if (!guc_capture_getlistsize(guc, 0, 
GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE,
 engine->class, , true)) {
-   num_regs += tmp;
+   worst_min_size += tmp;
}
}
 
-   worst_min_size += (num_regs * sizeof(struct guc_mmio_reg));
-
return worst_min_size;
 }
 
@@ -722,15 +721,23 @@ static void check_guc_capture_size(struct intel_guc *guc)
int spare_size = min_size * GUC_CAPTURE_OVERBUFFER_MULTIPLIER;
u32 buffer_size = intel_guc_log_section_size_capture(>log);
 
+   /*
+* NOTE: min_size is much smaller than the capture region allocation 
(DG2: <80K vs 1MB)
+* Additionally, its based on space needed to fit all engines getting 
reset at once
+* within the same G2H handler task slot. This is very unlikely. 
However, if GuC really
+* does run out of space for whatever reason, we will see an separate 
warning message
+* when processing the G2H event capture-notification, search for:
+* INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE.
+*/
if (min_size < 0)
drm_warn(>drm, "Failed to calculate GuC error state 
capture buffer minimum size: %d!\n",
 min_size);
else if (min_size > buffer_size)
-   drm_warn(>drm, "GuC error state capture buffer is too 
small: %d < %d\n",
+   drm_warn(>drm, "GuC error state capture buffer maybe 
small: %d < %d\n",
 buffer_size, min_size);
else if (spare_size > buffer_size)
-   drm_notice(>drm, "GuC error state capture buffer maybe 
too small: %d < %d (min = %d)\n",
-  buffer_size, spare_size, min_size);
+   drm_dbg(>drm, "GuC error state capture buffer lacks spare 
size: %d < %d (min = %d)\n",
+   buffer_size, spare_size, min_size);
 }
 
 /*
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c 

[Intel-gfx] [PATCH v5 0/1] Fix Guc-Err-Capture sizing warning

[Alan Previn]

GuC Error capture initialization calculates an estimation
buffer size for worst case scenario of all engines getting
reset. Fix the calculation change from drm_warn to drm_dbg
since its a corner case

Changes from prior revs:
   v5: - Fixed "fixes" tag + added R-b that was received from v3.
   v3: - Rebase on latest drm-tip
   v2: - Reduce the guc-log-buffer error-capture-region allocation
 from 4MB to 1MB since the corrected math uncovers the
 larger headroom available to us.
   - Modify the code comment to focus on highlighting the
 headroom we have from how min_est is caclulated.
   - Add example min-est data from real hw in the patch comment.
   v1: - Change drm_dbg to drm_warn for the case of the mis-estated
 size not being met (John Harrison).

Alan Previn (1):
  drm/i915/guc: Fix GuC error capture sizing estimation and reporting

 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 29 ---
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c|  6 ++--
 2 files changed, 21 insertions(+), 14 deletions(-)


base-commit: 3844a56a09225527d7d9148d7e05ef5a99ac282f
-- 
2.34.1

Re: [Intel-gfx] [PATCH 20/20] drm/i915/mtl: Pin assignment for TypeC

[Imre Deak]

On Fri, Oct 14, 2022 at 03:47:40PM +0300, Mika Kahola wrote:
> From: Anusha Srivatsa 
> 
> Unlike previous platforms that used PORT_TX_DFLEXDPSP
> for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1
> from which the max_lanes has to be calculated.
> 
> Bspec: 50235, 65380
> Cc: Mika Kahola 
> Cc: Imre Deak 
> Cc: Matt Roper 
> Signed-off-by: Anusha Srivatsa 
> Signed-off-by: Jose Roberto de Souza 
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 30 +
>  1 file changed, 30 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c 
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index dba10bcc6b66..1bc81adf1ad7 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -13,6 +13,10 @@
>  #include "intel_tc.h"
>  #include "intel_tc_phy_regs.h"
>  
> +#define DP_PIN_ASSIGNMENT_C  0x3
> +#define DP_PIN_ASSIGNMENT_D  0x4
> +#define DP_PIN_ASSIGNMENT_E  0x5

The above are flags for the PORT_TX_DFLEXPA1 register, so should be
defined next to it.

TGL handles a few more encodings, not sure if that's correct or the
register description, opened a bspec ticket to clarify that.

> +
>  static const char *tc_port_mode_name(enum tc_port_mode mode)
>  {
>   static const char * const names[] = {
> @@ -149,6 +153,29 @@ u32 intel_tc_port_get_pin_assignment_mask(struct 
> intel_digital_port *dig_port)
>  DP_PIN_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx);
>  }
>  
> +static int mtl_tc_port_get_pin_assignment_mask(struct intel_digital_port 
> *dig_port)

The function returns the maximum number of lanes, so should be named
accordingly.

> +{
> + struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> + intel_wakeref_t wakeref;
> + u32 pin_mask;
> +
> + assert_tc_cold_blocked(dig_port);
> +
> + with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref)
> + pin_mask = intel_tc_port_get_pin_assignment_mask(dig_port);

The called function handles all the above, so it can be just:

switch (intel_tc_port_get_pin_assignment_mask()):

> +
> + switch(pin_mask) {
> + default:
> + MISSING_CASE(pin_mask);
> + fallthrough;
> + case DP_PIN_ASSIGNMENT_D:
> + return 2;
> + case DP_PIN_ASSIGNMENT_C:
> + case DP_PIN_ASSIGNMENT_E:
> + return 4;
> + }
> +}
> +
>  int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
>  {
>   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> @@ -158,6 +185,9 @@ int intel_tc_port_fia_max_lane_count(struct 
> intel_digital_port *dig_port)
>   if (dig_port->tc_mode != TC_PORT_DP_ALT)
>   return 4;
>  
> + if (DISPLAY_VER(i915) >= 14)
> + return mtl_tc_port_get_pin_assignment_mask(dig_port);
> +
>   assert_tc_cold_blocked(dig_port);
>  
>   lane_mask = 0;
> -- 
> 2.34.1
> 

Re: [Intel-gfx] [PATCH v5 17/19] drm/i915/vm_bind: Limit vm_bind mode to non-recoverable contexts

[Matthew Auld]

On 25/10/2022 07:59, Niranjana Vishwanathapura wrote:

Only support vm_bind mode with non-recoverable contexts.
With new vm_bind mode with eb3 submission path, we need not
support older recoverable contexts.

Signed-off-by: Niranjana Vishwanathapura 

Reviewed-by: Matthew Auld 

[Intel-gfx] [PATCH CI] freezer, sched: Rewrite core freezer logic fix

[Ville Syrjala]

From: Peter Zijlstra 

On Wed, Oct 26, 2022 at 01:32:31PM +0300, Ville Syrjälä wrote:
> Short form looks to be this:
> <4>[  355.437846] 1 lock held by rs:main Q:Reg/359:
> <4>[  355.438418]  #0: 88844693b758 (>__lock){-.-.}-{2:2}, at: 
> raw_spin_rq_lock_nested+0x1b/0x30
> <4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing

> <4>[  355.438429] [ cut here ]
> <4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing
> <4>[  355.438439] WARNING: CPU: 0 PID: 6211 at kernel/freezer.c:134 
> __set_task_frozen+0x86/0xb0
> <4>[  355.438447] Modules linked in: snd_hda_intel i915 mei_hdcp mei_pxp 
> drm_display_helper drm_kms_helper vgem drm_shmem_helper snd_hda_codec_hdmi 
> snd_hda_codec_realtek snd_hda_codec_generic ledtrig_audio snd_intel_dspcfg 
> snd_hda_codec snd_hwdep snd_hda_core snd_pcm prime_numbers ttm drm_buddy 
> syscopyarea sysfillrect sysimgblt fb_sys_fops fuse x86_pkg_temp_thermal 
> coretemp kvm_intel btusb btrtl btbcm btintel kvm irqbypass bluetooth 
> crct10dif_pclmul crc32_pclmul ecdh_generic ghash_clmulni_intel ecc e1000e 
> mei_me i2c_i801 ptp mei i2c_smbus pps_core lpc_ich video wmi [last unloaded: 
> drm_kms_helper]
> <4>[  355.438521] CPU: 0 PID: 6211 Comm: rtcwake Tainted: G U 
> 6.1.0-rc2-CI_DRM_12295-g3844a56a0922+ #1
> <4>[  355.438526] Hardware name:  /NUC5i7RYB, BIOS 
> RYBDWi35.86A.0385.2020.0519.1558 05/19/2020
> <4>[  355.438530] RIP: 0010:__set_task_frozen+0x86/0xb0
> <4>[  355.438536] Code: 83 60 09 00 00 85 c0 74 2a 48 89 df e8 ac 02 9b 00 8b 
> 93 38 05 00 00 48 8d b3 48 07 00 00 48 c7 c7 a0 62 2b 82 e8 ee c1 9a 00 <0f> 
> 0b c6 05 51 75 e3 02 01 c7 43 18 00 80 00 00 b8 00 80 00 00 5b
> <4>[  355.438541] RSP: 0018:c900012cbcf0 EFLAGS: 00010086
> <4>[  355.438546] RAX:  RBX: 88810d090040 RCX: 
> 0004
> <4>[  355.438550] RDX: 0004 RSI: f5de RDI: 
> 
> <4>[  355.438553] RBP:  R08:  R09: 
> c000f5de
> <4>[  355.438557] R10: 002335f8 R11: c900012cbb88 R12: 
> 0246
> <4>[  355.438561] R13: 81165430 R14:  R15: 
> 88810d090040
> <4>[  355.438565] FS:  7fcfa43c7740() GS:88844680() 
> knlGS:
> <4>[  355.438569] CS:  0010 DS:  ES:  CR0: 80050033
> <4>[  355.438582] CR2: 7fceb380f6b8 CR3: 000117c5c004 CR4: 
> 003706f0
> <4>[  355.438586] Call Trace:
> <4>[  355.438589]  
> <4>[  355.438592]  task_call_func+0xc4/0xe0
> <4>[  355.438600]  freeze_task+0x84/0xe0
> <4>[  355.438607]  try_to_freeze_tasks+0xac/0x260
> <4>[  355.438616]  freeze_processes+0x56/0xb0
> <4>[  355.438622]  pm_suspend.cold.7+0x1d9/0x31c
> <4>[  355.438629]  state_store+0x7b/0xe0
> <4>[  355.438637]  kernfs_fop_write_iter+0x124/0x1c0
> <4>[  355.438644]  vfs_write+0x34f/0x4e0
> <4>[  355.438655]  ksys_write+0x57/0xd0
> <4>[  355.438663]  do_syscall_64+0x3a/0x90
> <4>[  355.438670]  entry_SYSCALL_64_after_hwframe+0x63/0xcd

Oh I think I see what's going on.

It's a very narrow race between schedule() and task_call_func().

  CPU0  CPU1

  __schedule()
rq_lock();
prev_state = READ_ONCE(prev->__state);
if (... && prev_state) {
  deactivate_tasl(rq, prev, ...)
prev->on_rq = 0;

task_call_func()
  
raw_spin_lock_irqsave(p->pi_lock);
  state = READ_ONCE(p->__state);
  smp_rmb();
  if (... || p->on_rq) // 
false!!!
rq = __task_rq_lock()

  ret = func();

next = pick_next_task();
rq = context_switch(prev, next)
  prepare_lock_switch()
spin_release(&__rq_lockp(rq)->dep_map...)

So while the task is on it's way out, it still holds rq->lock for a
little while, and right then task_call_func() comes in and figures it
doesn't need rq->lock anymore (because the task is already dequeued --
but still running there) and then the __set_task_frozen() thing observes
it's holding rq->lock and yells murder.

Could you please give the below a spin?
---
 kernel/sched/core.c | 49 +
 1 file changed, 32 insertions(+), 17 deletions(-)

diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index cb2aa2b54c7a..f519f44cd4c7 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -4200,6 +4200,37 @@ try_to_wake_up(struct task_struct *p, unsigned int 
state, int wake_flags)
return success;
 }
 
+static bool __task_needs_rq_lock(struct task_struct *p)
+{
+   unsigned int state = READ_ONCE(p->__state);
+
+   /*
+* Since pi->lock blocks try_to_wake_up(), we don't need 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl+: Fix race conditions during DKL PHY accesses (rev5)

[Imre Deak]

On Tue, Oct 25, 2022 at 08:04:12PM +, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/tgl+: Fix race conditions during DKL PHY accesses (rev5)
> URL   : https://patchwork.freedesktop.org/series/109963/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_12293_full -> Patchwork_109963v5_full
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_109963v5_full absolutely need 
> to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_109963v5_full, please notify your bug team to allow 
> them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Participating hosts (9 -> 11)
> --
> 
>   Additional (2): shard-rkl shard-dg1 
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_109963v5_full:
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@kms_cursor_crc@cursor-suspend@pipe-b-edp-1:
> - shard-skl:  [PASS][1] -> [INCOMPLETE][2]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12293/shard-skl7/igt@kms_cursor_crc@cursor-susp...@pipe-b-edp-1.html
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-skl9/igt@kms_cursor_crc@cursor-susp...@pipe-b-edp-1.html

SKL doesn't have MG/DKL PHYs, so the above issue is unrelated.

Thanks for the review/ack, patchset is pushed.

>  Suppressed 
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@sysfs_preempt_timeout@idempotent@rcs0:
> - {shard-dg1}:NOTRUN -> [FAIL][3] +4 similar issues
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-dg1-15/igt@sysfs_preempt_timeout@idempot...@rcs0.html
> 
>   
> Known issues
> 
> 
>   Here are the changes found in Patchwork_109963v5_full that come from known 
> issues:
> 
> ### IGT changes ###
> 
>  Issues hit 
> 
>   * igt@gem_eio@in-flight-contexts-10ms:
> - shard-tglb: [PASS][4] -> [TIMEOUT][5] ([i915#3063])
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12293/shard-tglb5/igt@gem_...@in-flight-contexts-10ms.html
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-tglb6/igt@gem_...@in-flight-contexts-10ms.html
> 
>   * igt@gem_eio@in-flight-suspend:
> - shard-skl:  [PASS][6] -> [INCOMPLETE][7] ([i915#7112])
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12293/shard-skl10/igt@gem_...@in-flight-suspend.html
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-skl6/igt@gem_...@in-flight-suspend.html
> 
>   * igt@gem_exec_balancer@parallel:
> - shard-iclb: [PASS][8] -> [SKIP][9] ([i915#4525])
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12293/shard-iclb1/igt@gem_exec_balan...@parallel.html
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-iclb5/igt@gem_exec_balan...@parallel.html
> 
>   * igt@gem_exec_fair@basic-pace-share@rcs0:
> - shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2842])
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12293/shard-glk5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-glk1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
> 
>   * igt@gem_exec_fair@basic-pace-solo@rcs0:
> - shard-apl:  [PASS][12] -> [FAIL][13] ([i915#2842])
>[12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12293/shard-apl3/igt@gem_exec_fair@basic-pace-s...@rcs0.html
>[13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-apl6/igt@gem_exec_fair@basic-pace-s...@rcs0.html
> 
>   * igt@gem_lmem_swapping@parallel-random:
> - shard-skl:  NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613])
>[14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-skl7/igt@gem_lmem_swapp...@parallel-random.html
> 
>   * igt@i915_pm_dc@dc6-dpms:
> - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#3989] / [i915#454])
>[15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12293/shard-iclb5/igt@i915_pm...@dc6-dpms.html
>[16]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-iclb3/igt@i915_pm...@dc6-dpms.html
> 
>   * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
> - shard-skl:  NOTRUN -> [SKIP][17] ([fdo#109271]) +43 similar 
> issues
>[17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109963v5/shard-skl7/igt@kms_big...@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
> 
>   * igt@kms_color_chamelium@ctm-limited-range:
> - shard-skl:  NOTRUN -> [SKIP][18] ([fdo#109271] / 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: More gamma work

[Patchwork]

== Series Details ==

Series: drm/i915: More gamma work
URL   : https://patchwork.freedesktop.org/series/110168/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12296 -> Patchwork_110168v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/index.html

Participating hosts (41 -> 38)
--

  Missing(3): fi-kbl-soraka fi-ctg-p8600 bat-atsm-1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_110168v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3:
- {bat-dg2-9}:[PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-...@pipe-b-dp-3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-...@pipe-b-dp-3.html

  
Known issues


  Here are the changes found in Patchwork_110168v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/fi-apl-guc/igt@gem_lmem_swapp...@basic.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][4] -> [INCOMPLETE][5] ([i915#4785])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_chamelium@hdmi-crc-fast:
- fi-apl-guc: NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/fi-apl-guc/igt@kms_chamel...@hdmi-crc-fast.html

  * 
igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka:   [PASS][7] -> [FAIL][8] ([i915#6298])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-edp-1:
- fi-skl-6600u:   [PASS][9] -> [FAIL][10] ([fdo#103375])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/fi-skl-6600u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-edp-1.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/fi-skl-6600u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-edp-1.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-apl-guc: NOTRUN -> [SKIP][11] ([fdo#109271]) +11 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/fi-apl-guc/igt@kms_psr@sprite_plane_onoff.html

  * igt@runner@aborted:
- fi-hsw-4770:NOTRUN -> [FAIL][12] ([fdo#109271] / [i915#4312] / 
[i915#5594])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/fi-hsw-4770/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-adlm-1}:   [DMESG-WARN][13] ([i915#2867]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_hangman@error-state-basic:
- fi-apl-guc: [DMESG-WARN][15] -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/fi-apl-guc/igt@i915_hang...@error-state-basic.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/fi-apl-guc/igt@i915_hang...@error-state-basic.html

  * igt@i915_selftest@live@gt_pm:
- {bat-adln-1}:   [DMESG-FAIL][17] ([i915#4258]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-adln-1/igt@i915_selftest@live@gt_pm.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/bat-adln-1/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@reset:
- {bat-rpls-1}:   [DMESG-FAIL][19] ([i915#4983] / [i915#5828]) -> 
[PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-rpls-1/igt@i915_selftest@l...@reset.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110168v1/bat-rpls-1/igt@i915_selftest@l...@reset.html

  
  {name}: This element is suppressed. This means it is ignored when computing
 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix CFI violations in gt_sysfs (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix CFI violations in gt_sysfs (rev5)
URL   : https://patchwork.freedesktop.org/series/108917/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12294_full -> Patchwork_108917v5_full


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_108917v5_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_108917v5_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_108917v5_full:

### IGT changes ###

 Warnings 

  * igt@runner@aborted:
- shard-skl:  ([FAIL][1], [FAIL][2], [FAIL][3], [FAIL][4], 
[FAIL][5], [FAIL][6], [FAIL][7]) ([i915#3002] / [i915#4312] / [i915#6949]) -> 
([FAIL][8], [FAIL][9], [FAIL][10], [FAIL][11], [FAIL][12], [FAIL][13]) 
([i915#3002] / [i915#4312])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl9/igt@run...@aborted.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl7/igt@run...@aborted.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl9/igt@run...@aborted.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl6/igt@run...@aborted.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl7/igt@run...@aborted.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl6/igt@run...@aborted.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl4/igt@run...@aborted.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108917v5/shard-skl4/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108917v5/shard-skl9/igt@run...@aborted.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108917v5/shard-skl9/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108917v5/shard-skl9/igt@run...@aborted.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108917v5/shard-skl7/igt@run...@aborted.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108917v5/shard-skl7/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@core_getstats:
- {shard-dg1}:[PASS][14] -> [INCOMPLETE][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-dg1-18/igt@core_getstats.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108917v5/shard-dg1-16/igt@core_getstats.html

  
New tests
-

  New tests have been introduced between CI_DRM_12294_full and 
Patchwork_108917v5_full:

### New IGT tests (6) ###

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@bcs0:
- Statuses : 7 pass(s)
- Exec time: [0.10, 0.26] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@rcs0:
- Statuses : 7 pass(s)
- Exec time: [0.10, 0.29] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs0:
- Statuses : 7 pass(s)
- Exec time: [0.09, 0.25] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs1:
- Statuses : 2 pass(s)
- Exec time: [0.07, 0.11] s

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vecs0:
- Statuses : 7 pass(s)
- Exec time: [0.09, 0.24] s

  

Known issues


  Here are the changes found in Patchwork_108917v5_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-apl:  ([PASS][16], [PASS][17], [PASS][18], [PASS][19], 
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], 
[PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], 
[PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], 
[PASS][38], [PASS][39], [PASS][40]) -> ([PASS][41], [PASS][42], [PASS][43], 
[PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], 
[PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], 
[PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [FAIL][61], 
[PASS][62], [PASS][63], [PASS][64], [PASS][65]) ([i915#4386])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl7/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl8/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl8/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl8/boot.html
   [20]: 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: More gamma work

[Patchwork]

== Series Details ==

Series: drm/i915: More gamma work
URL   : https://patchwork.freedesktop.org/series/110168/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v3 6/6] freezer, sched: Rewrite core freezer logic

[Peter Zijlstra]

On Wed, Oct 26, 2022 at 02:12:02PM +0200, Peter Zijlstra wrote:
> On Wed, Oct 26, 2022 at 01:43:00PM +0200, Peter Zijlstra wrote:
> > On Wed, Oct 26, 2022 at 01:32:31PM +0300, Ville Syrjälä wrote:
> > > Short form looks to be this:
> > > <4>[  355.437846] 1 lock held by rs:main Q:Reg/359:
> > > <4>[  355.438418]  #0: 88844693b758 (>__lock){-.-.}-{2:2}, at: 
> > > raw_spin_rq_lock_nested+0x1b/0x30
> > > <4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing
> > 
> > > <4>[  355.438429] [ cut here ]
> > > <4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing
> > > <4>[  355.438439] WARNING: CPU: 0 PID: 6211 at kernel/freezer.c:134 
> > > __set_task_frozen+0x86/0xb0
> > > <4>[  355.438447] Modules linked in: snd_hda_intel i915 mei_hdcp mei_pxp 
> > > drm_display_helper drm_kms_helper vgem drm_shmem_helper 
> > > snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic 
> > > ledtrig_audio snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core 
> > > snd_pcm prime_numbers ttm drm_buddy syscopyarea sysfillrect sysimgblt 
> > > fb_sys_fops fuse x86_pkg_temp_thermal coretemp kvm_intel btusb btrtl 
> > > btbcm btintel kvm irqbypass bluetooth crct10dif_pclmul crc32_pclmul 
> > > ecdh_generic ghash_clmulni_intel ecc e1000e mei_me i2c_i801 ptp mei 
> > > i2c_smbus pps_core lpc_ich video wmi [last unloaded: drm_kms_helper]
> > > <4>[  355.438521] CPU: 0 PID: 6211 Comm: rtcwake Tainted: G U 
> > > 6.1.0-rc2-CI_DRM_12295-g3844a56a0922+ #1
> > > <4>[  355.438526] Hardware name:  /NUC5i7RYB, BIOS 
> > > RYBDWi35.86A.0385.2020.0519.1558 05/19/2020
> > > <4>[  355.438530] RIP: 0010:__set_task_frozen+0x86/0xb0
> > > <4>[  355.438536] Code: 83 60 09 00 00 85 c0 74 2a 48 89 df e8 ac 02 9b 
> > > 00 8b 93 38 05 00 00 48 8d b3 48 07 00 00 48 c7 c7 a0 62 2b 82 e8 ee c1 
> > > 9a 00 <0f> 0b c6 05 51 75 e3 02 01 c7 43 18 00 80 00 00 b8 00 80 00 00 5b
> > > <4>[  355.438541] RSP: 0018:c900012cbcf0 EFLAGS: 00010086
> > > <4>[  355.438546] RAX:  RBX: 88810d090040 RCX: 
> > > 0004
> > > <4>[  355.438550] RDX: 0004 RSI: f5de RDI: 
> > > 
> > > <4>[  355.438553] RBP:  R08:  R09: 
> > > c000f5de
> > > <4>[  355.438557] R10: 002335f8 R11: c900012cbb88 R12: 
> > > 0246
> > > <4>[  355.438561] R13: 81165430 R14:  R15: 
> > > 88810d090040
> > > <4>[  355.438565] FS:  7fcfa43c7740() GS:88844680() 
> > > knlGS:
> > > <4>[  355.438569] CS:  0010 DS:  ES:  CR0: 80050033
> > > <4>[  355.438582] CR2: 7fceb380f6b8 CR3: 000117c5c004 CR4: 
> > > 003706f0
> > > <4>[  355.438586] Call Trace:
> > > <4>[  355.438589]  
> > > <4>[  355.438592]  task_call_func+0xc4/0xe0
> > > <4>[  355.438600]  freeze_task+0x84/0xe0
> > > <4>[  355.438607]  try_to_freeze_tasks+0xac/0x260
> > > <4>[  355.438616]  freeze_processes+0x56/0xb0
> > > <4>[  355.438622]  pm_suspend.cold.7+0x1d9/0x31c
> > > <4>[  355.438629]  state_store+0x7b/0xe0
> > > <4>[  355.438637]  kernfs_fop_write_iter+0x124/0x1c0
> > > <4>[  355.438644]  vfs_write+0x34f/0x4e0
> > > <4>[  355.438655]  ksys_write+0x57/0xd0
> > > <4>[  355.438663]  do_syscall_64+0x3a/0x90
> > > <4>[  355.438670]  entry_SYSCALL_64_after_hwframe+0x63/0xcd
> > 
> > Oh I think I see what's going on.
> > 
> > It's a very narrow race between schedule() and task_call_func().
> > 
> >   CPU0  CPU1
> > 
> >   __schedule()
> > rq_lock();
> > prev_state = READ_ONCE(prev->__state);
> > if (... && prev_state) {
> >   deactivate_tasl(rq, prev, ...)
> > prev->on_rq = 0;
> > 
> > task_call_func()
> >   
> > raw_spin_lock_irqsave(p->pi_lock);
> >   state = READ_ONCE(p->__state);
> >   smp_rmb();
> >   if (... || p->on_rq) // 
> > false!!!
> > rq = __task_rq_lock()
> > 
> >   ret = func();
> > 
> > next = pick_next_task();
> > rq = context_switch(prev, next)
> >   prepare_lock_switch()
> > spin_release(&__rq_lockp(rq)->dep_map...)
> > 
> > 
> > 
> > So while the task is on it's way out, it still holds rq->lock for a
> > little while, and right then task_call_func() comes in and figures it
> > doesn't need rq->lock anymore (because the task is already dequeued --
> > but still running there) and then the __set_task_frozen() thing observes
> > it's holding rq->lock and yells murder.
> > 
> > Could you please give the below a spin?
> 
> Urgh.. that'll narrow the race more, but won't solve it, that
> prepare_lock_switch() is after we clear ->on_cpu.
> 
> 

Re: [Intel-gfx] [PATCH v3 6/6] freezer, sched: Rewrite core freezer logic

[Peter Zijlstra]

On Wed, Oct 26, 2022 at 01:43:00PM +0200, Peter Zijlstra wrote:
> On Wed, Oct 26, 2022 at 01:32:31PM +0300, Ville Syrjälä wrote:
> > Short form looks to be this:
> > <4>[  355.437846] 1 lock held by rs:main Q:Reg/359:
> > <4>[  355.438418]  #0: 88844693b758 (>__lock){-.-.}-{2:2}, at: 
> > raw_spin_rq_lock_nested+0x1b/0x30
> > <4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing
> 
> > <4>[  355.438429] [ cut here ]
> > <4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing
> > <4>[  355.438439] WARNING: CPU: 0 PID: 6211 at kernel/freezer.c:134 
> > __set_task_frozen+0x86/0xb0
> > <4>[  355.438447] Modules linked in: snd_hda_intel i915 mei_hdcp mei_pxp 
> > drm_display_helper drm_kms_helper vgem drm_shmem_helper snd_hda_codec_hdmi 
> > snd_hda_codec_realtek snd_hda_codec_generic ledtrig_audio snd_intel_dspcfg 
> > snd_hda_codec snd_hwdep snd_hda_core snd_pcm prime_numbers ttm drm_buddy 
> > syscopyarea sysfillrect sysimgblt fb_sys_fops fuse x86_pkg_temp_thermal 
> > coretemp kvm_intel btusb btrtl btbcm btintel kvm irqbypass bluetooth 
> > crct10dif_pclmul crc32_pclmul ecdh_generic ghash_clmulni_intel ecc e1000e 
> > mei_me i2c_i801 ptp mei i2c_smbus pps_core lpc_ich video wmi [last 
> > unloaded: drm_kms_helper]
> > <4>[  355.438521] CPU: 0 PID: 6211 Comm: rtcwake Tainted: G U   
> >   6.1.0-rc2-CI_DRM_12295-g3844a56a0922+ #1
> > <4>[  355.438526] Hardware name:  /NUC5i7RYB, BIOS 
> > RYBDWi35.86A.0385.2020.0519.1558 05/19/2020
> > <4>[  355.438530] RIP: 0010:__set_task_frozen+0x86/0xb0
> > <4>[  355.438536] Code: 83 60 09 00 00 85 c0 74 2a 48 89 df e8 ac 02 9b 00 
> > 8b 93 38 05 00 00 48 8d b3 48 07 00 00 48 c7 c7 a0 62 2b 82 e8 ee c1 9a 00 
> > <0f> 0b c6 05 51 75 e3 02 01 c7 43 18 00 80 00 00 b8 00 80 00 00 5b
> > <4>[  355.438541] RSP: 0018:c900012cbcf0 EFLAGS: 00010086
> > <4>[  355.438546] RAX:  RBX: 88810d090040 RCX: 
> > 0004
> > <4>[  355.438550] RDX: 0004 RSI: f5de RDI: 
> > 
> > <4>[  355.438553] RBP:  R08:  R09: 
> > c000f5de
> > <4>[  355.438557] R10: 002335f8 R11: c900012cbb88 R12: 
> > 0246
> > <4>[  355.438561] R13: 81165430 R14:  R15: 
> > 88810d090040
> > <4>[  355.438565] FS:  7fcfa43c7740() GS:88844680() 
> > knlGS:
> > <4>[  355.438569] CS:  0010 DS:  ES:  CR0: 80050033
> > <4>[  355.438582] CR2: 7fceb380f6b8 CR3: 000117c5c004 CR4: 
> > 003706f0
> > <4>[  355.438586] Call Trace:
> > <4>[  355.438589]  
> > <4>[  355.438592]  task_call_func+0xc4/0xe0
> > <4>[  355.438600]  freeze_task+0x84/0xe0
> > <4>[  355.438607]  try_to_freeze_tasks+0xac/0x260
> > <4>[  355.438616]  freeze_processes+0x56/0xb0
> > <4>[  355.438622]  pm_suspend.cold.7+0x1d9/0x31c
> > <4>[  355.438629]  state_store+0x7b/0xe0
> > <4>[  355.438637]  kernfs_fop_write_iter+0x124/0x1c0
> > <4>[  355.438644]  vfs_write+0x34f/0x4e0
> > <4>[  355.438655]  ksys_write+0x57/0xd0
> > <4>[  355.438663]  do_syscall_64+0x3a/0x90
> > <4>[  355.438670]  entry_SYSCALL_64_after_hwframe+0x63/0xcd
> 
> Oh I think I see what's going on.
> 
> It's a very narrow race between schedule() and task_call_func().
> 
>   CPU0CPU1
> 
>   __schedule()
> rq_lock();
> prev_state = READ_ONCE(prev->__state);
> if (... && prev_state) {
>   deactivate_tasl(rq, prev, ...)
> prev->on_rq = 0;
> 
>   task_call_func()
> 
> raw_spin_lock_irqsave(p->pi_lock);
> state = READ_ONCE(p->__state);
> smp_rmb();
> if (... || p->on_rq) // 
> false!!!
>   rq = __task_rq_lock()
> 
> ret = func();
> 
> next = pick_next_task();
> rq = context_switch(prev, next)
>   prepare_lock_switch()
> spin_release(&__rq_lockp(rq)->dep_map...)
> 
> 
> 
> So while the task is on it's way out, it still holds rq->lock for a
> little while, and right then task_call_func() comes in and figures it
> doesn't need rq->lock anymore (because the task is already dequeued --
> but still running there) and then the __set_task_frozen() thing observes
> it's holding rq->lock and yells murder.
> 
> Could you please give the below a spin?

Urgh.. that'll narrow the race more, but won't solve it, that
prepare_lock_switch() is after we clear ->on_cpu.

Let me ponder this a wee bit more..

Re: [Intel-gfx] [PATCH v3 3/7] drm/ivpu: Add GEM buffer object management

[Thomas Zimmermann]

(cc: Thomas, Christian, intel-gfx)
Hi

Am 26.10.22 um 13:26 schrieb Jacek Lawrynowicz:

Hi,

On 10/25/2022 2:41 PM, Thomas Zimmermann wrote:

Hi

Am 24.09.22 um 17:11 schrieb Jacek Lawrynowicz:

Adds four types of GEM-based BOs for the VPU:
    - shmem
    - userptr
    - internal
    - prime

All types are implemented as struct ivpu_bo, based on
struct drm_gem_object. VPU address is allocated when buffer is created
except for imported prime buffers that allocate it in BO_INFO IOCTL due
to missing file_priv arg in gem_prime_import callback.
Internal buffers are pinned on creation, the rest of buffers types
can be pinned on demand (in SUBMIT IOCTL).
Buffer VPU address, allocated pages and mappings are relased when the
buffer is destroyed.
Eviction mechism is planned for future versions.

Add three new IOCTLs: BO_CREATE, BO_INFO, BO_USERPTR


I feels like TTM already does all you need. (?) Why not build upon TTM?


Would TTM make sense for a device without dedicated memory?


It is at least possible. i915 has TTM code for discrete devices and 
maybe uses some of it for integrated chips a well.  I've cc'ed a number 
of people with expertise.



It looks like struct drm_gem_shmem_object could be a better fit for us but it 
doesn't support userptr or internal buffers.


I don't find drm_gem_shmem_object in your current patch. (?) GEM SHMEM 
is a simple allocator for simple devices. It's best to keep it this way.

Stuff like eviction and userptr sounds like it's not for the shmem helpers.

The next best thing would be to write your own GEM allocator, which you 
did AFAICT. And that's absolutely ok. But TTM at least seems like a 
plausible framework.


Best regards
Thomas



Regards,
Jacek


--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Ivo Totev


OpenPGP_signature
Description: OpenPGP digital signature

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: stop abusing swiotlb_max_segment (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915: stop abusing swiotlb_max_segment (rev7)
URL   : https://patchwork.freedesktop.org/series/109946/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12296 -> Patchwork_109946v7


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/index.html

Participating hosts (41 -> 37)
--

  Missing(4): fi-kbl-soraka fi-jsl-1 fi-ctg-p8600 fi-icl-u2 

Known issues


  Here are the changes found in Patchwork_109946v7 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/fi-apl-guc/igt@gem_lmem_swapp...@basic.html

  * igt@i915_selftest@live@hangcheck:
- fi-rkl-guc: [PASS][2] -> [INCOMPLETE][3] ([i915#4983])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/fi-rkl-guc/igt@i915_selftest@l...@hangcheck.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/fi-rkl-guc/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_chamelium@hdmi-crc-fast:
- fi-apl-guc: NOTRUN -> [SKIP][4] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/fi-apl-guc/igt@kms_chamel...@hdmi-crc-fast.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-apl-guc: NOTRUN -> [SKIP][5] ([fdo#109271]) +11 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/fi-apl-guc/igt@kms_psr@sprite_plane_onoff.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-adlm-1}:   [DMESG-WARN][6] ([i915#2867]) -> [PASS][7] +1 similar 
issue
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_hangman@error-state-basic:
- fi-apl-guc: [DMESG-WARN][8] -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/fi-apl-guc/igt@i915_hang...@error-state-basic.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/fi-apl-guc/igt@i915_hang...@error-state-basic.html

  * igt@i915_selftest@live@gt_pm:
- {bat-adln-1}:   [DMESG-FAIL][10] ([i915#4258]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-adln-1/igt@i915_selftest@live@gt_pm.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/bat-adln-1/igt@i915_selftest@live@gt_pm.html

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-3:
- {bat-dg2-11}:   [FAIL][12] ([i915#6818]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-3.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-3.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
  [i915#6818]: https://gitlab.freedesktop.org/drm/intel/issues/6818
  [i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029


Build changes
-

  * Linux: CI_DRM_12296 -> Patchwork_109946v7

  CI-20190529: 20190529
  CI_DRM_12296: dc5600688adfc13fed8128d9043bab2257066646 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7026: ce0f97e7e0aa54c40049a8365b3d61773c92e588 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_109946v7: dc5600688adfc13fed8128d9043bab2257066646 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

47b27212f26b drm/i915: stop abusing swiotlb_max_segment

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109946v7/index.html

Re: [Intel-gfx] [PATCH v3 6/6] freezer, sched: Rewrite core freezer logic

[Peter Zijlstra]

On Wed, Oct 26, 2022 at 01:32:31PM +0300, Ville Syrjälä wrote:
> Short form looks to be this:
> <4>[  355.437846] 1 lock held by rs:main Q:Reg/359:
> <4>[  355.438418]  #0: 88844693b758 (>__lock){-.-.}-{2:2}, at: 
> raw_spin_rq_lock_nested+0x1b/0x30
> <4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing

> <4>[  355.438429] [ cut here ]
> <4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing
> <4>[  355.438439] WARNING: CPU: 0 PID: 6211 at kernel/freezer.c:134 
> __set_task_frozen+0x86/0xb0
> <4>[  355.438447] Modules linked in: snd_hda_intel i915 mei_hdcp mei_pxp 
> drm_display_helper drm_kms_helper vgem drm_shmem_helper snd_hda_codec_hdmi 
> snd_hda_codec_realtek snd_hda_codec_generic ledtrig_audio snd_intel_dspcfg 
> snd_hda_codec snd_hwdep snd_hda_core snd_pcm prime_numbers ttm drm_buddy 
> syscopyarea sysfillrect sysimgblt fb_sys_fops fuse x86_pkg_temp_thermal 
> coretemp kvm_intel btusb btrtl btbcm btintel kvm irqbypass bluetooth 
> crct10dif_pclmul crc32_pclmul ecdh_generic ghash_clmulni_intel ecc e1000e 
> mei_me i2c_i801 ptp mei i2c_smbus pps_core lpc_ich video wmi [last unloaded: 
> drm_kms_helper]
> <4>[  355.438521] CPU: 0 PID: 6211 Comm: rtcwake Tainted: G U 
> 6.1.0-rc2-CI_DRM_12295-g3844a56a0922+ #1
> <4>[  355.438526] Hardware name:  /NUC5i7RYB, BIOS 
> RYBDWi35.86A.0385.2020.0519.1558 05/19/2020
> <4>[  355.438530] RIP: 0010:__set_task_frozen+0x86/0xb0
> <4>[  355.438536] Code: 83 60 09 00 00 85 c0 74 2a 48 89 df e8 ac 02 9b 00 8b 
> 93 38 05 00 00 48 8d b3 48 07 00 00 48 c7 c7 a0 62 2b 82 e8 ee c1 9a 00 <0f> 
> 0b c6 05 51 75 e3 02 01 c7 43 18 00 80 00 00 b8 00 80 00 00 5b
> <4>[  355.438541] RSP: 0018:c900012cbcf0 EFLAGS: 00010086
> <4>[  355.438546] RAX:  RBX: 88810d090040 RCX: 
> 0004
> <4>[  355.438550] RDX: 0004 RSI: f5de RDI: 
> 
> <4>[  355.438553] RBP:  R08:  R09: 
> c000f5de
> <4>[  355.438557] R10: 002335f8 R11: c900012cbb88 R12: 
> 0246
> <4>[  355.438561] R13: 81165430 R14:  R15: 
> 88810d090040
> <4>[  355.438565] FS:  7fcfa43c7740() GS:88844680() 
> knlGS:
> <4>[  355.438569] CS:  0010 DS:  ES:  CR0: 80050033
> <4>[  355.438582] CR2: 7fceb380f6b8 CR3: 000117c5c004 CR4: 
> 003706f0
> <4>[  355.438586] Call Trace:
> <4>[  355.438589]  
> <4>[  355.438592]  task_call_func+0xc4/0xe0
> <4>[  355.438600]  freeze_task+0x84/0xe0
> <4>[  355.438607]  try_to_freeze_tasks+0xac/0x260
> <4>[  355.438616]  freeze_processes+0x56/0xb0
> <4>[  355.438622]  pm_suspend.cold.7+0x1d9/0x31c
> <4>[  355.438629]  state_store+0x7b/0xe0
> <4>[  355.438637]  kernfs_fop_write_iter+0x124/0x1c0
> <4>[  355.438644]  vfs_write+0x34f/0x4e0
> <4>[  355.438655]  ksys_write+0x57/0xd0
> <4>[  355.438663]  do_syscall_64+0x3a/0x90
> <4>[  355.438670]  entry_SYSCALL_64_after_hwframe+0x63/0xcd

Oh I think I see what's going on.

It's a very narrow race between schedule() and task_call_func().

  CPU0  CPU1

  __schedule()
rq_lock();
prev_state = READ_ONCE(prev->__state);
if (... && prev_state) {
  deactivate_tasl(rq, prev, ...)
prev->on_rq = 0;

task_call_func()
  
raw_spin_lock_irqsave(p->pi_lock);
  state = READ_ONCE(p->__state);
  smp_rmb();
  if (... || p->on_rq) // 
false!!!
rq = __task_rq_lock()

  ret = func();

next = pick_next_task();
rq = context_switch(prev, next)
  prepare_lock_switch()
spin_release(&__rq_lockp(rq)->dep_map...)



So while the task is on it's way out, it still holds rq->lock for a
little while, and right then task_call_func() comes in and figures it
doesn't need rq->lock anymore (because the task is already dequeued --
but still running there) and then the __set_task_frozen() thing observes
it's holding rq->lock and yells murder.

Could you please give the below a spin?

---
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index cb2aa2b54c7a..f519f44cd4c7 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -4200,6 +4200,37 @@ try_to_wake_up(struct task_struct *p, unsigned int 
state, int wake_flags)
return success;
 }
 
+static bool __task_needs_rq_lock(struct task_struct *p)
+{
+   unsigned int state = READ_ONCE(p->__state);
+
+   /*
+* Since pi->lock blocks try_to_wake_up(), we don't need rq->lock when
+* the task is blocked. Make sure to check @state since ttwu() can drop
+* locks at the end, see 

[Intel-gfx] [PATCH 09/11] drm/i915: Reject YCbCr output with degamma+gamma on pre-icl

[Ville Syrjala]

From: Ville Syrjälä 

Since the pipe CSC sits between the degamma and gamma LUTs there
is no way to make us it for RGB->YCbCr conversion when both LUTs
are also active. Simply reject such combos.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 435394cad359..926784f266f2 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1556,7 +1556,14 @@ static int ivb_color_check(struct intel_crtc_state 
*crtc_state)
if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB &&
crtc_state->hw.ctm) {
drm_dbg_kms(>drm,
-   "YCBCR and CTM together are not possible\n");
+   "YCbCr and CTM together are not possible\n");
+   return -EINVAL;
+   }
+
+   if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB &&
+   crtc_state->hw.degamma_lut && crtc_state->hw.gamma_lut) {
+   drm_dbg_kms(>drm,
+   "YCbCr and degamma+gamma together are not 
possible\n");
return -EINVAL;
}
 
@@ -1622,7 +1629,14 @@ static int glk_color_check(struct intel_crtc_state 
*crtc_state)
if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB &&
crtc_state->hw.ctm) {
drm_dbg_kms(>drm,
-   "YCBCR and CTM together are not possible\n");
+   "YCbCr and CTM together are not possible\n");
+   return -EINVAL;
+   }
+
+   if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB &&
+   crtc_state->hw.degamma_lut && crtc_state->hw.gamma_lut) {
+   drm_dbg_kms(>drm,
+   "YCbCr and degamma+gamma together are not 
possible\n");
return -EINVAL;
}
 
-- 
2.37.4

[Intel-gfx] [PATCH 10/11] drm/i915: Share {csc, gamma}_enable calculation for ilk/snb vs. ivb+

[Ville Syrjala]

From: Ville Syrjälä 

ilk/snb vs. ivb+ hardware is mostly identical except for the addition
of the split gamma mode on ivb. Thus we can share the csc_enable
and gamma_enable calculation for both variants. Pull that stuff
into a few helpers.

Note that this also fills in the missing ctm/degamma stuff into
ilk_color_check() pretty much, so for good measure let's also
add a few extra checks relating to that, although we still don't
expose ctm/degamma to userspace. But now it'll be trivial to do
so if we wish.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 49 ++
 1 file changed, 32 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 926784f266f2..33871bfacee7 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1442,6 +1442,20 @@ static int chv_color_check(struct intel_crtc_state 
*crtc_state)
return 0;
 }
 
+static bool ilk_gamma_enable(const struct intel_crtc_state *crtc_state)
+{
+   return (crtc_state->hw.gamma_lut ||
+   crtc_state->hw.degamma_lut) &&
+   !crtc_state->c8_planes;
+}
+
+static bool ilk_csc_enable(const struct intel_crtc_state *crtc_state)
+{
+   return crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB ||
+   ilk_csc_limited_range(crtc_state) ||
+   crtc_state->hw.ctm;
+}
+
 static u32 ilk_gamma_mode(const struct intel_crtc_state *crtc_state)
 {
if (!crtc_state->gamma_enable ||
@@ -1487,22 +1501,29 @@ static void ilk_assign_luts(struct intel_crtc_state 
*crtc_state)
 
 static int ilk_color_check(struct intel_crtc_state *crtc_state)
 {
+   struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
int ret;
 
ret = check_luts(crtc_state);
if (ret)
return ret;
 
-   crtc_state->gamma_enable =
-   crtc_state->hw.gamma_lut &&
-   !crtc_state->c8_planes;
+   if (crtc_state->hw.degamma_lut && crtc_state->hw.gamma_lut) {
+   drm_dbg_kms(>drm,
+   "Degamma and gamma together are not possible\n");
+   return -EINVAL;
+   }
 
-   /*
-* We don't expose the ctm on ilk/snb currently, also RGB
-* limited range output is handled by the hw automagically.
-*/
-   crtc_state->csc_enable =
-   crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB;
+   if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB &&
+   crtc_state->hw.ctm) {
+   drm_dbg_kms(>drm,
+   "YCbCr and CTM together are not possible\n");
+   return -EINVAL;
+   }
+
+   crtc_state->gamma_enable = ilk_gamma_enable(crtc_state);
+
+   crtc_state->csc_enable = ilk_csc_enable(crtc_state);
 
crtc_state->gamma_mode = ilk_gamma_mode(crtc_state);
 
@@ -1546,7 +1567,6 @@ static u32 ivb_csc_mode(const struct intel_crtc_state 
*crtc_state)
 static int ivb_color_check(struct intel_crtc_state *crtc_state)
 {
struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
-   bool limited_color_range = ilk_csc_limited_range(crtc_state);
int ret;
 
ret = check_luts(crtc_state);
@@ -1567,14 +1587,9 @@ static int ivb_color_check(struct intel_crtc_state 
*crtc_state)
return -EINVAL;
}
 
-   crtc_state->gamma_enable =
-   (crtc_state->hw.gamma_lut ||
-crtc_state->hw.degamma_lut) &&
-   !crtc_state->c8_planes;
+   crtc_state->gamma_enable = ilk_gamma_enable(crtc_state);
 
-   crtc_state->csc_enable =
-   crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB ||
-   crtc_state->hw.ctm || limited_color_range;
+   crtc_state->csc_enable = ilk_csc_enable(crtc_state);
 
crtc_state->gamma_mode = ivb_gamma_mode(crtc_state);
 
-- 
2.37.4

[Intel-gfx] [PATCH 02/11] drm/i915: Use _MMIO_PIPE() for SKL_BOTTOM_COLOR

[Ville Syrjala]

From: Ville Syrjälä 

No need to use _MMIO_PIPE2() for SKL_BOTTOM_COLOR
since all pipe registers are evenly spread on skl+.
Switch to _MMIO_PIPE() and thus avoid the hidden dev_priv.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/i915_reg.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 99a853519395..89ad893bbf07 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3758,9 +3758,10 @@
 
 /* Skylake+ pipe bottom (background) color */
 #define _SKL_BOTTOM_COLOR_A0x70034
+#define _SKL_BOTTOM_COLOR_B0x71034
 #define   SKL_BOTTOM_COLOR_GAMMA_ENABLEREG_BIT(31)
 #define   SKL_BOTTOM_COLOR_CSC_ENABLE  REG_BIT(30)
-#define SKL_BOTTOM_COLOR(pipe) _MMIO_PIPE2(pipe, _SKL_BOTTOM_COLOR_A)
+#define SKL_BOTTOM_COLOR(pipe) _MMIO_PIPE(pipe, _SKL_BOTTOM_COLOR_A, 
_SKL_BOTTOM_COLOR_B)
 
 #define _ICL_PIPE_A_STATUS 0x70058
 #define ICL_PIPESTATUS(pipe)   _MMIO_PIPE2(pipe, 
_ICL_PIPE_A_STATUS)
-- 
2.37.4

[Intel-gfx] [PATCH 08/11] drm/i915: Reuse ilk_gamma_mode() on ivb+

[Ville Syrjala]

From: Ville Syrjälä 

Apart from the split gamma mode ivb+ LUTs work just like ilk+ LUTs.
So let's handle the special case, and then just fall back to
ilk_gamma_mode() to avoid having to duplicate the same logic.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 10 +++---
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 946fb767f3e0..435394cad359 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1521,14 +1521,10 @@ static int ilk_color_check(struct intel_crtc_state 
*crtc_state)
 
 static u32 ivb_gamma_mode(const struct intel_crtc_state *crtc_state)
 {
-   if (!crtc_state->gamma_enable ||
-   crtc_state_is_legacy_gamma(crtc_state))
-   return GAMMA_MODE_MODE_8BIT;
-   else if (crtc_state->hw.gamma_lut &&
-crtc_state->hw.degamma_lut)
+   if (crtc_state->hw.degamma_lut && crtc_state->hw.gamma_lut)
return GAMMA_MODE_MODE_SPLIT;
-   else
-   return GAMMA_MODE_MODE_10BIT;
+
+   return ilk_gamma_mode(crtc_state);
 }
 
 static u32 ivb_csc_mode(const struct intel_crtc_state *crtc_state)
-- 
2.37.4

[Intel-gfx] [PATCH 11/11] drm/i915: Create resized LUTs for ivb+ split gamma mode

[Ville Syrjala]

From: Ville Syrjälä 

Currently when opeating in split gamma mode we do the
"skip ever other sw LUT entry" trick in the low level
LUT programming/readout functions. That is very annoying
and a big hinderance to revamping the color management
uapi.

Let's get rid of that problem by making half sized copies
of the software LUTs and plugging those into the internal
{pre,post}_csc_lut attachment points (instead of the sticking
the uapi provide sw LUTs there directly).

With this the low level stuff will operate purely in terms
the hardware LUT sizes, and all uapi nonsense is contained
to the atomic check phase. The one thing we do lose is
intel_color_assert_luts() since we no longer have a way to
check that the uapi LUTs were correctly used when generating
the internal copies. But that seems like a price worth paying.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 81 +-
 1 file changed, 64 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 33871bfacee7..d48904f90e3a 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -597,6 +597,30 @@ create_linear_lut(struct drm_i915_private *i915, int 
lut_size)
return blob;
 }
 
+static struct drm_property_blob *
+create_resized_lut(struct drm_i915_private *i915,
+  const struct drm_property_blob *blob_in, int lut_out_size)
+{
+   int i, lut_in_size = drm_color_lut_size(blob_in);
+   struct drm_property_blob *blob_out;
+   const struct drm_color_lut *lut_in;
+   struct drm_color_lut *lut_out;
+
+   blob_out = drm_property_create_blob(>drm,
+   sizeof(lut_out[0]) * lut_out_size,
+   NULL);
+   if (IS_ERR(blob_out))
+   return blob_out;
+
+   lut_in = blob_in->data;
+   lut_out = blob_out->data;
+
+   for (i = 0; i < lut_out_size; i++)
+   lut_out[i] = lut_in[i * (lut_in_size - 1) / (lut_out_size - 1)];
+
+   return blob_out;
+}
+
 static void i9xx_load_lut_8(struct intel_crtc *crtc,
const struct drm_property_blob *blob)
 {
@@ -723,19 +747,14 @@ static void ivb_load_lut_10(struct intel_crtc *crtc,
u32 prec_index)
 {
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-   int hw_lut_size = ivb_lut_10_size(prec_index);
const struct drm_color_lut *lut = blob->data;
int i, lut_size = drm_color_lut_size(blob);
enum pipe pipe = crtc->pipe;
 
-   for (i = 0; i < hw_lut_size; i++) {
-   /* We discard half the user entries in split gamma mode */
-   const struct drm_color_lut *entry =
-   [i * (lut_size - 1) / (hw_lut_size - 1)];
-
+   for (i = 0; i < lut_size; i++) {
intel_de_write_fw(i915, PREC_PAL_INDEX(pipe), prec_index++);
intel_de_write_fw(i915, PREC_PAL_DATA(pipe),
- ilk_lut_10(entry));
+ ilk_lut_10([i]));
}
 
/*
@@ -751,7 +770,6 @@ static void bdw_load_lut_10(struct intel_crtc *crtc,
u32 prec_index)
 {
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-   int hw_lut_size = ivb_lut_10_size(prec_index);
const struct drm_color_lut *lut = blob->data;
int i, lut_size = drm_color_lut_size(blob);
enum pipe pipe = crtc->pipe;
@@ -759,14 +777,9 @@ static void bdw_load_lut_10(struct intel_crtc *crtc,
intel_de_write_fw(i915, PREC_PAL_INDEX(pipe),
  prec_index | PAL_PREC_AUTO_INCREMENT);
 
-   for (i = 0; i < hw_lut_size; i++) {
-   /* We discard half the user entries in split gamma mode */
-   const struct drm_color_lut *entry =
-   [i * (lut_size - 1) / (hw_lut_size - 1)];
-
+   for (i = 0; i < lut_size; i++)
intel_de_write_fw(i915, PREC_PAL_DATA(pipe),
- ilk_lut_10(entry));
-   }
+ ilk_lut_10([i]));
 
/*
 * Reset the index, otherwise it prevents the legacy palette to be
@@ -1343,7 +1356,7 @@ void intel_color_assert_luts(const struct 
intel_crtc_state *crtc_state)
crtc_state->pre_csc_lut != 
i915->display.color.glk_linear_degamma_lut);
drm_WARN_ON(>drm,
crtc_state->post_csc_lut != 
crtc_state->hw.gamma_lut);
-   } else {
+   } else if (crtc_state->gamma_mode != GAMMA_MODE_MODE_SPLIT) {
drm_WARN_ON(>drm,
crtc_state->pre_csc_lut != 
crtc_state->hw.degamma_lut &&
crtc_state->pre_csc_lut != 
crtc_state->hw.gamma_lut);
@@ -1564,6 +1577,38 @@ static u32 ivb_csc_mode(const 

[Intel-gfx] [PATCH 06/11] drm/i915: Deconfuse the ilk+ 12.4 LUT entry functions

[Ville Syrjala]

From: Ville Syrjälä 

s/icl_lut_multi_seg_pack/ilk_lut_12p4_pack/ since that's what it is
and group the corresponding "unpack" functions next to it.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 38 +++---
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 3b78b882e0c0..e881c95ee451 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -482,14 +482,28 @@ static void ilk_lut_10_pack(struct drm_color_lut *entry, 
u32 val)
entry->blue = 
intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_BLUE_MASK, val), 10);
 }
 
-static void icl_lut_multi_seg_pack(struct drm_color_lut *entry, u32 ldw, u32 
udw)
+/* ilk+ "12.4" interpolated format (high 10 bits) */
+static u32 ilk_lut_12p4_udw(const struct drm_color_lut *color)
+{
+   return (color->red >> 6) << 20 | (color->green >> 6) << 10 |
+   (color->blue >> 6);
+}
+
+/* ilk+ "12.4" interpolated format (low 6 bits) */
+static u32 ilk_lut_12p4_ldw(const struct drm_color_lut *color)
+{
+   return (color->red & 0x3f) << 24 | (color->green & 0x3f) << 14 |
+   (color->blue & 0x3f) << 4;
+}
+
+static void ilk_lut_12p4_pack(struct drm_color_lut *entry, u32 ldw, u32 udw)
 {
entry->red = REG_FIELD_GET(PAL_PREC_MULTI_SEG_RED_UDW_MASK, udw) << 6 |
-  
REG_FIELD_GET(PAL_PREC_MULTI_SEG_RED_LDW_MASK, ldw);
+   REG_FIELD_GET(PAL_PREC_MULTI_SEG_RED_LDW_MASK, ldw);
entry->green = REG_FIELD_GET(PAL_PREC_MULTI_SEG_GREEN_UDW_MASK, udw) << 
6 |
-
REG_FIELD_GET(PAL_PREC_MULTI_SEG_GREEN_LDW_MASK, ldw);
+   REG_FIELD_GET(PAL_PREC_MULTI_SEG_GREEN_LDW_MASK, ldw);
entry->blue = REG_FIELD_GET(PAL_PREC_MULTI_SEG_BLUE_UDW_MASK, udw) << 6 
|
-   
REG_FIELD_GET(PAL_PREC_MULTI_SEG_BLUE_LDW_MASK, ldw);
+   REG_FIELD_GET(PAL_PREC_MULTI_SEG_BLUE_LDW_MASK, ldw);
 }
 
 static void icl_color_commit_noarm(const struct intel_crtc_state *crtc_state)
@@ -917,20 +931,6 @@ static void glk_load_luts(const struct intel_crtc_state 
*crtc_state)
}
 }
 
-/* ilk+ "12.4" interpolated format (high 10 bits) */
-static u32 ilk_lut_12p4_udw(const struct drm_color_lut *color)
-{
-   return (color->red >> 6) << 20 | (color->green >> 6) << 10 |
-   (color->blue >> 6);
-}
-
-/* ilk+ "12.4" interpolated format (low 6 bits) */
-static u32 ilk_lut_12p4_ldw(const struct drm_color_lut *color)
-{
-   return (color->red & 0x3f) << 24 | (color->green & 0x3f) << 14 |
-   (color->blue & 0x3f) << 4;
-}
-
 static void
 ivb_load_lut_max(const struct intel_crtc_state *crtc_state,
 const struct drm_color_lut *color)
@@ -2151,7 +2151,7 @@ icl_read_lut_multi_segment(struct intel_crtc *crtc)
u32 ldw = intel_de_read_fw(i915, PREC_PAL_MULTI_SEG_DATA(pipe));
u32 udw = intel_de_read_fw(i915, PREC_PAL_MULTI_SEG_DATA(pipe));
 
-   icl_lut_multi_seg_pack([i], ldw, udw);
+   ilk_lut_12p4_pack([i], ldw, udw);
}
 
intel_de_write_fw(i915, PREC_PAL_MULTI_SEG_INDEX(pipe), 0);
-- 
2.37.4

[Intel-gfx] [PATCH 07/11] drm/i915: Pass limited_range explicitly to ilk_csc_convert_ctm()

[Ville Syrjala]

From: Ville Syrjälä 

Since pre-icl vs. icl+ handle the limited range
output stuff a bit differently it's probably
less confusing if we just pass that information
explicitly into ilk_csc_convert_ctm().

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index e881c95ee451..946fb767f3e0 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -259,14 +259,14 @@ static bool ilk_csc_limited_range(const struct 
intel_crtc_state *crtc_state)
 }
 
 static void ilk_csc_convert_ctm(const struct intel_crtc_state *crtc_state,
-   u16 coeffs[9])
+   u16 coeffs[9], bool limited_color_range)
 {
const struct drm_color_ctm *ctm = crtc_state->hw.ctm->data;
const u64 *input;
u64 temp[9];
int i;
 
-   if (ilk_csc_limited_range(crtc_state))
+   if (limited_color_range)
input = ctm_mult_by_limited(temp, ctm->matrix);
else
input = ctm->matrix;
@@ -319,7 +319,7 @@ static void ilk_load_csc_matrix(const struct 
intel_crtc_state *crtc_state)
if (crtc_state->hw.ctm) {
u16 coeff[9];
 
-   ilk_csc_convert_ctm(crtc_state, coeff);
+   ilk_csc_convert_ctm(crtc_state, coeff, limited_color_range);
ilk_update_pipe_csc(crtc, ilk_csc_off_zero, coeff,
limited_color_range ?
ilk_csc_postoff_limited_range :
@@ -354,7 +354,7 @@ static void icl_load_csc_matrix(const struct 
intel_crtc_state *crtc_state)
if (crtc_state->hw.ctm) {
u16 coeff[9];
 
-   ilk_csc_convert_ctm(crtc_state, coeff);
+   ilk_csc_convert_ctm(crtc_state, coeff, false);
ilk_update_pipe_csc(crtc, ilk_csc_off_zero,
coeff, ilk_csc_off_zero);
}
-- 
2.37.4

[Intel-gfx] [PATCH 03/11] drm/i915: s/dev_priv/i915/ in intel_color.c

[Ville Syrjala]

From: Ville Syrjälä 

Switch intel_color.c over to the modern 'i915' variable
naming scehme. The only exceptions are the i9xx LUT access
functions which still need the magic 'dev_priv' for the
register macros.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 278 ++---
 1 file changed, 139 insertions(+), 139 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 92cc43d5bad6..415e0a6839a4 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -184,31 +184,31 @@ static void ilk_update_pipe_csc(struct intel_crtc *crtc,
const u16 coeff[9],
const u16 postoff[3])
 {
-   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
 
-   intel_de_write_fw(dev_priv, PIPE_CSC_PREOFF_HI(pipe), preoff[0]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_PREOFF_ME(pipe), preoff[1]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_PREOFF_LO(pipe), preoff[2]);
+   intel_de_write_fw(i915, PIPE_CSC_PREOFF_HI(pipe), preoff[0]);
+   intel_de_write_fw(i915, PIPE_CSC_PREOFF_ME(pipe), preoff[1]);
+   intel_de_write_fw(i915, PIPE_CSC_PREOFF_LO(pipe), preoff[2]);
 
-   intel_de_write_fw(dev_priv, PIPE_CSC_COEFF_RY_GY(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_COEFF_RY_GY(pipe),
  coeff[0] << 16 | coeff[1]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_COEFF_BY(pipe), coeff[2] << 16);
+   intel_de_write_fw(i915, PIPE_CSC_COEFF_BY(pipe), coeff[2] << 16);
 
-   intel_de_write_fw(dev_priv, PIPE_CSC_COEFF_RU_GU(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_COEFF_RU_GU(pipe),
  coeff[3] << 16 | coeff[4]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_COEFF_BU(pipe), coeff[5] << 16);
+   intel_de_write_fw(i915, PIPE_CSC_COEFF_BU(pipe), coeff[5] << 16);
 
-   intel_de_write_fw(dev_priv, PIPE_CSC_COEFF_RV_GV(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_COEFF_RV_GV(pipe),
  coeff[6] << 16 | coeff[7]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_COEFF_BV(pipe), coeff[8] << 16);
+   intel_de_write_fw(i915, PIPE_CSC_COEFF_BV(pipe), coeff[8] << 16);
 
-   if (DISPLAY_VER(dev_priv) >= 7) {
-   intel_de_write_fw(dev_priv, PIPE_CSC_POSTOFF_HI(pipe),
+   if (DISPLAY_VER(i915) >= 7) {
+   intel_de_write_fw(i915, PIPE_CSC_POSTOFF_HI(pipe),
  postoff[0]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_POSTOFF_ME(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_POSTOFF_ME(pipe),
  postoff[1]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_POSTOFF_LO(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_POSTOFF_LO(pipe),
  postoff[2]);
}
 }
@@ -218,44 +218,44 @@ static void icl_update_output_csc(struct intel_crtc *crtc,
  const u16 coeff[9],
  const u16 postoff[3])
 {
-   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
 
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_PREOFF_HI(pipe), preoff[0]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_PREOFF_ME(pipe), preoff[1]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_PREOFF_LO(pipe), preoff[2]);
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_PREOFF_HI(pipe), preoff[0]);
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_PREOFF_ME(pipe), preoff[1]);
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_PREOFF_LO(pipe), preoff[2]);
 
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe),
  coeff[0] << 16 | coeff[1]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_COEFF_BY(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_COEFF_BY(pipe),
  coeff[2] << 16);
 
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe),
  coeff[3] << 16 | coeff[4]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_COEFF_BU(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_COEFF_BU(pipe),
  coeff[5] << 16);
 
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe),
  coeff[6] << 16 | coeff[7]);
-   intel_de_write_fw(dev_priv, PIPE_CSC_OUTPUT_COEFF_BV(pipe),
+   intel_de_write_fw(i915, PIPE_CSC_OUTPUT_COEFF_BV(pipe),
  coeff[8] << 16);
 

[Intel-gfx] [PATCH 05/11] drm/i915: Split ivb_load_lut_ext_max() into two parts

[Ville Syrjala]

From: Ville Syrjälä 

Split the EXT2_MAX register progrmaming into its own funciton.
More in line with the whole "cobble together stuff from small
pieces" approach used in this code.

The EXT(2)_MAX registers are also not really part of the
multi-segment section of the LUT, so hoise the calls to a
higher level, just like we do in other gamma modes as well.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 29 +++---
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index e73e6ea6f82f..3b78b882e0c0 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -764,27 +764,23 @@ static void bdw_load_lut_10(struct intel_crtc *crtc,
 static void ivb_load_lut_ext_max(const struct intel_crtc_state *crtc_state)
 {
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
 
/* Program the max register to clamp values > 1.0. */
intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 0), 1 << 16);
intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 1), 1 << 16);
intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 2), 1 << 16);
+}
 
-   /*
-* Program the gc max 2 register to clamp values > 1.0.
-* ToDo: Extend the ABI to be able to program values
-* from 3.0 to 7.0
-*/
-   if (DISPLAY_VER(i915) >= 10) {
-   intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 0),
-   1 << 16);
-   intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 1),
-   1 << 16);
-   intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 2),
-   1 << 16);
-   }
+static void glk_load_lut_ext2_max(const struct intel_crtc_state *crtc_state)
+{
+   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+   enum pipe pipe = crtc->pipe;
+
+   /* Program the max register to clamp values > 1.0. */
+   intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 0), 1 << 16);
+   intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 1), 1 << 16);
+   intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 2), 1 << 16);
 }
 
 static void ivb_load_luts(const struct intel_crtc_state *crtc_state)
@@ -913,6 +909,7 @@ static void glk_load_luts(const struct intel_crtc_state 
*crtc_state)
case GAMMA_MODE_MODE_10BIT:
bdw_load_lut_10(crtc, post_csc_lut, PAL_PREC_INDEX_VALUE(0));
ivb_load_lut_ext_max(crtc_state);
+   glk_load_lut_ext2_max(crtc_state);
break;
default:
MISSING_CASE(crtc_state->gamma_mode);
@@ -1029,7 +1026,6 @@ icl_program_gamma_multi_segment(const struct 
intel_crtc_state *crtc_state)
/* The last entry in the LUT is to be programmed in GCMAX */
entry = [256 * 8 * 128];
ivb_load_lut_max(crtc_state, entry);
-   ivb_load_lut_ext_max(crtc_state);
 }
 
 static void icl_load_luts(const struct intel_crtc_state *crtc_state)
@@ -1048,10 +1044,13 @@ static void icl_load_luts(const struct intel_crtc_state 
*crtc_state)
case GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED:
icl_program_gamma_superfine_segment(crtc_state);
icl_program_gamma_multi_segment(crtc_state);
+   ivb_load_lut_ext_max(crtc_state);
+   glk_load_lut_ext2_max(crtc_state);
break;
case GAMMA_MODE_MODE_10BIT:
bdw_load_lut_10(crtc, post_csc_lut, PAL_PREC_INDEX_VALUE(0));
ivb_load_lut_ext_max(crtc_state);
+   glk_load_lut_ext2_max(crtc_state);
break;
default:
MISSING_CASE(crtc_state->gamma_mode);
-- 
2.37.4

[Intel-gfx] [PATCH 04/11] drm/i915: s/icl_load_gcmax/ivb_load_lut_max/

[Ville Syrjala]

From: Ville Syrjälä 

Unify icl_load_gcmax() with the rest of the function
naming scheme by calling it ivb_load_lut_max() instead.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 415e0a6839a4..e73e6ea6f82f 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -935,8 +935,8 @@ static u32 ilk_lut_12p4_ldw(const struct drm_color_lut 
*color)
 }
 
 static void
-icl_load_gcmax(const struct intel_crtc_state *crtc_state,
-  const struct drm_color_lut *color)
+ivb_load_lut_max(const struct intel_crtc_state *crtc_state,
+const struct drm_color_lut *color)
 {
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
enum pipe pipe = crtc->pipe;
@@ -1028,7 +1028,7 @@ icl_program_gamma_multi_segment(const struct 
intel_crtc_state *crtc_state)
 
/* The last entry in the LUT is to be programmed in GCMAX */
entry = [256 * 8 * 128];
-   icl_load_gcmax(crtc_state, entry);
+   ivb_load_lut_max(crtc_state, entry);
ivb_load_lut_ext_max(crtc_state);
 }
 
-- 
2.37.4

[Intel-gfx] [PATCH 01/11] drm/i915: Use sizeof(variable) instead sizeof(type)

[Ville Syrjala]

From: Ville Syrjälä 

Use sizeof(variable) instead of sizeof(type) in the hopes of
less chance of screwing things up.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 4bb113c39f4b..92cc43d5bad6 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -565,7 +565,7 @@ create_linear_lut(struct drm_i915_private *i915, int 
lut_size)
int i;
 
blob = drm_property_create_blob(>drm,
-   sizeof(struct drm_color_lut) * lut_size,
+   sizeof(lut[0]) * lut_size,
NULL);
if (IS_ERR(blob))
return blob;
@@ -1895,7 +1895,7 @@ static struct drm_property_blob *i9xx_read_lut_8(struct 
intel_crtc *crtc)
int i;
 
blob = drm_property_create_blob(_priv->drm,
-   sizeof(struct drm_color_lut) * 
LEGACY_LUT_LENGTH,
+   sizeof(lut[0]) * LEGACY_LUT_LENGTH,
NULL);
if (IS_ERR(blob))
return NULL;
@@ -1930,7 +1930,7 @@ static struct drm_property_blob 
*i965_read_lut_10p6(struct intel_crtc *crtc)
struct drm_color_lut *lut;
 
blob = drm_property_create_blob(_priv->drm,
-   sizeof(struct drm_color_lut) * lut_size,
+   sizeof(lut[0]) * lut_size,
NULL);
if (IS_ERR(blob))
return NULL;
@@ -1973,7 +1973,7 @@ static struct drm_property_blob 
*chv_read_cgm_gamma(struct intel_crtc *crtc)
struct drm_color_lut *lut;
 
blob = drm_property_create_blob(_priv->drm,
-   sizeof(struct drm_color_lut) * lut_size,
+   sizeof(lut[0]) * lut_size,
NULL);
if (IS_ERR(blob))
return NULL;
@@ -2009,7 +2009,7 @@ static struct drm_property_blob *ilk_read_lut_8(struct 
intel_crtc *crtc)
int i;
 
blob = drm_property_create_blob(_priv->drm,
-   sizeof(struct drm_color_lut) * 
LEGACY_LUT_LENGTH,
+   sizeof(lut[0]) * LEGACY_LUT_LENGTH,
NULL);
if (IS_ERR(blob))
return NULL;
@@ -2034,7 +2034,7 @@ static struct drm_property_blob *ilk_read_lut_10(struct 
intel_crtc *crtc)
struct drm_color_lut *lut;
 
blob = drm_property_create_blob(_priv->drm,
-   sizeof(struct drm_color_lut) * lut_size,
+   sizeof(lut[0]) * lut_size,
NULL);
if (IS_ERR(blob))
return NULL;
@@ -2087,7 +2087,7 @@ static struct drm_property_blob *bdw_read_lut_10(struct 
intel_crtc *crtc,
drm_WARN_ON(_priv->drm, lut_size != hw_lut_size);
 
blob = drm_property_create_blob(_priv->drm,
-   sizeof(struct drm_color_lut) * lut_size,
+   sizeof(lut[0]) * lut_size,
NULL);
if (IS_ERR(blob))
return NULL;
@@ -2138,7 +2138,7 @@ icl_read_lut_multi_segment(struct intel_crtc *crtc)
struct drm_color_lut *lut;
 
blob = drm_property_create_blob(_priv->drm,
-   sizeof(struct drm_color_lut) * lut_size,
+   sizeof(lut[0]) * lut_size,
NULL);
if (IS_ERR(blob))
return NULL;
-- 
2.37.4

[Intel-gfx] [PATCH 00/11] drm/i915: More gamma work

[Ville Syrjala]

From: Ville Syrjälä 

Another serires of (mostly) cleanups to the color management
code.

The one functional thing in there is the last patch that
reworks how we handle the split gamma mode now that we
have a way to cook up internal LUTs.

Still not full readout+state check I'm afraid. That will
be in the next series.

Ville Syrjälä (11):
  drm/i915: Use sizeof(variable) instead sizeof(type)
  drm/i915: Use _MMIO_PIPE() for SKL_BOTTOM_COLOR
  drm/i915: s/dev_priv/i915/ in intel_color.c
  drm/i915: s/icl_load_gcmax/ivb_load_lut_max/
  drm/i915: Split ivb_load_lut_ext_max() into two parts
  drm/i915: Deconfuse the ilk+ 12.4 LUT entry functions
  drm/i915: Pass limited_range explicitly to ilk_csc_convert_ctm()
  drm/i915: Reuse ilk_gamma_mode() on ivb+
  drm/i915: Reject YCbCr output with degamma+gamma on pre-icl
  drm/i915: Share {csc,gamma}_enable calculation for ilk/snb vs. ivb+
  drm/i915: Create resized LUTs for ivb+ split gamma mode

 drivers/gpu/drm/i915/display/intel_color.c | 529 -
 drivers/gpu/drm/i915/i915_reg.h|   3 +-
 2 files changed, 302 insertions(+), 230 deletions(-)

-- 
2.37.4

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/sdvo: Fix LVDS fixed mode setup and clean up output setup

[Patchwork]

== Series Details ==

Series: drm/i915/sdvo: Fix LVDS fixed mode setup and clean up output setup
URL   : https://patchwork.freedesktop.org/series/110167/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12296 -> Patchwork_110167v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110167v1/index.html

Participating hosts (41 -> 38)
--

  Missing(3): fi-kbl-soraka fi-hsw-4770 fi-ctg-p8600 

Known issues


  Here are the changes found in Patchwork_110167v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_render_tiled_blits@basic:
- fi-apl-guc: [PASS][1] -> [INCOMPLETE][2] ([i915#7056])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/fi-apl-guc/igt@gem_render_tiled_bl...@basic.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110167v1/fi-apl-guc/igt@gem_render_tiled_bl...@basic.html

  * igt@i915_selftest@live@migrate:
- bat-adlp-4: [PASS][3] -> [INCOMPLETE][4] ([i915#7308])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-adlp-4/igt@i915_selftest@l...@migrate.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110167v1/bat-adlp-4/igt@i915_selftest@l...@migrate.html

  * igt@runner@aborted:
- bat-adlp-4: NOTRUN -> [FAIL][5] ([i915#4312])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110167v1/bat-adlp-4/igt@run...@aborted.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_pm:
- {bat-adln-1}:   [DMESG-FAIL][6] ([i915#4258]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-adln-1/igt@i915_selftest@live@gt_pm.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110167v1/bat-adln-1/igt@i915_selftest@live@gt_pm.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029
  [i915#7056]: https://gitlab.freedesktop.org/drm/intel/issues/7056
  [i915#7308]: https://gitlab.freedesktop.org/drm/intel/issues/7308


Build changes
-

  * Linux: CI_DRM_12296 -> Patchwork_110167v1

  CI-20190529: 20190529
  CI_DRM_12296: dc5600688adfc13fed8128d9043bab2257066646 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7026: ce0f97e7e0aa54c40049a8365b3d61773c92e588 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_110167v1: dc5600688adfc13fed8128d9043bab2257066646 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

6613542fa09d drm/i915/sdvo: Fix debug print
c5fcf53343f0 drm/i915/sdvo: Reduce copy-pasta in output setup
1da2bdd43d84 drm/i915/sdvo: Get rid of the output type<->device index stuff
7bfb424234a7 drm/i915/sdvo: Don't add DDC modes for LVDS
264624d6a939 drm/i915/sdvo: Simplify output setup debugs
c81bba47b6e1 drm/i915/sdvo: Grab mode_config.mutex during LVDS init to avoid 
WARNs
2d12fc433e94 drm/i915/sdvo: Setup DDC fully before output init
ddde8400db09 drm/i915/sdvo: Filter out invalid outputs more sensibly

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110167v1/index.html

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: stop abusing swiotlb_max_segment (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915: stop abusing swiotlb_max_segment (rev7)
URL   : https://patchwork.freedesktop.org/series/109946/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915/display: Change terminology for cdclk actions

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/display: Change terminology for 
cdclk actions
URL   : https://patchwork.freedesktop.org/series/110135/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12294_full -> Patchwork_110135v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_110135v1_full:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_pwrite@basic-exhaustion:
- {shard-rkl}:[SKIP][1] ([i915#3282]) -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-rkl-1/igt@gem_pwr...@basic-exhaustion.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110135v1/shard-rkl-5/igt@gem_pwr...@basic-exhaustion.html

  * igt@kms_color_chamelium@ctm-blue-to-red:
- {shard-rkl}:[SKIP][3] ([fdo#111827]) -> [SKIP][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-rkl-3/igt@kms_color_chamel...@ctm-blue-to-red.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110135v1/shard-rkl-5/igt@kms_color_chamel...@ctm-blue-to-red.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
- {shard-rkl}:[SKIP][5] ([i915#4098]) -> [SKIP][6] +2 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-rkl-3/igt@kms_cursor_...@cursor-offscreen-256x85.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110135v1/shard-rkl-5/igt@kms_cursor_...@cursor-offscreen-256x85.html

  * igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-d:
- {shard-rkl}:[SKIP][7] ([i915#4098] / [i915#533]) -> [SKIP][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-rkl-3/igt@kms_universal_pl...@universal-plane-pageflip-windowed-pipe-d.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110135v1/shard-rkl-5/igt@kms_universal_pl...@universal-plane-pageflip-windowed-pipe-d.html

  
Known issues


  Here are the changes found in Patchwork_110135v1_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-apl:  ([PASS][9], [PASS][10], [PASS][11], [PASS][12], 
[PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], 
[PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], 
[PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], 
[PASS][31], [PASS][32], [PASS][33]) -> ([PASS][34], [PASS][35], [PASS][36], 
[PASS][37], [FAIL][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], 
[PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], 
[PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], 
[PASS][55], [PASS][56], [PASS][57], [PASS][58]) ([i915#4386])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl1/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl1/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl1/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl1/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl2/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl2/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl2/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl2/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl3/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl3/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl3/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl3/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl3/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl6/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl6/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl6/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl7/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl7/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl7/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl7/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl7/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl8/boot.html
   [31]: 

Re: [Intel-gfx] [PATCH v3 6/6] freezer, sched: Rewrite core freezer logic

[Ville Syrjälä]

On Tue, Oct 25, 2022 at 12:49:13PM +0200, Peter Zijlstra wrote:
> On Tue, Oct 25, 2022 at 07:52:07AM +0300, Ville Syrjälä wrote:
> > On Fri, Oct 21, 2022 at 08:22:41PM +0300, Ville Syrjälä wrote:
> > > On Mon, Aug 22, 2022 at 01:18:22PM +0200, Peter Zijlstra wrote:
> > > > +#ifdef CONFIG_LOCKDEP
> > > > +   /*
> > > > +* It's dangerous to freeze with locks held; there be dragons 
> > > > there.
> > > > +*/
> > > > +   if (!(state & __TASK_FREEZABLE_UNSAFE))
> > > > +   WARN_ON_ONCE(debug_locks && p->lockdep_depth);
> > > > +#endif
> > > 
> > > We now seem to be hitting this sporadically in the intel gfx CI.
> > > 
> > > I've spotted it on two machines so far:
> > > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12270/shard-tglb7/igt@gem_ctx_isolation@preservation...@vcs0.html
> > > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109950v1/shard-snb5/igt@kms_flip@flip-vs-suspend-interrupti...@a-vga1.html
> > 
> > Sadly no luck in reproducing this locally so far. In the meantime
> > I added the following patch into our topic/core-for-CI branch in
> > the hopes of CI stumbling on it again and dumping a bit more data:
> > 
> > --- a/kernel/freezer.c
> > +++ b/kernel/freezer.c
> > @@ -125,8 +125,16 @@ static int __set_task_frozen(struct task_struct *p, 
> > void *arg)
> > /*
> >  * It's dangerous to freeze with locks held; there be dragons there.
> >  */
> > -   if (!(state & __TASK_FREEZABLE_UNSAFE))
> > -   WARN_ON_ONCE(debug_locks && p->lockdep_depth);
> > +   if (!(state & __TASK_FREEZABLE_UNSAFE)) {
> > +   static bool warned = false;
> > +
> > +   if (!warned && debug_locks && p->lockdep_depth) {
> > +   debug_show_held_locks(p);
> > +   WARN(1, "%s/%d holding locks while freezing\n",
> > +p->comm, task_pid_nr(p));
> > +   warned = true;
> > +   }
> > +   }
> >  #endif
> >  
> > WRITE_ONCE(p->__state, TASK_FROZEN);
> 
> That seems reasonable. But note that this constraint isn't new; the
> previous freezer had much the same constraint but perhaps it wasn't
> triggered for mysterious raisins. see the previous
> try_to_freeze_unsafe() function.

Looks like we caught one with the extra debugs now.

Short form looks to be this:
<4>[  355.437846] 1 lock held by rs:main Q:Reg/359:
<4>[  355.438418]  #0: 88844693b758 (>__lock){-.-.}-{2:2}, at: 
raw_spin_rq_lock_nested+0x1b/0x30
<4>[  355.438432] rs:main Q:Reg/359 holding locks while freezing

Based on a quick google that process seems to be some rsyslog thing.


Here's the full splat with the console_lock mess included:
<6>[  355.437502] Freezing user space processes ... 
<4>[  355.437846] 1 lock held by rs:main Q:Reg/359:

<4>[  355.437865] ==
<4>[  355.437866] WARNING: possible circular locking dependency detected
<4>[  355.437867] 6.1.0-rc2-CI_DRM_12295-g3844a56a0922+ #1 Tainted: G U 
   
<4>[  355.437870] --
<4>[  355.437871] rtcwake/6211 is trying to acquire lock:
<4>[  355.437872] 82735198 ((console_sem).lock){-.-.}-{2:2}, at: 
down_trylock+0xa/0x30
<4>[  355.437883] 
  but task is already holding lock:
<4>[  355.437885] 88810d0908e0 (>pi_lock){-.-.}-{2:2}, at: 
task_call_func+0x34/0xe0
<4>[  355.437893] 
  which lock already depends on the new lock.

<4>[  355.437894] 
  the existing dependency chain (in reverse order) is:
<4>[  355.437895] 
  -> #1 (>pi_lock){-.-.}-{2:2}:
<4>[  355.437899]lock_acquire+0xd3/0x310
<4>[  355.437903]_raw_spin_lock_irqsave+0x33/0x50
<4>[  355.437907]try_to_wake_up+0x6b/0x610
<4>[  355.437911]up+0x3b/0x50
<4>[  355.437914]__up_console_sem+0x5c/0x70
<4>[  355.437917]console_unlock+0x1bc/0x1d0
<4>[  355.437920]con_font_op+0x2e2/0x3a0
<4>[  355.437925]vt_ioctl+0x4f5/0x13b0
<4>[  355.437930]tty_ioctl+0x233/0x8e0
<4>[  355.437934]__x64_sys_ioctl+0x71/0xb0
<4>[  355.437938]do_syscall_64+0x3a/0x90
<4>[  355.437943]entry_SYSCALL_64_after_hwframe+0x63/0xcd
<4>[  355.437948] 
  -> #0 ((console_sem).lock){-.-.}-{2:2}:
<4>[  355.437952]validate_chain+0xb3d/0x2000
<4>[  355.437955]__lock_acquire+0x5a4/0xb70
<4>[  355.437958]lock_acquire+0xd3/0x310
<4>[  355.437960]_raw_spin_lock_irqsave+0x33/0x50
<4>[  355.437965]down_trylock+0xa/0x30
<4>[  355.437968]__down_trylock_console_sem+0x25/0xb0
<4>[  355.437971]console_trylock+0xe/0x70
<4>[  355.437974]vprintk_emit+0x13c/0x380
<4>[  355.437977]_printk+0x53/0x6e
<4>[  355.437981]lockdep_print_held_locks+0x5c/0xab
<4>[  355.437985]__set_task_frozen+0x6d/0xb0
<4>[  355.437989]task_call_func+0xc4/0xe0
<4>[  355.437993]freeze_task+0x84/0xe0

[Intel-gfx] [PATCH 7/8] drm/i915/sdvo: Reduce copy-pasta in output setup

[Ville Syrjala]

From: Ville Syrjälä 

Avoid having to call the output init function for each
output type separately. We can just call the right one
based on the "class" of the output.

Technically we could just walk the bits of the bitmask
but that could change the order in which we initialize
the outputs. To avoid any behavioural changes keep to
the same explicit probe order as before.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 66 +++
 1 file changed, 33 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c 
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 4784c05a1b71..58d147cc7633 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2922,11 +2922,38 @@ static u16 intel_sdvo_filter_output_flags(u16 flags)
return flags;
 }
 
+static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type)
+{
+   if (type & SDVO_TMDS_MASK)
+   return intel_sdvo_dvi_init(sdvo, type);
+   else if (type & SDVO_TV_MASK)
+   return intel_sdvo_tv_init(sdvo, type);
+   else if (type & SDVO_RGB_MASK)
+   return intel_sdvo_analog_init(sdvo, type);
+   else if (type & SDVO_LVDS_MASK)
+   return intel_sdvo_lvds_init(sdvo, type);
+   else
+   return false;
+}
+
 static bool
 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
 {
+   static const u16 probe_order[] = {
+   SDVO_OUTPUT_TMDS0,
+   SDVO_OUTPUT_TMDS1,
+   /* TV has no XXX1 function block */
+   SDVO_OUTPUT_SVID0,
+   SDVO_OUTPUT_CVBS0,
+   SDVO_OUTPUT_YPRPB0,
+   SDVO_OUTPUT_RGB0,
+   SDVO_OUTPUT_RGB1,
+   SDVO_OUTPUT_LVDS0,
+   SDVO_OUTPUT_LVDS1,
+   };
struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
u16 flags;
+   int i;
 
flags = intel_sdvo_filter_output_flags(intel_sdvo->caps.output_flags);
 
@@ -2940,42 +2967,15 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
 
intel_sdvo_select_ddc_bus(i915, intel_sdvo);
 
-   if (flags & SDVO_OUTPUT_TMDS0)
-   if (!intel_sdvo_dvi_init(intel_sdvo, SDVO_OUTPUT_TMDS0))
-   return false;
-
-   if (flags & SDVO_OUTPUT_TMDS1)
-   if (!intel_sdvo_dvi_init(intel_sdvo, SDVO_OUTPUT_TMDS1))
-   return false;
-
-   /* TV has no XXX1 function block */
-   if (flags & SDVO_OUTPUT_SVID0)
-   if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
-   return false;
-
-   if (flags & SDVO_OUTPUT_CVBS0)
-   if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
-   return false;
+   for (i = 0; i < ARRAY_SIZE(probe_order); i++) {
+   u16 type = flags & probe_order[i];
 
-   if (flags & SDVO_OUTPUT_YPRPB0)
-   if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
-   return false;
-
-   if (flags & SDVO_OUTPUT_RGB0)
-   if (!intel_sdvo_analog_init(intel_sdvo, SDVO_OUTPUT_RGB0))
-   return false;
-
-   if (flags & SDVO_OUTPUT_RGB1)
-   if (!intel_sdvo_analog_init(intel_sdvo, SDVO_OUTPUT_RGB1))
-   return false;
-
-   if (flags & SDVO_OUTPUT_LVDS0)
-   if (!intel_sdvo_lvds_init(intel_sdvo, SDVO_OUTPUT_LVDS0))
-   return false;
+   if (!type)
+   continue;
 
-   if (flags & SDVO_OUTPUT_LVDS1)
-   if (!intel_sdvo_lvds_init(intel_sdvo, SDVO_OUTPUT_LVDS1))
+   if (!intel_sdvo_output_init(intel_sdvo, type))
return false;
+   }
 
intel_sdvo->base.pipe_mask = ~0;
 
-- 
2.37.4

[Intel-gfx] [PATCH 3/8] drm/i915/sdvo: Grab mode_config.mutex during LVDS init to avoid WARNs

[Ville Syrjala]

From: Ville Syrjälä 

drm_mode_probed_add() is unhappy about being called w/o
mode_config.mutex. Grab it during LVDS fixed mode setup
to silence the WARNs.

Cc: sta...@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7301
Fixes: aa2b88074a56 ("drm/i915/sdvo: Fix multi function encoder stuff")
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c 
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index ccf81d616cb4..1eaaa7ec580e 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2899,8 +2899,12 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int 
device)
intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
 
if (!intel_panel_preferred_fixed_mode(intel_connector)) {
+   mutex_lock(>drm.mode_config.mutex);
+
intel_ddc_get_modes(connector, _sdvo->ddc);
intel_panel_add_edid_fixed_modes(intel_connector, false);
+
+   mutex_unlock(>drm.mode_config.mutex);
}
 
intel_panel_init(intel_connector);
-- 
2.37.4

[Intel-gfx] [PATCH 8/8] drm/i915/sdvo: Fix debug print

[Ville Syrjala]

From: Ville Syrjälä 

Correctly indicate which outputs we support in the debug print.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c 
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 58d147cc7633..e46b1ee4439d 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -3403,9 +3403,12 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
(intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
/* check currently supported outputs */
intel_sdvo->caps.output_flags &
-   (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
+   (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0 |
+SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_SVID0 |
+SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_YPRPB0) ? 'Y' : 'N',
intel_sdvo->caps.output_flags &
-   (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
+   (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1 |
+SDVO_OUTPUT_LVDS1) ? 'Y' : 'N');
return true;
 
 err_output:
-- 
2.37.4

[Intel-gfx] [PATCH 6/8] drm/i915/sdvo: Get rid of the output type<->device index stuff

[Ville Syrjala]

From: Ville Syrjälä 

Get rid of this silly output type<->device index back and
forth and just pass the output type directly to the corresponding
output init function. This was already being done for TV outputs
anyway.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 47 +--
 1 file changed, 19 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c 
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index d7943f9a96e7..4784c05a1b71 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2622,7 +2622,7 @@ intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
 }
 
 static bool
-intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
+intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo)
 {
return intel_sdvo_check_supp_encode(intel_sdvo);
 }
@@ -2727,7 +2727,7 @@ static struct intel_sdvo_connector 
*intel_sdvo_connector_alloc(void)
 }
 
 static bool
-intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
+intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)
 {
struct drm_encoder *encoder = _sdvo->base.base;
struct drm_connector *connector;
@@ -2735,16 +2735,13 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int 
device)
struct intel_connector *intel_connector;
struct intel_sdvo_connector *intel_sdvo_connector;
 
-   DRM_DEBUG_KMS("initialising DVI device %d\n", device);
+   DRM_DEBUG_KMS("initialising DVI type 0x%x\n", type);
 
intel_sdvo_connector = intel_sdvo_connector_alloc();
if (!intel_sdvo_connector)
return false;
 
-   if (device == 0)
-   intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
-   else if (device == 1)
-   intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
+   intel_sdvo_connector->output_flag = type;
 
intel_connector = _sdvo_connector->base;
connector = _connector->base;
@@ -2764,7 +2761,7 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int 
device)
encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
connector->connector_type = DRM_MODE_CONNECTOR_DVID;
 
-   if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
+   if (intel_sdvo_is_hdmi_connector(intel_sdvo)) {
connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
intel_sdvo_connector->is_hdmi = true;
}
@@ -2781,14 +2778,14 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int 
device)
 }
 
 static bool
-intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
+intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)
 {
struct drm_encoder *encoder = _sdvo->base.base;
struct drm_connector *connector;
struct intel_connector *intel_connector;
struct intel_sdvo_connector *intel_sdvo_connector;
 
-   DRM_DEBUG_KMS("initialising TV type %d\n", type);
+   DRM_DEBUG_KMS("initialising TV type 0x%x\n", type);
 
intel_sdvo_connector = intel_sdvo_connector_alloc();
if (!intel_sdvo_connector)
@@ -2820,14 +2817,14 @@ intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int 
type)
 }
 
 static bool
-intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
+intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, u16 type)
 {
struct drm_encoder *encoder = _sdvo->base.base;
struct drm_connector *connector;
struct intel_connector *intel_connector;
struct intel_sdvo_connector *intel_sdvo_connector;
 
-   DRM_DEBUG_KMS("initialising analog device %d\n", device);
+   DRM_DEBUG_KMS("initialising analog type 0x%x\n", type);
 
intel_sdvo_connector = intel_sdvo_connector_alloc();
if (!intel_sdvo_connector)
@@ -2839,10 +2836,7 @@ intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, 
int device)
encoder->encoder_type = DRM_MODE_ENCODER_DAC;
connector->connector_type = DRM_MODE_CONNECTOR_VGA;
 
-   if (device == 0)
-   intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
-   else if (device == 1)
-   intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
+   intel_sdvo_connector->output_flag = type;
 
if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
kfree(intel_sdvo_connector);
@@ -2853,7 +2847,7 @@ intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int 
device)
 }
 
 static bool
-intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
+intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
 {
struct drm_encoder *encoder = _sdvo->base.base;
struct drm_i915_private *i915 = to_i915(encoder->dev);
@@ -2861,7 +2855,7 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int 
device)
struct intel_connector *intel_connector;
struct intel_sdvo_connector *intel_sdvo_connector;
 
-   DRM_DEBUG_KMS("initialising LVDS device %d\n", 

[Intel-gfx] [PATCH 5/8] drm/i915/sdvo: Don't add DDC modes for LVDS

[Ville Syrjala]

From: Ville Syrjälä 

Stop enumerating the DDC modes for SDVO LVDS outputs (outside
the initial fixed mode setup). intel_panel_mode_valid() will
just reject most of them anyway, and any left over are entirely
pointless as they'll match the fixed mode hdisp+vdisp+vrefresh
so no user visible effect from using them instead of the fixed
mode.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c 
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index d432f70001b7..d7943f9a96e7 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2290,17 +2290,12 @@ static int intel_sdvo_get_tv_modes(struct drm_connector 
*connector)
 
 static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
 {
-   struct intel_sdvo *intel_sdvo = 
intel_attached_sdvo(to_intel_connector(connector));
struct drm_i915_private *dev_priv = to_i915(connector->dev);
-   int num_modes = 0;
 
drm_dbg_kms(_priv->drm, "[CONNECTOR:%d:%s]\n",
connector->base.id, connector->name);
 
-   num_modes += intel_panel_get_modes(to_intel_connector(connector));
-   num_modes += intel_ddc_get_modes(connector, _sdvo->ddc);
-
-   return num_modes;
+   return intel_panel_get_modes(to_intel_connector(connector));
 }
 
 static int intel_sdvo_get_modes(struct drm_connector *connector)
-- 
2.37.4

[Intel-gfx] [PATCH 4/8] drm/i915/sdvo: Simplify output setup debugs

[Ville Syrjala]

From: Ville Syrjälä 

Get rid of this funny byte based dumping of invalid output
flags and just dump it as a single hex numbers. Also do that
early since all the rest is going to get skipped anyway of
the thing is zero.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 25 ++-
 1 file changed, 11 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c 
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 1eaaa7ec580e..d432f70001b7 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -199,7 +199,7 @@ to_intel_sdvo_connector(struct drm_connector *connector)
container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 
 static bool
-intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags);
+intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo);
 static bool
 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  struct intel_sdvo_connector *intel_sdvo_connector,
@@ -2937,11 +2937,18 @@ static u16 intel_sdvo_filter_output_flags(u16 flags)
 }
 
 static bool
-intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
+intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
 {
struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+   u16 flags;
 
-   flags = intel_sdvo_filter_output_flags(flags);
+   flags = intel_sdvo_filter_output_flags(intel_sdvo->caps.output_flags);
+
+   if (flags == 0) {
+   DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%04x)\n",
+ SDVO_NAME(intel_sdvo), 
intel_sdvo->caps.output_flags);
+   return false;
+   }
 
intel_sdvo->controlled_output = flags;
 
@@ -2984,15 +2991,6 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, 
u16 flags)
if (!intel_sdvo_lvds_init(intel_sdvo, 1))
return false;
 
-   if (flags == 0) {
-   unsigned char bytes[2];
-
-   memcpy(bytes, _sdvo->caps.output_flags, 2);
-   DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
- SDVO_NAME(intel_sdvo),
- bytes[0], bytes[1]);
-   return false;
-   }
intel_sdvo->base.pipe_mask = ~0;
 
return true;
@@ -3368,8 +3366,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
intel_sdvo->colorimetry_cap =
intel_sdvo_get_colorimetry_cap(intel_sdvo);
 
-   if (intel_sdvo_output_setup(intel_sdvo,
-   intel_sdvo->caps.output_flags) != true) {
+   if (!intel_sdvo_output_setup(intel_sdvo)) {
drm_dbg_kms(_priv->drm,
"SDVO output failed to setup on %s\n",
SDVO_NAME(intel_sdvo));
-- 
2.37.4

[Intel-gfx] [PATCH 1/8] drm/i915/sdvo: Filter out invalid outputs more sensibly

[Ville Syrjala]

From: Ville Syrjälä 

We try to filter out the corresponding xxx1 output
if the xxx0 output is not present. But the way that is
being done is pretty awkward. Make it less so.

Cc: sta...@vger.kernel.org
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 29 ++-
 1 file changed, 23 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c 
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index cf8e80936d8e..c6200a91a777 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2925,16 +2925,33 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int 
device)
return false;
 }
 
-static bool
-intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
+static u16 intel_sdvo_filter_output_flags(u16 flags)
 {
+   flags &= SDVO_OUTPUT_MASK;
+
/* SDVO requires XXX1 function may not exist unless it has XXX0 
function.*/
+   if (!(flags & SDVO_OUTPUT_TMDS0))
+   flags &= ~SDVO_OUTPUT_TMDS1;
+
+   if (!(flags & SDVO_OUTPUT_RGB0))
+   flags &= ~SDVO_OUTPUT_RGB1;
+
+   if (!(flags & SDVO_OUTPUT_LVDS0))
+   flags &= ~SDVO_OUTPUT_LVDS1;
+
+   return flags;
+}
+
+static bool
+intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
+{
+   flags = intel_sdvo_filter_output_flags(flags);
 
if (flags & SDVO_OUTPUT_TMDS0)
if (!intel_sdvo_dvi_init(intel_sdvo, 0))
return false;
 
-   if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
+   if (flags & SDVO_OUTPUT_TMDS1)
if (!intel_sdvo_dvi_init(intel_sdvo, 1))
return false;
 
@@ -2955,7 +2972,7 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, 
u16 flags)
if (!intel_sdvo_analog_init(intel_sdvo, 0))
return false;
 
-   if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
+   if (flags & SDVO_OUTPUT_RGB1)
if (!intel_sdvo_analog_init(intel_sdvo, 1))
return false;
 
@@ -2963,11 +2980,11 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, 
u16 flags)
if (!intel_sdvo_lvds_init(intel_sdvo, 0))
return false;
 
-   if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
+   if (flags & SDVO_OUTPUT_LVDS1)
if (!intel_sdvo_lvds_init(intel_sdvo, 1))
return false;
 
-   if ((flags & SDVO_OUTPUT_MASK) == 0) {
+   if (flags == 0) {
unsigned char bytes[2];
 
intel_sdvo->controlled_output = 0;
-- 
2.37.4

[Intel-gfx] [PATCH 2/8] drm/i915/sdvo: Setup DDC fully before output init

[Ville Syrjala]

From: Ville Syrjälä 

Call intel_sdvo_select_ddc_bus() before initializing any
of the outputs. And before that is functional (assuming no VBT)
we have to set up the controlled_outputs thing. Otherwise DDC
won't be functional during the output init but LVDS really
needs it for the fixed mode setup.

Note that the whole multi output support still looks very
bogus, and more work will be needed to make it correct.
But for now this should at least fix the LVDS EDID fixed mode
setup.

Cc: sta...@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7301
Fixes: aa2b88074a56 ("drm/i915/sdvo: Fix multi function encoder stuff")
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 31 +--
 1 file changed, 12 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c 
b/drivers/gpu/drm/i915/display/intel_sdvo.c
index c6200a91a777..ccf81d616cb4 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2746,13 +2746,10 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int 
device)
if (!intel_sdvo_connector)
return false;
 
-   if (device == 0) {
-   intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
+   if (device == 0)
intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
-   } else if (device == 1) {
-   intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
+   else if (device == 1)
intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
-   }
 
intel_connector = _sdvo_connector->base;
connector = _connector->base;
@@ -2807,7 +2804,6 @@ intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int 
type)
encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
 
-   intel_sdvo->controlled_output |= type;
intel_sdvo_connector->output_flag = type;
 
if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
@@ -2848,13 +2844,10 @@ intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, 
int device)
encoder->encoder_type = DRM_MODE_ENCODER_DAC;
connector->connector_type = DRM_MODE_CONNECTOR_VGA;
 
-   if (device == 0) {
-   intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
+   if (device == 0)
intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
-   } else if (device == 1) {
-   intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
+   else if (device == 1)
intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
-   }
 
if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
kfree(intel_sdvo_connector);
@@ -2884,13 +2877,10 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int 
device)
encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
 
-   if (device == 0) {
-   intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
+   if (device == 0)
intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
-   } else if (device == 1) {
-   intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
+   else if (device == 1)
intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
-   }
 
if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
kfree(intel_sdvo_connector);
@@ -2945,8 +2935,14 @@ static u16 intel_sdvo_filter_output_flags(u16 flags)
 static bool
 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
 {
+   struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+
flags = intel_sdvo_filter_output_flags(flags);
 
+   intel_sdvo->controlled_output = flags;
+
+   intel_sdvo_select_ddc_bus(i915, intel_sdvo);
+
if (flags & SDVO_OUTPUT_TMDS0)
if (!intel_sdvo_dvi_init(intel_sdvo, 0))
return false;
@@ -2987,7 +2983,6 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, 
u16 flags)
if (flags == 0) {
unsigned char bytes[2];
 
-   intel_sdvo->controlled_output = 0;
memcpy(bytes, _sdvo->caps.output_flags, 2);
DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  SDVO_NAME(intel_sdvo),
@@ -3399,8 +3394,6 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
 */
intel_sdvo->base.cloneable = 0;
 
-   intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
-
/* Set the input timing to the screen. Assume always input 0. */
if (!intel_sdvo_set_target_input(intel_sdvo))
goto err_output;
-- 
2.37.4

[Intel-gfx] [PATCH 0/8] drm/i915/sdvo: Fix LVDS fixed mode setup and clean up output setup

[Ville Syrjala]

From: Ville Syrjälä 

Try to fix the LVDS EDID based fixed mode setup a bit. It got broken
when I moved it to happen during connector init rather than doing
it in a roundabout way from .get_modes().

I also did a bunch of refactoring to the output setup code because
the code was a mess.

Note that a lot of the output handling (especially for multi-output
encoders) is still pretty broken so more patches probably still
coming at some point.

Ville Syrjälä (8):
  drm/i915/sdvo: Filter out invalid outputs more sensibly
  drm/i915/sdvo: Setup DDC fully before output init
  drm/i915/sdvo: Grab mode_config.mutex during LVDS init to avoid WARNs
  drm/i915/sdvo: Simplify output setup debugs
  drm/i915/sdvo: Don't add DDC modes for LVDS
  drm/i915/sdvo: Get rid of the output type<->device index stuff
  drm/i915/sdvo: Reduce copy-pasta in output setup
  drm/i915/sdvo: Fix debug print

 drivers/gpu/drm/i915/display/intel_sdvo.c | 166 +++---
 1 file changed, 83 insertions(+), 83 deletions(-)

-- 
2.37.4

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/userptr: restore probe_range behaviour (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/userptr: restore probe_range behaviour (rev2)
URL   : https://patchwork.freedesktop.org/series/110083/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12296 -> Patchwork_110083v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/index.html

Participating hosts (41 -> 37)
--

  Missing(4): fi-kbl-soraka fi-ctg-p8600 fi-rkl-11600 fi-icl-u2 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_110083v2:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@module-reload:
- {bat-rpls-2}:   [WARN][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-rpls-2/igt@i915_pm_...@module-reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/bat-rpls-2/igt@i915_pm_...@module-reload.html

  
Known issues


  Here are the changes found in Patchwork_110083v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/fi-apl-guc/igt@gem_lmem_swapp...@basic.html

  * igt@kms_chamelium@hdmi-crc-fast:
- fi-apl-guc: NOTRUN -> [SKIP][4] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/fi-apl-guc/igt@kms_chamel...@hdmi-crc-fast.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-apl-guc: NOTRUN -> [SKIP][5] ([fdo#109271]) +11 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/fi-apl-guc/igt@kms_psr@sprite_plane_onoff.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- {bat-adlm-1}:   [DMESG-WARN][6] ([i915#2867]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_hangman@error-state-basic:
- fi-apl-guc: [DMESG-WARN][8] -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/fi-apl-guc/igt@i915_hang...@error-state-basic.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/fi-apl-guc/igt@i915_hang...@error-state-basic.html

  * igt@i915_selftest@live@gt_pm:
- {bat-adln-1}:   [DMESG-FAIL][10] ([i915#4258]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-adln-1/igt@i915_selftest@live@gt_pm.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/bat-adln-1/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@reset:
- {bat-rpls-1}:   [DMESG-FAIL][12] ([i915#4983] / [i915#5828]) -> 
[PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12296/bat-rpls-1/igt@i915_selftest@l...@reset.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110083v2/bat-rpls-1/igt@i915_selftest@l...@reset.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
  [i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029


Build changes
-

  * Linux: CI_DRM_12296 -> Patchwork_110083v2

  CI-20190529: 20190529
  CI_DRM_12296: dc5600688adfc13fed8128d9043bab2257066646 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7026: ce0f97e7e0aa54c40049a8365b3d61773c92e588 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_110083v2: dc5600688adfc13fed8128d9043bab2257066646 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

c1a5be7ad986 drm/i915/userptr: restore probe_range behaviour

== Logs ==

For more details see: 

Re: [Intel-gfx] [PATCH v5 02/31] drm/i915: Don't register backlight when another backlight should be used (v2)

[Hans de Goede]

Hi,

On 10/26/22 01:40, Matthew Garrett wrote:
> On Wed, Oct 26, 2022 at 01:27:25AM +0200, Hans de Goede wrote:
> 
>> this code should actually set the ACPI_VIDEO_BACKLIGHT flag:
>> drivers/acpi/scan.c:
>>
>> static acpi_status
>> acpi_backlight_cap_match(acpi_handle handle, u32 level, void *context,
>>   void **return_value)
>> {
>> long *cap = context;
>>
>> if (acpi_has_method(handle, "_BCM") &&
>> acpi_has_method(handle, "_BCL")) {
>> acpi_handle_debug(handle, "Found generic backlight 
>> support\n");
>> *cap |= ACPI_VIDEO_BACKLIGHT;
>> /* We have backlight support, no need to scan further */
>> return AE_CTRL_TERMINATE;
>> }
>> return 0;
>> }
> 
> Ah, yeah, my local tree no longer matches the upstream behaviour because 
> I've hacked the EC firmware to remove the backlight trigger because it 
> had an extremely poor brightness curve and also automatically changed it 
> on AC events - as a result I removed the backlight code from the DSDT 
> and just fell back to the native control. Like I said I'm a long way 
> from the normal setup, but this did previously work.

Ok, so this is a local customization to what is already a custom BIOS
for a custom motherboard. There is a lot of custom in that sentence and
TBH at some point things might become too custom for them to be expected
to work OOTB.

Note that you can always just override the choses made by the heuristisc/
quirks on the kernel commandline by adding:

acpi_backlight=native   (I think you want this one?)

or if you want the old thinkpad_acpi module vendor/EC interface:

acpi_backlight=vendor

Asking you to pass this on the commandline does not seem like a huge
stretch given the large amount of hw/firmware customization you have done ?

> The "right" logic here seems pretty simple: if ACPI backlight control is 
> expected to work, use it. If it isn't, but there's a vendor interface, 
> use it. If there's no vendor interface, use the native interface.

I'm afraid things are not that simple. I assume that with
"if ACPI backlight control is expected to work" you mean don't
use ACPI backlight control when (acpi_osi_is_win8() && native_available)
evaluates to true because it is known to be broken on some of
those systems because Windows 8 stopped using it ?

Unfortunately something similar applies to vendor interfaces,
When Windows XP started using (and mandating for certification
IIRC) ACPI backlight control, vendors still kept their own
vendor specific EC/smbios/ACPI/WMI backlight interfaces around for
a long long time, except they were often no longer tested.

So basically we have 3 major backlight control methods:

1. native GPU backlight control, which sometimes does not work
on older laptops because the backlight is connected to the EC
rather then the GPU there, yet often still enabled in the
video-bios-tables so the GPU drivers will still try to use it.

2. ACPI -> known to be always present on recent Windows laptops
because mandated by the hardware certification requirements
(even on Windows 8+), but regularly broken on Windows 8+ because
their backlight control was moved from the core-os to the GPU
drivers and those typically use the native method.

3. Vendor specific EC/smbios/ACPI/WMI interfaces which work
on older laptops, but are often present on newer laptops
despite them no longer working and to get working backlight
control either 1. or 2. should be used.

So basically non of the 3 main backlight control methods can
be trusted even if they are present. Which is why need to have
a combination of heuristics + quirks.

And I have been working on moving all this into a central
place in drivers/acpi/video_detect.c because having
the heuristics + quirks spread out all over the place does
not help.

> The 
> problem you're dealing with is that the knowledge of whether or not 
> there's a vendor interface isn't something the core kernel code knows 
> about. What you're proposing here is effectively for us to expose 
> additional information about whether or not there's a vendor interface 
> in the system firmware, but since we're talking in some cases about 
> hardware that's almost 20 years old, we're not realistically going to 
> get those old machines fixed.

I don't understand why you keep talking about the old vendor interfaces,
at least for the chromebook part of this thread the issue is that
the i915 driver no longer registers the intel_backlight device which
is a native device type, which is caused by the patch this email
thread is about (and old vendor interfaces do not come into play
at all here). So AFAICT this is a native vs acpi backlight control
issue ?

I really want to resolve your bug, but I still lack a lot of info,
like what backlight interface you were actually using in 6.0 ?

Can you please provide the following info for your laptop:

1. Output of "ls /sys/class/backlight" with 6.0  (working 

Re: [Intel-gfx] mm/huge_memory: do not clobber swp_entry_t during THP split

[Mel Gorman]

On Tue, Oct 25, 2022 at 08:26:06AM -0700, Hugh Dickins wrote:
> > 
> > > If so I
> > > can temporarily put it in until it arrives via the next rc - assuming that
> > > would be the flow from upstream pov?
> 
> The right thing for now is for GregKH to drop Mel's from 6.0.4:
> I've just sent a mail asking for that (I would have asked yesterday,
> but mistook that GregKH was not in Cc).
> 

Thanks for catching that, I only saw the mail this morning that it had been
picked up as a stable candidate and was internally screaming "no no no"
until I saw your mail :P. I added the warning thinking "we have almost a
full rc cycle to catch any additional fallout".

> Of course Mel's fix is much more important than the harmless
> (unless panic on warn) warning, but let's delay it a few more days,
> it just flowed into stable too quickly.
> 
> Thanks Mel: I never knowingly hit the THP_SWAP issue which your patch
> is fixing, but it now looks like it was also responsible for mysterious
> occasional OOM kills that I had been chasing for weeks.
> 

I'm glad it helped! I worried that the additional warning would trigger an
excessive number of new bugs but it served its intended purpose -- catch
fallout from clobbering page->private causing subtle bugs later that are
hard to debug.

-- 
Mel Gorman
SUSE Labs

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/dg2: Introduce Wa_18018764978

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/dg2: Introduce Wa_18018764978
URL   : https://patchwork.freedesktop.org/series/110131/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12294_full -> Patchwork_110131v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_110131v1_full:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_pwrite@basic-exhaustion:
- {shard-rkl}:[SKIP][1] ([i915#3282]) -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-rkl-1/igt@gem_pwr...@basic-exhaustion.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-rkl-5/igt@gem_pwr...@basic-exhaustion.html

  
Known issues


  Here are the changes found in Patchwork_110131v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][3] -> [FAIL][4] ([i915#6268])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-tglb2/igt@gem_ctx_e...@basic-nohangcheck.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-tglb5/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [PASS][5] -> [SKIP][6] ([i915#4525]) +2 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-iclb1/igt@gem_exec_balan...@parallel-bb-first.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-iclb8/igt@gem_exec_balan...@parallel-bb-first.html

  * igt@gem_lmem_swapping@smem-oom:
- shard-glk:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-glk9/igt@gem_lmem_swapp...@smem-oom.html

  * igt@gem_lmem_swapping@verify-random-ccs:
- shard-skl:  NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-skl7/igt@gem_lmem_swapp...@verify-random-ccs.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-tglb: NOTRUN -> [SKIP][9] ([i915#4270])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-tglb2/igt@gem_...@verify-pxp-key-change-after-suspend-resume.html

  * igt@gen3_render_tiledy_blits:
- shard-tglb: NOTRUN -> [SKIP][10] ([fdo#109289])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-tglb2/igt@gen3_render_tiledy_blits.html

  * igt@gen9_exec_parse@valid-registers:
- shard-tglb: NOTRUN -> [SKIP][11] ([i915#2527] / [i915#2856])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-tglb2/igt@gen9_exec_pa...@valid-registers.html

  * igt@i915_module_load@resize-bar:
- shard-tglb: NOTRUN -> [SKIP][12] ([i915#6412])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-tglb2/igt@i915_module_l...@resize-bar.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
- shard-glk:  NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1937])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-glk9/igt@i915_pm_lpsp@kms-l...@kms-lpsp-hdmi-a.html

  * igt@i915_pm_rpm@dpms-non-lpsp:
- shard-tglb: NOTRUN -> [SKIP][14] ([fdo#111644] / [i915#1397] / 
[i915#2411])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-tglb2/igt@i915_pm_...@dpms-non-lpsp.html

  * igt@i915_selftest@live@gt_heartbeat:
- shard-skl:  [PASS][15] -> [DMESG-FAIL][16] ([i915#5334])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-skl6/igt@i915_selftest@live@gt_heartbeat.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-skl4/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl:  [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +2 
similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12294/shard-apl2/igt@i915_susp...@fence-restore-tiled2untiled.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-apl6/igt@i915_susp...@fence-restore-tiled2untiled.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-glk:  NOTRUN -> [SKIP][19] ([fdo#109271]) +34 similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110131v1/shard-glk9/igt@kms_ato...@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
- shard-tglb:   

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Revert "drm/i915/uapi: expose GTT alignment"

[Matthew Auld]

On 26/10/2022 08:47, Patchwork wrote:

*Patch Details*
*Series:*   Revert "drm/i915/uapi: expose GTT alignment"
*URL:*	https://patchwork.freedesktop.org/series/110041/ 


*State:*failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/index.html 




  CI Bug Log - changes from CI_DRM_12284_full -> Patchwork_110041v1_full


Summary

*FAILURE*

Serious unknown changes coming with Patchwork_110041v1_full absolutely 
need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_110041v1_full, please notify your bug team to 
allow them

to document this new failure mode, which will reduce false positives in CI.


Participating hosts (11 -> 11)

No changes in participating hosts


Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_110041v1_full:



  IGT changes


Possible regressions

  *

igt@i915_pm_rpm@drm-resources-equal:

  o shard-iclb: PASS


 -> FAIL 

  *

igt@i915_selftest@live@guc_hang:

  o shard-skl: PASS


 -> INCOMPLETE 

  *

igt@i915_suspend@forcewake:

  o shard-skl: NOTRUN -> INCOMPLETE


 +1 similar issue





All look to be unrelated.


Warnings

  *

igt@kms_color@ctm-0-75@pipe-d-edp-1:

  o shard-tglb: FAIL


 (i915#315  / i915#6946 
) -> INCOMPLETE 

  *

igt@kms_cursor_legacy@flip-vs-cursor@atomic:

  o shard-skl: FAIL


 (i915#2346 ) -> INCOMPLETE 



Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *

igt@gem_mmap_offset@clear@smem0:

  o {shard-rkl}: PASS


 -> INCOMPLETE 

  *

igt@i915_pm_rc6_residency@rc6-idle@vcs0:

  o {shard-rkl}: PASS


 -> WARN 

  *

igt@i915_pm_rc6_residency@rc6-idle@vecs0:

  o {shard-rkl}: PASS


 -> FAIL 



Known issues

Here are the changes found in Patchwork_110041v1_full that come from 
known issues:



  CI changes


Issues hit

  * boot:
  o shard-glk: (PASS
, PASS , PASS , PASS , PASS 
, PASS , PASS , PASS , PASS 
, PASS , PASS 

Re: [Intel-gfx] [PATCH v2 00/16] drm/edid: EDID override refactoring and fixes

[Jani Nikula]

On Mon, 24 Oct 2022, Jani Nikula  wrote:
> v2 of drm/edid: EDID override refactoring and fixes
>
> Address review comments, add patch 15.

Thanks for the reviews, pushed the series to drm-misc-next.

BR,
Jani.


>
> BR,
> Jani.
>
>
> Jani Nikula (16):
>   drm/i915/hdmi: do dual mode detect only if connected
>   drm/i915/hdmi: stop using connector->override_edid
>   drm/amd/display: stop using connector->override_edid
>   drm/edid: debug log EDID override set/reset
>   drm/edid: abstract debugfs override EDID show better
>   drm/edid: rename drm_add_override_edid_modes() to
> drm_edid_override_connector_update()
>   drm/edid: split drm_edid block count helper
>   drm/edid: add function for checking drm_edid validity
>   drm/edid: detach debugfs EDID override from EDID property update
>   drm/edid/firmware: drop redundant connector_name variable/parameter
>   drm/edid/firmware: rename drm_load_edid_firmware() to
> drm_edid_load_firmware()
>   drm/edid: use struct drm_edid for override/firmware EDID
>   drm/edid: move edid load declarations to internal header
>   drm/edid/firmware: convert to drm device specific logging
>   drm/edid: add [CONNECTOR:%d:%s] to debug logging
>   drm/edid: convert to device specific logging
>
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   3 -
>  drivers/gpu/drm/drm_connector.c   |   1 +
>  drivers/gpu/drm/drm_crtc_internal.h   |  15 +-
>  drivers/gpu/drm/drm_debugfs.c |   8 +-
>  drivers/gpu/drm/drm_edid.c| 346 +++---
>  drivers/gpu/drm/drm_edid_load.c   | 109 ++
>  drivers/gpu/drm/drm_probe_helper.c|   2 +-
>  drivers/gpu/drm/i915/display/intel_hdmi.c |  20 +-
>  include/drm/drm_connector.h   |  16 +-
>  include/drm/drm_edid.h|  10 +-
>  10 files changed, 283 insertions(+), 247 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [linus:master] [i915] f683b9d613: igt.gem_userptr_blits.probe.fail

[Yujie Liu]

Hi Liam,

On Mon, Oct 24, 2022 at 03:07:54PM +, Liam Howlett wrote:
> * kernel test robot  [221024 01:06]:
> > 
> > Greeting,
> > 
> > FYI, we noticed igt.gem_userptr_blits.probe.fail due to commit (built with 
> > gcc-11):
> > 
> > commit: f683b9d613193362ceb954c216f663a43c027302 ("i915: use the VMA 
> > iterator")
> > https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git master
> > 
> > in testcase: igt
> > version: igt-x86_64-cf55acde-1_20221012
> > with following parameters:
> > 
> > group: group-13
> > 
> > 
> > 
> > on test machine: 20 threads 1 sockets (Commet Lake) with 16G memory
> > 
> > caused below changes (please refer to attached dmesg/kmsg for entire 
> > log/backtrace):
> > 
> > 
> > 
> > 
> > If you fix the issue, kindly add following tag
> > | Reported-by: kernel test robot 
> > | Link: 
> > https://lore.kernel.org/r/202210241246.68be2f11-oliver.s...@intel.com
> > 
> > 
> > 
> > 2022-10-24 03:27:39 build/tests/gem_userptr_blits --run-subtest probe
> > IGT-Version: 1.26-gcf55acde (x86_64) (Linux: 6.0.0-rc3-00280-gf683b9d61319 
> > x86_64)
> > Aperture size is 268435456 MiB
> > Total RAM is 13505 MiB
> > Not enough RAM to run test, reducing buffer count.
> > Test requirement not met in function __igt_uniquereal_main2320, file 
> > ../tests/i915/gem_userptr_blits.c:2401:
> > Test requirement: has_userptr(fd)
> > Starting subtest: probe
> > (gem_userptr_blits:1984) CRITICAL: Test assertion failure function 
> > test_probe, file ../tests/i915/gem_userptr_blits.c:2231:
> > (gem_userptr_blits:1984) CRITICAL: Failed assertion: __gem_userptr(fd, ptr 
> > + 4096, 3*4096, 0, 0x2, ) == expected
> > (gem_userptr_blits:1984) CRITICAL: Last errno: 14, Bad address
> > (gem_userptr_blits:1984) CRITICAL: error: 0 != -14
> > Subtest probe failed.
> >  DEBUG 
> > (gem_userptr_blits:1984) DEBUG: Test requirement passed: 
> > has_userptr_probe(fd)
> > (gem_userptr_blits:1984) CRITICAL: Test assertion failure function 
> > test_probe, file ../tests/i915/gem_userptr_blits.c:2231:
> > (gem_userptr_blits:1984) CRITICAL: Failed assertion: __gem_userptr(fd, ptr 
> > + 4096, 3*4096, 0, 0x2, ) == expected
> > (gem_userptr_blits:1984) CRITICAL: Last errno: 14, Bad address
> > (gem_userptr_blits:1984) CRITICAL: error: 0 != -14
> > (gem_userptr_blits:1984) igt_core-INFO: Stack trace:
> > (gem_userptr_blits:1984) igt_core-INFO:   #0 [__igt_fail_assert+0x106]
> > (gem_userptr_blits:1984) igt_core-INFO:   #1 
> > ../tests/i915/gem_userptr_blits.c:801 __igt_uniquereal_main2320()
> > (gem_userptr_blits:1984) igt_core-INFO:   #2 
> > ../tests/i915/gem_userptr_blits.c:2320 main()
> > (gem_userptr_blits:1984) igt_core-INFO:   #3 ../csu/libc-start.c:308 
> > __libc_start_main()
> > (gem_userptr_blits:1984) igt_core-INFO:   #4 [_start+0x2a]
> >   END  
> > Stack trace:
> >   #0 [__igt_fail_assert+0x106]
> >   #1 ../tests/i915/gem_userptr_blits.c:801 __igt_uniquereal_main2320()
> >   #2 ../tests/i915/gem_userptr_blits.c:2320 main()
> >   #3 ../csu/libc-start.c:308 __libc_start_main()
> >   #4 [_start+0x2a]
> > Subtest probe: FAIL (0.052s)
> > 
> > 
> > 
> > To reproduce:
> > 
> > git clone https://github.com/intel/lkp-tests.git
> > cd lkp-tests
> > sudo bin/lkp install job.yaml   # job file is attached in 
> > this email
> > bin/lkp split-job --compatible job.yaml # generate the yaml file 
> > for lkp run
> > sudo bin/lkp run generated-yaml-file
> > 
> > # if come across any failure that blocks the test,
> > # please remove ~/.lkp and /lkp dir to run from a clean state.
> > 
> 
> These steps seem insufficient.  Initially, it failed complaining about a
> missing config so I created the directory manually and copied the
> confing in only to have it fail again:
> 
> lkp-tests/filters/need_kconfig_hw.rb:11:in `load_kernel_context':
> context.yaml doesn't exist:
> /pkg/linux/x86_64-rhel-8.3-func/gcc-11/f683b9d613193362ceb954c216f663a43c027302/context.yaml
> 
> Is there a full set of instructions for recreation?

Sorry for the unclear reproducing steps. Seems it is due to bug in our
split-job code, we will fix it soon. Could you please try below steps
instead to see if the problem can be reproduced? Thanks.


# Build kernel on commit f683b9d61319 with the attached config in
# original report, and boot it on a machine.

$ git clone https://github.com/intel/lkp-tests.git
$ cd lkp-tests
$ bin/lkp split-job --compatible jobs/igt-part2.yaml
jobs/igt-part2.yaml => ./igt-part2-group-10.yaml
jobs/igt-part2.yaml => ./igt-part2-group-11.yaml
jobs/igt-part2.yaml => ./igt-part2-group-12.yaml
jobs/igt-part2.yaml => ./igt-part2-group-13.yaml
jobs/igt-part2.yaml => ./igt-part2-group-14.yaml
jobs/igt-part2.yaml => ./igt-part2-group-15.yaml
jobs/igt-part2.yaml => ./igt-part2-group-16.yaml
jobs/igt-part2.yaml => ./igt-part2-group-17.yaml
jobs/igt-part2.yaml => ./igt-part2-group-18.yaml
jobs/igt-part2.yaml => ./igt-part2-group-19.yaml

$ sudo 

Re: [Intel-gfx] [CI 1/4] drm/i915/display: Change terminology for cdclk actions

[Jani Nikula]

On Tue, 25 Oct 2022, Anusha Srivatsa  wrote:
> No functional changes. Changing terminology in some
> print statements. s/has_cdclk_squasher/has_cdclk_squash,
> s/crawler/crawl and s/squasher/squash.

Any particular reason you re-sent this for CI? You know you can re-run
tests from the patchwork page if the patches remain unchanged?

BR,
Jani.


>
> Cc: Balasubramani Vivekanandan 
> Cc: Ville Syrjälä 
> Signed-off-by: Anusha Srivatsa 
> Reviewed-by: Balasubramani Vivekanandan 
> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 16 
>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index ad401357ab66..0f5add2fc51b 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1220,7 +1220,7 @@ static void skl_cdclk_uninit_hw(struct drm_i915_private 
> *dev_priv)
>   skl_set_cdclk(dev_priv, _config, INVALID_PIPE);
>  }
>  
> -static bool has_cdclk_squasher(struct drm_i915_private *i915)
> +static bool has_cdclk_squash(struct drm_i915_private *i915)
>  {
>   return IS_DG2(i915);
>  }
> @@ -1520,7 +1520,7 @@ static void bxt_get_cdclk(struct drm_i915_private 
> *dev_priv,
>   return;
>   }
>  
> - if (has_cdclk_squasher(dev_priv))
> + if (has_cdclk_squash(dev_priv))
>   squash_ctl = intel_de_read(dev_priv, CDCLK_SQUASH_CTL);
>  
>   if (squash_ctl & CDCLK_SQUASH_ENABLE) {
> @@ -1747,7 +1747,7 @@ static void bxt_set_cdclk(struct drm_i915_private 
> *dev_priv,
>   else
>   clock = cdclk;
>  
> - if (has_cdclk_squasher(dev_priv)) {
> + if (has_cdclk_squash(dev_priv)) {
>   u32 squash_ctl = 0;
>  
>   if (waveform)
> @@ -1845,7 +1845,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private 
> *dev_priv)
>   expected = skl_cdclk_decimal(cdclk);
>  
>   /* Figure out what CD2X divider we should be using for this cdclk */
> - if (has_cdclk_squasher(dev_priv))
> + if (has_cdclk_squash(dev_priv))
>   clock = dev_priv->display.cdclk.hw.vco / 2;
>   else
>   clock = dev_priv->display.cdclk.hw.cdclk;
> @@ -1976,7 +1976,7 @@ static bool intel_cdclk_can_squash(struct 
> drm_i915_private *dev_priv,
>* the moment all platforms with squasher use a fixed cd2x
>* divider.
>*/
> - if (!has_cdclk_squasher(dev_priv))
> + if (!has_cdclk_squash(dev_priv))
>   return false;
>  
>   return a->cdclk != b->cdclk &&
> @@ -2028,7 +2028,7 @@ static bool intel_cdclk_can_cd2x_update(struct 
> drm_i915_private *dev_priv,
>* the moment all platforms with squasher use a fixed cd2x
>* divider.
>*/
> - if (has_cdclk_squasher(dev_priv))
> + if (has_cdclk_squash(dev_priv))
>   return false;
>  
>   return a->cdclk != b->cdclk &&
> @@ -2754,12 +2754,12 @@ int intel_modeset_calc_cdclk(struct 
> intel_atomic_state *state)
>  _cdclk_state->actual,
>  _cdclk_state->actual)) {
>   drm_dbg_kms(_priv->drm,
> - "Can change cdclk via squasher\n");
> + "Can change cdclk via squashing\n");
>   } else if (intel_cdclk_can_crawl(dev_priv,
>_cdclk_state->actual,
>_cdclk_state->actual)) {
>   drm_dbg_kms(_priv->drm,
> - "Can change cdclk via crawl\n");
> + "Can change cdclk via crawling\n");
>   } else if (pipe != INVALID_PIPE) {
>   new_cdclk_state->pipe = pipe;

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.IGT: failure for Revert "drm/i915/uapi: expose GTT alignment"

[Patchwork]

== Series Details ==

Series: Revert "drm/i915/uapi: expose GTT alignment"
URL   : https://patchwork.freedesktop.org/series/110041/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12284_full -> Patchwork_110041v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_110041v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_110041v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_110041v1_full:

### IGT changes ###

 Possible regressions 

  * igt@i915_pm_rpm@drm-resources-equal:
- shard-iclb: [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-iclb3/igt@i915_pm_...@drm-resources-equal.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/shard-iclb8/igt@i915_pm_...@drm-resources-equal.html

  * igt@i915_selftest@live@guc_hang:
- shard-skl:  [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-skl9/igt@i915_selftest@live@guc_hang.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/shard-skl6/igt@i915_selftest@live@guc_hang.html

  * igt@i915_suspend@forcewake:
- shard-skl:  NOTRUN -> [INCOMPLETE][5] +1 similar issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/shard-skl4/igt@i915_susp...@forcewake.html

  
 Warnings 

  * igt@kms_color@ctm-0-75@pipe-d-edp-1:
- shard-tglb: [FAIL][6] ([i915#315] / [i915#6946]) -> 
[INCOMPLETE][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-tglb6/igt@kms_color@ctm-0...@pipe-d-edp-1.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/shard-tglb8/igt@kms_color@ctm-0...@pipe-d-edp-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic:
- shard-skl:  [FAIL][8] ([i915#2346]) -> [INCOMPLETE][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-skl6/igt@kms_cursor_legacy@flip-vs-cur...@atomic.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/shard-skl9/igt@kms_cursor_legacy@flip-vs-cur...@atomic.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_mmap_offset@clear@smem0:
- {shard-rkl}:[PASS][10] -> [INCOMPLETE][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-rkl-4/igt@gem_mmap_offset@cl...@smem0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/shard-rkl-5/igt@gem_mmap_offset@cl...@smem0.html

  * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-rkl}:[PASS][12] -> [WARN][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-rkl-4/igt@i915_pm_rc6_residency@rc6-i...@vcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-i...@vcs0.html

  * igt@i915_pm_rc6_residency@rc6-idle@vecs0:
- {shard-rkl}:[PASS][14] -> [FAIL][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-rkl-4/igt@i915_pm_rc6_residency@rc6-i...@vecs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110041v1/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-i...@vecs0.html

  
Known issues


  Here are the changes found in Patchwork_110041v1_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-glk:  ([PASS][16], [PASS][17], [PASS][18], [PASS][19], 
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], 
[PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], 
[PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], 
[PASS][38], [PASS][39], [PASS][40]) -> ([PASS][41], [PASS][42], [PASS][43], 
[PASS][44], [PASS][45], [PASS][46], [FAIL][47], [PASS][48], [PASS][49], 
[PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], 
[PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], 
[PASS][62], [PASS][63], [PASS][64], [PASS][65]) ([i915#4392])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-glk9/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-glk9/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-glk9/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-glk8/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12284/shard-glk8/boot.html
   [21]: 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/xelp: Add Wa_1806527549 (rev2)

[Vudum, Lakshminarayana]

Filed a new issue and re-reported. Rest are known issues.
https://gitlab.freedesktop.org/drm/intel/-/issues/7320

-Original Message-
From: Sousa, Gustavo  
Sent: Tuesday, October 25, 2022 2:55 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vudum, Lakshminarayana 
Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/xelp: Add Wa_1806527549 (rev2)

On Thu, Oct 20, 2022 at 01:00:27AM +, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/xelp: Add Wa_1806527549 (rev2)
> URL   : https://patchwork.freedesktop.org/series/109885/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_12261_full -> Patchwork_109885v2_full
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_109885v2_full absolutely need 
> to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_109885v2_full, please notify your bug team to allow 
> them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Participating hosts (9 -> 12)
> --
> 
>   Additional (3): shard-rkl shard-dg1 shard-tglu 
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_109885v2_full:
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@i915_selftest@live@mman:
> - shard-skl:  NOTRUN -> [INCOMPLETE][1] +1 similar issue
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl2/igt@i915_selftest@l...@mman.html

Not related to this patch, as the workaround does not target this platform.

> 
>   * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
> - shard-iclb: [PASS][2] -> [FAIL][3]
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-iclb8/igt@kms_big...@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-iclb2/igt@kms_big...@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

Existing issue: http://gfx-ci.fi.intel.com/cibuglog-ng/issue/7783

> 
>   * igt@kms_plane_lowres@tiling-none@pipe-b-hdmi-a-1:
> - shard-glk:  [PASS][4] -> [FAIL][5]
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk9/igt@kms_plane_lowres@tiling-n...@pipe-b-hdmi-a-1.html
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk3/igt@kms_plane_lowres@tiling-n...@pipe-b-hdmi-a-1.html

Maybe related to http://gfx-ci.fi.intel.com/cibuglog-ng/issue/7841 ?

Nevertheless, not related to this patch, as the workaround does not target this 
platform.

> 
>   
>  Warnings 
> 
>   * igt@runner@aborted:
> - shard-skl:  ([FAIL][6], [FAIL][7], [FAIL][8], [FAIL][9], 
> [FAIL][10]) ([i915#3002] / [i915#4312] / [i915#6949]) -> ([FAIL][11], 
> [FAIL][12], [FAIL][13], [FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17], 
> [FAIL][18]) ([i915#3002] / [i915#4312])
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-skl4/igt@run...@aborted.html
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-skl6/igt@run...@aborted.html
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-skl2/igt@run...@aborted.html
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-skl6/igt@run...@aborted.html
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-skl10/igt@run...@aborted.html
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl5/igt@run...@aborted.html
>[12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl5/igt@run...@aborted.html
>[13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl10/igt@run...@aborted.html
>[14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl7/igt@run...@aborted.html
>[15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl10/igt@run...@aborted.html
>[16]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl4/igt@run...@aborted.html
>[17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl1/igt@run...@aborted.html
>[18]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-skl2/igt@run...@aborted.html
> 
>   
>  Suppressed 
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@gem_pwrite@basic-exhaustion:
> - {shard-rkl}:NOTRUN -> [INCOMPLETE][19]
>[19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-rkl-5/igt@gem_pwr...@basic-exhaustion.html
> 
>   * igt@kms_big_fb@linear-64bpp-rotate-0:
> - {shard-dg1}:NOTRUN -> [FAIL][20]
>[20]: 
> 

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix Guc-Err-Capture sizing warning

[Patchwork]

== Series Details ==

Series: Fix Guc-Err-Capture sizing warning
URL   : https://patchwork.freedesktop.org/series/110155/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12295 -> Patchwork_110155v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/index.html

Participating hosts (41 -> 38)
--

  Missing(3): fi-ctg-p8600 fi-kbl-x1275 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_110155v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-b-dp-3:
- {bat-dg2-11}:   NOTRUN -> [FAIL][1] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-b-dp-3.html

  
Known issues


  Here are the changes found in Patchwork_110155v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-4770:NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#111827])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/fi-hsw-4770/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-bdw-5557u:   NOTRUN -> [SKIP][3] ([fdo#109271] / [fdo#111827])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/fi-bdw-5557u/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-rkl-guc: NOTRUN -> [SKIP][4] ([fdo#111827])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/fi-rkl-guc/igt@kms_chamel...@common-hpd-after-suspend.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- fi-bdw-5557u:   [DMESG-WARN][5] -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12295/fi-bdw-5557u/igt@gem_exec_suspend@basic...@smem.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/fi-bdw-5557u/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_exec_suspend@basic-s3@smem:
- {bat-rplp-1}:   [DMESG-WARN][7] ([i915#2867]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12295/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/bat-rplp-1/igt@gem_exec_suspend@basic...@smem.html
- {bat-adlm-1}:   [DMESG-WARN][9] ([i915#2867]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12295/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html
- {bat-rpls-1}:   [DMESG-WARN][11] ([i915#6687]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12295/bat-rpls-1/igt@gem_exec_suspend@basic...@smem.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/bat-rpls-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_engines:
- fi-rkl-guc: [INCOMPLETE][13] ([i915#4418]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12295/fi-rkl-guc/igt@i915_selftest@live@gt_engines.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/fi-rkl-guc/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-bdw-5557u:   [DMESG-FAIL][15] ([i915#5334]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12295/fi-bdw-5557u/igt@i915_selftest@live@gt_heartbeat.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/fi-bdw-5557u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[INCOMPLETE][17] ([i915#4785]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12295/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-3:
- {bat-dg2-11}:   [FAIL][19] ([i915#6818]) -> [PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12295/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-3.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110155v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-3.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1845]: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix Guc-Err-Capture sizing warning

[Patchwork]

== Series Details ==

Series: Fix Guc-Err-Capture sizing warning
URL   : https://patchwork.freedesktop.org/series/110155/
State : warning

== Summary ==

Error: dim checkpatch failed
2590baca57ed drm/i915/guc: Fix GuC error capture sizing estimation and reporting
-:24: WARNING:BAD_FIXES_TAG: Please use correct Fixes: style 'Fixes: <12 chars 
of sha1> ("")' - ie: 'Fixes: 2590baca57ed ("drm/i915/guc: Fix GuC 
error capture sizing estimation and reporting")'
#24: 
Fixes d7c15d76a5547: drm/i915/guc: Check sizing of guc_capture output

total: 0 errors, 1 warnings, 0 checks, 86 lines checked

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/xelp: Add Wa_1806527549 (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/xelp: Add Wa_1806527549 (rev2)
URL   : https://patchwork.freedesktop.org/series/109885/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12261_full -> Patchwork_109885v2_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (9 -> 12)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_109885v2_full:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_pwrite@basic-exhaustion:
- {shard-rkl}:NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-rkl-5/igt@gem_pwr...@basic-exhaustion.html

  * igt@kms_big_fb@linear-64bpp-rotate-0:
- {shard-dg1}:NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-dg1-13/igt@kms_big...@linear-64bpp-rotate-0.html

  
Known issues


  Here are the changes found in Patchwork_109885v2_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-glk:  ([PASS][3], [PASS][4], [PASS][5], [PASS][6], 
[PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], 
[PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], 
[PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], 
[PASS][25], [PASS][26], [PASS][27]) -> ([PASS][28], [PASS][29], [PASS][30], 
[PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], 
[PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], 
[PASS][43], [FAIL][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], 
[PASS][49], [PASS][50], [PASS][51], [PASS][52]) ([i915#4392])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk3/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk9/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk9/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk9/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk9/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk8/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk8/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk8/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk7/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk7/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk6/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk6/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk6/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk5/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk5/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk1/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk1/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk1/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk2/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk2/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk5/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk3/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk3/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk2/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12261/shard-glk2/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk9/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk9/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk8/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk8/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk8/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk7/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk7/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk7/boot.html
   [36]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109885v2/shard-glk6/boot.html
   [37]: 

[Intel-gfx] [PATCH v4 1/1] drm/i915/guc: Fix GuC error capture sizing estimation and reporting

[Alan Previn]

During GuC error capture initialization, we estimate the amount of size
we need for the error-capture-region of the shared GuC-log-buffer.
This calculation was incorrect so fix that. With the fixed calculation
we can reduce the allocation of error-capture region from 4MB to 1MB
(see note2 below for reasoning). Additionally, switch from drm_notice to
drm_debug for the 3X spare size check since that would be impossible to
hit without redesigning gpu_coredump framework to hold multiple captures.

NOTE1: Even for 1x the min size estimation case, actually running out
of space is a corner case because it can only occur if all engine
instances get reset all at once and i915 isn't able extract the capture
data fast enough within G2H handler worker.

NOTE2: With the corrected calculation, a DG2 part required ~77K and a PVC
required ~115K (1X min-est-size that is calculated as one-shot all-engine-
reset scenario).

Fixes d7c15d76a5547: drm/i915/guc: Check sizing of guc_capture output

Signed-off-by: Alan Previn 
---
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 29 ---
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c|  6 ++--
 2 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index c4bee3bc15a9..4e6dca707d94 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -559,8 +559,9 @@ guc_capture_getlistsize(struct intel_guc *guc, u32 owner, 
u32 type, u32 classid,
if (!num_regs)
return -ENODATA;
 
-   *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
-  (num_regs * sizeof(struct guc_mmio_reg)));
+   if (size)
+   *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
+  (num_regs * sizeof(struct guc_mmio_reg)));
 
return 0;
 }
@@ -670,7 +671,7 @@ guc_capture_output_min_size_est(struct intel_guc *guc)
struct intel_gt *gt = guc_to_gt(guc);
struct intel_engine_cs *engine;
enum intel_engine_id id;
-   int worst_min_size = 0, num_regs = 0;
+   int worst_min_size = 0;
size_t tmp = 0;
 
if (!guc->capture)
@@ -692,20 +693,18 @@ guc_capture_output_min_size_est(struct intel_guc *guc)
 (3 * sizeof(struct 
guc_state_capture_header_t));
 
if (!guc_capture_getlistsize(guc, 0, 
GUC_CAPTURE_LIST_TYPE_GLOBAL, 0, , true))
-   num_regs += tmp;
+   worst_min_size += tmp;
 
if (!guc_capture_getlistsize(guc, 0, 
GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS,
 engine->class, , true)) {
-   num_regs += tmp;
+   worst_min_size += tmp;
}
if (!guc_capture_getlistsize(guc, 0, 
GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE,
 engine->class, , true)) {
-   num_regs += tmp;
+   worst_min_size += tmp;
}
}
 
-   worst_min_size += (num_regs * sizeof(struct guc_mmio_reg));
-
return worst_min_size;
 }
 
@@ -722,15 +721,23 @@ static void check_guc_capture_size(struct intel_guc *guc)
int spare_size = min_size * GUC_CAPTURE_OVERBUFFER_MULTIPLIER;
u32 buffer_size = intel_guc_log_section_size_capture(>log);
 
+   /*
+* NOTE: min_size is much smaller than the capture region allocation 
(DG2: <80K vs 1MB)
+* Additionally, its based on space needed to fit all engines getting 
reset at once
+* within the same G2H handler task slot. This is very unlikely. 
However, if GuC really
+* does run out of space for whatever reason, we will see an separate 
warning message
+* when processing the G2H event capture-notification, search for:
+* INTEL_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE.
+*/
if (min_size < 0)
drm_warn(>drm, "Failed to calculate GuC error state 
capture buffer minimum size: %d!\n",
 min_size);
else if (min_size > buffer_size)
-   drm_warn(>drm, "GuC error state capture buffer is too 
small: %d < %d\n",
+   drm_warn(>drm, "GuC error state capture buffer maybe 
small: %d < %d\n",
 buffer_size, min_size);
else if (spare_size > buffer_size)
-   drm_notice(>drm, "GuC error state capture buffer maybe 
too small: %d < %d (min = %d)\n",
-  buffer_size, spare_size, min_size);
+   drm_dbg(>drm, "GuC error state capture buffer lacks spare 
size: %d < %d (min = %d)\n",
+   buffer_size, spare_size, min_size);
 }
 
 /*
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index 

[Intel-gfx] [PATCH v4 0/1] Fix Guc-Err-Capture sizing warning

[Alan Previn]

GuC Error capture initialization calculates an estimation
buffer size for worst case scenario of all engines getting
reset. Fix the calculation change from drm_warn to drm_dbg
since its a corner case

Changes from prior revs:
   v3: - Rebase on latest drm-tip
   v2: - Reduce the guc-log-buffer error-capture-region allocation
 from 4MB to 1MB since the corrected math uncovers the
 larger headroom available to us.
   - Modify the code comment to focus on highlighting the
 headroom we have from how min_est is caclulated.
   - Add example min-est data from real hw in the patch comment.
   v1: - Change drm_dbg to drm_warn for the case of the mis-estated
 size not being met (John Harrison).

Alan Previn (1):
  drm/i915/guc: Fix GuC error capture sizing estimation and reporting

 .../gpu/drm/i915/gt/uc/intel_guc_capture.c| 29 ---
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c|  6 ++--
 2 files changed, 21 insertions(+), 14 deletions(-)


base-commit: 3844a56a09225527d7d9148d7e05ef5a99ac282f
-- 
2.34.1