Re: [Intel-gfx] [PATCH v6 0/3] drm/i915: implement internal workqueues
On Thu, 08 Jun 2023, Jani Nikula wrote: > This is v6 of [1], creating i915->unordered_wq also for mock devices. Pushed to drm-intel-next. Thanks for the patches and review. This also superseeds [1], and finally removes the last user of flush_scheduled_work(). Tetsuo, this will make its way to v6.5. Apologies about all the procrastination and delay. BR, Jani. [1] https://patchwork.freedesktop.org/patch/msgid/47c5fe59-faec-8eb6-7f3c-f76a4bb0f...@i-love.sakura.ne.jp > > BR, > Jani. > > [1] https://patchwork.freedesktop.org/series/118947/ > > > Luca Coelho (3): > drm/i915: use pointer to i915 instead of rpm in wakeref > drm/i915: add a dedicated workqueue inside drm_i915_private > drm/i915/selftests: add local workqueue for SW fence selftest > > drivers/gpu/drm/i915/display/intel_display.c | 5 ++-- > .../drm/i915/display/intel_display_driver.c | 2 +- > drivers/gpu/drm/i915/display/intel_dmc.c | 2 +- > drivers/gpu/drm/i915/display/intel_dp.c | 2 +- > .../drm/i915/display/intel_dp_link_training.c | 3 ++- > drivers/gpu/drm/i915/display/intel_drrs.c | 4 +++- > drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- > drivers/gpu/drm/i915/display/intel_fbdev.c| 3 ++- > drivers/gpu/drm/i915/display/intel_hdcp.c | 23 +++ > drivers/gpu/drm/i915/display/intel_hotplug.c | 18 ++- > drivers/gpu/drm/i915/display/intel_opregion.c | 3 ++- > drivers/gpu/drm/i915/display/intel_pps.c | 4 +++- > drivers/gpu/drm/i915/display/intel_psr.c | 8 --- > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 +--- > .../drm/i915/gt/intel_execlists_submission.c | 5 ++-- > .../gpu/drm/i915/gt/intel_gt_buffer_pool.c| 10 > drivers/gpu/drm/i915/gt/intel_gt_irq.c| 2 +- > drivers/gpu/drm/i915/gt/intel_gt_pm.c | 2 +- > drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 > drivers/gpu/drm/i915/gt/intel_reset.c | 2 +- > drivers/gpu/drm/i915/gt/intel_rps.c | 20 > drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +- > drivers/gpu/drm/i915/i915_driver.c| 13 +++ > drivers/gpu/drm/i915/i915_drv.h | 10 > drivers/gpu/drm/i915/i915_request.c | 2 +- > drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- > drivers/gpu/drm/i915/intel_wakeref.c | 22 ++ > drivers/gpu/drm/i915/intel_wakeref.h | 12 +- > .../gpu/drm/i915/selftests/i915_sw_fence.c| 16 ++--- > .../gpu/drm/i915/selftests/mock_gem_device.c | 7 ++ > 30 files changed, 143 insertions(+), 77 deletions(-) -- Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix a VMA UAF for multi-gt platform (rev7)
== Series Details == Series: drm/i915: Fix a VMA UAF for multi-gt platform (rev7) URL : https://patchwork.freedesktop.org/series/118887/ State : success == Summary == CI Bug Log - changes from CI_DRM_13253_full -> Patchwork_118887v7_full Summary --- **SUCCESS** No regressions found. Participating hosts (7 -> 7) -- No changes in participating hosts Known issues Here are the changes found in Patchwork_118887v7_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_busy@close-race: - shard-snb: [PASS][1] -> [ABORT][2] ([i915#6016]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-snb1/igt@gem_b...@close-race.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-snb2/igt@gem_b...@close-race.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-glk: NOTRUN -> [FAIL][3] ([i915#2842]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-glk6/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_reloc@basic-scanout@bcs0: - shard-snb: [PASS][4] -> [SKIP][5] ([fdo#109271]) +1 similar issue [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-snb7/igt@gem_exec_reloc@basic-scan...@bcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-snb2/igt@gem_exec_reloc@basic-scan...@bcs0.html * igt@gem_exec_reloc@basic-scanout@vcs0: - shard-snb: [PASS][6] -> [SKIP][7] ([fdo#109271] / [i915#4579]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-snb7/igt@gem_exec_reloc@basic-scan...@vcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-snb2/igt@gem_exec_reloc@basic-scan...@vcs0.html * igt@gem_lmem_swapping@heavy-multi: - shard-apl: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-apl6/igt@gem_lmem_swapp...@heavy-multi.html * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp: - shard-apl: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1937] / [i915#4579]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-apl6/igt@i915_pm_lpsp@kms-l...@kms-lpsp-dp.html * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs: - shard-glk: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#3886]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-glk6/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: [PASS][11] -> [FAIL][12] ([i915#2346]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-glk5/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-glk2/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html * igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-valid-mode: - shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4579]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-apl6/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscal...@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-valid-mode: - shard-glk: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4579]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-glk6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscal...@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu: - shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271]) +17 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-apl6/igt@kms_frontbuffer_track...@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1: - shard-snb: NOTRUN -> [SKIP][16] ([fdo#109271]) +12 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-snb7/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotat...@pipe-a-vga-1.html * igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-b-vga-1: - shard-snb: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#4579]) +6 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-snb7/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0...@pipe-b-vga-1.html * igt@kms_vblank@pipe-d-wait-busy-hang: - shard-glk: NOTRUN -> [SKIP][18] ([fdo#109271]) +15 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118887v7/shard-glk6/igt@kms_vbl...@pipe-d-wait-busy-hang.htm
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dsi: ICL+ DSI modeset sequence fixes (rev2)
== Series Details == Series: drm/i915/dsi: ICL+ DSI modeset sequence fixes (rev2) URL : https://patchwork.freedesktop.org/series/116926/ State : success == Summary == CI Bug Log - changes from CI_DRM_13253_full -> Patchwork_116926v2_full Summary --- **SUCCESS** No regressions found. Participating hosts (7 -> 7) -- No changes in participating hosts Known issues Here are the changes found in Patchwork_116926v2_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-glk: NOTRUN -> [FAIL][1] ([i915#2842]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-glk8/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_lmem_swapping@heavy-multi: - shard-apl: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-apl1/igt@gem_lmem_swapp...@heavy-multi.html * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp: - shard-apl: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1937] / [i915#4579]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-apl1/igt@i915_pm_lpsp@kms-l...@kms-lpsp-dp.html * igt@kms_big_fb@x-tiled-8bpp-rotate-180: - shard-snb: [PASS][4] -> [SKIP][5] ([fdo#109271]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-snb5/igt@kms_big...@x-tiled-8bpp-rotate-180.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-snb4/igt@kms_big...@x-tiled-8bpp-rotate-180.html * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs: - shard-glk: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#3886]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-glk8/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: [PASS][7] -> [FAIL][8] ([i915#2346]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-glk5/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-glk4/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-apl: [PASS][9] -> [FAIL][10] ([i915#2346]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-apl3/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-apl2/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-apl: [PASS][11] -> [FAIL][12] ([i915#4767]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-apl2/igt@kms_fbcon_...@fbc-suspend.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-apl6/igt@kms_fbcon_...@fbc-suspend.html * igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-valid-mode: - shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4579]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-apl1/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscal...@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-valid-mode: - shard-glk: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4579]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscal...@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu: - shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271]) +17 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-apl1/igt@kms_frontbuffer_track...@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-hdmi-a-1: - shard-snb: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4579]) +9 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-snb1/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-...@pipe-b-hdmi-a-1.html * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-a-vga-1: - shard-snb: NOTRUN -> [SKIP][17] ([fdo#109271]) +14 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/shard-snb2/igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scal...@pipe-a-vga-1.html * igt@kms_setmode@basic@pipe-a-hdmi-a-1: - shard-snb: NOTRUN -> [FAIL][18] ([i915#5465]) +1 similar issue [18]: https://intel-gfx-ci.
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: further device info cleanups
== Series Details ==
Series: drm/i915: further device info cleanups
URL : https://patchwork.freedesktop.org/series/119086/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13253_full -> Patchwork_119086v1_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_119086v1_full absolutely need
to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_119086v1_full, please notify your bug team to allow
them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (7 -> 7)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_119086v1_full:
### IGT changes ###
Possible regressions
* igt@i915_selftest@mock@timelines:
- shard-apl: [PASS][1] -> [ABORT][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-apl2/igt@i915_selftest@m...@timelines.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-apl2/igt@i915_selftest@m...@timelines.html
- shard-snb: [PASS][3] -> [ABORT][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-snb4/igt@i915_selftest@m...@timelines.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-snb4/igt@i915_selftest@m...@timelines.html
- shard-glk: [PASS][5] -> [ABORT][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-glk4/igt@i915_selftest@m...@timelines.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-glk2/igt@i915_selftest@m...@timelines.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@mock@timelines:
- {shard-rkl}:[PASS][7] -> [ABORT][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-rkl-1/igt@i915_selftest@m...@timelines.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-rkl-4/igt@i915_selftest@m...@timelines.html
- {shard-dg1}:[PASS][9] -> [ABORT][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-dg1-15/igt@i915_selftest@m...@timelines.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-dg1-19/igt@i915_selftest@m...@timelines.html
- {shard-tglu}: [PASS][11] -> [ABORT][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-tglu-7/igt@i915_selftest@m...@timelines.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-tglu-10/igt@i915_selftest@m...@timelines.html
Known issues
Here are the changes found in Patchwork_119086v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_lmem_swapping@heavy-multi:
- shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-apl6/igt@gem_lmem_swapp...@heavy-multi.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][14] -> [ABORT][15] ([i915#5566])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-glk1/igt@gen9_exec_pa...@allowed-single.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-glk9/igt@gen9_exec_pa...@allowed-single.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
- shard-apl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#1937] /
[i915#4579])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-apl6/igt@i915_pm_lpsp@kms-l...@kms-lpsp-dp.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][17] -> [FAIL][18] ([i915#2346])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13253/shard-glk5/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-glk7/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html
*
igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-valid-mode:
- shard-apl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4579]) +1
similar issue
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-apl6/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscal...@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu:
- shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271]) +17 similar issues
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119086v1/shard-apl6/igt@kms_frontbuffer_track...@psr-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_plane@pixel-format-source-clamping@pipe-a-planes:
Re: [Intel-gfx] [PATCH V2] PCI: Move VMD ASPM/LTR fix to PCI quirk
On Fri, 2023-06-09 at 17:46 -0500, Bjorn Helgaas wrote:
> On Fri, Jun 09, 2023 at 03:09:26PM -0700, David E. Box wrote:
> > Hi Bjorn,
> >
> > On Thu, 2023-06-08 at 15:52 -0500, Bjorn Helgaas wrote:
> > > On Tue, Apr 11, 2023 at 02:33:23PM -0700, David E. Box wrote:
> > > > In commit f492edb40b54 ("PCI: vmd: Add quirk to configure PCIe ASPM and
> > > > LTR") the VMD driver calls pci_enabled_link_state as a callback from
> > > > pci_bus_walk. Both will acquire the pci_bus_sem lock leading to a
> > > > lockdep
> > > > warning. Instead of doing the pci_bus_walk, move the fix to quirks.c
> > > > using
> > > > DECLARE_PCI_FIXUP_FINAL.
>
> > > > +#define VMD_DEVICE_LTR 0x1003 /* 3145728 ns */
> > >
> > > It would be nice to know how this value was derived. But I know we
> > > had this hard-coded value before, so it's not new with this patch.
> >
> > Do you mean to show the multiplier that determines that value or to
> > say why this particular number was chosen? For the latter, it the
> > largest that could be set (given the multipier options) that will
> > allow the SoC to get to it's lowest power state. And it's the same
> > so far on all the SoCs covered by the VMD driver.
>
> Oh, sorry, I meant "why this number was chosen". PCIe r6.0, sec
> 7.8.2, says this capability allows software to provide "platform
> latency information," so I assume this is somehow dependent on
> platform, but I really don't understand the details of how LTR works,
> and we didn't have an explanation before, so this was just a "if you
> happen to know, it might be useful here" comment.
Sure.
>
> > > > +static void quirk_intel_vmd(struct pci_dev *pdev)
> > >
> > > I think this quirk could possibly stay in
> > > drivers/pci/controller/vmd.c, couldn't it? It has a lot of
> > > VMD-specific knowledge that it would nice to contain in vmd.c.
> >
> > I may have misunderstood your comment on V1 then. But you suggested
> > that this would be typically done as PCI_FIXUP so that the PCI core
> > could call it and we could avoid the locking issue that was seen
> > while walking the bus in vmd.c.
>
> Right, I think it makes sense to be a DECLARE_PCI_FIXUP_CLASS_FINAL(),
> but I was thinking that it could be implemented in vmd.c and still be
> called by the PCI core.
>
> But now I'm uncertain since vmd.c can be compiled as a module, and I'm
> not sure how that could work, since pci_fixup_device() calls things in
> the __start_pci_fixups_final[] table, and I don't see how loading a
> module would insert the fixup entry into that table.
>
> So maybe it needs to be in quirks.c after all.
Okay.
>
> I think my only remaining questions here are about how to identify
> devices below VMD and the order of enabling ASPM states vs setting
> LTR.
Agree on setting the LTR first. I'll also look at other ways to identify devices
below VMD.
David
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: implement internal workqueues (rev4)
== Series Details ==
Series: drm/i915: implement internal workqueues (rev4)
URL : https://patchwork.freedesktop.org/series/118947/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13252_full -> Patchwork_118947v4_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
--
No changes in participating hosts
Known issues
Here are the changes found in Patchwork_118947v4_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_busy@close-race:
- shard-glk: [PASS][1] -> [DMESG-WARN][2] ([i915#118])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-glk9/igt@gem_b...@close-race.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-glk2/igt@gem_b...@close-race.html
* igt@i915_pm_rps@reset:
- shard-snb: [PASS][3] -> [INCOMPLETE][4] ([i915#7790])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-snb5/igt@i915_pm_...@reset.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-snb4/igt@i915_pm_...@reset.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][5] -> [FAIL][6] ([i915#79])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interrupti...@bc-hdmi-a1-hdmi-a2.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interrupti...@bc-hdmi-a1-hdmi-a2.html
*
igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][7] ([fdo#109271]) +7 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-snb7/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-form...@pipe-a-vga-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-vga-1:
- shard-snb: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4579]) +5
similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-snb5/igt@kms_plane_scaling@planes-downscale-factor-0...@pipe-b-vga-1.html
Possible fixes
* igt@gem_exec_fair@basic-none@vcs0:
- {shard-rkl}:[FAIL][9] ([i915#2842]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-rkl-6/igt@gem_exec_fair@basic-n...@vcs0.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-rkl-6/igt@gem_exec_fair@basic-n...@vcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- {shard-tglu}: [FAIL][11] ([i915#2842]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-tglu-6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-tglu-9/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- {shard-dg1}:[TIMEOUT][13] ([i915#5493]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-dg1-15/igt@gem_lmem_swapping@smem-...@lmem0.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-dg1-12/igt@gem_lmem_swapping@smem-...@lmem0.html
* igt@gem_mmap_offset@clear@smem0:
- {shard-dg1}:[DMESG-WARN][15] ([i915#8304]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-dg1-13/igt@gem_mmap_offset@cl...@smem0.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-dg1-18/igt@gem_mmap_offset@cl...@smem0.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
- {shard-rkl}:[SKIP][17] ([i915#1937] / [i915#4579]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-rkl-1/igt@i915_pm_lpsp@kms-l...@kms-lpsp-hdmi-a.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-rkl-7/igt@i915_pm_lpsp@kms-l...@kms-lpsp-hdmi-a.html
- {shard-dg1}:[SKIP][19] ([i915#1937] / [i915#4579]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-dg1-12/igt@i915_pm_lpsp@kms-l...@kms-lpsp-hdmi-a.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-dg1-19/igt@i915_pm_lpsp@kms-l...@kms-lpsp-hdmi-a.html
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- {shard-rkl}:[SKIP][21] ([i915#1397]) -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-rkl-1/igt@i915_pm_...@dpms-mode-unset-lpsp.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118947v4/shard-rkl-7/igt@i915_pm_...@dpms-mode-unset-lpsp.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [DMESG-FAIL][23] ([i915#5334]) -> [PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13252/shard-apl1/
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc/slpc: Apply min softlimit correctly
== Series Details ==
Series: drm/i915/guc/slpc: Apply min softlimit correctly
URL : https://patchwork.freedesktop.org/series/119162/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13257 -> Patchwork_119162v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/index.html
Participating hosts (36 -> 37)
--
Additional (1): fi-kbl-soraka
Known issues
Here are the changes found in Patchwork_119162v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3
similar issues
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][3] ([i915#1886] / [i915#7913])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@migrate:
- bat-atsm-1: [PASS][4] -> [DMESG-FAIL][5] ([i915#7699] /
[i915#7913])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-atsm-1/igt@i915_selftest@l...@migrate.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/bat-atsm-1/igt@i915_selftest@l...@migrate.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271]) +14 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/fi-kbl-soraka/igt@kms_chamelium_fra...@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- fi-ivb-3770:NOTRUN -> [SKIP][7] ([fdo#109271])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/fi-ivb-3770/igt@kms_chamelium_...@common-hpd-after-suspend.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4579])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/fi-kbl-soraka/igt@kms_setm...@basic-clone-single-crtc.html
Possible fixes
* igt@i915_selftest@live@gt_mocs:
- {bat-mtlp-8}: [DMESG-FAIL][9] ([i915#7059]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@guc:
- bat-rpls-2: [DMESG-WARN][11] ([i915#7852]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-rpls-2/igt@i915_selftest@l...@guc.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/bat-rpls-2/igt@i915_selftest@l...@guc.html
* igt@i915_selftest@live@hangcheck:
- fi-ivb-3770:[INCOMPLETE][13] ([i915#7913]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/fi-ivb-3770/igt@i915_selftest@l...@hangcheck.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119162v1/fi-ivb-3770/igt@i915_selftest@l...@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#4309]: https://gitlab.freedesktop.org/drm/intel/issues/4309
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
[i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7852]: https://gitlab.freedesktop.org/drm/intel/issues/7852
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
Build changes
-
* Linux: CI_DRM_13257 -> Patchwork_119162v1
CI-20190529: 20190529
CI_DRM_13257: ce4482577d084a40755e177398f4c577423548e5 @
git://anongit.freedesktop.or
Re: [Intel-gfx] [PATCH V2] PCI: Move VMD ASPM/LTR fix to PCI quirk
On Fri, Jun 09, 2023 at 03:09:26PM -0700, David E. Box wrote:
> Hi Bjorn,
>
> On Thu, 2023-06-08 at 15:52 -0500, Bjorn Helgaas wrote:
> > On Tue, Apr 11, 2023 at 02:33:23PM -0700, David E. Box wrote:
> > > In commit f492edb40b54 ("PCI: vmd: Add quirk to configure PCIe ASPM and
> > > LTR") the VMD driver calls pci_enabled_link_state as a callback from
> > > pci_bus_walk. Both will acquire the pci_bus_sem lock leading to a lockdep
> > > warning. Instead of doing the pci_bus_walk, move the fix to quirks.c using
> > > DECLARE_PCI_FIXUP_FINAL.
> > > +#define VMD_DEVICE_LTR 0x1003 /* 3145728 ns */
> >
> > It would be nice to know how this value was derived. But I know we
> > had this hard-coded value before, so it's not new with this patch.
>
> Do you mean to show the multiplier that determines that value or to
> say why this particular number was chosen? For the latter, it the
> largest that could be set (given the multipier options) that will
> allow the SoC to get to it's lowest power state. And it's the same
> so far on all the SoCs covered by the VMD driver.
Oh, sorry, I meant "why this number was chosen". PCIe r6.0, sec
7.8.2, says this capability allows software to provide "platform
latency information," so I assume this is somehow dependent on
platform, but I really don't understand the details of how LTR works,
and we didn't have an explanation before, so this was just a "if you
happen to know, it might be useful here" comment.
> > > +static void quirk_intel_vmd(struct pci_dev *pdev)
> >
> > I think this quirk could possibly stay in
> > drivers/pci/controller/vmd.c, couldn't it? It has a lot of
> > VMD-specific knowledge that it would nice to contain in vmd.c.
>
> I may have misunderstood your comment on V1 then. But you suggested
> that this would be typically done as PCI_FIXUP so that the PCI core
> could call it and we could avoid the locking issue that was seen
> while walking the bus in vmd.c.
Right, I think it makes sense to be a DECLARE_PCI_FIXUP_CLASS_FINAL(),
but I was thinking that it could be implemented in vmd.c and still be
called by the PCI core.
But now I'm uncertain since vmd.c can be compiled as a module, and I'm
not sure how that could work, since pci_fixup_device() calls things in
the __start_pci_fixups_final[] table, and I don't see how loading a
module would insert the fixup entry into that table.
So maybe it needs to be in quirks.c after all.
I think my only remaining questions here are about how to identify
devices below VMD and the order of enabling ASPM states vs setting
LTR.
Bjorn
Re: [Intel-gfx] [PATCH V2] PCI: Move VMD ASPM/LTR fix to PCI quirk
Hi Bjorn,
On Thu, 2023-06-08 at 15:52 -0500, Bjorn Helgaas wrote:
> On Tue, Apr 11, 2023 at 02:33:23PM -0700, David E. Box wrote:
> > In commit f492edb40b54 ("PCI: vmd: Add quirk to configure PCIe ASPM and
> > LTR") the VMD driver calls pci_enabled_link_state as a callback from
> > pci_bus_walk. Both will acquire the pci_bus_sem lock leading to a lockdep
> > warning. Instead of doing the pci_bus_walk, move the fix to quirks.c using
> > DECLARE_PCI_FIXUP_FINAL.
>
> s/pci_enabled_link_state/pci_enable_link_state/
>
> Add "()" after pci_enable_link_state() and pci_bus_walk() to make it
> obvious they're functions.
>
> > ...
> > +++ b/drivers/pci/quirks.c
> > @@ -6023,3 +6023,75 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2d,
> > dpc_log_size);
> > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2f, dpc_log_size);
> > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a31, dpc_log_size);
> > #endif
> > +
> > +#ifdef CONFIG_VMD
> > +/*
> > + * Enable ASPM on the PCIE root ports under VMD and set the default LTR of
> > the
> > + * storage devices on platforms where these values are not configured by
> > BIOS.
> > + * This is needed for laptops, which require these settings for proper
> > power
> > + * management of the SoC.
>
> s/PCIE/PCIe/ to match spec usage.
>
> > + */
> > +#define VMD_DEVICE_LTR 0x1003 /* 3145728 ns */
>
> It would be nice to know how this value was derived. But I know we
> had this hard-coded value before, so it's not new with this patch.
Do you mean to show the multiplier that determines that value or to say why this
particular number was chosen? For the latter, it the largest that could be set
(given the multipier options) that will allow the SoC to get to it's lowest
power state. And it's the same so far on all the SoCs covered by the VMD driver.
>
> > +static void quirk_intel_vmd(struct pci_dev *pdev)
>
> I think this quirk could possibly stay in
> drivers/pci/controller/vmd.c, couldn't it? It has a lot of
> VMD-specific knowledge that it would nice to contain in vmd.c.
I may have misunderstood your comment on V1 then. But you suggested that this
would be typically done as PCI_FIXUP so that the PCI core could call it and we
could avoid the locking issue that was seen while walking the bus in vmd.c.
https://lore.kernel.org/lkml/ab9bf3032ed46fc0586e089edc5aac6e71b331d8.ca...@linux.intel.com/T/#m09dc05ef56b8d9f104f91594f582251b6088d24d
>
> > +{
> > + struct pci_dev *parent;
> > + u16 ltr = VMD_DEVICE_LTR;
>
> I don't think "ltr" is an improvement over using "VMD_DEVICE_LTR"
> below.
>
> > + u32 ltr_reg;
> > + int pos;
> > +
> > + /* Check in VMD domain */
> > + if (pci_domain_nr(pdev->bus) < 0x1)
> > + return;
>
> If in vmd.c, maybe could identify devices under a VMD by checking
> pdev->bus->ops as vmd_acpi_find_companion() does?
>
> > + /* Get Root Port */
> > + parent = pci_upstream_bridge(pdev);
> > + if (!parent || parent->vendor != PCI_VENDOR_ID_INTEL)
> > + return;
> > +
> > + /* Get VMD Host Bridge */
> > + parent = to_pci_dev(parent->dev.parent);
> > + if (!parent)
> > + return;
> > +
> > + /* Get RAID controller */
> > + parent = to_pci_dev(parent->dev.parent);
> > + if (!parent)
> > + return;
> > +
> > + switch (parent->device) {
> > + case 0x467f:
> > + case 0x4c3d:
> > + case 0xa77f:
> > + case 0x7d0b:
> > + case 0xad0b:
> > + case 0x9a0b:
> > + break;
> > + default:
> > + return;
> > + }
> > +
> > + pci_enable_link_state(pdev, PCIE_LINK_STATE_ALL);
>
> Seems like you would want to set LTR *before* enabling the link
> states?
Yes that would be better. We'll still want to check if the LTR is set first
though because if it is then we don't need to do either.
David
>
> > + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR);
> > + if (!pos)
> > + return;
> > +
> > + /* Skip if the max snoop LTR is non-zero, indicating BIOS has set it
> > */
> > + pci_read_config_dword(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, > + if (!!(ltr_reg & (PCI_LTR_VALUE_MASK | PCI_LTR_SCALE_MASK)))
> > + return;
> > +
> > + /*
> > + * Set the LTR values to the maximum required by the platform to
> > + * allow the deepest power management savings. Write as a DWORD
> > where
> > + * the lower word is the max snoop latency and the upper word is the
> > + * max non-snoop latency.
>
> This comment suggests that the LTR value is platform-dependent, which
> is what I would expect, but the code and the hard-coded VMD_DEVICE_LTR
> value don't have any platform dependencies. Again, nothing new in
> *this* patch; that's true in the current tree, too.
>
> > + ltr_reg = (ltr << 16) | ltr;
> > + pci_write_config_dword(pdev, pos + PCI_L
[Intel-gfx] [PATCH] drm/i915/guc/slpc: Apply min softlimit correctly
We were skipping when min_softlimit was equal to RPn. We need to apply
it rergardless as efficient frequency will push the SLPC min to RPe.
This will break scenarios where user sets a min softlimit < RPe before
reset and then performs a GT reset.
Fixes: 95ccf312a1e4 ("drm/i915/guc/slpc: Allow SLPC to use efficient frequency")
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
index 01b75529311c..ee9f83af7cf6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
@@ -606,7 +606,7 @@ static int slpc_set_softlimits(struct intel_guc_slpc *slpc)
if (unlikely(ret))
return ret;
slpc_to_gt(slpc)->defaults.min_freq = slpc->min_freq_softlimit;
- } else if (slpc->min_freq_softlimit != slpc->min_freq) {
+ } else {
return intel_guc_slpc_set_min_freq(slpc,
slpc->min_freq_softlimit);
}
--
2.38.1
[Intel-gfx] ✓ Fi.CI.BAT: success for Get optimal audio frequency and channels (rev2)
== Series Details ==
Series: Get optimal audio frequency and channels (rev2)
URL : https://patchwork.freedesktop.org/series/119121/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13257 -> Patchwork_119121v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/index.html
Participating hosts (36 -> 35)
--
Missing(1): fi-pnv-d510
Known issues
Here are the changes found in Patchwork_119121v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@gt_heartbeat:
- fi-glk-j4005: [PASS][1] -> [DMESG-FAIL][2] ([i915#5334])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@hangcheck:
- bat-atsm-1: [PASS][3] -> [ABORT][4] ([i915#7349] / [i915#7913])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-atsm-1/igt@i915_selftest@l...@hangcheck.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/bat-atsm-1/igt@i915_selftest@l...@hangcheck.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- fi-ivb-3770:NOTRUN -> [SKIP][5] ([fdo#109271])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/fi-ivb-3770/igt@kms_chamelium_...@common-hpd-after-suspend.html
Possible fixes
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [DMESG-FAIL][6] ([i915#5334]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_mocs:
- {bat-mtlp-6}: [DMESG-FAIL][8] ([i915#7059]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@guc:
- bat-rpls-2: [DMESG-WARN][10] ([i915#7852]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-rpls-2/igt@i915_selftest@l...@guc.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/bat-rpls-2/igt@i915_selftest@l...@guc.html
* igt@i915_selftest@live@hangcheck:
- fi-ivb-3770:[INCOMPLETE][12] ([i915#7913]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/fi-ivb-3770/igt@i915_selftest@l...@hangcheck.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/fi-ivb-3770/igt@i915_selftest@l...@hangcheck.html
* igt@i915_selftest@live@slpc:
- bat-rpls-2: [DMESG-WARN][14] ([i915#6367]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-rpls-2/igt@i915_selftest@l...@slpc.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/bat-rpls-2/igt@i915_selftest@l...@slpc.html
- bat-rpls-1: [DMESG-WARN][16] ([i915#6367]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-rpls-1/igt@i915_selftest@l...@slpc.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/bat-rpls-1/igt@i915_selftest@l...@slpc.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [FAIL][18] ([i915#7932]) -> [PASS][19] +1 similar
issue
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13257/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7269]: https://gitlab.freedesktop.org/drm/intel/issues/7269
[i915#7349]: https://gitlab.freedesktop.org/drm/intel/issues/7349
[i915#7852]: https://gitlab.freedesktop.org/drm/intel/issues/7852
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
Build c
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Get optimal audio frequency and channels (rev2)
== Series Details == Series: Get optimal audio frequency and channels (rev2) URL : https://patchwork.freedesktop.org/series/119121/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/inc
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Restore HSW/BDW PSR1 (rev2)
== Series Details ==
Series: drm/i915/psr: Restore HSW/BDW PSR1 (rev2)
URL : https://patchwork.freedesktop.org/series/116814/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13256 -> Patchwork_116814v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/index.html
Participating hosts (36 -> 36)
--
No changes in participating hosts
Known issues
Here are the changes found in Patchwork_116814v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@reset:
- bat-rpls-2: [PASS][1] -> [ABORT][2] ([i915#4983] / [i915#7461] /
[i915#7913] / [i915#8347])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-rpls-2/igt@i915_selftest@l...@reset.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-rpls-2/igt@i915_selftest@l...@reset.html
* igt@i915_selftest@live@slpc:
- bat-rpls-1: NOTRUN -> [DMESG-WARN][3] ([i915#6367])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-rpls-1/igt@i915_selftest@l...@slpc.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-rpls-1: NOTRUN -> [ABORT][4] ([i915#6687] / [i915#7978])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-rpls-1/igt@i915_susp...@basic-s3-without-i915.html
* igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-dg2-11: NOTRUN -> [SKIP][5] ([i915#1845] / [i915#5354])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [PASS][6] -> [FAIL][7] ([i915#7932])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-1.html
Possible fixes
* igt@i915_selftest@live@gem_contexts:
- {bat-mtlp-8}: [ABORT][8] -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-mtlp-8/igt@i915_selftest@live@gem_contexts.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-mtlp-8/igt@i915_selftest@live@gem_contexts.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [ABORT][10] ([i915#4983] / [i915#7461] / [i915#7981]
/ [i915#8347] / [i915#8384]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-rpls-1/igt@i915_selftest@l...@reset.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-rpls-1/igt@i915_selftest@l...@reset.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-11}: [ABORT][12] ([i915#4423]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-adlp-11/igt@kms_busy@ba...@modeset.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-adlp-11/igt@kms_busy@ba...@modeset.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
- bat-dg2-8: [FAIL][14] ([i915#7932]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-1.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1:
- fi-cfl-8109u: [ABORT][16] -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-cfl-8109u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-1.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116814v2/fi-cfl-8109u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
[i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
[i915#7059]: https://gitlab.fr
[Intel-gfx] ✓ Fi.CI.BAT: success for x86/mm: Fix PAT bit missing from page protection modify mask (rev3)
== Series Details ==
Series: x86/mm: Fix PAT bit missing from page protection modify mask (rev3)
URL : https://patchwork.freedesktop.org/series/116883/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13256 -> Patchwork_116883v3
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v3/index.html
Participating hosts (36 -> 36)
--
No changes in participating hosts
Known issues
Here are the changes found in Patchwork_116883v3 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@slpc:
- bat-rpls-1: NOTRUN -> [DMESG-WARN][1] ([i915#6367])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v3/bat-rpls-1/igt@i915_selftest@l...@slpc.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-rpls-1: NOTRUN -> [ABORT][2] ([i915#6687] / [i915#7978])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v3/bat-rpls-1/igt@i915_susp...@basic-s3-without-i915.html
Possible fixes
* igt@i915_selftest@live@gem_contexts:
- {bat-mtlp-8}: [ABORT][3] -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-mtlp-8/igt@i915_selftest@live@gem_contexts.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v3/bat-mtlp-8/igt@i915_selftest@live@gem_contexts.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [ABORT][5] ([i915#4983] / [i915#7461] / [i915#7981] /
[i915#8347] / [i915#8384]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-rpls-1/igt@i915_selftest@l...@reset.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v3/bat-rpls-1/igt@i915_selftest@l...@reset.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-11}: [ABORT][7] ([i915#4423]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-adlp-11/igt@kms_busy@ba...@modeset.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v3/bat-adlp-11/igt@kms_busy@ba...@modeset.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
- bat-dg2-8: [FAIL][9] ([i915#7932]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-1.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v3/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1:
- fi-cfl-8109u: [ABORT][11] -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-cfl-8109u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-1.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v3/fi-cfl-8109u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4309]: https://gitlab.freedesktop.org/drm/intel/issues/4309
[i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
[i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384
Build changes
-
* Linux: CI_DRM_13256 -> Patchwork_116883v3
CI-20190529: 20190529
CI_DRM_13256: be85dc2d44c075230eec4366e27bc1fe75ee59ff @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7322: 2dd77d6d827a308caae49ce3eba759c2bab394ed @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_116883v3: be85dc2d44c075230eec4366e27bc1fe75ee59ff @
git://anongit.f
Re: [Intel-gfx] [PATCH v12 00/24] Add vfio_device cdev for iommufd support
On 6/2/23 8:16 AM, Yi Liu wrote: > Existing VFIO provides group-centric user APIs for userspace. Userspace > opens the /dev/vfio/$group_id first before getting device fd and hence > getting access to device. This is not the desired model for iommufd. Per > the conclusion of community discussion[1], iommufd provides device-centric > kAPIs and requires its consumer (like VFIO) to be device-centric user > APIs. Such user APIs are used to associate device with iommufd and also > the I/O address spaces managed by the iommufd. > > This series first introduces a per device file structure to be prepared > for further enhancement and refactors the kvm-vfio code to be prepared > for accepting device file from userspace. After this, adds a mechanism for > blocking device access before iommufd bind. Then refactors the vfio to be > able to handle cdev path (e.g. iommufd binding, no-iommufd, [de]attach ioas). > This refactor includes making the device_open exclusive between the group > and the cdev path, only allow single device open in cdev path; vfio-iommufd > code is also refactored to support cdev. e.g. split the vfio_iommufd_bind() > into two steps. Eventually, adds the cdev support for vfio device and the > new ioctls, then makes group infrastructure optional as it is not needed > when vfio device cdev is compiled. > > This series is based on some preparation works done to vfio emulated > devices[2] > and vfio pci hot reset enhancements[3]. > > This series is a prerequisite for iommu nesting for vfio device[4] [5]. > > The complete code can be found in below branch, simple tests done to the > legacy group path and the cdev path. Draft QEMU branch can be found at[6] > However, the noiommu mode test is only done with some hacks in kernel and > qemu to check if qemu can boot with noiommu devices. > > https://github.com/yiliu1765/iommufd/tree/vfio_device_cdev_v12 > (config CONFIG_IOMMUFD=y CONFIG_VFIO_DEVICE_CDEV=y) > > base-commit: 0948fa29d62eca627a19d5b1534262a6d93d4181 > Hi Yi, I gave a tested-by some time ago, and have been running with various versions in between -- but there have been enough changes that by now the testing seems worth reaffirming. So, on this version (along with the QEMU test counterpart) I have tested the following on s390: 1) default vfio container testing using vfio-pci, vfio-ap, vfio-ccw 2) iommufd vfio compat testing using vfio-pci, vfio-ap, vfio-ccw (via group) 3) iommufd vfio compat testing using vfio-pci (via cdev) 4) iommufd + s390 nesting WIP kernel+QEMU series (built on top of intel and SMMUv3 nesting series) using vfio-pci Tested-by: Matthew Rosato Thanks, Matt
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mtl: Cleanup usage of phy lane reset
== Series Details ==
Series: drm/i915/mtl: Cleanup usage of phy lane reset
URL : https://patchwork.freedesktop.org/series/119138/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13256 -> Patchwork_119138v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/index.html
Participating hosts (36 -> 36)
--
No changes in participating hosts
Known issues
Here are the changes found in Patchwork_119138v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@execlists:
- fi-bsw-nick:[PASS][1] -> [ABORT][2] ([i915#7911] / [i915#7913])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@gt_lrc:
- bat-dg2-11: [PASS][3] -> [INCOMPLETE][4] ([i915#7609] /
[i915#7913])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@requests:
- bat-rpls-2: [PASS][5] -> [ABORT][6] ([i915#7913] / [i915#7982])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-rpls-2/igt@i915_selftest@l...@requests.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-rpls-2/igt@i915_selftest@l...@requests.html
* igt@i915_selftest@live@slpc:
- bat-rpls-1: NOTRUN -> [DMESG-WARN][7] ([i915#6367])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-rpls-1/igt@i915_selftest@l...@slpc.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-rpls-1: NOTRUN -> [ABORT][8] ([i915#6687] / [i915#7978])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-rpls-1/igt@i915_susp...@basic-s3-without-i915.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][9] ([i915#3546]) +3 similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
- bat-dg2-8: [PASS][10] -> [FAIL][11] ([i915#7932])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-d-dp-1.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-d-dp-1.html
Possible fixes
* igt@i915_selftest@live@gem_contexts:
- {bat-mtlp-8}: [ABORT][12] -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-mtlp-8/igt@i915_selftest@live@gem_contexts.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-mtlp-8/igt@i915_selftest@live@gem_contexts.html
* igt@i915_selftest@live@gt_mocs:
- {bat-mtlp-6}: [DMESG-FAIL][14] ([i915#7059]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [ABORT][16] ([i915#4983] / [i915#7461] / [i915#7981]
/ [i915#8347] / [i915#8384]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-rpls-1/igt@i915_selftest@l...@reset.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-rpls-1/igt@i915_selftest@l...@reset.html
* igt@i915_selftest@live@slpc:
- {bat-mtlp-6}: [DMESG-WARN][18] ([i915#6367]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-mtlp-6/igt@i915_selftest@l...@slpc.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-mtlp-6/igt@i915_selftest@l...@slpc.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
- bat-dg2-8: [FAIL][20] ([i915#7932]) -> [PASS][21]
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-1.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119138v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1:
- fi-cfl-8109u: [ABORT][22] -> [PASS][23]
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-cfl-8109u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-1.html
[23]:
https://intel-gfx-ci.01.or
[Intel-gfx] ✗ Fi.CI.BAT: failure for fdinfo memory stats (rev2)
== Series Details == Series: fdinfo memory stats (rev2) URL : https://patchwork.freedesktop.org/series/119082/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13256 -> Patchwork_119082v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_119082v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_119082v2, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/index.html Participating hosts (36 -> 37) -- Additional (1): fi-kbl-soraka Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_119082v2: ### IGT changes ### Possible regressions * igt@i915_module_load@load: - fi-ilk-650: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-ilk-650/igt@i915_module_l...@load.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-ilk-650/igt@i915_module_l...@load.html - fi-blb-e6850: [PASS][3] -> [ABORT][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-blb-e6850/igt@i915_module_l...@load.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-blb-e6850/igt@i915_module_l...@load.html - fi-elk-e7500: [PASS][5] -> [ABORT][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-elk-e7500/igt@i915_module_l...@load.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-elk-e7500/igt@i915_module_l...@load.html - fi-hsw-4770:[PASS][7] -> [ABORT][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-hsw-4770/igt@i915_module_l...@load.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-hsw-4770/igt@i915_module_l...@load.html - fi-ivb-3770:[PASS][9] -> [ABORT][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-ivb-3770/igt@i915_module_l...@load.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-ivb-3770/igt@i915_module_l...@load.html Known issues Here are the changes found in Patchwork_119082v2 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#2190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613]) +3 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@i915_module_load@load: - fi-pnv-d510:[PASS][13] -> [ABORT][14] ([i915#8143]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-pnv-d510/igt@i915_module_l...@load.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-pnv-d510/igt@i915_module_l...@load.html * igt@i915_selftest@live@gt_heartbeat: - fi-rkl-11600: [PASS][15] -> [DMESG-FAIL][16] ([i915#5334]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-rkl-11600/igt@i915_selftest@live@gt_heartbeat.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-rkl-11600/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][17] ([i915#1886] / [i915#7913]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@slpc: - bat-rpls-1: NOTRUN -> [DMESG-WARN][18] ([i915#6367]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/bat-rpls-1/igt@i915_selftest@l...@slpc.html * igt@i915_suspend@basic-s3-without-i915: - bat-rpls-1: NOTRUN -> [ABORT][19] ([i915#6687] / [i915#7978]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/bat-rpls-1/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_chamelium_frames@hdmi-crc-fast: - fi-kbl-soraka: NOTRUN -> [SKIP][20] ([fdo#109271]) +14 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/fi-kbl-soraka/igt@kms_chamelium_fra...@hdmi-crc-fast.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1: - bat-dg2-8: [PASS][21] -> [FAIL][22] ([i915#7932]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-d-dp-1.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v2/bat-dg2-8/igt@kms_pipe_crc_basic@non
Re: [Intel-gfx] [RFC 2/4] drm/i915/display: Update access of has_audio param
Hi @Jani Nikula
> -Original Message-
> From: Jani Nikula
> Sent: 09 June 2023 15:09
> To: Golani, Mitulkumar Ajitkumar ;
> intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [RFC 2/4] drm/i915/display: Update access of
> has_audio param
>
> On Fri, 09 Jun 2023, Mitul Golani
> wrote:
> > Update access of has_audio param from crtc_state pointer as it is
> > wrapped under audio_config.
>
> This should be squashed with the change moving the member in order to not
> break the build.
>
> BR,
> Jani.
Thanks. Updated changes to new fix version.
Regards,
Mitul
>
> >
> > Signed-off-by: Mitul Golani
> > ---
> > drivers/gpu/drm/i915/display/g4x_dp.c| 4 ++--
> > drivers/gpu/drm/i915/display/g4x_hdmi.c | 16
> > drivers/gpu/drm/i915/display/intel_audio.c | 6 +++---
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +++---
> > .../gpu/drm/i915/display/intel_crtc_state_dump.c | 4 ++--
> > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> > drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_hdmi.c| 2 +-
> > drivers/gpu/drm/i915/display/intel_sdvo.c| 10 +-
> > 11 files changed, 29 insertions(+), 29 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> > b/drivers/gpu/drm/i915/display/g4x_dp.c
> > index 112d91d81fdc..741896db0b38 100644
> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> > @@ -345,7 +345,7 @@ static void intel_dp_get_config(struct
> > intel_encoder *encoder,
> >
> > tmp = intel_de_read(dev_priv, intel_dp->output_reg);
> >
> > - pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE &&
> port != PORT_A;
> > + pipe_config->audio_config.has_audio = tmp &
> DP_AUDIO_OUTPUT_ENABLE
> > +&& port != PORT_A;
> >
> > if (HAS_PCH_CPT(dev_priv) && port != PORT_A) {
> > u32 trans_dp = intel_de_read(dev_priv, @@ -625,7 +625,7
> @@ static
> > void intel_dp_enable_port(struct intel_dp *intel_dp,
> > * fail when the power sequencer is freshly used for this port.
> > */
> > intel_dp->DP |= DP_PORT_EN;
> > - if (crtc_state->has_audio)
> > + if (crtc_state->audio_config.has_audio)
> > intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
> >
> > intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); diff
> > --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> > b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> > index 5c187e6e0472..5607e750f576 100644
> > --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> > @@ -178,7 +178,7 @@ static void intel_hdmi_get_config(struct
> intel_encoder *encoder,
> > pipe_config->has_infoframe = true;
> >
> > if (tmp & HDMI_AUDIO_ENABLE)
> > - pipe_config->has_audio = true;
> > + pipe_config->audio_config.has_audio = true;
> >
> > if (!HAS_PCH_SPLIT(dev_priv) &&
> > tmp & HDMI_COLOR_RANGE_16_235)
> > @@ -224,7 +224,7 @@ static void g4x_hdmi_enable_port(struct
> intel_encoder *encoder,
> > temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
> >
> > temp |= SDVO_ENABLE;
> > - if (pipe_config->has_audio)
> > + if (pipe_config->audio_config.has_audio)
> > temp |= HDMI_AUDIO_ENABLE;
> >
> > intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); @@ -240,7
> > +240,7 @@ static void g4x_enable_hdmi(struct intel_atomic_state
> > *state,
> >
> > g4x_hdmi_enable_port(encoder, pipe_config);
> >
> > - drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
> > + drm_WARN_ON(&dev_priv->drm, pipe_config-
> >audio_config.has_audio &&
> > !pipe_config->has_hdmi_sink);
> > intel_audio_codec_enable(encoder, pipe_config, conn_state); } @@
> > -258,7 +258,7 @@ static void ibx_enable_hdmi(struct intel_atomic_state
> *state,
> > temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
> >
> > temp |= SDVO_ENABLE;
> > - if (pipe_config->has_audio)
> > + if (pipe_config->audio_config.has_audio)
> > temp |= HDMI_AUDIO_ENABLE;
> >
> > /*
> > @@ -293,7 +293,7 @@ static void ibx_enable_hdmi(struct
> intel_atomic_state *state,
> > intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> > }
> >
> > - drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
> > + drm_WARN_ON(&dev_priv->drm, pipe_config-
> >audio_config.has_audio &&
> > !pipe_config->has_hdmi_sink);
> > intel_audio_codec_enable(encoder, pipe_config, conn_state); } @@
> > -313,7 +313,7 @@ static void cpt_enable_hdmi(struct intel_atomic_state
> *state,
> > temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
> >
> > temp |= SDVO_ENABLE;
> > - if (pipe_config->has_audio)
> > + if (pipe_config->audio_config.has_audio)
> > temp |= HDMI_AUD
Re: [Intel-gfx] [RFC 1/4] drm/i915/hdmi: Add audio config related params in crtc_state
Hi @Jani Nikula
> -Original Message-
> From: Jani Nikula
> Sent: 09 June 2023 15:06
> To: Golani, Mitulkumar Ajitkumar ;
> intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [RFC 1/4] drm/i915/hdmi: Add audio config related
> params in crtc_state
>
> On Fri, 09 Jun 2023, Mitul Golani
> wrote:
> > Add source audio-related config params in crtc_state.
> > These params can be supported frequency, supported channel, and audio
> > support, which can be further computed based on source capabilities.
> >
> > Signed-off-by: Mitul Golani
> > ---
> > drivers/gpu/drm/i915/display/intel_display_types.h | 12 +---
> > 1 file changed, 9 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 731f2ec04d5c..873a60f3f870 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1129,9 +1129,15 @@ struct intel_crtc_state {
> > /* Whether we should send NULL infoframes. Required for audio. */
> > bool has_hdmi_sink;
> >
> > - /* Audio enabled on this pipe. Only valid if either has_hdmi_sink or
> > -* has_dp_encoder is set. */
> > - bool has_audio;
> > + struct {
> > + bool has_audio;
> > +
> > + /* Audio rate in Hz */
> > + unsigned int max_frequency;
> > +
> > + /* Number of audio channels */
> > + unsigned int max_channel;
> > + } audio_config;
>
> This breaks the build. Every commit should build on its own.
>
> audio_config is too verbose. Please just use "audio".
>
> Please don't add the new members in this commit, just first add the
> substruct and make the updates. Then add new members in a separate
> commit.
>
> BR,
> Jani.
Thanks. Updated changes to new fix version. Refactored has_audio and other
audio params to separate commit where it is used.
Regards,
Mitul
>
> >
> > /*
> > * Enable dithering, used when the selected pipe bpp doesn't match
> > the
>
> --
> Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH v3 4/4] PCI/VGA: introduce is_boot_device function callback to vga_client_register
On 2023/6/10 00:48, Bjorn Helgaas wrote: On Fri, Jun 09, 2023 at 10:27:39AM +0800, Sui Jingfeng wrote: On 2023/6/9 03:19, Bjorn Helgaas wrote: On Thu, Jun 08, 2023 at 07:43:22PM +0800, Sui Jingfeng wrote: From: Sui Jingfeng The vga_is_firmware_default() function is arch-dependent, which doesn't sound right. At least, it also works on the Mips and LoongArch platforms. Tested with the drm/amdgpu and drm/radeon drivers. However, it's difficult to enumerate all arch-driver combinations. I'm wrong if there is only one exception. With the observation that device drivers typically have better knowledge about which PCI bar contains the firmware framebuffer, which could avoid the need to iterate all of the PCI BARs. But as a PCI function at pci/vgaarb.c, vga_is_firmware_default() is probably not suitable to make such an optimization for a specific device. There are PCI display controllers that don't have a dedicated VRAM bar, this function will lose its effectiveness in such a case. Luckily, the device driver can provide an accurate workaround. Therefore, this patch introduces a callback that allows the device driver to tell the VGAARB if the device is the default boot device. This patch only intends to introduce the mechanism, while the implementation is left to the device driver authors. Also honor the comment: "Clients have two callback mechanisms they can use" s/bar/BAR/ (several) Nothing here uses the callback. I don't want to merge this until we have a user. This is chicken and egg question. If you could help get this merge first, I will show you the first user. I'm not sure why the device driver should know whether its device is the default boot device. It's not that the device driver should know, but it's about that the device driver has the right to override. Device driver may have better approach to identify the default boot device. The way we usually handle this is to include the new callback in the same series as the first user of it. That has two benefits: (1) everybody can review the whole picture and possibly suggest different approaches, and (2) when we merge the infrastructure, we also merge a user of it at the same time, so the whole thing can be tested and we don't end up with unused code. OK, acceptable I will try to prepare the user code of this callback and respin the patch. I may resend it with another patch set in the future, this series already drop it, see v5[1] [1] https://patchwork.freedesktop.org/series/119134/ Bjorn
Re: [Intel-gfx] [RFC 1/4] drm/i915/hdmi: Add audio config related params in crtc_state
Hi @Jani Nikula
> -Original Message-
> From: Jani Nikula
> Sent: 09 June 2023 15:08
> To: Golani, Mitulkumar Ajitkumar ;
> intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [RFC 1/4] drm/i915/hdmi: Add audio config related
> params in crtc_state
>
> On Fri, 09 Jun 2023, Mitul Golani
> wrote:
> > Add source audio-related config params in crtc_state.
> > These params can be supported frequency, supported channel, and audio
> > support, which can be further computed based on source capabilities.
> >
> > Signed-off-by: Mitul Golani
> > ---
> > drivers/gpu/drm/i915/display/intel_display_types.h | 12 +---
> > 1 file changed, 9 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 731f2ec04d5c..873a60f3f870 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1129,9 +1129,15 @@ struct intel_crtc_state {
> > /* Whether we should send NULL infoframes. Required for audio. */
> > bool has_hdmi_sink;
> >
> > - /* Audio enabled on this pipe. Only valid if either has_hdmi_sink or
> > -* has_dp_encoder is set. */
> > - bool has_audio;
> > + struct {
> > + bool has_audio;
> > +
> > + /* Audio rate in Hz */
> > + unsigned int max_frequency;
> > +
> > + /* Number of audio channels */
> > + unsigned int max_channel;
>
> Please just use int, not unsigned int, for both of these.
Thanks. Updated changes to new fix version.
>
> BR,
> Jani.
>
> > + } audio_config;
> >
> > /*
> > * Enable dithering, used when the selected pipe bpp doesn't match
> > the
>
> --
> Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] [RFC 2/3] drm/i915/display: Configure and initialize HDMI audio capabilities
Initialize the source audio capabilities for HDMI in crtc_state
property by setting them to their maximum supported values,
including max_channel and max_frequency. This allows for the
calculation of HDMI audio source capabilities with respect to
the available mode bandwidth. These capabilities encompass
parameters such as supported frequency and channel configurations.
--v1:
- Refactor max_channel and max_rate to this commit as it is being
initialised here
- Remove call for intel_audio_compute_eld to avoid any regression while
merge. instead call it in different commit when it is defined.
- Use int instead of unsigned int for max_channel and max_frequecy
- Update commit message and header
Signed-off-by: Mitul Golani
---
.../drm/i915/display/intel_display_types.h| 6
drivers/gpu/drm/i915/display/intel_hdmi.c | 35 +++
drivers/gpu/drm/i915/display/intel_hdmi.h | 1 +
3 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index ebd147180a6e..74eee87d2df1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1131,6 +1131,12 @@ struct intel_crtc_state {
struct {
bool has_audio;
+
+ /* Audio rate in Hz */
+ int max_frequency;
+
+ /* Number of audio channels */
+ int max_channel;
} audio;
/*
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 32157bef2eef..0188a600f9f5 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2277,6 +2277,40 @@ bool intel_hdmi_compute_has_hdmi_sink(struct
intel_encoder *encoder,
!intel_hdmi_is_cloned(crtc_state);
}
+static unsigned int calc_audio_bw(int channel, int frequency)
+{
+ int bits_per_sample = 32;
+ unsigned int bandwidth = channel * frequency * bits_per_sample;
+ return bandwidth;
+}
+
+void
+intel_hdmi_audio_compute_config(struct intel_crtc_state *pipe_config)
+{
+ struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+ int num_of_channel, aud_rates[7] = {192000, 176000, 96000, 88000,
48000, 44100, 32000};
+ unsigned int audio_req_bandwidth, available_blank_bandwidth, vblank,
hblank;
+
+ hblank = adjusted_mode->htotal - adjusted_mode->hdisplay;
+ vblank = adjusted_mode->vtotal - adjusted_mode->vdisplay;
+ available_blank_bandwidth = hblank * vblank *
+ drm_mode_vrefresh(adjusted_mode) *
pipe_config->pipe_bpp;
+ for (num_of_channel = 8; num_of_channel > 0; num_of_channel--) {
+ for (int index = 0; index < 7; index++) {
+ audio_req_bandwidth = calc_audio_bw(num_of_channel,
+ aud_rates[index]);
+ if (audio_req_bandwidth < available_blank_bandwidth) {
+ pipe_config->audio.max_frequency =
aud_rates[index];
+ pipe_config->audio.max_channel = num_of_channel;
+ return;
+ }
+ }
+ }
+
+ pipe_config->audio.max_frequency = 0;
+ pipe_config->audio.max_channel = 0;
+}
+
int intel_hdmi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
@@ -2344,6 +2378,7 @@ int intel_hdmi_compute_config(struct intel_encoder
*encoder,
pipe_config->hdmi_high_tmds_clock_ratio = true;
}
}
+ intel_hdmi_audio_compute_config(pipe_config);
intel_hdmi_compute_gcp_infoframe(encoder, pipe_config,
conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h
b/drivers/gpu/drm/i915/display/intel_hdmi.h
index 6b39df38d57a..6df303daf348 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -27,6 +27,7 @@ void intel_hdmi_init_connector(struct intel_digital_port
*dig_port,
bool intel_hdmi_compute_has_hdmi_sink(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state
*conn_state);
+void intel_hdmi_audio_compute_config(struct intel_crtc_state *pipe_config);
int intel_hdmi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state);
--
2.25.1
[Intel-gfx] [RFC 3/3] drm/i915/display: Add wrapper to Compute SAD
Compute SADs that takes into account the supported rate and channel
based on the capabilities of the audio source. This wrapper function
should encapsulate the logic for determining the supported rate and
channel and should return a set of SADs that are compatible with the
source.
--v1:
- call intel_audio_compute_eld in this commit as it is defined here
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_audio.c | 66 ++
drivers/gpu/drm/i915/display/intel_audio.h | 1 +
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +
3 files changed, 69 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
b/drivers/gpu/drm/i915/display/intel_audio.c
index e20ffc8e9654..a6a58b0f0717 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -794,6 +794,72 @@ bool intel_audio_compute_config(struct intel_encoder
*encoder,
return true;
}
+static unsigned int drm_sad_to_channels(const u8 *sad)
+{
+ return 1 + (sad[0] & 0x7);
+}
+
+static inline u8 *parse_sad(u8 *eld)
+{
+ unsigned int ver, mnl;
+
+ ver = (eld[DRM_ELD_VER] & DRM_ELD_VER_MASK) >> DRM_ELD_VER_SHIFT;
+ if (ver != 2 && ver != 31)
+ return NULL;
+
+ mnl = drm_eld_mnl(eld);
+ if (mnl > 16)
+ return NULL;
+
+ return eld + DRM_ELD_CEA_SAD(mnl, 0);
+}
+
+static u8 get_supported_freq_mask(struct intel_crtc_state *crtc_state)
+{
+ int audio_freq_hz[] = {32000, 44100, 48000, 88000, 96000, 176000,
192000, 0};
+ u8 mask = 0;
+
+ for (u8 index = 0; index < ARRAY_SIZE(audio_freq_hz); index++) {
+ mask |= 1 << index;
+ if (crtc_state->audio.max_frequency != audio_freq_hz[index])
+ continue;
+ else
+ break;
+ }
+
+ return mask;
+}
+
+void intel_audio_compute_eld(struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ u8 *eld, *sad, index, mask = 0;
+
+ eld = crtc_state->eld;
+ if (!eld) {
+ drm_err(&i915->drm, "failed to locate eld\n");
+ return;
+ }
+
+ sad = (u8 *)parse_sad(eld);
+ if (sad) {
+ mask = get_supported_freq_mask(crtc_state);
+
+ for (index = 0; index < drm_eld_sad_count(eld); index++, sad +=
3) {
+ /*
+* Respect to source restrictions. If source limit is
greater than sink
+* capabilities then follow to sink's highest
supported rate.
+*/
+ if (drm_sad_to_channels(sad) >=
crtc_state->audio.max_channel) {
+ sad[0] &= ~0x7;
+ sad[0] |= crtc_state->audio.max_channel - 1;
+ }
+
+ sad[1] &= mask;
+ }
+ }
+}
+
/**
* intel_audio_codec_enable - Enable the audio codec for HD audio
* @encoder: encoder on which to enable audio
diff --git a/drivers/gpu/drm/i915/display/intel_audio.h
b/drivers/gpu/drm/i915/display/intel_audio.h
index 07d034a981e9..2ec7fafd9711 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.h
+++ b/drivers/gpu/drm/i915/display/intel_audio.h
@@ -14,6 +14,7 @@ struct intel_crtc_state;
struct intel_encoder;
void intel_audio_hooks_init(struct drm_i915_private *dev_priv);
+void intel_audio_compute_eld(struct intel_crtc_state *crtc_state);
bool intel_audio_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 0188a600f9f5..beafeff494f8 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2403,6 +2403,8 @@ int intel_hdmi_compute_config(struct intel_encoder
*encoder,
return -EINVAL;
}
+ intel_audio_compute_eld(pipe_config);
+
return 0;
}
--
2.25.1
[Intel-gfx] [RFC 1/3] drm/i915/hdmi: Optimize source audio parameter handling
To enhance the relationship between the has_audio and the source
audio parameter, create a separate crtc_state audio property and
add the has_audio parameter into it. Additionally, update the
access of the has_audio parameter from the crtc_state pointer as
it is wrapped under the audio. These modifications establish
a more cohesive structure and improve the accessibility and
organization of the audio-related parameters within the codebase.
--v1:
- add audio instead of audio_config in crtc_state
- add only has_audio then update related parameter access
- refactor other member to different commit where it is being used
- update commit message and header
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/g4x_dp.c| 4 ++--
drivers/gpu/drm/i915/display/g4x_hdmi.c | 16
drivers/gpu/drm/i915/display/intel_audio.c | 6 +++---
drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +++---
.../gpu/drm/i915/display/intel_crtc_state_dump.c | 4 ++--
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
.../gpu/drm/i915/display/intel_display_types.h | 6 +++---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c| 2 +-
drivers/gpu/drm/i915/display/intel_sdvo.c| 10 +-
12 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
b/drivers/gpu/drm/i915/display/g4x_dp.c
index 112d91d81fdc..19f94f3331ee 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -345,7 +345,7 @@ static void intel_dp_get_config(struct intel_encoder
*encoder,
tmp = intel_de_read(dev_priv, intel_dp->output_reg);
- pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A;
+ pipe_config->audio.has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port !=
PORT_A;
if (HAS_PCH_CPT(dev_priv) && port != PORT_A) {
u32 trans_dp = intel_de_read(dev_priv,
@@ -625,7 +625,7 @@ static void intel_dp_enable_port(struct intel_dp *intel_dp,
* fail when the power sequencer is freshly used for this port.
*/
intel_dp->DP |= DP_PORT_EN;
- if (crtc_state->has_audio)
+ if (crtc_state->audio.has_audio)
intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 5c187e6e0472..363e21156304 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -178,7 +178,7 @@ static void intel_hdmi_get_config(struct intel_encoder
*encoder,
pipe_config->has_infoframe = true;
if (tmp & HDMI_AUDIO_ENABLE)
- pipe_config->has_audio = true;
+ pipe_config->audio.has_audio = true;
if (!HAS_PCH_SPLIT(dev_priv) &&
tmp & HDMI_COLOR_RANGE_16_235)
@@ -224,7 +224,7 @@ static void g4x_hdmi_enable_port(struct intel_encoder
*encoder,
temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
- if (pipe_config->has_audio)
+ if (pipe_config->audio.has_audio)
temp |= HDMI_AUDIO_ENABLE;
intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
@@ -240,7 +240,7 @@ static void g4x_enable_hdmi(struct intel_atomic_state
*state,
g4x_hdmi_enable_port(encoder, pipe_config);
- drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
+ drm_WARN_ON(&dev_priv->drm, pipe_config->audio.has_audio &&
!pipe_config->has_hdmi_sink);
intel_audio_codec_enable(encoder, pipe_config, conn_state);
}
@@ -258,7 +258,7 @@ static void ibx_enable_hdmi(struct intel_atomic_state
*state,
temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
- if (pipe_config->has_audio)
+ if (pipe_config->audio.has_audio)
temp |= HDMI_AUDIO_ENABLE;
/*
@@ -293,7 +293,7 @@ static void ibx_enable_hdmi(struct intel_atomic_state
*state,
intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
}
- drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
+ drm_WARN_ON(&dev_priv->drm, pipe_config->audio.has_audio &&
!pipe_config->has_hdmi_sink);
intel_audio_codec_enable(encoder, pipe_config, conn_state);
}
@@ -313,7 +313,7 @@ static void cpt_enable_hdmi(struct intel_atomic_state
*state,
temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
- if (pipe_config->has_audio)
+ if (pipe_config->audio.has_audio)
temp |= HDMI_AUDIO_ENABLE;
/*
@@ -348,7 +348,7 @@ static void cpt_enable_hdmi(struct intel_atomic_state
*state
[Intel-gfx] [RFC 0/3] Get optimal audio frequency and channels
Currently we do not check if there is enough bandwidth for audio, and what channels and freq it can really support. Also sometimes there can be HW constraints e.g. GLK where audio channels supported are only 2. https://patchwork.freedesktop.org/series/107647/ Obtain the optimal audio rate and channel based on available display timing constraints. This can be achieved by: - Retrieve the supported channel and rate information from SADs - Adding audio-related config parameters in the CRTC state, such as audio support, rate, and channel. - Initializing the audio config parameters with the maximum supported rate and channel by the audio source. - Computing the SADs based on the audio source's capabilities. Mitul Golani (3): drm/i915/hdmi: Optimize source audio parameter handling drm/i915/display: Configure and initialize HDMI audio capabilities drm/i915/display: Add wrapper to Compute SAD drivers/gpu/drm/i915/display/g4x_dp.c | 4 +- drivers/gpu/drm/i915/display/g4x_hdmi.c | 16 ++--- drivers/gpu/drm/i915/display/intel_audio.c| 72 ++- drivers/gpu/drm/i915/display/intel_audio.h| 1 + drivers/gpu/drm/i915/display/intel_cdclk.c| 6 +- .../drm/i915/display/intel_crtc_state_dump.c | 4 +- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 4 +- .../drm/i915/display/intel_display_types.h| 12 +++- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 39 +- drivers/gpu/drm/i915/display/intel_hdmi.h | 1 + drivers/gpu/drm/i915/display/intel_sdvo.c | 10 +-- 14 files changed, 143 insertions(+), 32 deletions(-) -- 2.25.1
[Intel-gfx] ✗ Fi.CI.BAT: failure for Move stolen memory handling details into i915_gem_stolen
== Series Details == Series: Move stolen memory handling details into i915_gem_stolen URL : https://patchwork.freedesktop.org/series/119123/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13256 -> Patchwork_119123v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_119123v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_119123v1, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/index.html Participating hosts (36 -> 37) -- Additional (1): fi-kbl-soraka Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_119123v1: ### IGT changes ### Possible regressions * igt@kms_busy@basic@flip: - fi-kbl-7567u: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-kbl-7567u/igt@kms_busy@ba...@flip.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-kbl-7567u/igt@kms_busy@ba...@flip.html - fi-cfl-8700k: [PASS][3] -> [ABORT][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-cfl-8700k/igt@kms_busy@ba...@flip.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-cfl-8700k/igt@kms_busy@ba...@flip.html - fi-tgl-1115g4: [PASS][5] -> [ABORT][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-tgl-1115g4/igt@kms_busy@ba...@flip.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-tgl-1115g4/igt@kms_busy@ba...@flip.html - fi-cfl-guc: [PASS][7] -> [ABORT][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-cfl-guc/igt@kms_busy@ba...@flip.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-cfl-guc/igt@kms_busy@ba...@flip.html - fi-cfl-8109u: [PASS][9] -> [ABORT][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-cfl-8109u/igt@kms_busy@ba...@flip.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-cfl-8109u/igt@kms_busy@ba...@flip.html - bat-jsl-1: [PASS][11] -> [ABORT][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-jsl-1/igt@kms_busy@ba...@flip.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/bat-jsl-1/igt@kms_busy@ba...@flip.html - fi-rkl-11600: [PASS][13] -> [ABORT][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-rkl-11600/igt@kms_busy@ba...@flip.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-rkl-11600/igt@kms_busy@ba...@flip.html - fi-skl-6600u: [PASS][15] -> [ABORT][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-skl-6600u/igt@kms_busy@ba...@flip.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-skl-6600u/igt@kms_busy@ba...@flip.html - bat-jsl-3: [PASS][17] -> [ABORT][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-jsl-3/igt@kms_busy@ba...@flip.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/bat-jsl-3/igt@kms_busy@ba...@flip.html - fi-glk-j4005: [PASS][19] -> [ABORT][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-glk-j4005/igt@kms_busy@ba...@flip.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-glk-j4005/igt@kms_busy@ba...@flip.html - fi-kbl-soraka: NOTRUN -> [ABORT][21] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-kbl-soraka/igt@kms_busy@ba...@flip.html * igt@kms_busy@basic@modeset: - bat-jsl-3: [PASS][22] -> [DMESG-WARN][23] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-jsl-3/igt@kms_busy@ba...@modeset.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/bat-jsl-3/igt@kms_busy@ba...@modeset.html - fi-glk-j4005: [PASS][24] -> [DMESG-WARN][25] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-glk-j4005/igt@kms_busy@ba...@modeset.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-glk-j4005/igt@kms_busy@ba...@modeset.html - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][26] [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-kbl-soraka/igt@kms_busy@ba...@modeset.html - fi-kbl-7567u: [PASS][27] -> [DMESG-WARN][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-kbl-7567u/igt@kms_busy@ba...@modeset.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119123v1/fi-kbl-7567u/igt@kms_busy@ba...@modeset.html - fi-cfl-8700k: [PASS][29] -> [DMESG-WARN][30] [29]: https://intel-
[Intel-gfx] ✓ Fi.CI.BAT: success for Get optimal audio frequency and channels
== Series Details ==
Series: Get optimal audio frequency and channels
URL : https://patchwork.freedesktop.org/series/119121/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13256 -> Patchwork_119121v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/index.html
Participating hosts (36 -> 35)
--
Missing(1): bat-rpls-2
Known issues
Here are the changes found in Patchwork_119121v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_suspend@basic-s3-without-i915:
- bat-rpls-1: NOTRUN -> [ABORT][1] ([i915#6687] / [i915#7978])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/bat-rpls-1/igt@i915_susp...@basic-s3-without-i915.html
Possible fixes
* igt@i915_selftest@live@gem_contexts:
- {bat-mtlp-8}: [ABORT][2] -> [PASS][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-mtlp-8/igt@i915_selftest@live@gem_contexts.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/bat-mtlp-8/igt@i915_selftest@live@gem_contexts.html
* igt@i915_selftest@live@gt_mocs:
- {bat-mtlp-6}: [DMESG-FAIL][4] ([i915#7059]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [ABORT][6] ([i915#4983] / [i915#7461] / [i915#7981] /
[i915#8347] / [i915#8384]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-rpls-1/igt@i915_selftest@l...@reset.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/bat-rpls-1/igt@i915_selftest@l...@reset.html
* igt@i915_selftest@live@slpc:
- {bat-mtlp-6}: [DMESG-WARN][8] ([i915#6367]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-mtlp-6/igt@i915_selftest@l...@slpc.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/bat-mtlp-6/igt@i915_selftest@l...@slpc.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-11}: [ABORT][10] ([i915#4423]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-adlp-11/igt@kms_busy@ba...@modeset.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/bat-adlp-11/igt@kms_busy@ba...@modeset.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
- bat-dg2-8: [FAIL][12] ([i915#7932]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-1.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-1:
- fi-cfl-8109u: [ABORT][14] -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13256/fi-cfl-8109u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-1.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119121v1/fi-cfl-8109u/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4309]: https://gitlab.freedesktop.org/drm/intel/issues/4309
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384
Build changes
-
* Linux: CI_DRM_13256 -> Patchwork_119121v1
CI-20190529: 20190529
CI_DRM_13256: be85dc2d44c075230eec4366e27bc1fe75ee59ff @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7322: 2dd77d6d827a308caae49ce3eba759c2bab
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: copy-paste the extra warnings from scripts/Makefile.extrawarn
== Series Details == Series: series starting with [1/3] drm/i915: copy-paste the extra warnings from scripts/Makefile.extrawarn URL : https://patchwork.freedesktop.org/series/119067/ State : success == Summary == CI Bug Log - changes from CI_DRM_13250_full -> Patchwork_119067v1_full Summary --- **SUCCESS** No regressions found. Participating hosts (7 -> 7) -- No changes in participating hosts Known issues Here are the changes found in Patchwork_119067v1_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - shard-apl: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl2/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@verify: - shard-apl: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +1 similar issue [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl3/igt@gem_lmem_swapp...@verify.html * igt@gem_pread@exhaustion: - shard-apl: NOTRUN -> [WARN][3] ([i915#2658]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl3/igt@gem_pr...@exhaustion.html * igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#3886]) +4 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl3/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html * igt@kms_content_protection@uevent@pipe-a-dp-1: - shard-apl: NOTRUN -> [FAIL][5] ([i915#1339]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl2/igt@kms_content_protection@uev...@pipe-a-dp-1.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: [PASS][6] -> [FAIL][7] ([i915#2346]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13250/shard-glk5/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-glk7/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html - shard-apl: [PASS][8] -> [FAIL][9] ([i915#2346]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13250/shard-apl3/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl2/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html * igt@kms_flip@flip-vs-suspend-interruptible@b-dp1: - shard-apl: [PASS][10] -> [ABORT][11] ([i915#180]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13250/shard-apl1/igt@kms_flip@flip-vs-suspend-interrupti...@b-dp1.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl1/igt@kms_flip@flip-vs-suspend-interrupti...@b-dp1.html * igt@kms_plane_alpha_blend@alpha-basic@pipe-a-dp-1: - shard-apl: NOTRUN -> [FAIL][12] ([i915#7862]) +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl3/igt@kms_plane_alpha_blend@alpha-ba...@pipe-a-dp-1.html * igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-dp-1: - shard-apl: NOTRUN -> [FAIL][13] ([i915#4573]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl2/igt@kms_plane_alpha_blend@constant-alpha-...@pipe-c-dp-1.html * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-c-dp-1: - shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4579]) +11 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl2/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0...@pipe-c-dp-1.html * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-a-vga-1: - shard-snb: NOTRUN -> [SKIP][15] ([fdo#109271]) +12 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-snb7/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-form...@pipe-a-vga-1.html * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-vga-1: - shard-snb: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4579]) +6 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-snb4/igt@kms_plane_scaling@plane-upscale-with-modifiers-20...@pipe-b-vga-1.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb: - shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#658]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119067v1/shard-apl3/igt@kms_psr2...@primary-plane-update-sf-dmg-area-big-fb.html * igt@v3d/v3d_wait_bo@unused-bo-1ns: - shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271]) +102 similar issues
Re: [Intel-gfx] [PATCH 6/8] drm: Add drm_gem_prime_fd_to_handle_obj
On Fri, Jun 9, 2023 at 7:12 AM Tvrtko Ursulin
wrote:
>
>
> On 09/06/2023 13:44, Iddamsetty, Aravind wrote:
> > On 09-06-2023 17:41, Tvrtko Ursulin wrote:
> >> From: Tvrtko Ursulin
> >>
> >> I need a new flavour of the drm_gem_prime_fd_to_handle helper, one which
> >> will return a reference to a newly created GEM objects (if created), in
> >> order to enable tracking of imported i915 GEM objects in the following
> >> patch.
> >
> > instead of this what if we implement the open call back in i915
> >
> > struct drm_gem_object_funcs {
> >
> > /**
> > * @open:
> > *
> > * Called upon GEM handle creation.
> > *
> > * This callback is optional.
> > */
> > int (*open)(struct drm_gem_object *obj, struct drm_file *file);
> >
> > which gets called whenever a handle(drm_gem_handle_create_tail) is
> > created and in the open we can check if to_intel_bo(obj)->base.dma_buf
> > then it is imported if not it is owned or created by it.
>
> I wanted to track as much memory usage as we have which is buffer object
> backed, including page tables and contexts. And since those are not user
> visible (they don't have handles), they wouldn't be covered by the
> obj->funcs->open() callback.
>
> If we wanted to limit to objects with handles we could simply do what
> Rob proposed and that is to walk the handles idr. But that does not feel
> like the right direction to me. Open for discussion I guess.
I guess you just have a few special case objects per context?
Wouldn't it be easier to just track _those_ specially and append them
to the results after doing the normal idr table walk?
(Also, doing something special for dma-buf smells a bit odd..
considering that we also have legacy flink name based sharing as
well.)
BR,
-R
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Cable type identification for DP2.1
== Series Details ==
Series: drm/i915/dp: Cable type identification for DP2.1
URL : https://patchwork.freedesktop.org/series/119109/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13255 -> Patchwork_119109v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/index.html
Participating hosts (34 -> 34)
--
No changes in participating hosts
Known issues
Here are the changes found in Patchwork_119109v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@gt_pm:
- bat-rpls-2: [PASS][1] -> [DMESG-FAIL][2] ([i915#4258] /
[i915#7913])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [PASS][3] -> [ABORT][4] ([i915#4983] / [i915#7461] /
[i915#8347] / [i915#8384])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-rpls-1/igt@i915_selftest@l...@reset.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/bat-rpls-1/igt@i915_selftest@l...@reset.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-jsl-1: NOTRUN -> [SKIP][5] ([i915#7828])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/bat-jsl-1/igt@kms_chamelium_...@common-hpd-after-suspend.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@smem:
- bat-jsl-1: [ABORT][6] ([i915#5122]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-jsl-1/igt@gem_exec_suspend@basic...@smem.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/bat-jsl-1/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@mman:
- bat-rpls-2: [TIMEOUT][8] ([i915#6794] / [i915#7392]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-rpls-2/igt@i915_selftest@l...@mman.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/bat-rpls-2/igt@i915_selftest@l...@mman.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-jsl-1: [FAIL][10] ([fdo#103375]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-jsl-1/igt@i915_susp...@basic-s3-without-i915.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/bat-jsl-1/igt@i915_susp...@basic-s3-without-i915.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-1:
- bat-dg2-8: [FAIL][12] ([i915#7932]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-c-dp-1.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-...@pipe-c-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
[i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384
Build changes
-
* Linux: CI_DRM_13255 -> Patchwork_119109v1
CI-20190529: 20190529
CI_DRM_13255: a435969faa911169d7d20145246e88342694a09a @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7322: 2dd77d6d827a308caae49ce3eba759c2bab394ed @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_119109v1: a435969faa911169d7d20145246e88342694a09a @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
65f7b5ce8b01 drm/i915/dp: Cable type identification for DP2.1
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119109v1/index.html
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern names
== Series Details == Series: series starting with [1/2] drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern names URL : https://patchwork.freedesktop.org/series/119106/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13255 -> Patchwork_119106v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_119106v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_119106v1, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/index.html Participating hosts (34 -> 34) -- Additional (1): fi-kbl-soraka Missing(1): fi-skl-6600u Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_119106v1: ### IGT changes ### Possible regressions * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-1: - bat-adlp-9: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-adlp-9/igt@kms_pipe_crc_basic@nonblocking-...@pipe-c-dp-1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/bat-adlp-9/igt@kms_pipe_crc_basic@nonblocking-...@pipe-c-dp-1.html Known issues Here are the changes found in Patchwork_119106v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@i915_selftest@live@gt_pm: - bat-rpls-2: [PASS][5] -> [DMESG-FAIL][6] ([i915#4258] / [i915#7913]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-rpls-2/igt@i915_selftest@live@gt_pm.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/bat-rpls-2/igt@i915_selftest@live@gt_pm.html - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#7913]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@migrate: - bat-atsm-1: [PASS][8] -> [DMESG-FAIL][9] ([i915#7699] / [i915#7913]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-atsm-1/igt@i915_selftest@l...@migrate.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/bat-atsm-1/igt@i915_selftest@l...@migrate.html * igt@i915_selftest@live@slpc: - bat-rpls-2: NOTRUN -> [DMESG-WARN][10] ([i915#6367]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/bat-rpls-2/igt@i915_selftest@l...@slpc.html * igt@kms_chamelium_frames@hdmi-crc-fast: - fi-kbl-soraka: NOTRUN -> [SKIP][11] ([fdo#109271]) +14 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/fi-kbl-soraka/igt@kms_chamelium_fra...@hdmi-crc-fast.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - bat-jsl-1: NOTRUN -> [SKIP][12] ([i915#7828]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/bat-jsl-1/igt@kms_chamelium_...@common-hpd-after-suspend.html * igt@kms_pipe_crc_basic@suspend-read-crc: - fi-ivb-3770:NOTRUN -> [SKIP][13] ([fdo#109271]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/fi-ivb-3770/igt@kms_pipe_crc_ba...@suspend-read-crc.html * igt@kms_setmode@basic-clone-single-crtc: - fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4579]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/fi-kbl-soraka/igt@kms_setm...@basic-clone-single-crtc.html Possible fixes * igt@gem_exec_suspend@basic-s0@smem: - bat-jsl-1: [ABORT][15] ([i915#5122]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-jsl-1/igt@gem_exec_suspend@basic...@smem.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/bat-jsl-1/igt@gem_exec_suspend@basic...@smem.html * igt@i915_selftest@live@guc: - bat-rpls-1: [DMESG-WARN][17] ([i915#7852]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13255/bat-rpls-1/igt@i915_selftest@l...@guc.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119106v1/bat-rpls-1/igt@i915_selftest@l...@guc.html * igt@i915_selftest@live@mman: - bat-rpls-2: [TIMEOUT][19] ([i915#6794] / [i915#7392]) -> [PASS][20] [19]: https://intel-gfx-
[Intel-gfx] [linux-next:master] BUILD REGRESSION 53ab6975c12d1ad86c599a8927e8c698b144d669
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 53ab6975c12d1ad86c599a8927e8c698b144d669 Add linux-next specific
files for 20230609
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202306081708.gtvacxsh-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202306082341.uqtcm8po-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202306100035.vtusnhm4-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202306100056.z3g9guft-...@intel.com
Error/Warning: (recently discovered and may have been fixed)
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c:113:17: warning: format specifies
type 'long' but the argument has type 'size_t' (aka 'unsigned int') [-Wformat]
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c:147:17: warning: format specifies
type 'long' but the argument has type 'size_t' (aka 'unsigned int') [-Wformat]
drivers/leds/leds-cht-wcove.c:144:21: warning: no previous prototype for
'cht_wc_leds_brightness_get' [-Wmissing-prototypes]
drivers/scsi/FlashPoint.c:1712:12: warning: stack frame size (1056) exceeds
limit (1024) in 'FlashPoint_HandleInterrupt' [-Wframe-larger-than]
include/drm/drm_print.h:456:39: error: format '%ld' expects argument of type
'long int', but argument 4 has type 'size_t' {aka 'unsigned int'}
[-Werror=format=]
include/drm/drm_print.h:456:39: warning: format '%ld' expects argument of type
'long int', but argument 4 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
uvdevice.c:(.init.text+0x2e): undefined reference to `uv_info'
Unverified Error/Warning (likely false positive, please contact us if
interested):
drivers/net/ethernet/emulex/benet/be_main.c:2460 be_rx_compl_process_gro()
error: buffer overflow '((skb_end_pointer(skb)))->frags' 17 <= u16max
drivers/usb/cdns3/cdns3-starfive.c:23: warning: expecting prototype for
cdns3(). Prototype was for USB_STRAP_HOST() instead
fs/btrfs/volumes.c:6407 btrfs_map_block() error: we previously assumed
'mirror_num_ret' could be null (see line 6245)
kernel/events/uprobes.c:478 uprobe_write_opcode() warn: passing zero to
'PTR_ERR'
Error/Warning ids grouped by kconfigs:
gcc_recent_errors
|-- i386-allyesconfig
| |--
drivers-leds-leds-cht-wcove.c:warning:no-previous-prototype-for-cht_wc_leds_brightness_get
| `--
include-drm-drm_print.h:error:format-ld-expects-argument-of-type-long-int-but-argument-has-type-size_t-aka-unsigned-int
|-- i386-randconfig-i004-20230608
| `--
include-drm-drm_print.h:error:format-ld-expects-argument-of-type-long-int-but-argument-has-type-size_t-aka-unsigned-int
|-- i386-randconfig-i062-20230608
| `--
include-drm-drm_print.h:warning:format-ld-expects-argument-of-type-long-int-but-argument-has-type-size_t-aka-unsigned-int
|-- riscv-allmodconfig
| `--
drivers-usb-cdns3-cdns3-starfive.c:warning:expecting-prototype-for-cdns3().-Prototype-was-for-USB_STRAP_HOST()-instead
|-- riscv-allyesconfig
| `--
drivers-usb-cdns3-cdns3-starfive.c:warning:expecting-prototype-for-cdns3().-Prototype-was-for-USB_STRAP_HOST()-instead
|-- s390-randconfig-r044-20230609
| `-- uvdevice.c:(.init.text):undefined-reference-to-uv_info
|-- x86_64-allyesconfig
| `--
drivers-leds-leds-cht-wcove.c:warning:no-previous-prototype-for-cht_wc_leds_brightness_get
`-- x86_64-randconfig-m001-20230608
|--
drivers-net-ethernet-emulex-benet-be_main.c-be_rx_compl_process_gro()-error:buffer-overflow-((skb_end_pointer(skb)))-frags-u16max
|--
fs-btrfs-volumes.c-btrfs_map_block()-error:we-previously-assumed-mirror_num_ret-could-be-null-(see-line-)
`--
kernel-events-uprobes.c-uprobe_write_opcode()-warn:passing-zero-to-PTR_ERR
clang_recent_errors
|-- i386-randconfig-i014-20230608
| `--
drivers-gpu-drm-i915-pxp-intel_pxp_gsccs.c:warning:format-specifies-type-long-but-the-argument-has-type-size_t-(aka-unsigned-int-)
|-- i386-randconfig-r026-20230608
| `--
drivers-gpu-drm-i915-pxp-intel_pxp_gsccs.c:warning:format-specifies-type-long-but-the-argument-has-type-size_t-(aka-unsigned-int-)
`-- powerpc-allmodconfig
`--
drivers-scsi-FlashPoint.c:warning:stack-frame-size-()-exceeds-limit-()-in-FlashPoint_HandleInterrupt
elapsed time: 729m
configs tested: 149
configs skipped: 6
tested configs:
alphaallyesconfig gcc
alpha defconfig gcc
arc allyesconfig gcc
arc defconfig gcc
arc haps_hs_defconfig gcc
arc randconfig-r011-20230608 gcc
arc randconfig-r033-20230608 gcc
arc randconfig-r043-20230608 gcc
arm allmodconfig gcc
arm allyesconfig gcc
arm
Re: [Intel-gfx] [PATCH v2] drm/i915/gsc: take a wakeref for the proxy-init-completion check
On 6/8/2023 4:07 PM, Alan Previn wrote:
Ensure intel_gsc_uc_fw_init_done and intel_gsc_uc_fw_proxy_init
takes a wakeref before reading GSC Shim registers.
NOTE: another patch in review also adds a call from selftest to
this same function. (https://patchwork.freedesktop.org/series/117713/)
which is why i am adding the wakeref inside the callee, not the
caller.
v2: - add a helper, 'gsc_uc_get_fw_status' for both callers
(Daniele Ceraolo)
Fixes: 99afb7cc8c44 ("drm/i915/pxp: Add ARB session creation and cleanup")
Signed-off-by: Alan Previn
Reviewed-by: Daniele Ceraolo Spurio
Daniele
---
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index f46eb17a7a98..60e9c6c9e775 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -24,21 +24,27 @@ static bool gsc_is_in_reset(struct intel_uncore *uncore)
GSC_FW_CURRENT_STATE_RESET;
}
-bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc)
+static u32 gsc_uc_get_fw_status(struct intel_uncore *uncore)
{
- struct intel_uncore *uncore = gsc_uc_to_gt(gsc)->uncore;
- u32 fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
+ intel_wakeref_t wakeref;
+ u32 fw_status = 0;
- return REG_FIELD_GET(GSC_FW_CURRENT_STATE, fw_status) ==
+ with_intel_runtime_pm(uncore->rpm, wakeref)
+ fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
+
+ return fw_status;
+}
+
+bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc)
+{
+ return REG_FIELD_GET(GSC_FW_CURRENT_STATE,
+gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore)) ==
GSC_FW_PROXY_STATE_NORMAL;
}
bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc)
{
- struct intel_uncore *uncore = gsc_uc_to_gt(gsc)->uncore;
- u32 fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
-
- return fw_status & GSC_FW_INIT_COMPLETE_BIT;
+ return gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore) &
GSC_FW_INIT_COMPLETE_BIT;
}
static int emit_gsc_fw_load(struct i915_request *rq, struct intel_gsc_uc *gsc)
base-commit: 27187d09511e1d47dbaaf91c7332319551a8edab
Re: [Intel-gfx] [PATCH v3 4/4] PCI/VGA: introduce is_boot_device function callback to vga_client_register
On Fri, Jun 09, 2023 at 10:27:39AM +0800, Sui Jingfeng wrote: > On 2023/6/9 03:19, Bjorn Helgaas wrote: > > On Thu, Jun 08, 2023 at 07:43:22PM +0800, Sui Jingfeng wrote: > > > From: Sui Jingfeng > > > > > > The vga_is_firmware_default() function is arch-dependent, which doesn't > > > sound right. At least, it also works on the Mips and LoongArch platforms. > > > Tested with the drm/amdgpu and drm/radeon drivers. However, it's difficult > > > to enumerate all arch-driver combinations. I'm wrong if there is only one > > > exception. > > > > > > With the observation that device drivers typically have better knowledge > > > about which PCI bar contains the firmware framebuffer, which could avoid > > > the need to iterate all of the PCI BARs. > > > > > > But as a PCI function at pci/vgaarb.c, vga_is_firmware_default() is > > > probably not suitable to make such an optimization for a specific device. > > > > > > There are PCI display controllers that don't have a dedicated VRAM bar, > > > this function will lose its effectiveness in such a case. Luckily, the > > > device driver can provide an accurate workaround. > > > > > > Therefore, this patch introduces a callback that allows the device driver > > > to tell the VGAARB if the device is the default boot device. This patch > > > only intends to introduce the mechanism, while the implementation is left > > > to the device driver authors. Also honor the comment: "Clients have two > > > callback mechanisms they can use" > > s/bar/BAR/ (several) > > > > Nothing here uses the callback. I don't want to merge this until we > > have a user. > > This is chicken and egg question. > > If you could help get this merge first, I will show you the first user. > > > I'm not sure why the device driver should know whether its device is > > the default boot device. > > It's not that the device driver should know, > > but it's about that the device driver has the right to override. > > Device driver may have better approach to identify the default boot > device. The way we usually handle this is to include the new callback in the same series as the first user of it. That has two benefits: (1) everybody can review the whole picture and possibly suggest different approaches, and (2) when we merge the infrastructure, we also merge a user of it at the same time, so the whole thing can be tested and we don't end up with unused code. Bjorn
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Restore HSW/BDW PSR1 (rev2)
== Series Details == Series: drm/i915/psr: Restore HSW/BDW PSR1 (rev2) URL : https://patchwork.freedesktop.org/series/116814/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit' +./a
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/psr: Restore HSW/BDW PSR1 (rev2)
== Series Details == Series: drm/i915/psr: Restore HSW/BDW PSR1 (rev2) URL : https://patchwork.freedesktop.org/series/116814/ State : warning == Summary == Error: dim checkpatch failed 8d0ed154f842 drm/i915: Re-init clock gating on coming out of PC8+ 611fbc172ab6 drm/i915/psr: Fix BDW PSR AUX CH data register offsets -:26: WARNING:LONG_LINE_COMMENT: line length of 111 exceeds 100 columns #26: FILE: drivers/gpu/drm/i915/display/intel_psr_regs.h:84: +#define EDP_PSR_AUX_DATA(tran, i) _MMIO_TRANS2(tran, _SRD_AUX_DATA_A + (i) * 4) /* 5 registers */ total: 0 errors, 1 warnings, 0 checks, 8 lines checked 36f425356759 drm/i915/psr: Wrap PSR1 register with functions -:142: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #142: FILE: drivers/gpu/drm/i915/display/intel_psr.c:1242: + intel_de_read(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder)) & EDP_PSR_ENABLE); total: 0 errors, 1 warnings, 0 checks, 208 lines checked 52de64b78bab drm/i915/psr: Reintroduce HSW PSR1 registers 54a96841affe drm/i915/psr: Bring back HSW/BDW PSR AUX CH registers/setup 5e417ac7e0c0 drm/i915/psr: HSW/BDW have no PSR2 c00c783fa2b5 drm/i915/psr: Restore PSR interrupt handler for HSW 1eb8ab4d74fc drm/i915/psr: Implement WaPsrDPAMaskVBlankInSRD:hsw 9f0f594fd35d drm/i915/psr: Implement WaPsrDPRSUnmaskVBlankInSRD:hsw 9477cb0f2f4e drm/i915/psr: Do no mask display register writes on hsw/bdw b75d4b981cb5 drm/i915/psr: Don't skip both TP1 and TP2/3 on hsw/bdw 8493c9e3d192 drm/i915/psr: Allow PSR with sprite enabled on hsw/bdw 7921951d6576 drm/i915/psr: Re-enable PSR1 on hsw/bdw
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for x86/mm: Fix PAT bit missing from page protection modify mask (rev3)
== Series Details == Series: x86/mm: Fix PAT bit missing from page protection modify mask (rev3) URL : https://patchwork.freedesktop.org/series/116883/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH v17 1/1] drm/i915: Allow user to set cache at BO creation
> Hi Carl, > besides this, ask a dumb question. How we retrieve the pat_index from a shared resource though dma_buf fd? maybe we need to know whether it could be CPU cached if we want map it. Of course, looks there are no real usage to access it though CPU. Just use it directly without any pat related options ? >>> >>> I am not understanding. Do you want to ask the PAT table to the driver? Are >>> you referring to the CPU PAT index? >>> >>> In any case, if I understood correctly, you don't necessarily always need to >>> set the PAT options and the cache options will fall into the default values. >>> >>> Please let me know if I haven't answered the question. >>> >> >> If mesa create a resource , then use DRM_IOCTL_PRIME_HANDLE_TO_FD convert it >> to a dma fd. >> Then share it to media, media use DRM_IOCTL_PRIME_FD_TO_HANDLE convert it to >> a gem bo. >> But media does not know the PAT index , because mesa create it and set it. >> So, if media want to call DRM_IOCTL_I915_GEM_MMAP_OFFSET, media does not >> know whether it could be WB. > > That's a good point. To be honest I am not really sure how this > is handled. > > Fei, Jordan? Do you have suggestion here? Is it possible to pass the PAT setting when sharing the fd? Or perhaps we should have kept the get_caching ioctl functional? Joonas, could you chime in here? > Andi
Re: [Intel-gfx] [PATCH v7 9/9] vfio/pci: Allow passing zero-length fd array in VFIO_DEVICE_PCI_HOT_RESET
On Fri, Jun 09, 2023 at 12:13:58AM +, Liu, Yi L wrote: > > Other than this and the couple other comments, the series looks ok to > > me. We still need acks from Jason for iommufd on 3-5. Thanks, > > Thanks, perhaps one more version after getting feedback from Jason. Yes, perhaps today I can reach it Jason
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/mtl: Fix spelling mistake "initate" -> "initiate"
== Series Details ==
Series: drm/i915/mtl: Fix spelling mistake "initate" -> "initiate"
URL : https://patchwork.freedesktop.org/series/119063/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13249_full -> Patchwork_119063v1_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_119063v1_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_pm_rpm@drm-resources-equal:
- {shard-dg1}:[PASS][1] -> [SKIP][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-dg1-15/igt@i915_pm_...@drm-resources-equal.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-dg1-19/igt@i915_pm_...@drm-resources-equal.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- {shard-dg1}:[PASS][3] -> [DMESG-WARN][4] +2 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-dg1-15/igt@kms_big...@y-tiled-16bpp-rotate-0.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-dg1-19/igt@kms_big...@y-tiled-16bpp-rotate-0.html
Known issues
Here are the changes found in Patchwork_119063v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_busy@close-race:
- shard-apl: [PASS][5] -> [ABORT][6] ([i915#6016])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-apl3/igt@gem_b...@close-race.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-apl6/igt@gem_b...@close-race.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-glk: NOTRUN -> [SKIP][7] ([fdo#109271]) +18 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-glk4/igt@gem_exec_balan...@parallel-ordering.html
* igt@gem_lmem_swapping@parallel-random:
- shard-apl: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-apl6/igt@gem_lmem_swapp...@parallel-random.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-glk: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#4613]) +1
similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-glk4/igt@gem_lmem_swapp...@verify-random-ccs.html
* igt@gem_userptr_blits@vma-merge:
- shard-glk: NOTRUN -> [FAIL][10] ([i915#3318])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-glk4/igt@gem_userptr_bl...@vma-merge.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][11] -> [ABORT][12] ([i915#5566])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-glk5/igt@gen9_exec_pa...@allowed-single.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-glk8/igt@gen9_exec_pa...@allowed-single.html
* igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#3886])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-apl6/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#3886]) +1
similar issue
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-glk4/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-glk: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4579]) +1
similar issue
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-glk4/igt@kms_cursor_...@cursor-rapid-movement-32x10.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1:
- shard-apl: [PASS][16] -> [FAIL][17] ([i915#79])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-apl2/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-dp1.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-apl1/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-dp1.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-apl: [PASS][18] -> [ABORT][19] ([i915#180])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-apl4/igt@kms_flip@flip-vs-susp...@c-dp1.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119063v1/shard-apl3/igt@kms_flip@flip-vs-susp...@c-dp1.html
*
igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-apl: NOTRUN -> [SKIP][20]
[Intel-gfx] [PATCH v2 13/13] drm/i915/psr: Re-enable PSR1 on hsw/bdw
From: Ville Syrjälä
All known issues fixed now, so re-enable PSR1 on hsw/bdw.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_device.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers/gpu/drm/i915/display/intel_display_device.c
index 3fd30e7f0062..c48642f897e2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -380,6 +380,8 @@ static const struct intel_display_device_info hsw_display =
{
.has_dp_mst = 1,
.has_fpga_dbg = 1,
.has_hotplug = 1,
+ .has_psr = 1,
+ .has_psr_hw_tracking = 1,
HSW_PIPE_OFFSETS,
IVB_CURSOR_OFFSETS,
IVB_COLORS,
@@ -397,6 +399,8 @@ static const struct intel_display_device_info bdw_display =
{
.has_dp_mst = 1,
.has_fpga_dbg = 1,
.has_hotplug = 1,
+ .has_psr = 1,
+ .has_psr_hw_tracking = 1,
HSW_PIPE_OFFSETS,
IVB_CURSOR_OFFSETS,
IVB_COLORS,
--
2.39.3
[Intel-gfx] [PATCH v2 12/13] drm/i915/psr: Allow PSR with sprite enabled on hsw/bdw
From: Ville Syrjälä Can't see why we'd want the sprite blocking PSR entry. Mask it out. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 4 drivers/gpu/drm/i915/display/intel_psr.c | 4 2 files changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 5c7fdc82ac22..8eb1572793ef 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3153,6 +3153,10 @@ static void bdw_set_pipe_misc(const struct intel_crtc_state *crtc_state) if (DISPLAY_VER(dev_priv) >= 12) val |= PIPE_MISC_PIXEL_ROUNDING_TRUNC; + /* allow PSR with sprite enabled */ + if (IS_BROADWELL(dev_priv)) + val |= PIPE_MISC_PSR_MASK_SPRITE_ENABLE; + intel_de_write(dev_priv, PIPE_MISC(crtc->pipe), val); } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 97e609365db4..5bb24c1a54d7 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1409,6 +1409,10 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, if (IS_DISPLAY_VER(dev_priv, 9, 10)) mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE; + /* allow PSR with sprite enabled */ + if (IS_HASWELL(dev_priv)) + mask |= EDP_PSR_DEBUG_MASK_SPRITE_ENABLE; + intel_de_write(dev_priv, psr_debug_reg(dev_priv, cpu_transcoder), mask); psr_irq_control(intel_dp); -- 2.39.3
[Intel-gfx] [PATCH v2 11/13] drm/i915/psr: Don't skip both TP1 and TP2/3 on hsw/bdw
From: Ville Syrjälä WA 0479 says: "Do not skip both TP1 and TP2/TP3". Let's just stick the minimum 100us TP2/3 time in there to avoid that. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_psr.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 92369f95ee88..97e609365db4 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -628,6 +628,15 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp) else val |= EDP_PSR_TP2_TP3_TIME_2500us; + /* +* WA 0479: hsw,bdw +* "Do not skip both TP1 and TP2/TP3" +*/ + if (DISPLAY_VER(dev_priv) < 9 && + connector->panel.vbt.psr.tp1_wakeup_time_us == 0 && + connector->panel.vbt.psr.tp2_tp3_wakeup_time_us == 0) + val |= EDP_PSR_TP2_TP3_TIME_100us; + check_tp3_sel: if (intel_dp_source_supports_tps3(dev_priv) && drm_dp_tps3_supported(intel_dp->dpcd)) -- 2.39.3
[Intel-gfx] [PATCH v2 10/13] drm/i915/psr: Do no mask display register writes on hsw/bdw
From: Ville Syrjälä hsw/bdw lack the pipe register vs. display register distinction in their PSR masking capabilities. So to keep our CURSURFLIVE tricks working we need to just unmask all display register writes on these platforms. The downside being that any display regitster (eg. even SWF regs) will cause a PSR exit. Note that WaMaskMMIOWriteForPSR asks us to mask this on bdw, but that won't work since we need those CURSURFLIVE tricks. Observations on actual hardware show that this causes one extra PSR exit ~every 10 seconds, which is pretty much irrelevant. I suspect this is due to the pcode poking at IPS_CTL. Disabling IPS does not stop it however, so either I'm wrong or pcode pokes at the register regardless of whether it's actually trying to enable/disable IPS. Also when the machine is busy (eg. just running 'find /') these extra PSR exits cease, which again points at pcode or some other PM entity as being the culprit. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_psr.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 67de5c7267b9..92369f95ee88 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1393,7 +1393,11 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, EDP_PSR_DEBUG_MASK_LPSP | EDP_PSR_DEBUG_MASK_MAX_SLEEP; - if (DISPLAY_VER(dev_priv) < 11) + /* +* No separate pipe reg write mask on hsw/bdw, so have to unmask all +* registers in order to keep the CURSURFLIVE tricks working :( +*/ + if (IS_DISPLAY_VER(dev_priv, 9, 10)) mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE; intel_de_write(dev_priv, psr_debug_reg(dev_priv, cpu_transcoder), mask); -- 2.39.3
[Intel-gfx] [PATCH v2 09/13] drm/i915/psr: Implement WaPsrDPRSUnmaskVBlankInSRD:hsw
From: Ville Syrjälä
Bspec asks us to unmask "vblank to registers" in the DPRS unit.
Note that I was unable to observe any change in hardware
behviour due to this bit on HSW. But let's do this anyway
in case it matters in some cases, and the corresponding bit
on BDW is abolutely critical as without it the hardware
won't generate any vblanks whatsoever after PSR exit.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_clock_gating.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c
b/drivers/gpu/drm/i915/intel_clock_gating.c
index 9682323510cd..d9600cd1ab06 100644
--- a/drivers/gpu/drm/i915/intel_clock_gating.c
+++ b/drivers/gpu/drm/i915/intel_clock_gating.c
@@ -559,12 +559,20 @@ static void bdw_init_clock_gating(struct drm_i915_private
*i915)
static void hsw_init_clock_gating(struct drm_i915_private *i915)
{
+ enum pipe pipe;
+
/* WaFbcAsynchFlipDisableFbcQueue:hsw,bdw */
intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(PIPE_A), 0,
HSW_FBCQ_DIS);
/* WaPsrDPAMaskVBlankInSRD:hsw */
intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0,
HSW_MASK_VBL_TO_PIPE_IN_SRD);
+ for_each_pipe(i915, pipe) {
+ /* WaPsrDPRSUnmaskVBlankInSRD:hsw */
+ intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(pipe),
+0, HSW_UNMASK_VBL_TO_REGS_IN_SRD);
+ }
+
/* This is required by WaCatErrorRejectionIssue:hsw */
intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
0, GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
--
2.39.3
[Intel-gfx] [PATCH v2 08/13] drm/i915/psr: Implement WaPsrDPAMaskVBlankInSRD:hsw
From: Ville Syrjälä Implement WaPsrDPAMaskVBlankInSRD:hsw, which makes the hardware generate the extra vblank between link training and first frame being transmitted. This is the same thing that's controlled by TRANS_CHICKEN[21] on skl+ (but due to the funky double buffering it's effectively always at the rest value after DC5 exit). So for consistent behaviour we want every platform to generate said vblank. BDW is already setting this up correctly. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_clock_gating.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c index a27600bc5976..9682323510cd 100644 --- a/drivers/gpu/drm/i915/intel_clock_gating.c +++ b/drivers/gpu/drm/i915/intel_clock_gating.c @@ -562,6 +562,9 @@ static void hsw_init_clock_gating(struct drm_i915_private *i915) /* WaFbcAsynchFlipDisableFbcQueue:hsw,bdw */ intel_uncore_rmw(&i915->uncore, CHICKEN_PIPESL_1(PIPE_A), 0, HSW_FBCQ_DIS); + /* WaPsrDPAMaskVBlankInSRD:hsw */ + intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, HSW_MASK_VBL_TO_PIPE_IN_SRD); + /* This is required by WaCatErrorRejectionIssue:hsw */ intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG, 0, GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB); -- 2.39.3
[Intel-gfx] [PATCH v2 07/13] drm/i915/psr: Restore PSR interrupt handler for HSW
From: Ville Syrjälä
Add the PSR interrupt handling code back for HSW. Looks like
the removal was never completed anyway since the irq setup
code was lest untouched.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_irq.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
b/drivers/gpu/drm/i915/display/intel_display_irq.c
index ae2578741dfe..ae98c99c5378 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -749,6 +749,20 @@ void ivb_display_irq_handler(struct drm_i915_private
*dev_priv, u32 de_iir)
if (de_iir & DE_ERR_INT_IVB)
ivb_err_int_handler(dev_priv);
+ if (de_iir & DE_EDP_PSR_INT_HSW) {
+ struct intel_encoder *encoder;
+
+ for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) {
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ u32 psr_iir;
+
+ psr_iir = intel_uncore_rmw(&dev_priv->uncore,
+ EDP_PSR_IIR, 0, 0);
+ intel_psr_irq_handler(intel_dp, psr_iir);
+ break;
+ }
+ }
+
if (de_iir & DE_AUX_CHANNEL_A_IVB)
intel_dp_aux_irq_handler(dev_priv);
--
2.39.3
[Intel-gfx] [PATCH v2 06/13] drm/i915/psr: HSW/BDW have no PSR2
From: Ville Syrjälä Deal with HSW/BDW in transcoder_has_psr2(). Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_psr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 5451f44c620f..67de5c7267b9 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -797,8 +797,10 @@ transcoder_has_psr2(struct drm_i915_private *dev_priv, enum transcoder cpu_trans return cpu_transcoder == TRANSCODER_A || cpu_transcoder == TRANSCODER_B; else if (DISPLAY_VER(dev_priv) >= 12) return cpu_transcoder == TRANSCODER_A; - else + else if (DISPLAY_VER(dev_priv) >= 9) return cpu_transcoder == TRANSCODER_EDP; + else + return false; } static u32 intel_get_frame_time_us(const struct intel_crtc_state *cstate) -- 2.39.3
[Intel-gfx] [PATCH v2 05/13] drm/i915/psr: Bring back HSW/BDW PSR AUX CH registers/setup
From: Ville Syrjälä
Reintroduce the special PSR AUX CH setup for hsw/bdw. Not all
of it was even removed (BDW AUX data registers were left behind).
Update the code to use REG_BIT() & co. while at it.
v2: Define the SRD_AUX_CTL bits in terms of DP_AUX_CTL bits (Jouni)
Add a comment explaining the hand rolled DPCD write (Jouni)
Cc: Jouni Högander
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_aux.h | 3 +
drivers/gpu/drm/i915/display/intel_psr.c | 62 +++
drivers/gpu/drm/i915/display/intel_psr_regs.h | 12
4 files changed, 78 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 197c6e81db14..21b50a5c8a85 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -14,7 +14,7 @@
#include "intel_pps.h"
#include "intel_tc.h"
-static u32 intel_dp_aux_pack(const u8 *src, int src_bytes)
+u32 intel_dp_aux_pack(const u8 *src, int src_bytes)
{
int i;
u32 v = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.h
b/drivers/gpu/drm/i915/display/intel_dp_aux.h
index 5b608f9d3499..8447f3e601fe 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.h
@@ -6,6 +6,8 @@
#ifndef __INTEL_DP_AUX_H__
#define __INTEL_DP_AUX_H__
+#include
+
enum aux_ch;
struct drm_i915_private;
struct intel_dp;
@@ -17,5 +19,6 @@ void intel_dp_aux_init(struct intel_dp *intel_dp);
enum aux_ch intel_dp_aux_ch(struct intel_encoder *encoder);
void intel_dp_aux_irq_handler(struct drm_i915_private *i915);
+u32 intel_dp_aux_pack(const u8 *src, int src_bytes);
#endif /* __INTEL_DP_AUX_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 7f748c7a71f3..5451f44c620f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -288,6 +288,24 @@ static i915_reg_t psr_iir_reg(struct drm_i915_private
*dev_priv,
return EDP_PSR_IIR;
}
+static i915_reg_t psr_aux_ctl_reg(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder)
+{
+ if (DISPLAY_VER(dev_priv) >= 8)
+ return EDP_PSR_AUX_CTL(cpu_transcoder);
+ else
+ return HSW_SRD_AUX_CTL;
+}
+
+static i915_reg_t psr_aux_data_reg(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder, int i)
+{
+ if (DISPLAY_VER(dev_priv) >= 8)
+ return EDP_PSR_AUX_DATA(cpu_transcoder, i);
+ else
+ return HSW_SRD_AUX_DATA(i);
+}
+
static void psr_irq_control(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -512,6 +530,43 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
}
}
+static void hsw_psr_setup_aux(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+ enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
+ u32 aux_clock_divider, aux_ctl;
+ /* write DP_SET_POWER=D0 */
+ static const u8 aux_msg[] = {
+ [0] = (DP_AUX_NATIVE_WRITE << 4) | ((DP_SET_POWER >> 16) & 0xf),
+ [1] = (DP_SET_POWER >> 8) & 0xff,
+ [2] = DP_SET_POWER & 0xff,
+ [3] = 1 - 1,
+ [4] = DP_SET_POWER_D0,
+ };
+ int i;
+
+ BUILD_BUG_ON(sizeof(aux_msg) > 20);
+ for (i = 0; i < sizeof(aux_msg); i += 4)
+ intel_de_write(dev_priv,
+ psr_aux_data_reg(dev_priv, cpu_transcoder, i >>
2),
+ intel_dp_aux_pack(&aux_msg[i], sizeof(aux_msg) -
i));
+
+ aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, 0);
+
+ /* Start with bits set for DDI_AUX_CTL register */
+ aux_ctl = intel_dp->get_aux_send_ctl(intel_dp, sizeof(aux_msg),
+aux_clock_divider);
+
+ /* Select only valid bits for SRD_AUX_CTL */
+ aux_ctl &= EDP_PSR_AUX_CTL_TIME_OUT_MASK |
+ EDP_PSR_AUX_CTL_MESSAGE_SIZE_MASK |
+ EDP_PSR_AUX_CTL_PRECHARGE_2US_MASK |
+ EDP_PSR_AUX_CTL_BIT_CLOCK_2X_MASK;
+
+ intel_de_write(dev_priv, psr_aux_ctl_reg(dev_priv, cpu_transcoder),
+ aux_ctl);
+}
+
static void intel_psr_enable_sink(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1318,6 +1373,13 @@ static void intel_psr_enable_source(struct intel_dp
*intel_dp,
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
u32 mask;
+ /*
+* Only HSW and BDW have PSR AUX registers that need to be setup.
+* SKL+ use hardcoded values PSR AUX transactions
+*/
+ if (DISP
[Intel-gfx] [PATCH v2 04/13] drm/i915/psr: Reintroduce HSW PSR1 registers
From: Ville Syrjälä
Add back hsw'w special SRD/PSR1 registers.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_psr.c | 20 +++
drivers/gpu/drm/i915/display/intel_psr_regs.h | 4
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 60518d5d0c4e..7f748c7a71f3 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -237,25 +237,37 @@ static u32 psr_irq_mask_get(struct intel_dp *intel_dp)
static i915_reg_t psr_ctl_reg(struct drm_i915_private *dev_priv,
enum transcoder cpu_transcoder)
{
- return EDP_PSR_CTL(cpu_transcoder);
+ if (DISPLAY_VER(dev_priv) >= 8)
+ return EDP_PSR_CTL(cpu_transcoder);
+ else
+ return HSW_SRD_CTL;
}
static i915_reg_t psr_debug_reg(struct drm_i915_private *dev_priv,
enum transcoder cpu_transcoder)
{
- return EDP_PSR_DEBUG(cpu_transcoder);
+ if (DISPLAY_VER(dev_priv) >= 8)
+ return EDP_PSR_DEBUG(cpu_transcoder);
+ else
+ return HSW_SRD_DEBUG;
}
static i915_reg_t psr_perf_cnt_reg(struct drm_i915_private *dev_priv,
enum transcoder cpu_transcoder)
{
- return EDP_PSR_PERF_CNT(cpu_transcoder);
+ if (DISPLAY_VER(dev_priv) >= 8)
+ return EDP_PSR_PERF_CNT(cpu_transcoder);
+ else
+ return HSW_SRD_PERF_CNT;
}
static i915_reg_t psr_status_reg(struct drm_i915_private *dev_priv,
enum transcoder cpu_transcoder)
{
- return EDP_PSR_STATUS(cpu_transcoder);
+ if (DISPLAY_VER(dev_priv) >= 8)
+ return EDP_PSR_STATUS(cpu_transcoder);
+ else
+ return HSW_SRD_STATUS;
}
static i915_reg_t psr_imr_reg(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index 8750cb0d8d9d..998f638ee182 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -19,6 +19,7 @@
* HSW PSR registers are relative to DDIA(_DDI_BUF_CTL_A + 0x800) with just one
* instance of it
*/
+#define HSW_SRD_CTL_MMIO(0x64800)
#define _SRD_CTL_A 0x60800
#define _SRD_CTL_EDP 0x6f800
#define EDP_PSR_CTL(tran) _MMIO_TRANS2(tran, _SRD_CTL_A)
@@ -83,6 +84,7 @@
#define _SRD_AUX_DATA_EDP 0x6f814
#define EDP_PSR_AUX_DATA(tran, i) _MMIO_TRANS2(tran,
_SRD_AUX_DATA_A + (i) * 4) /* 5 registers */
+#define HSW_SRD_STATUS _MMIO(0x64840)
#define _SRD_STATUS_A 0x60840
#define _SRD_STATUS_EDP0x6f840
#define EDP_PSR_STATUS(tran) _MMIO_TRANS2(tran,
_SRD_STATUS_A)
@@ -107,12 +109,14 @@
#define EDP_PSR_STATUS_SENDING_TP1 REG_BIT(4)
#define EDP_PSR_STATUS_IDLE_MASK REG_GENMASK(3, 0)
+#define HSW_SRD_PERF_CNT _MMIO(0x64844)
#define _SRD_PERF_CNT_A0x60844
#define _SRD_PERF_CNT_EDP 0x6f844
#define EDP_PSR_PERF_CNT(tran) _MMIO_TRANS2(tran, _SRD_PERF_CNT_A)
#define EDP_PSR_PERF_CNT_MASKREG_GENMASK(23, 0)
/* PSR_MASK on SKL+ */
+#define HSW_SRD_DEBUG _MMIO(0x64860)
#define _SRD_DEBUG_A 0x60860
#define _SRD_DEBUG_EDP 0x6f860
#define EDP_PSR_DEBUG(tran)_MMIO_TRANS2(tran, _SRD_DEBUG_A)
--
2.39.3
[Intel-gfx] [PATCH v2 03/13] drm/i915/psr: Wrap PSR1 register with functions
From: Ville Syrjälä
In preparation for re-introducing HSW's different PSR1 register
offeets let's just wrap all the registers into functions.
Avoids having to make the register macros more complex.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_psr.c | 99
1 file changed, 65 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index ea0389c5f656..60518d5d0c4e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -234,23 +234,61 @@ static u32 psr_irq_mask_get(struct intel_dp *intel_dp)
EDP_PSR_MASK(intel_dp->psr.transcoder);
}
+static i915_reg_t psr_ctl_reg(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder)
+{
+ return EDP_PSR_CTL(cpu_transcoder);
+}
+
+static i915_reg_t psr_debug_reg(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder)
+{
+ return EDP_PSR_DEBUG(cpu_transcoder);
+}
+
+static i915_reg_t psr_perf_cnt_reg(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder)
+{
+ return EDP_PSR_PERF_CNT(cpu_transcoder);
+}
+
+static i915_reg_t psr_status_reg(struct drm_i915_private *dev_priv,
+enum transcoder cpu_transcoder)
+{
+ return EDP_PSR_STATUS(cpu_transcoder);
+}
+
+static i915_reg_t psr_imr_reg(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder)
+{
+ if (DISPLAY_VER(dev_priv) >= 12)
+ return TRANS_PSR_IMR(cpu_transcoder);
+ else
+ return EDP_PSR_IMR;
+}
+
+static i915_reg_t psr_iir_reg(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder)
+{
+ if (DISPLAY_VER(dev_priv) >= 12)
+ return TRANS_PSR_IIR(cpu_transcoder);
+ else
+ return EDP_PSR_IIR;
+}
+
static void psr_irq_control(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- i915_reg_t imr_reg;
+ enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
u32 mask;
- if (DISPLAY_VER(dev_priv) >= 12)
- imr_reg = TRANS_PSR_IMR(intel_dp->psr.transcoder);
- else
- imr_reg = EDP_PSR_IMR;
-
mask = psr_irq_psr_error_bit_get(intel_dp);
if (intel_dp->psr.debug & I915_PSR_DEBUG_IRQ)
mask |= psr_irq_post_exit_bit_get(intel_dp) |
psr_irq_pre_entry_bit_get(intel_dp);
- intel_de_rmw(dev_priv, imr_reg, psr_irq_mask_get(intel_dp), ~mask);
+ intel_de_rmw(dev_priv, psr_imr_reg(dev_priv, cpu_transcoder),
+psr_irq_mask_get(intel_dp), ~mask);
}
static void psr_event_print(struct drm_i915_private *i915,
@@ -296,12 +334,6 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32
psr_iir)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
ktime_t time_ns = ktime_get();
- i915_reg_t imr_reg;
-
- if (DISPLAY_VER(dev_priv) >= 12)
- imr_reg = TRANS_PSR_IMR(cpu_transcoder);
- else
- imr_reg = EDP_PSR_IMR;
if (psr_iir & psr_irq_pre_entry_bit_get(intel_dp)) {
intel_dp->psr.last_entry_attempt = time_ns;
@@ -339,7 +371,8 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32
psr_iir)
* again so we don't care about unmask the interruption
* or unset irq_aux_error.
*/
- intel_de_rmw(dev_priv, imr_reg, 0,
psr_irq_psr_error_bit_get(intel_dp));
+ intel_de_rmw(dev_priv, psr_imr_reg(dev_priv, cpu_transcoder),
+0, psr_irq_psr_error_bit_get(intel_dp));
schedule_work(&intel_dp->psr.work);
}
@@ -577,7 +610,7 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
if (DISPLAY_VER(dev_priv) >= 8)
val |= EDP_PSR_CRC_ENABLE;
- intel_de_rmw(dev_priv, EDP_PSR_CTL(cpu_transcoder),
+ intel_de_rmw(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder),
~EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK, val);
}
@@ -685,7 +718,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
* PSR2 HW is incorrectly using EDP_PSR_TP1_TP3_SEL and BSpec is
* recommending keep this bit unset while PSR2 is enabled.
*/
- intel_de_write(dev_priv, EDP_PSR_CTL(cpu_transcoder), 0);
+ intel_de_write(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder), 0);
intel_de_write(dev_priv, EDP_PSR2_CTL(cpu_transcoder), val);
}
@@ -1201,13 +1234,15 @@ static void intel_psr_activate(struct intel_dp
*intel_dp)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
enum
[Intel-gfx] [PATCH v2 02/13] drm/i915/psr: Fix BDW PSR AUX CH data register offsets
From: Ville Syrjälä
The multiplication got replaced by an addition in some cleanup.
This means we never write the correct data to some of the BDW
PSR data registers and thus we fail to actually wake up the
panel from PSR.
Fixes: 4ab4fa103217 ("drm/i915/psr: Make PSR registers relative to transcoders")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index 0f7db617425a..8750cb0d8d9d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -81,7 +81,7 @@
#define _SRD_AUX_DATA_A0x60814
#define _SRD_AUX_DATA_EDP 0x6f814
-#define EDP_PSR_AUX_DATA(tran, i) _MMIO_TRANS2(tran,
_SRD_AUX_DATA_A + (i) + 4) /* 5 registers */
+#define EDP_PSR_AUX_DATA(tran, i) _MMIO_TRANS2(tran,
_SRD_AUX_DATA_A + (i) * 4) /* 5 registers */
#define _SRD_STATUS_A 0x60840
#define _SRD_STATUS_EDP0x6f840
--
2.39.3
[Intel-gfx] [PATCH v2 00/13] drm/i915/psr: Restore HSW/BDW PSR1
From: Ville Syrjälä Fix all the obvious issues affecting HSW/BDW PSR1 and restore it back to life. The PC8+ vs. init_clock_gating() problem also affects some non-PSR workarounds as well. v2: Rebase (due to irq code movement mostly) Deal with review comments wrt. the AUX setup Ville Syrjälä (13): drm/i915: Re-init clock gating on coming out of PC8+ drm/i915/psr: Fix BDW PSR AUX CH data register offsets drm/i915/psr: Wrap PSR1 register with functions drm/i915/psr: Reintroduce HSW PSR1 registers drm/i915/psr: Bring back HSW/BDW PSR AUX CH registers/setup drm/i915/psr: HSW/BDW have no PSR2 drm/i915/psr: Restore PSR interrupt handler for HSW drm/i915/psr: Implement WaPsrDPAMaskVBlankInSRD:hsw drm/i915/psr: Implement WaPsrDPRSUnmaskVBlankInSRD:hsw drm/i915/psr: Do no mask display register writes on hsw/bdw drm/i915/psr: Don't skip both TP1 and TP2/3 on hsw/bdw drm/i915/psr: Allow PSR with sprite enabled on hsw/bdw drm/i915/psr: Re-enable PSR1 on hsw/bdw drivers/gpu/drm/i915/display/intel_display.c | 4 + .../drm/i915/display/intel_display_device.c | 4 + .../gpu/drm/i915/display/intel_display_irq.c | 14 ++ .../drm/i915/display/intel_display_power.c| 6 +- drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_aux.h | 3 + drivers/gpu/drm/i915/display/intel_psr.c | 196 ++ drivers/gpu/drm/i915/display/intel_psr_regs.h | 18 +- drivers/gpu/drm/i915/intel_clock_gating.c | 11 + 9 files changed, 217 insertions(+), 41 deletions(-) -- 2.39.3
[Intel-gfx] [PATCH v2 01/13] drm/i915: Re-init clock gating on coming out of PC8+
From: Ville Syrjälä PC8+ clobbers a bunch of displays registers which need to be restored by hand or else we lost a bunch of workarounds. The important ones for us are at least CHICKEN_PAR2* and CHICKEN_PIPESL*. Curiously at least some CHICKEN_PAR1* registers are preserved by the hardware/firmware. Unfortunately Bspec doens't really specify what gets clobbered vs. preserved so further reverse engieering might be warranted to figure out the specifics. Note that PCH_LP_PARTITION_LEVEL_DISABLE is also set by lpt_init_clock_gating() so the rmw in hsw_disable_pc8() is now redundant. Remove it. TODO: I suspect most gt stuff doesn't need this and we should finish moving all of them from init_clock_gating() to a more appropriate place... Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display_power.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index db5437043904..d3310c720532 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -10,6 +10,7 @@ #include "i915_reg.h" #include "intel_backlight_regs.h" #include "intel_cdclk.h" +#include "intel_clock_gating.h" #include "intel_combo_phy.h" #include "intel_de.h" #include "intel_display_power.h" @@ -1385,9 +1386,8 @@ static void hsw_disable_pc8(struct drm_i915_private *dev_priv) hsw_restore_lcpll(dev_priv); intel_init_pch_refclk(dev_priv); - if (HAS_PCH_LPT_LP(dev_priv)) - intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, -0, PCH_LP_PARTITION_LEVEL_DISABLE); + /* Many display registers don't survive PC8+ */ + intel_clock_gating_init(dev_priv); } static void intel_pch_reset_handshake(struct drm_i915_private *dev_priv, -- 2.39.3
Re: [Intel-gfx] [PATCH 6/8] drm: Add drm_gem_prime_fd_to_handle_obj
On 09/06/2023 13:44, Iddamsetty, Aravind wrote:
On 09-06-2023 17:41, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
I need a new flavour of the drm_gem_prime_fd_to_handle helper, one which
will return a reference to a newly created GEM objects (if created), in
order to enable tracking of imported i915 GEM objects in the following
patch.
instead of this what if we implement the open call back in i915
struct drm_gem_object_funcs {
/**
* @open:
*
* Called upon GEM handle creation.
*
* This callback is optional.
*/
int (*open)(struct drm_gem_object *obj, struct drm_file *file);
which gets called whenever a handle(drm_gem_handle_create_tail) is
created and in the open we can check if to_intel_bo(obj)->base.dma_buf
then it is imported if not it is owned or created by it.
I wanted to track as much memory usage as we have which is buffer object
backed, including page tables and contexts. And since those are not user
visible (they don't have handles), they wouldn't be covered by the
obj->funcs->open() callback.
If we wanted to limit to objects with handles we could simply do what
Rob proposed and that is to walk the handles idr. But that does not feel
like the right direction to me. Open for discussion I guess.
Regards,
Tvrtko
[Intel-gfx] ✓ Fi.CI.IGT: success for fbcon: Reschedule cursor worker if try lock fails
== Series Details ==
Series: fbcon: Reschedule cursor worker if try lock fails
URL : https://patchwork.freedesktop.org/series/119060/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13249_full -> Patchwork_119060v1_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (7 -> 8)
--
Additional (1): shard-rkl0
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_119060v1_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_create@create-clear@lmem0:
- {shard-dg1}:[PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-dg1-14/igt@gem_create@create-cl...@lmem0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-dg1-13/igt@gem_create@create-cl...@lmem0.html
Known issues
Here are the changes found in Patchwork_119060v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_barrier_race@remote-request@rcs0:
- shard-glk: [PASS][3] -> [ABORT][4] ([i915#7461] / [i915#8211])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-glk5/igt@gem_barrier_race@remote-requ...@rcs0.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk6/igt@gem_barrier_race@remote-requ...@rcs0.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-glk: NOTRUN -> [SKIP][5] ([fdo#109271]) +18 similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk1/igt@gem_exec_balan...@parallel-ordering.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-glk: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +1
similar issue
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk1/igt@gem_lmem_swapp...@verify-random-ccs.html
* igt@gem_mmap_gtt@fault-concurrent-y:
- shard-snb: [PASS][7] -> [ABORT][8] ([i915#5161])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-snb7/igt@gem_mmap_...@fault-concurrent-y.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-snb7/igt@gem_mmap_...@fault-concurrent-y.html
* igt@gem_tiled_swapping@non-threaded:
- shard-glk: [PASS][9] -> [DMESG-WARN][10] ([i915#118])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-glk8/igt@gem_tiled_swapp...@non-threaded.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk8/igt@gem_tiled_swapp...@non-threaded.html
* igt@gem_userptr_blits@vma-merge:
- shard-glk: NOTRUN -> [FAIL][11] ([i915#3318])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk1/igt@gem_userptr_bl...@vma-merge.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][12] -> [ABORT][13] ([i915#5566])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-glk5/igt@gen9_exec_pa...@allowed-single.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk6/igt@gen9_exec_pa...@allowed-single.html
* igt@i915_pm_rps@reset:
- shard-snb: [PASS][14] -> [INCOMPLETE][15] ([i915#7790])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-snb6/igt@i915_pm_...@reset.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-snb6/igt@i915_pm_...@reset.html
* igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3886]) +1
similar issue
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk1/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-glk: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#4579]) +1
similar issue
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk1/igt@kms_cursor_...@cursor-rapid-movement-32x10.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [PASS][18] -> [ABORT][19] ([i915#180]) +1 similar
issue
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-apl4/igt@kms_fbcon_...@fbc-suspend.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-apl2/igt@kms_fbcon_...@fbc-suspend.html
* igt@kms_flip@modeset-vs-vblank-race-interruptible@a-hdmi-a1:
- shard-glk: [PASS][20] -> [FAIL][21] ([i915#407])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-glk2/igt@kms_flip@modeset-vs-vblank-race-interrupti...@a-hdmi-a1.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119060v1/shard-glk9/igt@kms_flip@modeset-vs-vblank-race-interrupti..
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Cleanup usage of phy lane reset
== Series Details == Series: drm/i915/mtl: Cleanup usage of phy lane reset URL : https://patchwork.freedesktop.org/series/119138/ State : warning == Summary == Error: dim checkpatch failed 2c4d880e398d drm/i915/mtl: Cleanup usage of phy lane reset -:58: WARNING:LONG_LINE: line length of 104 exceeds 100 columns #58: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:233: + ack = intel_cx0_wait_for_ack(i915, port, XELPDP_PORT_P2M_COMMAND_WRITE_ACK, lane, &val); total: 0 errors, 1 warnings, 0 checks, 38 lines checked
Re: [Intel-gfx] [PATCH v3] x86/mm: Fix PAT bit missing from page protection modify mask
On 09.06.23 15:01, Janusz Krzysztofik wrote:
Visible glitches have been observed when running graphics applications on
Linux under Xen hypervisor. Those observations have been confirmed with
failures from kms_pwrite_crc Intel GPU test that verifies data coherency
of DRM frame buffer objects using hardware CRC checksums calculated by
display controllers, exposed to userspace via debugfs. Affected
processing paths have then been identified with new IGT test variants that
mmap the objects using different methods and caching modes [1].
When running as a Xen PV guest, Linux uses Xen provided PAT configuration
which is different from its native one. In particular, Xen specific PTE
encoding of write-combining caching, likely used by graphics applications,
differs from the Linux default one found among statically defined minimal
set of supported modes. Since Xen defines PTE encoding of the WC mode as
_PAGE_PAT, it no longer belongs to the minimal set, depends on correct
handling of _PAGE_PAT bit, and can be mismatched with write-back caching.
When a user calls mmap() for a DRM buffer object, DRM device specific
.mmap file operation, called from mmap_region(), takes care of setting PTE
encoding bits in a vm_page_prot field of an associated virtual memory area
structure. Unfortunately, _PAGE_PAT bit is not preserved when the vma's
.vm_flags are then applied to .vm_page_prot via vm_set_page_prot(). Bits
to be preserved are determined with _PAGE_CHG_MASK symbol that doesn't
cover _PAGE_PAT. As a consequence, WB caching is requested instead of WC
when running under Xen (also, WP is silently changed to WT, and UC
downgraded to UC_MINUS). When running on bare metal, WC is not affected,
but WP and WT extra modes are unintentionally replaced with WC and UC,
respectively.
WP and WT modes, encoded with _PAGE_PAT bit set, were introduced by commit
281d4078bec3 ("x86: Make page cache mode a real type"). Care was taken
to extend _PAGE_CACHE_MASK symbol with that additional bit, but that
symbol has never been used for identification of bits preserved when
applying page protection flags. Support for all cache modes under Xen,
including the problematic WC mode, was then introduced by commit
47591df50512 ("xen: Support Xen pv-domains using PAT").
The issue needs to be fixed by including _PAGE_PAT bit into a bitmask used
by pgprot_modify() for selecting bits to be preserved. We can do that
either internally to pgprot_modify() (as initially proposed), or by making
_PAGE_PAT a part of _PAGE_CHG_MASK. If we go for the latter then, since
_PAGE_PAT is the same as _PAGE_PSE, we need to note that _HPAGE_CHG_MASK
-- a huge pmds' counterpart of _PAGE_CHG_MASK, introduced by commit
c489f1257b8c ("thp: add pmd_modify"), defined as (_PAGE_CHG_MASK |
_PAGE_PSE) -- will no longer differ from _PAGE_CHG_MASK. If such
modification of _PAGE_CHG_MASK was irrelevant to its users then one might
wonder why that new _HPAGE_CHG_MASK symbol was introduced instead of
reusing the existing one with that otherwise irrelevant bit (_PAGE_PSE in
that case) added.
Assume that adding _PAGE_PAT to _PAGE_CHG_MASK doesn't break pte_modify()
and its users, and go for it. Also, add _PAGE_PAT_LARGE to
_HPAGE_CHG_MASK for symmetry. For better clarity, split out common bits
from both symbols to another one and use it together with specific bits
when defining the masks.
v3: Separate out common bits of _PAGE_CHG_MASK and _HPAGE_CHG_MASK into
_COMMON_PAGE_CHG_MASK (Rick),
- fix hard to parse wording of 'what' part of commit description (on
Dave's request).
v2: Keep pgprot_modify() untouched, make _PAGE_PAT part of _PAGE_CHG_MASK
instead (Borislav),
- also add _PAGE_PAT_LARGE to _HPAGE_CHG_MASK (Juergen).
[1] https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/commit/0f0754413f14
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7648
Fixes: 281d4078bec3 ("x86: Make page cache mode a real type")
Signed-off-by: Janusz Krzysztofik
Tested-by: Marek Marczykowski-Górecki
Reviewed-by: Andi Shyti
Acked-by: Juergen Gross # v1
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: "Edgecombe, Rick P"
Cc: sta...@vger.kernel.org # v3.19+
Reviewed-by: Juergen Gross
Juergen
OpenPGP_0xB0DE9DD628BF132F.asc
Description: OpenPGP public key
OpenPGP_signature
Description: OpenPGP digital signature
[Intel-gfx] [PATCH v3] x86/mm: Fix PAT bit missing from page protection modify mask
Visible glitches have been observed when running graphics applications on
Linux under Xen hypervisor. Those observations have been confirmed with
failures from kms_pwrite_crc Intel GPU test that verifies data coherency
of DRM frame buffer objects using hardware CRC checksums calculated by
display controllers, exposed to userspace via debugfs. Affected
processing paths have then been identified with new IGT test variants that
mmap the objects using different methods and caching modes [1].
When running as a Xen PV guest, Linux uses Xen provided PAT configuration
which is different from its native one. In particular, Xen specific PTE
encoding of write-combining caching, likely used by graphics applications,
differs from the Linux default one found among statically defined minimal
set of supported modes. Since Xen defines PTE encoding of the WC mode as
_PAGE_PAT, it no longer belongs to the minimal set, depends on correct
handling of _PAGE_PAT bit, and can be mismatched with write-back caching.
When a user calls mmap() for a DRM buffer object, DRM device specific
.mmap file operation, called from mmap_region(), takes care of setting PTE
encoding bits in a vm_page_prot field of an associated virtual memory area
structure. Unfortunately, _PAGE_PAT bit is not preserved when the vma's
.vm_flags are then applied to .vm_page_prot via vm_set_page_prot(). Bits
to be preserved are determined with _PAGE_CHG_MASK symbol that doesn't
cover _PAGE_PAT. As a consequence, WB caching is requested instead of WC
when running under Xen (also, WP is silently changed to WT, and UC
downgraded to UC_MINUS). When running on bare metal, WC is not affected,
but WP and WT extra modes are unintentionally replaced with WC and UC,
respectively.
WP and WT modes, encoded with _PAGE_PAT bit set, were introduced by commit
281d4078bec3 ("x86: Make page cache mode a real type"). Care was taken
to extend _PAGE_CACHE_MASK symbol with that additional bit, but that
symbol has never been used for identification of bits preserved when
applying page protection flags. Support for all cache modes under Xen,
including the problematic WC mode, was then introduced by commit
47591df50512 ("xen: Support Xen pv-domains using PAT").
The issue needs to be fixed by including _PAGE_PAT bit into a bitmask used
by pgprot_modify() for selecting bits to be preserved. We can do that
either internally to pgprot_modify() (as initially proposed), or by making
_PAGE_PAT a part of _PAGE_CHG_MASK. If we go for the latter then, since
_PAGE_PAT is the same as _PAGE_PSE, we need to note that _HPAGE_CHG_MASK
-- a huge pmds' counterpart of _PAGE_CHG_MASK, introduced by commit
c489f1257b8c ("thp: add pmd_modify"), defined as (_PAGE_CHG_MASK |
_PAGE_PSE) -- will no longer differ from _PAGE_CHG_MASK. If such
modification of _PAGE_CHG_MASK was irrelevant to its users then one might
wonder why that new _HPAGE_CHG_MASK symbol was introduced instead of
reusing the existing one with that otherwise irrelevant bit (_PAGE_PSE in
that case) added.
Assume that adding _PAGE_PAT to _PAGE_CHG_MASK doesn't break pte_modify()
and its users, and go for it. Also, add _PAGE_PAT_LARGE to
_HPAGE_CHG_MASK for symmetry. For better clarity, split out common bits
from both symbols to another one and use it together with specific bits
when defining the masks.
v3: Separate out common bits of _PAGE_CHG_MASK and _HPAGE_CHG_MASK into
_COMMON_PAGE_CHG_MASK (Rick),
- fix hard to parse wording of 'what' part of commit description (on
Dave's request).
v2: Keep pgprot_modify() untouched, make _PAGE_PAT part of _PAGE_CHG_MASK
instead (Borislav),
- also add _PAGE_PAT_LARGE to _HPAGE_CHG_MASK (Juergen).
[1] https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/commit/0f0754413f14
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7648
Fixes: 281d4078bec3 ("x86: Make page cache mode a real type")
Signed-off-by: Janusz Krzysztofik
Tested-by: Marek Marczykowski-Górecki
Reviewed-by: Andi Shyti
Acked-by: Juergen Gross # v1
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: "Edgecombe, Rick P"
Cc: sta...@vger.kernel.org # v3.19+
---
arch/x86/include/asm/pgtable_types.h | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/pgtable_types.h
b/arch/x86/include/asm/pgtable_types.h
index 447d4bee25c48..97533e6b1c61b 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -125,11 +125,12 @@
* instance, and is *not* included in this mask since
* pte_modify() does modify it.
*/
-#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
-_PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \
-_PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_ENC | \
-_PAGE_UFFD_WP)
-#define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE)
+#define _COMMON_PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |\
+_PA
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for fdinfo memory stats (rev2)
== Series Details == Series: fdinfo memory stats (rev2) URL : https://patchwork.freedesktop.org/series/119082/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for fdinfo memory stats (rev2)
== Series Details ==
Series: fdinfo memory stats (rev2)
URL : https://patchwork.freedesktop.org/series/119082/
State : warning
== Summary ==
Error: dim checkpatch failed
67ba6f7b318b dma-fence: Bypass signaling annotation from dma_fence_is_signaled
bc390e8b6613 drm/i915: Track buffer objects belonging to clients
-:262: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#262: FILE: drivers/gpu/drm/i915/i915_drm_client.h:79:
+{
+
-:263: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#263: FILE: drivers/gpu/drm/i915/i915_drm_client.h:80:
+
+}
-:267: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#267: FILE: drivers/gpu/drm/i915/i915_drm_client.h:84:
+{
+
-:268: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#268: FILE: drivers/gpu/drm/i915/i915_drm_client.h:85:
+
+}
total: 0 errors, 0 warnings, 4 checks, 228 lines checked
bf30cc82b5a3 drm/i915: Record which clients own a VM
f74104b7e164 drm/i915: Track page table backing store usage
e7e9f6705f0a drm/i915: Account ring buffer and context state storage
-:79: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#79: FILE: drivers/gpu/drm/i915/i915_drm_client.h:88:
+}
-:84: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#84: FILE: drivers/gpu/drm/i915/i915_drm_client.h:93:
+{
+
total: 0 errors, 0 warnings, 2 checks, 59 lines checked
a69e31d41fb8 drm: Add drm_gem_prime_fd_to_handle_obj
-:43: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#43: FILE: drivers/gpu/drm/drm_prime.c:303:
+ uint32_t *handle,
-:117: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#117: FILE: include/drm/drm_prime.h:74:
+ uint32_t *handle,
total: 0 errors, 0 warnings, 2 checks, 91 lines checked
91ae76e91672 drm/i915: Track imported dma-buf objects in memory stats
9d9b6f173db8 drm/i915: Implement fdinfo memory stats printing
Re: [Intel-gfx] [PATCH 6/8] drm: Add drm_gem_prime_fd_to_handle_obj
On 09-06-2023 17:41, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> I need a new flavour of the drm_gem_prime_fd_to_handle helper, one which
> will return a reference to a newly created GEM objects (if created), in
> order to enable tracking of imported i915 GEM objects in the following
> patch.
instead of this what if we implement the open call back in i915
struct drm_gem_object_funcs {
/**
* @open:
*
* Called upon GEM handle creation.
*
* This callback is optional.
*/
int (*open)(struct drm_gem_object *obj, struct drm_file *file);
which gets called whenever a handle(drm_gem_handle_create_tail) is
created and in the open we can check if to_intel_bo(obj)->base.dma_buf
then it is imported if not it is owned or created by it.
Thanks,
Aravind.
>
> Minor code reshuffule and only trivial additions on top of
> drm_gem_prime_fd_to_handle.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> drivers/gpu/drm/drm_prime.c | 41 -
> include/drm/drm_prime.h | 4
> 2 files changed, 40 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
> index d29dafce9bb0..ef75f67e3057 100644
> --- a/drivers/gpu/drm/drm_prime.c
> +++ b/drivers/gpu/drm/drm_prime.c
> @@ -284,11 +284,12 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
> EXPORT_SYMBOL(drm_gem_dmabuf_release);
>
> /**
> - * drm_gem_prime_fd_to_handle - PRIME import function for GEM drivers
> + * drm_gem_prime_fd_to_handle_obj - PRIME import function for GEM drivers
> * @dev: drm_device to import into
> * @file_priv: drm file-private structure
> * @prime_fd: fd id of the dma-buf which should be imported
> * @handle: pointer to storage for the handle of the imported buffer object
> + * @objp: optional pointer in which reference to created GEM object can be
> returned
> *
> * This is the PRIME import function which must be used mandatorily by GEM
> * drivers to ensure correct lifetime management of the underlying GEM
> object.
> @@ -297,9 +298,10 @@ EXPORT_SYMBOL(drm_gem_dmabuf_release);
> *
> * Returns 0 on success or a negative error code on failure.
> */
> -int drm_gem_prime_fd_to_handle(struct drm_device *dev,
> -struct drm_file *file_priv, int prime_fd,
> -uint32_t *handle)
> +int drm_gem_prime_fd_to_handle_obj(struct drm_device *dev,
> +struct drm_file *file_priv, int prime_fd,
> +uint32_t *handle,
> +struct drm_gem_object **objp)
> {
> struct dma_buf *dma_buf;
> struct drm_gem_object *obj;
> @@ -336,7 +338,8 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
>
> /* _handle_create_tail unconditionally unlocks dev->object_name_lock. */
> ret = drm_gem_handle_create_tail(file_priv, obj, handle);
> - drm_gem_object_put(obj);
> + if (!objp)
> + drm_gem_object_put(obj);
> if (ret)
> goto out_put;
>
> @@ -348,6 +351,9 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
>
> dma_buf_put(dma_buf);
>
> + if (objp)
> + *objp = obj;
> +
> return 0;
>
> fail:
> @@ -356,6 +362,8 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
>*/
> drm_gem_handle_delete(file_priv, *handle);
> dma_buf_put(dma_buf);
> + if (objp)
> + drm_gem_object_put(obj);
> return ret;
>
> out_unlock:
> @@ -365,6 +373,29 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
> dma_buf_put(dma_buf);
> return ret;
> }
> +EXPORT_SYMBOL(drm_gem_prime_fd_to_handle_obj);
> +
> +/**
> + * drm_gem_prime_fd_to_handle - PRIME import function for GEM drivers
> + * @dev: drm_device to import into
> + * @file_priv: drm file-private structure
> + * @prime_fd: fd id of the dma-buf which should be imported
> + * @handle: pointer to storage for the handle of the imported buffer object
> + *
> + * This is the PRIME import function which must be used mandatorily by GEM
> + * drivers to ensure correct lifetime management of the underlying GEM
> object.
> + * The actual importing of GEM object from the dma-buf is done through the
> + * &drm_driver.gem_prime_import driver callback.
> + *
> + * Returns 0 on success or a negative error code on failure.
> + */
> +int drm_gem_prime_fd_to_handle(struct drm_device *dev,
> +struct drm_file *file_priv, int prime_fd,
> +uint32_t *handle)
> +{
> + return drm_gem_prime_fd_to_handle_obj(dev, file_priv, prime_fd, handle,
> + NULL);
> +}
> EXPORT_SYMBOL(drm_gem_prime_fd_to_handle);
>
> int drm_prime_fd_to_handle_ioctl(struct drm_device *dev, void *data,
> diff --git a/include/drm/drm_prime.h b/include/drm/drm_prime.h
> index 2a1d01e5b56b..10d145ce6586 100644
[Intel-gfx] [PATCH] drm/i915/mtl: Cleanup usage of phy lane reset
>From PICA message bus we wait for acknowledgment from
read/write commands. In case of an error, we reset the
bus for the next command.
Current implementation ends up resetting message bus twice
in cases where error is not the timeout. Since, we only need
to reset message bus once, let's move reset to corresponding
timeout error and drop the excess reset function calls from
read/write functions.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 0600fdcd06ef..f235df5646ed 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -116,6 +116,7 @@ static int intel_cx0_wait_for_ack(struct drm_i915_private
*i915, enum port port,
XELPDP_MSGBUS_TIMEOUT_SLOW, val)) {
drm_dbg_kms(&i915->drm, "PHY %c Timeout waiting for message
ACK. Status: 0x%x\n",
phy_name(phy), *val);
+ intel_cx0_bus_reset(i915, port, lane);
return -ETIMEDOUT;
}
@@ -158,10 +159,8 @@ static int __intel_cx0_read_once(struct drm_i915_private
*i915, enum port port,
XELPDP_PORT_M2P_ADDRESS(addr));
ack = intel_cx0_wait_for_ack(i915, port,
XELPDP_PORT_P2M_COMMAND_READ_ACK, lane, &val);
- if (ack < 0) {
- intel_cx0_bus_reset(i915, port, lane);
+ if (ack < 0)
return ack;
- }
intel_clear_response_ready_flag(i915, port, lane);
@@ -202,6 +201,7 @@ static int __intel_cx0_write_once(struct drm_i915_private
*i915, enum port port,
int lane, u16 addr, u8 data, bool committed)
{
enum phy phy = intel_port_to_phy(i915, port);
+ int ack;
u32 val;
if (intel_de_wait_for_clear(i915, XELPDP_PORT_M2P_MSGBUS_CTL(port,
lane),
@@ -230,10 +230,9 @@ static int __intel_cx0_write_once(struct drm_i915_private
*i915, enum port port,
}
if (committed) {
- if (intel_cx0_wait_for_ack(i915, port,
XELPDP_PORT_P2M_COMMAND_WRITE_ACK, lane, &val) < 0) {
- intel_cx0_bus_reset(i915, port, lane);
- return -EINVAL;
- }
+ ack = intel_cx0_wait_for_ack(i915, port,
XELPDP_PORT_P2M_COMMAND_WRITE_ACK, lane, &val);
+ if (ack < 0)
+ return ack;
} else if ((intel_de_read(i915, XELPDP_PORT_P2M_MSGBUS_STATUS(port,
lane)) &
XELPDP_PORT_P2M_ERROR_SET)) {
drm_dbg_kms(&i915->drm,
--
2.34.1
Re: [Intel-gfx] [PATCH v3 3/4] PCI/VGA: only deal with VGA class devices
Hi,
On 2023/6/9 03:12, Bjorn Helgaas wrote:
Start with verb and capitalize to match ("Deal only with ...")
On Thu, Jun 08, 2023 at 07:43:21PM +0800, Sui Jingfeng wrote:
From: Sui Jingfeng
vgaarb only deal with the VGA devcie(pdev->class == 0x0300), so replace the
pci_get_subsys() function with pci_get_class(). Filter the non pci display
device out. There no need to process the non display PCI device.
s/non pci/non-PCI/
s/non display/non-display/
This is fine, and I'll merge this, but someday I would like to get rid
of the bus_register_notifier() and call vga_arbiter_add_pci_device()
and vga_arbiter_del_pci_device() directly from the PCI core.
Nice idea!
But I'm wondering there are traps in this.
The pci_notifier in vgaarb.c is still need on Mips platform.
Because of loading order problems.
On MIPS system, PCI devices are enumerated by pcibios_init(),
which runs after vga_arb_device_init(). This is true until now.
When vga_arb_device_init() function get called, it will capture nothing.
On that time, the system have no PCI device enumerated.
Because of this, there are various problems in the past.
This is the reason we still need the notifier,
we need a way to capture the PCI display device after vgaarb already
loaded(finished).
On complex case, there are ASpeed BMC, loongson integrated display
controller,
and radeon discrete video card co-exist on Loongson 3B4000 server.
I have fixed various bug at our downstream(linux-4.19) environment.
I have fixed a bug on downstream involved with aspeed bmc, by workaround[1].
Chen Huacai grabbing my patch[1] and rewrite it, submit together with
him-self's.
Its fine, but those patch still look paleness in the front of Loongson
integrated display controller.
Loongson integrated display controller don't has a dedicated VRAM bar.
vga_is_firmware_default() will lose its effectiveness then.
This is the reason we reveal our patch(0004 in this series) to face
upstream.
Its not only for loongson integrated display controller through.
Its not uncommon that ARM servers have A aspeed BMC and discrete amdgpu
or old radeon card.
Let the device drivers gave us a hint probably can help to resolve
multi-video card co-exist
problem.
Consider that sometime user want to use integrate gpu, sometime user
want to use discrete gpu.
Also, during driver developing(or debugging),
driver writer may want override the default boot device.
vgaarb probable shouldn't make the decision
without giving the device driver a chance to override.
Beside, vga_is_firmware_default() only apply for PCI display device.
On ARM64 system, there are a lot of platform device.
If we move this function back to the device driver,
it probably applicable for a platform display controller + one/two PCI
display devices case.
We find a method at downstream during we get efifb works LoongArch platform.
We can utilize the screen_info, screen_info say where's the firmware
framebuffer is located at.
Drivers for specific hardware platform perhaps know more clearly than
vgaarb.
if it is the default boot device.
[1]
https://lore.kernel.org/all/20210514080025.1828197-6-chenhua...@loongson.cn/
Or if you wanted to do that now, that would be even better :)
Bjorn
Signed-off-by: Sui Jingfeng
---
drivers/pci/vgaarb.c | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/vgaarb.c b/drivers/pci/vgaarb.c
index 7f0347f4f6fd..b0bf4952a95d 100644
--- a/drivers/pci/vgaarb.c
+++ b/drivers/pci/vgaarb.c
@@ -756,10 +756,6 @@ static bool vga_arbiter_add_pci_device(struct pci_dev
*pdev)
struct pci_dev *bridge;
u16 cmd;
- /* Only deal with VGA class devices */
- if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
- return false;
-
/* Allocate structure */
vgadev = kzalloc(sizeof(struct vga_device), GFP_KERNEL);
if (vgadev == NULL) {
@@ -1499,7 +1495,9 @@ static int pci_notify(struct notifier_block *nb, unsigned
long action,
struct pci_dev *pdev = to_pci_dev(dev);
bool notify = false;
- vgaarb_dbg(dev, "%s\n", __func__);
+ /* Only deal with VGA class devices */
+ if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
+ return 0;
/* For now we're only intereted in devices added and removed. I didn't
* test this thing here, so someone needs to double check for the
@@ -1509,6 +1507,8 @@ static int pci_notify(struct notifier_block *nb, unsigned
long action,
else if (action == BUS_NOTIFY_DEL_DEVICE)
notify = vga_arbiter_del_pci_device(pdev);
+ vgaarb_dbg(dev, "%s: action = %lu\n", __func__, action);
+
if (notify)
vga_arbiter_notify_clients();
return 0;
@@ -1533,8 +1533,8 @@ static struct miscdevice vga_arb_device = {
static int __init vga_arb_device_init(void)
{
+ struct pci_dev *pdev = NULL;
int rc;
- struct pci_dev *
[Intel-gfx] [PATCH 6/8] drm: Add drm_gem_prime_fd_to_handle_obj
From: Tvrtko Ursulin
I need a new flavour of the drm_gem_prime_fd_to_handle helper, one which
will return a reference to a newly created GEM objects (if created), in
order to enable tracking of imported i915 GEM objects in the following
patch.
Minor code reshuffule and only trivial additions on top of
drm_gem_prime_fd_to_handle.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_prime.c | 41 -
include/drm/drm_prime.h | 4
2 files changed, 40 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index d29dafce9bb0..ef75f67e3057 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -284,11 +284,12 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
EXPORT_SYMBOL(drm_gem_dmabuf_release);
/**
- * drm_gem_prime_fd_to_handle - PRIME import function for GEM drivers
+ * drm_gem_prime_fd_to_handle_obj - PRIME import function for GEM drivers
* @dev: drm_device to import into
* @file_priv: drm file-private structure
* @prime_fd: fd id of the dma-buf which should be imported
* @handle: pointer to storage for the handle of the imported buffer object
+ * @objp: optional pointer in which reference to created GEM object can be
returned
*
* This is the PRIME import function which must be used mandatorily by GEM
* drivers to ensure correct lifetime management of the underlying GEM object.
@@ -297,9 +298,10 @@ EXPORT_SYMBOL(drm_gem_dmabuf_release);
*
* Returns 0 on success or a negative error code on failure.
*/
-int drm_gem_prime_fd_to_handle(struct drm_device *dev,
- struct drm_file *file_priv, int prime_fd,
- uint32_t *handle)
+int drm_gem_prime_fd_to_handle_obj(struct drm_device *dev,
+ struct drm_file *file_priv, int prime_fd,
+ uint32_t *handle,
+ struct drm_gem_object **objp)
{
struct dma_buf *dma_buf;
struct drm_gem_object *obj;
@@ -336,7 +338,8 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
/* _handle_create_tail unconditionally unlocks dev->object_name_lock. */
ret = drm_gem_handle_create_tail(file_priv, obj, handle);
- drm_gem_object_put(obj);
+ if (!objp)
+ drm_gem_object_put(obj);
if (ret)
goto out_put;
@@ -348,6 +351,9 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
dma_buf_put(dma_buf);
+ if (objp)
+ *objp = obj;
+
return 0;
fail:
@@ -356,6 +362,8 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
*/
drm_gem_handle_delete(file_priv, *handle);
dma_buf_put(dma_buf);
+ if (objp)
+ drm_gem_object_put(obj);
return ret;
out_unlock:
@@ -365,6 +373,29 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
dma_buf_put(dma_buf);
return ret;
}
+EXPORT_SYMBOL(drm_gem_prime_fd_to_handle_obj);
+
+/**
+ * drm_gem_prime_fd_to_handle - PRIME import function for GEM drivers
+ * @dev: drm_device to import into
+ * @file_priv: drm file-private structure
+ * @prime_fd: fd id of the dma-buf which should be imported
+ * @handle: pointer to storage for the handle of the imported buffer object
+ *
+ * This is the PRIME import function which must be used mandatorily by GEM
+ * drivers to ensure correct lifetime management of the underlying GEM object.
+ * The actual importing of GEM object from the dma-buf is done through the
+ * &drm_driver.gem_prime_import driver callback.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int drm_gem_prime_fd_to_handle(struct drm_device *dev,
+ struct drm_file *file_priv, int prime_fd,
+ uint32_t *handle)
+{
+ return drm_gem_prime_fd_to_handle_obj(dev, file_priv, prime_fd, handle,
+ NULL);
+}
EXPORT_SYMBOL(drm_gem_prime_fd_to_handle);
int drm_prime_fd_to_handle_ioctl(struct drm_device *dev, void *data,
diff --git a/include/drm/drm_prime.h b/include/drm/drm_prime.h
index 2a1d01e5b56b..10d145ce6586 100644
--- a/include/drm/drm_prime.h
+++ b/include/drm/drm_prime.h
@@ -69,6 +69,10 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf);
int drm_gem_prime_fd_to_handle(struct drm_device *dev,
struct drm_file *file_priv, int prime_fd,
uint32_t *handle);
+int drm_gem_prime_fd_to_handle_obj(struct drm_device *dev,
+ struct drm_file *file_priv, int prime_fd,
+ uint32_t *handle,
+ struct drm_gem_object **obj);
int drm_gem_prime_handle_to_fd(struct drm_device *dev,
struct drm_file *file_priv, uint32_t handle,
uint32_t flags,
int *prime_fd);
--
2.3
[Intel-gfx] [PATCH 8/8] drm/i915: Implement fdinfo memory stats printing
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we walk the per memory regions object lists
and accumulate object size into the respective drm_memory_stats
categories.
Objects with multiple possible placements are reported in multiple
regions for total and shared sizes, while other categories are
counted only for the currently active region.
Signed-off-by: Tvrtko Ursulin
Cc: Aravind Iddamsetty
Cc: Rob Clark
---
drivers/gpu/drm/i915/i915_drm_client.c | 64 ++
1 file changed, 64 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index 31316edbf30b..596de36ee09c 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -48,6 +48,68 @@ void __i915_drm_client_free(struct kref *kref)
}
#ifdef CONFIG_PROC_FS
+static void
+obj_meminfo(struct drm_i915_gem_object *obj,
+ struct drm_memory_stats stats[INTEL_REGION_UNKNOWN])
+{
+ struct intel_memory_region *mr;
+ u64 sz = obj->base.size;
+ enum intel_region_id id;
+ unsigned int i;
+
+ /* Attribute size and shared to all possible memory regions. */
+ for (i = 0; i < obj->mm.n_placements; i++) {
+ mr = obj->mm.placements[i];
+ id = mr->id;
+
+ if (obj->base.handle_count > 1)
+ stats[id].shared += sz;
+ else
+ stats[id].private += sz;
+ }
+
+ /* Attribute other categories to only the current region. */
+ mr = obj->mm.region;
+ if (mr)
+ id = mr->id;
+ else
+ id = INTEL_REGION_SMEM;
+
+ if (i915_gem_object_has_pages(obj)) {
+ stats[id].resident += sz;
+
+ if (!dma_resv_test_signaled(obj->base.resv,
+ dma_resv_usage_rw(true)))
+ stats[id].active += sz;
+ else if (i915_gem_object_is_shrinkable(obj) &&
+obj->mm.madv == I915_MADV_DONTNEED)
+ stats[id].purgeable += sz;
+ }
+}
+
+static void show_meminfo(struct drm_printer *p, struct drm_file *file)
+{
+ struct drm_memory_stats stats[INTEL_REGION_UNKNOWN] = {};
+ struct drm_i915_file_private *fpriv = file->driver_priv;
+ struct i915_drm_client *client = fpriv->client;
+ struct drm_i915_private *i915 = fpriv->i915;
+ struct drm_i915_gem_object *obj;
+ struct intel_memory_region *mr;
+ unsigned int id;
+
+ spin_lock_irq(&client->objects_lock);
+ list_for_each_entry(obj, &client->objects_list, client_link)
+ obj_meminfo(obj, stats);
+ spin_unlock_irq(&client->objects_lock);
+
+ for_each_memory_region(mr, i915, id)
+ drm_print_memory_stats(p,
+ &stats[id],
+ DRM_GEM_OBJECT_RESIDENT |
+ DRM_GEM_OBJECT_PURGEABLE,
+ mr->name);
+}
+
static const char * const uabi_class_names[] = {
[I915_ENGINE_CLASS_RENDER] = "render",
[I915_ENGINE_CLASS_COPY] = "copy",
@@ -109,6 +171,8 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct
drm_file *file)
* **
*/
+ show_meminfo(p, file);
+
if (GRAPHICS_VER(i915) < 8)
return;
--
2.39.2
[Intel-gfx] [PATCH 7/8] drm/i915: Track imported dma-buf objects in memory stats
From: Tvrtko Ursulin
We want to be able to show memory usage of imported dma-buf opjects in the
fdinfo stats.
To achieve this we wrap drm_gem_prime_fd_to_handle(_obj) in
i915_gem_prime_fd_to_handle and append some client management at the end.
Signed-off-by: Tvrtko Ursulin
Cc: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 32 ++
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h | 7 +
drivers/gpu/drm/i915/i915_driver.c | 2 +-
3 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index fd556a076d05..2e2d9d7c1992 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -11,7 +11,10 @@
#include
+#include
+
#include "gem/i915_gem_dmabuf.h"
+#include "i915_drm_client.h"
#include "i915_drv.h"
#include "i915_gem_object.h"
#include "i915_scatterlist.h"
@@ -344,6 +347,35 @@ struct drm_gem_object *i915_gem_prime_import(struct
drm_device *dev,
return ERR_PTR(ret);
}
+int i915_gem_prime_fd_to_handle(struct drm_device *dev,
+ struct drm_file *file_priv, int prime_fd,
+ uint32_t *handle)
+{
+ struct drm_gem_object *gem_obj = NULL;
+ int ret;
+
+ if (IS_ENABLED(CONFIG_PROC_FS))
+ ret = drm_gem_prime_fd_to_handle_obj(dev, file_priv, prime_fd,
+handle, &gem_obj);
+ else
+ ret = drm_gem_prime_fd_to_handle(dev, file_priv, prime_fd,
+handle);
+ if (ret)
+ return ret;
+
+ if (gem_obj) {
+ struct drm_i915_file_private *fpriv = file_priv->driver_priv;
+ struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
+
+ /* Really imported and not just alias? */
+ if (obj->ops == &i915_gem_object_dmabuf_ops)
+ i915_drm_client_add_object(fpriv->client, obj);
+ i915_gem_object_put(obj);
+ }
+
+ return 0;
+}
+
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/mock_dmabuf.c"
#include "selftests/i915_gem_dmabuf.c"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
index 6e0405d47ce1..63635c221c7c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
@@ -6,8 +6,11 @@
#ifndef __I915_GEM_DMABUF_H__
#define __I915_GEM_DMABUF_H__
+#include
+
struct drm_gem_object;
struct drm_device;
+struct drm_file;
struct dma_buf;
struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
@@ -15,4 +18,8 @@ struct drm_gem_object *i915_gem_prime_import(struct
drm_device *dev,
struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int
flags);
+int i915_gem_prime_fd_to_handle(struct drm_device *dev,
+ struct drm_file *file_priv, int prime_fd,
+ uint32_t *handle);
+
#endif /* __I915_GEM_DMABUF_H__ */
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index ace8534b6cc5..03f3157371bf 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1806,7 +1806,7 @@ static const struct drm_driver i915_drm_driver = {
.show_fdinfo = i915_drm_client_fdinfo,
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
- .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
+ .prime_fd_to_handle = i915_gem_prime_fd_to_handle,
.gem_prime_import = i915_gem_prime_import,
.dumb_create = i915_gem_dumb_create,
--
2.39.2
[Intel-gfx] [PATCH 5/8] drm/i915: Account ring buffer and context state storage
From: Tvrtko Ursulin
Account ring buffers and logical context space against the owning client
memory usage stats.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 ++
drivers/gpu/drm/i915/i915_drm_client.c | 10 ++
drivers/gpu/drm/i915/i915_drm_client.h | 9 +
3 files changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 35cf6608180e..3f4c74aed3c5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1703,6 +1703,8 @@ static void gem_context_register(struct i915_gem_context
*ctx,
u32 id)
{
struct drm_i915_private *i915 = ctx->i915;
+ struct i915_gem_engines_iter it;
+ struct intel_context *ce;
void *old;
ctx->file_priv = fpriv;
@@ -1721,6 +1723,10 @@ static void gem_context_register(struct i915_gem_context
*ctx,
list_add_tail(&ctx->link, &i915->gem.contexts.list);
spin_unlock(&i915->gem.contexts.lock);
+ for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it)
+ i915_drm_client_add_context(fpriv->client, ce);
+ i915_gem_context_unlock_engines(ctx);
+
/* And finally expose ourselves to userspace via the idr */
old = xa_store(&fpriv->context_xa, id, ctx, GFP_KERNEL);
WARN_ON(old);
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index b0b35bcdd2b3..31316edbf30b 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -145,4 +145,14 @@ void i915_drm_client_remove_object(struct
drm_i915_gem_object *obj)
i915_drm_client_put(client);
}
+
+void i915_drm_client_add_context(struct i915_drm_client *client,
+struct intel_context *ce)
+{
+ if (ce->state)
+ i915_drm_client_add_object(client, ce->state->obj);
+
+ if (ce->ring != ce->engine->legacy.ring && ce->ring->vma)
+ i915_drm_client_add_object(client, ce->ring->vma->obj);
+}
#endif
diff --git a/drivers/gpu/drm/i915/i915_drm_client.h
b/drivers/gpu/drm/i915/i915_drm_client.h
index dfeaaf204c00..e1e2a7cca1b1 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.h
+++ b/drivers/gpu/drm/i915/i915_drm_client.h
@@ -14,6 +14,7 @@
#include "i915_file_private.h"
#include "gem/i915_gem_object_types.h"
+#include "gt/intel_context_types.h"
#define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_COMPUTE
@@ -72,6 +73,8 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct
drm_file *file);
void i915_drm_client_add_object(struct i915_drm_client *client,
struct drm_i915_gem_object *obj);
void i915_drm_client_remove_object(struct drm_i915_gem_object *obj);
+void i915_drm_client_add_context(struct i915_drm_client *client,
+struct intel_context *ce);
#else
static inline void i915_drm_client_add_object(struct i915_drm_client *client,
struct drm_i915_gem_object *obj)
@@ -82,6 +85,12 @@ static inline void i915_drm_client_add_object(struct
i915_drm_client *client,
static inline void i915_drm_client_remove_object(struct drm_i915_gem_object
*obj)
{
+}
+
+static inline void i915_drm_client_add_context(struct i915_drm_client *client,
+ struct intel_context *ce)
+{
+
}
#endif
--
2.39.2
[Intel-gfx] [PATCH 3/8] drm/i915: Record which clients own a VM
From: Tvrtko Ursulin
To enable accounting of indirect client memory usage (such as page tables)
in the following patch, lets start recording the creator of each PPGTT.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 11 ---
drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 3 +++
drivers/gpu/drm/i915/gem/selftests/mock_context.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 9a9ff84c90d7..35cf6608180e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -279,7 +279,8 @@ static int proto_context_set_protected(struct
drm_i915_private *i915,
}
static struct i915_gem_proto_context *
-proto_context_create(struct drm_i915_private *i915, unsigned int flags)
+proto_context_create(struct drm_i915_file_private *fpriv,
+struct drm_i915_private *i915, unsigned int flags)
{
struct i915_gem_proto_context *pc, *err;
@@ -287,6 +288,7 @@ proto_context_create(struct drm_i915_private *i915,
unsigned int flags)
if (!pc)
return ERR_PTR(-ENOMEM);
+ pc->fpriv = fpriv;
pc->num_user_engines = -1;
pc->user_engines = NULL;
pc->user_flags = BIT(UCONTEXT_BANNABLE) |
@@ -1621,6 +1623,7 @@ i915_gem_create_context(struct drm_i915_private *i915,
err = PTR_ERR(ppgtt);
goto err_ctx;
}
+ ppgtt->vm.fpriv = pc->fpriv;
vm = &ppgtt->vm;
}
if (vm)
@@ -1740,7 +1743,7 @@ int i915_gem_context_open(struct drm_i915_private *i915,
/* 0 reserved for invalid/unassigned ppgtt */
xa_init_flags(&file_priv->vm_xa, XA_FLAGS_ALLOC1);
- pc = proto_context_create(i915, 0);
+ pc = proto_context_create(file_priv, i915, 0);
if (IS_ERR(pc)) {
err = PTR_ERR(pc);
goto err;
@@ -1822,6 +1825,7 @@ int i915_gem_vm_create_ioctl(struct drm_device *dev, void
*data,
GEM_BUG_ON(id == 0); /* reserved for invalid/unassigned ppgtt */
args->vm_id = id;
+ ppgtt->vm.fpriv = file_priv;
return 0;
err_put:
@@ -2284,7 +2288,8 @@ int i915_gem_context_create_ioctl(struct drm_device *dev,
void *data,
return -EIO;
}
- ext_data.pc = proto_context_create(i915, args->flags);
+ ext_data.pc = proto_context_create(file->driver_priv, i915,
+ args->flags);
if (IS_ERR(ext_data.pc))
return PTR_ERR(ext_data.pc);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index cb78214a7dcd..c573c067779f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -188,6 +188,9 @@ struct i915_gem_proto_engine {
* CONTEXT_CREATE_SET_PARAM during GEM_CONTEXT_CREATE.
*/
struct i915_gem_proto_context {
+ /** @fpriv: Client which creates the context */
+ struct drm_i915_file_private *fpriv;
+
/** @vm: See &i915_gem_context.vm */
struct i915_address_space *vm;
diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
index 8ac6726ec16b..125584ada282 100644
--- a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
@@ -83,7 +83,7 @@ live_context(struct drm_i915_private *i915, struct file *file)
int err;
u32 id;
- pc = proto_context_create(i915, 0);
+ pc = proto_context_create(fpriv, i915, 0);
if (IS_ERR(pc))
return ERR_CAST(pc);
@@ -152,7 +152,7 @@ kernel_context(struct drm_i915_private *i915,
struct i915_gem_context *ctx;
struct i915_gem_proto_context *pc;
- pc = proto_context_create(i915, 0);
+ pc = proto_context_create(NULL, i915, 0);
if (IS_ERR(pc))
return ERR_CAST(pc);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h
b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 4d6296cdbcfd..7192a534a654 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -248,6 +248,7 @@ struct i915_address_space {
struct drm_mm mm;
struct intel_gt *gt;
struct drm_i915_private *i915;
+ struct drm_i915_file_private *fpriv;
struct device *dma;
u64 total; /* size addr space maps (ex. 2GB for ggtt) */
u64 reserved; /* size addr space reserved */
--
2.39.2
[Intel-gfx] [PATCH 4/8] drm/i915: Track page table backing store usage
From: Tvrtko Ursulin
Account page table backing store against the owning client memory usage
stats.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gtt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 2f6a9be0ffe6..126269a0d728 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -58,6 +58,9 @@ struct drm_i915_gem_object *alloc_pt_lmem(struct
i915_address_space *vm, int sz)
if (!IS_ERR(obj)) {
obj->base.resv = i915_vm_resv_get(vm);
obj->shares_resv_from = vm;
+
+ if (vm->fpriv)
+ i915_drm_client_add_object(vm->fpriv->client, obj);
}
return obj;
@@ -79,6 +82,9 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
i915_address_space *vm, int sz)
if (!IS_ERR(obj)) {
obj->base.resv = i915_vm_resv_get(vm);
obj->shares_resv_from = vm;
+
+ if (vm->fpriv)
+ i915_drm_client_add_object(vm->fpriv->client, obj);
}
return obj;
--
2.39.2
[Intel-gfx] [PATCH 1/8] dma-fence: Bypass signaling annotation from dma_fence_is_signaled
From: Tvrtko Ursulin
For dma_fence_is_signaled signaling critical path annotations are an
annoying cause of false positives when using dma_fence_is_signaled and
indirectly higher level helpers such as dma_resv_test_signaled etc.
Drop the critical path annotation since the "is signaled" API does not
guarantee to ever change the signaled status anyway.
We do that by adding a low level _dma_fence_signal helper and use it from
dma_fence_is_signaled.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Daniel Vetter
---
drivers/dma-buf/dma-fence.c | 26 --
include/linux/dma-fence.h | 3 ++-
2 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index f177c56269bb..f216a189a755 100644
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c
@@ -444,6 +444,25 @@ int dma_fence_signal_locked(struct dma_fence *fence)
}
EXPORT_SYMBOL(dma_fence_signal_locked);
+/**
+ * _dma_fence_signal - signal completion of a fence bypassing critical section
annotation
+ * @fence: the fence to signal
+ *
+ * This low-level helper should not be used by code external to dma-fence.h|c!
+ */
+int _dma_fence_signal(struct dma_fence *fence)
+{
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(fence->lock, flags);
+ ret = dma_fence_signal_timestamp_locked(fence, ktime_get());
+ spin_unlock_irqrestore(fence->lock, flags);
+
+ return ret;
+}
+EXPORT_SYMBOL(_dma_fence_signal);
+
/**
* dma_fence_signal - signal completion of a fence
* @fence: the fence to signal
@@ -459,7 +478,6 @@ EXPORT_SYMBOL(dma_fence_signal_locked);
*/
int dma_fence_signal(struct dma_fence *fence)
{
- unsigned long flags;
int ret;
bool tmp;
@@ -467,11 +485,7 @@ int dma_fence_signal(struct dma_fence *fence)
return -EINVAL;
tmp = dma_fence_begin_signalling();
-
- spin_lock_irqsave(fence->lock, flags);
- ret = dma_fence_signal_timestamp_locked(fence, ktime_get());
- spin_unlock_irqrestore(fence->lock, flags);
-
+ ret = _dma_fence_signal(fence);
dma_fence_end_signalling(tmp);
return ret;
diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h
index d54b595a0fe0..d94768ad70e4 100644
--- a/include/linux/dma-fence.h
+++ b/include/linux/dma-fence.h
@@ -387,6 +387,7 @@ static inline void dma_fence_end_signalling(bool cookie) {}
static inline void __dma_fence_might_wait(void) {}
#endif
+int _dma_fence_signal(struct dma_fence *fence);
int dma_fence_signal(struct dma_fence *fence);
int dma_fence_signal_locked(struct dma_fence *fence);
int dma_fence_signal_timestamp(struct dma_fence *fence, ktime_t timestamp);
@@ -452,7 +453,7 @@ dma_fence_is_signaled(struct dma_fence *fence)
return true;
if (fence->ops->signaled && fence->ops->signaled(fence)) {
- dma_fence_signal(fence);
+ _dma_fence_signal(fence);
return true;
}
--
2.39.2
[Intel-gfx] [PATCH 2/8] drm/i915: Track buffer objects belonging to clients
From: Tvrtko Ursulin
In order to show per client memory usage lets start tracking which
objects belong to which clients.
We start with objects explicitly created by object creation UAPI and
track it on a new per client lists, protected by a new per client lock.
In order for delayed destruction (post client exit), we make tracked
objects hold references to the owning client.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_create.c| 32 +--
drivers/gpu/drm/i915/gem/i915_gem_object.c| 6 +++
.../gpu/drm/i915/gem/i915_gem_object_types.h | 12 ++
drivers/gpu/drm/i915/i915_drm_client.c| 39 ++-
drivers/gpu/drm/i915/i915_drm_client.h| 36 -
drivers/gpu/drm/i915/i915_gem.c | 2 +-
6 files changed, 121 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index d24c0ce8805c..4f1957638207 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -11,6 +11,7 @@
#include "gem/i915_gem_region.h"
#include "pxp/intel_pxp.h"
+#include "i915_drm_client.h"
#include "i915_drv.h"
#include "i915_gem_create.h"
#include "i915_trace.h"
@@ -164,6 +165,14 @@ __i915_gem_object_create_user(struct drm_i915_private
*i915, u64 size,
n_placements, 0);
}
+static void add_file_obj(struct drm_file *file,
+struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_file_private *fpriv = file->driver_priv;
+
+ i915_drm_client_add_object(fpriv->client, obj);
+}
+
int
i915_gem_dumb_create(struct drm_file *file,
struct drm_device *dev,
@@ -174,6 +183,7 @@ i915_gem_dumb_create(struct drm_file *file,
enum intel_memory_type mem_type;
int cpp = DIV_ROUND_UP(args->bpp, 8);
u32 format;
+ int ret;
switch (cpp) {
case 1:
@@ -212,7 +222,12 @@ i915_gem_dumb_create(struct drm_file *file,
if (IS_ERR(obj))
return PTR_ERR(obj);
- return i915_gem_publish(obj, file, &args->size, &args->handle);
+ ret = i915_gem_publish(obj, file, &args->size, &args->handle);
+
+ if (!ret)
+ add_file_obj(file, obj);
+
+ return ret;
}
/**
@@ -229,6 +244,7 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
struct drm_i915_gem_create *args = data;
struct drm_i915_gem_object *obj;
struct intel_memory_region *mr;
+ int ret;
mr = intel_memory_region_by_type(i915, INTEL_MEMORY_SYSTEM);
@@ -236,7 +252,12 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
if (IS_ERR(obj))
return PTR_ERR(obj);
- return i915_gem_publish(obj, file, &args->size, &args->handle);
+ ret = i915_gem_publish(obj, file, &args->size, &args->handle);
+
+ if (!ret)
+ add_file_obj(file, obj);
+
+ return ret;
}
struct create_ext {
@@ -494,5 +515,10 @@ i915_gem_create_ext_ioctl(struct drm_device *dev, void
*data,
obj->pat_set_by_user = true;
}
- return i915_gem_publish(obj, file, &args->size, &args->handle);
+ ret = i915_gem_publish(obj, file, &args->size, &args->handle);
+
+ if (!ret)
+ add_file_obj(file, obj);
+
+ return ret;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 97ac6fb37958..46de9b1b3f1d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -105,6 +105,10 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
INIT_LIST_HEAD(&obj->mm.link);
+#ifdef CONFIG_PROC_FS
+ INIT_LIST_HEAD(&obj->client_link);
+#endif
+
INIT_LIST_HEAD(&obj->lut_list);
spin_lock_init(&obj->lut_lock);
@@ -441,6 +445,8 @@ static void i915_gem_free_object(struct drm_gem_object
*gem_obj)
GEM_BUG_ON(i915_gem_object_is_framebuffer(obj));
+ i915_drm_client_remove_object(obj);
+
/*
* Before we free the object, make sure any pure RCU-only
* read-side critical sections are complete, e.g.
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index e72c57716bee..8de2b91b3edf 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -300,6 +300,18 @@ struct drm_i915_gem_object {
*/
struct i915_address_space *shares_resv_from;
+#ifdef CONFIG_PROC_FS
+ /**
+* @client: @i915_drm_client which created the object
+*/
+ struct i915_drm_client *client;
+
+ /**
+* @client_link: Link into @i915_drm_client.objects_list
+*/
+ struct list_head client_link;
+#endif
+
union {
struct rcu_head
[Intel-gfx] [PATCH v3 0/8] fdinfo memory stats
From: Tvrtko Ursulin I added tracking of most classes of objects which contribute to client's memory footprint and accouting along the similar lines as in Rob's msm code. Then printing it out to fdinfo using the drm helper Rob added. Accounting by keeping per client lists may not be the most effient method, perhaps we should simply add and subtract stats directly at convenient sites, but that too is not straightforward due no existing connection between buffer objects and clients. Possibly some other tricky bits in the buffer sharing deparment. So lets see if this works for now. Infrequent reader penalty should not be too bad (may be even useful to dump the lists in debugfs?) and additional list_head per object pretty much drowns in the noise. Example fdinfo with the series applied: # cat /proc/1383/fdinfo/8 pos:0 flags: 0212 mnt_id: 21 ino:397 drm-driver: i915 drm-client-id: 18 drm-pdev: :00:02.0 drm-total-system: 125 MiB drm-shared-system: 16 MiB drm-active-system: 110 MiB drm-resident-system:125 MiB drm-purgeable-system: 2 MiB drm-total-stolen-system:0 drm-shared-stolen-system: 0 drm-active-stolen-system: 0 drm-resident-stolen-system: 0 drm-purgeable-stolen-system:0 drm-engine-render: 25662044495 ns drm-engine-copy:0 ns drm-engine-video: 0 ns drm-engine-video-enhance: 0 ns Example gputop output (local patches currently): DRM minor 0 PID SMEM SMEMRSS render copy videoNAME 1233 124M 124M |||||||| neverball 1130 59M 59M |█▌ ||||||| Xorg 1207 12M 12M |||||||| xfwm4 v2: * Now actually per client. v3: * Track imported dma-buf objects. P.S. Patch 1 in the series is to silence a false positive lockdep splat due fence signaling annotations. Tvrtko Ursulin (8): dma-fence: Bypass signaling annotation from dma_fence_is_signaled drm/i915: Track buffer objects belonging to clients drm/i915: Record which clients own a VM drm/i915: Track page table backing store usage drm/i915: Account ring buffer and context state storage drm: Add drm_gem_prime_fd_to_handle_obj drm/i915: Track imported dma-buf objects in memory stats drm/i915: Implement fdinfo memory stats printing drivers/dma-buf/dma-fence.c | 26 +++- drivers/gpu/drm/drm_prime.c | 41 ++- drivers/gpu/drm/i915/gem/i915_gem_context.c | 17 ++- .../gpu/drm/i915/gem/i915_gem_context_types.h | 3 + drivers/gpu/drm/i915/gem/i915_gem_create.c| 32 - drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c| 32 + drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h| 7 ++ drivers/gpu/drm/i915/gem/i915_gem_object.c| 6 + .../gpu/drm/i915/gem/i915_gem_object_types.h | 12 ++ .../gpu/drm/i915/gem/selftests/mock_context.c | 4 +- drivers/gpu/drm/i915/gt/intel_gtt.c | 6 + drivers/gpu/drm/i915/gt/intel_gtt.h | 1 + drivers/gpu/drm/i915/i915_driver.c| 2 +- drivers/gpu/drm/i915/i915_drm_client.c| 113 +- drivers/gpu/drm/i915/i915_drm_client.h| 45 ++- drivers/gpu/drm/i915/i915_gem.c | 2 +- include/drm/drm_prime.h | 4 + include/linux/dma-fence.h | 3 +- 18 files changed, 332 insertions(+), 24 deletions(-) -- 2.39.2
Re: [Intel-gfx] [PATCH 1/5] drm/i915: Track buffer objects belonging to clients
On 09/06/2023 05:16, Iddamsetty, Aravind wrote:
On 08-06-2023 20:21, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In order to show per client memory usage lets start tracking which
objects belong to which clients.
We start with objects explicitly created by object creation UAPI and
track it on a new per client lists, protected by a new per client lock.
In order for delayed destruction (post client exit), we make tracked
objects hold references to the owning client.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_create.c| 32 ++--
drivers/gpu/drm/i915/gem/i915_gem_object.c| 6 +++
.../gpu/drm/i915/gem/i915_gem_object_types.h | 12 ++
drivers/gpu/drm/i915/i915_drm_client.c| 36 +-
drivers/gpu/drm/i915/i915_drm_client.h| 37 ++-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
6 files changed, 119 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index d24c0ce8805c..4f1957638207 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -11,6 +11,7 @@
#include "gem/i915_gem_region.h"
#include "pxp/intel_pxp.h"
+#include "i915_drm_client.h"
#include "i915_drv.h"
#include "i915_gem_create.h"
#include "i915_trace.h"
@@ -164,6 +165,14 @@ __i915_gem_object_create_user(struct drm_i915_private
*i915, u64 size,
n_placements, 0);
}
+static void add_file_obj(struct drm_file *file,
+struct drm_i915_gem_object *obj)
+{
+ struct drm_i915_file_private *fpriv = file->driver_priv;
+
+ i915_drm_client_add_object(fpriv->client, obj);
+}
+
int
i915_gem_dumb_create(struct drm_file *file,
struct drm_device *dev,
@@ -174,6 +183,7 @@ i915_gem_dumb_create(struct drm_file *file,
enum intel_memory_type mem_type;
int cpp = DIV_ROUND_UP(args->bpp, 8);
u32 format;
+ int ret;
switch (cpp) {
case 1:
@@ -212,7 +222,12 @@ i915_gem_dumb_create(struct drm_file *file,
if (IS_ERR(obj))
return PTR_ERR(obj);
- return i915_gem_publish(obj, file, &args->size, &args->handle);
+ ret = i915_gem_publish(obj, file, &args->size, &args->handle);
+
+ if (!ret)
+ add_file_obj(file, obj);
+
+ return ret;
}
/**
@@ -229,6 +244,7 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
struct drm_i915_gem_create *args = data;
struct drm_i915_gem_object *obj;
struct intel_memory_region *mr;
+ int ret;
mr = intel_memory_region_by_type(i915, INTEL_MEMORY_SYSTEM);
@@ -236,7 +252,12 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
if (IS_ERR(obj))
return PTR_ERR(obj);
Do we intend to track only client created objects and not imported ?
or is that taken care by this "obj->base.handle_count > 1"
I missed the imports, now added in v3 of the series.
They wouldn't have been handled by the above check in the importer -
only the exporter would have seen (sometimes) changes in the ratio of
total vs shared.
Regards,
Tvrtko
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display/dp: On AUX xfer timeout restart freshly (rev2)
== Series Details == Series: drm/i915/display/dp: On AUX xfer timeout restart freshly (rev2) URL : https://patchwork.freedesktop.org/series/119055/ State : success == Summary == CI Bug Log - changes from CI_DRM_13249_full -> Patchwork_119055v2_full Summary --- **SUCCESS** No regressions found. Participating hosts (7 -> 7) -- No changes in participating hosts Known issues Here are the changes found in Patchwork_119055v2_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_barrier_race@remote-request@rcs0: - shard-apl: [PASS][1] -> [ABORT][2] ([i915#7461] / [i915#8190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-apl6/igt@gem_barrier_race@remote-requ...@rcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-apl4/igt@gem_barrier_race@remote-requ...@rcs0.html * igt@gem_exec_balancer@parallel-ordering: - shard-glk: NOTRUN -> [SKIP][3] ([fdo#109271]) +18 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-glk7/igt@gem_exec_balan...@parallel-ordering.html * igt@gem_lmem_swapping@parallel-random: - shard-apl: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-apl3/igt@gem_lmem_swapp...@parallel-random.html * igt@gem_lmem_swapping@verify-random-ccs: - shard-glk: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-glk7/igt@gem_lmem_swapp...@verify-random-ccs.html * igt@gem_userptr_blits@vma-merge: - shard-glk: NOTRUN -> [FAIL][6] ([i915#3318]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-glk7/igt@gem_userptr_bl...@vma-merge.html * igt@gen9_exec_parse@allowed-single: - shard-glk: [PASS][7] -> [ABORT][8] ([i915#5566]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13249/shard-glk5/igt@gen9_exec_pa...@allowed-single.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-glk9/igt@gen9_exec_pa...@allowed-single.html * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#3886]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-apl3/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs: - shard-glk: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#3886]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-glk7/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs.html * igt@kms_cursor_crc@cursor-rapid-movement-32x10: - shard-glk: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#4579]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-glk7/igt@kms_cursor_...@cursor-rapid-movement-32x10.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode: - shard-apl: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4579]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscal...@pipe-a-valid-mode.html * igt@kms_force_connector_basic@force-connector-state: - shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271]) +26 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-apl3/igt@kms_force_connector_ba...@force-connector-state.html * igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1: - shard-glk: NOTRUN -> [FAIL][14] ([i915#4573]) +1 similar issue [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-glk7/igt@kms_plane_alpha_blend@alpha-opaque...@pipe-a-hdmi-a-1.html * igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-b-hdmi-a-1: - shard-snb: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4579]) +5 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-snb1/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0...@pipe-b-hdmi-a-1.html * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-a-vga-1: - shard-snb: NOTRUN -> [SKIP][16] ([fdo#109271]) +12 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-snb5/igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scal...@pipe-a-vga-1.html * igt@kms_psr2_sf@plane-move-sf-dmg-area: - shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#658]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119055v2/shard-apl3/igt@kms
Re: [Intel-gfx] [PATCH v17 1/1] drm/i915: Allow user to set cache at BO creation
Hi Carl, > > > besides this, ask a dumb question. > > > How we retrieve the pat_index from a shared resource though dma_buf fd? > > > maybe we need to know whether it could be CPU cached if we want map it. > > > Of course, looks there are no real usage to access it though CPU. > > > Just use it directly without any pat related options ? > > > > I am not understanding. Do you want to ask the PAT table to the driver? Are > > you referring to the CPU PAT index? > > > > In any case, if I understood correctly, you don't necessarily always need to > > set the PAT options and the cache options will fall into the default values. > > > > Please let me know if I haven't answered the question. > > > > If mesa create a resource , then use DRM_IOCTL_PRIME_HANDLE_TO_FD convert it > to a dma fd. > Then share it to media, media use DRM_IOCTL_PRIME_FD_TO_HANDLE convert it to > a gem bo. > But media does not know the PAT index , because mesa create it and set it. > So, if media want to call DRM_IOCTL_I915_GEM_MMAP_OFFSET, media does not know > whether it could be WB. That's a good point. To be honest I am not really sure how this is handled. Fei, Jordan? Do you have suggestion here? Andi
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Move stolen memory handling details into i915_gem_stolen
== Series Details == Series: Move stolen memory handling details into i915_gem_stolen URL : https://patchwork.freedesktop.org/series/119123/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Move stolen memory handling details into i915_gem_stolen
== Series Details == Series: Move stolen memory handling details into i915_gem_stolen URL : https://patchwork.freedesktop.org/series/119123/ State : warning == Summary == Error: dim checkpatch failed 7c50baebe654 drm/i915: Move stolen memory handling into i915_gem_stolen -:42: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #42: FILE: drivers/gpu/drm/i915/display/intel_fbc.c:334: + GEM_BUG_ON(range_overflows_end_t(u64, i915_gem_stolen_area_address(i915), -:45: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #45: FILE: drivers/gpu/drm/i915/display/intel_fbc.c:337: + GEM_BUG_ON(range_overflows_end_t(u64, i915_gem_stolen_area_address(i915), -:173: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #173: FILE: drivers/gpu/drm/i915/gem/i915_gem_stolen.c:994: +u64 i915_gem_stolen_node_address(const struct drm_i915_private *i915, + const struct drm_mm_node *node) -:178: CHECK:LINE_SPACING: Please don't use multiple blank lines #178: FILE: drivers/gpu/drm/i915/gem/i915_gem_stolen.c:999: + + -:215: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #215: FILE: drivers/gpu/drm/i915/gem/i915_gem_stolen.h:46: +u64 i915_gem_stolen_node_address(const struct drm_i915_private *i915, + const struct drm_mm_node *node); total: 0 errors, 2 warnings, 3 checks, 178 lines checked 84d43ac59d7c drm/i915/fbc: Make FBC check stolen at use time c6051b9df3a4 drm/i915/fbc: Moved fence related code away from intel_fbc -:68: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'gt' may be better as '(gt)' to avoid precedence issues #68: FILE: drivers/gpu/drm/i915/gt/intel_gt_types.h:309: +#define intel_gt_support_legacy_fencing(gt) (gt->ggtt->num_fences <= 0) total: 0 errors, 0 warnings, 1 checks, 54 lines checked
Re: [Intel-gfx] [RFC 2/4] drm/i915/display: Update access of has_audio param
On Fri, 09 Jun 2023, Mitul Golani wrote:
> Update access of has_audio param from crtc_state pointer
> as it is wrapped under audio_config.
This should be squashed with the change moving the member in order to
not break the build.
BR,
Jani.
>
> Signed-off-by: Mitul Golani
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c| 4 ++--
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 16
> drivers/gpu/drm/i915/display/intel_audio.c | 6 +++---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +++---
> .../gpu/drm/i915/display/intel_crtc_state_dump.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c| 2 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c| 10 +-
> 11 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 112d91d81fdc..741896db0b38 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -345,7 +345,7 @@ static void intel_dp_get_config(struct intel_encoder
> *encoder,
>
> tmp = intel_de_read(dev_priv, intel_dp->output_reg);
>
> - pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A;
> + pipe_config->audio_config.has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE &&
> port != PORT_A;
>
> if (HAS_PCH_CPT(dev_priv) && port != PORT_A) {
> u32 trans_dp = intel_de_read(dev_priv,
> @@ -625,7 +625,7 @@ static void intel_dp_enable_port(struct intel_dp
> *intel_dp,
>* fail when the power sequencer is freshly used for this port.
>*/
> intel_dp->DP |= DP_PORT_EN;
> - if (crtc_state->has_audio)
> + if (crtc_state->audio_config.has_audio)
> intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
>
> intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 5c187e6e0472..5607e750f576 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -178,7 +178,7 @@ static void intel_hdmi_get_config(struct intel_encoder
> *encoder,
> pipe_config->has_infoframe = true;
>
> if (tmp & HDMI_AUDIO_ENABLE)
> - pipe_config->has_audio = true;
> + pipe_config->audio_config.has_audio = true;
>
> if (!HAS_PCH_SPLIT(dev_priv) &&
> tmp & HDMI_COLOR_RANGE_16_235)
> @@ -224,7 +224,7 @@ static void g4x_hdmi_enable_port(struct intel_encoder
> *encoder,
> temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
> - if (pipe_config->has_audio)
> + if (pipe_config->audio_config.has_audio)
> temp |= HDMI_AUDIO_ENABLE;
>
> intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> @@ -240,7 +240,7 @@ static void g4x_enable_hdmi(struct intel_atomic_state
> *state,
>
> g4x_hdmi_enable_port(encoder, pipe_config);
>
> - drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
> + drm_WARN_ON(&dev_priv->drm, pipe_config->audio_config.has_audio &&
> !pipe_config->has_hdmi_sink);
> intel_audio_codec_enable(encoder, pipe_config, conn_state);
> }
> @@ -258,7 +258,7 @@ static void ibx_enable_hdmi(struct intel_atomic_state
> *state,
> temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
> - if (pipe_config->has_audio)
> + if (pipe_config->audio_config.has_audio)
> temp |= HDMI_AUDIO_ENABLE;
>
> /*
> @@ -293,7 +293,7 @@ static void ibx_enable_hdmi(struct intel_atomic_state
> *state,
> intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> }
>
> - drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
> + drm_WARN_ON(&dev_priv->drm, pipe_config->audio_config.has_audio &&
> !pipe_config->has_hdmi_sink);
> intel_audio_codec_enable(encoder, pipe_config, conn_state);
> }
> @@ -313,7 +313,7 @@ static void cpt_enable_hdmi(struct intel_atomic_state
> *state,
> temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
> - if (pipe_config->has_audio)
> + if (pipe_config->audio_config.has_audio)
> temp |= HDMI_AUDIO_ENABLE;
>
> /*
> @@ -348,7 +348,7 @@ static void cpt_enable_hdmi(struct intel_atomic_state
> *state,
>TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE, 0);
> }
>
> - drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
> + drm_WARN_ON(&dev_priv->drm, pipe_config->audio_config.has_audio &&
> !pipe_config->has_hdmi_sink);
> intel_audio_codec_en
Re: [Intel-gfx] [RFC 1/4] drm/i915/hdmi: Add audio config related params in crtc_state
On Fri, 09 Jun 2023, Mitul Golani wrote:
> Add source audio-related config params in crtc_state.
> These params can be supported frequency, supported channel,
> and audio support, which can be further computed based on
> source capabilities.
>
> Signed-off-by: Mitul Golani
> ---
> drivers/gpu/drm/i915/display/intel_display_types.h | 12 +---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 731f2ec04d5c..873a60f3f870 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1129,9 +1129,15 @@ struct intel_crtc_state {
> /* Whether we should send NULL infoframes. Required for audio. */
> bool has_hdmi_sink;
>
> - /* Audio enabled on this pipe. Only valid if either has_hdmi_sink or
> - * has_dp_encoder is set. */
> - bool has_audio;
> + struct {
> + bool has_audio;
> +
> + /* Audio rate in Hz */
> + unsigned int max_frequency;
> +
> + /* Number of audio channels */
> + unsigned int max_channel;
Please just use int, not unsigned int, for both of these.
BR,
Jani.
> + } audio_config;
>
> /*
>* Enable dithering, used when the selected pipe bpp doesn't match the
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [RFC 1/4] drm/i915/hdmi: Add audio config related params in crtc_state
On Fri, 09 Jun 2023, Mitul Golani wrote:
> Add source audio-related config params in crtc_state.
> These params can be supported frequency, supported channel,
> and audio support, which can be further computed based on
> source capabilities.
>
> Signed-off-by: Mitul Golani
> ---
> drivers/gpu/drm/i915/display/intel_display_types.h | 12 +---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 731f2ec04d5c..873a60f3f870 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1129,9 +1129,15 @@ struct intel_crtc_state {
> /* Whether we should send NULL infoframes. Required for audio. */
> bool has_hdmi_sink;
>
> - /* Audio enabled on this pipe. Only valid if either has_hdmi_sink or
> - * has_dp_encoder is set. */
> - bool has_audio;
> + struct {
> + bool has_audio;
> +
> + /* Audio rate in Hz */
> + unsigned int max_frequency;
> +
> + /* Number of audio channels */
> + unsigned int max_channel;
> + } audio_config;
This breaks the build. Every commit should build on its own.
audio_config is too verbose. Please just use "audio".
Please don't add the new members in this commit, just first add the
substruct and make the updates. Then add new members in a separate
commit.
BR,
Jani.
>
> /*
>* Enable dithering, used when the selected pipe bpp doesn't match the
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH v2 6/7] drm/i915: Init DDI outputs based on port_mask on skl+
On Thu, 08 Jun 2023, Ville Syrjälä wrote:
> On Fri, Jun 02, 2023 at 05:41:50PM +0300, Jani Nikula wrote:
>> This reflects current code, but apparently commit e341c618acde
>> ("drm/i915/adl_s: Initialize display for ADL-S") stopped initializing
>> DSI for ADL-S. It does support DSI.
>
> Not according to bspec. The diagram does still show the
> DSI transcoders being present but the PHY is missing.
My bad. R-b holds.
>
>>
>> Reviewed-by: Jani Nikula
>>
>>
>> > +
>> > + if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
>> > + vlv_dsi_init(dev_priv);
>> >} else if (HAS_DDI(dev_priv)) {
>> >u32 found;
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH] drm/i915/tc: Use standard ternary operator instead of GCC extension
On Thu, 08 Jun 2023, Gil Dekel wrote:
> The ternary expression:
>
> x ? : y
>
> is a GCC extension and is not a part of C/C++ standard.
>
> Use the canonical form instead to reduce dependency over GCC extension.
Thanks for the patch, but no thanks, we'll keep it as it is.
It's acceptable use of GCC extensions in kernel, it's supported by both
GCC and Clang, and there are thousands of uses of uses in kernel, and
dozens in i915 alone. I don't want to open the door for an influx of
patches changing this.
Besides, it's one of the better GCC extensions there is, avoiding the
unnecessary duplication and verbosity.
BR,
Jani.
>
> Signed-off-by: Gil Dekel
> ---
> drivers/gpu/drm/i915/display/intel_display_power_well.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 916009894d89c..39d0dbad589bf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -255,7 +255,9 @@ static void hsw_wait_for_power_well_enable(struct
> drm_i915_private *dev_priv,
> {
> const struct i915_power_well_regs *regs = power_well->desc->ops->regs;
> int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
> - int timeout = power_well->desc->enable_timeout ? : 1;
> + int timeout = power_well->desc->enable_timeout ?
> + power_well->desc->enable_timeout :
> + 1;
>
> /*
>* For some power wells we're not supposed to watch the status bit for
> --
> Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics
--
Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Get optimal audio frequency and channels
== Series Details == Series: Get optimal audio frequency and channels URL : https://patchwork.freedesktop.org/series/119121/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/as
[Intel-gfx] [PATCH 3/3] drm/i915/fbc: Moved fence related code away from intel_fbc
As a preparation for Xe move HW fence details away from intel_fbc code.
Add new functions to check support for legacy fencing and fence id and use
these in fbc code. Xe doesn't support legacy fencing.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_fbc.c | 12 ++--
drivers/gpu/drm/i915/gt/intel_gt_types.h | 2 ++
drivers/gpu/drm/i915/i915_vma.h | 5 +
3 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 53313232bec7..a9e159b22b4e 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -47,6 +47,7 @@
#include "i915_reg.h"
#include "i915_utils.h"
#include "i915_vgpu.h"
+#include "i915_vma.h"
#include "intel_cdclk.h"
#include "intel_de.h"
#include "intel_display_trace.h"
@@ -607,7 +608,7 @@ static void ivb_fbc_activate(struct intel_fbc *fbc)
else if (DISPLAY_VER(i915) == 9)
skl_fbc_program_cfb_stride(fbc);
- if (to_gt(i915)->ggtt->num_fences)
+ if (intel_gt_support_legacy_fencing(to_gt(i915)))
snb_fbc_program_fence(fbc);
intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id),
@@ -991,11 +992,10 @@ static void intel_fbc_update_state(struct
intel_atomic_state *state,
fbc_state->fence_y_offset = intel_plane_fence_y_offset(plane_state);
drm_WARN_ON(&i915->drm, plane_state->flags & PLANE_HAS_FENCE &&
- !plane_state->ggtt_vma->fence);
+ !intel_gt_support_legacy_fencing(to_gt(i915)));
- if (plane_state->flags & PLANE_HAS_FENCE &&
- plane_state->ggtt_vma->fence)
- fbc_state->fence_id = plane_state->ggtt_vma->fence->id;
+ if (plane_state->flags & PLANE_HAS_FENCE)
+ fbc_state->fence_id = i915_vma_fence_id(plane_state->ggtt_vma);
else
fbc_state->fence_id = -1;
@@ -1022,7 +1022,7 @@ static bool intel_fbc_is_fence_ok(const struct
intel_plane_state *plane_state)
*/
return DISPLAY_VER(i915) >= 9 ||
(plane_state->flags & PLANE_HAS_FENCE &&
-plane_state->ggtt_vma->fence);
+i915_vma_fence_id(plane_state->ggtt_vma) != -1);
}
static bool intel_fbc_is_cfb_ok(const struct intel_plane_state *plane_state)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index f08c2556aa25..f879dad6b913 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -306,4 +306,6 @@ enum intel_gt_scratch_field {
INTEL_GT_SCRATCH_FIELD_COHERENTL3_WA = 256,
};
+#define intel_gt_support_legacy_fencing(gt) (gt->ggtt->num_fences <= 0)
+
#endif /* __INTEL_GT_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 9a9729205d5b..6fdf6205c290 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -418,6 +418,11 @@ i915_vma_unpin_fence(struct i915_vma *vma)
__i915_vma_unpin_fence(vma);
}
+static inline int i915_vma_fence_id(const struct i915_vma *vma)
+{
+ return vma->fence ? vma->fence->id : -1;
+}
+
void i915_vma_parked(struct intel_gt *gt);
static inline bool i915_vma_is_scanout(const struct i915_vma *vma)
--
2.34.1
[Intel-gfx] [PATCH 2/3] drm/i915/fbc: Make FBC check stolen at use time
As a preparation for Xe change stolen memory initialization check to be
done in use-time instead of during initialization.
In case of xe, stolen memory is initialised much later so it can't be
checked during init. There is no specific reason to check this in init for
i915 either -> perform the check in use-time. This also gives us benefit
fbc_no_reason reporting missing initialization being reason for disabled
fbc.
Signed-off-by: Jouni Högander
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_fbc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 20b33553023d..53313232bec7 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1056,6 +1056,11 @@ static int intel_fbc_check_plane(struct
intel_atomic_state *state,
if (!fbc)
return 0;
+ if (!i915_gem_stolen_initialized(i915)) {
+ plane_state->no_fbc_reason = "stolen memory not initialised";
+ return 0;
+ }
+
if (intel_vgpu_active(i915)) {
plane_state->no_fbc_reason = "VGPU active";
return 0;
@@ -1709,9 +1714,6 @@ void intel_fbc_init(struct drm_i915_private *i915)
{
enum intel_fbc_id fbc_id;
- if (!i915_gem_stolen_initialized(i915))
- DISPLAY_RUNTIME_INFO(i915)->fbc_mask = 0;
-
if (need_fbc_vtd_wa(i915))
DISPLAY_RUNTIME_INFO(i915)->fbc_mask = 0;
--
2.34.1
[Intel-gfx] [PATCH 1/3] drm/i915: Move stolen memory handling into i915_gem_stolen
We are preparing for Xe. Xe stolen memory handling differs from i915 so we
want to move stolen memory handling details into i915_gem_stolen.
Also add a common type for fbc compressed fb and use it from fbc code
instead of underlying type directly. This way we can have common type
i915_stolen_fb for both i915 and Xe.
Signed-off-by: Jouni Högander
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_fbc.c | 46 +++---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 37 +
drivers/gpu/drm/i915/gem/i915_gem_stolen.h | 13 ++
3 files changed, 74 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 29aa029d249d..20b33553023d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -94,8 +94,7 @@ struct intel_fbc {
struct mutex lock;
unsigned int busy_bits;
- struct drm_mm_node compressed_fb;
- struct drm_mm_node compressed_llb;
+ struct i915_stolen_fb compressed_fb, compressed_llb;
enum intel_fbc_id id;
@@ -332,15 +331,16 @@ static void i8xx_fbc_program_cfb(struct intel_fbc *fbc)
{
struct drm_i915_private *i915 = fbc->i915;
- GEM_BUG_ON(range_overflows_end_t(u64, i915->dsm.stolen.start,
-fbc->compressed_fb.start, U32_MAX));
- GEM_BUG_ON(range_overflows_end_t(u64, i915->dsm.stolen.start,
-fbc->compressed_llb.start, U32_MAX));
-
+ GEM_BUG_ON(range_overflows_end_t(u64,
i915_gem_stolen_area_address(i915),
+
i915_gem_stolen_node_offset(&fbc->compressed_fb),
+U32_MAX));
+ GEM_BUG_ON(range_overflows_end_t(u64,
i915_gem_stolen_area_address(i915),
+
i915_gem_stolen_node_offset(&fbc->compressed_llb),
+U32_MAX));
intel_de_write(i915, FBC_CFB_BASE,
- i915->dsm.stolen.start + fbc->compressed_fb.start);
+ i915_gem_stolen_node_address(i915, &fbc->compressed_fb));
intel_de_write(i915, FBC_LL_BASE,
- i915->dsm.stolen.start + fbc->compressed_llb.start);
+ i915_gem_stolen_node_address(i915,
&fbc->compressed_llb));
}
static const struct intel_fbc_funcs i8xx_fbc_funcs = {
@@ -447,7 +447,8 @@ static void g4x_fbc_program_cfb(struct intel_fbc *fbc)
{
struct drm_i915_private *i915 = fbc->i915;
- intel_de_write(i915, DPFC_CB_BASE, fbc->compressed_fb.start);
+ intel_de_write(i915, DPFC_CB_BASE,
+ i915_gem_stolen_node_offset(&fbc->compressed_fb));
}
static const struct intel_fbc_funcs g4x_fbc_funcs = {
@@ -498,7 +499,8 @@ static void ilk_fbc_program_cfb(struct intel_fbc *fbc)
{
struct drm_i915_private *i915 = fbc->i915;
- intel_de_write(i915, ILK_DPFC_CB_BASE(fbc->id),
fbc->compressed_fb.start);
+ intel_de_write(i915, ILK_DPFC_CB_BASE(fbc->id),
+ i915_gem_stolen_node_offset(&fbc->compressed_fb));
}
static const struct intel_fbc_funcs ilk_fbc_funcs = {
@@ -713,7 +715,7 @@ static u64 intel_fbc_stolen_end(struct drm_i915_private
*i915)
* underruns, even if that range is not reserved by the BIOS. */
if (IS_BROADWELL(i915) ||
(DISPLAY_VER(i915) == 9 && !IS_BROXTON(i915)))
- end = resource_size(&i915->dsm.stolen) - 8 * 1024 * 1024;
+ end = i915_gem_stolen_area_size(i915) - 8 * 1024 * 1024;
else
end = U64_MAX;
@@ -770,9 +772,9 @@ static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
int ret;
drm_WARN_ON(&i915->drm,
- drm_mm_node_allocated(&fbc->compressed_fb));
+ i915_gem_stolen_node_allocated(&fbc->compressed_fb));
drm_WARN_ON(&i915->drm,
- drm_mm_node_allocated(&fbc->compressed_llb));
+ i915_gem_stolen_node_allocated(&fbc->compressed_llb));
if (DISPLAY_VER(i915) < 5 && !IS_G4X(i915)) {
ret = i915_gem_stolen_insert_node(i915, &fbc->compressed_llb,
@@ -792,15 +794,14 @@ static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
drm_dbg_kms(&i915->drm,
"reserved %llu bytes of contiguous stolen space for FBC,
limit: %d\n",
- fbc->compressed_fb.size, fbc->limit);
-
+ i915_gem_stolen_node_size(&fbc->compressed_fb), fbc->limit);
return 0;
err_llb:
- if (drm_mm_node_allocated(&fbc->compressed_llb))
+ if (i915_gem_stolen_node_allocated(&fbc->compressed_llb))
i915_gem_stolen_remove_node(i915, &fbc->compressed_llb);
err:
- if (drm_mm_initialized(&i915->mm.stolen))
+ if (i915_gem_stolen_initialized(i915))
drm_info_once(&i91
[Intel-gfx] [PATCH 0/3] Move stolen memory handling details into i915_gem_stolen
We are preparing for Xe driver. Stolen memory handling will be different in Xe driver. Due to this we want to remove all stolen memory handling details away from FBC code. Cc: Jani Nikula Cc: Rodrigo Vivi Cc: Ville Syrjälä Cc: Maarten Lankhorst Jouni Högander (3): drm/i915: Move stolen memory handling into i915_gem_stolen drm/i915/fbc: Make FBC check stolen at use time drm/i915/fbc: Moved fence related code away from intel_fbc drivers/gpu/drm/i915/display/intel_fbc.c | 64 -- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 37 + drivers/gpu/drm/i915/gem/i915_gem_stolen.h | 13 + drivers/gpu/drm/i915/gt/intel_gt_types.h | 2 + drivers/gpu/drm/i915/i915_vma.h| 5 ++ 5 files changed, 91 insertions(+), 30 deletions(-) -- 2.34.1
[Intel-gfx] [RFC 4/4] drm/i915/display: Initialize and compute HDMI Audio source cap
Initialize the audio capabilities for HDMI by setting them to their
maximum supported values and then call a function to compute these
capabilities into SADs. The audio capabilities for HDMI include
parameters such as supported frequency and channel configurations.
By computing these capabilities into SADs, we can determine which
audio formats are supported.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 37 +++
drivers/gpu/drm/i915/display/intel_hdmi.h | 1 +
2 files changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index aa822ee5fbda..c71110a1a44a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2277,6 +2277,40 @@ bool intel_hdmi_compute_has_hdmi_sink(struct
intel_encoder *encoder,
!intel_hdmi_is_cloned(crtc_state);
}
+static unsigned int calc_audio_bw(int channel, int frequency)
+{
+ int bits_per_sample = 32;
+ unsigned int bandwidth = channel * frequency * bits_per_sample;
+ return bandwidth;
+}
+
+void
+intel_hdmi_audio_compute_config(struct intel_crtc_state *pipe_config)
+{
+ struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+ int num_of_channel, aud_rates[7] = {192000, 176000, 96000, 88000,
48000, 44100, 32000};
+ unsigned int audio_req_bandwidth, available_blank_bandwidth, vblank,
hblank;
+
+ hblank = adjusted_mode->htotal - adjusted_mode->hdisplay;
+ vblank = adjusted_mode->vtotal - adjusted_mode->vdisplay;
+ available_blank_bandwidth = hblank * vblank *
+ drm_mode_vrefresh(adjusted_mode) *
pipe_config->pipe_bpp;
+ for (num_of_channel = 8; num_of_channel > 0; num_of_channel--) {
+ for (int index = 0; index < 7; index++) {
+ audio_req_bandwidth = calc_audio_bw(num_of_channel,
+ aud_rates[index]);
+ if (audio_req_bandwidth < available_blank_bandwidth) {
+ pipe_config->audio_config.max_frequency =
aud_rates[index];
+ pipe_config->audio_config.max_channel =
num_of_channel;
+ return;
+ }
+ }
+ }
+
+ pipe_config->audio_config.max_frequency = 0;
+ pipe_config->audio_config.max_channel = 0;
+}
+
int intel_hdmi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
@@ -2344,6 +2378,7 @@ int intel_hdmi_compute_config(struct intel_encoder
*encoder,
pipe_config->hdmi_high_tmds_clock_ratio = true;
}
}
+ intel_hdmi_audio_compute_config(pipe_config);
intel_hdmi_compute_gcp_infoframe(encoder, pipe_config,
conn_state);
@@ -2368,6 +2403,8 @@ int intel_hdmi_compute_config(struct intel_encoder
*encoder,
return -EINVAL;
}
+ intel_audio_compute_eld(pipe_config);
+
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h
b/drivers/gpu/drm/i915/display/intel_hdmi.h
index 6b39df38d57a..6df303daf348 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -27,6 +27,7 @@ void intel_hdmi_init_connector(struct intel_digital_port
*dig_port,
bool intel_hdmi_compute_has_hdmi_sink(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state
*conn_state);
+void intel_hdmi_audio_compute_config(struct intel_crtc_state *pipe_config);
int intel_hdmi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state);
--
2.25.1
[Intel-gfx] [RFC 2/4] drm/i915/display: Update access of has_audio param
Update access of has_audio param from crtc_state pointer
as it is wrapped under audio_config.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/g4x_dp.c| 4 ++--
drivers/gpu/drm/i915/display/g4x_hdmi.c | 16
drivers/gpu/drm/i915/display/intel_audio.c | 6 +++---
drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +++---
.../gpu/drm/i915/display/intel_crtc_state_dump.c | 4 ++--
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c| 2 +-
drivers/gpu/drm/i915/display/intel_sdvo.c| 10 +-
11 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
b/drivers/gpu/drm/i915/display/g4x_dp.c
index 112d91d81fdc..741896db0b38 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -345,7 +345,7 @@ static void intel_dp_get_config(struct intel_encoder
*encoder,
tmp = intel_de_read(dev_priv, intel_dp->output_reg);
- pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A;
+ pipe_config->audio_config.has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE &&
port != PORT_A;
if (HAS_PCH_CPT(dev_priv) && port != PORT_A) {
u32 trans_dp = intel_de_read(dev_priv,
@@ -625,7 +625,7 @@ static void intel_dp_enable_port(struct intel_dp *intel_dp,
* fail when the power sequencer is freshly used for this port.
*/
intel_dp->DP |= DP_PORT_EN;
- if (crtc_state->has_audio)
+ if (crtc_state->audio_config.has_audio)
intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 5c187e6e0472..5607e750f576 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -178,7 +178,7 @@ static void intel_hdmi_get_config(struct intel_encoder
*encoder,
pipe_config->has_infoframe = true;
if (tmp & HDMI_AUDIO_ENABLE)
- pipe_config->has_audio = true;
+ pipe_config->audio_config.has_audio = true;
if (!HAS_PCH_SPLIT(dev_priv) &&
tmp & HDMI_COLOR_RANGE_16_235)
@@ -224,7 +224,7 @@ static void g4x_hdmi_enable_port(struct intel_encoder
*encoder,
temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
- if (pipe_config->has_audio)
+ if (pipe_config->audio_config.has_audio)
temp |= HDMI_AUDIO_ENABLE;
intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
@@ -240,7 +240,7 @@ static void g4x_enable_hdmi(struct intel_atomic_state
*state,
g4x_hdmi_enable_port(encoder, pipe_config);
- drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
+ drm_WARN_ON(&dev_priv->drm, pipe_config->audio_config.has_audio &&
!pipe_config->has_hdmi_sink);
intel_audio_codec_enable(encoder, pipe_config, conn_state);
}
@@ -258,7 +258,7 @@ static void ibx_enable_hdmi(struct intel_atomic_state
*state,
temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
- if (pipe_config->has_audio)
+ if (pipe_config->audio_config.has_audio)
temp |= HDMI_AUDIO_ENABLE;
/*
@@ -293,7 +293,7 @@ static void ibx_enable_hdmi(struct intel_atomic_state
*state,
intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
}
- drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
+ drm_WARN_ON(&dev_priv->drm, pipe_config->audio_config.has_audio &&
!pipe_config->has_hdmi_sink);
intel_audio_codec_enable(encoder, pipe_config, conn_state);
}
@@ -313,7 +313,7 @@ static void cpt_enable_hdmi(struct intel_atomic_state
*state,
temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
- if (pipe_config->has_audio)
+ if (pipe_config->audio_config.has_audio)
temp |= HDMI_AUDIO_ENABLE;
/*
@@ -348,7 +348,7 @@ static void cpt_enable_hdmi(struct intel_atomic_state
*state,
TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE, 0);
}
- drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
+ drm_WARN_ON(&dev_priv->drm, pipe_config->audio_config.has_audio &&
!pipe_config->has_hdmi_sink);
intel_audio_codec_enable(encoder, pipe_config, conn_state);
}
@@ -360,7 +360,7 @@ static void vlv_enable_hdmi(struct intel_atomic_state
*state,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- drm_WARN_ON(&dev_priv->drm, pipe_config->has_audio &&
+ dr
[Intel-gfx] [RFC 3/4] drm/i915/display: Add wrapper to Compute SAD
Compute SADs that takes into account the supported rate and channel
based on the capabilities of the audio source. This wrapper function
should encapsulate the logic for determining the supported rate and
channel and should return a set of SADs that are compatible with the
source.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_audio.c | 66 ++
drivers/gpu/drm/i915/display/intel_audio.h | 1 +
2 files changed, 67 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
b/drivers/gpu/drm/i915/display/intel_audio.c
index b4a0dae65cbf..e612aad9a053 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -794,6 +794,72 @@ bool intel_audio_compute_config(struct intel_encoder
*encoder,
return true;
}
+static unsigned int drm_sad_to_channels(const u8 *sad)
+{
+ return 1 + (sad[0] & 0x7);
+}
+
+static inline u8 *parse_sad(u8 *eld)
+{
+ unsigned int ver, mnl;
+
+ ver = (eld[DRM_ELD_VER] & DRM_ELD_VER_MASK) >> DRM_ELD_VER_SHIFT;
+ if (ver != 2 && ver != 31)
+ return NULL;
+
+ mnl = drm_eld_mnl(eld);
+ if (mnl > 16)
+ return NULL;
+
+ return eld + DRM_ELD_CEA_SAD(mnl, 0);
+}
+
+static u8 get_supported_freq_mask(struct intel_crtc_state *crtc_state)
+{
+ int audio_freq_hz[] = {32000, 44100, 48000, 88000, 96000, 176000,
192000, 0};
+ u8 mask = 0;
+
+ for (u8 index = 0; index < ARRAY_SIZE(audio_freq_hz); index++) {
+ mask |= 1 << index;
+ if (crtc_state->audio_config.max_frequency !=
audio_freq_hz[index])
+ continue;
+ else
+ break;
+ }
+
+ return mask;
+}
+
+void intel_audio_compute_eld(struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ u8 *eld, *sad, index, mask = 0;
+
+ eld = crtc_state->eld;
+ if (!eld) {
+ drm_err(&i915->drm, "failed to locate eld\n");
+ return;
+ }
+
+ sad = (u8 *)parse_sad(eld);
+ if (sad) {
+ mask = get_supported_freq_mask(crtc_state);
+
+ for (index = 0; index < drm_eld_sad_count(eld); index++, sad +=
3) {
+ /*
+* Respect to source restrictions. If source limit is
greater than sink
+* capabilities then follow to sink's highest
supported rate.
+*/
+ if (drm_sad_to_channels(sad) >=
crtc_state->audio_config.max_channel) {
+ sad[0] &= ~0x7;
+ sad[0] |= crtc_state->audio_config.max_channel
- 1;
+ }
+
+ sad[1] &= mask;
+ }
+ }
+}
+
/**
* intel_audio_codec_enable - Enable the audio codec for HD audio
* @encoder: encoder on which to enable audio
diff --git a/drivers/gpu/drm/i915/display/intel_audio.h
b/drivers/gpu/drm/i915/display/intel_audio.h
index 07d034a981e9..2ec7fafd9711 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.h
+++ b/drivers/gpu/drm/i915/display/intel_audio.h
@@ -14,6 +14,7 @@ struct intel_crtc_state;
struct intel_encoder;
void intel_audio_hooks_init(struct drm_i915_private *dev_priv);
+void intel_audio_compute_eld(struct intel_crtc_state *crtc_state);
bool intel_audio_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
--
2.25.1
[Intel-gfx] [RFC 1/4] drm/i915/hdmi: Add audio config related params in crtc_state
Add source audio-related config params in crtc_state.
These params can be supported frequency, supported channel,
and audio support, which can be further computed based on
source capabilities.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display_types.h | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 731f2ec04d5c..873a60f3f870 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1129,9 +1129,15 @@ struct intel_crtc_state {
/* Whether we should send NULL infoframes. Required for audio. */
bool has_hdmi_sink;
- /* Audio enabled on this pipe. Only valid if either has_hdmi_sink or
-* has_dp_encoder is set. */
- bool has_audio;
+ struct {
+ bool has_audio;
+
+ /* Audio rate in Hz */
+ unsigned int max_frequency;
+
+ /* Number of audio channels */
+ unsigned int max_channel;
+ } audio_config;
/*
* Enable dithering, used when the selected pipe bpp doesn't match the
--
2.25.1
[Intel-gfx] [RFC 0/4] Get optimal audio frequency and channels
Currently we do not check if there is enough bandwidth for audio, and what channels and freq it can really support. Also sometimes there can be HW constraints e.g. GLK where audio channels supported are only 2. https://patchwork.freedesktop.org/series/107647/ Obtain the optimal audio rate and channel based on available display timing constraints. This can be achieved by: - Retrieve the supported channel and rate information from SADs - Adding audio-related config parameters in the CRTC state, such as audio support, rate, and channel. - Initializing the audio config parameters with the maximum supported rate and channel by the audio source. - Computing the SADs based on the audio source's capabilities. Mitul Golani (4): drm/i915/hdmi: Add audio config related params in crtc_state drm/i915/display: Update access of has_audio param drm/i915/display: Add wrapper to Compute SAD drm/i915/display: Initialize and compute HDMI Audio source cap drivers/gpu/drm/i915/display/g4x_dp.c | 4 +- drivers/gpu/drm/i915/display/g4x_hdmi.c | 16 ++--- drivers/gpu/drm/i915/display/intel_audio.c| 72 ++- drivers/gpu/drm/i915/display/intel_audio.h| 1 + drivers/gpu/drm/i915/display/intel_cdclk.c| 6 +- .../drm/i915/display/intel_crtc_state_dump.c | 4 +- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 4 +- .../drm/i915/display/intel_display_types.h| 12 +++- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 39 +- drivers/gpu/drm/i915/display/intel_hdmi.h | 1 + drivers/gpu/drm/i915/display/intel_sdvo.c | 10 +-- 14 files changed, 143 insertions(+), 32 deletions(-) -- 2.25.1
Re: [Intel-gfx] [PATCH] drm/i915/dp: Cable type identification for DP2.1
On Fri, 09 Jun 2023, Animesh Manna wrote:
> For DP alt mode display driver get the information
> about cable speed and cable type through TCSS_DDI_STATUS
> register which will be updated by type-c platform driver.
> Accodingly Update dpcd 0x110 with cable information before
> link training start. This change came part of DP2.1 SCR.
No need to refer to the SCR anymore, as DP 2.1 is out.
There are a bunch of detailed comments inline.
High level, this should probably be done much earlier. See Table 5-21 in
DP 2.1. We need to read DPCD 0x2217 before writing 0x110. The DPRX
updates 0x2217 before asserting hotplug, so we should probably read it
at detect where we read all other DPCD too.
How early is TCSS_DDI_STATUS available, should we read that at hotplug
too? For USB-C we should write to DPCD 0x110 the least common
denominator between DPCD 0x2217 and 0x110.
Another question which I didn't find an answer to yet, does writing
0x110 impact what the RPRX reports for capabilities i.e. can we proceed
with link training normally from there, *or* should we limit the
sink_rates/common_rates based on TCSS_DDI_STATUS and DPCD 0x2217
i.e. filter out UHBR as needed.
Please read bspec and DP 2.1 further to find answers.
>
> Note: This patch is not tested due to unavailability of
> cable. Sending as RFC for design review.
>
> Signed-off-by: Animesh Manna
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 57
> drivers/gpu/drm/i915/display/intel_tc.c | 10 +
> drivers/gpu/drm/i915/display/intel_tc.h | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 5 +++
> include/drm/display/drm_dp.h | 9
> 5 files changed, 82 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 70d44edd8c6e..3a0f6a3c9f98 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2208,6 +2208,55 @@ static void
> intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel
> str_enable_disable(enable));
> }
>
> +#define CABLE_SPEED_SHIFT 4
> +
> +enum dp_cable_speed {
> + DP_CABLE_HBR3 = 1,
> + DP_CABLE_UHBR10,
> + DP_CABLE_GEN3_UHBR20,
> + DP_CABLE_GEN4_UHBR20
> +};
> +
> +static void intel_dp_set_cable_attributes(struct intel_dp *intel_dp,
> + u8 cable_attributes)
There are two "domains" for the cable information, the hardware register
and the DPCD register. However, cable_attributes is neither, but also
not helpful, which makes this function cumbersome.
Usually in cases like this, you'd pick one or the other, *or* if you
want to have a generic middle ground, you'd make it helpful and easy to
use and understand (e.g. a struct).
In this case, I'd just pick the DPCD as the format, because it's
platform independent and the whole thing is simple enough.
So this function would really reduce down to a single DPCD write.
> +{
> + u8 cable_speed;
> + bool active_cable, retimer;
> + u8 cable_attr_dpcd;
> +
> + cable_speed = cable_attributes >> CABLE_SPEED_SHIFT;
> +
> + switch (cable_speed) {
> + case DP_CABLE_HBR3:
> + cable_attr_dpcd = 0;
> + break;
> + case DP_CABLE_UHBR10:
> + cable_attr_dpcd = 1;
> + break;
> + case DP_CABLE_GEN3_UHBR20:
> + case DP_CABLE_GEN4_UHBR20:
> + cable_attr_dpcd = 2;
> + break;
> + default:
> + cable_attr_dpcd = 0;
> + break;
> + }
> +
> + active_cable = (cable_attributes << TCSS_DDI_STATUS_CABLE_ATTR_SHIFT) &
> +TCSS_DDI_STATUS_ACTIVE_CABLE;
> + retimer = (cable_attributes << TCSS_DDI_STATUS_CABLE_ATTR_SHIFT) &
> + TCSS_DDI_STATUS_RETIMER_REDRIVER;
> + if (retimer && active_cable)
> + cable_attr_dpcd |= DP_CABLE_TYPE_RETIMER_ACTIVE;
> + else if (active_cable)
> + cable_attr_dpcd |= DP_CABLE_TYPE_LRD_ACTIVE;
> + else
> + cable_attr_dpcd |= DP_CABLE_TYPE_PASSIVE;
> +
> + drm_dp_dpcd_writeb(&intel_dp->aux, DP_CABLE_ATTRIBUTES_UPDATED_BY_TX,
> +cable_attr_dpcd);
> +}
> +
> static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
> const struct intel_crtc_state
> *crtc_state)
> {
> @@ -2414,6 +2463,7 @@ static void mtl_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
> {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
> + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>
> intel_dp_set_link_params(intel_dp,
>crtc_state->port_clock,
> @@ -2480,6 +2530,13 @@ static void mtl_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
> intel_dp_check_frl_training(intel_dp);
> intel_dp_pcon_dsc_con
