Re: [Intel-gfx] [PATCH 1/5] drm/i915/dsc: Add PPS enum

[Kandpal, Suraj]

> On Mon, 10 Jul 2023, Jani Nikula  wrote:
> > On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
> >> Add PPS enum so that we can later on use it to distinguish which PPS
> >> is being read or written onto.
> >
> > The patch adding the enum alone isn't useful, should be squashed with
> > something that uses it.
> 
> Also, maybe you could just use an int?
> 

I see will drop this patch and use int instead

Regards,
Suraj Kandpal
> >
> > BR,
> > Jani.
> >
> >>
> >> Signed-off-by: Suraj Kandpal 
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_vdsc.c | 17 +
> >>  1 file changed, 17 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> >> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> >> index bd9116d2cd76..1a8272324c36 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> >> @@ -19,6 +19,23 @@
> >>  #include "intel_vdsc.h"
> >>  #include "intel_vdsc_regs.h"
> >>
> >> +enum intel_dsc_pps {
> >> +  PPS_0 = 0,
> >> +  PPS_1,
> >> +  PPS_2,
> >> +  PPS_3,
> >> +  PPS_4,
> >> +  PPS_5,
> >> +  PPS_6,
> >> +  PPS_7,
> >> +  PPS_8,
> >> +  PPS_9,
> >> +  PPS_10,
> >> +  PPS_16,
> >> +  PPS_17,
> >> +  PPS_18,
> >> +};
> >> +
> >>  bool intel_dsc_source_support(const struct intel_crtc_state
> >> *crtc_state)  {
> >>const struct intel_crtc *crtc =
> >> to_intel_crtc(crtc_state->uapi.crtc);
> 
> --
> Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 10/19] drm/i915/dsb: Add support for non-posted DSB registers writes

[Manna, Animesh]

> -Original Message-
> From: Intel-gfx  On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 10/19] drm/i915/dsb: Add support for non-
> posted DSB registers writes
> 
> From: Ville Syrjälä 
> 
> Writing specific transcoder registers (and as it turns out, the legacy LUT as
> well) via DSB needs a magic sequence to emit non-posted register writes.
> Add a helper for this.
> 
> Signed-off-by: Ville Syrjälä 

Tried to check in bspec where non-posted write for DSB is required and its 
advantage but could not locate. Not sure if it is captured in bspec. Would it 
be possible to add some reference in commit description.

Regards,
Animesh

> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 20 
> drivers/gpu/drm/i915/display/intel_dsb.h |  3 +++
>  2 files changed, 23 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 6be353fdc7fc..73d609507f24 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -261,6 +261,26 @@ void intel_dsb_noop(struct intel_dsb *dsb, int
> count)
>  DSB_OPCODE_NOOP << DSB_OPCODE_SHIFT);  }
> 
> +void intel_dsb_nonpost_start(struct intel_dsb *dsb) {
> + struct intel_crtc *crtc = dsb->crtc;
> + enum pipe pipe = crtc->pipe;
> +
> + intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),
> +DSB_NON_POSTED, DSB_NON_POSTED);
> + intel_dsb_noop(dsb, 4);
> +}
> +
> +void intel_dsb_nonpost_end(struct intel_dsb *dsb) {
> + struct intel_crtc *crtc = dsb->crtc;
> + enum pipe pipe = crtc->pipe;
> +
> + intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),
> +DSB_NON_POSTED, 0);
> + intel_dsb_noop(dsb, 4);
> +}
> +
>  static void intel_dsb_align_tail(struct intel_dsb *dsb)  {
>   u32 aligned_tail, tail;
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h
> b/drivers/gpu/drm/i915/display/intel_dsb.h
> index 983b0d58ad44..54e9e1dc31ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.h
> @@ -22,6 +22,9 @@ void intel_dsb_reg_write(struct intel_dsb *dsb,  void
> intel_dsb_reg_write_masked(struct intel_dsb *dsb,
>   i915_reg_t reg, u32 mask, u32 val);  void
> intel_dsb_noop(struct intel_dsb *dsb, int count);
> +void intel_dsb_nonpost_start(struct intel_dsb *dsb); void
> +intel_dsb_nonpost_end(struct intel_dsb *dsb);
> +
>  void intel_dsb_commit(struct intel_dsb *dsb,
> bool wait_for_vblank);
>  void intel_dsb_wait(struct intel_dsb *dsb);
> --
> 2.39.3

[Intel-gfx] ✓ Fi.CI.IGT: success for Enhance vfio PCI hot reset for vfio cdev device (rev9)

[Patchwork]

== Series Details ==

Series: Enhance vfio PCI hot reset for vfio cdev device (rev9)
URL   : https://patchwork.freedesktop.org/series/116991/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13366_full -> Patchwork_116991v9_full


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_116991v9_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_116991v9_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_116991v9_full:

### IGT changes ###

 Warnings 

  * igt@gem_pxp@verify-pxp-stale-buf-execution:
- shard-snb:  [SKIP][1] ([fdo#109271]) -> [ABORT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-snb1/igt@gem_...@verify-pxp-stale-buf-execution.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-snb7/igt@gem_...@verify-pxp-stale-buf-execution.html

  
Known issues


  Here are the changes found in Patchwork_116991v9_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@device_reset@unbind-cold-reset-rebind:
- shard-dg2:  NOTRUN -> [SKIP][3] ([i915#7701])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-dg2-11/igt@device_re...@unbind-cold-reset-rebind.html

  * igt@drm_fdinfo@busy-check-all@vecs1:
- shard-dg2:  NOTRUN -> [SKIP][4] ([i915#8414]) +9 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-dg2-11/igt@drm_fdinfo@busy-check-...@vecs1.html

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl:  [PASS][5] -> [FAIL][6] ([i915#7742])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html

  * igt@gem_busy@semaphore:
- shard-dg2:  NOTRUN -> [SKIP][7] ([i915#3936])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-dg2-11/igt@gem_b...@semaphore.html

  * igt@gem_ctx_sseu@mmap-args:
- shard-dg2:  NOTRUN -> [SKIP][8] ([i915#280])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-dg2-11/igt@gem_ctx_s...@mmap-args.html

  * igt@gem_eio@in-flight-contexts-immediate:
- shard-mtlp: [PASS][9] -> [ABORT][10] ([i915#8503])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-mtlp-3/igt@gem_...@in-flight-contexts-immediate.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-mtlp-2/igt@gem_...@in-flight-contexts-immediate.html

  * igt@gem_eio@kms:
- shard-dg2:  [PASS][11] -> [INCOMPLETE][12] ([i915#7892])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-dg2-5/igt@gem_...@kms.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-dg2-5/igt@gem_...@kms.html

  * igt@gem_exec_balancer@hang:
- shard-mtlp: [PASS][13] -> [ABORT][14] ([i915#8104])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-mtlp-6/igt@gem_exec_balan...@hang.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-mtlp-6/igt@gem_exec_balan...@hang.html

  * igt@gem_exec_fair@basic-deadline:
- shard-rkl:  [PASS][15] -> [FAIL][16] ([i915#2846])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-rkl-1/igt@gem_exec_f...@basic-deadline.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-rkl-2/igt@gem_exec_f...@basic-deadline.html
- shard-glk:  [PASS][17] -> [FAIL][18] ([i915#2846])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-glk3/igt@gem_exec_f...@basic-deadline.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-glk7/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-none@bcs0:
- shard-rkl:  [PASS][19] -> [FAIL][20] ([i915#2842]) +1 similar 
issue
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-rkl-4/igt@gem_exec_fair@basic-n...@bcs0.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-rkl-4/igt@gem_exec_fair@basic-n...@bcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk:  [PASS][21] -> [FAIL][22] ([i915#2842])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-glk7/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/shard-glk

Re: [Intel-gfx] [PATCH 5/5] drm/i915/display: Compare the readout dsc pps params

[Kandpal, Suraj]

> On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
> > With the dsc config being readout and filled in crtc_state add macros
> > and use them to compare current and previous PPS param in DSC.
> >
> > Signed-off-by: Suraj Kandpal 
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 55
> > 
> >  1 file changed, 55 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index eed01957bdb9..5c1596d7cd92 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -5007,6 +5007,8 @@ intel_pipe_config_compare(const struct
> > intel_crtc_state *current_config,  {
> > struct drm_i915_private *dev_priv = to_i915(current_config-
> >uapi.crtc->dev);
> > struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> > +   const struct drm_dsc_config *dsc_current_config = ¤t_config-
> >dsc.config;
> > +   const struct drm_dsc_config *dsc_pipe_config =
> > +&pipe_config->dsc.config;
> > bool ret = true;
> > bool fixup_inherited = fastset &&
> > current_config->inherited && !pipe_config->inherited; @@ -
> 5202,6
> > +5204,26 @@ intel_pipe_config_compare(const struct intel_crtc_state
> > *current_config,  #define PIPE_CONF_QUIRK(quirk) \
> > ((current_config->quirks | pipe_config->quirks) & (quirk))
> >
> > +#define PIPE_DSC_CONF_CHECK_I(name) do { \
> > +   if (dsc_current_config->name != dsc_pipe_config->name) { \
> > +   pipe_config_mismatch(fastset, crtc, __stringify(name), \
> > +"(expected %i, found %i)", \
> > +dsc_current_config->name, \
> > +dsc_pipe_config->name); \
> > +   ret = false; \
> > +   } \
> > +} while (0)
> > +
> > +#define PIPE_DSC_CONF_CHECK_BOOL(name) do { \
> > +   if (dsc_current_config->name != dsc_pipe_config->name) { \
> > +   pipe_config_mismatch(fastset, crtc,  __stringify(name), \
> > +"(expected %s, found %s)", \
> > +str_yes_no(dsc_current_config->name), \
> > +str_yes_no(dsc_pipe_config->name)); \
> > +   ret = false; \
> > +   } \
> > +} while (0)
> > +
> > PIPE_CONF_CHECK_I(hw.enable);
> > PIPE_CONF_CHECK_I(hw.active);
> >
> > @@ -5378,6 +5400,39 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> > PIPE_CONF_CHECK_I(master_transcoder);
> > PIPE_CONF_CHECK_X(bigjoiner_pipes);
> >
> > +   PIPE_DSC_CONF_CHECK_BOOL(block_pred_enable);
> 
> You should be able to pass the dsc substruct as name, no need to define
> dupe macros for DSC. See e.g. PIPE_CONF_CHECK_I(hw.enable); above in
> the patch context above.
> 
Hi 
 
Thanks for the review will get this fixed in the next revision.

> > +   PIPE_DSC_CONF_CHECK_BOOL(convert_rgb);
> > +   PIPE_DSC_CONF_CHECK_BOOL(simple_422);
> > +   PIPE_DSC_CONF_CHECK_BOOL(native_422);
> > +   PIPE_DSC_CONF_CHECK_BOOL(native_420);
> > +   PIPE_DSC_CONF_CHECK_BOOL(vbr_enable);
> > +   PIPE_DSC_CONF_CHECK_I(line_buf_depth);
> > +   PIPE_DSC_CONF_CHECK_I(bits_per_component);
> > +   PIPE_DSC_CONF_CHECK_I(pic_width);
> > +   PIPE_DSC_CONF_CHECK_I(pic_height);
> > +   PIPE_DSC_CONF_CHECK_I(slice_width);
> > +   PIPE_DSC_CONF_CHECK_I(slice_height);
> > +   PIPE_DSC_CONF_CHECK_I(initial_dec_delay);
> > +   PIPE_DSC_CONF_CHECK_I(initial_xmit_delay);
> > +   PIPE_DSC_CONF_CHECK_I(scale_decrement_interval);
> > +   PIPE_DSC_CONF_CHECK_I(scale_increment_interval);
> > +   PIPE_DSC_CONF_CHECK_I(initial_scale_value);
> > +   PIPE_DSC_CONF_CHECK_I(first_line_bpg_offset);
> > +   PIPE_DSC_CONF_CHECK_I(flatness_min_qp);
> > +   PIPE_DSC_CONF_CHECK_I(flatness_max_qp);
> > +   PIPE_DSC_CONF_CHECK_I(slice_bpg_offset);
> > +   PIPE_DSC_CONF_CHECK_I(nfl_bpg_offset);
> > +   PIPE_DSC_CONF_CHECK_I(initial_offset);
> > +   PIPE_DSC_CONF_CHECK_I(final_offset);
> > +   PIPE_DSC_CONF_CHECK_I(rc_model_size);
> > +   PIPE_DSC_CONF_CHECK_I(rc_quant_incr_limit0);
> > +   PIPE_DSC_CONF_CHECK_I(rc_quant_incr_limit1);
> > +   PIPE_DSC_CONF_CHECK_I(slice_chunk_size);
> > +   if (DISPLAY_VER(dev_priv) >= 14) {
> > +   PIPE_DSC_CONF_CHECK_I(second_line_bpg_offset);
> > +   PIPE_DSC_CONF_CHECK_I(nsl_bpg_offset);
> > +   }
> 
> I'd prefer it if we didn't have version checks here. Just check the values
> anyway, it should be zeros in both hw and sw states for display < 14, and if 
> it's
> not, the state checker caught a bug.
> 

Oh got it will remove the version check from here.

Regards,
Suraj Kandpal
> 
> > +
> > PIPE_CONF_CHECK_I(dsc.compression_enable);
> > PIPE_CONF_CHECK_I(dsc.dsc_split);
> > PIPE_CONF_CHECK_I(dsc.compressed_bpp);
> 
> --
> Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 07/19] drm/i915/dsb: Don't use indexed writes when byte enables are not all set

[Manna, Animesh]

> -Original Message-
> From: Intel-gfx  On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 07/19] drm/i915/dsb: Don't use indexed writes
> when byte enables are not all set
> 
> From: Ville Syrjälä 
> 
> The indexed write instruction doesn't support byte-enables, so if the non-
> indexed write used those we must not convert it to an indexed write.
> 
> Signed-off-by: Ville Syrjälä 

LGTM.
Reviewed-by: Animesh Manna 

> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 12 +---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index a20ae5313d23..22c716ee75e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -149,7 +149,7 @@ static bool intel_dsb_prev_ins_is_write(struct
> intel_dsb *dsb,
>   if (dsb->free_pos == 0)
>   return false;
> 
> - prev_opcode = buf[dsb->ins_start_offset + 1] >>
> DSB_OPCODE_SHIFT;
> + prev_opcode = buf[dsb->ins_start_offset + 1] &
> ~DSB_REG_VALUE_MASK;
>   prev_reg = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK;
> 
>   return prev_opcode == opcode && prev_reg ==
> i915_mmio_reg_offset(reg); @@ -157,12 +157,18 @@ static bool
> intel_dsb_prev_ins_is_write(struct intel_dsb *dsb,
> 
>  static bool intel_dsb_prev_ins_is_mmio_write(struct intel_dsb *dsb,
> i915_reg_t reg)  {
> - return intel_dsb_prev_ins_is_write(dsb,
> DSB_OPCODE_MMIO_WRITE, reg);
> + /* only full byte-enables can be converted to indexed writes */
> + return intel_dsb_prev_ins_is_write(dsb,
> +DSB_OPCODE_MMIO_WRITE <<
> DSB_OPCODE_SHIFT |
> +DSB_BYTE_EN <<
> DSB_BYTE_EN_SHIFT,
> +reg);
>  }
> 
>  static bool intel_dsb_prev_ins_is_indexed_write(struct intel_dsb *dsb,
> i915_reg_t reg)  {
> - return intel_dsb_prev_ins_is_write(dsb,
> DSB_OPCODE_INDEXED_WRITE, reg);
> + return intel_dsb_prev_ins_is_write(dsb,
> +DSB_OPCODE_INDEXED_WRITE <<
> DSB_OPCODE_SHIFT,
> +reg);
>  }
> 
>  /**
> --
> 2.39.3

Re: [Intel-gfx] [PATCH v2 03/19] drm/i915/dsb: Dump the DSB command buffer when DSB fails

[Manna, Animesh]

> -Original Message-
> From: Intel-gfx  On Behalf Of Ville
> Syrjala
> Sent: Wednesday, June 7, 2023 12:45 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 03/19] drm/i915/dsb: Dump the DSB command
> buffer when DSB fails
> 
> From: Ville Syrjälä 
> 
> Dump the full DSB command buffers and head/tail pointers if the the DSB
> hasn't completed its job in time.
> 
> Signed-off-by: Ville Syrjälä 

LGTM.
Reviewed-by: Animesh Manna 

> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 33 +---
>  1 file changed, 30 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 97e593d9f100..42911abcd3ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -93,6 +93,22 @@ static bool assert_dsb_has_room(struct intel_dsb
> *dsb)
>crtc->base.base.id, crtc->base.name, dsb->id);  }
> 
> +static void intel_dsb_dump(struct intel_dsb *dsb) {
> + struct intel_crtc *crtc = dsb->crtc;
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> + const u32 *buf = dsb->cmd_buf;
> + int i;
> +
> + drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] DSB %d commands {\n",
> + crtc->base.base.id, crtc->base.name, dsb->id);
> + for (i = 0; i < ALIGN(dsb->free_pos, 64 / 4); i += 4)
> + drm_dbg_kms(&i915->drm,
> + " 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
> + i * 4, buf[i], buf[i+1], buf[i+2], buf[i+3]);
> + drm_dbg_kms(&i915->drm, "}\n");
> +}
> +
>  static bool is_dsb_busy(struct drm_i915_private *i915, enum pipe pipe,
>   enum dsb_id id)
>  {
> @@ -258,10 +274,21 @@ void intel_dsb_wait(struct intel_dsb *dsb)
>   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>   enum pipe pipe = crtc->pipe;
> 
> - if (wait_for(!is_dsb_busy(dev_priv, pipe, dsb->id), 1))
> + if (wait_for(!is_dsb_busy(dev_priv, pipe, dsb->id), 1)) {
> + u32 offset = i915_ggtt_offset(dsb->vma);
> +
> + intel_de_write_fw(dev_priv, DSB_CTRL(pipe, dsb->id),
> +   DSB_ENABLE | DSB_HALT);
> +
>   drm_err(&dev_priv->drm,
> - "[CRTC:%d:%s] DSB %d timed out waiting for idle\n",
> - crtc->base.base.id, crtc->base.name, dsb->id);
> + "[CRTC:%d:%s] DSB %d timed out waiting for idle
> (current head=0x%x, head=0x%x, tail=0x%x)\n",
> + crtc->base.base.id, crtc->base.name, dsb->id,
> + intel_de_read_fw(dev_priv,
> DSB_CURRENT_HEAD(pipe, dsb->id)) - offset,
> + intel_de_read_fw(dev_priv, DSB_HEAD(pipe, dsb-
> >id)) - offset,
> + intel_de_read_fw(dev_priv, DSB_TAIL(pipe, dsb->id))
> - offset);
> +
> + intel_dsb_dump(dsb);
> + }
> 
>   /* Attempt to reset it */
>   dsb->free_pos = 0;
> --
> 2.39.3

[Intel-gfx] ✓ Fi.CI.BAT: success for Enhance vfio PCI hot reset for vfio cdev device (rev9)

[Patchwork]

== Series Details ==

Series: Enhance vfio PCI hot reset for vfio cdev device (rev9)
URL   : https://patchwork.freedesktop.org/series/116991/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13366 -> Patchwork_116991v9


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/index.html

Participating hosts (41 -> 38)
--

  Missing(3): fi-bsw-nick fi-snb-2520m bat-mtlp-6 

Known issues


  Here are the changes found in Patchwork_116991v9 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_rpm@basic-rte:
- bat-adlp-9: [PASS][1] -> [ABORT][2] ([i915#7977] / [i915#8668])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-adlp-9/igt@i915_pm_...@basic-rte.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/bat-adlp-9/igt@i915_pm_...@basic-rte.html
- fi-kbl-7567u:   [PASS][3] -> [FAIL][4] ([i915#7940])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-kbl-7567u/igt@i915_pm_...@basic-rte.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/fi-kbl-7567u/igt@i915_pm_...@basic-rte.html
- fi-cfl-8700k:   [PASS][5] -> [FAIL][6] ([i915#7940])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-cfl-8700k/igt@i915_pm_...@basic-rte.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/fi-cfl-8700k/igt@i915_pm_...@basic-rte.html

  * igt@i915_selftest@live@gt_mocs:
- bat-mtlp-8: [PASS][7] -> [DMESG-FAIL][8] ([i915#7059])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@migrate:
- bat-rpls-2: [PASS][9] -> [DMESG-FAIL][10] ([i915#7699] / 
[i915#7913])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-rpls-2/igt@i915_selftest@l...@migrate.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/bat-rpls-2/igt@i915_selftest@l...@migrate.html

  * igt@i915_selftest@live@reset:
- bat-rpls-1: NOTRUN -> [ABORT][11] ([i915#4983] / [i915#7461] / 
[i915#8347] / [i915#8384])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/bat-rpls-1/igt@i915_selftest@l...@reset.html

  * igt@i915_selftest@live@slpc:
- bat-mtlp-8: [PASS][12] -> [DMESG-WARN][13] ([i915#6367])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-mtlp-8/igt@i915_selftest@l...@slpc.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/bat-mtlp-8/igt@i915_selftest@l...@slpc.html

  
 Possible fixes 

  * igt@i915_pm_rpm@basic-rte:
- fi-cfl-8109u:   [FAIL][14] ([i915#7940]) -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-cfl-8109u/igt@i915_pm_...@basic-rte.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/fi-cfl-8109u/igt@i915_pm_...@basic-rte.html
- fi-tgl-1115g4:  [FAIL][16] ([i915#7940]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-tgl-1115g4/igt@i915_pm_...@basic-rte.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/fi-tgl-1115g4/igt@i915_pm_...@basic-rte.html

  * igt@i915_selftest@live@requests:
- bat-rpls-1: [ABORT][18] ([i915#7920] / [i915#7982]) -> [PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-rpls-1/igt@i915_selftest@l...@requests.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/bat-rpls-1/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@slpc:
- bat-rpls-2: [DMESG-WARN][20] ([i915#6367]) -> [PASS][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-rpls-2/igt@i915_selftest@l...@slpc.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/bat-rpls-2/igt@i915_selftest@l...@slpc.html

  
 Warnings 

  * igt@i915_pm_rpm@basic-rte:
- fi-kbl-guc: [FAIL][22] ([i915#8843]) -> [FAIL][23] ([i915#7940])
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-kbl-guc/igt@i915_pm_...@basic-rte.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/fi-kbl-guc/igt@i915_pm_...@basic-rte.html

  * igt@i915_selftest@live@requests:
- bat-mtlp-8: [DMESG-FAIL][24] ([i915#8497]) -> [DMESG-FAIL][25] 
([i915#7269])
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-mtlp-8/igt@i915_selftest@l...@requests.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116991v9/bat-mtlp-8/igt@i915_selftest@l...@requests.html

  * igt@kms_psr@cursor_plane_move:
- bat-rplp-1: [SKIP][26] ([i915#1072]) -> [ABORT][27] ([i915#8434] 

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Add vfio_device cdev for iommufd support (rev18)

[Patchwork]

== Series Details ==

Series: Add vfio_device cdev for iommufd support (rev18)
URL   : https://patchwork.freedesktop.org/series/113696/
State : failure

== Summary ==

Error: patch 
https://patchwork.freedesktop.org/api/1.0/series/113696/revisions/18/mbox/ not 
applied
Applying: vfio: Allocate per device file structure
Applying: vfio: Refine vfio file kAPIs for KVM
Applying: vfio: Accept vfio device file in the KVM facing kAPI
Applying: kvm/vfio: Prepare for accepting vfio device fd
Applying: kvm/vfio: Accept vfio device file from userspace
Applying: vfio: Pass struct vfio_device_file * to vfio_device_open/close()
Applying: vfio: Block device access via device fd until device is opened
Applying: vfio: Add cdev_device_open_cnt to vfio_group
Applying: vfio: Make vfio_df_open() single open for device cdev path
Applying: vfio-iommufd: Move noiommu compat validation out of 
vfio_iommufd_bind()
Applying: vfio-iommufd: Split bind/attach into two steps
Applying: vfio: Record devid in vfio_device_file
Applying: vfio-iommufd: Add detach_ioas support for physical VFIO devices
Applying: iommufd/device: Add iommufd_access_detach() API
Applying: vfio-iommufd: Add detach_ioas support for emulated VFIO devices
error: sha1 information is lacking or useless (drivers/vfio/iommufd.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0015 vfio-iommufd: Add detach_ioas support for emulated VFIO 
devices
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enhance vfio PCI hot reset for vfio cdev device (rev9)

[Patchwork]

== Series Details ==

Series: Enhance vfio PCI hot reset for vfio cdev device (rev9)
URL   : https://patchwork.freedesktop.org/series/116991/
State : warning

== Summary ==

Error: dim checkpatch failed
50730df5f4fd vfio/pci: Update comment around group_fd get in 
vfio_pci_ioctl_pci_hot_reset()
093773fbd4fa vfio/pci: Move the existing hot reset logic to be a helper
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#6: 
This prepares to add another method for hot reset. The major hot reset logic

total: 0 errors, 1 warnings, 0 checks, 99 lines checked
392fa5660cf6 iommufd: Reserve all negative IDs in the iommufd xarray
4aade48b91a3 iommufd: Add iommufd_ctx_has_group()
1696784fd8e0 iommufd: Add helper to retrieve iommufd_ctx and devid
1e0019e9f06b vfio: Mark cdev usage in vfio_device
-:8: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#8: 
cdev path yet, so the vfio_device_cdev_opened() helper always returns false.

total: 0 errors, 1 warnings, 0 checks, 11 lines checked
c3159ac4077b vfio: Add helper to search vfio_device in a dev_set
20b180665135 vfio/pci: Extend VFIO_DEVICE_GET_PCI_HOT_RESET_INFO for vfio 
device cdev
2ba92613f52a vfio/pci: Copy hot-reset device info to userspace in the devices 
loop
a96ebfe701dd vfio/pci: Allow passing zero-length fd array in 
VFIO_DEVICE_PCI_HOT_RESET

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Allow panel drrs modes to have differing sync polarities

[Patchwork]

== Series Details ==

Series: drm/i915: Allow panel drrs modes to have differing sync polarities
URL   : https://patchwork.freedesktop.org/series/120484/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13366_full -> Patchwork_120484v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_120484v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_120484v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_120484v1_full:

### IGT changes ###

 Possible regressions 

  * 
igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-a-hdmi-a-1:
- shard-glk:  [PASS][1] -> [ABORT][2] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-glk1/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-a-hdmi-a-1.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-glk7/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-a-hdmi-a-1.html
- shard-rkl:  NOTRUN -> [ABORT][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-rkl-7/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-a-hdmi-a-1.html

  * 
igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-a-hdmi-a-3:
- shard-dg2:  NOTRUN -> [ABORT][4]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-dg2-6/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-a-hdmi-a-3.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-a-vga-1:
- shard-snb:  [PASS][5] -> [ABORT][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-snb4/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-a-vga-1.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-snb4/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-a-vga-1.html

  * 
igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1:
- shard-rkl:  NOTRUN -> [DMESG-WARN][7]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-rkl-7/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-b-hdmi-a-1.html

  * 
igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-3:
- shard-dg2:  NOTRUN -> [DMESG-WARN][8]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-dg2-6/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-b-hdmi-a-3.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-vga-1:
- shard-snb:  [PASS][9] -> [DMESG-WARN][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-snb4/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-b-vga-1.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-snb4/igt@kms_atomic_transition@plane-all-modeset-transition-fenc...@pipe-b-vga-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-dp-1:
- shard-apl:  [PASS][11] -> [ABORT][12] +1 similar issue
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-apl4/igt@kms_atomic_transition@plane-all-modeset-transit...@pipe-a-dp-1.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-apl3/igt@kms_atomic_transition@plane-all-modeset-transit...@pipe-a-dp-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
- shard-tglu: [PASS][13] -> [ABORT][14] +1 similar issue
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-tglu-9/igt@kms_atomic_transition@plane-all-modeset-transit...@pipe-a-hdmi-a-1.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-tglu-7/igt@kms_atomic_transition@plane-all-modeset-transit...@pipe-a-hdmi-a-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-2:
- shard-rkl:  [PASS][15] -> [ABORT][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transit...@pipe-a-hdmi-a-2.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/shard-rkl-4/igt@kms_atomic_transition@plane-all-modeset-transit...@pipe-a-hdmi-a-2.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3:
- shard-dg2:  [PASS][17] -> [ABORT][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_1336

[Intel-gfx] [PATCH v14 26/26] docs: vfio: Add vfio device cdev description

[Yi Liu]

This gives notes for userspace applications on device cdev usage.

Reviewed-by: Kevin Tian 
Signed-off-by: Yi Liu 
---
 Documentation/driver-api/vfio.rst | 139 ++
 1 file changed, 139 insertions(+)

diff --git a/Documentation/driver-api/vfio.rst 
b/Documentation/driver-api/vfio.rst
index 363e12c90b87..633d11c7fa71 100644
--- a/Documentation/driver-api/vfio.rst
+++ b/Documentation/driver-api/vfio.rst
@@ -239,6 +239,137 @@ group and can access them as follows::
/* Gratuitous device reset and go... */
ioctl(device, VFIO_DEVICE_RESET);
 
+IOMMUFD and vfio_iommu_type1
+
+
+IOMMUFD is the new user API to manage I/O page tables from userspace.
+It intends to be the portal of delivering advanced userspace DMA
+features (nested translation [5]_, PASID [6]_, etc.) while also providing
+a backwards compatibility interface for existing VFIO_TYPE1v2_IOMMU use
+cases.  Eventually the vfio_iommu_type1 driver, as well as the legacy
+vfio container and group model is intended to be deprecated.
+
+The IOMMUFD backwards compatibility interface can be enabled two ways.
+In the first method, the kernel can be configured with
+CONFIG_IOMMUFD_VFIO_CONTAINER, in which case the IOMMUFD subsystem
+transparently provides the entire infrastructure for the VFIO
+container and IOMMU backend interfaces.  The compatibility mode can
+also be accessed if the VFIO container interface, ie. /dev/vfio/vfio is
+simply symlink'd to /dev/iommu.  Note that at the time of writing, the
+compatibility mode is not entirely feature complete relative to
+VFIO_TYPE1v2_IOMMU (ex. DMA mapping MMIO) and does not attempt to
+provide compatibility to the VFIO_SPAPR_TCE_IOMMU interface.  Therefore
+it is not generally advisable at this time to switch from native VFIO
+implementations to the IOMMUFD compatibility interfaces.
+
+Long term, VFIO users should migrate to device access through the cdev
+interface described below, and native access through the IOMMUFD
+provided interfaces.
+
+VFIO Device cdev
+
+
+Traditionally user acquires a device fd via VFIO_GROUP_GET_DEVICE_FD
+in a VFIO group.
+
+With CONFIG_VFIO_DEVICE_CDEV=y the user can now acquire a device fd
+by directly opening a character device /dev/vfio/devices/vfioX where
+"X" is the number allocated uniquely by VFIO for registered devices.
+cdev interface does not support noiommu devices, so user should use
+the legacy group interface if noiommu is wanted.
+
+The cdev only works with IOMMUFD.  Both VFIO drivers and applications
+must adapt to the new cdev security model which requires using
+VFIO_DEVICE_BIND_IOMMUFD to claim DMA ownership before starting to
+actually use the device.  Once BIND succeeds then a VFIO device can
+be fully accessed by the user.
+
+VFIO device cdev doesn't rely on VFIO group/container/iommu drivers.
+Hence those modules can be fully compiled out in an environment
+where no legacy VFIO application exists.
+
+So far SPAPR does not support IOMMUFD yet.  So it cannot support device
+cdev either.
+
+vfio device cdev access is still bound by IOMMU group semantics, ie. there
+can be only one DMA owner for the group.  Devices belonging to the same
+group can not be bound to multiple iommufd_ctx or shared between native
+kernel and vfio bus driver or other driver supporting the driver_managed_dma
+flag.  A violation of this ownership requirement will fail at the
+VFIO_DEVICE_BIND_IOMMUFD ioctl, which gates full device access.
+
+Device cdev Example
+---
+
+Assume user wants to access PCI device :6a:01.0::
+
+   $ ls /sys/bus/pci/devices/:6a:01.0/vfio-dev/
+   vfio0
+
+This device is therefore represented as vfio0.  The user can verify
+its existence::
+
+   $ ls -l /dev/vfio/devices/vfio0
+   crw--- 1 root root 511, 0 Feb 16 01:22 /dev/vfio/devices/vfio0
+   $ cat /sys/bus/pci/devices/:6a:01.0/vfio-dev/vfio0/dev
+   511:0
+   $ ls -l /dev/char/511\:0
+   lrwxrwxrwx 1 root root 21 Feb 16 01:22 /dev/char/511:0 -> 
../vfio/devices/vfio0
+
+Then provide the user with access to the device if unprivileged
+operation is desired::
+
+   $ chown user:user /dev/vfio/devices/vfio0
+
+Finally the user could get cdev fd by::
+
+   cdev_fd = open("/dev/vfio/devices/vfio0", O_RDWR);
+
+An opened cdev_fd doesn't give the user any permission of accessing
+the device except binding the cdev_fd to an iommufd.  After that point
+then the device is fully accessible including attaching it to an
+IOMMUFD IOAS/HWPT to enable userspace DMA::
+
+   struct vfio_device_bind_iommufd bind = {
+   .argsz = sizeof(bind),
+   .flags = 0,
+   };
+   struct iommu_ioas_alloc alloc_data  = {
+   .size = sizeof(alloc_data),
+   .flags = 0,
+   };
+   struct vfio_device_attach_iommufd_pt attach_data = {
+   .argsz = sizeof(attach_data),
+   .flags = 0,
+   };
+   s

[Intel-gfx] [PATCH v14 23/26] vfio: Add VFIO_DEVICE_[AT|DE]TACH_IOMMUFD_PT

[Yi Liu]

This adds ioctl for userspace to attach device cdev fd to and detach
from IOAS/hw_pagetable managed by iommufd.

VFIO_DEVICE_ATTACH_IOMMUFD_PT: attach vfio device to IOAS or hw_pagetable
   managed by iommufd. Attach can be undo
   by VFIO_DEVICE_DETACH_IOMMUFD_PT or device
   fd close.
VFIO_DEVICE_DETACH_IOMMUFD_PT: detach vfio device from the current attached
   IOAS or hw_pagetable managed by iommufd.

Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Tested-by: Terrence Xu 
Signed-off-by: Yi Liu 
---
 drivers/vfio/device_cdev.c | 58 ++
 drivers/vfio/vfio.h|  5 
 drivers/vfio/vfio_main.c   | 15 +-
 include/uapi/linux/vfio.h  | 44 +
 4 files changed, 121 insertions(+), 1 deletion(-)

diff --git a/drivers/vfio/device_cdev.c b/drivers/vfio/device_cdev.c
index f40784dd5561..e75da0a70d1f 100644
--- a/drivers/vfio/device_cdev.c
+++ b/drivers/vfio/device_cdev.c
@@ -152,6 +152,64 @@ void vfio_df_unbind_iommufd(struct vfio_device_file *df)
vfio_device_unblock_group(device);
 }
 
+int vfio_df_ioctl_attach_pt(struct vfio_device_file *df,
+   struct vfio_device_attach_iommufd_pt __user *arg)
+{
+   struct vfio_device *device = df->device;
+   struct vfio_device_attach_iommufd_pt attach;
+   unsigned long minsz;
+   int ret;
+
+   minsz = offsetofend(struct vfio_device_attach_iommufd_pt, pt_id);
+
+   if (copy_from_user(&attach, arg, minsz))
+   return -EFAULT;
+
+   if (attach.argsz < minsz || attach.flags)
+   return -EINVAL;
+
+   mutex_lock(&device->dev_set->lock);
+   ret = device->ops->attach_ioas(device, &attach.pt_id);
+   if (ret)
+   goto out_unlock;
+
+   if (copy_to_user(&arg->pt_id, &attach.pt_id, sizeof(attach.pt_id))) {
+   ret = -EFAULT;
+   goto out_detach;
+   }
+   mutex_unlock(&device->dev_set->lock);
+
+   return 0;
+
+out_detach:
+   device->ops->detach_ioas(device);
+out_unlock:
+   mutex_unlock(&device->dev_set->lock);
+   return ret;
+}
+
+int vfio_df_ioctl_detach_pt(struct vfio_device_file *df,
+   struct vfio_device_detach_iommufd_pt __user *arg)
+{
+   struct vfio_device *device = df->device;
+   struct vfio_device_detach_iommufd_pt detach;
+   unsigned long minsz;
+
+   minsz = offsetofend(struct vfio_device_detach_iommufd_pt, flags);
+
+   if (copy_from_user(&detach, arg, minsz))
+   return -EFAULT;
+
+   if (detach.argsz < minsz || detach.flags)
+   return -EINVAL;
+
+   mutex_lock(&device->dev_set->lock);
+   device->ops->detach_ioas(device);
+   mutex_unlock(&device->dev_set->lock);
+
+   return 0;
+}
+
 static char *vfio_device_devnode(const struct device *dev, umode_t *mode)
 {
return kasprintf(GFP_KERNEL, "vfio/devices/%s", dev_name(dev));
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 137d3e9ca798..1493bf8f4086 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -266,6 +266,11 @@ vfio_iommufd_compat_attach_ioas(struct vfio_device *device,
 }
 #endif
 
+int vfio_df_ioctl_attach_pt(struct vfio_device_file *df,
+   struct vfio_device_attach_iommufd_pt __user *arg);
+int vfio_df_ioctl_detach_pt(struct vfio_device_file *df,
+   struct vfio_device_detach_iommufd_pt __user *arg);
+
 #if IS_ENABLED(CONFIG_VFIO_DEVICE_CDEV)
 void vfio_init_device_cdev(struct vfio_device *device);
 
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index 9fdf93ff17cf..ba1d84afe081 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -1162,6 +1162,19 @@ static long vfio_device_fops_unl_ioctl(struct file 
*filep,
if (ret)
return ret;
 
+   /* cdev only ioctls */
+   if (IS_ENABLED(CONFIG_VFIO_DEVICE_CDEV) && !df->group) {
+   switch (cmd) {
+   case VFIO_DEVICE_ATTACH_IOMMUFD_PT:
+   ret = vfio_df_ioctl_attach_pt(df, uptr);
+   goto out;
+
+   case VFIO_DEVICE_DETACH_IOMMUFD_PT:
+   ret = vfio_df_ioctl_detach_pt(df, uptr);
+   goto out;
+   }
+   }
+
switch (cmd) {
case VFIO_DEVICE_FEATURE:
ret = vfio_ioctl_device_feature(device, uptr);
@@ -1174,7 +1187,7 @@ static long vfio_device_fops_unl_ioctl(struct file *filep,
ret = device->ops->ioctl(device, cmd, arg);
break;
}
-
+out:
vfio_device_pm_runtime_put(device);
return ret;
 }
diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
index 098946b23e86..fa06e3eb4955 10

[Intel-gfx] [PATCH v14 24/26] vfio: Move the IOMMU_CAP_CACHE_COHERENCY check in __vfio_register_dev()

[Yi Liu]

The IOMMU_CAP_CACHE_COHERENCY check only applies to the physical devices
that are IOMMU-backed. But it is now in the group code. If want to compile
vfio_group infrastructure out, this check needs to be moved out of the group
code.

Another reason for this change is to fail the device registration for the
physical devices that do not have IOMMU if the group code is not compiled
as the cdev interface does not support such devices.

Suggested-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c | 10 --
 drivers/vfio/vfio_main.c | 11 +++
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index 5c17ad812313..610a429c6191 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -682,16 +682,6 @@ static struct vfio_group *vfio_group_find_or_alloc(struct 
device *dev)
if (!iommu_group)
return ERR_PTR(-EINVAL);
 
-   /*
-* VFIO always sets IOMMU_CACHE because we offer no way for userspace to
-* restore cache coherency. It has to be checked here because it is only
-* valid for cases where we are using iommu groups.
-*/
-   if (!device_iommu_capable(dev, IOMMU_CAP_CACHE_COHERENCY)) {
-   iommu_group_put(iommu_group);
-   return ERR_PTR(-EINVAL);
-   }
-
mutex_lock(&vfio.group_lock);
group = vfio_group_find_from_iommu(iommu_group);
if (group) {
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index ba1d84afe081..902f06e52c48 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -292,6 +292,17 @@ static int __vfio_register_dev(struct vfio_device *device,
if (ret)
return ret;
 
+   /*
+* VFIO always sets IOMMU_CACHE because we offer no way for userspace to
+* restore cache coherency. It has to be checked here because it is only
+* valid for cases where we are using iommu groups.
+*/
+   if (type == VFIO_IOMMU && !vfio_device_is_noiommu(device) &&
+   !device_iommu_capable(device->dev, IOMMU_CAP_CACHE_COHERENCY)) {
+   ret = -EINVAL;
+   goto err_out;
+   }
+
ret = vfio_device_add(device);
if (ret)
goto err_out;
-- 
2.34.1

[Intel-gfx] [PATCH v14 20/26] iommufd: Add iommufd_ctx_from_fd()

[Yi Liu]

It's common to get a reference to the iommufd context from a given file
descriptor. So adds an API for it. Existing users of this API are compiled
only when IOMMUFD is enabled, so no need to have a stub for the IOMMUFD
disabled case.

Signed-off-by: Yi Liu 
---
 drivers/iommu/iommufd/main.c | 23 +++
 include/linux/iommufd.h  |  1 +
 2 files changed, 24 insertions(+)

diff --git a/drivers/iommu/iommufd/main.c b/drivers/iommu/iommufd/main.c
index 32ce7befc8dd..e99a338d4fdf 100644
--- a/drivers/iommu/iommufd/main.c
+++ b/drivers/iommu/iommufd/main.c
@@ -377,6 +377,29 @@ struct iommufd_ctx *iommufd_ctx_from_file(struct file 
*file)
 }
 EXPORT_SYMBOL_NS_GPL(iommufd_ctx_from_file, IOMMUFD);
 
+/**
+ * iommufd_ctx_from_fd - Acquires a reference to the iommufd context
+ * @fd: File descriptor to obtain the reference from
+ *
+ * Returns a pointer to the iommufd_ctx, otherwise ERR_PTR. On success
+ * the caller is responsible to call iommufd_ctx_put().
+ */
+struct iommufd_ctx *iommufd_ctx_from_fd(int fd)
+{
+   struct iommufd_ctx *iommufd;
+   struct fd f;
+
+   f = fdget(fd);
+   if (!f.file)
+   return ERR_PTR(-EBADF);
+
+   iommufd = iommufd_ctx_from_file(f.file);
+
+   fdput(f);
+   return iommufd;
+}
+EXPORT_SYMBOL_NS_GPL(iommufd_ctx_from_fd, IOMMUFD);
+
 /**
  * iommufd_ctx_put - Put back a reference
  * @ictx: Context to put back
diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h
index 3a3216cb9482..9657c58813dc 100644
--- a/include/linux/iommufd.h
+++ b/include/linux/iommufd.h
@@ -54,6 +54,7 @@ void iommufd_ctx_get(struct iommufd_ctx *ictx);
 
 #if IS_ENABLED(CONFIG_IOMMUFD)
 struct iommufd_ctx *iommufd_ctx_from_file(struct file *file);
+struct iommufd_ctx *iommufd_ctx_from_fd(int fd);
 void iommufd_ctx_put(struct iommufd_ctx *ictx);
 bool iommufd_ctx_has_group(struct iommufd_ctx *ictx, struct iommu_group 
*group);
 
-- 
2.34.1

[Intel-gfx] [PATCH v14 21/26] vfio: Avoid repeated user pointer cast in vfio_device_fops_unl_ioctl()

[Yi Liu]

This adds a local variable to store the user pointer cast result from arg.
It avoids the repeated casts in the code when more ioctls are added.

Signed-off-by: Yi Liu 
---
 drivers/vfio/vfio_main.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index 5f7c3151d8c0..a2744cb64c6d 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -1146,6 +1146,7 @@ static long vfio_device_fops_unl_ioctl(struct file *filep,
 {
struct vfio_device_file *df = filep->private_data;
struct vfio_device *device = df->device;
+   void __user *uptr = (void __user *)arg;
int ret;
 
/* Paired with smp_store_release() following vfio_df_open() */
@@ -1158,7 +1159,7 @@ static long vfio_device_fops_unl_ioctl(struct file *filep,
 
switch (cmd) {
case VFIO_DEVICE_FEATURE:
-   ret = vfio_ioctl_device_feature(device, (void __user *)arg);
+   ret = vfio_ioctl_device_feature(device, uptr);
break;
 
default:
-- 
2.34.1

[Intel-gfx] [PATCH v14 12/26] vfio: Record devid in vfio_device_file

[Yi Liu]

.bind_iommufd() will generate an ID to represent this bond, which is
needed by userspace for further usage. Store devid in vfio_device_file
to avoid passing the pointer in multiple places.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/iommufd.c   | 12 +++-
 drivers/vfio/vfio.h  | 10 +-
 drivers/vfio/vfio_main.c |  6 +++---
 3 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c
index 91fdae69bb45..4fc674c01a05 100644
--- a/drivers/vfio/iommufd.c
+++ b/drivers/vfio/iommufd.c
@@ -18,14 +18,14 @@ bool vfio_iommufd_device_has_compat_ioas(struct vfio_device 
*vdev,
return !iommufd_vfio_compat_ioas_get_id(ictx, &ioas_id);
 }
 
-int vfio_iommufd_bind(struct vfio_device *vdev, struct iommufd_ctx *ictx)
+int vfio_df_iommufd_bind(struct vfio_device_file *df)
 {
-   u32 device_id;
+   struct vfio_device *vdev = df->device;
+   struct iommufd_ctx *ictx = df->iommufd;
 
lockdep_assert_held(&vdev->dev_set->lock);
 
-   /* The legacy path has no way to return the device id */
-   return vdev->ops->bind_iommufd(vdev, ictx, &device_id);
+   return vdev->ops->bind_iommufd(vdev, ictx, &df->devid);
 }
 
 int vfio_iommufd_compat_attach_ioas(struct vfio_device *vdev,
@@ -48,8 +48,10 @@ int vfio_iommufd_compat_attach_ioas(struct vfio_device *vdev,
return vdev->ops->attach_ioas(vdev, &ioas_id);
 }
 
-void vfio_iommufd_unbind(struct vfio_device *vdev)
+void vfio_df_iommufd_unbind(struct vfio_device_file *df)
 {
+   struct vfio_device *vdev = df->device;
+
lockdep_assert_held(&vdev->dev_set->lock);
 
if (vfio_device_is_noiommu(vdev))
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 04755379940c..58801adc1a7e 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -21,6 +21,7 @@ struct vfio_device_file {
struct vfio_group *group;
 
u8 access_granted;
+   u32 devid; /* only valid when iommufd is valid */
spinlock_t kvm_ref_lock; /* protect kvm field */
struct kvm *kvm;
struct iommufd_ctx *iommufd; /* protected by struct 
vfio_device_set::lock */
@@ -236,8 +237,8 @@ static inline void vfio_container_cleanup(void)
 #if IS_ENABLED(CONFIG_IOMMUFD)
 bool vfio_iommufd_device_has_compat_ioas(struct vfio_device *vdev,
 struct iommufd_ctx *ictx);
-int vfio_iommufd_bind(struct vfio_device *device, struct iommufd_ctx *ictx);
-void vfio_iommufd_unbind(struct vfio_device *device);
+int vfio_df_iommufd_bind(struct vfio_device_file *df);
+void vfio_df_iommufd_unbind(struct vfio_device_file *df);
 int vfio_iommufd_compat_attach_ioas(struct vfio_device *device,
struct iommufd_ctx *ictx);
 #else
@@ -248,13 +249,12 @@ vfio_iommufd_device_has_compat_ioas(struct vfio_device 
*vdev,
return false;
 }
 
-static inline int vfio_iommufd_bind(struct vfio_device *device,
-   struct iommufd_ctx *ictx)
+static inline int vfio_df_iommufd_bind(struct vfio_device_file *fd)
 {
return -EOPNOTSUPP;
 }
 
-static inline void vfio_iommufd_unbind(struct vfio_device *device)
+static inline void vfio_df_iommufd_unbind(struct vfio_device_file *df)
 {
 }
 
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index be5e4ddd5901..3a4b7eb128df 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -446,7 +446,7 @@ static int vfio_df_device_first_open(struct 
vfio_device_file *df)
return -ENODEV;
 
if (iommufd)
-   ret = vfio_iommufd_bind(device, iommufd);
+   ret = vfio_df_iommufd_bind(df);
else
ret = vfio_device_group_use_iommu(device);
if (ret)
@@ -461,7 +461,7 @@ static int vfio_df_device_first_open(struct 
vfio_device_file *df)
 
 err_unuse_iommu:
if (iommufd)
-   vfio_iommufd_unbind(device);
+   vfio_df_iommufd_unbind(df);
else
vfio_device_group_unuse_iommu(device);
 err_module_put:
@@ -479,7 +479,7 @@ static void vfio_df_device_last_close(struct 
vfio_device_file *df)
if (device->ops->close_device)
device->ops->close_device(device);
if (iommufd)
-   vfio_iommufd_unbind(device);
+   vfio_df_iommufd_unbind(df);
else
vfio_device_group_unuse_iommu(device);
module_put(device->dev->driver->owner);
-- 
2.34.1

[Intel-gfx] [PATCH v14 22/26] vfio: Add VFIO_DEVICE_BIND_IOMMUFD

[Yi Liu]

This adds ioctl for userspace to bind device cdev fd to iommufd.

VFIO_DEVICE_BIND_IOMMUFD: bind device to an iommufd, hence gain DMA
  control provided by the iommufd. open_device
  op is called after bind_iommufd op.

Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Tested-by: Terrence Xu 
Signed-off-by: Yi Liu 
---
 drivers/vfio/device_cdev.c | 107 +
 drivers/vfio/vfio.h|  13 +
 drivers/vfio/vfio_main.c   |   5 ++
 include/linux/vfio.h   |   5 +-
 include/uapi/linux/vfio.h  |  27 ++
 5 files changed, 155 insertions(+), 2 deletions(-)

diff --git a/drivers/vfio/device_cdev.c b/drivers/vfio/device_cdev.c
index bf1032d00107..f40784dd5561 100644
--- a/drivers/vfio/device_cdev.c
+++ b/drivers/vfio/device_cdev.c
@@ -3,6 +3,7 @@
  * Copyright (c) 2023 Intel Corporation.
  */
 #include 
+#include 
 
 #include "vfio.h"
 
@@ -45,6 +46,112 @@ int vfio_device_fops_cdev_open(struct inode *inode, struct 
file *filep)
return ret;
 }
 
+static void vfio_df_get_kvm_safe(struct vfio_device_file *df)
+{
+   spin_lock(&df->kvm_ref_lock);
+   vfio_device_get_kvm_safe(df->device, df->kvm);
+   spin_unlock(&df->kvm_ref_lock);
+}
+
+long vfio_df_ioctl_bind_iommufd(struct vfio_device_file *df,
+   struct vfio_device_bind_iommufd __user *arg)
+{
+   struct vfio_device *device = df->device;
+   struct vfio_device_bind_iommufd bind;
+   unsigned long minsz;
+   int ret;
+
+   static_assert(__same_type(arg->out_devid, df->devid));
+
+   minsz = offsetofend(struct vfio_device_bind_iommufd, out_devid);
+
+   if (copy_from_user(&bind, arg, minsz))
+   return -EFAULT;
+
+   if (bind.argsz < minsz || bind.flags || bind.iommufd < 0)
+   return -EINVAL;
+
+   /* BIND_IOMMUFD only allowed for cdev fds */
+   if (df->group)
+   return -EINVAL;
+
+   ret = vfio_device_block_group(device);
+   if (ret)
+   return ret;
+
+   mutex_lock(&device->dev_set->lock);
+   /* one device cannot be bound twice */
+   if (df->access_granted) {
+   ret = -EINVAL;
+   goto out_unlock;
+   }
+
+   df->iommufd = iommufd_ctx_from_fd(bind.iommufd);
+   if (IS_ERR(df->iommufd)) {
+   ret = PTR_ERR(df->iommufd);
+   df->iommufd = NULL;
+   goto out_unlock;
+   }
+
+   /*
+* Before the device open, get the KVM pointer currently
+* associated with the device file (if there is) and obtain
+* a reference.  This reference is held until device closed.
+* Save the pointer in the device for use by drivers.
+*/
+   vfio_df_get_kvm_safe(df);
+
+   ret = vfio_df_open(df);
+   if (ret)
+   goto out_put_kvm;
+
+   ret = copy_to_user(&arg->out_devid, &df->devid,
+  sizeof(df->devid)) ? -EFAULT : 0;
+   if (ret)
+   goto out_close_device;
+
+   device->cdev_opened = true;
+   /*
+* Paired with smp_load_acquire() in vfio_device_fops::ioctl/
+* read/write/mmap
+*/
+   smp_store_release(&df->access_granted, true);
+   mutex_unlock(&device->dev_set->lock);
+   return 0;
+
+out_close_device:
+   vfio_df_close(df);
+out_put_kvm:
+   vfio_device_put_kvm(device);
+   iommufd_ctx_put(df->iommufd);
+   df->iommufd = NULL;
+out_unlock:
+   mutex_unlock(&device->dev_set->lock);
+   vfio_device_unblock_group(device);
+   return ret;
+}
+
+void vfio_df_unbind_iommufd(struct vfio_device_file *df)
+{
+   struct vfio_device *device = df->device;
+
+   /*
+* In the time of close, there is no contention with another one
+* changing this flag.  So read df->access_granted without lock
+* and no smp_load_acquire() is ok.
+*/
+   if (!df->access_granted)
+   return;
+
+   mutex_lock(&device->dev_set->lock);
+   vfio_df_close(df);
+   vfio_device_put_kvm(device);
+   iommufd_ctx_put(df->iommufd);
+   device->cdev_opened = false;
+   mutex_unlock(&device->dev_set->lock);
+   vfio_device_unblock_group(device);
+}
+
 static char *vfio_device_devnode(const struct device *dev, umode_t *mode)
 {
return kasprintf(GFP_KERNEL, "vfio/devices/%s", dev_name(dev));
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index c2aa65382592..137d3e9ca798 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -287,6 +287,9 @@ static inline void vfio_device_del(struct vfio_device 
*device)
 }
 
 int vfio_device_fops_cdev_open(struct inode *inode, struct file *filep);
+long vfio_df_ioctl_bind_iommufd(struct vfio_device_file *df,
+   struct vfio_device_bind_iommufd __user *arg);
+void vfio_df_unbind_iommufd(struct

[Intel-gfx] [PATCH v14 25/26] vfio: Compile vfio_group infrastructure optionally

[Yi Liu]

vfio_group is not needed for vfio device cdev, so with vfio device cdev
introduced, the vfio_group infrastructures can be compiled out if only
cdev is needed.

Reviewed-by: Jason Gunthorpe 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Tested-by: Terrence Xu 
Signed-off-by: Yi Liu 
---
 drivers/iommu/iommufd/Kconfig |  4 +-
 drivers/vfio/Kconfig  | 15 ++
 drivers/vfio/Makefile |  2 +-
 drivers/vfio/vfio.h   | 89 ---
 include/linux/vfio.h  | 25 --
 5 files changed, 123 insertions(+), 12 deletions(-)

diff --git a/drivers/iommu/iommufd/Kconfig b/drivers/iommu/iommufd/Kconfig
index ada693ea51a7..99d4b075df49 100644
--- a/drivers/iommu/iommufd/Kconfig
+++ b/drivers/iommu/iommufd/Kconfig
@@ -14,8 +14,8 @@ config IOMMUFD
 if IOMMUFD
 config IOMMUFD_VFIO_CONTAINER
bool "IOMMUFD provides the VFIO container /dev/vfio/vfio"
-   depends on VFIO && !VFIO_CONTAINER
-   default VFIO && !VFIO_CONTAINER
+   depends on VFIO_GROUP && !VFIO_CONTAINER
+   default VFIO_GROUP && !VFIO_CONTAINER
help
  IOMMUFD will provide /dev/vfio/vfio instead of VFIO. This relies on
  IOMMUFD providing compatibility emulation to give the same ioctls.
diff --git a/drivers/vfio/Kconfig b/drivers/vfio/Kconfig
index 26f18d92eb97..6bda6dbb4878 100644
--- a/drivers/vfio/Kconfig
+++ b/drivers/vfio/Kconfig
@@ -4,6 +4,8 @@ menuconfig VFIO
select IOMMU_API
depends on IOMMUFD || !IOMMUFD
select INTERVAL_TREE
+   select VFIO_GROUP if SPAPR_TCE_IOMMU || IOMMUFD=n
+   select VFIO_DEVICE_CDEV if !VFIO_GROUP
select VFIO_CONTAINER if IOMMUFD=n
help
  VFIO provides a framework for secure userspace device drivers.
@@ -15,6 +17,7 @@ if VFIO
 config VFIO_DEVICE_CDEV
bool "Support for the VFIO cdev /dev/vfio/devices/vfioX"
depends on IOMMUFD && !SPAPR_TCE_IOMMU
+   default !VFIO_GROUP
help
  The VFIO device cdev is another way for userspace to get device
  access. Userspace gets device fd by opening device cdev under
@@ -24,9 +27,20 @@ config VFIO_DEVICE_CDEV
 
  If you don't know what to do here, say N.
 
+config VFIO_GROUP
+   bool "Support for the VFIO group /dev/vfio/$group_id"
+   default y
+   help
+  VFIO group support provides the traditional model for accessing
+  devices through VFIO and is used by the majority of userspace
+  applications and drivers making use of VFIO.
+
+  If you don't know what to do here, say Y.
+
 config VFIO_CONTAINER
bool "Support for the VFIO container /dev/vfio/vfio"
select VFIO_IOMMU_TYPE1 if MMU && (X86 || S390 || ARM || ARM64)
+   depends on VFIO_GROUP
default y
help
  The VFIO container is the classic interface to VFIO for establishing
@@ -48,6 +62,7 @@ endif
 
 config VFIO_NOIOMMU
bool "VFIO No-IOMMU support"
+   depends on VFIO_GROUP
help
  VFIO is built on the ability to isolate devices using the IOMMU.
  Only with an IOMMU can userspace access to DMA capable devices be
diff --git a/drivers/vfio/Makefile b/drivers/vfio/Makefile
index 87ccb16fdd77..c82ea032d352 100644
--- a/drivers/vfio/Makefile
+++ b/drivers/vfio/Makefile
@@ -2,9 +2,9 @@
 obj-$(CONFIG_VFIO) += vfio.o
 
 vfio-y += vfio_main.o \
- group.o \
  iova_bitmap.o
 vfio-$(CONFIG_VFIO_DEVICE_CDEV) += device_cdev.o
+vfio-$(CONFIG_VFIO_GROUP) += group.o
 vfio-$(CONFIG_IOMMUFD) += iommufd.o
 vfio-$(CONFIG_VFIO_CONTAINER) += container.o
 vfio-$(CONFIG_VFIO_VIRQFD) += virqfd.o
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 1493bf8f4086..05427a7303c6 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -36,6 +36,12 @@ vfio_allocate_device_file(struct vfio_device *device);
 
 extern const struct file_operations vfio_device_fops;
 
+#ifdef CONFIG_VFIO_NOIOMMU
+extern bool vfio_noiommu __read_mostly;
+#else
+enum { vfio_noiommu = false };
+#endif
+
 enum vfio_group_type {
/*
 * Physical device with IOMMU backing.
@@ -60,6 +66,7 @@ enum vfio_group_type {
VFIO_NO_IOMMU,
 };
 
+#if IS_ENABLED(CONFIG_VFIO_GROUP)
 struct vfio_group {
struct device   dev;
struct cdev cdev;
@@ -111,6 +118,82 @@ static inline bool vfio_device_is_noiommu(struct 
vfio_device *vdev)
return IS_ENABLED(CONFIG_VFIO_NOIOMMU) &&
   vdev->group->type == VFIO_NO_IOMMU;
 }
+#else
+struct vfio_group;
+
+static inline int vfio_device_block_group(struct vfio_device *device)
+{
+   return 0;
+}
+
+static inline void vfio_device_unblock_group(struct vfio_device *device)
+{
+}
+
+static inline int vfio_device_set_group(struct vfio_device *device,
+   enum vfio_group_type type)
+{
+   return 0;
+}
+
+static inline void vfio_device_

[Intel-gfx] [PATCH v14 18/26] vfio: Add cdev for vfio_device

[Yi Liu]

This allows user to directly open a vfio device w/o using the legacy
container/group interface, as a prerequisite for supporting new iommu
features like nested translation.

The device fd opened in this manner doesn't have the capability to access
the device as the fops open() doesn't open the device until the successful
BIND_IOMMUFD which be added in next patch.

With this patch, devices registered to vfio core have both group and device
interface created.

- group interface : /dev/vfio/$groupID
- device interface: /dev/vfio/devices/vfioX - normal device
("X" is the minor number and is unique across devices)

Given a vfio device the user can identify the matching vfioX by checking
the sysfs path of the device. Take PCI device (:6a:01.0) for example,
/sys/bus/pci/devices/\:6a\:01.0/vfio-dev/vfio0/dev contains the
major:minor of the matching vfioX.

Userspace then opens the /dev/vfio/devices/vfioX and checks with fstat
that the major:minor matches.

The vfio_device cdev logic in this patch:
*) __vfio_register_dev() path ends up doing cdev_device_add() for each
   vfio_device if VFIO_DEVICE_CDEV configured.
*) vfio_unregister_group_dev() path does cdev_device_del();

cdev interface does not support noiommu devices, so VFIO only registers
the group interface for the physcial devices that do not have IOMMU. noiommu
users should use the legacy group interface.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/Kconfig   | 12 
 drivers/vfio/Makefile  |  1 +
 drivers/vfio/device_cdev.c | 63 ++
 drivers/vfio/vfio.h| 54 
 drivers/vfio/vfio_main.c   | 21 ++---
 include/linux/vfio.h   |  4 +++
 6 files changed, 151 insertions(+), 4 deletions(-)
 create mode 100644 drivers/vfio/device_cdev.c

diff --git a/drivers/vfio/Kconfig b/drivers/vfio/Kconfig
index aba36f5be4ec..26f18d92eb97 100644
--- a/drivers/vfio/Kconfig
+++ b/drivers/vfio/Kconfig
@@ -12,6 +12,18 @@ menuconfig VFIO
  If you don't know what to do here, say N.
 
 if VFIO
+config VFIO_DEVICE_CDEV
+   bool "Support for the VFIO cdev /dev/vfio/devices/vfioX"
+   depends on IOMMUFD && !SPAPR_TCE_IOMMU
+   help
+ The VFIO device cdev is another way for userspace to get device
+ access. Userspace gets device fd by opening device cdev under
+ /dev/vfio/devices/vfioX, and then bind the device fd with an iommufd
+ to set up secure DMA context for device access.  This interface does
+ not support noiommu.
+
+ If you don't know what to do here, say N.
+
 config VFIO_CONTAINER
bool "Support for the VFIO container /dev/vfio/vfio"
select VFIO_IOMMU_TYPE1 if MMU && (X86 || S390 || ARM || ARM64)
diff --git a/drivers/vfio/Makefile b/drivers/vfio/Makefile
index 66f418aef5a9..87ccb16fdd77 100644
--- a/drivers/vfio/Makefile
+++ b/drivers/vfio/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_VFIO) += vfio.o
 vfio-y += vfio_main.o \
  group.o \
  iova_bitmap.o
+vfio-$(CONFIG_VFIO_DEVICE_CDEV) += device_cdev.o
 vfio-$(CONFIG_IOMMUFD) += iommufd.o
 vfio-$(CONFIG_VFIO_CONTAINER) += container.o
 vfio-$(CONFIG_VFIO_VIRQFD) += virqfd.o
diff --git a/drivers/vfio/device_cdev.c b/drivers/vfio/device_cdev.c
new file mode 100644
index ..bf1032d00107
--- /dev/null
+++ b/drivers/vfio/device_cdev.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2023 Intel Corporation.
+ */
+#include 
+
+#include "vfio.h"
+
+static dev_t device_devt;
+
+void vfio_init_device_cdev(struct vfio_device *device)
+{
+   device->device.devt = MKDEV(MAJOR(device_devt), device->index);
+   cdev_init(&device->cdev, &vfio_device_fops);
+   device->cdev.owner = THIS_MODULE;
+}
+
+/*
+ * device access via the fd opened by this function is blocked until
+ * .open_device() is called successfully during BIND_IOMMUFD.
+ */
+int vfio_device_fops_cdev_open(struct inode *inode, struct file *filep)
+{
+   struct vfio_device *device = container_of(inode->i_cdev,
+ struct vfio_device, cdev);
+   struct vfio_device_file *df;
+   int ret;
+
+   /* Paired with the put in vfio_device_fops_release() */
+   if (!vfio_device_try_get_registration(device))
+   return -ENODEV;
+
+   df = vfio_allocate_device_file(device);
+   if (IS_ERR(df)) {
+   ret = PTR_ERR(df);
+   goto err_put_registration;
+   }
+
+   filep->private_data = df;
+
+   return 0;
+
+err_put_registration:
+   vfio_device_put_registration(device);
+   return ret;
+}
+
+static char *vfio_device_devnode(const struct device *dev, umode_t *mode)
+{
+   return kasprintf(GFP_KERNEL, "vfio/devices/%s", d

[Intel-gfx] [PATCH v14 11/26] vfio-iommufd: Split bind/attach into two steps

[Yi Liu]

This aligns the bind/attach logic with the coming vfio device cdev support.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c   | 17 +
 drivers/vfio/iommufd.c | 35 +--
 drivers/vfio/vfio.h|  9 +
 3 files changed, 39 insertions(+), 22 deletions(-)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index b8b77daf7aa6..41a09a2df690 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -207,9 +207,13 @@ static int vfio_df_group_open(struct vfio_device_file *df)
}
 
ret = vfio_df_open(df);
-   if (ret) {
-   df->iommufd = NULL;
+   if (ret)
goto out_put_kvm;
+
+   if (df->iommufd && device->open_count == 1) {
+   ret = vfio_iommufd_compat_attach_ioas(device, df->iommufd);
+   if (ret)
+   goto out_close_device;
}
 
/*
@@ -218,12 +222,17 @@ static int vfio_df_group_open(struct vfio_device_file *df)
 */
smp_store_release(&df->access_granted, true);
 
+   mutex_unlock(&device->dev_set->lock);
+   mutex_unlock(&device->group->group_lock);
+   return 0;
+
+out_close_device:
+   vfio_df_close(df);
 out_put_kvm:
+   df->iommufd = NULL;
if (device->open_count == 0)
vfio_device_put_kvm(device);
-
mutex_unlock(&device->dev_set->lock);
-
 out_unlock:
mutex_unlock(&device->group->group_lock);
return ret;
diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c
index 36f838dad084..91fdae69bb45 100644
--- a/drivers/vfio/iommufd.c
+++ b/drivers/vfio/iommufd.c
@@ -20,33 +20,32 @@ bool vfio_iommufd_device_has_compat_ioas(struct vfio_device 
*vdev,
 
 int vfio_iommufd_bind(struct vfio_device *vdev, struct iommufd_ctx *ictx)
 {
-   u32 ioas_id;
u32 device_id;
+
+   lockdep_assert_held(&vdev->dev_set->lock);
+
+   /* The legacy path has no way to return the device id */
+   return vdev->ops->bind_iommufd(vdev, ictx, &device_id);
+}
+
+int vfio_iommufd_compat_attach_ioas(struct vfio_device *vdev,
+   struct iommufd_ctx *ictx)
+{
+   u32 ioas_id;
int ret;
 
lockdep_assert_held(&vdev->dev_set->lock);
 
-   ret = vdev->ops->bind_iommufd(vdev, ictx, &device_id);
-   if (ret)
-   return ret;
+   /* compat noiommu does not need to do ioas attach */
+   if (vfio_device_is_noiommu(vdev))
+   return 0;
 
ret = iommufd_vfio_compat_ioas_get_id(ictx, &ioas_id);
if (ret)
-   goto err_unbind;
-   ret = vdev->ops->attach_ioas(vdev, &ioas_id);
-   if (ret)
-   goto err_unbind;
-
-   /*
-* The legacy path has no way to return the device id or the selected
-* pt_id
-*/
-   return 0;
+   return ret;
 
-err_unbind:
-   if (vdev->ops->unbind_iommufd)
-   vdev->ops->unbind_iommufd(vdev);
-   return ret;
+   /* The legacy path has no way to return the selected pt_id */
+   return vdev->ops->attach_ioas(vdev, &ioas_id);
 }
 
 void vfio_iommufd_unbind(struct vfio_device *vdev)
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 300cab04f4e1..04755379940c 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -238,6 +238,8 @@ bool vfio_iommufd_device_has_compat_ioas(struct vfio_device 
*vdev,
 struct iommufd_ctx *ictx);
 int vfio_iommufd_bind(struct vfio_device *device, struct iommufd_ctx *ictx);
 void vfio_iommufd_unbind(struct vfio_device *device);
+int vfio_iommufd_compat_attach_ioas(struct vfio_device *device,
+   struct iommufd_ctx *ictx);
 #else
 static inline bool
 vfio_iommufd_device_has_compat_ioas(struct vfio_device *vdev,
@@ -255,6 +257,13 @@ static inline int vfio_iommufd_bind(struct vfio_device 
*device,
 static inline void vfio_iommufd_unbind(struct vfio_device *device)
 {
 }
+
+static inline int
+vfio_iommufd_compat_attach_ioas(struct vfio_device *device,
+   struct iommufd_ctx *ictx)
+{
+   return -EOPNOTSUPP;
+}
 #endif
 
 #if IS_ENABLED(CONFIG_VFIO_VIRQFD)
-- 
2.34.1

[Intel-gfx] [PATCH v14 14/26] iommufd/device: Add iommufd_access_detach() API

[Yi Liu]

From: Nicolin Chen 

Previously, the detach routine is only done by the destroy(). And it was
called by vfio_iommufd_emulated_unbind() when the device runs close(), so
all the mappings in iopt were cleaned in that setup, when the call trace
reaches this detach() routine.

Now, there's a need of a detach uAPI, meaning that it does not only need
a new iommufd_access_detach() API, but also requires access->ops->unmap()
call as a cleanup. So add one.

However, leaving that unprotected can introduce some potential of a race
condition during the pin_/unpin_pages() call, where access->ioas->iopt is
getting referenced. So, add an ioas_lock to protect the context of iopt
referencings.

Also, to allow the iommufd_access_unpin_pages() callback to happen via
this unmap() call, add an ioas_unpin pointer, so the unpin routine won't
be affected by the "access->ioas = NULL" trick.

Reviewed-by: Kevin Tian 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Nicolin Chen 
Signed-off-by: Yi Liu 
---
 drivers/iommu/iommufd/device.c  | 74 +++--
 drivers/iommu/iommufd/iommufd_private.h |  2 +
 include/linux/iommufd.h |  1 +
 3 files changed, 72 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c
index cd5d8ab907f9..59fec5783eb9 100644
--- a/drivers/iommu/iommufd/device.c
+++ b/drivers/iommu/iommufd/device.c
@@ -486,6 +486,7 @@ iommufd_access_create(struct iommufd_ctx *ictx,
iommufd_ctx_get(ictx);
iommufd_object_finalize(ictx, &access->obj);
*id = access->obj.id;
+   mutex_init(&access->ioas_lock);
return access;
 }
 EXPORT_SYMBOL_NS_GPL(iommufd_access_create, IOMMUFD);
@@ -505,26 +506,60 @@ void iommufd_access_destroy(struct iommufd_access *access)
 }
 EXPORT_SYMBOL_NS_GPL(iommufd_access_destroy, IOMMUFD);
 
+void iommufd_access_detach(struct iommufd_access *access)
+{
+   struct iommufd_ioas *cur_ioas = access->ioas;
+
+   mutex_lock(&access->ioas_lock);
+   if (WARN_ON(!access->ioas))
+   goto out;
+   /*
+* Set ioas to NULL to block any further iommufd_access_pin_pages().
+* iommufd_access_unpin_pages() can continue using access->ioas_unpin.
+*/
+   access->ioas = NULL;
+
+   if (access->ops->unmap) {
+   mutex_unlock(&access->ioas_lock);
+   access->ops->unmap(access->data, 0, ULONG_MAX);
+   mutex_lock(&access->ioas_lock);
+   }
+   iopt_remove_access(&cur_ioas->iopt, access);
+   refcount_dec(&cur_ioas->obj.users);
+out:
+   access->ioas_unpin = NULL;
+   mutex_unlock(&access->ioas_lock);
+}
+EXPORT_SYMBOL_NS_GPL(iommufd_access_detach, IOMMUFD);
+
 int iommufd_access_attach(struct iommufd_access *access, u32 ioas_id)
 {
struct iommufd_ioas *new_ioas;
int rc = 0;
 
-   if (access->ioas)
+   mutex_lock(&access->ioas_lock);
+   if (WARN_ON(access->ioas || access->ioas_unpin)) {
+   mutex_unlock(&access->ioas_lock);
return -EINVAL;
+   }
 
new_ioas = iommufd_get_ioas(access->ictx, ioas_id);
-   if (IS_ERR(new_ioas))
+   if (IS_ERR(new_ioas)) {
+   mutex_unlock(&access->ioas_lock);
return PTR_ERR(new_ioas);
+   }
 
rc = iopt_add_access(&new_ioas->iopt, access);
if (rc) {
+   mutex_unlock(&access->ioas_lock);
iommufd_put_object(&new_ioas->obj);
return rc;
}
iommufd_ref_to_users(&new_ioas->obj);
 
access->ioas = new_ioas;
+   access->ioas_unpin = new_ioas;
+   mutex_unlock(&access->ioas_lock);
return 0;
 }
 EXPORT_SYMBOL_NS_GPL(iommufd_access_attach, IOMMUFD);
@@ -579,8 +614,8 @@ void iommufd_access_notify_unmap(struct io_pagetable *iopt, 
unsigned long iova,
 void iommufd_access_unpin_pages(struct iommufd_access *access,
unsigned long iova, unsigned long length)
 {
-   struct io_pagetable *iopt = &access->ioas->iopt;
struct iopt_area_contig_iter iter;
+   struct io_pagetable *iopt;
unsigned long last_iova;
struct iopt_area *area;
 
@@ -588,6 +623,17 @@ void iommufd_access_unpin_pages(struct iommufd_access 
*access,
WARN_ON(check_add_overflow(iova, length - 1, &last_iova)))
return;
 
+   mutex_lock(&access->ioas_lock);
+   /*
+* The driver must be doing something wrong if it calls this before an
+* iommufd_access_attach() or after an iommufd_access_detach().
+*/
+   if (WARN_ON(!access->ioas_unpin)) {
+   mutex_unlock(&access->ioas_lock);
+   return;
+   }
+   iopt = &access->ioas_unpin->iopt;
+
down_read(&iopt->iova_rwsem);
iopt_for_each_contig_area(&iter, area, iopt, iova, last_iova)
iopt_area_

[Intel-gfx] [PATCH v14 19/26] vfio: Test kvm pointer in _vfio_device_get_kvm_safe()

[Yi Liu]

This saves some lines when adding the kvm get logic for the vfio_device
cdev path.

This also renames _vfio_device_get_kvm_safe() to be vfio_device_get_kvm_safe().

Suggested-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c | 7 +--
 drivers/vfio/vfio.h  | 6 +++---
 drivers/vfio/vfio_main.c | 5 -
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index 41a09a2df690..5c17ad812313 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -160,12 +160,7 @@ static int vfio_group_ioctl_set_container(struct 
vfio_group *group,
 static void vfio_device_group_get_kvm_safe(struct vfio_device *device)
 {
spin_lock(&device->group->kvm_ref_lock);
-   if (!device->group->kvm)
-   goto unlock;
-
-   _vfio_device_get_kvm_safe(device, device->group->kvm);
-
-unlock:
+   vfio_device_get_kvm_safe(device, device->group->kvm);
spin_unlock(&device->group->kvm_ref_lock);
 }
 
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index fb8f2fac3d23..c2aa65382592 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -340,11 +340,11 @@ enum { vfio_noiommu = false };
 #endif
 
 #ifdef CONFIG_HAVE_KVM
-void _vfio_device_get_kvm_safe(struct vfio_device *device, struct kvm *kvm);
+void vfio_device_get_kvm_safe(struct vfio_device *device, struct kvm *kvm);
 void vfio_device_put_kvm(struct vfio_device *device);
 #else
-static inline void _vfio_device_get_kvm_safe(struct vfio_device *device,
-struct kvm *kvm)
+static inline void vfio_device_get_kvm_safe(struct vfio_device *device,
+   struct kvm *kvm)
 {
 }
 
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index 8a9ebcc6980b..5f7c3151d8c0 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -373,7 +373,7 @@ void vfio_unregister_group_dev(struct vfio_device *device)
 EXPORT_SYMBOL_GPL(vfio_unregister_group_dev);
 
 #ifdef CONFIG_HAVE_KVM
-void _vfio_device_get_kvm_safe(struct vfio_device *device, struct kvm *kvm)
+void vfio_device_get_kvm_safe(struct vfio_device *device, struct kvm *kvm)
 {
void (*pfn)(struct kvm *kvm);
bool (*fn)(struct kvm *kvm);
@@ -381,6 +381,9 @@ void _vfio_device_get_kvm_safe(struct vfio_device *device, 
struct kvm *kvm)
 
lockdep_assert_held(&device->dev_set->lock);
 
+   if (!kvm)
+   return;
+
pfn = symbol_get(kvm_put_kvm);
if (WARN_ON(!pfn))
return;
-- 
2.34.1

[Intel-gfx] [PATCH v14 10/26] vfio-iommufd: Move noiommu compat validation out of vfio_iommufd_bind()

[Yi Liu]

This moves the noiommu compat validation logic into vfio_df_group_open().
This is more consistent with what will be done in vfio device cdev path.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c   | 13 +
 drivers/vfio/iommufd.c | 22 --
 drivers/vfio/vfio.h|  9 +
 3 files changed, 30 insertions(+), 14 deletions(-)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index 4e6277191eb4..b8b77daf7aa6 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -192,6 +192,19 @@ static int vfio_df_group_open(struct vfio_device_file *df)
vfio_device_group_get_kvm_safe(device);
 
df->iommufd = device->group->iommufd;
+   if (df->iommufd && vfio_device_is_noiommu(device) && device->open_count 
== 0) {
+   /*
+* Require no compat ioas to be assigned to proceed.  The basic
+* statement is that the user cannot have done something that
+* implies they expected translation to exist
+*/
+   if (!capable(CAP_SYS_RAWIO) ||
+   vfio_iommufd_device_has_compat_ioas(device, df->iommufd))
+   ret = -EPERM;
+   else
+   ret = 0;
+   goto out_put_kvm;
+   }
 
ret = vfio_df_open(df);
if (ret) {
diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c
index afda47ee9663..36f838dad084 100644
--- a/drivers/vfio/iommufd.c
+++ b/drivers/vfio/iommufd.c
@@ -10,6 +10,14 @@
 MODULE_IMPORT_NS(IOMMUFD);
 MODULE_IMPORT_NS(IOMMUFD_VFIO);
 
+bool vfio_iommufd_device_has_compat_ioas(struct vfio_device *vdev,
+struct iommufd_ctx *ictx)
+{
+   u32 ioas_id;
+
+   return !iommufd_vfio_compat_ioas_get_id(ictx, &ioas_id);
+}
+
 int vfio_iommufd_bind(struct vfio_device *vdev, struct iommufd_ctx *ictx)
 {
u32 ioas_id;
@@ -18,20 +26,6 @@ int vfio_iommufd_bind(struct vfio_device *vdev, struct 
iommufd_ctx *ictx)
 
lockdep_assert_held(&vdev->dev_set->lock);
 
-   if (vfio_device_is_noiommu(vdev)) {
-   if (!capable(CAP_SYS_RAWIO))
-   return -EPERM;
-
-   /*
-* Require no compat ioas to be assigned to proceed. The basic
-* statement is that the user cannot have done something that
-* implies they expected translation to exist
-*/
-   if (!iommufd_vfio_compat_ioas_get_id(ictx, &ioas_id))
-   return -EPERM;
-   return 0;
-   }
-
ret = vdev->ops->bind_iommufd(vdev, ictx, &device_id);
if (ret)
return ret;
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 85484a971a3e..300cab04f4e1 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -234,9 +234,18 @@ static inline void vfio_container_cleanup(void)
 #endif
 
 #if IS_ENABLED(CONFIG_IOMMUFD)
+bool vfio_iommufd_device_has_compat_ioas(struct vfio_device *vdev,
+struct iommufd_ctx *ictx);
 int vfio_iommufd_bind(struct vfio_device *device, struct iommufd_ctx *ictx);
 void vfio_iommufd_unbind(struct vfio_device *device);
 #else
+static inline bool
+vfio_iommufd_device_has_compat_ioas(struct vfio_device *vdev,
+   struct iommufd_ctx *ictx)
+{
+   return false;
+}
+
 static inline int vfio_iommufd_bind(struct vfio_device *device,
struct iommufd_ctx *ictx)
 {
-- 
2.34.1

[Intel-gfx] [PATCH v14 16/26] vfio: Move vfio_device_group_unregister() to be the first operation in unregister

[Yi Liu]

This avoids endless vfio_device refcount increment by userspace, which
would keep blocking the vfio_unregister_group_dev().

Reviewed-by: Jason Gunthorpe 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Tested-by: Terrence Xu 
Signed-off-by: Yi Liu 
---
 drivers/vfio/vfio_main.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index c71c0d1a079f..6d45caa1f9a0 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -332,6 +332,12 @@ void vfio_unregister_group_dev(struct vfio_device *device)
bool interrupted = false;
long rc;
 
+   /*
+* Prevent new device opened by userspace via the
+* VFIO_GROUP_GET_DEVICE_FD in the group path.
+*/
+   vfio_device_group_unregister(device);
+
vfio_device_put_registration(device);
rc = try_wait_for_completion(&device->comp);
while (rc <= 0) {
@@ -355,8 +361,6 @@ void vfio_unregister_group_dev(struct vfio_device *device)
}
}
 
-   vfio_device_group_unregister(device);
-
/* Balances device_add in register path */
device_del(&device->device);
 
-- 
2.34.1

[Intel-gfx] [PATCH v14 17/26] vfio: Move device_del() before waiting for the last vfio_device registration refcount

[Yi Liu]

device_del() destroys the vfio-dev/vfioX under the sysfs for vfio_device.
There is no reason to keep it while the device is going to be unregistered.

This movement is also a preparation for adding vfio_device cdev. Kernel
should remove the cdev node of the vfio_device to avoid new registration
refcount increment while the device is going to be unregistered.

Signed-off-by: Yi Liu 
---
 drivers/vfio/vfio_main.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index 6d45caa1f9a0..294bb5ecfc1c 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -338,6 +338,9 @@ void vfio_unregister_group_dev(struct vfio_device *device)
 */
vfio_device_group_unregister(device);
 
+   /* Balances device_add in register path */
+   device_del(&device->device);
+
vfio_device_put_registration(device);
rc = try_wait_for_completion(&device->comp);
while (rc <= 0) {
@@ -361,9 +364,6 @@ void vfio_unregister_group_dev(struct vfio_device *device)
}
}
 
-   /* Balances device_add in register path */
-   device_del(&device->device);
-
/* Balances vfio_device_set_group in register path */
vfio_device_remove_group(device);
 }
-- 
2.34.1

[Intel-gfx] [PATCH v14 13/26] vfio-iommufd: Add detach_ioas support for physical VFIO devices

[Yi Liu]

This prepares for adding DETACH ioctl for physical VFIO devices.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 Documentation/driver-api/vfio.rst |  8 +---
 drivers/vfio/fsl-mc/vfio_fsl_mc.c |  1 +
 drivers/vfio/iommufd.c| 20 +++
 .../vfio/pci/hisilicon/hisi_acc_vfio_pci.c|  2 ++
 drivers/vfio/pci/mlx5/main.c  |  1 +
 drivers/vfio/pci/vfio_pci.c   |  1 +
 drivers/vfio/platform/vfio_amba.c |  1 +
 drivers/vfio/platform/vfio_platform.c |  1 +
 drivers/vfio/vfio_main.c  |  3 ++-
 include/linux/vfio.h  |  8 +++-
 10 files changed, 41 insertions(+), 5 deletions(-)

diff --git a/Documentation/driver-api/vfio.rst 
b/Documentation/driver-api/vfio.rst
index 68abc089d6dd..363e12c90b87 100644
--- a/Documentation/driver-api/vfio.rst
+++ b/Documentation/driver-api/vfio.rst
@@ -279,6 +279,7 @@ similar to a file operations structure::
struct iommufd_ctx *ictx, u32 
*out_device_id);
void(*unbind_iommufd)(struct vfio_device *vdev);
int (*attach_ioas)(struct vfio_device *vdev, u32 *pt_id);
+   void(*detach_ioas)(struct vfio_device *vdev);
int (*open_device)(struct vfio_device *vdev);
void(*close_device)(struct vfio_device *vdev);
ssize_t (*read)(struct vfio_device *vdev, char __user *buf,
@@ -315,9 +316,10 @@ container_of().
- The [un]bind_iommufd callbacks are issued when the device is bound to
  and unbound from iommufd.
 
-   - The attach_ioas callback is issued when the device is attached to an
- IOAS managed by the bound iommufd. The attached IOAS is automatically
- detached when the device is unbound from iommufd.
+   - The [de]attach_ioas callback is issued when the device is attached to
+ and detached from an IOAS managed by the bound iommufd. However, the
+ attached IOAS can also be automatically detached when the device is
+ unbound from iommufd.
 
- The read/write/mmap callbacks implement the device region access 
defined
  by the device's own VFIO_DEVICE_GET_REGION_INFO ioctl.
diff --git a/drivers/vfio/fsl-mc/vfio_fsl_mc.c 
b/drivers/vfio/fsl-mc/vfio_fsl_mc.c
index f2140e94d41e..116358a8f1cf 100644
--- a/drivers/vfio/fsl-mc/vfio_fsl_mc.c
+++ b/drivers/vfio/fsl-mc/vfio_fsl_mc.c
@@ -593,6 +593,7 @@ static const struct vfio_device_ops vfio_fsl_mc_ops = {
.bind_iommufd   = vfio_iommufd_physical_bind,
.unbind_iommufd = vfio_iommufd_physical_unbind,
.attach_ioas= vfio_iommufd_physical_attach_ioas,
+   .detach_ioas= vfio_iommufd_physical_detach_ioas,
 };
 
 static struct fsl_mc_driver vfio_fsl_mc_driver = {
diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c
index 4fc674c01a05..86df5415759a 100644
--- a/drivers/vfio/iommufd.c
+++ b/drivers/vfio/iommufd.c
@@ -140,6 +140,14 @@ int vfio_iommufd_physical_attach_ioas(struct vfio_device 
*vdev, u32 *pt_id)
 {
int rc;
 
+   lockdep_assert_held(&vdev->dev_set->lock);
+
+   if (WARN_ON(!vdev->iommufd_device))
+   return -EINVAL;
+
+   if (vdev->iommufd_attached)
+   return -EBUSY;
+
rc = iommufd_device_attach(vdev->iommufd_device, pt_id);
if (rc)
return rc;
@@ -148,6 +156,18 @@ int vfio_iommufd_physical_attach_ioas(struct vfio_device 
*vdev, u32 *pt_id)
 }
 EXPORT_SYMBOL_GPL(vfio_iommufd_physical_attach_ioas);
 
+void vfio_iommufd_physical_detach_ioas(struct vfio_device *vdev)
+{
+   lockdep_assert_held(&vdev->dev_set->lock);
+
+   if (WARN_ON(!vdev->iommufd_device) || !vdev->iommufd_attached)
+   return;
+
+   iommufd_device_detach(vdev->iommufd_device);
+   vdev->iommufd_attached = false;
+}
+EXPORT_SYMBOL_GPL(vfio_iommufd_physical_detach_ioas);
+
 /*
  * The emulated standard ops mean that vfio_device is going to use the
  * "mdev path" and will call vfio_pin_pages()/vfio_dma_rw(). Drivers using this
diff --git a/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c 
b/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
index a117eaf21c14..b2f9778c8366 100644
--- a/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
+++ b/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
@@ -1373,6 +1373,7 @@ static const struct vfio_device_ops 
hisi_acc_vfio_pci_migrn_ops = {
.bind_iommufd = vfio_iommufd_physical_bind,
.unbind_iommufd = vfio_iommufd_physical_unbind,
.attach_ioas = vfio_iommufd_physical_attach_ioas,
+   .detach_ioas = vfio_iommufd_physical_detach_ioas,
 };
 
 static const struct vfio_device_ops hisi_acc_vfio_pci_ops = {
@@ -1391,6 +1392,7 @@ static const struc

[Intel-gfx] [PATCH v14 15/26] vfio-iommufd: Add detach_ioas support for emulated VFIO devices

[Yi Liu]

This prepares for adding DETACH ioctl for emulated VFIO devices.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/gpu/drm/i915/gvt/kvmgt.c  |  1 +
 drivers/s390/cio/vfio_ccw_ops.c   |  1 +
 drivers/s390/crypto/vfio_ap_ops.c |  1 +
 drivers/vfio/iommufd.c| 13 +
 include/linux/vfio.h  |  3 +++
 samples/vfio-mdev/mbochs.c|  1 +
 samples/vfio-mdev/mdpy.c  |  1 +
 samples/vfio-mdev/mtty.c  |  1 +
 8 files changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index de675d799c7d..9cd9e9da60dd 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -1474,6 +1474,7 @@ static const struct vfio_device_ops intel_vgpu_dev_ops = {
.bind_iommufd   = vfio_iommufd_emulated_bind,
.unbind_iommufd = vfio_iommufd_emulated_unbind,
.attach_ioas= vfio_iommufd_emulated_attach_ioas,
+   .detach_ioas= vfio_iommufd_emulated_detach_ioas,
 };
 
 static int intel_vgpu_probe(struct mdev_device *mdev)
diff --git a/drivers/s390/cio/vfio_ccw_ops.c b/drivers/s390/cio/vfio_ccw_ops.c
index 5b53b94f13c7..cba4971618ff 100644
--- a/drivers/s390/cio/vfio_ccw_ops.c
+++ b/drivers/s390/cio/vfio_ccw_ops.c
@@ -632,6 +632,7 @@ static const struct vfio_device_ops vfio_ccw_dev_ops = {
.bind_iommufd = vfio_iommufd_emulated_bind,
.unbind_iommufd = vfio_iommufd_emulated_unbind,
.attach_ioas = vfio_iommufd_emulated_attach_ioas,
+   .detach_ioas = vfio_iommufd_emulated_detach_ioas,
 };
 
 struct mdev_driver vfio_ccw_mdev_driver = {
diff --git a/drivers/s390/crypto/vfio_ap_ops.c 
b/drivers/s390/crypto/vfio_ap_ops.c
index b441745b0418..2d3c3a79b687 100644
--- a/drivers/s390/crypto/vfio_ap_ops.c
+++ b/drivers/s390/crypto/vfio_ap_ops.c
@@ -1975,6 +1975,7 @@ static const struct vfio_device_ops 
vfio_ap_matrix_dev_ops = {
.bind_iommufd = vfio_iommufd_emulated_bind,
.unbind_iommufd = vfio_iommufd_emulated_unbind,
.attach_ioas = vfio_iommufd_emulated_attach_ioas,
+   .detach_ioas = vfio_iommufd_emulated_detach_ioas,
.request = vfio_ap_mdev_request
 };
 
diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c
index 86df5415759a..4d84904fd927 100644
--- a/drivers/vfio/iommufd.c
+++ b/drivers/vfio/iommufd.c
@@ -231,3 +231,16 @@ int vfio_iommufd_emulated_attach_ioas(struct vfio_device 
*vdev, u32 *pt_id)
return 0;
 }
 EXPORT_SYMBOL_GPL(vfio_iommufd_emulated_attach_ioas);
+
+void vfio_iommufd_emulated_detach_ioas(struct vfio_device *vdev)
+{
+   lockdep_assert_held(&vdev->dev_set->lock);
+
+   if (WARN_ON(!vdev->iommufd_access) ||
+   !vdev->iommufd_attached)
+   return;
+
+   iommufd_access_detach(vdev->iommufd_access);
+   vdev->iommufd_attached = false;
+}
+EXPORT_SYMBOL_GPL(vfio_iommufd_emulated_detach_ioas);
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index f2f02273ece1..24091a7c7bdb 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -128,6 +128,7 @@ int vfio_iommufd_emulated_bind(struct vfio_device *vdev,
   struct iommufd_ctx *ictx, u32 *out_device_id);
 void vfio_iommufd_emulated_unbind(struct vfio_device *vdev);
 int vfio_iommufd_emulated_attach_ioas(struct vfio_device *vdev, u32 *pt_id);
+void vfio_iommufd_emulated_detach_ioas(struct vfio_device *vdev);
 #else
 static inline struct iommufd_ctx *
 vfio_iommufd_device_ictx(struct vfio_device *vdev)
@@ -157,6 +158,8 @@ vfio_iommufd_get_dev_id(struct vfio_device *vdev, struct 
iommufd_ctx *ictx)
((void (*)(struct vfio_device *vdev)) NULL)
 #define vfio_iommufd_emulated_attach_ioas \
((int (*)(struct vfio_device *vdev, u32 *pt_id)) NULL)
+#define vfio_iommufd_emulated_detach_ioas \
+   ((void (*)(struct vfio_device *vdev)) NULL)
 #endif
 
 static inline bool vfio_device_cdev_opened(struct vfio_device *device)
diff --git a/samples/vfio-mdev/mbochs.c b/samples/vfio-mdev/mbochs.c
index c6c6b5d26670..3764d1911b51 100644
--- a/samples/vfio-mdev/mbochs.c
+++ b/samples/vfio-mdev/mbochs.c
@@ -1377,6 +1377,7 @@ static const struct vfio_device_ops mbochs_dev_ops = {
.bind_iommufd   = vfio_iommufd_emulated_bind,
.unbind_iommufd = vfio_iommufd_emulated_unbind,
.attach_ioas= vfio_iommufd_emulated_attach_ioas,
+   .detach_ioas= vfio_iommufd_emulated_detach_ioas,
 };
 
 static struct mdev_driver mbochs_driver = {
diff --git a/samples/vfio-mdev/mdpy.c b/samples/vfio-mdev/mdpy.c
index a62ea11e20ec..064e1c0a7aa8 100644
--- a/samples/vfio-mdev/mdpy.c
+++ b/samples/vfio-mdev/mdpy.c
@@ -666,6 +666,7 @@ static const struct vfio_device_ops mdpy_dev_ops = {
.bind_iommufd   = vfio_iommufd_emulated_bind,
.unbind_iommufd = vfio_iommufd_emulated_unbind,

[Intel-gfx] [PATCH v14 05/26] kvm/vfio: Accept vfio device file from userspace

[Yi Liu]

This defines KVM_DEV_VFIO_FILE* and make alias with KVM_DEV_VFIO_GROUP*.
Old userspace uses KVM_DEV_VFIO_GROUP* works as well.

Reviewed-by: Jason Gunthorpe 
Reviewed-by: Kevin Tian 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 Documentation/virt/kvm/devices/vfio.rst | 47 -
 include/uapi/linux/kvm.h| 13 +--
 virt/kvm/vfio.c | 12 +++
 3 files changed, 47 insertions(+), 25 deletions(-)

diff --git a/Documentation/virt/kvm/devices/vfio.rst 
b/Documentation/virt/kvm/devices/vfio.rst
index 08b544212638..c549143bb891 100644
--- a/Documentation/virt/kvm/devices/vfio.rst
+++ b/Documentation/virt/kvm/devices/vfio.rst
@@ -9,22 +9,34 @@ Device types supported:
   - KVM_DEV_TYPE_VFIO
 
 Only one VFIO instance may be created per VM.  The created device
-tracks VFIO groups in use by the VM and features of those groups
-important to the correctness and acceleration of the VM.  As groups
-are enabled and disabled for use by the VM, KVM should be updated
-about their presence.  When registered with KVM, a reference to the
-VFIO-group is held by KVM.
+tracks VFIO files (group or device) in use by the VM and features
+of those groups/devices important to the correctness and acceleration
+of the VM.  As groups/devices are enabled and disabled for use by the
+VM, KVM should be updated about their presence.  When registered with
+KVM, a reference to the VFIO file is held by KVM.
 
 Groups:
-  KVM_DEV_VFIO_GROUP
-
-KVM_DEV_VFIO_GROUP attributes:
-  KVM_DEV_VFIO_GROUP_ADD: Add a VFIO group to VFIO-KVM device tracking
-   kvm_device_attr.addr points to an int32_t file descriptor
-   for the VFIO group.
-  KVM_DEV_VFIO_GROUP_DEL: Remove a VFIO group from VFIO-KVM device tracking
-   kvm_device_attr.addr points to an int32_t file descriptor
-   for the VFIO group.
+  KVM_DEV_VFIO_FILE
+   alias: KVM_DEV_VFIO_GROUP
+
+KVM_DEV_VFIO_FILE attributes:
+  KVM_DEV_VFIO_FILE_ADD: Add a VFIO file (group/device) to VFIO-KVM device
+   tracking
+
+   kvm_device_attr.addr points to an int32_t file descriptor for the
+   VFIO file.
+
+  KVM_DEV_VFIO_FILE_DEL: Remove a VFIO file (group/device) from VFIO-KVM
+   device tracking
+
+   kvm_device_attr.addr points to an int32_t file descriptor for the
+   VFIO file.
+
+KVM_DEV_VFIO_GROUP (legacy kvm device group restricted to the handling of VFIO 
group fd):
+  KVM_DEV_VFIO_GROUP_ADD: same as KVM_DEV_VFIO_FILE_ADD for group fd only
+
+  KVM_DEV_VFIO_GROUP_DEL: same as KVM_DEV_VFIO_FILE_DEL for group fd only
+
   KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE: attaches a guest visible TCE table
allocated by sPAPR KVM.
kvm_device_attr.addr points to a struct::
@@ -40,7 +52,10 @@ KVM_DEV_VFIO_GROUP attributes:
- @tablefd is a file descriptor for a TCE table allocated via
  KVM_CREATE_SPAPR_TCE.
 
-The GROUP_ADD operation above should be invoked prior to accessing the
+The FILE/GROUP_ADD operation above should be invoked prior to accessing the
 device file descriptor via VFIO_GROUP_GET_DEVICE_FD in order to support
 drivers which require a kvm pointer to be set in their .open_device()
-callback.
+callback.  It is the same for device file descriptor via character device
+open which gets device access via VFIO_DEVICE_BIND_IOMMUFD.  For such file
+descriptors, FILE_ADD should be invoked before VFIO_DEVICE_BIND_IOMMUFD
+to support the drivers mentioned in prior sentence as well.
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index f089ab290978..13065dd96132 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1418,9 +1418,16 @@ struct kvm_device_attr {
__u64   addr;   /* userspace address of attr data */
 };
 
-#define  KVM_DEV_VFIO_GROUP1
-#define   KVM_DEV_VFIO_GROUP_ADD   1
-#define   KVM_DEV_VFIO_GROUP_DEL   2
+#define  KVM_DEV_VFIO_FILE 1
+
+#define   KVM_DEV_VFIO_FILE_ADD1
+#define   KVM_DEV_VFIO_FILE_DEL2
+
+/* KVM_DEV_VFIO_GROUP aliases are for compile time uapi compatibility */
+#define  KVM_DEV_VFIO_GROUPKVM_DEV_VFIO_FILE
+
+#define   KVM_DEV_VFIO_GROUP_ADD   KVM_DEV_VFIO_FILE_ADD
+#define   KVM_DEV_VFIO_GROUP_DEL   KVM_DEV_VFIO_FILE_DEL
 #define   KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3
 
 enum kvm_device_type {
diff --git a/virt/kvm/vfio.c b/virt/kvm/vfio.c
index 8f7fa07e8170..07cb5f44b2a2 100644
--- a/virt/kvm/vfio.c
+++ b/virt/kvm/vfio.c
@@ -286,12 +286,12 @@ static int kvm_vfio_set_file(struct kvm_device *dev, long 
attr,
int32_t fd;
 
switch (attr) {
-   case KVM_DEV_VFIO_GROUP_ADD:
+   case KVM_DEV_VFIO_FILE_ADD:
if (get_user(fd, argp))
return -EFAULT;
return kvm_vfio_file

[Intel-gfx] [PATCH v14 08/26] vfio: Add cdev_device_open_cnt to vfio_group

[Yi Liu]

This is for counting the devices that are opened via the cdev path. This
count is increased and decreased by the cdev path. The group path checks
it to achieve exclusion with the cdev path. With this, only one path
(group path or cdev path) will claim DMA ownership. This avoids scenarios
in which devices within the same group may be opened via different paths.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Reviewed-by: Eric Auger 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c | 33 +
 drivers/vfio/vfio.h  |  3 +++
 2 files changed, 36 insertions(+)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index 088dd34c8931..2751d61689c4 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -383,6 +383,33 @@ static long vfio_group_fops_unl_ioctl(struct file *filep,
}
 }
 
+int vfio_device_block_group(struct vfio_device *device)
+{
+   struct vfio_group *group = device->group;
+   int ret = 0;
+
+   mutex_lock(&group->group_lock);
+   if (group->opened_file) {
+   ret = -EBUSY;
+   goto out_unlock;
+   }
+
+   group->cdev_device_open_cnt++;
+
+out_unlock:
+   mutex_unlock(&group->group_lock);
+   return ret;
+}
+
+void vfio_device_unblock_group(struct vfio_device *device)
+{
+   struct vfio_group *group = device->group;
+
+   mutex_lock(&group->group_lock);
+   group->cdev_device_open_cnt--;
+   mutex_unlock(&group->group_lock);
+}
+
 static int vfio_group_fops_open(struct inode *inode, struct file *filep)
 {
struct vfio_group *group =
@@ -405,6 +432,11 @@ static int vfio_group_fops_open(struct inode *inode, 
struct file *filep)
goto out_unlock;
}
 
+   if (group->cdev_device_open_cnt) {
+   ret = -EBUSY;
+   goto out_unlock;
+   }
+
/*
 * Do we need multiple instances of the group open?  Seems not.
 */
@@ -479,6 +511,7 @@ static void vfio_group_release(struct device *dev)
mutex_destroy(&group->device_lock);
mutex_destroy(&group->group_lock);
WARN_ON(group->iommu_group);
+   WARN_ON(group->cdev_device_open_cnt);
ida_free(&vfio.group_ida, MINOR(group->dev.devt));
kfree(group);
 }
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 4478a1e77a5e..ae7dd2ca14b9 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -84,8 +84,11 @@ struct vfio_group {
struct blocking_notifier_head   notifier;
struct iommufd_ctx  *iommufd;
spinlock_t  kvm_ref_lock;
+   unsigned intcdev_device_open_cnt;
 };
 
+int vfio_device_block_group(struct vfio_device *device);
+void vfio_device_unblock_group(struct vfio_device *device);
 int vfio_device_set_group(struct vfio_device *device,
  enum vfio_group_type type);
 void vfio_device_remove_group(struct vfio_device *device);
-- 
2.34.1

[Intel-gfx] [PATCH v14 09/26] vfio: Make vfio_df_open() single open for device cdev path

[Yi Liu]

VFIO group has historically allowed multi-open of the device FD. This
was made secure because the "open" was executed via an ioctl to the
group FD which is itself only single open.

However, no known use of multiple device FDs today. It is kind of a
strange thing to do because new device FDs can naturally be created
via dup().

When we implement the new device uAPI (only used in cdev path) there is
no natural way to allow the device itself from being multi-opened in a
secure manner. Without the group FD we cannot prove the security context
of the opener.

Thus, when moving to the new uAPI we block the ability of opening
a device multiple times. Given old group path still allows it we store
a vfio_group pointer in struct vfio_device_file to differentiate.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Reviewed-by: Eric Auger 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c | 2 ++
 drivers/vfio/vfio.h  | 1 +
 drivers/vfio/vfio_main.c | 7 +++
 3 files changed, 10 insertions(+)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index 2751d61689c4..4e6277191eb4 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -245,6 +245,8 @@ static struct file *vfio_device_open_file(struct 
vfio_device *device)
goto err_out;
}
 
+   df->group = device->group;
+
ret = vfio_df_group_open(df);
if (ret)
goto err_free;
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index ae7dd2ca14b9..85484a971a3e 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -18,6 +18,7 @@ struct vfio_container;
 
 struct vfio_device_file {
struct vfio_device *device;
+   struct vfio_group *group;
 
u8 access_granted;
spinlock_t kvm_ref_lock; /* protect kvm field */
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index c37fc14599d0..be5e4ddd5901 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -492,6 +492,13 @@ int vfio_df_open(struct vfio_device_file *df)
 
lockdep_assert_held(&device->dev_set->lock);
 
+   /*
+* Only the group path allows the device to be opened multiple
+* times.  The device cdev path doesn't have a secure way for it.
+*/
+   if (device->open_count != 0 && !df->group)
+   return -EINVAL;
+
device->open_count++;
if (device->open_count == 1) {
ret = vfio_df_device_first_open(df);
-- 
2.34.1

[Intel-gfx] [PATCH v14 04/26] kvm/vfio: Prepare for accepting vfio device fd

[Yi Liu]

This renames kvm_vfio_group related helpers to prepare for accepting
vfio device fd. No functional change is intended.

Reviewed-by: Kevin Tian 
Reviewed-by: Eric Auger 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 virt/kvm/vfio.c | 115 
 1 file changed, 58 insertions(+), 57 deletions(-)

diff --git a/virt/kvm/vfio.c b/virt/kvm/vfio.c
index b33c7b8488b3..8f7fa07e8170 100644
--- a/virt/kvm/vfio.c
+++ b/virt/kvm/vfio.c
@@ -21,7 +21,7 @@
 #include 
 #endif
 
-struct kvm_vfio_group {
+struct kvm_vfio_file {
struct list_head node;
struct file *file;
 #ifdef CONFIG_SPAPR_TCE_IOMMU
@@ -30,7 +30,7 @@ struct kvm_vfio_group {
 };
 
 struct kvm_vfio {
-   struct list_head group_list;
+   struct list_head file_list;
struct mutex lock;
bool noncoherent;
 };
@@ -98,34 +98,35 @@ static struct iommu_group *kvm_vfio_file_iommu_group(struct 
file *file)
 }
 
 static void kvm_spapr_tce_release_vfio_group(struct kvm *kvm,
-struct kvm_vfio_group *kvg)
+struct kvm_vfio_file *kvf)
 {
-   if (WARN_ON_ONCE(!kvg->iommu_group))
+   if (WARN_ON_ONCE(!kvf->iommu_group))
return;
 
-   kvm_spapr_tce_release_iommu_group(kvm, kvg->iommu_group);
-   iommu_group_put(kvg->iommu_group);
-   kvg->iommu_group = NULL;
+   kvm_spapr_tce_release_iommu_group(kvm, kvf->iommu_group);
+   iommu_group_put(kvf->iommu_group);
+   kvf->iommu_group = NULL;
 }
 #endif
 
 /*
- * Groups can use the same or different IOMMU domains.  If the same then
- * adding a new group may change the coherency of groups we've previously
- * been told about.  We don't want to care about any of that so we retest
- * each group and bail as soon as we find one that's noncoherent.  This
- * means we only ever [un]register_noncoherent_dma once for the whole device.
+ * Groups/devices can use the same or different IOMMU domains. If the same
+ * then adding a new group/device may change the coherency of groups/devices
+ * we've previously been told about. We don't want to care about any of
+ * that so we retest each group/device and bail as soon as we find one that's
+ * noncoherent.  This means we only ever [un]register_noncoherent_dma once
+ * for the whole device.
  */
 static void kvm_vfio_update_coherency(struct kvm_device *dev)
 {
struct kvm_vfio *kv = dev->private;
bool noncoherent = false;
-   struct kvm_vfio_group *kvg;
+   struct kvm_vfio_file *kvf;
 
mutex_lock(&kv->lock);
 
-   list_for_each_entry(kvg, &kv->group_list, node) {
-   if (!kvm_vfio_file_enforced_coherent(kvg->file)) {
+   list_for_each_entry(kvf, &kv->file_list, node) {
+   if (!kvm_vfio_file_enforced_coherent(kvf->file)) {
noncoherent = true;
break;
}
@@ -143,10 +144,10 @@ static void kvm_vfio_update_coherency(struct kvm_device 
*dev)
mutex_unlock(&kv->lock);
 }
 
-static int kvm_vfio_group_add(struct kvm_device *dev, unsigned int fd)
+static int kvm_vfio_file_add(struct kvm_device *dev, unsigned int fd)
 {
struct kvm_vfio *kv = dev->private;
-   struct kvm_vfio_group *kvg;
+   struct kvm_vfio_file *kvf;
struct file *filp;
int ret;
 
@@ -162,27 +163,27 @@ static int kvm_vfio_group_add(struct kvm_device *dev, 
unsigned int fd)
 
mutex_lock(&kv->lock);
 
-   list_for_each_entry(kvg, &kv->group_list, node) {
-   if (kvg->file == filp) {
+   list_for_each_entry(kvf, &kv->file_list, node) {
+   if (kvf->file == filp) {
ret = -EEXIST;
goto err_unlock;
}
}
 
-   kvg = kzalloc(sizeof(*kvg), GFP_KERNEL_ACCOUNT);
-   if (!kvg) {
+   kvf = kzalloc(sizeof(*kvf), GFP_KERNEL_ACCOUNT);
+   if (!kvf) {
ret = -ENOMEM;
goto err_unlock;
}
 
-   kvg->file = filp;
-   list_add_tail(&kvg->node, &kv->group_list);
+   kvf->file = filp;
+   list_add_tail(&kvf->node, &kv->file_list);
 
kvm_arch_start_assignment(dev->kvm);
 
mutex_unlock(&kv->lock);
 
-   kvm_vfio_file_set_kvm(kvg->file, dev->kvm);
+   kvm_vfio_file_set_kvm(kvf->file, dev->kvm);
kvm_vfio_update_coherency(dev);
 
return 0;
@@ -193,10 +194,10 @@ static int kvm_vfio_group_add(struct kvm_device *dev, 
unsigned int fd)
return ret;
 }
 
-static int kvm_vfio_group_del(struct kvm_device *dev, unsigned int fd)
+static int kvm_vfio_file_del(struct kvm_device *dev, unsigned int fd)
 {
struct kvm_vfio *kv = dev->private;
-   struct kvm_vfio_group *kvg;
+   struct kvm_vfio_file *kvf;
struct fd f;
 

[Intel-gfx] [PATCH v14 07/26] vfio: Block device access via device fd until device is opened

[Yi Liu]

Allow the vfio_device file to be in a state where the device FD is
opened but the device cannot be used by userspace (i.e. its .open_device()
hasn't been called). This inbetween state is not used when the device
FD is spawned from the group FD, however when we create the device FD
directly by opening a cdev it will be opened in the blocked state.

The reason for the inbetween state is that userspace only gets a FD but
doesn't gain access permission until binding the FD to an iommufd. So in
the blocked state, only the bind operation is allowed. Completing bind
will allow user to further access the device.

This is implemented by adding a flag in struct vfio_device_file to mark
the blocked state and using a simple smp_load_acquire() to obtain the
flag value and serialize all the device setup with the thread accessing
this device.

Following this lockless scheme, it can safely handle the device FD
unbound->bound but it cannot handle bound->unbound. To allow this we'd
need to add a lock on all the vfio ioctls which seems costly. So once
device FD is bound, it remains bound until the FD is closed.

Suggested-by: Jason Gunthorpe 
Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Reviewed-by: Eric Auger 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c | 11 ++-
 drivers/vfio/vfio.h  |  1 +
 drivers/vfio/vfio_main.c | 16 
 3 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index caf53716ddb2..088dd34c8931 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -194,9 +194,18 @@ static int vfio_df_group_open(struct vfio_device_file *df)
df->iommufd = device->group->iommufd;
 
ret = vfio_df_open(df);
-   if (ret)
+   if (ret) {
df->iommufd = NULL;
+   goto out_put_kvm;
+   }
+
+   /*
+* Paired with smp_load_acquire() in vfio_device_fops::ioctl/
+* read/write/mmap and vfio_file_has_device_access()
+*/
+   smp_store_release(&df->access_granted, true);
 
+out_put_kvm:
if (device->open_count == 0)
vfio_device_put_kvm(device);
 
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 2094f5a4ef04..4478a1e77a5e 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -19,6 +19,7 @@ struct vfio_container;
 struct vfio_device_file {
struct vfio_device *device;
 
+   u8 access_granted;
spinlock_t kvm_ref_lock; /* protect kvm field */
struct kvm *kvm;
struct iommufd_ctx *iommufd; /* protected by struct 
vfio_device_set::lock */
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index 825b1eeaebe2..c37fc14599d0 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -1129,6 +1129,10 @@ static long vfio_device_fops_unl_ioctl(struct file 
*filep,
struct vfio_device *device = df->device;
int ret;
 
+   /* Paired with smp_store_release() following vfio_df_open() */
+   if (!smp_load_acquire(&df->access_granted))
+   return -EINVAL;
+
ret = vfio_device_pm_runtime_get(device);
if (ret)
return ret;
@@ -1156,6 +1160,10 @@ static ssize_t vfio_device_fops_read(struct file *filep, 
char __user *buf,
struct vfio_device_file *df = filep->private_data;
struct vfio_device *device = df->device;
 
+   /* Paired with smp_store_release() following vfio_df_open() */
+   if (!smp_load_acquire(&df->access_granted))
+   return -EINVAL;
+
if (unlikely(!device->ops->read))
return -EINVAL;
 
@@ -1169,6 +1177,10 @@ static ssize_t vfio_device_fops_write(struct file *filep,
struct vfio_device_file *df = filep->private_data;
struct vfio_device *device = df->device;
 
+   /* Paired with smp_store_release() following vfio_df_open() */
+   if (!smp_load_acquire(&df->access_granted))
+   return -EINVAL;
+
if (unlikely(!device->ops->write))
return -EINVAL;
 
@@ -1180,6 +1192,10 @@ static int vfio_device_fops_mmap(struct file *filep, 
struct vm_area_struct *vma)
struct vfio_device_file *df = filep->private_data;
struct vfio_device *device = df->device;
 
+   /* Paired with smp_store_release() following vfio_df_open() */
+   if (!smp_load_acquire(&df->access_granted))
+   return -EINVAL;
+
if (unlikely(!device->ops->mmap))
return -EINVAL;
 
-- 
2.34.1

[Intel-gfx] [PATCH v14 06/26] vfio: Pass struct vfio_device_file * to vfio_device_open/close()

[Yi Liu]

This avoids passing too much parameters in multiple functions. Per the
input parameter change, rename the function to be vfio_df_open/close().

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Reviewed-by: Eric Auger 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c | 20 ++--
 drivers/vfio/vfio.h  |  8 
 drivers/vfio/vfio_main.c | 25 +++--
 3 files changed, 33 insertions(+), 20 deletions(-)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index b56e19d2a02d..caf53716ddb2 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -169,8 +169,9 @@ static void vfio_device_group_get_kvm_safe(struct 
vfio_device *device)
spin_unlock(&device->group->kvm_ref_lock);
 }
 
-static int vfio_device_group_open(struct vfio_device *device)
+static int vfio_df_group_open(struct vfio_device_file *df)
 {
+   struct vfio_device *device = df->device;
int ret;
 
mutex_lock(&device->group->group_lock);
@@ -190,7 +191,11 @@ static int vfio_device_group_open(struct vfio_device 
*device)
if (device->open_count == 0)
vfio_device_group_get_kvm_safe(device);
 
-   ret = vfio_device_open(device, device->group->iommufd);
+   df->iommufd = device->group->iommufd;
+
+   ret = vfio_df_open(df);
+   if (ret)
+   df->iommufd = NULL;
 
if (device->open_count == 0)
vfio_device_put_kvm(device);
@@ -202,12 +207,15 @@ static int vfio_device_group_open(struct vfio_device 
*device)
return ret;
 }
 
-void vfio_device_group_close(struct vfio_device *device)
+void vfio_df_group_close(struct vfio_device_file *df)
 {
+   struct vfio_device *device = df->device;
+
mutex_lock(&device->group->group_lock);
mutex_lock(&device->dev_set->lock);
 
-   vfio_device_close(device, device->group->iommufd);
+   vfio_df_close(df);
+   df->iommufd = NULL;
 
if (device->open_count == 0)
vfio_device_put_kvm(device);
@@ -228,7 +236,7 @@ static struct file *vfio_device_open_file(struct 
vfio_device *device)
goto err_out;
}
 
-   ret = vfio_device_group_open(device);
+   ret = vfio_df_group_open(df);
if (ret)
goto err_free;
 
@@ -260,7 +268,7 @@ static struct file *vfio_device_open_file(struct 
vfio_device *device)
return filep;
 
 err_close_device:
-   vfio_device_group_close(device);
+   vfio_df_group_close(df);
 err_free:
kfree(df);
 err_out:
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 332528af0846..2094f5a4ef04 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -21,13 +21,13 @@ struct vfio_device_file {
 
spinlock_t kvm_ref_lock; /* protect kvm field */
struct kvm *kvm;
+   struct iommufd_ctx *iommufd; /* protected by struct 
vfio_device_set::lock */
 };
 
 void vfio_device_put_registration(struct vfio_device *device);
 bool vfio_device_try_get_registration(struct vfio_device *device);
-int vfio_device_open(struct vfio_device *device, struct iommufd_ctx *iommufd);
-void vfio_device_close(struct vfio_device *device,
-  struct iommufd_ctx *iommufd);
+int vfio_df_open(struct vfio_device_file *df);
+void vfio_df_close(struct vfio_device_file *df);
 struct vfio_device_file *
 vfio_allocate_device_file(struct vfio_device *device);
 
@@ -92,7 +92,7 @@ void vfio_device_group_register(struct vfio_device *device);
 void vfio_device_group_unregister(struct vfio_device *device);
 int vfio_device_group_use_iommu(struct vfio_device *device);
 void vfio_device_group_unuse_iommu(struct vfio_device *device);
-void vfio_device_group_close(struct vfio_device *device);
+void vfio_df_group_close(struct vfio_device_file *df);
 struct vfio_group *vfio_group_from_file(struct file *file);
 bool vfio_group_enforced_coherent(struct vfio_group *group);
 void vfio_group_set_kvm(struct vfio_group *group, struct kvm *kvm);
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index 8ef9210ad2aa..825b1eeaebe2 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -434,9 +434,10 @@ vfio_allocate_device_file(struct vfio_device *device)
return df;
 }
 
-static int vfio_device_first_open(struct vfio_device *device,
- struct iommufd_ctx *iommufd)
+static int vfio_df_device_first_open(struct vfio_device_file *df)
 {
+   struct vfio_device *device = df->device;
+   struct iommufd_ctx *iommufd = df->iommufd;
int ret;
 
lockdep_assert_held(&device->dev_set->lock);
@@ -468,9 +469,11 @@ static int vfio_device_first_open(struct vfio_device 
*device,
return ret;
 }
 
-static void vfio_device_last_close(struct vfio_device *device,
-  struct iommufd_ctx *iommufd)
+static void 

[Intel-gfx] [PATCH v14 03/26] vfio: Accept vfio device file in the KVM facing kAPI

[Yi Liu]

This makes the vfio file kAPIs to accept vfio device files, also a
preparation for vfio device cdev support.

For the kvm set with vfio device file, kvm pointer is stored in struct
vfio_device_file, and use kvm_ref_lock to protect kvm set and kvm
pointer usage within VFIO. This kvm pointer will be set to vfio_device
after device file is bound to iommufd in the cdev path.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/vfio.h  |  3 +++
 drivers/vfio/vfio_main.c | 36 +++-
 2 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index b1e327a85a32..332528af0846 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -18,6 +18,9 @@ struct vfio_container;
 
 struct vfio_device_file {
struct vfio_device *device;
+
+   spinlock_t kvm_ref_lock; /* protect kvm field */
+   struct kvm *kvm;
 };
 
 void vfio_device_put_registration(struct vfio_device *device);
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index 4665791aa2eb..8ef9210ad2aa 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -429,6 +429,7 @@ vfio_allocate_device_file(struct vfio_device *device)
return ERR_PTR(-ENOMEM);
 
df->device = device;
+   spin_lock_init(&df->kvm_ref_lock);
 
return df;
 }
@@ -1190,13 +1191,23 @@ const struct file_operations vfio_device_fops = {
.mmap   = vfio_device_fops_mmap,
 };
 
+static struct vfio_device *vfio_device_from_file(struct file *file)
+{
+   struct vfio_device_file *df = file->private_data;
+
+   if (file->f_op != &vfio_device_fops)
+   return NULL;
+   return df->device;
+}
+
 /**
  * vfio_file_is_valid - True if the file is valid vfio file
  * @file: VFIO group file or VFIO device file
  */
 bool vfio_file_is_valid(struct file *file)
 {
-   return vfio_group_from_file(file);
+   return vfio_group_from_file(file) ||
+  vfio_device_from_file(file);
 }
 EXPORT_SYMBOL_GPL(vfio_file_is_valid);
 
@@ -1211,16 +1222,36 @@ EXPORT_SYMBOL_GPL(vfio_file_is_valid);
  */
 bool vfio_file_enforced_coherent(struct file *file)
 {
+   struct vfio_device *device;
struct vfio_group *group;
 
group = vfio_group_from_file(file);
if (group)
return vfio_group_enforced_coherent(group);
 
+   device = vfio_device_from_file(file);
+   if (device)
+   return device_iommu_capable(device->dev,
+   IOMMU_CAP_ENFORCE_CACHE_COHERENCY);
+
return true;
 }
 EXPORT_SYMBOL_GPL(vfio_file_enforced_coherent);
 
+static void vfio_device_file_set_kvm(struct file *file, struct kvm *kvm)
+{
+   struct vfio_device_file *df = file->private_data;
+
+   /*
+* The kvm is first recorded in the vfio_device_file, and will
+* be propagated to vfio_device::kvm when the file is bound to
+* iommufd successfully in the vfio device cdev path.
+*/
+   spin_lock(&df->kvm_ref_lock);
+   df->kvm = kvm;
+   spin_unlock(&df->kvm_ref_lock);
+}
+
 /**
  * vfio_file_set_kvm - Link a kvm with VFIO drivers
  * @file: VFIO group file or VFIO device file
@@ -1236,6 +1267,9 @@ void vfio_file_set_kvm(struct file *file, struct kvm *kvm)
group = vfio_group_from_file(file);
if (group)
vfio_group_set_kvm(group, kvm);
+
+   if (vfio_device_from_file(file))
+   vfio_device_file_set_kvm(file, kvm);
 }
 EXPORT_SYMBOL_GPL(vfio_file_set_kvm);
 
-- 
2.34.1

[Intel-gfx] [PATCH v14 02/26] vfio: Refine vfio file kAPIs for KVM

[Yi Liu]

This prepares for making the below kAPIs to accept both group file
and device file instead of only vfio group file.

  bool vfio_file_enforced_coherent(struct file *file);
  void vfio_file_set_kvm(struct file *file, struct kvm *kvm);

Reviewed-by: Kevin Tian 
Reviewed-by: Eric Auger 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c | 53 +---
 drivers/vfio/vfio.h  |  3 +++
 drivers/vfio/vfio_main.c | 49 +
 include/linux/vfio.h |  1 +
 virt/kvm/vfio.c  | 10 
 5 files changed, 75 insertions(+), 41 deletions(-)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index fbba9fc15e57..b56e19d2a02d 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -754,6 +754,15 @@ bool vfio_device_has_container(struct vfio_device *device)
return device->group->container;
 }
 
+struct vfio_group *vfio_group_from_file(struct file *file)
+{
+   struct vfio_group *group = file->private_data;
+
+   if (file->f_op != &vfio_group_fops)
+   return NULL;
+   return group;
+}
+
 /**
  * vfio_file_iommu_group - Return the struct iommu_group for the vfio group 
file
  * @file: VFIO group file
@@ -764,13 +773,13 @@ bool vfio_device_has_container(struct vfio_device *device)
  */
 struct iommu_group *vfio_file_iommu_group(struct file *file)
 {
-   struct vfio_group *group = file->private_data;
+   struct vfio_group *group = vfio_group_from_file(file);
struct iommu_group *iommu_group = NULL;
 
if (!IS_ENABLED(CONFIG_SPAPR_TCE_IOMMU))
return NULL;
 
-   if (!vfio_file_is_group(file))
+   if (!group)
return NULL;
 
mutex_lock(&group->group_lock);
@@ -784,33 +793,20 @@ struct iommu_group *vfio_file_iommu_group(struct file 
*file)
 EXPORT_SYMBOL_GPL(vfio_file_iommu_group);
 
 /**
- * vfio_file_is_group - True if the file is usable with VFIO aPIS
+ * vfio_file_is_group - True if the file is a vfio group file
  * @file: VFIO group file
  */
 bool vfio_file_is_group(struct file *file)
 {
-   return file->f_op == &vfio_group_fops;
+   return vfio_group_from_file(file);
 }
 EXPORT_SYMBOL_GPL(vfio_file_is_group);
 
-/**
- * vfio_file_enforced_coherent - True if the DMA associated with the VFIO file
- *is always CPU cache coherent
- * @file: VFIO group file
- *
- * Enforced coherency means that the IOMMU ignores things like the PCIe 
no-snoop
- * bit in DMA transactions. A return of false indicates that the user has
- * rights to access additional instructions such as wbinvd on x86.
- */
-bool vfio_file_enforced_coherent(struct file *file)
+bool vfio_group_enforced_coherent(struct vfio_group *group)
 {
-   struct vfio_group *group = file->private_data;
struct vfio_device *device;
bool ret = true;
 
-   if (!vfio_file_is_group(file))
-   return true;
-
/*
 * If the device does not have IOMMU_CAP_ENFORCE_CACHE_COHERENCY then
 * any domain later attached to it will also not support it. If the cap
@@ -828,28 +824,13 @@ bool vfio_file_enforced_coherent(struct file *file)
mutex_unlock(&group->device_lock);
return ret;
 }
-EXPORT_SYMBOL_GPL(vfio_file_enforced_coherent);
 
-/**
- * vfio_file_set_kvm - Link a kvm with VFIO drivers
- * @file: VFIO group file
- * @kvm: KVM to link
- *
- * When a VFIO device is first opened the KVM will be available in
- * device->kvm if one was associated with the group.
- */
-void vfio_file_set_kvm(struct file *file, struct kvm *kvm)
+void vfio_group_set_kvm(struct vfio_group *group, struct kvm *kvm)
 {
-   struct vfio_group *group = file->private_data;
-
-   if (!vfio_file_is_group(file))
-   return;
-
spin_lock(&group->kvm_ref_lock);
group->kvm = kvm;
spin_unlock(&group->kvm_ref_lock);
 }
-EXPORT_SYMBOL_GPL(vfio_file_set_kvm);
 
 /**
  * vfio_file_has_dev - True if the VFIO file is a handle for device
@@ -860,9 +841,9 @@ EXPORT_SYMBOL_GPL(vfio_file_set_kvm);
  */
 bool vfio_file_has_dev(struct file *file, struct vfio_device *device)
 {
-   struct vfio_group *group = file->private_data;
+   struct vfio_group *group = vfio_group_from_file(file);
 
-   if (!vfio_file_is_group(file))
+   if (!group)
return false;
 
return group == device->group;
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 87d3dd6b9ef9..b1e327a85a32 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -90,6 +90,9 @@ void vfio_device_group_unregister(struct vfio_device *device);
 int vfio_device_group_use_iommu(struct vfio_device *device);
 void vfio_device_group_unuse_iommu(struct vfio_device *device);
 void vfio_device_group_close(struct vfio_device *device);
+struct vfio_group *vfio_group_fr

[Intel-gfx] [PATCH v14 01/26] vfio: Allocate per device file structure

[Yi Liu]

This is preparation for adding vfio device cdev support. vfio device
cdev requires:
1) A per device file memory to store the kvm pointer set by KVM. It will
   be propagated to vfio_device:kvm after the device cdev file is bound
   to an iommufd.
2) A mechanism to block device access through device cdev fd before it
   is bound to an iommufd.

To address the above requirements, this adds a per device file structure
named vfio_device_file. For now, it's only a wrapper of struct vfio_device
pointer. Other fields will be added to this per file structure in future
commits.

Reviewed-by: Kevin Tian 
Reviewed-by: Eric Auger 
Reviewed-by: Jason Gunthorpe 
Tested-by: Terrence Xu 
Tested-by: Nicolin Chen 
Tested-by: Matthew Rosato 
Tested-by: Yanting Jiang 
Tested-by: Shameer Kolothum 
Signed-off-by: Yi Liu 
---
 drivers/vfio/group.c | 13 +++--
 drivers/vfio/vfio.h  |  6 ++
 drivers/vfio/vfio_main.c | 31 ++-
 3 files changed, 43 insertions(+), 7 deletions(-)

diff --git a/drivers/vfio/group.c b/drivers/vfio/group.c
index fc75c1000d74..fbba9fc15e57 100644
--- a/drivers/vfio/group.c
+++ b/drivers/vfio/group.c
@@ -218,19 +218,26 @@ void vfio_device_group_close(struct vfio_device *device)
 
 static struct file *vfio_device_open_file(struct vfio_device *device)
 {
+   struct vfio_device_file *df;
struct file *filep;
int ret;
 
+   df = vfio_allocate_device_file(device);
+   if (IS_ERR(df)) {
+   ret = PTR_ERR(df);
+   goto err_out;
+   }
+
ret = vfio_device_group_open(device);
if (ret)
-   goto err_out;
+   goto err_free;
 
/*
 * We can't use anon_inode_getfd() because we need to modify
 * the f_mode flags directly to allow more than just ioctls
 */
filep = anon_inode_getfile("[vfio-device]", &vfio_device_fops,
-  device, O_RDWR);
+  df, O_RDWR);
if (IS_ERR(filep)) {
ret = PTR_ERR(filep);
goto err_close_device;
@@ -254,6 +261,8 @@ static struct file *vfio_device_open_file(struct 
vfio_device *device)
 
 err_close_device:
vfio_device_group_close(device);
+err_free:
+   kfree(df);
 err_out:
return ERR_PTR(ret);
 }
diff --git a/drivers/vfio/vfio.h b/drivers/vfio/vfio.h
index 7b19c621e0e6..87d3dd6b9ef9 100644
--- a/drivers/vfio/vfio.h
+++ b/drivers/vfio/vfio.h
@@ -16,11 +16,17 @@ struct iommufd_ctx;
 struct iommu_group;
 struct vfio_container;
 
+struct vfio_device_file {
+   struct vfio_device *device;
+};
+
 void vfio_device_put_registration(struct vfio_device *device);
 bool vfio_device_try_get_registration(struct vfio_device *device);
 int vfio_device_open(struct vfio_device *device, struct iommufd_ctx *iommufd);
 void vfio_device_close(struct vfio_device *device,
   struct iommufd_ctx *iommufd);
+struct vfio_device_file *
+vfio_allocate_device_file(struct vfio_device *device);
 
 extern const struct file_operations vfio_device_fops;
 
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index ab4f3a794f78..39c1158ffef0 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -419,6 +419,20 @@ static bool vfio_assert_device_open(struct vfio_device 
*device)
return !WARN_ON_ONCE(!READ_ONCE(device->open_count));
 }
 
+struct vfio_device_file *
+vfio_allocate_device_file(struct vfio_device *device)
+{
+   struct vfio_device_file *df;
+
+   df = kzalloc(sizeof(*df), GFP_KERNEL_ACCOUNT);
+   if (!df)
+   return ERR_PTR(-ENOMEM);
+
+   df->device = device;
+
+   return df;
+}
+
 static int vfio_device_first_open(struct vfio_device *device,
  struct iommufd_ctx *iommufd)
 {
@@ -532,12 +546,15 @@ static inline void vfio_device_pm_runtime_put(struct 
vfio_device *device)
  */
 static int vfio_device_fops_release(struct inode *inode, struct file *filep)
 {
-   struct vfio_device *device = filep->private_data;
+   struct vfio_device_file *df = filep->private_data;
+   struct vfio_device *device = df->device;
 
vfio_device_group_close(device);
 
vfio_device_put_registration(device);
 
+   kfree(df);
+
return 0;
 }
 
@@ -1102,7 +1119,8 @@ static int vfio_ioctl_device_feature(struct vfio_device 
*device,
 static long vfio_device_fops_unl_ioctl(struct file *filep,
   unsigned int cmd, unsigned long arg)
 {
-   struct vfio_device *device = filep->private_data;
+   struct vfio_device_file *df = filep->private_data;
+   struct vfio_device *device = df->device;
int ret;
 
ret = vfio_device_pm_runtime_get(device);
@@ -1129,7 +1147,8 @@ static long vfio_device_fops_unl_ioctl(struct file *filep,
 static ssize_t vfio_device_fops_read(struct file *filep, char __user *buf,
 size_t cou

[Intel-gfx] [PATCH v14 00/26] Add vfio_device cdev for iommufd support

[Yi Liu]

Existing VFIO provides group-centric user APIs for userspace. Userspace
opens the /dev/vfio/$group_id first before getting device fd and hence
getting access to device. This is not the desired model for iommufd. Per
the conclusion of community discussion[1], iommufd provides device-centric
kAPIs and requires its consumer (like VFIO) to be device-centric user
APIs. Such user APIs are used to associate device with iommufd and also
the I/O address spaces managed by the iommufd.

This series first introduces a per device file structure to be prepared
for further enhancement and refactors the kvm-vfio code to be prepared
for accepting device file from userspace. After this, adds a mechanism for
blocking device access before iommufd bind. Then refactors the vfio to be
able to handle cdev path (e.g. iommufd binding, no-iommufd, [de]attach ioas).
This refactor includes making the device_open exclusive between the group
and the cdev path, only allow single device open in cdev path; vfio-iommufd
code is also refactored to support cdev. e.g. split the vfio_iommufd_bind()
into two steps. Eventually, adds the cdev support for vfio device and the
new ioctls, then makes group infrastructure optional as it is not needed
when vfio device cdev is compiled.

This series is based on some preparation works done to vfio emulated devices[2]
and vfio pci hot reset enhancements[3].

This series is a prerequisite for iommu nesting for vfio device[4] [5].

The complete code can be found in below branch, simple tests done to the
legacy group path and the cdev path. Draft QEMU branch can be found at[6]

https://github.com/yiliu1765/iommufd/tree/vfio_device_cdev_v14
(config CONFIG_IOMMUFD=y CONFIG_VFIO_DEVICE_CDEV=y)

base-commit: 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5

[1] 
https://lore.kernel.org/kvm/bn9pr11mb5433b1e4ae5b0480369f97178c...@bn9pr11mb5433.namprd11.prod.outlook.com/
[2] https://lore.kernel.org/kvm/20230327093351.44505-1-yi.l@intel.com/ - 
merged
[3] https://lore.kernel.org/kvm/20230711023126.5531-1-yi.l@intel.com/
[4] 
https://lore.kernel.org/linux-iommu/20230511143844.22693-1-yi.l@intel.com/
[5] 
https://lore.kernel.org/linux-iommu/20230511145110.27707-1-yi.l@intel.com/#t
[6] https://github.com/yiliu1765/qemu/tree/iommufd_rfcv4.mig.reset.v4_var3

Change log:

v14:
 - Add Jason's r-b to patch 10, 11, 12, 13, 15, 16, 17 and 23 of cdev v12
 - Refine iommufd_access_detach() (Jason)
 - Split the device_del() movement to be a separate patch (Jason)
 - Move kvm !null test into _vfio_device_get_kvm_safe() to save some lines
   and rename it to be vfio_device_get_kvm_safe() (Jason)
 - Make VFIO_DEVICE_CDEV depending on !SPAPR_TCE_IOMMU to suit the fact that
   SPAPR_TCE_IOMMU does not support cdev (Alex)
 - Add iommufd_ctx_from_fd() to replace vfio_get_iommufd_from_fd() (Jason)
 - Check cdev only ioctls in vfio_device_fops_unl_ioctl() (Jason)
 - patch 17, 19, 20 and 21 of v14 is newly added per above review comemnts.

v13: https://lore.kernel.org/kvm/20230616093946.68711-1-yi.l@intel.com/
 - vfio_device_first_open() and vfio_device_last_close() to be 
vfio_df_device_first_open()
   vfio_df_device_last_close() (Alex)
 - Define struct vfio_device_file::access_granted as u8 and also place the u32 
devid to
   be behind this flag as this structure access is hot, so needs to avoid too 
much hole
   in the structure (Alex)
 - Use u8 instead bool in the struct vfio_device for the flags (Alex)
 - Define BIND, ATTACH, DETACH ioctl behind VFIO_DEVICE_FEATURE whose offset is 
17 (Alex)
 - Drop patch 20, 21, 22 of v12 (Alex)
 - Per the patch drop, still needs to detect the physical devices that do not 
have
   IOMMU in the cdev registration as cdev does not support such devices. Per the
   suggestion from Jason, lift the IOMMU_CAP_CACHE_COHERENCY check to be in 
vfio_main.c
   so that it can fail the registration of such devices if only cdev is 
compiled. (Jason, Alex)
 - Refine the vfio.rst doc, highlight that the cdev device access is stil bound 
with
   iommu group. (Alex)
 - Reaffirm t-b from below folks:
   Nicolin Chen - Test nesting branch which is based on cdev v12, the test is 
done on ARM64 (SMMUv3)
   Matthew Rosato - vfio-pci, vfio-ap, vfio-ccw under container, compat and 
cdev mode, and nesting
test on SMMUv3 and Intel.
   Yanting Jiang - regression tests with NIC passthrough on Intel platform

v12: https://lore.kernel.org/kvm/20230602121653.80017-1-yi.l@intel.com/#r
 - Rename vfio_device_xx() to be vfio_df_xx() if the object is vfio_device_file 
(Alex)
 - Refine patch 10 of v11 (Alex)
 - Add new device ioctls from offset 18 (Alex)
 - Add a patch to check group->type for noiommu test, no need to check
   CONFIG_VFIO_NOIOMMU (Alex)
 - Refine the logic of vfio_device_set_noiommu() per Alex's suggestion. The 
noiommu
   taint is moved to __vfio_register_dev(), also add a check on group type 
before
   calling vfio_device_set_noiommu() as only physical device can be noiommu 
device.
 - 

[Intel-gfx] [PATCH v9 04/10] iommufd: Add iommufd_ctx_has_group()

[Yi Liu]

This adds the helper to check if any device within the given iommu_group
has been bound with the iommufd_ctx. This is helpful for the checking on
device ownership for the devices which have not been bound but cannot be
bound to any other iommufd_ctx as the iommu_group has been bound.

Tested-by: Terrence Xu 
Reviewed-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 drivers/iommu/iommufd/device.c | 30 ++
 include/linux/iommufd.h|  2 ++
 2 files changed, 32 insertions(+)

diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c
index 29d05663d4d1..693c2155a5da 100644
--- a/drivers/iommu/iommufd/device.c
+++ b/drivers/iommu/iommufd/device.c
@@ -98,6 +98,36 @@ struct iommufd_device *iommufd_device_bind(struct 
iommufd_ctx *ictx,
 }
 EXPORT_SYMBOL_NS_GPL(iommufd_device_bind, IOMMUFD);
 
+/**
+ * iommufd_ctx_has_group - True if any device within the group is bound
+ * to the ictx
+ * @ictx: iommufd file descriptor
+ * @group: Pointer to a physical iommu_group struct
+ *
+ * True if any device within the group has been bound to this ictx, ex. via
+ * iommufd_device_bind(), therefore implying ictx ownership of the group.
+ */
+bool iommufd_ctx_has_group(struct iommufd_ctx *ictx, struct iommu_group *group)
+{
+   struct iommufd_object *obj;
+   unsigned long index;
+
+   if (!ictx || !group)
+   return false;
+
+   xa_lock(&ictx->objects);
+   xa_for_each(&ictx->objects, index, obj) {
+   if (obj->type == IOMMUFD_OBJ_DEVICE &&
+   container_of(obj, struct iommufd_device, obj)->group == 
group) {
+   xa_unlock(&ictx->objects);
+   return true;
+   }
+   }
+   xa_unlock(&ictx->objects);
+   return false;
+}
+EXPORT_SYMBOL_NS_GPL(iommufd_ctx_has_group, IOMMUFD);
+
 /**
  * iommufd_device_unbind - Undo iommufd_device_bind()
  * @idev: Device returned by iommufd_device_bind()
diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h
index 1129a36a74c4..f241bafa03da 100644
--- a/include/linux/iommufd.h
+++ b/include/linux/iommufd.h
@@ -16,6 +16,7 @@ struct page;
 struct iommufd_ctx;
 struct iommufd_access;
 struct file;
+struct iommu_group;
 
 struct iommufd_device *iommufd_device_bind(struct iommufd_ctx *ictx,
   struct device *dev, u32 *id);
@@ -50,6 +51,7 @@ void iommufd_ctx_get(struct iommufd_ctx *ictx);
 #if IS_ENABLED(CONFIG_IOMMUFD)
 struct iommufd_ctx *iommufd_ctx_from_file(struct file *file);
 void iommufd_ctx_put(struct iommufd_ctx *ictx);
+bool iommufd_ctx_has_group(struct iommufd_ctx *ictx, struct iommu_group 
*group);
 
 int iommufd_access_pin_pages(struct iommufd_access *access, unsigned long iova,
 unsigned long length, struct page **out_pages,
-- 
2.34.1

[Intel-gfx] [PATCH v9 08/10] vfio/pci: Extend VFIO_DEVICE_GET_PCI_HOT_RESET_INFO for vfio device cdev

[Yi Liu]

This allows VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl use the iommufd_ctx
of the cdev device to check the ownership of the other affected devices.

When VFIO_DEVICE_GET_PCI_HOT_RESET_INFO is called on an IOMMUFD managed
device, the new flag VFIO_PCI_HOT_RESET_FLAG_DEV_ID is reported to indicate
the values returned are IOMMUFD devids rather than group IDs as used when
accessing vfio devices through the conventional vfio group interface.
Additionally the flag VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED will be reported
in this mode if all of the devices affected by the hot-reset are owned by
either virtue of being directly bound to the same iommufd context as the
calling device, or implicitly owned via a shared IOMMU group.

Suggested-by: Jason Gunthorpe 
Suggested-by: Alex Williamson 
Reviewed-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 drivers/vfio/iommufd.c   | 44 ++
 drivers/vfio/pci/vfio_pci_core.c | 54 +++-
 include/linux/vfio.h | 14 +
 include/uapi/linux/vfio.h| 50 -
 4 files changed, 154 insertions(+), 8 deletions(-)

diff --git a/drivers/vfio/iommufd.c b/drivers/vfio/iommufd.c
index 88b00c501015..afda47ee9663 100644
--- a/drivers/vfio/iommufd.c
+++ b/drivers/vfio/iommufd.c
@@ -66,6 +66,50 @@ void vfio_iommufd_unbind(struct vfio_device *vdev)
vdev->ops->unbind_iommufd(vdev);
 }
 
+struct iommufd_ctx *vfio_iommufd_device_ictx(struct vfio_device *vdev)
+{
+   if (vdev->iommufd_device)
+   return iommufd_device_to_ictx(vdev->iommufd_device);
+   return NULL;
+}
+EXPORT_SYMBOL_GPL(vfio_iommufd_device_ictx);
+
+static int vfio_iommufd_device_id(struct vfio_device *vdev)
+{
+   if (vdev->iommufd_device)
+   return iommufd_device_to_id(vdev->iommufd_device);
+   return -EINVAL;
+}
+
+/*
+ * Return devid for a device.
+ *  valid ID for the device that is owned by the ictx
+ *  -ENOENT = device is owned but there is no ID
+ *  -ENODEV or other error = device is not owned
+ */
+int vfio_iommufd_get_dev_id(struct vfio_device *vdev, struct iommufd_ctx *ictx)
+{
+   struct iommu_group *group;
+   int devid;
+
+   if (vfio_iommufd_device_ictx(vdev) == ictx)
+   return vfio_iommufd_device_id(vdev);
+
+   group = iommu_group_get(vdev->dev);
+   if (!group)
+   return -ENODEV;
+
+   if (iommufd_ctx_has_group(ictx, group))
+   devid = -ENOENT;
+   else
+   devid = -ENODEV;
+
+   iommu_group_put(group);
+
+   return devid;
+}
+EXPORT_SYMBOL_GPL(vfio_iommufd_get_dev_id);
+
 /*
  * The physical standard ops mean that the iommufd_device is bound to the
  * physical device vdev->dev that was provided to vfio_init_group_dev(). 
Drivers
diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c
index 5b5316a5484a..32506c5539b9 100644
--- a/drivers/vfio/pci/vfio_pci_core.c
+++ b/drivers/vfio/pci/vfio_pci_core.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 
 #if IS_ENABLED(CONFIG_EEH)
 #include 
 #endif
@@ -779,26 +780,56 @@ struct vfio_pci_fill_info {
int max;
int cur;
struct vfio_pci_dependent_device *devices;
+   struct vfio_device *vdev;
+   u32 flags;
 };
 
 static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
 {
struct vfio_pci_fill_info *fill = data;
-   struct iommu_group *iommu_group;
 
if (fill->cur == fill->max)
return -EAGAIN; /* Something changed, try again */
 
-   iommu_group = iommu_group_get(&pdev->dev);
-   if (!iommu_group)
-   return -EPERM; /* Cannot reset non-isolated devices */
+   if (fill->flags & VFIO_PCI_HOT_RESET_FLAG_DEV_ID) {
+   struct iommufd_ctx *iommufd = 
vfio_iommufd_device_ictx(fill->vdev);
+   struct vfio_device_set *dev_set = fill->vdev->dev_set;
+   struct vfio_device *vdev;
 
-   fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
+   /*
+* hot-reset requires all affected devices be represented in
+* the dev_set.
+*/
+   vdev = vfio_find_device_in_devset(dev_set, &pdev->dev);
+   if (!vdev) {
+   fill->devices[fill->cur].devid = 
VFIO_PCI_DEVID_NOT_OWNED;
+   } else {
+   int id = vfio_iommufd_get_dev_id(vdev, iommufd);
+
+   if (id > 0)
+   fill->devices[fill->cur].devid = id;
+   else if (id == -ENOENT)
+   fill->devices[fill->cur].devid = 
VFIO_PCI_DEVID_OWNED;
+   else
+   fill->devices[fill->cur].devid = 
VFIO_PCI_DEVID_NOT_OWNED;
+   }
+   /* If devid is VFIO_PCI_DEVID_NOT_OWNED, clear owned flag. */
+   if (fill->devices[fill->cur]

[Intel-gfx] [PATCH v9 06/10] vfio: Mark cdev usage in vfio_device

[Yi Liu]

This can be used to differentiate whether to report group_id or devid in
the revised VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl. At this moment, no
cdev path yet, so the vfio_device_cdev_opened() helper always returns false.

Reviewed-by: Kevin Tian 
Tested-by: Terrence Xu 
Signed-off-by: Yi Liu 
---
 include/linux/vfio.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index 2c137ea94a3e..2a45853773a6 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -139,6 +139,11 @@ int vfio_iommufd_emulated_attach_ioas(struct vfio_device 
*vdev, u32 *pt_id);
((int (*)(struct vfio_device *vdev, u32 *pt_id)) NULL)
 #endif
 
+static inline bool vfio_device_cdev_opened(struct vfio_device *device)
+{
+   return false;
+}
+
 /**
  * struct vfio_migration_ops - VFIO bus device driver migration callbacks
  *
-- 
2.34.1

[Intel-gfx] [PATCH v9 07/10] vfio: Add helper to search vfio_device in a dev_set

[Yi Liu]

There are drivers that need to search vfio_device within a given dev_set.
e.g. vfio-pci. So add a helper.

vfio_pci_is_device_in_set() now returns -EBUSY in commit a882c16a2b7e
("vfio/pci: Change vfio_pci_try_bus_reset() to use the dev_set") where
it was trying to preserve the return of vfio_pci_try_zap_and_vma_lock_cb().
However, it makes more sense to return -ENODEV.

Suggested-by: Alex Williamson 
Tested-by: Terrence Xu 
Reviewed-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 drivers/vfio/pci/vfio_pci_core.c |  6 +-
 drivers/vfio/vfio_main.c | 15 +++
 include/linux/vfio.h |  3 +++
 3 files changed, 19 insertions(+), 5 deletions(-)

diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c
index 3d595ad2ed0a..5b5316a5484a 100644
--- a/drivers/vfio/pci/vfio_pci_core.c
+++ b/drivers/vfio/pci/vfio_pci_core.c
@@ -2377,12 +2377,8 @@ static bool vfio_dev_in_groups(struct 
vfio_pci_core_device *vdev,
 static int vfio_pci_is_device_in_set(struct pci_dev *pdev, void *data)
 {
struct vfio_device_set *dev_set = data;
-   struct vfio_device *cur;
 
-   list_for_each_entry(cur, &dev_set->device_list, dev_set_list)
-   if (cur->dev == &pdev->dev)
-   return 0;
-   return -EBUSY;
+   return vfio_find_device_in_devset(dev_set, &pdev->dev) ? 0 : -ENODEV;
 }
 
 /*
diff --git a/drivers/vfio/vfio_main.c b/drivers/vfio/vfio_main.c
index f0ca33b2e1df..ab4f3a794f78 100644
--- a/drivers/vfio/vfio_main.c
+++ b/drivers/vfio/vfio_main.c
@@ -141,6 +141,21 @@ unsigned int vfio_device_set_open_count(struct 
vfio_device_set *dev_set)
 }
 EXPORT_SYMBOL_GPL(vfio_device_set_open_count);
 
+struct vfio_device *
+vfio_find_device_in_devset(struct vfio_device_set *dev_set,
+  struct device *dev)
+{
+   struct vfio_device *cur;
+
+   lockdep_assert_held(&dev_set->lock);
+
+   list_for_each_entry(cur, &dev_set->device_list, dev_set_list)
+   if (cur->dev == dev)
+   return cur;
+   return NULL;
+}
+EXPORT_SYMBOL_GPL(vfio_find_device_in_devset);
+
 /*
  * Device objects - create, release, get, put, search
  */
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index 2a45853773a6..ee120d2d530b 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -244,6 +244,9 @@ void vfio_unregister_group_dev(struct vfio_device *device);
 
 int vfio_assign_device_set(struct vfio_device *device, void *set_id);
 unsigned int vfio_device_set_open_count(struct vfio_device_set *dev_set);
+struct vfio_device *
+vfio_find_device_in_devset(struct vfio_device_set *dev_set,
+  struct device *dev);
 
 int vfio_mig_get_next_state(struct vfio_device *device,
enum vfio_device_mig_state cur_fsm,
-- 
2.34.1

[Intel-gfx] [PATCH v9 05/10] iommufd: Add helper to retrieve iommufd_ctx and devid

[Yi Liu]

This is needed by the vfio-pci driver to report affected devices in the
hot-reset for a given device.

Tested-by: Terrence Xu 
Reviewed-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 drivers/iommu/iommufd/device.c | 12 
 include/linux/iommufd.h|  3 +++
 2 files changed, 15 insertions(+)

diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c
index 693c2155a5da..cd5d8ab907f9 100644
--- a/drivers/iommu/iommufd/device.c
+++ b/drivers/iommu/iommufd/device.c
@@ -146,6 +146,18 @@ void iommufd_device_unbind(struct iommufd_device *idev)
 }
 EXPORT_SYMBOL_NS_GPL(iommufd_device_unbind, IOMMUFD);
 
+struct iommufd_ctx *iommufd_device_to_ictx(struct iommufd_device *idev)
+{
+   return idev->ictx;
+}
+EXPORT_SYMBOL_NS_GPL(iommufd_device_to_ictx, IOMMUFD);
+
+u32 iommufd_device_to_id(struct iommufd_device *idev)
+{
+   return idev->obj.id;
+}
+EXPORT_SYMBOL_NS_GPL(iommufd_device_to_id, IOMMUFD);
+
 static int iommufd_device_setup_msi(struct iommufd_device *idev,
struct iommufd_hw_pagetable *hwpt,
phys_addr_t sw_msi_start)
diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h
index f241bafa03da..68defed9ea48 100644
--- a/include/linux/iommufd.h
+++ b/include/linux/iommufd.h
@@ -25,6 +25,9 @@ void iommufd_device_unbind(struct iommufd_device *idev);
 int iommufd_device_attach(struct iommufd_device *idev, u32 *pt_id);
 void iommufd_device_detach(struct iommufd_device *idev);
 
+struct iommufd_ctx *iommufd_device_to_ictx(struct iommufd_device *idev);
+u32 iommufd_device_to_id(struct iommufd_device *idev);
+
 struct iommufd_access_ops {
u8 needs_pin_pages : 1;
void (*unmap)(void *data, unsigned long iova, unsigned long length);
-- 
2.34.1

[Intel-gfx] [PATCH v9 01/10] vfio/pci: Update comment around group_fd get in vfio_pci_ioctl_pci_hot_reset()

[Yi Liu]

This suits more on what the code does.

Reviewed-by: Kevin Tian 
Reviewed-by: Jason Gunthorpe 
Reviewed-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 drivers/vfio/pci/vfio_pci_core.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c
index 20d7b69ea6ff..4e228e2a6d99 100644
--- a/drivers/vfio/pci/vfio_pci_core.c
+++ b/drivers/vfio/pci/vfio_pci_core.c
@@ -1349,9 +1349,8 @@ static int vfio_pci_ioctl_pci_hot_reset(struct 
vfio_pci_core_device *vdev,
}
 
/*
-* For each group_fd, get the group through the vfio external user
-* interface and store the group and iommu ID.  This ensures the group
-* is held across the reset.
+* Get the group file for each fd to ensure the group is held across
+* the reset
 */
for (file_idx = 0; file_idx < hdr.count; file_idx++) {
struct file *file = fget(group_fds[file_idx]);
-- 
2.34.1

[Intel-gfx] [PATCH v9 10/10] vfio/pci: Allow passing zero-length fd array in VFIO_DEVICE_PCI_HOT_RESET

[Yi Liu]

This is the way user to invoke hot-reset for the devices opened by cdev
interface. User should check the flag VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED
in the output of VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl before doing
hot-reset for cdev devices.

Suggested-by: Jason Gunthorpe 
Signed-off-by: Jason Gunthorpe 
Reviewed-by: Jason Gunthorpe 
Tested-by: Yanting Jiang 
Signed-off-by: Yi Liu 
---
 drivers/vfio/pci/vfio_pci_core.c | 61 ++--
 include/uapi/linux/vfio.h| 21 +++
 2 files changed, 71 insertions(+), 11 deletions(-)

diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c
index 4737eeacd538..1845540006f5 100644
--- a/drivers/vfio/pci/vfio_pci_core.c
+++ b/drivers/vfio/pci/vfio_pci_core.c
@@ -181,7 +181,8 @@ static void vfio_pci_probe_mmaps(struct 
vfio_pci_core_device *vdev)
 struct vfio_pci_group_info;
 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set);
 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
- struct vfio_pci_group_info *groups);
+ struct vfio_pci_group_info *groups,
+ struct iommufd_ctx *iommufd_ctx);
 
 /*
  * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
@@ -1329,8 +1330,7 @@ vfio_pci_ioctl_pci_hot_reset_groups(struct 
vfio_pci_core_device *vdev,
if (ret)
return ret;
 
-   /* Somewhere between 1 and count is OK */
-   if (!array_count || array_count > count)
+   if (array_count > count)
return -EINVAL;
 
group_fds = kcalloc(array_count, sizeof(*group_fds), GFP_KERNEL);
@@ -1379,7 +1379,7 @@ vfio_pci_ioctl_pci_hot_reset_groups(struct 
vfio_pci_core_device *vdev,
info.count = array_count;
info.files = files;
 
-   ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info);
+   ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info, NULL);
 
 hot_reset_release:
for (file_idx--; file_idx >= 0; file_idx--)
@@ -1402,13 +1402,21 @@ static int vfio_pci_ioctl_pci_hot_reset(struct 
vfio_pci_core_device *vdev,
if (hdr.argsz < minsz || hdr.flags)
return -EINVAL;
 
+   /* zero-length array is only for cdev opened devices */
+   if (!!hdr.count == vfio_device_cdev_opened(&vdev->vdev))
+   return -EINVAL;
+
/* Can we do a slot or bus reset or neither? */
if (!pci_probe_reset_slot(vdev->pdev->slot))
slot = true;
else if (pci_probe_reset_bus(vdev->pdev->bus))
return -ENODEV;
 
-   return vfio_pci_ioctl_pci_hot_reset_groups(vdev, hdr.count, slot, arg);
+   if (hdr.count)
+   return vfio_pci_ioctl_pci_hot_reset_groups(vdev, hdr.count, 
slot, arg);
+
+   return vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, NULL,
+ 
vfio_iommufd_device_ictx(&vdev->vdev));
 }
 
 static int vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device *vdev,
@@ -2376,13 +2384,16 @@ const struct pci_error_handlers 
vfio_pci_core_err_handlers = {
 };
 EXPORT_SYMBOL_GPL(vfio_pci_core_err_handlers);
 
-static bool vfio_dev_in_groups(struct vfio_pci_core_device *vdev,
+static bool vfio_dev_in_groups(struct vfio_device *vdev,
   struct vfio_pci_group_info *groups)
 {
unsigned int i;
 
+   if (!groups)
+   return false;
+
for (i = 0; i < groups->count; i++)
-   if (vfio_file_has_dev(groups->files[i], &vdev->vdev))
+   if (vfio_file_has_dev(groups->files[i], vdev))
return true;
return false;
 }
@@ -2458,7 +2469,8 @@ static int vfio_pci_dev_set_pm_runtime_get(struct 
vfio_device_set *dev_set)
  * get each memory_lock.
  */
 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
- struct vfio_pci_group_info *groups)
+ struct vfio_pci_group_info *groups,
+ struct iommufd_ctx *iommufd_ctx)
 {
struct vfio_pci_core_device *cur_mem;
struct vfio_pci_core_device *cur_vma;
@@ -2488,11 +2500,38 @@ static int vfio_pci_dev_set_hot_reset(struct 
vfio_device_set *dev_set,
goto err_unlock;
 
list_for_each_entry(cur_vma, &dev_set->device_list, vdev.dev_set_list) {
+   bool owned;
+
/*
-* Test whether all the affected devices are contained by the
-* set of groups provided by the user.
+* Test whether all the affected devices can be reset by the
+* user.
+*
+* If called from a group opened device and the user provides
+* a set of groups, all the devices in the dev_set should be
+* contained by the set of groups provided by the user.

[Intel-gfx] [PATCH v9 03/10] iommufd: Reserve all negative IDs in the iommufd xarray

[Yi Liu]

With this reservation, IOMMUFD users can encode the negative IDs for
specific purposes. e.g. VFIO needs two reserved values to tell userspace
the ID returned is not valid but has other meaning.

Tested-by: Terrence Xu 
Reviewed-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 drivers/iommu/iommufd/main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/iommufd/main.c b/drivers/iommu/iommufd/main.c
index 3fbe636c3d8a..32ce7befc8dd 100644
--- a/drivers/iommu/iommufd/main.c
+++ b/drivers/iommu/iommufd/main.c
@@ -50,7 +50,7 @@ struct iommufd_object *_iommufd_object_alloc(struct 
iommufd_ctx *ictx,
 * before calling iommufd_object_finalize().
 */
rc = xa_alloc(&ictx->objects, &obj->id, XA_ZERO_ENTRY,
- xa_limit_32b, GFP_KERNEL_ACCOUNT);
+ xa_limit_31b, GFP_KERNEL_ACCOUNT);
if (rc)
goto out_free;
return obj;
-- 
2.34.1

[Intel-gfx] [PATCH v9 00/10] Enhance vfio PCI hot reset for vfio cdev device

[Yi Liu]

VFIO_DEVICE_PCI_HOT_RESET requires user to pass an array of group fds
to prove that it owns all devices affected by resetting the calling
device. While for cdev devices, user can use an iommufd-based ownership
checking model and invoke VFIO_DEVICE_PCI_HOT_RESET with a zero-length
fd array.

This series extends VFIO_DEVICE_GET_PCI_HOT_RESET_INFO to check ownership
and return the check result and the devid of affected devices to user. In
the end, extends the VFIO_DEVICE_PCI_HOT_RESET to accept zero-length fd
array for hot-reset with cdev devices.

The new hot reset method and updated _INFO ioctl are tested with the
below qemu:

https://github.com/yiliu1765/qemu/tree/iommufd_rfcv4.mig.reset.v4_var3
(requires to test with the cdev kernel)

Change log:

v9:
 - Add Jason's r-b to patch 08

v8: https://lore.kernel.org/kvm/zjrnho0p+ppgb...@nvidia.com/
 - Add r-b from Jason to patch 03, 04, 05, 07, 09 of v7
 - Add a patch to copy the per-device hot-reset structure to user during the
   device loop instead of storing them in a buffer and copy all the contents
   in one copy, this avoids an extra loop to count device and also avoids
   allocating a temporay buffer for it. (Jason)
 - Rename vfio_iommufd_device_hot_reset_devid() to be vfio_iommufd_get_dev_id()
   and refine its return value for the case no valid ID can be returned. Hence
   make it a general helper to get ID for a device. (Alex, Jason)
 - Remove iommufd_ctx_has_group() CONIFG_IOMMUFD disabled stub as this API is
   called in iommufd specific code which is compiled when CONFIG_IOMMU is
   enabled. (Alex)
 - Reaffirming Yanting's t-b (Tested NIC passthrough on Intel platform. mainly
   regression tests)

v7: https://lore.kernel.org/kvm/20230602121515.79374-1-yi.l@intel.com/
 - Drop noiommu support (patch 01 of v6 is dropped)
 - Remove helpers to get devid and ictx for iommufd_access
 - Document the dev_set representative requirement in the
   VFIO_DEVICE_GET_PCI_HOT_RESET_INFO for the cdev opened device (Alex)
 - zero-length fd array approach is only for cdev opened device (Alex)

v6: https://lore.kernel.org/kvm/20230522115751.326947-1-yi.l@intel.com/
 - Remove noiommu_access, reuse iommufd_access instead (Alex)
 - vfio_iommufd_physical_ictx -> vfio_iommufd_device_ictx
 - vfio_iommufd_physical_devid -> vfio_iommufd_device_hot_reset_devid
 - Refine logic in patch 9 and 10 of v5, no uapi change. (Alex)
 - Remove lockdep asset in vfio_pci_is_device_in_set (Cédric)
 - Add t-b from Terrence (Tested GVT-g / GVT-d VFIO legacy mode / compat mode
   / cdev mode, including negative tests. No regression be introduced.)

v5: https://lore.kernel.org/kvm/20230513132136.15021-1-yi.l@intel.com/
 - Drop patch 01 of v4 (Alex)
 - Create noiommu_access for noiommu devices (Jason)
 - Reserve all negative iommufd IDs, hence VFIO can encode negative
   values (Jason)
 - Make vfio_iommufd_physical_devid() return -EINVAL if it's not called
   with a physical device or a noiommu device.
 - Add vfio_find_device_in_devset() in vfio_main.c (Alex)
 - Add iommufd_ctx_has_group() to replace vfio_devset_iommufd_has_group().
   Reason: vfio_devset_iommufd_has_group() only loops the devices within
   the given devset to check the iommufd an iommu_group, but an iommu_group
   can span into multiple devsets. So if failed to find the group in a
   devset doesn't mean the group is not owned by the iommufd. So here either
   needs to search all the devsets or add an iommufd API to check it. It
   appears an iommufd API makes more sense.
 - Adopt suggestions from Alex on patch 08 and 09 of v4, refine the hot-reset
   uapi description and minor tweaks
 - Use bitfields for bool members (Alex)

v4: https://lore.kernel.org/kvm/20230426145419.450922-1-yi.l@intel.com/
 - Rename the patch series subject
 - Patch 01 is moved from the cdev series
 - Patch 02, 06 are new per review comments in v3
 - Patch 03/04/05/07/08/09 are from v3 with updates

v3: https://lore.kernel.org/kvm/20230401144429.88673-1-yi.l@intel.com/
 - Remove the new _INFO ioctl of v2, extend the existing _INFO ioctl to
   report devid (Alex)
 - Add r-b from Jason
 - Add t-b from Terrence Xu and Yanting Jiang (mainly regression test)

v2: https://lore.kernel.org/kvm/20230327093458.44939-1-yi.l@intel.com/
 - Split the patch 03 of v1 to be 03, 04 and 05 of v2 (Jaon)
 - Add r-b from Kevin and Jason
 - Add patch 10 to introduce a new _INFO ioctl for the usage of device
   fd passing usage in cdev path (Jason, Alex)

v1: https://lore.kernel.org/kvm/20230316124156.12064-1-yi.l@intel.com/

Regards,
Yi Liu

Yi Liu (10):
  vfio/pci: Update comment around group_fd get in
vfio_pci_ioctl_pci_hot_reset()
  vfio/pci: Move the existing hot reset logic to be a helper
  iommufd: Reserve all negative IDs in the iommufd xarray
  iommufd: Add iommufd_ctx_has_group()
  iommufd: Add helper to retrieve iommufd_ctx and devid
  vfio: Mark cdev usage in vfio_device
  vfio: Add helper to search vfio_device in a dev_set
  v

[Intel-gfx] [PATCH v9 09/10] vfio/pci: Copy hot-reset device info to userspace in the devices loop

[Yi Liu]

This copies the vfio_pci_dependent_device to userspace during looping each
affected device for reporting vfio_pci_hot_reset_info. This avoids counting
the affected devices and allocating a potential large buffer to store the
vfio_pci_dependent_device of all the affected devices before copying them
to userspace.

Suggested-by: Jason Gunthorpe 
Signed-off-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 drivers/vfio/pci/vfio_pci_core.c | 93 
 1 file changed, 33 insertions(+), 60 deletions(-)

diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c
index 32506c5539b9..4737eeacd538 100644
--- a/drivers/vfio/pci/vfio_pci_core.c
+++ b/drivers/vfio/pci/vfio_pci_core.c
@@ -777,19 +777,25 @@ static int vfio_pci_count_devs(struct pci_dev *pdev, void 
*data)
 }
 
 struct vfio_pci_fill_info {
-   int max;
-   int cur;
-   struct vfio_pci_dependent_device *devices;
+   struct vfio_pci_dependent_device __user *devices;
+   struct vfio_pci_dependent_device __user *devices_end;
struct vfio_device *vdev;
+   u32 count;
u32 flags;
 };
 
 static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
 {
+   struct vfio_pci_dependent_device info = {
+   .segment = pci_domain_nr(pdev->bus),
+   .bus = pdev->bus->number,
+   .devfn = pdev->devfn,
+   };
struct vfio_pci_fill_info *fill = data;
 
-   if (fill->cur == fill->max)
-   return -EAGAIN; /* Something changed, try again */
+   fill->count++;
+   if (fill->devices >= fill->devices_end)
+   return 0;
 
if (fill->flags & VFIO_PCI_HOT_RESET_FLAG_DEV_ID) {
struct iommufd_ctx *iommufd = 
vfio_iommufd_device_ictx(fill->vdev);
@@ -802,19 +808,19 @@ static int vfio_pci_fill_devs(struct pci_dev *pdev, void 
*data)
 */
vdev = vfio_find_device_in_devset(dev_set, &pdev->dev);
if (!vdev) {
-   fill->devices[fill->cur].devid = 
VFIO_PCI_DEVID_NOT_OWNED;
+   info.devid = VFIO_PCI_DEVID_NOT_OWNED;
} else {
int id = vfio_iommufd_get_dev_id(vdev, iommufd);
 
if (id > 0)
-   fill->devices[fill->cur].devid = id;
+   info.devid = id;
else if (id == -ENOENT)
-   fill->devices[fill->cur].devid = 
VFIO_PCI_DEVID_OWNED;
+   info.devid = VFIO_PCI_DEVID_OWNED;
else
-   fill->devices[fill->cur].devid = 
VFIO_PCI_DEVID_NOT_OWNED;
+   info.devid = VFIO_PCI_DEVID_NOT_OWNED;
}
/* If devid is VFIO_PCI_DEVID_NOT_OWNED, clear owned flag. */
-   if (fill->devices[fill->cur].devid == VFIO_PCI_DEVID_NOT_OWNED)
+   if (info.devid == VFIO_PCI_DEVID_NOT_OWNED)
fill->flags &= ~VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED;
} else {
struct iommu_group *iommu_group;
@@ -823,13 +829,13 @@ static int vfio_pci_fill_devs(struct pci_dev *pdev, void 
*data)
if (!iommu_group)
return -EPERM; /* Cannot reset non-isolated devices */
 
-   fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
+   info.group_id = iommu_group_id(iommu_group);
iommu_group_put(iommu_group);
}
-   fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
-   fill->devices[fill->cur].bus = pdev->bus->number;
-   fill->devices[fill->cur].devfn = pdev->devfn;
-   fill->cur++;
+
+   if (copy_to_user(fill->devices, &info, sizeof(info)))
+   return -EFAULT;
+   fill->devices++;
return 0;
 }
 
@@ -1259,8 +1265,7 @@ static int vfio_pci_ioctl_get_pci_hot_reset_info(
unsigned long minsz =
offsetofend(struct vfio_pci_hot_reset_info, count);
struct vfio_pci_hot_reset_info hdr;
-   struct vfio_pci_fill_info fill = { 0 };
-   struct vfio_pci_dependent_device *devices = NULL;
+   struct vfio_pci_fill_info fill = {};
bool slot = false;
int ret = 0;
 
@@ -1278,29 +1283,9 @@ static int vfio_pci_ioctl_get_pci_hot_reset_info(
else if (pci_probe_reset_bus(vdev->pdev->bus))
return -ENODEV;
 
-   /* How many devices are affected? */
-   ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
-   &fill.max, slot);
-   if (ret)
-   return ret;
-
-   WARN_ON(!fill.max); /* Should always be at least one */
-
-   /*
-* If there's enough space, fill it now, otherwise return -ENOSPC and
-* the number of devices affected.
-*/
-   if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*de

[Intel-gfx] [PATCH v9 02/10] vfio/pci: Move the existing hot reset logic to be a helper

[Yi Liu]

This prepares to add another method for hot reset. The major hot reset logic
are moved to vfio_pci_ioctl_pci_hot_reset_groups().

No functional change is intended.

Suggested-by: Jason Gunthorpe 
Signed-off-by: Jason Gunthorpe 
Reviewed-by: Jason Gunthorpe 
Reviewed-by: Eric Auger 
Reviewed-by: Kevin Tian 
Tested-by: Yanting Jiang 
Tested-by: Terrence Xu 
Signed-off-by: Yi Liu 
---
 drivers/vfio/pci/vfio_pci_core.c | 55 +++-
 1 file changed, 32 insertions(+), 23 deletions(-)

diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c
index 4e228e2a6d99..3d595ad2ed0a 100644
--- a/drivers/vfio/pci/vfio_pci_core.c
+++ b/drivers/vfio/pci/vfio_pci_core.c
@@ -1296,29 +1296,16 @@ static int vfio_pci_ioctl_get_pci_hot_reset_info(
return ret;
 }
 
-static int vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device *vdev,
-   struct vfio_pci_hot_reset __user *arg)
+static int
+vfio_pci_ioctl_pci_hot_reset_groups(struct vfio_pci_core_device *vdev,
+   int array_count, bool slot,
+   struct vfio_pci_hot_reset __user *arg)
 {
-   unsigned long minsz = offsetofend(struct vfio_pci_hot_reset, count);
-   struct vfio_pci_hot_reset hdr;
int32_t *group_fds;
struct file **files;
struct vfio_pci_group_info info;
-   bool slot = false;
int file_idx, count = 0, ret = 0;
 
-   if (copy_from_user(&hdr, arg, minsz))
-   return -EFAULT;
-
-   if (hdr.argsz < minsz || hdr.flags)
-   return -EINVAL;
-
-   /* Can we do a slot or bus reset or neither? */
-   if (!pci_probe_reset_slot(vdev->pdev->slot))
-   slot = true;
-   else if (pci_probe_reset_bus(vdev->pdev->bus))
-   return -ENODEV;
-
/*
 * We can't let userspace give us an arbitrarily large buffer to copy,
 * so verify how many we think there could be.  Note groups can have
@@ -1330,11 +1317,11 @@ static int vfio_pci_ioctl_pci_hot_reset(struct 
vfio_pci_core_device *vdev,
return ret;
 
/* Somewhere between 1 and count is OK */
-   if (!hdr.count || hdr.count > count)
+   if (!array_count || array_count > count)
return -EINVAL;
 
-   group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
-   files = kcalloc(hdr.count, sizeof(*files), GFP_KERNEL);
+   group_fds = kcalloc(array_count, sizeof(*group_fds), GFP_KERNEL);
+   files = kcalloc(array_count, sizeof(*files), GFP_KERNEL);
if (!group_fds || !files) {
kfree(group_fds);
kfree(files);
@@ -1342,7 +1329,7 @@ static int vfio_pci_ioctl_pci_hot_reset(struct 
vfio_pci_core_device *vdev,
}
 
if (copy_from_user(group_fds, arg->group_fds,
-  hdr.count * sizeof(*group_fds))) {
+  array_count * sizeof(*group_fds))) {
kfree(group_fds);
kfree(files);
return -EFAULT;
@@ -1352,7 +1339,7 @@ static int vfio_pci_ioctl_pci_hot_reset(struct 
vfio_pci_core_device *vdev,
 * Get the group file for each fd to ensure the group is held across
 * the reset
 */
-   for (file_idx = 0; file_idx < hdr.count; file_idx++) {
+   for (file_idx = 0; file_idx < array_count; file_idx++) {
struct file *file = fget(group_fds[file_idx]);
 
if (!file) {
@@ -1376,7 +1363,7 @@ static int vfio_pci_ioctl_pci_hot_reset(struct 
vfio_pci_core_device *vdev,
if (ret)
goto hot_reset_release;
 
-   info.count = hdr.count;
+   info.count = array_count;
info.files = files;
 
ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info);
@@ -1389,6 +1376,28 @@ static int vfio_pci_ioctl_pci_hot_reset(struct 
vfio_pci_core_device *vdev,
return ret;
 }
 
+static int vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device *vdev,
+   struct vfio_pci_hot_reset __user *arg)
+{
+   unsigned long minsz = offsetofend(struct vfio_pci_hot_reset, count);
+   struct vfio_pci_hot_reset hdr;
+   bool slot = false;
+
+   if (copy_from_user(&hdr, arg, minsz))
+   return -EFAULT;
+
+   if (hdr.argsz < minsz || hdr.flags)
+   return -EINVAL;
+
+   /* Can we do a slot or bus reset or neither? */
+   if (!pci_probe_reset_slot(vdev->pdev->slot))
+   slot = true;
+   else if (pci_probe_reset_bus(vdev->pdev->bus))
+   return -ENODEV;
+
+   return vfio_pci_ioctl_pci_hot_reset_groups(vdev, hdr.count, slot, arg);
+}
+
 static int vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device *vdev,
struct vfio_device_ioeventfd __user *arg)
 {
-- 
2.34.1

Re: [Intel-gfx] linux-next: manual merge of the drm tree with the drm-misc-fixes tree

[Stephen Rothwell]

Hi all,

On Tue, 27 Jun 2023 11:54:32 +1000 Stephen Rothwell  
wrote:
> 
> Today's linux-next merge of the drm tree got a conflict in:
> 
>   include/drm/gpu_scheduler.h
> 
> between commit:
> 
>   db8b4968a8d0 ("drm/sched: Call drm_sched_fence_set_parent() from 
> drm_sched_fence_scheduled()")
> 
> from the drm-misc-fixes tree and commit:
> 
>   539f9ee4b52a ("drm/scheduler: properly forward fence errors")
> 
> from the drm tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> diff --cc include/drm/gpu_scheduler.h
> index b29e347b10a9,e95b4837e5a3..
> --- a/include/drm/gpu_scheduler.h
> +++ b/include/drm/gpu_scheduler.h
> @@@ -581,16 -581,18 +581,17 @@@ void drm_sched_entity_push_job(struct d
>   void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
>  enum drm_sched_priority priority);
>   bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
> + int drm_sched_entity_error(struct drm_sched_entity *entity);
>   
>  -void drm_sched_fence_set_parent(struct drm_sched_fence *s_fence,
>  -struct dma_fence *fence);
>   struct drm_sched_fence *drm_sched_fence_alloc(
>   struct drm_sched_entity *s_entity, void *owner);
>   void drm_sched_fence_init(struct drm_sched_fence *fence,
> struct drm_sched_entity *entity);
>   void drm_sched_fence_free(struct drm_sched_fence *fence);
>   
>  -void drm_sched_fence_scheduled(struct drm_sched_fence *fence);
>  +void drm_sched_fence_scheduled(struct drm_sched_fence *fence,
>  +   struct dma_fence *parent);
> - void drm_sched_fence_finished(struct drm_sched_fence *fence);
> + void drm_sched_fence_finished(struct drm_sched_fence *fence, int result);
>   
>   unsigned long drm_sched_suspend_timeout(struct drm_gpu_scheduler *sched);
>   void drm_sched_resume_timeout(struct drm_gpu_scheduler *sched,

This is now a conflict between the drm-misc-fixes tree and Linus' tree.

-- 
Cheers,
Stephen Rothwell


pgptLYAKlrJOf.pgp
Description: OpenPGP digital signature

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Allow panel drrs modes to have differing sync polarities

[Patchwork]

== Series Details ==

Series: drm/i915: Allow panel drrs modes to have differing sync polarities
URL   : https://patchwork.freedesktop.org/series/120484/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13366 -> Patchwork_120484v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/index.html

Participating hosts (41 -> 39)
--

  Missing(2): fi-snb-2520m fi-pnv-d510 

Known issues


  Here are the changes found in Patchwork_120484v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-tgl-1115g4:  [PASS][1] -> [FAIL][2] ([i915#7940])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-tgl-1115g4/igt@i915_pm_...@basic-pci-d3-state.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/fi-tgl-1115g4/igt@i915_pm_...@basic-pci-d3-state.html
- bat-dg1-7:  [PASS][3] -> [FAIL][4] ([i915#7691])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-dg1-7/igt@i915_pm_...@basic-pci-d3-state.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/bat-dg1-7/igt@i915_pm_...@basic-pci-d3-state.html

  * igt@i915_pm_rpm@basic-rte:
- fi-cfl-8700k:   [PASS][5] -> [FAIL][6] ([i915#7940])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-cfl-8700k/igt@i915_pm_...@basic-rte.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/fi-cfl-8700k/igt@i915_pm_...@basic-rte.html

  * igt@i915_selftest@live@migrate:
- bat-dg2-11: [PASS][7] -> [DMESG-WARN][8] ([i915#7699])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-dg2-11/igt@i915_selftest@l...@migrate.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/bat-dg2-11/igt@i915_selftest@l...@migrate.html
- bat-atsm-1: [PASS][9] -> [DMESG-FAIL][10] ([i915#7699] / 
[i915#7913])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-atsm-1/igt@i915_selftest@l...@migrate.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/bat-atsm-1/igt@i915_selftest@l...@migrate.html

  * igt@i915_selftest@live@slpc:
- bat-mtlp-8: [PASS][11] -> [DMESG-WARN][12] ([i915#6367])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-mtlp-8/igt@i915_selftest@l...@slpc.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/bat-mtlp-8/igt@i915_selftest@l...@slpc.html
- bat-rpls-1: NOTRUN -> [DMESG-WARN][13] ([i915#6367])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/bat-rpls-1/igt@i915_selftest@l...@slpc.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-rpls-1: NOTRUN -> [ABORT][14] ([i915#6687] / [i915#7978] / 
[i915#8668])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/bat-rpls-1/igt@i915_susp...@basic-s3-without-i915.html

  
 Possible fixes 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-cfl-8700k:   [FAIL][15] ([i915#7940]) -> [PASS][16] +1 similar 
issue
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-cfl-8700k/igt@i915_pm_...@basic-pci-d3-state.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/fi-cfl-8700k/igt@i915_pm_...@basic-pci-d3-state.html

  * igt@i915_pm_rpm@basic-rte:
- fi-cfl-8109u:   [FAIL][17] ([i915#7940]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-cfl-8109u/igt@i915_pm_...@basic-rte.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/fi-cfl-8109u/igt@i915_pm_...@basic-rte.html
- fi-tgl-1115g4:  [FAIL][19] ([i915#7940]) -> [PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-tgl-1115g4/igt@i915_pm_...@basic-rte.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/fi-tgl-1115g4/igt@i915_pm_...@basic-rte.html

  * igt@i915_pm_rpm@module-reload:
- fi-skl-guc: [FAIL][21] ([i915#7940]) -> [PASS][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/fi-skl-guc/igt@i915_pm_...@module-reload.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/fi-skl-guc/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@requests:
- bat-rpls-1: [ABORT][23] ([i915#7920] / [i915#7982]) -> [PASS][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-rpls-1/igt@i915_selftest@l...@requests.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120484v1/bat-rpls-1/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@slpc:
- bat-mtlp-6: [DMESG-WARN][25] ([i915#6367]) -> [PASS][26]
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13366/bat-mtlp-6/igt@i915_selftest@l...@slpc.html
   [26]: 
https://intel-gfx-ci.01.org/

[Intel-gfx] [preempt-rt] BUG: sleeping function called from invalid context at drivers/gpu/drm/i915/gt/uc/intel_guc.h

[John B. Wyatt IV]

Hello everyone, I am a new kernel developer with the Red Hat real-time team.

I am seeing two different call traces with 6.4-rt6 on my 12th Gen Intel 
Framework Laptop with i915 emit the same bug. Both of them occurred in the same 
boot. This kernel was built and tested on RHEL8. [1] occurs only once. [2] 
occurs ~50 times in a boot and log in to the gnome desktop.

[1]

[ 3800.598054] BUG: sleeping function called from invalid context at 
drivers/gpu/drm/i915/gt/uc/intel_guc.h:329
[ 3800.598060] in_atomic(): 0, irqs_disabled(): 0, non_block: 0, pid: 207, 
name: kworker/4:1H
[ 3800.598063] preempt_count: 0, expected: 0
[ 3800.598065] RCU nest depth: 5, expected: 0
[ 3800.598066] 11 locks held by kworker/4:1H/207:
[ 3800.598069] #0: 93b400054f38 
((wq_completion)events_highpri){+.+.}-{0:0}, at: process_one_work 
(./include/linux/list.h:927 ./include/linux/hashtable.h:107 
kernel/workqueue.c:2446) 
[ 3800.598084] #1: bc7441087e70 
((work_completion)(&(&engine->heartbeat.work)->work)){+.+.}-{0:0}, at: 
process_one_work (./include/linux/list.h:899 ./include/linux/list.h:927 
./include/linux/hashtable.h:107 kernel/workqueue.c:2446) 
[ 3800.598093] #2: 93b401cfd470 (kernel_context){+.+.}-{3:3}, at: heartbeat 
(./include/linux/rcupdate.h:805 ./drivers/gpu/drm/i915/i915_request.h:622 
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c:148) i915
[ 3800.598247] #3: 93bb8cc207e0 ((softirq_ctrl.lock)){+.+.}-{2:2}, at: 
__local_bh_disable_ip (kernel/softirq.c:157 (discriminator 19)) 
[ 3800.598258] #4: 9fe21000 (rcu_read_lock){}-{1:2}, at: 
rt_spin_lock (kernel/locking/spinlock_rt.c:95) 
[ 3800.598268] #5: 9fe21000 (rcu_read_lock){}-{1:2}, at: 
__local_bh_disable_ip (kernel/softirq.c:157 (discriminator 15)) 
[ 3800.598276] #6: 9fe21000 (rcu_read_lock){}-{1:2}, at: 
submit_notify (./include/linux/rcupdate.h:805 
drivers/gpu/drm/i915/i915_request.c:798) i915
[ 3800.598457] #7: 93b5a1ccaa68 (&sched_engine->lock/2){+.+.}-{2:2}, at: 
guc_submit_request (drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:1985 
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:2001) i915
[ 3800.598632] #8: 9fe21000 (rcu_read_lock){}-{1:2}, at: 
rt_spin_lock (kernel/locking/spinlock_rt.c:95) 
[ 3800.598639] #9: 93b5a1e4f6f0 (&ce->guc_state.lock){+.+.}-{2:2}, at: 
add_to_context (./include/linux/list.h:134 ./include/linux/list.h:229 
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3408) i915
[ 3800.598801] #10: 9fe21000 (rcu_read_lock){}-{1:2}, at: 
rt_spin_lock (kernel/locking/spinlock_rt.c:95) 
[ 3800.598813] Hardware name: Framework Laptop (12th Gen Intel 
Core)/FRANGACP04, BIOS 03.04 07/15/2022
[ 3800.598816] Workqueue: events_highpri heartbeat [i915]
[ 3800.598935] Call Trace:
[ 3800.598937]  
[ 3800.598940] dump_stack_lvl (lib/dump_stack.c:113) 
[ 3800.598947] __might_resched+0x1a0/0x260 
[ 3800.598956] guc_context_set_prio 
(drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3345 
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:4009) i915
[ 3800.599123] ? lock_is_held_type+0xe1/0x140 
[ 3800.599133] add_to_context 
(drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3386 
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3430 
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:4034) i915
[ 3800.599300] __i915_request_submit (drivers/gpu/drm/i915/i915_request.c:199 
drivers/gpu/drm/i915/i915_request.c:210 
drivers/gpu/drm/i915/i915_request.c:691) i915
[ 3800.599460] guc_submit_request 
(drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:1966 
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:2003) i915
[ 3800.599622] submit_notify (./include/linux/refcount.h:199 
./include/linux/refcount.h:250 ./include/linux/refcount.h:267 
./include/linux/kref.h:45 ./include/linux/dma-fence.h:308 
./include/linux/dma-fence.h:305 ./drivers/gpu/drm/i915/i915_request.h:402 
drivers/gpu/drm/i915/i915_request.c:309 
drivers/gpu/drm/i915/i915_request.c:786) i915
[ 3800.599784] __i915_sw_fence_complete 
(drivers/gpu/drm/i915/i915_sw_fence.c:201) i915
[ 3800.599919] __i915_request_queue (./include/linux/bottom_half.h:33 
drivers/gpu/drm/i915/i915_request.c:1832) i915
[ 3800.600108] heartbeat (drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c:285) 
i915
[ 3800.600241] process_one_work (./arch/x86/include/asm/bitops.h:228 
./arch/x86/include/asm/bitops.h:240 
./include/asm-generic/bitops/instrumented-non-atomic.h:142 
./include/linux/cpumask.h:504 ./include/linux/cpumask.h:1082 
./include/trace/events/workqueue.h:82 kernel/workqueue.c:2407) 
[ 3800.600261] worker_thread (kernel/workqueue.c:2556) 
[ 3800.600269] ? __pfx_worker_thread (kernel/workqueue.c:2498) 
[ 3800.600273] kthread (kernel/kthread.c:348) 
[ 3800.600278] ? __pfx_kthread (kernel/kthread.c:332) 
[ 3800.600287] ret_from_fork (arch/x86/entry/entry_64.S:308) 
[ 3800.600312]  

[2]

[ 3796.648741] BUG: sleeping function called from invalid context at 
drivers/gpu/drm/i915/gt/uc/intel_guc.h:329
[ 3796.648746] in_atomic(): 0, 

[Intel-gfx] [PATCH] drm/i915: Allow panel drrs modes to have differing sync polarities

[Vidya Srinivas]

v2: Add Jani Nikula's change for quirk for sync polarity

CC: Jani Nikula 
Credits-to: Jani Nikula 
Signed-off-by: Vidya Srinivas 
---
 drivers/gpu/drm/i915/display/intel_display.c |  2 +-
 drivers/gpu/drm/i915/display/intel_panel.c   | 10 ++
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 43cba98f7753..088b45e032aa 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5234,7 +5234,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
  DRM_MODE_FLAG_INTERLACE);
 
-   if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
+   if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS) && !fastset) {
PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
  DRM_MODE_FLAG_PHSYNC);
PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c 
b/drivers/gpu/drm/i915/display/intel_panel.c
index 9232a305b1e6..b9eeaedabd22 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -112,10 +112,12 @@ intel_panel_fixed_mode(struct intel_connector *connector,
 static bool is_alt_drrs_mode(const struct drm_display_mode *mode,
 const struct drm_display_mode *preferred_mode)
 {
-   return drm_mode_match(mode, preferred_mode,
- DRM_MODE_MATCH_TIMINGS |
- DRM_MODE_MATCH_FLAGS |
- DRM_MODE_MATCH_3D_FLAGS) &&
+   u32 sync_flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC |
+   DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC;
+
+   return (mode->flags & ~sync_flags) == (preferred_mode->flags & 
~sync_flags) &&
+   mode->hdisplay == preferred_mode->hdisplay &&
+   mode->vdisplay == preferred_mode->vdisplay &&
mode->clock != preferred_mode->clock;
 }
 
-- 
2.33.0

[Intel-gfx] ✗ Fi.CI.IGT: failure for Add rc_range_params for YUV420 (rev2)

[Patchwork]

== Series Details ==

Series: Add rc_range_params for YUV420 (rev2)
URL   : https://patchwork.freedesktop.org/series/120205/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13365_full -> Patchwork_120205v2_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_120205v2_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_120205v2_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_120205v2_full:

### CI changes ###

 Possible regressions 

  * boot:
- shard-dg2:  ([PASS][1], [PASS][2], [PASS][3], [PASS][4], 
[PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], 
[PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], 
[PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], 
[PASS][24]) -> ([PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], 
[PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], 
[PASS][36], [PASS][37], [FAIL][38], [PASS][39], [PASS][40], [PASS][41], 
[PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], 
[PASS][48])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-7/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-7/boot.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-7/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-6/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-6/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-6/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-5/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-5/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-5/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-2/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-2/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-2/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-1/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-1/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-1/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-12/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-12/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-11/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-11/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-11/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-10/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-10/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-8/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/shard-dg2-8/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-10/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-10/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-10/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-11/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-11/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-11/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-12/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-12/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-12/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-12/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-1/boot.html
   [36]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-1/boot.html
   [37]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-1/boot.html
   [38]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-dg2-2/boot.html
   [39]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/shard-d

[Intel-gfx] ✓ Fi.CI.IGT: success for MTL Degamma implementation (rev2)

[Patchwork]

== Series Details ==

Series: MTL Degamma implementation (rev2)
URL   : https://patchwork.freedesktop.org/series/119844/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13364_full -> Patchwork_119844v2_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 10)
--

  No changes in participating hosts

Known issues


  Here are the changes found in Patchwork_119844v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_fdinfo@virtual-busy-all:
- shard-mtlp: NOTRUN -> [SKIP][1] ([i915#8414])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-mtlp-6/igt@drm_fdi...@virtual-busy-all.html

  * igt@drm_fdinfo@virtual-idle:
- shard-rkl:  [PASS][2] -> [FAIL][3] ([i915#7742]) +1 similar issue
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-rkl-4/igt@drm_fdi...@virtual-idle.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-rkl-7/igt@drm_fdi...@virtual-idle.html

  * igt@gem_bad_reloc@negative-reloc-bltcopy:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#3281])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-mtlp-6/igt@gem_bad_re...@negative-reloc-bltcopy.html

  * igt@gem_ccs@block-copy-compressed:
- shard-mtlp: NOTRUN -> [SKIP][5] ([i915#5325])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-mtlp-6/igt@gem_...@block-copy-compressed.html

  * igt@gem_create@hog-create@smem0:
- shard-dg2:  [PASS][6] -> [FAIL][7] ([i915#5892] / [i915#8758])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-dg2-10/igt@gem_create@hog-cre...@smem0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-dg2-5/igt@gem_create@hog-cre...@smem0.html

  * igt@gem_ctx_param@set-priority-not-supported:
- shard-mtlp: NOTRUN -> [SKIP][8] ([fdo#109314])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-mtlp-6/igt@gem_ctx_pa...@set-priority-not-supported.html

  * igt@gem_ctx_persistence@heartbeat-close:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#8555])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-mtlp-6/igt@gem_ctx_persiste...@heartbeat-close.html

  * igt@gem_ctx_persistence@hostile:
- shard-snb:  NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099]) +1 
similar issue
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-snb4/igt@gem_ctx_persiste...@hostile.html

  * igt@gem_ctx_sseu@invalid-sseu:
- shard-tglu: NOTRUN -> [SKIP][11] ([i915#280])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-tglu-5/igt@gem_ctx_s...@invalid-sseu.html

  * igt@gem_exec_await@wide-contexts:
- shard-dg2:  [PASS][12] -> [FAIL][13] ([i915#5892])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-dg2-10/igt@gem_exec_aw...@wide-contexts.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-dg2-5/igt@gem_exec_aw...@wide-contexts.html

  * igt@gem_exec_balancer@full-pulse:
- shard-dg2:  [PASS][14] -> [FAIL][15] ([i915#6032])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-dg2-12/igt@gem_exec_balan...@full-pulse.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-dg2-12/igt@gem_exec_balan...@full-pulse.html

  * igt@gem_exec_balancer@hog:
- shard-mtlp: NOTRUN -> [SKIP][16] ([i915#4812])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-mtlp-6/igt@gem_exec_balan...@hog.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk:  [PASS][17] -> [FAIL][18] ([i915#2842])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-glk2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-glk2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
- shard-rkl:  [PASS][19] -> [FAIL][20] ([i915#2842]) +1 similar 
issue
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-rkl-2/igt@gem_exec_fair@basic-throt...@rcs0.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-rkl-2/igt@gem_exec_fair@basic-throt...@rcs0.html
- shard-tglu: NOTRUN -> [FAIL][21] ([i915#2842])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-tglu-5/igt@gem_exec_fair@basic-throt...@rcs0.html

  * igt@gem_exec_gttfill@multigpu-basic:
- shard-mtlp: NOTRUN -> [SKIP][22] ([i915#7697])
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/shard-mtlp-6/igt@gem_exec_gttf...@multigpu-basic.html

  * igt@gem_exec_whisper@basic-fds-priority-all:
- shard-mtlp: [PAS

Re: [Intel-gfx] [PATCH v2] i915/display/hotplug: use drm_kms_helper_connector_hotplug_event()

[Manasi Navare]

It looks good to me and will be very helpful for Chrome userspace, but
can we get some R-B from Intel folks so we can get this merged?

Regards
Manasi

On Mon, Jul 10, 2023 at 12:27 AM Simon Ser  wrote:
>
> Any news about this patch?

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pmu: Use local64_try_cmpxchg in i915_pmu_event_read (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/pmu: Use local64_try_cmpxchg in i915_pmu_event_read (rev2)
URL   : https://patchwork.freedesktop.org/series/120296/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13364_full -> Patchwork_120296v2_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_120296v2_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_120296v2_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_120296v2_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_content_protection@atomic@pipe-a-dp-2:
- shard-dg2:  NOTRUN -> [DMESG-FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-dg2-12/igt@kms_content_protection@ato...@pipe-a-dp-2.html

  
Known issues


  Here are the changes found in Patchwork_120296v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_fdinfo@virtual-busy-all:
- shard-mtlp: NOTRUN -> [SKIP][2] ([i915#8414])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-mtlp-8/igt@drm_fdi...@virtual-busy-all.html

  * igt@drm_fdinfo@virtual-idle:
- shard-rkl:  [PASS][3] -> [FAIL][4] ([i915#7742])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-rkl-4/igt@drm_fdi...@virtual-idle.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-rkl-2/igt@drm_fdi...@virtual-idle.html

  * igt@gem_create@hog-create@smem0:
- shard-dg2:  [PASS][5] -> [FAIL][6] ([i915#5892] / [i915#8758])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-dg2-10/igt@gem_create@hog-cre...@smem0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-dg2-6/igt@gem_create@hog-cre...@smem0.html

  * igt@gem_ctx_persistence@hostile:
- shard-snb:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) +1 
similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-snb2/igt@gem_ctx_persiste...@hostile.html

  * igt@gem_ctx_sseu@invalid-sseu:
- shard-tglu: NOTRUN -> [SKIP][8] ([i915#280])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-tglu-9/igt@gem_ctx_s...@invalid-sseu.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk:  [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-glk2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-glk3/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
- shard-rkl:  [PASS][11] -> [FAIL][12] ([i915#2842]) +3 similar 
issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-rkl-2/igt@gem_exec_fair@basic-throt...@rcs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-rkl-4/igt@gem_exec_fair@basic-throt...@rcs0.html
- shard-tglu: NOTRUN -> [FAIL][13] ([i915#2842])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-tglu-9/igt@gem_exec_fair@basic-throt...@rcs0.html

  * igt@gem_exec_reloc@basic-wc-cpu-active:
- shard-mtlp: NOTRUN -> [SKIP][14] ([i915#3281])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-mtlp-1/igt@gem_exec_re...@basic-wc-cpu-active.html

  * igt@gem_exec_schedule@deep@vcs1:
- shard-mtlp: [PASS][15] -> [FAIL][16] ([i915#8606])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/shard-mtlp-8/igt@gem_exec_schedule@d...@vcs1.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-mtlp-8/igt@gem_exec_schedule@d...@vcs1.html

  * igt@gem_mmap_gtt@fault-concurrent:
- shard-mtlp: NOTRUN -> [SKIP][17] ([i915#4077]) +1 similar issue
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-mtlp-8/igt@gem_mmap_...@fault-concurrent.html

  * igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-tglu: NOTRUN -> [SKIP][18] ([i915#3297]) +1 similar issue
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-tglu-9/igt@gem_userptr_bl...@invalid-mmap-offset-unsync.html

  * igt@gen9_exec_parse@unaligned-access:
- shard-tglu: NOTRUN -> [SKIP][19] ([i915#2527] / [i915#2856])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/shard-tglu-9/igt@gen9_exec_pa...@unaligned-access.html

  * igt@i915_module_load@load:
- shard-snb

Re: [Intel-gfx] [PATCH v3 RESEND] x86/mm: Fix PAT bit missing from page protection modify mask

[Edgecombe, Rick P]

On Mon, 2023-07-10 at 09:36 +0200, Janusz Krzysztofik wrote:
> The issue needs to be fixed by including _PAGE_PAT bit into a bitmask
> used
> by pgprot_modify() for selecting bits to be preserved.  We can do
> that
> either internally to pgprot_modify() (as initially proposed), or by
> making
> _PAGE_PAT a part of _PAGE_CHG_MASK.  If we go for the latter then,
> since
> _PAGE_PAT is the same as _PAGE_PSE, we need to note that
> _HPAGE_CHG_MASK
> -- a huge pmds' counterpart of _PAGE_CHG_MASK, introduced by commit
> c489f1257b8c ("thp: add pmd_modify"), defined as (_PAGE_CHG_MASK |
> _PAGE_PSE) -- will no longer differ from _PAGE_CHG_MASK.  If such
> modification of _PAGE_CHG_MASK was irrelevant to its users then one
> might
> wonder why that new _HPAGE_CHG_MASK symbol was introduced instead of
> reusing the existing one with that otherwise irrelevant bit
> (_PAGE_PSE in
> that case) added.
> 
> Assume that adding _PAGE_PAT to _PAGE_CHG_MASK doesn't break
> pte_modify()
> and its users, and go for it.  Also, add _PAGE_PAT_LARGE to
> _HPAGE_CHG_MASK for symmetry.  For better clarity, split out common
> bits
> from both symbols to another one and use it together with specific
> bits
> when defining the masks.

I think this whole entanglement is a bit confusing, but not
functionally broken.

The problem is kind of that the existing code assumes that all vma-
>vm_page_prot relevant prot bit positions are identical between PTE and
PMDs. The bug is that _PAGE_PAT is not treated as relevant, but it
actually is. So fixing it breaks the assumption.

Not trying to suggest we shouldn't do the simple fix here, but I wonder
if it is worth clearing it up further?

I think at least we should include a comment around _PAGE_CHG_MASK or
_PAGE_PAT as to why it is assumed that this will not cause problems.
This way, someone in the future can see the error in the reasoning if
something changes. Would something like this be useful and correct
reasoning?

/*
 * Bit 7 has different meanings for PTEs and PMDs. On PTEs it is the
 * PAT bit, and on PMDs it is the PSE bit. This creates some confusing 
 * entanglement in code that operates page table bits that end up in
 * both PTEs and PMDs.
 *
 * vma->vm_page_prot is used for constructing both PTE's and huge
 * page PMDs. This member is set via vm_pgprot_modify() which, despite
 * vma->vm_page_prot being used to set huge pages as well, only filters
 * bits with _PAGE_CHG_MASK (actually in pgprot_modify()). This means
 * by having _PAGE_PAT in _PAGE_CHG_MASK, _PAGE_PSE will also be 
 * preserved.
 *
 * This should be harmless because vma->vm_page_prot is only applied to
 * leaf page table entries. In the case of _PAGE_PAT in
 * vma->vm_page_prot being inadvertently applied to a huge page, this
 * is fine because _PAGE_PSE will already be being set on a huge page.
 * It is expected that code should not try to add _PAGE_PSE to
 * vma->vm_page_prot, so there shouldn't be the case of inadvertently
 * setting _PAGE_PAT in a PTE. So the saving grace is that PSE is
 * *always* set on PMDs that add bits derived from vma->vm_page_prot.
 */

[Intel-gfx] ✓ Fi.CI.BAT: success for Add rc_range_params for YUV420 (rev2)

[Patchwork]

== Series Details ==

Series: Add rc_range_params for YUV420 (rev2)
URL   : https://patchwork.freedesktop.org/series/120205/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13365 -> Patchwork_120205v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/index.html

Participating hosts (42 -> 41)
--

  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_120205v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@core_auth@basic-auth:
- bat-adlp-11:NOTRUN -> [ABORT][1] ([i915#4423] / [i915#8011])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-adlp-11/igt@core_a...@basic-auth.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlp-9: NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-adlp-9/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_pm_rpm@basic-rte:
- fi-cfl-guc: [PASS][3] -> [FAIL][4] ([i915#7940])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/fi-cfl-guc/igt@i915_pm_...@basic-rte.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/fi-cfl-guc/igt@i915_pm_...@basic-rte.html

  * igt@i915_pm_rps@basic-api:
- bat-adlp-9: NOTRUN -> [SKIP][5] ([i915#6621])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-adlp-9/igt@i915_pm_...@basic-api.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [PASS][6] -> [DMESG-FAIL][7] ([i915#5334])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@reset:
- bat-rpls-2: [PASS][8] -> [ABORT][9] ([i915#4983] / [i915#7461] / 
[i915#7913] / [i915#8347])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/bat-rpls-2/igt@i915_selftest@l...@reset.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-rpls-2/igt@i915_selftest@l...@reset.html

  * igt@i915_selftest@live@slpc:
- bat-mtlp-8: [PASS][10] -> [DMESG-WARN][11] ([i915#6367])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/bat-mtlp-8/igt@i915_selftest@l...@slpc.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-mtlp-8/igt@i915_selftest@l...@slpc.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-adlp-9: NOTRUN -> [SKIP][12] ([i915#7828])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-adlp-9/igt@kms_chamelium_...@common-hpd-after-suspend.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-rplp-1: NOTRUN -> [ABORT][13] ([i915#8260] / [i915#8668])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-rplp-1/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
- bat-adlp-9: NOTRUN -> [SKIP][14] ([fdo#109295] / [i915#3291] / 
[i915#3708]) +2 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-adlp-9/igt@prime_v...@basic-fence-read.html

  
 Possible fixes 

  * igt@i915_module_load@reload:
- fi-kbl-soraka:  [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/fi-kbl-soraka/igt@i915_module_l...@reload.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/fi-kbl-soraka/igt@i915_module_l...@reload.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-skl-guc: [FAIL][17] ([i915#7940]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/fi-skl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/fi-skl-guc/igt@i915_pm_...@basic-pci-d3-state.html

  * igt@i915_pm_rpm@basic-rte:
- fi-cfl-8700k:   [FAIL][19] ([i915#7940]) -> [PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/fi-cfl-8700k/igt@i915_pm_...@basic-rte.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/fi-cfl-8700k/igt@i915_pm_...@basic-rte.html
- bat-adlp-9: [ABORT][21] ([i915#7977] / [i915#8668]) -> [PASS][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/bat-adlp-9/igt@i915_pm_...@basic-rte.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120205v2/bat-adlp-9/igt@i915_pm_...@basic-rte.html

  * igt@i915_selftest@live@migrate:
- bat-mtlp-6: [DMESG-FAIL][23] ([i915#7699]) -> [PASS][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13365/bat-mtlp-6/igt@i915_selftest@l...@migrate.html
   [2

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add rc_range_params for YUV420 (rev2)

[Patchwork]

== Series Details ==

Series: Add rc_range_params for YUV420 (rev2)
URL   : https://patchwork.freedesktop.org/series/120205/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:237:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:239:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: 

[Intel-gfx] ✗ Fi.CI.BUILD: failure for v6.1 stable backport request

[Patchwork]

== Series Details ==

Series: v6.1 stable backport request
URL   : https://patchwork.freedesktop.org/series/120468/
State : failure

== Summary ==

Error: patch 
https://patchwork.freedesktop.org/api/1.0/series/120468/revisions/1/mbox/ not 
applied
Applying: drm/i915/tc: Fix system resume MST mode restore for DP-alt sinks
error: sha1 information is lacking or useless 
(drivers/gpu/drm/i915/display/intel_tc.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 drm/i915/tc: Fix system resume MST mode restore for DP-alt 
sinks
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced

[Intel-gfx] [PATCH v5 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCbCr420

[Suraj Kandpal]

Some rc_range_parameter calculations were missed for YCbCr420,
add them to calculate_rc_param()

--v2
-take into account the new formula to get bpp_i

--v4
-Fix range_bpg_offset formula for YCbCr420 bpp <= 16 [Ankit]

--v5
-Fix comment and mention use of DSC C Model [Ankit]

Cc: Vandita Kulkarni 
Cc: Ankit Nautiyal 
Cc: Uma Shankar 
Signed-off-by: Suraj Kandpal 
Reviewed-by: Ankit Nautiyal 
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 141 --
 1 file changed, 103 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index cfcd463f66bb..647435141c3f 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -52,23 +52,33 @@ static bool is_pipe_dsc(struct intel_crtc *crtc, enum 
transcoder cpu_transcoder)
return true;
 }
 
+static void
+intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, int buf,
+ int bpp)
+{
+   int bpc = vdsc_cfg->bits_per_component;
+
+   /* Read range_minqp and range_max_qp from qp tables */
+   vdsc_cfg->rc_range_params[buf].range_min_qp =
+   intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420);
+   vdsc_cfg->rc_range_params[buf].range_max_qp =
+   intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420);
+}
+
+/*
+ * We are using the method provided to us in DSC 1.2a C-Model in codec_main.c
+ * Above method use a common formula to derive values for any combination of 
DSC
+ * variables. The formula approach may yield slight differences in the derived 
PPS
+ * parameters from the original parameter sets. These differences are not 
consequential
+ * to the coding performance because all parameter sets have been shown to 
produce
+ * visually lossless quality (provides the same PPS values as
+ * DSCParameterValuesVESA V1-2 spreadsheet)
+ */
 static void
 calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
 {
int bpc = vdsc_cfg->bits_per_component;
int bpp = vdsc_cfg->bits_per_pixel >> 4;
-   static const s8 ofs_und6[] = {
-   0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
-   };
-   static const s8 ofs_und8[] = {
-   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
-   };
-   static const s8 ofs_und12[] = {
-   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
-   };
-   static const s8 ofs_und15[] = {
-   10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
-   };
int qp_bpc_modifier = (bpc - 8) * 2;
u32 res, buf_i, bpp_i;
 
@@ -119,33 +129,88 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
vdsc_cfg->rc_quant_incr_limit0 = 11 + qp_bpc_modifier;
vdsc_cfg->rc_quant_incr_limit1 = 11 + qp_bpc_modifier;
 
-   bpp_i  = (2 * (bpp - 6));
-   for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
-   u8 range_bpg_offset;
-
-   /* Read range_minqp and range_max_qp from qp tables */
-   vdsc_cfg->rc_range_params[buf_i].range_min_qp =
-   intel_lookup_range_min_qp(bpc, buf_i, bpp_i, 
vdsc_cfg->native_420);
-   vdsc_cfg->rc_range_params[buf_i].range_max_qp =
-   intel_lookup_range_max_qp(bpc, buf_i, bpp_i, 
vdsc_cfg->native_420);
-
-   /* Calculate range_bpg_offset */
-   if (bpp <= 6) {
-   range_bpg_offset = ofs_und6[buf_i];
-   } else if (bpp <= 8) {
-   res = DIV_ROUND_UP(((bpp - 6) * (ofs_und8[buf_i] - 
ofs_und6[buf_i])), 2);
-   range_bpg_offset = ofs_und6[buf_i] + res;
-   } else if (bpp <= 12) {
-   range_bpg_offset = ofs_und8[buf_i];
-   } else if (bpp <= 15) {
-   res = DIV_ROUND_UP(((bpp - 12) * (ofs_und15[buf_i] - 
ofs_und12[buf_i])), 3);
-   range_bpg_offset = ofs_und12[buf_i] + res;
-   } else {
-   range_bpg_offset = ofs_und15[buf_i];
+   if (vdsc_cfg->native_420) {
+   static const s8 ofs_und4[] = {
+   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -12, -12, 
-12, -12
+   };
+   static const s8 ofs_und5[] = {
+   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, 
-12, -12
+   };
+   static const s8 ofs_und6[] = {
+   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, 
-12, -12
+   };
+   static const s8 ofs_und8[] = {
+   10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, 
-12
+   };
+
+   bpp_i  = bpp - 8;
+   for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
+   u8 range_bpg_offset;
+
+   intel_vdsc_set_min_m

Re: [Intel-gfx] [PATCH v4 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCbCr420

[Kandpal, Suraj]

> 
> On 7/5/2023 10:45 AM, Suraj Kandpal wrote:
> > Some rc_range_parameter calculations were missed for YCbCr420, add
> > them to calculate_rc_param()
> >
> > --v2
> > -take into account the new formula to get bpp_i
> >
> > --v4
> > -Fix range_bpg_offset formula for YCbCr420 bpp <= 16 [Ankit]
> >
> > Cc: Vandita Kulkarni 
> > Cc: Ankit Nautiyal 
> > Cc: Uma Shankar 
> > Signed-off-by: Suraj Kandpal 
> > ---
> >   drivers/gpu/drm/i915/display/intel_vdsc.c | 144 --
> >   1 file changed, 106 insertions(+), 38 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> > b/drivers/gpu/drm/i915/display/intel_vdsc.c
> > index cfcd463f66bb..8f0dac908e61 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> > @@ -52,23 +52,36 @@ static bool is_pipe_dsc(struct intel_crtc *crtc, enum
> transcoder cpu_transcoder)
> > return true;
> >   }
> >
> > +static void
> > +intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, int buf,
> > + int bpp)
> > +{
> > +   int bpc = vdsc_cfg->bits_per_component;
> > +
> > +   /* Read range_minqp and range_max_qp from qp tables */
> > +   vdsc_cfg->rc_range_params[buf].range_min_qp =
> > +   intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg-
> >native_420);
> > +   vdsc_cfg->rc_range_params[buf].range_max_qp =
> > +   intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg-
> >native_420); }
> > +
> > +/*
> > + * Calculate RC Params using the below two methods:
> > + * 1. DSCParameterValuesVESA V1-2 spreadsheet
> > + * 2. VESA DSC 1.2a DSC Tools Application.
> > + * Note:
> > + * Above two methods use a common formula to derive values for any
> > +combination of DSC
> > + * variables. The formula approach may yield slight differences in
> > +the derived PPS
> > + * parameters from the original parameter sets. These differences are
> > +not consequential
> > + * to the coding performance because all parameter sets have been
> > +shown to produce
> > + * visually lossless quality (provides the same PPS values as
> > + * DSCParameterValuesVESA V1-2 spreadsheet)  */
> 
> 
> As I understand we are using the values of rc parameters from the tables
> given for DSC tools application from C-model for different bits_per_pixel and
> bpcs.
> 
> It would be good to mention the C-model used for these values.
> 
> 
> >   static void
> >   calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
> >   {
> > int bpc = vdsc_cfg->bits_per_component;
> > int bpp = vdsc_cfg->bits_per_pixel >> 4;
> > -   static const s8 ofs_und6[] = {
> > -   0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
> > -   };
> > -   static const s8 ofs_und8[] = {
> > -   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
> > -   };
> > -   static const s8 ofs_und12[] = {
> > -   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
> > -   };
> > -   static const s8 ofs_und15[] = {
> > -   10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
> > -   };
> > int qp_bpc_modifier = (bpc - 8) * 2;
> > u32 res, buf_i, bpp_i;
> >
> > @@ -119,33 +132,88 @@ calculate_rc_params(struct drm_dsc_config
> *vdsc_cfg)
> > vdsc_cfg->rc_quant_incr_limit0 = 11 + qp_bpc_modifier;
> > vdsc_cfg->rc_quant_incr_limit1 = 11 + qp_bpc_modifier;
> >
> > -   bpp_i  = (2 * (bpp - 6));
> > -   for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
> > -   u8 range_bpg_offset;
> > -
> > -   /* Read range_minqp and range_max_qp from qp tables */
> > -   vdsc_cfg->rc_range_params[buf_i].range_min_qp =
> > -   intel_lookup_range_min_qp(bpc, buf_i, bpp_i,
> vdsc_cfg->native_420);
> > -   vdsc_cfg->rc_range_params[buf_i].range_max_qp =
> > -   intel_lookup_range_max_qp(bpc, buf_i, bpp_i,
> vdsc_cfg->native_420);
> > -
> > -   /* Calculate range_bpg_offset */
> > -   if (bpp <= 6) {
> > -   range_bpg_offset = ofs_und6[buf_i];
> > -   } else if (bpp <= 8) {
> > -   res = DIV_ROUND_UP(((bpp - 6) * (ofs_und8[buf_i] -
> ofs_und6[buf_i])), 2);
> > -   range_bpg_offset = ofs_und6[buf_i] + res;
> > -   } else if (bpp <= 12) {
> > -   range_bpg_offset = ofs_und8[buf_i];
> > -   } else if (bpp <= 15) {
> > -   res = DIV_ROUND_UP(((bpp - 12) * (ofs_und15[buf_i]
> - ofs_und12[buf_i])), 3);
> > -   range_bpg_offset = ofs_und12[buf_i] + res;
> > -   } else {
> > -   range_bpg_offset = ofs_und15[buf_i];
> > +   if (vdsc_cfg->native_420) {
> > +   static const s8 ofs_und4[] = {
> > +   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -12, -12, 
> > -12, -12
> > +   };
> > +   static const s8 ofs_und5[] = {
> > +   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, 
> > -12, -12
> > + 

[Intel-gfx] ✓ Fi.CI.BAT: success for MTL Degamma implementation (rev2)

[Patchwork]

== Series Details ==

Series: MTL Degamma implementation (rev2)
URL   : https://patchwork.freedesktop.org/series/119844/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13364 -> Patchwork_119844v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/index.html

Participating hosts (41 -> 40)
--

  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_119844v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-adlp-11:NOTRUN -> [SKIP][1] ([i915#7456])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_tiled_pread_basic:
- bat-adlp-11:NOTRUN -> [SKIP][2] ([i915#3282])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-adlp-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rpm@basic-rte:
- fi-cfl-8109u:   [PASS][3] -> [FAIL][4] ([i915#7940])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-cfl-8109u/igt@i915_pm_...@basic-rte.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/fi-cfl-8109u/igt@i915_pm_...@basic-rte.html

  * igt@i915_pm_rpm@module-reload:
- fi-tgl-1115g4:  [PASS][5] -> [FAIL][6] ([i915#7940])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-tgl-1115g4/igt@i915_pm_...@module-reload.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/fi-tgl-1115g4/igt@i915_pm_...@module-reload.html
- fi-cfl-8700k:   [PASS][7] -> [FAIL][8] ([i915#7940])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-cfl-8700k/igt@i915_pm_...@module-reload.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/fi-cfl-8700k/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@migrate:
- bat-rpls-2: [PASS][9] -> [DMESG-FAIL][10] ([i915#7699] / 
[i915#7913])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-rpls-2/igt@i915_selftest@l...@migrate.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-rpls-2/igt@i915_selftest@l...@migrate.html

  * igt@i915_selftest@live@slpc:
- bat-rpls-1: [PASS][11] -> [DMESG-WARN][12] ([i915#6367])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-rpls-1/igt@i915_selftest@l...@slpc.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-rpls-1/igt@i915_selftest@l...@slpc.html

  * igt@kms_addfb_basic@addfb25-bad-modifier:
- bat-adlp-11:NOTRUN -> [ABORT][13] ([i915#4423])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-adlp-11/igt@kms_addfb_ba...@addfb25-bad-modifier.html

  * igt@kms_psr@primary_page_flip:
- bat-rplp-1: NOTRUN -> [SKIP][14] ([i915#1072]) +1 similar issue
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-rplp-1/igt@kms_psr@primary_page_flip.html

  * igt@kms_psr@sprite_plane_onoff:
- bat-rplp-1: NOTRUN -> [ABORT][15] ([i915#8712])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-rplp-1/igt@kms_psr@sprite_plane_onoff.html

  
 Possible fixes 

  * igt@core_auth@basic-auth:
- bat-adlp-11:[ABORT][16] ([i915#8011]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-adlp-11/igt@core_a...@basic-auth.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-adlp-11/igt@core_a...@basic-auth.html

  * igt@i915_module_load@load:
- bat-adlp-11:[DMESG-WARN][18] ([i915#4423]) -> [PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-adlp-11/igt@i915_module_l...@load.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-adlp-11/igt@i915_module_l...@load.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-x1275:   [SKIP][20] ([fdo#109271]) -> [PASS][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-kbl-x1275/igt@i915_pm_...@basic-pci-d3-state.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/fi-kbl-x1275/igt@i915_pm_...@basic-pci-d3-state.html

  * igt@i915_pm_rpm@basic-rte:
- fi-cfl-guc: [FAIL][22] ([i915#7940]) -> [PASS][23]
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-cfl-guc/igt@i915_pm_...@basic-rte.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/fi-cfl-guc/igt@i915_pm_...@basic-rte.html

  * igt@i915_selftest@live@gt_mocs:
- bat-mtlp-6: [DMESG-FAIL][24] ([i915#7059]) -> [PASS][25]
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119844v2/bat-mtlp-6/ig

[Intel-gfx] ✗ Fi.CI.IGT: failure for x86/mm: Fix PAT bit missing from page protection modify mask (rev4)

[Patchwork]

== Series Details ==

Series: x86/mm: Fix PAT bit missing from page protection modify mask (rev4)
URL   : https://patchwork.freedesktop.org/series/116883/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13363_full -> Patchwork_116883v4_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_116883v4_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_116883v4_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_116883v4_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_mmap_gtt@cpuset-big-copy-odd:
- shard-snb:  [PASS][1] -> [ABORT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/shard-snb2/igt@gem_mmap_...@cpuset-big-copy-odd.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-snb7/igt@gem_mmap_...@cpuset-big-copy-odd.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-glk:  [PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/shard-glk7/igt@kms_cursor_leg...@2x-long-cursor-vs-flip-legacy.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-glk7/igt@kms_cursor_leg...@2x-long-cursor-vs-flip-legacy.html

  
New tests
-

  New tests have been introduced between CI_DRM_13363_full and 
Patchwork_116883v4_full:

### New Piglit tests (1) ###

  * igt@i915_pm_rpm@basic-rte:
- Statuses : 1 fail(s)
- Exec time: [0.0] s

  

Known issues


  Here are the changes found in Patchwork_116883v4_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_fdinfo@virtual-busy-all:
- shard-mtlp: NOTRUN -> [SKIP][5] ([i915#8414])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-mtlp-4/igt@drm_fdi...@virtual-busy-all.html

  * igt@feature_discovery@psr2:
- shard-tglu: NOTRUN -> [SKIP][6] ([i915#658])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-tglu-2/igt@feature_discov...@psr2.html

  * igt@gem_barrier_race@remote-request@rcs0:
- shard-tglu: [PASS][7] -> [ABORT][8] ([i915#8211] / [i915#8234])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/shard-tglu-7/igt@gem_barrier_race@remote-requ...@rcs0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-tglu-4/igt@gem_barrier_race@remote-requ...@rcs0.html

  * igt@gem_ctx_persistence@hang:
- shard-snb:  NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1099])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-snb6/igt@gem_ctx_persiste...@hang.html

  * igt@gem_eio@hibernate:
- shard-dg2:  [PASS][10] -> [ABORT][11] ([i915#7975] / [i915#8213])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/shard-dg2-11/igt@gem_...@hibernate.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-dg2-7/igt@gem_...@hibernate.html

  * igt@gem_exec_balancer@full-pulse:
- shard-dg2:  [PASS][12] -> [FAIL][13] ([i915#6032])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/shard-dg2-2/igt@gem_exec_balan...@full-pulse.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-dg2-7/igt@gem_exec_balan...@full-pulse.html

  * igt@gem_exec_fair@basic-deadline:
- shard-rkl:  [PASS][14] -> [FAIL][15] ([i915#2846])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/shard-rkl-4/igt@gem_exec_f...@basic-deadline.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-rkl-6/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-rkl:  [PASS][16] -> [FAIL][17] ([i915#2842]) +2 similar 
issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/shard-rkl-2/igt@gem_exec_fair@basic-pace-s...@rcs0.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-rkl-4/igt@gem_exec_fair@basic-pace-s...@rcs0.html

  * igt@gem_exec_params@secure-non-root:
- shard-tglu: NOTRUN -> [SKIP][18] ([fdo#112283])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-tglu-2/igt@gem_exec_par...@secure-non-root.html

  * igt@gem_exec_reloc@basic-range:
- shard-mtlp: NOTRUN -> [SKIP][19] ([i915#3281])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/shard-mtlp-4/igt@gem_exec_re...@basic-range.html

  * igt@gem_exec_whisper@basic-forked-all:
- shard-mtlp: [PASS][20] -> [FAIL

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Use local64_try_cmpxchg in i915_pmu_event_read (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/pmu: Use local64_try_cmpxchg in i915_pmu_event_read (rev2)
URL   : https://patchwork.freedesktop.org/series/120296/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13364 -> Patchwork_120296v2


Summary
---

  **WARNING**

  Minor unknown changes coming with Patchwork_120296v2 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_120296v2, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/index.html

Participating hosts (41 -> 39)
--

  Missing(2): fi-tgl-1115g4 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_120296v2:

### IGT changes ###

 Warnings 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-cfl-guc: [FAIL][1] ([i915#7940]) -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-cfl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/fi-cfl-guc/igt@i915_pm_...@basic-pci-d3-state.html

  
Known issues


  Here are the changes found in Patchwork_120296v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_rpm@basic-rte:
- fi-cfl-8109u:   [PASS][3] -> [FAIL][4] ([i915#7940])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-cfl-8109u/igt@i915_pm_...@basic-rte.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/fi-cfl-8109u/igt@i915_pm_...@basic-rte.html

  * igt@i915_pm_rpm@module-reload:
- fi-cfl-8700k:   [PASS][5] -> [FAIL][6] ([i915#7940])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-cfl-8700k/igt@i915_pm_...@module-reload.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/fi-cfl-8700k/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@gt_heartbeat:
- bat-jsl-3:  [PASS][7] -> [DMESG-FAIL][8] ([i915#5334])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-jsl-3/igt@i915_selftest@live@gt_heartbeat.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-jsl-3/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg2-11: [PASS][9] -> [ABORT][10] ([i915#7913])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-dg2-11/igt@i915_selftest@l...@hangcheck.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-dg2-11/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@slpc:
- bat-rpls-2: NOTRUN -> [DMESG-WARN][11] ([i915#6367])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-rpls-2/igt@i915_selftest@l...@slpc.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-rpls-2: NOTRUN -> [SKIP][12] ([i915#7828])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-rpls-2/igt@kms_chamelium_...@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-rpls-2: NOTRUN -> [SKIP][13] ([i915#1845])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-rpls-2/igt@kms_pipe_crc_ba...@suspend-read-crc.html

  * igt@kms_psr@primary_page_flip:
- bat-rplp-1: NOTRUN -> [SKIP][14] ([i915#1072]) +1 similar issue
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-rplp-1/igt@kms_psr@primary_page_flip.html

  * igt@kms_psr@sprite_plane_onoff:
- bat-rplp-1: NOTRUN -> [ABORT][15] ([i915#8442] / [i915#8668] / 
[i915#8712])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-rplp-1/igt@kms_psr@sprite_plane_onoff.html

  
 Possible fixes 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-x1275:   [SKIP][16] ([fdo#109271]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/fi-kbl-x1275/igt@i915_pm_...@basic-pci-d3-state.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/fi-kbl-x1275/igt@i915_pm_...@basic-pci-d3-state.html

  * igt@i915_selftest@live@gt_mocs:
- bat-mtlp-8: [DMESG-FAIL][18] ([i915#7059]) -> [PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
- bat-mtlp-6: [DMESG-FAIL][20] ([i915#7059]) -> [PASS][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13364/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120296v2/bat-mtlp-6/igt@i915_selftest@liv

[Intel-gfx] [linux-next:master] BUILD REGRESSION fe57d0d86f03a8b2afe2869a95477d0ed1824c96

[kernel test robot]

tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: fe57d0d86f03a8b2afe2869a95477d0ed1824c96  Add linux-next specific 
files for 20230710

Error/Warning reports:

https://lore.kernel.org/oe-kbuild-all/20230613.hher4zoo-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202306141719.mjhclsrc-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202306291857.nyjjywqk-...@intel.com

Error/Warning: (recently discovered and may have been fixed)

arch/parisc/kernel/pdt.c:67:6: warning: no previous prototype for 
'arch_report_meminfo' [-Wmissing-prototypes]
drivers/gpu/drm/i915/soc/intel_gmch.c:41:13: error: variable 'mchbar_addr' set 
but not used [-Werror=unused-but-set-variable]
lib/kunit/executor_test.c:138:4: warning: cast from 'void (*)(const void *)' to 
'kunit_action_t *' (aka 'void (*)(void *)') converts to incompatible function 
type [-Wcast-function-type-strict]
lib/kunit/test.c:775:38: warning: cast from 'void (*)(const void *)' to 
'kunit_action_t *' (aka 'void (*)(void *)') converts to incompatible function 
type [-Wcast-function-type-strict]

Unverified Error/Warning (likely false positive, please contact us if 
interested):

drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c:98 
mlx5_devcom_register_device() error: uninitialized symbol 'tmp_dev'.
net/wireless/scan.c:373 cfg80211_gen_new_ie() warn: potential spectre issue 
'sub->data' [r]
net/wireless/scan.c:397 cfg80211_gen_new_ie() warn: possible spectre second 
half.  'ext_id'
{standard input}: Error: local label `"2" (instance number 9 of a fb label)' is 
not defined

Error/Warning ids grouped by kconfigs:

gcc_recent_errors
|-- i386-buildonly-randconfig-r006-20230710
|   `-- 
drivers-gpu-drm-i915-soc-intel_gmch.c:error:variable-mchbar_addr-set-but-not-used
|-- parisc-randconfig-r004-20230710
|   `-- 
arch-parisc-kernel-pdt.c:warning:no-previous-prototype-for-arch_report_meminfo
|-- parisc-randconfig-r024-20230710
|   `-- 
arch-parisc-kernel-pdt.c:warning:no-previous-prototype-for-arch_report_meminfo
|-- parisc-randconfig-r031-20230710
|   `-- 
arch-parisc-kernel-pdt.c:warning:no-previous-prototype-for-arch_report_meminfo
|-- riscv-randconfig-r071-20230710
|   |-- 
arch-riscv-kernel-signal.c:sparse:sparse:incorrect-type-in-assignment-(different-address-spaces)-expected-void-noderef-__user-datap-got-void
|   `-- 
arch-riscv-kernel-signal.c:sparse:sparse:incorrect-type-in-initializer-(different-address-spaces)-expected-void-__x-got-void-noderef-__user-assigned-datap
|-- sh-allmodconfig
|   `-- 
standard-input:Error:local-label-(instance-number-of-a-fb-label)-is-not-defined
`-- x86_64-randconfig-m001-20230710
|-- 
drivers-net-ethernet-mellanox-mlx5-core-lib-devcom.c-mlx5_devcom_register_device()-error:uninitialized-symbol-tmp_dev-.
|-- 
net-wireless-scan.c-cfg80211_gen_new_ie()-warn:possible-spectre-second-half.-ext_id
`-- 
net-wireless-scan.c-cfg80211_gen_new_ie()-warn:potential-spectre-issue-sub-data-r
clang_recent_errors
|-- hexagon-randconfig-r041-20230710
|   `-- 
lib-kunit-test.c:warning:cast-from-void-(-)(const-void-)-to-kunit_action_t-(aka-void-(-)(void-)-)-converts-to-incompatible-function-type
|-- hexagon-randconfig-r045-20230710
|   `-- 
lib-kunit-test.c:warning:cast-from-void-(-)(const-void-)-to-kunit_action_t-(aka-void-(-)(void-)-)-converts-to-incompatible-function-type
`-- riscv-randconfig-r042-20230710
|-- 
lib-kunit-executor_test.c:warning:cast-from-void-(-)(const-void-)-to-kunit_action_t-(aka-void-(-)(void-)-)-converts-to-incompatible-function-type
`-- 
lib-kunit-test.c:warning:cast-from-void-(-)(const-void-)-to-kunit_action_t-(aka-void-(-)(void-)-)-converts-to-incompatible-function-type

elapsed time: 725m

configs tested: 133
configs skipped: 5

tested configs:
alphaallyesconfig   gcc  
alpha   defconfig   gcc  
alpharandconfig-r014-20230710   gcc  
alpharandconfig-r016-20230710   gcc  
alpharandconfig-r021-20230710   gcc  
arc  alldefconfig   gcc  
arc  allyesconfig   gcc  
arc defconfig   gcc  
arc    hsdk_defconfig   gcc  
arc    nsimosci_defconfig   gcc  
arc  randconfig-r002-20230710   gcc  
arc  randconfig-r011-20230710   gcc  
arc  randconfig-r035-20230710   gcc  
arc  randconfig-r043-20230710   gcc  
arcvdk_hs38_smp_defconfig   gcc  
arm  allmodconfig   gcc  
arm  allyesconfig   gcc  
arm bcm2835_defconfig   clang
arm defconfig   gcc  
arm  integrator_d

[Intel-gfx] [PATCH 1/1] drm/i915/tc: Fix system resume MST mode restore for DP-alt sinks

[Imre Deak]

commit 06f66261a1567d66b9d35c87393b6edfbea4c8f8 upstream.

At least restoring the MST topology during system resume needs to use
AUX before the display HW readout->sanitization sequence is complete,
but on TC ports the PHY may be in the wrong mode for this, resulting in
the AUX transfers to fail.

The initial TC port mode is kept fixed as BIOS left it for the above HW
readout sequence (to prevent changing the mode on an enabled port).  If
the port is disabled this initial mode is TBT - as in any case the PHY
ownership is not held - even if a DP-alt sink is connected. Thus, the
AUX transfers during this time will use TBT mode instead of the expected
DP-alt mode and so time out.

Fix the above by connecting the PHY during port initialization if the
port is disabled, which will switch to the expected mode (DP-alt in the
above case).

As the encoder/pipe HW state isn't read-out yet at this point, check if
the port is enabled based on the DDI_BUF enabled flag. Save the read-out
initial mode, so intel_tc_port_sanitize_mode() can check this wrt. the
read-out encoder HW state.

Signed-off-by: Imre Deak 
Reviewed-by: Ville Syrjälä 
Link: 
https://patchwork.freedesktop.org/patch/msgid/20230316131724.359612-5-imre.d...@intel.com
[For stable include intel_de.h for intel_de_read() (Imre)]
References: https://gitlab.freedesktop.org/drm/intel/-/issues/4306#note_1832688
Cc:  # 6.1.x: a82796a2e332: Fix TypeC mode 
initialization
Cc:  # 6.1.x: 67165722c27c: Fix TC port link ref init
---
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_tc.c   | 51 +--
 2 files changed, 48 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 63b7105e818a6..a8bf91a21cb24 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1763,6 +1763,7 @@ struct intel_digital_port {
bool tc_legacy_port:1;
char tc_port_name[8];
enum tc_port_mode tc_mode;
+   enum tc_port_mode tc_init_mode;
enum phy_fia tc_phy_fia;
u8 tc_phy_fia_idx;
 
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c 
b/drivers/gpu/drm/i915/display/intel_tc.c
index f50c92ca0dff8..bda77828dc95f 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -5,6 +5,7 @@
 
 #include "i915_drv.h"
 #include "i915_reg.h"
+#include "intel_de.h"
 #include "intel_display.h"
 #include "intel_display_power_map.h"
 #include "intel_display_types.h"
@@ -116,6 +117,24 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
drm_WARN_ON(&i915->drm, !enabled);
 }
 
+static enum intel_display_power_domain
+tc_port_power_domain(struct intel_digital_port *dig_port)
+{
+   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+   enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+
+   return POWER_DOMAIN_PORT_DDI_LANES_TC1 + tc_port - TC_PORT_1;
+}
+
+static void
+assert_tc_port_power_enabled(struct intel_digital_port *dig_port)
+{
+   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+
+   drm_WARN_ON(&i915->drm,
+   !intel_display_power_is_enabled(i915, 
tc_port_power_domain(dig_port)));
+}
+
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 {
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -693,6 +712,16 @@ static void __intel_tc_port_put_link(struct 
intel_digital_port *dig_port)
dig_port->tc_link_refcount--;
 }
 
+static bool tc_port_is_enabled(struct intel_digital_port *dig_port)
+{
+   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+
+   assert_tc_port_power_enabled(dig_port);
+
+   return intel_de_read(i915, DDI_BUF_CTL(dig_port->base.port)) &
+  DDI_BUF_CTL_ENABLE;
+}
+
 /**
  * intel_tc_port_init_mode: Read out HW state and init the given port's TypeC 
mode
  * @dig_port: digital port
@@ -715,10 +744,24 @@ void intel_tc_port_init_mode(struct intel_digital_port 
*dig_port)
tc_cold_wref = tc_cold_block(dig_port, &domain);
 
dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
-   /* Prevent changing dig_port->tc_mode until 
intel_tc_port_sanitize_mode() is called. */
-   __intel_tc_port_get_link(dig_port);
+   /*
+* Save the initial mode for the state check in
+* intel_tc_port_sanitize_mode().
+*/
+   dig_port->tc_init_mode = dig_port->tc_mode;
dig_port->tc_lock_wakeref = tc_cold_block(dig_port, 
&dig_port->tc_lock_power_domain);
 
+   /*
+* The PHY needs to be connected for AUX to work during HW readout and
+* MST topology resume, but the PHY mode can only be changed if the
+* port is disabled.
+*/
+   if (!tc_port_is_enabled(dig_port))
+   intel_tc_port_update_mode(dig_por

[Intel-gfx] [PATCH 0/1] v6.1 stable backport request

[Imre Deak]

Stable team, please apply patch 1/1 in this patchset along with its
dependencies to the v6.1 stable tree. The patch required a trivial
rebase adding a header include, hence resending it, while its 2
dependencies listed at Cc: stable lines in the commit message can be
cherry-picked as-is.

Thanks,
Imre

Imre Deak (1):
  drm/i915/tc: Fix system resume MST mode restore for DP-alt sinks

 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_tc.c   | 51 +--
 2 files changed, 48 insertions(+), 4 deletions(-)

-- 
2.37.2

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/pmu: Use local64_try_cmpxchg in i915_pmu_event_read (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/pmu: Use local64_try_cmpxchg in i915_pmu_event_read (rev2)
URL   : https://patchwork.freedesktop.org/series/120296/
State : warning

== Summary ==

Error: dim checkpatch failed
417192a1727e drm/i915/pmu: Use local64_try_cmpxchg in i915_pmu_event_read
-:7: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#7: 
in i915_pmu_event_read.  x86 CMPXCHG instruction returns success in ZF flag,

total: 0 errors, 1 warnings, 0 checks, 16 lines checked

Re: [Intel-gfx] [PATCH 2/2] drm/i915/color: For MTL convert 24 bit lut values to 16 bit

[Borah, Chaitanya Kumar]

Hello Jani,

> -Original Message-
> From: Jani Nikula 
> Sent: Monday, June 26, 2023 5:53 PM
> To: Borah, Chaitanya Kumar ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/color: For MTL convert 24 bit 
> lut
> values to 16 bit
> 
> On Mon, 26 Jun 2023, Chaitanya Kumar Borah
>  wrote:
> > For MTL and beyond, convert back the 24 bit lut values read from HW to
> > 16 bit values to maintain parity with userspace values. This way we
> > avoid pipe config mismatch for pre-csc lut values.
> >
> > Signed-off-by: Chaitanya Kumar Borah 
> > ---
> >  drivers/gpu/drm/i915/display/intel_color.c | 8 
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> > b/drivers/gpu/drm/i915/display/intel_color.c
> > index 25c73e2e6fa3..856191640e71 100644
> > --- a/drivers/gpu/drm/i915/display/intel_color.c
> > +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > @@ -3477,6 +3477,14 @@ static struct drm_property_blob
> *glk_read_degamma_lut(struct intel_crtc *crtc)
> > for (i = 0; i < lut_size; i++) {
> > u32 val = intel_de_read_fw(dev_priv,
> PRE_CSC_GAMC_DATA(pipe));
> >
> > +   /*
> > +* For MTL and beyond, convert back the 24 bit lut values
> > +* read from HW to 16 bit values to maintain parity with
> > +* userspace values
> > +*/
> > +   if (DISPLAY_VER(dev_priv) >= 14)
> > +   val = mul_u32_u32(val, (1 << 16)) / (1 << 24);
> > +
> 
> Here too please add a small helper for the conversion.
> 

Thank you for the comment.
I have sent a new version with a helper function. Please let me know if you see 
any pitfalls with it.

Regards

Chaitanya.

> BR,
> Jani.
> 
> > lut[i].red = val;
> > lut[i].green = val;
> > lut[i].blue = val;
> 
> --
> Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 1/2] drm/i915/color: Add function to load degamma LUT in MTL

[Borah, Chaitanya Kumar]

Hello Jani,

> -Original Message-
> From: Jani Nikula 
> Sent: Monday, June 26, 2023 5:52 PM
> To: Borah, Chaitanya Kumar ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/color: Add function to load
> degamma LUT in MTL
> 
> On Mon, 26 Jun 2023, Chaitanya Kumar Borah
>  wrote:
> > MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased
> from
> > 16 bits to 24 bits. Currently, drm framework only supports LUTs up to
> > 16 bit precision. Until a new uapi comes along to support higher
> > bitdepth, upscale the values sent from userland to 24 bit before
> > writing into the HW to continue supporting degamma on MTL.
> >
> > Signed-off-by: Chaitanya Kumar Borah 
> > ---
> >  drivers/gpu/drm/i915/display/intel_color.c | 42
> > --
> >  1 file changed, 40 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> > b/drivers/gpu/drm/i915/display/intel_color.c
> > index 8966e6560516..25c73e2e6fa3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_color.c
> > +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > @@ -1498,6 +1498,38 @@ static void glk_load_degamma_lut(const struct
> intel_crtc_state *crtc_state,
> > ilk_lut_write(crtc_state, PRE_CSC_GAMC_INDEX(pipe), 0);  }
> >
> > +static void mtl_load_degamma_lut(const struct intel_crtc_state *crtc_state,
> > +const struct drm_property_blob *blob) {
> > +   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > +   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > +   struct drm_color_lut *degamma_lut = blob->data;
> > +   enum pipe pipe = crtc->pipe;
> > +   int i, lut_size = drm_color_lut_size(blob);
> > +
> > +   /*
> > +* When setting the auto-increment bit, the hardware seems to
> > +* ignore the index bits, so we need to reset it to index 0
> > +* separately.
> > +*/
> > +   intel_de_write_fw(i915, PRE_CSC_GAMC_INDEX(pipe), 0);
> > +   intel_de_write_fw(i915, PRE_CSC_GAMC_INDEX(pipe),
> > + PRE_CSC_GAMC_AUTO_INCREMENT);
> > +
> > +   for (i = 0; i < lut_size; i++) {
> > +   u64 word = mul_u32_u32(degamma_lut[i].green, (1 << 24)) /
> (1 << 16);
> > +   u32 lut_val = (word & 0xff);
> > +
> > +   intel_de_write_fw(i915, PRE_CSC_GAMC_DATA(pipe),
> > + lut_val);
> > +   }
> > +   /* Clamp values > 1.0. */
> > +   while (i++ < glk_degamma_lut_size(i915))
> > +   intel_de_write_fw(i915, PRE_CSC_GAMC_DATA(pipe), 1 <<
> 24);
> > +
> > +   intel_de_write_fw(i915, PRE_CSC_GAMC_INDEX(pipe), 0); }
> 
> Please adjust glk_load_degamma_lut() instead of copy-pasting the entire thing
> with small modifications. One of which is breaking dsb use.
> 
> You'll probably also want to add small conversion helpers between 16 and
> 24 bits instead of doing them inline.
> 

Thank you for the review. I have sent a new version of the patch set with the 
comments addressed.
I look forward to your comments.

Regards

Chaitanya

> BR,
> Jani.
> 
> 
> > +
> >  static void glk_load_luts(const struct intel_crtc_state *crtc_state)
> > {
> > const struct drm_property_blob *pre_csc_lut =
> > crtc_state->pre_csc_lut; @@ -1635,11 +1667,17 @@
> > icl_program_gamma_multi_segment(const struct intel_crtc_state
> > *crtc_state)
> >
> >  static void icl_load_luts(const struct intel_crtc_state *crtc_state)
> > {
> > +   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > +   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > const struct drm_property_blob *pre_csc_lut = crtc_state-
> >pre_csc_lut;
> > const struct drm_property_blob *post_csc_lut =
> > crtc_state->post_csc_lut;
> >
> > -   if (pre_csc_lut)
> > -   glk_load_degamma_lut(crtc_state, pre_csc_lut);
> > +   if (pre_csc_lut) {
> > +   if (DISPLAY_VER(i915) >= 14)
> > +   mtl_load_degamma_lut(crtc_state, pre_csc_lut);
> > +   else
> > +   glk_load_degamma_lut(crtc_state, pre_csc_lut);
> > +   }
> >
> > switch (crtc_state->gamma_mode & GAMMA_MODE_MODE_MASK) {
> > case GAMMA_MODE_MODE_8BIT:
> 
> --
> Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Replace acronym with full platform name in defines. (rev3)

[Patchwork]

== Series Details ==

Series: Replace acronym with full platform name in defines. (rev3)
URL   : https://patchwork.freedesktop.org/series/119380/
State : failure

== Summary ==

Error: patch 
https://patchwork.freedesktop.org/api/1.0/series/119380/revisions/3/mbox/ not 
applied
Applying: drm/i915/mtl: s/MTL/METEORLAKE for platform/subplatform defines
Applying: drm/i915/MTL: s/MTL/METEORLAKE for platform/subplatform defines
Using index info to reconstruct a base tree...
M   drivers/gpu/drm/i915/display/intel_fbc.c
M   drivers/gpu/drm/i915/display/intel_pmdemand.c
M   drivers/gpu/drm/i915/display/intel_psr.c
M   drivers/gpu/drm/i915/display/skl_universal_plane.c
M   drivers/gpu/drm/i915/gt/gen8_engine_cs.c
M   drivers/gpu/drm/i915/gt/intel_engine_cs.c
M   drivers/gpu/drm/i915/gt/intel_execlists_submission.c
M   drivers/gpu/drm/i915/gt/intel_gt_mcr.c
M   drivers/gpu/drm/i915/gt/intel_lrc.c
M   drivers/gpu/drm/i915/gt/intel_rc6.c
M   drivers/gpu/drm/i915/gt/intel_workarounds.c
M   drivers/gpu/drm/i915/gt/uc/intel_guc.c
M   drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
M   drivers/gpu/drm/i915/i915_drv.h
M   drivers/gpu/drm/i915/i915_perf.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/i915_perf.c
Auto-merging drivers/gpu/drm/i915/i915_drv.h
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_drv.h
Auto-merging drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
CONFLICT (content): Merge conflict in 
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
Auto-merging drivers/gpu/drm/i915/gt/uc/intel_guc.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gt/uc/intel_guc.c
Auto-merging drivers/gpu/drm/i915/gt/intel_workarounds.c
CONFLICT (content): Merge conflict in 
drivers/gpu/drm/i915/gt/intel_workarounds.c
Auto-merging drivers/gpu/drm/i915/gt/intel_lrc.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gt/intel_lrc.c
Auto-merging drivers/gpu/drm/i915/gt/intel_gt_mcr.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gt/intel_gt_mcr.c
Auto-merging drivers/gpu/drm/i915/gt/intel_execlists_submission.c
CONFLICT (content): Merge conflict in 
drivers/gpu/drm/i915/gt/intel_execlists_submission.c
Auto-merging drivers/gpu/drm/i915/gt/intel_engine_cs.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gt/intel_engine_cs.c
Auto-merging drivers/gpu/drm/i915/gt/gen8_engine_cs.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gt/gen8_engine_cs.c
Auto-merging drivers/gpu/drm/i915/display/skl_universal_plane.c
CONFLICT (content): Merge conflict in 
drivers/gpu/drm/i915/display/skl_universal_plane.c
Auto-merging drivers/gpu/drm/i915/display/intel_psr.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0002 drm/i915/MTL: s/MTL/METEORLAKE for platform/subplatform 
defines
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Add DSC PPS readout

[Patchwork]

== Series Details ==

Series: Add DSC PPS readout
URL   : https://patchwork.freedesktop.org/series/120456/
State : failure

== Summary ==

Error: patch 
https://patchwork.freedesktop.org/api/1.0/series/120456/revisions/1/mbox/ not 
applied
Applying: drm/i915/dsc: Add PPS enum
Applying: drm/i915/vdsc: Add function to read any PPS register
Applying: drm/i915/vdsc: Add function to write in PPS registers
Using index info to reconstruct a base tree...
M   drivers/gpu/drm/i915/display/intel_vdsc.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/display/intel_vdsc.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/display/intel_vdsc.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0003 drm/i915/vdsc: Add function to write in PPS registers
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced

Re: [Intel-gfx] [v3] drm/i915/mtl: s/MTL/METEORLAKE for platform/subplatform defines

[Bhadane, Dnyaneshwar]

> -Original Message-
> From: Bhadane, Dnyaneshwar 
> Sent: Monday, July 10, 2023 4:28 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Ursulin, Tvrtko ; jani.nik...@linux.intel.com;
> Srivatsa, Anusha ; Bhadane, Dnyaneshwar
> 
> Subject: [v3] drm/i915/mtl: s/MTL/METEORLAKE for platform/subplatform
> defines
> 
> Follow consistent naming convention. Replace MTL with METEORLAKE. Added
> defines that are replacing IS_MTL_GRAPHICS_STEP with
> IS_METEORLAKE_P_GRAPHICS_STEP and IS_METEORLAKE_M_GRAPHICS_STEP.
> Also replaced IS_METEORLAKE_MEDIA_STEP instead of IS_MTL_MEDIA_STEP
> and IS_METEORLAKE_DISPLAY_STEP instead of IS_MTL_DISPLAY_STEP.
> 
Hi Tvrtko,
Could you please give the feedback on this ? or suggestion regarding the 
approach.

> v2:
> - Replace IS_MTL_GRAPHICS_STEP with
> IS_METEROLAKE_(P/M)_GRAPHICS_STEP (Tvrtko).
> - Changed subject prefix mtl instead of MTL (Anusha)
> v3:
> - Updated the commit message. (Anusha)
> 
> Cc: Tvrtko Ursulin 
> Cc: Jani Nikula 
> Cc: Anusha Srivatsa 
> Signed-off-by: Dnyaneshwar Bhadane 
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c  |  2 +-
>  drivers/gpu/drm/i915/display/intel_pmdemand.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_psr.c  | 10 ++---
>  .../drm/i915/display/skl_universal_plane.c|  4 +-
>  drivers/gpu/drm/i915/gt/gen8_engine_cs.c  |  8 ++--
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c |  2 +-
>  .../drm/i915/gt/intel_execlists_submission.c  |  2 +-
>  drivers/gpu/drm/i915/gt/intel_gt_mcr.c|  4 +-
>  drivers/gpu/drm/i915/gt/intel_lrc.c   |  4 +-
>  drivers/gpu/drm/i915/gt/intel_rc6.c   |  2 +-
>  drivers/gpu/drm/i915/gt/intel_workarounds.c   | 44 +--
>  drivers/gpu/drm/i915/gt/uc/intel_guc.c|  4 +-
>  .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  4 +-
>  drivers/gpu/drm/i915/i915_drv.h   | 15 +--
>  drivers/gpu/drm/i915/i915_perf.c  |  4 +-
>  15 files changed, 60 insertions(+), 51 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 7f8b2d7713c7..6358a8b26172 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1093,7 +1093,7 @@ static int intel_fbc_check_plane(struct
> intel_atomic_state *state,
> 
>   /* Wa_14016291713 */
>   if ((IS_DISPLAY_VER(i915, 12, 13) ||
> -  IS_MTL_DISPLAY_STEP(i915, STEP_A0, STEP_C0)) &&
> +  IS_METEORLAKE_DISPLAY_STEP(i915, STEP_A0, STEP_C0)) &&
>   crtc_state->has_psr) {
>   plane_state->no_fbc_reason = "PSR1 enabled
> (Wa_14016291713)";
>   return 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c
> b/drivers/gpu/drm/i915/display/intel_pmdemand.c
> index f7608d363634..8c3158b188ef 100644
> --- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
> +++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
> @@ -92,7 +92,7 @@ int intel_pmdemand_init(struct drm_i915_private *i915)
>&pmdemand_state->base,
>&intel_pmdemand_funcs);
> 
> - if (IS_MTL_DISPLAY_STEP(i915, STEP_A0, STEP_C0))
> + if (IS_METEORLAKE_DISPLAY_STEP(i915, STEP_A0, STEP_C0))
>   /* Wa_14016740474 */
>   intel_de_rmw(i915, XELPD_CHICKEN_DCPR_3, 0,
> DMD_RSP_TIMEOUT_DISABLE);
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 62151abe4748..ecd4e36119b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1247,7 +1247,7 @@ static void wm_optimization_wa(struct intel_dp
> *intel_dp,
>   bool set_wa_bit = false;
> 
>   /* Wa_14015648006 */
> - if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
> + if (IS_METEORLAKE_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
>   IS_DISPLAY_VER(dev_priv, 11, 13))
>   set_wa_bit |= crtc_state->wm_level_disabled;
> 
> @@ -1320,7 +1320,7 @@ static void intel_psr_enable_source(struct intel_dp
> *intel_dp,
>* All supported adlp panels have 1-based X granularity, this 
> may
>* cause issues if non-supported panels are used.
>*/
> - if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
> + if (IS_METEORLAKE_DISPLAY_STEP(dev_priv, STEP_A0,
> STEP_B0))
>   intel_de_rmw(dev_priv,
> MTL_CHICKEN_TRANS(cpu_transcoder), 0,
>ADLP_1_BASED_X_GRANULARITY);
>   else if (IS_ALDERLAKE_P(dev_priv))
> @@ -1328,7 +1328,7 @@ static void intel_psr_enable_source(struct intel_dp
> *intel_dp,
>ADLP_1_BASED_X_GRANULARITY);
> 
>   /* Wa_16012604467:adlp,mtl[a0,b0] */
> - if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
> + if (IS_METEORLAKE_DISPLAY_STEP(dev_priv, STEP_A0,
> STEP_B0))
>

[Intel-gfx] [PATCH v2 2/2] drm/i915/color: Downscale degamma lut values read from hardware

[Chaitanya Kumar Borah]

For MTL and beyond, convert back the 24 bit lut values
read from HW to 16 bit values to maintain parity with
userspace values. This way we avoid pipe config mismatch
for pre-csc lut values.

v2: Add helper function to downscale values (Jani)

Signed-off-by: Chaitanya Kumar Borah 
---
 drivers/gpu/drm/i915/display/intel_color.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 15ada7fada96..41666e778c03 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3456,6 +3456,14 @@ static struct drm_property_blob 
*glk_read_degamma_lut(struct intel_crtc *crtc)
for (i = 0; i < lut_size; i++) {
u32 val = intel_de_read_fw(dev_priv, PRE_CSC_GAMC_DATA(pipe));
 
+   /*
+* For MTL and beyond, convert back the 24 bit lut values
+* read from HW to 16 bit values to maintain parity with
+* userspace values
+*/
+   if (DISPLAY_VER(dev_priv) >= 14)
+   val = change_lut_val_precision(val, 16, 24);
+
lut[i].red = val;
lut[i].green = val;
lut[i].blue = val;
-- 
2.25.1

[Intel-gfx] [PATCH v2 1/2] drm/i915/color: Upscale degamma values for MTL

[Chaitanya Kumar Borah]

MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from
16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16
bit precision. Until a new uapi comes along to support higher bitdepth,
upscale the values sent from userland to 24 bit before writing into the
HW to continue supporting degamma on MTL.

Add helper function to upscale or downscale lut values. Parameters
'to' and 'from' needs to be less than 32. This should be sufficient
as currently there are no lut values exceeding 32 bit.

v2: (Jani)
- Reuse glk_load_degamma_lut()
- Create a helper function for upscaling values

Signed-off-by: Chaitanya Kumar Borah 
---
 drivers/gpu/drm/i915/display/intel_color.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 8966e6560516..15ada7fada96 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1453,6 +1453,16 @@ static int glk_degamma_lut_size(struct drm_i915_private 
*i915)
return 35;
 }
 
+/* change_lut_val_precision: helper function to upscale or downscale lut 
values.
+ * Parameters 'to' and 'from' needs to be less than 32. This should be 
sufficient
+ * as currently there are no lut values exceeding 32 bit.
+ **/
+
+static u32 change_lut_val_precision(u32 lut_val, int to, int from)
+{
+   return mul_u32_u32(lut_val, (1 << to)) / (1 << from);
+}
+
 static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state,
 const struct drm_property_blob *blob)
 {
@@ -1487,8 +1497,15 @@ static void glk_load_degamma_lut(const struct 
intel_crtc_state *crtc_state,
 * ToDo: Extend to max 7.0. Enable 32 bit input value
 * as compared to just 16 to achieve this.
 */
+   u32 lut_val;
+
+   if (DISPLAY_VER(i915) >= 14)
+   lut_val = change_lut_val_precision(lut[i].green, 24, 
16);
+   else
+   lut_val = lut[i].green;
+
ilk_lut_write(crtc_state, PRE_CSC_GAMC_DATA(pipe),
- lut[i].green);
+ lut_val);
}
 
/* Clamp values > 1.0. */
-- 
2.25.1

[Intel-gfx] [PATCH 0/2] MTL Degamma implementation

[Chaitanya Kumar Borah]

MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from
16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16
bit precision. Until a new uapi comes along to support higher bitdepth,
upscale the values sent from userland to 24 bit before writing into the
HW to continue supporting degamma on MTL.

To avoid pipe config mismatch between 24 bit HW lut values and 16 bit
userspace sent values, convert back the 24 bit lut values read from HW
to 16 bit values.

Chaitanya Kumar Borah (2):
  drm/i915/color: Upscale degamma values for MTL
  drm/i915/color: Downscale degamma lut values read from hardware

 drivers/gpu/drm/i915/display/intel_color.c | 27 +-
 1 file changed, 26 insertions(+), 1 deletion(-)

-- 
2.25.1

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Add ability for tracking buffer objects per client

[Tvrtko Ursulin]

On 10/07/2023 11:44, Iddamsetty, Aravind wrote:

On 07-07-2023 18:32, Tvrtko Ursulin wrote:

From: Tvrtko Ursulin 

In order to show per client memory usage lets add some infrastructure
which enables tracking buffer objects owned by clients.

We add a per client list protected by a new per client lock and to support
delayed destruction (post client exit) we make tracked objects hold
references to the owning client.

Also, object memory region teardown is moved to the existing RCU free
callback to allow safe dereference from the fdinfo RCU read section.

Signed-off-by: Tvrtko Ursulin 
---
  drivers/gpu/drm/i915/gem/i915_gem_object.c| 13 +--
  .../gpu/drm/i915/gem/i915_gem_object_types.h  | 12 +++
  drivers/gpu/drm/i915/i915_drm_client.c| 36 +++
  drivers/gpu/drm/i915/i915_drm_client.h| 32 +
  4 files changed, 90 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 97ac6fb37958..3dc4fbb67d2b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -105,6 +105,10 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
  
  	INIT_LIST_HEAD(&obj->mm.link);
  
+#ifdef CONFIG_PROC_FS

+   INIT_LIST_HEAD(&obj->client_link);
+#endif
+
INIT_LIST_HEAD(&obj->lut_list);
spin_lock_init(&obj->lut_lock);
  
@@ -292,6 +296,10 @@ void __i915_gem_free_object_rcu(struct rcu_head *head)

container_of(head, typeof(*obj), rcu);
struct drm_i915_private *i915 = to_i915(obj->base.dev);
  
+	/* We need to keep this alive for RCU read access from fdinfo. */

+   if (obj->mm.n_placements > 1)
+   kfree(obj->mm.placements);
+
i915_gem_object_free(obj);
  
  	GEM_BUG_ON(!atomic_read(&i915->mm.free_count));

@@ -388,9 +396,6 @@ void __i915_gem_free_object(struct drm_i915_gem_object *obj)
if (obj->ops->release)
obj->ops->release(obj);
  
-	if (obj->mm.n_placements > 1)

-   kfree(obj->mm.placements);
-
if (obj->shares_resv_from)
i915_vm_resv_put(obj->shares_resv_from);
  
@@ -441,6 +446,8 @@ static void i915_gem_free_object(struct drm_gem_object *gem_obj)
  
  	GEM_BUG_ON(i915_gem_object_is_framebuffer(obj));
  
+	i915_drm_client_remove_object(obj);

+
/*
 * Before we free the object, make sure any pure RCU-only
 * read-side critical sections are complete, e.g.
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h 
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index e72c57716bee..8de2b91b3edf 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -300,6 +300,18 @@ struct drm_i915_gem_object {
 */
struct i915_address_space *shares_resv_from;
  
+#ifdef CONFIG_PROC_FS

+   /**
+* @client: @i915_drm_client which created the object
+*/
+   struct i915_drm_client *client;
+
+   /**
+* @client_link: Link into @i915_drm_client.objects_list
+*/
+   struct list_head client_link;
+#endif
+
union {
struct rcu_head rcu;
struct llist_node freed;
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c 
b/drivers/gpu/drm/i915/i915_drm_client.c
index 2a44b3876cb5..2e5e69edc0f9 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -28,6 +28,10 @@ struct i915_drm_client *i915_drm_client_alloc(void)
kref_init(&client->kref);
spin_lock_init(&client->ctx_lock);
INIT_LIST_HEAD(&client->ctx_list);
+#ifdef CONFIG_PROC_FS
+   spin_lock_init(&client->objects_lock);
+   INIT_LIST_HEAD(&client->objects_list);
+#endif
  
  	return client;

  }
@@ -108,4 +112,36 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct 
drm_file *file)
for (i = 0; i < ARRAY_SIZE(uabi_class_names); i++)
show_client_class(p, i915, file_priv->client, i);
  }
+
+void i915_drm_client_add_object(struct i915_drm_client *client,
+   struct drm_i915_gem_object *obj)
+{
+   unsigned long flags;
+
+   GEM_WARN_ON(obj->client);
+   GEM_WARN_ON(!list_empty(&obj->client_link));
+
+   spin_lock_irqsave(&client->objects_lock, flags);
+   obj->client = i915_drm_client_get(client);
+   list_add_tail_rcu(&obj->client_link, &client->objects_list);
+   spin_unlock_irqrestore(&client->objects_lock, flags);
+}


would it be nice to mention that we use this client infra only to track
internal objects. While the user created through file->object_idr added
during handle creation time.


In this series it is indeed only used for that.

But it would be nicer to use it to track everything, so fdinfo readers 
would not be hitting the idr lock, which would avoid injecting latency 
to real DRM clients.


The only fly in the ointment

Re: [Intel-gfx] [PATCH 18/19] drm: Add acquire ctx parameter to ->set_config

[冉翠林]

從我的iPhone傳送

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: update request engine before removing virtual GuC engine (rev2)

[Andrzej Hajda]

On 07.07.2023 04:52, Patchwork wrote:

Project List - Patchwork *Patch Details*
*Series:* 	drm/i915/gt: update request engine before removing virtual 
GuC engine (rev2)

*URL:*  https://patchwork.freedesktop.org/series/120238/
*State:*failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120238v2/index.html



  CI Bug Log - changes from CI_DRM_13351_full -> Patchwork_120238v2_full


Summary

*FAILURE*

Serious unknown changes coming with Patchwork_120238v2_full absolutely 
need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_120238v2_full, please notify your bug team to 
allow them
to document this new failure mode, which will reduce false positives 
in CI.



Participating hosts (9 -> 10)

Additional (1): shard-tglu0


Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_120238v2_full:



  IGT changes


Possible regressions

 *

igt@gem_exec_reloc@basic-wc-cpu-active:

  o shard-apl: PASS


-> DMESG-WARN


+4 similar issues



Not related, apl does not use GuC and the change is only for GuC submission.


 *
 *

igt@kms_plane_multiple@tiling-y:

  o shard-dg2: NOTRUN -> SKIP






Not related, this test is always skipped/notrun on dg2:
http://gfx-ci.igk.intel.com/tree/drm-tip/shards-all.html?testfilter=igt@kms_plane_multiple@tiling-y

Regards
Andrzej



 *


New tests

New tests have been introduced between CI_DRM_13351_full and 
Patchwork_120238v2_full:



  New IGT tests (34)

 *

igt@gem_exec_basic@basic@bcs0-lmem0:

  o Statuses : 2 pass(s)
  o Exec time: [0.0] s
 *

igt@gem_exec_basic@basic@rcs0-lmem0:

  o Statuses : 2 pass(s)
  o Exec time: [0.0] s
 *

igt@gem_exec_basic@basic@vcs0-lmem0:

  o Statuses : 2 pass(s)
  o Exec time: [0.0] s
 *

igt@gem_exec_basic@basic@vcs1-lmem0:

  o Statuses : 2 pass(s)
  o Exec time: [0.0] s
 *

igt@gem_exec_basic@basic@vecs0-lmem0:

  o Statuses : 2 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@2x-blocking-absolute-wf_vblank@ab-vga1-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@2x-blocking-wf_vblank@ab-vga1-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@2x-dpms-vs-vblank-race@ab-vga1-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@2x-flip-vs-panning-interruptible@ab-vga1-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@2x-modeset-vs-vblank-race@ab-vga1-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@2x-plain-flip-ts-check@ab-vga1-hdmi-a1:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@basic-flip-vs-dpms@d-hdmi-a2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@blocking-absolute-wf_vblank@d-hdmi-a2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@bo-too-big@a-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@bo-too-big@b-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@bo-too-big@c-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@flip-vs-panning@a-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@flip-vs-panning@b-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@flip-vs-panning@c-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@flip-vs-suspend@a-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@flip-vs-suspend@b-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@flip-vs-suspend@c-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@modeset-vs-vblank-race-interruptible@a-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@modeset-vs-vblank-race-interruptible@b-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@modeset-vs-vblank-race-interruptible@c-dp2:

  o Statuses : 1 pass(s)
  o Exec time: [0.0] s
 *

igt@kms_flip@nonexisting-fb-interruptible@a-dp2:

  o

[Intel-gfx] ✓ Fi.CI.BAT: success for x86/mm: Fix PAT bit missing from page protection modify mask (rev4)

[Patchwork]

== Series Details ==

Series: x86/mm: Fix PAT bit missing from page protection modify mask (rev4)
URL   : https://patchwork.freedesktop.org/series/116883/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13363 -> Patchwork_116883v4


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/index.html

Participating hosts (41 -> 40)
--

  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_116883v4 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s0@smem:
- bat-jsl-1:  [PASS][1] -> [ABORT][2] ([i915#5122])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/bat-jsl-1/igt@gem_exec_suspend@basic...@smem.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-jsl-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-8/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_pm_rpm@module-reload:
- fi-rkl-11600:   [PASS][4] -> [FAIL][5] ([i915#7940])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/fi-rkl-11600/igt@i915_pm_...@module-reload.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/fi-rkl-11600/igt@i915_pm_...@module-reload.html
- fi-kbl-x1275:   [PASS][6] -> [FAIL][7] ([i915#8843])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/fi-kbl-x1275/igt@i915_pm_...@module-reload.html

  * igt@i915_pm_rps@basic-api:
- bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#6621])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * igt@i915_selftest@live@gt_mocs:
- bat-mtlp-8: NOTRUN -> [DMESG-FAIL][9] ([i915#7059])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
- bat-mtlp-6: [PASS][10] -> [DMESG-FAIL][11] ([i915#7059])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@requests:
- bat-mtlp-8: NOTRUN -> [DMESG-FAIL][12] ([i915#8497])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-8/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@slpc:
- bat-mtlp-8: NOTRUN -> [DMESG-WARN][13] ([i915#6367])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-8/igt@i915_selftest@l...@slpc.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#6645])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-8/igt@i915_susp...@basic-s3-without-i915.html
- bat-jsl-1:  [PASS][15] -> [FAIL][16] ([fdo#103375])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13363/bat-jsl-1/igt@i915_susp...@basic-s3-without-i915.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-jsl-1/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-rpls-2: NOTRUN -> [SKIP][17] ([i915#7828])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-rpls-2/igt@kms_chamelium_...@common-hpd-after-suspend.html
- bat-mtlp-8: NOTRUN -> [SKIP][18] ([i915#7828])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-8/igt@kms_chamelium_...@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][19] ([i915#1845] / [i915#5354]) +3 
similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-rpls-2: NOTRUN -> [SKIP][20] ([i915#1845])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-rpls-2/igt@kms_pipe_crc_ba...@suspend-read-crc.html

  * igt@prime_vgem@basic-fence-read:
- bat-mtlp-8: NOTRUN -> [SKIP][21] ([i915#3708]) +2 similar issues
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116883v4/bat-mtlp-8/igt@prime_v...@basic-fence-read.html

  * igt@prime_vgem@basic-gtt:
- bat-mtlp-8: NOTRUN -> [SKIP][22] ([i915#3708] / [i915#4077]) +1 
similar issue
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116

Re: [Intel-gfx] [PATCH v4 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCbCr420

[Nautiyal, Ankit K]

On 7/5/2023 10:45 AM, Suraj Kandpal wrote:

Some rc_range_parameter calculations were missed for YCbCr420,
add them to calculate_rc_param()

--v2
-take into account the new formula to get bpp_i

--v4
-Fix range_bpg_offset formula for YCbCr420 bpp <= 16 [Ankit]

Cc: Vandita Kulkarni 
Cc: Ankit Nautiyal 
Cc: Uma Shankar 
Signed-off-by: Suraj Kandpal 
---
  drivers/gpu/drm/i915/display/intel_vdsc.c | 144 --
  1 file changed, 106 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index cfcd463f66bb..8f0dac908e61 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -52,23 +52,36 @@ static bool is_pipe_dsc(struct intel_crtc *crtc, enum 
transcoder cpu_transcoder)
return true;
  }
  
+static void

+intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, int buf,
+ int bpp)
+{
+   int bpc = vdsc_cfg->bits_per_component;
+
+   /* Read range_minqp and range_max_qp from qp tables */
+   vdsc_cfg->rc_range_params[buf].range_min_qp =
+   intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420);
+   vdsc_cfg->rc_range_params[buf].range_max_qp =
+   intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420);
+}
+
+/*
+ * Calculate RC Params using the below two methods:
+ * 1. DSCParameterValuesVESA V1-2 spreadsheet
+ * 2. VESA DSC 1.2a DSC Tools Application.
+ * Note:
+ * Above two methods use a common formula to derive values for any combination 
of DSC
+ * variables. The formula approach may yield slight differences in the derived 
PPS
+ * parameters from the original parameter sets. These differences are not 
consequential
+ * to the coding performance because all parameter sets have been shown to 
produce
+ * visually lossless quality (provides the same PPS values as
+ * DSCParameterValuesVESA V1-2 spreadsheet)
+ */



As I understand we are using the values of rc parameters from the tables 
given for DSC tools application from C-model for different 
bits_per_pixel and bpcs.


It would be good to mention the C-model used for these values.



  static void
  calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
  {
int bpc = vdsc_cfg->bits_per_component;
int bpp = vdsc_cfg->bits_per_pixel >> 4;
-   static const s8 ofs_und6[] = {
-   0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
-   };
-   static const s8 ofs_und8[] = {
-   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
-   };
-   static const s8 ofs_und12[] = {
-   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
-   };
-   static const s8 ofs_und15[] = {
-   10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
-   };
int qp_bpc_modifier = (bpc - 8) * 2;
u32 res, buf_i, bpp_i;
  
@@ -119,33 +132,88 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)

vdsc_cfg->rc_quant_incr_limit0 = 11 + qp_bpc_modifier;
vdsc_cfg->rc_quant_incr_limit1 = 11 + qp_bpc_modifier;
  
-	bpp_i  = (2 * (bpp - 6));

-   for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
-   u8 range_bpg_offset;
-
-   /* Read range_minqp and range_max_qp from qp tables */
-   vdsc_cfg->rc_range_params[buf_i].range_min_qp =
-   intel_lookup_range_min_qp(bpc, buf_i, bpp_i, 
vdsc_cfg->native_420);
-   vdsc_cfg->rc_range_params[buf_i].range_max_qp =
-   intel_lookup_range_max_qp(bpc, buf_i, bpp_i, 
vdsc_cfg->native_420);
-
-   /* Calculate range_bpg_offset */
-   if (bpp <= 6) {
-   range_bpg_offset = ofs_und6[buf_i];
-   } else if (bpp <= 8) {
-   res = DIV_ROUND_UP(((bpp - 6) * (ofs_und8[buf_i] - 
ofs_und6[buf_i])), 2);
-   range_bpg_offset = ofs_und6[buf_i] + res;
-   } else if (bpp <= 12) {
-   range_bpg_offset = ofs_und8[buf_i];
-   } else if (bpp <= 15) {
-   res = DIV_ROUND_UP(((bpp - 12) * (ofs_und15[buf_i] - 
ofs_und12[buf_i])), 3);
-   range_bpg_offset = ofs_und12[buf_i] + res;
-   } else {
-   range_bpg_offset = ofs_und15[buf_i];
+   if (vdsc_cfg->native_420) {
+   static const s8 ofs_und4[] = {
+   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -12, -12, 
-12, -12
+   };
+   static const s8 ofs_und5[] = {
+   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, 
-12, -12
+   };
+   static const s8 ofs_und6[] = {
+   2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, 
-12, -12
+   };
+   static const s8 ofs_und8[] = {
+   10,

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for x86/mm: Fix PAT bit missing from page protection modify mask (rev4)

[Patchwork]

== Series Details ==

Series: x86/mm: Fix PAT bit missing from page protection modify mask (rev4)
URL   : https://patchwork.freedesktop.org/series/116883/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH 5/5] drm/i915/display: Compare the readout dsc pps params

[Jani Nikula]

On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
> With the dsc config being readout and filled in crtc_state add
> macros and use them to compare current and previous PPS param in
> DSC.
>
> Signed-off-by: Suraj Kandpal 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 55 
>  1 file changed, 55 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index eed01957bdb9..5c1596d7cd92 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5007,6 +5007,8 @@ intel_pipe_config_compare(const struct intel_crtc_state 
> *current_config,
>  {
>   struct drm_i915_private *dev_priv = 
> to_i915(current_config->uapi.crtc->dev);
>   struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> + const struct drm_dsc_config *dsc_current_config = 
> ¤t_config->dsc.config;
> + const struct drm_dsc_config *dsc_pipe_config = &pipe_config->dsc.config;
>   bool ret = true;
>   bool fixup_inherited = fastset &&
>   current_config->inherited && !pipe_config->inherited;
> @@ -5202,6 +5204,26 @@ intel_pipe_config_compare(const struct 
> intel_crtc_state *current_config,
>  #define PIPE_CONF_QUIRK(quirk) \
>   ((current_config->quirks | pipe_config->quirks) & (quirk))
>  
> +#define PIPE_DSC_CONF_CHECK_I(name) do { \
> + if (dsc_current_config->name != dsc_pipe_config->name) { \
> + pipe_config_mismatch(fastset, crtc, __stringify(name), \
> +  "(expected %i, found %i)", \
> +  dsc_current_config->name, \
> +  dsc_pipe_config->name); \
> + ret = false; \
> + } \
> +} while (0)
> +
> +#define PIPE_DSC_CONF_CHECK_BOOL(name) do { \
> + if (dsc_current_config->name != dsc_pipe_config->name) { \
> + pipe_config_mismatch(fastset, crtc,  __stringify(name), \
> +  "(expected %s, found %s)", \
> +  str_yes_no(dsc_current_config->name), \
> +  str_yes_no(dsc_pipe_config->name)); \
> + ret = false; \
> + } \
> +} while (0)
> +
>   PIPE_CONF_CHECK_I(hw.enable);
>   PIPE_CONF_CHECK_I(hw.active);
>  
> @@ -5378,6 +5400,39 @@ intel_pipe_config_compare(const struct 
> intel_crtc_state *current_config,
>   PIPE_CONF_CHECK_I(master_transcoder);
>   PIPE_CONF_CHECK_X(bigjoiner_pipes);
>  
> + PIPE_DSC_CONF_CHECK_BOOL(block_pred_enable);

You should be able to pass the dsc substruct as name, no need to define
dupe macros for DSC. See e.g. PIPE_CONF_CHECK_I(hw.enable); above in the
patch context above.

> + PIPE_DSC_CONF_CHECK_BOOL(convert_rgb);
> + PIPE_DSC_CONF_CHECK_BOOL(simple_422);
> + PIPE_DSC_CONF_CHECK_BOOL(native_422);
> + PIPE_DSC_CONF_CHECK_BOOL(native_420);
> + PIPE_DSC_CONF_CHECK_BOOL(vbr_enable);
> + PIPE_DSC_CONF_CHECK_I(line_buf_depth);
> + PIPE_DSC_CONF_CHECK_I(bits_per_component);
> + PIPE_DSC_CONF_CHECK_I(pic_width);
> + PIPE_DSC_CONF_CHECK_I(pic_height);
> + PIPE_DSC_CONF_CHECK_I(slice_width);
> + PIPE_DSC_CONF_CHECK_I(slice_height);
> + PIPE_DSC_CONF_CHECK_I(initial_dec_delay);
> + PIPE_DSC_CONF_CHECK_I(initial_xmit_delay);
> + PIPE_DSC_CONF_CHECK_I(scale_decrement_interval);
> + PIPE_DSC_CONF_CHECK_I(scale_increment_interval);
> + PIPE_DSC_CONF_CHECK_I(initial_scale_value);
> + PIPE_DSC_CONF_CHECK_I(first_line_bpg_offset);
> + PIPE_DSC_CONF_CHECK_I(flatness_min_qp);
> + PIPE_DSC_CONF_CHECK_I(flatness_max_qp);
> + PIPE_DSC_CONF_CHECK_I(slice_bpg_offset);
> + PIPE_DSC_CONF_CHECK_I(nfl_bpg_offset);
> + PIPE_DSC_CONF_CHECK_I(initial_offset);
> + PIPE_DSC_CONF_CHECK_I(final_offset);
> + PIPE_DSC_CONF_CHECK_I(rc_model_size);
> + PIPE_DSC_CONF_CHECK_I(rc_quant_incr_limit0);
> + PIPE_DSC_CONF_CHECK_I(rc_quant_incr_limit1);
> + PIPE_DSC_CONF_CHECK_I(slice_chunk_size);
> + if (DISPLAY_VER(dev_priv) >= 14) {
> + PIPE_DSC_CONF_CHECK_I(second_line_bpg_offset);
> + PIPE_DSC_CONF_CHECK_I(nsl_bpg_offset);
> + }

I'd prefer it if we didn't have version checks here. Just check the
values anyway, it should be zeros in both hw and sw states for display <
14, and if it's not, the state checker caught a bug.


> +
>   PIPE_CONF_CHECK_I(dsc.compression_enable);
>   PIPE_CONF_CHECK_I(dsc.dsc_split);
>   PIPE_CONF_CHECK_I(dsc.compressed_bpp);

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 4/5] drm/i915/vdsc: Fill the intel_dsc_get_pps_config function

[Jani Nikula]

On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
> We have setup both the read and write functions so we can
> move ahead and fill in all the readout state from PPS register
> into the crtc_state so we can send it for comparision.
>
> Signed-off-by: Suraj Kandpal 
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 152 +++---
>  .../gpu/drm/i915/display/intel_vdsc_regs.h|  53 --
>  2 files changed, 172 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 274d82360c1a..a4f5b4aceb33 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -596,51 +596,51 @@ static void intel_dsc_pps_configure(const struct 
> intel_crtc_state *crtc_state)
>   /* Populate PICTURE_PARAMETER_SET_2 registers */
>   pps_val = 0;
>   pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) |
> - DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances);
> + DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances, true);

So absolutely *no* register macros with boolean flags to shift or
not. Just no.

This is totally unreadable.

Define the macros in terms of the REG_FIELD_MASK and REG_FIELD_PREP, and
use REG_FIELD_GET to read the values.

#define   DSC_PIC_WIDTH(pic_width)REG_FIELD_PREP(DSC_PIC_WIDTH_MASK, 
pic_width)

pps_val |= DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances)

This should probably be a first cleanup patch before the other changes.

>   drm_dbg_kms(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val);
>   intel_dsc_write_pps_reg(crtc_state, PPS_2, pps_val);
>  
>   /* Populate PICTURE_PARAMETER_SET_3 registers */
>   pps_val = 0;
>   pps_val |= DSC_SLICE_HEIGHT(vdsc_cfg->slice_height) |
> - DSC_SLICE_WIDTH(vdsc_cfg->slice_width);
> + DSC_SLICE_WIDTH(vdsc_cfg->slice_width, true);
>   drm_dbg_kms(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val);
>   intel_dsc_write_pps_reg(crtc_state, PPS_3, pps_val);
>  
>   /* Populate PICTURE_PARAMETER_SET_4 registers */
>   pps_val = 0;
>   pps_val |= DSC_INITIAL_XMIT_DELAY(vdsc_cfg->initial_xmit_delay) |
> - DSC_INITIAL_DEC_DELAY(vdsc_cfg->initial_dec_delay);
> + DSC_INITIAL_DEC_DELAY(vdsc_cfg->initial_dec_delay, true);
>   drm_dbg_kms(&dev_priv->drm, "PPS4 = 0x%08x\n", pps_val);
>   intel_dsc_write_pps_reg(crtc_state, PPS_4, pps_val);
>  
>   /* Populate PICTURE_PARAMETER_SET_5 registers */
>   pps_val = 0;
>   pps_val |= DSC_SCALE_INC_INT(vdsc_cfg->scale_increment_interval) |
> - DSC_SCALE_DEC_INT(vdsc_cfg->scale_decrement_interval);
> + DSC_SCALE_DEC_INT(vdsc_cfg->scale_decrement_interval, true);
>   drm_dbg_kms(&dev_priv->drm, "PPS5 = 0x%08x\n", pps_val);
>   intel_dsc_write_pps_reg(crtc_state, PPS_5, pps_val);
>  
>   /* Populate PICTURE_PARAMETER_SET_6 registers */
>   pps_val = 0;
>   pps_val |= DSC_INITIAL_SCALE_VALUE(vdsc_cfg->initial_scale_value) |
> - DSC_FIRST_LINE_BPG_OFFSET(vdsc_cfg->first_line_bpg_offset) |
> - DSC_FLATNESS_MIN_QP(vdsc_cfg->flatness_min_qp) |
> - DSC_FLATNESS_MAX_QP(vdsc_cfg->flatness_max_qp);
> + DSC_FIRST_LINE_BPG_OFFSET(vdsc_cfg->first_line_bpg_offset, 
> true) |
> + DSC_FLATNESS_MIN_QP(vdsc_cfg->flatness_min_qp, true) |
> + DSC_FLATNESS_MAX_QP(vdsc_cfg->flatness_max_qp, true);
>   drm_dbg_kms(&dev_priv->drm, "PPS6 = 0x%08x\n", pps_val);
>   intel_dsc_write_pps_reg(crtc_state, PPS_6, pps_val);
>  
>   /* Populate PICTURE_PARAMETER_SET_7 registers */
>   pps_val = 0;
>   pps_val |= DSC_SLICE_BPG_OFFSET(vdsc_cfg->slice_bpg_offset) |
> - DSC_NFL_BPG_OFFSET(vdsc_cfg->nfl_bpg_offset);
> + DSC_NFL_BPG_OFFSET(vdsc_cfg->nfl_bpg_offset, true);
>   drm_dbg_kms(&dev_priv->drm, "PPS7 = 0x%08x\n", pps_val);
>   intel_dsc_write_pps_reg(crtc_state, PPS_7, pps_val);
>  
>   /* Populate PICTURE_PARAMETER_SET_8 registers */
>   pps_val = 0;
>   pps_val |= DSC_FINAL_OFFSET(vdsc_cfg->final_offset) |
> - DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset);
> + DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset, true);
>   drm_dbg_kms(&dev_priv->drm, "PPS8 = 0x%08x\n", pps_val);
>   intel_dsc_write_pps_reg(crtc_state, PPS_8, pps_val);
>  
> @@ -654,7 +654,7 @@ static void intel_dsc_pps_configure(const struct 
> intel_crtc_state *crtc_state)
>   /* Populate PICTURE_PARAMETER_SET_10 registers */
>   pps_val = 0;
>   pps_val |= DSC_RC_QUANT_INC_LIMIT0(vdsc_cfg->rc_quant_incr_limit0) |
> - DSC_RC_QUANT_INC_LIMIT1(vdsc_cfg->rc_quant_incr_limit1) |
> + DSC_RC_QUANT_INC_LIMIT1(vdsc_cfg->rc_quant_incr_limit1, true) |
>   DSC_RC_TARGET_OFF_HIGH(DSC_RC_TGT_OFFSET_HI_CONST) |
>   DSC_RC_TARGET_OFF_LOW(DSC_RC_TGT_OFFSET_LO_CON

[Intel-gfx] [v3] drm/i915/mtl: s/MTL/METEORLAKE for platform/subplatform defines

[Dnyaneshwar Bhadane]

Follow consistent naming convention. Replace MTL with
METEORLAKE. Added defines that are replacing IS_MTL_GRAPHICS_STEP with
IS_METEORLAKE_P_GRAPHICS_STEP and IS_METEORLAKE_M_GRAPHICS_STEP.
Also replaced IS_METEORLAKE_MEDIA_STEP instead of IS_MTL_MEDIA_STEP and
IS_METEORLAKE_DISPLAY_STEP instead of IS_MTL_DISPLAY_STEP.

v2:
- Replace IS_MTL_GRAPHICS_STEP with IS_METEROLAKE_(P/M)_GRAPHICS_STEP (Tvrtko).
- Changed subject prefix mtl instead of MTL (Anusha)
v3:
- Updated the commit message. (Anusha)

Cc: Tvrtko Ursulin 
Cc: Jani Nikula 
Cc: Anusha Srivatsa 
Signed-off-by: Dnyaneshwar Bhadane 
---
 drivers/gpu/drm/i915/display/intel_fbc.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_pmdemand.c |  2 +-
 drivers/gpu/drm/i915/display/intel_psr.c  | 10 ++---
 .../drm/i915/display/skl_universal_plane.c|  4 +-
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c  |  8 ++--
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  2 +-
 .../drm/i915/gt/intel_execlists_submission.c  |  2 +-
 drivers/gpu/drm/i915/gt/intel_gt_mcr.c|  4 +-
 drivers/gpu/drm/i915/gt/intel_lrc.c   |  4 +-
 drivers/gpu/drm/i915/gt/intel_rc6.c   |  2 +-
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 44 +--
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  4 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  4 +-
 drivers/gpu/drm/i915/i915_drv.h   | 15 +--
 drivers/gpu/drm/i915/i915_perf.c  |  4 +-
 15 files changed, 60 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 7f8b2d7713c7..6358a8b26172 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1093,7 +1093,7 @@ static int intel_fbc_check_plane(struct 
intel_atomic_state *state,
 
/* Wa_14016291713 */
if ((IS_DISPLAY_VER(i915, 12, 13) ||
-IS_MTL_DISPLAY_STEP(i915, STEP_A0, STEP_C0)) &&
+IS_METEORLAKE_DISPLAY_STEP(i915, STEP_A0, STEP_C0)) &&
crtc_state->has_psr) {
plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)";
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c 
b/drivers/gpu/drm/i915/display/intel_pmdemand.c
index f7608d363634..8c3158b188ef 100644
--- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
@@ -92,7 +92,7 @@ int intel_pmdemand_init(struct drm_i915_private *i915)
 &pmdemand_state->base,
 &intel_pmdemand_funcs);
 
-   if (IS_MTL_DISPLAY_STEP(i915, STEP_A0, STEP_C0))
+   if (IS_METEORLAKE_DISPLAY_STEP(i915, STEP_A0, STEP_C0))
/* Wa_14016740474 */
intel_de_rmw(i915, XELPD_CHICKEN_DCPR_3, 0, 
DMD_RSP_TIMEOUT_DISABLE);
 
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 62151abe4748..ecd4e36119b2 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1247,7 +1247,7 @@ static void wm_optimization_wa(struct intel_dp *intel_dp,
bool set_wa_bit = false;
 
/* Wa_14015648006 */
-   if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
+   if (IS_METEORLAKE_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
IS_DISPLAY_VER(dev_priv, 11, 13))
set_wa_bit |= crtc_state->wm_level_disabled;
 
@@ -1320,7 +1320,7 @@ static void intel_psr_enable_source(struct intel_dp 
*intel_dp,
 * All supported adlp panels have 1-based X granularity, this 
may
 * cause issues if non-supported panels are used.
 */
-   if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
+   if (IS_METEORLAKE_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
intel_de_rmw(dev_priv, 
MTL_CHICKEN_TRANS(cpu_transcoder), 0,
 ADLP_1_BASED_X_GRANULARITY);
else if (IS_ALDERLAKE_P(dev_priv))
@@ -1328,7 +1328,7 @@ static void intel_psr_enable_source(struct intel_dp 
*intel_dp,
 ADLP_1_BASED_X_GRANULARITY);
 
/* Wa_16012604467:adlp,mtl[a0,b0] */
-   if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
+   if (IS_METEORLAKE_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
intel_de_rmw(dev_priv,
 MTL_CLKGATE_DIS_TRANS(cpu_transcoder), 0,
 MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS);
@@ -1489,7 +1489,7 @@ static void intel_psr_disable_locked(struct intel_dp 
*intel_dp)
 
if (intel_dp->psr.psr2_enabled) {
/* Wa_16012604467:adlp,mtl[a0,b0] */
-   if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
+   if (IS_METEORLAKE_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
i

Re: [Intel-gfx] [PATCH 3/5] drm/i915/vdsc: Add function to write in PPS registers

[Jani Nikula]

On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
> Now that we have a function that reads any PPS register based
> on intel_dsc_pps enum provided lets create a function that can
> write on any PPS.
>
> Signed-off-by: Suraj Kandpal 
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 494 +++---
>  1 file changed, 252 insertions(+), 242 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 53eac8d9c80f..274d82360c1a 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -310,6 +310,244 @@ intel_dsc_power_domain(struct intel_crtc *crtc, enum 
> transcoder cpu_transcoder)
>   return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
>  }
>  
> +static void intel_dsc_write_pps_reg(const struct intel_crtc_state 
> *crtc_state,
> + enum intel_dsc_pps pps, u32 pps_val)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> + enum pipe pipe = crtc->pipe;
> +
> + switch (pps) {
> + case PPS_0:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_0,
> +pps_val);
> + if (crtc_state->dsc.dsc_split)
> + intel_de_write(i915, 
> DSCC_PICTURE_PARAMETER_SET_0,
> +pps_val);
> + } else {
> + intel_de_write(i915,
> +ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe),
> +pps_val);
> + if (crtc_state->dsc.dsc_split)
> + intel_de_write(i915,
> +
> ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe),
> +pps_val);
> + }

Ditto here, lots of duplication that just shouldn't exist.

BR,
Jani.

> + break;
> + case PPS_1:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_1,
> +pps_val);
> + if (crtc_state->dsc.dsc_split)
> + intel_de_write(i915, 
> DSCC_PICTURE_PARAMETER_SET_1,
> +pps_val);
> + } else {
> + intel_de_write(i915,
> +ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe),
> +pps_val);
> + if (crtc_state->dsc.dsc_split)
> + intel_de_write(i915,
> +
> ICL_DSC1_PICTURE_PARAMETER_SET_1(pipe),
> +pps_val);
> + }
> + break;
> + case PPS_2:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_2,
> +pps_val);
> + if (crtc_state->dsc.dsc_split)
> + intel_de_write(i915, 
> DSCC_PICTURE_PARAMETER_SET_2,
> +pps_val);
> + } else {
> + intel_de_write(i915,
> +ICL_DSC0_PICTURE_PARAMETER_SET_2(pipe),
> +pps_val);
> + if (crtc_state->dsc.dsc_split)
> + intel_de_write(i915,
> +
> ICL_DSC1_PICTURE_PARAMETER_SET_2(pipe),
> +pps_val);
> + }
> + break;
> + case PPS_3:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_3,
> +pps_val);
> + if (crtc_state->dsc.dsc_split)
> + intel_de_write(i915, 
> DSCC_PICTURE_PARAMETER_SET_3,
> +pps_val);
> + } else {
> + intel_de_write(i915,
> +ICL_DSC0_PICTURE_PARAMETER_SET_3(pipe),
> +pps_val);
> + if (crtc_state->dsc.dsc_split)
> + intel_de_write(i915,
> +
> ICL_DSC1_PICTURE_PARAMETER_SET_3(pipe),
> +pps_val);
> + }
> + break;
> + case PPS_4:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + intel_de_write(i915, DSCA_PICTURE_

Re: [Intel-gfx] [PATCH 2/5] drm/i915/vdsc: Add function to read any PPS register

[Jani Nikula]

On Mon, 10 Jul 2023, Jani Nikula  wrote:
> On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
>> Add function to read any PPS register based on the
>> intel_dsc_pps enum provided. Add a function which will call the
>> new pps read function and place it in crtc state. Only PPS0 and
>> PPS1 are readout the rest of the registers will be read in upcoming
>> patches.
>>
>> Signed-off-by: Suraj Kandpal 
>> ---
>>  drivers/gpu/drm/i915/display/intel_vdsc.c | 293 --
>>  1 file changed, 272 insertions(+), 21 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
>> b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index 1a8272324c36..53eac8d9c80f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -940,16 +940,284 @@ void intel_dsc_disable(const struct intel_crtc_state 
>> *old_crtc_state)
>>  }
>>  }
>>  
>> +static void intel_dsc_read_pps_reg(struct intel_crtc_state *crtc_state,
>> +   enum intel_dsc_pps pps, u32 *pps_val)
>> +{
>> +struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>> +enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>> +struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>> +enum pipe pipe = crtc->pipe;
>> +u32 pps_temp;
>> +
>> +switch (pps) {
>> +case PPS_0:
>> +if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>> +*pps_val = intel_de_read(i915, 
>> DSCA_PICTURE_PARAMETER_SET_0);
>> +if (crtc_state->dsc.dsc_split) {
>> +pps_temp = intel_de_read(i915, 
>> DSCC_PICTURE_PARAMETER_SET_0);
>> +drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
>> +}
>> +} else {
>> +*pps_val = intel_de_read(i915,
>> + 
>> ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe));
>> +if (crtc_state->dsc.dsc_split) {
>> +pps_temp =
>> +intel_de_read(i915,
>> +  
>> ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe));
>> +drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
>> +}
>> +}
>
> This function is just a huge amount of duplicated copy-paste.
>
> What you need is a function to return the *registers* for each pps
> index. And yeah, I don't think the enum is needed.
>
> We should also switch the negative !is_pipe_dsc() positive
> is_pipe_dsc().
>
> Refactoring should never introduce functional changes. You should
> separate the two. This adds the if (crtc_state->dsc.dsc_split)
> conditions which doesn't exist in the original.

Moreover, are you sure a verification with a warning belongs at the low
level read function? They belong at different abstraction layers.

Add the low level read function, then wrap it with something that
verifies.

BR,
Jani.


>
> BR,
> Jani.
>
>
>> +break;
>> +case PPS_1:
>> +if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>> +*pps_val = intel_de_read(i915, 
>> DSCA_PICTURE_PARAMETER_SET_1);
>> +if (crtc_state->dsc.dsc_split) {
>> +pps_temp = intel_de_read(i915, 
>> DSCC_PICTURE_PARAMETER_SET_1);
>> +drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
>> +}
>> +} else {
>> +*pps_val = intel_de_read(i915,
>> + 
>> ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe));
>> +if (crtc_state->dsc.dsc_split) {
>> +pps_temp =
>> +intel_de_read(i915,
>> +  
>> ICL_DSC1_PICTURE_PARAMETER_SET_1(pipe));
>> +drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
>> +}
>> +}
>> +break;
>> +case PPS_2:
>> +if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>> +*pps_val = intel_de_read(i915, 
>> DSCA_PICTURE_PARAMETER_SET_2);
>> +if (crtc_state->dsc.dsc_split) {
>> +pps_temp = intel_de_read(i915, 
>> DSCC_PICTURE_PARAMETER_SET_2);
>> +drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
>> +}
>> +} else {
>> +*pps_val = intel_de_read(i915,
>> + 
>> ICL_DSC0_PICTURE_PARAMETER_SET_2(pipe));
>> +if (crtc_state->dsc.dsc_split) {
>> +pps_temp =
>> +intel_de_read(i915,
>> +  
>> ICL_DSC1_PICTURE_PARAMETER_SET_2(pipe));
>> +drm_WARN_ON(&i915->drm, *pps_val !=

Re: [Intel-gfx] [PATCH 2/5] drm/i915/vdsc: Add function to read any PPS register

[Jani Nikula]

On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
> Add function to read any PPS register based on the
> intel_dsc_pps enum provided. Add a function which will call the
> new pps read function and place it in crtc state. Only PPS0 and
> PPS1 are readout the rest of the registers will be read in upcoming
> patches.
>
> Signed-off-by: Suraj Kandpal 
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 293 --
>  1 file changed, 272 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 1a8272324c36..53eac8d9c80f 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -940,16 +940,284 @@ void intel_dsc_disable(const struct intel_crtc_state 
> *old_crtc_state)
>   }
>  }
>  
> +static void intel_dsc_read_pps_reg(struct intel_crtc_state *crtc_state,
> +enum intel_dsc_pps pps, u32 *pps_val)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> + enum pipe pipe = crtc->pipe;
> + u32 pps_temp;
> +
> + switch (pps) {
> + case PPS_0:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + *pps_val = intel_de_read(i915, 
> DSCA_PICTURE_PARAMETER_SET_0);
> + if (crtc_state->dsc.dsc_split) {
> + pps_temp = intel_de_read(i915, 
> DSCC_PICTURE_PARAMETER_SET_0);
> + drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
> + }
> + } else {
> + *pps_val = intel_de_read(i915,
> +  
> ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe));
> + if (crtc_state->dsc.dsc_split) {
> + pps_temp =
> + intel_de_read(i915,
> +   
> ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe));
> + drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
> + }
> + }

This function is just a huge amount of duplicated copy-paste.

What you need is a function to return the *registers* for each pps
index. And yeah, I don't think the enum is needed.

We should also switch the negative !is_pipe_dsc() positive
is_pipe_dsc().

Refactoring should never introduce functional changes. You should
separate the two. This adds the if (crtc_state->dsc.dsc_split)
conditions which doesn't exist in the original.

BR,
Jani.


> + break;
> + case PPS_1:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + *pps_val = intel_de_read(i915, 
> DSCA_PICTURE_PARAMETER_SET_1);
> + if (crtc_state->dsc.dsc_split) {
> + pps_temp = intel_de_read(i915, 
> DSCC_PICTURE_PARAMETER_SET_1);
> + drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
> + }
> + } else {
> + *pps_val = intel_de_read(i915,
> +  
> ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe));
> + if (crtc_state->dsc.dsc_split) {
> + pps_temp =
> + intel_de_read(i915,
> +   
> ICL_DSC1_PICTURE_PARAMETER_SET_1(pipe));
> + drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
> + }
> + }
> + break;
> + case PPS_2:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + *pps_val = intel_de_read(i915, 
> DSCA_PICTURE_PARAMETER_SET_2);
> + if (crtc_state->dsc.dsc_split) {
> + pps_temp = intel_de_read(i915, 
> DSCC_PICTURE_PARAMETER_SET_2);
> + drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
> + }
> + } else {
> + *pps_val = intel_de_read(i915,
> +  
> ICL_DSC0_PICTURE_PARAMETER_SET_2(pipe));
> + if (crtc_state->dsc.dsc_split) {
> + pps_temp =
> + intel_de_read(i915,
> +   
> ICL_DSC1_PICTURE_PARAMETER_SET_2(pipe));
> + drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
> + }
> + }
> + break;
> + case PPS_3:
> + if (!is_pipe_dsc(crtc, cpu_transcoder)) {
> + *pps_val = intel_de_read(i915, 
> DSCA_PICTURE_PARAMETER_SET_3);
> + if (crtc_state->dsc.dsc_split) {
> +

Re: [Intel-gfx] [PATCH 1/5] drm/i915/dsc: Add PPS enum

[Jani Nikula]

On Mon, 10 Jul 2023, Jani Nikula  wrote:
> On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
>> Add PPS enum so that we can later on use it to distinguish which
>> PPS is being read or written onto.
>
> The patch adding the enum alone isn't useful, should be squashed with
> something that uses it.

Also, maybe you could just use an int?

>
> BR,
> Jani.
>
>>
>> Signed-off-by: Suraj Kandpal 
>> ---
>>  drivers/gpu/drm/i915/display/intel_vdsc.c | 17 +
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
>> b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> index bd9116d2cd76..1a8272324c36 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
>> @@ -19,6 +19,23 @@
>>  #include "intel_vdsc.h"
>>  #include "intel_vdsc_regs.h"
>>  
>> +enum intel_dsc_pps {
>> +PPS_0 = 0,
>> +PPS_1,
>> +PPS_2,
>> +PPS_3,
>> +PPS_4,
>> +PPS_5,
>> +PPS_6,
>> +PPS_7,
>> +PPS_8,
>> +PPS_9,
>> +PPS_10,
>> +PPS_16,
>> +PPS_17,
>> +PPS_18,
>> +};
>> +
>>  bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
>>  {
>>  const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 1/5] drm/i915/dsc: Add PPS enum

[Jani Nikula]

On Mon, 10 Jul 2023, Suraj Kandpal  wrote:
> Add PPS enum so that we can later on use it to distinguish which
> PPS is being read or written onto.

The patch adding the enum alone isn't useful, should be squashed with
something that uses it.

BR,
Jani.

>
> Signed-off-by: Suraj Kandpal 
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 17 +
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index bd9116d2cd76..1a8272324c36 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -19,6 +19,23 @@
>  #include "intel_vdsc.h"
>  #include "intel_vdsc_regs.h"
>  
> +enum intel_dsc_pps {
> + PPS_0 = 0,
> + PPS_1,
> + PPS_2,
> + PPS_3,
> + PPS_4,
> + PPS_5,
> + PPS_6,
> + PPS_7,
> + PPS_8,
> + PPS_9,
> + PPS_10,
> + PPS_16,
> + PPS_17,
> + PPS_18,
> +};
> +
>  bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
>  {
>   const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Add ability for tracking buffer objects per client

[Iddamsetty, Aravind]

On 07-07-2023 18:32, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin 
> 
> In order to show per client memory usage lets add some infrastructure
> which enables tracking buffer objects owned by clients.
> 
> We add a per client list protected by a new per client lock and to support
> delayed destruction (post client exit) we make tracked objects hold
> references to the owning client.
> 
> Also, object memory region teardown is moved to the existing RCU free
> callback to allow safe dereference from the fdinfo RCU read section.
> 
> Signed-off-by: Tvrtko Ursulin 
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_object.c| 13 +--
>  .../gpu/drm/i915/gem/i915_gem_object_types.h  | 12 +++
>  drivers/gpu/drm/i915/i915_drm_client.c| 36 +++
>  drivers/gpu/drm/i915/i915_drm_client.h| 32 +
>  4 files changed, 90 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c 
> b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> index 97ac6fb37958..3dc4fbb67d2b 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> @@ -105,6 +105,10 @@ void i915_gem_object_init(struct drm_i915_gem_object 
> *obj,
>  
>   INIT_LIST_HEAD(&obj->mm.link);
>  
> +#ifdef CONFIG_PROC_FS
> + INIT_LIST_HEAD(&obj->client_link);
> +#endif
> +
>   INIT_LIST_HEAD(&obj->lut_list);
>   spin_lock_init(&obj->lut_lock);
>  
> @@ -292,6 +296,10 @@ void __i915_gem_free_object_rcu(struct rcu_head *head)
>   container_of(head, typeof(*obj), rcu);
>   struct drm_i915_private *i915 = to_i915(obj->base.dev);
>  
> + /* We need to keep this alive for RCU read access from fdinfo. */
> + if (obj->mm.n_placements > 1)
> + kfree(obj->mm.placements);
> +
>   i915_gem_object_free(obj);
>  
>   GEM_BUG_ON(!atomic_read(&i915->mm.free_count));
> @@ -388,9 +396,6 @@ void __i915_gem_free_object(struct drm_i915_gem_object 
> *obj)
>   if (obj->ops->release)
>   obj->ops->release(obj);
>  
> - if (obj->mm.n_placements > 1)
> - kfree(obj->mm.placements);
> -
>   if (obj->shares_resv_from)
>   i915_vm_resv_put(obj->shares_resv_from);
>  
> @@ -441,6 +446,8 @@ static void i915_gem_free_object(struct drm_gem_object 
> *gem_obj)
>  
>   GEM_BUG_ON(i915_gem_object_is_framebuffer(obj));
>  
> + i915_drm_client_remove_object(obj);
> +
>   /*
>* Before we free the object, make sure any pure RCU-only
>* read-side critical sections are complete, e.g.
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h 
> b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index e72c57716bee..8de2b91b3edf 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -300,6 +300,18 @@ struct drm_i915_gem_object {
>*/
>   struct i915_address_space *shares_resv_from;
>  
> +#ifdef CONFIG_PROC_FS
> + /**
> +  * @client: @i915_drm_client which created the object
> +  */
> + struct i915_drm_client *client;
> +
> + /**
> +  * @client_link: Link into @i915_drm_client.objects_list
> +  */
> + struct list_head client_link;
> +#endif
> +
>   union {
>   struct rcu_head rcu;
>   struct llist_node freed;
> diff --git a/drivers/gpu/drm/i915/i915_drm_client.c 
> b/drivers/gpu/drm/i915/i915_drm_client.c
> index 2a44b3876cb5..2e5e69edc0f9 100644
> --- a/drivers/gpu/drm/i915/i915_drm_client.c
> +++ b/drivers/gpu/drm/i915/i915_drm_client.c
> @@ -28,6 +28,10 @@ struct i915_drm_client *i915_drm_client_alloc(void)
>   kref_init(&client->kref);
>   spin_lock_init(&client->ctx_lock);
>   INIT_LIST_HEAD(&client->ctx_list);
> +#ifdef CONFIG_PROC_FS
> + spin_lock_init(&client->objects_lock);
> + INIT_LIST_HEAD(&client->objects_list);
> +#endif
>  
>   return client;
>  }
> @@ -108,4 +112,36 @@ void i915_drm_client_fdinfo(struct drm_printer *p, 
> struct drm_file *file)
>   for (i = 0; i < ARRAY_SIZE(uabi_class_names); i++)
>   show_client_class(p, i915, file_priv->client, i);
>  }
> +
> +void i915_drm_client_add_object(struct i915_drm_client *client,
> + struct drm_i915_gem_object *obj)
> +{
> + unsigned long flags;
> +
> + GEM_WARN_ON(obj->client);
> + GEM_WARN_ON(!list_empty(&obj->client_link));
> +
> + spin_lock_irqsave(&client->objects_lock, flags);
> + obj->client = i915_drm_client_get(client);
> + list_add_tail_rcu(&obj->client_link, &client->objects_list);
> + spin_unlock_irqrestore(&client->objects_lock, flags);
> +}

would it be nice to mention that we use this client infra only to track
internal objects. While the user created through file->object_idr added
during handle creation time.

Thanks,
Aravind.
> +
> +bool i915_drm_client_remove_object(struct drm_i915_gem_object *obj)
> +{
> + struct i915_drm_client

Re: [Intel-gfx] [PATCH v3] drm/i915: Avoid circular locking dependency when flush delayed work on gt reset

[Andi Shyti]

Hi,

On Thu, Jun 15, 2023 at 02:15:42PM -0700, Zhanjun Dong wrote:
> This attempts to avoid circular locking dependency between flush delayed work 
> and intel_gt_reset.
> Switched from cancel_delayed_work_sync to cancel_delayed_work, the non-sync 
> version for reset path, it is safe as the worker has the trylock code to 
> handle the lock; Meanwhile keep the sync version for park/fini to ensure the 
> worker is not still running during suspend or shutdown.
> 
> WARNING: possible circular locking dependency detected
> 6.4.0-rc1-drmtip_1340-g31e3463b0edb+ #1 Not tainted
> --
> kms_pipe_crc_ba/6415 is trying to acquire lock:
> 88813e6cc640 
> ((work_completion)(&(&guc->timestamp.work)->work)){+.+.}-{0:0}, at: 
> __flush_work+0x42/0x530
> 
> but task is already holding lock:
> 88813e6cce90 (>->reset.mutex){+.+.}-{3:3}, at: 
> intel_gt_reset+0x19e/0x470 [i915]
> 
> which lock already depends on the new lock.
> 
> the existing dependency chain (in reverse order) is:
> 
> -> #3 (>->reset.mutex){+.+.}-{3:3}:
> lock_acquire+0xd8/0x2d0
> i915_gem_shrinker_taints_mutex+0x31/0x50 [i915]
> intel_gt_init_reset+0x65/0x80 [i915]
> intel_gt_common_init_early+0xe1/0x170 [i915]
> intel_root_gt_init_early+0x48/0x60 [i915]
> i915_driver_probe+0x671/0xcb0 [i915]
> i915_pci_probe+0xdc/0x210 [i915]
> pci_device_probe+0x95/0x120
> really_probe+0x164/0x3c0
> __driver_probe_device+0x73/0x160
> driver_probe_device+0x19/0xa0
> __driver_attach+0xb6/0x180
> bus_for_each_dev+0x77/0xd0
> bus_add_driver+0x114/0x210
> driver_register+0x5b/0x110
> __pfx_vgem_open+0x3/0x10 [vgem]
> do_one_initcall+0x57/0x270
> do_init_module+0x5f/0x220
> load_module+0x1ca4/0x1f00
> __do_sys_finit_module+0xb4/0x130
> do_syscall_64+0x3c/0x90
> entry_SYSCALL_64_after_hwframe+0x72/0xdc
> 
> -> #2 (fs_reclaim){+.+.}-{0:0}:
> lock_acquire+0xd8/0x2d0
> fs_reclaim_acquire+0xac/0xe0
> kmem_cache_alloc+0x32/0x260
> i915_vma_instance+0xb2/0xc60 [i915]
> i915_gem_object_ggtt_pin_ww+0x175/0x370 [i915]
> vm_fault_gtt+0x22d/0xf60 [i915]
> __do_fault+0x2f/0x1d0
> do_pte_missing+0x4a/0xd20
> __handle_mm_fault+0x5b0/0x790
> handle_mm_fault+0xa2/0x230
> do_user_addr_fault+0x3ea/0xa10
> exc_page_fault+0x68/0x1a0
> asm_exc_page_fault+0x26/0x30
> 
> -> #1 (>->reset.backoff_srcu){}-{0:0}:
> lock_acquire+0xd8/0x2d0
> _intel_gt_reset_lock+0x57/0x330 [i915]
> guc_timestamp_ping+0x35/0x130 [i915]
> process_one_work+0x250/0x510
> worker_thread+0x4f/0x3a0
> kthread+0xff/0x130
> ret_from_fork+0x29/0x50
> 
> -> #0 ((work_completion)(&(&guc->timestamp.work)->work)){+.+.}-{0:0}:
> check_prev_add+0x90/0xc60
> __lock_acquire+0x1998/0x2590
> lock_acquire+0xd8/0x2d0
> __flush_work+0x74/0x530
> __cancel_work_timer+0x14f/0x1f0
> intel_guc_submission_reset_prepare+0x81/0x4b0 [i915]
> intel_uc_reset_prepare+0x9c/0x120 [i915]
> reset_prepare+0x21/0x60 [i915]
> intel_gt_reset+0x1dd/0x470 [i915]
> intel_gt_reset_global+0xfb/0x170 [i915]
> intel_gt_handle_error+0x368/0x420 [i915]
> intel_gt_debugfs_reset_store+0x5c/0xc0 [i915]
> i915_wedged_set+0x29/0x40 [i915]
> simple_attr_write_xsigned.constprop.0+0xb4/0x110
> full_proxy_write+0x52/0x80
> vfs_write+0xc5/0x4f0
> ksys_write+0x64/0xe0
> do_syscall_64+0x3c/0x90
> entry_SYSCALL_64_after_hwframe+0x72/0xdc
> 
> other info that might help us debug this:
>  Chain exists of:
>   (work_completion)(&(&guc->timestamp.work)->work) --> fs_reclaim --> 
> >->reset.mutex
>   Possible unsafe locking scenario:
> CPU0CPU1
> 
>lock(>->reset.mutex);
> lock(fs_reclaim);
> lock(>->reset.mutex);
>lock((work_completion)(&(&guc->timestamp.work)->work));
> 
>  *** DEADLOCK ***
>  3 locks held by kms_pipe_crc_ba/6415:
>   #0: 888101541430 (sb_writers#15){.+.+}-{0:0}, at: ksys_write+0x64/0xe0
>   #1: 888136c7eab8 (&attr->mutex){+.+.}-{3:3}, at: 
> simple_attr_write_xsigned.constprop.0+0x47/0x110
>   #2: 88813e6cce90 (>->reset.mutex){+.+.}-{3:3}, at: 
> intel_gt_reset+0x19e/0x470 [i915]
> 
> v2: Add sync flag to guc_cancel_busyness_worker to ensure reset path calls 
> asynchronous cancel.
> v3: Add sync flag to intel_guc_submission_disable to ensure reset path calls 
> asynchronous cancel.
> 
> Signed-off-by: Zhanjun Dong 

Acked-by: Andi Shyti  

Any further comment on this?

Andi

> ---
>  .../gpu/drm/i915/gt/uc/intel_guc_submission.c   | 17 ++---
>  .../gpu/drm/i915/gt/uc/intel_

[Intel-gfx] [PATCH 5/5] drm/i915/display: Compare the readout dsc pps params

[Suraj Kandpal]

With the dsc config being readout and filled in crtc_state add
macros and use them to compare current and previous PPS param in
DSC.

Signed-off-by: Suraj Kandpal 
---
 drivers/gpu/drm/i915/display/intel_display.c | 55 
 1 file changed, 55 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index eed01957bdb9..5c1596d7cd92 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5007,6 +5007,8 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
 {
struct drm_i915_private *dev_priv = 
to_i915(current_config->uapi.crtc->dev);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
+   const struct drm_dsc_config *dsc_current_config = 
¤t_config->dsc.config;
+   const struct drm_dsc_config *dsc_pipe_config = &pipe_config->dsc.config;
bool ret = true;
bool fixup_inherited = fastset &&
current_config->inherited && !pipe_config->inherited;
@@ -5202,6 +5204,26 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
 #define PIPE_CONF_QUIRK(quirk) \
((current_config->quirks | pipe_config->quirks) & (quirk))
 
+#define PIPE_DSC_CONF_CHECK_I(name) do { \
+   if (dsc_current_config->name != dsc_pipe_config->name) { \
+   pipe_config_mismatch(fastset, crtc, __stringify(name), \
+"(expected %i, found %i)", \
+dsc_current_config->name, \
+dsc_pipe_config->name); \
+   ret = false; \
+   } \
+} while (0)
+
+#define PIPE_DSC_CONF_CHECK_BOOL(name) do { \
+   if (dsc_current_config->name != dsc_pipe_config->name) { \
+   pipe_config_mismatch(fastset, crtc,  __stringify(name), \
+"(expected %s, found %s)", \
+str_yes_no(dsc_current_config->name), \
+str_yes_no(dsc_pipe_config->name)); \
+   ret = false; \
+   } \
+} while (0)
+
PIPE_CONF_CHECK_I(hw.enable);
PIPE_CONF_CHECK_I(hw.active);
 
@@ -5378,6 +5400,39 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
PIPE_CONF_CHECK_I(master_transcoder);
PIPE_CONF_CHECK_X(bigjoiner_pipes);
 
+   PIPE_DSC_CONF_CHECK_BOOL(block_pred_enable);
+   PIPE_DSC_CONF_CHECK_BOOL(convert_rgb);
+   PIPE_DSC_CONF_CHECK_BOOL(simple_422);
+   PIPE_DSC_CONF_CHECK_BOOL(native_422);
+   PIPE_DSC_CONF_CHECK_BOOL(native_420);
+   PIPE_DSC_CONF_CHECK_BOOL(vbr_enable);
+   PIPE_DSC_CONF_CHECK_I(line_buf_depth);
+   PIPE_DSC_CONF_CHECK_I(bits_per_component);
+   PIPE_DSC_CONF_CHECK_I(pic_width);
+   PIPE_DSC_CONF_CHECK_I(pic_height);
+   PIPE_DSC_CONF_CHECK_I(slice_width);
+   PIPE_DSC_CONF_CHECK_I(slice_height);
+   PIPE_DSC_CONF_CHECK_I(initial_dec_delay);
+   PIPE_DSC_CONF_CHECK_I(initial_xmit_delay);
+   PIPE_DSC_CONF_CHECK_I(scale_decrement_interval);
+   PIPE_DSC_CONF_CHECK_I(scale_increment_interval);
+   PIPE_DSC_CONF_CHECK_I(initial_scale_value);
+   PIPE_DSC_CONF_CHECK_I(first_line_bpg_offset);
+   PIPE_DSC_CONF_CHECK_I(flatness_min_qp);
+   PIPE_DSC_CONF_CHECK_I(flatness_max_qp);
+   PIPE_DSC_CONF_CHECK_I(slice_bpg_offset);
+   PIPE_DSC_CONF_CHECK_I(nfl_bpg_offset);
+   PIPE_DSC_CONF_CHECK_I(initial_offset);
+   PIPE_DSC_CONF_CHECK_I(final_offset);
+   PIPE_DSC_CONF_CHECK_I(rc_model_size);
+   PIPE_DSC_CONF_CHECK_I(rc_quant_incr_limit0);
+   PIPE_DSC_CONF_CHECK_I(rc_quant_incr_limit1);
+   PIPE_DSC_CONF_CHECK_I(slice_chunk_size);
+   if (DISPLAY_VER(dev_priv) >= 14) {
+   PIPE_DSC_CONF_CHECK_I(second_line_bpg_offset);
+   PIPE_DSC_CONF_CHECK_I(nsl_bpg_offset);
+   }
+
PIPE_CONF_CHECK_I(dsc.compression_enable);
PIPE_CONF_CHECK_I(dsc.dsc_split);
PIPE_CONF_CHECK_I(dsc.compressed_bpp);
-- 
2.25.1

[Intel-gfx] [PATCH 4/5] drm/i915/vdsc: Fill the intel_dsc_get_pps_config function

[Suraj Kandpal]

We have setup both the read and write functions so we can
move ahead and fill in all the readout state from PPS register
into the crtc_state so we can send it for comparision.

Signed-off-by: Suraj Kandpal 
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 152 +++---
 .../gpu/drm/i915/display/intel_vdsc_regs.h|  53 --
 2 files changed, 172 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 274d82360c1a..a4f5b4aceb33 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -596,51 +596,51 @@ static void intel_dsc_pps_configure(const struct 
intel_crtc_state *crtc_state)
/* Populate PICTURE_PARAMETER_SET_2 registers */
pps_val = 0;
pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) |
-   DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances);
+   DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances, true);
drm_dbg_kms(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val);
intel_dsc_write_pps_reg(crtc_state, PPS_2, pps_val);
 
/* Populate PICTURE_PARAMETER_SET_3 registers */
pps_val = 0;
pps_val |= DSC_SLICE_HEIGHT(vdsc_cfg->slice_height) |
-   DSC_SLICE_WIDTH(vdsc_cfg->slice_width);
+   DSC_SLICE_WIDTH(vdsc_cfg->slice_width, true);
drm_dbg_kms(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val);
intel_dsc_write_pps_reg(crtc_state, PPS_3, pps_val);
 
/* Populate PICTURE_PARAMETER_SET_4 registers */
pps_val = 0;
pps_val |= DSC_INITIAL_XMIT_DELAY(vdsc_cfg->initial_xmit_delay) |
-   DSC_INITIAL_DEC_DELAY(vdsc_cfg->initial_dec_delay);
+   DSC_INITIAL_DEC_DELAY(vdsc_cfg->initial_dec_delay, true);
drm_dbg_kms(&dev_priv->drm, "PPS4 = 0x%08x\n", pps_val);
intel_dsc_write_pps_reg(crtc_state, PPS_4, pps_val);
 
/* Populate PICTURE_PARAMETER_SET_5 registers */
pps_val = 0;
pps_val |= DSC_SCALE_INC_INT(vdsc_cfg->scale_increment_interval) |
-   DSC_SCALE_DEC_INT(vdsc_cfg->scale_decrement_interval);
+   DSC_SCALE_DEC_INT(vdsc_cfg->scale_decrement_interval, true);
drm_dbg_kms(&dev_priv->drm, "PPS5 = 0x%08x\n", pps_val);
intel_dsc_write_pps_reg(crtc_state, PPS_5, pps_val);
 
/* Populate PICTURE_PARAMETER_SET_6 registers */
pps_val = 0;
pps_val |= DSC_INITIAL_SCALE_VALUE(vdsc_cfg->initial_scale_value) |
-   DSC_FIRST_LINE_BPG_OFFSET(vdsc_cfg->first_line_bpg_offset) |
-   DSC_FLATNESS_MIN_QP(vdsc_cfg->flatness_min_qp) |
-   DSC_FLATNESS_MAX_QP(vdsc_cfg->flatness_max_qp);
+   DSC_FIRST_LINE_BPG_OFFSET(vdsc_cfg->first_line_bpg_offset, 
true) |
+   DSC_FLATNESS_MIN_QP(vdsc_cfg->flatness_min_qp, true) |
+   DSC_FLATNESS_MAX_QP(vdsc_cfg->flatness_max_qp, true);
drm_dbg_kms(&dev_priv->drm, "PPS6 = 0x%08x\n", pps_val);
intel_dsc_write_pps_reg(crtc_state, PPS_6, pps_val);
 
/* Populate PICTURE_PARAMETER_SET_7 registers */
pps_val = 0;
pps_val |= DSC_SLICE_BPG_OFFSET(vdsc_cfg->slice_bpg_offset) |
-   DSC_NFL_BPG_OFFSET(vdsc_cfg->nfl_bpg_offset);
+   DSC_NFL_BPG_OFFSET(vdsc_cfg->nfl_bpg_offset, true);
drm_dbg_kms(&dev_priv->drm, "PPS7 = 0x%08x\n", pps_val);
intel_dsc_write_pps_reg(crtc_state, PPS_7, pps_val);
 
/* Populate PICTURE_PARAMETER_SET_8 registers */
pps_val = 0;
pps_val |= DSC_FINAL_OFFSET(vdsc_cfg->final_offset) |
-   DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset);
+   DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset, true);
drm_dbg_kms(&dev_priv->drm, "PPS8 = 0x%08x\n", pps_val);
intel_dsc_write_pps_reg(crtc_state, PPS_8, pps_val);
 
@@ -654,7 +654,7 @@ static void intel_dsc_pps_configure(const struct 
intel_crtc_state *crtc_state)
/* Populate PICTURE_PARAMETER_SET_10 registers */
pps_val = 0;
pps_val |= DSC_RC_QUANT_INC_LIMIT0(vdsc_cfg->rc_quant_incr_limit0) |
-   DSC_RC_QUANT_INC_LIMIT1(vdsc_cfg->rc_quant_incr_limit1) |
+   DSC_RC_QUANT_INC_LIMIT1(vdsc_cfg->rc_quant_incr_limit1, true) |
DSC_RC_TARGET_OFF_HIGH(DSC_RC_TGT_OFFSET_HI_CONST) |
DSC_RC_TARGET_OFF_LOW(DSC_RC_TGT_OFFSET_LO_CONST);
drm_dbg_kms(&dev_priv->drm, "PPS10 = 0x%08x\n", pps_val);
@@ -673,13 +673,14 @@ static void intel_dsc_pps_configure(const struct 
intel_crtc_state *crtc_state)
if (DISPLAY_VER(dev_priv) >= 14) {
/* Populate PICTURE_PARAMETER_SET_17 registers */
pps_val = 0;
-   pps_val |= DSC_SL_BPG_OFFSET(vdsc_cfg->second_line_bpg_offset);
+   pps_val |= DSC_SL_BPG_OFFSET(vdsc_cfg->second_line_bpg_offset,
+true);
drm_dbg_kms(&de

[Intel-gfx] [PATCH 3/5] drm/i915/vdsc: Add function to write in PPS registers

[Suraj Kandpal]

Now that we have a function that reads any PPS register based
on intel_dsc_pps enum provided lets create a function that can
write on any PPS.

Signed-off-by: Suraj Kandpal 
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 494 +++---
 1 file changed, 252 insertions(+), 242 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 53eac8d9c80f..274d82360c1a 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -310,6 +310,244 @@ intel_dsc_power_domain(struct intel_crtc *crtc, enum 
transcoder cpu_transcoder)
return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
 }
 
+static void intel_dsc_write_pps_reg(const struct intel_crtc_state *crtc_state,
+   enum intel_dsc_pps pps, u32 pps_val)
+{
+   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+   enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+   enum pipe pipe = crtc->pipe;
+
+   switch (pps) {
+   case PPS_0:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_0,
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915, 
DSCC_PICTURE_PARAMETER_SET_0,
+  pps_val);
+   } else {
+   intel_de_write(i915,
+  ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe),
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915,
+  
ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe),
+  pps_val);
+   }
+   break;
+   case PPS_1:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_1,
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915, 
DSCC_PICTURE_PARAMETER_SET_1,
+  pps_val);
+   } else {
+   intel_de_write(i915,
+  ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe),
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915,
+  
ICL_DSC1_PICTURE_PARAMETER_SET_1(pipe),
+  pps_val);
+   }
+   break;
+   case PPS_2:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_2,
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915, 
DSCC_PICTURE_PARAMETER_SET_2,
+  pps_val);
+   } else {
+   intel_de_write(i915,
+  ICL_DSC0_PICTURE_PARAMETER_SET_2(pipe),
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915,
+  
ICL_DSC1_PICTURE_PARAMETER_SET_2(pipe),
+  pps_val);
+   }
+   break;
+   case PPS_3:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_3,
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915, 
DSCC_PICTURE_PARAMETER_SET_3,
+  pps_val);
+   } else {
+   intel_de_write(i915,
+  ICL_DSC0_PICTURE_PARAMETER_SET_3(pipe),
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915,
+  
ICL_DSC1_PICTURE_PARAMETER_SET_3(pipe),
+  pps_val);
+   }
+   break;
+   case PPS_4:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   intel_de_write(i915, DSCA_PICTURE_PARAMETER_SET_4,
+  pps_val);
+   if (crtc_state->dsc.dsc_split)
+   intel_de_write(i915, 

[Intel-gfx] [PATCH 2/5] drm/i915/vdsc: Add function to read any PPS register

[Suraj Kandpal]

Add function to read any PPS register based on the
intel_dsc_pps enum provided. Add a function which will call the
new pps read function and place it in crtc state. Only PPS0 and
PPS1 are readout the rest of the registers will be read in upcoming
patches.

Signed-off-by: Suraj Kandpal 
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 293 --
 1 file changed, 272 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 1a8272324c36..53eac8d9c80f 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -940,16 +940,284 @@ void intel_dsc_disable(const struct intel_crtc_state 
*old_crtc_state)
}
 }
 
+static void intel_dsc_read_pps_reg(struct intel_crtc_state *crtc_state,
+  enum intel_dsc_pps pps, u32 *pps_val)
+{
+   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+   enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+   struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+   enum pipe pipe = crtc->pipe;
+   u32 pps_temp;
+
+   switch (pps) {
+   case PPS_0:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   *pps_val = intel_de_read(i915, 
DSCA_PICTURE_PARAMETER_SET_0);
+   if (crtc_state->dsc.dsc_split) {
+   pps_temp = intel_de_read(i915, 
DSCC_PICTURE_PARAMETER_SET_0);
+   drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
+   }
+   } else {
+   *pps_val = intel_de_read(i915,
+
ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe));
+   if (crtc_state->dsc.dsc_split) {
+   pps_temp =
+   intel_de_read(i915,
+ 
ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe));
+   drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
+   }
+   }
+   break;
+   case PPS_1:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   *pps_val = intel_de_read(i915, 
DSCA_PICTURE_PARAMETER_SET_1);
+   if (crtc_state->dsc.dsc_split) {
+   pps_temp = intel_de_read(i915, 
DSCC_PICTURE_PARAMETER_SET_1);
+   drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
+   }
+   } else {
+   *pps_val = intel_de_read(i915,
+
ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe));
+   if (crtc_state->dsc.dsc_split) {
+   pps_temp =
+   intel_de_read(i915,
+ 
ICL_DSC1_PICTURE_PARAMETER_SET_1(pipe));
+   drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
+   }
+   }
+   break;
+   case PPS_2:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   *pps_val = intel_de_read(i915, 
DSCA_PICTURE_PARAMETER_SET_2);
+   if (crtc_state->dsc.dsc_split) {
+   pps_temp = intel_de_read(i915, 
DSCC_PICTURE_PARAMETER_SET_2);
+   drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
+   }
+   } else {
+   *pps_val = intel_de_read(i915,
+
ICL_DSC0_PICTURE_PARAMETER_SET_2(pipe));
+   if (crtc_state->dsc.dsc_split) {
+   pps_temp =
+   intel_de_read(i915,
+ 
ICL_DSC1_PICTURE_PARAMETER_SET_2(pipe));
+   drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
+   }
+   }
+   break;
+   case PPS_3:
+   if (!is_pipe_dsc(crtc, cpu_transcoder)) {
+   *pps_val = intel_de_read(i915, 
DSCA_PICTURE_PARAMETER_SET_3);
+   if (crtc_state->dsc.dsc_split) {
+   pps_temp = intel_de_read(i915, 
DSCC_PICTURE_PARAMETER_SET_3);
+   drm_WARN_ON(&i915->drm, *pps_val != pps_temp);
+   }
+   } else {
+   *pps_val = intel_de_read(i915,
+
ICL_DSC0_PICTURE_PARAMETER_SET_3(pipe));
+   if (crtc_state->dsc.dsc_split) {
+   pps_temp =
+   intel_de_read(i915,
+ 
ICL_DS

[Intel-gfx] [PATCH 1/5] drm/i915/dsc: Add PPS enum

[Suraj Kandpal]

Add PPS enum so that we can later on use it to distinguish which
PPS is being read or written onto.

Signed-off-by: Suraj Kandpal 
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index bd9116d2cd76..1a8272324c36 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -19,6 +19,23 @@
 #include "intel_vdsc.h"
 #include "intel_vdsc_regs.h"
 
+enum intel_dsc_pps {
+   PPS_0 = 0,
+   PPS_1,
+   PPS_2,
+   PPS_3,
+   PPS_4,
+   PPS_5,
+   PPS_6,
+   PPS_7,
+   PPS_8,
+   PPS_9,
+   PPS_10,
+   PPS_16,
+   PPS_17,
+   PPS_18,
+};
+
 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
 {
const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-- 
2.25.1

[Intel-gfx] [PATCH 0/5] Add DSC PPS readout

[Suraj Kandpal]

Up until now we only verified one or two of the dsc pps
params like bits_per_component and bits_per_pixel this
patch series aim to readout almost all PPS param and get
them compared.
Along with that some work on making a common function to
read and write PPS param regiters is also done.

Signed-off-by: Suraj Kandpal 


Suraj Kandpal (5):
  drm/i915/dsc: Add PPS enum
  drm/i915/vdsc: Add function to read any PPS register
  drm/i915/vdsc: Add function to write in PPS registers
  drm/i915/vdsc: Fill the intel_dsc_get_pps_config function
  drm/i915/display: Compare the readout dsc pps params

 drivers/gpu/drm/i915/display/intel_display.c  |  55 +
 drivers/gpu/drm/i915/display/intel_vdsc.c | 944 +-
 .../gpu/drm/i915/display/intel_vdsc_regs.h|  53 +-
 3 files changed, 762 insertions(+), 290 deletions(-)

-- 
2.25.1

Re: [Intel-gfx] [PATCH] drm/i915: Remove dead code from gen8_pte_encode

[Andi Shyti]

Hi Tvrtko,

> Commit 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> added a dedicated gen12_pte_encode but forgot to remove the Gen12 specific
> bit from gen8_pte_encode.
> 
> Signed-off-by: Tvrtko Ursulin 
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Cc: Fei Yang 
> Cc: Andi Shyti 
> Cc: Matt Roper 

Reviewed-by: Andi Shyti  

Andi