[Intel-gfx] ✓ Fi.CI.BAT: success for Engine busyness v2
== Series Details ==
Series: Engine busyness v2
URL : https://patchwork.freedesktop.org/series/124149/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13671 -> Patchwork_124149v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124149v1/index.html
Participating hosts (39 -> 37)
--
Additional (1): fi-hsw-4770
Missing(3): bat-dg2-9 fi-bsw-nick fi-snb-2520m
Known issues
Here are the changes found in Patchwork_124149v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#9262])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124149v1/bat-mtlp-8/igt@i915_selftest@l...@requests.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271]) +13 other tests
skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124149v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][4] -> [FAIL][5] ([IGT#3])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124149v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][6] ([i915#3546]) +2 other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124149v1/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][7] ([i915#8841]) +6 other
tests dmesg-warn
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124149v1/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1072]) +3
other tests skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124149v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
Build changes
-
* IGT: IGT_7498 -> IGTPW_9858
* Linux: CI_DRM_13671 -> Patchwork_124149v1
CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9858: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html
IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124149v1: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
10cf6b7cfa4e drm/i915/mtl: Add counters for engine busyness ticks
5eb046b377c6 drm/i915/mtl: Add a PMU counter for total active ticks
a7fc2879b8cd drm/i915/guc: Support new and improved engine busyness
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124149v1/index.html
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Engine busyness v2
== Series Details == Series: Engine busyness v2 URL : https://patchwork.freedesktop.org/series/124149/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Engine busyness v2
== Series Details == Series: Engine busyness v2 URL : https://patchwork.freedesktop.org/series/124149/ State : warning == Summary == Error: dim checkpatch failed 08333f9e5cff drm/i915/guc: Support new and improved engine busyness -:223: WARNING:LONG_LINE: line length of 121 exceeds 100 columns #223: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:1004: + engine_usage.v2.function_data[guc_vf].engine_data[guc_class][instance]); total: 0 errors, 1 warnings, 0 checks, 918 lines checked 77a6f269dccf drm/i915/mtl: Add a PMU counter for total active ticks 726d0071dc91 drm/i915/mtl: Add counters for engine busyness ticks
[Intel-gfx] ✓ Fi.CI.BAT: success for Apply Wa_16018031267 / Wa_16018063123 (rev3)
== Series Details ==
Series: Apply Wa_16018031267 / Wa_16018063123 (rev3)
URL : https://patchwork.freedesktop.org/series/124011/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13671 -> Patchwork_124011v3
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124011v3/index.html
Participating hosts (39 -> 36)
--
Missing(3): fi-kbl-soraka bat-dg2-9 fi-snb-2520m
Known issues
Here are the changes found in Patchwork_124011v3 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@dmabuf:
- bat-mtlp-6: [PASS][1] -> [DMESG-FAIL][2] ([i915#9201])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-6/igt@i915_selftest@l...@dmabuf.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124011v3/bat-mtlp-6/igt@i915_selftest@l...@dmabuf.html
* igt@i915_selftest@live@gt_lrc:
- bat-dg2-11: [PASS][3] -> [INCOMPLETE][4] ([i915#4983] /
[i915#7609] / [i915#7913])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124011v3/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][5] -> [FAIL][6] ([IGT#3])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124011v3/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][7] ([i915#3546]) +2 other tests skip
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124011v3/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
- bat-dg2-11: NOTRUN -> [SKIP][8] ([i915#1845]) +1 other test skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124011v3/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
Possible fixes
* igt@kms_chamelium_edid@hdmi-edid-read:
- {bat-dg2-13}: [DMESG-WARN][9] ([i915#7952]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124011v3/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#7609]: https://gitlab.freedesktop.org/drm/intel/issues/7609
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7952]: https://gitlab.freedesktop.org/drm/intel/issues/7952
[i915#9201]: https://gitlab.freedesktop.org/drm/intel/issues/9201
Build changes
-
* Linux: CI_DRM_13671 -> Patchwork_124011v3
CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124011v3: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
4f60aabc313f drm/i915: Set copy engine arbitration for Wa_16018031267 /
Wa_16018063123
da39c58f3e86 drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123
154675b73077 drm/i915: Reserve some kernel space per vm
7742d5f1ad78 drm/i915: Enable NULL PTE support for vm scratch
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124011v3/index.html
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Apply Wa_16018031267 / Wa_16018063123 (rev3)
== Series Details == Series: Apply Wa_16018031267 / Wa_16018063123 (rev3) URL : https://patchwork.freedesktop.org/series/124011/ State : warning == Summary == Error: dim checkpatch failed 661ac13bbc75 drm/i915: Enable NULL PTE support for vm scratch -:8: WARNING:TYPO_SPELLING: 'teh' may be misspelled - perhaps 'the'? #8: The use of NULL PTEs in teh vm scratch pages requires us to change how ^^^ total: 0 errors, 1 warnings, 0 checks, 57 lines checked 4236ce2447a3 drm/i915: Reserve some kernel space per vm -:31: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #31: FILE: drivers/gpu/drm/i915/gt/gen8_ppgtt.c:1021: + GEM_BUG_ON(drm_mm_reserve_node(>vm.mm, >vm.rsvd)); total: 0 errors, 1 warnings, 0 checks, 26 lines checked 89dac5eb0cc2 drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123 -:10: WARNING:BAD_SIGN_OFF: Co-developed-by and Signed-off-by: name/email do not match #10: Co-developed-by: Nirmoy Das Signed-off-by: Jonathan Cavitt -:35: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'engine' - possible side-effects? #35: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:86: +#define NEEDS_FASTCOLOR_BLT_WABB(engine) ( \ + IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 55), IP_VER(12, 71)) && \ + engine->class == COPY_ENGINE_CLASS) -:35: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'engine' may be better as '(engine)' to avoid precedence issues #35: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:86: +#define NEEDS_FASTCOLOR_BLT_WABB(engine) ( \ + IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 55), IP_VER(12, 71)) && \ + engine->class == COPY_ENGINE_CLASS) -:68: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #68: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:836: + GEM_BUG_ON(lrc_ring_wa_bb_per_ctx(engine) == -1); -:183: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #183: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:1498: + GEM_BUG_ON(cs - start > I915_GTT_PAGE_SIZE / sizeof(*cs)); total: 0 errors, 3 warnings, 2 checks, 316 lines checked 81f2d5bbab1d drm/i915: Set copy engine arbitration for Wa_16018031267 / Wa_16018063123
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Apply Wa_16018031267 / Wa_16018063123 (rev3)
== Series Details == Series: Apply Wa_16018031267 / Wa_16018063123 (rev3) URL : https://patchwork.freedesktop.org/series/124011/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dsb: DSB code refactoring
== Series Details ==
Series: drm/i915/dsb: DSB code refactoring
URL : https://patchwork.freedesktop.org/series/124141/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13671 -> Patchwork_124141v1
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_124141v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_124141v1, please notify your bug team
(lgci.bug.fil...@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v1/index.html
Participating hosts (39 -> 38)
--
Additional (1): fi-hsw-4770
Missing(2): fi-snb-2520m fi-pnv-d510
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_124141v1:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@hangcheck:
- fi-skl-guc: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-skl-guc/igt@i915_selftest@l...@hangcheck.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v1/fi-skl-guc/igt@i915_selftest@l...@hangcheck.html
Known issues
Here are the changes found in Patchwork_124141v1 that come from known issues:
### CI changes ###
Issues hit
* boot:
- fi-hsw-4770:NOTRUN -> [FAIL][3] ([i915#8293])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v1/fi-hsw-4770/boot.html
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s0@smem:
- bat-dg2-9: [PASS][4] -> [INCOMPLETE][5] ([i915#9275])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v1/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][6] -> [FAIL][7] ([IGT#3])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
Possible fixes
* igt@kms_chamelium_edid@hdmi-edid-read:
- {bat-dg2-13}: [DMESG-WARN][8] ([i915#7952]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v1/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
* igt@kms_frontbuffer_tracking@basic:
- fi-bsw-nick:[FAIL][10] ([i915#9276]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-bsw-nick/igt@kms_frontbuffer_track...@basic.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v1/fi-bsw-nick/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[i915#7952]: https://gitlab.freedesktop.org/drm/intel/issues/7952
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
[i915#9276]: https://gitlab.freedesktop.org/drm/intel/issues/9276
Build changes
-
* Linux: CI_DRM_13671 -> Patchwork_124141v1
CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124141v1: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
e337ef763336 drm/i915/dsb: DSB code refactoring
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v1/index.html
Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/guc: Close deregister-context race against CT-loss
> -Original Message-
> From: Teres Alexis, Alan Previn
> Sent: Friday, September 22, 2023 11:32 PM
> To: Vivi, Rodrigo
> Cc: intel-gfx@lists.freedesktop.org; Gupta, Anshuman
>
> Subject: Re: [PATCH v3 2/3] drm/i915/guc: Close deregister-context race
> against CT-loss
>
> (cc Anshuman who is working directly with the taskforce debugging this)
>
> Thanks again for taking the time to review this patch.
> Apologies for the tardiness, rest assured debug is still ongoing.
>
> As mentioned in prior comments, the signatures and frequency are now
> different compared to without the patches of this series.
> We are still hunting for data as we are suspecting a different wakeref still
> being
> held with the same trigger event despite.
>
> That said, we will continue to rebase / update this series but hold off on
> actual
> merge until we can be sure we have all the issues resolved.
>
> On Thu, 2023-09-14 at 11:34 -0400, Vivi, Rodrigo wrote:
> > On Sat, Sep 09, 2023 at 08:58:45PM -0700, Alan Previn wrote:
> > > If we are at the end of suspend or very early in resume its possible
> > > an async fence signal could lead us to the
> alan:snip
>
>
> > > @@ -3188,19 +3202,33 @@ static inline void guc_lrc_desc_unpin(struct
> intel_context *ce)
> > > /* Seal race with Reset */
> > > spin_lock_irqsave(>guc_state.lock, flags);
> > > disabled = submission_disabled(guc);
> > >
> alan:snip
> > > + /* Change context state to destroyed and get gt-pm */
> > > + __intel_gt_pm_get(gt);
> > > + set_context_destroyed(ce);
> > > + clr_context_registered(ce);
> > > +
> > > + ret = deregister_context(ce, ce->guc_id.id);
> > > + if (ret) {
> > > + /* Undo the state change and put gt-pm if that failed */
> > > + set_context_registered(ce);
> > > + clr_context_destroyed(ce);
> > > + intel_gt_pm_put(gt);
> >
> > This is a might_sleep inside a spin_lock! Are you 100% confident no
> > WARN was seeing during the tests indicated in the commit msg?
> alan: Good catch - i dont think we saw a WARN - I'll go back and check with
> the
> task force - i shall rework this function to get that outside the lock.
>
> >
> > > + }
> > > + spin_unlock_irqrestore(>guc_state.lock, flags);
> > > +
> > > + return 0;
> >
> > If you are always returning 0, there's no pointing in s/void/int...
> Alan: agreed - will change to void.
> > >
> > >
>
> alan:snip
> > > @@ -3279,6 +3322,17 @@ static void destroyed_worker_func(struct
> work_struct *w)
> > > struct intel_gt *gt = guc_to_gt(guc);
> > > int tmp;
> > >
> > > + /*
> > > + * In rare cases we can get here via async context-free fence-signals
> that
> > > + * come very late in suspend flow or very early in resume flows. In
> these
> > > + * cases, GuC won't be ready but just skipping it here is fine as these
> > > + * pending-destroy-contexts get destroyed totally at GuC reset time at
> the
> > > + * end of suspend.. OR.. this worker can be picked up later on the next
> > > + * context destruction trigger after resume-completes
> >
> > who is triggering the work queue again?
>
> alan: short answer: we dont know - and still hunting this (getting closer
> now..
> using task tgid str-name lookups).
> in the few times I've seen it, the callstack I've seen looked like this:
>
> [33763.582036] Call Trace:
> [33763.582038]
> [33763.582040] dump_stack_lvl+0x69/0x97 [33763.582054]
> guc_context_destroy+0x1b5/0x1ec [33763.582067]
> free_engines+0x52/0x70 [33763.582072] rcu_do_batch+0x161/0x438
> [33763.582084] rcu_nocb_cb_kthread+0xda/0x2d0 [33763.582093]
> kthread+0x13a/0x152 [33763.582102] ?
> rcu_nocb_gp_kthread+0x6a7/0x6a7 [33763.582107] ? css_get+0x38/0x38
> [33763.582118] ret_from_fork+0x1f/0x30 [33763.582128]
Alan above trace is not due to missing GT wakeref, it is due to a
intel_context_put(),
Which called asynchronously by rcu_call(__free_engines), we need insert
rcu_barrier() to flush all
rcu callback in late suspend.
Thanks,
Anshuman.
>
> I did add additional debug-msg for tracking and I recall seeing this sequence
> via
> independant callstacks in the big picture:
> i915_sw_fence_complete > __i915_sw_fence_complete ->
> __i915_sw_fence_notify(fence, FENCE_FREE) -> <..delayed?..>
> [ drm fence sync func ] <...> engines_notify > call_rcu(>rcu,
> free_engines_rcu) <..delayed?..>
> free_engines -> intel_context_put -> ... [kref-dec] -->
> guc_context_destroy
>
> Unfortunately, we still don't know why this initial "i915_sw_fence_complete"
> is coming during suspend-late.
> NOTE1: in the cover letter or prior comment, I hope i mentioned the
> reproduction steps where it only occurs when having a workload that does
> network download that begins downloading just before suspend is started
> but completes before suspend late. We are getting close to finding this -
> taking
> time because of the reproduction steps.
>
> Anshuman can chime in if he is seeing new signatures with different callstack
> /
> events
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/dsb: DSB code refactoring
== Series Details == Series: drm/i915/dsb: DSB code refactoring URL : https://patchwork.freedesktop.org/series/124141/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:237:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:239:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:58:9:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsb: DSB code refactoring
== Series Details == Series: drm/i915/dsb: DSB code refactoring URL : https://patchwork.freedesktop.org/series/124141/ State : warning == Summary == Error: dim checkpatch failed c1292402cc6a drm/i915/dsb: DSB code refactoring Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' -:308: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #308: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 324 lines checked
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm: Annotate structs with __counted_by
== Series Details ==
Series: drm: Annotate structs with __counted_by
URL : https://patchwork.freedesktop.org/series/124132/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13671 -> Patchwork_124132v1
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_124132v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_124132v1, please notify your bug team
(lgci.bug.fil...@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124132v1/index.html
Participating hosts (39 -> 38)
--
Additional (1): fi-hsw-4770
Missing(2): fi-kbl-soraka fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_124132v1:
### IGT changes ###
Possible regressions
* igt@gem_exec_fence@basic-await@vecs1:
- bat-dg2-11: [PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-11/igt@gem_exec_fence@basic-aw...@vecs1.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124132v1/bat-dg2-11/igt@gem_exec_fence@basic-aw...@vecs1.html
Known issues
Here are the changes found in Patchwork_124132v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [PASS][3] -> [ABORT][4] ([i915#9262])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124132v1/bat-mtlp-8/igt@i915_selftest@l...@requests.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][5] ([fdo#109271]) +13 other tests
skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124132v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][6] -> [FAIL][7] ([IGT#3])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124132v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][8] ([i915#8841]) +6 other
tests dmesg-warn
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124132v1/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1072]) +3
other tests skip
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124132v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@lmem0:
- bat-dg2-9: [INCOMPLETE][10] ([i915#9275]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124132v1/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[Intel XE#485]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/485
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
Build changes
-
* Linux: CI_DRM_13671 -> Patchwork_124132v1
CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124132v1: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
7bd5a5d2765d drm/v3d: Annotate struct v3d_perfmon with __counted_by
a8d273897aa2 drm/vmwgfx: Annotate struct vmw_surface_dirty with __counted_by
d83f77480153 drm/virtio: Annotate struct virtio_gpu_object_array with
__counted_by
530ec7bbb8d1 drm/vc4: Annotate struct vc4_perfmon with __counted_by
31415effa7db drm/nouveau/pm: Annotate struct nvkm_perfdom with __counted_by
81fc4118fa06 drm/msm/dpu: Annotate struct dpu_hw_intr with __counted_by
725e5d29ae76 drm/i915/selftests: Annotate struct perf_series
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: Annotate structs with __counted_by
== Series Details == Series: drm: Annotate structs with __counted_by URL : https://patchwork.freedesktop.org/series/124132/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Annotate structs with __counted_by
== Series Details == Series: drm: Annotate structs with __counted_by URL : https://patchwork.freedesktop.org/series/124132/ State : warning == Summary == Error: dim checkpatch failed 9f6367f6bba6 drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by -:16: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #16: As found with Coccinelle[1], add __counted_by for struct smu10_voltage_dependency_table. total: 0 errors, 1 warnings, 0 checks, 8 lines checked 9ec02f5f04c1 drm/amdgpu/discovery: Annotate struct ip_hw_instance with __counted_by -:18: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #18: [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci total: 0 errors, 1 warnings, 0 checks, 8 lines checked d07140c4994e drm/i915/selftests: Annotate struct perf_series with __counted_by -:15: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #15: [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci total: 0 errors, 1 warnings, 0 checks, 8 lines checked 664da6fca719 drm/msm/dpu: Annotate struct dpu_hw_intr with __counted_by -:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #14: [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci total: 0 errors, 1 warnings, 0 checks, 8 lines checked d2b05410610a drm/nouveau/pm: Annotate struct nvkm_perfdom with __counted_by -:15: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #15: [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci total: 0 errors, 1 warnings, 0 checks, 8 lines checked 514d463e24c8 drm/vc4: Annotate struct vc4_perfmon with __counted_by -:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #14: [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci total: 0 errors, 1 warnings, 0 checks, 8 lines checked a737e3fe4537 drm/virtio: Annotate struct virtio_gpu_object_array with __counted_by -:13: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #13: As found with Coccinelle[1], add __counted_by for struct virtio_gpu_object_array. total: 0 errors, 1 warnings, 0 checks, 8 lines checked 70be431674a5 drm/vmwgfx: Annotate struct vmw_surface_dirty with __counted_by -:15: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #15: [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci -:34: CHECK:CAMELCASE: Avoid CamelCase: #34: FILE: drivers/gpu/drm/vmwgfx/vmwgfx_surface.c:80: + SVGA3dBox boxes[] __counted_by(num_subres); total: 0 errors, 1 warnings, 1 checks, 8 lines checked 9d9b14d43eb2 drm/v3d: Annotate struct v3d_perfmon with __counted_by -:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #14: [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci total: 0 errors, 1 warnings, 0 checks, 8 lines checked
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add Wa_18028616096 (rev5)
== Series Details == Series: drm/i915: Add Wa_18028616096 (rev5) URL : https://patchwork.freedesktop.org/series/123951/ State : success == Summary == CI Bug Log - changes from CI_DRM_13671 -> Patchwork_123951v5 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123951v5/index.html Participating hosts (39 -> 39) -- Additional (1): fi-hsw-4770 Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_123951v5 that come from known issues: ### CI changes ### Issues hit * boot: - fi-hsw-4770:NOTRUN -> [FAIL][1] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123951v5/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][2] -> [FAIL][3] ([IGT#3]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123951v5/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1: - bat-rplp-1: [PASS][4] -> [ABORT][5] ([i915#8668]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123951v5/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html * igt@kms_pipe_crc_basic@suspend-read-crc: - fi-ivb-3770:NOTRUN -> [SKIP][6] ([fdo#109271]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123951v5/fi-ivb-3770/igt@kms_pipe_crc_ba...@suspend-read-crc.html Possible fixes * igt@gem_exec_suspend@basic-s0@lmem0: - bat-dg2-9: [INCOMPLETE][7] ([i915#9275]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123951v5/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293 [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668 [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275 Build changes - * Linux: CI_DRM_13671 -> Patchwork_123951v5 CI-20190529: 20190529 CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_123951v5: e1973de2c4516e9130157e538014e79c8aa57b41 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 2143dda5d355 drm/i915: Add Wa_18028616096 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123951v5/index.html
Re: [Intel-gfx] [PATCH] drm/i915/dp: refactor aux_ch_name()
Quoting Jani Nikula (2023-09-22 07:56:45-03:00)
>Convert aux_ch_name() to a helper that prints a string to a caller
>provided buffer, and use it to get more consistent aux channel
>debugs. Now that all users of aux_ch_name() are in intel_dp_aux.c, we
>can make it static too.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display.h | 2 -
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 41
> 2 files changed, 25 insertions(+), 18 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display.h
>b/drivers/gpu/drm/i915/display/intel_display.h
>index 49ac8473b988..9f252d1f03a7 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.h
>+++ b/drivers/gpu/drm/i915/display/intel_display.h
>@@ -190,8 +190,6 @@ enum aux_ch {
> AUX_CH_E_XELPD,
> };
>
>-#define aux_ch_name(a) ((a) + 'A')
>-
> enum phy {
> PHY_NONE = -1,
>
>diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
>b/drivers/gpu/drm/i915/display/intel_dp_aux.c
>index b90cad7f567b..4431b6290c4c 100644
>--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
>+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
>@@ -14,6 +14,21 @@
> #include "intel_pps.h"
> #include "intel_tc.h"
>
>+#define AUX_CH_NAME_BUFSIZE6
>+
>+static const char *aux_ch_name(struct drm_i915_private *i915,
>+ char *buf, int size, enum aux_ch aux_ch)
>+{
>+if (DISPLAY_VER(i915) >= 13 && aux_ch >= AUX_CH_D_XELPD)
>+snprintf(buf, size, "%c", 'A' + aux_ch - AUX_CH_D_XELPD +
>AUX_CH_D);
>+else if (DISPLAY_VER(i915) >= 12 && aux_ch >= AUX_CH_USBC1)
>+snprintf(buf, size, "USBC%c", '1' + aux_ch - AUX_CH_USBC1);
>+else
>+snprintf(buf, size, "%c", 'A' + aux_ch);
>+
>+return buf;
>+}
>+
> u32 intel_dp_aux_pack(const u8 *src, int src_bytes)
> {
> int i;
>@@ -728,6 +743,7 @@ void intel_dp_aux_init(struct intel_dp *intel_dp)
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> struct intel_encoder *encoder = _port->base;
> enum aux_ch aux_ch = dig_port->aux_ch;
>+char buf[AUX_CH_NAME_BUFSIZE];
>
> if (DISPLAY_VER(dev_priv) >= 14) {
> intel_dp->aux_ch_ctl_reg = xelpdp_aux_ctl_reg;
>@@ -764,18 +780,9 @@ void intel_dp_aux_init(struct intel_dp *intel_dp)
> drm_dp_aux_init(_dp->aux);
>
> /* Failure to allocate our preferred name is not critical */
>-if (DISPLAY_VER(dev_priv) >= 13 && aux_ch >= AUX_CH_D_XELPD)
>-intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX %c/%s",
>- aux_ch_name(aux_ch -
>AUX_CH_D_XELPD + AUX_CH_D),
>- encoder->base.name);
>-else if (DISPLAY_VER(dev_priv) >= 12 && aux_ch >= AUX_CH_USBC1)
>-intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX USBC%c/%s",
>- aux_ch - AUX_CH_USBC1 + '1',
>- encoder->base.name);
>-else
>-intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX %c/%s",
>- aux_ch_name(aux_ch),
>- encoder->base.name);
>+intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX %s/%s",
>+ aux_ch_name(dev_priv, buf,
>sizeof(buf), aux_ch),
>+ encoder->base.name);
>
> intel_dp->aux.transfer = intel_dp_aux_transfer;
> cpu_latency_qos_add_request(_dp->pm_qos, PM_QOS_DEFAULT_VALUE);
>@@ -819,6 +826,7 @@ enum aux_ch intel_dp_aux_ch(struct intel_encoder *encoder)
> struct intel_encoder *other;
> const char *source;
> enum aux_ch aux_ch;
>+char buf[AUX_CH_NAME_BUFSIZE];
>
> aux_ch = intel_bios_dp_aux_ch(encoder->devdata);
> source = "VBT";
>@@ -836,16 +844,17 @@ enum aux_ch intel_dp_aux_ch(struct intel_encoder
>*encoder)
> other = get_encoder_by_aux_ch(encoder, aux_ch);
> if (other) {
> drm_dbg_kms(>drm,
>-"[ENCODER:%d:%s] AUX CH %c already claimed by
>[ENCODER:%d:%s]\n",
>-encoder->base.base.id, encoder->base.name,
>aux_ch_name(aux_ch),
>+"[ENCODER:%d:%s] AUX CH %s already claimed by
>[ENCODER:%d:%s]\n",
>+encoder->base.base.id, encoder->base.name,
>+aux_ch_name(i915, buf, sizeof(buf), aux_ch),
> other->base.base.id, other->base.name);
> return AUX_CH_NONE;
> }
>
> drm_dbg_kms(>drm,
>-"[ENCODER:%d:%s] Using AUX CH %c (%s)\n",
>+"[ENCODER:%d:%s] Using AUX CH %s (%s)\n",
> encoder->base.base.id, encoder->base.name,
>-
[Intel-gfx] ✓ Fi.CI.BAT: success for fdinfo memory stats (rev8)
== Series Details ==
Series: fdinfo memory stats (rev8)
URL : https://patchwork.freedesktop.org/series/119082/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13671 -> Patchwork_119082v8
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/index.html
Participating hosts (39 -> 29)
--
Additional (1): fi-hsw-4770
Missing(11): fi-kbl-soraka fi-skl-guc fi-tgl-1115g4 fi-cfl-guc fi-apl-guc
fi-snb-2520m fi-kbl-x1275 fi-ivb-3770 bat-jsl-3 fi-blb-e6850 fi-bsw-nick
Known issues
Here are the changes found in Patchwork_119082v8 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#9262])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/bat-mtlp-8/igt@i915_selftest@l...@requests.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271]) +13 other tests
skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][4] -> [FAIL][5] ([IGT#3])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#1845]) +3 other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][7] ([i915#8841]) +6 other
tests dmesg-warn
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1072]) +3
other tests skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@lmem0:
- bat-dg2-9: [INCOMPLETE][9] ([i915#9275]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
* igt@kms_chamelium_edid@hdmi-edid-read:
- {bat-dg2-13}: [DMESG-WARN][11] ([i915#7952]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_119082v8/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#7952]: https://gitlab.freedesktop.org/drm/intel/issues/7952
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
Build changes
-
* IGT: IGT_7498 -> IGTPW_9852
* Linux: CI_DRM_13671 -> Patchwork_119082v8
CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9852: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9852/index.html
IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_119082v8: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
2cacb2a58994 drm/i915: Implement fdinfo memory stats printing
2cff30b1c2a8 drm/i915: Add stable memory region names
6ae362583981 drm/i915: Account ring buffer and context state storage
50c43c1affba drm/i915: Track page table backing store usage
d4379ba44b28 drm/i915: Record which client owns a VM
5cf2b9d60c83 drm/i915: Add ability for tracking buffer objects per client
== Logs ==
For more details see:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Suppress 'ignoring reset notification' message
== Series Details == Series: drm/i915/guc: Suppress 'ignoring reset notification' message URL : https://patchwork.freedesktop.org/series/124072/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13667_full -> Patchwork_124072v1_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124072v1_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124072v1_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124072v1_full: ### IGT changes ### Possible regressions * igt@gem_exec_suspend@basic-s0@smem: - shard-dg2: [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13667/shard-dg2-11/igt@gem_exec_suspend@basic...@smem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg2-1/igt@gem_exec_suspend@basic...@smem.html Known issues Here are the changes found in Patchwork_124072v1_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@crc32: - shard-dg1: NOTRUN -> [SKIP][3] ([i915#6230]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg1-19/igt@api_intel...@crc32.html * igt@device_reset@cold-reset-bound: - shard-rkl: NOTRUN -> [SKIP][4] ([i915#7701]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-rkl-2/igt@device_re...@cold-reset-bound.html * igt@drm_fdinfo@busy-idle-check-all@vcs0: - shard-dg2: NOTRUN -> [SKIP][5] ([i915#8414]) +9 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg2-7/igt@drm_fdinfo@busy-idle-check-...@vcs0.html * igt@drm_fdinfo@most-busy-check-all@rcs0: - shard-rkl: [PASS][6] -> [FAIL][7] ([i915#7742]) +1 other test fail [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13667/shard-rkl-1/igt@drm_fdinfo@most-busy-check-...@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-rkl-2/igt@drm_fdinfo@most-busy-check-...@rcs0.html * igt@gem_busy@semaphore: - shard-dg1: NOTRUN -> [SKIP][8] ([i915#3936]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg1-19/igt@gem_b...@semaphore.html * igt@gem_ccs@suspend-resume: - shard-dg1: NOTRUN -> [SKIP][9] ([i915#9323]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg1-19/igt@gem_...@suspend-resume.html * igt@gem_ctx_persistence@heartbeat-hang: - shard-mtlp: NOTRUN -> [SKIP][10] ([i915#8555]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-mtlp-1/igt@gem_ctx_persiste...@heartbeat-hang.html * igt@gem_ctx_persistence@legacy-engines-cleanup: - shard-snb: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-snb4/igt@gem_ctx_persiste...@legacy-engines-cleanup.html * igt@gem_ctx_sseu@invalid-sseu: - shard-dg2: NOTRUN -> [SKIP][12] ([i915#280]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg2-5/igt@gem_ctx_s...@invalid-sseu.html * igt@gem_eio@unwedge-stress: - shard-dg1: [PASS][13] -> [FAIL][14] ([i915#5784]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13667/shard-dg1-18/igt@gem_...@unwedge-stress.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg1-14/igt@gem_...@unwedge-stress.html * igt@gem_exec_balancer@bonded-sync: - shard-dg2: NOTRUN -> [SKIP][15] ([i915#4771]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg2-7/igt@gem_exec_balan...@bonded-sync.html * igt@gem_exec_fair@basic-pace: - shard-dg1: NOTRUN -> [SKIP][16] ([i915#3539]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-dg1-19/igt@gem_exec_f...@basic-pace.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-rkl: [PASS][17] -> [FAIL][18] ([i915#2842]) +1 other test fail [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13667/shard-rkl-6/igt@gem_exec_fair@basic-p...@bcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124072v1/shard-rkl-7/igt@gem_exec_fair@basic-p...@bcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-glk: NOTRUN -> [FAIL][19] ([i915#2842]) [19]:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for fdinfo memory stats (rev8)
== Series Details == Series: fdinfo memory stats (rev8) URL : https://patchwork.freedesktop.org/series/119082/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.BAT: failure for fbc on any planes (rev3)
== Series Details == Series: fbc on any planes (rev3) URL : https://patchwork.freedesktop.org/series/123180/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13671 -> Patchwork_123180v3 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_123180v3 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_123180v3, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/index.html Participating hosts (39 -> 38) -- Additional (2): bat-dg2-8 fi-hsw-4770 Missing(3): fi-kbl-soraka bat-dg2-9 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_123180v3: ### IGT changes ### Possible regressions * igt@i915_suspend@basic-s3-without-i915: - fi-elk-e7500: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-elk-e7500/igt@i915_susp...@basic-s3-without-i915.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/fi-elk-e7500/igt@i915_susp...@basic-s3-without-i915.html Known issues Here are the changes found in Patchwork_123180v3 that come from known issues: ### CI changes ### Issues hit * boot: - fi-hsw-4770:NOTRUN -> [FAIL][3] ([i915#8293]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][4] ([i915#4083]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-8: NOTRUN -> [SKIP][5] ([i915#4077]) +2 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@gem_mmap_...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-8: NOTRUN -> [SKIP][6] ([i915#4079]) +1 other test skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#6621]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#6645]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-8: NOTRUN -> [SKIP][9] ([i915#5190]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#4215] / [i915#5190]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#4212]) +6 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#4212] / [i915#5608]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-8: NOTRUN -> [SKIP][14] ([fdo#109285]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#5274]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/bat-dg2-8/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][16] -> [FAIL][17] ([IGT#3]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123180v3/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html *
Re: [Intel-gfx] [PATCH 6/9] drm/vc4: Annotate struct vc4_perfmon with __counted_by
On 9/22/23 11:32, Kees Cook wrote:
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct vc4_perfmon.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Emma Anholt
Cc: Maxime Ripard
Cc: David Airlie
Cc: Daniel Vetter
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
Reviewed-by: Gustavo A. R. Silva
Thanks
--
Gustavo
---
drivers/gpu/drm/vc4/vc4_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index bf66499765fb..ab61e96e7e14 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -76,7 +76,7 @@ struct vc4_perfmon {
* Note that counter values can't be reset, but you can fake a reset by
* destroying the perfmon and creating a new one.
*/
- u64 counters[];
+ u64 counters[] __counted_by(ncounters);
};
struct vc4_dev {
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for fbc on any planes (rev3)
== Series Details == Series: fbc on any planes (rev3) URL : https://patchwork.freedesktop.org/series/123180/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for fbc on any planes (rev3)
== Series Details == Series: fbc on any planes (rev3) URL : https://patchwork.freedesktop.org/series/123180/ State : warning == Summary == Error: dim checkpatch failed 96ecdcaf57cb drm/i915/lnl: possibility to enable FBC on first three planes -:74: WARNING:LONG_LINE: line length of 103 exceeds 100 columns #74: FILE: drivers/gpu/drm/i915/i915_reg.h:1331: +#define DPFC_CTL_PLANE_BINDING(plane_id) REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, (plane_id)) total: 0 errors, 1 warnings, 0 checks, 36 lines checked 5914e9bbb6e2 drm/i915/lnl: update the supported plane formats with FBC
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/irq: Clear GFX_MSTR_IRQ as part of IRQ reset (rev4)
== Series Details ==
Series: drm/i915/irq: Clear GFX_MSTR_IRQ as part of IRQ reset (rev4)
URL : https://patchwork.freedesktop.org/series/123928/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13671 -> Patchwork_123928v4
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v4/index.html
Participating hosts (39 -> 36)
--
Additional (1): fi-hsw-4770
Missing(4): fi-kbl-soraka bat-dg2-9 fi-snb-2520m fi-pnv-d510
Known issues
Here are the changes found in Patchwork_123928v4 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#9262])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v4/bat-mtlp-8/igt@i915_selftest@l...@requests.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271]) +13 other tests
skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v4/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][4] -> [FAIL][5] ([IGT#3])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v4/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][6] ([i915#3546]) +2 other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v4/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][7] ([i915#8841]) +6 other
tests dmesg-warn
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v4/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1072]) +3
other tests skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v4/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
Build changes
-
* Linux: CI_DRM_13671 -> Patchwork_123928v4
CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_123928v4: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
1d45558454bd drm/i915/irq: Clear GFX_MSTR_IRQ as part of IRQ reset
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v4/index.html
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Make i915_gem_shrinker multi-gt aware
== Series Details ==
Series: drm/i915/gem: Make i915_gem_shrinker multi-gt aware
URL : https://patchwork.freedesktop.org/series/124112/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13671 -> Patchwork_124112v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/index.html
Participating hosts (39 -> 38)
--
Additional (1): fi-hsw-4770
Missing(2): fi-kbl-soraka fi-snb-2520m
Known issues
Here are the changes found in Patchwork_124112v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [PASS][1] -> [DMESG-FAIL][2] ([i915#5334])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271]) +13 other tests
skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][4] -> [FAIL][5] ([IGT#3])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#1845]) +3 other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [PASS][7] -> [ABORT][8] ([i915#8668])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][9] ([i915#8841]) +6 other
tests dmesg-warn
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1072]) +3
other tests skip
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@lmem0:
- bat-dg2-9: [INCOMPLETE][11] ([i915#9275]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
* igt@kms_chamelium_edid@hdmi-edid-read:
- {bat-dg2-13}: [DMESG-WARN][13] ([i915#7952]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124112v1/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#7952]: https://gitlab.freedesktop.org/drm/intel/issues/7952
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
Build changes
-
* Linux: CI_DRM_13671 -> Patchwork_124112v1
CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124112v1: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
9287037d22fd drm/i915/gem: Make i915_gem_shrinker multi-gt aware
== Logs ==
For more details see:
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: refactor aux_ch_name()
== Series Details == Series: drm/i915/dp: refactor aux_ch_name() URL : https://patchwork.freedesktop.org/series/124107/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13671 -> Patchwork_124107v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124107v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124107v1, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/index.html Participating hosts (39 -> 38) -- Additional (1): fi-hsw-4770 Missing(2): fi-kbl-soraka fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124107v1: ### IGT changes ### Possible regressions * igt@kms_addfb_basic@addfb25-4-tiled: - fi-apl-guc: [PASS][1] -> [DMESG-WARN][2] +40 other tests dmesg-warn [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@kms_addfb_ba...@addfb25-4-tiled.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-apl-guc/igt@kms_addfb_ba...@addfb25-4-tiled.html Known issues Here are the changes found in Patchwork_124107v1 that come from known issues: ### IGT changes ### Issues hit * igt@core_hotunplug@unbind-rebind: - fi-apl-guc: [PASS][3] -> [DMESG-WARN][4] ([i915#180] / [i915#7634]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@core_hotunp...@unbind-rebind.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-apl-guc/igt@core_hotunp...@unbind-rebind.html * igt@debugfs_test@basic-hwmon: - fi-hsw-4770:NOTRUN -> [SKIP][5] ([fdo#109271]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-hsw-4770/igt@debugfs_t...@basic-hwmon.html * igt@i915_module_load@reload: - fi-apl-guc: [PASS][6] -> [DMESG-WARN][7] ([i915#180] / [i915#1982] / [i915#7634]) +1 other test dmesg-warn [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@i915_module_l...@reload.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-apl-guc/igt@i915_module_l...@reload.html * igt@i915_pm_rpm@module-reload: - fi-apl-guc: [PASS][8] -> [DMESG-WARN][9] ([i915#180] / [i915#1982] / [i915#7634] / [i915#8585]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@i915_pm_...@module-reload.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-apl-guc/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [PASS][10] -> [ABORT][11] ([i915#9262]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-8/igt@i915_selftest@l...@requests.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@i915_selftest@live@reset: - fi-apl-guc: [PASS][12] -> [DMESG-WARN][13] ([i915#7634]) +36 other tests dmesg-warn [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@i915_selftest@l...@reset.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-apl-guc/igt@i915_selftest@l...@reset.html * igt@kms_flip@basic-flip-vs-dpms@c-dp1: - fi-apl-guc: [PASS][14] -> [DMESG-WARN][15] ([i915#180] / [i915#8703]) +37 other tests dmesg-warn [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@kms_flip@basic-flip-vs-d...@c-dp1.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-apl-guc/igt@kms_flip@basic-flip-vs-d...@c-dp1.html * igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1: - fi-apl-guc: [PASS][16] -> [DMESG-WARN][17] ([i915#180] / [i915#1982] / [i915#8703]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@a-dp1.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-apl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@a-dp1.html * igt@kms_flip@basic-plain-flip@b-dp1: - fi-apl-guc: [PASS][18] -> [DMESG-WARN][19] ([i915#180] / [i915#8585] / [i915#8703]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-apl-guc/igt@kms_flip@basic-plain-f...@b-dp1.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v1/fi-apl-guc/igt@kms_flip@basic-plain-f...@b-dp1.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][20] -> [FAIL][21] ([IGT#3]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [21]:
Re: [Intel-gfx] [PATCH 4/9] drm/msm/dpu: Annotate struct dpu_hw_intr with __counted_by
On 9/22/23 11:32, Kees Cook wrote:
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct dpu_hw_intr.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Rob Clark
Cc: Abhinav Kumar
Cc: Dmitry Baryshkov
Cc: Sean Paul
Cc: Marijn Suijten
Cc: David Airlie
Cc: Daniel Vetter
Cc: Bjorn Andersson
Cc: linux-arm-...@vger.kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: freedr...@lists.freedesktop.org
Signed-off-by: Kees Cook
Reviewed-by: Gustavo A. R. Silva
Thanks
--
Gustavo
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index dab761e54863..50cf9523d367 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -61,7 +61,7 @@ struct dpu_hw_intr {
void (*cb)(void *arg, int irq_idx);
void *arg;
atomic_t count;
- } irq_tbl[];
+ } irq_tbl[] __counted_by(total_irqs);
};
/**
[Intel-gfx] [PATCH 3/3] drm/i915/mtl: Add counters for engine busyness ticks
From: Umesh Nerlige Ramappa
In new version of GuC engine busyness, GuC provides engine busyness
ticks as a 64 bit counter. Add a new counter to relay this value to the
user as is.
Signed-off-by: Umesh Nerlige Ramappa
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/intel_engine.h| 1 +
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 +
drivers/gpu/drm/i915/gt/intel_engine_types.h | 12
drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 67 ++-
drivers/gpu/drm/i915/i915_pmu.c | 25 ++-
drivers/gpu/drm/i915/i915_pmu.h | 2 +-
include/uapi/drm/i915_drm.h | 13 +++-
8 files changed, 116 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h
b/drivers/gpu/drm/i915/gt/intel_engine.h
index b58c30ac8ef02..57af7ec8ecd82 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -249,6 +249,7 @@ void intel_engine_dump_active_requests(struct list_head
*requests,
ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine,
ktime_t *now);
+u64 intel_engine_get_busy_ticks(struct intel_engine_cs *engine);
void intel_engine_get_hung_entity(struct intel_engine_cs *engine,
struct intel_context **ce, struct
i915_request **rq);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 84a75c95f3f7d..1c9ffb1ae9889 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -2426,6 +2426,22 @@ ktime_t intel_engine_get_busy_time(struct
intel_engine_cs *engine, ktime_t *now)
return engine->busyness(engine, now);
}
+/**
+ * intel_engine_get_busy_ticks() - Return current accumulated engine busyness
+ * ticks
+ * @engine: engine to report on
+ *
+ * Returns accumulated ticks @engine was busy since engine stats were enabled.
+ */
+u64 intel_engine_get_busy_ticks(struct intel_engine_cs *engine)
+{
+ if (!engine->busyness_ticks ||
+ !(engine->flags & I915_ENGINE_SUPPORTS_TICKS_STATS))
+ return 0;
+
+ return engine->busyness_ticks(engine);
+}
+
struct intel_context *
intel_engine_create_virtual(struct intel_engine_cs **siblings,
unsigned int count, unsigned long flags)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 40fd8f984d64b..a88d40c74d604 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -548,6 +548,11 @@ struct intel_engine_cs {
ktime_t (*busyness)(struct intel_engine_cs *engine,
ktime_t *now);
+ /*
+* Get engine busyness ticks
+*/
+ u64 (*busyness_ticks)(struct intel_engine_cs *engine);
+
struct intel_engine_execlists execlists;
/*
@@ -574,6 +579,7 @@ struct intel_engine_cs {
#define I915_ENGINE_HAS_EU_PRIORITYBIT(10)
#define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)
#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)
+#define I915_ENGINE_SUPPORTS_TICKS_STATS BIT(13)
unsigned int flags;
/*
@@ -649,6 +655,12 @@ intel_engine_supports_stats(const struct intel_engine_cs
*engine)
return engine->flags & I915_ENGINE_SUPPORTS_STATS;
}
+static inline bool
+intel_engine_supports_tick_stats(const struct intel_engine_cs *engine)
+{
+ return engine->flags & I915_ENGINE_SUPPORTS_TICKS_STATS;
+}
+
static inline bool
intel_engine_has_preemption(const struct intel_engine_cs *engine)
{
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index dcedff41a825f..69eb610b5ab0a 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -100,6 +100,7 @@ static void set_scheduler_caps(struct drm_i915_private
*i915)
MAP(HAS_PREEMPTION, PREEMPTION),
MAP(HAS_SEMAPHORES, SEMAPHORES),
MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS),
+ MAP(SUPPORTS_TICKS_STATS, ENGINE_BUSY_TICKS_STATS),
#undef MAP
};
struct intel_engine_cs *engine;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 0c1fee5360777..71749fb9ad35b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1289,12 +1289,7 @@ static void busy_v1_guc_update_pm_timestamp(struct
intel_guc *guc, ktime_t *now)
guc->busy.v1.gt_stamp = ((u64)gt_stamp_hi << 32) | gt_stamp_lo;
}
-/*
- * Unlike the execlist mode of submission total and active times are in terms
of
- * gt clocks. The *now parameter is retained to return the cpu time at which
[Intel-gfx] [PATCH 1/3] drm/i915/guc: Support new and improved engine busyness
From: John Harrison
The GuC has been extended to support a much more friendly engine
busyness interface. So partition the old interface into a 'busy_v1'
space and add 'busy_v2' support alongside. And if v2 is available, use
that in preference to v1. Note that v2 provides extra features over
and above v1 which will be exposed via PMU in subsequent patches.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/intel_engine_types.h | 4 +-
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 4 +-
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 82 ++--
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 55 ++-
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h| 9 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 23 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 381 ++
7 files changed, 427 insertions(+), 131 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index a7e6775980043..40fd8f984d64b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -323,7 +323,7 @@ struct intel_engine_execlists_stats {
ktime_t start;
};
-struct intel_engine_guc_stats {
+struct intel_engine_guc_stats_v1 {
/**
* @running: Active state of the engine when busyness was last sampled.
*/
@@ -603,7 +603,7 @@ struct intel_engine_cs {
struct {
union {
struct intel_engine_execlists_stats execlists;
- struct intel_engine_guc_stats guc;
+ struct intel_engine_guc_stats_v1 guc_v1;
};
/**
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
index f359bef046e0b..c190a99a36c38 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
@@ -137,7 +137,9 @@ enum intel_guc_action {
INTEL_GUC_ACTION_DEREGISTER_CONTEXT_DONE = 0x4600,
INTEL_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
INTEL_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
- INTEL_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
+ INTEL_GUC_ACTION_SET_ENG_UTIL_BUFF_V1 = 0x550A,
+ INTEL_GUC_ACTION_SET_DEVICE_ENGINE_UTILIZATION_V2 = 0x550C,
+ INTEL_GUC_ACTION_SET_FUNCTION_ENGINE_UTILIZATION_V2 = 0x550D,
INTEL_GUC_ACTION_STATE_CAPTURE_NOTIFICATION = 0x8002,
INTEL_GUC_ACTION_NOTIFY_FLUSH_LOG_BUFFER_TO_FILE = 0x8003,
INTEL_GUC_ACTION_NOTIFY_CRASH_DUMP_POSTED = 0x8004,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 6c392bad29c19..e6502ab5f049f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -226,45 +226,61 @@ struct intel_guc {
struct mutex send_mutex;
/**
-* @timestamp: GT timestamp object that stores a copy of the timestamp
-* and adjusts it for overflow using a worker.
+* @busy: Data used by the different versions of engine busyness
implementations.
*/
- struct {
- /**
-* @lock: Lock protecting the below fields and the engine stats.
-*/
- spinlock_t lock;
-
- /**
-* @gt_stamp: 64 bit extended value of the GT timestamp.
-*/
- u64 gt_stamp;
-
- /**
-* @ping_delay: Period for polling the GT timestamp for
-* overflow.
-*/
- unsigned long ping_delay;
-
- /**
-* @work: Periodic work to adjust GT timestamp, engine and
-* context usage for overflows.
-*/
- struct delayed_work work;
-
+ union {
/**
-* @shift: Right shift value for the gpm timestamp
+* @v1: Data used by v1 engine busyness implementation. Mostly
a copy
+* of the GT timestamp extended to 64 bits and the worker for
maintaining it.
*/
- u32 shift;
+ struct {
+ /**
+* @lock: Lock protecting the below fields and the
engine stats.
+*/
+ spinlock_t lock;
+
+ /**
+* @gt_stamp: 64 bit extended value of the GT timestamp.
+*/
+ u64 gt_stamp;
+
+ /**
+* @ping_delay: Period for polling the GT timestamp for
+* overflow.
+*/
+ unsigned long ping_delay;
+
+ /**
+* @work: Periodic work to adjust GT timestamp, engine
and
+* context usage for overflows.
+
[Intel-gfx] [PATCH 0/3] Engine busyness v2
From: John Harrison The latest GuC implements a new and improved scheme for tracking engine busyness. So make use of it. Note that this change comes along with a new set of PMU counters. The old counters have a fundamental problem that they are defined in terms of wall time but the sampling is now all done by the GPU in terms of clock ticks. This leads to issues with timebase conversion, some of which are non-trivial. For existing platforms, the old counters will still be updated by the new scheme and will still suffer all the same issues. For newer platforms (MTL onwards), the old counters are no longer supported. Instead, there is a new set of tick based counters. These include the actual busyness count per engine plus a total ticks count. The intention is that they should be queried as an atomic pair and used together to determine a busyness percentage. No assumptions may be made about tick frequencies or relations to wall time. Test-with: 20230922215233.2438200-1-umesh.nerlige.rama...@intel.com Signed-off-by: John Harrison John Harrison (1): drm/i915/guc: Support new and improved engine busyness Umesh Nerlige Ramappa (2): drm/i915/mtl: Add a PMU counter for total active ticks drm/i915/mtl: Add counters for engine busyness ticks drivers/gpu/drm/i915/gt/intel_engine.h| 1 + drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 + drivers/gpu/drm/i915/gt/intel_engine_types.h | 16 +- drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 + .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 4 +- drivers/gpu/drm/i915/gt/uc/intel_guc.h| 82 ++-- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 55 ++- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h| 9 +- drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 23 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 460 ++ .../gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 + drivers/gpu/drm/i915/i915_pmu.c | 31 +- drivers/gpu/drm/i915/i915_pmu.h | 2 +- include/uapi/drm/i915_drm.h | 15 +- 14 files changed, 570 insertions(+), 146 deletions(-) -- 2.41.0
[Intel-gfx] [PATCH 2/3] drm/i915/mtl: Add a PMU counter for total active ticks
From: Umesh Nerlige Ramappa
Current engine busyness interface exposed by GuC has a few issues:
- The busyness of active engine is calculated using 2 values provided by
GuC and is prone to race between CPU reading those values and GuC
updating them. Any sort of HW synchronization would be at the cost of
scheduling latencies.
- GuC provides only 32 bit values for busyness and KMD has to run a
worker to extend the values to 64 bit. In addition KMD also needs to
extend the GT timestamp to 64 bits so that it can be used to calculate
active busyness for an engine.
To address these issues, GuC provides a new interface to calculate
engine busyness. GuC accumulates the busyness ticks in a 64 bit value
and also internally updates the busyness for an active context using a
periodic timer. This simplifies the KMD implementation such that KMD
only needs to relay the busyness value to the user.
In addition to fixing the interface, GuC also provides a periodically
total active ticks that the GT has been running for. This counter is
exposed to the user so that the % busyness can be calculated as follows:
busyness % = (engine active ticks/total active ticks) * 100.
Implement the new interface and start by adding a new counter for total
active ticks.
Signed-off-by: Umesh Nerlige Ramappa
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 24 +++
.../gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
drivers/gpu/drm/i915/i915_pmu.c | 6 +
include/uapi/drm/i915_drm.h | 2 ++
4 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 88465d701c278..0c1fee5360777 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1607,6 +1607,30 @@ static ktime_t busy_v2_guc_engine_busyness(struct
intel_engine_cs *engine, ktime
return ns_to_ktime(total);
}
+static u64 busy_v1_intel_guc_total_active_ticks(struct intel_guc *guc)
+{
+ return guc->busy.v1.gt_stamp;
+}
+
+static u64 busy_v2_intel_guc_total_active_ticks(struct intel_guc *guc)
+{
+ u64 ticks_gt;
+
+ __busy_v2_get_engine_usage_record(guc, NULL, NULL, NULL, _gt);
+
+ return ticks_gt;
+}
+
+u64 intel_guc_total_active_ticks(struct intel_gt *gt)
+{
+ struct intel_guc *guc = >uc.guc;
+
+ if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 3, 1))
+ return busy_v1_intel_guc_total_active_ticks(guc);
+ else
+ return busy_v2_intel_guc_total_active_ticks(guc);
+}
+
static int busy_v2_guc_action_enable_usage_stats_device(struct intel_guc *guc)
{
u32 offset = guc_engine_usage_offset_v2_device(guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
index c57b29cdb1a64..f6d42838825f2 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
@@ -30,6 +30,7 @@ void intel_guc_dump_active_requests(struct intel_engine_cs
*engine,
struct drm_printer *m);
void intel_guc_busyness_park(struct intel_gt *gt);
void intel_guc_busyness_unpark(struct intel_gt *gt);
+u64 intel_guc_total_active_ticks(struct intel_gt *gt);
bool intel_guc_virtual_engine_has_heartbeat(const struct intel_engine_cs *ve);
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index d35973b411863..4f52636eb4a80 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -563,6 +563,8 @@ config_status(struct drm_i915_private *i915, u64 config)
break;
case I915_PMU_SOFTWARE_GT_AWAKE_TIME:
break;
+ case I915_PMU_TOTAL_ACTIVE_TICKS:
+ break;
default:
return -ENOENT;
}
@@ -678,6 +680,9 @@ static u64 __i915_pmu_event_read(struct perf_event *event)
case I915_PMU_SOFTWARE_GT_AWAKE_TIME:
val = ktime_to_ns(intel_gt_get_awake_time(to_gt(i915)));
break;
+ case I915_PMU_TOTAL_ACTIVE_TICKS:
+ val = intel_guc_total_active_ticks(i915->gt[gt_id]);
+ break;
}
}
@@ -986,6 +991,7 @@ create_event_attributes(struct i915_pmu *pmu)
__global_event(2, "interrupts", NULL),
__event(3, "rc6-residency", "ns"),
__event(4, "software-gt-awake-time", "ns"),
+ __event(5, "total-active-ticks", NULL),
};
static const struct {
enum drm_i915_pmu_engine_sample sample;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 7000e5910a1d7..e26dd27ff4a5f 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -296,6 +296,7 @@ enum
Re: [Intel-gfx] [PATCH 8/9] drm/vmwgfx: Annotate struct vmw_surface_dirty with __counted_by
On Fri, 2023-09-22 at 10:32 -0700, Kees Cook wrote:
> Prepare for the coming implementation by GCC and Clang of the __counted_by
> attribute. Flexible array members annotated with __counted_by can have
> their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
> (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
> functions).
>
> As found with Coccinelle[1], add __counted_by for struct vmw_surface_dirty.
>
> [1]
> https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
>
> Cc: Zack Rusin
> Cc: VMware Graphics Reviewers
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Kees Cook
> ---
> drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
> b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
> index 5db403ee8261..2d1d857f99ae 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
> @@ -77,7 +77,7 @@ struct vmw_surface_offset {
> struct vmw_surface_dirty {
> struct vmw_surface_cache cache;
> u32 num_subres;
> - SVGA3dBox boxes[];
> + SVGA3dBox boxes[] __counted_by(num_subres);
> };
>
> static void vmw_user_surface_free(struct vmw_resource *res);
Thanks!
Reviewed-by: Zack Rusin
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Update GGTT with MI_UPDATE_GTT on MTL (rev9)
== Series Details == Series: Update GGTT with MI_UPDATE_GTT on MTL (rev9) URL : https://patchwork.freedesktop.org/series/123329/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Update GGTT with MI_UPDATE_GTT on MTL (rev9)
== Series Details == Series: Update GGTT with MI_UPDATE_GTT on MTL (rev9) URL : https://patchwork.freedesktop.org/series/123329/ State : warning == Summary == Error: dim checkpatch failed e8865fa699a5 drm/i915: Lift runtime-pm acquire callbacks out of intel_wakeref.mutex -:57: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #57: FILE: drivers/gpu/drm/i915/intel_wakeref.c:27: + INTEL_WAKEREF_BUG_ON(wf->wakeref); -:73: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #73: FILE: drivers/gpu/drm/i915/intel_wakeref.c:40: + INTEL_WAKEREF_BUG_ON(atomic_read(>count) <= 0); -:96: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #96: FILE: drivers/gpu/drm/i915/intel_wakeref.c:60: + INTEL_WAKEREF_BUG_ON(!wf->wakeref); total: 0 errors, 3 warnings, 0 checks, 83 lines checked 365d7c80eda1 drm/i915: Create a kernel context for GGTT updates 09b927fbc53b drm/i915: Implement for_each_sgt_daddr_next -:41: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__iter' - possible side-effects? #41: FILE: drivers/gpu/drm/i915/i915_scatterlist.h:100: +#define __for_each_daddr_next(__dp, __iter, __step) \ + for (; ((__dp) = (__iter).dma + (__iter).curr), (__iter).sgp; \ +(((__iter).curr += (__step)) >= (__iter).max) ?\ +(__iter) = __sgt_iter(__sg_next((__iter).sgp), true), 0 : 0) total: 0 errors, 0 warnings, 1 checks, 25 lines checked 2e826d257022 drm/i915: Parameterize binder context creation be88aa9991e8 drm/i915: Implement GGTT update method with MI_UPDATE_GTT -:70: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #70: FILE: drivers/gpu/drm/i915/gt/intel_ggtt.c:276: + GEM_BUG_ON(!ce); -:240: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #240: FILE: drivers/gpu/drm/i915/gt/intel_ggtt.c:491: + if (!gen8_ggtt_bind_ptes(ggtt, start, vma_res->bi.pages, + vma_res->node_size / I915_GTT_PAGE_SIZE, pte_encode)) -:288: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #288: FILE: drivers/gpu/drm/i915/gt/intel_ggtt.c:553: + if (should_update_ggtt_with_bind(ggtt) && gen8_ggtt_bind_ptes(ggtt, first_entry, +NULL, num_entries, scratch_pte)) total: 0 errors, 1 warnings, 2 checks, 283 lines checked 8d60a67582fb drm/i915: Toggle binder context ready status 7cacb75e8fc8 drm/i915: Enable GGTT updates with binder in MTL
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Add a wrapper function for vga decode setup
== Series Details ==
Series: drm/i915/display: Add a wrapper function for vga decode setup
URL : https://patchwork.freedesktop.org/series/124104/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13671 -> Patchwork_124104v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v1/index.html
Participating hosts (39 -> 37)
--
Additional (1): fi-hsw-4770
Missing(3): fi-kbl-soraka bat-dg2-9 fi-snb-2520m
Known issues
Here are the changes found in Patchwork_124104v1 that come from known issues:
### CI changes ###
Issues hit
* boot:
- fi-hsw-4770:NOTRUN -> [FAIL][1] ([i915#8293])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v1/fi-hsw-4770/boot.html
### IGT changes ###
Issues hit
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [PASS][2] -> [ABORT][3] ([i915#9262])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v1/bat-mtlp-8/igt@i915_selftest@l...@requests.html
- bat-mtlp-6: [PASS][4] -> [ABORT][5] ([i915#9262])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-6/igt@i915_selftest@l...@requests.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v1/bat-mtlp-6/igt@i915_selftest@l...@requests.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][6] ([i915#3546]) +2 other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v1/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [PASS][7] -> [ABORT][8] ([i915#8668])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
Possible fixes
* igt@kms_frontbuffer_tracking@basic:
- fi-bsw-nick:[FAIL][9] ([i915#9276]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-bsw-nick/igt@kms_frontbuffer_track...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v1/fi-bsw-nick/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
[i915#9276]: https://gitlab.freedesktop.org/drm/intel/issues/9276
[i915#9360]: https://gitlab.freedesktop.org/drm/intel/issues/9360
Build changes
-
* Linux: CI_DRM_13671 -> Patchwork_124104v1
CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7498: 05d14fd260a3cf9dc00ed24733d5589eee32ec08 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124104v1: e1973de2c4516e9130157e538014e79c8aa57b41 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
c69e0930776e drm/i915/display: Add a wrapper function for vga decode setup
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v1/index.html
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/perf: Remove gtt_offset from stream->oa_buffer.head/.tail (rev3)
== Series Details == Series: drm/i915/perf: Remove gtt_offset from stream->oa_buffer.head/.tail (rev3) URL : https://patchwork.freedesktop.org/series/123949/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13667_full -> Patchwork_123949v3_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_123949v3_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_123949v3_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_123949v3_full: ### IGT changes ### Possible regressions * igt@gem_exec_suspend@basic-s0@smem: - shard-dg2: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13667/shard-dg2-11/igt@gem_exec_suspend@basic...@smem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg2-2/igt@gem_exec_suspend@basic...@smem.html * igt@i915_module_load@resize-bar: - shard-dg2: NOTRUN -> [ABORT][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg2-3/igt@i915_module_l...@resize-bar.html Known issues Here are the changes found in Patchwork_123949v3_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@crc32: - shard-dg1: NOTRUN -> [SKIP][4] ([i915#6230]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg1-19/igt@api_intel...@crc32.html * igt@device_reset@cold-reset-bound: - shard-rkl: NOTRUN -> [SKIP][5] ([i915#7701]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-rkl-7/igt@device_re...@cold-reset-bound.html * igt@drm_fdinfo@isolation@bcs0: - shard-dg2: NOTRUN -> [SKIP][6] ([i915#8414]) +9 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg2-3/igt@drm_fdinfo@isolat...@bcs0.html * igt@drm_fdinfo@most-busy-idle-check-all@rcs0: - shard-rkl: [PASS][7] -> [FAIL][8] ([i915#7742]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13667/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-rkl-4/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html * igt@gem_busy@semaphore: - shard-dg1: NOTRUN -> [SKIP][9] ([i915#3936]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg1-19/igt@gem_b...@semaphore.html * igt@gem_ccs@suspend-resume: - shard-dg1: NOTRUN -> [SKIP][10] ([i915#9323]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg1-19/igt@gem_...@suspend-resume.html * igt@gem_close_race@multigpu-basic-process: - shard-dg2: NOTRUN -> [SKIP][11] ([i915#7697]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg2-3/igt@gem_close_r...@multigpu-basic-process.html * igt@gem_ctx_persistence@heartbeat-hang: - shard-mtlp: NOTRUN -> [SKIP][12] ([i915#8555]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-mtlp-7/igt@gem_ctx_persiste...@heartbeat-hang.html * igt@gem_ctx_persistence@legacy-engines-cleanup: - shard-snb: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1099]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-snb6/igt@gem_ctx_persiste...@legacy-engines-cleanup.html * igt@gem_ctx_sseu@invalid-sseu: - shard-dg2: NOTRUN -> [SKIP][14] ([i915#280]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg2-11/igt@gem_ctx_s...@invalid-sseu.html * igt@gem_eio@in-flight-suspend: - shard-dg2: [PASS][15] -> [FAIL][16] ([fdo#103375]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13667/shard-dg2-2/igt@gem_...@in-flight-suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-dg2-5/igt@gem_...@in-flight-suspend.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-rkl: [PASS][17] -> [FAIL][18] ([i915#2842]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13667/shard-rkl-2/igt@gem_exec_fair@basic-none-sh...@rcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123949v3/shard-rkl-7/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-pace: - shard-dg1: NOTRUN -> [SKIP][19] ([i915#3539]) [19]:
Re: [Intel-gfx] [PATCH 3/9] drm/i915/selftests: Annotate struct perf_series with __counted_by
On 9/22/23 11:32, Kees Cook wrote:
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct perf_series.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: John Harrison
Cc: Andi Shyti
Cc: Matthew Brost
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
Reviewed-by: Gustavo A. R. Silva
Thanks
--
Gustavo
---
drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c
b/drivers/gpu/drm/i915/selftests/i915_request.c
index a9b79888c193..acae30a04a94 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -1924,7 +1924,7 @@ struct perf_stats {
struct perf_series {
struct drm_i915_private *i915;
unsigned int nengines;
- struct intel_context *ce[];
+ struct intel_context *ce[] __counted_by(nengines);
};
static int cmp_u32(const void *A, const void *B)
Re: [Intel-gfx] [PATCH 2/9] drm/amdgpu/discovery: Annotate struct ip_hw_instance with __counted_by
On 9/22/23 11:32, Kees Cook wrote:
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct ip_hw_instance.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Hawking Zhang
Cc: amd-...@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
Reviewed-by: Gustavo A. R. Silva
Thanks
--
Gustavo
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index d1bc7b212520..be4c97a3d7bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -662,7 +662,7 @@ struct ip_hw_instance {
u8 harvest;
int num_base_addresses;
- u32 base_addr[];
+ u32 base_addr[] __counted_by(num_base_addresses);
};
struct ip_hw_id {
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uapi: Enable L3 Bank Count Querying (rev2)
== Series Details == Series: drm/i915/uapi: Enable L3 Bank Count Querying (rev2) URL : https://patchwork.freedesktop.org/series/123718/ State : success == Summary == CI Bug Log - changes from CI_DRM_13671 -> Patchwork_123718v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/index.html Participating hosts (39 -> 40) -- Additional (2): bat-dg2-8 fi-hsw-4770 Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_123718v2 that come from known issues: ### CI changes ### Issues hit * boot: - fi-hsw-4770:NOTRUN -> [FAIL][1] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][2] ([i915#4083]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-8: NOTRUN -> [SKIP][3] ([i915#4077]) +2 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@gem_mmap_...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-8: NOTRUN -> [SKIP][4] ([i915#4079]) +1 other test skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][5] ([i915#6621]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [PASS][6] -> [ABORT][7] ([i915#9262]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/bat-mtlp-8/igt@i915_selftest@l...@requests.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@i915_selftest@live@slpc: - fi-kbl-soraka: [PASS][8] -> [ABORT][9] ([i915#7913]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-soraka/igt@i915_selftest@l...@slpc.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/fi-kbl-soraka/igt@i915_selftest@l...@slpc.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#6645]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#5190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#4215] / [i915#5190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#4212]) +6 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#4212] / [i915#5608]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-8: NOTRUN -> [SKIP][16] ([fdo#109285]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-8: NOTRUN -> [SKIP][17] ([i915#5274]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/bat-dg2-8/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][18] -> [FAIL][19] ([IGT#3]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13671/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123718v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-dg2-11: NOTRUN -> [SKIP][20] ([i915#1845]) +3 other tests skip [20]:
[Intel-gfx] [PATCH] drm/i915/dsb: DSB code refactoring
Refactor DSB implementation to be compatible with Xe driver.
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/display/intel_dsb.c | 115 ---
drivers/gpu/drm/i915/display/intel_dsb.h | 41 ++-
drivers/gpu/drm/i915/display/intel_dsb_ops.c | 67 +++
4 files changed, 130 insertions(+), 94 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dsb_ops.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 1b2e02e9d92c..7fbb5055b85b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -256,6 +256,7 @@ i915-y += \
display/intel_dpt.o \
display/intel_drrs.o \
display/intel_dsb.o \
+ display/intel_dsb_ops.o \
display/intel_fb.o \
display/intel_fb_pin.o \
display/intel_fbc.o \
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 9a507b9ad82c..f7c6b9aa130f 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -4,8 +4,6 @@
*
*/
-#include "gem/i915_gem_internal.h"
-
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_de.h"
@@ -13,41 +11,7 @@
#include "intel_dsb.h"
#include "intel_dsb_regs.h"
-struct i915_vma;
-
-enum dsb_id {
- INVALID_DSB = -1,
- DSB1,
- DSB2,
- DSB3,
- MAX_DSB_PER_PIPE
-};
-
-struct intel_dsb {
- enum dsb_id id;
-
- u32 *cmd_buf;
- struct i915_vma *vma;
- struct intel_crtc *crtc;
-
- /*
-* maximum number of dwords the buffer will hold.
-*/
- unsigned int size;
-
- /*
-* free_pos will point the first free dword and
-* help in calculating tail of command buffer.
-*/
- unsigned int free_pos;
-
- /*
-* ins_start_offset will help to store start dword of the dsb
-* instuction and help in identifying the batch of auto-increment
-* register.
-*/
- unsigned int ins_start_offset;
-};
+#define CACHELINE_BYTES 64
/**
* DOC: DSB
@@ -117,8 +81,6 @@ static bool is_dsb_busy(struct drm_i915_private *i915, enum
pipe pipe,
static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw)
{
- u32 *buf = dsb->cmd_buf;
-
if (!assert_dsb_has_room(dsb))
return;
@@ -127,14 +89,13 @@ static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw,
u32 udw)
dsb->ins_start_offset = dsb->free_pos;
- buf[dsb->free_pos++] = ldw;
- buf[dsb->free_pos++] = udw;
+ intel_dsb_write(dsb, dsb->free_pos++, ldw);
+ intel_dsb_write(dsb, dsb->free_pos++, udw);
}
static bool intel_dsb_prev_ins_is_write(struct intel_dsb *dsb,
u32 opcode, i915_reg_t reg)
{
- const u32 *buf = dsb->cmd_buf;
u32 prev_opcode, prev_reg;
/*
@@ -145,8 +106,8 @@ static bool intel_dsb_prev_ins_is_write(struct intel_dsb
*dsb,
if (dsb->free_pos == 0)
return false;
- prev_opcode = buf[dsb->ins_start_offset + 1] & ~DSB_REG_VALUE_MASK;
- prev_reg = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK;
+ prev_opcode = intel_dsb_read(dsb, dsb->ins_start_offset + 1) >>
DSB_OPCODE_SHIFT;
+ prev_reg = intel_dsb_read(dsb, dsb->ins_start_offset + 1) &
DSB_REG_VALUE_MASK;
return prev_opcode == opcode && prev_reg == i915_mmio_reg_offset(reg);
}
@@ -179,6 +140,8 @@ static bool intel_dsb_prev_ins_is_indexed_write(struct
intel_dsb *dsb, i915_reg_
void intel_dsb_reg_write(struct intel_dsb *dsb,
i915_reg_t reg, u32 val)
{
+ u32 old_val;
+
/*
* For example the buffer will look like below for 3 dwords for auto
* increment register:
@@ -202,31 +165,30 @@ void intel_dsb_reg_write(struct intel_dsb *dsb,
(DSB_BYTE_EN << DSB_BYTE_EN_SHIFT) |
i915_mmio_reg_offset(reg));
} else {
- u32 *buf = dsb->cmd_buf;
-
if (!assert_dsb_has_room(dsb))
return;
/* convert to indexed write? */
if (intel_dsb_prev_ins_is_mmio_write(dsb, reg)) {
- u32 prev_val = buf[dsb->ins_start_offset + 0];
+ u32 prev_val = intel_dsb_read(dsb,
dsb->ins_start_offset + 0);
- buf[dsb->ins_start_offset + 0] = 1; /* count */
- buf[dsb->ins_start_offset + 1] =
- (DSB_OPCODE_INDEXED_WRITE << DSB_OPCODE_SHIFT) |
- i915_mmio_reg_offset(reg);
- buf[dsb->ins_start_offset + 2] = prev_val;
+ intel_dsb_write(dsb, dsb->ins_start_offset + 0, 1); /*
count */
+ intel_dsb_write(dsb, dsb->ins_start_offset + 1,
+
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/uapi: Enable L3 Bank Count Querying (rev2)
== Series Details == Series: drm/i915/uapi: Enable L3 Bank Count Querying (rev2) URL : https://patchwork.freedesktop.org/series/123718/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH 5/9] drm/nouveau/pm: Annotate struct nvkm_perfdom with __counted_by
Reviewed-by: Lyude Paul
Thanks!
On Fri, 2023-09-22 at 10:32 -0700, Kees Cook wrote:
> Prepare for the coming implementation by GCC and Clang of the __counted_by
> attribute. Flexible array members annotated with __counted_by can have
> their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
> (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
> functions).
>
> As found with Coccinelle[1], add __counted_by for struct nvkm_perfdom.
>
> [1]
> https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
>
> Cc: Ben Skeggs
> Cc: Karol Herbst
> Cc: Lyude Paul
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: dri-de...@lists.freedesktop.org
> Cc: nouv...@lists.freedesktop.org
> Signed-off-by: Kees Cook
> ---
> drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
> b/drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
> index 6ae25d3e7f45..c011227f7052 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
> @@ -82,7 +82,7 @@ struct nvkm_perfdom {
> u8 mode;
> u32 clk;
> u16 signal_nr;
> - struct nvkm_perfsig signal[];
> + struct nvkm_perfsig signal[] __counted_by(signal_nr);
> };
>
> struct nvkm_funcdom {
--
Cheers,
Lyude Paul (she/her)
Software Engineer at Red Hat
Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/guc: Close deregister-context race against CT-loss
(cc Anshuman who is working directly with the taskforce debugging this)
Thanks again for taking the time to review this patch.
Apologies for the tardiness, rest assured debug is still ongoing.
As mentioned in prior comments, the signatures and frequency are
now different compared to without the patches of this series.
We are still hunting for data as we are suspecting a different wakeref
still being held with the same trigger event despite.
That said, we will continue to rebase / update this series but hold off on
actual
merge until we can be sure we have all the issues resolved.
On Thu, 2023-09-14 at 11:34 -0400, Vivi, Rodrigo wrote:
> On Sat, Sep 09, 2023 at 08:58:45PM -0700, Alan Previn wrote:
> > If we are at the end of suspend or very early in resume
> > its possible an async fence signal could lead us to the
alan:snip
> > @@ -3188,19 +3202,33 @@ static inline void guc_lrc_desc_unpin(struct
> > intel_context *ce)
> > /* Seal race with Reset */
> > spin_lock_irqsave(>guc_state.lock, flags);
> > disabled = submission_disabled(guc);
> >
alan:snip
> > + /* Change context state to destroyed and get gt-pm */
> > + __intel_gt_pm_get(gt);
> > + set_context_destroyed(ce);
> > + clr_context_registered(ce);
> > +
> > + ret = deregister_context(ce, ce->guc_id.id);
> > + if (ret) {
> > + /* Undo the state change and put gt-pm if that failed */
> > + set_context_registered(ce);
> > + clr_context_destroyed(ce);
> > + intel_gt_pm_put(gt);
>
> This is a might_sleep inside a spin_lock! Are you 100% confident no WARN
> was seeing during the tests indicated in the commit msg?
alan: Good catch - i dont think we saw a WARN - I'll go back and check
with the task force - i shall rework this function to get that outside the lock.
>
> > + }
> > + spin_unlock_irqrestore(>guc_state.lock, flags);
> > +
> > + return 0;
>
> If you are always returning 0, there's no pointing in s/void/int...
Alan: agreed - will change to void.
> >
> >
alan:snip
> > @@ -3279,6 +3322,17 @@ static void destroyed_worker_func(struct work_struct
> > *w)
> > struct intel_gt *gt = guc_to_gt(guc);
> > int tmp;
> >
> > + /*
> > +* In rare cases we can get here via async context-free fence-signals
> > that
> > +* come very late in suspend flow or very early in resume flows. In
> > these
> > +* cases, GuC won't be ready but just skipping it here is fine as these
> > +* pending-destroy-contexts get destroyed totally at GuC reset time at
> > the
> > +* end of suspend.. OR.. this worker can be picked up later on the next
> > +* context destruction trigger after resume-completes
>
> who is triggering the work queue again?
alan: short answer: we dont know - and still hunting this
(getting closer now.. using task tgid str-name lookups).
in the few times I've seen it, the callstack I've seen looked like this:
[33763.582036] Call Trace:
[33763.582038]
[33763.582040] dump_stack_lvl+0x69/0x97
[33763.582054] guc_context_destroy+0x1b5/0x1ec
[33763.582067] free_engines+0x52/0x70
[33763.582072] rcu_do_batch+0x161/0x438
[33763.582084] rcu_nocb_cb_kthread+0xda/0x2d0
[33763.582093] kthread+0x13a/0x152
[33763.582102] ? rcu_nocb_gp_kthread+0x6a7/0x6a7
[33763.582107] ? css_get+0x38/0x38
[33763.582118] ret_from_fork+0x1f/0x30
[33763.582128]
I did add additional debug-msg for tracking and I recall seeing this sequence
via independant callstacks in the big picture:
i915_sw_fence_complete > __i915_sw_fence_complete ->
__i915_sw_fence_notify(fence, FENCE_FREE) -> <..delayed?..>
[ drm fence sync func ] <...> engines_notify > call_rcu(>rcu,
free_engines_rcu) <..delayed?..>
free_engines -> intel_context_put -> ... [kref-dec] -->
guc_context_destroy
Unfortunately, we still don't know why this initial "i915_sw_fence_complete" is
coming during suspend-late.
NOTE1: in the cover letter or prior comment, I hope i mentioned the
reproduction steps where
it only occurs when having a workload that does network download that begins
downloading just
before suspend is started but completes before suspend late. We are getting
close to finding
this - taking time because of the reproduction steps.
Anshuman can chime in if he is seeing new signatures with different callstack /
events after this patch is applied.
> I mean, I'm wondering if it is necessary to re-schedule it from inside...
> but also wonder if this is safe anyway...
alan: so my thought process, also after consulting with John and Daniele, was:
since we have a link list to collect the list of contexts that need to be
dereigstered,
and since we have up to 64k (32k excluding multi-lrc) guc-ids, there really is
risk is just keeping it inside the link list until we reach one of the
following:
1. full suspend happens and we actually reset the guc - in which case we will
remove
all contexts in this link list and completely destroy them and release all
references
Re: [Intel-gfx] [PATCH 2/9] drm/amdgpu/discovery: Annotate struct ip_hw_instance with __counted_by
On Fri, Sep 22, 2023 at 1:33 PM Kees Cook wrote:
>
> Prepare for the coming implementation by GCC and Clang of the __counted_by
> attribute. Flexible array members annotated with __counted_by can have
> their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
> (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
> functions).
>
> As found with Coccinelle[1], add __counted_by for struct ip_hw_instance.
>
> [1]
> https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
>
> Cc: Alex Deucher
> Cc: "Christian König"
> Cc: "Pan, Xinhui"
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: Hawking Zhang
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Kees Cook
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> index d1bc7b212520..be4c97a3d7bf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> @@ -662,7 +662,7 @@ struct ip_hw_instance {
> u8 harvest;
>
> int num_base_addresses;
> - u32 base_addr[];
> + u32 base_addr[] __counted_by(num_base_addresses);
> };
>
> struct ip_hw_id {
> --
> 2.34.1
>
[Intel-gfx] [PATCH 9/9] drm/v3d: Annotate struct v3d_perfmon with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct v3d_perfmon.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Emma Anholt
Cc: Melissa Wen
Cc: David Airlie
Cc: Daniel Vetter
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/v3d/v3d_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/v3d/v3d_drv.h b/drivers/gpu/drm/v3d/v3d_drv.h
index 7f664a4b2a75..106454f28956 100644
--- a/drivers/gpu/drm/v3d/v3d_drv.h
+++ b/drivers/gpu/drm/v3d/v3d_drv.h
@@ -59,7 +59,7 @@ struct v3d_perfmon {
* values can't be reset, but you can fake a reset by
* destroying the perfmon and creating a new one.
*/
- u64 values[];
+ u64 values[] __counted_by(ncounters);
};
struct v3d_dev {
--
2.34.1
Re: [Intel-gfx] [PATCH 1/9] drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by
On Fri, Sep 22, 2023 at 1:32 PM Kees Cook wrote:
>
> Prepare for the coming implementation by GCC and Clang of the __counted_by
> attribute. Flexible array members annotated with __counted_by can have
> their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
> (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
> functions).
>
> As found with Coccinelle[1], add __counted_by for struct
> smu10_voltage_dependency_table.
>
> [1]
> https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
>
> Cc: Evan Quan
> Cc: Alex Deucher
> Cc: "Christian König"
> Cc: "Pan, Xinhui"
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: Xiaojian Du
> Cc: Huang Rui
> Cc: Kevin Wang
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Kees Cook
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> index 808e0ecbe1f0..42adc2a3dcbc 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> @@ -192,7 +192,7 @@ struct smu10_clock_voltage_dependency_record {
>
> struct smu10_voltage_dependency_table {
> uint32_t count;
> - struct smu10_clock_voltage_dependency_record entries[];
> + struct smu10_clock_voltage_dependency_record entries[]
> __counted_by(count);
> };
>
> struct smu10_clock_voltage_information {
> --
> 2.34.1
>
[Intel-gfx] [PATCH 6/9] drm/vc4: Annotate struct vc4_perfmon with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct vc4_perfmon.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Emma Anholt
Cc: Maxime Ripard
Cc: David Airlie
Cc: Daniel Vetter
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/vc4/vc4_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index bf66499765fb..ab61e96e7e14 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -76,7 +76,7 @@ struct vc4_perfmon {
* Note that counter values can't be reset, but you can fake a reset by
* destroying the perfmon and creating a new one.
*/
- u64 counters[];
+ u64 counters[] __counted_by(ncounters);
};
struct vc4_dev {
--
2.34.1
[Intel-gfx] [PATCH 7/9] drm/virtio: Annotate struct virtio_gpu_object_array with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct
virtio_gpu_object_array.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: David Airlie
Cc: Gerd Hoffmann
Cc: Gurchetan Singh
Cc: Chia-I Wu
Cc: Daniel Vetter
Cc: dri-de...@lists.freedesktop.org
Cc: virtualizat...@lists.linux-foundation.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/virtio/virtgpu_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h
b/drivers/gpu/drm/virtio/virtgpu_drv.h
index 8513b671f871..96365a772f77 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drv.h
+++ b/drivers/gpu/drm/virtio/virtgpu_drv.h
@@ -119,7 +119,7 @@ struct virtio_gpu_object_array {
struct ww_acquire_ctx ticket;
struct list_head next;
u32 nents, total;
- struct drm_gem_object *objs[];
+ struct drm_gem_object *objs[] __counted_by(total);
};
struct virtio_gpu_vbuffer;
--
2.34.1
[Intel-gfx] [PATCH 4/9] drm/msm/dpu: Annotate struct dpu_hw_intr with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct dpu_hw_intr.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Rob Clark
Cc: Abhinav Kumar
Cc: Dmitry Baryshkov
Cc: Sean Paul
Cc: Marijn Suijten
Cc: David Airlie
Cc: Daniel Vetter
Cc: Bjorn Andersson
Cc: linux-arm-...@vger.kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: freedr...@lists.freedesktop.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index dab761e54863..50cf9523d367 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -61,7 +61,7 @@ struct dpu_hw_intr {
void (*cb)(void *arg, int irq_idx);
void *arg;
atomic_t count;
- } irq_tbl[];
+ } irq_tbl[] __counted_by(total_irqs);
};
/**
--
2.34.1
[Intel-gfx] [PATCH 5/9] drm/nouveau/pm: Annotate struct nvkm_perfdom with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct nvkm_perfdom.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Ben Skeggs
Cc: Karol Herbst
Cc: Lyude Paul
Cc: David Airlie
Cc: Daniel Vetter
Cc: dri-de...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
b/drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
index 6ae25d3e7f45..c011227f7052 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
@@ -82,7 +82,7 @@ struct nvkm_perfdom {
u8 mode;
u32 clk;
u16 signal_nr;
- struct nvkm_perfsig signal[];
+ struct nvkm_perfsig signal[] __counted_by(signal_nr);
};
struct nvkm_funcdom {
--
2.34.1
[Intel-gfx] [PATCH 8/9] drm/vmwgfx: Annotate struct vmw_surface_dirty with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct vmw_surface_dirty.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Zack Rusin
Cc: VMware Graphics Reviewers
Cc: David Airlie
Cc: Daniel Vetter
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index 5db403ee8261..2d1d857f99ae 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -77,7 +77,7 @@ struct vmw_surface_offset {
struct vmw_surface_dirty {
struct vmw_surface_cache cache;
u32 num_subres;
- SVGA3dBox boxes[];
+ SVGA3dBox boxes[] __counted_by(num_subres);
};
static void vmw_user_surface_free(struct vmw_resource *res);
--
2.34.1
[Intel-gfx] [PATCH 1/9] drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct
smu10_voltage_dependency_table.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Evan Quan
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Xiaojian Du
Cc: Huang Rui
Cc: Kevin Wang
Cc: amd-...@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
index 808e0ecbe1f0..42adc2a3dcbc 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
@@ -192,7 +192,7 @@ struct smu10_clock_voltage_dependency_record {
struct smu10_voltage_dependency_table {
uint32_t count;
- struct smu10_clock_voltage_dependency_record entries[];
+ struct smu10_clock_voltage_dependency_record entries[]
__counted_by(count);
};
struct smu10_clock_voltage_information {
--
2.34.1
[Intel-gfx] [PATCH 3/9] drm/i915/selftests: Annotate struct perf_series with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct perf_series.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: John Harrison
Cc: Andi Shyti
Cc: Matthew Brost
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c
b/drivers/gpu/drm/i915/selftests/i915_request.c
index a9b79888c193..acae30a04a94 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -1924,7 +1924,7 @@ struct perf_stats {
struct perf_series {
struct drm_i915_private *i915;
unsigned int nengines;
- struct intel_context *ce[];
+ struct intel_context *ce[] __counted_by(nengines);
};
static int cmp_u32(const void *A, const void *B)
--
2.34.1
[Intel-gfx] [PATCH 2/9] drm/amdgpu/discovery: Annotate struct ip_hw_instance with __counted_by
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct ip_hw_instance.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Hawking Zhang
Cc: amd-...@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index d1bc7b212520..be4c97a3d7bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -662,7 +662,7 @@ struct ip_hw_instance {
u8 harvest;
int num_base_addresses;
- u32 base_addr[];
+ u32 base_addr[] __counted_by(num_base_addresses);
};
struct ip_hw_id {
--
2.34.1
[Intel-gfx] [PATCH 0/9] drm: Annotate structs with __counted_by
Hi, This is a batch of patches touching drm for preparing for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by to structs that would benefit from the annotation. Since the element count member must be set before accessing the annotated flexible array member, some patches also move the member's initialization earlier. (These are noted in the individual patches.) -Kees [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci Kees Cook (9): drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by drm/amdgpu/discovery: Annotate struct ip_hw_instance with __counted_by drm/i915/selftests: Annotate struct perf_series with __counted_by drm/msm/dpu: Annotate struct dpu_hw_intr with __counted_by drm/nouveau/pm: Annotate struct nvkm_perfdom with __counted_by drm/vc4: Annotate struct vc4_perfmon with __counted_by drm/virtio: Annotate struct virtio_gpu_object_array with __counted_by drm/vmwgfx: Annotate struct vmw_surface_dirty with __counted_by drm/v3d: Annotate struct v3d_perfmon with __counted_by drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c| 2 +- drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h | 2 +- drivers/gpu/drm/i915/selftests/i915_request.c| 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h| 2 +- drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h| 2 +- drivers/gpu/drm/v3d/v3d_drv.h| 2 +- drivers/gpu/drm/vc4/vc4_drv.h| 2 +- drivers/gpu/drm/virtio/virtgpu_drv.h | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) -- 2.34.1
Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/guc: Flush context destruction worker at suspend
On Thu, 2023-09-14 at 11:35 -0400, Vivi, Rodrigo wrote: > On Sat, Sep 09, 2023 at 08:58:44PM -0700, Alan Previn wrote: > > When suspending, flush the context-guc-id > > deregistration worker at the final stages of > > intel_gt_suspend_late when we finally call gt_sanitize > > that eventually leads down to __uc_sanitize so that > > the deregistration worker doesn't fire off later as > > we reset the GuC microcontroller. > > > > Signed-off-by: Alan Previn > > Tested-by: Mousumi Jana > > Reviewed-by: Rodrigo Vivi alan:snip alan: thanks for the RB Rodrigo.
Re: [Intel-gfx] [PATCH v5] drm/i915: Add Wa_18028616096
On Fri, Sep 22, 2023 at 09:23:56PM +0530, Shekhar Chauhan wrote:
> Drop UGM per set fragment threshold to 3
>
> BSpec: 54833
> Signed-off-by: Shekhar Chauhan
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index a00ff51c681d..431c575c532b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> @@ -1230,6 +1230,7 @@
> #define DISABLE_D8_D16_COASLESCE REG_BIT(30)
> #define FORCE_1_SUB_MESSAGE_PER_FRAGMENT REG_BIT(15)
> #define LSC_CHICKEN_BIT_0_UDWMCR_REG(0xe7c8 + 4)
> +#define UGM_FRAGMENT_THRESHOLD_TO_3REG_BIT(58 - 32)
> #define DIS_CHAIN_2XSIMD8 REG_BIT(55 - 32)
> #define FORCE_SLM_FENCE_SCOPE_TO_TILE REG_BIT(42 - 32)
> #define FORCE_UGM_FENCE_SCOPE_TO_TILE REG_BIT(41 - 32)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 660d4f358eab..df0fba2850b6 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2957,6 +2957,11 @@ general_render_compute_wa_init(struct intel_engine_cs
> *engine, struct i915_wa_li
> wa_mcr_masked_en(wal, GEN8_HALF_SLICE_CHICKEN1,
>GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE);
> }
> +
> + if (IS_DG2_G10(i915) || IS_DG2_G12(i915)) {
> + /* Wa_18028616096 */
> + wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0_UDW,
> UGM_FRAGMENT_THRESHOLD_TO_3);
> + }
It might be best to move this block above the xehpsdv block (to keep the
function roughly ordered by "newest platforms first"). But we can do
that while applying the patch; no need to send another version.
Reviewed-by: Matt Roper
> }
>
> static void
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
Re: [Intel-gfx] [7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp
Hi,
On 2023/9/13 14:06, Mitul Golani wrote:
From: Swati Sharma
DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show
to depict sink's precision.
Also, new debugfs entry is created to enforce fractional bpp.
If Force_DSC_Fractional_BPP_en is set then while iterating over
output bpp with fractional step size we will continue if output_bpp is
computed as integer. With this approach, we will be able to validate
DSC with fractional bpp.
v2:
Add drm_modeset_unlock to new line(Suraj)
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
Signed-off-by: Mitul Golani
Reviewed-by: Suraj Kandpal
---
.../drm/i915/display/intel_display_debugfs.c | 83 +++
.../drm/i915/display/intel_display_types.h| 1 +
2 files changed, 84 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index f05b52381a83..776ab96def1f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1244,6 +1244,8 @@ static int i915_dsc_fec_support_show(struct seq_file *m,
void *data)
DP_DSC_YCbCr420_Native)),
str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
DP_DSC_YCbCr444)));
+ seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
+ drm_dp_dsc_sink_bpp_incr(intel_dp->dsc_dpcd));
seq_printf(m, "Force_DSC_Enable: %s\n",
str_yes_no(intel_dp->force_dsc_en));
if (!intel_dp_is_edp(intel_dp))
@@ -1436,6 +1438,84 @@ static const struct file_operations
i915_dsc_output_format_fops = {
.write = i915_dsc_output_format_write
};
+static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
+{
+ struct drm_connector *connector = m->private;
+ struct drm_device *dev = connector->dev;
+ struct drm_crtc *crtc;
+ struct intel_dp *intel_dp;
+ struct intel_encoder *encoder =
intel_attached_encoder(to_intel_connector(connector));
The 'to_intel_connector()' inline function get used twice in this function,
if it were me, I will cache it with a local variable to prevent over long in
horizontal.
struct intel_connector *intel_connector = to_intel_connector(connector);
struct intel_encoder *encoder = intel_attached_encoder(intel_connector);
+ int ret;
+
+ if (!encoder)
+ return -ENODEV;
+
+ ret =
drm_modeset_lock_single_interruptible(>mode_config.connection_mutex);
+ if (ret)
+ return ret;
+
+ crtc = connector->state->crtc;
+ if (connector->status != connector_status_connected || !crtc) {
+ ret = -ENODEV;
+ goto out;
+ }
+
+ intel_dp = intel_attached_dp(to_intel_connector(connector));
intel_dp = intel_attached_dp(intel_connector);
But this patch is OK, I just give a suggestion.
Re: [Intel-gfx] [2/8] drm/i915/display: Store compressed bpp in U6.4 format
Hi,
On 2023/9/13 14:06, Mitul Golani wrote:
From: Ankit Nautiyal
DSC parameter bits_per_pixel is stored in U6.4 format.
The 4 bits represent the fractional part of the bpp.
Currently we use compressed_bpp member of dsc structure to store
only the integral part of the bits_per_pixel.
To store the full bits_per_pixel along with the fractional part,
compressed_bpp is changed to store bpp in U6.4 formats. Intergral
part is retrieved by simply right shifting the member compressed_bpp by 4.
v2:
-Use to_bpp_int, to_bpp_frac_dec, to_bpp_x16 helpers while dealing
with compressed bpp. (Suraj)
-Fix comment styling. (Suraj)
v3:
-Add separate file for 6.4 fixed point helper(Jani, Nikula)
-Add comment for magic values(Suraj)
v4:
-Fix checkpatch caused due to renaming(Suraj)
In this statement, is the 'caused' and the 'due to' duplicated here.
Fix checkpatch warnings due to renaming(Suraj)
Or
Fix checkpatch warnings caused by renaming(Suraj)
Or
Fix checkpatch warnings created due to renaming(Suraj)
Signed-off-by: Ankit Nautiyal
Signed-off-by: Mitul Golani
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/icl_dsi.c| 11 +++---
drivers/gpu/drm/i915/display/intel_audio.c| 3 +-
drivers/gpu/drm/i915/display/intel_bios.c | 6 ++--
drivers/gpu/drm/i915/display/intel_cdclk.c| 6 ++--
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gpu/drm/i915/display/intel_dp.c | 33 ++---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 26 --
.../i915/display/intel_fractional_helper.h| 36 +++
drivers/gpu/drm/i915/display/intel_vdsc.c | 5 +--
10 files changed, 93 insertions(+), 38 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_fractional_helper.h
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index ad6488e9c2b2..0f7594b6aa1f 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -43,6 +43,7 @@
#include "intel_de.h"
#include "intel_dsi.h"
#include "intel_dsi_vbt.h"
+#include "intel_fractional_helper.h"
#include "intel_panel.h"
#include "intel_vdsc.h"
#include "intel_vdsc_regs.h"
@@ -330,7 +331,7 @@ static int afe_clk(struct intel_encoder *encoder,
int bpp;
if (crtc_state->dsc.compression_enable)
- bpp = crtc_state->dsc.compressed_bpp;
+ bpp =
intel_fractional_bpp_from_x16(crtc_state->dsc.compressed_bpp_x16);
else
bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
@@ -860,7 +861,7 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder,
* compressed and non-compressed bpp.
*/
if (crtc_state->dsc.compression_enable) {
- mul = crtc_state->dsc.compressed_bpp;
+ mul =
intel_fractional_bpp_from_x16(crtc_state->dsc.compressed_bpp_x16);
div = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
}
@@ -884,7 +885,7 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder,
int bpp, line_time_us, byte_clk_period_ns;
if (crtc_state->dsc.compression_enable)
- bpp = crtc_state->dsc.compressed_bpp;
+ bpp =
intel_fractional_bpp_from_x16(crtc_state->dsc.compressed_bpp_x16);
else
bpp =
mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
@@ -1451,8 +1452,8 @@ static void gen11_dsi_get_timings(struct intel_encoder *encoder,
struct drm_display_mode *adjusted_mode =
_config->hw.adjusted_mode;
- if (pipe_config->dsc.compressed_bpp) {
- int div = pipe_config->dsc.compressed_bpp;
+ if (pipe_config->dsc.compressed_bpp_x16) {
+ int div =
intel_fractional_bpp_from_x16(pipe_config->dsc.compressed_bpp_x16);
int mul = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
adjusted_mode->crtc_htotal =
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
b/drivers/gpu/drm/i915/display/intel_audio.c
index 19605264a35c..4f1db1581316 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -35,6 +35,7 @@
#include "intel_crtc.h"
#include "intel_de.h"
#include "intel_display_types.h"
+#include "intel_fractional_helper.h"
#include "intel_lpe_audio.h"
/**
@@ -528,7 +529,7 @@ static unsigned int calc_hblank_early_prog(struct
intel_encoder *encoder,
h_active = crtc_state->hw.adjusted_mode.crtc_hdisplay;
h_total = crtc_state->hw.adjusted_mode.crtc_htotal;
pixel_clk = crtc_state->hw.adjusted_mode.crtc_clock;
- vdsc_bpp = crtc_state->dsc.compressed_bpp;
+ vdsc_bpp =
intel_fractional_bpp_from_x16(crtc_state->dsc.compressed_bpp_x16);
cdclk =
[Intel-gfx] [PATCH v5] drm/i915: Add Wa_18028616096
Drop UGM per set fragment threshold to 3
BSpec: 54833
Signed-off-by: Shekhar Chauhan
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index a00ff51c681d..431c575c532b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1230,6 +1230,7 @@
#define DISABLE_D8_D16_COASLESCE REG_BIT(30)
#define FORCE_1_SUB_MESSAGE_PER_FRAGMENT REG_BIT(15)
#define LSC_CHICKEN_BIT_0_UDW MCR_REG(0xe7c8 + 4)
+#define UGM_FRAGMENT_THRESHOLD_TO_3 REG_BIT(58 - 32)
#define DIS_CHAIN_2XSIMD8REG_BIT(55 - 32)
#define FORCE_SLM_FENCE_SCOPE_TO_TILEREG_BIT(42 - 32)
#define FORCE_UGM_FENCE_SCOPE_TO_TILEREG_BIT(41 - 32)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 660d4f358eab..df0fba2850b6 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2957,6 +2957,11 @@ general_render_compute_wa_init(struct intel_engine_cs
*engine, struct i915_wa_li
wa_mcr_masked_en(wal, GEN8_HALF_SLICE_CHICKEN1,
GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE);
}
+
+ if (IS_DG2_G10(i915) || IS_DG2_G12(i915)) {
+ /* Wa_18028616096 */
+ wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0_UDW,
UGM_FRAGMENT_THRESHOLD_TO_3);
+ }
}
static void
--
2.34.1
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Convert fbdev to DRM client (rev2)
Hi Jani Am 21.09.23 um 16:24 schrieb Jani Nikula: On Wed, 13 Sep 2023, Patchwork wrote: == Series Details == Series: drm/i915: Convert fbdev to DRM client (rev2) URL : https://patchwork.freedesktop.org/series/115714/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13627 -> Patchwork_115714v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_115714v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_115714v2, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/index.html Participating hosts (42 -> 40) -- Missing(2): fi-kbl-soraka fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_115714v2: ### IGT changes ### Possible regressions * igt@gem_lmem_swapping@basic: - bat-dg1-5: NOTRUN -> [FAIL][1] +3 other tests fail [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/bat-dg1-5/igt@gem_lmem_swapp...@basic.html - bat-dg2-11: NOTRUN -> [FAIL][2] +5 other tests fail [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/bat-dg2-11/igt@gem_lmem_swapp...@basic.html I haven't had time to look into it, but looks like this blocks module unload across the board. I think I've found it. The DRM client code takes a reference on the module. Fixing that makes the tests work for me. Thanks for pointing me in the right direction. Best regards Thomas BR, Jani. * igt@i915_module_load@load: - bat-atsm-1: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/bat-atsm-1/igt@i915_module_l...@load.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/bat-atsm-1/igt@i915_module_l...@load.html * igt@i915_module_load@reload: - bat-mtlp-6: NOTRUN -> [WARN][5] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/bat-mtlp-6/igt@i915_module_l...@reload.html - fi-skl-6600u: [PASS][6] -> [WARN][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/fi-skl-6600u/igt@i915_module_l...@reload.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/fi-skl-6600u/igt@i915_module_l...@reload.html - fi-apl-guc: [PASS][8] -> [WARN][9] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/fi-apl-guc/igt@i915_module_l...@reload.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/fi-apl-guc/igt@i915_module_l...@reload.html - bat-dg1-5: [PASS][10] -> [WARN][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/bat-dg1-5/igt@i915_module_l...@reload.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/bat-dg1-5/igt@i915_module_l...@reload.html - fi-pnv-d510:[PASS][12] -> [WARN][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/fi-pnv-d510/igt@i915_module_l...@reload.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/fi-pnv-d510/igt@i915_module_l...@reload.html - fi-glk-j4005: [PASS][14] -> [WARN][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/fi-glk-j4005/igt@i915_module_l...@reload.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/fi-glk-j4005/igt@i915_module_l...@reload.html - bat-adlp-9: [PASS][16] -> [WARN][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/bat-adlp-9/igt@i915_module_l...@reload.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/bat-adlp-9/igt@i915_module_l...@reload.html - fi-skl-guc: [PASS][18] -> [WARN][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/fi-skl-guc/igt@i915_module_l...@reload.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/fi-skl-guc/igt@i915_module_l...@reload.html - bat-dg2-11: [PASS][20] -> [WARN][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/bat-dg2-11/igt@i915_module_l...@reload.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/bat-dg2-11/igt@i915_module_l...@reload.html - fi-cfl-8700k: [PASS][22] -> [WARN][23] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13627/fi-cfl-8700k/igt@i915_module_l...@reload.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v2/fi-cfl-8700k/igt@i915_module_l...@reload.html - fi-bsw-nick:[PASS][24] -> [WARN][25] [24]:
Re: [Intel-gfx] [3/8] drm/i915/display: Consider fractional vdsc bpp while computing m_n values
Hi,
On 2023/9/13 14:06, Mitul Golani wrote:
From: Ankit Nautiyal
MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate this precision while computing m_n values.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +-
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 5 +++--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 --
drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
5 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index afcbdd4f105a..b37aeac961f4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2380,10 +2380,14 @@ void
intel_link_compute_m_n(u16 bits_per_pixel, int nlanes,
int pixel_clock, int link_clock,
struct intel_link_m_n *m_n,
- bool fec_enable)
+ bool fec_enable,
+ bool is_dsc_fractional_bpp)
{
u32 data_clock = bits_per_pixel * pixel_clock;
+ if (is_dsc_fractional_bpp)
+ data_clock = DIV_ROUND_UP(bits_per_pixel * pixel_clock, 16);
+
The 'bits_per_pixel * pixel_clock' has already been computed
and its result is stored in the 'data_clock' local variable.
can we change it as "data_clock = DIV_ROUND_UP(data_clock, 16)" here ?
if (fec_enable)
data_clock = intel_dp_mode_to_fec_clock(data_clock);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 49ac8473b988..a4c4ca3cad65 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -398,7 +398,7 @@ u8 intel_calc_active_pipes(struct intel_atomic_state *state,
void intel_link_compute_m_n(u16 bpp, int nlanes,
int pixel_clock, int link_clock,
struct intel_link_m_n *m_n,
- bool fec_enable);
+ bool fec_enable, bool is_dsc_fractional_bpp);
u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
u32 pixel_format, u64 modifier);
enum drm_mode_status
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index cb647bb38b12..6e09e21909a1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2562,7 +2562,7 @@ intel_dp_drrs_compute_config(struct intel_connector
*connector,
intel_link_compute_m_n(link_bpp, pipe_config->lane_count, pixel_clock,
pipe_config->port_clock, _config->dp_m2_n2,
- pipe_config->fec_enable);
+ pipe_config->fec_enable, false);
/* FIXME: abstract this better */
if (pipe_config->splitter.enable)
@@ -2741,7 +2741,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
adjusted_mode->crtc_clock,
pipe_config->port_clock,
_config->dp_m_n,
- pipe_config->fec_enable);
+ pipe_config->fec_enable,
+ pipe_config->dsc.compression_enable);
/* FIXME: abstract this better */
if (pipe_config->splitter.enable)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 7bf0b6e4ac0b..8f6bd54532cb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -172,7 +172,8 @@ static int intel_dp_mst_compute_link_config(struct
intel_encoder *encoder,
adjusted_mode->crtc_clock,
crtc_state->port_clock,
_state->dp_m_n,
- crtc_state->fec_enable);
+ crtc_state->fec_enable,
+ false);
crtc_state->dp_m_n.tu = slots;
return 0;
@@ -269,7 +270,8 @@ static int intel_dp_dsc_mst_compute_link_config(struct
intel_encoder *encoder,
adjusted_mode->crtc_clock,
crtc_state->port_clock,
_state->dp_m_n,
- crtc_state->fec_enable);
+ crtc_state->fec_enable,
+ crtc_state->dsc.compression_enable);
crtc_state->dp_m_n.tu = slots;
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c
b/drivers/gpu/drm/i915/display/intel_fdi.c
index e12b46a84fa1..15fddabf7c2e 100644
---
[Intel-gfx] ✗ Fi.CI.IGT: failure for Test MTL DMC v2.16 (rev4)
== Series Details == Series: Test MTL DMC v2.16 (rev4) URL : https://patchwork.freedesktop.org/series/122986/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13666_full -> Patchwork_122986v4_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_122986v4_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_122986v4_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_122986v4_full: ### IGT changes ### Possible regressions * igt@gem_exec_suspend@basic-s0@smem: - shard-dg2: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13666/shard-dg2-2/igt@gem_exec_suspend@basic...@smem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-dg2-3/igt@gem_exec_suspend@basic...@smem.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-d-hdmi-a-3: - shard-dg2: NOTRUN -> [INCOMPLETE][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-dg2-5/igt@kms_pipe_crc_basic@suspend-read-...@pipe-d-hdmi-a-3.html Warnings * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180: - shard-rkl: [INCOMPLETE][4] ([i915#8875]) -> [INCOMPLETE][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13666/shard-rkl-2/igt@kms_rotation_...@primary-y-tiled-reflect-x-180.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-rkl-2/igt@kms_rotation_...@primary-y-tiled-reflect-x-180.html Known issues Here are the changes found in Patchwork_122986v4_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@object-noreloc-keep-cache-simple: - shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271]) +227 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-snb7/igt@api_intel...@object-noreloc-keep-cache-simple.html * igt@device_reset@cold-reset-bound: - shard-dg2: NOTRUN -> [SKIP][7] ([i915#7701]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-dg2-11/igt@device_re...@cold-reset-bound.html * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0: - shard-dg2: [PASS][8] -> [INCOMPLETE][9] ([i915#7297]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13666/shard-dg2-1/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-smem-lmem0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-dg2-1/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-smem-lmem0.html * igt@gem_ctx_persistence@legacy-engines-cleanup: - shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-snb1/igt@gem_ctx_persiste...@legacy-engines-cleanup.html * igt@gem_eio@in-flight-suspend: - shard-dg2: [PASS][11] -> [INCOMPLETE][12] ([i915#7892]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13666/shard-dg2-11/igt@gem_...@in-flight-suspend.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-dg2-5/igt@gem_...@in-flight-suspend.html * igt@gem_eio@kms: - shard-dg1: [PASS][13] -> [FAIL][14] ([i915#5784]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13666/shard-dg1-14/igt@gem_...@kms.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-dg1-15/igt@gem_...@kms.html * igt@gem_eio@reset-stress: - shard-snb: NOTRUN -> [FAIL][15] ([i915#8898]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-snb7/igt@gem_...@reset-stress.html * igt@gem_exec_capture@capture-invisible@smem0: - shard-glk: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#6334]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-glk9/igt@gem_exec_capture@capture-invisi...@smem0.html * igt@gem_exec_flush@basic-batch-kernel-default-wb: - shard-mtlp: [PASS][17] -> [DMESG-FAIL][18] ([i915#8962]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13666/shard-mtlp-5/igt@gem_exec_fl...@basic-batch-kernel-default-wb.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122986v4/shard-mtlp-4/igt@gem_exec_fl...@basic-batch-kernel-default-wb.html * igt@gem_exec_flush@basic-wb-rw-before-default: - shard-dg2: NOTRUN -> [SKIP][19] ([i915#3539] / [i915#4852]) +1 other test skip [19]:
Re: [Intel-gfx] [PATCH] drm/i915/cx0: prefer forward declarations over includes
> -Original Message- > From: Nikula, Jani > Sent: Thursday, September 21, 2023 9:23 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Sripada, Radhakrishna > > Subject: [PATCH] drm/i915/cx0: prefer forward declarations over includes > > Avoid including the world from headers when forward declarations > suffice. > > Cc: Radhakrishna Sripada LGTM, Reviewed-by: Radhakrishna Sripada > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.h | 14 -- > 1 file changed, 8 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h > b/drivers/gpu/drm/i915/display/intel_cx0_phy.h > index 4c4db5cdcbd0..912e0eeb0be3 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h > @@ -10,14 +10,15 @@ > #include > #include > > -#include "i915_drv.h" > -#include "intel_display_types.h" > - > -struct drm_i915_private; > -struct intel_encoder; > -struct intel_crtc_state; > enum icl_port_dpll_id; > enum phy; > +struct drm_i915_private; > +struct intel_atomic_state; > +struct intel_c10pll_state; > +struct intel_c20pll_state; > +struct intel_crtc_state; > +struct intel_encoder; > +struct intel_hdmi; > > bool intel_is_c10phy(struct drm_i915_private *dev_priv, enum phy phy); > void intel_mtl_pll_enable(struct intel_encoder *encoder, > @@ -44,4 +45,5 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder > *encoder, >const struct intel_crtc_state *crtc_state); > int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock); > int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder); > + > #endif /* __INTEL_CX0_PHY_H__ */ > -- > 2.39.2
Re: [Intel-gfx] [1/8] drm/display/dp: Add helper function to get DSC bpp prescision
Hi,
The word 'prescision' in the commit title is a typo,
perhaps it's more better correct it as 'precision' when merge.
On 2023/9/13 14:05, Mitul Golani wrote:
From: Ankit Nautiyal
Add helper to get the DSC bits_per_pixel precision for the DP sink.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/display/drm_dp_helper.c | 27 +
include/drm/display/drm_dp_helper.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b/drivers/gpu/drm/display/drm_dp_helper.c
index 8a1b64c57dfd..5c23d5b8fc50 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct
drm_dp_desc *desc,
}
EXPORT_SYMBOL(drm_dp_read_desc);
+/**
+ * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment
+ * @dsc_dpcd: DSC capabilities from DPCD
+ *
+ * Returns the bpp precision supported by the DP sink.
+ */
+u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+ u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC -
DP_DSC_SUPPORT];
+
+ switch (bpp_increment_dpcd) {
+ case DP_DSC_BITS_PER_PIXEL_1_16:
+ return 16;
+ case DP_DSC_BITS_PER_PIXEL_1_8:
+ return 8;
+ case DP_DSC_BITS_PER_PIXEL_1_4:
+ return 4;
+ case DP_DSC_BITS_PER_PIXEL_1_2:
+ return 2;
+ case DP_DSC_BITS_PER_PIXEL_1_1:
+ return 1;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr);
+
/**
* drm_dp_dsc_sink_max_slice_count() - Get the max slice count
* supported by the DSC sink.
diff --git a/include/drm/display/drm_dp_helper.h
b/include/drm/display/drm_dp_helper.h
index 3369104e2d25..6968d4d87931 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
}
/* DP/eDP DSC support */
+u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
u8 drm_dp_dsc_sink_max_slice_count(const u8
dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
bool is_edp);
u8 drm_dp_dsc_sink_line_buf_depth(const u8
dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
[Intel-gfx] ✗ Fi.CI.BAT: failure for Test MTL DMC v2.17 (rev2)
== Series Details == Series: Test MTL DMC v2.17 (rev2) URL : https://patchwork.freedesktop.org/series/124083/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13669 -> Patchwork_124083v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124083v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124083v2, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/index.html Participating hosts (39 -> 39) -- Additional (1): fi-kbl-soraka Missing(1): fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124083v2: ### IGT changes ### Possible regressions * igt@i915_selftest@live@requests: - bat-mtlp-6: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13669/bat-mtlp-6/igt@i915_selftest@l...@requests.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-6/igt@i915_selftest@l...@requests.html Known issues Here are the changes found in Patchwork_124083v2 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#9318]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html * igt@gem_exec_suspend@basic-s0@lmem0: - bat-dg2-9: [PASS][4] -> [INCOMPLETE][5] ([i915#9275]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13669/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html * igt@gem_exec_suspend@basic-s0@smem: - bat-mtlp-8: NOTRUN -> [ABORT][6] ([i915#9262]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@gem_exec_suspend@basic...@smem.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4083]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4077]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4079]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#6621]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][14] ([i915#1886] / [i915#7913]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_suspend@basic-s3-without-i915: - bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#6645]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#5190]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][17] ([i915#4212]) +8 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124083v2/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][18] ([i915#4213]) +1 other test skip [18]:
[Intel-gfx] [PATCH 6/6] drm/i915: Implement fdinfo memory stats printing
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we walk the per memory regions object lists
and accumulate object size into the respective drm_memory_stats
categories.
v2:
* Only account against the active region.
* Use DMA_RESV_USAGE_BOOKKEEP when testing for active. (Tejas)
v3:
* Update commit text. (Aravind)
* Update to use memory regions uabi names.
Signed-off-by: Tvrtko Ursulin
Cc: Aravind Iddamsetty
Cc: Rob Clark
Cc: Andi Shyti
Cc: Tejas Upadhyay
Reviewed-by: Andi Shyti # v1
Reviewed-by: Aravind Iddamsetty # v2
---
drivers/gpu/drm/i915/i915_drm_client.c | 64 ++
1 file changed, 64 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index a61356012df8..7efffdaa508d 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -45,6 +45,68 @@ void __i915_drm_client_free(struct kref *kref)
}
#ifdef CONFIG_PROC_FS
+static void
+obj_meminfo(struct drm_i915_gem_object *obj,
+ struct drm_memory_stats stats[INTEL_REGION_UNKNOWN])
+{
+ const enum intel_region_id id = obj->mm.region ?
+ obj->mm.region->id : INTEL_REGION_SMEM;
+ const u64 sz = obj->base.size;
+
+ if (obj->base.handle_count > 1)
+ stats[id].shared += sz;
+ else
+ stats[id].private += sz;
+
+ if (i915_gem_object_has_pages(obj)) {
+ stats[id].resident += sz;
+
+ if (!dma_resv_test_signaled(obj->base.resv,
+ DMA_RESV_USAGE_BOOKKEEP))
+ stats[id].active += sz;
+ else if (i915_gem_object_is_shrinkable(obj) &&
+obj->mm.madv == I915_MADV_DONTNEED)
+ stats[id].purgeable += sz;
+ }
+}
+
+static void show_meminfo(struct drm_printer *p, struct drm_file *file)
+{
+ struct drm_memory_stats stats[INTEL_REGION_UNKNOWN] = {};
+ struct drm_i915_file_private *fpriv = file->driver_priv;
+ struct i915_drm_client *client = fpriv->client;
+ struct drm_i915_private *i915 = fpriv->i915;
+ struct drm_i915_gem_object *obj;
+ struct intel_memory_region *mr;
+ struct list_head *pos;
+ unsigned int id;
+
+ /* Public objects. */
+ spin_lock(>table_lock);
+ idr_for_each_entry(>object_idr, obj, id)
+ obj_meminfo(obj, stats);
+ spin_unlock(>table_lock);
+
+ /* Internal objects. */
+ rcu_read_lock();
+ list_for_each_rcu(pos, >objects_list) {
+ obj = i915_gem_object_get_rcu(list_entry(pos, typeof(*obj),
+client_link));
+ if (!obj)
+ continue;
+ obj_meminfo(obj, stats);
+ i915_gem_object_put(obj);
+ }
+ rcu_read_unlock();
+
+ for_each_memory_region(mr, i915, id)
+ drm_print_memory_stats(p,
+ [id],
+ DRM_GEM_OBJECT_RESIDENT |
+ DRM_GEM_OBJECT_PURGEABLE,
+ mr->uabi_name);
+}
+
static const char * const uabi_class_names[] = {
[I915_ENGINE_CLASS_RENDER] = "render",
[I915_ENGINE_CLASS_COPY] = "copy",
@@ -106,6 +168,8 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct
drm_file *file)
* **
*/
+ show_meminfo(p, file);
+
if (GRAPHICS_VER(i915) < 8)
return;
--
2.39.2
[Intel-gfx] [PATCH 5/6] drm/i915: Add stable memory region names
From: Tvrtko Ursulin
At the moment memory region names are a bit too varied and too
inconsistent to be used for ABI purposes, like for upcoming fdinfo
memory stats.
System memory can be either system or system-ttm. Local memory has the
instance number appended, others do not. Not only incosistent but thi
kind of implementation detail is uninteresting for intended users of
fdinfo memory stats.
Add a stable name always formed as $type$instance. Could have chosen a
different stable scheme, but I think any consistent and stable scheme
should do just fine.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_memory_region.c | 19 +++
drivers/gpu/drm/i915/intel_memory_region.h | 1 +
2 files changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_memory_region.c
b/drivers/gpu/drm/i915/intel_memory_region.c
index 3d1fdea9811d..60a03340bbd4 100644
--- a/drivers/gpu/drm/i915/intel_memory_region.c
+++ b/drivers/gpu/drm/i915/intel_memory_region.c
@@ -216,6 +216,22 @@ static int intel_memory_region_memtest(struct
intel_memory_region *mem,
return err;
}
+static const char *region_type_str(u16 type)
+{
+ switch (type) {
+ case INTEL_MEMORY_SYSTEM:
+ return "system";
+ case INTEL_MEMORY_LOCAL:
+ return "local";
+ case INTEL_MEMORY_STOLEN_LOCAL:
+ return "stolen-local";
+ case INTEL_MEMORY_STOLEN_SYSTEM:
+ return "stolen-system";
+ default:
+ return "unknown";
+ }
+}
+
struct intel_memory_region *
intel_memory_region_create(struct drm_i915_private *i915,
resource_size_t start,
@@ -244,6 +260,9 @@ intel_memory_region_create(struct drm_i915_private *i915,
mem->type = type;
mem->instance = instance;
+ snprintf(mem->uabi_name, sizeof(mem->uabi_name), "%s%u",
+region_type_str(type), instance);
+
mutex_init(>objects.lock);
INIT_LIST_HEAD(>objects.list);
diff --git a/drivers/gpu/drm/i915/intel_memory_region.h
b/drivers/gpu/drm/i915/intel_memory_region.h
index 2953ed5c3248..9ba36454e51b 100644
--- a/drivers/gpu/drm/i915/intel_memory_region.h
+++ b/drivers/gpu/drm/i915/intel_memory_region.h
@@ -80,6 +80,7 @@ struct intel_memory_region {
u16 instance;
enum intel_region_id id;
char name[16];
+ char uabi_name[16];
bool private; /* not for userspace */
struct {
--
2.39.2
[Intel-gfx] [PATCH 3/6] drm/i915: Track page table backing store usage
From: Tvrtko Ursulin
Account page table backing store against the owning client memory usage
stats.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/intel_gtt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 13944a14ea2d..c3f2b379 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -58,6 +58,9 @@ struct drm_i915_gem_object *alloc_pt_lmem(struct
i915_address_space *vm, int sz)
if (!IS_ERR(obj)) {
obj->base.resv = i915_vm_resv_get(vm);
obj->shares_resv_from = vm;
+
+ if (vm->fpriv)
+ i915_drm_client_add_object(vm->fpriv->client, obj);
}
return obj;
@@ -79,6 +82,9 @@ struct drm_i915_gem_object *alloc_pt_dma(struct
i915_address_space *vm, int sz)
if (!IS_ERR(obj)) {
obj->base.resv = i915_vm_resv_get(vm);
obj->shares_resv_from = vm;
+
+ if (vm->fpriv)
+ i915_drm_client_add_object(vm->fpriv->client, obj);
}
return obj;
--
2.39.2
[Intel-gfx] [PATCH 1/6] drm/i915: Add ability for tracking buffer objects per client
From: Tvrtko Ursulin
In order to show per client memory usage lets add some infrastructure
which enables tracking buffer objects owned by clients.
We add a per client list protected by a new per client lock and to support
delayed destruction (post client exit) we make tracked objects hold
references to the owning client.
Also, object memory region teardown is moved to the existing RCU free
callback to allow safe dereference from the fdinfo RCU read section.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gem/i915_gem_object.c| 13 +--
.../gpu/drm/i915/gem/i915_gem_object_types.h | 12 +++
drivers/gpu/drm/i915/i915_drm_client.c| 36 +++
drivers/gpu/drm/i915/i915_drm_client.h| 32 +
4 files changed, 90 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index c26d87555825..25eeeb863209 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -106,6 +106,10 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
INIT_LIST_HEAD(>mm.link);
+#ifdef CONFIG_PROC_FS
+ INIT_LIST_HEAD(>client_link);
+#endif
+
INIT_LIST_HEAD(>lut_list);
spin_lock_init(>lut_lock);
@@ -293,6 +297,10 @@ void __i915_gem_free_object_rcu(struct rcu_head *head)
container_of(head, typeof(*obj), rcu);
struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ /* We need to keep this alive for RCU read access from fdinfo. */
+ if (obj->mm.n_placements > 1)
+ kfree(obj->mm.placements);
+
i915_gem_object_free(obj);
GEM_BUG_ON(!atomic_read(>mm.free_count));
@@ -389,9 +397,6 @@ void __i915_gem_free_object(struct drm_i915_gem_object *obj)
if (obj->ops->release)
obj->ops->release(obj);
- if (obj->mm.n_placements > 1)
- kfree(obj->mm.placements);
-
if (obj->shares_resv_from)
i915_vm_resv_put(obj->shares_resv_from);
@@ -442,6 +447,8 @@ static void i915_gem_free_object(struct drm_gem_object
*gem_obj)
GEM_BUG_ON(i915_gem_object_is_framebuffer(obj));
+ i915_drm_client_remove_object(obj);
+
/*
* Before we free the object, make sure any pure RCU-only
* read-side critical sections are complete, e.g.
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 2292404007c8..0c5cdab278b6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -302,6 +302,18 @@ struct drm_i915_gem_object {
*/
struct i915_address_space *shares_resv_from;
+#ifdef CONFIG_PROC_FS
+ /**
+* @client: @i915_drm_client which created the object
+*/
+ struct i915_drm_client *client;
+
+ /**
+* @client_link: Link into @i915_drm_client.objects_list
+*/
+ struct list_head client_link;
+#endif
+
union {
struct rcu_head rcu;
struct llist_node freed;
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index 2a44b3876cb5..2e5e69edc0f9 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -28,6 +28,10 @@ struct i915_drm_client *i915_drm_client_alloc(void)
kref_init(>kref);
spin_lock_init(>ctx_lock);
INIT_LIST_HEAD(>ctx_list);
+#ifdef CONFIG_PROC_FS
+ spin_lock_init(>objects_lock);
+ INIT_LIST_HEAD(>objects_list);
+#endif
return client;
}
@@ -108,4 +112,36 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct
drm_file *file)
for (i = 0; i < ARRAY_SIZE(uabi_class_names); i++)
show_client_class(p, i915, file_priv->client, i);
}
+
+void i915_drm_client_add_object(struct i915_drm_client *client,
+ struct drm_i915_gem_object *obj)
+{
+ unsigned long flags;
+
+ GEM_WARN_ON(obj->client);
+ GEM_WARN_ON(!list_empty(>client_link));
+
+ spin_lock_irqsave(>objects_lock, flags);
+ obj->client = i915_drm_client_get(client);
+ list_add_tail_rcu(>client_link, >objects_list);
+ spin_unlock_irqrestore(>objects_lock, flags);
+}
+
+bool i915_drm_client_remove_object(struct drm_i915_gem_object *obj)
+{
+ struct i915_drm_client *client = fetch_and_zero(>client);
+ unsigned long flags;
+
+ /* Object may not be associated with a client. */
+ if (!client)
+ return false;
+
+ spin_lock_irqsave(>objects_lock, flags);
+ list_del_rcu(>client_link);
+ spin_unlock_irqrestore(>objects_lock, flags);
+
+ i915_drm_client_put(client);
+
+ return true;
+}
#endif
diff --git a/drivers/gpu/drm/i915/i915_drm_client.h
[Intel-gfx] [PATCH 2/6] drm/i915: Record which client owns a VM
From: Tvrtko Ursulin
To enable accounting of indirect client memory usage (such as page tables)
in the following patch, lets start recording the creator of each PPGTT.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 11 ---
drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 3 +++
drivers/gpu/drm/i915/gem/selftests/mock_context.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 9a9ff84c90d7..35cf6608180e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -279,7 +279,8 @@ static int proto_context_set_protected(struct
drm_i915_private *i915,
}
static struct i915_gem_proto_context *
-proto_context_create(struct drm_i915_private *i915, unsigned int flags)
+proto_context_create(struct drm_i915_file_private *fpriv,
+struct drm_i915_private *i915, unsigned int flags)
{
struct i915_gem_proto_context *pc, *err;
@@ -287,6 +288,7 @@ proto_context_create(struct drm_i915_private *i915,
unsigned int flags)
if (!pc)
return ERR_PTR(-ENOMEM);
+ pc->fpriv = fpriv;
pc->num_user_engines = -1;
pc->user_engines = NULL;
pc->user_flags = BIT(UCONTEXT_BANNABLE) |
@@ -1621,6 +1623,7 @@ i915_gem_create_context(struct drm_i915_private *i915,
err = PTR_ERR(ppgtt);
goto err_ctx;
}
+ ppgtt->vm.fpriv = pc->fpriv;
vm = >vm;
}
if (vm)
@@ -1740,7 +1743,7 @@ int i915_gem_context_open(struct drm_i915_private *i915,
/* 0 reserved for invalid/unassigned ppgtt */
xa_init_flags(_priv->vm_xa, XA_FLAGS_ALLOC1);
- pc = proto_context_create(i915, 0);
+ pc = proto_context_create(file_priv, i915, 0);
if (IS_ERR(pc)) {
err = PTR_ERR(pc);
goto err;
@@ -1822,6 +1825,7 @@ int i915_gem_vm_create_ioctl(struct drm_device *dev, void
*data,
GEM_BUG_ON(id == 0); /* reserved for invalid/unassigned ppgtt */
args->vm_id = id;
+ ppgtt->vm.fpriv = file_priv;
return 0;
err_put:
@@ -2284,7 +2288,8 @@ int i915_gem_context_create_ioctl(struct drm_device *dev,
void *data,
return -EIO;
}
- ext_data.pc = proto_context_create(i915, args->flags);
+ ext_data.pc = proto_context_create(file->driver_priv, i915,
+ args->flags);
if (IS_ERR(ext_data.pc))
return PTR_ERR(ext_data.pc);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index cb78214a7dcd..c573c067779f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -188,6 +188,9 @@ struct i915_gem_proto_engine {
* CONTEXT_CREATE_SET_PARAM during GEM_CONTEXT_CREATE.
*/
struct i915_gem_proto_context {
+ /** @fpriv: Client which creates the context */
+ struct drm_i915_file_private *fpriv;
+
/** @vm: See _gem_context.vm */
struct i915_address_space *vm;
diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
index 8ac6726ec16b..125584ada282 100644
--- a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
@@ -83,7 +83,7 @@ live_context(struct drm_i915_private *i915, struct file *file)
int err;
u32 id;
- pc = proto_context_create(i915, 0);
+ pc = proto_context_create(fpriv, i915, 0);
if (IS_ERR(pc))
return ERR_CAST(pc);
@@ -152,7 +152,7 @@ kernel_context(struct drm_i915_private *i915,
struct i915_gem_context *ctx;
struct i915_gem_proto_context *pc;
- pc = proto_context_create(i915, 0);
+ pc = proto_context_create(NULL, i915, 0);
if (IS_ERR(pc))
return ERR_CAST(pc);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h
b/drivers/gpu/drm/i915/gt/intel_gtt.h
index 346ec8ec2edd..8cf62f5134a9 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -248,6 +248,7 @@ struct i915_address_space {
struct drm_mm mm;
struct intel_gt *gt;
struct drm_i915_private *i915;
+ struct drm_i915_file_private *fpriv;
struct device *dma;
u64 total; /* size addr space maps (ex. 2GB for ggtt) */
u64 reserved; /* size addr space reserved */
--
2.39.2
[Intel-gfx] [PATCH 4/6] drm/i915: Account ring buffer and context state storage
From: Tvrtko Ursulin
Account ring buffers and logical context space against the owning client
memory usage stats.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/gt/intel_context.c | 14 ++
drivers/gpu/drm/i915/i915_drm_client.c | 10 ++
drivers/gpu/drm/i915/i915_drm_client.h | 9 +
3 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index a53b26178f0a..a2f1245741bb 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -6,6 +6,7 @@
#include "gem/i915_gem_context.h"
#include "gem/i915_gem_pm.h"
+#include "i915_drm_client.h"
#include "i915_drv.h"
#include "i915_trace.h"
@@ -50,6 +51,7 @@ intel_context_create(struct intel_engine_cs *engine)
int intel_context_alloc_state(struct intel_context *ce)
{
+ struct i915_gem_context *ctx;
int err = 0;
if (mutex_lock_interruptible(>pin_mutex))
@@ -66,6 +68,18 @@ int intel_context_alloc_state(struct intel_context *ce)
goto unlock;
set_bit(CONTEXT_ALLOC_BIT, >flags);
+
+ rcu_read_lock();
+ ctx = rcu_dereference(ce->gem_context);
+ if (ctx && !kref_get_unless_zero(>ref))
+ ctx = NULL;
+ rcu_read_unlock();
+ if (ctx) {
+ if (ctx->client)
+ i915_drm_client_add_context_objects(ctx->client,
+ ce);
+ i915_gem_context_put(ctx);
+ }
}
unlock:
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index 2e5e69edc0f9..a61356012df8 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -144,4 +144,14 @@ bool i915_drm_client_remove_object(struct
drm_i915_gem_object *obj)
return true;
}
+
+void i915_drm_client_add_context_objects(struct i915_drm_client *client,
+struct intel_context *ce)
+{
+ if (ce->state)
+ i915_drm_client_add_object(client, ce->state->obj);
+
+ if (ce->ring != ce->engine->legacy.ring && ce->ring->vma)
+ i915_drm_client_add_object(client, ce->ring->vma->obj);
+}
#endif
diff --git a/drivers/gpu/drm/i915/i915_drm_client.h
b/drivers/gpu/drm/i915/i915_drm_client.h
index 5f58fdf7dcb8..69cedfcd3d69 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.h
+++ b/drivers/gpu/drm/i915/i915_drm_client.h
@@ -14,6 +14,7 @@
#include "i915_file_private.h"
#include "gem/i915_gem_object_types.h"
+#include "gt/intel_context_types.h"
#define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_COMPUTE
@@ -70,6 +71,8 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct
drm_file *file);
void i915_drm_client_add_object(struct i915_drm_client *client,
struct drm_i915_gem_object *obj);
bool i915_drm_client_remove_object(struct drm_i915_gem_object *obj);
+void i915_drm_client_add_context_objects(struct i915_drm_client *client,
+struct intel_context *ce);
#else
static inline void i915_drm_client_add_object(struct i915_drm_client *client,
struct drm_i915_gem_object *obj)
@@ -79,6 +82,12 @@ static inline void i915_drm_client_add_object(struct
i915_drm_client *client,
static inline bool i915_drm_client_remove_object(struct drm_i915_gem_object
*obj)
{
}
+
+static inline void
+i915_drm_client_add_context_objects(struct i915_drm_client *client,
+ struct intel_context *ce)
+{
+}
#endif
#endif /* !__I915_DRM_CLIENT_H__ */
--
2.39.2
[Intel-gfx] [PATCH v7 0/6] fdinfo memory stats
From: Tvrtko Ursulin A short series to enable fdinfo memory stats for i915. I added tracking of most classes of objects (user objects, page tables, context state, ring buffers) which contribute to client's memory footprint and am accouting their memory use along the similar lines as in Rob's msm code, just that with i915 specific code we can show a memory region breakdown and so support discrete and multi-tile GPUs properly. And also reflect that our objects can have multiple allowed backing stores. The existing helper Rob added is then used to dump the per memory region stats to fdinfo. The basic objects-per-client infrastructure can later be extended to cover all objects and so avoid needing to walk the IDR under the client's file table lock, which would further avoid distburbing the running clients by parallel fdinfo readers. Example fdinfo format: # cat /proc/1383/fdinfo/8 pos:0 flags: 0212 mnt_id: 21 ino:397 drm-driver: i915 drm-client-id: 18 drm-pdev: :00:02.0 drm-total-system: 125 MiB drm-shared-system: 16 MiB drm-active-system: 110 MiB drm-resident-system:125 MiB drm-purgeable-system: 2 MiB drm-total-stolen-system:0 drm-shared-stolen-system: 0 drm-active-stolen-system: 0 drm-resident-stolen-system: 0 drm-purgeable-stolen-system:0 drm-engine-render: 25662044495 ns drm-engine-copy:0 ns drm-engine-video: 0 ns drm-engine-video-enhance: 0 ns Example gputop output: DRM minor 0 PID SMEM SMEMRSS render copy videoNAME 1233 124M 124M |||||||| neverball 1130 59M 59M |█▌ ||||||| Xorg 1207 12M 12M |||||||| xfwm4 Or with Wayland: DRM minor 0 PID MEM RSSrendercopy videovideo-enhance NAME 2093 191M 191M |▊ || || || | gnome-shell DRM minor 128 PID MEM RSSrendercopy videovideo-enhance NAME 2551 71M 71M |██▉|| || || | neverball 2553 50M 50M | || || || | Xwayland Example intel_gpu_top output, aggregated mode: intel-gpu-top: Intel Dg1 (Gen12) @ /dev/dri/card1 - 21/ 577 MHz; 71% RC6 8 irqs/s ENGINES BUSY MI_SEMA MI_WAIT Render/3D2.80% |▉ | 0% 0% Blitter0.01% |▏ | 0% 0% Video0.00% | | 0% 0% VideoEnhance0.00% | | 0% 0% PID MEM RSS Render/3D BlitterVideoNAME 50783 109M 107M |▎ ||||||| neverball Region breakdown mode (needs more width for best experience): intel-gpu-top: Intel Dg1 (Gen12) @ /dev/dri/card1 - 18/ 555 MHz; 65% RC6 8 irqs/s ENGINES BUSY MI_SEMA MI_WAIT Render/3D2.52% |▉ | 0% 0% Blitter0.00% | | 0% 0% Video0.00% | | 0% 0% VideoEnhance0.00% | | 0% 0% PID RAM RSS VRAM VRSS Video NAME 50783 34M 32M 75M 75M |▏ || || || | neverball v2: * Now actually per client. v3: * Track imported dma-buf objects. v4: * Rely on DRM GEM handles for tracking user objects. * Fix internal object accounting (no placements). v5: * Fixed brain fart of overwriting the loop cursor. * Fixed object destruction racing with fdinfo reads. * Take reference to GEM context while using it. v6: * Rebase, cover letter update. v7: * New patch in series for making region names consistent and stable. Test-with: 20230922134437.234888-1-tvrtko.ursu...@linux.intel.com Tvrtko Ursulin (6): drm/i915: Add ability for tracking buffer objects per client drm/i915: Record which client owns a VM drm/i915: Track page table backing store usage drm/i915: Account ring buffer and context state storage drm/i915: Add stable memory region names drm/i915: Implement fdinfo memory stats printing drivers/gpu/drm/i915/gem/i915_gem_context.c | 11 +- .../gpu/drm/i915/gem/i915_gem_context_types.h | 3 + drivers/gpu/drm/i915/gem/i915_gem_object.c| 13 ++- .../gpu/drm/i915/gem/i915_gem_object_types.h | 12 ++ .../gpu/drm/i915/gem/selftests/mock_context.c | 4 +- drivers/gpu/drm/i915/gt/intel_context.c | 14 +++ drivers/gpu/drm/i915/gt/intel_gtt.c | 6 + drivers/gpu/drm/i915/gt/intel_gtt.h | 1 + drivers/gpu/drm/i915/i915_drm_client.c| 110 ++ drivers/gpu/drm/i915/i915_drm_client.h
[Intel-gfx] [PATCH i-g-t 11/12] tools/intel_gpu_top: Add per client memory info
From: Tvrtko Ursulin
JSON output has the full breakdown but for now the interactive mode only
shows total and resident aggregated for all memory regions.
Signed-off-by: Tvrtko Ursulin
---
tools/intel_gpu_top.c | 114 +-
1 file changed, 112 insertions(+), 2 deletions(-)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 27503ac03ebd..c239a0d4f350 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -133,11 +133,24 @@ struct intel_clients {
const char *pci_slot;
struct igt_drm_client_engines classes;
struct igt_drm_clients *clients;
+ struct igt_drm_client_regions *regions; /* Borrowed from first client */
};
static struct termios termios_orig;
static bool class_view;
+/* Maps i915 fdinfo names to indices */
+static const char *memory_region_map[] = {
+ "system0",
+ "local0",
+};
+
+/* For JSON, 1:1 with indices above. */
+static const char *json_memory_region_names[] = {
+ "system",
+ "local",
+};
+
__attribute__((format(scanf,3,4)))
static int igt_sysfs_scanf(int dir, const char *attr, const char *fmt, ...)
{
@@ -884,6 +897,9 @@ static struct igt_drm_clients *display_clients(struct
igt_drm_clients *clients)
ac->val = calloc(c->engines->max_engine_id + 1,
sizeof(ac->val[0]));
assert(ac->val);
+ ac->regions = c->regions;
+ ac->memory = calloc(c->regions->max_region_id + 1,
+ sizeof(ac->memory[0]));
ac->samples = 1;
}
@@ -898,6 +914,14 @@ static struct igt_drm_clients *display_clients(struct
igt_drm_clients *clients)
for (i = 0; i <= c->engines->max_engine_id; i++)
ac->val[i] += c->val[i];
+
+ for (i = 0; i <= c->regions->max_region_id; i++) {
+ ac->memory[i].total += c->memory[i].total;
+ ac->memory[i].shared += c->memory[i].shared;
+ ac->memory[i].resident += c->memory[i].resident;
+ ac->memory[i].purgeable += c->memory[i].purgeable;
+ ac->memory[i].active += c->memory[i].active;
+ }
}
aggregated->num_clients = num;
@@ -922,8 +946,10 @@ static void free_display_clients(struct igt_drm_clients
*clients)
* "display" clients are not proper clients and have un-initialized
* or borrowed fields which we don't want the library to try and free.
*/
- igt_for_each_drm_client(clients, c, tmp)
+ igt_for_each_drm_client(clients, c, tmp) {
free(c->val);
+ free(c->memory);
+ }
free(clients->client);
free(clients);
@@ -2016,6 +2042,9 @@ print_clients_header(struct igt_drm_clients *clients, int
lines,
if (lines++ >= con_h || len >= con_w)
return lines;
+ if (iclients->regions)
+ len += printf(" MEM RSS ");
+
if (iclients->classes.num_engines) {
unsigned int i;
int width;
@@ -2059,6 +2088,20 @@ print_clients_header(struct igt_drm_clients *clients,
int lines,
static bool numeric_clients;
static bool filter_idle;
+static int print_size(uint64_t sz)
+{
+ char units[] = { ' ', 'K', 'M', 'G' };
+ unsigned int u;
+
+ for (u = 0; u < ARRAY_SIZE(units) - 1; u++) {
+ if (sz & 1023 || sz < 1024)
+ break;
+ sz /= 1024;
+ }
+
+ return printf("%7"PRIu64"%c ", sz, units[u]);
+}
+
static int
print_client(struct igt_drm_client *c, struct engines *engines, double t, int
lines,
int con_w, int con_h, unsigned int period_us, int *class_w)
@@ -2076,6 +2119,18 @@ print_client(struct igt_drm_client *c, struct engines
*engines, double t, int li
len = printf("%*s ", clients->max_pid_len, c->pid_str);
+ if (iclients->regions) {
+ uint64_t sz;
+
+ for (sz = 0, i = 0; i <= c->regions->max_region_id; i++)
+ sz += c->memory[i].total;
+ len += print_size(sz);
+
+ for (sz = 0, i = 0; i <= c->regions->max_region_id; i++)
+ sz += c->memory[i].resident;
+ len += print_size(sz);
+ }
+
for (i = 0; i <= iclients->classes.max_engine_id; i++) {
double pct, max;
@@ -2115,6 +2170,42 @@ print_client(struct igt_drm_client *c, struct engines
*engines, double t, int li
snprintf(buf, sizeof(buf), "%u", c->pid);
__json_add_member("pid", buf);
+ if (iclients->regions) {
+
[Intel-gfx] [PATCH i-g-t 12/12] tools/intel_gpu_top: Add ability to show memory region breakdown
From: Tvrtko Ursulin
Similar as we can toggle between aggregated engines and clients, add the
capability to toggle between aggregated and per memory region stats.
It starts in aggregated mode by default and interactive command 'm' and
command line switch '-m' can be used to toggle that.
Both only affect the interactive view, while JSON output always contains
separate memory regions.
Signed-off-by: Tvrtko Ursulin
---
man/intel_gpu_top.rst | 4
tools/intel_gpu_top.c | 56 +--
2 files changed, 48 insertions(+), 12 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 9499f87f1b4d..44a54a5f219d 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -55,6 +55,9 @@ OPTIONS
-p
Default to showing physical engines instead of aggregated classes.
+-m
+ Default to showing all memory regions separately.
+
RUNTIME CONTROL
===
@@ -68,6 +71,7 @@ Supported keys:
|'s'Toggle between sort modes (runtime, total runtime, pid, client id).
|'i'Toggle display of clients which used no GPU time.
|'H'Toggle between per PID aggregation and individual clients.
+|'m'Toggle between aggregated memory regions and full breakdown.
DEVICE SELECTION
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index c239a0d4f350..3b45fcc21331 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -138,6 +138,7 @@ struct intel_clients {
static struct termios termios_orig;
static bool class_view;
+static bool aggregate_regions;
/* Maps i915 fdinfo names to indices */
static const char *memory_region_map[] = {
@@ -1049,6 +1050,7 @@ usage(const char *appname)
"\t[-L]List all cards.\n"
"\t[-d ] Device filter, please check manual page for
more details.\n"
"\t[-p]Default to showing physical engines instead
of classes.\n"
+ "\t[-m]Default to showing all memory regions.\n"
"\n",
appname, DEFAULT_PERIOD_MS);
igt_device_print_filter_types();
@@ -2030,7 +2032,7 @@ print_clients_header(struct igt_drm_clients *clients, int
lines,
4 : clients->max_name_len; /* At least "NAME"
*/
if (output_mode == INTERACTIVE) {
- unsigned int num_active = 0;
+ unsigned int num_active = 0, i;
int len;
if (lines++ >= con_h)
@@ -2042,11 +2044,17 @@ print_clients_header(struct igt_drm_clients *clients,
int lines,
if (lines++ >= con_h || len >= con_w)
return lines;
- if (iclients->regions)
- len += printf(" MEM RSS ");
+ if (iclients->regions) {
+ if (aggregate_regions) {
+ len += printf(" MEM RSS ");
+ } else {
+ len += printf(" RAM RSS ");
+ if (iclients->regions->num_regions > 1)
+ len += printf("VRAM VRSS ");
+ }
+ }
if (iclients->classes.num_engines) {
- unsigned int i;
int width;
for (i = 0; i <= iclients->classes.max_engine_id; i++) {
@@ -2120,15 +2128,26 @@ print_client(struct igt_drm_client *c, struct engines
*engines, double t, int li
len = printf("%*s ", clients->max_pid_len, c->pid_str);
if (iclients->regions) {
- uint64_t sz;
+ if (aggregate_regions) {
+ uint64_t sz;
- for (sz = 0, i = 0; i <= c->regions->max_region_id; i++)
- sz += c->memory[i].total;
- len += print_size(sz);
+ for (sz = 0, i = 0;
+i <= c->regions->max_region_id; i++)
+ sz += c->memory[i].total;
+ len += print_size(sz);
- for (sz = 0, i = 0; i <= c->regions->max_region_id; i++)
- sz += c->memory[i].resident;
- len += print_size(sz);
+ for (sz = 0, i = 0;
+i <= c->regions->max_region_id; i++)
+ sz += c->memory[i].resident;
+ len += print_size(sz);
+ } else {
+ len += print_size(c->memory[0].total);
+ len += print_size(c->memory[0].resident);
+ if (c->regions->num_regions > 1) {
+ len +=
[Intel-gfx] [PATCH i-g-t 10/12] tools/intel_gpu_top: Fully wrap clients operations
From: Tvrtko Ursulin
Wrap all operations on clients via the Intel specific wrappers in order to
simplify upcoming work.
Signed-off-by: Tvrtko Ursulin
---
tools/intel_gpu_top.c | 42 ++
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index eb0ef00abeaf..27503ac03ebd 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -132,6 +132,7 @@ struct engines {
struct intel_clients {
const char *pci_slot;
struct igt_drm_client_engines classes;
+ struct igt_drm_clients *clients;
};
static struct termios termios_orig;
@@ -2436,19 +2437,22 @@ intel_init_clients(struct intel_clients *iclients,
iclients->classes.capacity[i] = engines->class[i].num_engines;
iclients->classes.names[i] = strdup(engines->class[i].name);
}
+
+ iclients->clients = igt_drm_clients_init(iclients);
}
static void intel_free_clients(struct intel_clients *iclients)
{
+ if (iclients->clients)
+ igt_drm_clients_free(iclients->clients);
+
free((void *)iclients->pci_slot);
free(iclients->classes.capacity);
free(iclients->classes.names);
}
-int main(int argc, char **argv)
+static void intel_scan_clients(struct intel_clients *iclients)
{
- unsigned int period_us = DEFAULT_PERIOD_MS * 1000;
- struct igt_drm_clients *clients = NULL;
static const char *engine_map[] = {
"render",
"copy",
@@ -2456,6 +2460,15 @@ int main(int argc, char **argv)
"video-enhance",
"compute",
};
+
+ igt_drm_clients_scan(iclients->clients, client_match,
+engine_map, ARRAY_SIZE(engine_map),
+NULL, 0);
+}
+
+int main(int argc, char **argv)
+{
+ unsigned int period_us = DEFAULT_PERIOD_MS * 1000;
bool physical_engines = false;
struct intel_clients iclients;
int con_w = -1, con_h = -1;
@@ -2613,15 +2626,11 @@ int main(int argc, char **argv)
init_engine_classes(engines);
- if (has_drm_fdinfo()) {
+ if (has_drm_fdinfo())
intel_init_clients(, , engines);
- clients = igt_drm_clients_init();
- }
pmu_sample(engines);
- igt_drm_clients_scan(clients, client_match,
-engine_map, ARRAY_SIZE(engine_map),
-NULL, 0);
+ intel_scan_clients();
gettime();
if (output_mode == JSON)
@@ -2652,12 +2661,8 @@ int main(int argc, char **argv)
pmu_sample(engines);
t = (double)(engines->ts.cur - engines->ts.prev) / 1e9;
- disp_clients =
- display_clients(igt_drm_clients_scan(clients,
-client_match,
-engine_map,
-
ARRAY_SIZE(engine_map),
-NULL, 0));
+ intel_scan_clients();
+ disp_clients = display_clients(iclients.clients);
scan_us = elapsed_us(, period_us);
if (stop_top)
@@ -2708,7 +2713,7 @@ int main(int argc, char **argv)
pops->close_struct();
}
- if (disp_clients != clients)
+ if (disp_clients != iclients.clients)
free_display_clients(disp_clients);
if (stop_top)
@@ -2723,10 +2728,7 @@ int main(int argc, char **argv)
if (output_mode == JSON)
printf("]\n");
- if (clients) {
- igt_drm_clients_free(clients);
- intel_free_clients();
- }
+ intel_free_clients();
free(codename);
err_pmu:
--
2.39.2
[Intel-gfx] [PATCH i-g-t 08/12] lib/igt_drm_clients: Fix client id type confusion
From: Tvrtko Ursulin
Igt_drm_fdinfo defines it as an unsigned long so it is best that it
matches here as well.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_drm_clients.c | 2 +-
lib/igt_drm_clients.h | 2 +-
tools/intel_gpu_top.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/igt_drm_clients.c b/lib/igt_drm_clients.c
index 47ad137d5f1f..da51d7335b2b 100644
--- a/lib/igt_drm_clients.c
+++ b/lib/igt_drm_clients.c
@@ -49,7 +49,7 @@ struct igt_drm_clients *igt_drm_clients_init(void
*private_data)
static struct igt_drm_client *
igt_drm_clients_find(struct igt_drm_clients *clients,
enum igt_drm_client_status status,
-unsigned int drm_minor, unsigned int id)
+unsigned int drm_minor, unsigned long id)
{
unsigned int start, num;
struct igt_drm_client *c;
diff --git a/lib/igt_drm_clients.h b/lib/igt_drm_clients.h
index 07bd236d43bf..cd37f8508b20 100644
--- a/lib/igt_drm_clients.h
+++ b/lib/igt_drm_clients.h
@@ -56,7 +56,7 @@ struct igt_drm_client {
enum igt_drm_client_status status;
struct igt_drm_client_regions *regions; /* Memory regions present in
this client, to map with memory usage. */
struct igt_drm_client_engines *engines; /* Engines used by this client,
to map with busynees data. */
- unsigned int id; /* DRM client id from fdinfo. */
+ unsigned long id; /* DRM client id from fdinfo. */
unsigned int drm_minor; /* DRM minor of this client. */
unsigned int pid; /* PID which has this DRM fd open. */
char pid_str[10]; /* Cached PID representation. */
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index a7a24e527f01..e18ec25e8036 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -2106,7 +2106,7 @@ print_client(struct igt_drm_client *c, struct engines
*engines, double t, int li
} else if (output_mode == JSON) {
char buf[64];
- snprintf(buf, sizeof(buf), "%u", c->id);
+ snprintf(buf, sizeof(buf), "%lu", c->id);
pops->open_struct(buf);
__json_add_member("name", c->print_name);
--
2.39.2
[Intel-gfx] [PATCH i-g-t 06/12] tools/intel_gpu_top: Optimise interactive display a bit
From: Tvrtko Ursulin
Padding the percentage bars and table columns with spaces happens quite a
lot so lets do better than putchar at a time. Have a table of visually
empty strings and build the required length out of those chunks.
While at it, also move the percentage bar table into its function scope.
Signed-off-by: Tvrtko Ursulin
---
tools/intel_gpu_top.c | 38 +-
1 file changed, 33 insertions(+), 5 deletions(-)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 6363f460c892..a7a24e527f01 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -928,14 +928,40 @@ static void free_display_clients(struct igt_drm_clients
*clients)
free(clients);
}
-static const char *bars[] = { " ", "▏", "▎", "▍", "▌", "▋", "▊", "▉", "█" };
-
static unsigned int n_spaces(const unsigned int n)
{
- unsigned int i;
+ static const char *spaces[] = {
+ " ",
+ " ",
+ " ",
+ "",
+ " ",
+ " ",
+ " ",
+ "",
+ " ",
+ " ",
+ " ",
+ "",
+ " ",
+ " ",
+ " ",
+ "",
+ " ",
+ " ",
+ " ",
+#define MAX_SPACES 19
+ };
+ unsigned int i, r = n;
- for (i = 0; i < n; i++)
- putchar(' ');
+ while (r) {
+ if (r > MAX_SPACES)
+ i = MAX_SPACES - 1;
+ else
+ i = r - 1;
+ fputs(spaces[i], stdout);
+ r -= i + 1;
+ }
return n;
}
@@ -943,6 +969,8 @@ static unsigned int n_spaces(const unsigned int n)
static void
print_percentage_bar(double percent, double max, int max_len, bool numeric)
{
+ static const char *bars[] =
+ { " ", "▏", "▎", "▍", "▌", "▋", "▊", "▉", "█" };
int bar_len, i, len = max_len - 2;
const int w = 8;
--
2.39.2
[Intel-gfx] [PATCH i-g-t 09/12] lib/igt_drm_clients: Allow passing in the memory region map
From: Tvrtko Ursulin
Same concept as with the engine map, allowing callers to pass in fixed
map of names to indices, simplifying their implementation and avoiding
auto-detection while parsing.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_drm_clients.c | 5 +++--
lib/igt_drm_clients.h | 3 ++-
tools/gputop.c| 4 ++--
tools/intel_gpu_top.c | 8 +---
4 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/lib/igt_drm_clients.c b/lib/igt_drm_clients.c
index da51d7335b2b..025d60c51503 100644
--- a/lib/igt_drm_clients.c
+++ b/lib/igt_drm_clients.c
@@ -445,7 +445,8 @@ struct igt_drm_clients *
igt_drm_clients_scan(struct igt_drm_clients *clients,
bool (*filter_client)(const struct igt_drm_clients *,
const struct drm_client_fdinfo *),
-const char **name_map, unsigned int map_entries)
+const char **name_map, unsigned int map_entries,
+const char **region_map, unsigned int region_entries)
{
struct dirent *proc_dent;
struct igt_drm_client *c;
@@ -524,7 +525,7 @@ igt_drm_clients_scan(struct igt_drm_clients *clients,
if (!__igt_parse_drm_fdinfo(dirfd(fdinfo_dir),
fdinfo_dent->d_name, ,
name_map, map_entries,
- NULL, 0))
+ region_map, region_entries))
continue;
if (filter_client && !filter_client(clients, ))
diff --git a/lib/igt_drm_clients.h b/lib/igt_drm_clients.h
index cd37f8508b20..52888aedc25a 100644
--- a/lib/igt_drm_clients.h
+++ b/lib/igt_drm_clients.h
@@ -93,7 +93,8 @@ struct igt_drm_clients *
igt_drm_clients_scan(struct igt_drm_clients *clients,
bool (*filter_client)(const struct igt_drm_clients *,
const struct drm_client_fdinfo *),
-const char **name_map, unsigned int map_entries);
+const char **name_map, unsigned int map_entries,
+const char **region_map, unsigned int region_entries);
struct igt_drm_clients *
igt_drm_clients_sort(struct igt_drm_clients *clients,
diff --git a/tools/gputop.c b/tools/gputop.c
index ea95e0333dd2..71e28f43ee4c 100644
--- a/tools/gputop.c
+++ b/tools/gputop.c
@@ -253,7 +253,7 @@ int main(int argc, char **argv)
if (!clients)
exit(1);
- igt_drm_clients_scan(clients, NULL, NULL, 0);
+ igt_drm_clients_scan(clients, NULL, NULL, 0, NULL, 0);
for (;;) {
struct igt_drm_client *c, *prevc = NULL;
@@ -270,7 +270,7 @@ int main(int argc, char **argv)
}
}
- igt_drm_clients_scan(clients, NULL, NULL, 0);
+ igt_drm_clients_scan(clients, NULL, NULL, 0, NULL, 0);
igt_drm_clients_sort(clients, client_cmp);
printf("\033[H\033[J");
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index e18ec25e8036..eb0ef00abeaf 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -2619,8 +2619,9 @@ int main(int argc, char **argv)
}
pmu_sample(engines);
- igt_drm_clients_scan(clients, client_match, engine_map,
-ARRAY_SIZE(engine_map));
+ igt_drm_clients_scan(clients, client_match,
+engine_map, ARRAY_SIZE(engine_map),
+NULL, 0);
gettime();
if (output_mode == JSON)
@@ -2655,7 +2656,8 @@ int main(int argc, char **argv)
display_clients(igt_drm_clients_scan(clients,
client_match,
engine_map,
-
ARRAY_SIZE(engine_map)));
+
ARRAY_SIZE(engine_map),
+NULL, 0));
scan_us = elapsed_us(, period_us);
if (stop_top)
--
2.39.2
[Intel-gfx] [PATCH i-g-t 07/12] lib/igt_drm_fdinfo: Copy over region map name on match
From: Tvrtko Ursulin
I will need some record of which regions were found for intel_gpu_top so
lets just copy over the region name from the map on the first match.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_drm_fdinfo.c | 4
1 file changed, 4 insertions(+)
diff --git a/lib/igt_drm_fdinfo.c b/lib/igt_drm_fdinfo.c
index b72822894782..222ccbfb1fd6 100644
--- a/lib/igt_drm_fdinfo.c
+++ b/lib/igt_drm_fdinfo.c
@@ -148,6 +148,10 @@ static int parse_region(char *line, struct
drm_client_fdinfo *info,
for (i = 0; i < region_entries; i++) {
if (!strncmp(name, region_map[i], name_len)) {
found = i;
+ if (!info->region_names[info->num_regions][0]) {
+ assert(name_len <
sizeof(info->region_names[i]));
+ strncpy(info->region_names[i], name,
name_len);
+ }
break;
}
}
--
2.39.2
[Intel-gfx] [PATCH i-g-t 05/12] tools/intel_gpu_top: Fix client layout on first sample period
From: Tvrtko Ursulin
When I moved the client name to be last, I did not account for the fact
current code skips showing engine utilisation until at least two sampling
periods have passed. Consequence of this is that client name gets printed
as the second field and not under the "NAME" column header.
Fix it by emitting spaces instead of engine utilisation until two samples
have been collected.
Signed-off-by: Tvrtko Ursulin
---
tools/intel_gpu_top.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 76956619eaae..6363f460c892 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -930,12 +930,14 @@ static void free_display_clients(struct igt_drm_clients
*clients)
static const char *bars[] = { " ", "▏", "▎", "▍", "▌", "▋", "▊", "▉", "█" };
-static void n_spaces(const unsigned int n)
+static unsigned int n_spaces(const unsigned int n)
{
unsigned int i;
for (i = 0; i < n; i++)
putchar(' ');
+
+ return n;
}
static void
@@ -2045,14 +2047,17 @@ print_client(struct igt_drm_client *c, struct engines
*engines, double t, int li
len = printf("%*s ", clients->max_pid_len, c->pid_str);
- for (i = 0;
-c->samples > 1 && i <= iclients->classes.max_engine_id;
-i++) {
+ for (i = 0; i <= iclients->classes.max_engine_id; i++) {
double pct, max;
if (!iclients->classes.capacity[i])
continue;
+ if (c->samples < 2) {
+ len += n_spaces(*class_w);
+ continue;
+ }
+
pct = (double)c->val[i] / period_us / 1e3 * 100;
/*
--
2.39.2
[Intel-gfx] [PATCH i-g-t 04/12] tools/intel_gpu_top: Fix clients header width when no clients
From: Tvrtko Ursulin
Recent refactoring broke the clients header in cases when there are no
clients displayed. To fix it we need to account the width of the "NAME"
label.
Signed-off-by: Tvrtko Ursulin
---
tools/intel_gpu_top.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index e01355f90458..76956619eaae 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -1969,6 +1969,8 @@ print_clients_header(struct igt_drm_clients *clients, int
lines,
int con_w, int con_h, int *class_w)
{
struct intel_clients *iclients = clients->private_data;
+ const int max_name_len = clients->max_name_len < 4 ?
+4 : clients->max_name_len; /* At least "NAME"
*/
if (output_mode == INTERACTIVE) {
unsigned int num_active = 0;
@@ -1992,9 +1994,8 @@ print_clients_header(struct igt_drm_clients *clients, int
lines,
num_active++;
}
- *class_w = width =
- (con_w - len - clients->max_name_len - 1) /
- num_active;
+ *class_w = width = (con_w - len - max_name_len - 1) /
+ num_active;
for (i = 0; i <= iclients->classes.max_engine_id; i++) {
const char *name = iclients->classes.names[i];
--
2.39.2
[Intel-gfx] [PATCH i-g-t 03/12] tools/intel_gpu_top: Restore user friendly error message
From: Tvrtko Ursulin We have a nice error message displayed when an user with insufficient permissions tries to run the tool, but that got lost while Meteorlake support was added. Bring it back in. Signed-off-by: Tvrtko Ursulin Cc: Umesh Nerlige Ramappa --- tools/intel_gpu_top.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c index 87e9681e53b4..e01355f90458 100644 --- a/tools/intel_gpu_top.c +++ b/tools/intel_gpu_top.c @@ -554,9 +554,11 @@ static int get_num_gts(uint64_t type) close(fd); } - assert(!errno || errno == ENOENT); - assert(cnt > 0); - errno = 0; + + if (!cnt) + cnt = errno; + else + errno = 0; return cnt; } @@ -590,6 +592,8 @@ static int pmu_init(struct engines *engines) engines->fd = -1; engines->num_counters = 0; engines->num_gts = get_num_gts(type); + if (engines->num_gts <= 0) + return -1; engines->irq.config = I915_PMU_INTERRUPTS; fd = _open_pmu(type, engines->num_counters, >irq, engines->fd); -- 2.39.2
[Intel-gfx] [PATCH i-g-t 02/12] tests/i915/drm_fdinfo: Add some memory info tests
From: Tvrtko Ursulin
A few basic smoke tests to check per client memory info looks legit.
Signed-off-by: Tvrtko Ursulin
---
tests/intel/drm_fdinfo.c | 201 +++
1 file changed, 201 insertions(+)
diff --git a/tests/intel/drm_fdinfo.c b/tests/intel/drm_fdinfo.c
index a9910900358d..8e0d04bde62b 100644
--- a/tests/intel/drm_fdinfo.c
+++ b/tests/intel/drm_fdinfo.c
@@ -23,6 +23,7 @@
*/
#include
+#include
#include "igt.h"
#include "igt_core.h"
@@ -76,6 +77,16 @@
*
* SUBTEST: virtual-idle
*
+ * SUBTEST: memory-info-idle
+ *
+ * SUBTEST: memory-info-active
+ *
+ * SUBTEST: memory-info-resident
+ *
+ * SUBTEST: memory-info-purgeable
+ *
+ * SUBTEST: memory-info-shared
+ *
* SUBTEST: context-close-stress
*/
@@ -143,6 +154,11 @@ static unsigned int measured_usleep(unsigned int usec)
#define FLAG_HANG (8)
#define TEST_ISOLATION (16)
+#define TEST_ACTIVE TEST_BUSY
+#define TEST_RESIDENT (32)
+#define TEST_PURGEABLE (64)
+#define TEST_SHARED (128)
+
static void end_spin(int fd, igt_spin_t *spin, unsigned int flags)
{
if (!spin)
@@ -772,6 +788,156 @@ static void stress_context_close(int i915)
igt_stop_helper();
}
+static size_t read_fdinfo(char *buf, const size_t sz, int at, const char *name)
+{
+ size_t count;
+ int fd;
+
+ fd = openat(at, name, O_RDONLY);
+ if (fd < 0)
+ return 0;
+
+ count = read(fd, buf, sz - 1);
+ if (count > 0)
+ buf[count - 1] = 0;
+ close(fd);
+
+ return count > 0 ? count : 0;
+}
+
+#define fdinfo_assert(cond, d, sz, total) \
+ igt_assert_f(cond, "\ndelta=%"PRIu64" sz=%"PRIu64"
total=%"PRIu64"\n%s\n", d, sz, total, fdinfo_buf)
+
+static void
+test_memory(int i915, struct gem_memory_region *r, unsigned int flags)
+{
+ struct drm_client_fdinfo prev_info = { };
+ struct drm_client_fdinfo info = { };
+ const uint64_t max_mem = 512ull * 1024 * 1024;
+ const uint64_t max_bo = 16ull * 1024 * 1024;
+ uint64_t total = 0, sz, d;
+ char buf[64], fdinfo_buf[4096];
+ igt_spin_t *spin = NULL;
+ int ret, dir;
+
+ i915 = drm_reopen_driver(i915);
+
+ ret = snprintf(buf, sizeof(buf), "%u", i915);
+ igt_assert(ret > 0 && ret < sizeof(buf));
+
+ dir = open("/proc/self/fdinfo", O_DIRECTORY | O_RDONLY);
+ igt_assert_fd(dir);
+
+ gem_quiescent_gpu(i915);
+ ret = __igt_parse_drm_fdinfo(dir, buf, , NULL, 0, NULL, 0);
+ igt_assert(ret > 0);
+ igt_require(info.num_regions);
+ memcpy(_info, , sizeof(info));
+
+ while (total < max_mem) {
+ static const char *region_map[] = {
+ "system0",
+ "local0",
+ };
+ uint32_t bo;
+ int j;
+
+ /* Align to 1MiB to work around drm_print_memory_stats */
+ sz = 1ull * 1024 * 1024 + random() % (max_bo - 1ull * 1024 *
1024);
+ sz &= ~((1ull * 1024 * 1024) - 1);
+ ret = __gem_create_in_memory_region_list(i915, , , 0,
>ci, 1);
+ igt_assert_eq(ret, 0);
+ total += sz;
+
+ if (flags & (TEST_RESIDENT | TEST_PURGEABLE)) {
+ struct drm_i915_gem_exec_object2 obj[2];
+ struct drm_i915_gem_execbuffer2 eb = {
+ .buffers_ptr = to_user_pointer(obj),
+ .buffer_count = 2,
+ };
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+
+ obj[0].handle = bo;
+ obj[1].handle = gem_create(i915, 4096);
+ gem_write(i915, obj[1].handle, 0, , sizeof(bbe));
+ gem_execbuf(i915, );
+ gem_sync(i915, obj[1].handle);
+ gem_close(i915, obj[1].handle);
+ }
+
+ if (flags & TEST_PURGEABLE)
+ gem_madvise(i915, bo, I915_MADV_DONTNEED);
+
+ if (flags & TEST_SHARED) {
+ struct drm_gem_open open_struct;
+ struct drm_gem_flink flink;
+
+ flink.handle = bo;
+ ret = ioctl(i915, DRM_IOCTL_GEM_FLINK, );
+ igt_assert_eq(ret, 0);
+
+ open_struct.name = flink.name;
+ ret = ioctl(i915, DRM_IOCTL_GEM_OPEN, _struct);
+ igt_assert_eq(ret, 0);
+ igt_assert(open_struct.handle != 0);
+ }
+
+ if (flags & TEST_ACTIVE)
+ spin = igt_spin_new(i915, .dependency = bo);
+
+ memset(, 0, sizeof(info));
+ ret = __igt_parse_drm_fdinfo(dir, buf, ,
+ NULL, 0,
+ region_map,
ARRAY_SIZE(region_map));
[Intel-gfx] [PATCH i-g-t 01/12] tests/i915/drm_fdinfo: Stress test context close versus fdinfo reads
From: Tvrtko Ursulin
A short smoke tests to exercise fdinfo reads in parallel to contexts
getting created and destroyed.
Signed-off-by: Tvrtko Ursulin
---
tests/intel/drm_fdinfo.c | 68
1 file changed, 68 insertions(+)
diff --git a/tests/intel/drm_fdinfo.c b/tests/intel/drm_fdinfo.c
index aca19db50680..a9910900358d 100644
--- a/tests/intel/drm_fdinfo.c
+++ b/tests/intel/drm_fdinfo.c
@@ -22,11 +22,14 @@
*
*/
+#include
+
#include "igt.h"
#include "igt_core.h"
#include "igt_device.h"
#include "igt_drm_fdinfo.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_vm.h"
#include "intel_ctx.h"
/**
@@ -72,6 +75,8 @@
* SUBTEST: virtual-busy-idle-all
*
* SUBTEST: virtual-idle
+ *
+ * SUBTEST: context-close-stress
*/
IGT_TEST_DESCRIPTION("Test the i915 drm fdinfo data");
@@ -717,6 +722,56 @@ virtual_all(int i915, const intel_ctx_cfg_t *base_cfg,
unsigned int flags)
}
}
+static void stress_context_close(int i915)
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ struct igt_helper_process reader = { };
+ struct drm_client_fdinfo info;
+ uint32_t batch;
+ int dir, ret;
+ char buf[64];
+
+ ret = snprintf(buf, sizeof(buf), "%u", i915);
+ igt_assert(ret > 0 && ret < sizeof(buf));
+
+ dir = open("/proc/self/fdinfo", O_DIRECTORY | O_RDONLY);
+ igt_assert_fd(dir);
+
+ memset(, 0, sizeof(info));
+ ret = __igt_parse_drm_fdinfo(dir, buf, , NULL, 0, NULL, 0);
+ igt_assert(ret > 0);
+ igt_require(info.num_regions);
+
+ batch = gem_create(i915, 4096);
+ gem_write(i915, batch, 0, , sizeof(bbe));
+
+ igt_fork_helper() {
+ for (;;) {
+ memset(, 0, sizeof(info));
+ ret = __igt_parse_drm_fdinfo(dir, buf, ,
+NULL, 0, NULL, 0);
+ igt_assert(ret > 0);
+ }
+ }
+
+ igt_until_timeout(10) {
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = batch,
+ };
+ struct drm_i915_gem_execbuffer2 eb = {
+ .buffers_ptr = to_user_pointer(),
+ .buffer_count = 1,
+ };
+
+ eb.rsvd1 = gem_context_create(i915);
+ igt_assert(eb.rsvd1);
+ gem_execbuf(i915, );
+ gem_context_destroy(i915, eb.rsvd1);
+ }
+
+ igt_stop_helper();
+}
+
#define test_each_engine(T, i915, ctx, e) \
igt_subtest_with_dynamic(T) for_each_ctx_engine(i915, ctx, e) \
igt_dynamic_f("%s", e->name)
@@ -847,6 +902,19 @@ igt_main
test_each_engine("isolation", i915, ctx, e)
single(i915, ctx, e, TEST_BUSY | TEST_ISOLATION);
+ igt_subtest_group {
+ int newfd;
+
+ igt_fixture
+ newfd = drm_reopen_driver(i915);
+
+ igt_subtest("context-close-stress")
+ stress_context_close(newfd);
+
+ igt_fixture
+ drm_close_driver(newfd);
+ }
+
igt_fixture {
intel_ctx_destroy(i915, ctx);
drm_close_driver(i915);
--
2.39.2
[Intel-gfx] [PATCH i-g-t 00/12] fdinfo tests, intel_gpu_top memory support, etc
From: Tvrtko Ursulin Some basic testst for fdinfo memory stats, intel_gpu_top memory stats support (first draft) and a couple fixlets. Primarily sending to use as "Test-with" but review is also welcome. Tvrtko Ursulin (12): tests/i915/drm_fdinfo: Stress test context close versus fdinfo reads tests/i915/drm_fdinfo: Add some memory info tests tools/intel_gpu_top: Restore user friendly error message tools/intel_gpu_top: Fix clients header width when no clients tools/intel_gpu_top: Fix client layout on first sample period tools/intel_gpu_top: Optimise interactive display a bit lib/igt_drm_fdinfo: Copy over region map name on match lib/igt_drm_clients: Fix client id type confusion lib/igt_drm_clients: Allow passing in the memory region map tools/intel_gpu_top: Fully wrap clients operations tools/intel_gpu_top: Add per client memory info tools/intel_gpu_top: Add ability to show memory region breakdown lib/igt_drm_clients.c| 7 +- lib/igt_drm_clients.h| 5 +- lib/igt_drm_fdinfo.c | 4 + man/intel_gpu_top.rst| 4 + tests/intel/drm_fdinfo.c | 269 +++ tools/gputop.c | 4 +- tools/intel_gpu_top.c| 260 +++-- 7 files changed, 508 insertions(+), 45 deletions(-) -- 2.39.2
[Intel-gfx] [PATCH v5 2/2] drm/i915/lnl: update the supported plane formats with FBC
FBC is supported with RGB32 8:8:8:8 with or without alpha
Bspec: 68904, 69560
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_fbc.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index aef5a4f6ad09..9b19fe018bce 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -903,6 +903,11 @@ static bool pixel_format_is_valid(const struct
intel_plane_state *plane_state)
if (IS_G4X(i915))
return false;
return true;
+ case DRM_FORMAT_ARGB:
+ case DRM_FORMAT_ABGR:
+ if (DISPLAY_VER(i915) >= 20)
+ return true;
+ fallthrough;
default:
return false;
}
@@ -1132,7 +1137,8 @@ static int intel_fbc_check_plane(struct
intel_atomic_state *state,
return 0;
}
- if (plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
+ if (DISPLAY_VER(i915) < 20 &&
+ plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
fb->format->has_alpha) {
plane_state->no_fbc_reason = "per-pixel alpha not supported";
return 0;
--
2.34.1
[Intel-gfx] [PATCH v5 0/2] fbc on any planes
FBC can be supported in first three planes in lnl Vinod Govindapillai (2): drm/i915/lnl: possibility to enable FBC on first three planes drm/i915/lnl: update the supported plane formats with FBC drivers/gpu/drm/i915/display/intel_fbc.c | 11 ++- drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++--- drivers/gpu/drm/i915/i915_reg.h| 2 ++ 3 files changed, 18 insertions(+), 4 deletions(-) -- 2.34.1
[Intel-gfx] [PATCH v5 1/2] drm/i915/lnl: possibility to enable FBC on first three planes
In LNL onwards, FBC can be associated to the first three planes.
FBC will be enabled on planes first come first served basis
until the userspace can select one of these FBC capable planes
explicitly.
v2:
- avoid fbc->state.plane check in intel_fbc_check_plane (Ville)
- simplify plane binding register writes (Matt)
- Update the subject to reflect that fbc can be enabled only in
the first three planes (Matt)
v3:
- use icl_is_hdr_plane(), use wrapper macro for plane binding
register access, comments update and patch split (Ville)
v4:
- update to the plane binding register access macro
Bspec: 69560
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_fbc.c | 3 +++
drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++---
drivers/gpu/drm/i915/i915_reg.h| 2 ++
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 7f70166f7035..aef5a4f6ad09 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -592,6 +592,9 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
if (IS_IVYBRIDGE(i915))
dpfc_ctl |= DPFC_CTL_PLANE_IVB(fbc_state->plane->i9xx_plane);
+ if (DISPLAY_VER(i915) >= 20)
+ dpfc_ctl |= DPFC_CTL_PLANE_BINDING(fbc_state->plane->id);
+
if (fbc_state->fence_id >= 0)
dpfc_ctl |= DPFC_CTL_FENCE_EN_IVB;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 4d01c7ae4485..8f946c5a2fd8 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1956,13 +1956,16 @@ static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe
pipe)
return pipe - PIPE_A + INTEL_FBC_A;
}
-static bool skl_plane_has_fbc(struct drm_i915_private *dev_priv,
+static bool skl_plane_has_fbc(struct drm_i915_private *i915,
enum intel_fbc_id fbc_id, enum plane_id plane_id)
{
- if ((DISPLAY_RUNTIME_INFO(dev_priv)->fbc_mask & BIT(fbc_id)) == 0)
+ if ((DISPLAY_RUNTIME_INFO(i915)->fbc_mask & BIT(fbc_id)) == 0)
return false;
- return plane_id == PLANE_PRIMARY;
+ if (DISPLAY_VER(i915) >= 20)
+ return icl_is_hdr_plane(i915, plane_id);
+ else
+ return plane_id == PLANE_PRIMARY;
}
static struct intel_fbc *skl_plane_fbc(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aefad14ab27a..d44ac6f1c052 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1327,6 +1327,8 @@
#define DPFC_CTL_PLANE_IVB(i9xx_plane)
REG_FIELD_PREP(DPFC_CTL_PLANE_MASK_IVB, (i9xx_plane))
#define DPFC_CTL_FENCE_EN_IVBREG_BIT(28) /* ivb+ */
#define DPFC_CTL_PERSISTENT_MODE REG_BIT(25) /* g4x-snb */
+#define DPFC_CTL_PLANE_BINDING_MASK REG_GENMASK(12, 11) /* lnl+ */
+#define DPFC_CTL_PLANE_BINDING(plane_id)
REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, (plane_id))
#define DPFC_CTL_FALSE_COLOR REG_BIT(10) /* ivb+ */
#define DPFC_CTL_SR_EN REG_BIT(10) /* g4x only */
#define DPFC_CTL_SR_EXIT_DIS REG_BIT(9) /* g4x only */
--
2.34.1
Re: [Intel-gfx] [PATCH 0/8] Add DSC fractional bpp support
On Wed, Sep 13, 2023 at 11:35:58AM +0530, Mitul Golani wrote: > his patch series adds support for DSC fractional compressed bpp > for MTL+. The series starts with some fixes, followed by patches that > lay groundwork to iterate over valid compressed bpps to select the > 'best' compressed bpp with optimal link configuration (taken from > upstream series: https://patchwork.freedesktop.org/series/105200/). > > The later patches, add changes to accommodate compressed bpp with > fractional part, including changes to QP calculations. > To get the 'best' compressed bpp, we iterate over the valid compressed > bpp values, but with fractional step size 1/16, 1/8, 1/4 or 1/2 as per > sink support. > > The last 2 patches add support to depict DSC sink's fractional support, > and debugfs to enforce use of fractional bpp, while choosing an > appropriate compressed bpp. MST/DSC is at the moment broken, so I'd prefer merging this patchset only after it's fixed. This would mean merging https://lore.kernel.org/all/20230921195159.2646027-1-imre.d...@intel.com first, followed by the DSC parts from https://lore.kernel.org/all/20230914192659.757475-1-imre.d...@intel.com which would also need a rebase for this patchset. > Ankit Nautiyal (5): > drm/display/dp: Add helper function to get DSC bpp prescision > drm/i915/display: Store compressed bpp in U6.4 format > drm/i915/display: Consider fractional vdsc bpp while computing m_n > values > drm/i915/audio : Consider fractional vdsc bpp while computing tu_data > drm/i915/dp: Iterate over output bpp with fractional step size > > Swati Sharma (2): > drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp > drm/i915/dsc: Allow DSC only with fractional bpp when forced from > debugfs > > Vandita Kulkarni (1): > drm/i915/dsc/mtl: Add support for fractional bpp > > drivers/gpu/drm/display/drm_dp_helper.c | 27 ++ > drivers/gpu/drm/i915/display/icl_dsi.c| 11 +-- > drivers/gpu/drm/i915/display/intel_audio.c| 17 ++-- > drivers/gpu/drm/i915/display/intel_bios.c | 6 +- > drivers/gpu/drm/i915/display/intel_cdclk.c| 6 +- > drivers/gpu/drm/i915/display/intel_display.c | 8 +- > drivers/gpu/drm/i915/display/intel_display.h | 2 +- > .../drm/i915/display/intel_display_debugfs.c | 83 +++ > .../drm/i915/display/intel_display_types.h| 4 +- > drivers/gpu/drm/i915/display/intel_dp.c | 81 +++--- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 32 --- > drivers/gpu/drm/i915/display/intel_fdi.c | 2 +- > .../i915/display/intel_fractional_helper.h| 36 > .../gpu/drm/i915/display/intel_qp_tables.c| 3 - > drivers/gpu/drm/i915/display/intel_vdsc.c | 30 +-- > include/drm/display/drm_dp_helper.h | 1 + > 16 files changed, 275 insertions(+), 74 deletions(-) > create mode 100644 drivers/gpu/drm/i915/display/intel_fractional_helper.h > > -- > 2.25.1 >
[Intel-gfx] [PATCH] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
From: Jonathan Cavitt
Where applicable, use for_each_gt instead of to_gt in the
i915_gem_shrinker functions to make them apply to more than just the
primary GT. Specifically, this ensure i915_gem_shrink_all retires all
requests across all GTs, and this makes i915_gem_shrinker_vmap unmap
VMAs from all GTs.
Signed-off-by: Jonathan Cavitt
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 44
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 214763942aa2..3ef1fd32f80a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -14,6 +14,7 @@
#include
#include "gt/intel_gt_requests.h"
+#include "gt/intel_gt.h"
#include "i915_trace.h"
@@ -119,7 +120,8 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
intel_wakeref_t wakeref = 0;
unsigned long count = 0;
unsigned long scanned = 0;
- int err = 0;
+ int err = 0, i = 0;
+ struct intel_gt *gt;
/* CHV + VTD workaround use stop_machine(); need to trylock vm->mutex */
bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915);
@@ -147,9 +149,11 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
* what we can do is give them a kick so that we do not keep idle
* contexts around longer than is necessary.
*/
- if (shrink & I915_SHRINK_ACTIVE)
- /* Retire requests to unpin all idle contexts */
- intel_gt_retire_requests(to_gt(i915));
+ if (shrink & I915_SHRINK_ACTIVE) {
+ for_each_gt(gt, i915, i)
+ /* Retire requests to unpin all idle contexts */
+ intel_gt_retire_requests(to_gt(i915));
+ }
/*
* As we may completely rewrite the (un)bound list whilst unbinding
@@ -389,6 +393,8 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned
long event, void *ptr
struct i915_vma *vma, *next;
unsigned long freed_pages = 0;
intel_wakeref_t wakeref;
+ struct intel_gt *gt;
+ int i;
with_intel_runtime_pm(>runtime_pm, wakeref)
freed_pages += i915_gem_shrink(NULL, i915, -1UL, NULL,
@@ -397,24 +403,26 @@ i915_gem_shrinker_vmap(struct notifier_block *nb,
unsigned long event, void *ptr
I915_SHRINK_VMAPS);
/* We also want to clear any cached iomaps as they wrap vmap */
- mutex_lock(_gt(i915)->ggtt->vm.mutex);
- list_for_each_entry_safe(vma, next,
-_gt(i915)->ggtt->vm.bound_list, vm_link) {
- unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
- struct drm_i915_gem_object *obj = vma->obj;
-
- if (!vma->iomap || i915_vma_is_active(vma))
- continue;
+ for_each_gt(gt, i915, i) {
+ mutex_lock(>ggtt->vm.mutex);
+ list_for_each_entry_safe(vma, next,
+>ggtt->vm.bound_list, vm_link) {
+ unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
+ struct drm_i915_gem_object *obj = vma->obj;
+
+ if (!vma->iomap || i915_vma_is_active(vma))
+ continue;
- if (!i915_gem_object_trylock(obj, NULL))
- continue;
+ if (!i915_gem_object_trylock(obj, NULL))
+ continue;
- if (__i915_vma_unbind(vma) == 0)
- freed_pages += count;
+ if (__i915_vma_unbind(vma) == 0)
+ freed_pages += count;
- i915_gem_object_unlock(obj);
+ i915_gem_object_unlock(obj);
+ }
+ mutex_unlock(>ggtt->vm.mutex);
}
- mutex_unlock(_gt(i915)->ggtt->vm.mutex);
*(unsigned long *)ptr += freed_pages;
return NOTIFY_DONE;
--
2.41.0
Re: [Intel-gfx] [PATCH 5/5] drm/i915: Implement fdinfo memory stats printing
On 22-09-2023 16:27, Tvrtko Ursulin wrote:
>
> On 22/09/2023 09:48, Iddamsetty, Aravind wrote:
>>
>>
>> On 21-09-2023 17:18, Tvrtko Ursulin wrote:
>>> From: Tvrtko Ursulin
>>>
>>> Use the newly added drm_print_memory_stats helper to show memory
>>> utilisation of our objects in drm/driver specific fdinfo output.
>>>
>>> To collect the stats we walk the per memory regions object lists
>>> and accumulate object size into the respective drm_memory_stats
>>> categories.
>>>
>>> Objects with multiple possible placements are reported in multiple
>>> regions for total and shared sizes, while other categories are
>>
>> I guess you forgot to correct this.
>
> Ah yes, will fix.
>
>>
>>> counted only for the currently active region.
>>>
>>> v2:
>>> * Only account against the active region.
>>> * Use DMA_RESV_USAGE_BOOKKEEP when testing for active. (Tejas)
>>>
>>> Signed-off-by: Tvrtko Ursulin
>>> Cc: Aravind Iddamsetty
>>> Cc: Rob Clark
>>> Cc: Andi Shyti
>>> Cc: Tejas Upadhyay
>>> Reviewed-by: Andi Shyti # v1
>>> ---
>>> drivers/gpu/drm/i915/i915_drm_client.c | 64 ++
>>> 1 file changed, 64 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
>>> b/drivers/gpu/drm/i915/i915_drm_client.c
>>> index a61356012df8..94abc2fb2ea6 100644
>>> --- a/drivers/gpu/drm/i915/i915_drm_client.c
>>> +++ b/drivers/gpu/drm/i915/i915_drm_client.c
>>> @@ -45,6 +45,68 @@ void __i915_drm_client_free(struct kref *kref)
>>> }
>>> #ifdef CONFIG_PROC_FS
>>> +static void
>>> +obj_meminfo(struct drm_i915_gem_object *obj,
>>> + struct drm_memory_stats stats[INTEL_REGION_UNKNOWN])
>>> +{
>>> + const enum intel_region_id id = obj->mm.region ?
>>> + obj->mm.region->id : INTEL_REGION_SMEM;
>>> + const u64 sz = obj->base.size;
>>> +
>>> + if (obj->base.handle_count > 1)
>>> + stats[id].shared += sz;
>>> + else
>>> + stats[id].private += sz;
>>> +
>>> + if (i915_gem_object_has_pages(obj)) {
>>> + stats[id].resident += sz;
>>> +
>>> + if (!dma_resv_test_signaled(obj->base.resv,
>>> + DMA_RESV_USAGE_BOOKKEEP))
>>> + stats[id].active += sz;
>>> + else if (i915_gem_object_is_shrinkable(obj) &&
>>> + obj->mm.madv == I915_MADV_DONTNEED)
>>> + stats[id].purgeable += sz;
>>> + }
>>> +}
>>> +
>>> +static void show_meminfo(struct drm_printer *p, struct drm_file *file)
>>> +{
>>> + struct drm_memory_stats stats[INTEL_REGION_UNKNOWN] = {};
>>> + struct drm_i915_file_private *fpriv = file->driver_priv;
>>> + struct i915_drm_client *client = fpriv->client;
>>> + struct drm_i915_private *i915 = fpriv->i915;
>>> + struct drm_i915_gem_object *obj;
>>> + struct intel_memory_region *mr;
>>> + struct list_head *pos;
>>> + unsigned int id;
>>> +
>>> + /* Public objects. */
>>> + spin_lock(>table_lock);
>>> + idr_for_each_entry(>object_idr, obj, id)
>>> + obj_meminfo(obj, stats);
>>> + spin_unlock(>table_lock);
>>> +
>>> + /* Internal objects. */
>>> + rcu_read_lock();
>>> + list_for_each_rcu(pos, >objects_list) {
>>> + obj = i915_gem_object_get_rcu(list_entry(pos, typeof(*obj),
>>> + client_link));
>>> + if (!obj)
>>> + continue;
>>> + obj_meminfo(obj, stats);
>>> + i915_gem_object_put(obj);
>>> + }
>>> + rcu_read_unlock();
>>> +
>>> + for_each_memory_region(mr, i915, id)
>>> + drm_print_memory_stats(p,
>>> + [id],
>>> + DRM_GEM_OBJECT_RESIDENT |
>>> + DRM_GEM_OBJECT_PURGEABLE,
>>> + mr->name);
>>> +}
>>> +
>>> static const char * const uabi_class_names[] = {
>>> [I915_ENGINE_CLASS_RENDER] = "render",
>>> [I915_ENGINE_CLASS_COPY] = "copy",
>>> @@ -106,6 +168,8 @@ void i915_drm_client_fdinfo(struct drm_printer
>>> *p, struct drm_file *file)
>>> *
>>> **
>>> */
>>> + show_meminfo(p, file);
>>> +
>>> if (GRAPHICS_VER(i915) < 8)
>>> return;
>>>
>>
>> Reviewed-by: Aravind Iddamsetty
>
> Thank you! Would you be able to also look at the IGTs I posted yesterday?
Ya sure will take a look.
Thanks,
Aravind.
>
> Regards,
>
> Tvrtko
Re: [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp
On Thu, 21 Sep 2023, "Sharma, Swati2" wrote:
> On 21-Sep-23 5:44 PM, Jani Nikula wrote:
>> On Thu, 21 Sep 2023, "Sharma, Swati2" wrote:
>>> On 21-Sep-23 1:30 PM, Jani Nikula wrote:
On Wed, 13 Sep 2023, Mitul Golani
wrote:
> From: Swati Sharma
>
> DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show
> to depict sink's precision.
> Also, new debugfs entry is created to enforce fractional bpp.
> If Force_DSC_Fractional_BPP_en is set then while iterating over
> output bpp with fractional step size we will continue if output_bpp is
> computed as integer. With this approach, we will be able to validate
> DSC with fractional bpp.
>
> v2:
> Add drm_modeset_unlock to new line(Suraj)
>
> Signed-off-by: Swati Sharma
> Signed-off-by: Ankit Nautiyal
> Signed-off-by: Mitul Golani
> Reviewed-by: Suraj Kandpal
> ---
>.../drm/i915/display/intel_display_debugfs.c | 83 +++
>.../drm/i915/display/intel_display_types.h| 1 +
>2 files changed, 84 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index f05b52381a83..776ab96def1f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1244,6 +1244,8 @@ static int i915_dsc_fec_support_show(struct
> seq_file *m, void *data)
>
> DP_DSC_YCbCr420_Native)),
>
> str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
>
> DP_DSC_YCbCr444)));
> + seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
> +drm_dp_dsc_sink_bpp_incr(intel_dp->dsc_dpcd));
> seq_printf(m, "Force_DSC_Enable: %s\n",
> str_yes_no(intel_dp->force_dsc_en));
> if (!intel_dp_is_edp(intel_dp))
> @@ -1436,6 +1438,84 @@ static const struct file_operations
> i915_dsc_output_format_fops = {
> .write = i915_dsc_output_format_write
>};
>
> +static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
> +{
> + struct drm_connector *connector = m->private;
> + struct drm_device *dev = connector->dev;
> + struct drm_crtc *crtc;
> + struct intel_dp *intel_dp;
> + struct intel_encoder *encoder =
> intel_attached_encoder(to_intel_connector(connector));
> + int ret;
> +
> + if (!encoder)
> + return -ENODEV;
> +
> + ret =
> drm_modeset_lock_single_interruptible(>mode_config.connection_mutex);
> + if (ret)
> + return ret;
> +
> + crtc = connector->state->crtc;
> + if (connector->status != connector_status_connected || !crtc) {
> + ret = -ENODEV;
> + goto out;
> + }
> +
> + intel_dp = intel_attached_dp(to_intel_connector(connector));
> + seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
> +str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
Why "Force_DSC_Fractional_BPP_Enable" in the output?
Usually debugfs files, like sysfs files, for stuff like this should be
attributes, one thing per file. Why print a long name for it, if the
name of the debugfs file is the name of the attribute?
And even if you print it for humans, why the underscores?
>>>
>>> Hi Jani,
>>> Followed same strategy as we are doing for other dsc scenarios like
>>> force_dsc.
>>> Even naming convention followed same as other dsc stuff like
>>> Force_DSC_Enable, etc.
>>> All DSC related enteries have underscores in its naming convention.
>>
>> There's value in that, though maybe my comment highlights I'm not fond
>> of the existing stuff. ;)
>
> Sure, I can work on cleanup part later.
>
>>
>>> May be i can consolidate other dsc debugfs enteries into
>>> one as a cleanup task later. But it will impact IGT aswell. And i'm not
>>> sure if we can break compatibility but since IGT (intel as only vendor)
>>> is the only consumer, may be we change at both places and clean it up.
>>
>> We can do what we want with debugfs, as long as we change both the
>> driver and igt.
>
> Sure, will make corresponding changes in both IGT and KMD.
>
>>
>>>
> +
> +out:
> + drm_modeset_unlock(>mode_config.connection_mutex);
> +
> + return ret;
> +}
> +
> +static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
> + const char __user *ubuf,
> + size_t len, loff_t *offp)
> +{
> + struct drm_connector *connector =
> + ((struct seq_file
Re: [Intel-gfx] [PATCH] drm/i915: Add Wa_18028616096
Quoting Chauhan, Shekhar (2023-09-22 01:04:36-03:00)
>Quoting Gustavo Sousa:
>
>On 9/22/2023 02:31, Gustavo Sousa wrote:
>> Quoting Shekhar Chauhan (2023-09-21 11:30:28-03:00)
>>> Drop UGM per set fragment threshold to 3
>>>
>>> BSpec: 54833
>>> Signed-off-by: Shekhar Chauhan
>>> ---
>>> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
>>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
>>> 2 files changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
>>> b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
>>> index a00ff51c681d..431c575c532b 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
>>> @@ -1230,6 +1230,7 @@
>>> #define DISABLE_D8_D16_COASLESCEREG_BIT(30)
>>> #define FORCE_1_SUB_MESSAGE_PER_FRAGMENTREG_BIT(15)
>>> #define LSC_CHICKEN_BIT_0_UDWMCR_REG(0xe7c8 + 4)
>>> +#define UGM_FRAGMENT_THRESHOLD_TO_3REG_BIT(58 - 32)
>>> #define DIS_CHAIN_2XSIMD8REG_BIT(55 - 32)
>>> #define FORCE_SLM_FENCE_SCOPE_TO_TILEREG_BIT(42 - 32)
>>> #define FORCE_UGM_FENCE_SCOPE_TO_TILEREG_BIT(41 - 32)
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> index 660d4f358eab..992041e3776c 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> @@ -2914,6 +2914,9 @@ general_render_compute_wa_init(struct intel_engine_cs
>>> *engine, struct i915_wa_li
>>> * Wa_22015475538:dg2
>>> */
>>> wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0_UDW,
>>> DIS_CHAIN_2XSIMD8);
>>> +
>>> +/* Wa_18028616096:dg2 */
>> This is not a blocker, but I would prefer to remove the ":dg2" suffix.
>>
>> There was an effort to remove them from our driver[1], but it kinda of
>> stalled. I myself agree that we would be better off without them.
>>
>> [1]https://lore.kernel.org/all/20221222082557.1364711-1-lucas.demar...@intel.com
>Ack'ed in the new version.
>>
>>> +wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0_UDW,
>>> UGM_FRAGMENT_THRESHOLD_TO_3);
>> This workaround applies to (i) DG2 G10 from stepping C0 to forever and
>> (ii) any stepping of DG2 G12. Here you are applying this workaround to
>> any variant of DG2.
>>
>> It should be moved out of this "if" statement and rather be guarded by
>> something like:
>>
>> if ((IS_DG2_G10(i915) && IS_GRAPHICS_STEP(i915, STEP_C0,
>> STEP_FOREVER)) ||
>> IS_DG2_G12(i915))
>>
>> Note that we are there is still a pending decision for G11, so we may
>> need to update this in the future.
>
>I believe we're only supporting production steppings for DG2,
>henceforth, not really interacting with the "older" steppings.
>
>Please have a look:
>
>https://lore.kernel.org/intel-gfx/20230816214201.534095-7-matthew.d.ro...@intel.com/
Oh, I missed that. Thanks!
So I believe we would have the following condition instead:
if (IS_DG2_G10(i915) || IS_DG2_G12(i915))
, because we do not know yet if this will also apply to DG2 G11.
--
Gustavo Sousa
>
>Although, I could be wrong, if I am, I'll send in another version,
>modifying the patch as you've suggested.
>
>> --
>> Gustavo Sousa
>>
>>> }
>>>
>>> if (IS_DG2_G11(i915)) {
>>> --
>>> 2.34.1
>>>
>--
>-shekhar
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/irq: Clear GFX_MSTR_IRQ as part of IRQ reset (rev3)
== Series Details == Series: drm/i915/irq: Clear GFX_MSTR_IRQ as part of IRQ reset (rev3) URL : https://patchwork.freedesktop.org/series/123928/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13669 -> Patchwork_123928v3 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_123928v3 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_123928v3, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/index.html Participating hosts (39 -> 37) -- Missing(2): fi-snb-2520m fi-pnv-d510 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_123928v3: ### IGT changes ### Possible regressions * igt@kms_force_connector_basic@force-connector-state: - bat-rpls-1: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13669/bat-rpls-1/igt@kms_force_connector_ba...@force-connector-state.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-rpls-1/igt@kms_force_connector_ba...@force-connector-state.html Known issues Here are the changes found in Patchwork_123928v3 that come from known issues: ### CI changes ### Issues hit * boot: - fi-hsw-4770:[PASS][3] -> [FAIL][4] ([i915#8293]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13669/fi-hsw-4770/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#9318]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-9: [PASS][6] -> [INCOMPLETE][7] ([i915#9275]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13669/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html - bat-mtlp-8: NOTRUN -> [ABORT][8] ([i915#9262]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@gem_exec_suspend@basic...@smem.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4083]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4077]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4079]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#6621]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@i915_pm_...@basic-api.html * igt@i915_suspend@basic-s3-without-i915: - bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#6645]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#5190]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#4212]) +8 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][17] ([i915#4213]) +1 other test skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-mtlp-8: NOTRUN -> [SKIP][18] ([i915#3555] / [i915#3840] / [i915#9159]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123928v3/bat-mtlp-8/igt@kms_...@dsc-basic.html *
Re: [Intel-gfx] [PATCH 1/8] drm/display/dp: Add helper function to get DSC bpp prescision
On Thu, Sep 21, 2023 at 10:41:43AM +0300, Jani Nikula wrote: > On Wed, 13 Sep 2023, Mitul Golani > wrote: > > From: Ankit Nautiyal > > > > Add helper to get the DSC bits_per_pixel precision for the DP sink. > > > > Signed-off-by: Ankit Nautiyal > > Maarten, Maxime, Thomas, ack for merging this via drm-intel please? That's fine by me :) Maxime signature.asc Description: PGP signature
Re: [Intel-gfx] [PATCH 5/5] drm/i915: Implement fdinfo memory stats printing
Hi Tvrtko,
On Thu, Sep 21, 2023 at 12:48:52PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Use the newly added drm_print_memory_stats helper to show memory
> utilisation of our objects in drm/driver specific fdinfo output.
>
> To collect the stats we walk the per memory regions object lists
> and accumulate object size into the respective drm_memory_stats
> categories.
>
> Objects with multiple possible placements are reported in multiple
> regions for total and shared sizes, while other categories are
> counted only for the currently active region.
>
> v2:
> * Only account against the active region.
> * Use DMA_RESV_USAGE_BOOKKEEP when testing for active. (Tejas)
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Aravind Iddamsetty
> Cc: Rob Clark
> Cc: Andi Shyti
> Cc: Tejas Upadhyay
> Reviewed-by: Andi Shyti # v1
Reiewed also this version :)
Thanks,
Andi
> ---
> drivers/gpu/drm/i915/i915_drm_client.c | 64 ++
> 1 file changed, 64 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
> b/drivers/gpu/drm/i915/i915_drm_client.c
> index a61356012df8..94abc2fb2ea6 100644
> --- a/drivers/gpu/drm/i915/i915_drm_client.c
> +++ b/drivers/gpu/drm/i915/i915_drm_client.c
> @@ -45,6 +45,68 @@ void __i915_drm_client_free(struct kref *kref)
> }
>
> #ifdef CONFIG_PROC_FS
> +static void
> +obj_meminfo(struct drm_i915_gem_object *obj,
> + struct drm_memory_stats stats[INTEL_REGION_UNKNOWN])
> +{
> + const enum intel_region_id id = obj->mm.region ?
> + obj->mm.region->id : INTEL_REGION_SMEM;
> + const u64 sz = obj->base.size;
> +
> + if (obj->base.handle_count > 1)
> + stats[id].shared += sz;
> + else
> + stats[id].private += sz;
> +
> + if (i915_gem_object_has_pages(obj)) {
> + stats[id].resident += sz;
> +
> + if (!dma_resv_test_signaled(obj->base.resv,
> + DMA_RESV_USAGE_BOOKKEEP))
> + stats[id].active += sz;
> + else if (i915_gem_object_is_shrinkable(obj) &&
> + obj->mm.madv == I915_MADV_DONTNEED)
> + stats[id].purgeable += sz;
> + }
> +}
> +
> +static void show_meminfo(struct drm_printer *p, struct drm_file *file)
> +{
> + struct drm_memory_stats stats[INTEL_REGION_UNKNOWN] = {};
> + struct drm_i915_file_private *fpriv = file->driver_priv;
> + struct i915_drm_client *client = fpriv->client;
> + struct drm_i915_private *i915 = fpriv->i915;
> + struct drm_i915_gem_object *obj;
> + struct intel_memory_region *mr;
> + struct list_head *pos;
> + unsigned int id;
> +
> + /* Public objects. */
> + spin_lock(>table_lock);
> + idr_for_each_entry(>object_idr, obj, id)
> + obj_meminfo(obj, stats);
> + spin_unlock(>table_lock);
> +
> + /* Internal objects. */
> + rcu_read_lock();
> + list_for_each_rcu(pos, >objects_list) {
> + obj = i915_gem_object_get_rcu(list_entry(pos, typeof(*obj),
> + client_link));
> + if (!obj)
> + continue;
> + obj_meminfo(obj, stats);
> + i915_gem_object_put(obj);
> + }
> + rcu_read_unlock();
> +
> + for_each_memory_region(mr, i915, id)
> + drm_print_memory_stats(p,
> +[id],
> +DRM_GEM_OBJECT_RESIDENT |
> +DRM_GEM_OBJECT_PURGEABLE,
> +mr->name);
> +}
> +
> static const char * const uabi_class_names[] = {
> [I915_ENGINE_CLASS_RENDER] = "render",
> [I915_ENGINE_CLASS_COPY] = "copy",
> @@ -106,6 +168,8 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct
> drm_file *file)
>* **
>*/
>
> + show_meminfo(p, file);
> +
> if (GRAPHICS_VER(i915) < 8)
> return;
>
> --
> 2.39.2
Re: [Intel-gfx] [PATCH 5/5] drm/i915: Implement fdinfo memory stats printing
On 22/09/2023 09:48, Iddamsetty, Aravind wrote:
On 21-09-2023 17:18, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we walk the per memory regions object lists
and accumulate object size into the respective drm_memory_stats
categories.
Objects with multiple possible placements are reported in multiple
regions for total and shared sizes, while other categories are
I guess you forgot to correct this.
Ah yes, will fix.
counted only for the currently active region.
v2:
* Only account against the active region.
* Use DMA_RESV_USAGE_BOOKKEEP when testing for active. (Tejas)
Signed-off-by: Tvrtko Ursulin
Cc: Aravind Iddamsetty
Cc: Rob Clark
Cc: Andi Shyti
Cc: Tejas Upadhyay
Reviewed-by: Andi Shyti # v1
---
drivers/gpu/drm/i915/i915_drm_client.c | 64 ++
1 file changed, 64 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drm_client.c
b/drivers/gpu/drm/i915/i915_drm_client.c
index a61356012df8..94abc2fb2ea6 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.c
+++ b/drivers/gpu/drm/i915/i915_drm_client.c
@@ -45,6 +45,68 @@ void __i915_drm_client_free(struct kref *kref)
}
#ifdef CONFIG_PROC_FS
+static void
+obj_meminfo(struct drm_i915_gem_object *obj,
+ struct drm_memory_stats stats[INTEL_REGION_UNKNOWN])
+{
+ const enum intel_region_id id = obj->mm.region ?
+ obj->mm.region->id : INTEL_REGION_SMEM;
+ const u64 sz = obj->base.size;
+
+ if (obj->base.handle_count > 1)
+ stats[id].shared += sz;
+ else
+ stats[id].private += sz;
+
+ if (i915_gem_object_has_pages(obj)) {
+ stats[id].resident += sz;
+
+ if (!dma_resv_test_signaled(obj->base.resv,
+ DMA_RESV_USAGE_BOOKKEEP))
+ stats[id].active += sz;
+ else if (i915_gem_object_is_shrinkable(obj) &&
+obj->mm.madv == I915_MADV_DONTNEED)
+ stats[id].purgeable += sz;
+ }
+}
+
+static void show_meminfo(struct drm_printer *p, struct drm_file *file)
+{
+ struct drm_memory_stats stats[INTEL_REGION_UNKNOWN] = {};
+ struct drm_i915_file_private *fpriv = file->driver_priv;
+ struct i915_drm_client *client = fpriv->client;
+ struct drm_i915_private *i915 = fpriv->i915;
+ struct drm_i915_gem_object *obj;
+ struct intel_memory_region *mr;
+ struct list_head *pos;
+ unsigned int id;
+
+ /* Public objects. */
+ spin_lock(>table_lock);
+ idr_for_each_entry(>object_idr, obj, id)
+ obj_meminfo(obj, stats);
+ spin_unlock(>table_lock);
+
+ /* Internal objects. */
+ rcu_read_lock();
+ list_for_each_rcu(pos, >objects_list) {
+ obj = i915_gem_object_get_rcu(list_entry(pos, typeof(*obj),
+client_link));
+ if (!obj)
+ continue;
+ obj_meminfo(obj, stats);
+ i915_gem_object_put(obj);
+ }
+ rcu_read_unlock();
+
+ for_each_memory_region(mr, i915, id)
+ drm_print_memory_stats(p,
+ [id],
+ DRM_GEM_OBJECT_RESIDENT |
+ DRM_GEM_OBJECT_PURGEABLE,
+ mr->name);
+}
+
static const char * const uabi_class_names[] = {
[I915_ENGINE_CLASS_RENDER] = "render",
[I915_ENGINE_CLASS_COPY] = "copy",
@@ -106,6 +168,8 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct
drm_file *file)
* **
*/
+ show_meminfo(p, file);
+
if (GRAPHICS_VER(i915) < 8)
return;
Reviewed-by: Aravind Iddamsetty
Thank you! Would you be able to also look at the IGTs I posted yesterday?
Regards,
Tvrtko
[Intel-gfx] [PATCH] drm/i915/dp: refactor aux_ch_name()
Convert aux_ch_name() to a helper that prints a string to a caller
provided buffer, and use it to get more consistent aux channel
debugs. Now that all users of aux_ch_name() are in intel_dp_aux.c, we
can make it static too.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.h | 2 -
drivers/gpu/drm/i915/display/intel_dp_aux.c | 41
2 files changed, 25 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index 49ac8473b988..9f252d1f03a7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -190,8 +190,6 @@ enum aux_ch {
AUX_CH_E_XELPD,
};
-#define aux_ch_name(a) ((a) + 'A')
-
enum phy {
PHY_NONE = -1,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index b90cad7f567b..4431b6290c4c 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -14,6 +14,21 @@
#include "intel_pps.h"
#include "intel_tc.h"
+#define AUX_CH_NAME_BUFSIZE6
+
+static const char *aux_ch_name(struct drm_i915_private *i915,
+ char *buf, int size, enum aux_ch aux_ch)
+{
+ if (DISPLAY_VER(i915) >= 13 && aux_ch >= AUX_CH_D_XELPD)
+ snprintf(buf, size, "%c", 'A' + aux_ch - AUX_CH_D_XELPD +
AUX_CH_D);
+ else if (DISPLAY_VER(i915) >= 12 && aux_ch >= AUX_CH_USBC1)
+ snprintf(buf, size, "USBC%c", '1' + aux_ch - AUX_CH_USBC1);
+ else
+ snprintf(buf, size, "%c", 'A' + aux_ch);
+
+ return buf;
+}
+
u32 intel_dp_aux_pack(const u8 *src, int src_bytes)
{
int i;
@@ -728,6 +743,7 @@ void intel_dp_aux_init(struct intel_dp *intel_dp)
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct intel_encoder *encoder = _port->base;
enum aux_ch aux_ch = dig_port->aux_ch;
+ char buf[AUX_CH_NAME_BUFSIZE];
if (DISPLAY_VER(dev_priv) >= 14) {
intel_dp->aux_ch_ctl_reg = xelpdp_aux_ctl_reg;
@@ -764,18 +780,9 @@ void intel_dp_aux_init(struct intel_dp *intel_dp)
drm_dp_aux_init(_dp->aux);
/* Failure to allocate our preferred name is not critical */
- if (DISPLAY_VER(dev_priv) >= 13 && aux_ch >= AUX_CH_D_XELPD)
- intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX %c/%s",
- aux_ch_name(aux_ch -
AUX_CH_D_XELPD + AUX_CH_D),
- encoder->base.name);
- else if (DISPLAY_VER(dev_priv) >= 12 && aux_ch >= AUX_CH_USBC1)
- intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX USBC%c/%s",
- aux_ch - AUX_CH_USBC1 + '1',
- encoder->base.name);
- else
- intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX %c/%s",
- aux_ch_name(aux_ch),
- encoder->base.name);
+ intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX %s/%s",
+ aux_ch_name(dev_priv, buf, sizeof(buf),
aux_ch),
+ encoder->base.name);
intel_dp->aux.transfer = intel_dp_aux_transfer;
cpu_latency_qos_add_request(_dp->pm_qos, PM_QOS_DEFAULT_VALUE);
@@ -819,6 +826,7 @@ enum aux_ch intel_dp_aux_ch(struct intel_encoder *encoder)
struct intel_encoder *other;
const char *source;
enum aux_ch aux_ch;
+ char buf[AUX_CH_NAME_BUFSIZE];
aux_ch = intel_bios_dp_aux_ch(encoder->devdata);
source = "VBT";
@@ -836,16 +844,17 @@ enum aux_ch intel_dp_aux_ch(struct intel_encoder *encoder)
other = get_encoder_by_aux_ch(encoder, aux_ch);
if (other) {
drm_dbg_kms(>drm,
- "[ENCODER:%d:%s] AUX CH %c already claimed by
[ENCODER:%d:%s]\n",
- encoder->base.base.id, encoder->base.name,
aux_ch_name(aux_ch),
+ "[ENCODER:%d:%s] AUX CH %s already claimed by
[ENCODER:%d:%s]\n",
+ encoder->base.base.id, encoder->base.name,
+ aux_ch_name(i915, buf, sizeof(buf), aux_ch),
other->base.base.id, other->base.name);
return AUX_CH_NONE;
}
drm_dbg_kms(>drm,
- "[ENCODER:%d:%s] Using AUX CH %c (%s)\n",
+ "[ENCODER:%d:%s] Using AUX CH %s (%s)\n",
encoder->base.base.id, encoder->base.name,
- aux_ch_name(aux_ch), source);
+ aux_ch_name(i915, buf, sizeof(buf), aux_ch), source);
return aux_ch;
}
--
2.39.2
Re: [Intel-gfx] [PATCH 1/7] drm/i915: Lift runtime-pm acquire callbacks out of intel_wakeref.mutex
Hi Jani,
[...]
> > * upon acquiring the wakeref.
> > */
> > mutex_lock_nested(>mutex, SINGLE_DEPTH_NESTING);
> > - if (!atomic_read(>count)) {
> > - int err;
> >
> > - rpm_get(wf);
> > + if (likely(!atomic_read(>count))) {
>
> Adding the likely should be a separate patch with rationale, not a
> random drive-by change. (And maybe it just should not be added at all.)
Agree, this can be made in a separate patch.
> > + INTEL_WAKEREF_BUG_ON(wf->wakeref);
> > + wf->wakeref = fetch_and_zero();
>
> fetch_and_zero() should just die. All it does here is make things more
> confusing, not less. Please don't add new users.
>
> The get and put helpers could probably stay, modified, to make this more
> readable.
it actually looks straight forward to me and even more
understandable. get/put are OK if there are multiple users, but
when used in such simple context it looks a bit of an overkill.
Especially when we don't need anymore the actions taken bu get
and put.
So that replacing the pointer with NULL is a natural process, no?
Andi
[Intel-gfx] ✓ Fi.CI.IGT: success for MAINTAINERS: Update drm-misc entry to match all drivers
== Series Details == Series: MAINTAINERS: Update drm-misc entry to match all drivers URL : https://patchwork.freedesktop.org/series/124045/ State : success == Summary == CI Bug Log - changes from CI_DRM_13664_full -> Patchwork_124045v1_full Summary --- **SUCCESS** No regressions found. Participating hosts (9 -> 9) -- No changes in participating hosts Known issues Here are the changes found in Patchwork_124045v1_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@object-reloc-keep-cache: - shard-dg2: NOTRUN -> [SKIP][1] ([i915#8411]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-3/igt@api_intel...@object-reloc-keep-cache.html * igt@drm_fdinfo@isolation@bcs0: - shard-dg2: NOTRUN -> [SKIP][2] ([i915#8414]) +9 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-3/igt@drm_fdinfo@isolat...@bcs0.html * igt@drm_fdinfo@most-busy-idle-check-all@rcs0: - shard-rkl: [PASS][3] -> [FAIL][4] ([i915#7742]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13664/shard-rkl-7/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html * igt@gem_busy@semaphore: - shard-dg2: NOTRUN -> [SKIP][5] ([i915#3936]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-5/igt@gem_b...@semaphore.html * igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0: - shard-dg2: NOTRUN -> [INCOMPLETE][6] ([i915#7297]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-5/igt@gem_ccs@suspend-res...@xmajor-compressed-compfmt0-lmem0-lmem0.html * igt@gem_close_race@multigpu-basic-process: - shard-dg2: NOTRUN -> [SKIP][7] ([i915#7697]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-3/igt@gem_close_r...@multigpu-basic-process.html * igt@gem_ctx_persistence@legacy-engines-persistence: - shard-snb: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1099]) +2 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-snb5/igt@gem_ctx_persiste...@legacy-engines-persistence.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][9] -> [FAIL][10] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13664/shard-glk4/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-glk8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-rkl: [PASS][11] -> [FAIL][12] ([i915#2842]) +1 other test fail [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13664/shard-rkl-7/igt@gem_exec_fair@basic-p...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-rkl-4/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_exec_fair@basic-sync: - shard-dg2: NOTRUN -> [SKIP][13] ([i915#3539]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-3/igt@gem_exec_f...@basic-sync.html * igt@gem_exec_fence@submit67: - shard-dg2: NOTRUN -> [SKIP][14] ([i915#4812]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-11/igt@gem_exec_fe...@submit67.html - shard-dg1: NOTRUN -> [SKIP][15] ([i915#4812]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg1-18/igt@gem_exec_fe...@submit67.html * igt@gem_exec_flush@basic-batch-kernel-default-wb: - shard-dg1: NOTRUN -> [SKIP][16] ([i915#3539] / [i915#4852]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg1-18/igt@gem_exec_fl...@basic-batch-kernel-default-wb.html * igt@gem_exec_flush@basic-wb-rw-before-default: - shard-dg2: NOTRUN -> [SKIP][17] ([i915#3539] / [i915#4852]) +2 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-1/igt@gem_exec_fl...@basic-wb-rw-before-default.html * igt@gem_exec_reloc@basic-cpu-gtt-noreloc: - shard-mtlp: NOTRUN -> [SKIP][18] ([i915#3281]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-mtlp-3/igt@gem_exec_re...@basic-cpu-gtt-noreloc.html * igt@gem_exec_reloc@basic-gtt-cpu-active: - shard-dg2: NOTRUN -> [SKIP][19] ([i915#3281]) +8 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124045v1/shard-dg2-3/igt@gem_exec_re...@basic-gtt-cpu-active.html * igt@gem_exec_reloc@basic-range-active: - shard-dg1: NOTRUN -> [SKIP][20] ([i915#3281]) [20]:
