[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Add error handling in intel_timeline_pin() (rev2)
== Series Details == Series: drm/i915/gt: Add error handling in intel_timeline_pin() (rev2) URL : https://patchwork.freedesktop.org/series/124189/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13677_full -> Patchwork_124189v2_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124189v2_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124189v2_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (10 -> 9) -- Missing(1): shard-tglu0 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124189v2_full: ### IGT changes ### Possible regressions * igt@gem_workarounds@suspend-resume-fd: - shard-tglu: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-tglu-4/igt@gem_workarou...@suspend-resume-fd.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-tglu-2/igt@gem_workarou...@suspend-resume-fd.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a3: - shard-dg2: NOTRUN -> [FAIL][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-dg2-7/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-hdmi-a3.html Known issues Here are the changes found in Patchwork_124189v2_full that come from known issues: ### IGT changes ### Issues hit * igt@drm_fdinfo@busy-idle@bcs0: - shard-dg2: NOTRUN -> [SKIP][4] ([i915#8414]) +20 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-dg2-10/igt@drm_fdinfo@busy-i...@bcs0.html * igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-lmem0-lmem0: - shard-dg2: [PASS][5] -> [INCOMPLETE][6] ([i915#7297]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-dg2-11/igt@gem_ccs@suspend-res...@tile64-compressed-compfmt0-lmem0-lmem0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-dg2-1/igt@gem_ccs@suspend-res...@tile64-compressed-compfmt0-lmem0-lmem0.html * igt@gem_ctx_persistence@smoketest: - shard-tglu: [PASS][7] -> [FAIL][8] ([i915#5099]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-tglu-4/igt@gem_ctx_persiste...@smoketest.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-tglu-6/igt@gem_ctx_persiste...@smoketest.html * igt@gem_eio@reset-stress: - shard-dg1: [PASS][9] -> [FAIL][10] ([i915#5784]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-dg1-12/igt@gem_...@reset-stress.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-dg1-19/igt@gem_...@reset-stress.html * igt@gem_exec_balancer@sliced: - shard-dg2: NOTRUN -> [SKIP][11] ([i915#4812]) +2 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-dg2-10/igt@gem_exec_balan...@sliced.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglu: [PASS][12] -> [FAIL][13] ([i915#2842]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-tglu-8/igt@gem_exec_fair@basic-f...@rcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-tglu-10/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-glk: [PASS][14] -> [FAIL][15] ([i915#2842]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-glk3/igt@gem_exec_fair@basic-p...@rcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-glk6/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_exec_flush@basic-wb-pro-default: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#3539] / [i915#4852]) +2 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-dg2-7/igt@gem_exec_fl...@basic-wb-pro-default.html * igt@gem_exec_gttfill@multigpu-basic: - shard-tglu: NOTRUN -> [SKIP][17] ([i915#7697]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-tglu-6/igt@gem_exec_gttf...@multigpu-basic.html * igt@gem_exec_reloc@basic-wc-gtt: - shard-dg2: NOTRUN -> [SKIP][18] ([i915#3281]) +5 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/shard-dg2-10/igt@gem_exec_re...@basic-wc-gtt.html * igt@gem_exec_schedule@noreorder@ccs0: - shard-mtlp: [PASS][19] -> [DMESG-FAIL][20] ([i915#8962] / [i915#9121]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-mtlp-7/igt@gem_exec_schedule@noreor...@ccs0.html [20]:
Re: [Intel-gfx] [PATCH v3 19/25] drm/i915/dp_mst: Program the DSC PPS SDP for each stream
On Thu, Sep 14, 2023 at 10:26:53PM +0300, Imre Deak wrote:
> Atm the DSC PPS SDP is programmed only if the first stream is compressed
> and then it's programmed only for the first stream. This left all other
> compressed streams blank. Program the SDP for all streams.
>
> Signed-off-by: Imre Deak
Reviewed-by: Stanislav Lisovskiy
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c| 12 +++-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++
> 2 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 45db6349af94f..962c9c7c211ce 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2505,7 +2505,8 @@ static void mtl_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
> /* 6.o Configure and enable FEC if needed */
> intel_ddi_enable_fec(encoder, crtc_state);
>
> - intel_dsc_dp_pps_write(encoder, crtc_state);
> + if (!is_mst)
> + intel_dsc_dp_pps_write(encoder, crtc_state);
> }
>
> static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> @@ -2643,7 +2644,8 @@ static void tgl_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
> /* 7.l Configure and enable FEC if needed */
> intel_ddi_enable_fec(encoder, crtc_state);
>
> - intel_dsc_dp_pps_write(encoder, crtc_state);
> + if (!is_mst)
> + intel_dsc_dp_pps_write(encoder, crtc_state);
> }
>
> static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
> @@ -2705,10 +2707,10 @@ static void hsw_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
>
> intel_ddi_enable_fec(encoder, crtc_state);
>
> - if (!is_mst)
> + if (!is_mst) {
> intel_ddi_enable_transcoder_clock(encoder, crtc_state);
> -
> - intel_dsc_dp_pps_write(encoder, crtc_state);
> + intel_dsc_dp_pps_write(encoder, crtc_state);
> + }
> }
>
> static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 832e8b0e87e84..19548242fa0f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -43,6 +43,7 @@
> #include "intel_dpio_phy.h"
> #include "intel_hdcp.h"
> #include "intel_hotplug.h"
> +#include "intel_vdsc.h"
> #include "skl_scaler.h"
>
> static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int
> bpp,
> @@ -775,6 +776,7 @@ static void intel_mst_pre_enable_dp(struct
> intel_atomic_state *state,
> if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream)
> intel_ddi_enable_transcoder_clock(encoder, pipe_config);
>
> + intel_dsc_dp_pps_write(_port->base, pipe_config);
> intel_ddi_set_dp_msa(pipe_config, conn_state);
> }
>
> --
> 2.37.2
>
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add missing CCS documentation. (rev2)
== Series Details ==
Series: drm/i915: Add missing CCS documentation. (rev2)
URL : https://patchwork.freedesktop.org/series/122807/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13679 -> Patchwork_122807v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/index.html
Participating hosts (37 -> 38)
--
Additional (2): fi-kbl-soraka fi-pnv-d510
Missing(1): fi-snb-2520m
Known issues
Here are the changes found in Patchwork_122807v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3
other tests skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-cfl-guc: [PASS][3] -> [DMESG-FAIL][4] ([i915#5334])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/fi-cfl-guc/igt@i915_selftest@live@gt_heartbeat.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/fi-cfl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_lrc:
- bat-dg2-11: [PASS][5] -> [INCOMPLETE][6] ([i915#7609] /
[i915#7913])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#7913])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@requests:
- bat-atsm-1: [PASS][8] -> [INCOMPLETE][9] ([i915#7913])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/bat-atsm-1/igt@i915_selftest@l...@requests.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/bat-atsm-1/igt@i915_selftest@l...@requests.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][10] ([fdo#109271]) +9 other tests
skip
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/fi-kbl-soraka/igt@kms_...@dsc-basic.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- fi-kbl-x1275: NOTRUN -> [SKIP][11] ([fdo#109271])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/fi-kbl-x1275/igt@kms_pipe_crc_ba...@suspend-read-crc.html
* igt@kms_psr@primary_page_flip:
- fi-pnv-d510:NOTRUN -> [SKIP][12] ([fdo#109271]) +31 other tests
skip
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/fi-pnv-d510/igt@kms_psr@primary_page_flip.html
Possible fixes
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [FAIL][13] ([IGT#3]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#7609]: https://gitlab.freedesktop.org/drm/intel/issues/7609
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
Build changes
-
* Linux: CI_DRM_13679 -> Patchwork_122807v2
CI-20190529: 20190529
CI_DRM_13679: 6dad88365b6dfbe68e8b527c421369d2c6620049 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7502: ac56ba97248b33668fbe771882360bd7b274cc9a @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_122807v2: 6dad88365b6dfbe68e8b527c421369d2c6620049 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
61dd2170f0ff drm/i915: Add missing CCS documentation.
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122807v2/index.html
[Intel-gfx] linux-next: build warning after merge of the drm-misc tree
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced this warning:
Error: Cannot open file /home/sfr/next/next/drivers/gpu/drm/drm_gpuva_mgr.c
Error: Cannot open file /home/sfr/next/next/include/drm/drm_gpuva_mgr.h
Introduced by commit
f72c2db47080 ("drm/gpuvm: rename struct drm_gpuva_manager to struct
drm_gpuvm")
--
Cheers,
Stephen Rothwell
pgphiWJxtKLWJ.pgp
Description: OpenPGP digital signature
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Do not disable preemption for resets (rev3)
== Series Details == Series: drm/i915: Do not disable preemption for resets (rev3) URL : https://patchwork.freedesktop.org/series/120218/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13677_full -> Patchwork_120218v3_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_120218v3_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_120218v3_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (10 -> 10) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_120218v3_full: ### IGT changes ### Possible regressions * igt@gem_ctx_isolation@preservation-s3@vcs0: - shard-dg2: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg2-5/igt@gem_ctx_isolation@preservation...@vcs0.html Known issues Here are the changes found in Patchwork_120218v3_full that come from known issues: ### IGT changes ### Issues hit * igt@drm_fdinfo@busy-idle@bcs0: - shard-dg2: NOTRUN -> [SKIP][2] ([i915#8414]) +20 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg2-7/igt@drm_fdinfo@busy-i...@bcs0.html * igt@gem_ctx_isolation@preservation-s3@vcs0: - shard-mtlp: [PASS][3] -> [DMESG-WARN][4] ([i915#9262]) +2 other tests dmesg-warn [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-mtlp-3/igt@gem_ctx_isolation@preservation...@vcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-mtlp-4/igt@gem_ctx_isolation@preservation...@vcs0.html * igt@gem_ctx_persistence@heartbeat-close: - shard-dg2: NOTRUN -> [SKIP][5] ([i915#8555]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg2-11/igt@gem_ctx_persiste...@heartbeat-close.html * igt@gem_eio@reset-stress: - shard-dg1: [PASS][6] -> [FAIL][7] ([i915#5784]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-dg1-12/igt@gem_...@reset-stress.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg1-17/igt@gem_...@reset-stress.html * igt@gem_exec_balancer@sliced: - shard-dg2: NOTRUN -> [SKIP][8] ([i915#4812]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg2-7/igt@gem_exec_balan...@sliced.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglu: [PASS][9] -> [FAIL][10] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-tglu-8/igt@gem_exec_fair@basic-f...@rcs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-tglu-10/igt@gem_exec_fair@basic-f...@rcs0.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-rkl: [PASS][11] -> [FAIL][12] ([i915#2842]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-rkl-4/igt@gem_exec_fair@basic-p...@bcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-rkl-3/igt@gem_exec_fair@basic-p...@bcs0.html * igt@gem_exec_flush@basic-uc-prw-default: - shard-dg2: NOTRUN -> [SKIP][13] ([i915#3539]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg2-11/igt@gem_exec_fl...@basic-uc-prw-default.html * igt@gem_exec_flush@basic-wb-pro-default: - shard-dg2: NOTRUN -> [SKIP][14] ([i915#3539] / [i915#4852]) +2 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg2-7/igt@gem_exec_fl...@basic-wb-pro-default.html * igt@gem_exec_reloc@basic-wc-gtt: - shard-dg2: NOTRUN -> [SKIP][15] ([i915#3281]) +6 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg2-7/igt@gem_exec_re...@basic-wc-gtt.html * igt@gem_exec_schedule@preempt-queue-chain: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#4537] / [i915#4812]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg2-7/igt@gem_exec_sched...@preempt-queue-chain.html * igt@gem_exec_suspend@basic-s4-devices@lmem0: - shard-dg1: [PASS][17] -> [ABORT][18] ([i915#7975] / [i915#8213]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-dg1-17/igt@gem_exec_suspend@basic-s4-devi...@lmem0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/shard-dg1-14/igt@gem_exec_suspend@basic-s4-devi...@lmem0.html * igt@gem_fenced_exec_thrash@2-spare-fences: - shard-dg2: NOTRUN -> [SKIP][19] ([i915#4860]) +1 other test skip [19]:
[Intel-gfx] ✓ Fi.CI.BAT: success for i915/guc: Get runtime pm in busyness worker only if already active (rev3)
== Series Details ==
Series: i915/guc: Get runtime pm in busyness worker only if already active
(rev3)
URL : https://patchwork.freedesktop.org/series/123744/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13679 -> Patchwork_123744v3
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/index.html
Participating hosts (37 -> 38)
--
Additional (2): fi-kbl-soraka fi-pnv-d510
Missing(1): fi-snb-2520m
Known issues
Here are the changes found in Patchwork_123744v3 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3
other tests skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][3] ([i915#5334] / [i915#7872])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][4] ([i915#1886] / [i915#7913])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271]) +9 other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/fi-kbl-soraka/igt@kms_...@dsc-basic.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- fi-kbl-x1275: NOTRUN -> [SKIP][6] ([fdo#109271])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/fi-kbl-x1275/igt@kms_pipe_crc_ba...@suspend-read-crc.html
* igt@kms_psr@primary_page_flip:
- fi-pnv-d510:NOTRUN -> [SKIP][7] ([fdo#109271]) +31 other tests
skip
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/fi-pnv-d510/igt@kms_psr@primary_page_flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
Build changes
-
* Linux: CI_DRM_13679 -> Patchwork_123744v3
CI-20190529: 20190529
CI_DRM_13679: 6dad88365b6dfbe68e8b527c421369d2c6620049 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7502: ac56ba97248b33668fbe771882360bd7b274cc9a @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_123744v3: 6dad88365b6dfbe68e8b527c421369d2c6620049 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
acbfc7de1a59 i915/guc: Get runtime pm in busyness worker only if already active
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123744v3/index.html
Re: [Intel-gfx] [PATCH v13 1/2] drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123
Hi Jonathan,
kernel test robot noticed the following build warnings:
url:
https://github.com/intel-lab-lkp/linux/commits/Jonathan-Cavitt/drm-i915-Add-WABB-blit-for-Wa_16018031267-Wa_16018063123/20230922-024907
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20230921183729.3763860-2-jonathan.cavitt%40intel.com
patch subject: [Intel-gfx] [PATCH v13 1/2] drm/i915: Add WABB blit for
Wa_16018031267 / Wa_16018063123
config: i386-randconfig-141-20230925
(https://download.01.org/0day-ci/archive/20230925/202309252243.l3lv6ixf-...@intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
(https://download.01.org/0day-ci/archive/20230925/202309252243.l3lv6ixf-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Reported-by: Dan Carpenter
| Closes: https://lore.kernel.org/r/202309252243.l3lv6ixf-...@intel.com/
New smatch warnings:
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:4181 guc_kernel_context_pin()
error: uninitialized symbol 'ret'.
vim +/ret +4181 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4153 static inline int guc_kernel_context_pin(struct intel_guc
*guc,
3a4cdf1982f05d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c Matthew Brost
2021-07-21 4154struct intel_context
*ce)
3a4cdf1982f05d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c Matthew Brost
2021-07-21 4155 {
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4156 int ret;
Please set "ret = 0;" here to avoid an uninitialized variable.
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4157
58ea7d620c5ebc drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-03-01 4158 /*
58ea7d620c5ebc drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-03-01 4159* Note: we purposefully do not check the returns below
because
58ea7d620c5ebc drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-03-01 4160* the registration can only fail if a reset is just
starting.
58ea7d620c5ebc drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-03-01 4161* This is called at the end of reset so presumably
another reset
58ea7d620c5ebc drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-03-01 4162* isn't happening and even it did this code would be
run again.
58ea7d620c5ebc drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-03-01 4163*/
58ea7d620c5ebc drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-03-01 4164
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4165 if (context_guc_id_invalid(ce)) {
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4166 ret = pin_guc_id(guc, ce);
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4167
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4168 if (ret < 0)
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4169 return ret;
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4170 }
58ea7d620c5ebc drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-03-01 4171
de51de9672a17e drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-11-02 4172 if (!test_bit(CONTEXT_GUC_INIT, >flags))
de51de9672a17e drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-11-02 4173 guc_context_init(ce);
de51de9672a17e drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2022-11-02 4174
72d46c25c5d83e drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c Jonathan
Cavitt 2023-09-21 4175 if (!intel_context_is_hidden(ce)) {
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4176 ret = try_context_registration(ce, true);
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4177 if (ret)
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4178 unpin_guc_id(guc, ce);
72d46c25c5d83e drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c Jonathan
Cavitt 2023-09-21 4179 }
cd414f4f59f64d drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c John Harrison
2023-02-17 4180
cd414f4f59f64d drivers/gp
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gem: Make i915_gem_shrinker multi-gt aware (rev3)
== Series Details == Series: drm/i915/gem: Make i915_gem_shrinker multi-gt aware (rev3) URL : https://patchwork.freedesktop.org/series/124112/ State : failure == Summary == Error: make failed CALLscripts/checksyscalls.sh DESCEND objtool INSTALL libsubcmd_headers CC [M] drivers/gpu/drm/i915/gem/i915_gem_shrinker.o drivers/gpu/drm/i915/gem/i915_gem_shrinker.c: In function ‘i915_gem_shrink’: drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:152:5: error: suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else] 152 | if (shrink & I915_SHRINK_ACTIVE) | ^ cc1: all warnings being treated as errors make[6]: *** [scripts/Makefile.build:243: drivers/gpu/drm/i915/gem/i915_gem_shrinker.o] Error 1 make[5]: *** [scripts/Makefile.build:480: drivers/gpu/drm/i915] Error 2 make[4]: *** [scripts/Makefile.build:480: drivers/gpu/drm] Error 2 make[3]: *** [scripts/Makefile.build:480: drivers/gpu] Error 2 make[2]: *** [scripts/Makefile.build:480: drivers] Error 2 make[1]: *** [/home/kbuild/kernel/Makefile:1913: .] Error 2 make: *** [Makefile:234: __sub-make] Error 2 Build failed, no error log produced
Re: [Intel-gfx] [PATCH v3] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
Hi Nirmoy, kernel test robot noticed the following build errors: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-intel/for-linux-next-fixes drm-tip/drm-tip drm/drm-next drm-exynos/exynos-drm-next drm-misc/drm-misc-next linus/master v6.6-rc3 next-20230925] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Nirmoy-Das/drm-i915-gem-Make-i915_gem_shrinker-multi-gt-aware/20230926-020533 base: git://anongit.freedesktop.org/drm-intel for-linux-next patch link: https://lore.kernel.org/r/20230925171048.19245-1-nirmoy.das%40intel.com patch subject: [PATCH v3] drm/i915/gem: Make i915_gem_shrinker multi-gt aware config: i386-randconfig-016-20230926 (https://download.01.org/0day-ci/archive/20230926/202309261109.t06eiy08-...@intel.com/config) compiler: gcc-11 (Debian 11.3.0-12) 11.3.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230926/202309261109.t06eiy08-...@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202309261109.t06eiy08-...@intel.com/ All errors (new ones prefixed by >>): drivers/gpu/drm/i915/gem/i915_gem_shrinker.c: In function 'i915_gem_shrink': >> drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:152:12: error: suggest explicit >> braces to avoid ambiguous 'else' [-Werror=dangling-else] 152 | if (shrink & I915_SHRINK_ACTIVE) |^ cc1: all warnings being treated as errors vim +/else +152 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 2d6692e642e7ca drivers/gpu/drm/i915/i915_gem_shrinker.c Chris Wilson 2019-04-20 75 eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 76 /** eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 77 * i915_gem_shrink - Shrink buffer object caches 772f7bb75dffd4 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c Maarten Lankhorst 2021-04-21 78 * @ww: i915 gem ww acquire ctx, or NULL 56fa4bf2b2f084 drivers/gpu/drm/i915/i915_gem_shrinker.c Chris Wilson 2017-11-23 79 * @i915: i915 device eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 80 * @target: amount of memory to make available, in pages 912d572d63b8cd drivers/gpu/drm/i915/i915_gem_shrinker.c Chris Wilson 2017-09-06 81 * @nr_scanned: optional output for number of pages scanned (incremental) 70972f51819a22 drivers/gpu/drm/i915/gem/i915_gem_shrinker.c Chris Wilson 2019-06-12 82 * @shrink: control flags for selecting cache types eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 83 * eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 84 * This function is the main interface to the shrinker. It will try to release eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 85 * up to @target pages of main memory backing storage from buffer objects. eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 86 * Selection of the specific caches can be done with @flags. This is e.g. useful eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 87 * when purgeable objects should be removed from caches preferentially. eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 88 * eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 89 * Note that it's not guaranteed that released amount is actually available as eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 90 * free system memory - the pages might still be in-used to due to other reasons eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 91 * (like cpu mmaps) or the mm core has reused them before we could grab them. eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 92 * Therefore code that needs to explicitly shrink buffer objects caches (e.g. to eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 93 * avoid deadlocks in memory reclaim) must fall back to i915_gem_shrink_all(). eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrinker.c Daniel Vetter 2015-03-18 94 * eb0b44adc08c0b drivers/gpu/drm/i915/i915_gem_shrink
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: refactor aux_ch_name() (rev3)
== Series Details == Series: drm/i915/dp: refactor aux_ch_name() (rev3) URL : https://patchwork.freedesktop.org/series/124107/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13677_full -> Patchwork_124107v3_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124107v3_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124107v3_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (10 -> 9) -- Missing(1): shard-tglu0 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124107v3_full: ### IGT changes ### Possible regressions * igt@gem_create@create-ext-cpu-access-big: - shard-dg2: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-11/igt@gem_cre...@create-ext-cpu-access-big.html Known issues Here are the changes found in Patchwork_124107v3_full that come from known issues: ### IGT changes ### Issues hit * igt@drm_fdinfo@busy-idle@bcs0: - shard-dg2: NOTRUN -> [SKIP][2] ([i915#8414]) +20 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-2/igt@drm_fdinfo@busy-i...@bcs0.html * igt@gem_ctx_freq@sysfs@gt0: - shard-dg2: [PASS][3] -> [FAIL][4] ([i915#6786]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-dg2-10/igt@gem_ctx_freq@sy...@gt0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-5/igt@gem_ctx_freq@sy...@gt0.html * igt@gem_eio@reset-stress: - shard-dg1: [PASS][5] -> [FAIL][6] ([i915#5784]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-dg1-12/igt@gem_...@reset-stress.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg1-16/igt@gem_...@reset-stress.html * igt@gem_exec_balancer@sliced: - shard-dg2: NOTRUN -> [SKIP][7] ([i915#4812]) +2 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-2/igt@gem_exec_balan...@sliced.html * igt@gem_exec_fair@basic-sync: - shard-mtlp: NOTRUN -> [SKIP][8] ([i915#4473] / [i915#4771]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-mtlp-5/igt@gem_exec_f...@basic-sync.html * igt@gem_exec_flush@basic-wb-pro-default: - shard-dg2: NOTRUN -> [SKIP][9] ([i915#3539] / [i915#4852]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-2/igt@gem_exec_fl...@basic-wb-pro-default.html * igt@gem_exec_gttfill@multigpu-basic: - shard-tglu: NOTRUN -> [SKIP][10] ([i915#7697]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-tglu-8/igt@gem_exec_gttf...@multigpu-basic.html * igt@gem_exec_reloc@basic-wc-gtt: - shard-dg2: NOTRUN -> [SKIP][11] ([i915#3281]) +5 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-2/igt@gem_exec_re...@basic-wc-gtt.html * igt@gem_exec_reloc@basic-wc-read-active: - shard-mtlp: NOTRUN -> [SKIP][12] ([i915#3281]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-mtlp-5/igt@gem_exec_re...@basic-wc-read-active.html * igt@gem_exec_schedule@preempt-queue-chain: - shard-dg2: NOTRUN -> [SKIP][13] ([i915#4537] / [i915#4812]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-2/igt@gem_exec_sched...@preempt-queue-chain.html * igt@gem_fenced_exec_thrash@2-spare-fences: - shard-dg2: NOTRUN -> [SKIP][14] ([i915#4860]) +1 other test skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-2/igt@gem_fenced_exec_thr...@2-spare-fences.html * igt@gem_lmem_evict@dontneed-evict-race: - shard-glk: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-glk4/igt@gem_lmem_ev...@dontneed-evict-race.html * igt@gem_lmem_swapping@heavy-verify-multi: - shard-mtlp: NOTRUN -> [SKIP][16] ([i915#4613]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-mtlp-5/igt@gem_lmem_swapp...@heavy-verify-multi.html * igt@gem_mmap_gtt@cpuset-medium-copy-xy: - shard-dg2: NOTRUN -> [SKIP][17] ([i915#4077]) +7 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/shard-dg2-2/igt@gem_mmap_...@cpuset-medium-copy-xy.html * igt@gem_mmap_wc@bad-object: - shard-dg2: NOTRUN -> [SKIP][18] ([i915#4083]) +3 other tests
Re: [Intel-gfx] [PATCH] drm/i915/gem: Allow users to disable waitboost
Hello,
kernel test robot noticed a -3.2% regression of
phoronix-test-suite.paraview.WaveletContour.1024x768.mipolys___sec on:
commit: 54fef7ea35dadd66193b98805b0bc42ef2b279db ("[PATCH] drm/i915/gem: Allow
users to disable waitboost")
url:
https://github.com/intel-lab-lkp/linux/commits/Vinay-Belgaumkar/drm-i915-gem-Allow-users-to-disable-waitboost/20230921-060357
base: git://anongit.freedesktop.org/drm-intel for-linux-next
patch link:
https://lore.kernel.org/all/20230920215624.3482244-1-vinay.belgaum...@intel.com/
patch subject: [PATCH] drm/i915/gem: Allow users to disable waitboost
testcase: phoronix-test-suite
test machine: 12 threads 1 sockets Intel(R) Core(TM) i7-8700 CPU @ 3.20GHz
(Coffee Lake) with 32G memory
parameters:
need_x: true
test: paraview-1.0.2
option_a: Wavelet Contour
option_b: 1024 x 768
cpufreq_governor: performance
In addition to that, the commit also has significant impact on the following
tests:
+--++
| testcase: change | phoronix-test-suite:
phoronix-test-suite.x11perf.PutImageXY500x500Square.operations___second 12.8%
improvement |
| test machine | 12 threads 1 sockets Intel(R) Core(TM) i7-8700 CPU @
3.20GHz (Coffee Lake) with 32G memory |
| test parameters | cpufreq_governor=performance
|
| | need_x=true
|
| | option_a=PutImage XY 500x500 Square
|
| | test=x11perf-1.1.1
|
+--++
| testcase: change | phoronix-test-suite:
phoronix-test-suite.openarena.2560x1440.milliseconds -12.2% regression
|
| test machine | 12 threads 1 sockets Intel(R) Core(TM) i7-8700 CPU @
3.20GHz (Coffee Lake) with 32G memory |
| test parameters | cpufreq_governor=performance
|
| | need_x=true
|
| | option_a=2560 x 1440
|
| | test=openarena-1.5.5
|
+--++
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-lkp/202309261055.b74df987-oliver.s...@intel.com
Details are as below:
-->
The kernel config and materials to reproduce are available at:
https://download.01.org/0day-ci/archive/20230926/202309261055.b74df987-oliver.s...@intel.com
=
compiler/cpufreq_governor/kconfig/need_x/option_a/option_b/rootfs/tbox_group/test/testcase:
gcc-12/performance/x86_64-rhel-8.3/true/Wavelet Contour/1024 x
768/debian-x86_64-phoronix/lkp-cfl-d2/paraview-1.0.2/phoronix-test-suite
commit:
16a9359401 ("drm/i915: Implement transcoder LRR for TGL+")
54fef7ea35 ("drm/i915/gem: Allow users to disable waitboost")
16a9359401edcbc0 54fef7ea35dadd66193b98805b0
---
%stddev %change %stddev
\ |\
0.05 ± 4% +0.00.06 ± 2% mpstat.cpu.all.soft%
66.17 ± 60%+145.6% 162.50 ± 33% turbostat.C10
28.61-3.3% 27.68
phoronix-test-suite.paraview.WaveletContour.1024x768.frames___sec
298.15-3.2% 288.49
phoronix-test-suite.paraview.WaveletContour.1024x768.mipolys___sec
535005+8.6% 580810
phoronix-test-suite.time.minor_page_faults
6278+8.3% 6797
phoronix-test-suite.time.voluntary_context_switches
801166+5.6% 845675proc-vmstat.numa_hit
799382+5.1% 840353proc-vmstat.numa_local
59648+2.6% 61211proc-vmstat.pgactivate
1539307+2.7%1580759
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove unnecessary memory quiescing for aux inval (rev2)
== Series Details ==
Series: drm/i915: Remove unnecessary memory quiescing for aux inval (rev2)
URL : https://patchwork.freedesktop.org/series/123975/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13679 -> Patchwork_123975v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/index.html
Participating hosts (37 -> 37)
--
Additional (2): fi-kbl-soraka fi-pnv-d510
Missing(2): fi-hsw-4770 fi-snb-2520m
Known issues
Here are the changes found in Patchwork_123975v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s0@lmem0:
- bat-dg2-9: [PASS][1] -> [INCOMPLETE][2] ([i915#9275])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3
other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@execlists:
- fi-bsw-nick:[PASS][5] -> [INCOMPLETE][6] ([i915#7913])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#5334] / [i915#7872])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][8] ([i915#1886] / [i915#7913])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@mman:
- bat-rpls-1: [PASS][9] -> [TIMEOUT][10] ([i915#6794] / [i915#7392])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/bat-rpls-1/igt@i915_selftest@l...@mman.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/bat-rpls-1/igt@i915_selftest@l...@mman.html
* igt@i915_selftest@live@slpc:
- fi-kbl-soraka: NOTRUN -> [ABORT][11] ([i915#7913])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-kbl-soraka/igt@i915_selftest@l...@slpc.html
* igt@i915_suspend@basic-s2idle-without-i915:
- bat-rpls-1: [PASS][12] -> [WARN][13] ([i915#8747])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/bat-rpls-1/igt@i915_susp...@basic-s2idle-without-i915.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/bat-rpls-1/igt@i915_susp...@basic-s2idle-without-i915.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271]) +9 other tests
skip
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-kbl-soraka/igt@kms_...@dsc-basic.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- fi-kbl-x1275: NOTRUN -> [SKIP][15] ([fdo#109271])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-kbl-x1275/igt@kms_pipe_crc_ba...@suspend-read-crc.html
* igt@kms_psr@primary_page_flip:
- fi-pnv-d510:NOTRUN -> [SKIP][16] ([fdo#109271]) +31 other tests
skip
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123975v2/fi-pnv-d510/igt@kms_psr@primary_page_flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
[i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#8747]: https://gitlab.freedesktop.org/drm/intel/issues/8747
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
Build changes
-
* Linux: CI_DRM_13679 -> Patchwork_123975v2
CI-20190529: 20190529
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Convert fbdev to DRM client (rev4)
== Series Details == Series: drm/i915: Convert fbdev to DRM client (rev4) URL : https://patchwork.freedesktop.org/series/115714/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13677_full -> Patchwork_115714v4_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_115714v4_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_115714v4_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (10 -> 10) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_115714v4_full: ### IGT changes ### Possible regressions * igt@gem_create@create-ext-cpu-access-big: - shard-dg2: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-dg2-11/igt@gem_cre...@create-ext-cpu-access-big.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-tglu: [PASS][2] -> [ABORT][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-tglu-4/igt@i915_susp...@fence-restore-tiled2untiled.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-tglu-5/igt@i915_susp...@fence-restore-tiled2untiled.html Known issues Here are the changes found in Patchwork_115714v4_full that come from known issues: ### IGT changes ### Issues hit * igt@drm_fdinfo@busy-idle@bcs0: - shard-dg2: NOTRUN -> [SKIP][4] ([i915#8414]) +20 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-dg2-3/igt@drm_fdinfo@busy-i...@bcs0.html * igt@gem_ccs@block-copy-compressed: - shard-mtlp: NOTRUN -> [SKIP][5] ([i915#3555]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-mtlp-1/igt@gem_...@block-copy-compressed.html * igt@gem_create@create-ext-cpu-access-sanity-check: - shard-mtlp: NOTRUN -> [SKIP][6] ([i915#6335]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-mtlp-1/igt@gem_cre...@create-ext-cpu-access-sanity-check.html * igt@gem_ctx_persistence@hang: - shard-mtlp: NOTRUN -> [SKIP][7] ([i915#8555]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-mtlp-1/igt@gem_ctx_persiste...@hang.html * igt@gem_exec_balancer@sliced: - shard-dg2: NOTRUN -> [SKIP][8] ([i915#4812]) +2 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-dg2-3/igt@gem_exec_balan...@sliced.html * igt@gem_exec_capture@capture@vcs1-smem: - shard-mtlp: [PASS][9] -> [DMESG-WARN][10] ([i915#5591]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-mtlp-6/igt@gem_exec_capture@capt...@vcs1-smem.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-mtlp-2/igt@gem_exec_capture@capt...@vcs1-smem.html * igt@gem_exec_endless@dispatch@bcs0: - shard-dg2: [PASS][11] -> [TIMEOUT][12] ([i915#3778] / [i915#7016]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-dg2-5/igt@gem_exec_endless@dispa...@bcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-dg2-5/igt@gem_exec_endless@dispa...@bcs0.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-rkl: [PASS][13] -> [FAIL][14] ([i915#2842]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-rkl-4/igt@gem_exec_fair@basic-p...@bcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-rkl-7/igt@gem_exec_fair@basic-p...@bcs0.html * igt@gem_exec_flush@basic-wb-pro-default: - shard-dg2: NOTRUN -> [SKIP][15] ([i915#3539] / [i915#4852]) +3 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-dg2-11/igt@gem_exec_fl...@basic-wb-pro-default.html * igt@gem_exec_reloc@basic-cpu-wc-noreloc: - shard-mtlp: NOTRUN -> [SKIP][16] ([i915#3281]) +2 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-mtlp-1/igt@gem_exec_re...@basic-cpu-wc-noreloc.html * igt@gem_exec_reloc@basic-wc-gtt: - shard-dg2: NOTRUN -> [SKIP][17] ([i915#3281]) +5 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/shard-dg2-3/igt@gem_exec_re...@basic-wc-gtt.html * igt@gem_exec_schedule@noreorder@rcs0: - shard-mtlp: [PASS][18] -> [DMESG-FAIL][19] ([i915#9121]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/shard-mtlp-7/igt@gem_exec_schedule@noreor...@rcs0.html [19]:
[Intel-gfx] ✓ Fi.CI.BAT: success for debugobjects: stop accessing objects after releasing spinlock (rev2)
== Series Details == Series: debugobjects: stop accessing objects after releasing spinlock (rev2) URL : https://patchwork.freedesktop.org/series/124185/ State : success == Summary == CI Bug Log - changes from CI_DRM_13679 -> Patchwork_124185v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/index.html Participating hosts (37 -> 39) -- Additional (3): fi-kbl-soraka bat-dg2-8 fi-pnv-d510 Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_124185v2 that come from known issues: ### CI changes ### Issues hit * boot: - fi-hsw-4770:[PASS][1] -> [FAIL][2] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13679/fi-hsw-4770/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][5] ([i915#4083]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-8: NOTRUN -> [SKIP][6] ([i915#4077]) +2 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@gem_mmap_...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#4079]) +1 other test skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#6621]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][9] ([i915#1886] / [i915#7913]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#6645]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#5190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#4215] / [i915#5190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#4212]) +6 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#4212] / [i915#5608]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-kbl-soraka: NOTRUN -> [SKIP][16] ([fdo#109271]) +9 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/fi-kbl-soraka/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-8: NOTRUN -> [SKIP][17] ([fdo#109285]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-8: NOTRUN -> [SKIP][18] ([i915#5274]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124185v2/bat-dg2-8/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_pipe_crc_basic@suspend-read-crc: - fi-kbl-x1275: NOTRUN -> [SKIP][19] ([fdo#109271]) [19]:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for debugobjects: stop accessing objects after releasing spinlock (rev2)
== Series Details ==
Series: debugobjects: stop accessing objects after releasing spinlock (rev2)
URL : https://patchwork.freedesktop.org/series/124185/
State : warning
== Summary ==
Error: dim checkpatch failed
4b916ef4f19b debugobjects: stop accessing objects after releasing spinlock
-:85: WARNING:LIKELY_MISUSE: nested (un)?likely() calls, IS_ERR already uses
unlikely() internally
#85: FILE: lib/debugobjects.c:716:
+ } else if (likely(!IS_ERR(obj))) {
-:390: CHECK:SPACING: No space is necessary after a cast
#390: FILE: lib/debugobjects.c:1022:
+ (void *) oaddr, o.state);
total: 0 errors, 1 warnings, 1 checks, 363 lines checked
[Intel-gfx] [PATCH] drm/i915: Add missing CCS documentation.
Let's introduce the basic documentation about CCS.
While doing that, also removed the legacy execution flag name. That flag
simply doesn't exist for CCS and it is not needed on current context
submission. Those flag names are only needed on legacy context,
while on new ones we only need to pass the engine ID.
It is worth mention that this documentation should probably live with
the engine definitions rather than in the i915.rst file directly and
that more updates are likely need in this section. But this should
come later.
v2: Overall improvements from Matt and Tvrtko.
Fixes: 944823c94639 ("drm/i915/xehp: Define compute class and engine")
Cc: Matt Roper
Cc: Sushma Venkatesh Reddy
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Signed-off-by: Rodrigo Vivi
---
Documentation/gpu/i915.rst | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 378e825754d5..13de8bcaaa29 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -267,19 +267,18 @@ i915 driver.
Intel GPU Basics
-An Intel GPU has multiple engines. There are several engine types.
-
-- RCS engine is for rendering 3D and performing compute, this is named
- `I915_EXEC_RENDER` in user space.
-- BCS is a blitting (copy) engine, this is named `I915_EXEC_BLT` in user
- space.
-- VCS is a video encode and decode engine, this is named `I915_EXEC_BSD`
- in user space
-- VECS is video enhancement engine, this is named `I915_EXEC_VEBOX` in user
- space.
-- The enumeration `I915_EXEC_DEFAULT` does not refer to specific engine;
- instead it is to be used by user space to specify a default rendering
- engine (for 3D) that may or may not be the same as RCS.
+An Intel GPU has multiple engines. There are several engine types:
+
+- Render Command Streamer (RCS). An engine for rendering 3D and
+ performing compute.
+- Blitting Command Streamer (BCS). An engine for performing blitting and/or
+ copying operations.
+- Video Command Streamer. An engine used for video encoding and decoding. Also
+ sometimes called 'BSD' in hardware documentation.
+- Video Enhancement Command Streamer (VECS). An engine for video enhancement.
+ Also sometimes called 'VEBOX' in hardware documentation.
+- Compute Command Streamer (CCS). An engine that has access to the media and
+ GPGPU pipelines, but not the 3D pipeline.
The Intel GPU family is a family of integrated GPU's using Unified
Memory Access. For having the GPU "do work", user space will feed the
--
2.41.0
[Intel-gfx] ✗ Fi.CI.BUILD: failure for prime_vgem: Add mmap forwarding tests
== Series Details == Series: prime_vgem: Add mmap forwarding tests URL : https://patchwork.freedesktop.org/series/124192/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/124192/revisions/1/mbox/ not applied Applying: prime_vgem: Add mmap forwarding tests error: sha1 information is lacking or useless (tests/prime_vgem.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 prime_vgem: Add mmap forwarding tests When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". Build failed, no error log produced
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Add error handling in intel_timeline_pin() (rev2)
== Series Details == Series: drm/i915/gt: Add error handling in intel_timeline_pin() (rev2) URL : https://patchwork.freedesktop.org/series/124189/ State : success == Summary == CI Bug Log - changes from CI_DRM_13677 -> Patchwork_124189v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/index.html Participating hosts (40 -> 30) -- Missing(10): fi-kbl-soraka fi-skl-guc bat-adlm-1 fi-ilk-650 fi-snb-2520m bat-adlp-6 fi-hsw-4770 bat-adln-1 fi-kbl-8809g bat-dg2-13 Known issues Here are the changes found in Patchwork_124189v2 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-9: [PASS][1] -> [INCOMPLETE][2] ([i915#9275]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [PASS][3] -> [ABORT][4] ([i915#9262]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/bat-mtlp-8/igt@i915_selftest@l...@requests.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][5] -> [FAIL][6] ([IGT#3]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262 [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275 Build changes - * Linux: CI_DRM_13677 -> Patchwork_124189v2 CI-20190529: 20190529 CI_DRM_13677: d69432c1f5832c5097d4629e61cabd8bdfc027b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7502: ac56ba97248b33668fbe771882360bd7b274cc9a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_124189v2: d69432c1f5832c5097d4629e61cabd8bdfc027b2 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 7995b8c10142 drm/i915/gt: Add error handling in intel_timeline_pin() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124189v2/index.html
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Do not disable preemption for resets (rev3)
== Series Details == Series: drm/i915: Do not disable preemption for resets (rev3) URL : https://patchwork.freedesktop.org/series/120218/ State : success == Summary == CI Bug Log - changes from CI_DRM_13677 -> Patchwork_120218v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/index.html Participating hosts (40 -> 31) -- Missing(9): fi-skl-guc bat-adlm-1 fi-ilk-650 bat-adlp-6 fi-snb-2520m fi-hsw-4770 bat-adln-1 fi-kbl-8809g bat-dg2-13 Known issues Here are the changes found in Patchwork_120218v3 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live@requests: - bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#9262]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/bat-mtlp-8/igt@i915_selftest@l...@requests.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][3] -> [FAIL][4] ([IGT#3]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262 Build changes - * Linux: CI_DRM_13677 -> Patchwork_120218v3 CI-20190529: 20190529 CI_DRM_13677: d69432c1f5832c5097d4629e61cabd8bdfc027b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7502: ac56ba97248b33668fbe771882360bd7b274cc9a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_120218v3: d69432c1f5832c5097d4629e61cabd8bdfc027b2 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 68bae2ced81b drm/i915: Do not disable preemption for resets == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120218v3/index.html
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Do not disable preemption for resets (rev3)
== Series Details ==
Series: drm/i915: Do not disable preemption for resets (rev3)
URL : https://patchwork.freedesktop.org/series/120218/
State : warning
== Summary ==
Error: dim checkpatch failed
aa378e97b186 drm/i915: Do not disable preemption for resets
-:14: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit eb8d0f5af4ec ("drm/i915: Remove
GPU reset dependence on struct_mutex")'
#14:
eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex"),
-:15: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 2caffbf11762 ("drm/i915: Revoke
mmaps and prevent access to fence registers across reset")'
#15:
but that never materialized and was soon removed in 2caffbf11762
total: 2 errors, 0 warnings, 0 checks, 48 lines checked
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: refactor aux_ch_name() (rev3)
== Series Details == Series: drm/i915/dp: refactor aux_ch_name() (rev3) URL : https://patchwork.freedesktop.org/series/124107/ State : success == Summary == CI Bug Log - changes from CI_DRM_13677 -> Patchwork_124107v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/index.html Participating hosts (40 -> 28) -- Missing(12): fi-kbl-soraka fi-skl-guc bat-adlm-1 bat-dg2-9 fi-tgl-1115g4 fi-snb-2520m bat-adlp-6 fi-ilk-650 fi-hsw-4770 bat-adln-1 fi-kbl-8809g bat-dg2-13 Known issues Here are the changes found in Patchwork_124107v3 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live@requests: - bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#9262]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/bat-mtlp-8/igt@i915_selftest@l...@requests.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][3] -> [FAIL][4] ([IGT#3]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262 Build changes - * Linux: CI_DRM_13677 -> Patchwork_124107v3 CI-20190529: 20190529 CI_DRM_13677: d69432c1f5832c5097d4629e61cabd8bdfc027b2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7502: ac56ba97248b33668fbe771882360bd7b274cc9a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_124107v3: d69432c1f5832c5097d4629e61cabd8bdfc027b2 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 62c9e1318cc1 drm/i915/dp: refactor aux_ch_name() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v3/index.html
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Convert fbdev to DRM client (rev4)
== Series Details ==
Series: drm/i915: Convert fbdev to DRM client (rev4)
URL : https://patchwork.freedesktop.org/series/115714/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13677 -> Patchwork_115714v4
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/index.html
Participating hosts (40 -> 35)
--
Missing(5): fi-kbl-soraka fi-skl-guc bat-dg2-9 fi-snb-2520m fi-hsw-4770
Known issues
Here are the changes found in Patchwork_115714v4 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#9262])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/bat-mtlp-8/igt@i915_selftest@l...@requests.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][3] -> [FAIL][4] ([IGT#3])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][5] ([i915#3546]) +2 other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [PASS][6] -> [ABORT][7] ([i915#8668])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
Possible fixes
* igt@kms_chamelium_edid@hdmi-edid-read:
- {bat-dg2-13}: [DMESG-WARN][8] ([i915#7952]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13677/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/bat-dg2-13/igt@kms_chamelium_e...@hdmi-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#7952]: https://gitlab.freedesktop.org/drm/intel/issues/7952
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
Build changes
-
* Linux: CI_DRM_13677 -> Patchwork_115714v4
CI-20190529: 20190529
CI_DRM_13677: d69432c1f5832c5097d4629e61cabd8bdfc027b2 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7502: ac56ba97248b33668fbe771882360bd7b274cc9a @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_115714v4: d69432c1f5832c5097d4629e61cabd8bdfc027b2 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
8daace140394 drm/i915: Implement fbdev emulation as in-kernel client
853ec43ad03e drm/i915: Implement fbdev client callbacks
00d4848faf14 drm/i915: Initialize fbdev DRM client with callback functions
fbb02ea5f4ba drm/i915: Move fbdev functions
69b0e202d7bc drm/client: Export drm_client_dev_unregister()
0347d90dd9e8 drm/client: Do not acquire module reference
14561031bf00 drm/i915: Unregister in-kernel clients
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v4/index.html
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Convert fbdev to DRM client (rev4)
== Series Details == Series: drm/i915: Convert fbdev to DRM client (rev4) URL : https://patchwork.freedesktop.org/series/115714/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:237:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:239:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Convert fbdev to DRM client (rev4)
== Series Details == Series: drm/i915: Convert fbdev to DRM client (rev4) URL : https://patchwork.freedesktop.org/series/115714/ State : warning == Summary == Error: dim checkpatch failed 190804c78b43 drm/i915: Unregister in-kernel clients 7943fb6e18ec drm/client: Do not acquire module reference 1f9d70ab2f79 drm/client: Export drm_client_dev_unregister() d09fe71ce453 drm/i915: Move fbdev functions -:119: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ifbdev)...) over kzalloc(sizeof(struct intel_fbdev)...) #119: FILE: drivers/gpu/drm/i915/display/intel_fbdev.c:683: + ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL); -:120: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!ifbdev" #120: FILE: drivers/gpu/drm/i915/display/intel_fbdev.c:684: + if (ifbdev == NULL) total: 0 errors, 0 warnings, 2 checks, 172 lines checked 94e9f0f53041 drm/i915: Initialize fbdev DRM client with callback functions 9df0528a504d drm/i915: Implement fbdev client callbacks 28fd624fff1f drm/i915: Implement fbdev emulation as in-kernel client
[Intel-gfx] [PATCH] i915/guc: Get runtime pm in busyness worker only if already active
Ideally the busyness worker should take a gt pm wakeref because the
worker only needs to be active while gt is awake. However, the gt_park
path cancels the worker synchronously and this complicates the flow if
the worker is also running at the same time. The cancel waits for the
worker and when the worker releases the wakeref, that would call gt_park
and would lead to a deadlock.
The resolution is to take the global pm wakeref if runtime pm is already
active. If not, we don't need to update the busyness stats as the stats
would already be updated when the gt was parked.
Note:
- We do not requeue the worker if we cannot take a reference to runtime
pm since intel_guc_busyness_unpark would requeue the worker in the
resume path.
- If the gt was parked longer than time taken for GT timestamp to roll
over, we ignore those rollovers since we don't care about tracking the
exact GT time. We only care about roll overs when the gt is active and
running workloads.
- There is a window of time between gt_park and runtime suspend, where
the worker may run. This is acceptable since the worker will not find
any new data to update busyness.
v2: (Daniele)
- Edit commit message and code comment
- Use runtime pm in the worker
- Put runtime pm after enabling the worker
- Use Link tag and add Fixes tag
v3: (Daniele)
- Reword commit and comments and add details
Link: https://gitlab.freedesktop.org/drm/intel/-/issues/7077
Fixes: 77cdd054dd2c ("drm/i915/pmu: Connect engine busyness stats from GuC to
pmu")
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Daniele Ceraolo Spurio
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 38 +--
1 file changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index cabdc645fcdd..ae3495a9c814 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1432,6 +1432,36 @@ static void guc_timestamp_ping(struct work_struct *wrk)
unsigned long index;
int srcu, ret;
+ /*
+* Ideally the busyness worker should take a gt pm wakeref because the
+* worker only needs to be active while gt is awake. However, the
+* gt_park path cancels the worker synchronously and this complicates
+* the flow if the worker is also running at the same time. The cancel
+* waits for the worker and when the worker releases the wakeref, that
+* would call gt_park and would lead to a deadlock.
+*
+* The resolution is to take the global pm wakeref if runtime pm is
+* already active. If not, we don't need to update the busyness stats as
+* the stats would already be updated when the gt was parked.
+*
+* Note:
+* - We do not requeue the worker if we cannot take a reference to
runtime
+* pm since intel_guc_busyness_unpark would requeue the worker in the
+* resume path.
+*
+* - If the gt was parked longer than time taken for GT timestamp to
roll
+* over, we ignore those rollovers since we don't care about tracking
+* the exact GT time. We only care about roll overs when the gt is
+* active and running workloads.
+*
+* - There is a window of time between gt_park and runtime suspend,
+* where the worker may run. This is acceptable since the worker will
+* not find any new data to update busyness.
+*/
+ wakeref = intel_runtime_pm_get_if_active(>i915->runtime_pm);
+ if (!wakeref)
+ return;
+
/*
* Synchronize with gt reset to make sure the worker does not
* corrupt the engine/guc stats. NB: can't actually block waiting
@@ -1440,10 +1470,9 @@ static void guc_timestamp_ping(struct work_struct *wrk)
*/
ret = intel_gt_reset_trylock(gt, );
if (ret)
- return;
+ goto err_trylock;
- with_intel_runtime_pm(>i915->runtime_pm, wakeref)
- __update_guc_busyness_stats(guc);
+ __update_guc_busyness_stats(guc);
/* adjust context stats for overflow */
xa_for_each(>context_lookup, index, ce)
@@ -1452,6 +1481,9 @@ static void guc_timestamp_ping(struct work_struct *wrk)
intel_gt_reset_unlock(gt, srcu);
guc_enable_busyness_worker(guc);
+
+err_trylock:
+ intel_runtime_pm_put(>i915->runtime_pm, wakeref);
}
static int guc_action_enable_usage_stats(struct intel_guc *guc)
--
2.38.1
Re: [Intel-gfx] [PATCH 1/9] drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by
On Mon, Sep 25, 2023 at 1:52 PM Kees Cook wrote:
>
> On Mon, Sep 25, 2023 at 08:30:30AM +0200, Christian König wrote:
> > Am 22.09.23 um 19:41 schrieb Alex Deucher:
> > > On Fri, Sep 22, 2023 at 1:32 PM Kees Cook wrote:
> > > > Prepare for the coming implementation by GCC and Clang of the
> > > > __counted_by
> > > > attribute. Flexible array members annotated with __counted_by can have
> > > > their accesses bounds-checked at run-time checking via
> > > > CONFIG_UBSAN_BOUNDS
> > > > (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
> > > > functions).
> > > >
> > > > As found with Coccinelle[1], add __counted_by for struct
> > > > smu10_voltage_dependency_table.
> > > >
> > > > [1]
> > > > https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
> > > >
> > > > Cc: Evan Quan
> > > > Cc: Alex Deucher
> > > > Cc: "Christian König"
> > > > Cc: "Pan, Xinhui"
> > > > Cc: David Airlie
> > > > Cc: Daniel Vetter
> > > > Cc: Xiaojian Du
> > > > Cc: Huang Rui
> > > > Cc: Kevin Wang
> > > > Cc: amd-...@lists.freedesktop.org
> > > > Cc: dri-de...@lists.freedesktop.org
> > > > Signed-off-by: Kees Cook
> > > Acked-by: Alex Deucher
> >
> > Mhm, I'm not sure if this is a good idea. That is a structure filled in by
> > the firmware, isn't it?
> >
> > That would imply that we might need to byte swap count before it is
> > checkable.
>
> The script found this instance because of this:
>
> static int smu10_get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr,
> struct smu10_voltage_dependency_table **pptable,
> uint32_t num_entry, const DpmClock_t
> *pclk_dependency_table)
> {
> uint32_t i;
> struct smu10_voltage_dependency_table *ptable;
>
> ptable = kzalloc(struct_size(ptable, entries, num_entry), GFP_KERNEL);
> if (NULL == ptable)
> return -ENOMEM;
>
> ptable->count = num_entry;
>
> So the implication is that it's native byte order... but you tell me! I
> certainly don't want this annotation if it's going to break stuff. :)
In this case, the code is for an integrated GPU in an x86 CPU so the
firmware and driver endianness match. You wouldn't find a stand alone
dGPU that uses this structure. In this case it's ok. False alarm.
Alex
Re: [Intel-gfx] [PATCH 1/9] drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by
On Mon, Sep 25, 2023 at 08:30:30AM +0200, Christian König wrote:
> Am 22.09.23 um 19:41 schrieb Alex Deucher:
> > On Fri, Sep 22, 2023 at 1:32 PM Kees Cook wrote:
> > > Prepare for the coming implementation by GCC and Clang of the __counted_by
> > > attribute. Flexible array members annotated with __counted_by can have
> > > their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
> > > (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
> > > functions).
> > >
> > > As found with Coccinelle[1], add __counted_by for struct
> > > smu10_voltage_dependency_table.
> > >
> > > [1]
> > > https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
> > >
> > > Cc: Evan Quan
> > > Cc: Alex Deucher
> > > Cc: "Christian König"
> > > Cc: "Pan, Xinhui"
> > > Cc: David Airlie
> > > Cc: Daniel Vetter
> > > Cc: Xiaojian Du
> > > Cc: Huang Rui
> > > Cc: Kevin Wang
> > > Cc: amd-...@lists.freedesktop.org
> > > Cc: dri-de...@lists.freedesktop.org
> > > Signed-off-by: Kees Cook
> > Acked-by: Alex Deucher
>
> Mhm, I'm not sure if this is a good idea. That is a structure filled in by
> the firmware, isn't it?
>
> That would imply that we might need to byte swap count before it is
> checkable.
The script found this instance because of this:
static int smu10_get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr,
struct smu10_voltage_dependency_table **pptable,
uint32_t num_entry, const DpmClock_t
*pclk_dependency_table)
{
uint32_t i;
struct smu10_voltage_dependency_table *ptable;
ptable = kzalloc(struct_size(ptable, entries, num_entry), GFP_KERNEL);
if (NULL == ptable)
return -ENOMEM;
ptable->count = num_entry;
So the implication is that it's native byte order... but you tell me! I
certainly don't want this annotation if it's going to break stuff. :)
--
Kees Cook
Re: [Intel-gfx] [PATCH 3/9] drm/i915/selftests: Annotate struct perf_series with __counted_by
On Mon, Sep 25, 2023 at 12:08:36PM +0200, Andrzej Hajda wrote: > > > On 22.09.2023 19:32, Kees Cook wrote: > > Prepare for the coming implementation by GCC and Clang of the __counted_by > > attribute. Flexible array members annotated with __counted_by can have > > their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS > > (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family > > functions). > > > > As found with Coccinelle[1], add __counted_by for struct perf_series. > > > > [1] > > https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci > > > > Cc: Jani Nikula > > Cc: Joonas Lahtinen > > Cc: Rodrigo Vivi > > Cc: Tvrtko Ursulin > > Cc: David Airlie > > Cc: Daniel Vetter > > Cc: Chris Wilson > > Cc: John Harrison > > Cc: Andi Shyti > > Cc: Matthew Brost > > Cc: intel-gfx@lists.freedesktop.org > > Cc: dri-de...@lists.freedesktop.org > > Signed-off-by: Kees Cook > > I am surprised this is the only finding in i915, I would expected more. I'm sure there are more, but it's likely my Coccinelle pattern didn't catch it. There are many many flexible arrays in drm. :) $ grep -nRH '\[\];$' drivers/gpu/drm include/uapi/drm | grep -v :extern | wc -l 122 If anyone has some patterns I can add to the Coccinelle script, I can take another pass at it. > Anyway: > > Reviewed-by: Andrzej Hajda Thank you! -Kees -- Kees Cook
Re: [Intel-gfx] [PATCH 4/6] drm/edid: use a temp variable for sads to drop one level of dereferences
Hi Jani,
added comments in-line.
> -Original Message-
> From: Nikula, Jani
> Sent: Thursday, September 7, 2023 2:58 PM
> To: dri-de...@lists.freedesktop.org
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani ;
> Golani, Mitulkumar Ajitkumar
> Subject: [PATCH 4/6] drm/edid: use a temp variable for sads to drop one level
> of dereferences
>
> It's arguably easier on the eyes, and drops a set of parenthesis too.
Please consider providing a bit more context in the commit message for better
clarity.
>
> Cc: Mitul Golani
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_edid.c | 16 +---
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index
> 2025970816c9..fcdc2c314cde 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -5583,7 +5583,7 @@ static void drm_edid_to_eld(struct drm_connector
> *connector, }
>
> static int _drm_edid_to_sad(const struct drm_edid *drm_edid,
> - struct cea_sad **sads)
> + struct cea_sad **psads)
> {
> const struct cea_db *db;
> struct cea_db_iter iter;
> @@ -5592,19 +5592,21 @@ static int _drm_edid_to_sad(const struct
> drm_edid *drm_edid,
> cea_db_iter_edid_begin(drm_edid, );
> cea_db_iter_for_each(db, ) {
> if (cea_db_tag(db) == CTA_DB_AUDIO) {
> + struct cea_sad *sads;
> int j;
>
> count = cea_db_payload_len(db) / 3; /* SAD is 3B */
> - *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
> - if (!*sads)
> + sads = kcalloc(count, sizeof(*sads), GFP_KERNEL);
> + *psads = sads;
> + if (!sads)
> return -ENOMEM;
> for (j = 0; j < count; j++) {
> const u8 *sad = >data[j * 3];
>
> - (*sads)[j].format = (sad[0] & 0x78) >> 3;
> - (*sads)[j].channels = sad[0] & 0x7;
> - (*sads)[j].freq = sad[1] & 0x7F;
> - (*sads)[j].byte2 = sad[2];
> + sads[j].format = (sad[0] & 0x78) >> 3;
> + sads[j].channels = sad[0] & 0x7;
> + sads[j].freq = sad[1] & 0x7F;
> + sads[j].byte2 = sad[2];
Thanks for the code update. I noticed the use of magic values in this section,
which can make the code less clear
and harder to maintain. Would it be possible to define constants or use
descriptive names instead of these magic
values?
Regards,
Mitul
> }
> break;
> }
> --
> 2.39.2
[Intel-gfx] [PATCH v3] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
From: Jonathan Cavitt
Where applicable, use for_each_gt instead of to_gt in the
i915_gem_shrinker functions to make them apply to more than just the
primary GT. Specifically, this ensure i915_gem_shrink_all retires all
requests across all GTs, and this makes i915_gem_shrinker_vmap unmap
VMAs from all GTs.
v2: Pass correct GT to intel_gt_retire_requests(Andrzej).
v3: Remove unnecessary braces(Andi)
Signed-off-by: Jonathan Cavitt
Signed-off-by: Nirmoy Das
Reviewed-by: Andrzej Hajda
Reviewed-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 41
1 file changed, 24 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 214763942aa2..e79fcbdfab25 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -14,6 +14,7 @@
#include
#include "gt/intel_gt_requests.h"
+#include "gt/intel_gt.h"
#include "i915_trace.h"
@@ -119,7 +120,8 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
intel_wakeref_t wakeref = 0;
unsigned long count = 0;
unsigned long scanned = 0;
- int err = 0;
+ int err = 0, i = 0;
+ struct intel_gt *gt;
/* CHV + VTD workaround use stop_machine(); need to trylock vm->mutex */
bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915);
@@ -148,8 +150,9 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
* contexts around longer than is necessary.
*/
if (shrink & I915_SHRINK_ACTIVE)
- /* Retire requests to unpin all idle contexts */
- intel_gt_retire_requests(to_gt(i915));
+ for_each_gt(gt, i915, i)
+ /* Retire requests to unpin all idle contexts */
+ intel_gt_retire_requests(gt);
/*
* As we may completely rewrite the (un)bound list whilst unbinding
@@ -389,6 +392,8 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned
long event, void *ptr
struct i915_vma *vma, *next;
unsigned long freed_pages = 0;
intel_wakeref_t wakeref;
+ struct intel_gt *gt;
+ int i;
with_intel_runtime_pm(>runtime_pm, wakeref)
freed_pages += i915_gem_shrink(NULL, i915, -1UL, NULL,
@@ -397,24 +402,26 @@ i915_gem_shrinker_vmap(struct notifier_block *nb,
unsigned long event, void *ptr
I915_SHRINK_VMAPS);
/* We also want to clear any cached iomaps as they wrap vmap */
- mutex_lock(_gt(i915)->ggtt->vm.mutex);
- list_for_each_entry_safe(vma, next,
-_gt(i915)->ggtt->vm.bound_list, vm_link) {
- unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
- struct drm_i915_gem_object *obj = vma->obj;
-
- if (!vma->iomap || i915_vma_is_active(vma))
- continue;
+ for_each_gt(gt, i915, i) {
+ mutex_lock(>ggtt->vm.mutex);
+ list_for_each_entry_safe(vma, next,
+>ggtt->vm.bound_list, vm_link) {
+ unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
+ struct drm_i915_gem_object *obj = vma->obj;
+
+ if (!vma->iomap || i915_vma_is_active(vma))
+ continue;
- if (!i915_gem_object_trylock(obj, NULL))
- continue;
+ if (!i915_gem_object_trylock(obj, NULL))
+ continue;
- if (__i915_vma_unbind(vma) == 0)
- freed_pages += count;
+ if (__i915_vma_unbind(vma) == 0)
+ freed_pages += count;
- i915_gem_object_unlock(obj);
+ i915_gem_object_unlock(obj);
+ }
+ mutex_unlock(>ggtt->vm.mutex);
}
- mutex_unlock(_gt(i915)->ggtt->vm.mutex);
*(unsigned long *)ptr += freed_pages;
return NOTIFY_DONE;
--
2.41.0
Re: [Intel-gfx] [PATCH 3/6] drm/edid: include drm_eld.h only where required
> -Original Message- > From: Nikula, Jani > Sent: Thursday, September 7, 2023 2:58 PM > To: dri-de...@lists.freedesktop.org > Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani ; > Golani, Mitulkumar Ajitkumar > Subject: [PATCH 3/6] drm/edid: include drm_eld.h only where required > > Reduce the dependencies on drm_eld.h. Some files might be able to drop the > dependency on drm_edid.h too with the direct inclusion of drm_eld.h. > > Cc: Mitul Golani > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 1 + > drivers/gpu/drm/drm_edid.c | 1 + > drivers/gpu/drm/i915/display/intel_audio.c | 1 + > drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 1 + > drivers/gpu/drm/i915/display/intel_sdvo.c| 1 + > drivers/gpu/drm/nouveau/dispnv50/disp.c | 1 + > drivers/gpu/drm/radeon/radeon_audio.c| 1 + > drivers/gpu/drm/tegra/hdmi.c | 1 + > drivers/gpu/drm/tegra/sor.c | 1 + > include/drm/drm_edid.h | 1 - > sound/core/pcm_drm_eld.c | 1 + > sound/soc/codecs/hdac_hdmi.c | 1 + > sound/soc/codecs/hdmi-codec.c| 1 + > sound/x86/intel_hdmi_audio.c | 1 + > 14 files changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 268cb99a4c4b..fe7e307ae7f9 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -86,6 +86,7 @@ > #include > #include > #include > +#include > #include > #include > #include > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index > 39dd3f694544..2025970816c9 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -41,6 +41,7 @@ > #include > #include > #include > +#include > #include > #include > > diff --git a/drivers/gpu/drm/i915/display/intel_audio.c > b/drivers/gpu/drm/i915/display/intel_audio.c > index 19605264a35c..39f5b698e08a 100644 > --- a/drivers/gpu/drm/i915/display/intel_audio.c > +++ b/drivers/gpu/drm/i915/display/intel_audio.c > @@ -25,6 +25,7 @@ > #include > > #include > +#include > #include > > #include "i915_drv.h" > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > index 8d4640d0fd34..fcddd6d81768 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > @@ -4,6 +4,7 @@ > */ > > #include > +#include > > #include "i915_drv.h" > #include "intel_crtc_state_dump.h" > diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c > b/drivers/gpu/drm/i915/display/intel_sdvo.c > index 135a2527fd1b..6abae283998e 100644 > --- a/drivers/gpu/drm/i915/display/intel_sdvo.c > +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c > @@ -35,6 +35,7 @@ > #include > #include > #include > +#include > > #include "i915_drv.h" > #include "i915_reg.h" > diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c > b/drivers/gpu/drm/nouveau/dispnv50/disp.c > index 4e7c9c353c51..9332aa633867 100644 > --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c > +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c > @@ -38,6 +38,7 @@ > #include > #include > #include > +#include > #include > #include > #include > diff --git a/drivers/gpu/drm/radeon/radeon_audio.c > b/drivers/gpu/drm/radeon/radeon_audio.c > index d6ccaf24ee0c..279bf130a18c 100644 > --- a/drivers/gpu/drm/radeon/radeon_audio.c > +++ b/drivers/gpu/drm/radeon/radeon_audio.c > @@ -26,6 +26,7 @@ > #include > > #include > +#include > #include "dce6_afmt.h" > #include "evergreen_hdmi.h" > #include "radeon.h" > diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c > index 0ba3ca3ac509..a1fcee665023 100644 > --- a/drivers/gpu/drm/tegra/hdmi.c > +++ b/drivers/gpu/drm/tegra/hdmi.c > @@ -24,6 +24,7 @@ > #include > #include > #include > +#include > #include > #include > #include > diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index > d5a3d3f4fece..83341576630d 100644 > --- a/drivers/gpu/drm/tegra/sor.c > +++ b/drivers/gpu/drm/tegra/sor.c > @@ -20,6 +20,7 @@ > #include #include > #include > +#include > #include > #include > #include > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index > 1ff52f57ab9c..e98aa6818700 100644 > --- a/include/drm/drm_edid.h > +++ b/include/drm/drm_edid.h > @@ -25,7 +25,6 @@ > > #include > #include > -#include /* FIXME: remove this, include directly where > needed */ #include > > struct drm_device; > diff --git a/sound/core/pcm_drm_eld.c b/sound/core/pcm_drm_eld.c index > 07075071972d..1cdca4d4fc9c 100644 > ---
Re: [Intel-gfx] [PATCH 2/6] drm/eld: replace uint8_t with u8
> -Original Message-
> From: Nikula, Jani
> Sent: Thursday, September 7, 2023 2:58 PM
> To: dri-de...@lists.freedesktop.org
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani ;
> Golani, Mitulkumar Ajitkumar
> Subject: [PATCH 2/6] drm/eld: replace uint8_t with u8
>
> Unify on kernel types.
>
> Cc: Mitul Golani
> Signed-off-by: Jani Nikula
> ---
> include/drm/drm_eld.h | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/include/drm/drm_eld.h b/include/drm/drm_eld.h index
> 9bde89bd96ea..7b674256b9aa 100644
> --- a/include/drm/drm_eld.h
> +++ b/include/drm/drm_eld.h
> @@ -70,7 +70,7 @@
> * drm_eld_mnl - Get ELD monitor name length in bytes.
> * @eld: pointer to an eld memory structure with mnl set
> */
> -static inline int drm_eld_mnl(const uint8_t *eld)
> +static inline int drm_eld_mnl(const u8 *eld)
> {
> return (eld[DRM_ELD_CEA_EDID_VER_MNL] &
> DRM_ELD_MNL_MASK) >> DRM_ELD_MNL_SHIFT; } @@ -79,7 +79,7 @@
> static inline int drm_eld_mnl(const uint8_t *eld)
> * drm_eld_sad - Get ELD SAD structures.
> * @eld: pointer to an eld memory structure with sad_count set
> */
> -static inline const uint8_t *drm_eld_sad(const uint8_t *eld)
> +static inline const u8 *drm_eld_sad(const u8 *eld)
> {
> unsigned int ver, mnl;
>
> @@ -98,7 +98,7 @@ static inline const uint8_t *drm_eld_sad(const uint8_t
> *eld)
> * drm_eld_sad_count - Get ELD SAD count.
> * @eld: pointer to an eld memory structure with sad_count set
> */
> -static inline int drm_eld_sad_count(const uint8_t *eld)
> +static inline int drm_eld_sad_count(const u8 *eld)
> {
> return (eld[DRM_ELD_SAD_COUNT_CONN_TYPE] &
> DRM_ELD_SAD_COUNT_MASK) >>
> DRM_ELD_SAD_COUNT_SHIFT;
> @@ -111,7 +111,7 @@ static inline int drm_eld_sad_count(const uint8_t
> *eld)
> * This is a helper for determining the payload size of the baseline block,
> in
> * bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header
> block.
> */
> -static inline int drm_eld_calc_baseline_block_size(const uint8_t *eld)
> +static inline int drm_eld_calc_baseline_block_size(const u8 *eld)
> {
> return DRM_ELD_MONITOR_NAME_STRING -
> DRM_ELD_HEADER_BLOCK_SIZE +
> drm_eld_mnl(eld) + drm_eld_sad_count(eld) * 3; @@ -127,7
> +127,7 @@ static inline int drm_eld_calc_baseline_block_size(const uint8_t
> *eld)
> *
> * The returned value is guaranteed to be a multiple of 4.
> */
> -static inline int drm_eld_size(const uint8_t *eld)
> +static inline int drm_eld_size(const u8 *eld)
> {
> return DRM_ELD_HEADER_BLOCK_SIZE +
> eld[DRM_ELD_BASELINE_ELD_LEN] * 4; } @@ -139,7 +139,7 @@ static inline
> int drm_eld_size(const uint8_t *eld)
> * The returned value is the speakers mask. User has to use
> %DRM_ELD_SPEAKER
> * field definitions to identify speakers.
> */
> -static inline u8 drm_eld_get_spk_alloc(const uint8_t *eld)
> +static inline u8 drm_eld_get_spk_alloc(const u8 *eld)
> {
> return eld[DRM_ELD_SPEAKER] & DRM_ELD_SPEAKER_MASK; } @@ -
> 151,7 +151,7 @@ static inline u8 drm_eld_get_spk_alloc(const uint8_t *eld)
> * The caller need to use %DRM_ELD_CONN_TYPE_HDMI or
> %DRM_ELD_CONN_TYPE_DP to
> * identify the display type connected.
> */
> -static inline u8 drm_eld_get_conn_type(const uint8_t *eld)
> +static inline u8 drm_eld_get_conn_type(const u8 *eld)
Changes LGTM
Reviewed-by: Mitul Golani
> {
> return eld[DRM_ELD_SAD_COUNT_CONN_TYPE] &
> DRM_ELD_CONN_TYPE_MASK; }
> --
> 2.39.2
Re: [Intel-gfx] [PATCH v5] drm/i915: Add Wa_18028616096
On Fri, Sep 22, 2023 at 09:05:25AM -0700, Matt Roper wrote:
> On Fri, Sep 22, 2023 at 09:23:56PM +0530, Shekhar Chauhan wrote:
> > Drop UGM per set fragment threshold to 3
> >
> > BSpec: 54833
> > Signed-off-by: Shekhar Chauhan
> > ---
> > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
> > drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > index a00ff51c681d..431c575c532b 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > @@ -1230,6 +1230,7 @@
> > #define DISABLE_D8_D16_COASLESCE REG_BIT(30)
> > #define FORCE_1_SUB_MESSAGE_PER_FRAGMENT REG_BIT(15)
> > #define LSC_CHICKEN_BIT_0_UDW MCR_REG(0xe7c8 + 4)
> > +#define UGM_FRAGMENT_THRESHOLD_TO_3 REG_BIT(58 - 32)
> > #define DIS_CHAIN_2XSIMD8REG_BIT(55 - 32)
> > #define FORCE_SLM_FENCE_SCOPE_TO_TILEREG_BIT(42 - 32)
> > #define FORCE_UGM_FENCE_SCOPE_TO_TILEREG_BIT(41 - 32)
> > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > index 660d4f358eab..df0fba2850b6 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > @@ -2957,6 +2957,11 @@ general_render_compute_wa_init(struct
> > intel_engine_cs *engine, struct i915_wa_li
> > wa_mcr_masked_en(wal, GEN8_HALF_SLICE_CHICKEN1,
> > GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE);
> > }
> > +
> > + if (IS_DG2_G10(i915) || IS_DG2_G12(i915)) {
> > + /* Wa_18028616096 */
> > + wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0_UDW,
> > UGM_FRAGMENT_THRESHOLD_TO_3);
> > + }
>
> It might be best to move this block above the xehpsdv block (to keep the
> function roughly ordered by "newest platforms first"). But we can do
> that while applying the patch; no need to send another version.
>
> Reviewed-by: Matt Roper
Applied to drm-intel-gt-next with the small ordering tweak. Thanks for
the patch.
Matt
>
> > }
> >
> > static void
> > --
> > 2.34.1
> >
>
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
Re: [Intel-gfx] [PATCH 1/6] drm/edid: split out drm_eld.h from drm_edid.h
> -Original Message-
> From: Nikula, Jani
> Sent: Thursday, September 7, 2023 2:58 PM
> To: dri-de...@lists.freedesktop.org
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani ;
> Golani, Mitulkumar Ajitkumar
> Subject: [PATCH 1/6] drm/edid: split out drm_eld.h from drm_edid.h
>
> The drm_edid.[ch] files are starting to be a bit crowded, and with plans to
> add more ELD related functionality, it's perhaps cleanest to split the ELD
> code
> out to a header of its own.
>
> Include drm_eld.h from drm_edid.h for starters, and leave it to follow-up
> work to only include drm_eld.h where needed.
>
> Cc: Mitul Golani
> Signed-off-by: Jani Nikula
> ---
> Documentation/gpu/drm-kms-helpers.rst | 3 +
> include/drm/drm_edid.h| 149 +---
> include/drm/drm_eld.h | 159 ++
> 3 files changed, 163 insertions(+), 148 deletions(-) create mode 100644
> include/drm/drm_eld.h
>
> diff --git a/Documentation/gpu/drm-kms-helpers.rst
> b/Documentation/gpu/drm-kms-helpers.rst
> index b8ab05e42dbb..f0f93aa62545 100644
> --- a/Documentation/gpu/drm-kms-helpers.rst
> +++ b/Documentation/gpu/drm-kms-helpers.rst
> @@ -363,6 +363,9 @@ EDID Helper Functions Reference .. kernel-doc::
> drivers/gpu/drm/drm_edid.c
> :export:
>
> +.. kernel-doc:: include/drm/drm_eld.h
> + :internal:
> +
> SCDC Helper Functions Reference
> ===
>
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index
> 882d2638708e..1ff52f57ab9c 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -25,6 +25,7 @@
>
> #include
> #include
> +#include /* FIXME: remove this, include directly where
> +needed */
> #include
>
> struct drm_device;
> @@ -269,64 +270,6 @@ struct detailed_timing {
> #define DRM_EDID_DSC_MAX_SLICES 0xf
> #define DRM_EDID_DSC_TOTAL_CHUNK_KBYTES 0x3f
>
> -/* ELD Header Block */
> -#define DRM_ELD_HEADER_BLOCK_SIZE4
> -
> -#define DRM_ELD_VER 0
> -# define DRM_ELD_VER_SHIFT 3
> -# define DRM_ELD_VER_MASK(0x1f << 3)
> -# define DRM_ELD_VER_CEA861D (2 << 3) /* supports 861D or
> below */
> -# define DRM_ELD_VER_CANNED (0x1f << 3)
> -
> -#define DRM_ELD_BASELINE_ELD_LEN 2 /* in dwords! */
> -
> -/* ELD Baseline Block for ELD_Ver == 2 */
> -#define DRM_ELD_CEA_EDID_VER_MNL 4
> -# define DRM_ELD_CEA_EDID_VER_SHIFT 5
> -# define DRM_ELD_CEA_EDID_VER_MASK (7 << 5)
> -# define DRM_ELD_CEA_EDID_VER_NONE (0 << 5)
> -# define DRM_ELD_CEA_EDID_VER_CEA861 (1 << 5)
> -# define DRM_ELD_CEA_EDID_VER_CEA861A(2 << 5)
> -# define DRM_ELD_CEA_EDID_VER_CEA861BCD (3 << 5)
> -# define DRM_ELD_MNL_SHIFT 0
> -# define DRM_ELD_MNL_MASK(0x1f << 0)
> -
> -#define DRM_ELD_SAD_COUNT_CONN_TYPE 5
> -# define DRM_ELD_SAD_COUNT_SHIFT 4
> -# define DRM_ELD_SAD_COUNT_MASK (0xf << 4)
> -# define DRM_ELD_CONN_TYPE_SHIFT 2
> -# define DRM_ELD_CONN_TYPE_MASK (3 << 2)
> -# define DRM_ELD_CONN_TYPE_HDMI (0 << 2)
> -# define DRM_ELD_CONN_TYPE_DP(1 << 2)
> -# define DRM_ELD_SUPPORTS_AI (1 << 1)
> -# define DRM_ELD_SUPPORTS_HDCP (1 << 0)
> -
> -#define DRM_ELD_AUD_SYNCH_DELAY 6 /* in units of
> 2 ms */
> -# define DRM_ELD_AUD_SYNCH_DELAY_MAX 0xfa/* 500 ms */
> -
> -#define DRM_ELD_SPEAKER 7
> -# define DRM_ELD_SPEAKER_MASK0x7f
> -# define DRM_ELD_SPEAKER_RLRC(1 << 6)
> -# define DRM_ELD_SPEAKER_FLRC(1 << 5)
> -# define DRM_ELD_SPEAKER_RC (1 << 4)
> -# define DRM_ELD_SPEAKER_RLR (1 << 3)
> -# define DRM_ELD_SPEAKER_FC (1 << 2)
> -# define DRM_ELD_SPEAKER_LFE (1 << 1)
> -# define DRM_ELD_SPEAKER_FLR (1 << 0)
> -
> -#define DRM_ELD_PORT_ID 8 /* offsets 8..15
> inclusive */
> -# define DRM_ELD_PORT_ID_LEN 8
> -
> -#define DRM_ELD_MANUFACTURER_NAME0 16
> -#define DRM_ELD_MANUFACTURER_NAME1 17
> -
> -#define DRM_ELD_PRODUCT_CODE018
> -#define DRM_ELD_PRODUCT_CODE119
> -
> -#define DRM_ELD_MONITOR_NAME_STRING 20 /* offsets
> 20..(20+mnl-1) inclusive */
> -
> -#define DRM_ELD_CEA_SAD(mnl, sad)(20 + (mnl) + 3 * (sad))
> -
> struct edid {
> u8 header[8];
> /* Vendor & product info */
> @@ -409,96 +352,6 @@ drm_hdmi_avi_infoframe_quant_range(struct
> hdmi_avi_infoframe *frame,
> const struct drm_display_mode *mode,
> enum hdmi_quantization_range
> rgb_quant_range);
>
> -/**
> - * drm_eld_mnl - Get ELD monitor name length in bytes.
> - * @eld: pointer to an eld memory structure with mnl set
> - */
> -static inline int drm_eld_mnl(const uint8_t *eld) -{
> - return (eld[DRM_ELD_CEA_EDID_VER_MNL] &
>
Re: [Intel-gfx] [PATCH] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
Hi Jani,
> >>struct i915_vma *vma, *next;
> >>unsigned long freed_pages = 0;
> >>intel_wakeref_t wakeref;
> >> + struct intel_gt *gt;
> >> + int i;
> >
> > the trend is to use 'unsigned int' here and I've seen it
> > reviewed. Personally, if I really have to express a preference, I
> > prefer 'int' because it's a bit safer, generally I don't really
> > mind :)
>
> Always use int over unsigned int if you don't have a specific reason not
> to. ("It can't be negative" is not a good reason.)
Finally someone! I totally agree!
Andi
Re: [Intel-gfx] [PATCH] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
On Mon, 25 Sep 2023, Andi Shyti wrote:
> Hi Nirmoy,
>
> you forgot the v2 here.
>
> On Mon, Sep 25, 2023 at 03:49:38PM +0200, Nirmoy Das wrote:
>> From: Jonathan Cavitt
>>
>> Where applicable, use for_each_gt instead of to_gt in the
>> i915_gem_shrinker functions to make them apply to more than just the
>> primary GT. Specifically, this ensure i915_gem_shrink_all retires all
>> requests across all GTs, and this makes i915_gem_shrinker_vmap unmap
>> VMAs from all GTs.
>>
>> v2: Pass correct GT to intel_gt_retire_requests(Andrzej).
>>
>> Signed-off-by: Jonathan Cavitt
>> Signed-off-by: Nirmoy Das
>> Reviewed-by: Andrzej Hajda
>
> [...]
>
>> -if (shrink & I915_SHRINK_ACTIVE)
>> -/* Retire requests to unpin all idle contexts */
>> -intel_gt_retire_requests(to_gt(i915));
>> +if (shrink & I915_SHRINK_ACTIVE) {
>> +for_each_gt(gt, i915, i)
>> +/* Retire requests to unpin all idle contexts */
>> +intel_gt_retire_requests(gt);
>> +}
>
> These two brackets are not needed.
>
>>
>> /*
>> * As we may completely rewrite the (un)bound list whilst unbinding
>> @@ -389,6 +393,8 @@ i915_gem_shrinker_vmap(struct notifier_block *nb,
>> unsigned long event, void *ptr
>> struct i915_vma *vma, *next;
>> unsigned long freed_pages = 0;
>> intel_wakeref_t wakeref;
>> +struct intel_gt *gt;
>> +int i;
>
> the trend is to use 'unsigned int' here and I've seen it
> reviewed. Personally, if I really have to express a preference, I
> prefer 'int' because it's a bit safer, generally I don't really
> mind :)
Always use int over unsigned int if you don't have a specific reason not
to. ("It can't be negative" is not a good reason.)
BR,
Jani.
>
> The rest looks good.
>
> Reviewed-by: Andi Shyti
>
> Andi
--
Jani Nikula, Intel
Re: [Intel-gfx] ERR_PTR(0) in a couple of places
On Sun, 24 Sep 2023, Randy Dunlap wrote: > On 9/24/23 21:18, Matthew Brost wrote: >> On Sun, Sep 24, 2023 at 12:41:07AM +, Dr. David Alan Gilbert wrote: >>> Hi, >>> I randomly noticed there are a couple of places in the kernel that >>> do >>>ERR_PTR(0); >>> >>> and thought that was odd - shouldn't those just be NULL's ? >>> >>> 1) i915 >>> drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c : 47 >>> >>> if (i <= 1) >>> return ERR_PTR(0); >> >> Yes, s/ERR_PTR(0)/ERR_PTR(NULL)/ >> >> Matt > > I agree with Dave's original suggestion since casting NULL isn't needed. Yeah, s/ERR_PTR(0)/NULL/ would be my choice as well. As a side note, I generally think it's better not to mix NULL and error pointers in error return values for a function, because they're harder to handle properly. BR, Jani. > >> >>> >>> from f9d72092cb490 >>> >>> 2) trf7970a >>> drivers/nfc/trf7970a.c : 896 >>> >>> trf->ignore_timeout = >>> !cancel_delayed_work(>timeout_work); >>> trf->rx_skb = ERR_PTR(0); >>> trf7970a_send_upstream(trf); >>> >>>from 1961843ceeca0 >>> >>> Dave >>> -- >>> -Open up your eyes, open up your mind, open up your code --- >>> / Dr. David Alan Gilbert| Running GNU/Linux | Happy \ >>> \dave @ treblig.org | | In Hex / >>> \ _|_ http://www.treblig.org |___/ -- Jani Nikula, Intel
Re: [Intel-gfx] [PATCH] drm/i915: Zap some empty lines
Hi Tvrtko, On Mon, Sep 25, 2023 at 03:28:27PM +0100, Tvrtko Ursulin wrote: > > On 25/09/2023 15:14, Andi Shyti wrote: > > Hi Tvrtko, > > > > On Wed, Sep 20, 2023 at 09:57:15AM +0100, Tvrtko Ursulin wrote: > > > From: Tvrtko Ursulin > > > > > > Recent refactoring left an unsightly block of empty lines. Remove them. > > > > > > Signed-off-by: Tvrtko Ursulin > > > Cc: Dnyaneshwar Bhadane > > > Cc: Anusha Srivatsa > > > Cc: Radhakrishna Sripada > > > > as this isn't merged yet: > > > > Reviewed-by: Andi Shyti > > Thanks, I am catching up with things and this wasn't so important. If you > have a spare moment feel free to push it? All right, pushed to drm-intel-next :) Thanks, Andi
Re: [Intel-gfx] [PATCH] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
Hi Nirmoy,
you forgot the v2 here.
On Mon, Sep 25, 2023 at 03:49:38PM +0200, Nirmoy Das wrote:
> From: Jonathan Cavitt
>
> Where applicable, use for_each_gt instead of to_gt in the
> i915_gem_shrinker functions to make them apply to more than just the
> primary GT. Specifically, this ensure i915_gem_shrink_all retires all
> requests across all GTs, and this makes i915_gem_shrinker_vmap unmap
> VMAs from all GTs.
>
> v2: Pass correct GT to intel_gt_retire_requests(Andrzej).
>
> Signed-off-by: Jonathan Cavitt
> Signed-off-by: Nirmoy Das
> Reviewed-by: Andrzej Hajda
[...]
> - if (shrink & I915_SHRINK_ACTIVE)
> - /* Retire requests to unpin all idle contexts */
> - intel_gt_retire_requests(to_gt(i915));
> + if (shrink & I915_SHRINK_ACTIVE) {
> + for_each_gt(gt, i915, i)
> + /* Retire requests to unpin all idle contexts */
> + intel_gt_retire_requests(gt);
> + }
These two brackets are not needed.
>
> /*
>* As we may completely rewrite the (un)bound list whilst unbinding
> @@ -389,6 +393,8 @@ i915_gem_shrinker_vmap(struct notifier_block *nb,
> unsigned long event, void *ptr
> struct i915_vma *vma, *next;
> unsigned long freed_pages = 0;
> intel_wakeref_t wakeref;
> + struct intel_gt *gt;
> + int i;
the trend is to use 'unsigned int' here and I've seen it
reviewed. Personally, if I really have to express a preference, I
prefer 'int' because it's a bit safer, generally I don't really
mind :)
The rest looks good.
Reviewed-by: Andi Shyti
Andi
Re: [Intel-gfx] [PATCH] drm/i915: Zap some empty lines
On 25/09/2023 15:14, Andi Shyti wrote: Hi Tvrtko, On Wed, Sep 20, 2023 at 09:57:15AM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Recent refactoring left an unsightly block of empty lines. Remove them. Signed-off-by: Tvrtko Ursulin Cc: Dnyaneshwar Bhadane Cc: Anusha Srivatsa Cc: Radhakrishna Sripada as this isn't merged yet: Reviewed-by: Andi Shyti Thanks, I am catching up with things and this wasn't so important. If you have a spare moment feel free to push it? Regards, Tvrtko
Re: [Intel-gfx] [PATCH] drm/i915/guc: Suppress 'ignoring reset notification' message
Hi John, On Thu, Sep 21, 2023 at 11:20:33AM -0700, john.c.harri...@intel.com wrote: > From: John Harrison > > If an active context has been banned (e.g. Ctrl+C killed) then it is > likely to be reset as part of evicting it from the hardware. That > results in a 'ignoring context reset notification: banned = 1' > message at info level. This confuses/concerns people and makes them > thing something has gone wrong when it hasn't. /thing/think/ > There is already a debug level message with essentially the same > information. So drop the 'ignore' info level one and just add the > 'ignore' flag to the debug level one instead (which will therefore not > appear by default but will still show up in CI runs). > > Signed-off-by: John Harrison Reviewed-by: Andi Shyti Andi
Re: [Intel-gfx] [PATCH] drm/i915/gem: remove inlines from i915_gem_execbuffer.c
Hi Jani, On Thu, Sep 21, 2023 at 07:06:37PM +0300, Jani Nikula wrote: > Just let the compiler decide what's best. Turns out absolutely nothing > changes in the output with the inlines removed. > > Signed-off-by: Jani Nikula Reviewed-by: Andi Shyti Andi
Re: [Intel-gfx] [PATCH 1/9] drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by
On Mon, Sep 25, 2023 at 10:07 AM Alex Deucher wrote:
>
> On Mon, Sep 25, 2023 at 2:30 AM Christian König
> wrote:
> >
> > Am 22.09.23 um 19:41 schrieb Alex Deucher:
> > > On Fri, Sep 22, 2023 at 1:32 PM Kees Cook wrote:
> > >> Prepare for the coming implementation by GCC and Clang of the
> > >> __counted_by
> > >> attribute. Flexible array members annotated with __counted_by can have
> > >> their accesses bounds-checked at run-time checking via
> > >> CONFIG_UBSAN_BOUNDS
> > >> (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
> > >> functions).
> > >>
> > >> As found with Coccinelle[1], add __counted_by for struct
> > >> smu10_voltage_dependency_table.
> > >>
> > >> [1]
> > >> https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
> > >>
> > >> Cc: Evan Quan
> > >> Cc: Alex Deucher
> > >> Cc: "Christian König"
> > >> Cc: "Pan, Xinhui"
> > >> Cc: David Airlie
> > >> Cc: Daniel Vetter
> > >> Cc: Xiaojian Du
> > >> Cc: Huang Rui
> > >> Cc: Kevin Wang
> > >> Cc: amd-...@lists.freedesktop.org
> > >> Cc: dri-de...@lists.freedesktop.org
> > >> Signed-off-by: Kees Cook
> > > Acked-by: Alex Deucher
> >
> > Mhm, I'm not sure if this is a good idea. That is a structure filled in
> > by the firmware, isn't it?
> >
> > That would imply that we might need to byte swap count before it is
> > checkable.
>
> True. Good point. Same for the other amdgpu patch.
Actually the other patch is fine. That's just a local structure.
Alex
>
> Alex
>
> >
> > Regards,
> > Christian.
> >
> > >
> > >> ---
> > >> drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h | 2 +-
> > >> 1 file changed, 1 insertion(+), 1 deletion(-)
> > >>
> > >> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> > >> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> > >> index 808e0ecbe1f0..42adc2a3dcbc 100644
> > >> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> > >> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> > >> @@ -192,7 +192,7 @@ struct smu10_clock_voltage_dependency_record {
> > >>
> > >> struct smu10_voltage_dependency_table {
> > >> uint32_t count;
> > >> - struct smu10_clock_voltage_dependency_record entries[];
> > >> + struct smu10_clock_voltage_dependency_record entries[]
> > >> __counted_by(count);
> > >> };
> > >>
> > >> struct smu10_clock_voltage_information {
> > >> --
> > >> 2.34.1
> > >>
> >
Re: [Intel-gfx] [PATCH] drm/i915: Zap some empty lines
Hi Tvrtko, On Wed, Sep 20, 2023 at 09:57:15AM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Recent refactoring left an unsightly block of empty lines. Remove them. > > Signed-off-by: Tvrtko Ursulin > Cc: Dnyaneshwar Bhadane > Cc: Anusha Srivatsa > Cc: Radhakrishna Sripada as this isn't merged yet: Reviewed-by: Andi Shyti Andi
Re: [Intel-gfx] [PATCH 1/9] drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by
On Mon, Sep 25, 2023 at 2:30 AM Christian König
wrote:
>
> Am 22.09.23 um 19:41 schrieb Alex Deucher:
> > On Fri, Sep 22, 2023 at 1:32 PM Kees Cook wrote:
> >> Prepare for the coming implementation by GCC and Clang of the __counted_by
> >> attribute. Flexible array members annotated with __counted_by can have
> >> their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
> >> (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
> >> functions).
> >>
> >> As found with Coccinelle[1], add __counted_by for struct
> >> smu10_voltage_dependency_table.
> >>
> >> [1]
> >> https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
> >>
> >> Cc: Evan Quan
> >> Cc: Alex Deucher
> >> Cc: "Christian König"
> >> Cc: "Pan, Xinhui"
> >> Cc: David Airlie
> >> Cc: Daniel Vetter
> >> Cc: Xiaojian Du
> >> Cc: Huang Rui
> >> Cc: Kevin Wang
> >> Cc: amd-...@lists.freedesktop.org
> >> Cc: dri-de...@lists.freedesktop.org
> >> Signed-off-by: Kees Cook
> > Acked-by: Alex Deucher
>
> Mhm, I'm not sure if this is a good idea. That is a structure filled in
> by the firmware, isn't it?
>
> That would imply that we might need to byte swap count before it is
> checkable.
True. Good point. Same for the other amdgpu patch.
Alex
>
> Regards,
> Christian.
>
> >
> >> ---
> >> drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> >> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> >> index 808e0ecbe1f0..42adc2a3dcbc 100644
> >> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> >> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
> >> @@ -192,7 +192,7 @@ struct smu10_clock_voltage_dependency_record {
> >>
> >> struct smu10_voltage_dependency_table {
> >> uint32_t count;
> >> - struct smu10_clock_voltage_dependency_record entries[];
> >> + struct smu10_clock_voltage_dependency_record entries[]
> >> __counted_by(count);
> >> };
> >>
> >> struct smu10_clock_voltage_information {
> >> --
> >> 2.34.1
> >>
>
[Intel-gfx] [PATCH] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
From: Jonathan Cavitt
Where applicable, use for_each_gt instead of to_gt in the
i915_gem_shrinker functions to make them apply to more than just the
primary GT. Specifically, this ensure i915_gem_shrink_all retires all
requests across all GTs, and this makes i915_gem_shrinker_vmap unmap
VMAs from all GTs.
v2: Pass correct GT to intel_gt_retire_requests(Andrzej).
Signed-off-by: Jonathan Cavitt
Signed-off-by: Nirmoy Das
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 44
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 214763942aa2..9cb7bbfb4278 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -14,6 +14,7 @@
#include
#include "gt/intel_gt_requests.h"
+#include "gt/intel_gt.h"
#include "i915_trace.h"
@@ -119,7 +120,8 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
intel_wakeref_t wakeref = 0;
unsigned long count = 0;
unsigned long scanned = 0;
- int err = 0;
+ int err = 0, i = 0;
+ struct intel_gt *gt;
/* CHV + VTD workaround use stop_machine(); need to trylock vm->mutex */
bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915);
@@ -147,9 +149,11 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
* what we can do is give them a kick so that we do not keep idle
* contexts around longer than is necessary.
*/
- if (shrink & I915_SHRINK_ACTIVE)
- /* Retire requests to unpin all idle contexts */
- intel_gt_retire_requests(to_gt(i915));
+ if (shrink & I915_SHRINK_ACTIVE) {
+ for_each_gt(gt, i915, i)
+ /* Retire requests to unpin all idle contexts */
+ intel_gt_retire_requests(gt);
+ }
/*
* As we may completely rewrite the (un)bound list whilst unbinding
@@ -389,6 +393,8 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned
long event, void *ptr
struct i915_vma *vma, *next;
unsigned long freed_pages = 0;
intel_wakeref_t wakeref;
+ struct intel_gt *gt;
+ int i;
with_intel_runtime_pm(>runtime_pm, wakeref)
freed_pages += i915_gem_shrink(NULL, i915, -1UL, NULL,
@@ -397,24 +403,26 @@ i915_gem_shrinker_vmap(struct notifier_block *nb,
unsigned long event, void *ptr
I915_SHRINK_VMAPS);
/* We also want to clear any cached iomaps as they wrap vmap */
- mutex_lock(_gt(i915)->ggtt->vm.mutex);
- list_for_each_entry_safe(vma, next,
-_gt(i915)->ggtt->vm.bound_list, vm_link) {
- unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
- struct drm_i915_gem_object *obj = vma->obj;
-
- if (!vma->iomap || i915_vma_is_active(vma))
- continue;
+ for_each_gt(gt, i915, i) {
+ mutex_lock(>ggtt->vm.mutex);
+ list_for_each_entry_safe(vma, next,
+>ggtt->vm.bound_list, vm_link) {
+ unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
+ struct drm_i915_gem_object *obj = vma->obj;
+
+ if (!vma->iomap || i915_vma_is_active(vma))
+ continue;
- if (!i915_gem_object_trylock(obj, NULL))
- continue;
+ if (!i915_gem_object_trylock(obj, NULL))
+ continue;
- if (__i915_vma_unbind(vma) == 0)
- freed_pages += count;
+ if (__i915_vma_unbind(vma) == 0)
+ freed_pages += count;
- i915_gem_object_unlock(obj);
+ i915_gem_object_unlock(obj);
+ }
+ mutex_unlock(>ggtt->vm.mutex);
}
- mutex_unlock(_gt(i915)->ggtt->vm.mutex);
*(unsigned long *)ptr += freed_pages;
return NOTIFY_DONE;
--
2.41.0
Re: [Intel-gfx] [PATCH] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
On 9/25/2023 3:23 PM, Andrzej Hajda wrote:
On 22.09.2023 14:35, Nirmoy Das wrote:
From: Jonathan Cavitt
Where applicable, use for_each_gt instead of to_gt in the
i915_gem_shrinker functions to make them apply to more than just the
primary GT. Specifically, this ensure i915_gem_shrink_all retires all
requests across all GTs, and this makes i915_gem_shrinker_vmap unmap
VMAs from all GTs.
Signed-off-by: Jonathan Cavitt
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 44
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 214763942aa2..3ef1fd32f80a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -14,6 +14,7 @@
#include
#include "gt/intel_gt_requests.h"
+#include "gt/intel_gt.h"
#include "i915_trace.h"
@@ -119,7 +120,8 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
intel_wakeref_t wakeref = 0;
unsigned long count = 0;
unsigned long scanned = 0;
- int err = 0;
+ int err = 0, i = 0;
+ struct intel_gt *gt;
/* CHV + VTD workaround use stop_machine(); need to trylock
vm->mutex */
bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915);
@@ -147,9 +149,11 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
* what we can do is give them a kick so that we do not keep idle
* contexts around longer than is necessary.
*/
- if (shrink & I915_SHRINK_ACTIVE)
- /* Retire requests to unpin all idle contexts */
- intel_gt_retire_requests(to_gt(i915));
+ if (shrink & I915_SHRINK_ACTIVE) {
+ for_each_gt(gt, i915, i)
+ /* Retire requests to unpin all idle contexts */
+ intel_gt_retire_requests(to_gt(i915));
to_gt(...) -> gt ?
Wow, a huge miss. Thanks will resend!
+ }
/*
* As we may completely rewrite the (un)bound list whilst
unbinding
@@ -389,6 +393,8 @@ i915_gem_shrinker_vmap(struct notifier_block *nb,
unsigned long event, void *ptr
struct i915_vma *vma, *next;
unsigned long freed_pages = 0;
intel_wakeref_t wakeref;
+ struct intel_gt *gt;
+ int i;
with_intel_runtime_pm(>runtime_pm, wakeref)
freed_pages += i915_gem_shrink(NULL, i915, -1UL, NULL,
@@ -397,24 +403,26 @@ i915_gem_shrinker_vmap(struct notifier_block
*nb, unsigned long event, void *ptr
I915_SHRINK_VMAPS);
/* We also want to clear any cached iomaps as they wrap vmap */
- mutex_lock(_gt(i915)->ggtt->vm.mutex);
- list_for_each_entry_safe(vma, next,
- _gt(i915)->ggtt->vm.bound_list, vm_link) {
- unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
- struct drm_i915_gem_object *obj = vma->obj;
-
- if (!vma->iomap || i915_vma_is_active(vma))
- continue;
+ for_each_gt(gt, i915, i) {
+ mutex_lock(>ggtt->vm.mutex);
+ list_for_each_entry_safe(vma, next,
+ >ggtt->vm.bound_list, vm_link) {
+ unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
+ struct drm_i915_gem_object *obj = vma->obj;
+
+ if (!vma->iomap || i915_vma_is_active(vma))
+ continue;
- if (!i915_gem_object_trylock(obj, NULL))
- continue;
+ if (!i915_gem_object_trylock(obj, NULL))
+ continue;
- if (__i915_vma_unbind(vma) == 0)
- freed_pages += count;
+ if (__i915_vma_unbind(vma) == 0)
+ freed_pages += count;
- i915_gem_object_unlock(obj);
+ i915_gem_object_unlock(obj);
+ }
+ mutex_unlock(>ggtt->vm.mutex);
}
- mutex_unlock(_gt(i915)->ggtt->vm.mutex);
This seems correct.
With 1st stanza fixed:
Reviewed-by: Andrzej Hajda
Thanks,
Nirmoy
Regards
Andrzej
*(unsigned long *)ptr += freed_pages;
return NOTIFY_DONE;
[Intel-gfx] [PATCH v2] debugobjects: stop accessing objects after releasing spinlock
After spinlock release object can be modified/freed by concurrent thread.
Using it in such case is error prone, even for printing object state.
To avoid such situation local copy of the object is created if necessary.
Signed-off-by: Andrzej Hajda
---
v2: add missing switch breaks
---
lib/debugobjects.c | 206 +
1 file changed, 97 insertions(+), 109 deletions(-)
diff --git a/lib/debugobjects.c b/lib/debugobjects.c
index a517256a270b71..3afff2f668fc1e 100644
--- a/lib/debugobjects.c
+++ b/lib/debugobjects.c
@@ -620,9 +620,8 @@ static void debug_objects_fill_pool(void)
static void
__debug_object_init(void *addr, const struct debug_obj_descr *descr, int
onstack)
{
- enum debug_obj_state state;
struct debug_bucket *db;
- struct debug_obj *obj;
+ struct debug_obj *obj, o;
unsigned long flags;
debug_objects_fill_pool();
@@ -644,23 +643,19 @@ __debug_object_init(void *addr, const struct
debug_obj_descr *descr, int onstack
case ODEBUG_STATE_INACTIVE:
obj->state = ODEBUG_STATE_INIT;
break;
-
- case ODEBUG_STATE_ACTIVE:
- state = obj->state;
- raw_spin_unlock_irqrestore(>lock, flags);
- debug_print_object(obj, "init");
- debug_object_fixup(descr->fixup_init, addr, state);
- return;
-
- case ODEBUG_STATE_DESTROYED:
- raw_spin_unlock_irqrestore(>lock, flags);
- debug_print_object(obj, "init");
- return;
default:
- break;
+ o = *obj;
+ obj = NULL;
}
raw_spin_unlock_irqrestore(>lock, flags);
+
+ if (obj)
+ return;
+
+ debug_print_object(, "init");
+ if (o.state == ODEBUG_STATE_ACTIVE)
+ debug_object_fixup(descr->fixup_init, addr, o.state);
}
/**
@@ -700,12 +695,9 @@ EXPORT_SYMBOL_GPL(debug_object_init_on_stack);
*/
int debug_object_activate(void *addr, const struct debug_obj_descr *descr)
{
- struct debug_obj o = { .object = addr, .state =
ODEBUG_STATE_NOTAVAILABLE, .descr = descr };
- enum debug_obj_state state;
struct debug_bucket *db;
- struct debug_obj *obj;
+ struct debug_obj *obj, o;
unsigned long flags;
- int ret;
if (!debug_objects_enabled)
return 0;
@@ -717,49 +709,47 @@ int debug_object_activate(void *addr, const struct
debug_obj_descr *descr)
raw_spin_lock_irqsave(>lock, flags);
obj = lookup_object_or_alloc(addr, db, descr, false, true);
- if (likely(!IS_ERR_OR_NULL(obj))) {
- bool print_object = false;
-
+ if (unlikely(!obj)) {
+ raw_spin_unlock_irqrestore(>lock, flags);
+ debug_objects_oom();
+ return 0;
+ } else if (likely(!IS_ERR(obj))) {
switch (obj->state) {
case ODEBUG_STATE_INIT:
case ODEBUG_STATE_INACTIVE:
obj->state = ODEBUG_STATE_ACTIVE;
- ret = 0;
break;
-
case ODEBUG_STATE_ACTIVE:
- state = obj->state;
- raw_spin_unlock_irqrestore(>lock, flags);
- debug_print_object(obj, "activate");
- ret = debug_object_fixup(descr->fixup_activate, addr,
state);
- return ret ? 0 : -EINVAL;
-
case ODEBUG_STATE_DESTROYED:
- print_object = true;
- ret = -EINVAL;
+ o = *obj;
+ obj = NULL;
break;
default:
- ret = 0;
break;
}
- raw_spin_unlock_irqrestore(>lock, flags);
- if (print_object)
- debug_print_object(obj, "activate");
- return ret;
+ } else {
+ o.object = addr;
+ o.state = ODEBUG_STATE_NOTAVAILABLE;
+ o.descr = descr;
+ obj = NULL;
}
raw_spin_unlock_irqrestore(>lock, flags);
- /* If NULL the allocation has hit OOM */
- if (!obj) {
- debug_objects_oom();
+ if (obj)
return 0;
- }
- /* Object is neither static nor tracked. It's not initialized */
debug_print_object(, "activate");
- ret = debug_object_fixup(descr->fixup_activate, addr,
ODEBUG_STATE_NOTAVAILABLE);
- return ret ? 0 : -EINVAL;
+
+ switch (o.state) {
+ case ODEBUG_STATE_ACTIVE:
+ case ODEBUG_STATE_NOTAVAILABLE:
+ if (debug_object_fixup(descr->fixup_activate, addr, o.state))
+ return 0;
+ fallthrough;
+ default:
+ return -EINVAL;
+ }
}
Re: [Intel-gfx] [PATCH] drm/i915/gem: Make i915_gem_shrinker multi-gt aware
On 22.09.2023 14:35, Nirmoy Das wrote:
From: Jonathan Cavitt
Where applicable, use for_each_gt instead of to_gt in the
i915_gem_shrinker functions to make them apply to more than just the
primary GT. Specifically, this ensure i915_gem_shrink_all retires all
requests across all GTs, and this makes i915_gem_shrinker_vmap unmap
VMAs from all GTs.
Signed-off-by: Jonathan Cavitt
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 44
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 214763942aa2..3ef1fd32f80a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -14,6 +14,7 @@
#include
#include "gt/intel_gt_requests.h"
+#include "gt/intel_gt.h"
#include "i915_trace.h"
@@ -119,7 +120,8 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
intel_wakeref_t wakeref = 0;
unsigned long count = 0;
unsigned long scanned = 0;
- int err = 0;
+ int err = 0, i = 0;
+ struct intel_gt *gt;
/* CHV + VTD workaround use stop_machine(); need to trylock vm->mutex */
bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915);
@@ -147,9 +149,11 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
* what we can do is give them a kick so that we do not keep idle
* contexts around longer than is necessary.
*/
- if (shrink & I915_SHRINK_ACTIVE)
- /* Retire requests to unpin all idle contexts */
- intel_gt_retire_requests(to_gt(i915));
+ if (shrink & I915_SHRINK_ACTIVE) {
+ for_each_gt(gt, i915, i)
+ /* Retire requests to unpin all idle contexts */
+ intel_gt_retire_requests(to_gt(i915));
to_gt(...) -> gt ?
+ }
/*
* As we may completely rewrite the (un)bound list whilst unbinding
@@ -389,6 +393,8 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned
long event, void *ptr
struct i915_vma *vma, *next;
unsigned long freed_pages = 0;
intel_wakeref_t wakeref;
+ struct intel_gt *gt;
+ int i;
with_intel_runtime_pm(>runtime_pm, wakeref)
freed_pages += i915_gem_shrink(NULL, i915, -1UL, NULL,
@@ -397,24 +403,26 @@ i915_gem_shrinker_vmap(struct notifier_block *nb,
unsigned long event, void *ptr
I915_SHRINK_VMAPS);
/* We also want to clear any cached iomaps as they wrap vmap */
- mutex_lock(_gt(i915)->ggtt->vm.mutex);
- list_for_each_entry_safe(vma, next,
-_gt(i915)->ggtt->vm.bound_list, vm_link) {
- unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
- struct drm_i915_gem_object *obj = vma->obj;
-
- if (!vma->iomap || i915_vma_is_active(vma))
- continue;
+ for_each_gt(gt, i915, i) {
+ mutex_lock(>ggtt->vm.mutex);
+ list_for_each_entry_safe(vma, next,
+>ggtt->vm.bound_list, vm_link) {
+ unsigned long count = i915_vma_size(vma) >> PAGE_SHIFT;
+ struct drm_i915_gem_object *obj = vma->obj;
+
+ if (!vma->iomap || i915_vma_is_active(vma))
+ continue;
- if (!i915_gem_object_trylock(obj, NULL))
- continue;
+ if (!i915_gem_object_trylock(obj, NULL))
+ continue;
- if (__i915_vma_unbind(vma) == 0)
- freed_pages += count;
+ if (__i915_vma_unbind(vma) == 0)
+ freed_pages += count;
- i915_gem_object_unlock(obj);
+ i915_gem_object_unlock(obj);
+ }
+ mutex_unlock(>ggtt->vm.mutex);
}
- mutex_unlock(_gt(i915)->ggtt->vm.mutex);
This seems correct.
With 1st stanza fixed:
Reviewed-by: Andrzej Hajda
Regards
Andrzej
*(unsigned long *)ptr += freed_pages;
return NOTIFY_DONE;
[Intel-gfx] [RFC] drm/i915: Allow dmabuf mmap forwarding
From: Tvrtko Ursulin
Allow mmap forwarding for imported buffers in order to allow minigbm mmap
to work on aperture-less platforms such as Meteorlake.
So far i915 did not allow mmap on imported buffers but from minigbm
perspective that worked because of the DRM_IOCTL_I915_GEM_MMAP_GTT fall-
back would then be attempted, and would be successful.
This stops working on Meteorlake since there is no aperture.
Allow i915 to mmap imported buffers using forwarding via dma_buf_mmap(),
which allows the primary minigbm path of DRM_IOCTL_I915_GEM_MMAP_OFFSET /
I915_MMAP_OFFSET_WB to work.
Signed-off-by: Tvrtko Ursulin
Cc: Daniel Vetter
Cc: Christian König
Cc: Matthew Auld
Cc: Nirmoy Das
---
1)
It is unclear to me if any real userspace depends on this, but there are
certainly compliance suites which fail.
2)
It is also a bit unclear to me if dma_buf_mmap() is exactly intended for
this kind of use. It seems that it is, but I also found some old mailing
list discussions suggesting there might be some unresolved questions
around VMA revocation.
1 + 2 = RFC for now.
Daniel and Christian were involved in 2) in the past so comments would
be appreciated.
Test-with: 20230925131539.32743-1-tvrtko.ursu...@linux.intel.com
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 78 +++
.../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
2 files changed, 65 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index aa4d842d4c5a..78c84c0a8b08 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -5,6 +5,7 @@
*/
#include
+#include
#include
#include
#include
@@ -664,6 +665,7 @@ insert_mmo(struct drm_i915_gem_object *obj, struct
i915_mmap_offset *mmo)
static struct i915_mmap_offset *
mmap_offset_attach(struct drm_i915_gem_object *obj,
enum i915_mmap_type mmap_type,
+ bool forward_mmap,
struct drm_file *file)
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
@@ -682,6 +684,7 @@ mmap_offset_attach(struct drm_i915_gem_object *obj,
mmo->obj = obj;
mmo->mmap_type = mmap_type;
+ mmo->forward_mmap = forward_mmap;
drm_vma_node_reset(>vma_node);
err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
@@ -714,12 +717,25 @@ mmap_offset_attach(struct drm_i915_gem_object *obj,
return ERR_PTR(err);
}
+static bool
+should_forward_mmap(struct drm_i915_gem_object *obj,
+ enum i915_mmap_type mmap_type)
+{
+ if (!obj->base.import_attach)
+ return false;
+
+ return mmap_type == I915_MMAP_TYPE_WB ||
+ mmap_type == I915_MMAP_TYPE_WC ||
+ mmap_type == I915_MMAP_TYPE_UC;
+}
+
static int
__assign_mmap_offset(struct drm_i915_gem_object *obj,
enum i915_mmap_type mmap_type,
u64 *offset, struct drm_file *file)
{
struct i915_mmap_offset *mmo;
+ bool should_forward;
if (i915_gem_object_never_mmap(obj))
return -ENODEV;
@@ -735,12 +751,15 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
if (mmap_type == I915_MMAP_TYPE_FIXED)
return -ENODEV;
+ should_forward = should_forward_mmap(obj, mmap_type);
+
if (mmap_type != I915_MMAP_TYPE_GTT &&
!i915_gem_object_has_struct_page(obj) &&
- !i915_gem_object_has_iomem(obj))
+ !i915_gem_object_has_iomem(obj) &&
+ !should_forward)
return -ENODEV;
- mmo = mmap_offset_attach(obj, mmap_type, file);
+ mmo = mmap_offset_attach(obj, mmap_type, should_forward, file);
if (IS_ERR(mmo))
return PTR_ERR(mmo);
@@ -936,6 +955,32 @@ static struct file *mmap_singleton(struct drm_i915_private
*i915)
return file;
}
+static void
+__vma_mmap_pgprot(struct vm_area_struct *vma, enum i915_mmap_type mmap_type)
+{
+ const pgprot_t pgprot =vm_get_page_prot(vma->vm_flags);
+
+ switch (mmap_type) {
+ case I915_MMAP_TYPE_WC:
+ vma->vm_page_prot = pgprot_writecombine(pgprot);
+ break;
+ case I915_MMAP_TYPE_FIXED:
+ GEM_WARN_ON(1);
+ fallthrough;
+ case I915_MMAP_TYPE_WB:
+ vma->vm_page_prot = pgprot;
+ break;
+ case I915_MMAP_TYPE_UC:
+ vma->vm_page_prot = pgprot_noncached(pgprot);
+ break;
+ case I915_MMAP_TYPE_GTT:
+ vma->vm_page_prot = pgprot_writecombine(pgprot);
+ break;
+ }
+
+ vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
+}
+
static int
i915_gem_object_mmap(struct drm_i915_gem_object *obj,
struct i915_mmap_offset *mmo,
@@ -953,6 +998,20 @@ i915_gem_object_mmap(struct drm_i915_gem_object *obj,
vm_flags_clear(vma,
[Intel-gfx] [RFC/CI] prime_vgem: Add mmap forwarding tests
From: Tvrtko Ursulin
...
Signed-off-by: Tvrtko Ursulin
---
tests/prime_vgem.c | 45 +
1 file changed, 41 insertions(+), 4 deletions(-)
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 876e04ed02a1..29eb7eccad61 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -72,6 +72,21 @@
* Feature: gtt, prime
* Run type: BAT
*
+ * SUBTEST: forwarded-wc
+ * Description: Examine access path through imported buffer mmap forwarding
+ * Feature: mmap, prime
+ * Run type: FULL
+ *
+ * SUBTEST: forwarded-uc
+ * Description: Examine access path through imported buffer mmap forwarding
+ * Feature: mmap, prime
+ * Run type: FULL
+ *
+ * SUBTEST: forwarded-wb
+ * Description: Examine access path through imported buffer mmap forwarding
+ * Feature: mmap, prime
+ * Run type: FULL
+ *
* SUBTEST: basic-read
* Description: Examine read access path.
* Feature: gtt, prime
@@ -420,7 +435,7 @@ static void test_write(int vgem, int i915)
munmap(ptr, scratch.size);
}
-static void test_gtt(int vgem, int i915)
+static void test_mmap_offset(int vgem, int i915, unsigned int flags)
{
struct vgem_bo scratch;
uint32_t handle;
@@ -436,7 +451,16 @@ static void test_gtt(int vgem, int i915)
handle = prime_fd_to_handle(i915, dmabuf);
close(dmabuf);
- ptr = gem_mmap__gtt(i915, handle, scratch.size, PROT_WRITE);
+ ptr = __gem_mmap_offset(i915, handle, 0, scratch.size, PROT_WRITE,
+ flags);
+ if (flags == I915_MMAP_OFFSET_GTT) {
+ /* Only allowed to fail if no aperture. */
+ igt_require(ptr || !gem_mappable_aperture_size(i915));
+
+ } else {
+ /* Skip on old kernels. */
+ igt_require(ptr);
+ }
for (i = 0; i < 1024; i++)
ptr[1024*i] = i;
munmap(ptr, scratch.size);
@@ -448,7 +472,8 @@ static void test_gtt(int vgem, int i915)
}
munmap(ptr, scratch.size);
- ptr = gem_mmap__gtt(i915, handle, scratch.size, PROT_READ);
+ ptr = __gem_mmap_offset(i915, handle, 0, scratch.size, PROT_READ,
+ flags);
for (i = 0; i < 1024; i++)
igt_assert_eq(ptr[1024*i], ~i);
munmap(ptr, scratch.size);
@@ -1225,9 +1250,21 @@ igt_main
igt_describe("Examine access path through GTT.");
igt_subtest("basic-gtt") {
gem_require_mappable_ggtt(i915);
- test_gtt(vgem, i915);
+ test_mmap_offset(vgem, i915, I915_MMAP_OFFSET_GTT);
}
+ igt_describe("Examine access path through mmap forwarding.");
+ igt_subtest("forwarded-wc")
+ test_mmap_offset(vgem, i915, I915_MMAP_OFFSET_WC);
+
+ igt_describe("Examine access path through mmap forwarding.");
+ igt_subtest("forwarded-uc")
+ test_mmap_offset(vgem, i915, I915_MMAP_OFFSET_UC);
+
+ igt_describe("Examine access path through mmap forwarding.");
+ igt_subtest("forwarded-wb")
+ test_mmap_offset(vgem, i915, I915_MMAP_OFFSET_WB);
+
igt_describe("Examine blitter access path.");
igt_subtest("basic-blt")
test_blt(vgem, i915);
--
2.39.2
Re: [Intel-gfx] ✗ Fi.CI.BUILD: failure for debugobjects: stop accessing objects after releasing spinlock
On 25.09.2023 12:37, Patchwork wrote: == Series Details == Series: debugobjects: stop accessing objects after releasing spinlock URL : https://patchwork.freedesktop.org/series/124185/ State : failure == Summary == Error: make failed CALLscripts/checksyscalls.sh DESCEND objtool INSTALL libsubcmd_headers AR lib/lib.a CC lib/debugobjects.o lib/debugobjects.c: In function ‘debug_object_activate’: lib/debugobjects.c:727:3: error: label at end of compound statement 727 | default: | ^~~ lib/debugobjects.c:748:2: error: label at end of compound statement 748 | default: | ^~~ lib/debugobjects.c: In function ‘debug_object_destroy’: lib/debugobjects.c:840:2: error: label at end of compound statement 840 | default: | ^~~ make[3]: *** [scripts/Makefile.build:243: lib/debugobjects.o] Error 1 make[2]: *** [scripts/Makefile.build:480: lib] Error 2 make[1]: *** [/home/kbuild/kernel/Makefile:1913: .] Error 2 make: *** [Makefile:234: __sub-make] Error 2 Build failed, no error log produced Apparently this compiler is more pedantic, v2 posted. Regards Andrzej
Re: [Intel-gfx] [Intel-xe] [PATCH v5 0/2] fbc on any planes
On Mon, 2023-09-25 at 15:16 +0300, Jani Nikula wrote: > On Fri, 22 Sep 2023, Vinod Govindapillai > wrote: > > FBC can be supported in first three planes in lnl > > When you're cross-posting to intel-xe and intel-gfx lists, you need to > actually say what you want done with these patches. Otherwise we won't > know. > > Before xe is upstream, the order of business for i915 changes should be: > > 1) Get them merged to upstream i915 (send to intel-gfx) > > 2) Get the merged commits backported to xe (send to intel-xe) > > > BR, > Jani. Okay. I was following the [https://gfx-linux.intel.com/xe.html] Here I assumed the flow as you have mentioned. Lucas has asked to hold off merging until the initial display support is merged. So wonder if I should take first internal and then upstream route for this. BR Vinod > > > > > Vinod Govindapillai (2): > > drm/i915/lnl: possibility to enable FBC on first three planes > > drm/i915/lnl: update the supported plane formats with FBC > > > > drivers/gpu/drm/i915/display/intel_fbc.c | 11 ++- > > drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++--- > > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > > 3 files changed, 18 insertions(+), 4 deletions(-) >
[Intel-gfx] [PATCH] drm/i915/gt: Add error handling in intel_timeline_pin()
This patch adds error-handling for the i915_active_acquire()
inside the intel_timeline_pin().
Signed-off-by: liuhaoran
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c
b/drivers/gpu/drm/i915/gt/intel_timeline.c
index b9640212d659..a2edf9233500 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -211,7 +211,11 @@ int intel_timeline_pin(struct intel_timeline *tl, struct
i915_gem_ww_ctx *ww)
GT_TRACE(tl->gt, "timeline:%llx using HWSP offset:%x\n",
tl->fence_context, tl->hwsp_offset);
- i915_active_acquire(>active);
+ err = i915_active_acquire(>active);
+
+ if (err)
+ return err;
+
if (atomic_fetch_inc(>pin_count)) {
i915_active_release(>active);
__i915_vma_unpin(tl->hwsp_ggtt);
--
2.17.1
Re: [Intel-gfx] [PATCH 0/2] drm/i915: fix rb-tree/llist/list confusion
On 05.09.23 13:39, Mathias Krause wrote:
> Commit 1ec23ed7126e ("drm/i915: Use uabi engines for the default engine
> map") introduced a bug regarding engine iteration in default_engines()
> as the rb tree isn't set up yet that early during driver initialization.
> This triggered a sanity check we have in our grsecurity kernels, fixed
> by reverting the offending commit (patch 1) and giving the
> type-multiplexed members some more visibility to avoid making a similar
> mistake again in the future (patch 2).
>
> Please apply!
>
> Thanks,
> Mathias
>
> Mathias Krause (2):
> Revert "drm/i915: Use uabi engines for the default engine map"
> drm/i915: Clarify type evolution of uabi_node/uabi_engines
>
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 9 +
> drivers/gpu/drm/i915/gt/intel_engine_types.h | 10 +-
> drivers/gpu/drm/i915/gt/intel_engine_user.c | 17 +++--
> drivers/gpu/drm/i915/i915_drv.h | 17 -
> 4 files changed, 37 insertions(+), 16 deletions(-)
>
Ping. Any objections to this series?
- Mathias
[Intel-gfx] ERR_PTR(0) in a couple of places
Hi, I randomly noticed there are a couple of places in the kernel that do ERR_PTR(0); and thought that was odd - shouldn't those just be NULL's ? 1) i915 drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c : 47 if (i <= 1) return ERR_PTR(0); from f9d72092cb490 2) trf7970a drivers/nfc/trf7970a.c : 896 trf->ignore_timeout = !cancel_delayed_work(>timeout_work); trf->rx_skb = ERR_PTR(0); trf7970a_send_upstream(trf); from 1961843ceeca0 Dave -- -Open up your eyes, open up your mind, open up your code --- / Dr. David Alan Gilbert| Running GNU/Linux | Happy \ \dave @ treblig.org | | In Hex / \ _|_ http://www.treblig.org |___/
[Intel-gfx] [PATCH] drm/i915/gt: Add error handling in intel_timeline_pin()
This patch adds error-handling for the i915_active_acquire()
inside the intel_timeline_pin().
Signed-off-by: liuhaoran
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c
b/drivers/gpu/drm/i915/gt/intel_timeline.c
index b9640212d659..a2edf9233500 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -211,7 +211,11 @@ int intel_timeline_pin(struct intel_timeline *tl, struct
i915_gem_ww_ctx *ww)
GT_TRACE(tl->gt, "timeline:%llx using HWSP offset:%x\n",
tl->fence_context, tl->hwsp_offset);
- i915_active_acquire(>active);
+ err = i915_active_acquire(>active);
+
+ if (err)
+ return err;
+
if (atomic_fetch_inc(>pin_count)) {
i915_active_release(>active);
__i915_vma_unpin(tl->hwsp_ggtt);
--
2.17.1
Re: [Intel-gfx] ERR_PTR(0) in a couple of places
* Krzysztof Kozlowski (krzysztof.kozlow...@linaro.org) wrote:
> On 24/09/2023 02:41, Dr. David Alan Gilbert wrote:
> > Hi,
> > I randomly noticed there are a couple of places in the kernel that
> > do
> >ERR_PTR(0);
> >
> > and thought that was odd - shouldn't those just be NULL's ?
> >
> > 1) i915
> > drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c : 47
> >
> > if (i <= 1)
> > return ERR_PTR(0);
> >
> > from f9d72092cb490
> >
> > 2) trf7970a
> > drivers/nfc/trf7970a.c : 896
> >
> > trf->ignore_timeout =
> > !cancel_delayed_work(>timeout_work);
> > trf->rx_skb = ERR_PTR(0);
>
> I would guess that code is relying on rx_skb being valid pointer or ERR
> (if (!IS_ERR(...))).
If seems mixed, that function calls trf7970a_send_upstream which has
both:
if (trf->rx_skb && !IS_ERR(trf->rx_skb) && !trf->aborting)
print_hex_dump_debug("trf7970a rx data: ", DUMP_PREFIX_NONE,
16, 1, trf->rx_skb->data, trf->rx_skb->len,
false);
and
if (!IS_ERR(trf->rx_skb)) {
kfree_skb(trf->rx_skb);
trf->rx_skb = ERR_PTR(-ECANCELED);
}
It's not clear to me whether it's expecteing that 2nd if to happen or
not.
I notice err.h gained a IS_ERR_OR_NULL to help that case as well.
Dave
> Best regards,
> Krzysztof
>
--
-Open up your eyes, open up your mind, open up your code ---
/ Dr. David Alan Gilbert| Running GNU/Linux | Happy \
\dave @ treblig.org | | In Hex /
\ _|_ http://www.treblig.org |___/
Re: [Intel-gfx] [PATCH] drm/i915/dsb: DSB code refactoring
On Sat, 23 Sep 2023, Animesh Manna wrote:
> Refactor DSB implementation to be compatible with Xe driver.
Sad trombone.
struct intel_dsb should remain an opaque type. I put effort into hiding
its definition, so its guts wouldn't be accessed nilly-willy all over
the place. If it's not hidden, it just will get accessed.
BR,
Jani.
>
> Signed-off-by: Animesh Manna
> ---
> drivers/gpu/drm/i915/Makefile| 1 +
> drivers/gpu/drm/i915/display/intel_dsb.c | 115 ---
> drivers/gpu/drm/i915/display/intel_dsb.h | 41 ++-
> drivers/gpu/drm/i915/display/intel_dsb_ops.c | 67 +++
> 4 files changed, 130 insertions(+), 94 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_dsb_ops.c
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 1b2e02e9d92c..7fbb5055b85b 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -256,6 +256,7 @@ i915-y += \
> display/intel_dpt.o \
> display/intel_drrs.o \
> display/intel_dsb.o \
> + display/intel_dsb_ops.o \
> display/intel_fb.o \
> display/intel_fb_pin.o \
> display/intel_fbc.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 9a507b9ad82c..f7c6b9aa130f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -4,8 +4,6 @@
> *
> */
>
> -#include "gem/i915_gem_internal.h"
> -
> #include "i915_drv.h"
> #include "i915_reg.h"
> #include "intel_de.h"
> @@ -13,41 +11,7 @@
> #include "intel_dsb.h"
> #include "intel_dsb_regs.h"
>
> -struct i915_vma;
> -
> -enum dsb_id {
> - INVALID_DSB = -1,
> - DSB1,
> - DSB2,
> - DSB3,
> - MAX_DSB_PER_PIPE
> -};
> -
> -struct intel_dsb {
> - enum dsb_id id;
> -
> - u32 *cmd_buf;
> - struct i915_vma *vma;
> - struct intel_crtc *crtc;
> -
> - /*
> - * maximum number of dwords the buffer will hold.
> - */
> - unsigned int size;
> -
> - /*
> - * free_pos will point the first free dword and
> - * help in calculating tail of command buffer.
> - */
> - unsigned int free_pos;
> -
> - /*
> - * ins_start_offset will help to store start dword of the dsb
> - * instuction and help in identifying the batch of auto-increment
> - * register.
> - */
> - unsigned int ins_start_offset;
> -};
> +#define CACHELINE_BYTES 64
>
> /**
> * DOC: DSB
> @@ -117,8 +81,6 @@ static bool is_dsb_busy(struct drm_i915_private *i915,
> enum pipe pipe,
>
> static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw)
> {
> - u32 *buf = dsb->cmd_buf;
> -
> if (!assert_dsb_has_room(dsb))
> return;
>
> @@ -127,14 +89,13 @@ static void intel_dsb_emit(struct intel_dsb *dsb, u32
> ldw, u32 udw)
>
> dsb->ins_start_offset = dsb->free_pos;
>
> - buf[dsb->free_pos++] = ldw;
> - buf[dsb->free_pos++] = udw;
> + intel_dsb_write(dsb, dsb->free_pos++, ldw);
> + intel_dsb_write(dsb, dsb->free_pos++, udw);
> }
>
> static bool intel_dsb_prev_ins_is_write(struct intel_dsb *dsb,
> u32 opcode, i915_reg_t reg)
> {
> - const u32 *buf = dsb->cmd_buf;
> u32 prev_opcode, prev_reg;
>
> /*
> @@ -145,8 +106,8 @@ static bool intel_dsb_prev_ins_is_write(struct intel_dsb
> *dsb,
> if (dsb->free_pos == 0)
> return false;
>
> - prev_opcode = buf[dsb->ins_start_offset + 1] & ~DSB_REG_VALUE_MASK;
> - prev_reg = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK;
> + prev_opcode = intel_dsb_read(dsb, dsb->ins_start_offset + 1) >>
> DSB_OPCODE_SHIFT;
> + prev_reg = intel_dsb_read(dsb, dsb->ins_start_offset + 1) &
> DSB_REG_VALUE_MASK;
>
> return prev_opcode == opcode && prev_reg == i915_mmio_reg_offset(reg);
> }
> @@ -179,6 +140,8 @@ static bool intel_dsb_prev_ins_is_indexed_write(struct
> intel_dsb *dsb, i915_reg_
> void intel_dsb_reg_write(struct intel_dsb *dsb,
>i915_reg_t reg, u32 val)
> {
> + u32 old_val;
> +
> /*
>* For example the buffer will look like below for 3 dwords for auto
>* increment register:
> @@ -202,31 +165,30 @@ void intel_dsb_reg_write(struct intel_dsb *dsb,
> (DSB_BYTE_EN << DSB_BYTE_EN_SHIFT) |
> i915_mmio_reg_offset(reg));
> } else {
> - u32 *buf = dsb->cmd_buf;
> -
> if (!assert_dsb_has_room(dsb))
> return;
>
> /* convert to indexed write? */
> if (intel_dsb_prev_ins_is_mmio_write(dsb, reg)) {
> - u32 prev_val = buf[dsb->ins_start_offset + 0];
> + u32 prev_val = intel_dsb_read(dsb,
> dsb->ins_start_offset + 0);
>
> - buf[dsb->ins_start_offset + 0] = 1; /* count */
Re: [Intel-gfx] [PATCH] drm/i915/gt: Add error handling in intel_timeline_pin()
On Sun, 24 Sep 2023, liuhaoran wrote:
> This patch adds error-handling for the i915_active_acquire()
> inside the intel_timeline_pin().
Seems to me this is not sufficient.
BR,
Jani.
>
> Signed-off-by: liuhaoran
> ---
> drivers/gpu/drm/i915/gt/intel_timeline.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c
> b/drivers/gpu/drm/i915/gt/intel_timeline.c
> index b9640212d659..a2edf9233500 100644
> --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
> @@ -211,7 +211,11 @@ int intel_timeline_pin(struct intel_timeline *tl, struct
> i915_gem_ww_ctx *ww)
> GT_TRACE(tl->gt, "timeline:%llx using HWSP offset:%x\n",
>tl->fence_context, tl->hwsp_offset);
>
> - i915_active_acquire(>active);
> + err = i915_active_acquire(>active);
> +
> + if (err)
> + return err;
> +
> if (atomic_fetch_inc(>pin_count)) {
> i915_active_release(>active);
> __i915_vma_unpin(tl->hwsp_ggtt);
--
Jani Nikula, Intel
Re: [Intel-gfx] [PATCH 3/9] drm/i915/selftests: Annotate struct perf_series with __counted_by
Hi Kees, On Fri, Sep 22, 2023 at 10:32:08AM -0700, Kees Cook wrote: > Prepare for the coming implementation by GCC and Clang of the __counted_by > attribute. Flexible array members annotated with __counted_by can have > their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS > (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family > functions). > > As found with Coccinelle[1], add __counted_by for struct perf_series. > > [1] > https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci > > Cc: Jani Nikula > Cc: Joonas Lahtinen > Cc: Rodrigo Vivi > Cc: Tvrtko Ursulin > Cc: David Airlie > Cc: Daniel Vetter > Cc: Chris Wilson > Cc: John Harrison > Cc: Andi Shyti > Cc: Matthew Brost > Cc: intel-gfx@lists.freedesktop.org > Cc: dri-de...@lists.freedesktop.org > Signed-off-by: Kees Cook Reviewed-by: Andi Shyti Thanks, Andi
Re: [Intel-gfx] [Intel-xe] [PATCH v5 0/2] fbc on any planes
On Fri, 22 Sep 2023, Vinod Govindapillai wrote: > FBC can be supported in first three planes in lnl When you're cross-posting to intel-xe and intel-gfx lists, you need to actually say what you want done with these patches. Otherwise we won't know. Before xe is upstream, the order of business for i915 changes should be: 1) Get them merged to upstream i915 (send to intel-gfx) 2) Get the merged commits backported to xe (send to intel-xe) BR, Jani. > > Vinod Govindapillai (2): > drm/i915/lnl: possibility to enable FBC on first three planes > drm/i915/lnl: update the supported plane formats with FBC > > drivers/gpu/drm/i915/display/intel_fbc.c | 11 ++- > drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++--- > drivers/gpu/drm/i915/i915_reg.h| 2 ++ > 3 files changed, 18 insertions(+), 4 deletions(-) -- Jani Nikula, Intel
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Add a wrapper function for vga decode setup (rev2)
== Series Details == Series: drm/i915/display: Add a wrapper function for vga decode setup (rev2) URL : https://patchwork.freedesktop.org/series/124104/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13673_full -> Patchwork_124104v2_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124104v2_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124104v2_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 10) -- Additional (1): shard-tglu0 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124104v2_full: ### IGT changes ### Possible regressions * igt@gem_exec_schedule@noreorder@vcs0: - shard-mtlp: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13673/shard-mtlp-2/igt@gem_exec_schedule@noreor...@vcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-mtlp-4/igt@gem_exec_schedule@noreor...@vcs0.html Known issues Here are the changes found in Patchwork_124104v2_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@object-reloc-purge-cache: - shard-dg2: NOTRUN -> [SKIP][3] ([i915#8411]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-dg2-7/igt@api_intel...@object-reloc-purge-cache.html * igt@device_reset@cold-reset-bound: - shard-dg2: NOTRUN -> [SKIP][4] ([i915#7701]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-dg2-7/igt@device_re...@cold-reset-bound.html * igt@drm_fdinfo@busy-check-all@ccs0: - shard-mtlp: NOTRUN -> [SKIP][5] ([i915#8414]) +11 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-mtlp-7/igt@drm_fdinfo@busy-check-...@ccs0.html * igt@drm_fdinfo@most-busy-idle-check-all@rcs0: - shard-rkl: [PASS][6] -> [FAIL][7] ([i915#7742]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13673/shard-rkl-6/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-rkl-6/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html * igt@drm_fdinfo@virtual-busy-hang: - shard-dg2: NOTRUN -> [SKIP][8] ([i915#8414]) +1 other test skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-dg2-11/igt@drm_fdi...@virtual-busy-hang.html * igt@gem_bad_reloc@negative-reloc-lut: - shard-mtlp: NOTRUN -> [SKIP][9] ([i915#3281]) +2 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-mtlp-3/igt@gem_bad_re...@negative-reloc-lut.html * igt@gem_caching@reads: - shard-mtlp: NOTRUN -> [SKIP][10] ([i915#4873]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-mtlp-7/igt@gem_cach...@reads.html * igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0: - shard-dg2: NOTRUN -> [INCOMPLETE][11] ([i915#7297]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-dg2-7/igt@gem_ccs@suspend-res...@xmajor-compressed-compfmt0-lmem0-lmem0.html * igt@gem_close_race@multigpu-basic-process: - shard-dg2: NOTRUN -> [SKIP][12] ([i915#7697]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-dg2-7/igt@gem_close_r...@multigpu-basic-process.html * igt@gem_ctx_isolation@preservation-s3@rcs0: - shard-snb: NOTRUN -> [DMESG-WARN][13] ([i915#8841]) +1 other test dmesg-warn [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-snb4/igt@gem_ctx_isolation@preservation...@rcs0.html * igt@gem_ctx_param@invalid-set-no-zeromap: - shard-mtlp: [PASS][14] -> [DMESG-WARN][15] ([i915#2017] / [i915#9157]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13673/shard-mtlp-3/igt@gem_ctx_pa...@invalid-set-no-zeromap.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-mtlp-4/igt@gem_ctx_pa...@invalid-set-no-zeromap.html * igt@gem_ctx_persistence@heartbeat-close: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#8555]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-dg2-1/igt@gem_ctx_persiste...@heartbeat-close.html * igt@gem_ctx_persistence@heartbeat-hang: - shard-mtlp: NOTRUN -> [SKIP][17] ([i915#8555]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/shard-mtlp-7/igt@gem_ctx_persiste...@heartbeat-hang.html * igt@gem_ctx_sseu@invalid-sseu: - shard-dg2: NOTRUN -> [SKIP][18] ([i915#280]) +2
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: refactor aux_ch_name() (rev2)
== Series Details == Series: drm/i915/dp: refactor aux_ch_name() (rev2) URL : https://patchwork.freedesktop.org/series/124107/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13674 -> Patchwork_124107v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124107v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124107v2, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/index.html Participating hosts (23 -> 32) -- Additional (14): bat-mtlp-8 bat-adls-5 bat-dg1-5 fi-bsw-n3050 bat-adlm-1 fi-tgl-1115g4 fi-apl-guc fi-kbl-8809g fi-ivb-3770 fi-elk-e7500 fi-pnv-d510 fi-blb-e6850 bat-jsl-1 fi-skl-6600u Missing(5): bat-kbl-2 fi-cfl-guc fi-snb-2520m fi-cfl-8109u fi-bsw-nick Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124107v2: ### IGT changes ### Possible regressions * igt@i915_selftest@live@guc_multi_lrc: - fi-kbl-soraka: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13674/fi-kbl-soraka/igt@i915_selftest@live@guc_multi_lrc.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/fi-kbl-soraka/igt@i915_selftest@live@guc_multi_lrc.html Known issues Here are the changes found in Patchwork_124107v2 that come from known issues: ### IGT changes ### Issues hit * igt@core_hotunplug@unbind-rebind: - fi-kbl-8809g: NOTRUN -> [DMESG-WARN][3] ([i915#8298]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/fi-kbl-8809g/igt@core_hotunp...@unbind-rebind.html * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][4] ([i915#9318]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html - bat-adls-5: NOTRUN -> [SKIP][5] ([i915#9318]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-adls-5/igt@debugfs_t...@basic-hwmon.html - bat-adlm-1: NOTRUN -> [SKIP][6] ([i915#3826]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-adlm-1/igt@debugfs_t...@basic-hwmon.html - bat-jsl-1: NOTRUN -> [SKIP][7] ([i915#9318]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html - fi-tgl-1115g4: NOTRUN -> [SKIP][8] ([i915#9318]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/fi-tgl-1115g4/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - bat-adls-5: NOTRUN -> [SKIP][9] ([i915#2582]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-adls-5/igt@fb...@eof.html - bat-adlm-1: NOTRUN -> [SKIP][10] ([i915#2582]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-adlm-1/igt@fb...@eof.html * igt@fbdev@info: - bat-adls-5: NOTRUN -> [SKIP][11] ([i915#1849] / [i915#2582]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-adls-5/igt@fb...@info.html - fi-kbl-8809g: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#1849]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/fi-kbl-8809g/igt@fb...@info.html - bat-adlm-1: NOTRUN -> [SKIP][13] ([i915#1849] / [i915#2582]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-adlm-1/igt@fb...@info.html * igt@gem_exec_suspend@basic-s0@smem: - bat-mtlp-8: NOTRUN -> [ABORT][14] ([i915#9262]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-mtlp-8/igt@gem_exec_suspend@basic...@smem.html - bat-mtlp-6: NOTRUN -> [ABORT][15] ([i915#9262]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-mtlp-6/igt@gem_exec_suspend@basic...@smem.html * igt@gem_huc_copy@huc-copy: - fi-kbl-8809g: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#2190]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html - fi-tgl-1115g4: NOTRUN -> [SKIP][17] ([i915#2190]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/fi-tgl-1115g4/igt@gem_huc_c...@huc-copy.html - bat-jsl-1: NOTRUN -> [SKIP][18] ([i915#2190]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/bat-jsl-1/igt@gem_huc_c...@huc-copy.html - fi-skl-6600u: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124107v2/fi-skl-6600u/igt@gem_huc_c...@huc-copy.html *
[Intel-gfx] ✗ Fi.CI.BUILD: failure for debugobjects: stop accessing objects after releasing spinlock
== Series Details == Series: debugobjects: stop accessing objects after releasing spinlock URL : https://patchwork.freedesktop.org/series/124185/ State : failure == Summary == Error: make failed CALLscripts/checksyscalls.sh DESCEND objtool INSTALL libsubcmd_headers AR lib/lib.a CC lib/debugobjects.o lib/debugobjects.c: In function ‘debug_object_activate’: lib/debugobjects.c:727:3: error: label at end of compound statement 727 | default: | ^~~ lib/debugobjects.c:748:2: error: label at end of compound statement 748 | default: | ^~~ lib/debugobjects.c: In function ‘debug_object_destroy’: lib/debugobjects.c:840:2: error: label at end of compound statement 840 | default: | ^~~ make[3]: *** [scripts/Makefile.build:243: lib/debugobjects.o] Error 1 make[2]: *** [scripts/Makefile.build:480: lib] Error 2 make[1]: *** [/home/kbuild/kernel/Makefile:1913: .] Error 2 make: *** [Makefile:234: __sub-make] Error 2 Build failed, no error log produced
Re: [Intel-gfx] [PATCH 3/9] drm/i915/selftests: Annotate struct perf_series with __counted_by
On 22.09.2023 19:32, Kees Cook wrote:
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct perf_series.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: John Harrison
Cc: Andi Shyti
Cc: Matthew Brost
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
I am surprised this is the only finding in i915, I would expected more.
Anyway:
Reviewed-by: Andrzej Hajda
Regards
Andrzej
---
drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c
b/drivers/gpu/drm/i915/selftests/i915_request.c
index a9b79888c193..acae30a04a94 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -1924,7 +1924,7 @@ struct perf_stats {
struct perf_series {
struct drm_i915_private *i915;
unsigned int nengines;
- struct intel_context *ce[];
+ struct intel_context *ce[] __counted_by(nengines);
};
static int cmp_u32(const void *A, const void *B)
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Convert fbdev to DRM client (rev3)
== Series Details == Series: drm/i915: Convert fbdev to DRM client (rev3) URL : https://patchwork.freedesktop.org/series/115714/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13673 -> Patchwork_115714v3 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_115714v3 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_115714v3, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/index.html Participating hosts (38 -> 37) -- Additional (1): bat-dg2-9 Missing(2): fi-hsw-4770 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_115714v3: ### IGT changes ### Possible regressions * igt@i915_selftest@live@hangcheck: - bat-adlm-1: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13673/bat-adlm-1/igt@i915_selftest@l...@hangcheck.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-adlm-1/igt@i915_selftest@l...@hangcheck.html Known issues Here are the changes found in Patchwork_115714v3 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-9: NOTRUN -> [SKIP][3] ([i915#4083]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-9: NOTRUN -> [SKIP][4] ([i915#4077]) +2 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-dg2-9: NOTRUN -> [SKIP][5] ([i915#4079]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-9: NOTRUN -> [SKIP][6] ([i915#6621]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [PASS][7] -> [ABORT][8] ([i915#9262]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13673/bat-mtlp-8/igt@i915_selftest@l...@requests.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-9: NOTRUN -> [SKIP][9] ([i915#5190]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-9: NOTRUN -> [SKIP][10] ([i915#4215] / [i915#5190]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-9: NOTRUN -> [SKIP][11] ([i915#4212]) +6 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-9: NOTRUN -> [SKIP][12] ([i915#4212] / [i915#5608]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-9: NOTRUN -> [SKIP][13] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-9: NOTRUN -> [SKIP][14] ([fdo#109285]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-9: NOTRUN -> [SKIP][15] ([i915#5274]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-dg2-9/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1: - bat-rplp-1: [PASS][16] -> [ABORT][17] ([i915#8668]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13673/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115714v3/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html * igt@kms_psr@sprite_plane_onoff:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Convert fbdev to DRM client (rev3)
== Series Details == Series: drm/i915: Convert fbdev to DRM client (rev3) URL : https://patchwork.freedesktop.org/series/115714/ State : warning == Summary == Error: dim checkpatch failed 6a1984dd35f8 drm/i915: Unregister in-kernel clients b7f5e140477a drm/client: Do not acquire module reference b8c4364e8591 drm/client: Export drm_client_dev_unregister() dcee278a6088 drm/i915: Move fbdev functions -:119: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ifbdev)...) over kzalloc(sizeof(struct intel_fbdev)...) #119: FILE: drivers/gpu/drm/i915/display/intel_fbdev.c:683: + ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL); -:120: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!ifbdev" #120: FILE: drivers/gpu/drm/i915/display/intel_fbdev.c:684: + if (ifbdev == NULL) total: 0 errors, 0 warnings, 2 checks, 172 lines checked 97918400aff0 drm/i915: Initialize fbdev DRM client with callback functions 143959f00c72 drm/i915: Implement fbdev client callbacks e0321fb46f70 drm/i915: Implement fbdev emulation as in-kernel client
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Convert fbdev to DRM client (rev3)
== Series Details == Series: drm/i915: Convert fbdev to DRM client (rev3) URL : https://patchwork.freedesktop.org/series/115714/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:237:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:239:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Add a wrapper function for vga decode setup (rev2)
== Series Details == Series: drm/i915/display: Add a wrapper function for vga decode setup (rev2) URL : https://patchwork.freedesktop.org/series/124104/ State : success == Summary == CI Bug Log - changes from CI_DRM_13673 -> Patchwork_124104v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/index.html Participating hosts (38 -> 38) -- Additional (1): fi-kbl-soraka Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_124104v2 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@i915_selftest@live@gt_heartbeat: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][3] ([i915#5334] / [i915#7872]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][4] ([i915#1886] / [i915#7913]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@kms_dsc@dsc-basic: - fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271]) +9 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/fi-kbl-soraka/igt@kms_...@dsc-basic.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][6] -> [FAIL][7] ([IGT#3]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13673/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334 [i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872 [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913 Build changes - * Linux: CI_DRM_13673 -> Patchwork_124104v2 CI-20190529: 20190529 CI_DRM_13673: a16992c98c4880906a59766dcd6b897546b0fcd6 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7501: f95083bb410e7a5521cca9c6908760a2de6f6591 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_124104v2: a16992c98c4880906a59766dcd6b897546b0fcd6 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 3acfbb61045c drm/i915/display: Add a wrapper function for vga decode setup == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124104v2/index.html
[Intel-gfx] [PATCH] debugobjects: stop accessing objects after releasing spinlock
After spinlock release object can be modified/freed by concurrent thread.
Using it in such case is error prone, even for printing object state.
To avoid such situation local copy of the object is created if necessary.
Signed-off-by: Andrzej Hajda
---
lib/debugobjects.c | 208 +
1 file changed, 97 insertions(+), 111 deletions(-)
diff --git a/lib/debugobjects.c b/lib/debugobjects.c
index a517256a270b71..d6f9af11bff0d9 100644
--- a/lib/debugobjects.c
+++ b/lib/debugobjects.c
@@ -620,9 +620,8 @@ static void debug_objects_fill_pool(void)
static void
__debug_object_init(void *addr, const struct debug_obj_descr *descr, int
onstack)
{
- enum debug_obj_state state;
struct debug_bucket *db;
- struct debug_obj *obj;
+ struct debug_obj *obj, o;
unsigned long flags;
debug_objects_fill_pool();
@@ -644,23 +643,19 @@ __debug_object_init(void *addr, const struct
debug_obj_descr *descr, int onstack
case ODEBUG_STATE_INACTIVE:
obj->state = ODEBUG_STATE_INIT;
break;
-
- case ODEBUG_STATE_ACTIVE:
- state = obj->state;
- raw_spin_unlock_irqrestore(>lock, flags);
- debug_print_object(obj, "init");
- debug_object_fixup(descr->fixup_init, addr, state);
- return;
-
- case ODEBUG_STATE_DESTROYED:
- raw_spin_unlock_irqrestore(>lock, flags);
- debug_print_object(obj, "init");
- return;
default:
- break;
+ o = *obj;
+ obj = NULL;
}
raw_spin_unlock_irqrestore(>lock, flags);
+
+ if (obj)
+ return;
+
+ debug_print_object(, "init");
+ if (o.state == ODEBUG_STATE_ACTIVE)
+ debug_object_fixup(descr->fixup_init, addr, o.state);
}
/**
@@ -700,12 +695,9 @@ EXPORT_SYMBOL_GPL(debug_object_init_on_stack);
*/
int debug_object_activate(void *addr, const struct debug_obj_descr *descr)
{
- struct debug_obj o = { .object = addr, .state =
ODEBUG_STATE_NOTAVAILABLE, .descr = descr };
- enum debug_obj_state state;
struct debug_bucket *db;
- struct debug_obj *obj;
+ struct debug_obj *obj, o;
unsigned long flags;
- int ret;
if (!debug_objects_enabled)
return 0;
@@ -717,49 +709,46 @@ int debug_object_activate(void *addr, const struct
debug_obj_descr *descr)
raw_spin_lock_irqsave(>lock, flags);
obj = lookup_object_or_alloc(addr, db, descr, false, true);
- if (likely(!IS_ERR_OR_NULL(obj))) {
- bool print_object = false;
-
+ if (unlikely(!obj)) {
+ raw_spin_unlock_irqrestore(>lock, flags);
+ debug_objects_oom();
+ return 0;
+ } else if (likely(!IS_ERR(obj))) {
switch (obj->state) {
case ODEBUG_STATE_INIT:
case ODEBUG_STATE_INACTIVE:
obj->state = ODEBUG_STATE_ACTIVE;
- ret = 0;
break;
-
case ODEBUG_STATE_ACTIVE:
- state = obj->state;
- raw_spin_unlock_irqrestore(>lock, flags);
- debug_print_object(obj, "activate");
- ret = debug_object_fixup(descr->fixup_activate, addr,
state);
- return ret ? 0 : -EINVAL;
-
case ODEBUG_STATE_DESTROYED:
- print_object = true;
- ret = -EINVAL;
+ o = *obj;
+ obj = NULL;
break;
default:
- ret = 0;
- break;
}
- raw_spin_unlock_irqrestore(>lock, flags);
- if (print_object)
- debug_print_object(obj, "activate");
- return ret;
+ } else {
+ o.object = addr;
+ o.state = ODEBUG_STATE_NOTAVAILABLE;
+ o.descr = descr;
+ obj = NULL;
}
raw_spin_unlock_irqrestore(>lock, flags);
- /* If NULL the allocation has hit OOM */
- if (!obj) {
- debug_objects_oom();
+ if (obj)
return 0;
- }
- /* Object is neither static nor tracked. It's not initialized */
debug_print_object(, "activate");
- ret = debug_object_fixup(descr->fixup_activate, addr,
ODEBUG_STATE_NOTAVAILABLE);
- return ret ? 0 : -EINVAL;
+
+ switch (o.state) {
+ case ODEBUG_STATE_ACTIVE:
+ case ODEBUG_STATE_NOTAVAILABLE:
+ if (debug_object_fixup(descr->fixup_activate, addr, o.state))
+ return 0;
+ default:
+ }
+
+ return -EINVAL;
}
EXPORT_SYMBOL_GPL(debug_object_activate);
@@ -771,9 +760,8 @@
Re: [Intel-gfx] [PATCH 2/3] drm/i915/mtl: Add a PMU counter for total active ticks
On 22/09/2023 23:25, john.c.harri...@intel.com wrote:
From: Umesh Nerlige Ramappa
Current engine busyness interface exposed by GuC has a few issues:
- The busyness of active engine is calculated using 2 values provided by
GuC and is prone to race between CPU reading those values and GuC
updating them. Any sort of HW synchronization would be at the cost of
scheduling latencies.
- GuC provides only 32 bit values for busyness and KMD has to run a
worker to extend the values to 64 bit. In addition KMD also needs to
extend the GT timestamp to 64 bits so that it can be used to calculate
active busyness for an engine.
To address these issues, GuC provides a new interface to calculate
engine busyness. GuC accumulates the busyness ticks in a 64 bit value
and also internally updates the busyness for an active context using a
periodic timer. This simplifies the KMD implementation such that KMD
only needs to relay the busyness value to the user.
In addition to fixing the interface, GuC also provides a periodically
total active ticks that the GT has been running for. This counter is
exposed to the user so that the % busyness can be calculated as follows:
busyness % = (engine active ticks/total active ticks) * 100.
AFAIU I915_PMU_TOTAL_ACTIVE_TICKS only runs when GT is awake, right?
So if GT is awake 10% of the time, and engine is busy that 100% of that
time, which is 10% of the real/wall time, the busyness by this formula
comes up as 100%. Which wouldn't be useful for intel_gpu_top and alike.
How to scale it back to wall time? Again AFAIU there is no info about
tick frequency, so how does one know what a delta in total active ticks
means?
Going back on the higher level, I am not convinced we need to add a new
uapi just for MTL. If the tick period is known internally we could just
use v2 internally and expose the current uapi using it.
Any timebase conversion error is unlikely to be relevant because
userspace only looks at deltas over relatively short periods (seconds).
Ie. I don't think that the clock drift error would accumulate so it
would need to be really huge to be relevant over short sampling periods.
Regards,
Tvrtko
Implement the new interface and start by adding a new counter for total
active ticks.
Signed-off-by: Umesh Nerlige Ramappa
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 24 +++
.../gpu/drm/i915/gt/uc/intel_guc_submission.h | 1 +
drivers/gpu/drm/i915/i915_pmu.c | 6 +
include/uapi/drm/i915_drm.h | 2 ++
4 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 88465d701c278..0c1fee5360777 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1607,6 +1607,30 @@ static ktime_t busy_v2_guc_engine_busyness(struct
intel_engine_cs *engine, ktime
return ns_to_ktime(total);
}
+static u64 busy_v1_intel_guc_total_active_ticks(struct intel_guc *guc)
+{
+ return guc->busy.v1.gt_stamp;
+}
+
+static u64 busy_v2_intel_guc_total_active_ticks(struct intel_guc *guc)
+{
+ u64 ticks_gt;
+
+ __busy_v2_get_engine_usage_record(guc, NULL, NULL, NULL, _gt);
+
+ return ticks_gt;
+}
+
+u64 intel_guc_total_active_ticks(struct intel_gt *gt)
+{
+ struct intel_guc *guc = >uc.guc;
+
+ if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 3, 1))
+ return busy_v1_intel_guc_total_active_ticks(guc);
+ else
+ return busy_v2_intel_guc_total_active_ticks(guc);
+}
+
static int busy_v2_guc_action_enable_usage_stats_device(struct intel_guc *guc)
{
u32 offset = guc_engine_usage_offset_v2_device(guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
index c57b29cdb1a64..f6d42838825f2 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
@@ -30,6 +30,7 @@ void intel_guc_dump_active_requests(struct intel_engine_cs
*engine,
struct drm_printer *m);
void intel_guc_busyness_park(struct intel_gt *gt);
void intel_guc_busyness_unpark(struct intel_gt *gt);
+u64 intel_guc_total_active_ticks(struct intel_gt *gt);
bool intel_guc_virtual_engine_has_heartbeat(const struct intel_engine_cs *ve);
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index d35973b411863..4f52636eb4a80 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -563,6 +563,8 @@ config_status(struct drm_i915_private *i915, u64 config)
break;
case I915_PMU_SOFTWARE_GT_AWAKE_TIME:
break;
+ case I915_PMU_TOTAL_ACTIVE_TICKS:
+ break;
default:
return -ENOENT;
}
@@
Re: [Intel-gfx] [PATCH 3/3] drm/i915/mtl: Add counters for engine busyness ticks
On 22/09/2023 23:25, john.c.harri...@intel.com wrote:
From: Umesh Nerlige Ramappa
In new version of GuC engine busyness, GuC provides engine busyness
ticks as a 64 bit counter. Add a new counter to relay this value to the
user as is.
Signed-off-by: Umesh Nerlige Ramappa
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/intel_engine.h| 1 +
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 +
drivers/gpu/drm/i915/gt/intel_engine_types.h | 12
drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 67 ++-
drivers/gpu/drm/i915/i915_pmu.c | 25 ++-
drivers/gpu/drm/i915/i915_pmu.h | 2 +-
include/uapi/drm/i915_drm.h | 13 +++-
8 files changed, 116 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h
b/drivers/gpu/drm/i915/gt/intel_engine.h
index b58c30ac8ef02..57af7ec8ecd82 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -249,6 +249,7 @@ void intel_engine_dump_active_requests(struct list_head
*requests,
ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine,
ktime_t *now);
+u64 intel_engine_get_busy_ticks(struct intel_engine_cs *engine);
void intel_engine_get_hung_entity(struct intel_engine_cs *engine,
struct intel_context **ce, struct
i915_request **rq);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 84a75c95f3f7d..1c9ffb1ae9889 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -2426,6 +2426,22 @@ ktime_t intel_engine_get_busy_time(struct
intel_engine_cs *engine, ktime_t *now)
return engine->busyness(engine, now);
}
+/**
+ * intel_engine_get_busy_ticks() - Return current accumulated engine busyness
+ * ticks
+ * @engine: engine to report on
+ *
+ * Returns accumulated ticks @engine was busy since engine stats were enabled.
+ */
+u64 intel_engine_get_busy_ticks(struct intel_engine_cs *engine)
+{
+ if (!engine->busyness_ticks ||
+ !(engine->flags & I915_ENGINE_SUPPORTS_TICKS_STATS))
+ return 0;
+
+ return engine->busyness_ticks(engine);
+}
+
struct intel_context *
intel_engine_create_virtual(struct intel_engine_cs **siblings,
unsigned int count, unsigned long flags)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 40fd8f984d64b..a88d40c74d604 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -548,6 +548,11 @@ struct intel_engine_cs {
ktime_t (*busyness)(struct intel_engine_cs *engine,
ktime_t *now);
+ /*
+* Get engine busyness ticks
+*/
+ u64 (*busyness_ticks)(struct intel_engine_cs *engine);
+
struct intel_engine_execlists execlists;
/*
@@ -574,6 +579,7 @@ struct intel_engine_cs {
#define I915_ENGINE_HAS_EU_PRIORITYBIT(10)
#define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)
#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)
+#define I915_ENGINE_SUPPORTS_TICKS_STATS BIT(13)
unsigned int flags;
/*
@@ -649,6 +655,12 @@ intel_engine_supports_stats(const struct intel_engine_cs
*engine)
return engine->flags & I915_ENGINE_SUPPORTS_STATS;
}
+static inline bool
+intel_engine_supports_tick_stats(const struct intel_engine_cs *engine)
+{
+ return engine->flags & I915_ENGINE_SUPPORTS_TICKS_STATS;
+}
+
static inline bool
intel_engine_has_preemption(const struct intel_engine_cs *engine)
{
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index dcedff41a825f..69eb610b5ab0a 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -100,6 +100,7 @@ static void set_scheduler_caps(struct drm_i915_private
*i915)
MAP(HAS_PREEMPTION, PREEMPTION),
MAP(HAS_SEMAPHORES, SEMAPHORES),
MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS),
+ MAP(SUPPORTS_TICKS_STATS, ENGINE_BUSY_TICKS_STATS),
#undef MAP
};
struct intel_engine_cs *engine;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 0c1fee5360777..71749fb9ad35b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1289,12 +1289,7 @@ static void busy_v1_guc_update_pm_timestamp(struct
intel_guc *guc, ktime_t *now)
guc->busy.v1.gt_stamp = ((u64)gt_stamp_hi << 32) | gt_stamp_lo;
}
-/*
- * Unlike the execlist mode of submission total and active times are in terms
Re: [Intel-gfx] [PATCH v3 20/25] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled
On Thu, Sep 14, 2023 at 10:26:54PM +0300, Imre Deak wrote: > Atm the DSC PPS SDP will stay enabled after enabling and disabling DSC. > This leaves an output blank after switching off DSC on it. Make sure the > SDP is disabled for an uncompressed output. > > v2: > - Disable the SDP already during output disabling. (Ville) Reviewed-by: Stanislav Lisovskiy > > Cc: Ville Syrjälä > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/display/intel_dp.c | 5 - > drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++--- > 2 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 03010accc1c7f..e942eb95d688f 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -4027,7 +4027,10 @@ void intel_dp_set_infoframes(struct intel_encoder > *encoder, >VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK; > u32 val = intel_de_read(dev_priv, reg) & ~dip_enable; > > - /* TODO: Add DSC case (DIP_ENABLE_PPS) */ > + /* TODO: Sanitize DSC enabling wrt. intel_dsc_dp_pps_write(). */ > + if (!enable && HAS_DSC(dev_priv)) > + val &= ~VDIP_ENABLE_PPS; > + > /* When PSR is enabled, this routine doesn't disable VSC DIP */ > if (!crtc_state->has_psr) > val &= ~VIDEO_DIP_ENABLE_VSC_HSW; > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index 19548242fa0f2..a38a0e6da01bf 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -662,9 +662,8 @@ static void intel_mst_post_disable_dp(struct > intel_atomic_state *state, >* BSpec 4287: disable DIP after the transcoder is disabled and before >* the transcoder clock select is set to none. >*/ > - if (last_mst_stream) > - intel_dp_set_infoframes(_port->base, false, > - old_crtc_state, NULL); > + intel_dp_set_infoframes(_port->base, false, > + old_crtc_state, NULL); > /* >* From TGL spec: "If multi-stream slave transcoder: Configure >* Transcoder Clock Select to direct no clock to the transcoder" > -- > 2.37.2 >
Re: [Intel-gfx] [PATCH 0/7] drm/i915: Convert fbdev to DRM client
This is version 3 of the patchset. Am 25.09.23 um 09:26 schrieb Thomas Zimmermann: Convert i915's fbdev code to struct drm_client. Replaces the current ad-hoc integration. The conversion includes a number of cleanups. The patchset also enables unloading of driver modules with in-kernel DRM clients; a feature required by i915. As with the other drivers' fbdev emulation, fbdev in i915 is now an in-kernel DRM client that runs after the DRM device has been registered. This allows to remove the asynchronous initialization. i915 is the last driver with an fbdev emulation that is not build upon struct drm_client. Once reviewed, the patches would ideally go into drm-misc-next, so that the old fbdev helper code can be removed. We can also attempt to add additional in-kernel clients. A DRM-based dmesg log or a bootsplash are commonly mentioned. DRM can then switch easily among the existing clients if/when required. v3: * support module unloading (Jani, CI bot) * as before, silently ignore devices without displays (CI bot) v2: * fix error handling (Jani) * fix non-fbdev builds * various minor fixes and cleanups Thomas Zimmermann (7): drm/i915: Unregister in-kernel clients drm/client: Do not acquire module reference drm/client: Export drm_client_dev_unregister() drm/i915: Move fbdev functions drm/i915: Initialize fbdev DRM client with callback functions drm/i915: Implement fbdev client callbacks drm/i915: Implement fbdev emulation as in-kernel client drivers/gpu/drm/drm_client.c | 25 +- drivers/gpu/drm/i915/display/intel_display.c | 1 - .../drm/i915/display/intel_display_driver.c | 19 -- drivers/gpu/drm/i915/display/intel_fbdev.c| 250 ++ drivers/gpu/drm/i915/display/intel_fbdev.h| 29 +- drivers/gpu/drm/i915/i915_driver.c| 27 +- 6 files changed, 156 insertions(+), 195 deletions(-) -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Frankenstrasse 146, 90461 Nuernberg, Germany GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman HRB 36809 (AG Nuernberg) OpenPGP_signature.asc Description: OpenPGP digital signature
Re: [Intel-gfx] [PATCH v3 25/25] drm/i915/dp_mst: Check BW limitations only after all streams are computed
On Thu, Sep 14, 2023 at 10:26:59PM +0300, Imre Deak wrote:
> After the previous patch the BW limits on the whole MST topology will be
> checked after computing the state for all the streams in the topology.
> Accordingly remove the check during the stream's encoder compute config
> step, to prevent failing an atomic commit due to a BW limit, if this can
> be resolved only by reducing the BW of other streams on the same MST
> link.
Reviewed-by: Stanislav Lisovskiy
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 ++-
> 1 file changed, 2 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index bcfd5f19d994f..64867289174d9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -121,15 +121,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
> intel_encoder *encoder,
> if (slots == -EDEADLK)
> return slots;
>
> - if (slots >= 0) {
> - ret = drm_dp_mst_atomic_check(state);
> - /*
> - * If we got slots >= 0 and we can fit those based on
> check
> - * then we can exit the loop. Otherwise keep trying.
> - */
> - if (!ret)
> - break;
> - }
> + if (slots >= 0)
> + break;
> }
>
> /* We failed to find a proper bpp/timeslots, return error */
> --
> 2.37.2
>
Re: [Intel-gfx] [PATCH v2 22/22] drm/i915/dp_mst: Check BW limitations only after all streams are computed
On Thu, Aug 24, 2023 at 11:05:17AM +0300, Imre Deak wrote:
> After the previous patch the BW limits on the whole MST topology will be
> checked after computing the state for all the streams in the topology.
> Accordingly remove the check during the stream's encoder compute config
> step, to prevent failing an atomic commit due to a BW limit, if this can
> be resolved only by reducing the BW of other streams on the same MST
> link.
>
> Signed-off-by: Imre Deak
Reviewed-by: Stanislav Lisovskiy
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 ++-
> 1 file changed, 2 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 3c9b3a2ac88a2..1d6d0fe6c3047 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -121,15 +121,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct
> intel_encoder *encoder,
> if (slots == -EDEADLK)
> return slots;
>
> - if (slots >= 0) {
> - ret = drm_dp_mst_atomic_check(state);
> - /*
> - * If we got slots >= 0 and we can fit those based on
> check
> - * then we can exit the loop. Otherwise keep trying.
> - */
> - if (!ret)
> - break;
> - }
> + if (slots >= 0)
> + break;
> }
>
> /* We failed to find a proper bpp/timeslots, return error */
> --
> 2.37.2
>
Re: [Intel-gfx] [PATCH v3 23/25] drm/i915/dp_mst: Allow DSC only for sink ports of the first branch device
On Thu, Sep 14, 2023 at 10:26:57PM +0300, Imre Deak wrote:
> Atm the driver supports DSC on MST links only by enabling it globally in
> the first branch device UFP's physical DPCD (vs. enabling it per-stream
> in the virtual DPCD right upstream the DPRX). This means the branch
> device will decompress any compressed stream (which it recognizes via
> MSA / SDP compression info), but it does this only for streams going to
> an SST output port. Accordingly allow DSC only for streams going to an
> SST output port of the first branch device.
>
> Signed-off-by: Imre Deak
Reviewed-by: Stanislav Lisovskiy
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 26 +
> 1 file changed, 26 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index b2ac29a157fbd..f24f656d6d02a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -335,6 +335,27 @@ intel_dp_mst_compute_config_limits(struct intel_dp
> *intel_dp,
> limits);
> }
>
> +static bool intel_dp_mst_port_supports_dsc(struct intel_dp *intel_dp,
> +struct intel_crtc_state *crtc_state,
> +struct drm_connector_state
> *conn_state)
> +{
> + struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> + struct intel_connector *connector =
> + to_intel_connector(conn_state->connector);
> + struct intel_crtc *crtc =
> + to_intel_crtc(crtc_state->uapi.crtc);
> +
> + if (connector->port->parent != intel_dp->mst_mgr.mst_primary) {
> + drm_dbg_kms(>drm,
> + "[CRTC:%d:%s] DSC only allowed on sink ports of the
> first branch device\n",
> + crtc->base.base.id, crtc->base.name);
> +
> + return false;
> + }
> +
> + return true;
> +}
> +
> static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state)
> @@ -378,6 +399,11 @@ static int intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
> str_yes_no(ret),
> str_yes_no(intel_dp->force_dsc_en));
>
> + if (!intel_dp_mst_port_supports_dsc(intel_dp,
> + pipe_config,
> + conn_state))
> + return -EINVAL;
> +
> if (!intel_dp_mst_compute_config_limits(intel_dp,
> pipe_config,
> true,
> --
> 2.37.2
>
Re: [Intel-gfx] [PATCH v5 24/25] drm/i915/dp_mst: Improve BW sharing between MST streams
On Tue, Sep 19, 2023 at 01:52:11PM +0300, Imre Deak wrote:
> At the moment modesetting a stream CRTC will fail if the stream's BW
> along with the current BW of all the other streams on the same MST link
> is above the total BW of the MST link. Make the BW sharing more dynamic
> by trying to reduce the link bpp of one or more streams on the MST link
> in this case.
>
> When selecting a stream to reduce the BW for, take into account which
> link segment in the MST topology ran out of BW and which streams go
> through this link segment. For instance with A,B,C streams in the same
> MST topology A and B may share the BW of a link segment downstream of a
> branch device, stream C not downstream of the branch device, hence not
> affecting this BW. If this link segment's BW runs out one or both of
> stream A/B's BW will be reduced until their total BW is within limits.
>
> While reducing the link bpp for a given stream DSC may need to be
> enabled for it, which requires FEC on the whole MST link. Check for this
> condition and recompute the state for all streams taking the FEC
> overhead into account (on 8b/10b links).
>
> v2:
> - Rebase on s/min_bpp_pipes/min_bpp_reached_pipes/ change.
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 5 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 13 +-
> drivers/gpu/drm/i915/display/intel_dp.h | 2 +
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 129 +++
> drivers/gpu/drm/i915/display/intel_dp_mst.h | 3 +
> drivers/gpu/drm/i915/display/intel_link_bw.c | 15 ++-
> drivers/gpu/drm/i915/display/intel_link_bw.h | 1 +
> 7 files changed, 159 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 8af22cf9a49de..565a6f20ffbfd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4629,6 +4629,7 @@ intel_modeset_pipe_config(struct intel_atomic_state
> *state,
> if (ret)
> return ret;
>
> + crtc_state->fec_enable = limits->force_fec_pipes & BIT(crtc->pipe);
> crtc_state->max_link_bpp_x16 = limits->max_bpp_x16[crtc->pipe];
>
> if (crtc_state->pipe_bpp > to_bpp_int(crtc_state->max_link_bpp_x16)) {
> @@ -6435,10 +6436,6 @@ int intel_atomic_check(struct drm_device *dev,
> goto fail;
> }
>
> - ret = drm_dp_mst_atomic_check(>base);
> - if (ret)
> - goto fail;
> -
> ret = intel_atomic_check_planes(state);
> if (ret)
> goto fail;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3d2ede31aa4e8..9b5070d8c8984 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1369,8 +1369,8 @@ static bool intel_dp_source_supports_fec(struct
> intel_dp *intel_dp,
> return false;
> }
>
> -static bool intel_dp_supports_fec(struct intel_dp *intel_dp,
> - const struct intel_crtc_state *pipe_config)
> +bool intel_dp_supports_fec(struct intel_dp *intel_dp,
> +const struct intel_crtc_state *pipe_config)
> {
> return intel_dp_source_supports_fec(intel_dp, pipe_config) &&
> drm_dp_sink_supports_fec(intel_dp->fec_capable);
> @@ -2111,8 +2111,9 @@ int intel_dp_dsc_compute_config(struct intel_dp
> *intel_dp,
> _config->hw.adjusted_mode;
> int ret;
>
> - pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> - intel_dp_supports_fec(intel_dp, pipe_config);
> + pipe_config->fec_enable = pipe_config->fec_enable ||
> + (!intel_dp_is_edp(intel_dp) &&
> + intel_dp_supports_fec(intel_dp, pipe_config));
>
> if (!intel_dp_supports_dsc(intel_dp, pipe_config))
> return -EINVAL;
> @@ -2308,6 +2309,10 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
> bool dsc_needed;
> int ret = 0;
>
> + if (pipe_config->fec_enable &&
> + !intel_dp_supports_fec(intel_dp, pipe_config))
> + return -EINVAL;
I wonder, could we just check that, when
we are actually setting fec_enable to true, then
we wouldn't have to care about this here.
Otherwise, with this clarified
Reviewed-by: Stanislav Lisovskiy
> +
> if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay,
> adjusted_mode->crtc_clock))
> pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1,
> crtc->pipe);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 2cf3681bac64a..612105a303419 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -135,6 +135,8 @@ static inline unsigned int intel_dp_unused_lane_mask(int
> lane_count)
>
[Intel-gfx] [PATCH 3/7] drm/client: Export drm_client_dev_unregister()
Export drm_client_dev_unregister() for use by the i915 driver. The
driver does not use drm_dev_unregister(), so it has to clean up the
in-kernel DRM clients by itself.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_client.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/drm_client.c b/drivers/gpu/drm/drm_client.c
index b49f91b5d4b27..5d22387205d06 100644
--- a/drivers/gpu/drm/drm_client.c
+++ b/drivers/gpu/drm/drm_client.c
@@ -172,6 +172,18 @@ void drm_client_release(struct drm_client_dev *client)
}
EXPORT_SYMBOL(drm_client_release);
+/**
+ * drm_client_dev_unregister - Unregister clients
+ * @dev: DRM device
+ *
+ * This function releases all clients by calling each client's
+ * _client_funcs.unregister callback. The callback function
+ * is responsibe for releaseing all resources including the client
+ * itself.
+ *
+ * The helper drm_dev_unregister() calls this function. Drivers
+ * that use it don't need to call this function themselves.
+ */
void drm_client_dev_unregister(struct drm_device *dev)
{
struct drm_client_dev *client, *tmp;
@@ -191,6 +203,7 @@ void drm_client_dev_unregister(struct drm_device *dev)
}
mutex_unlock(>clientlist_mutex);
}
+EXPORT_SYMBOL(drm_client_dev_unregister);
/**
* drm_client_dev_hotplug - Send hotplug event to clients
--
2.42.0
[Intel-gfx] [PATCH 2/7] drm/client: Do not acquire module reference
Do not acquire a reference on the module that provides a client's callback functions in drm_client_init(). The additional reference prevents the user from unloading the callback functions' module and thus creating dangling pointers. This is only necessary if there is no direct dependency between the caller of drm_client_init() and the provider of the callbacks in struct drm_client_funcs. If this case ever existed, it has been removed from the DRM code. Callers of drm_client_init() also provide the callback implementation. The lifetime of the clients is tied to the dependency chain's outer-most module, which is the hardware's DRM driver. Before client helpers could be unloaded, the driver module would have to be unloaded, which also unregisters all clients. Driver modules that set up DRM clients can now be unloaded. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/drm_client.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/drm_client.c b/drivers/gpu/drm/drm_client.c index 2762572f286e7..b49f91b5d4b27 100644 --- a/drivers/gpu/drm/drm_client.c +++ b/drivers/gpu/drm/drm_client.c @@ -5,7 +5,6 @@ #include #include -#include #include #include #include @@ -84,16 +83,13 @@ int drm_client_init(struct drm_device *dev, struct drm_client_dev *client, if (!drm_core_check_feature(dev, DRIVER_MODESET) || !dev->driver->dumb_create) return -EOPNOTSUPP; - if (funcs && !try_module_get(funcs->owner)) - return -ENODEV; - client->dev = dev; client->name = name; client->funcs = funcs; ret = drm_client_modeset_create(client); if (ret) - goto err_put_module; + return ret; ret = drm_client_open(client); if (ret) @@ -105,10 +101,6 @@ int drm_client_init(struct drm_device *dev, struct drm_client_dev *client, err_free: drm_client_modeset_free(client); -err_put_module: - if (funcs) - module_put(funcs->owner); - return ret; } EXPORT_SYMBOL(drm_client_init); @@ -177,8 +169,6 @@ void drm_client_release(struct drm_client_dev *client) drm_client_modeset_free(client); drm_client_close(client); drm_dev_put(dev); - if (client->funcs) - module_put(client->funcs->owner); } EXPORT_SYMBOL(drm_client_release); -- 2.42.0
[Intel-gfx] [PATCH 6/7] drm/i915: Implement fbdev client callbacks
Move code from ad-hoc fbdev callbacks into DRM client functions
and remove the old callbacks. The functions instruct the client
to poll for changed output or restore the display.
The DRM core calls both, the old callbacks and the new client
helpers, from the same places. The new functions perform the same
operation as before, so there's no change in functionality.
Signed-off-by: Thomas Zimmermann
---
.../drm/i915/display/intel_display_driver.c | 1 -
drivers/gpu/drm/i915/display/intel_fbdev.c| 11 --
drivers/gpu/drm/i915/display/intel_fbdev.h| 9
drivers/gpu/drm/i915/i915_driver.c| 22 ---
4 files changed, 9 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 44b59ac301e69..ffdcddd1943e0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -96,7 +96,6 @@ void intel_display_driver_init_hw(struct drm_i915_private
*i915)
static const struct drm_mode_config_funcs intel_mode_funcs = {
.fb_create = intel_user_framebuffer_create,
.get_format_info = intel_fb_get_format_info,
- .output_poll_changed = intel_fbdev_output_poll_changed,
.mode_valid = intel_mode_valid,
.atomic_check = intel_atomic_check,
.atomic_commit = intel_atomic_commit,
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
b/drivers/gpu/drm/i915/display/intel_fbdev.c
index d8a165582fd59..31e8275a70fea 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -638,7 +638,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int
state, bool synchronous
intel_fbdev_hpd_set_suspend(dev_priv, state);
}
-void intel_fbdev_output_poll_changed(struct drm_device *dev)
+static void intel_fbdev_output_poll_changed(struct drm_device *dev)
{
struct intel_fbdev *ifbdev = to_i915(dev)->display.fbdev.fbdev;
bool send_hpd;
@@ -657,7 +657,7 @@ void intel_fbdev_output_poll_changed(struct drm_device *dev)
drm_fb_helper_hotplug_event(>helper);
}
-void intel_fbdev_restore_mode(struct drm_i915_private *dev_priv)
+static void intel_fbdev_restore_mode(struct drm_i915_private *dev_priv)
{
struct intel_fbdev *ifbdev = dev_priv->display.fbdev.fbdev;
@@ -681,11 +681,18 @@ static void intel_fbdev_client_unregister(struct
drm_client_dev *client)
static int intel_fbdev_client_restore(struct drm_client_dev *client)
{
+ struct drm_i915_private *dev_priv = to_i915(client->dev);
+
+ intel_fbdev_restore_mode(dev_priv);
+ vga_switcheroo_process_delayed_switch();
+
return 0;
}
static int intel_fbdev_client_hotplug(struct drm_client_dev *client)
{
+ intel_fbdev_output_poll_changed(client->dev);
+
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.h
b/drivers/gpu/drm/i915/display/intel_fbdev.h
index 04fd523a50232..8c953f102ba22 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.h
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.h
@@ -19,8 +19,6 @@ void intel_fbdev_initial_config_async(struct drm_i915_private
*dev_priv);
void intel_fbdev_unregister(struct drm_i915_private *dev_priv);
void intel_fbdev_fini(struct drm_i915_private *dev_priv);
void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool
synchronous);
-void intel_fbdev_output_poll_changed(struct drm_device *dev);
-void intel_fbdev_restore_mode(struct drm_i915_private *dev_priv);
struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbdev);
#else
static inline int intel_fbdev_init(struct drm_device *dev)
@@ -44,13 +42,6 @@ static inline void intel_fbdev_set_suspend(struct drm_device
*dev, int state, bo
{
}
-static inline void intel_fbdev_output_poll_changed(struct drm_device *dev)
-{
-}
-
-static inline void intel_fbdev_restore_mode(struct drm_i915_private *i915)
-{
-}
static inline struct intel_framebuffer *intel_fbdev_framebuffer(struct
intel_fbdev *fbdev)
{
return NULL;
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index de19197d2e052..86460cd8167d1 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -924,27 +924,6 @@ static int i915_driver_open(struct drm_device *dev, struct
drm_file *file)
return 0;
}
-/**
- * i915_driver_lastclose - clean up after all DRM clients have exited
- * @dev: DRM device
- *
- * Take care of cleaning up after all DRM clients have exited. In the
- * mode setting case, we want to restore the kernel's initial mode (just
- * in case the last client left us in a bad state).
- *
- * Additionally, in the non-mode setting case, we'll tear down the GTT
- * and DMA structures, since the kernel won't be using them, and clea
- * up any GEM state.
- */
-static void i915_driver_lastclose(struct drm_device
[Intel-gfx] [PATCH 0/7] drm/i915: Convert fbdev to DRM client
Convert i915's fbdev code to struct drm_client. Replaces the current ad-hoc integration. The conversion includes a number of cleanups. The patchset also enables unloading of driver modules with in-kernel DRM clients; a feature required by i915. As with the other drivers' fbdev emulation, fbdev in i915 is now an in-kernel DRM client that runs after the DRM device has been registered. This allows to remove the asynchronous initialization. i915 is the last driver with an fbdev emulation that is not build upon struct drm_client. Once reviewed, the patches would ideally go into drm-misc-next, so that the old fbdev helper code can be removed. We can also attempt to add additional in-kernel clients. A DRM-based dmesg log or a bootsplash are commonly mentioned. DRM can then switch easily among the existing clients if/when required. v3: * support module unloading (Jani, CI bot) * as before, silently ignore devices without displays (CI bot) v2: * fix error handling (Jani) * fix non-fbdev builds * various minor fixes and cleanups Thomas Zimmermann (7): drm/i915: Unregister in-kernel clients drm/client: Do not acquire module reference drm/client: Export drm_client_dev_unregister() drm/i915: Move fbdev functions drm/i915: Initialize fbdev DRM client with callback functions drm/i915: Implement fbdev client callbacks drm/i915: Implement fbdev emulation as in-kernel client drivers/gpu/drm/drm_client.c | 25 +- drivers/gpu/drm/i915/display/intel_display.c | 1 - .../drm/i915/display/intel_display_driver.c | 19 -- drivers/gpu/drm/i915/display/intel_fbdev.c| 250 ++ drivers/gpu/drm/i915/display/intel_fbdev.h| 29 +- drivers/gpu/drm/i915/i915_driver.c| 27 +- 6 files changed, 156 insertions(+), 195 deletions(-) -- 2.42.0
[Intel-gfx] [PATCH 5/7] drm/i915: Initialize fbdev DRM client with callback functions
Initialize i915's fbdev client by giving an instance of struct
drm_client_funcs to drm_client_init(). Also clean up with
drm_client_release().
Doing this in i915 prevents fbdev helpers from initializing and
releasing the client internally (see drm_fb_helper_init()). No
functional change yet; the client callbacks will be filled later.
v2:
* call drm_fb_helper_unprepare() in error hndling (Jani)
* fix typo in commit message (Sam)
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 43 --
1 file changed, 39 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 8d51550e18fd5..d8a165582fd59 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -378,6 +378,7 @@ static void intel_fbdev_destroy(struct intel_fbdev *ifbdev)
if (ifbdev->fb)
drm_framebuffer_remove(>fb->base);
+ drm_client_release(>helper.client);
drm_fb_helper_unprepare(>helper);
kfree(ifbdev);
}
@@ -671,6 +672,30 @@ void intel_fbdev_restore_mode(struct drm_i915_private
*dev_priv)
intel_fbdev_invalidate(ifbdev);
}
+/*
+ * Fbdev client and struct drm_client_funcs
+ */
+
+static void intel_fbdev_client_unregister(struct drm_client_dev *client)
+{ }
+
+static int intel_fbdev_client_restore(struct drm_client_dev *client)
+{
+ return 0;
+}
+
+static int intel_fbdev_client_hotplug(struct drm_client_dev *client)
+{
+ return 0;
+}
+
+static const struct drm_client_funcs intel_fbdev_client_funcs = {
+ .owner = THIS_MODULE,
+ .unregister = intel_fbdev_client_unregister,
+ .restore= intel_fbdev_client_restore,
+ .hotplug= intel_fbdev_client_hotplug,
+};
+
int intel_fbdev_init(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -692,16 +717,26 @@ int intel_fbdev_init(struct drm_device *dev)
else
ifbdev->preferred_bpp = ifbdev->helper.preferred_bpp;
+ ret = drm_client_init(dev, >helper.client, "i915-fbdev",
+ _fbdev_client_funcs);
+ if (ret)
+ goto err_drm_fb_helper_unprepare;
+
ret = drm_fb_helper_init(dev, >helper);
- if (ret) {
- kfree(ifbdev);
- return ret;
- }
+ if (ret)
+ goto err_drm_client_release;
dev_priv->display.fbdev.fbdev = ifbdev;
INIT_WORK(_priv->display.fbdev.suspend_work,
intel_fbdev_suspend_worker);
return 0;
+
+err_drm_client_release:
+ drm_client_release(>helper.client);
+err_drm_fb_helper_unprepare:
+ drm_fb_helper_unprepare(>helper);
+ kfree(ifbdev);
+ return ret;
}
static void intel_fbdev_initial_config(void *data, async_cookie_t cookie)
--
2.42.0
[Intel-gfx] [PATCH 4/7] drm/i915: Move fbdev functions
Move functions within intel_fbdev.c to simplify later updates. No
functional changes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 154 ++---
1 file changed, 77 insertions(+), 77 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 31d0d695d5671..8d51550e18fd5 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -545,58 +545,6 @@ static void intel_fbdev_suspend_worker(struct work_struct
*work)
true);
}
-int intel_fbdev_init(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_fbdev *ifbdev;
- int ret;
-
- if (drm_WARN_ON(dev, !HAS_DISPLAY(dev_priv)))
- return -ENODEV;
-
- ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
- if (ifbdev == NULL)
- return -ENOMEM;
-
- mutex_init(>hpd_lock);
- drm_fb_helper_prepare(dev, >helper, 32, _fb_helper_funcs);
-
- if (intel_fbdev_init_bios(dev, ifbdev))
- ifbdev->helper.preferred_bpp = ifbdev->preferred_bpp;
- else
- ifbdev->preferred_bpp = ifbdev->helper.preferred_bpp;
-
- ret = drm_fb_helper_init(dev, >helper);
- if (ret) {
- kfree(ifbdev);
- return ret;
- }
-
- dev_priv->display.fbdev.fbdev = ifbdev;
- INIT_WORK(_priv->display.fbdev.suspend_work,
intel_fbdev_suspend_worker);
-
- return 0;
-}
-
-static void intel_fbdev_initial_config(void *data, async_cookie_t cookie)
-{
- struct intel_fbdev *ifbdev = data;
-
- /* Due to peculiar init order wrt to hpd handling this is separate. */
- if (drm_fb_helper_initial_config(>helper))
- intel_fbdev_unregister(to_i915(ifbdev->helper.dev));
-}
-
-void intel_fbdev_initial_config_async(struct drm_i915_private *dev_priv)
-{
- struct intel_fbdev *ifbdev = dev_priv->display.fbdev.fbdev;
-
- if (!ifbdev)
- return;
-
- ifbdev->cookie = async_schedule(intel_fbdev_initial_config, ifbdev);
-}
-
static void intel_fbdev_sync(struct intel_fbdev *ifbdev)
{
if (!ifbdev->cookie)
@@ -607,31 +555,6 @@ static void intel_fbdev_sync(struct intel_fbdev *ifbdev)
ifbdev->cookie = 0;
}
-void intel_fbdev_unregister(struct drm_i915_private *dev_priv)
-{
- struct intel_fbdev *ifbdev = dev_priv->display.fbdev.fbdev;
-
- if (!ifbdev)
- return;
-
- intel_fbdev_set_suspend(_priv->drm, FBINFO_STATE_SUSPENDED, true);
-
- if (!current_is_async())
- intel_fbdev_sync(ifbdev);
-
- drm_fb_helper_unregister_info(>helper);
-}
-
-void intel_fbdev_fini(struct drm_i915_private *dev_priv)
-{
- struct intel_fbdev *ifbdev =
fetch_and_zero(_priv->display.fbdev.fbdev);
-
- if (!ifbdev)
- return;
-
- intel_fbdev_destroy(ifbdev);
-}
-
/* Suspends/resumes fbdev processing of incoming HPD events. When resuming HPD
* processing, fbdev will perform a full connector reprobe if a hotplug event
* was received while HPD was suspended.
@@ -748,6 +671,83 @@ void intel_fbdev_restore_mode(struct drm_i915_private
*dev_priv)
intel_fbdev_invalidate(ifbdev);
}
+int intel_fbdev_init(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_fbdev *ifbdev;
+ int ret;
+
+ if (drm_WARN_ON(dev, !HAS_DISPLAY(dev_priv)))
+ return -ENODEV;
+
+ ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
+ if (ifbdev == NULL)
+ return -ENOMEM;
+
+ mutex_init(>hpd_lock);
+ drm_fb_helper_prepare(dev, >helper, 32, _fb_helper_funcs);
+
+ if (intel_fbdev_init_bios(dev, ifbdev))
+ ifbdev->helper.preferred_bpp = ifbdev->preferred_bpp;
+ else
+ ifbdev->preferred_bpp = ifbdev->helper.preferred_bpp;
+
+ ret = drm_fb_helper_init(dev, >helper);
+ if (ret) {
+ kfree(ifbdev);
+ return ret;
+ }
+
+ dev_priv->display.fbdev.fbdev = ifbdev;
+ INIT_WORK(_priv->display.fbdev.suspend_work,
intel_fbdev_suspend_worker);
+
+ return 0;
+}
+
+static void intel_fbdev_initial_config(void *data, async_cookie_t cookie)
+{
+ struct intel_fbdev *ifbdev = data;
+
+ /* Due to peculiar init order wrt to hpd handling this is separate. */
+ if (drm_fb_helper_initial_config(>helper))
+ intel_fbdev_unregister(to_i915(ifbdev->helper.dev));
+}
+
+void intel_fbdev_initial_config_async(struct drm_i915_private *dev_priv)
+{
+ struct intel_fbdev *ifbdev = dev_priv->display.fbdev.fbdev;
+
+ if (!ifbdev)
+ return;
+
+ ifbdev->cookie = async_schedule(intel_fbdev_initial_config, ifbdev);
+}
+
+void intel_fbdev_unregister(struct drm_i915_private
[Intel-gfx] [PATCH 7/7] drm/i915: Implement fbdev emulation as in-kernel client
Replace all code that initializes or releases fbdev emulation
throughout the driver. Instead initialize the fbdev client by a
single call to i915_fbdev_setup() after i915 has registered its
DRM device. Just like similar code in other drivers, i915 fbdev
emulation now acts as a regular DRM client.
The fbdev client setup consists of the initial preparation and the
hot-plugging of the display. The latter creates the fbdev device
and sets up the fbdev framebuffer. The setup performs display
hot-plugging once. If no display can be detected, DRM probe helpers
re-run the detection on each hotplug event.
A call to drm_dev_unregister() releases the client automatically.
No further action is required within i915. If the fbdev framebuffer
has been fully set up, struct fb_ops.fb_destroy implements the
release. For partially initialized emulation, the fbdev client
reverts the initial setup.
v3:
* as before, silently ignore devices without displays
v2:
* let drm_client_register() handle initial hotplug
* fix driver name in error message (Jani)
* fix non-fbdev build (kernel test robot)
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/i915/display/intel_display.c | 1 -
.../drm/i915/display/intel_display_driver.c | 18 --
drivers/gpu/drm/i915/display/intel_fbdev.c| 184 --
drivers/gpu/drm/i915/display/intel_fbdev.h| 20 +-
drivers/gpu/drm/i915/i915_driver.c| 2 +
5 files changed, 85 insertions(+), 140 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index edbcf5968804d..7efa8d2787c39 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -81,7 +81,6 @@
#include "intel_dvo.h"
#include "intel_fb.h"
#include "intel_fbc.h"
-#include "intel_fbdev.h"
#include "intel_fdi.h"
#include "intel_fifo_underrun.h"
#include "intel_frontbuffer.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
b/drivers/gpu/drm/i915/display/intel_display_driver.c
index ffdcddd1943e0..213a4ee93ffc2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -364,10 +364,6 @@ int intel_display_driver_probe(struct drm_i915_private
*i915)
intel_overlay_setup(i915);
- ret = intel_fbdev_init(>drm);
- if (ret)
- return ret;
-
/* Only enable hotplug handling once the fbdev is fully set up. */
intel_hpd_init(i915);
intel_hpd_poll_disable(i915);
@@ -392,16 +388,6 @@ void intel_display_driver_register(struct drm_i915_private
*i915)
intel_display_debugfs_register(i915);
- /*
-* Some ports require correctly set-up hpd registers for
-* detection to work properly (leading to ghost connected
-* connector status), e.g. VGA on gm45. Hence we can only set
-* up the initial fbdev config after hpd irqs are fully
-* enabled. We do it last so that the async config cannot run
-* before the connectors are registered.
-*/
- intel_fbdev_initial_config_async(i915);
-
/*
* We need to coordinate the hotplugs with the asynchronous
* fbdev configuration, for which we use the
@@ -445,9 +431,6 @@ void intel_display_driver_remove_noirq(struct
drm_i915_private *i915)
*/
intel_hpd_poll_fini(i915);
- /* poll work can call into fbdev, hence clean that up afterwards */
- intel_fbdev_fini(i915);
-
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
@@ -484,7 +467,6 @@ void intel_display_driver_unregister(struct
drm_i915_private *i915)
if (!HAS_DISPLAY(i915))
return;
- intel_fbdev_unregister(i915);
intel_audio_deinit(i915);
/*
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 31e8275a70fea..100a4aaf1b7e4 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -24,7 +24,6 @@
* David Airlie
*/
-#include
#include
#include
#include
@@ -39,6 +38,7 @@
#include
#include
+#include
#include
#include
#include
@@ -58,7 +58,6 @@ struct intel_fbdev {
struct intel_framebuffer *fb;
struct i915_vma *vma;
unsigned long vma_flags;
- async_cookie_t cookie;
int preferred_bpp;
/* Whether or not fbdev hpd processing is temporarily suspended */
@@ -135,6 +134,26 @@ static int intel_fbdev_mmap(struct fb_info *info, struct
vm_area_struct *vma)
return i915_gem_fb_mmap(obj, vma);
}
+static void intel_fbdev_fb_destroy(struct fb_info *info)
+{
+ struct drm_fb_helper *fb_helper = info->par;
+ struct intel_fbdev *ifbdev = container_of(fb_helper, struct
intel_fbdev, helper);
+
+ drm_fb_helper_fini(>helper);
+
+ /*
[Intel-gfx] [PATCH 1/7] drm/i915: Unregister in-kernel clients
Unregister all in-kernel clients before unloading the i915 driver. For
other drivers, drm_dev_unregister() does this automatically. As i915
does not use this helper, it has to perform the call by itself.
Note that there are currently no in-kernel clients in i915. The patch
prepares the driver for a related update of its fbdev support.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/i915/i915_driver.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index d50347e5773a3..de19197d2e052 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -41,6 +41,7 @@
#include
#include
+#include
#include
#include
#include
@@ -855,6 +856,8 @@ void i915_driver_remove(struct drm_i915_private *i915)
{
intel_wakeref_t wakeref;
+ drm_client_dev_unregister(>drm);
+
wakeref = intel_runtime_pm_get(>runtime_pm);
i915_driver_unregister(i915);
--
2.42.0
Re: [Intel-gfx] [PATCH] drm/i915/display: Add a wrapper function for vga decode setup
> -Original Message-
> From: Nikula, Jani
> Sent: Friday, September 22, 2023 2:53 PM
> To: Shankar, Uma ; intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma
> Subject: Re: [PATCH] drm/i915/display: Add a wrapper function for vga decode
> setup
>
> On Fri, 22 Sep 2023, Uma Shankar wrote:
> > Some of the VGA functionality is not needed by the proposed Intel Xe
> > driver. Adding a wrapper function for VGA decode setup.
>
> This should also use it in i915, not just add duplicated code.
>
> >
> > Signed-off-by: Uma Shankar
> > ---
> > drivers/gpu/drm/i915/display/intel_vga.c | 3 ---
> > drivers/gpu/drm/i915/soc/intel_gmch.c| 14 ++
> > drivers/gpu/drm/i915/soc/intel_gmch.h| 2 ++
> > 3 files changed, 16 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c
> > b/drivers/gpu/drm/i915/display/intel_vga.c
> > index 286a0bdd28c6..bf84d01339b9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vga.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vga.c
> > @@ -3,11 +3,8 @@
> > * Copyright © 2019 Intel Corporation
> > */
> >
> > -#include
> > #include
> > -
> > #include
> > -
>
> There should remain a blank line after the system includes and before the
> rest.
>
> > #include "soc/intel_gmch.h"
> >
> > #include "i915_drv.h"
> > diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c
> > b/drivers/gpu/drm/i915/soc/intel_gmch.c
> > index 49c7fb16e934..818f0b7f62a2 100644
> > --- a/drivers/gpu/drm/i915/soc/intel_gmch.c
> > +++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
> > @@ -12,6 +12,7 @@
> > #include "i915_drv.h"
> > #include "intel_gmch.h"
> > #include "intel_pci_config.h"
> > +#include
>
> and includes go before the rest.
>
> >
> > static void intel_gmch_bridge_release(struct drm_device *dev, void
> > *bridge) { @@ -167,3 +168,16 @@ int intel_gmch_vga_set_state(struct
> > drm_i915_private *i915, bool enable_decode)
> >
> > return 0;
> > }
> > +
> > +unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool
> > +enable_decode) {
> > + struct drm_i915_private *i915 = pdev_to_i915(pdev);
> > +
> > + intel_gmch_vga_set_state(i915, enable_decode);
> > +
> > + if (enable_decode)
> > + return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
> > + VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
> > + else
> > + return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; }
> > diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h
> > b/drivers/gpu/drm/i915/soc/intel_gmch.h
> > index d0133eedc720..5ab2552ceb1a 100644
> > --- a/drivers/gpu/drm/i915/soc/intel_gmch.h
> > +++ b/drivers/gpu/drm/i915/soc/intel_gmch.h
> > @@ -7,6 +7,7 @@
> > #define __INTEL_GMCH_H__
> >
> > #include
> > +#include
>
> You don't need that, just a forward declaration for struct pci_dev.
Thanks Jani for the inputs. Fixed and sent a v2.
Regards,
Uma Shankar
> >
> > struct drm_i915_private;
> >
> > @@ -14,5 +15,6 @@ int intel_gmch_bridge_setup(struct drm_i915_private
> > *i915); void intel_gmch_bar_setup(struct drm_i915_private *i915);
> > void intel_gmch_bar_teardown(struct drm_i915_private *i915); int
> > intel_gmch_vga_set_state(struct drm_i915_private *i915, bool
> > enable_decode);
> > +unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool
> > +enable_decode);
> >
> > #endif /* __INTEL_GMCH_H__ */
>
> --
> Jani Nikula, Intel
[Intel-gfx] [v2] drm/i915/display: Add a wrapper function for vga decode setup
Some of the VGA functionality is not needed by the proposed
Intel Xe driver, while this will be utilized by i915.
Adding a wrapper function for VGA decode setup.
v2: Addressed Jani Nikula's review comments.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_vga.c | 2 --
drivers/gpu/drm/i915/soc/intel_gmch.c| 14 ++
drivers/gpu/drm/i915/soc/intel_gmch.h| 2 ++
3 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c
b/drivers/gpu/drm/i915/display/intel_vga.c
index 286a0bdd28c6..0f65ce115035 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -3,11 +3,9 @@
* Copyright © 2019 Intel Corporation
*/
-#include
#include
#include
-
#include "soc/intel_gmch.h"
#include "i915_drv.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c
b/drivers/gpu/drm/i915/soc/intel_gmch.c
index 49c7fb16e934..f32e9f78770a 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -5,6 +5,7 @@
#include
#include
+#include
#include
#include
@@ -167,3 +168,16 @@ int intel_gmch_vga_set_state(struct drm_i915_private
*i915, bool enable_decode)
return 0;
}
+
+unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool
enable_decode)
+{
+ struct drm_i915_private *i915 = pdev_to_i915(pdev);
+
+ intel_gmch_vga_set_state(i915, enable_decode);
+
+ if (enable_decode)
+ return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+ VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+ else
+ return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+}
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h
b/drivers/gpu/drm/i915/soc/intel_gmch.h
index d0133eedc720..23be2d113afd 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.h
@@ -8,11 +8,13 @@
#include
+struct pci_dev;
struct drm_i915_private;
int intel_gmch_bridge_setup(struct drm_i915_private *i915);
void intel_gmch_bar_setup(struct drm_i915_private *i915);
void intel_gmch_bar_teardown(struct drm_i915_private *i915);
int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool
enable_decode);
+unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool
enable_decode);
#endif /* __INTEL_GMCH_H__ */
--
2.42.0
Re: [Intel-gfx] [PATCH 1/9] drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by
Am 22.09.23 um 19:41 schrieb Alex Deucher:
On Fri, Sep 22, 2023 at 1:32 PM Kees Cook wrote:
Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).
As found with Coccinelle[1], add __counted_by for struct
smu10_voltage_dependency_table.
[1]
https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci
Cc: Evan Quan
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Xiaojian Du
Cc: Huang Rui
Cc: Kevin Wang
Cc: amd-...@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook
Acked-by: Alex Deucher
Mhm, I'm not sure if this is a good idea. That is a structure filled in
by the firmware, isn't it?
That would imply that we might need to byte swap count before it is
checkable.
Regards,
Christian.
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
index 808e0ecbe1f0..42adc2a3dcbc 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
@@ -192,7 +192,7 @@ struct smu10_clock_voltage_dependency_record {
struct smu10_voltage_dependency_table {
uint32_t count;
- struct smu10_clock_voltage_dependency_record entries[];
+ struct smu10_clock_voltage_dependency_record entries[]
__counted_by(count);
};
struct smu10_clock_voltage_information {
--
2.34.1
