[Intel-gfx] ✓ Fi.CI.BAT: success for Add uAPI to query microcontroller fw version
== Series Details == Series: Add uAPI to query microcontroller fw version URL : https://patchwork.freedesktop.org/series/124592/ State : success == Summary == CI Bug Log - changes from CI_DRM_13708 -> Patchwork_124592v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/index.html Participating hosts (40 -> 38) -- Missing(2): bat-adlp-9 fi-snb-2520m Known issues Here are the changes found in Patchwork_124592v1 that come from known issues: ### CI changes ### Issues hit * boot: - fi-bsw-n3050: [PASS][1] -> [FAIL][2] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13708/fi-bsw-n3050/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/fi-bsw-n3050/boot.html ### IGT changes ### Issues hit * igt@i915_suspend@basic-s3-without-i915: - bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#6645]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/bat-mtlp-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [PASS][4] -> [FAIL][5] ([IGT#3]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13708/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-5: - bat-adlp-11:[PASS][6] -> [ABORT][7] ([i915#8668] / [i915#9451]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13708/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-c-dp-5.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-c-dp-5.html Possible fixes * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-9: [INCOMPLETE][8] ([i915#9275]) -> [PASS][9] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13708/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [ABORT][10] ([i915#9414]) -> [PASS][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13708/bat-mtlp-8/igt@i915_selftest@l...@requests.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-dp-5: - bat-adlp-11:[ABORT][12] ([i915#8668]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13708/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-dp-5.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-dp-5.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645 [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293 [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668 [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275 [i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414 [i915#9451]: https://gitlab.freedesktop.org/drm/intel/issues/9451 Build changes - * Linux: CI_DRM_13708 -> Patchwork_124592v1 CI-20190529: 20190529 CI_DRM_13708: e73c26348a1d154ce981707ae3508018267394b1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7510: a4b4a33d8312e4e30ca23d26bbd1758e56540e1d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_124592v1: e73c26348a1d154ce981707ae3508018267394b1 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits ac478d98b896 Add uAPI to query microcontroller fw version == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124592v1/index.html
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add uAPI to query microcontroller fw version
== Series Details == Series: Add uAPI to query microcontroller fw version URL : https://patchwork.freedesktop.org/series/124592/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add uAPI to query microcontroller fw version
== Series Details ==
Series: Add uAPI to query microcontroller fw version
URL : https://patchwork.freedesktop.org/series/124592/
State : warning
== Summary ==
Error: dim checkpatch failed
5205a07029c0 Add uAPI to query microcontroller fw version
-:10: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line
(possible unwrapped commit description?)
#10:
async compute engines feature in DG2 and newer. A new GuC firmware fixed the
issue but
-:66: CHECK:BRACES: braces {} should be used on all arms of this statement
#66: FILE: drivers/gpu/drm/i915/i915_query.c:563:
+ if (ret == size) {
[...]
+ } else if (ret != 0)
[...]
-:134: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each
line
#134: FILE: include/uapi/drm/i915_drm.h:3219:
+/**
+* struct drm_i915_query_uc_fw_version - query a micro-controller firmware
version
total: 0 errors, 2 warnings, 1 checks, 104 lines checked
Re: [Intel-gfx] [PATCH] dma-buf: Deny copy-on-writes mmaps
Hi Andi,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on linus/master v6.6-rc4 next-20231003]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Andi-Shyti/dma-buf-Deny-copy-on-writes-mmaps/20231004-070556
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20231003230332.513051-1-andi.shyti%40linux.intel.com
patch subject: [PATCH] dma-buf: Deny copy-on-writes mmaps
config: sh-allyesconfig
(https://download.01.org/0day-ci/archive/20231004/202310041156.bi2vshvb-...@intel.com/config)
compiler: sh4-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20231004/202310041156.bi2vshvb-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202310041156.bi2vshvb-...@intel.com/
All errors (new ones prefixed by >>):
drivers/dma-buf/dma-buf.c: In function 'dma_buf_get_unmapped_area':
>> drivers/dma-buf/dma-buf.c:142:27: error: 'struct mm_struct' has no member
>> named 'get_unmapped_area'
142 | return current->mm->get_unmapped_area(file, addr, len,
pgoff, flags);
| ^~
drivers/dma-buf/dma-buf.c:143:1: error: control reaches end of non-void
function [-Werror=return-type]
143 | }
| ^
cc1: some warnings being treated as errors
vim +142 drivers/dma-buf/dma-buf.c
131
132 static unsigned long
133 dma_buf_get_unmapped_area(struct file *file,
134unsigned long addr,
135unsigned long len,
136unsigned long pgoff,
137unsigned long flags)
138 {
139 if ((flags & MAP_TYPE) == MAP_PRIVATE)
140 return -EINVAL;
141
> 142 return current->mm->get_unmapped_area(file, addr, len, pgoff,
> flags);
143 }
144
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
[Intel-gfx] [Patch v2] Add uAPI to query microcontroller fw version
Due to a bug in GuC firmware, Mesa can't enable by default the usage of
async compute engines feature in DG2 and newer. A new GuC firmware fixed the
issue but
until now there was no way for Mesa to know if KMD was running with the fixed
GuC version or not,
so this uAPI is required.
More context on the issue:
Vulkan allows applications to create types of queues: graphics, compute and
copy.
Today Intel Vulkan driver uses Render engine to implement all those 3 queues
types.
There is a set of operations that a queue type is required to implement,
DG2 compute engine have almost all the operations required by compute queue but
still lacks some.
So the solution is to send those operations not supported by compute engine to
render engine
and do some synchronization around it. But doing so causes the GuC scheduler to
get stuck
around the synchronization, until KMD resets the engine and ban the application
context.
This issue was root caused to a GuC firmware issue and was fixed in newer
version.
So Mesa can't enable the "async compute" without knowing for sure that KMD is
running
with a GuC version that has the scheduler fix. Same will happen when Mesa start
to use
copy engine.
This uAPI may be expanded in future to query other firmware versions too.
More information:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661
Mesa usage: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233
v2:
- incorporated feedback from Tvrtko Ursulin:
- updated patch description to clarify the use case that identified
this issue.
- updated query_uc_fw_version() to use copy_query_item() helper.
- updated the implemented GuC version query to return Submission
version.
Cc: John Harrison
Cc: Daniele Ceraolo Spurio
Cc: José Roberto de Souza
Signed-off-by: Vivaik Balasubrawmanian
---
drivers/gpu/drm/i915/i915_query.c | 42 +++
include/uapi/drm/i915_drm.h | 32 +++
2 files changed, 74 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_query.c
b/drivers/gpu/drm/i915/i915_query.c
index 00871ef99792..3e3563ab62b7 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -551,6 +551,47 @@ static int query_hwconfig_blob(struct drm_i915_private
*i915,
return hwconfig->size;
}
+static int
+query_uc_fw_version(struct drm_i915_private *i915, struct drm_i915_query_item
*query)
+{
+ struct drm_i915_query_uc_fw_version __user *query_ptr =
u64_to_user_ptr(query->data_ptr);
+ size_t size = sizeof(struct drm_i915_query_uc_fw_version);
+ struct drm_i915_query_uc_fw_version resp;
+ int ret;
+
+ ret = copy_query_item(, size, size, query);
+ if (ret == size) {
+ query->length = size;
+ return 0;
+ } else if (ret != 0)
+ return ret;
+
+ if (resp.pad || resp.pad2 || resp.reserved) {
+ drm_dbg(>drm,
+ "Invalid input fw version query structure parameters
received");
+ return -EINVAL;
+ }
+
+ switch (resp.uc_type) {
+ case I915_QUERY_UC_TYPE_GUC_SUBMISSION: {
+ struct intel_guc *guc = >gt0.uc.guc;
+
+ resp.major_ver = guc->submission_version.major;
+ resp.minor_ver = guc->submission_version.minor;
+ resp.patch_ver = guc->submission_version.patch;
+ resp.branch_ver = 0;
+ break;
+ }
+ default:
+ return -EINVAL;
+ }
+
+ if (copy_to_user(query_ptr, , size))
+ return -EFAULT;
+
+ return 0;
+}
+
static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
struct drm_i915_query_item *query_item)
= {
query_topology_info,
@@ -559,6 +600,7 @@ static int (* const i915_query_funcs[])(struct
drm_i915_private *dev_priv,
query_memregion_info,
query_hwconfig_blob,
query_geometry_subslices,
+ query_uc_fw_version,
};
int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 7000e5910a1d..6f9d52263c77 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -3013,6 +3013,7 @@ struct drm_i915_query_item {
* - %DRM_I915_QUERY_MEMORY_REGIONS (see struct
drm_i915_query_memory_regions)
* - %DRM_I915_QUERY_HWCONFIG_BLOB (see `GuC HWCONFIG blob uAPI`)
* - %DRM_I915_QUERY_GEOMETRY_SUBSLICES (see struct
drm_i915_query_topology_info)
+* - %DRM_I915_QUERY_UC_FW_VERSION (see struct
drm_i915_query_uc_fw_version)
*/
__u64 query_id;
#define DRM_I915_QUERY_TOPOLOGY_INFO 1
@@ -3021,6 +3022,7 @@ struct drm_i915_query_item {
#define DRM_I915_QUERY_MEMORY_REGIONS 4
#define DRM_I915_QUERY_HWCONFIG_BLOB 5
#define
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Increase MCR lock timeout (rev2)
== Series Details == Series: drm/i915/gt: Increase MCR lock timeout (rev2) URL : https://patchwork.freedesktop.org/series/124576/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13707_full -> Patchwork_124576v2_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124576v2_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124576v2_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124576v2_full: ### IGT changes ### Possible regressions * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-dg2: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-dg2-2/igt@kms_vbl...@pipe-c-ts-continuation-suspend.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-dg2-7/igt@kms_vbl...@pipe-c-ts-continuation-suspend.html New tests - New tests have been introduced between CI_DRM_13707_full and Patchwork_124576v2_full: ### New IGT tests (13) ### * igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-a-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-d-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_cursor_crc@cursor-rapid-movement-128x42@pipe-a-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_cursor_crc@cursor-rapid-movement-128x42@pipe-d-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_alpha_blend@alpha-7efc@pipe-a-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_alpha_blend@alpha-7efc@pipe-d-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_alpha_blend@alpha-basic@pipe-d-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_alpha_blend@alpha-basic@pipe-d-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_alpha_blend@alpha-basic@pipe-d-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_plane_alpha_blend@constant-alpha-mid@pipe-d-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.0] s * igt@kms_rmfb@rmfb-ioctl@pipe-b-hdmi-a-3: - Statuses : 1 pass(s) - Exec time: [0.0] s Known issues Here are the changes found in Patchwork_124576v2_full that come from known issues: ### IGT changes ### Issues hit * igt@device_reset@cold-reset-bound: - shard-mtlp: NOTRUN -> [SKIP][3] ([i915#7701]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-mtlp-5/igt@device_re...@cold-reset-bound.html * igt@drm_fdinfo@virtual-busy-hang: - shard-mtlp: NOTRUN -> [SKIP][4] ([i915#8414]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-mtlp-4/igt@drm_fdi...@virtual-busy-hang.html * igt@drm_fdinfo@virtual-busy-idle: - shard-dg2: NOTRUN -> [SKIP][5] ([i915#8414]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-dg2-7/igt@drm_fdi...@virtual-busy-idle.html * igt@gem_caching@read-writes: - shard-mtlp: NOTRUN -> [SKIP][6] ([i915#4873]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-mtlp-5/igt@gem_cach...@read-writes.html * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0: - shard-dg2: NOTRUN -> [INCOMPLETE][7] ([i915#7297]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-dg2-1/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-smem-lmem0.html * igt@gem_ctx_param@set-priority-not-supported: - shard-mtlp: NOTRUN -> [SKIP][8] ([fdo#109314]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-mtlp-4/igt@gem_ctx_pa...@set-priority-not-supported.html * igt@gem_eio@unwedge-stress: - shard-mtlp: NOTRUN -> [FAIL][9] ([i915#9436]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-mtlp-4/igt@gem_...@unwedge-stress.html * igt@gem_exec_balancer@bonded-false-hang: - shard-dg2: NOTRUN -> [SKIP][10] ([i915#4812]) +2 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/shard-dg2-3/igt@gem_exec_balan...@bonded-false-hang.html *
[Intel-gfx] ✗ Fi.CI.IGT: failure for dma-buf: Deny copy-on-writes mmaps
== Series Details == Series: dma-buf: Deny copy-on-writes mmaps URL : https://patchwork.freedesktop.org/series/124580/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13707_full -> Patchwork_124580v1_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124580v1_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124580v1_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/index.html Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124580v1_full: ### IGT changes ### Possible regressions * igt@i915_selftest@live@gt_pm: - shard-rkl: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-rkl-4/igt@i915_selftest@live@gt_pm.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/shard-rkl-4/igt@i915_selftest@live@gt_pm.html * igt@kms_flip@flip-vs-expired-vblank@a-vga1: - shard-snb: [PASS][3] -> [ABORT][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-snb6/igt@kms_flip@flip-vs-expired-vbl...@a-vga1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/shard-snb4/igt@kms_flip@flip-vs-expired-vbl...@a-vga1.html * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-dg2: [PASS][5] -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-dg2-2/igt@kms_vbl...@pipe-c-ts-continuation-suspend.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/shard-dg2-11/igt@kms_vbl...@pipe-c-ts-continuation-suspend.html Known issues Here are the changes found in Patchwork_124580v1_full that come from known issues: ### CI changes ### Possible fixes * boot: - shard-glk: ([PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [FAIL][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30]) ([i915#8293]) -> ([PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk9/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk9/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk9/boot.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk9/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk8/boot.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk8/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk8/boot.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk8/boot.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk5/boot.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk5/boot.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk4/boot.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk4/boot.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk4/boot.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk4/boot.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk3/boot.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk3/boot.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk3/boot.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk2/boot.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk2/boot.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk2/boot.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk2/boot.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk1/boot.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk1/boot.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/shard-glk1/boot.html [31]:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Increase MCR lock timeout (rev2)
== Series Details == Series: drm/i915/gt: Increase MCR lock timeout (rev2) URL : https://patchwork.freedesktop.org/series/124576/ State : success == Summary == CI Bug Log - changes from CI_DRM_13707 -> Patchwork_124576v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/index.html Participating hosts (41 -> 39) -- Additional (1): bat-dg2-8 Missing(3): fi-kbl-soraka fi-snb-2520m fi-bsw-n3050 Known issues Here are the changes found in Patchwork_124576v2 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][1] ([i915#4083]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-8: NOTRUN -> [SKIP][2] ([i915#4077]) +2 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@gem_mmap_...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-8: NOTRUN -> [SKIP][3] ([i915#4079]) +1 other test skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][4] ([i915#6621]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_lrc: - bat-adlp-9: [PASS][5] -> [INCOMPLETE][6] ([i915#7913]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/bat-adlp-9/igt@i915_selftest@live@gt_lrc.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-adlp-9/igt@i915_selftest@live@gt_lrc.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#6645]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#5190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][9] ([i915#4215] / [i915#5190]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#4212]) +6 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#4212] / [i915#5608]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_flip@basic-flip-vs-modeset@b-dp6: - bat-adlp-11:[PASS][13] -> [FAIL][14] ([i915#6121]) +3 other tests fail [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@b-dp6.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@b-dp6.html * igt@kms_flip@basic-flip-vs-modeset@d-dp5: - bat-adlp-11:[PASS][15] -> [DMESG-FAIL][16] ([i915#6868]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@d-dp5.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@d-dp5.html * igt@kms_flip@basic-flip-vs-wf_vblank: - bat-adlp-11:NOTRUN -> [SKIP][17] ([i915#3637]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-adlp-11/igt@kms_flip@basic-flip-vs-wf_vblank.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-8: NOTRUN -> [SKIP][18] ([fdo#109285]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-8: NOTRUN -> [SKIP][19] ([i915#5274]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v2/bat-dg2-8/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-adlp-9:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Start cleaning up the DPLL ID mess (rev3)
== Series Details == Series: drm/i915: Start cleaning up the DPLL ID mess (rev3) URL : https://patchwork.freedesktop.org/series/108827/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13706_full -> Patchwork_108827v3_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_108827v3_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_108827v3_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_108827v3_full: ### IGT changes ### Possible regressions * igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend: - shard-apl: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-apl3/igt@kms_vbl...@pipe-c-ts-continuation-dpms-suspend.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/shard-apl1/igt@kms_vbl...@pipe-c-ts-continuation-dpms-suspend.html Known issues Here are the changes found in Patchwork_108827v3_full that come from known issues: ### CI changes ### Issues hit * boot: - shard-glk: ([PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27]) -> ([PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [FAIL][50], [PASS][51], [PASS][52]) ([i915#8293]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk3/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk9/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk9/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk9/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk3/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk9/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk8/boot.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk8/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk8/boot.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk5/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk5/boot.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk5/boot.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk3/boot.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk5/boot.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk4/boot.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk3/boot.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk2/boot.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk2/boot.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk2/boot.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk4/boot.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk2/boot.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk1/boot.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk1/boot.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk1/boot.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/shard-glk4/boot.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/shard-glk4/boot.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/shard-glk4/boot.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/shard-glk3/boot.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/shard-glk3/boot.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/shard-glk3/boot.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/shard-glk2/boot.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/shard-glk1/boot.html [35]:
[Intel-gfx] ✓ Fi.CI.BAT: success for dma-buf: Deny copy-on-writes mmaps
== Series Details == Series: dma-buf: Deny copy-on-writes mmaps URL : https://patchwork.freedesktop.org/series/124580/ State : success == Summary == CI Bug Log - changes from CI_DRM_13707 -> Patchwork_124580v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/index.html Participating hosts (41 -> 39) -- Missing(2): fi-snb-2520m fi-bsw-n3050 Known issues Here are the changes found in Patchwork_124580v1 that come from known issues: ### CI changes ### Issues hit * boot: - fi-hsw-4770:[PASS][1] -> [FAIL][2] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/fi-hsw-4770/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-9: [PASS][3] -> [INCOMPLETE][4] ([i915#9275]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html * igt@i915_selftest@live@hugepages: - bat-mtlp-8: NOTRUN -> [ABORT][5] ([i915#9414]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/bat-mtlp-8/igt@i915_selftest@l...@hugepages.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#1845]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html Possible fixes * igt@i915_selftest@live@mman: - bat-rpls-1: [TIMEOUT][7] ([i915#6794] / [i915#7392]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/bat-rpls-1/igt@i915_selftest@l...@mman.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/bat-rpls-1/igt@i915_selftest@l...@mman.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [ABORT][9] ([i915#9414]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/bat-mtlp-8/igt@i915_selftest@l...@requests.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-rpls-1: [WARN][11] ([i915#8747]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/bat-rpls-1/igt@i915_susp...@basic-s2idle-without-i915.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/bat-rpls-1/igt@i915_susp...@basic-s2idle-without-i915.html * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [FAIL][13] ([IGT#3]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13707/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794 [i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392 [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293 [i915#8747]: https://gitlab.freedesktop.org/drm/intel/issues/8747 [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275 [i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414 Build changes - * Linux: CI_DRM_13707 -> Patchwork_124580v1 CI-20190529: 20190529 CI_DRM_13707: 98ff3b34570d029d798a681667d9edf709be9697 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7510: a4b4a33d8312e4e30ca23d26bbd1758e56540e1d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_124580v1: 98ff3b34570d029d798a681667d9edf709be9697 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits c1832f94b9bb dma-buf: Deny copy-on-writes mmaps == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124580v1/index.html
[Intel-gfx] [PATCH] dma-buf: Deny copy-on-writes mmaps
From: Chris Wilson
Enforce that an mmap of a dmabuf is always using MAP_SHARED so that all
access (both read and writes) using the device memory and not a local
copy-on-write page in system memory.
Signed-off-by: Chris Wilson
Signed-off-by: Andi Shyti
---
drivers/dma-buf/dma-buf.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index 21916bba77d5..1ec297241842 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
#include
@@ -128,6 +129,19 @@ static struct file_system_type dma_buf_fs_type = {
.kill_sb = kill_anon_super,
};
+static unsigned long
+dma_buf_get_unmapped_area(struct file *file,
+ unsigned long addr,
+ unsigned long len,
+ unsigned long pgoff,
+ unsigned long flags)
+{
+ if ((flags & MAP_TYPE) == MAP_PRIVATE)
+ return -EINVAL;
+
+ return current->mm->get_unmapped_area(file, addr, len, pgoff, flags);
+}
+
static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma)
{
struct dma_buf *dmabuf;
@@ -508,6 +522,7 @@ static void dma_buf_show_fdinfo(struct seq_file *m, struct
file *file)
static const struct file_operations dma_buf_fops = {
.release= dma_buf_file_release,
+ .get_unmapped_area = dma_buf_get_unmapped_area,
.mmap = dma_buf_mmap_internal,
.llseek = dma_buf_llseek,
.poll = dma_buf_poll,
--
2.40.1
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Increase MCR lock timeout
== Series Details == Series: drm/i915/gt: Increase MCR lock timeout URL : https://patchwork.freedesktop.org/series/124576/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13706 -> Patchwork_124576v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124576v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124576v1, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/index.html Participating hosts (39 -> 38) -- Missing(1): fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124576v1: ### IGT changes ### Possible regressions * igt@gem_exec_suspend@basic-s0@smem: - fi-cfl-8109u: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/fi-cfl-8109u/igt@gem_exec_suspend@basic...@smem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/fi-cfl-8109u/igt@gem_exec_suspend@basic...@smem.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-adlp-11:NOTRUN -> [FAIL][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-11/igt@i915_susp...@basic-s2idle-without-i915.html Known issues Here are the changes found in Patchwork_124576v1 that come from known issues: ### CI changes ### Issues hit * boot: - fi-bsw-n3050: [PASS][4] -> [FAIL][5] ([i915#8293]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/fi-bsw-n3050/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/fi-bsw-n3050/boot.html - fi-hsw-4770:[PASS][6] -> [FAIL][7] ([i915#8293]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/fi-hsw-4770/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@gem_lmem_swapping@verify-random: - bat-adlp-11:NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-11/igt@gem_lmem_swapp...@verify-random.html * igt@i915_pm_rps@basic-api: - bat-adlp-11:NOTRUN -> [SKIP][9] ([i915#6621]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-11/igt@i915_pm_...@basic-api.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-5: - bat-adlp-11:[PASS][10] -> [DMESG-FAIL][11] ([i915#6868]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html * igt@kms_pipe_crc_basic@hang-read-crc: - bat-adlp-11:NOTRUN -> [SKIP][12] ([i915#3546]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-11/igt@kms_pipe_crc_ba...@hang-read-crc.html * igt@kms_psr@primary_page_flip: - bat-adlp-11:NOTRUN -> [SKIP][13] ([i915#1072]) +3 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-11/igt@kms_psr@primary_page_flip.html * igt@kms_setmode@basic-clone-single-crtc: - bat-adlp-11:NOTRUN -> [SKIP][14] ([i915#3555]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-11/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-read: - bat-adlp-11:NOTRUN -> [SKIP][15] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-11/igt@prime_v...@basic-fence-read.html Possible fixes * igt@i915_module_load@load: - bat-adlp-6: [DMESG-WARN][16] ([i915#1982] / [i915#8449]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-6/igt@i915_module_l...@load.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-adlp-6/igt@i915_module_l...@load.html * igt@i915_selftest@live@mman: - bat-rpls-1: [TIMEOUT][18] ([i915#6794] / [i915#7392]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-rpls-1/igt@i915_selftest@l...@mman.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124576v1/bat-rpls-1/igt@i915_selftest@l...@mman.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-rpls-1: [WARN][20] ([i915#8747]) -> [PASS][21] [20]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags
== Series Details == Series: series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags URL : https://patchwork.freedesktop.org/series/124575/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13706 -> Patchwork_124575v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124575v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124575v1, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/index.html Participating hosts (39 -> 38) -- Additional (1): fi-kbl-soraka Missing(2): fi-tgl-1115g4 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124575v1: ### IGT changes ### Possible regressions * igt@i915_selftest@live@gt_tlb: - bat-mtlp-6: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-mtlp-6/igt@i915_selftest@live@gt_tlb.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/bat-mtlp-6/igt@i915_selftest@live@gt_tlb.html - bat-mtlp-8: [PASS][3] -> [DMESG-FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-mtlp-8/igt@i915_selftest@live@gt_tlb.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/bat-mtlp-8/igt@i915_selftest@live@gt_tlb.html * igt@i915_selftest@live@gtt: - bat-rpls-1: NOTRUN -> [INCOMPLETE][5] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/bat-rpls-1/igt@i915_selftest@l...@gtt.html * igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling: - bat-adlm-1: [PASS][6] -> [INCOMPLETE][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlm-1/igt@kms_addfb_ba...@addfb25-framebuffer-vs-set-tiling.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/bat-adlm-1/igt@kms_addfb_ba...@addfb25-framebuffer-vs-set-tiling.html * igt@kms_busy@basic@flip: - bat-adlp-6: [PASS][8] -> [INCOMPLETE][9] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-6/igt@kms_busy@ba...@flip.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/bat-adlp-6/igt@kms_busy@ba...@flip.html * igt@kms_busy@basic@modeset: - bat-adlp-11:[PASS][10] -> [ABORT][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-11/igt@kms_busy@ba...@modeset.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/bat-adlp-11/igt@kms_busy@ba...@modeset.html Known issues Here are the changes found in Patchwork_124575v1 that come from known issues: ### CI changes ### Issues hit * boot: - fi-bsw-n3050: [PASS][12] -> [FAIL][13] ([i915#8293]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/fi-bsw-n3050/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/fi-bsw-n3050/boot.html ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#2190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613]) +3 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@i915_selftest@live@gt_heartbeat: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][16] ([i915#5334] / [i915#7872]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html - fi-apl-guc: [PASS][17] -> [DMESG-FAIL][18] ([i915#5334]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][19] ([i915#1886] / [i915#7913]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@gtt: - bat-adlp-9: [PASS][20] -> [INCOMPLETE][21] ([i915#7913]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-9/igt@i915_selftest@l...@gtt.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124575v1/bat-adlp-9/igt@i915_selftest@l...@gtt.html - bat-dg2-11: [PASS][22] -> [INCOMPLETE][23]
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags
== Series Details == Series: series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags URL : https://patchwork.freedesktop.org/series/124575/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags
== Series Details == Series: series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags URL : https://patchwork.freedesktop.org/series/124575/ State : warning == Summary == Error: dim checkpatch failed 2112f658680f drm/i915: Add GuC TLB Invalidation pci tags febaffe1c6c6 drm/i915: Define and use GuC and CTB TLB invalidation routines -:124: ERROR:TRAILING_WHITESPACE: trailing whitespace #124: FILE: drivers/gpu/drm/i915/gt/intel_tlb.c:142: +^I^I^I/* $ -:224: ERROR:TRAILING_WHITESPACE: trailing whitespace #224: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc.h:437: +^I$ -:244: ERROR:TRAILING_WHITESPACE: trailing whitespace #244: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c:1193: +^I/* $ -:338: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #338: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:1991: + GEM_BUG_ON(wait->busy); total: 3 errors, 1 warnings, 0 checks, 459 lines checked 6a9427e33b51 drm/i915: No TLB invalidation on wedged or suspended GT
Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines
Hi John,
> > > > - mmio_invalidate_full(gt);
> > > > + if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc)) {
> > > > + if (intel_guc_is_ready(guc))
> > > > + intel_guc_invalidate_tlb_full(guc);
> > > > + } else {
> > > > + /*
> > > > +* Fall back to old path if GuC is disabled.
> > > > +* This is safe because GuC is not enabled and
> > > > not writing to MMIO.
> > > > +*/
> > > It is safe for intel_guc_is_ready() transitioning from false to true
> > > during GuC init? No way for some path to start issuing invalidations as
> > > that is happening?
> > >
> > > > + mmio_invalidate_full(gt);
> > > > + }
> > supernitpick: as we are at this, brackets are not required.
> Braces are required on the first half of the 'if' because it is a double if
> and the else applies to the top level not the inner level. And my
> understanding of the style guide is that lop-sided bracing is incorrect.
> i.e. never have "} else". Plus while it might be syntactically valid to not
> have braces around the five line else clause because it is only one actual
> code statement, it massively helps readability of the code to have the
> braces present.
You are right, the 'else' would connect with the innermost 'if'
and besides gcc complains with a warning like this:
warning: suggest explicit braces to avoid ambiguous ‘else’ [-Wdangling-else]
Thanks,
Andi
[Intel-gfx] [PATCH] drm/i915/gt: Increase MCR lock timeout
Increase the timeout MCR waits for the steering semaphore in intel_gt_mcr_lock by a factor of 10. Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c index 326c2ed1d99bb..e3f7fb1248809 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c @@ -378,7 +378,7 @@ void intel_gt_mcr_lock(struct intel_gt *gt, unsigned long *flags) */ if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) err = wait_for(intel_uncore_read_fw(gt->uncore, - MTL_STEER_SEMAPHORE) == 0x1, 100); + MTL_STEER_SEMAPHORE) == 0x1, 1000); /* * Even on platforms with a hardware lock, we'll continue to grab -- 2.25.1
[Intel-gfx] [PATCH v4 3/3] drm/i915: No TLB invalidation on wedged or suspended GT
In case of GT is suspended or wedged, don't allow submission of new TLB
invalidation request and cancel all pending requests. The TLB entries
will be invalidated either during GuC reload or on system resume.
Signed-off-by: Fei Yang
Signed-off-by: Jonathan Cavitt
CC: John Harrison
---
drivers/gpu/drm/i915/gt/intel_gt.h| 26
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 1 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 41 +++
drivers/gpu/drm/i915/i915_driver.c| 5 +++
4 files changed, 64 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 970bedf6b78a7..71a0e376ded40 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -9,6 +9,7 @@
#include "intel_engine_types.h"
#include "intel_gt_types.h"
#include "intel_reset.h"
+#include "i915_drv.h"
struct drm_i915_private;
struct drm_printer;
@@ -179,4 +180,29 @@ enum i915_map_type intel_gt_coherent_map_type(struct
intel_gt *gt,
void intel_gt_bind_context_set_ready(struct intel_gt *gt);
void intel_gt_bind_context_set_unready(struct intel_gt *gt);
bool intel_gt_is_bind_context_ready(struct intel_gt *gt);
+
+static inline void intel_tlb_suspend(struct drm_i915_private *i915)
+{
+ struct intel_gt *gt;
+ int i;
+
+ if (!HAS_GUC_TLB_INVALIDATION(i915))
+ return;
+ for_each_gt(gt, i915, i)
+ wake_up_all_tlb_invalidate(>uc.guc);
+}
+
+static inline void intel_tlb_resume(struct drm_i915_private *i915)
+{
+ struct intel_gt *gt;
+ int i;
+
+ if (!HAS_GUC_TLB_INVALIDATION(i915))
+ return;
+ for_each_gt(gt, i915, i) {
+ intel_guc_invalidate_tlb_full(>uc.guc);
+ intel_guc_invalidate_tlb(>uc.guc);
+ }
+}
+
#endif /* __INTEL_GT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 636edf598946c..e2491f489f1bc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -536,4 +536,5 @@ void intel_guc_dump_time_info(struct intel_guc *guc, struct
drm_printer *p);
int intel_guc_sched_disable_gucid_threshold_max(struct intel_guc *guc);
+void wake_up_all_tlb_invalidate(struct intel_guc *guc);
#endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 872014a801c7e..20e9076cf099e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -32,6 +32,7 @@
#include "i915_drv.h"
#include "i915_reg.h"
+#include "i915_irq.h"
#include "i915_trace.h"
/**
@@ -1796,13 +1797,23 @@ static void __guc_reset_context(struct intel_context
*ce, intel_engine_mask_t st
intel_context_put(parent);
}
-void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t
stalled)
+void wake_up_all_tlb_invalidate(struct intel_guc *guc)
{
struct intel_guc_tlb_wait *wait;
+ unsigned long i;
+
+ xa_for_each(>tlb_lookup, i, wait) {
+ /* Barrier to ensure the store is observed by the woken thread
*/
+ smp_store_mb(wait->busy, 0);
+ wake_up(>wq);
+ }
+}
+
+void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t
stalled)
+{
struct intel_context *ce;
unsigned long index;
unsigned long flags;
- unsigned long i;
if (unlikely(!guc_submission_initialized(guc))) {
/* Reset called during driver load? GuC not yet initialised! */
@@ -1833,11 +1844,7 @@ void intel_guc_submission_reset(struct intel_guc *guc,
intel_engine_mask_t stall
* The full GT reset will have cleared the TLB caches and flushed the
* G2H message queue; we can release all the blocked waiters.
*/
- xa_for_each(>tlb_lookup, i, wait) {
- /* Barrier to ensure the store is observed by the woken thread
*/
- smp_store_mb(wait->busy, 0);
- wake_up(>wq);
- }
+ wake_up_all_tlb_invalidate(guc);
}
static void guc_cancel_context_requests(struct intel_context *ce)
@@ -1933,6 +1940,12 @@ void intel_guc_submission_cancel_requests(struct
intel_guc *guc)
/* GuC is blown away, drop all references to contexts */
xa_destroy(>context_lookup);
+
+ /*
+* Wedged GT won't respond to any TLB invalidation request. Simply
+* release all the blocked waiters.
+*/
+ wake_up_all_tlb_invalidate(guc);
}
void intel_guc_submission_reset_finish(struct intel_guc *guc)
@@ -4740,6 +4753,14 @@ static long must_wait_woken(struct wait_queue_entry
*wq_entry, long timeout)
return timeout;
}
+static bool intel_gt_is_enabled(const struct intel_gt *gt)
+{
+ /* Check if GT is wedged or suspended */
+ if (intel_gt_is_wedged(gt) ||
[Intel-gfx] [PATCH v4 2/3] drm/i915: Define and use GuC and CTB TLB invalidation routines
From: Prathap Kumar Valsan
The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation. We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back to GT invalidation when the GuC is
disabled.
The invalidation is done by sending a request directly to the GuC
tlb_lookup that invalidates the table. The invalidation is submitted as
a wait request and is performed in the CT event handler. This means we
cannot perform this TLB invalidation path if the CT is not enabled.
If the request isn't fulfilled in two seconds, this would constitute
an error in the invalidation as that would constitute either a lost
request or a severe GuC overload.
With this new invalidation routine, we can perform GuC-based GGTT
invalidations. GuC-based GGTT invalidation is incompatible with
MMIO invalidation so we should not perform MMIO invalidation when
GuC-based GGTT invalidation is expected.
Signed-off-by: Prathap Kumar Valsan
Signed-off-by: Bruce Chang
Signed-off-by: Chris Wilson
Signed-off-by: Umesh Nerlige Ramappa
Signed-off-by: Jonathan Cavitt
Signed-off-by: Aravind Iddamsetty
Signed-off-by: Fei Yang
CC: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 43 ++--
drivers/gpu/drm/i915/gt/intel_tlb.c | 14 +-
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 33 +++
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 22 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 15 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 205 +-
7 files changed, 317 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 4d7d88b92632b..1381d2957ec3c 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -206,22 +206,38 @@ static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
}
-static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
+static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
{
- struct drm_i915_private *i915 = ggtt->vm.i915;
+ struct intel_uncore *uncore = gt->uncore;
+ intel_wakeref_t wakeref;
- gen8_ggtt_invalidate(ggtt);
+ with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
+ struct intel_guc *guc = >uc.guc;
- if (GRAPHICS_VER(i915) >= 12) {
- struct intel_gt *gt;
+ intel_guc_invalidate_tlb(guc);
+ }
+}
- list_for_each_entry(gt, >gt_list, ggtt_link)
- intel_uncore_write_fw(gt->uncore,
- GEN12_GUC_TLB_INV_CR,
- GEN12_GUC_TLB_INV_CR_INVALIDATE);
- } else {
- intel_uncore_write_fw(ggtt->vm.gt->uncore,
- GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
+{
+ struct drm_i915_private *i915 = ggtt->vm.i915;
+ struct intel_gt *gt;
+
+ if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
+ gen8_ggtt_invalidate(ggtt);
+
+ list_for_each_entry(gt, >gt_list, ggtt_link) {
+ if (HAS_GUC_TLB_INVALIDATION(i915) &&
+ intel_guc_is_ready(>uc.guc)) {
+ guc_ggtt_ct_invalidate(gt);
+ } else if (GRAPHICS_VER(i915) >= 12) {
+ intel_uncore_write(gt->uncore,
+ GEN12_GUC_TLB_INV_CR,
+ GEN12_GUC_TLB_INV_CR_INVALIDATE);
+ } else {
+ intel_uncore_write(gt->uncore,
+ GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+ }
}
}
@@ -1243,7 +1259,8 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.raw_insert_page = gen8_ggtt_insert_page;
}
- if (intel_uc_wants_guc(>vm.gt->uc))
+ if (intel_uc_wants_guc(>vm.gt->uc) &&
+ intel_uc_wants_guc_submission(>vm.gt->uc))
ggtt->invalidate = guc_ggtt_invalidate;
else
ggtt->invalidate = gen8_ggtt_invalidate;
diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c
b/drivers/gpu/drm/i915/gt/intel_tlb.c
index 139608c30d978..aa030dbfb7058 100644
--- a/drivers/gpu/drm/i915/gt/intel_tlb.c
+++ b/drivers/gpu/drm/i915/gt/intel_tlb.c
@@ -12,6 +12,7 @@
#include "intel_gt_print.h"
#include "intel_gt_regs.h"
#include "intel_tlb.h"
+#include "uc/intel_guc.h"
/*
* HW architecture suggest typical invalidation time at 40us,
@@ -131,11 +132,22 @@ void intel_gt_invalidate_tlb_full(struct intel_gt *gt,
u32 seqno)
return;
with_intel_gt_pm_if_awake(gt, wakeref) {
+
[Intel-gfx] [PATCH v4 1/3] drm/i915: Add GuC TLB Invalidation pci tags
Add device info tags for if GuC TLB Invalidation is enabled. Since GuC
based TLB invalidation is only strictly necessary for MTL presently,
only enable GuC based TLB invalidations for MTL.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 3 ++-
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b4fa81cab92d7..154f004373a9c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -821,4 +821,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
GRAPHICS_VER_FULL(i915) >= IP_VER(12,
70))
+#define HAS_GUC_TLB_INVALIDATION(i915)
(INTEL_INFO(i915)->has_guc_tlb_invalidation)
#endif
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index df7c261410f79..c3a5d5efb45d1 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -837,6 +837,7 @@ static const struct intel_device_info mtl_info = {
.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
.require_force_probe = 1,
+ .has_guc_tlb_invalidation = 1,
MTL_CACHELEVEL,
};
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 39817490b13fd..ad54db0a22470 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -173,7 +173,8 @@ enum intel_ppgtt_type {
func(has_coherent_ggtt); \
func(tuning_thread_rr_after_dep); \
func(unfenced_needs_alignment); \
- func(hws_needs_physical);
+ func(hws_needs_physical); \
+ func(has_guc_tlb_invalidation);
struct intel_ip_version {
u8 ver;
--
2.25.1
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Start cleaning up the DPLL ID mess (rev3)
== Series Details == Series: drm/i915: Start cleaning up the DPLL ID mess (rev3) URL : https://patchwork.freedesktop.org/series/108827/ State : success == Summary == CI Bug Log - changes from CI_DRM_13706 -> Patchwork_108827v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/index.html Participating hosts (39 -> 37) -- Missing(2): fi-snb-2520m fi-bsw-n3050 Known issues Here are the changes found in Patchwork_108827v3 that come from known issues: ### IGT changes ### Issues hit * igt@i915_suspend@basic-s3-without-i915: - bat-mtlp-8: NOTRUN -> [SKIP][1] ([i915#6645]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-mtlp-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-dg2-11: NOTRUN -> [SKIP][2] ([i915#1845]) +3 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-dp-6: - bat-adlp-11:[PASS][3] -> [ABORT][4] ([i915#6868] / [i915#8668]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-b-dp-6.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-b-dp-6.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-dp-5: - bat-adlp-11:[PASS][5] -> [FAIL][6] ([i915#9047]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-dp-5.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-dp-5.html Possible fixes * igt@i915_module_load@load: - bat-adlp-6: [DMESG-WARN][7] ([i915#1982] / [i915#8449]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-6/igt@i915_module_l...@load.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-adlp-6/igt@i915_module_l...@load.html * igt@i915_selftest@live@mman: - bat-rpls-1: [TIMEOUT][9] ([i915#6794] / [i915#7392]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-rpls-1/igt@i915_selftest@l...@mman.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-rpls-1/igt@i915_selftest@l...@mman.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [ABORT][11] ([i915#9414]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-mtlp-8/igt@i915_selftest@l...@requests.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-rpls-1: [WARN][13] ([i915#8747]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-rpls-1/igt@i915_susp...@basic-s2idle-without-i915.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-rpls-1/igt@i915_susp...@basic-s2idle-without-i915.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-d-hdmi-a-3: - bat-dg2-11: [INCOMPLETE][15] -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-...@pipe-d-hdmi-a-3.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-...@pipe-d-hdmi-a-3.html Warnings * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-5: - bat-adlp-11:[ABORT][17] ([i915#8668] / [i915#9451]) -> [FAIL][18] ([i915#9047]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13706/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-c-dp-5.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108827v3/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-c-dp-5.html [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645 [i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794 [i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868 [i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392 [i915#8449]: https://gitlab.freedesktop.org/drm/intel/issues/8449 [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668 [i915#8747]: https://gitlab.freedesktop.org/drm/intel/issues/8747 [i915#9047]: https://gitlab.freedesktop.org/drm/intel/issues/9047
Re: [Intel-gfx] [PATCH 1/3] drm/i915/guc: Support new and improved engine busyness
On Fri, Sep 22, 2023 at 03:25:08PM -0700, john.c.harri...@intel.com wrote:
From: John Harrison
The GuC has been extended to support a much more friendly engine
busyness interface. So partition the old interface into a 'busy_v1'
space and add 'busy_v2' support alongside. And if v2 is available, use
that in preference to v1. Note that v2 provides extra features over
and above v1 which will be exposed via PMU in subsequent patches.
Since we are thinking of using the existing busyness counter to expose
the v2 values, we can drop the last sentence from above.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/intel_engine_types.h | 4 +-
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 4 +-
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 82 ++--
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 55 ++-
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h| 9 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 23 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 381 ++
7 files changed, 427 insertions(+), 131 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index a7e6775980043..40fd8f984d64b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -323,7 +323,7 @@ struct intel_engine_execlists_stats {
ktime_t start;
};
-struct intel_engine_guc_stats {
+struct intel_engine_guc_stats_v1 {
/**
* @running: Active state of the engine when busyness was last sampled.
*/
@@ -603,7 +603,7 @@ struct intel_engine_cs {
struct {
union {
struct intel_engine_execlists_stats execlists;
- struct intel_engine_guc_stats guc;
+ struct intel_engine_guc_stats_v1 guc_v1;
};
Overall, I would suggest having the renames as a separate patch. Would
make the review easier.
/**
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
index f359bef046e0b..c190a99a36c38 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
@@ -137,7 +137,9 @@ enum intel_guc_action {
INTEL_GUC_ACTION_DEREGISTER_CONTEXT_DONE = 0x4600,
INTEL_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
INTEL_GUC_ACTION_CLIENT_SOFT_RESET = 0x5507,
- INTEL_GUC_ACTION_SET_ENG_UTIL_BUFF = 0x550A,
+ INTEL_GUC_ACTION_SET_ENG_UTIL_BUFF_V1 = 0x550A,
+ INTEL_GUC_ACTION_SET_DEVICE_ENGINE_UTILIZATION_V2 = 0x550C,
+ INTEL_GUC_ACTION_SET_FUNCTION_ENGINE_UTILIZATION_V2 = 0x550D,
INTEL_GUC_ACTION_STATE_CAPTURE_NOTIFICATION = 0x8002,
INTEL_GUC_ACTION_NOTIFY_FLUSH_LOG_BUFFER_TO_FILE = 0x8003,
INTEL_GUC_ACTION_NOTIFY_CRASH_DUMP_POSTED = 0x8004,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 6c392bad29c19..e6502ab5f049f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -226,45 +226,61 @@ struct intel_guc {
struct mutex send_mutex;
/**
-* @timestamp: GT timestamp object that stores a copy of the timestamp
-* and adjusts it for overflow using a worker.
+* @busy: Data used by the different versions of engine busyness
implementations.
*/
- struct {
- /**
-* @lock: Lock protecting the below fields and the engine stats.
-*/
- spinlock_t lock;
-
- /**
-* @gt_stamp: 64 bit extended value of the GT timestamp.
-*/
- u64 gt_stamp;
-
- /**
-* @ping_delay: Period for polling the GT timestamp for
-* overflow.
-*/
- unsigned long ping_delay;
-
- /**
-* @work: Periodic work to adjust GT timestamp, engine and
-* context usage for overflows.
-*/
- struct delayed_work work;
-
+ union {
/**
-* @shift: Right shift value for the gpm timestamp
+* @v1: Data used by v1 engine busyness implementation. Mostly
a copy
+* of the GT timestamp extended to 64 bits and the worker for
maintaining it.
*/
- u32 shift;
+ struct {
+ /**
+* @lock: Lock protecting the below fields and the
engine stats.
+*/
+ spinlock_t lock;
+
+ /**
+* @gt_stamp: 64 bit extended value of the GT timestamp.
+*/
+ u64 gt_stamp;
+
+ /**
+* @ping_delay: Period for polling the GT
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Start cleaning up the DPLL ID mess (rev3)
== Series Details == Series: drm/i915: Start cleaning up the DPLL ID mess (rev3) URL : https://patchwork.freedesktop.org/series/108827/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start cleaning up the DPLL ID mess (rev3)
== Series Details == Series: drm/i915: Start cleaning up the DPLL ID mess (rev3) URL : https://patchwork.freedesktop.org/series/108827/ State : warning == Summary == Error: dim checkpatch failed af48f78e0453 drm/i915: Stop requiring PLL index == PLL ID -:184: CHECK:SPACING: No space is necessary after a cast #184: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:577: + id = (enum intel_dpll_id) crtc->pipe; total: 0 errors, 0 warnings, 1 checks, 200 lines checked cc7c89728d27 drm/i915: Decouple I915_NUM_PLLS from PLL IDs 231a873e02f7 drm/i915: Introduce for_each_shared_dpll() -:162: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #162: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.h:32: +#define for_each_shared_dpll(__i915, __pll, __i) \ + for ((__i) = 0; (__i) < (__i915)->display.dpll.num_shared_dpll && \ +((__pll) = &(__i915)->display.dpll.shared_dplls[(__i)]) ; (__i)++) -:162: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects? #162: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.h:32: +#define for_each_shared_dpll(__i915, __pll, __i) \ + for ((__i) = 0; (__i) < (__i915)->display.dpll.num_shared_dpll && \ +((__pll) = &(__i915)->display.dpll.shared_dplls[(__i)]) ; (__i)++) total: 0 errors, 0 warnings, 2 checks, 142 lines checked 8e9c1c226f27 drm/i915: s/dev_priv/i915/ in the shared_dpll code -:103: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!pll" #103: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:236: + if (drm_WARN_ON(>drm, pll == NULL)) -:774: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #774: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:1941: +static void bxt_ddi_pll_enable(struct drm_i915_private *i915, struct intel_shared_dpll *pll) -:906: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #906: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2042: +static void bxt_ddi_pll_disable(struct drm_i915_private *i915, struct intel_shared_dpll *pll) -:932: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #932: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2061: +static bool bxt_ddi_pll_get_hw_state(struct drm_i915_private *i915, struct intel_shared_dpll *pll, total: 0 errors, 0 warnings, 4 checks, 2142 lines checked
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/6] drm/i915/fbc: Remove ancient 16k plane stride limit
== Series Details == Series: series starting with [v2,1/6] drm/i915/fbc: Remove ancient 16k plane stride limit URL : https://patchwork.freedesktop.org/series/124568/ State : success == Summary == CI Bug Log - changes from CI_DRM_13706 -> Patchwork_124568v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/index.html Participating hosts (39 -> 39) -- Additional (1): bat-dg2-9 Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_124568v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-9: NOTRUN -> [SKIP][1] ([i915#4083]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-9: NOTRUN -> [SKIP][2] ([i915#4077]) +2 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-dg2-9: NOTRUN -> [SKIP][3] ([i915#4079]) +1 other test skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-9: NOTRUN -> [SKIP][4] ([i915#6621]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@i915_pm_...@basic-api.html * igt@i915_suspend@basic-s3-without-i915: - bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#6645]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-mtlp-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-9: NOTRUN -> [SKIP][6] ([i915#5190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-9: NOTRUN -> [SKIP][7] ([i915#4215] / [i915#5190]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-9: NOTRUN -> [SKIP][8] ([i915#4212]) +6 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-9: NOTRUN -> [SKIP][9] ([i915#4212] / [i915#5608]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-9: NOTRUN -> [SKIP][10] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-9: NOTRUN -> [SKIP][11] ([fdo#109285]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-9: NOTRUN -> [SKIP][12] ([i915#5274]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_psr@sprite_plane_onoff: - bat-dg2-9: NOTRUN -> [SKIP][13] ([i915#1072]) +3 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_psr@sprite_plane_onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-dg2-9: NOTRUN -> [SKIP][14] ([i915#3555]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-flip: - bat-dg2-9: NOTRUN -> [SKIP][15] ([i915#3708]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@prime_v...@basic-fence-flip.html * igt@prime_vgem@basic-fence-mmap: - bat-dg2-9: NOTRUN -> [SKIP][16] ([i915#3708] / [i915#4077]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@prime_v...@basic-fence-mmap.html * igt@prime_vgem@basic-write: - bat-dg2-9: NOTRUN -> [SKIP][17] ([i915#3291] / [i915#3708]) +2 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124568v1/bat-dg2-9/igt@prime_v...@basic-write.html Possible fixes * igt@i915_module_load@load: - bat-adlp-6: [DMESG-WARN][18] ([i915#1982] / [i915#8449]) -> [PASS][19] [18]:
Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines
On 10/3/2023 09:41, Andi Shyti wrote:
[...]
- mmio_invalidate_full(gt);
+ if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc)) {
+ if (intel_guc_is_ready(guc))
+ intel_guc_invalidate_tlb_full(guc);
+ } else {
+ /*
+* Fall back to old path if GuC is disabled.
+* This is safe because GuC is not enabled and not
writing to MMIO.
+*/
It is safe for intel_guc_is_ready() transitioning from false to true during GuC
init? No way for some path to start issuing invalidations as that is happening?
+ mmio_invalidate_full(gt);
+ }
supernitpick: as we are at this, brackets are not required.
Braces are required on the first half of the 'if' because it is a double
if and the else applies to the top level not the inner level. And my
understanding of the style guide is that lop-sided bracing is incorrect.
i.e. never have "} else". Plus while it might be syntactically valid to
not have braces around the five line else clause because it is only one
actual code statement, it massively helps readability of the code to
have the braces present.
John.
Andi
Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines
On 10/3/2023 03:28, Tvrtko Ursulin wrote:
On 02/10/2023 18:24, Jonathan Cavitt wrote:
From: Prathap Kumar Valsan
The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation. We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back to GT invalidation when the GuC is
disabled.
The invalidation is done by sending a request directly to the GuC
tlb_lookup that invalidates the table. The invalidation is submitted as
a wait request and is performed in the CT event handler. This means we
cannot perform this TLB invalidation path if the CT is not enabled.
If the request isn't fulfilled in two seconds, this would constitute
an error in the invalidation as that would constitute either a lost
request or a severe GuC overload.
With this new invalidation routine, we can perform GuC-based GGTT
invalidations. We should only do this when GuC is enabled and fall
back to the original path when GuC is disabled to prevent concurrent
issuance between GuC and KMD.
Signed-off-by: Prathap Kumar Valsan
Signed-off-by: Bruce Chang
Signed-off-by: Chris Wilson
Signed-off-by: Umesh Nerlige Ramappa
Signed-off-by: Jonathan Cavitt
Signed-off-by: Aravind Iddamsetty
Signed-off-by: Fei Yang
CC: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 43 ++--
drivers/gpu/drm/i915/gt/intel_tlb.c | 14 +-
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 33 +++
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 22 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 +
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 5 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 212 +-
7 files changed, 322 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 4d7d88b92632b..db5644b0146ca 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -206,22 +206,38 @@ static void gen8_ggtt_invalidate(struct
i915_ggtt *ggtt)
intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6,
GFX_FLSH_CNTL_EN);
}
-static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
+static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
{
- struct drm_i915_private *i915 = ggtt->vm.i915;
+ struct intel_uncore *uncore = gt->uncore;
+ intel_wakeref_t wakeref;
- gen8_ggtt_invalidate(ggtt);
+ with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
+ struct intel_guc *guc = >uc.guc;
- if (GRAPHICS_VER(i915) >= 12) {
- struct intel_gt *gt;
+ intel_guc_invalidate_tlb(guc);
+ }
+}
- list_for_each_entry(gt, >gt_list, ggtt_link)
- intel_uncore_write_fw(gt->uncore,
- GEN12_GUC_TLB_INV_CR,
- GEN12_GUC_TLB_INV_CR_INVALIDATE);
- } else {
- intel_uncore_write_fw(ggtt->vm.gt->uncore,
- GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
+{
+ struct drm_i915_private *i915 = ggtt->vm.i915;
+ struct intel_gt *gt;
+
+ if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
+ gen8_ggtt_invalidate(ggtt);
+
+ list_for_each_entry(gt, >gt_list, ggtt_link) {
+ if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(>uc.guc) &&
+ intel_guc_is_ready(>uc.guc)) {
The condition here expands to a relatively heavy one:
+#define INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc) \
+ ((intel_guc_ct_enabled(&(guc)->ct)) && \
+ (intel_guc_submission_is_used(guc)) && \
+ (GRAPHICS_VER(guc_to_gt((guc))->i915) >= 12))
&&
static inline bool intel_guc_is_ready(struct intel_guc *guc)
{
return intel_guc_is_fw_running(guc) &&
intel_guc_ct_enabled(>ct);
}
intel_guc_ct_enabled is even duplicated.
Is there scope to consolidate the parts which are platform invariant,
or even runtime invariant, or at least guaranteed not to transition
back and forth but one way only?
In other words, if we know during init we will want it, mark it as a
flag in intel_guc or somewhere, and then at runtime do only those
conditions which can transition back and forth due driver flows.
I am not saying this is performance sensitive, but in terms of
elegance, readability and self-documentation the proposed version
looks a bit sub-optimal to me.
+ guc_ggtt_ct_invalidate(gt);
+ } else if (GRAPHICS_VER(i915) >= 12) {
+ intel_uncore_write(gt->uncore,
+ GEN12_GUC_TLB_INV_CR,
+ GEN12_GUC_TLB_INV_CR_INVALIDATE);
+ } else {
+ intel_uncore_write(gt->uncore,
+ GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+ }
}
}
@@ -1243,7 +1259,8 @@ static int gen8_gmch_probe(struct i915_ggtt
*ggtt)
ggtt->vm.raw_insert_page = gen8_ggtt_insert_page;
}
- if (intel_uc_wants_guc(>vm.gt->uc))
[Intel-gfx] [PATCH v3 4/4] drm/i915: s/dev_priv/i915/ in the shared_dpll code
From: Ville Syrjälä
Do a s/dev_priv/i915/ pass over the shared_dpll code to
get the variable names into sync with modern standards.
v2: Rebase
Reviewed-by: Jani Nikula #v1
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 872 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 14 +-
2 files changed, 443 insertions(+), 443 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index f197f91e5bf7..0184078087f1 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -107,19 +107,19 @@ struct intel_dpll_mgr {
struct intel_crtc *crtc,
struct intel_encoder *encoder);
void (*update_ref_clks)(struct drm_i915_private *i915);
- void (*dump_hw_state)(struct drm_i915_private *dev_priv,
+ void (*dump_hw_state)(struct drm_i915_private *i915,
const struct intel_dpll_hw_state *hw_state);
};
static void
-intel_atomic_duplicate_dpll_state(struct drm_i915_private *dev_priv,
+intel_atomic_duplicate_dpll_state(struct drm_i915_private *i915,
struct intel_shared_dpll_state *shared_dpll)
{
struct intel_shared_dpll *pll;
int i;
/* Copy shared dpll state */
- for_each_shared_dpll(dev_priv, pll, i)
+ for_each_shared_dpll(i915, pll, i)
shared_dpll[pll->index] = pll->state;
}
@@ -142,20 +142,20 @@ intel_atomic_get_shared_dpll_state(struct
drm_atomic_state *s)
/**
* intel_get_shared_dpll_by_id - get a DPLL given its id
- * @dev_priv: i915 device instance
+ * @i915: i915 device instance
* @id: pll id
*
* Returns:
* A pointer to the DPLL with @id
*/
struct intel_shared_dpll *
-intel_get_shared_dpll_by_id(struct drm_i915_private *dev_priv,
+intel_get_shared_dpll_by_id(struct drm_i915_private *i915,
enum intel_dpll_id id)
{
struct intel_shared_dpll *pll;
int i;
- for_each_shared_dpll(dev_priv, pll, i) {
+ for_each_shared_dpll(i915, pll, i) {
if (pll->info->id == id)
return pll;
}
@@ -165,19 +165,19 @@ intel_get_shared_dpll_by_id(struct drm_i915_private
*dev_priv,
}
/* For ILK+ */
-void assert_shared_dpll(struct drm_i915_private *dev_priv,
+void assert_shared_dpll(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
bool state)
{
bool cur_state;
struct intel_dpll_hw_state hw_state;
- if (drm_WARN(_priv->drm, !pll,
+ if (drm_WARN(>drm, !pll,
"asserting DPLL %s with no DPLL\n", str_on_off(state)))
return;
- cur_state = intel_dpll_get_hw_state(dev_priv, pll, _state);
- I915_STATE_WARN(dev_priv, cur_state != state,
+ cur_state = intel_dpll_get_hw_state(i915, pll, _state);
+ I915_STATE_WARN(i915, cur_state != state,
"%s assertion failure (expected %s, current %s)\n",
pll->info->name, str_on_off(state),
str_on_off(cur_state));
@@ -228,41 +228,41 @@ intel_tc_pll_enable_reg(struct drm_i915_private *i915,
void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int pipe_mask = BIT(crtc->pipe);
unsigned int old_mask;
- if (drm_WARN_ON(_priv->drm, pll == NULL))
+ if (drm_WARN_ON(>drm, pll == NULL))
return;
- mutex_lock(_priv->display.dpll.lock);
+ mutex_lock(>display.dpll.lock);
old_mask = pll->active_mask;
- if (drm_WARN_ON(_priv->drm, !(pll->state.pipe_mask & pipe_mask)) ||
- drm_WARN_ON(_priv->drm, pll->active_mask & pipe_mask))
+ if (drm_WARN_ON(>drm, !(pll->state.pipe_mask & pipe_mask)) ||
+ drm_WARN_ON(>drm, pll->active_mask & pipe_mask))
goto out;
pll->active_mask |= pipe_mask;
- drm_dbg_kms(_priv->drm,
+ drm_dbg_kms(>drm,
"enable %s (active 0x%x, on? %d) for [CRTC:%d:%s]\n",
pll->info->name, pll->active_mask, pll->on,
crtc->base.base.id, crtc->base.name);
if (old_mask) {
- drm_WARN_ON(_priv->drm, !pll->on);
- assert_shared_dpll_enabled(dev_priv, pll);
+ drm_WARN_ON(>drm, !pll->on);
+ assert_shared_dpll_enabled(i915, pll);
goto out;
}
- drm_WARN_ON(_priv->drm, pll->on);
+ drm_WARN_ON(>drm, pll->on);
-
[Intel-gfx] [PATCH v3 3/4] drm/i915: Introduce for_each_shared_dpll()
From: Ville Syrjälä
No one really cares how we store the shared_dplls. Currently
it happens to be an array, but we could change that to a more
flexible scheme at some point. Hide the implementation details
behind an iterator macro.
The slight downside is the pll variable moving out of the
loop scope, but maybe someday soon we'll start to convert
everything over to having declarations within for-statements...
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_display_debugfs.c | 5 +--
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 38 +--
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 4 ++
.../gpu/drm/i915/display/intel_pch_refclk.c | 4 +-
4 files changed, 25 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 670a38aebd0c..f6d7c4d45fae 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -645,6 +645,7 @@ static int i915_display_info(struct seq_file *m, void
*unused)
static int i915_shared_dplls_info(struct seq_file *m, void *unused)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_shared_dpll *pll;
int i;
drm_modeset_lock_all(_priv->drm);
@@ -653,9 +654,7 @@ static int i915_shared_dplls_info(struct seq_file *m, void
*unused)
dev_priv->display.dpll.ref_clks.nssc,
dev_priv->display.dpll.ref_clks.ssc);
- for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
- struct intel_shared_dpll *pll =
_priv->display.dpll.shared_dplls[i];
-
+ for_each_shared_dpll(dev_priv, pll, i) {
seq_printf(m, "DPLL%i: %s, id: %i\n", pll->index,
pll->info->name, pll->info->id);
seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 5b0ad34132c6..f197f91e5bf7 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -115,14 +115,12 @@ static void
intel_atomic_duplicate_dpll_state(struct drm_i915_private *dev_priv,
struct intel_shared_dpll_state *shared_dpll)
{
+ struct intel_shared_dpll *pll;
int i;
/* Copy shared dpll state */
- for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
- struct intel_shared_dpll *pll =
_priv->display.dpll.shared_dplls[i];
-
+ for_each_shared_dpll(dev_priv, pll, i)
shared_dpll[pll->index] = pll->state;
- }
}
static struct intel_shared_dpll_state *
@@ -154,11 +152,10 @@ struct intel_shared_dpll *
intel_get_shared_dpll_by_id(struct drm_i915_private *dev_priv,
enum intel_dpll_id id)
{
+ struct intel_shared_dpll *pll;
int i;
- for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
- struct intel_shared_dpll *pll =
_priv->display.dpll.shared_dplls[i];
-
+ for_each_shared_dpll(dev_priv, pll, i) {
if (pll->info->id == id)
return pll;
}
@@ -317,12 +314,11 @@ void intel_disable_shared_dpll(const struct
intel_crtc_state *crtc_state)
static unsigned long
intel_dpll_mask_all(struct drm_i915_private *i915)
{
+ struct intel_shared_dpll *pll;
unsigned long dpll_mask = 0;
int i;
- for (i = 0; i < i915->display.dpll.num_shared_dpll; i++) {
- struct intel_shared_dpll *pll =
>display.dpll.shared_dplls[i];
-
+ for_each_shared_dpll(i915, pll, i) {
drm_WARN_ON(>drm, dpll_mask & BIT(pll->info->id));
dpll_mask |= BIT(pll->info->id);
@@ -489,16 +485,14 @@ void intel_shared_dpll_swap_state(struct
intel_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_shared_dpll_state *shared_dpll = state->shared_dpll;
+ struct intel_shared_dpll *pll;
int i;
if (!state->dpll_set)
return;
- for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
- struct intel_shared_dpll *pll =
_priv->display.dpll.shared_dplls[i];
-
+ for_each_shared_dpll(dev_priv, pll, i)
swap(pll->state, shared_dpll[pll->index]);
- }
}
static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv,
@@ -4401,10 +4395,11 @@ void intel_dpll_update_ref_clks(struct drm_i915_private
*i915)
void intel_dpll_readout_hw_state(struct drm_i915_private *i915)
{
+ struct intel_shared_dpll *pll;
int i;
- for (i = 0; i < i915->display.dpll.num_shared_dpll; i++)
- readout_dpll_hw_state(i915,
>display.dpll.shared_dplls[i]);
+
[Intel-gfx] [PATCH v3 0/4] drm/i915: Start cleaning up the DPLL ID mess
From: Ville Syrjälä Start to clean up the mess around DPLL IDs a bit by removing the nasty assumption that the index of the DPLL in the arrays matches its ID. Fortunately we did have a WARN i nthere to cathc mistakes, but better to not has such silly assumptions i nthe first place. There's still a lot of mess left since the DPLL IDs in the hardware are a mess as well. Eg. the index of the register instance often differs from the index used to select the DPLL in clock routing thing. So we could probably clean up more of that, perhaps by declaring separate IDs for each PLL for each use case... v2: - the trivial patches were already merged - introduce pll->index - add another patch for for_each_shared_dpll() - add another patch s/dev_priv/i915/ v3: - deal with pll->index in debugfs code - rebase due to other changes Ville Syrjälä (4): drm/i915: Stop requiring PLL index == PLL ID drm/i915: Decouple I915_NUM_PLLS from PLL IDs drm/i915: Introduce for_each_shared_dpll() drm/i915: s/dev_priv/i915/ in the shared_dpll code .../drm/i915/display/intel_display_debugfs.c | 9 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 965 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 26 +- .../gpu/drm/i915/display/intel_pch_refclk.c | 7 +- 4 files changed, 522 insertions(+), 485 deletions(-) -- 2.41.0
[Intel-gfx] [PATCH v3 2/4] drm/i915: Decouple I915_NUM_PLLS from PLL IDs
From: Ville Syrjälä
Stop assuming the size of PLL ID based bitmask is restricted
to I915_NUM_PLLS bits. This is the last thing coupling the
two things together and thus artificially limiting PLL IDs.
We could just pass any arbitrary (large enough) size to
for_each_set_bit() and be done with it, but the WARN
requiring the caller to not pass in a bogus bitmask seems
potentially useful to keep around. So let's just calculate
the full bitmask on the spot.
And while at it let's assert that the PLL IDs will fit
into the bitmask we use for them.
TODO: could also get rid of I915_NUM_PLLS entirely and just
dynamically allocate i915->shared_dplls[] and state->shared_dpll[].
But that would involve error handling in the modeset init path. Uff.
v2: Warn about conflicting PLL IDs (Jani)
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 26 +--
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 614fdc21bde0..5b0ad34132c6 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -314,6 +314,23 @@ void intel_disable_shared_dpll(const struct
intel_crtc_state *crtc_state)
mutex_unlock(_priv->display.dpll.lock);
}
+static unsigned long
+intel_dpll_mask_all(struct drm_i915_private *i915)
+{
+ unsigned long dpll_mask = 0;
+ int i;
+
+ for (i = 0; i < i915->display.dpll.num_shared_dpll; i++) {
+ struct intel_shared_dpll *pll =
>display.dpll.shared_dplls[i];
+
+ drm_WARN_ON(>drm, dpll_mask & BIT(pll->info->id));
+
+ dpll_mask |= BIT(pll->info->id);
+ }
+
+ return dpll_mask;
+}
+
static struct intel_shared_dpll *
intel_find_shared_dpll(struct intel_atomic_state *state,
const struct intel_crtc *crtc,
@@ -321,15 +338,16 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
unsigned long dpll_mask)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ unsigned long dpll_mask_all = intel_dpll_mask_all(dev_priv);
struct intel_shared_dpll_state *shared_dpll;
struct intel_shared_dpll *unused_pll = NULL;
enum intel_dpll_id id;
shared_dpll = intel_atomic_get_shared_dpll_state(>base);
- drm_WARN_ON(_priv->drm, dpll_mask & ~(BIT(I915_NUM_PLLS) - 1));
+ drm_WARN_ON(_priv->drm, dpll_mask & ~dpll_mask_all);
- for_each_set_bit(id, _mask, I915_NUM_PLLS) {
+ for_each_set_bit(id, _mask, fls(dpll_mask_all)) {
struct intel_shared_dpll *pll;
pll = intel_get_shared_dpll_by_id(dev_priv, id);
@@ -4189,6 +4207,10 @@ void intel_shared_dpll_init(struct drm_i915_private
*dev_priv)
i >=
ARRAY_SIZE(dev_priv->display.dpll.shared_dplls)))
break;
+ /* must fit into unsigned long bitmask on 32bit */
+ if (drm_WARN_ON(_priv->drm, dpll_info[i].id >= 32))
+ break;
+
dev_priv->display.dpll.shared_dplls[i].info = _info[i];
dev_priv->display.dpll.shared_dplls[i].index = i;
}
--
2.41.0
[Intel-gfx] [PATCH v3 1/4] drm/i915: Stop requiring PLL index == PLL ID
From: Ville Syrjälä
There's no good reason to keep around this PLL index == PLL ID
footgun. Get rid of it.
Both i915->shared_dplls[] and state->shared_dpll[] are indexed
by the same thing now, which is just the index we get at
initialization from dpll_mgr->dpll_info[]. The rest is all about
PLL IDs now.
v2: Add pll->index to mimic drm_crtc & co.
Remove the comment saying ID should match the index
v3: s/i/pll->index/ in debugfs loop (Jani)
Reviewed-by: Jani Nikula #v2
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_display_debugfs.c | 4 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 63 +++
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 8 ++-
.../gpu/drm/i915/display/intel_pch_refclk.c | 5 +-
4 files changed, 48 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index f05b52381a83..670a38aebd0c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -656,8 +656,8 @@ static int i915_shared_dplls_info(struct seq_file *m, void
*unused)
for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
struct intel_shared_dpll *pll =
_priv->display.dpll.shared_dplls[i];
- seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->info->name,
- pll->info->id);
+ seq_printf(m, "DPLL%i: %s, id: %i\n", pll->index,
+ pll->info->name, pll->info->id);
seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
pll->state.pipe_mask, pll->active_mask,
str_yes_no(pll->on));
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 6d68b36292d3..614fdc21bde0 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -115,13 +115,13 @@ static void
intel_atomic_duplicate_dpll_state(struct drm_i915_private *dev_priv,
struct intel_shared_dpll_state *shared_dpll)
{
- enum intel_dpll_id i;
+ int i;
/* Copy shared dpll state */
for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
struct intel_shared_dpll *pll =
_priv->display.dpll.shared_dplls[i];
- shared_dpll[i] = pll->state;
+ shared_dpll[pll->index] = pll->state;
}
}
@@ -154,7 +154,17 @@ struct intel_shared_dpll *
intel_get_shared_dpll_by_id(struct drm_i915_private *dev_priv,
enum intel_dpll_id id)
{
- return _priv->display.dpll.shared_dplls[id];
+ int i;
+
+ for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
+ struct intel_shared_dpll *pll =
_priv->display.dpll.shared_dplls[i];
+
+ if (pll->info->id == id)
+ return pll;
+ }
+
+ MISSING_CASE(id);
+ return NULL;
}
/* For ILK+ */
@@ -311,32 +321,36 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
unsigned long dpll_mask)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct intel_shared_dpll *pll, *unused_pll = NULL;
struct intel_shared_dpll_state *shared_dpll;
- enum intel_dpll_id i;
+ struct intel_shared_dpll *unused_pll = NULL;
+ enum intel_dpll_id id;
shared_dpll = intel_atomic_get_shared_dpll_state(>base);
drm_WARN_ON(_priv->drm, dpll_mask & ~(BIT(I915_NUM_PLLS) - 1));
- for_each_set_bit(i, _mask, I915_NUM_PLLS) {
- pll = _priv->display.dpll.shared_dplls[i];
+ for_each_set_bit(id, _mask, I915_NUM_PLLS) {
+ struct intel_shared_dpll *pll;
+
+ pll = intel_get_shared_dpll_by_id(dev_priv, id);
+ if (!pll)
+ continue;
/* Only want to check enabled timings first */
- if (shared_dpll[i].pipe_mask == 0) {
+ if (shared_dpll[pll->index].pipe_mask == 0) {
if (!unused_pll)
unused_pll = pll;
continue;
}
if (memcmp(pll_state,
- _dpll[i].hw_state,
+ _dpll[pll->index].hw_state,
sizeof(*pll_state)) == 0) {
drm_dbg_kms(_priv->drm,
"[CRTC:%d:%s] sharing existing %s (pipe
mask 0x%x, active 0x%x)\n",
crtc->base.base.id, crtc->base.name,
pll->info->name,
- shared_dpll[i].pipe_mask,
+ shared_dpll[pll->index].pipe_mask,
Re: [Intel-gfx] [PATCH 0/4] drm/i915: move display info related stuff under display/
On Tue, Oct 03, 2023 at 03:42:06PM +0300, Jani Nikula wrote: > Continue separation of display code from the rest. > > Jani Nikula (4): > drm/i915: convert INTEL_DISPLAY_ENABLED() into a function > drm/i915: move display info related macros to display > drm/i915: separate display runtime info init > drm/i915: separate subplatform init and runtime feature init Didn't spot anything wrong. I was a bit suspicious about deferring the port_mask mangling, but doesn't look like we need it that early anywhere. Series is Reviewed-by: Ville Syrjälä > > drivers/gpu/drm/i915/display/intel_crt.c | 2 +- > .../drm/i915/display/intel_display_device.c | 43 ++- > .../drm/i915/display/intel_display_device.h | 10 + > drivers/gpu/drm/i915/display/intel_dp.c | 2 +- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- > drivers/gpu/drm/i915/display/intel_dvo.c | 2 +- > drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +- > drivers/gpu/drm/i915/display/intel_hotplug.c | 2 +- > drivers/gpu/drm/i915/display/intel_panel.c| 2 +- > drivers/gpu/drm/i915/display/intel_sdvo.c | 2 +- > drivers/gpu/drm/i915/display/intel_tv.c | 2 +- > drivers/gpu/drm/i915/i915_driver.c| 1 + > drivers/gpu/drm/i915/i915_drv.h | 14 -- > drivers/gpu/drm/i915/intel_device_info.c | 22 -- > 14 files changed, 62 insertions(+), 46 deletions(-) > > -- > 2.39.2 -- Ville Syrjälä Intel
[Intel-gfx] [PATCH v2 6/6] drm/i915/fbc: Remove pointless "stride is multiple of 64 bytes" check
From: Ville Syrjälä
Plane stride is always a multiple of 64 bytes. Remove the
pointless check that really doesn't have anything to do
with FBC.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 37f96a4d50f2..4820d21cc942 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -897,13 +897,6 @@ static bool icl_fbc_stride_is_valid(const struct
intel_plane_state *plane_state)
static bool stride_is_valid(const struct intel_plane_state *plane_state)
{
struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
- const struct drm_framebuffer *fb = plane_state->hw.fb;
- unsigned int stride = intel_fbc_plane_stride(plane_state) *
- fb->format->cpp[0];
-
- /* This should have been caught earlier. */
- if (drm_WARN_ON_ONCE(>drm, (stride & (64 - 1)) != 0))
- return false;
if (DISPLAY_VER(i915) >= 11)
return icl_fbc_stride_is_valid(plane_state);
--
2.41.0
[Intel-gfx] [PATCH v2 2/6] drm/i915/fbc: Split plane stride checks per-platform
From: Ville Syrjälä
Carve up stride_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.
TODO: maybe go for vfuncs later
Reviewed-by: Juha-Pekka Heikkila
Reviewed-by: Vinod Govindapillai
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 64 ++--
1 file changed, 49 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index f12ea170b748..dc334b9d993f 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -853,36 +853,70 @@ void intel_fbc_cleanup(struct drm_i915_private *i915)
}
}
-static bool stride_is_valid(const struct intel_plane_state *plane_state)
+static bool i8xx_fbc_stride_is_valid(const struct intel_plane_state
*plane_state)
{
- struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int stride = intel_fbc_plane_stride(plane_state) *
fb->format->cpp[0];
- /* This should have been caught earlier. */
- if (drm_WARN_ON_ONCE(>drm, (stride & (64 - 1)) != 0))
- return false;
+ return stride == 4096 || stride == 8192;
+}
- /* Below are the additional FBC restrictions. */
- if (stride < 512)
- return false;
+static bool i965_fbc_stride_is_valid(const struct intel_plane_state
*plane_state)
+{
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+ unsigned int stride = intel_fbc_plane_stride(plane_state) *
+ fb->format->cpp[0];
- if (DISPLAY_VER(i915) == 2 || DISPLAY_VER(i915) == 3)
- return stride == 4096 || stride == 8192;
+ return stride >= 2048 && stride <= 16384;
+}
- if (DISPLAY_VER(i915) == 4 && !IS_G4X(i915) &&
- (stride < 2048 || stride > 16384))
- return false;
+static bool g4x_fbc_stride_is_valid(const struct intel_plane_state
*plane_state)
+{
+ return true;
+}
+
+static bool skl_fbc_stride_is_valid(const struct intel_plane_state
*plane_state)
+{
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+ unsigned int stride = intel_fbc_plane_stride(plane_state) *
+ fb->format->cpp[0];
/* Display WA #1105: skl,bxt,kbl,cfl,glk */
- if ((DISPLAY_VER(i915) == 9 || IS_GEMINILAKE(i915)) &&
- fb->modifier == DRM_FORMAT_MOD_LINEAR && stride & 511)
+ if (fb->modifier == DRM_FORMAT_MOD_LINEAR && stride & 511)
return false;
return true;
}
+static bool icl_fbc_stride_is_valid(const struct intel_plane_state
*plane_state)
+{
+ return true;
+}
+
+static bool stride_is_valid(const struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+ unsigned int stride = intel_fbc_plane_stride(plane_state) *
+ fb->format->cpp[0];
+
+ /* This should have been caught earlier. */
+ if (drm_WARN_ON_ONCE(>drm, (stride & (64 - 1)) != 0))
+ return false;
+
+ if (DISPLAY_VER(i915) >= 11)
+ return icl_fbc_stride_is_valid(plane_state);
+ else if (DISPLAY_VER(i915) >= 9)
+ return skl_fbc_stride_is_valid(plane_state);
+ else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
+ return g4x_fbc_stride_is_valid(plane_state);
+ else if (DISPLAY_VER(i915) == 4)
+ return i965_fbc_stride_is_valid(plane_state);
+ else
+ return i8xx_fbc_stride_is_valid(plane_state);
+}
+
static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
{
struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
--
2.41.0
[Intel-gfx] [PATCH v2 3/6] drm/i915/fbc: Split plane tiling checks per-platform
From: Ville Syrjälä
Carve up tiling_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.
TODO: maybe go for vfuncs later
Reviewed-by: Juha-Pekka Heikkila
Reviewed-by: Vinod Govindapillai
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index dc334b9d993f..ce6eefaba501 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -994,16 +994,21 @@ static bool intel_fbc_hw_tracking_covers_screen(const
struct intel_plane_state *
return effective_w <= max_w && effective_h <= max_h;
}
-static bool tiling_is_valid(const struct intel_plane_state *plane_state)
+static bool i8xx_fbc_tiling_valid(const struct intel_plane_state *plane_state)
+{
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+
+ return fb->modifier == I915_FORMAT_MOD_X_TILED;
+}
+
+static bool skl_fbc_tiling_valid(const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
switch (fb->modifier) {
case DRM_FORMAT_MOD_LINEAR:
case I915_FORMAT_MOD_Y_TILED:
case I915_FORMAT_MOD_Yf_TILED:
- return DISPLAY_VER(i915) >= 9;
case I915_FORMAT_MOD_4_TILED:
case I915_FORMAT_MOD_X_TILED:
return true;
@@ -1012,6 +1017,16 @@ static bool tiling_is_valid(const struct
intel_plane_state *plane_state)
}
}
+static bool tiling_is_valid(const struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+
+ if (DISPLAY_VER(i915) >= 9)
+ return skl_fbc_tiling_valid(plane_state);
+ else
+ return i8xx_fbc_tiling_valid(plane_state);
+}
+
static void intel_fbc_update_state(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_plane *plane)
--
2.41.0
[Intel-gfx] [PATCH v2 5/6] drm/i915/fbc: Split plane pixel format checks per-platform
From: Ville Syrjälä
Carve up pixel_format_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.
Note that the XRGB1555 can be dropped from the g4x+ variant
since the plane no longer supports that format anyway.
TODO: maybe go for vfuncs later
v2: Update for lnl changes
Reviewed-by: Juha-Pekka Heikkila #v1
Reviewed-by: Vinod Govindapillai #v1
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 47 ++--
1 file changed, 43 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 8999ef3f0972..37f96a4d50f2 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -917,7 +917,7 @@ static bool stride_is_valid(const struct intel_plane_state
*plane_state)
return i8xx_fbc_stride_is_valid(plane_state);
}
-static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
+static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state
*plane_state)
{
struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
@@ -931,20 +931,59 @@ static bool pixel_format_is_valid(const struct
intel_plane_state *plane_state)
/* 16bpp not supported on gen2 */
if (DISPLAY_VER(i915) == 2)
return false;
+ return true;
+ default:
+ return false;
+ }
+}
+
+static bool g4x_fbc_pixel_format_is_valid(const struct intel_plane_state
*plane_state)
+{
+ struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+
+ switch (fb->format->format) {
+ case DRM_FORMAT_XRGB:
+ case DRM_FORMAT_XBGR:
+ return true;
+ case DRM_FORMAT_RGB565:
/* WaFbcOnly1to1Ratio:ctg */
if (IS_G4X(i915))
return false;
return true;
+ default:
+ return false;
+ }
+}
+
+static bool lnl_fbc_pixel_format_is_valid(const struct intel_plane_state
*plane_state)
+{
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+
+ switch (fb->format->format) {
+ case DRM_FORMAT_XRGB:
+ case DRM_FORMAT_XBGR:
case DRM_FORMAT_ARGB:
case DRM_FORMAT_ABGR:
- if (DISPLAY_VER(i915) >= 20)
- return true;
- fallthrough;
+ case DRM_FORMAT_RGB565:
+ return true;
default:
return false;
}
}
+static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+
+ if (DISPLAY_VER(i915) >= 20)
+ return lnl_fbc_pixel_format_is_valid(plane_state);
+ else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
+ return g4x_fbc_pixel_format_is_valid(plane_state);
+ else
+ return i8xx_fbc_pixel_format_is_valid(plane_state);
+}
+
static bool i8xx_fbc_rotation_is_valid(const struct intel_plane_state
*plane_state)
{
return plane_state->hw.rotation == DRM_MODE_ROTATE_0;
--
2.41.0
[Intel-gfx] [PATCH v2 4/6] drm/i915/fbc: Split plane rotation checks per-platform
From: Ville Syrjälä
Carve up rotation_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.
TODO: maybe go for vfuncs later
Reviewed-by: Juha-Pekka Heikkila
Reviewed-by: Vinod Govindapillai
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 30 +++-
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index ce6eefaba501..8999ef3f0972 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -945,22 +945,40 @@ static bool pixel_format_is_valid(const struct
intel_plane_state *plane_state)
}
}
-static bool rotation_is_valid(const struct intel_plane_state *plane_state)
+static bool i8xx_fbc_rotation_is_valid(const struct intel_plane_state
*plane_state)
+{
+ return plane_state->hw.rotation == DRM_MODE_ROTATE_0;
+}
+
+static bool g4x_fbc_rotation_is_valid(const struct intel_plane_state
*plane_state)
+{
+ return true;
+}
+
+static bool skl_fbc_rotation_is_valid(const struct intel_plane_state
*plane_state)
{
- struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
- if (DISPLAY_VER(i915) >= 9 && fb->format->format == DRM_FORMAT_RGB565 &&
+ if (fb->format->format == DRM_FORMAT_RGB565 &&
drm_rotation_90_or_270(rotation))
return false;
- else if (DISPLAY_VER(i915) <= 4 && !IS_G4X(i915) &&
-rotation != DRM_MODE_ROTATE_0)
- return false;
return true;
}
+static bool rotation_is_valid(const struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+
+ if (DISPLAY_VER(i915) >= 9)
+ return skl_fbc_rotation_is_valid(plane_state);
+ else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
+ return g4x_fbc_rotation_is_valid(plane_state);
+ else
+ return i8xx_fbc_rotation_is_valid(plane_state);
+}
+
/*
* For some reason, the hardware tracking starts looking at whatever we
* programmed as the display plane base address register. It does not look at
--
2.41.0
[Intel-gfx] [PATCH v2 1/6] drm/i915/fbc: Remove ancient 16k plane stride limit
From: Ville Syrjälä The 16k max plane stride limit seems to be originally from i965gm, and no explicit limit has been specified since (g4x+). So let's assume the max plane stride itself is a suitable limit also for the more recent FBC hardware. In fact even for i965gm the max X-tiled stride is also 16k so technically we don't need the check there either, but let's keep it there anyway since it's explicitly mentioned in the spec. Gen2/3 have more strict limits checked separately. Reviewed-by: Swati Sharma Reviewed-by: Juha-Pekka Heikkila Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 5f13c6776c7d..f12ea170b748 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -871,7 +871,8 @@ static bool stride_is_valid(const struct intel_plane_state *plane_state) if (DISPLAY_VER(i915) == 2 || DISPLAY_VER(i915) == 3) return stride == 4096 || stride == 8192; - if (DISPLAY_VER(i915) == 4 && !IS_G4X(i915) && stride < 2048) + if (DISPLAY_VER(i915) == 4 && !IS_G4X(i915) && + (stride < 2048 || stride > 16384)) return false; /* Display WA #1105: skl,bxt,kbl,cfl,glk */ @@ -879,9 +880,6 @@ static bool stride_is_valid(const struct intel_plane_state *plane_state) fb->modifier == DRM_FORMAT_MOD_LINEAR && stride & 511) return false; - if (stride > 16384) - return false; - return true; } -- 2.41.0
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: move display info related stuff under display/
== Series Details == Series: drm/i915: move display info related stuff under display/ URL : https://patchwork.freedesktop.org/series/124558/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13705_full -> Patchwork_124558v1_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124558v1_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124558v1_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124558v1_full: ### IGT changes ### Possible regressions * igt@core_setmaster@master-drop-set-user: - shard-dg2: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-11/igt@core_setmas...@master-drop-set-user.html * igt@i915_pm_rpm@gem-idle: - shard-dg2: NOTRUN -> [SKIP][2] +1 other test skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-11/igt@i915_pm_...@gem-idle.html Known issues Here are the changes found in Patchwork_124558v1_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@blit-reloc-keep-cache: - shard-dg1: NOTRUN -> [SKIP][3] ([i915#8411]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg1-19/igt@api_intel...@blit-reloc-keep-cache.html * igt@api_intel_bb@render-ccs: - shard-dg2: NOTRUN -> [FAIL][4] ([i915#6122]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-7/igt@api_intel...@render-ccs.html * igt@device_reset@cold-reset-bound: - shard-dg2: NOTRUN -> [SKIP][5] ([i915#7701]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-7/igt@device_re...@cold-reset-bound.html * igt@drm_fdinfo@busy-hang@bcs0: - shard-dg2: NOTRUN -> [SKIP][6] ([i915#8414]) +10 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-11/igt@drm_fdinfo@busy-h...@bcs0.html * igt@gem_busy@semaphore: - shard-dg2: NOTRUN -> [SKIP][7] ([i915#3936]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-7/igt@gem_b...@semaphore.html * igt@gem_ctx_persistence@heartbeat-close: - shard-dg1: NOTRUN -> [SKIP][8] ([i915#8555]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg1-19/igt@gem_ctx_persiste...@heartbeat-close.html * igt@gem_ctx_persistence@heartbeat-hostile: - shard-dg2: NOTRUN -> [SKIP][9] ([i915#8555]) +2 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-3/igt@gem_ctx_persiste...@heartbeat-hostile.html * igt@gem_ctx_sseu@invalid-sseu: - shard-dg2: NOTRUN -> [SKIP][10] ([i915#280]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-3/igt@gem_ctx_s...@invalid-sseu.html * igt@gem_eio@reset-stress: - shard-dg1: [PASS][11] -> [FAIL][12] ([i915#5784]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/shard-dg1-12/igt@gem_...@reset-stress.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg1-15/igt@gem_...@reset-stress.html * igt@gem_exec_balancer@bonded-dual: - shard-dg2: NOTRUN -> [SKIP][13] ([i915#4771]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-11/igt@gem_exec_balan...@bonded-dual.html * igt@gem_exec_balancer@bonded-true-hang: - shard-dg2: NOTRUN -> [SKIP][14] ([i915#4812]) +1 other test skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-3/igt@gem_exec_balan...@bonded-true-hang.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-rkl: [PASS][15] -> [FAIL][16] ([i915#2842]) +1 other test fail [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/shard-rkl-4/igt@gem_exec_fair@basic-p...@rcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-rkl-6/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_exec_flush@basic-uc-pro-default: - shard-dg2: NOTRUN -> [SKIP][17] ([i915#3539] / [i915#4852]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/shard-dg2-7/igt@gem_exec_fl...@basic-uc-pro-default.html * igt@gem_exec_flush@basic-uc-set-default: - shard-dg2: NOTRUN -> [SKIP][18] ([i915#3539]) +1 other test skip [18]:
Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume
On 10/3/2023 08:59, Andi Shyti wrote:
Hi Jani,
Consider multi-gt support when cancelling all tlb invalidations on
suspend, and when submitting tlb invalidations on resume.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Fei Yang
Signed-off-by: Jonathan Cavitt
CC: John Harrison
I guess I'm wondering why the top level suspend hook needs to iterate
gts instead of some lower level thing. We should aim to reduce
gem/gt/display details from the top level.
I'm not sure I am understanding the question.
The TLB invalidation details are kept under the GT. But when
suspend is called, then the GT invalidation has to be triggered
by the top levels for each GT. Right?
I think Jani's point is that the top level should be:
i915_drm_suspend(...) {
...
intel_tlb_suspend(dev_priv);
}
Then the TLB suspend helper function calls into the GT / UC layers as
appropriate. But none of that internal only detail is exposed at the top
level.
John.
Thanks,
Andi
Re: [Intel-gfx] [PATCH] drm/i915: Invalidate the TLBs on each GT
Hi Jonathan and Chris,
On Mon, Oct 02, 2023 at 07:07:42AM -0700, Jonathan Cavitt wrote:
> From: Chris Wilson
>
> With multi-GT devices, the object may have been bound on each GT and so
> we need to invalidate the TLBs across all GT before releasing the pages
> back to the system.
>
> Fixes: d6c531ab4820 ("drm/i915: Invalidate the TLBs on each GT")
> Signed-off-by: Chris Wilson
> Signed-off-by: Jonathan Cavitt
> CC: Matt Roper
> CC: Andi Shyti
> Reviewed-by: Andi Shyti
pushed to drm-intel-gt-next.
Thank you,
Andi
Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines
Hi,
[...]
> > +static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
> > +{
> > + struct drm_i915_private *i915 = ggtt->vm.i915;
> > + struct intel_gt *gt;
> > +
> > + if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
> > + gen8_ggtt_invalidate(ggtt);
> > +
> > + list_for_each_entry(gt, >gt_list, ggtt_link) {
> > + if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(>uc.guc) &&
> > + intel_guc_is_ready(>uc.guc)) {
>
> The condition here expands to a relatively heavy one:
>
> +#define INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc) \
> + ((intel_guc_ct_enabled(&(guc)->ct)) && \
> + (intel_guc_submission_is_used(guc)) && \
> + (GRAPHICS_VER(guc_to_gt((guc))->i915) >= 12))
>
>
> &&
>
> static inline bool intel_guc_is_ready(struct intel_guc *guc)
> {
> return intel_guc_is_fw_running(guc) && intel_guc_ct_enabled(>ct);
> }
>
> intel_guc_ct_enabled is even duplicated.
Maybe this is a smaller set?
if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(>uc.guc) &&
intel_guc_is_fw_running(>uc.guc))
The last condition includes intel_guc_submission_is_used() from
the macro.
> Is there scope to consolidate the parts which are platform invariant, or even
> runtime invariant, or at least guaranteed not to transition back and forth
> but one way only?
>
> In other words, if we know during init we will want it, mark it as a flag in
> intel_guc or somewhere, and then at runtime do only those conditions which
> can transition back and forth due driver flows.
>
> I am not saying this is performance sensitive, but in terms of elegance,
> readability and self-documentation the proposed version looks a bit
> sub-optimal to me.
Are you suggesting some PCI flag? This is actually applying only
for MTL.
> > + guc_ggtt_ct_invalidate(gt);
> > + } else if (GRAPHICS_VER(i915) >= 12) {
> > + intel_uncore_write(gt->uncore,
> > + GEN12_GUC_TLB_INV_CR,
> > + GEN12_GUC_TLB_INV_CR_INVALIDATE);
> > + } else {
> > + intel_uncore_write(gt->uncore,
> > + GEN8_GTCR, GEN8_GTCR_INVALIDATE);
> > + }
[...]
> > - mmio_invalidate_full(gt);
> > + if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc)) {
> > + if (intel_guc_is_ready(guc))
> > + intel_guc_invalidate_tlb_full(guc);
> > + } else {
> > + /*
> > +* Fall back to old path if GuC is disabled.
> > +* This is safe because GuC is not enabled and not
> > writing to MMIO.
> > +*/
>
> It is safe for intel_guc_is_ready() transitioning from false to true during
> GuC init? No way for some path to start issuing invalidations as that is
> happening?
>
> > + mmio_invalidate_full(gt);
> > + }
supernitpick: as we are at this, brackets are not required.
Andi
Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume
Hi Jani, > > Consider multi-gt support when cancelling all tlb invalidations on > > suspend, and when submitting tlb invalidations on resume. > > > > Suggested-by: Tvrtko Ursulin > > Signed-off-by: Fei Yang > > Signed-off-by: Jonathan Cavitt > > CC: John Harrison > > I guess I'm wondering why the top level suspend hook needs to iterate > gts instead of some lower level thing. We should aim to reduce > gem/gt/display details from the top level. I'm not sure I am understanding the question. The TLB invalidation details are kept under the GT. But when suspend is called, then the GT invalidation has to be triggered by the top levels for each GT. Right? Thanks, Andi
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Invalidate the TLBs on each GT (rev2)
== Series Details == Series: drm/i915: Invalidate the TLBs on each GT (rev2) URL : https://patchwork.freedesktop.org/series/124528/ State : success == Summary == CI Bug Log - changes from CI_DRM_13704_full -> Patchwork_124528v2_full Summary --- **SUCCESS** No regressions found. Participating hosts (10 -> 9) -- Missing(1): shard-tglu0 Known issues Here are the changes found in Patchwork_124528v2_full that come from known issues: ### IGT changes ### Issues hit * igt@drm_fdinfo@virtual-busy-hang: - shard-dg2: NOTRUN -> [SKIP][1] ([i915#8414]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-dg2-11/igt@drm_fdi...@virtual-busy-hang.html * igt@gem_ctx_isolation@preservation-s3@vecs0: - shard-dg1: [PASS][2] -> [DMESG-WARN][3] ([i915#4423]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/shard-dg1-12/igt@gem_ctx_isolation@preservation...@vecs0.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-dg1-18/igt@gem_ctx_isolation@preservation...@vecs0.html * igt@gem_ctx_persistence@legacy-engines-hostile@blt: - shard-mtlp: [PASS][4] -> [ABORT][5] ([i915#9414]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/shard-mtlp-7/igt@gem_ctx_persistence@legacy-engines-host...@blt.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-mtlp-4/igt@gem_ctx_persistence@legacy-engines-host...@blt.html * igt@gem_exec_balancer@invalid-bonds: - shard-dg2: NOTRUN -> [SKIP][6] ([i915#4036]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-dg2-3/igt@gem_exec_balan...@invalid-bonds.html - shard-mtlp: NOTRUN -> [SKIP][7] ([i915#4036]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-mtlp-3/igt@gem_exec_balan...@invalid-bonds.html * igt@gem_exec_capture@pi@vcs1: - shard-mtlp: [PASS][8] -> [FAIL][9] ([i915#4475] / [i915#7765]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/shard-mtlp-5/igt@gem_exec_capture@p...@vcs1.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-mtlp-2/igt@gem_exec_capture@p...@vcs1.html * igt@gem_exec_capture@pi@vecs0: - shard-mtlp: [PASS][10] -> [DMESG-WARN][11] ([i915#5591]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/shard-mtlp-5/igt@gem_exec_capture@p...@vecs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-mtlp-2/igt@gem_exec_capture@p...@vecs0.html * igt@gem_exec_fair@basic-none-rrul: - shard-dg2: NOTRUN -> [SKIP][12] ([i915#3539] / [i915#4852]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-dg2-11/igt@gem_exec_f...@basic-none-rrul.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-rkl: [PASS][13] -> [FAIL][14] ([i915#2842]) +1 other test fail [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/shard-rkl-2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-rkl-2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html - shard-tglu: [PASS][15] -> [FAIL][16] ([i915#2842]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/shard-tglu-10/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-tglu-9/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fence@parallel@vcs0: - shard-mtlp: [PASS][17] -> [DMESG-FAIL][18] ([i915#8962]) +2 other tests dmesg-fail [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/shard-mtlp-5/igt@gem_exec_fence@paral...@vcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-mtlp-4/igt@gem_exec_fence@paral...@vcs0.html * igt@gem_exec_fence@parallel@vecs0: - shard-mtlp: [PASS][19] -> [FAIL][20] ([i915#8957]) +2 other tests fail [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/shard-mtlp-5/igt@gem_exec_fence@paral...@vecs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-mtlp-4/igt@gem_exec_fence@paral...@vecs0.html * igt@gem_exec_gttfill@multigpu-basic: - shard-tglu: NOTRUN -> [SKIP][21] ([i915#7697]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-tglu-9/igt@gem_exec_gttf...@multigpu-basic.html * igt@gem_exec_reloc@basic-active: - shard-mtlp: NOTRUN -> [SKIP][22] ([i915#3281]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/shard-mtlp-3/igt@gem_exec_re...@basic-active.html * igt@gem_exec_reloc@basic-gtt-wc-active: - shard-dg2: NOTRUN -> [SKIP][23] ([i915#3281]) +5 other tests skip [23]:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move display info related stuff under display/
== Series Details ==
Series: drm/i915: move display info related stuff under display/
URL : https://patchwork.freedesktop.org/series/124558/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13705 -> Patchwork_124558v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/index.html
Participating hosts (39 -> 39)
--
Additional (2): fi-kbl-soraka fi-pnv-d510
Missing(2): bat-adlp-11 fi-snb-2520m
Known issues
Here are the changes found in Patchwork_124558v1 that come from known issues:
### CI changes ###
Issues hit
* boot:
- fi-bsw-n3050: [PASS][1] -> [FAIL][2] ([i915#8293])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/fi-bsw-n3050/boot.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/fi-bsw-n3050/boot.html
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s0@smem:
- bat-jsl-3: [PASS][3] -> [INCOMPLETE][4] ([i915#9275])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3
other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#7913])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- fi-ivb-3770:[PASS][8] -> [ABORT][9] ([i915#7913])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/fi-ivb-3770/igt@i915_selftest@l...@hangcheck.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/fi-ivb-3770/igt@i915_selftest@l...@hangcheck.html
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [PASS][10] -> [ABORT][11] ([i915#9414])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/bat-mtlp-8/igt@i915_selftest@l...@requests.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-jsl-3: [PASS][12] -> [FAIL][13] ([fdo#103375])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271]) +9 other tests
skip
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/fi-kbl-soraka/igt@kms_...@dsc-basic.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][15] ([i915#3546]) +2 other tests skip
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
- bat-dg2-11: NOTRUN -> [SKIP][16] ([i915#1845]) +3 other tests skip
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_psr@primary_page_flip:
- fi-pnv-d510:NOTRUN -> [SKIP][17] ([fdo#109271]) +31 other tests
skip
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/fi-pnv-d510/igt@kms_psr@primary_page_flip.html
Possible fixes
* igt@kms_frontbuffer_tracking@basic:
- fi-bsw-nick:[FAIL][18] ([i915#9276]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/fi-bsw-nick/igt@kms_frontbuffer_track...@basic.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/fi-bsw-nick/igt@kms_frontbuffer_track...@basic.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][20] ([i915#8668]) -> [PASS][21]
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13705/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124558v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: move display info related stuff under display/
== Series Details == Series: drm/i915: move display info related stuff under display/ URL : https://patchwork.freedesktop.org/series/124558/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: move display info related stuff under display/
== Series Details == Series: drm/i915: move display info related stuff under display/ URL : https://patchwork.freedesktop.org/series/124558/ State : warning == Summary == Error: dim checkpatch failed 770f44b90d80 drm/i915: convert INTEL_DISPLAY_ENABLED() into a function 63056bd22445 drm/i915: move display info related macros to display -:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects? #22: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:105: +#define DISPLAY_VER_FULL(i915) IP_VER(DISPLAY_RUNTIME_INFO(i915)->ip.ver, \ + DISPLAY_RUNTIME_INFO(i915)->ip.rel) -:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects? #24: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:107: +#define IS_DISPLAY_VER(i915, from, until) \ + (DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until)) total: 0 errors, 0 warnings, 2 checks, 35 lines checked 4b016928808f drm/i915: separate display runtime info init 8cfb13836707 drm/i915: separate subplatform init and runtime feature init
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: nuke i915->gt0 (rev2)
== Series Details == Series: drm/i915: nuke i915->gt0 (rev2) URL : https://patchwork.freedesktop.org/series/124508/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13703_full -> Patchwork_124508v2_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124508v2_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124508v2_full, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124508v2_full: ### IGT changes ### Possible regressions * igt@gem_exec_schedule@wide@rcs0: - shard-tglu: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13703/shard-tglu-2/igt@gem_exec_schedule@w...@rcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-tglu-8/igt@gem_exec_schedule@w...@rcs0.html * igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a2: - shard-glk: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13703/shard-glk2/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-hdmi-a2.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-glk9/igt@kms_flip@flip-vs-blocking-wf-vbl...@a-hdmi-a2.html Known issues Here are the changes found in Patchwork_124508v2_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@object-reloc-purge-cache: - shard-dg2: NOTRUN -> [SKIP][5] ([i915#8411]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-dg2-7/igt@api_intel...@object-reloc-purge-cache.html * igt@device_reset@unbind-cold-reset-rebind: - shard-dg2: NOTRUN -> [SKIP][6] ([i915#7701]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-dg2-11/igt@device_re...@unbind-cold-reset-rebind.html * igt@drm_fdinfo@idle@rcs0: - shard-rkl: [PASS][7] -> [FAIL][8] ([i915#7742]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13703/shard-rkl-6/igt@drm_fdinfo@i...@rcs0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-rkl-4/igt@drm_fdinfo@i...@rcs0.html * igt@drm_fdinfo@most-busy-check-all@bcs0: - shard-dg2: NOTRUN -> [SKIP][9] ([i915#8414]) +20 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-dg2-1/igt@drm_fdinfo@most-busy-check-...@bcs0.html * igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0: - shard-dg2: NOTRUN -> [INCOMPLETE][10] ([i915#7297]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-dg2-7/igt@gem_ccs@suspend-res...@xmajor-compressed-compfmt0-smem-lmem0.html * igt@gem_ctx_persistence@heartbeat-close: - shard-dg2: NOTRUN -> [SKIP][11] ([i915#8555]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-dg2-3/igt@gem_ctx_persiste...@heartbeat-close.html * igt@gem_ctx_sseu@invalid-args: - shard-dg2: NOTRUN -> [SKIP][12] ([i915#280]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-dg2-7/igt@gem_ctx_s...@invalid-args.html * igt@gem_eio@suspend: - shard-snb: NOTRUN -> [DMESG-WARN][13] ([i915#8841]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-snb4/igt@gem_...@suspend.html * igt@gem_exec_balancer@bonded-sync: - shard-dg2: NOTRUN -> [SKIP][14] ([i915#4771]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-dg2-11/igt@gem_exec_balan...@bonded-sync.html * igt@gem_exec_balancer@bonded-true-hang: - shard-mtlp: NOTRUN -> [SKIP][15] ([i915#4812]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-mtlp-8/igt@gem_exec_balan...@bonded-true-hang.html * igt@gem_exec_capture@capture-invisible@lmem0: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#6334]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-dg2-11/igt@gem_exec_capture@capture-invisi...@lmem0.html * igt@gem_exec_capture@capture-recoverable: - shard-rkl: NOTRUN -> [SKIP][17] ([i915#6344]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/shard-rkl-7/igt@gem_exec_capt...@capture-recoverable.html * igt@gem_exec_capture@pi@vcs1: - shard-mtlp: [PASS][18] -> [FAIL][19] ([i915#4475] / [i915#7765]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13703/shard-mtlp-1/igt@gem_exec_capture@p...@vcs1.html [19]:
Re: [Intel-gfx] [Intel-xe] [PATCH v5 0/2] fbc on any planes
On Fri, Sep 22, 2023 at 04:30:01PM +0300, Vinod Govindapillai wrote: > FBC can be supported in first three planes in lnl > > Vinod Govindapillai (2): > drm/i915/lnl: possibility to enable FBC on first three planes > drm/i915/lnl: update the supported plane formats with FBC Pushed to drm-intel-next. Thanks. > > drivers/gpu/drm/i915/display/intel_fbc.c | 11 ++- > drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++--- > drivers/gpu/drm/i915/i915_reg.h| 2 ++ > 3 files changed, 18 insertions(+), 4 deletions(-) > > -- > 2.34.1 -- Ville Syrjälä Intel
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Invalidate the TLBs on each GT (rev2)
== Series Details ==
Series: drm/i915: Invalidate the TLBs on each GT (rev2)
URL : https://patchwork.freedesktop.org/series/124528/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13704 -> Patchwork_124528v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/index.html
Participating hosts (39 -> 39)
--
Additional (1): fi-hsw-4770
Missing(1): fi-snb-2520m
Known issues
Here are the changes found in Patchwork_124528v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#9414])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/bat-mtlp-8/igt@i915_selftest@l...@requests.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/bat-mtlp-8/igt@i915_selftest@l...@requests.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271]) +13 other tests
skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][4] -> [FAIL][5] ([IGT#3])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#1845]) +3 other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][7] ([i915#8841]) +6 other
tests dmesg-warn
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1072]) +3
other tests skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@smem:
- bat-jsl-3: [INCOMPLETE][9] ([i915#9275]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-jsl-3: [FAIL][11] ([fdo#103375]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- bat-adlp-11:[DMESG-WARN][13] ([i915#6868]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/bat-adlp-11/igt@kms_cursor_leg...@basic-flip-before-cursor-varying-size.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/bat-adlp-11/igt@kms_cursor_leg...@basic-flip-before-cursor-varying-size.html
* igt@kms_flip@basic-flip-vs-dpms@a-dp5:
- bat-adlp-11:[DMESG-FAIL][15] ([i915#6868]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/bat-adlp-11/igt@kms_flip@basic-flip-vs-d...@a-dp5.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/bat-adlp-11/igt@kms_flip@basic-flip-vs-d...@a-dp5.html
* igt@kms_flip@basic-flip-vs-dpms@d-dp6:
- bat-adlp-11:[FAIL][17] ([i915#6121]) -> [PASS][18] +6 other tests
pass
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13704/bat-adlp-11/igt@kms_flip@basic-flip-vs-d...@d-dp6.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124528v2/bat-adlp-11/igt@kms_flip@basic-flip-vs-d...@d-dp6.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
[i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
[i915#8841]:
Re: [Intel-gfx] [PATCH v2 01/15] cdrom: Remove now superfluous sentinel element from ctl_table array
> From: Joel Granados
>
> This commit comes at the tail end of a greater effort to remove the
> empty elements at the end of the ctl_table arrays (sentinels) which
> will reduce the overall build time size of the kernel and run time
> memory bloat by ~64 bytes per sentinel (further information Link :
> https://lore.kernel.org/all/zo5yx5jfoggi%2f...@bombadil.infradead.org/)
>
> Remove sentinel element from cdrom_table
>
> Signed-off-by: Joel Granados
> ---
> drivers/cdrom/cdrom.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c
> index cc2839805983..a5e07270e0d4 100644
> --- a/drivers/cdrom/cdrom.c
> +++ b/drivers/cdrom/cdrom.c
> @@ -3655,7 +3655,6 @@ static struct ctl_table cdrom_table[] = {
> .mode = 0644,
> .proc_handler = cdrom_sysctl_handler
> },
> - { }
> };
> static struct ctl_table_header *cdrom_sysctl_header;
>
>
> --
> 2.30.2
Hi Joel,
Looks good to me, many thanks. I'll send on for inclusion.
Reviewed-by: Phillip Potter
Regards,
Phil
Re: [Intel-gfx] [PATCH v2 11/15] sgi-xp: Remove the now superfluous sentinel element from ctl_table array
On Mon, Oct 02, 2023 at 10:55:28AM +0200, Joel Granados via B4 Relay wrote:
> From: Joel Granados
>
> This commit comes at the tail end of a greater effort to remove the
> empty elements at the end of the ctl_table arrays (sentinels) which
> will reduce the overall build time size of the kernel and run time
> memory bloat by ~64 bytes per sentinel (further information Link :
> https://lore.kernel.org/all/zo5yx5jfoggi%2f...@bombadil.infradead.org/)
>
> Remove sentinel from xpc_sys_xpc_hb and xpc_sys_xpc
>
> Signed-off-by: Joel Granados
> ---
> drivers/misc/sgi-xp/xpc_main.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/misc/sgi-xp/xpc_main.c b/drivers/misc/sgi-xp/xpc_main.c
> index 6da509d692bb..3186421e82c3 100644
> --- a/drivers/misc/sgi-xp/xpc_main.c
> +++ b/drivers/misc/sgi-xp/xpc_main.c
> @@ -110,7 +110,6 @@ static struct ctl_table xpc_sys_xpc_hb[] = {
>.proc_handler = proc_dointvec_minmax,
>.extra1 = _hb_check_min_interval,
>.extra2 = _hb_check_max_interval},
> - {}
> };
> static struct ctl_table xpc_sys_xpc[] = {
> {
> @@ -121,7 +120,6 @@ static struct ctl_table xpc_sys_xpc[] = {
>.proc_handler = proc_dointvec_minmax,
>.extra1 = _disengage_min_timelimit,
>.extra2 = _disengage_max_timelimit},
> - {}
> };
>
> static struct ctl_table_header *xpc_sysctl;
>
> --
> 2.30.2
>
Reviewed-by: Steve Wahl
--
Steve Wahl, Hewlett Packard Enterprise
Re: [Intel-gfx] [PATCH v2 10/15] vrf: Remove the now superfluous sentinel element from ctl_table array
On 10/2/23 2:55 AM, Joel Granados via B4 Relay wrote: > From: Joel Granados > > This commit comes at the tail end of a greater effort to remove the > empty elements at the end of the ctl_table arrays (sentinels) which > will reduce the overall build time size of the kernel and run time > memory bloat by ~64 bytes per sentinel (further information Link : > https://lore.kernel.org/all/zo5yx5jfoggi%2f...@bombadil.infradead.org/) > > Remove sentinel from vrf_table > > Signed-off-by: Joel Granados > --- > drivers/net/vrf.c | 1 - > 1 file changed, 1 deletion(-) > Reviewed-by: David Ahern
[Intel-gfx] [PATCH 4/4] drm/i915: separate subplatform init and runtime feature init
Adjusting ->port_mask does not belong in
intel_device_info_subplatform_init(), but rather
intel_display_device_info_runtime_init().
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_device.c | 7 +++
drivers/gpu/drm/i915/intel_device_info.c| 5 -
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers/gpu/drm/i915/display/intel_display_device.c
index 11f4a6c54cc7..9f0266318a41 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -948,6 +948,13 @@ static void
__intel_display_device_info_runtime_init(struct drm_i915_private *i9
BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->cpu_transcoder_mask) <
I915_MAX_TRANSCODERS);
BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->port_mask) <
I915_MAX_PORTS);
+ /* This covers both ULT and ULX */
+ if (IS_HASWELL_ULT(i915) || IS_BROADWELL_ULT(i915))
+ display_runtime->port_mask &= ~BIT(PORT_D);
+
+ if (IS_ICL_WITH_PORT_F(i915))
+ display_runtime->port_mask |= BIT(PORT_F);
+
/* Wa_14011765242: adl-s A0,A1 */
if (IS_ALDERLAKE_S(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
for_each_pipe(i915, pipe)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index db3997cec6ff..59bea1398c91 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -27,7 +27,6 @@
#include
#include
-#include "display/intel_display_device.h"
#include "gt/intel_gt_regs.h"
#include "i915_drv.h"
#include "i915_reg.h"
@@ -232,19 +231,15 @@ static void intel_device_info_subplatform_init(struct
drm_i915_private *i915)
if (find_devid(devid, subplatform_ult_ids,
ARRAY_SIZE(subplatform_ult_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ULT);
- if (IS_HASWELL(i915) || IS_BROADWELL(i915))
- DISPLAY_RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D);
} else if (find_devid(devid, subplatform_ulx_ids,
ARRAY_SIZE(subplatform_ulx_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ULX);
if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
/* ULX machines are also considered ULT. */
mask |= BIT(INTEL_SUBPLATFORM_ULT);
- DISPLAY_RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D);
}
} else if (find_devid(devid, subplatform_portf_ids,
ARRAY_SIZE(subplatform_portf_ids))) {
- DISPLAY_RUNTIME_INFO(i915)->port_mask |= BIT(PORT_F);
mask = BIT(INTEL_SUBPLATFORM_PORTF);
} else if (find_devid(devid, subplatform_uy_ids,
ARRAY_SIZE(subplatform_uy_ids))) {
--
2.39.2
[Intel-gfx] [PATCH 3/4] drm/i915: separate display runtime info init
Move display related functionality from intel_device_info_runtime_init()
to intel_display_device_info_runtime_init() and call the latter from the
top level.
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.c | 19 ++-
drivers/gpu/drm/i915/i915_driver.c| 1 +
drivers/gpu/drm/i915/intel_device_info.c | 17 -
3 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers/gpu/drm/i915/display/intel_display_device.c
index dea64c99721e..11f4a6c54cc7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -939,7 +939,7 @@ void intel_display_device_probe(struct drm_i915_private
*i915)
}
}
-void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
+static void __intel_display_device_info_runtime_init(struct drm_i915_private
*i915)
{
struct intel_display_runtime_info *display_runtime =
DISPLAY_RUNTIME_INFO(i915);
enum pipe pipe;
@@ -1071,6 +1071,23 @@ void intel_display_device_info_runtime_init(struct
drm_i915_private *i915)
memset(display_runtime, 0, sizeof(*display_runtime));
}
+void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
+{
+ if (HAS_DISPLAY(i915))
+ __intel_display_device_info_runtime_init(i915);
+
+ /* Display may have been disabled by runtime init */
+ if (!HAS_DISPLAY(i915)) {
+ i915->drm.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
+ i915->display.info.__device_info = _display;
+ }
+
+ /* Disable nuclear pageflip by default on pre-g4x */
+ if (!i915->params.nuclear_pageflip &&
+ DISPLAY_VER(i915) < 5 && !IS_G4X(i915))
+ i915->drm.driver_features &= ~DRIVER_ATOMIC;
+}
+
void intel_display_device_info_print(const struct intel_display_device_info
*info,
const struct intel_display_runtime_info
*runtime,
struct drm_printer *p)
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 78501a83ba10..ccbb2834cde0 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -338,6 +338,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private
*dev_priv)
/* Try to make sure MCHBAR is enabled before poking at it */
intel_gmch_bar_setup(dev_priv);
intel_device_info_runtime_init(dev_priv);
+ intel_display_device_info_runtime_init(dev_priv);
for_each_gt(gt, dev_priv, i) {
ret = intel_gt_init_mmio(gt);
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index d2ed0f057cb2..db3997cec6ff 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -350,8 +350,6 @@ void intel_device_info_runtime_init_early(struct
drm_i915_private *i915)
intel_device_info_subplatform_init(i915);
}
-static const struct intel_display_device_info no_display = {};
-
/**
* intel_device_info_runtime_init - initialize runtime info
* @dev_priv: the i915 device
@@ -372,21 +370,6 @@ void intel_device_info_runtime_init(struct
drm_i915_private *dev_priv)
{
struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv);
- if (HAS_DISPLAY(dev_priv))
- intel_display_device_info_runtime_init(dev_priv);
-
- /* Display may have been disabled by runtime init */
- if (!HAS_DISPLAY(dev_priv)) {
- dev_priv->drm.driver_features &= ~(DRIVER_MODESET |
- DRIVER_ATOMIC);
- dev_priv->display.info.__device_info = _display;
- }
-
- /* Disable nuclear pageflip by default on pre-g4x */
- if (!dev_priv->params.nuclear_pageflip &&
- DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
- dev_priv->drm.driver_features &= ~DRIVER_ATOMIC;
-
BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES);
if (GRAPHICS_VER(dev_priv) == 6 && i915_vtd_active(dev_priv)) {
--
2.39.2
[Intel-gfx] [PATCH 2/4] drm/i915: move display info related macros to display
Anything looking at display (runtime) info should be under display.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_device.h | 9 +
drivers/gpu/drm/i915/i915_drv.h | 8
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
b/drivers/gpu/drm/i915/display/intel_display_device.h
index 8977bac8cb7f..5b5c0e53307f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -98,6 +98,15 @@ struct drm_printer;
(IS_DISPLAY_IP_RANGE((__i915), (ipver), (ipver)) && \
IS_DISPLAY_STEP((__i915), (from), (until)))
+#define DISPLAY_INFO(i915) ((i915)->display.info.__device_info)
+#define DISPLAY_RUNTIME_INFO(i915) (&(i915)->display.info.__runtime_info)
+
+#define DISPLAY_VER(i915) (DISPLAY_RUNTIME_INFO(i915)->ip.ver)
+#define DISPLAY_VER_FULL(i915) IP_VER(DISPLAY_RUNTIME_INFO(i915)->ip.ver, \
+ DISPLAY_RUNTIME_INFO(i915)->ip.rel)
+#define IS_DISPLAY_VER(i915, from, until) \
+ (DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
+
struct intel_display_runtime_info {
struct {
u16 ver;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e513328621ef..2b7a6db4d0d4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -431,8 +431,6 @@ static inline struct intel_gt *to_gt(struct
drm_i915_private *i915)
#define INTEL_INFO(i915) ((i915)->__info)
#define RUNTIME_INFO(i915) (&(i915)->__runtime)
-#define DISPLAY_INFO(i915) ((i915)->display.info.__device_info)
-#define DISPLAY_RUNTIME_INFO(i915) (&(i915)->display.info.__runtime_info)
#define DRIVER_CAPS(i915) (&(i915)->caps)
#define INTEL_DEVID(i915) (RUNTIME_INFO(i915)->device_id)
@@ -451,12 +449,6 @@ static inline struct intel_gt *to_gt(struct
drm_i915_private *i915)
#define IS_MEDIA_VER(i915, from, until) \
(MEDIA_VER(i915) >= (from) && MEDIA_VER(i915) <= (until))
-#define DISPLAY_VER(i915) (DISPLAY_RUNTIME_INFO(i915)->ip.ver)
-#define DISPLAY_VER_FULL(i915) IP_VER(DISPLAY_RUNTIME_INFO(i915)->ip.ver, \
- DISPLAY_RUNTIME_INFO(i915)->ip.rel)
-#define IS_DISPLAY_VER(i915, from, until) \
- (DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
-
#define INTEL_REVID(i915) (to_pci_dev((i915)->drm.dev)->revision)
#define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step)
--
2.39.2
[Intel-gfx] [PATCH 1/4] drm/i915: convert INTEL_DISPLAY_ENABLED() into a function
There's no need for this to be a macro. Add some documentation too.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_crt.c| 2 +-
.../gpu/drm/i915/display/intel_display_device.c | 17 +
.../gpu/drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_dvo.c| 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/intel_hotplug.c| 2 +-
drivers/gpu/drm/i915/display/intel_panel.c | 2 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 2 +-
drivers/gpu/drm/i915/display/intel_tv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 6 --
12 files changed, 27 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index d4bad0ddff41..913e5d230a4d 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -838,7 +838,7 @@ intel_crt_detect(struct drm_connector *connector,
connector->base.id, connector->name,
force);
- if (!INTEL_DISPLAY_ENABLED(dev_priv))
+ if (!intel_display_device_enabled(dev_priv))
return connector_status_disconnected;
if (dev_priv->params.load_detect_test) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers/gpu/drm/i915/display/intel_display_device.c
index ce55b968e658..dea64c99721e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1091,3 +1091,20 @@ void intel_display_device_info_print(const struct
intel_display_device_info *inf
drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
drm_printf(p, "has_dsc: %s\n", str_yes_no(runtime->has_dsc));
}
+
+/*
+ * Assuming the device has display hardware, should it be enabled?
+ *
+ * It's an error to call this function if the device does not have display
+ * hardware.
+ *
+ * Disabling display means taking over the display hardware, putting it to
+ * sleep, and preventing connectors from being connected via any means.
+ */
+bool intel_display_device_enabled(struct drm_i915_private *i915)
+{
+ /* Only valid when HAS_DISPLAY() is true */
+ drm_WARN_ON(>drm, !HAS_DISPLAY(i915));
+
+ return !i915->params.disable_display &&
!intel_opregion_headless_sku(i915);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
b/drivers/gpu/drm/i915/display/intel_display_device.h
index 44733c9d5812..8977bac8cb7f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -150,6 +150,7 @@ struct intel_display_device_info {
} color;
};
+bool intel_display_device_enabled(struct drm_i915_private *i915);
void intel_display_device_probe(struct drm_i915_private *i915);
void intel_display_device_info_runtime_init(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 11420595c4f9..f0f43aeabd21 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5358,7 +5358,7 @@ intel_dp_detect(struct drm_connector *connector,
drm_WARN_ON(_priv->drm,
!drm_modeset_is_locked(_priv->drm.mode_config.connection_mutex));
- if (!INTEL_DISPLAY_ENABLED(dev_priv))
+ if (!intel_display_device_enabled(dev_priv))
return connector_status_disconnected;
/* Can't disconnect eDP */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 648cf37e02a8..a21cc9d0689e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1062,7 +1062,7 @@ intel_dp_mst_detect(struct drm_connector *connector,
struct intel_connector *intel_connector = to_intel_connector(connector);
struct intel_dp *intel_dp = intel_connector->mst_port;
- if (!INTEL_DISPLAY_ENABLED(i915))
+ if (!intel_display_device_enabled(i915))
return connector_status_disconnected;
if (drm_connector_is_unregistered(connector))
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c
b/drivers/gpu/drm/i915/display/intel_dvo.c
index d9f427856fb8..55d6743374bd 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -319,7 +319,7 @@ intel_dvo_detect(struct drm_connector *_connector, bool
force)
drm_dbg_kms(>drm, "[CONNECTOR:%d:%s]\n",
connector->base.base.id, connector->base.name);
- if (!INTEL_DISPLAY_ENABLED(i915))
+ if (!intel_display_device_enabled(i915))
return connector_status_disconnected;
return
[Intel-gfx] [PATCH 0/4] drm/i915: move display info related stuff under display/
Continue separation of display code from the rest. Jani Nikula (4): drm/i915: convert INTEL_DISPLAY_ENABLED() into a function drm/i915: move display info related macros to display drm/i915: separate display runtime info init drm/i915: separate subplatform init and runtime feature init drivers/gpu/drm/i915/display/intel_crt.c | 2 +- .../drm/i915/display/intel_display_device.c | 43 ++- .../drm/i915/display/intel_display_device.h | 10 + drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/display/intel_dvo.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +- drivers/gpu/drm/i915/display/intel_hotplug.c | 2 +- drivers/gpu/drm/i915/display/intel_panel.c| 2 +- drivers/gpu/drm/i915/display/intel_sdvo.c | 2 +- drivers/gpu/drm/i915/display/intel_tv.c | 2 +- drivers/gpu/drm/i915/i915_driver.c| 1 + drivers/gpu/drm/i915/i915_drv.h | 14 -- drivers/gpu/drm/i915/intel_device_info.c | 22 -- 14 files changed, 62 insertions(+), 46 deletions(-) -- 2.39.2
Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: No TLB invalidation on wedged or suspended GT
On Mon, 02 Oct 2023, Jonathan Cavitt wrote:
> From: Fei Yang
>
> In case of GT is suspended or wedged, don't allow submission of new TLB
> invalidation request and cancel all pending requests. The TLB entries
> will be invalidated either during GuC reload or on system resume.
>
> Signed-off-by: Fei Yang
> Signed-off-by: Jonathan Cavitt
> CC: John Harrison
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.h| 1 +
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 35 +++
> drivers/gpu/drm/i915/i915_driver.c| 9 +
> 3 files changed, 39 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index 5fc5e67f870cc..0cdc7ca66861c 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -536,4 +536,5 @@ void intel_guc_dump_time_info(struct intel_guc *guc,
> struct drm_printer *p);
>
> int intel_guc_sched_disable_gucid_threshold_max(struct intel_guc *guc);
>
> +void wake_up_all_tlb_invalidate(struct intel_guc *guc);
> #endif
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 3478fa73180ab..2f194cadbe553 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -32,6 +32,7 @@
>
> #include "i915_drv.h"
> #include "i915_reg.h"
> +#include "i915_irq.h"
> #include "i915_trace.h"
>
> /**
> @@ -1803,13 +1804,20 @@ static void wake_up_tlb_invalidate(struct
> intel_guc_tlb_wait *wait)
> wake_up(>wq);
> }
>
> -void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t
> stalled)
> +void wake_up_all_tlb_invalidate(struct intel_guc *guc)
> {
> struct intel_guc_tlb_wait *wait;
> + unsigned long i;
> +
> + xa_for_each(>tlb_lookup, i, wait)
> + wake_up_tlb_invalidate(wait);
> +}
> +
> +void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t
> stalled)
> +{
> struct intel_context *ce;
> unsigned long index;
> unsigned long flags;
> - unsigned long i;
>
> if (unlikely(!guc_submission_initialized(guc))) {
> /* Reset called during driver load? GuC not yet initialised! */
> @@ -1840,8 +1848,7 @@ void intel_guc_submission_reset(struct intel_guc *guc,
> intel_engine_mask_t stall
>* The full GT reset will have cleared the TLB caches and flushed the
>* G2H message queue; we can release all the blocked waiters.
>*/
> - xa_for_each(>tlb_lookup, i, wait)
> - wake_up_tlb_invalidate(wait);
> + wake_up_all_tlb_invalidate(guc);
> }
>
> static void guc_cancel_context_requests(struct intel_context *ce)
> @@ -1937,6 +1944,12 @@ void intel_guc_submission_cancel_requests(struct
> intel_guc *guc)
>
> /* GuC is blown away, drop all references to contexts */
> xa_destroy(>context_lookup);
> +
> + /*
> + * Wedged GT won't respond to any TLB invalidation request. Simply
> + * release all the blocked waiters.
> + */
> + wake_up_all_tlb_invalidate(guc);
> }
>
> void intel_guc_submission_reset_finish(struct intel_guc *guc)
> @@ -4748,6 +4761,14 @@ static long must_wait_woken(struct wait_queue_entry
> *wq_entry, long timeout)
> return timeout;
> }
>
> +static bool intel_gt_is_enabled(const struct intel_gt *gt)
> +{
> + /* Check if GT is wedged or suspended */
> + if (intel_gt_is_wedged(gt) || !intel_irqs_enabled(gt->i915))
> + return false;
> + return true;
> +}
> +
> static int guc_send_invalidate_tlb(struct intel_guc *guc, u32 type)
> {
> struct intel_guc_tlb_wait _wq, *wq = &_wq;
> @@ -4765,7 +4786,8 @@ static int guc_send_invalidate_tlb(struct intel_guc
> *guc, u32 type)
> };
> u32 size = ARRAY_SIZE(action);
>
> - if (!intel_guc_ct_enabled(>ct))
> + if (!intel_guc_ct_enabled(>ct) ||
> + !intel_gt_is_enabled(gt))
> return -EINVAL;
>
> init_waitqueue_head(&_wq.wq);
> @@ -4807,7 +4829,8 @@ static int guc_send_invalidate_tlb(struct intel_guc
> *guc, u32 type)
>* queued in CT buffer.
>*/
> #define OUTSTANDING_GUC_TIMEOUT_PERIOD (HZ * 2)
> - if (!must_wait_woken(, OUTSTANDING_GUC_TIMEOUT_PERIOD)) {
> + if (!must_wait_woken(, OUTSTANDING_GUC_TIMEOUT_PERIOD) &&
> + intel_gt_is_enabled(gt)) {
> gt_err(gt,
> "TLB invalidation response timed out for seqno %u\n",
> seqno);
> err = -ETIME;
> diff --git a/drivers/gpu/drm/i915/i915_driver.c
> b/drivers/gpu/drm/i915/i915_driver.c
> index 78501a83ba109..f5175103ea900 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -72,6 +72,7 @@
> #include "gt/intel_gt.h"
> #include "gt/intel_gt_pm.h"
> #include "gt/intel_rc6.h"
> +#include "gt/uc/intel_guc.h"
>
> #include
Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume
On Mon, 02 Oct 2023, Jonathan Cavitt wrote:
> Consider multi-gt support when cancelling all tlb invalidations on
> suspend, and when submitting tlb invalidations on resume.
>
> Suggested-by: Tvrtko Ursulin
> Signed-off-by: Fei Yang
> Signed-off-by: Jonathan Cavitt
> CC: John Harrison
I guess I'm wondering why the top level suspend hook needs to iterate
gts instead of some lower level thing. We should aim to reduce
gem/gt/display details from the top level.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/i915_driver.c | 13 +
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c
> b/drivers/gpu/drm/i915/i915_driver.c
> index f5175103ea900..d7655a7b60eda 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1077,6 +1077,8 @@ static int i915_drm_suspend(struct drm_device *dev)
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
> pci_power_t opregion_target_state;
> + struct intel_gt *gt;
> + int i;
>
> disable_rpm_wakeref_asserts(_priv->runtime_pm);
>
> @@ -1094,7 +1096,8 @@ static int i915_drm_suspend(struct drm_device *dev)
>
> intel_runtime_pm_disable_interrupts(dev_priv);
>
> - wake_up_all_tlb_invalidate(_gt(dev_priv)->uc.guc);
> + for_each_gt(gt, dev_priv, i)
> + wake_up_all_tlb_invalidate(>uc.guc);
>
> intel_hpd_cancel_work(dev_priv);
>
> @@ -1267,9 +1270,11 @@ static int i915_drm_resume(struct drm_device *dev)
>
> intel_gvt_resume(dev_priv);
>
> - if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(_gt(dev_priv)->uc.guc)) {
> - intel_guc_invalidate_tlb_full(_gt(dev_priv)->uc.guc);
> - intel_guc_invalidate_tlb(_gt(dev_priv)->uc.guc);
> + for_each_gt(gt, dev_priv, i) {
> + if (!INTEL_GUC_SUPPORTS_TLB_INVALIDATION(>uc.guc))
> + continue;
> + intel_guc_invalidate_tlb_full(>uc.guc);
> + intel_guc_invalidate_tlb(>uc.guc);
> }
>
> enable_rpm_wakeref_asserts(_priv->runtime_pm);
--
Jani Nikula, Intel
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: nuke i915->gt0 (rev2)
== Series Details == Series: drm/i915: nuke i915->gt0 (rev2) URL : https://patchwork.freedesktop.org/series/124508/ State : success == Summary == CI Bug Log - changes from CI_DRM_13703 -> Patchwork_124508v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/index.html Participating hosts (40 -> 39) -- Additional (1): bat-dg2-8 Missing(2): fi-snb-2520m fi-bsw-n3050 Known issues Here are the changes found in Patchwork_124508v2 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s0@lmem0: - bat-dg2-9: [PASS][1] -> [INCOMPLETE][2] ([i915#9275]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13703/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html * igt@gem_mmap@basic: - bat-dg2-8: NOTRUN -> [SKIP][3] ([i915#4083]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-8: NOTRUN -> [SKIP][4] ([i915#4077]) +2 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@gem_mmap_...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-8: NOTRUN -> [SKIP][5] ([i915#4079]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-8: NOTRUN -> [SKIP][6] ([i915#6621]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_heartbeat: - fi-glk-j4005: [PASS][7] -> [DMESG-FAIL][8] ([i915#5334]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13703/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [PASS][9] -> [ABORT][10] ([i915#9414]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13703/bat-mtlp-8/igt@i915_selftest@l...@requests.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-mtlp-8/igt@i915_selftest@l...@requests.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#6645]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#5190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#4215] / [i915#5190]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#4212]) +6 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#4212] / [i915#5608]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-8: NOTRUN -> [SKIP][16] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-8: NOTRUN -> [SKIP][17] ([fdo#109285]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-8: NOTRUN -> [SKIP][18] ([i915#5274]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-dg2-8/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-adlp-9: NOTRUN -> [SKIP][19] ([i915#3546]) +2 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124508v2/bat-adlp-9/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-dp-5: - bat-adlp-11:[PASS][20] ->
Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines
Some more comments..
On 02/10/2023 18:24, Jonathan Cavitt wrote:
From: Prathap Kumar Valsan
The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation. We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back to GT invalidation when the GuC is
disabled.
The invalidation is done by sending a request directly to the GuC
tlb_lookup that invalidates the table. The invalidation is submitted as
a wait request and is performed in the CT event handler. This means we
cannot perform this TLB invalidation path if the CT is not enabled.
If the request isn't fulfilled in two seconds, this would constitute
an error in the invalidation as that would constitute either a lost
request or a severe GuC overload.
With this new invalidation routine, we can perform GuC-based GGTT
invalidations. We should only do this when GuC is enabled and fall
back to the original path when GuC is disabled to prevent concurrent
issuance between GuC and KMD.
I think the commit message should be improved to describe the mechanism
implemented for waiting and serializing, since it is not really
straightofward. So it needs to be explained why it is needed and what it
gains us.
Like existing MMIO invalidation is one at a time, so what does the
scheme implemented here, to allow multiple, gets us. When they also all
have to wait until the G2H response is received anyway.
More comments inline below.
Signed-off-by: Prathap Kumar Valsan
Signed-off-by: Bruce Chang
Signed-off-by: Chris Wilson
Signed-off-by: Umesh Nerlige Ramappa
Signed-off-by: Jonathan Cavitt
Signed-off-by: Aravind Iddamsetty
Signed-off-by: Fei Yang
CC: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 43 ++--
drivers/gpu/drm/i915/gt/intel_tlb.c | 14 +-
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 33 +++
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 22 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 +
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 5 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 212 +-
7 files changed, 322 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 4d7d88b92632b..db5644b0146ca 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -206,22 +206,38 @@ static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
}
-static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
+static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
{
- struct drm_i915_private *i915 = ggtt->vm.i915;
+ struct intel_uncore *uncore = gt->uncore;
+ intel_wakeref_t wakeref;
- gen8_ggtt_invalidate(ggtt);
+ with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
+ struct intel_guc *guc = >uc.guc;
- if (GRAPHICS_VER(i915) >= 12) {
- struct intel_gt *gt;
+ intel_guc_invalidate_tlb(guc);
+ }
+}
- list_for_each_entry(gt, >gt_list, ggtt_link)
- intel_uncore_write_fw(gt->uncore,
- GEN12_GUC_TLB_INV_CR,
- GEN12_GUC_TLB_INV_CR_INVALIDATE);
- } else {
- intel_uncore_write_fw(ggtt->vm.gt->uncore,
- GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
+{
+ struct drm_i915_private *i915 = ggtt->vm.i915;
+ struct intel_gt *gt;
+
+ if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
+ gen8_ggtt_invalidate(ggtt);
+
+ list_for_each_entry(gt, >gt_list, ggtt_link) {
+ if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(>uc.guc) &&
+ intel_guc_is_ready(>uc.guc)) {
+ guc_ggtt_ct_invalidate(gt);
+ } else if (GRAPHICS_VER(i915) >= 12) {
+ intel_uncore_write(gt->uncore,
+ GEN12_GUC_TLB_INV_CR,
+ GEN12_GUC_TLB_INV_CR_INVALIDATE);
+ } else {
+ intel_uncore_write(gt->uncore,
+ GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+ }
}
}
@@ -1243,7 +1259,8 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.raw_insert_page = gen8_ggtt_insert_page;
}
- if (intel_uc_wants_guc(>vm.gt->uc))
+ if (intel_uc_wants_guc(>vm.gt->uc) &&
+ intel_uc_wants_guc_submission(>vm.gt->uc))
ggtt->invalidate = guc_ggtt_invalidate;
else
ggtt->invalidate = gen8_ggtt_invalidate;
diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: nuke i915->gt0 (rev2)
== Series Details == Series: drm/i915: nuke i915->gt0 (rev2) URL : https://patchwork.freedesktop.org/series/124508/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: No TLB invalidation on wedged or suspended GT
On 02/10/2023 18:24, Jonathan Cavitt wrote:
From: Fei Yang
In case of GT is suspended or wedged, don't allow submission of new TLB
invalidation request and cancel all pending requests. The TLB entries
will be invalidated either during GuC reload or on system resume.
Signed-off-by: Fei Yang
Signed-off-by: Jonathan Cavitt
CC: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 1 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 35 +++
drivers/gpu/drm/i915/i915_driver.c| 9 +
3 files changed, 39 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 5fc5e67f870cc..0cdc7ca66861c 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -536,4 +536,5 @@ void intel_guc_dump_time_info(struct intel_guc *guc, struct
drm_printer *p);
int intel_guc_sched_disable_gucid_threshold_max(struct intel_guc *guc);
+void wake_up_all_tlb_invalidate(struct intel_guc *guc);
#endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 3478fa73180ab..2f194cadbe553 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -32,6 +32,7 @@
#include "i915_drv.h"
#include "i915_reg.h"
+#include "i915_irq.h"
#include "i915_trace.h"
/**
@@ -1803,13 +1804,20 @@ static void wake_up_tlb_invalidate(struct
intel_guc_tlb_wait *wait)
wake_up(>wq);
}
-void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled)
+void wake_up_all_tlb_invalidate(struct intel_guc *guc)
{
struct intel_guc_tlb_wait *wait;
+ unsigned long i;
+
+ xa_for_each(>tlb_lookup, i, wait)
+ wake_up_tlb_invalidate(wait);
+}
+
+void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t
stalled)
+{
struct intel_context *ce;
unsigned long index;
unsigned long flags;
- unsigned long i;
if (unlikely(!guc_submission_initialized(guc))) {
/* Reset called during driver load? GuC not yet initialised! */
@@ -1840,8 +1848,7 @@ void intel_guc_submission_reset(struct intel_guc *guc,
intel_engine_mask_t stall
* The full GT reset will have cleared the TLB caches and flushed the
* G2H message queue; we can release all the blocked waiters.
*/
- xa_for_each(>tlb_lookup, i, wait)
- wake_up_tlb_invalidate(wait);
+ wake_up_all_tlb_invalidate(guc);
}
static void guc_cancel_context_requests(struct intel_context *ce)
@@ -1937,6 +1944,12 @@ void intel_guc_submission_cancel_requests(struct
intel_guc *guc)
/* GuC is blown away, drop all references to contexts */
xa_destroy(>context_lookup);
+
+ /*
+* Wedged GT won't respond to any TLB invalidation request. Simply
+* release all the blocked waiters.
+*/
+ wake_up_all_tlb_invalidate(guc);
}
void intel_guc_submission_reset_finish(struct intel_guc *guc)
@@ -4748,6 +4761,14 @@ static long must_wait_woken(struct wait_queue_entry
*wq_entry, long timeout)
return timeout;
}
+static bool intel_gt_is_enabled(const struct intel_gt *gt)
+{
+ /* Check if GT is wedged or suspended */
+ if (intel_gt_is_wedged(gt) || !intel_irqs_enabled(gt->i915))
+ return false;
+ return true;
+}
Name still sucks but at least it is now hidden, okay.
+
static int guc_send_invalidate_tlb(struct intel_guc *guc, u32 type)
{
struct intel_guc_tlb_wait _wq, *wq = &_wq;
@@ -4765,7 +4786,8 @@ static int guc_send_invalidate_tlb(struct intel_guc *guc,
u32 type)
};
u32 size = ARRAY_SIZE(action);
- if (!intel_guc_ct_enabled(>ct))
+ if (!intel_guc_ct_enabled(>ct) ||
+ !intel_gt_is_enabled(gt))
return -EINVAL;
init_waitqueue_head(&_wq.wq);
@@ -4807,7 +4829,8 @@ static int guc_send_invalidate_tlb(struct intel_guc *guc,
u32 type)
* queued in CT buffer.
*/
#define OUTSTANDING_GUC_TIMEOUT_PERIOD (HZ * 2)
- if (!must_wait_woken(, OUTSTANDING_GUC_TIMEOUT_PERIOD)) {
+ if (!must_wait_woken(, OUTSTANDING_GUC_TIMEOUT_PERIOD) &&
+ intel_gt_is_enabled(gt)) {
Order of conditions is okay? Makes sense to first wait and only then
check if "gt is enabled"?
gt_err(gt,
"TLB invalidation response timed out for seqno %u\n",
seqno);
err = -ETIME;
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 78501a83ba109..f5175103ea900 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -72,6 +72,7 @@
#include "gt/intel_gt.h"
#include "gt/intel_gt_pm.h"
#include "gt/intel_rc6.h"
+#include "gt/uc/intel_guc.h"
#include
Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines
On 02/10/2023 18:24, Jonathan Cavitt wrote:
From: Prathap Kumar Valsan
The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation. We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back to GT invalidation when the GuC is
disabled.
The invalidation is done by sending a request directly to the GuC
tlb_lookup that invalidates the table. The invalidation is submitted as
a wait request and is performed in the CT event handler. This means we
cannot perform this TLB invalidation path if the CT is not enabled.
If the request isn't fulfilled in two seconds, this would constitute
an error in the invalidation as that would constitute either a lost
request or a severe GuC overload.
With this new invalidation routine, we can perform GuC-based GGTT
invalidations. We should only do this when GuC is enabled and fall
back to the original path when GuC is disabled to prevent concurrent
issuance between GuC and KMD.
Signed-off-by: Prathap Kumar Valsan
Signed-off-by: Bruce Chang
Signed-off-by: Chris Wilson
Signed-off-by: Umesh Nerlige Ramappa
Signed-off-by: Jonathan Cavitt
Signed-off-by: Aravind Iddamsetty
Signed-off-by: Fei Yang
CC: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 43 ++--
drivers/gpu/drm/i915/gt/intel_tlb.c | 14 +-
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 33 +++
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 22 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 +
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 5 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 212 +-
7 files changed, 322 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 4d7d88b92632b..db5644b0146ca 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -206,22 +206,38 @@ static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
}
-static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
+static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
{
- struct drm_i915_private *i915 = ggtt->vm.i915;
+ struct intel_uncore *uncore = gt->uncore;
+ intel_wakeref_t wakeref;
- gen8_ggtt_invalidate(ggtt);
+ with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
+ struct intel_guc *guc = >uc.guc;
- if (GRAPHICS_VER(i915) >= 12) {
- struct intel_gt *gt;
+ intel_guc_invalidate_tlb(guc);
+ }
+}
- list_for_each_entry(gt, >gt_list, ggtt_link)
- intel_uncore_write_fw(gt->uncore,
- GEN12_GUC_TLB_INV_CR,
- GEN12_GUC_TLB_INV_CR_INVALIDATE);
- } else {
- intel_uncore_write_fw(ggtt->vm.gt->uncore,
- GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
+{
+ struct drm_i915_private *i915 = ggtt->vm.i915;
+ struct intel_gt *gt;
+
+ if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11)
+ gen8_ggtt_invalidate(ggtt);
+
+ list_for_each_entry(gt, >gt_list, ggtt_link) {
+ if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(>uc.guc) &&
+ intel_guc_is_ready(>uc.guc)) {
The condition here expands to a relatively heavy one:
+#define INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc) \
+ ((intel_guc_ct_enabled(&(guc)->ct)) && \
+(intel_guc_submission_is_used(guc)) && \
+(GRAPHICS_VER(guc_to_gt((guc))->i915) >= 12))
&&
static inline bool intel_guc_is_ready(struct intel_guc *guc)
{
return intel_guc_is_fw_running(guc) && intel_guc_ct_enabled(>ct);
}
intel_guc_ct_enabled is even duplicated.
Is there scope to consolidate the parts which are platform invariant, or even
runtime invariant, or at least guaranteed not to transition back and forth but
one way only?
In other words, if we know during init we will want it, mark it as a flag in
intel_guc or somewhere, and then at runtime do only those conditions which can
transition back and forth due driver flows.
I am not saying this is performance sensitive, but in terms of elegance,
readability and self-documentation the proposed version looks a bit sub-optimal
to me.
+ guc_ggtt_ct_invalidate(gt);
+ } else if (GRAPHICS_VER(i915) >= 12) {
+ intel_uncore_write(gt->uncore,
+ GEN12_GUC_TLB_INV_CR,
+ GEN12_GUC_TLB_INV_CR_INVALIDATE);
+ } else {
+ intel_uncore_write(gt->uncore,
+ GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Invalidate the TLBs on each GT
Hi, > Possible regressions > > • igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a3: > □ shard-dg2: PASS -> INCOMPLETE I believe this is not caused by this patch. I'm going to push it. Andi
[Intel-gfx] [PATCH i-g-t 9/9] lib/kunit: Execute kunit test cases only when needed
IGT user interface allows to request execution of only those dynamic sub-
subtests that match a user provided name pattern. If the user pattern
doesn't match any names of test cases provided by a kunit test module used
with the subtest to be run then no results from any dynamic sub-subtests
will be reported. Since we already know the list of test cases provided
by the kunit test module, there is no need to load that module to execute
them unless the user pattern matches at least one of those test cases.
Don't load the kunit test module in execute mode before entering the loop
of dynamic sub-subtests, and do that only from the first actually executed
dynamic sub-subtest.
Signed-off-by: Janusz Krzysztofik
---
lib/igt_kmod.c | 59 --
1 file changed, 33 insertions(+), 26 deletions(-)
diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 4fba77ead4..a8a140c9f1 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -962,24 +962,29 @@ static void __igt_kunit(struct igt_ktest *tst,
igt_skip_on(lseek(tst->kmsg, 0, SEEK_END) < 0);
- igt_skip_on(pthread_mutexattr_init());
- igt_skip_on(pthread_mutexattr_setrobust(, PTHREAD_MUTEX_ROBUST));
- igt_skip_on(pthread_mutex_init(, ));
-
ktap = igt_ktap_alloc();
igt_require(ktap);
- if (igt_debug_on(pthread_create(, NULL,
- modprobe_task, ))) {
- igt_ktap_free(ktap);
- igt_skip("Failed to create a modprobe thread\n");
- }
-
igt_list_for_each_entry(t, tests, link) {
igt_dynamic_f("%s%s%s",
strcmp(t->suite_name, name) ? t->suite_name : "",
strcmp(t->suite_name, name) ? "-" : "",
t->case_name) {
+ if (!modprobe.thread) {
+ igt_assert_eq(pthread_mutexattr_init(), 0);
+ igt_assert_eq(pthread_mutexattr_setrobust(,
+ PTHREAD_MUTEX_ROBUST),
+ 0);
+ igt_assert_eq(pthread_mutex_init(,
+), 0);
+
+ modprobe.err = pthread_create(,
+ NULL,
+ modprobe_task,
+ );
+ igt_assert_eq(modprobe.err, 0);
+ }
+
if (!r) {
if (igt_list_empty()) {
igt_assert_eq(ret, -EINPROGRESS);
@@ -1075,22 +1080,24 @@ static void __igt_kunit(struct igt_ktest *tst,
free(case_name);
free(suite_name);
- switch (pthread_mutex_lock()) {
- case 0:
- igt_debug_on(pthread_cancel(modprobe.thread));
- igt_debug_on(pthread_mutex_unlock());
- igt_debug_on(pthread_join(modprobe.thread, NULL));
- break;
- case EOWNERDEAD:
- /* leave the mutex unrecoverable */
- igt_debug_on(pthread_mutex_unlock());
- break;
- case ENOTRECOVERABLE:
- break;
- default:
- igt_debug("pthread_mutex_lock() failed\n");
- igt_debug_on(pthread_join(modprobe.thread, NULL));
- break;
+ if (modprobe.thread) {
+ switch (pthread_mutex_lock()) {
+ case 0:
+ igt_debug_on(pthread_cancel(modprobe.thread));
+ igt_debug_on(pthread_mutex_unlock());
+ igt_debug_on(pthread_join(modprobe.thread, NULL));
+ break;
+ case EOWNERDEAD:
+ /* leave the mutex unrecoverable */
+ igt_debug_on(pthread_mutex_unlock());
+ break;
+ case ENOTRECOVERABLE:
+ break;
+ default:
+ igt_debug("pthread_mutex_lock() failed\n");
+ igt_debug_on(pthread_join(modprobe.thread, NULL));
+ break;
+ }
}
igt_ktap_free(ktap);
--
2.42.0
[Intel-gfx] [PATCH i-g-t 6/9] tests/kms_selftest: Let subtest names match suite names
There is a rule specified in Kunit Test Style and Nomenclature guidelines
[1] that states modules should be named after the test suite, followed by
_test. Of course, that rule applies only to modules that provide one test
suite per module.
As long as that rule is obeyed by authors of Kunit test modules, there is
no need to hardcode related IGT subtest names in IGT source code. We are
already able to derive subtest names from module names, with their _test
or _kunit suffixes stripped. We may expect those names will match Kunit
suite names provided by the modules.
Drop custom subtest names from IGT Kunit tests that still use them.
However, keep the mechanism that allows us to provide a name that differs
from that derived from module name. That will be required if we ever need
to support a kunit test module that provides multiple test suites (think
of i915 selftests code converted to kunit and the i915 module potentially
providing three test suites: mock, live and perf).
[1] https://docs.kernel.org/dev-tools/kunit/style.html
Signed-off-by: Janusz Krzysztofik
---
tests/kms_selftest.c | 37 -
1 file changed, 16 insertions(+), 21 deletions(-)
diff --git a/tests/kms_selftest.c b/tests/kms_selftest.c
index 080ffdf2c0..6618dbe50b 100644
--- a/tests/kms_selftest.c
+++ b/tests/kms_selftest.c
@@ -37,35 +37,30 @@
*
* arg[1]:
*
- * @drm_cmdline:drm cmdline
- * @drm_damage: drm damage
- * @drm_dp_mst: drm dp mst
+ * @drm_cmdline_parser: drm cmdline parser
+ * @drm_damage_helper: drm damage helper
+ * @drm_dp_mst_helper: drm dp mst helper
* @drm_format_helper: drm format helper
* @drm_format: drm format
- * @drm_plane: drm plane
- * @framebuffer:framebuffer
+ * @drm_plane_helper: drm plane helper
+ * @drm_framebuffer:drm framebuffer
*/
IGT_TEST_DESCRIPTION("Basic sanity check of KMS selftests.");
-struct kms_kunittests {
- const char *kunit;
- const char *name;
-};
-
igt_main
{
- static const struct kms_kunittests kunit_subtests[] = {
- { "drm_cmdline_parser_test","drm_cmdline" },
- { "drm_damage_helper_test", "drm_damage" },
- { "drm_dp_mst_helper_test", "drm_dp_mst" },
- { "drm_format_helper_test", "drm_format_helper" },
- { "drm_format_test","drm_format" },
- { "drm_framebuffer_test", "framebuffer" },
- { "drm_plane_helper_test", "drm_plane" },
- { NULL, NULL}
+ static const char *kunit_subtests[] = {
+ "drm_cmdline_parser_test",
+ "drm_damage_helper_test",
+ "drm_dp_mst_helper_test",
+ "drm_format_helper_test",
+ "drm_format_test",
+ "drm_framebuffer_test",
+ "drm_plane_helper_test",
+ NULL,
};
- for (int i = 0; kunit_subtests[i].kunit != NULL; i++)
- igt_kunit(kunit_subtests[i].kunit, kunit_subtests[i].name,
NULL);
+ for (int i = 0; kunit_subtests[i] != NULL; i++)
+ igt_kunit(kunit_subtests[i], NULL, NULL);
}
--
2.42.0
[Intel-gfx] [PATCH i-g-t 7/9] lib/ktap: Drop workaround for missing top level KTAP headers
A workaround was implemented in IGT KTAP parser so it could accepted KTAP
reports with missing top level KTAP version and test suite plan headers.
Since kernel side commit c95e7c05c139 ("kunit: Report the count of test
suites in a module"), included in the mainline kernel since v6.6-rc1, has
fixed that issue, that workaround is no longer needed. Drop it.
Signed-off-by: Janusz Krzysztofik
---
lib/igt_ktap.c | 12
lib/tests/igt_ktap_parser.c | 3 +--
2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/lib/igt_ktap.c b/lib/igt_ktap.c
index 53a6c63288..7c52ba11ed 100644
--- a/lib/igt_ktap.c
+++ b/lib/igt_ktap.c
@@ -84,18 +84,6 @@ int igt_ktap_parse(const char *buf, struct igt_ktap_results
*ktap)
igt_debug_on(sscanf(buf,
"%*1[ ]%*1[ ]%*1[ ]%*1[ ]KTAP%*[
]version%*[ ]%u %n",
, ) == 1 && len == strlen(buf))) {
- /*
-* TODO: drop the following workaround as soon as
-* kernel side issue of missing lines with top level
-* KTAP version and test suite plan is fixed.
-*/
- if (ktap->expect == KTAP_START) {
- ktap->suite_count = 1;
- ktap->suite_last = 0;
- ktap->suite_name = NULL;
- ktap->expect = SUITE_START;
- }
-
if (igt_debug_on(ktap->expect != SUITE_START))
return -EPROTO;
diff --git a/lib/tests/igt_ktap_parser.c b/lib/tests/igt_ktap_parser.c
index 6357bdf6a5..476e14092f 100644
--- a/lib/tests/igt_ktap_parser.c
+++ b/lib/tests/igt_ktap_parser.c
@@ -190,8 +190,7 @@ static void ktap_top_version(void)
ktap = igt_ktap_alloc();
igt_require(ktap);
- /* TODO: change to -EPROTO as soon as related workaround is dropped */
- igt_assert_eq(igt_ktap_parse("KTAP version 1\n", ktap),
-EINPROGRESS);
+ igt_assert_eq(igt_ktap_parse("KTAP version 1\n", ktap), -EPROTO);
igt_ktap_free(ktap);
ktap = igt_ktap_alloc();
--
2.42.0
[Intel-gfx] [PATCH i-g-t 8/9] lib/kunit: Fetch a list of test cases in advance
Recent improvements to the kernel kunit framework allow us to obtain a
list of test cases provided by a kunit test module without actually
running them. Use that feature to get a list of expected test cases
before we enter a loop around igt_dynamic(). Once done, enter the
igt_dynamic() section for each consecutive test case immediately, even
before first line of a related KTAP report appears, then look for a result
from that test case. That should make our IGT results output still better
synchronized with related kernel messages.
The list of test cases provided by a kunit test module can be obtained by
loading the kunit base module with specific options, then loading the test
module. For that to be possible, take care of unloading the kunit base
module before each kunit subtest (I was wrong when in one of my previous
commit messages I suggested that on final unload of a kunit test module
the kunit base module is unloaded automatically as its dependency,
however, that didn't matter before, then no separate fix was required).
Since that module can then be left loaded with non-default options if an
error occurs, unload it explicitly before returning from igt_kunit().
There are two possible ways of getting a list of test cases: by loading
the base kunit module with action=list module option, or by filtering
out all test cases from being executed while asking for SKIP results from
those filtered out. Since the latter provides regular KTAP report that we
can alredy parse perfectly, use it instead of trying to identify an
unstructured list of test cases of unknown length submitted by the former.
If an IGT test that calls igt_kunit() provides a subtest name then use
that name to filter out potential test cases that don't belong to the
named test suite from the list.
To avoid loading any modules if no subtest is going to be executed (e.g.,
if a nonexistent subtest has been requested), load the kunit modules in
list mode from inside the igt_subtest_with_dynamic() section. In order to
be free to skip the whole subtest on unmet requirements that need to be
verified after that list has been already populated, clean it up from a
follow up igt_fixture section.
Since we start reading the list of test cases from /dev/kmsg only after
the kunit test module is loaded successfully in list only mode, don't
synchronize reads with potential modprobe breakage in that case, unlike we
still do later when parsing KTAP results in parallel to loading the test
module in normal (execute) mode.
Since we neither fetch KTAP results before entering igt_dynamic section
nor even return an error from KTAP result fetch attempts immediately on
modprobe error or kernel taint, break the loop of dynamic sub-subtests
explicitly as soon as one of those conditions is detected. Also, don't
force IGT SKIP result from the subtest if KTAP parsing hasn't completed.
That's perfectly legitimate since we no longer iterate over KTAP results,
only over a list of test cases obtained in advance, then we stop parsing
KTAP report as soon as we get a result from the last test case from the
list.
Signed-off-by: Janusz Krzysztofik
---
lib/igt_kmod.c | 217 +++--
1 file changed, 157 insertions(+), 60 deletions(-)
diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 387efbb59f..4fba77ead4 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -802,34 +802,36 @@ static int kunit_kmsg_result_get(struct igt_list_head
*results,
if (igt_debug_on(igt_kernel_tainted()))
return -ENOTRECOVERABLE;
- err = igt_debug_on(sigaction(SIGCHLD, , saved));
- if (err == -1)
- return -errno;
- else if (unlikely(err))
- return err;
-
- err = pthread_mutex_lock(>lock);
- switch (err) {
- case EOWNERDEAD:
- /* leave the mutex unrecoverable */
- igt_debug_on(pthread_mutex_unlock(>lock));
- __attribute__ ((fallthrough));
- case ENOTRECOVERABLE:
- igt_debug_on(sigaction(SIGCHLD, saved, NULL));
- if (igt_debug_on(modprobe->err))
- return modprobe->err;
- break;
- case 0:
- break;
- default:
- igt_debug("pthread_mutex_lock() error: %d\n", err);
- igt_debug_on(sigaction(SIGCHLD, saved, NULL));
- return -err;
+ if (modprobe) {
+ err = igt_debug_on(sigaction(SIGCHLD, , saved));
+ if (err == -1)
+ return -errno;
+ else if (unlikely(err))
+ return err;
+
+ err = pthread_mutex_lock(>lock);
+ switch (err) {
+
[Intel-gfx] [PATCH i-g-t 5/9] lib/kunit: Omit suite name prefix if the same as subtest name
Kunit test modules usually contain one test suite, named after the module
name with the trailing "_test" or "_kunit" suffix omitted. Since we
follow the same convention when we derive subtest names from module names,
there is a great chance that those two names match. Take this into
account when composing names for IGT dynamic sub-subtest names and drop
the leading test suite name component when it is the same as subtest name.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Mauro Carvalho Chehab
---
lib/igt_kmod.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 7bca4cdaab..387efbb59f 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -885,7 +885,8 @@ static void kunit_result_free(struct igt_ktap_result **r,
*r = NULL;
}
-static void __igt_kunit(struct igt_ktest *tst, const char *opts)
+static void
+__igt_kunit(struct igt_ktest *tst, const char *name, const char *opts)
{
struct modprobe_data modprobe = { pthread_self(), tst->kmod, opts, 0, };
char *suite_name = NULL, *case_name = NULL;
@@ -928,7 +929,11 @@ static void __igt_kunit(struct igt_ktest *tst, const char
*opts)
r = igt_list_first_entry(, r, link);
- igt_dynamic_f("%s-%s", r->suite_name, r->case_name) {
+ igt_dynamic_f("%s%s%s",
+ strcmp(r->suite_name, name) ? r->suite_name : "",
+ strcmp(r->suite_name, name) ? "-" : "",
+ r->case_name) {
+
if (r->code == IGT_EXIT_INVALID) {
/* parametrized test case, get actual result */
kunit_result_free(, _name, _name);
@@ -1069,7 +1074,7 @@ void igt_kunit(const char *module_name, const char *name,
const char *opts)
* and for documentation.
*/
igt_subtest_with_dynamic(name)
- __igt_kunit(, opts);
+ __igt_kunit(, name, opts);
igt_fixture
igt_ktest_end();
--
2.42.0
[Intel-gfx] [PATCH i-g-t 4/9] lib/kunit: Parse KTAP report from the main process thread
There was an attempt to parse KTAP reports in the background while a kunit
test module is loading. However, since dynamic sub-subtests can be
executed only from the main thread, that attempt was not quite successful,
as IGT results from all executed kunit test cases were generated only
after loading of kunit test module completed.
Now that the parser maintains its state and we can call it separately for
each input line of a KTAP report, it is perfectly possible to call the
parser from the main thread while the module is loading in the background,
and convert results from kunit test cases immediately to results of IGT
dynamic sub-subtests by running an igt_dynamic() section for each result
as soon as returned by the parser.
Drop igt_ktap_parser() thread and execute igt_dynamic() for each kunit
result obtained from igt_ktap_parse() called from the main thread.
Also, drop no longer needed functions from igt_ktap soruces.
v3: Fix ktap structure not freed on lseek error,
- fix initial SIGCHLD handler not restored,
- fix missing handling of potential errors returned by sigaction,
- fix potential race of read() vs. ptherad_kill(), use robust mutex for
synchronization with modprobe thread,
- fix potentially illegal use of igt_assert() called outside of
dynamic sub-subtest section,
- fix unsupported exit code potentially passed to igt_fail(),
- no need to fail a dynamic sub-subtest on potential KTAP parser error
after a valid result from the parser has been processed,
- fix trailing newlines missing from error messages,
- add more debug statements,
- integrate common code around kunit_result_free() into it.
v2: Interrupt blocking read() on modprobe failure.
Signed-off-by: Janusz Krzysztofik
Acked-by: Mauro Carvalho Chehab # v2
---
lib/igt_kmod.c | 261 +++
lib/igt_ktap.c | 568 -
lib/igt_ktap.h | 22 --
3 files changed, 222 insertions(+), 629 deletions(-)
diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 426ae5b26f..7bca4cdaab 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -1,5 +1,5 @@
/*
- * Copyright © 2016 Intel Corporation
+ * Copyright © 2016-2023 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -26,7 +26,12 @@
#include
#include
#include
+#include
+#include
#include
+#include
+
+#include "assembler/brw_compat.h" /* [un]likely() */
#include "igt_aux.h"
#include "igt_core.h"
@@ -748,9 +753,12 @@ void igt_kselftest_get_tests(struct kmod_module *kmod,
}
struct modprobe_data {
+ pthread_t parent;
struct kmod_module *kmod;
const char *opts;
int err;
+ pthread_mutex_t lock;
+ pthread_t thread;
};
static void *modprobe_task(void *arg)
@@ -759,16 +767,132 @@ static void *modprobe_task(void *arg)
data->err = modprobe(data->kmod, data->opts);
+ if (igt_debug_on(data->err)) {
+ int err;
+
+ while (err = pthread_mutex_trylock(>lock),
+ err && !igt_debug_on(err != EBUSY))
+ igt_debug_on(pthread_kill(data->parent, SIGCHLD));
+ } else {
+ /* let main thread use mutex to detect modprobe completion */
+ igt_debug_on(pthread_mutex_lock(>lock));
+ }
+
return NULL;
}
+static void kunit_sigchld_handler(int signal)
+{
+ return;
+}
+
+static int kunit_kmsg_result_get(struct igt_list_head *results,
+struct modprobe_data *modprobe,
+int fd, struct igt_ktap_results *ktap)
+{
+ struct sigaction sigchld = { .sa_handler = kunit_sigchld_handler, },
+*saved;
+ char record[BUF_LEN + 1], *buf;
+ unsigned long taints;
+ int ret;
+
+ do {
+ int err;
+
+ if (igt_debug_on(igt_kernel_tainted()))
+ return -ENOTRECOVERABLE;
+
+ err = igt_debug_on(sigaction(SIGCHLD, , saved));
+ if (err == -1)
+ return -errno;
+ else if (unlikely(err))
+ return err;
+
+ err = pthread_mutex_lock(>lock);
+ switch (err) {
+ case EOWNERDEAD:
+ /* leave the mutex unrecoverable */
+ igt_debug_on(pthread_mutex_unlock(>lock));
+ __attribute__ ((fallthrough));
+ case ENOTRECOVERABLE:
+ igt_debug_on(sigaction(SIGCHLD, saved, NULL));
+ if (igt_debug_on(modprobe->err))
+ return modprobe->err;
+ break;
+ case 0:
+ break;
+ default:
+ igt_debug("pthread_mutex_lock() error: %d\n", err);
+
[Intel-gfx] [PATCH i-g-t 3/9] lib/kunit: Fix misplaced igt_kunit() doc
When igt_kunit() was converted to a helper and wrapped with a new function
promoted to take the name and role of the library API, related
documentation was left unchanged and still placed in front the demoted
function. Update that documentation and move it to where it now belongs.
Signed-off-by: Janusz Krzysztofik
---
lib/igt_kmod.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index df0e650d49..426ae5b26f 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -762,15 +762,6 @@ static void *modprobe_task(void *arg)
return NULL;
}
-/**
- * igt_kunit:
- * @module_name: the name of the module
- * @opts: options to load the module
- *
- * Loads the test module, parses its (k)tap dmesg output, then unloads it
- *
- * Returns: IGT default codes
- */
static void __igt_kunit(struct igt_ktest *tst, const char *opts)
{
struct modprobe_data modprobe = { tst->kmod, opts, 0, };
@@ -849,6 +840,14 @@ static void __igt_kunit(struct igt_ktest *tst, const char
*opts)
igt_skip_on_f(ret, "KTAP parser failed\n");
}
+/**
+ * igt_kunit:
+ * @module_name: the name of the module
+ * @name: the name of subtest, if different from that derived from module name
+ * @opts: options to load the module
+ *
+ * Loads the test module, parses its (k)tap dmesg output, then unloads it
+ */
void igt_kunit(const char *module_name, const char *name, const char *opts)
{
struct igt_ktest tst = { .kmsg = -1, };
--
2.42.0
[Intel-gfx] [PATCH i-g-t 2/9] lib/kunit: Be more verbose on errors
Use a more verbose variant of igt_fail() when failing a dynamic sub-
subtest on kernel taint. Also, print a debug message on string
duplication failure.
Signed-off-by: Janusz Krzysztofik
---
lib/igt_kmod.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 05ff178b27..df0e650d49 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -834,7 +834,7 @@ static void __igt_kunit(struct igt_ktest *tst, const char
*opts)
if (!pthread_tryjoin_np(modprobe_thread, NULL))
igt_assert_eq(modprobe.err, 0);
- igt_fail_on(igt_kernel_tainted());
+ igt_assert_eq(igt_kernel_tainted(), 0);
}
free(result);
@@ -861,7 +861,7 @@ void igt_kunit(const char *module_name, const char *name,
const char *opts)
*/
if (!name) {
name = strdup(module_name);
- if (name) {
+ if (!igt_debug_on(!name)) {
char *suffix = strstr(name, "_test");
if (!suffix)
--
2.42.0
[Intel-gfx] [PATCH i-g-t 1/9] lib/kunit: Fix handling of potential errors from F_GETFL
Function fcntl(..., F_GETFL, ...) that returns file status flags may also return a negative error code. Handle that error instead of blindly using the returned value as flags. Signed-off-by: Janusz Krzysztofik --- lib/igt_kmod.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c index d98e6c5f9e..05ff178b27 100644 --- a/lib/igt_kmod.c +++ b/lib/igt_kmod.c @@ -783,8 +783,8 @@ static void __igt_kunit(struct igt_ktest *tst, const char *opts) igt_skip_on_f(tst->kmsg < 0, "Could not open /dev/kmsg\n"); - flags = fcntl(tst->kmsg, F_GETFL, 0) & ~O_NONBLOCK; - igt_skip_on_f(fcntl(tst->kmsg, F_SETFL, flags) == -1, + igt_skip_on((flags = fcntl(tst->kmsg, F_GETFL, 0), flags < 0)); + igt_skip_on_f(fcntl(tst->kmsg, F_SETFL, flags & ~O_NONBLOCK) == -1, "Could not set /dev/kmsg to blocking mode\n"); igt_skip_on(lseek(tst->kmsg, 0, SEEK_END) < 0); -- 2.42.0
[Intel-gfx] [PATCH i-g-t 0/9] Kunit fixes and improvements
Janusz Krzysztofik (9): lib/kunit: Fix handling of potential errors from F_GETFL lib/kunit: Be more verbose on errors lib/kunit: Fix misplaced igt_kunit() doc lib/kunit: Parse KTAP report from the main process thread lib/kunit: Omit suite name prefix if the same as subtest name tests/kms_selftest: Let subtest names match suite names lib/ktap: Drop workaround for missing top level KTAP headers lib/kunit: Fetch a list of test cases in advance lib/kunit: Execute kunit test cases only when needed lib/igt_kmod.c | 413 + lib/igt_ktap.c | 580 lib/igt_ktap.h | 22 -- lib/tests/igt_ktap_parser.c | 3 +- tests/kms_selftest.c| 37 +-- 5 files changed, 369 insertions(+), 686 deletions(-) -- 2.42.0
Re: [Intel-gfx] [PATCH] drm/i915: Abstract display info away during probe
On Mon, 02 Oct 2023, Rodrigo Vivi wrote: > On Mon, Oct 02, 2023 at 07:58:30PM +0300, Jani Nikula wrote: >> On Mon, 02 Oct 2023, Rodrigo Vivi wrote: >> > On Mon, Oct 02, 2023 at 10:41:14AM +0300, Jani Nikula wrote: >> >> On Fri, 29 Sep 2023, Rodrigo Vivi wrote: >> >> > The goal is to have this function ready for Xe to use >> >> > directly. So, let's use the available macro. >> >> >> >> Seesm wrong to use DISPLAY_INFO() as an lvalue >> > >> > to be really honestly I don't like that either. >> > I barely like macros, specially used like this. >> > >> >> and I'm not sure why >> >> this wouldn't work as-is. >> > >> > I should probably had collected some logs and added to the >> > commit message. But the thing was that without this assignment, >> > (xe)->info.display was NULL and the memcpy below was exploding >> > with NULL dereference. >> >> Aww crap. That's because both DISPLAY_INFO() and DISPLAY_RUNTIME_INFO() >> in xe are completely bogus. >> >> They should be >> >> #define DISPLAY_INFO(i915) ((i915)->display.info.__device_info) >> #define DISPLAY_RUNTIME_INFO(i915) (&(i915)->display.info.__runtime_info) >> >> instead of >> >> #define DISPLAY_INFO(xe) ((xe)->info.display) >> #define DISPLAY_RUNTIME_INFO(xe) (&(xe)->info.display_runtime) >> >> and these should be removed from struct xe_device info member: >> >> const struct intel_display_device_info *display; >> struct intel_display_runtime_info display_runtime; > > but in this case we would need the macros in Xe to resolve the access > to these items anyway right?! > > or how should we handle cases like 'if (xe->info.display_runtime.pipe_mask)' > ? Hrmh, we should *not* have code doing direct dereference chases like that to begin with. :( I sent a series addressing this. But discovered a bunch of weirdness around the concepts of "have display" and "display enabled" in xe that I'm not sure what to do with. It took years to crystallize those concepts in i915, and xe confuses them again. :( BR, Jani. > > > >> >> BR, >> Jani. >> >> >> > >> >> >> >> But *shrug*. >> >> >> >> Reviewed-by: Jani Nikula >> > >> > thanks, pushed as is. >> > >> >> >> >> for merging to i915. (xe should come as a backport with cherry-pick -x.) >> > >> > and sent the proper backported cherry-pick to intel-xe ml. >> > >> >> >> >> BR, >> >> Jani >> >> >> >> >> >> > >> >> > Cc: Jani Nikula >> >> > Signed-off-by: Rodrigo Vivi >> >> > --- >> >> > drivers/gpu/drm/i915/display/intel_display_device.c | 2 +- >> >> > 1 file changed, 1 insertion(+), 1 deletion(-) >> >> > >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c >> >> > b/drivers/gpu/drm/i915/display/intel_display_device.c >> >> > index a6a18eae7ae8..ce55b968e658 100644 >> >> > --- a/drivers/gpu/drm/i915/display/intel_display_device.c >> >> > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c >> >> > @@ -926,7 +926,7 @@ void intel_display_device_probe(struct >> >> > drm_i915_private *i915) >> >> > else >> >> > info = probe_display(i915); >> >> > >> >> > - i915->display.info.__device_info = info; >> >> > + DISPLAY_INFO(i915) = info; >> >> > >> >> > memcpy(DISPLAY_RUNTIME_INFO(i915), >> >> >_INFO(i915)->__runtime_defaults, >> >> >> >> -- >> >> Jani Nikula, Intel >> >> -- >> Jani Nikula, Intel -- Jani Nikula, Intel
Re: [Intel-gfx] [PATCH v2 00/15] sysctl: Remove sentinel elements from drivers
On Mon, Oct 02, 2023 at 12:27:18PM +, Christophe Leroy wrote:
>
>
> Le 02/10/2023 à 10:55, Joel Granados via B4 Relay a écrit :
> > From: Joel Granados
> >
<--- snip --->
> > - The "yesall" config saves 2432 bytes [4]
> > - The "tiny" config saves 64 bytes [5]
> > * memory usage:
> > In this case there were no bytes saved because I do not have any
> > of the drivers in the patch. To measure it comment the printk in
> > `new_dir` and uncomment the if conditional in `new_links` [3].
> >
> > ---
> > Changes in v2:
> > - Left the dangling comma in the ctl_table arrays.
> > - Link to v1:
> > https://lore.kernel.org/r/20230928-jag-sysctl_remove_empty_elem_drivers-v1-0-e59120fca...@samsung.com
> >
> > Comments/feedback greatly appreciated
>
> Same problem on powerpc CI tests, all boot target failed, most of them
> with similar OOPS, see
> https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20231002-jag-sysctl_remove_empty_elem_drivers-v2-15-02dd0d46f...@samsung.com/
I found the culprit!. Here you are rebasing on top of v6.5.0-rc6 "INFO:
Looking for kernel version: 6.5.0-rc6-gbf2ac4d7d596". The error makes
sense becuase in that version we have not introduced the stopping
criteria based on the ctl_table array size, so the loop continues
looking for an empty sentinel past valid memory (and does not find it).
The ctl_table check catches it but then fails to do a proper error
because we have already tried to access invalid memory. The solution
here is to make sure to rebase in on top of the latest rc in v6.6.
>
> What is strange is that I pushed your series into my github account, and
> got no failure, see https://github.com/chleroy/linux/actions/runs/6378951278
And here it works because you use the latest rc : "INFO: Looking for
kernel version: 6.6.0-rc3-g23d4b5db743c"
>
> Christophe
>
> >
> > Best
> >
> > Joel
> >
> > [1]
> > We are able to remove a sentinel table without behavioral change by
> > introducing a table_size argument in the same place where procname is
> > checked for NULL. The idea is for it to keep stopping when it hits
> > ->procname == NULL, while the sentinel is still present. And when the
> > sentinel is removed, it will stop on the table_size. You can go to
> > (https://lore.kernel.org/all/20230809105006.1198165-1-j.grana...@samsung.com/)
> > for more information.
> >
> > [2]
> > Links Related to the ctl_table sentinel removal:
> > * Good summary from Luis sent with the "pull request" for the
> >preparation patches.
> >https://lore.kernel.org/all/zo5yx5jfoggi%2f...@bombadil.infradead.org/
> > * Another very good summary from Luis.
> >https://lore.kernel.org/all/zmfizkfkvxuft...@bombadil.infradead.org/
> > * This is a patch set that replaces register_sysctl_table with
> > register_sysctl
> >https://lore.kernel.org/all/20230302204612.782387-1-mcg...@kernel.org/
> > * Patch set to deprecate register_sysctl_paths()
> >https://lore.kernel.org/all/20230302202826.776286-1-mcg...@kernel.org/
> > * Here there is an explicit expectation for the removal of the sentinel
> > element.
> >https://lore.kernel.org/all/20230321130908.6972-1-frank...@vivo.com
> > * The "ARRAY_SIZE" approach was mentioned (proposed?) in this thread
> >https://lore.kernel.org/all/20220220060626.15885-1-tangm...@uniontech.com
> >
> > [3]
> > To measure the in memory savings apply this on top of this patchset.
> >
> > "
> > diff --git a/fs/proc/proc_sysctl.c b/fs/proc/proc_sysctl.c
> > index c88854df0b62..e0073a627bac 100644
> > --- a/fs/proc/proc_sysctl.c
> > +++ b/fs/proc/proc_sysctl.c
> > @@ -976,6 +976,8 @@ static struct ctl_dir *new_dir(struct ctl_table_set
> > *set,
> > table[0].procname = new_name;
> > table[0].mode = S_IFDIR|S_IRUGO|S_IXUGO;
> > init_header(>header, set->dir.header.root, set, node, table,
> > 1);
> > + // Counts additional sentinel used for each new dir.
> > + printk("%ld sysctl saved mem kzalloc \n", sizeof(struct ctl_table));
> >
> > return new;
> > }
> > @@ -1199,6 +1201,9 @@ static struct ctl_table_header *new_links(struct
> > ctl_dir *dir, struct ctl_table_
> > link_name += len;
> > link++;
> > }
> > + // Counts additional sentinel used for each new registration
> > + //if ((head->ctl_table + head->ctl_table_size)->procname)
> > + printk("%ld sysctl saved mem kzalloc \n", sizeof(struct
> > ctl_table));
> > init_header(links, dir->header.root, dir->header.set, node,
> > link_table,
> > head->ctl_table_size);
> > links->nreg = nr_entries;
> > "
> > and then run the following bash script in the kernel:
> >
> > accum=0
> > for n in $(dmesg | grep kzalloc | awk '{print $3}') ; do
> > echo $n
> > accum=$(calc "$accum + $n")
> > done
> > echo $accum
> >
> > [4]
> > add/remove: 0/0 grow/shrink: 0/21 up/down: 0/-2432 (-2432)
> >
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add wrapper for getiing display step (rev2)
== Series Details == Series: drm/i915: Add wrapper for getiing display step (rev2) URL : https://patchwork.freedesktop.org/series/124340/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13702 -> Patchwork_124340v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_124340v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_124340v2, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/index.html Participating hosts (37 -> 38) -- Additional (3): fi-skl-guc bat-adlm-1 bat-adlp-6 Missing(2): bat-dg2-9 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_124340v2: ### IGT changes ### Possible regressions * igt@gem_exec_suspend@basic-s0@smem: - fi-skl-6600u: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13702/fi-skl-6600u/igt@gem_exec_suspend@basic...@smem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/fi-skl-6600u/igt@gem_exec_suspend@basic...@smem.html Known issues Here are the changes found in Patchwork_124340v2 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-adlp-6: NOTRUN -> [SKIP][3] ([i915#9318]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlp-6/igt@debugfs_t...@basic-hwmon.html - bat-adlm-1: NOTRUN -> [SKIP][4] ([i915#3826]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlm-1/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@eof: - bat-adlm-1: NOTRUN -> [SKIP][5] ([i915#2582]) +3 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlm-1/igt@fb...@eof.html * igt@fbdev@info: - bat-adlm-1: NOTRUN -> [SKIP][6] ([i915#1849] / [i915#2582]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlm-1/igt@fb...@info.html * igt@gem_lmem_swapping@basic: - fi-skl-guc: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/fi-skl-guc/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-adlm-1: NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_tiled_pread_basic: - bat-adlp-6: NOTRUN -> [SKIP][9] ([i915#3282]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlp-6/igt@gem_tiled_pread_basic.html - bat-adlm-1: NOTRUN -> [SKIP][10] ([i915#3282]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlm-1/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-adlm-1: NOTRUN -> [SKIP][11] ([i915#6621]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlm-1/igt@i915_pm_...@basic-api.html * igt@i915_suspend@basic-s3-without-i915: - bat-mtlp-6: NOTRUN -> [SKIP][12] ([i915#6645]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-mtlp-6/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-adlp-6: NOTRUN -> [SKIP][13] ([i915#4103] / [i915#5608]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlp-6/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size: - bat-adlm-1: NOTRUN -> [SKIP][14] ([i915#1845]) +17 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlm-1/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html * igt@kms_dsc@dsc-basic: - fi-skl-guc: NOTRUN -> [SKIP][15] ([fdo#109271]) +12 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/fi-skl-guc/igt@kms_...@dsc-basic.html - bat-adlp-6: NOTRUN -> [SKIP][16] ([i915#3555] / [i915#3840]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlp-6/igt@kms_...@dsc-basic.html * igt@kms_flip@basic-plain-flip: - bat-adlm-1: NOTRUN -> [SKIP][17] ([i915#3637]) +3 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124340v2/bat-adlm-1/igt@kms_f...@basic-plain-flip.html * igt@kms_force_connector_basic@force-load-detect: - bat-adlm-1:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add wrapper for getiing display step (rev2)
== Series Details == Series: drm/i915: Add wrapper for getiing display step (rev2) URL : https://patchwork.freedesktop.org/series/124340/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH 3/3] drm/i915/gt: remove i915->gt0 in favour of i915->gt[0]
Hi Jani, On Mon, Oct 02, 2023 at 11:47:04AM +0300, Jani Nikula wrote: > Since gt0 == i915->gt[0], just drop the former. > > Signed-off-by: Jani Nikula Looks correct! Reviewed-by: Andi Shyti Thanks, Andi
Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: Clarify type evolution of uabi_node/uabi_engines
On 29/09/2023 12:00, Tvrtko Ursulin wrote:
On 28/09/2023 19:20, Mathias Krause wrote:
Chaining user engines happens in multiple passes during driver
initialization, mutating its type along the way. It starts off with a
simple lock-less linked list (struct llist_node/head) populated by
intel_engine_add_user() which later gets sorted and converted to an
intermediate regular list (struct list_head) just to be converted once
more to its final rb-tree structure (struct rb_node/root) in
intel_engines_driver_register().
All of these types overlay the uabi_node/uabi_engines members which is
unfortunate but safe if one takes care about using the rb-tree based
structure only after the conversion has completed. However, mistakes
happen and commit 1ec23ed7126e ("drm/i915: Use uabi engines for the
default engine map") violated that assumption, as the multiple type
evolution was all to easy hidden behind casts papering over it.
Make the type evolution of uabi_node/uabi_engines more visible by
putting all members into an anonymous union and use the correctly typed
member in its various users. This allows us to drop quite some ugly
casts and, hopefully, make the evolution of the members better
recognisable to avoid future mistakes.
Signed-off-by: Mathias Krause
---
drivers/gpu/drm/i915/gt/intel_engine_types.h | 10 +-
drivers/gpu/drm/i915/gt/intel_engine_user.c | 17 +++--
drivers/gpu/drm/i915/i915_drv.h | 17 -
3 files changed, 32 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index a7e677598004..7585fffac60b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -402,7 +402,15 @@ struct intel_engine_cs {
unsigned long context_tag;
- struct rb_node uabi_node;
+ /*
+ * The type evolves during initialization, see related comment for
+ * struct drm_i915_private's uabi_engines member.
+ */
+ union {
+ struct llist_node uabi_llist;
+ struct list_head uabi_list;
+ struct rb_node uabi_node;
+ };
struct intel_sseu sseu;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index dcedff41a825..118164ddbb2e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -38,8 +38,7 @@ intel_engine_lookup_user(struct drm_i915_private
*i915, u8 class, u8 instance)
void intel_engine_add_user(struct intel_engine_cs *engine)
{
- llist_add((struct llist_node *)>uabi_node,
- (struct llist_head *)>i915->uabi_engines);
+ llist_add(>uabi_llist, >i915->uabi_engines_llist);
}
static const u8 uabi_classes[] = {
@@ -54,9 +53,9 @@ static int engine_cmp(void *priv, const struct
list_head *A,
const struct list_head *B)
{
const struct intel_engine_cs *a =
- container_of((struct rb_node *)A, typeof(*a), uabi_node);
+ container_of(A, typeof(*a), uabi_list);
const struct intel_engine_cs *b =
- container_of((struct rb_node *)B, typeof(*b), uabi_node);
+ container_of(B, typeof(*b), uabi_list);
if (uabi_classes[a->class] < uabi_classes[b->class])
return -1;
@@ -73,7 +72,7 @@ static int engine_cmp(void *priv, const struct
list_head *A,
static struct llist_node *get_engines(struct drm_i915_private *i915)
{
- return llist_del_all((struct llist_head *)>uabi_engines);
+ return llist_del_all(>uabi_engines_llist);
}
static void sort_engines(struct drm_i915_private *i915,
@@ -83,9 +82,8 @@ static void sort_engines(struct drm_i915_private *i915,
llist_for_each_safe(pos, next, get_engines(i915)) {
struct intel_engine_cs *engine =
- container_of((struct rb_node *)pos, typeof(*engine),
- uabi_node);
- list_add((struct list_head *)>uabi_node, engines);
+ container_of(pos, typeof(*engine), uabi_llist);
+ list_add(>uabi_list, engines);
}
list_sort(NULL, engines, engine_cmp);
}
@@ -213,8 +211,7 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
p = >uabi_engines.rb_node;
list_for_each_safe(it, next, ) {
struct intel_engine_cs *engine =
- container_of((struct rb_node *)it, typeof(*engine),
- uabi_node);
+ container_of(it, typeof(*engine), uabi_list);
if (intel_gt_has_unrecoverable_error(engine->gt))
continue; /* ignore incomplete engines */
diff --git a/drivers/gpu/drm/i915/i915_drv.h
b/drivers/gpu/drm/i915/i915_drv.h
index 7a8ce7239bc9..c8690d1d5e51 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -222,7 +222,22 @@ struct drm_i915_private {
bool mchbar_need_disable;
} gmch;
- struct rb_root uabi_engines;
+ /*
+ * Chaining user engines
[Intel-gfx] [PATCH] drm/i915: Add wrapper for getting display step
Add a wrapper around intel_step_name that takes in driver data as an
argument. This wrapper will help maintain compatibility with the
proposed xe driver.
Signed-off-by: Chaitanya Kumar Borah
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/intel_step.c| 5 +
drivers/gpu/drm/i915/intel_step.h| 1 +
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display/intel_dmc.c
index 1623c0c5e8a1..63e080e07023 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -309,7 +309,7 @@ static const struct stepping_info *
intel_get_stepping_info(struct drm_i915_private *i915,
struct stepping_info *si)
{
- const char *step_name =
intel_step_name(RUNTIME_INFO(i915)->step.display_step);
+ const char *step_name = intel_display_step_name(i915);
si->stepping = step_name[0];
si->substepping = step_name[1];
diff --git a/drivers/gpu/drm/i915/intel_step.c
b/drivers/gpu/drm/i915/intel_step.c
index ee4e5a2c0220..b4162f1be765 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -353,3 +353,8 @@ const char *intel_step_name(enum intel_step step)
return "**";
}
}
+
+const char *intel_display_step_name(struct drm_i915_private *i915)
+{
+ return intel_step_name(RUNTIME_INFO(i915)->step.display_step);
+}
diff --git a/drivers/gpu/drm/i915/intel_step.h
b/drivers/gpu/drm/i915/intel_step.h
index 96dfca4cba73..b6f43b624774 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -78,5 +78,6 @@ enum intel_step {
void intel_step_init(struct drm_i915_private *i915);
const char *intel_step_name(enum intel_step step);
+const char *intel_display_step_name(struct drm_i915_private *i915);
#endif /* __INTEL_STEP_H__ */
--
2.25.1
Re: [Intel-gfx] [PATCH 2/3] drm/i915: allocate i915->gt0 dynamically
Hi Jani, On Mon, Oct 02, 2023 at 11:47:03AM +0300, Jani Nikula wrote: > Convert i915->gt0 to a pointer, and allocate it dynamically. > > Signed-off-by: Jani Nikula Reviewed-by: Andi Shyti Thanks, Andi
Re: [Intel-gfx] [PATCH 1/3] drm/i915/mocs: use to_gt() instead of direct >gt
Hi Jani, On Mon, Oct 02, 2023 at 11:47:02AM +0300, Jani Nikula wrote: > Have to give up the const on i915 pointer, but it's not big of a deal > considering non-const i915 gets passed all over the place. > > Signed-off-by: Jani Nikula Reviewed-by: Andi Shyti Thanks, Andi
