date:20231011

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove the module parameter 'fastboot' (rev5)

2023-10-11 Thread Patchwork

== Series Details ==

Series: drm/i915: Remove the module parameter 'fastboot' (rev5)
URL   : https://patchwork.freedesktop.org/series/124255/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13741 -> Patchwork_124255v5


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/index.html

Participating hosts (39 -> 37)
--

  Additional (1): fi-pnv-d510 
  Missing(3): fi-kbl-soraka bat-kbl-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_124255v5 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- fi-hsw-4770:[PASS][1] -> [FAIL][2] ([i915#8293])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/fi-hsw-4770/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/fi-hsw-4770/boot.html

  
 Possible fixes 

  * boot:
- fi-bsw-n3050:   [FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/fi-bsw-n3050/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/fi-bsw-n3050/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s0@smem:
- bat-jsl-3:  [PASS][5] -> [INCOMPLETE][6] ([i915#9275])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][7] ([fdo#109271]) +18 other tests 
skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-glk-j4005:   [PASS][8] -> [DMESG-FAIL][9] ([i915#5334])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-jsl-3:  [PASS][10] -> [FAIL][11] ([fdo#103375])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- bat-adlp-11:[PASS][12] -> [DMESG-WARN][13] ([i915#6868])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/bat-adlp-11/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/bat-adlp-11/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-bsw-n3050:   NOTRUN -> [FAIL][14] ([IGT#3])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/fi-bsw-n3050/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_psr@primary_page_flip:
- fi-pnv-d510:NOTRUN -> [SKIP][15] ([fdo#109271]) +29 other tests 
skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/fi-pnv-d510/igt@kms_psr@primary_page_flip.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275


Build changes
-

  * Linux: CI_DRM_13741 -> Patchwork_124255v5

  CI-20190529: 20190529
  CI_DRM_13741: 46d442e3684a03ccb1bc9e9822acdd33f264d521 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7532: bf24b157b1049afc086fe65a60b22bd6bb3e18b7 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_124255v5: 46d442e3684a03ccb1bc9e9822acdd33f264d521 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

6075e48b15be drm/i915: Remove the module parameter 'fastboot'

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124255v5/index.html

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Remove the module parameter 'fastboot' (rev5)

2023-10-11 Thread Patchwork

== Series Details ==

Series: drm/i915: Remove the module parameter 'fastboot' (rev5)
URL   : https://patchwork.freedesktop.org/series/124255/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v5 0/2] Refactor i915 HDCP for XE

2023-10-11 Thread Shankar, Uma




> -Original Message-
> From: Intel-gfx  On Behalf Of Jani
> Nikula
> Sent: Wednesday, October 11, 2023 6:41 PM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v5 0/2] Refactor i915 HDCP for XE
> 
> On Mon, 09 Oct 2023, Suraj Kandpal  wrote:
> > This patch series contains some refactors for i915 side of things
> > which will help with a cleaner code and maximum reuse of code for XE
> > going forward.
> >
> > Signed-off-by: Suraj Kandpal 
> 
> Acked-by: Jani Nikula 

Pushed to drm-intel-next. Thanks for the patch and reviews.

Regards,
Uma Shankar

> 
> >
> > Suraj Kandpal (2):
> >   drm/i915/hdcp: Move checks for gsc health status
> >   drm/i915/hdcp: Move common message filling function to its own file
> >
> >  drivers/gpu/drm/i915/Makefile |   1 +
> >  drivers/gpu/drm/i915/display/intel_hdcp.c |   8 +-
> >  drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 617 +-
> >  drivers/gpu/drm/i915/display/intel_hdcp_gsc.h |   1 +
> >  .../drm/i915/display/intel_hdcp_gsc_message.c | 592 +
> > .../drm/i915/display/intel_hdcp_gsc_message.h |  72 ++
> >  6 files changed, 692 insertions(+), 599 deletions(-)  create mode
> > 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c
> >  create mode 100644
> > drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.h
> 
> --
> Jani Nikula, Intel

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Support FP16 compressed formats on MTL

2023-10-11 Thread Patchwork

== Series Details ==

Series: drm/i915: Support FP16 compressed formats on MTL
URL   : https://patchwork.freedesktop.org/series/124957/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13741 -> Patchwork_124957v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_124957v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_124957v1, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/index.html

Participating hosts (39 -> 38)
--

  Additional (1): fi-pnv-d510 
  Missing(2): fi-kbl-soraka fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_124957v1:

### IGT changes ###

 Possible regressions 

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-adlm-1: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/bat-adlm-1/igt@kms_force_connector_ba...@prune-stale-modes.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/bat-adlm-1/igt@kms_force_connector_ba...@prune-stale-modes.html

  
Known issues


  Here are the changes found in Patchwork_124957v1 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- fi-bsw-n3050:   [FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/fi-bsw-n3050/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/fi-bsw-n3050/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][5] ([fdo#109271]) +18 other tests 
skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  * igt@i915_selftest@live@migrate:
- bat-dg2-11: [PASS][6] -> [DMESG-FAIL][7] ([i915#7699])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/bat-dg2-11/igt@i915_selftest@l...@migrate.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/bat-dg2-11/igt@i915_selftest@l...@migrate.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-bsw-n3050:   NOTRUN -> [FAIL][8] ([IGT#3])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/fi-bsw-n3050/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-5:
- bat-adlp-11:[PASS][9] -> [ABORT][10] ([i915#8668] / [i915#9451])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-c-dp-5.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-c-dp-5.html

  * igt@kms_psr@primary_page_flip:
- fi-pnv-d510:NOTRUN -> [SKIP][11] ([fdo#109271]) +29 other tests 
skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/fi-pnv-d510/igt@kms_psr@primary_page_flip.html

  
 Possible fixes 

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-dp-5:
- bat-adlp-11:[ABORT][12] ([i915#8668]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-dp-5.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-dp-5.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9451]: https://gitlab.freedesktop.org/drm/intel/issues/9451


Build changes
-

  * Linux: CI_DRM_13741 -> Patchwork_124957v1

  CI-20190529: 20190529
  CI_DRM_13741: 46d442e3684a03ccb1bc9e9822acdd33f264d521 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7532: bf24b157b1049afc086fe65a60b22bd6bb3e18b7 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_124957v1: 46d442e3684a03ccb1bc9e9822acdd33f264d521 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

552d92477b87 drm/i915: Support FP16 compressed formats on MTL

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124957v1/index.html

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add new DG2 PCI IDs (rev2)

2023-10-11 Thread Patchwork

== Series Details ==

Series: drm/i915: Add new DG2 PCI IDs (rev2)
URL   : https://patchwork.freedesktop.org/series/124937/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13741 -> Patchwork_124937v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124937v2/index.html

Participating hosts (39 -> 39)
--

  Additional (1): fi-pnv-d510 
  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_124937v2 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- fi-bsw-n3050:   [FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/fi-bsw-n3050/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124937v2/fi-bsw-n3050/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][3] ([fdo#109271]) +18 other tests 
skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124937v2/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka:  [PASS][4] -> [DMESG-FAIL][5] ([i915#5334] / 
[i915#7872])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124937v2/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-bsw-n3050:   NOTRUN -> [FAIL][6] ([IGT#3])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124937v2/fi-bsw-n3050/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_psr@primary_page_flip:
- fi-pnv-d510:NOTRUN -> [SKIP][7] ([fdo#109271]) +29 other tests 
skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124937v2/fi-pnv-d510/igt@kms_psr@primary_page_flip.html

  
 Possible fixes 

  * igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [FAIL][8] ([IGT#3]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13741/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124937v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293


Build changes
-

  * Linux: CI_DRM_13741 -> Patchwork_124937v2

  CI-20190529: 20190529
  CI_DRM_13741: 46d442e3684a03ccb1bc9e9822acdd33f264d521 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7532: bf24b157b1049afc086fe65a60b22bd6bb3e18b7 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_124937v2: 46d442e3684a03ccb1bc9e9822acdd33f264d521 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

8cf4ec91909b drm/i915: Add new DG2 PCI IDs

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124937v2/index.html

Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree

2023-10-11 Thread Stephen Rothwell

Hi all,

On Thu, 12 Oct 2023 12:22:09 +1100 Stephen Rothwell  
wrote:
>
> After merging the drm-misc tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
> 
> drivers/usb/typec/altmodes/displayport.c: In function 'dp_altmode_vdm':
> drivers/usb/typec/altmodes/displayport.c:309:33: error: too few arguments to 
> function 'drm_connector_oob_hotplug_event'
>   309 | 
> drm_connector_oob_hotplug_event(dp->connector_fwnode);
>   | ^~~
> In file included from drivers/usb/typec/altmodes/displayport.c:17:
> include/drm/drm_connector.h:1984:6: note: declared here
>  1984 | void drm_connector_oob_hotplug_event(struct fwnode_handle 
> *connector_fwnode,
>   |  ^~~
> 
> Caused by commit
> 
>   fc93835bb0d7 ("drm: Add HPD state to drm_connector_oob_hotplug_event()")
> 
> interacting with commit
> 
>   89434b069e46 ("usb: typec: altmodes/displayport: Signal hpd low when 
> exiting mode")
> 
> from the usb.current tree.
> 
> I have applied the following merge fix patch.
> 
> From: Stephen Rothwell 
> Date: Thu, 12 Oct 2023 12:17:31 +1100
> Subject: [PATCH] fix up for "drm: Add HPD state to
>  drm_connector_oob_hotplug_event()"
> 
> interacting with commit
> 
>   89434b069e46 ("usb: typec: altmodes/displayport: Signal hpd low when 
> exiting mode")
> 
> Signed-off-by: Stephen Rothwell 
> ---
>  drivers/usb/typec/altmodes/displayport.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/usb/typec/altmodes/displayport.c 
> b/drivers/usb/typec/altmodes/displayport.c
> index ddfb5b6ace4f..eb0bf08fc97a 100644
> --- a/drivers/usb/typec/altmodes/displayport.c
> +++ b/drivers/usb/typec/altmodes/displayport.c
> @@ -306,7 +306,8 @@ static int dp_altmode_vdm(struct typec_altmode *alt,
>   dp->data.status = 0;
>   dp->data.conf = 0;
>   if (dp->hpd) {
> - 
> drm_connector_oob_hotplug_event(dp->connector_fwnode);
> + 
> drm_connector_oob_hotplug_event(dp->connector_fwnode

Pretend that there is a comma at the end of the above line :-)

> + 
> connector_status_disconnected);
>   dp->hpd = false;
>   sysfs_notify(>alt->dev.kobj, "displayport", 
> "hpd");
>   }
> -- 
> 2.40.1

-- 
Cheers,
Stephen Rothwell


pgpblSslR0leq.pgp
Description: OpenPGP digital signature

[Intel-gfx] linux-next: build failure after merge of the drm-misc tree

2023-10-11 Thread Stephen Rothwell

Hi all,

After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) failed like this:

drivers/usb/typec/altmodes/displayport.c: In function 'dp_altmode_vdm':
drivers/usb/typec/altmodes/displayport.c:309:33: error: too few arguments to 
function 'drm_connector_oob_hotplug_event'
  309 | 
drm_connector_oob_hotplug_event(dp->connector_fwnode);
  | ^~~
In file included from drivers/usb/typec/altmodes/displayport.c:17:
include/drm/drm_connector.h:1984:6: note: declared here
 1984 | void drm_connector_oob_hotplug_event(struct fwnode_handle 
*connector_fwnode,
  |  ^~~

Caused by commit

  fc93835bb0d7 ("drm: Add HPD state to drm_connector_oob_hotplug_event()")

interacting with commit

  89434b069e46 ("usb: typec: altmodes/displayport: Signal hpd low when exiting 
mode")

from the usb.current tree.

I have applied the following merge fix patch.

From: Stephen Rothwell 
Date: Thu, 12 Oct 2023 12:17:31 +1100
Subject: [PATCH] fix up for "drm: Add HPD state to
 drm_connector_oob_hotplug_event()"

interacting with commit

  89434b069e46 ("usb: typec: altmodes/displayport: Signal hpd low when exiting 
mode")

Signed-off-by: Stephen Rothwell 
---
 drivers/usb/typec/altmodes/displayport.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/typec/altmodes/displayport.c 
b/drivers/usb/typec/altmodes/displayport.c
index ddfb5b6ace4f..eb0bf08fc97a 100644
--- a/drivers/usb/typec/altmodes/displayport.c
+++ b/drivers/usb/typec/altmodes/displayport.c
@@ -306,7 +306,8 @@ static int dp_altmode_vdm(struct typec_altmode *alt,
dp->data.status = 0;
dp->data.conf = 0;
if (dp->hpd) {
-   
drm_connector_oob_hotplug_event(dp->connector_fwnode);
+   
drm_connector_oob_hotplug_event(dp->connector_fwnode
+   
connector_status_disconnected);
dp->hpd = false;
sysfs_notify(>alt->dev.kobj, "displayport", 
"hpd");
}
-- 
2.40.1

-- 
Cheers,
Stephen Rothwell


pgpetFx2r98Vf.pgp
Description: OpenPGP digital signature

Re: [Intel-gfx] [PATCH dii-client 2/2] drm/i915: Use selective tlb invalidations where supported

2023-10-11 Thread kernel test robot

Hi Jonathan,

kernel test robot noticed the following build errors:

[auto build test ERROR on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/Jonathan-Cavitt/drm-i915-Use-selective-tlb-invalidations-where-supported/20231011-034501
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20231010184423.2118908-4-jonathan.cavitt%40intel.com
patch subject: [Intel-gfx] [PATCH dii-client 2/2] drm/i915: Use selective tlb 
invalidations where supported
config: x86_64-rhel-8.3-rust 
(https://download.01.org/0day-ci/archive/20231012/202310120817.oz9qyp5h-...@intel.com/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git 
ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/20231012/202310120817.oz9qyp5h-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/202310120817.oz9qyp5h-...@intel.com/

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/i915_vma.c:1343:4: error: expected ')'
   u64 start, u64 size)
   ^
   drivers/gpu/drm/i915/i915_vma.c:1342:24: note: to match this '('
   void vma_invalidate_tlb(struct i915_address_space *vm, u32 *tlb
  ^
>> drivers/gpu/drm/i915/i915_vma.c:1342:6: error: conflicting types for 
>> 'vma_invalidate_tlb'
   void vma_invalidate_tlb(struct i915_address_space *vm, u32 *tlb
^
   drivers/gpu/drm/i915/i915_vma.h:263:6: note: previous declaration is here
   void vma_invalidate_tlb(struct i915_address_space *vm, u32 *tlb,
^
>> drivers/gpu/drm/i915/i915_vma.c:1360:42: error: use of undeclared identifier 
>> 'start'; did you mean 'stac'?
   if (!intel_gt_invalidate_tlb_range(gt, start, size))
  ^
  stac
   arch/x86/include/asm/smap.h:36:29: note: 'stac' declared here
   static __always_inline void stac(void)
   ^
>> drivers/gpu/drm/i915/i915_vma.c:1360:49: error: use of undeclared identifier 
>> 'size'; did you mean 'ksize'?
   if (!intel_gt_invalidate_tlb_range(gt, start, size))
 ^~~~
 ksize
   include/linux/slab.h:245:8: note: 'ksize' declared here
   size_t ksize(const void *objp);
  ^
   4 errors generated.


vim +1343 drivers/gpu/drm/i915/i915_vma.c

  1341  
> 1342  void vma_invalidate_tlb(struct i915_address_space *vm, u32 *tlb
> 1343  u64 start, u64 size)
  1344  {
  1345  struct intel_gt *gt;
  1346  int id;
  1347  
  1348  if (!tlb)
  1349  return;
  1350  
  1351  /*
  1352   * Before we release the pages that were bound by this vma, we
  1353   * must invalidate all the TLBs that may still have a reference
  1354   * back to our physical address. It only needs to be done once,
  1355   * so after updating the PTE to point away from the pages, 
record
  1356   * the most recent TLB invalidation seqno, and if we have not 
yet
  1357   * flushed the TLBs upon release, perform a full invalidation.
  1358   */
  1359  for_each_gt(gt, vm->i915, id) {
> 1360  if (!intel_gt_invalidate_tlb_range(gt, start, size))
  1361  WRITE_ONCE(tlb[id],
  1362 
intel_gt_next_invalidate_tlb_full(gt));
  1363  }
  1364  }
  1365  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Drop redundant !modeset check

2023-10-11 Thread Lisovskiy, Stanislav

On Wed, Oct 11, 2023 at 06:50:05PM +0300, Ville Syrjälä wrote:
> On Wed, Oct 11, 2023 at 04:47:00PM +0300, Lisovskiy, Stanislav wrote:
> > On Thu, Sep 07, 2023 at 03:25:39PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä 
> > > 
> > > Since commit 7de5b6b54630 ("drm/i915: Don't flag both full
> > > modeset and fastset at the same time")
> > > intel_crtc_needs_fastset() and intel_crtc_needs_modeset() have
> > > been mutually exclusive. Drop the redundant check.
> > > 
> > > Signed-off-by: Ville Syrjälä 
> > 
> > Let's see if the crash returns, however if it does then anyway
> > its time to change/refactor bigjoiner logic(as we suspected it
> > to be bigjoiner issue)
> 
> You must be thinking of some other patch.

Yeah right, it was about another one.
Anyways that change is ok for me.

Stan

> 
> > 
> > Reviewed-by: Stanislav Lisovskiy 
> > 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 83e1bc858b9f..526f38b502be 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -6606,7 +6606,7 @@ static void intel_update_crtc(struct 
> > > intel_atomic_state *state,
> > >* valid pipe configuration from the BIOS we need to take care
> > >* of enabling them on the CRTC's first fastset.
> > >*/
> > > - if (intel_crtc_needs_fastset(new_crtc_state) && !modeset &&
> > > + if (intel_crtc_needs_fastset(new_crtc_state) &&
> > >   old_crtc_state->inherited)
> > >   intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
> > >  }
> > > -- 
> > > 2.41.0
> > > 
> 
> -- 
> Ville Syrjälä
> Intel

Re: [Intel-gfx] [PATCH v12 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-11 Thread John Harrison


On 10/11/2023 13:52, Jonathan Cavitt wrote:

From: Prathap Kumar Valsan 

The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation.  We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back to GT invalidation when the GuC is
disabled.
The invalidation is done by sending a request directly to the GuC
tlb_lookup that invalidates the table.  The invalidation is submitted as
a wait request and is performed in the CT event handler.  This means we
cannot perform this TLB invalidation path if the CT is not enabled.
If the request isn't fulfilled in two seconds, this would constitute
an error in the invalidation as that would constitute either a lost
request or a severe GuC overload.

With this new invalidation routine, we can perform GuC-based GGTT
invalidations.  GuC-based GGTT invalidation is incompatible with
MMIO invalidation so we should not perform MMIO invalidation when
GuC-based GGTT invalidation is expected.

The additional complexity incurred in this patch will be necessary for
range-based tlb invalidations, which will be platformed in the future.

Signed-off-by: Prathap Kumar Valsan 
Signed-off-by: Bruce Chang 
Signed-off-by: Chris Wilson 
Signed-off-by: Umesh Nerlige Ramappa 
Signed-off-by: Jonathan Cavitt 
Signed-off-by: Aravind Iddamsetty 
Signed-off-by: Fei Yang 
CC: Andi Shyti 
Reviewed-by: Andi Shyti 
Acked-by: Tvrtko Ursulin 
Acked-by: Nirmoy Das 
---
  drivers/gpu/drm/i915/gt/intel_ggtt.c  |  33 ++-
  drivers/gpu/drm/i915/gt/intel_tlb.c   |  16 +-
  .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  33 +++
  drivers/gpu/drm/i915/gt/uc/intel_guc.h|  22 ++
  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c |  11 +
  drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 +
  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 191 +-
  7 files changed, 295 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c 
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 4d7d88b92632b..7d145b2d3cb17 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -206,22 +206,37 @@ static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
  }
  
+static void guc_ggtt_ct_invalidate(struct intel_gt *gt)

+{
+   struct intel_uncore *uncore = gt->uncore;
+   intel_wakeref_t wakeref;
+
+   with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
+   struct intel_guc *guc = >uc.guc;
+
+   intel_guc_invalidate_tlb_guc(guc);
+   }
+}
+
  static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
  {
struct drm_i915_private *i915 = ggtt->vm.i915;
+   struct intel_gt *gt;
  
-	gen8_ggtt_invalidate(ggtt);

-
-   if (GRAPHICS_VER(i915) >= 12) {
-   struct intel_gt *gt;
+   if (!HAS_GUC_TLB_INVALIDATION(i915))
+   gen8_ggtt_invalidate(ggtt);
  
-		list_for_each_entry(gt, >gt_list, ggtt_link)

+   list_for_each_entry(gt, >gt_list, ggtt_link) {
+   if (intel_guc_tlb_invalidation_is_available(>uc.guc)) {
+   guc_ggtt_ct_invalidate(gt);
+   } else if (GRAPHICS_VER(i915) >= 12) {
intel_uncore_write_fw(gt->uncore,
  GEN12_GUC_TLB_INV_CR,
  GEN12_GUC_TLB_INV_CR_INVALIDATE);
-   } else {
-   intel_uncore_write_fw(ggtt->vm.gt->uncore,
- GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+   } else {
+   intel_uncore_write_fw(gt->uncore,
+ GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+   }
Is the logic here correct for the case of a MTL prior to GuC start / 
during reset?


Specifically, on a device where HAS_ is not set (i.e. not MTL) then all 
TLB invals will call gen8_ggtt_invalidate() followed by a direct poke of 
either GEN8_GTCR or GEN12_GUC_TLB_INV_CR as appropriate. But on MTL 
during GuC downtime, only the register poke happens. The call to 
gen8_ggtt_invalidate() is skipped. Is that correct? Or am I just 
mis-reading the diffs?




}
  }
  
@@ -1243,7 +1258,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)

ggtt->vm.raw_insert_page = gen8_ggtt_insert_page;
}
  
-	if (intel_uc_wants_guc(>vm.gt->uc))

+   if (intel_uc_wants_guc_submission(>vm.gt->uc))
ggtt->invalidate = guc_ggtt_invalidate;
else
ggtt->invalidate = gen8_ggtt_invalidate;
diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c 
b/drivers/gpu/drm/i915/gt/intel_tlb.c
index 139608c30d978..4bb13d1890e37 100644
--- a/drivers/gpu/drm/i915/gt/intel_tlb.c
+++ b/drivers/gpu/drm/i915/gt/intel_tlb.c
@@ -12,6 +12,7 @@
  #include

Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Use correct method to free crtc_state

2023-10-11 Thread Ville Syrjälä

On Wed, Oct 11, 2023 at 12:01:01AM +0530, Suraj Kandpal wrote:
> Even though there is no leaking of resource here lets
> just use the correct method to free crtc_state
> 
> Fixes: 8a3b3df39757 ("drm/i915: Clean up variable names in old dpll 
> functions")

That is clearly not the right commit to blame here. I've
just dropped the whole fixes tag since there is nothing
real to fix here anyway.

I also dropped the fixes tag from the other patch since I
don't think that original commit would leak anything. The
potential for leaks appeared later as we got eg. gamma
readout that might allocate additional things and hang them
off the crtc state. And as the potential leak can happen
only during driver loading it's mostly harmless.

Anyways, both patches pushed now. Thanks.

> Signed-off-by: Suraj Kandpal 
> ---
>  drivers/gpu/drm/i915/display/intel_dpll.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c 
> b/drivers/gpu/drm/i915/display/intel_dpll.c
> index 2255ad651486..d41c1dc9f66c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -7,6 +7,7 @@
>  #include 
>  
>  #include "i915_reg.h"
> +#include "intel_atomic.h"
>  #include "intel_crtc.h"
>  #include "intel_cx0_phy.h"
>  #include "intel_de.h"
> @@ -2006,7 +2007,7 @@ int vlv_force_pll_on(struct drm_i915_private *dev_priv, 
> enum pipe pipe,
>   vlv_enable_pll(crtc_state);
>   }
>  
> - kfree(crtc_state);
> + intel_crtc_destroy_state(>base, _state->uapi);
>  
>   return 0;
>  }
> -- 
> 2.25.1

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH v12 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-11 Thread Cavitt, Jonathan

-Original Message-
From: Cavitt, Jonathan  
Sent: Wednesday, October 11, 2023 1:53 PM
To: intel-gfx@lists.freedesktop.org
Cc: Gupta, saurabhg ; Cavitt, Jonathan 
; chris.p.wil...@linux.intel.com; Iddamsetty, 
Aravind ; Yang, Fei ; Shyti, 
Andi ; Harrison, John C ; Das, 
Nirmoy ; Krzysztofik, Janusz 
; Roper, Matthew D ; 
tvrtko.ursu...@linux.intel.com; jani.nik...@linux.intel.com
Subject: [PATCH v12 3/7] drm/i915: Define and use GuC and CTB TLB invalidation 
routines
> 
> From: Prathap Kumar Valsan 
> 
> The GuC firmware had defined the interface for Translation Look-Aside
> Buffer (TLB) invalidation.  We should use this interface when
> invalidating the engine and GuC TLBs.
> Add additional functionality to intel_gt_invalidate_tlb, invalidating
> the GuC TLBs and falling back to GT invalidation when the GuC is
> disabled.
> The invalidation is done by sending a request directly to the GuC
> tlb_lookup that invalidates the table.  The invalidation is submitted as
> a wait request and is performed in the CT event handler.  This means we
> cannot perform this TLB invalidation path if the CT is not enabled.
> If the request isn't fulfilled in two seconds, this would constitute
> an error in the invalidation as that would constitute either a lost
> request or a severe GuC overload.
> 
> With this new invalidation routine, we can perform GuC-based GGTT
> invalidations.  GuC-based GGTT invalidation is incompatible with
> MMIO invalidation so we should not perform MMIO invalidation when
> GuC-based GGTT invalidation is expected.
> 
> The additional complexity incurred in this patch will be necessary for
> range-based tlb invalidations, which will be platformed in the future.
> 
> Signed-off-by: Prathap Kumar Valsan 
> Signed-off-by: Bruce Chang 
> Signed-off-by: Chris Wilson 
> Signed-off-by: Umesh Nerlige Ramappa 
> Signed-off-by: Jonathan Cavitt 
> Signed-off-by: Aravind Iddamsetty 
> Signed-off-by: Fei Yang 
> CC: Andi Shyti 
> Reviewed-by: Andi Shyti 
> Acked-by: Tvrtko Ursulin 
> Acked-by: Nirmoy Das 


Hrmm... It seems in my haste I forgot to include John's RB here.
I guess it's fine: this patch got updated enough that I should request
a re-review of it anyways.
-Jonathan Cavitt


> ---
>  drivers/gpu/drm/i915/gt/intel_ggtt.c  |  33 ++-
>  drivers/gpu/drm/i915/gt/intel_tlb.c   |  16 +-
>  .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  33 +++
>  drivers/gpu/drm/i915/gt/uc/intel_guc.h|  22 ++
>  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c |  11 +
>  drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 +
>  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 191 +-
>  7 files changed, 295 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c 
> b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 4d7d88b92632b..7d145b2d3cb17 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -206,22 +206,37 @@ static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
>   intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
>  }
>  
> +static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
> +{
> + struct intel_uncore *uncore = gt->uncore;
> + intel_wakeref_t wakeref;
> +
> + with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
> + struct intel_guc *guc = >uc.guc;
> +
> + intel_guc_invalidate_tlb_guc(guc);
> + }
> +}
> +
>  static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
>  {
>   struct drm_i915_private *i915 = ggtt->vm.i915;
> + struct intel_gt *gt;
>  
> - gen8_ggtt_invalidate(ggtt);
> -
> - if (GRAPHICS_VER(i915) >= 12) {
> - struct intel_gt *gt;
> + if (!HAS_GUC_TLB_INVALIDATION(i915))
> + gen8_ggtt_invalidate(ggtt);
>  
> - list_for_each_entry(gt, >gt_list, ggtt_link)
> + list_for_each_entry(gt, >gt_list, ggtt_link) {
> + if (intel_guc_tlb_invalidation_is_available(>uc.guc)) {
> + guc_ggtt_ct_invalidate(gt);
> + } else if (GRAPHICS_VER(i915) >= 12) {
>   intel_uncore_write_fw(gt->uncore,
> GEN12_GUC_TLB_INV_CR,
> GEN12_GUC_TLB_INV_CR_INVALIDATE);
> - } else {
> - intel_uncore_write_fw(ggtt->vm.gt->uncore,
> -   GEN8_GTCR, GEN8_GTCR_INVALIDATE);
> + } else {
> + intel_uncore_write_fw(gt->uncore,
> +   GEN8_GTCR, GEN8_GTCR_INVALIDATE);
> + }
>   }
>  }
>  
> @@ -1243,7 +1258,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
>   ggtt->vm.raw_insert_page = gen8_ggtt_insert_page;
>   }
>  
> - if (intel_uc_wants_guc(>vm.gt->uc))
> + if (intel_uc_wants_guc_submission(>vm.gt->uc))
>   ggtt->invalidate = guc_ggtt_invalidate;
>   else
>

[Intel-gfx] [PATCH v12 4/7] drm/i915: No TLB invalidation on suspended GT

2023-10-11 Thread Jonathan Cavitt

In case of GT is suspended, don't allow submission of new TLB invalidation
request and cancel all pending requests. The TLB entries will be
invalidated either during GuC reload or on system resume.

Signed-off-by: Fei Yang 
Signed-off-by: Jonathan Cavitt 
CC: John Harrison 
Reviewed-by: Andi Shyti 
Acked-by: Tvrtko Ursulin 
Acked-by: Nirmoy Das 
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  1 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 21 +--
 drivers/gpu/drm/i915/gt/uc/intel_uc.c |  7 +++
 3 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 0949628d69f8b..2b6dfe62c8f2a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -537,4 +537,5 @@ int intel_guc_invalidate_tlb_engines(struct intel_guc *guc);
 int intel_guc_invalidate_tlb_guc(struct intel_guc *guc);
 int intel_guc_tlb_invalidation_done(struct intel_guc *guc,
const u32 *payload, u32 len);
+void wake_up_all_tlb_invalidate(struct intel_guc *guc);
 #endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index cf145e5c4e632..6681d6ef03e3d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1796,13 +1796,25 @@ static void __guc_reset_context(struct intel_context 
*ce, intel_engine_mask_t st
intel_context_put(parent);
 }
 
-void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t 
stalled)
+void wake_up_all_tlb_invalidate(struct intel_guc *guc)
 {
struct intel_guc_tlb_wait *wait;
+   unsigned long i;
+
+   if (!intel_guc_tlb_invalidation_is_available(guc))
+   return;
+
+   xa_lock_irq(>tlb_lookup);
+   xa_for_each(>tlb_lookup, i, wait)
+   wake_up(>wq);
+   xa_unlock_irq(>tlb_lookup);
+}
+
+void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t 
stalled)
+{
struct intel_context *ce;
unsigned long index;
unsigned long flags;
-   unsigned long i;
 
if (unlikely(!guc_submission_initialized(guc))) {
/* Reset called during driver load? GuC not yet initialised! */
@@ -1833,10 +1845,7 @@ void intel_guc_submission_reset(struct intel_guc *guc, 
intel_engine_mask_t stall
 * The full GT reset will have cleared the TLB caches and flushed the
 * G2H message queue; we can release all the blocked waiters.
 */
-   xa_lock_irq(>tlb_lookup);
-   xa_for_each(>tlb_lookup, i, wait)
-   wake_up(>wq);
-   xa_unlock_irq(>tlb_lookup);
+   wake_up_all_tlb_invalidate(guc);
 }
 
 static void guc_cancel_context_requests(struct intel_context *ce)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 98b103375b7ab..27f6561dd7319 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -688,6 +688,8 @@ void intel_uc_suspend(struct intel_uc *uc)
/* flush the GSC worker */
intel_gsc_uc_flush_work(>gsc);
 
+   wake_up_all_tlb_invalidate(guc);
+
if (!intel_guc_is_ready(guc)) {
guc->interrupts.enabled = false;
return;
@@ -736,6 +738,11 @@ static int __uc_resume(struct intel_uc *uc, bool 
enable_communication)
 
intel_gsc_uc_resume(>gsc);
 
+   if (intel_guc_tlb_invalidation_is_available(guc)) {
+   intel_guc_invalidate_tlb_engines(guc);
+   intel_guc_invalidate_tlb_guc(guc);
+   }
+
return 0;
 }
 
-- 
2.25.1

[Intel-gfx] [PATCH v12 6/7] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck

2023-10-11 Thread Jonathan Cavitt

For the gt_tlb live selftest, when operating on the GSC engine,
increase the timeout from 10 ms to 200 ms because the GSC
engine is a bit slower than the rest.

Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 
Acked-by: Tvrtko Ursulin 
Reviewed-by: Nirmoy Das 
---
 drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c 
b/drivers/gpu/drm/i915/gt/selftest_tlb.c
index 7e41f69fc818f..00b872b6380b1 100644
--- a/drivers/gpu/drm/i915/gt/selftest_tlb.c
+++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c
@@ -136,8 +136,15 @@ pte_tlbinv(struct intel_context *ce,
i915_request_get(rq);
i915_request_add(rq);
 
-   /* Short sleep to sanitycheck the batch is spinning before we begin */
-   msleep(10);
+   /*
+* Short sleep to sanitycheck the batch is spinning before we begin.
+* FIXME: Why is GSC so slow?
+*/
+   if (ce->engine->class == OTHER_CLASS)
+   msleep(200);
+   else
+   msleep(10);
+
if (va == vb) {
if (!i915_request_completed(rq)) {
pr_err("%s(%s): Semaphore sanitycheck failed %llx, with 
alignment %llx, using PTE size %x (phys %x, sg %x)\n",
-- 
2.25.1

[Intel-gfx] [PATCH v12 1/7] drm/i915: Add GuC TLB Invalidation device info flags

2023-10-11 Thread Jonathan Cavitt

Add device info flags for if GuC TLB Invalidation is enabled.

Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 
Acked-by: Tvrtko Ursulin 
Reviewed-by: Nirmoy Das 
---
 drivers/gpu/drm/i915/i915_drv.h  | 2 ++
 drivers/gpu/drm/i915/intel_device_info.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cb60fc9cf8737..6a2a78c61f212 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -794,6 +794,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_GUC_DEPRIVILEGE(i915) \
(INTEL_INFO(i915)->has_guc_deprivilege)
 
+#define HAS_GUC_TLB_INVALIDATION(i915) 
(INTEL_INFO(i915)->has_guc_tlb_invalidation)
+
 #define HAS_3D_PIPELINE(i915)  (INTEL_INFO(i915)->has_3d_pipeline)
 
 #define HAS_ONE_EU_PER_FUSE_BIT(i915)  
(INTEL_INFO(i915)->has_one_eu_per_fuse_bit)
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 39817490b13fd..eba2f0b919c87 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -153,6 +153,7 @@ enum intel_ppgtt_type {
func(has_heci_pxp); \
func(has_heci_gscfi); \
func(has_guc_deprivilege); \
+   func(has_guc_tlb_invalidation); \
func(has_l3_ccs_read); \
func(has_l3_dpf); \
func(has_llc); \
-- 
2.25.1

[Intel-gfx] [PATCH v12 5/7] drm/i915: No TLB invalidation on wedged GT

2023-10-11 Thread Jonathan Cavitt

It is not an error for GuC TLB invalidations to fail when the GT is
wedged or disabled, so do not process a wait failure as one in
guc_send_invalidate_tlb.

Signed-off-by: Fei Yang 
Signed-off-by: Jonathan Cavitt 
CC: John Harrison 
Reviewed-by: Andi Shyti 
Acked-by: Tvrtko Ursulin 
Acked-by: Nirmoy Das 
---
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c  | 18 +-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 6681d6ef03e3d..dff418f7fb853 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -32,6 +32,7 @@
 
 #include "i915_drv.h"
 #include "i915_reg.h"
+#include "i915_irq.h"
 #include "i915_trace.h"
 
 /**
@@ -1941,6 +1942,12 @@ void intel_guc_submission_cancel_requests(struct 
intel_guc *guc)
 
/* GuC is blown away, drop all references to contexts */
xa_destroy(>context_lookup);
+
+   /*
+* Wedged GT won't respond to any TLB invalidation request. Simply
+* release all the blocked waiters.
+*/
+   wake_up_all_tlb_invalidate(guc);
 }
 
 void intel_guc_submission_reset_finish(struct intel_guc *guc)
@@ -4746,6 +4753,14 @@ static long must_wait_woken(struct wait_queue_entry 
*wq_entry, long timeout)
return timeout;
 }
 
+static bool intel_gt_is_enabled(const struct intel_gt *gt)
+{
+   /* Check if GT is wedged or suspended */
+   if (intel_gt_is_wedged(gt) || !intel_irqs_enabled(gt->i915))
+   return false;
+   return true;
+}
+
 static int guc_send_invalidate_tlb(struct intel_guc *guc,
   enum intel_guc_tlb_invalidation_type type)
 {
@@ -4795,7 +4810,8 @@ static int guc_send_invalidate_tlb(struct intel_guc *guc,
if (err)
goto out;
 
-   if (!must_wait_woken(, intel_guc_ct_max_queue_time_jiffies())) {
+   if (intel_gt_is_enabled(guc_to_gt(guc)) &&
+   !must_wait_woken(, intel_guc_ct_max_queue_time_jiffies())) {
guc_err(guc,
"TLB invalidation response timed out for seqno %u\n", 
seqno);
err = -ETIME;
-- 
2.25.1

[Intel-gfx] [PATCH v12 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-11 Thread Jonathan Cavitt

From: Prathap Kumar Valsan 

The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation.  We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back to GT invalidation when the GuC is
disabled.
The invalidation is done by sending a request directly to the GuC
tlb_lookup that invalidates the table.  The invalidation is submitted as
a wait request and is performed in the CT event handler.  This means we
cannot perform this TLB invalidation path if the CT is not enabled.
If the request isn't fulfilled in two seconds, this would constitute
an error in the invalidation as that would constitute either a lost
request or a severe GuC overload.

With this new invalidation routine, we can perform GuC-based GGTT
invalidations.  GuC-based GGTT invalidation is incompatible with
MMIO invalidation so we should not perform MMIO invalidation when
GuC-based GGTT invalidation is expected.

The additional complexity incurred in this patch will be necessary for
range-based tlb invalidations, which will be platformed in the future.

Signed-off-by: Prathap Kumar Valsan 
Signed-off-by: Bruce Chang 
Signed-off-by: Chris Wilson 
Signed-off-by: Umesh Nerlige Ramappa 
Signed-off-by: Jonathan Cavitt 
Signed-off-by: Aravind Iddamsetty 
Signed-off-by: Fei Yang 
CC: Andi Shyti 
Reviewed-by: Andi Shyti 
Acked-by: Tvrtko Ursulin 
Acked-by: Nirmoy Das 
---
 drivers/gpu/drm/i915/gt/intel_ggtt.c  |  33 ++-
 drivers/gpu/drm/i915/gt/intel_tlb.c   |  16 +-
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  33 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  22 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c |  11 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 191 +-
 7 files changed, 295 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c 
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 4d7d88b92632b..7d145b2d3cb17 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -206,22 +206,37 @@ static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
 }
 
+static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
+{
+   struct intel_uncore *uncore = gt->uncore;
+   intel_wakeref_t wakeref;
+
+   with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
+   struct intel_guc *guc = >uc.guc;
+
+   intel_guc_invalidate_tlb_guc(guc);
+   }
+}
+
 static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
 {
struct drm_i915_private *i915 = ggtt->vm.i915;
+   struct intel_gt *gt;
 
-   gen8_ggtt_invalidate(ggtt);
-
-   if (GRAPHICS_VER(i915) >= 12) {
-   struct intel_gt *gt;
+   if (!HAS_GUC_TLB_INVALIDATION(i915))
+   gen8_ggtt_invalidate(ggtt);
 
-   list_for_each_entry(gt, >gt_list, ggtt_link)
+   list_for_each_entry(gt, >gt_list, ggtt_link) {
+   if (intel_guc_tlb_invalidation_is_available(>uc.guc)) {
+   guc_ggtt_ct_invalidate(gt);
+   } else if (GRAPHICS_VER(i915) >= 12) {
intel_uncore_write_fw(gt->uncore,
  GEN12_GUC_TLB_INV_CR,
  GEN12_GUC_TLB_INV_CR_INVALIDATE);
-   } else {
-   intel_uncore_write_fw(ggtt->vm.gt->uncore,
- GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+   } else {
+   intel_uncore_write_fw(gt->uncore,
+ GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+   }
}
 }
 
@@ -1243,7 +1258,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.raw_insert_page = gen8_ggtt_insert_page;
}
 
-   if (intel_uc_wants_guc(>vm.gt->uc))
+   if (intel_uc_wants_guc_submission(>vm.gt->uc))
ggtt->invalidate = guc_ggtt_invalidate;
else
ggtt->invalidate = gen8_ggtt_invalidate;
diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c 
b/drivers/gpu/drm/i915/gt/intel_tlb.c
index 139608c30d978..4bb13d1890e37 100644
--- a/drivers/gpu/drm/i915/gt/intel_tlb.c
+++ b/drivers/gpu/drm/i915/gt/intel_tlb.c
@@ -12,6 +12,7 @@
 #include "intel_gt_print.h"
 #include "intel_gt_regs.h"
 #include "intel_tlb.h"
+#include "uc/intel_guc.h"
 
 /*
  * HW architecture suggest typical invalidation time at 40us,
@@ -131,11 +132,24 @@ void intel_gt_invalidate_tlb_full(struct intel_gt *gt, 
u32 seqno)
return;
 
with_intel_gt_pm_if_awake(gt, wakeref) {
+   struct intel_guc *guc = >uc.guc;
+
mutex_lock(>tlb.invalidate_lock);
if (tlb_seqno_passed(gt, seqno))
goto unlock;
 
-

[Intel-gfx] [PATCH v12 7/7] drm/i915: Enable GuC TLB invalidations for MTL

2023-10-11 Thread Jonathan Cavitt

Enable GuC TLB invalidations for MTL.  Though more platforms than just
MTL support GuC TLB invalidations, MTL is presently the only platform
that requires it for any purpose, so only enable it there for now to
minimize cross-platform impact.

Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 
Acked-by: Tvrtko Ursulin 
Reviewed-by: Nirmoy Das 
---
 drivers/gpu/drm/i915/i915_pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index df7c261410f79..d4b51ececbb12 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -829,6 +829,7 @@ static const struct intel_device_info mtl_info = {
.has_flat_ccs = 0,
.has_gmd_id = 1,
.has_guc_deprivilege = 1,
+   .has_guc_tlb_invalidation = 1,
.has_llc = 0,
.has_mslice_steering = 0,
.has_snoop = 1,
-- 
2.25.1

[Intel-gfx] [PATCH v12 2/7] drm/i915/guc: Add CT size delay helper

2023-10-11 Thread Jonathan Cavitt

As of now, there is no mechanism for tracking a given request's
progress through the queue.  Instead, add a helper that returns
an estimated maximum time the queue should take to drain if
completely full.

Suggested-by: John Harrison 
Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 
Acked-by: Tvrtko Ursulin 
Reviewed-by: Nirmoy Das 
Reviewed-by: John Harrison 
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 27 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h |  2 ++
 2 files changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index c33210ead1ef7..03b616ba4ebb7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -103,6 +103,33 @@ enum { CTB_SEND = 0, CTB_RECV = 1 };
 
 enum { CTB_OWNER_HOST = 0 };
 
+/*
+ * Some H2G commands involve a synchronous response that the driver needs
+ * to wait for. In such cases, a timeout is required to prevent the driver
+ * from waiting forever in the case of an error (either no error response
+ * is defined in the protocol or something has died and requires a reset).
+ * The specific command may be defined as having a time bound response but
+ * the CT is a queue and that time guarantee only starts from the point
+ * when the command reaches the head of the queue and is processed by GuC.
+ *
+ * Ideally there would be a helper to report the progress of a given
+ * command through the CT. However, that would require a significant
+ * amount of work in the CT layer. In the meantime, provide a reasonable
+ * estimation of the worst case latency it should take for the entire
+ * queue to drain. And therefore, how long a caller should wait before
+ * giving up on their request. The current estimate is based on empirical
+ * measurement of a test that fills the buffer with context creation and
+ * destruction requests as they seem to be the slowest operation.
+ */
+long intel_guc_ct_max_queue_time_jiffies(void)
+{
+   /*
+* A 4KB buffer full of context destroy commands takes a little
+* over a second to process so bump that to 2s to be super safe.
+*/
+   return (CTB_H2G_BUFFER_SIZE * HZ) / SZ_2K;
+}
+
 static void ct_receive_tasklet_func(struct tasklet_struct *t);
 static void ct_incoming_request_worker_func(struct work_struct *w);
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
index 58e42901ff498..2c4bb9a941be6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
@@ -104,6 +104,8 @@ struct intel_guc_ct {
 #endif
 };
 
+long intel_guc_ct_max_queue_time_jiffies(void);
+
 void intel_guc_ct_init_early(struct intel_guc_ct *ct);
 int intel_guc_ct_init(struct intel_guc_ct *ct);
 void intel_guc_ct_fini(struct intel_guc_ct *ct);
-- 
2.25.1

[Intel-gfx] [PATCH v12 0/7] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-11 Thread Jonathan Cavitt

Implement GuC-based TLB invalidations and use them on MTL.

Some complexity in the implementation was introduced early on
and will be required for range-based TLB invalidations.
RFC: https://patchwork.freedesktop.org/series/124922/

v2:
- Add missing supporting patches.

v3:
- Split suspend/resume changes and multi-gt support into separate
  patches.
- Only perform GuC TLB invalidation functions when supported.
- Move intel_guc_is_enabled check function to usage location.
- Address comments.

v4:
- Change conditions for GuC-based tlb invalidation support
  to a pci tag that's only active for MTL.
- Address some FIXMEs and formatting issues.
- Move suspend/resume changes to helper functions in intel_gt.h
- Improve comment for ct_handle_event change.
- Use cleaner if-else conditions.
- Address comments.

v5:
- Reintroduce missing change to selftest msleep duration
- Move suspend/resume loops from intel_gt.h to intel_tlb.c,
  making them no longer static inlines.
- Remove superfluous blocking and error checks.
- Move ct_handle_event exception to general case in
  ct_process_request.
- Explain usage of xa_alloc_cyclic_irq.
- Modify explanation of purpose of
  OUTSTANDING_GUC_TIMEOUT_PERIOD macro.
- Explain purpose of performing tlb invalidation twice in
  intel_gt_tlb_resume_all.

v6:
- Add this cover letter.
- Fix explanation of purpose of
  OUTSTANDING_GUC_TIMEOUT_PERIOD macro again.
- s/pci tags/pci flags
- Enable GuC TLB Invalidations separately from adding the
  flags to do so.

v7:
- Eliminate pci terminology from patches.
- Order new device info flag correctly.
- Run gen8_ggtt_invalidate in more cases, specifically when
  GuC-based TLB invalidation is not supported.
- Use intel_uncore_write_fw instead of intel_uncore_write
  during guc_ggtt_invalidate.
- Remove duplicate request message clear in ct_process_request.
- Remove faulty tag from series.

v8:
- Simplify cover letter contents.
- Fix miscellaneous formatting and typos.
- Reorder device info flags and defines.
- Reword commit message.
- Rename TLB invalidation enums and functions.
- Add comments explaining confusing points.
- Add helper function getting expected delay of CT buffer.
- Simplify intel_guc_tlb_invalidation_done by passing computed
  values.
- Remove helper functions for tlb suspend and resume.
- Move tlb suspend and resume paths to uc.
- Split suspend/resume and wedged into two patches.
- Clarify purpose of sleep change in tlb selftest.

v9:
- Explain complexity of GuC TLB invalidations as required for
  range-based TLB invalidations, which will be platformed later.
- Fix CHECKPATCH issues.
- Explain intel_guc_is_ready tlb invalidation skip in
  intel_gt_invalidate_tlb_full.
- Reword comment for unlocked xa_for_each loop in
  intel_guc_submission_reset.
- Report all errors in init_tlb_lookup.
- Remove debug message from fini_tlb_lookup.
- Use standardized interface for
  intel_guc_tlb_invalidation_done
- Remove spurious changes.
- Move wake_up_all_tlb_invalidate on wedge to correct patch.

v10:
- Add lock to tlb_lookup on guc submission reset.
- Add comment about why timeout increased from 10 ms to 20 ms
  by default in gt_tlb selftest.
- Remove spurious changes.

v11:
- Update CT size delay helper to be clearer.
- Reorder some function declarations.
- Clarify some comments.
- Produce error message if attempting to free a busy wait
  during fini_tlb_lookup.
- Revert default sleep back to 10 ms.
- Link to RFC.

v12:
- Add helper for checking if GuC TLB invalidation is
  supported and guc is ready.
- Prevent suspend/resume actions involving GuC TLB
  invalidations if guc is not ready.
- Add path for INTEL_GUC_ACTION_TLB_INVALIDATION_DONE
  to immediately process in ct_process_request after
  it is submitted to ct_handle_event.

Jonathan Cavitt (6):
  drm/i915: Add GuC TLB Invalidation device info flags
  drm/i915/guc: Add CT size delay helper
  drm/i915: No TLB invalidation on suspended GT
  drm/i915: No TLB invalidation on wedged GT
  drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck
  drm/i915: Enable GuC TLB invalidations for MTL

Prathap Kumar Valsan (1):
  drm/i915: Define and use GuC and CTB TLB invalidation routines

 drivers/gpu/drm/i915/gt/intel_ggtt.c  |  33 ++-
 drivers/gpu/drm/i915/gt/intel_tlb.c   |  16 +-
 drivers/gpu/drm/i915/gt/selftest_tlb.c|  11 +-
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  33 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  23 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c |  38 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h |   2 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 216 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c |   7 +
 drivers/gpu/drm/i915/i915_drv.h   |   2 +
 drivers/gpu/drm/i915/i915_pci.c   |   1 +
 drivers/gpu/drm/i915/intel_device_info.h  |   1 +
 13 files changed, 370 insertions(+), 14 deletions(-)

-- 
2.25.1

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: enable W=1 warnings by default

2023-10-11 Thread Jani Nikula

On Wed, 11 Oct 2023, Masahiro Yamada  wrote:
> On Wed, Oct 11, 2023 at 4:29 PM Jani Nikula  wrote:
>>
>> We enable a bunch more compiler warnings than the kernel
>> defaults. However, they've drifted to become a unique set of warnings,
>> and have increasingly fallen behind from the W=1 set.
>>
>> Align with the W=1 warnings from scripts/Makefile.extrawarn for clarity,
>> by copy-pasting them with s/KBUILD_CFLAGS/subdir-ccflags-y/ to make it
>> easier to compare in the future.
>>
>> Some of the -Wextra warnings do need to be disabled, just like in
>> Makefile.extrawarn, but take care to not disable them for W=2 or W=3
>> builds, depending on the warning.
>>
>> v2: Add back some -Wextra warning disables (Nathan)
>>
>> Cc: Arnd Bergmann 
>> Cc: Nick Desaulniers 
>> Cc: Nathan Chancellor 
>> Cc: Masahiro Yamada 
>> Reviewed-by: Nathan Chancellor 
>> Signed-off-by: Jani Nikula 
>
> Reviewed-by: Masahiro Yamada 

Thanks for the reviews everyone...

...though we missed some s/KBUILD_CFLAGS/subdir-ccflags-y/ in v2. Fixed
while applying.

BR,
Jani.


-- 
Jani Nikula, Intel

Re: [Intel-gfx] [PATCH] drm/i915/cx0: Only clear/set the Pipe Reset bit of the PHY Lanes Owned

2023-10-11 Thread Sripada, Radhakrishna

Fixes: 619a06dba6fa ("drm/i915/mtl: Reset only one lane in case of MFD")

With that pushed the patch with mentioned nits. Thank you for the patch and 
review.

-- Radhakrishna Sripada

> -Original Message-
> From: Intel-gfx  On Behalf Of Jani
> Nikula
> Sent: Thursday, October 5, 2023 6:47 PM
> To: Sousa, Gustavo ; Almahallawy, Khaled
> ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/cx0: Only clear/set the Pipe Reset 
> bit of
> the PHY Lanes Owned
> 
> On Thu, 05 Oct 2023, Gustavo Sousa  wrote:
> > Quoting Khaled Almahallawy (2023-10-04 21:13:10-03:00)
> >>Currently, with MFD/pin assignment D, the driver clears the pipe reset bit
> >>of lane 1 which is not owned by display. This causes the display
> >>to block S0iX.
> >>
> >>By not clearing this bit for lane 1 and keeping whatever default, S0ix
> >>started to work. This is already what the driver does at the end
> >>of the phy lane reset sequence (Step#8)
> >>
> >>Bspec: 65451
> >>
> >
> > We should not have blank lines in the trailers section. This could be fixed
> > while applying.
> 
> Agreed.
> 
> >
> >>Cc: Mika Kahola 
> >>Cc: Gustavo Sousa 
> >>Signed-off-by: Khaled Almahallawy 
> >
> > Nice fix. Thanks!
> >
> > Reviewed-by: Gustavo Sousa 
> >
> >>---
> >> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 3 +--
> >> 1 file changed, 1 insertion(+), 2 deletions(-)
> >>
> >>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> >>index abd607b564f1..f653b83a7d4f 100644
> >>--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> >>+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> >>@@ -2596,8 +2596,7 @@ static void intel_cx0_phy_lane_reset(struct
> drm_i915_private *i915,
> >> drm_warn(>drm, "PHY %c failed to bring out of SOC 
> >> reset after
> %dus.\n",
> >>  phy_name(phy),
> XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US);
> >>
> >>-intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port),
> >>- XELPDP_LANE_PIPE_RESET(0) | XELPDP_LANE_PIPE_RESET(1),
> >>+intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port), lane_pipe_reset,
> >>  lane_pipe_reset);
> >>
> >> if (__intel_de_wait_for_register(i915, XELPDP_PORT_BUF_CTL2(port),
> >>--
> >>2.25.1
> >>
> 
> --
> Jani Nikula, Intel

[Intel-gfx] [PATCH] drm/i915/sprite: move sprite_name() to intel_sprite.c

2023-10-11 Thread Jani Nikula

Move sprite_name() where its only user is, and convert it to a function,
removing the implicit dev_priv usage.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display.h | 1 -
 drivers/gpu/drm/i915/display/intel_sprite.c  | 7 ++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h 
b/drivers/gpu/drm/i915/display/intel_display.h
index 0e5dffe8f018..163469fe67a2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -105,7 +105,6 @@ enum i9xx_plane_id {
 };
 
 #define plane_name(p) ((p) + 'A')
-#define sprite_name(p, s) ((p) * 
DISPLAY_RUNTIME_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
 
 #define for_each_plane_id_on_crtc(__crtc, __p) \
for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c 
b/drivers/gpu/drm/i915/display/intel_sprite.c
index 1fb16510f750..d7b440c8caef 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -48,6 +48,11 @@
 #include "intel_frontbuffer.h"
 #include "intel_sprite.h"
 
+static char sprite_name(struct drm_i915_private *i915, enum pipe pipe, int 
sprite)
+{
+   return pipe * DISPLAY_RUNTIME_INFO(i915)->num_sprites[pipe] + sprite + 
'A';
+}
+
 static void i9xx_plane_linear_gamma(u16 gamma[8])
 {
/* The points are not evenly spaced. */
@@ -1636,7 +1641,7 @@ intel_sprite_plane_create(struct drm_i915_private 
*dev_priv,
   0, plane_funcs,
   formats, num_formats, modifiers,
   DRM_PLANE_TYPE_OVERLAY,
-  "sprite %c", sprite_name(pipe, sprite));
+  "sprite %c", sprite_name(dev_priv, pipe, 
sprite));
kfree(modifiers);
 
if (ret)
-- 
2.39.2

[Intel-gfx] [PATCH 2/2] drm/i915/aux: rename dev_priv to i915

2023-10-11 Thread Jani Nikula

No reason to stick to dev_priv, rename to i915.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_dp_aux.c | 58 ++---
 1 file changed, 28 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c 
b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index c106598a78c5..2e2af71bcd5a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -74,7 +74,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp)
 
 static u32 g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 
if (index)
return 0;
@@ -83,12 +83,12 @@ static u32 g4x_get_aux_clock_divider(struct intel_dp 
*intel_dp, int index)
 * The clock divider is based off the hrawclk, and would like to run at
 * 2MHz.  So, take the hrawclk value and divide by 2000 and use that
 */
-   return DIV_ROUND_CLOSEST(RUNTIME_INFO(dev_priv)->rawclk_freq, 2000);
+   return DIV_ROUND_CLOSEST(RUNTIME_INFO(i915)->rawclk_freq, 2000);
 }
 
 static u32 ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
u32 freq;
 
@@ -101,18 +101,18 @@ static u32 ilk_get_aux_clock_divider(struct intel_dp 
*intel_dp, int index)
 * divide by 2000 and use that
 */
if (dig_port->aux_ch == AUX_CH_A)
-   freq = dev_priv->display.cdclk.hw.cdclk;
+   freq = i915->display.cdclk.hw.cdclk;
else
-   freq = RUNTIME_INFO(dev_priv)->rawclk_freq;
+   freq = RUNTIME_INFO(i915)->rawclk_freq;
return DIV_ROUND_CLOSEST(freq, 2000);
 }
 
 static u32 hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 
-   if (dig_port->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
+   if (dig_port->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(i915)) {
/* Workaround for non-ULT HSW */
switch (index) {
case 0: return 63;
@@ -165,12 +165,11 @@ static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp,
u32 aux_clock_divider)
 {
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-   struct drm_i915_private *dev_priv =
-   to_i915(dig_port->base.base.dev);
+   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
u32 timeout;
 
/* Max timeout value on G4x-BDW: 1.6ms */
-   if (IS_BROADWELL(dev_priv))
+   if (IS_BROADWELL(i915))
timeout = DP_AUX_CH_CTL_TIME_OUT_600us;
else
timeout = DP_AUX_CH_CTL_TIME_OUT_400us;
@@ -229,8 +228,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
  u32 aux_send_ctl_flags)
 {
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-   struct drm_i915_private *i915 =
-   to_i915(dig_port->base.base.dev);
+   struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
bool is_tc_port = intel_phy_is_tc(i915, phy);
i915_reg_t ch_ctl, ch_data[5];
@@ -715,7 +713,7 @@ static i915_reg_t tgl_aux_data_reg(struct intel_dp 
*intel_dp, int index)
 
 static i915_reg_t xelpdp_aux_ctl_reg(struct intel_dp *intel_dp)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -726,16 +724,16 @@ static i915_reg_t xelpdp_aux_ctl_reg(struct intel_dp 
*intel_dp)
case AUX_CH_USBC2:
case AUX_CH_USBC3:
case AUX_CH_USBC4:
-   return XELPDP_DP_AUX_CH_CTL(dev_priv, aux_ch);
+   return XELPDP_DP_AUX_CH_CTL(i915, aux_ch);
default:
MISSING_CASE(aux_ch);
-   return XELPDP_DP_AUX_CH_CTL(dev_priv, AUX_CH_A);
+   return XELPDP_DP_AUX_CH_CTL(i915, AUX_CH_A);
}
 }
 
 static i915_reg_t xelpdp_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -746,10 +744,10 @@ static i915_reg_t xelpdp_aux_data_reg(struct intel_dp 
*intel_dp, int

[Intel-gfx] [PATCH 1/2] drm/i915/aux: add separate register macros and functions for VLV/CHV

2023-10-11 Thread Jani Nikula

Add separate macros for VLV/CHV registers without the implicit dev_priv,
and with the display MMIO base baked in.

A number of implicitly used dev_priv local variables can be removed.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_dp_aux.c   | 43 +++
 .../gpu/drm/i915/display/intel_dp_aux_regs.h  | 14 +++---
 drivers/gpu/drm/i915/gvt/handlers.c   |  1 -
 3 files changed, 43 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c 
b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 4431b6290c4c..c106598a78c5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -531,9 +531,40 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct 
drm_dp_aux_msg *msg)
return ret;
 }
 
+static i915_reg_t vlv_aux_ctl_reg(struct intel_dp *intel_dp)
+{
+   struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+   enum aux_ch aux_ch = dig_port->aux_ch;
+
+   switch (aux_ch) {
+   case AUX_CH_B:
+   case AUX_CH_C:
+   case AUX_CH_D:
+   return VLV_DP_AUX_CH_CTL(aux_ch);
+   default:
+   MISSING_CASE(aux_ch);
+   return VLV_DP_AUX_CH_CTL(AUX_CH_B);
+   }
+}
+
+static i915_reg_t vlv_aux_data_reg(struct intel_dp *intel_dp, int index)
+{
+   struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+   enum aux_ch aux_ch = dig_port->aux_ch;
+
+   switch (aux_ch) {
+   case AUX_CH_B:
+   case AUX_CH_C:
+   case AUX_CH_D:
+   return VLV_DP_AUX_CH_DATA(aux_ch, index);
+   default:
+   MISSING_CASE(aux_ch);
+   return VLV_DP_AUX_CH_DATA(AUX_CH_B, index);
+   }
+}
+
 static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -550,7 +581,6 @@ static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
 
 static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -567,7 +597,6 @@ static i915_reg_t g4x_aux_data_reg(struct intel_dp 
*intel_dp, int index)
 
 static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -586,7 +615,6 @@ static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
 
 static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -605,7 +633,6 @@ static i915_reg_t ilk_aux_data_reg(struct intel_dp 
*intel_dp, int index)
 
 static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -625,7 +652,6 @@ static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
 
 static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -645,7 +671,6 @@ static i915_reg_t skl_aux_data_reg(struct intel_dp 
*intel_dp, int index)
 
 static i915_reg_t tgl_aux_ctl_reg(struct intel_dp *intel_dp)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -668,7 +693,6 @@ static i915_reg_t tgl_aux_ctl_reg(struct intel_dp *intel_dp)
 
 static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
enum aux_ch aux_ch = dig_port->aux_ch;
 
@@ -757,6 +781,9 @@ void intel_dp_aux_init(struct intel_dp *intel_dp)
} else if (HAS_PCH_SPLIT(dev_priv)) {
intel_dp->aux_ch_ctl_reg = ilk_aux_ctl_reg;
intel_dp->aux_ch_data_reg = ilk_aux_data_reg;
+   } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+   intel_dp->aux_ch_ctl_reg = vlv_aux_ctl_reg;
+   intel_dp->aux_ch_data_reg = vlv_aux_data_reg;
} else {
intel_dp->aux_ch_ctl_reg = g4x_aux_ctl_reg;
intel_dp->aux_ch_data_reg =

Re: [Intel-gfx] [PATCH 3/3] drm/i915: move gpu error sysfs to i915_gpu_error.c

2023-10-11 Thread Jani Nikula

On Wed, 11 Oct 2023, John Harrison  wrote:
> On 10/11/2023 09:38, Jani Nikula wrote:
>> Hide gpu error specifics in i915_gpu_error.c. This is also cleaner wrt
>> conditional compilation, as i915_gpu_error.c is only built with
>> DRM_I915_CAPTURE_ERROR=y.
>>
>> With this, we can also make i915_first_error_state() static.
>>
>> Signed-off-by: Jani Nikula 
>> ---
>>   drivers/gpu/drm/i915/i915_gpu_error.c | 75 -
>>   drivers/gpu/drm/i915/i915_gpu_error.h | 17 +++---
>>   drivers/gpu/drm/i915/i915_sysfs.c | 79 +--
>>   3 files changed, 86 insertions(+), 85 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
>> b/drivers/gpu/drm/i915/i915_gpu_error.c
>> index b4c8459deb7b..f9e750217f18 100644
>> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
>> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
>> @@ -57,6 +57,7 @@
>>   #include "i915_memcpy.h"
>>   #include "i915_reg.h"
>>   #include "i915_scatterlist.h"
>> +#include "i915_sysfs.h"
>>   #include "i915_utils.h"
>>   
>>   #define ALLOW_FAIL (__GFP_KSWAPD_RECLAIM | __GFP_RETRY_MAYFAIL | 
>> __GFP_NOWARN)
>> @@ -2208,7 +2209,7 @@ void i915_capture_error_state(struct intel_gt *gt,
>>  i915_gpu_coredump_put(error);
>>   }
>>   
>> -struct i915_gpu_coredump *
>> +static struct i915_gpu_coredump *
>>   i915_first_error_state(struct drm_i915_private *i915)
>>   {
>>  struct i915_gpu_coredump *error;
>> @@ -2484,3 +2485,75 @@ void i915_gpu_error_debugfs_register(struct 
>> drm_i915_private *i915)
>>  debugfs_create_file("i915_gpu_info", 0644, minor->debugfs_root, i915,
>>  _gpu_info_fops);
>>   }
>> +
>> +static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
>> +struct bin_attribute *attr, char *buf,
>> +loff_t off, size_t count)
>> +{
>> +
>> +struct device *kdev = kobj_to_dev(kobj);
>> +struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
>> +struct i915_gpu_coredump *gpu;
>> +ssize_t ret = 0;
>> +
>> +/*
>> + * FIXME: Concurrent clients triggering resets and reading + clearing
>> + * dumps can cause inconsistent sysfs reads when a user calls in with a
>> + * non-zero offset to complete a prior partial read but the
>> + * gpu_coredump has been cleared or replaced.
>> + */
>> +
>> +gpu = i915_first_error_state(i915);
>> +if (IS_ERR(gpu)) {
>> +ret = PTR_ERR(gpu);
>> +} else if (gpu) {
>> +ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count);
>> +i915_gpu_coredump_put(gpu);
>> +} else {
>> +const char *str = "No error state collected\n";
>> +size_t len = strlen(str);
>> +
>> +if (off < len) {
>> +ret = min_t(size_t, count, len - off);
>> +memcpy(buf, str + off, ret);
>> +}
>> +}
> Can this and the debugfs equivalent not be common code? It seems like 
> the implementations are conceptually the same even if the code currently 
> looks quite different.

They probably can, but this is just the code movement part. I initially
sent a bigger refactoring series [1], but decided to chop it up and send
it in smaller pieces, to not burden the reviewers. The first part [2]
has already been merged, and this is follow-up.

BR,
Jani.


[1] https://lore.kernel.org/r/cover.1695924021.git.jani.nik...@intel.com
[2] https://lore.kernel.org/r/cover.1696236329.git.jani.nik...@intel.com

>
> John.
>
>> +
>> +return ret;
>> +}
>> +
>> +static ssize_t error_state_write(struct file *file, struct kobject *kobj,
>> + struct bin_attribute *attr, char *buf,
>> + loff_t off, size_t count)
>> +{
>> +struct device *kdev = kobj_to_dev(kobj);
>> +struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
>> +
>> +drm_dbg(_priv->drm, "Resetting error state\n");
>> +i915_reset_error_state(dev_priv);
>> +
>> +return count;
>> +}
>> +
>> +static const struct bin_attribute error_state_attr = {
>> +.attr.name = "error",
>> +.attr.mode = S_IRUSR | S_IWUSR,
>> +.size = 0,
>> +.read = error_state_read,
>> +.write = error_state_write,
>> +};
>> +
>> +void i915_gpu_error_sysfs_setup(struct drm_i915_private *i915)
>> +{
>> +struct device *kdev = i915->drm.primary->kdev;
>> +
>> +if (sysfs_create_bin_file(>kobj, _state_attr))
>> +drm_err(>drm, "error_state sysfs setup failed\n");
>> +}
>> +
>> +void i915_gpu_error_sysfs_teardown(struct drm_i915_private *i915)
>> +{
>> +struct device *kdev = i915->drm.primary->kdev;
>> +
>> +sysfs_remove_bin_file(>kobj, _state_attr);
>> +}
>> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h 
>> b/drivers/gpu/drm/i915/i915_gpu_error.h
>> index a6f2a7518cf0..68c964d6720a 100644
>> --- a/drivers/gpu/drm/i915/i915_gpu_error.h
>> +++ b/drivers/gpu/drm/i915/i915_gpu_error.h
>> @@ -323,11 +323,12

Re: [Intel-gfx] [PATCH v11 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-11 Thread John Harrison


On 10/10/2023 17:02, Jonathan Cavitt wrote:

From: Prathap Kumar Valsan 

The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation.  We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back to GT invalidation when the GuC is
disabled.
The invalidation is done by sending a request directly to the GuC
tlb_lookup that invalidates the table.  The invalidation is submitted as
a wait request and is performed in the CT event handler.  This means we
cannot perform this TLB invalidation path if the CT is not enabled.
If the request isn't fulfilled in two seconds, this would constitute
an error in the invalidation as that would constitute either a lost
request or a severe GuC overload.

With this new invalidation routine, we can perform GuC-based GGTT
invalidations.  GuC-based GGTT invalidation is incompatible with
MMIO invalidation so we should not perform MMIO invalidation when
GuC-based GGTT invalidation is expected.

The additional complexity incurred in this patch will be necessary for
range-based tlb invalidations, which will be platformed in the future.

Signed-off-by: Prathap Kumar Valsan 
Signed-off-by: Bruce Chang 
Signed-off-by: Chris Wilson 
Signed-off-by: Umesh Nerlige Ramappa 
Signed-off-by: Jonathan Cavitt 
Signed-off-by: Aravind Iddamsetty 
Signed-off-by: Fei Yang 
CC: Andi Shyti 
Reviewed-by: Andi Shyti 

Reviewed-by: John Harrison

Re: [Intel-gfx] [PATCH v11 2/7] drm/i915/guc: Add CT size delay helper

2023-10-11 Thread John Harrison


On 10/10/2023 17:02, Jonathan Cavitt wrote:

Add a helper function to the GuC CT buffer that reports the expected
time to process all outstanding requests.  As of now, there is no
functionality to check number of requests in the buffer, so the helper
function just reports 2 seconds, or 1ms per request up to the maximum
number of requests the CT buffer can store.

This comment is inaccurate.

The buffer is 4K bytes. If it was only 1ms per request then a 2s total 
means 2000 requests in the buffer, or 2 bytes per request. The smallest 
request possible is 2 words or 8 bytes (and that would be a request with 
no data at all). The average requests size is more likely 4 words at 
least. Which means only 250 requests per queue and therefore a maximum 
time of 8ms per request to hit a 2s total.


It would be better to simply say "As of now, there is no mechanism for 
tracking a given request's progress through the queue. Instead, add a 
helper that returns an estimated maximum time the queue should take to 
drain if completely full.". The description in the code itself gives the 
full details. No need to repeat all that in the commit message.


With that updated:
Reviewed-by: John Harrison 



Suggested-by: John Harrison 
Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 
---
  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 27 +++
  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h |  2 ++
  2 files changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index c33210ead1ef7..03b616ba4ebb7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -103,6 +103,33 @@ enum { CTB_SEND = 0, CTB_RECV = 1 };
  
  enum { CTB_OWNER_HOST = 0 };
  
+/*

+ * Some H2G commands involve a synchronous response that the driver needs
+ * to wait for. In such cases, a timeout is required to prevent the driver
+ * from waiting forever in the case of an error (either no error response
+ * is defined in the protocol or something has died and requires a reset).
+ * The specific command may be defined as having a time bound response but
+ * the CT is a queue and that time guarantee only starts from the point
+ * when the command reaches the head of the queue and is processed by GuC.
+ *
+ * Ideally there would be a helper to report the progress of a given
+ * command through the CT. However, that would require a significant
+ * amount of work in the CT layer. In the meantime, provide a reasonable
+ * estimation of the worst case latency it should take for the entire
+ * queue to drain. And therefore, how long a caller should wait before
+ * giving up on their request. The current estimate is based on empirical
+ * measurement of a test that fills the buffer with context creation and
+ * destruction requests as they seem to be the slowest operation.
+ */
+long intel_guc_ct_max_queue_time_jiffies(void)
+{
+   /*
+* A 4KB buffer full of context destroy commands takes a little
+* over a second to process so bump that to 2s to be super safe.
+*/
+   return (CTB_H2G_BUFFER_SIZE * HZ) / SZ_2K;
+}
+
  static void ct_receive_tasklet_func(struct tasklet_struct *t);
  static void ct_incoming_request_worker_func(struct work_struct *w);
  
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h

index 58e42901ff498..2c4bb9a941be6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
@@ -104,6 +104,8 @@ struct intel_guc_ct {
  #endif
  };
  
+long intel_guc_ct_max_queue_time_jiffies(void);

+
  void intel_guc_ct_init_early(struct intel_guc_ct *ct);
  int intel_guc_ct_init(struct intel_guc_ct *ct);
  void intel_guc_ct_fini(struct intel_guc_ct *ct);

Re: [Intel-gfx] [PATCH 3/3] drm/i915: move gpu error sysfs to i915_gpu_error.c

2023-10-11 Thread John Harrison





On 10/11/2023 09:38, Jani Nikula wrote:

Hide gpu error specifics in i915_gpu_error.c. This is also cleaner wrt
conditional compilation, as i915_gpu_error.c is only built with
DRM_I915_CAPTURE_ERROR=y.

With this, we can also make i915_first_error_state() static.

Signed-off-by: Jani Nikula 
---
  drivers/gpu/drm/i915/i915_gpu_error.c | 75 -
  drivers/gpu/drm/i915/i915_gpu_error.h | 17 +++---
  drivers/gpu/drm/i915/i915_sysfs.c | 79 +--
  3 files changed, 86 insertions(+), 85 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index b4c8459deb7b..f9e750217f18 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -57,6 +57,7 @@
  #include "i915_memcpy.h"
  #include "i915_reg.h"
  #include "i915_scatterlist.h"
+#include "i915_sysfs.h"
  #include "i915_utils.h"
  
  #define ALLOW_FAIL (__GFP_KSWAPD_RECLAIM | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)

@@ -2208,7 +2209,7 @@ void i915_capture_error_state(struct intel_gt *gt,
i915_gpu_coredump_put(error);
  }
  
-struct i915_gpu_coredump *

+static struct i915_gpu_coredump *
  i915_first_error_state(struct drm_i915_private *i915)
  {
struct i915_gpu_coredump *error;
@@ -2484,3 +2485,75 @@ void i915_gpu_error_debugfs_register(struct 
drm_i915_private *i915)
debugfs_create_file("i915_gpu_info", 0644, minor->debugfs_root, i915,
_gpu_info_fops);
  }
+
+static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
+   struct bin_attribute *attr, char *buf,
+   loff_t off, size_t count)
+{
+
+   struct device *kdev = kobj_to_dev(kobj);
+   struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
+   struct i915_gpu_coredump *gpu;
+   ssize_t ret = 0;
+
+   /*
+* FIXME: Concurrent clients triggering resets and reading + clearing
+* dumps can cause inconsistent sysfs reads when a user calls in with a
+* non-zero offset to complete a prior partial read but the
+* gpu_coredump has been cleared or replaced.
+*/
+
+   gpu = i915_first_error_state(i915);
+   if (IS_ERR(gpu)) {
+   ret = PTR_ERR(gpu);
+   } else if (gpu) {
+   ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count);
+   i915_gpu_coredump_put(gpu);
+   } else {
+   const char *str = "No error state collected\n";
+   size_t len = strlen(str);
+
+   if (off < len) {
+   ret = min_t(size_t, count, len - off);
+   memcpy(buf, str + off, ret);
+   }
+   }
Can this and the debugfs equivalent not be common code? It seems like 
the implementations are conceptually the same even if the code currently 
looks quite different.


John.


+
+   return ret;
+}
+
+static ssize_t error_state_write(struct file *file, struct kobject *kobj,
+struct bin_attribute *attr, char *buf,
+loff_t off, size_t count)
+{
+   struct device *kdev = kobj_to_dev(kobj);
+   struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
+
+   drm_dbg(_priv->drm, "Resetting error state\n");
+   i915_reset_error_state(dev_priv);
+
+   return count;
+}
+
+static const struct bin_attribute error_state_attr = {
+   .attr.name = "error",
+   .attr.mode = S_IRUSR | S_IWUSR,
+   .size = 0,
+   .read = error_state_read,
+   .write = error_state_write,
+};
+
+void i915_gpu_error_sysfs_setup(struct drm_i915_private *i915)
+{
+   struct device *kdev = i915->drm.primary->kdev;
+
+   if (sysfs_create_bin_file(>kobj, _state_attr))
+   drm_err(>drm, "error_state sysfs setup failed\n");
+}
+
+void i915_gpu_error_sysfs_teardown(struct drm_i915_private *i915)
+{
+   struct device *kdev = i915->drm.primary->kdev;
+
+   sysfs_remove_bin_file(>kobj, _state_attr);
+}
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h 
b/drivers/gpu/drm/i915/i915_gpu_error.h
index a6f2a7518cf0..68c964d6720a 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -323,11 +323,12 @@ static inline void i915_gpu_coredump_put(struct 
i915_gpu_coredump *gpu)
kref_put(>ref, __i915_gpu_coredump_free);
  }
  
-struct i915_gpu_coredump *i915_first_error_state(struct drm_i915_private *i915);

  void i915_reset_error_state(struct drm_i915_private *i915);
  void i915_disable_error_state(struct drm_i915_private *i915, int err);
  
  void i915_gpu_error_debugfs_register(struct drm_i915_private *i915);

+void i915_gpu_error_sysfs_setup(struct drm_i915_private *i915);
+void i915_gpu_error_sysfs_teardown(struct drm_i915_private *i915);
  
  #else
  
@@ -396,12 +397,6 @@ static inline void i915_gpu_coredump_put(struct i915_gpu_coredump *gpu)

  {

[Intel-gfx] [PATCH v3 01/19] drm/i915/dp: Sanitize DPCD revision check in intel_dp_get_dsc_sink_cap()

2023-10-11 Thread Imre Deak

Check only the eDP or the DP specific DPCD revision depending on the
sink type. Pass the corresponding revision to the function, which allows
getting the DSC caps of a branch device (in an MST topology, which has
its own DPCD and so DPCD revision).

While at it use DP_DPCD_REV_14 instead of open coding it and for clarity
add a separate function to read out the DSC capability on eDP.

v2:
- Use DP_DPCD_REV_14 instead of open coding it. (Stan)
- Check EDP_DCPD_REV/DPCD_REV in a clearer way. (Ville)
v3:
- Fix the read-out for eDP in intel_dp_detect().

Cc: Ville Syrjälä 
Reviewed-by: Stanislav Lisovskiy  (v1)
Reviewed-by: Ville Syrjälä  (v2)
Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 81 +
 1 file changed, 55 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 4f6835a7578eb..be7de7b5616f1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3467,7 +3467,23 @@ bool intel_dp_get_colorimetry_status(struct intel_dp 
*intel_dp)
return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
 }
 
-static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
+static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
+  u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+   if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
+DP_DSC_RECEIVER_CAP_SIZE) < 0) {
+   drm_err(aux->drm_dev,
+   "Failed to read DPCD register 0x%x\n",
+   DP_DSC_SUPPORT);
+   return;
+   }
+
+   drm_dbg_kms(aux->drm_dev, "DSC DPCD: %*ph\n",
+   DP_DSC_RECEIVER_CAP_SIZE,
+   dsc_dpcd);
+}
+
+static void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_dp *intel_dp)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 
@@ -3480,30 +3496,27 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp 
*intel_dp)
/* Clear fec_capable to avoid using stale values */
intel_dp->fec_capable = 0;
 
-   /* Cache the DSC DPCD if eDP or DP rev >= 1.4 */
-   if (intel_dp->dpcd[DP_DPCD_REV] >= 0x14 ||
-   intel_dp->edp_dpcd[0] >= DP_EDP_14) {
-   if (drm_dp_dpcd_read(_dp->aux, DP_DSC_SUPPORT,
-intel_dp->dsc_dpcd,
-sizeof(intel_dp->dsc_dpcd)) < 0)
-   drm_err(>drm,
-   "Failed to read DPCD register 0x%x\n",
-   DP_DSC_SUPPORT);
+   if (dpcd_rev < DP_DPCD_REV_14)
+   return;
 
-   drm_dbg_kms(>drm, "DSC DPCD: %*ph\n",
-   (int)sizeof(intel_dp->dsc_dpcd),
-   intel_dp->dsc_dpcd);
+   intel_dp_read_dsc_dpcd(_dp->aux, intel_dp->dsc_dpcd);
 
-   /* FEC is supported only on DP 1.4 */
-   if (!intel_dp_is_edp(intel_dp) &&
-   drm_dp_dpcd_readb(_dp->aux, DP_FEC_CAPABILITY,
- _dp->fec_capable) < 0)
-   drm_err(>drm,
-   "Failed to read FEC DPCD register\n");
-
-   drm_dbg_kms(>drm, "FEC CAPABILITY: %x\n",
-   intel_dp->fec_capable);
+   if (drm_dp_dpcd_readb(_dp->aux, DP_FEC_CAPABILITY,
+ _dp->fec_capable) < 0) {
+   drm_err(>drm, "Failed to read FEC DPCD register\n");
+   return;
}
+
+   drm_dbg_kms(>drm, "FEC CAPABILITY: %x\n",
+   intel_dp->fec_capable);
+}
+
+static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_dp 
*intel_dp)
+{
+   if (edp_dpcd_rev < DP_EDP_14)
+   return;
+
+   intel_dp_read_dsc_dpcd(_dp->aux, intel_dp->dsc_dpcd);
 }
 
 static void intel_edp_mso_mode_fixup(struct intel_connector *connector,
@@ -3674,7 +3687,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
 
/* Read the eDP DSC DPCD registers */
if (HAS_DSC(dev_priv))
-   intel_dp_get_dsc_sink_cap(intel_dp);
+   intel_edp_get_dsc_sink_cap(intel_dp->edp_dpcd[0],
+  intel_dp);
 
/*
 * If needed, program our source OUI so we can make various 
Intel-specific AUX services
@@ -5338,6 +5352,23 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
   false);
 }
 
+static void
+intel_dp_detect_dsc_caps(struct intel_dp *intel_dp)
+{
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+   /* Read DP Sink DSC Cap DPCD regs for DP v1.4 */
+   if (!HAS_DSC(i915))
+   return;
+
+   if (intel_dp_is_edp(intel_dp))
+   intel_edp_get_dsc_sink_cap(intel_dp->edp_dpcd[0],
+  intel_dp);
+   else

[Intel-gfx] [PATCH v3 19/19] drm/i915/dp: Remove unused DSC caps from intel_dp

2023-10-11 Thread Imre Deak

The previous patches converted all users of the DSC DPCD caps to look
these up from the connector, so remove the version stored in intel_dp.

A follow-up patchset will read out the MST connector specific
capabilities in intel_dp_add_mst_connector() ->
intel_dp_mst_read_decompression_port_dsc_caps().

v2:
- Rebased on intel_edp_get_dsc_sink_cap() addition in the patchset.
v3:
- Rebased on read-out fix for eDP in the patchset.

Reviewed-by: Stanislav Lisovskiy  (v1)
Reviewed-by: Ville Syrjälä 
Signed-off-by: Imre Deak 
---
 .../drm/i915/display/intel_display_types.h|  2 --
 drivers/gpu/drm/i915/display/intel_dp.c   | 30 ---
 drivers/gpu/drm/i915/display/intel_dp.h   |  3 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  2 +-
 4 files changed, 7 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index d6600079bcf74..65ea37fe8cff3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1725,10 +1725,8 @@ struct intel_dp {
u8 psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE];
-   u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE];
u8 lttpr_common_caps[DP_LTTPR_COMMON_CAP_SIZE];
u8 lttpr_phy_caps[DP_MAX_LTTPR_COUNT][DP_LTTPR_PHY_CAP_SIZE];
-   u8 fec_capable;
u8 pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE];
/* source rates */
int num_source_rates;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 77bb1b48f36f0..9a4284b8bebd9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3490,10 +3490,9 @@ static void intel_dp_read_dsc_dpcd(struct drm_dp_aux 
*aux,
dsc_dpcd);
 }
 
-void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_dp *intel_dp,
-  struct intel_connector *connector)
+void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector)
 {
-   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+   struct drm_i915_private *i915 = to_i915(connector->base.dev);
 
/*
 * Clear the cached register set to avoid using stale values
@@ -3518,27 +3517,14 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct 
intel_dp *intel_dp,
 
drm_dbg_kms(>drm, "FEC CAPABILITY: %x\n",
connector->dp.fec_capability);
-
-   /*
-* TODO: remove the following intel_dp copies once all users
-* are converted to look up DSC DPCD/FEC capability via the
-* connector.
-*/
-   memcpy(intel_dp->dsc_dpcd, connector->dp.dsc_dpcd,
-  sizeof(intel_dp->dsc_dpcd));
-   intel_dp->fec_capable = connector->dp.fec_capability;
 }
 
-static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_dp 
*intel_dp,
-  struct intel_connector *connector)
+static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_connector 
*connector)
 {
if (edp_dpcd_rev < DP_EDP_14)
return;
 
intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux, 
connector->dp.dsc_dpcd);
-
-   memcpy(intel_dp->dsc_dpcd, connector->dp.dsc_dpcd,
-  sizeof(intel_dp->dsc_dpcd));
 }
 
 static void intel_edp_mso_mode_fixup(struct intel_connector *connector,
@@ -3710,7 +3696,6 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp, struct 
intel_connector *connector
/* Read the eDP DSC DPCD registers */
if (HAS_DSC(dev_priv))
intel_edp_get_dsc_sink_cap(intel_dp->edp_dpcd[0],
-  intel_dp,
   connector);
 
/*
@@ -5386,10 +5371,10 @@ intel_dp_detect_dsc_caps(struct intel_dp *intel_dp, 
struct intel_connector *conn
 
if (intel_dp_is_edp(intel_dp))
intel_edp_get_dsc_sink_cap(intel_dp->edp_dpcd[0],
-  intel_dp, connector);
+  connector);
else
intel_dp_get_dsc_sink_cap(intel_dp->dpcd[DP_DPCD_REV],
- intel_dp, connector);
+ connector);
 }
 
 static int
@@ -5423,11 +5408,6 @@ intel_dp_detect(struct drm_connector *connector,
 
if (status == connector_status_disconnected) {
memset(_dp->compliance, 0, sizeof(intel_dp->compliance));
-   /*
-* TODO: Remove clearing the DPCD in intel_dp, once all
-* user are converted to using the DPCD in connector.
-*/
-   memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));
memset(intel_connector->dp.dsc_dpcd, 0, 
sizeof(intel_connector->dp.dsc_dpcd));

[Intel-gfx] [PATCH v3 02/19] drm/i915/dp: Store DSC DPCD capabilities in the connector

2023-10-11 Thread Imre Deak

In an MST topology the DSC capabilities are specific to each connector,
retrieved either from the sink if it decompresses the stream, or from a
branch device between the source and the sink in case this branch device
does the decompression. Accordingly each connector needs to cache its
own DSC DPCD and FEC capabilities, along with the AUX device through
which the decompression can be enabled. This patch prepares for that by
storing the capabilities and the DSC AUX device in the connector, for
now these just matching the version stored in intel_dp. The follow-up
patches will convert all users to look up these in the connector instead
of intel_dp, after which the intel_dp copies are removed.

v2:
- Rebased on intel_edp_get_dsc_sink_cap() addition in previous patch.
v3:
- Rebased on read-out fix for eDP in previous patch.

Reviewed-by: Stanislav Lisovskiy  (v1)
Reviewed-by: Ville Syrjälä 
Signed-off-by: Imre Deak 
---
 .../drm/i915/display/intel_display_types.h|  6 ++
 drivers/gpu/drm/i915/display/intel_dp.c   | 58 +--
 2 files changed, 47 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8d8b2f8d37a99..d6600079bcf74 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -620,6 +620,12 @@ struct intel_connector {
 
struct intel_dp *mst_port;
 
+   struct {
+   struct drm_dp_aux *dsc_decompression_aux;
+   u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE];
+   u8 fec_capability;
+   } dp;
+
/* Work struct to schedule a uevent on link train failure */
struct work_struct modeset_retry_work;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index be7de7b5616f1..fda09e7142512 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3483,7 +3483,8 @@ static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
dsc_dpcd);
 }
 
-static void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_dp *intel_dp)
+static void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_dp *intel_dp,
+ struct intel_connector *connector)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 
@@ -3491,32 +3492,46 @@ static void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, 
struct intel_dp *intel_dp)
 * Clear the cached register set to avoid using stale values
 * for the sinks that do not support DSC.
 */
-   memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));
+   memset(connector->dp.dsc_dpcd, 0, sizeof(connector->dp.dsc_dpcd));
 
/* Clear fec_capable to avoid using stale values */
-   intel_dp->fec_capable = 0;
+   connector->dp.fec_capability = 0;
 
if (dpcd_rev < DP_DPCD_REV_14)
return;
 
-   intel_dp_read_dsc_dpcd(_dp->aux, intel_dp->dsc_dpcd);
+   intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
+  connector->dp.dsc_dpcd);
 
-   if (drm_dp_dpcd_readb(_dp->aux, DP_FEC_CAPABILITY,
- _dp->fec_capable) < 0) {
+   if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux, 
DP_FEC_CAPABILITY,
+ >dp.fec_capability) < 0) {
drm_err(>drm, "Failed to read FEC DPCD register\n");
return;
}
 
drm_dbg_kms(>drm, "FEC CAPABILITY: %x\n",
-   intel_dp->fec_capable);
+   connector->dp.fec_capability);
+
+   /*
+* TODO: remove the following intel_dp copies once all users
+* are converted to look up DSC DPCD/FEC capability via the
+* connector.
+*/
+   memcpy(intel_dp->dsc_dpcd, connector->dp.dsc_dpcd,
+  sizeof(intel_dp->dsc_dpcd));
+   intel_dp->fec_capable = connector->dp.fec_capability;
 }
 
-static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_dp 
*intel_dp)
+static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_dp 
*intel_dp,
+  struct intel_connector *connector)
 {
if (edp_dpcd_rev < DP_EDP_14)
return;
 
-   intel_dp_read_dsc_dpcd(_dp->aux, intel_dp->dsc_dpcd);
+   intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux, 
connector->dp.dsc_dpcd);
+
+   memcpy(intel_dp->dsc_dpcd, connector->dp.dsc_dpcd,
+  sizeof(intel_dp->dsc_dpcd));
 }
 
 static void intel_edp_mso_mode_fixup(struct intel_connector *connector,
@@ -3608,7 +3623,7 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
 }
 
 static bool
-intel_edp_init_dpcd(struct intel_dp *intel_dp)
+intel_edp_init_dpcd(struct intel_dp *intel_dp, struct intel_connector 
*connector)
 {
struct drm_i915_private *dev_priv =

Re: [Intel-gfx] Regression in linux-next

2023-10-11 Thread Borah, Chaitanya Kumar

Hello Rafael,

> -Original Message-
> From: Wysocki, Rafael J 
> Sent: Wednesday, October 11, 2023 9:44 PM
> To: Borah, Chaitanya Kumar 
> Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
> ; Saarinen, Jani 
> Subject: Re: Regression in linux-next
> 
> Hi,
> 
> On 10/11/2023 6:00 AM, Borah, Chaitanya Kumar wrote:
> > Hello Rafael,
> >
> >> -Original Message-
> >> From: Wysocki, Rafael J 
> >> Sent: Tuesday, October 10, 2023 12:54 AM
> >> To: Borah, Chaitanya Kumar 
> >> Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
> >> ; Saarinen, Jani
> >> 
> >> Subject: Re: Regression in linux-next
> >>
> >> Hi,
> >>
> >> On 10/9/2023 7:10 AM, Borah, Chaitanya Kumar wrote:
> >>> Hello Rafael
> >>>
>  Thanks for the report, I think that this is a lockdep assertion failing.
>  If that is correct, it should be straightforward to fix.
>  I'll take care of this early next week.
>  Thanks!
> >>> Thank you for your response.  Please let us know when a fix is available.
> >> It should be fixed in linux-next from today, by this commit:
> >>
> >> https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-
> >> pm.git/commit/?h=linux-
> >> next=b4027ce7714f309e96b804b7fb088a40d708
> >>
> >> Thanks!
> > Thanks a lot for the fix. This seems to have fixed the issue in most of the
> machines but we are still seeing a similar problem in few of the machines.
> 
> Thanks for reporting this!
> 
> 
> > This has a different call stack but seems to be from the same thermal
> > subsystem. Full logs in [1]
> >
> > <4>[4.392015] WARNING: CPU: 1 PID: 306 at
> drivers/thermal/thermal_trip.c:178 thermal_zone_trip_id+0x61/0x70
> > <4>[4.392022] Modules linked in: x86_pkg_temp_thermal coretemp
> kvm_intel mei_pxp mei_hdcp wmi_bmof kvm e1000e irqbypass
> crct10dif_pclmul video ptp crc32_pclmul ghash_clmulni_intel i2c_i801
> mei_me pps_core mei i2c_smbus wmi
> > <4>[4.392057] CPU: 1 PID: 306 Comm: thermald Not tainted 6.6.0-rc5-
> next-20231010-next-20231010-gc0a6edb636cb+ #1
> > <4>[4.392061] Hardware name: System manufacturer System Product
> Name/Z170M-PLUS, BIOS 3610 03/29/2018
> > <4>[4.392063] RIP: 0010:thermal_zone_trip_id+0x61/0x70
> > <4>[4.392066] Code: 74 0c 83 c0 01 39 c8 75 f0 b8 c3 ff ff ff 5b 5d c3 
> > cc cc
> cc cc 48 8d bf f0 05 00 00 be ff ff ff ff e8 63 a4 2d 00 85 c0 75 b5 <0f> 0b 
> eb b1
> 66 2e 0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90
> > <4>[4.392069] RSP: 0018:c9000156bda8 EFLAGS: 00010246
> > <4>[4.392073] RAX:  RBX: 888103828ae8 RCX:
> 0001
> > <4>[4.392075] RDX: 8000 RSI: 823de5ab RDI:
> 823fdfba
> > <4>[4.392078] RBP: 888103a88800 R08: 888103828ae8 R09:
> 0001
> > <4>[4.392080] R10: 0001 R11: 88811494d3c0 R12:
> 888103a88818
> > <4>[4.392082] R13: 8881108bfa00 R14: 888103794408 R15:
> 0001
> > <4>[4.392084] FS:  7f1f0d6d28c0() GS:88822e68()
> knlGS:
> > <4>[4.392087] CS:  0010 DS:  ES:  CR0: 80050033
> > <4>[4.392089] CR2: 55857c50b750 CR3: 000111efa005 CR4:
> 003706f0
> > <4>[4.392091] DR0:  DR1:  DR2:
> 
> > <4>[4.392093] DR3:  DR6: fffe0ff0 DR7:
> 0400
> > <4>[4.392095] Call Trace:
> > <4>[4.392097]  
> > <4>[4.392100]  ? __warn+0x7f/0x170
> > <4>[4.392104]  ? thermal_zone_trip_id+0x61/0x70
> > <4>[4.392109]  ? report_bug+0x1f8/0x200
> > <4>[4.392116]  ? handle_bug+0x3c/0x70
> > <4>[4.392119]  ? exc_invalid_op+0x18/0x70
> > <4>[4.392123]  ? asm_exc_invalid_op+0x1a/0x20
> > <4>[4.392133]  ? thermal_zone_trip_id+0x61/0x70
> > <4>[4.392137]  ? thermal_zone_trip_id+0x5d/0x70
> > <4>[4.392141]  trip_point_show+0x18/0x40
> > <4>[4.392145]  dev_attr_show+0x15/0x60
> > <4>[4.392149]  sysfs_kf_seq_show+0xb5/0x100
> > <4>[4.392154]  seq_read_iter+0x111/0x450
> > <4>[4.392158]  ? check_object+0x133/0x320
> > <4>[4.392164]  vfs_read+0x20d/0x300
> > <4>[4.392175]  ksys_read+0x64/0xe0
> > <4>[4.392180]  do_syscall_64+0x3c/0x90
> > <4>[4.392183]  entry_SYSCALL_64_after_hwframe+0x6e/0xd8
> > <4>[4.392187] RIP: 0033:0x7f1f0e193392
> >
> > Can you please check what could be the reason for this issue?
> 
> Well, one more unuseful lockdep assertion has been added recently to the
> thermal core, sorry about that.
> 
> This commit
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-
> pm.git/commit/?h=linux-
> next=108ffd12be24ba1d74b3314df8db32a0a6d55ba5
> 
> that will be merged into linux-next tomorrow if all goes well, should address
> this.

Thank you for the fix. We will wait for it to get merged in linux-next.

Regards

Chaitanya

> 
> Thanks!
> 
> 
> > [1]
> > https://intel-gfx-ci.01.org/tree/linux-next/next-20231010/fi-kbl-guc/b
> >

[Intel-gfx] [PATCH 3/3] drm/i915: move gpu error sysfs to i915_gpu_error.c

2023-10-11 Thread Jani Nikula

Hide gpu error specifics in i915_gpu_error.c. This is also cleaner wrt
conditional compilation, as i915_gpu_error.c is only built with
DRM_I915_CAPTURE_ERROR=y.

With this, we can also make i915_first_error_state() static.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 75 -
 drivers/gpu/drm/i915/i915_gpu_error.h | 17 +++---
 drivers/gpu/drm/i915/i915_sysfs.c | 79 +--
 3 files changed, 86 insertions(+), 85 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index b4c8459deb7b..f9e750217f18 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -57,6 +57,7 @@
 #include "i915_memcpy.h"
 #include "i915_reg.h"
 #include "i915_scatterlist.h"
+#include "i915_sysfs.h"
 #include "i915_utils.h"
 
 #define ALLOW_FAIL (__GFP_KSWAPD_RECLAIM | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
@@ -2208,7 +2209,7 @@ void i915_capture_error_state(struct intel_gt *gt,
i915_gpu_coredump_put(error);
 }
 
-struct i915_gpu_coredump *
+static struct i915_gpu_coredump *
 i915_first_error_state(struct drm_i915_private *i915)
 {
struct i915_gpu_coredump *error;
@@ -2484,3 +2485,75 @@ void i915_gpu_error_debugfs_register(struct 
drm_i915_private *i915)
debugfs_create_file("i915_gpu_info", 0644, minor->debugfs_root, i915,
_gpu_info_fops);
 }
+
+static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
+   struct bin_attribute *attr, char *buf,
+   loff_t off, size_t count)
+{
+
+   struct device *kdev = kobj_to_dev(kobj);
+   struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
+   struct i915_gpu_coredump *gpu;
+   ssize_t ret = 0;
+
+   /*
+* FIXME: Concurrent clients triggering resets and reading + clearing
+* dumps can cause inconsistent sysfs reads when a user calls in with a
+* non-zero offset to complete a prior partial read but the
+* gpu_coredump has been cleared or replaced.
+*/
+
+   gpu = i915_first_error_state(i915);
+   if (IS_ERR(gpu)) {
+   ret = PTR_ERR(gpu);
+   } else if (gpu) {
+   ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count);
+   i915_gpu_coredump_put(gpu);
+   } else {
+   const char *str = "No error state collected\n";
+   size_t len = strlen(str);
+
+   if (off < len) {
+   ret = min_t(size_t, count, len - off);
+   memcpy(buf, str + off, ret);
+   }
+   }
+
+   return ret;
+}
+
+static ssize_t error_state_write(struct file *file, struct kobject *kobj,
+struct bin_attribute *attr, char *buf,
+loff_t off, size_t count)
+{
+   struct device *kdev = kobj_to_dev(kobj);
+   struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
+
+   drm_dbg(_priv->drm, "Resetting error state\n");
+   i915_reset_error_state(dev_priv);
+
+   return count;
+}
+
+static const struct bin_attribute error_state_attr = {
+   .attr.name = "error",
+   .attr.mode = S_IRUSR | S_IWUSR,
+   .size = 0,
+   .read = error_state_read,
+   .write = error_state_write,
+};
+
+void i915_gpu_error_sysfs_setup(struct drm_i915_private *i915)
+{
+   struct device *kdev = i915->drm.primary->kdev;
+
+   if (sysfs_create_bin_file(>kobj, _state_attr))
+   drm_err(>drm, "error_state sysfs setup failed\n");
+}
+
+void i915_gpu_error_sysfs_teardown(struct drm_i915_private *i915)
+{
+   struct device *kdev = i915->drm.primary->kdev;
+
+   sysfs_remove_bin_file(>kobj, _state_attr);
+}
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h 
b/drivers/gpu/drm/i915/i915_gpu_error.h
index a6f2a7518cf0..68c964d6720a 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -323,11 +323,12 @@ static inline void i915_gpu_coredump_put(struct 
i915_gpu_coredump *gpu)
kref_put(>ref, __i915_gpu_coredump_free);
 }
 
-struct i915_gpu_coredump *i915_first_error_state(struct drm_i915_private 
*i915);
 void i915_reset_error_state(struct drm_i915_private *i915);
 void i915_disable_error_state(struct drm_i915_private *i915, int err);
 
 void i915_gpu_error_debugfs_register(struct drm_i915_private *i915);
+void i915_gpu_error_sysfs_setup(struct drm_i915_private *i915);
+void i915_gpu_error_sysfs_teardown(struct drm_i915_private *i915);
 
 #else
 
@@ -396,12 +397,6 @@ static inline void i915_gpu_coredump_put(struct 
i915_gpu_coredump *gpu)
 {
 }
 
-static inline struct i915_gpu_coredump *
-i915_first_error_state(struct drm_i915_private *i915)
-{
-   return ERR_PTR(-ENODEV);
-}
-
 static inline void i915_reset_error_state(struct drm_i915_private *i915)
 {
 }
@@ -415,6 +410,14 @@ static

[Intel-gfx] [PATCH 1/3] drm/i915: make some error capture functions static

2023-10-11 Thread Jani Nikula

Not needed outside of i915_gpu_error.c.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 8 
 drivers/gpu/drm/i915/i915_gpu_error.h | 5 -
 2 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index b4e31e59c799..db7ac28c44e5 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -520,7 +520,7 @@ __find_vma(struct i915_vma_coredump *vma, const char *name)
return NULL;
 }
 
-struct i915_vma_coredump *
+static struct i915_vma_coredump *
 intel_gpu_error_find_batch(const struct intel_engine_coredump *ee)
 {
return __find_vma(ee->vma, "batch");
@@ -609,9 +609,9 @@ void i915_error_printf(struct drm_i915_error_state_buf *e, 
const char *f, ...)
va_end(args);
 }
 
-void intel_gpu_error_print_vma(struct drm_i915_error_state_buf *m,
-  const struct intel_engine_cs *engine,
-  const struct i915_vma_coredump *vma)
+static void intel_gpu_error_print_vma(struct drm_i915_error_state_buf *m,
+ const struct intel_engine_cs *engine,
+ const struct i915_vma_coredump *vma)
 {
char out[ASCII85_BUFSZ];
struct page *page;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h 
b/drivers/gpu/drm/i915/i915_gpu_error.h
index 9f5971f5e980..c982b162b7ff 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -275,11 +275,6 @@ static inline void intel_klog_error_capture(struct 
intel_gt *gt,
 
 __printf(2, 3)
 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...);
-void intel_gpu_error_print_vma(struct drm_i915_error_state_buf *m,
-  const struct intel_engine_cs *engine,
-  const struct i915_vma_coredump *vma);
-struct i915_vma_coredump *
-intel_gpu_error_find_batch(const struct intel_engine_coredump *ee);
 
 struct i915_gpu_coredump *i915_gpu_coredump(struct intel_gt *gt,
intel_engine_mask_t engine_mask, 
u32 dump_flags);
-- 
2.39.2

[Intel-gfx] [PATCH 2/3] drm/i915: move gpu error debugfs to i915_gpu_error.c

2023-10-11 Thread Jani Nikula

Hide gpu error specifics in i915_gpu_error.c. This is also cleaner wrt
conditional compilation, as i915_gpu_error.c is only built with
DRM_I915_CAPTURE_ERROR=y.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_debugfs.c   | 108 +
 drivers/gpu/drm/i915/i915_gpu_error.c | 111 +-
 drivers/gpu/drm/i915/i915_gpu_error.h |   8 +-
 3 files changed, 119 insertions(+), 108 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index e9b79c2c37d8..beffac46a5e2 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -49,6 +49,7 @@
 #include "i915_debugfs.h"
 #include "i915_debugfs_params.h"
 #include "i915_driver.h"
+#include "i915_gpu_error.h"
 #include "i915_irq.h"
 #include "i915_reg.h"
 #include "i915_scheduler.h"
@@ -297,107 +298,6 @@ static int i915_gem_object_info(struct seq_file *m, void 
*data)
return 0;
 }
 
-#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
-static ssize_t gpu_state_read(struct file *file, char __user *ubuf,
- size_t count, loff_t *pos)
-{
-   struct i915_gpu_coredump *error;
-   ssize_t ret;
-   void *buf;
-
-   error = file->private_data;
-   if (!error)
-   return 0;
-
-   /* Bounce buffer required because of kernfs __user API convenience. */
-   buf = kmalloc(count, GFP_KERNEL);
-   if (!buf)
-   return -ENOMEM;
-
-   ret = i915_gpu_coredump_copy_to_buffer(error, buf, *pos, count);
-   if (ret <= 0)
-   goto out;
-
-   if (!copy_to_user(ubuf, buf, ret))
-   *pos += ret;
-   else
-   ret = -EFAULT;
-
-out:
-   kfree(buf);
-   return ret;
-}
-
-static int gpu_state_release(struct inode *inode, struct file *file)
-{
-   i915_gpu_coredump_put(file->private_data);
-   return 0;
-}
-
-static int i915_gpu_info_open(struct inode *inode, struct file *file)
-{
-   struct drm_i915_private *i915 = inode->i_private;
-   struct i915_gpu_coredump *gpu;
-   intel_wakeref_t wakeref;
-
-   gpu = NULL;
-   with_intel_runtime_pm(>runtime_pm, wakeref)
-   gpu = i915_gpu_coredump(to_gt(i915), ALL_ENGINES, 
CORE_DUMP_FLAG_NONE);
-
-   if (IS_ERR(gpu))
-   return PTR_ERR(gpu);
-
-   file->private_data = gpu;
-   return 0;
-}
-
-static const struct file_operations i915_gpu_info_fops = {
-   .owner = THIS_MODULE,
-   .open = i915_gpu_info_open,
-   .read = gpu_state_read,
-   .llseek = default_llseek,
-   .release = gpu_state_release,
-};
-
-static ssize_t
-i915_error_state_write(struct file *filp,
-  const char __user *ubuf,
-  size_t cnt,
-  loff_t *ppos)
-{
-   struct i915_gpu_coredump *error = filp->private_data;
-
-   if (!error)
-   return 0;
-
-   drm_dbg(>i915->drm, "Resetting error state\n");
-   i915_reset_error_state(error->i915);
-
-   return cnt;
-}
-
-static int i915_error_state_open(struct inode *inode, struct file *file)
-{
-   struct i915_gpu_coredump *error;
-
-   error = i915_first_error_state(inode->i_private);
-   if (IS_ERR(error))
-   return PTR_ERR(error);
-
-   file->private_data  = error;
-   return 0;
-}
-
-static const struct file_operations i915_error_state_fops = {
-   .owner = THIS_MODULE,
-   .open = i915_error_state_open,
-   .read = gpu_state_read,
-   .write = i915_error_state_write,
-   .llseek = default_llseek,
-   .release = gpu_state_release,
-};
-#endif
-
 static int i915_frequency_info(struct seq_file *m, void *unused)
 {
struct drm_i915_private *i915 = node_to_i915(m->private);
@@ -837,10 +737,6 @@ static const struct i915_debugfs_files {
{"i915_perf_noa_delay", _perf_noa_delay_fops},
{"i915_wedged", _wedged_fops},
{"i915_gem_drop_caches", _drop_caches_fops},
-#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
-   {"i915_error_state", _error_state_fops},
-   {"i915_gpu_info", _gpu_info_fops},
-#endif
 };
 
 void i915_debugfs_register(struct drm_i915_private *dev_priv)
@@ -863,4 +759,6 @@ void i915_debugfs_register(struct drm_i915_private 
*dev_priv)
drm_debugfs_create_files(i915_debugfs_list,
 ARRAY_SIZE(i915_debugfs_list),
 minor->debugfs_root, minor);
+
+   i915_gpu_error_debugfs_register(dev_priv);
 }
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index db7ac28c44e5..b4c8459deb7b 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -2137,7 +2137,7 @@ __i915_gpu_coredump(struct intel_gt *gt, 
intel_engine_mask_t engine_mask, u32 du
return error;
 }
 
-struct i915_gpu_coredump *
+static struct i915_gpu_coredump *
 i915_gpu_coredump(struct intel_gt

[Intel-gfx] [PATCH] drm/i915: stop including i915_utils.h from intel_runtime_pm.h

2023-10-11 Thread Jani Nikula

Remove an unnecessary include.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/intel_runtime_pm.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.h 
b/drivers/gpu/drm/i915/intel_runtime_pm.h
index f79cda7a2503..be43614c73fd 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.h
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.h
@@ -11,8 +11,6 @@
 
 #include "intel_wakeref.h"
 
-#include "i915_utils.h"
-
 struct device;
 struct drm_i915_private;
 struct drm_printer;
-- 
2.39.2

Re: [Intel-gfx] Regression in linux-next

2023-10-11 Thread Wysocki, Rafael J


Hi,

On 10/11/2023 6:00 AM, Borah, Chaitanya Kumar wrote:

Hello Rafael,


-Original Message-
From: Wysocki, Rafael J 
Sent: Tuesday, October 10, 2023 12:54 AM
To: Borah, Chaitanya Kumar 
Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
; Saarinen, Jani 
Subject: Re: Regression in linux-next

Hi,

On 10/9/2023 7:10 AM, Borah, Chaitanya Kumar wrote:

Hello Rafael


Thanks for the report, I think that this is a lockdep assertion failing.
If that is correct, it should be straightforward to fix.
I'll take care of this early next week.
Thanks!

Thank you for your response.  Please let us know when a fix is available.

It should be fixed in linux-next from today, by this commit:

https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-
pm.git/commit/?h=linux-
next=b4027ce7714f309e96b804b7fb088a40d708

Thanks!

Thanks a lot for the fix. This seems to have fixed the issue in most of the 
machines but we are still seeing a similar problem in few of the machines.


Thanks for reporting this!



This has a different call stack but seems to be from the same thermal 
subsystem. Full logs in [1]

<4>[4.392015] WARNING: CPU: 1 PID: 306 at 
drivers/thermal/thermal_trip.c:178 thermal_zone_trip_id+0x61/0x70
<4>[4.392022] Modules linked in: x86_pkg_temp_thermal coretemp kvm_intel 
mei_pxp mei_hdcp wmi_bmof kvm e1000e irqbypass crct10dif_pclmul video ptp 
crc32_pclmul ghash_clmulni_intel i2c_i801 mei_me pps_core mei i2c_smbus wmi
<4>[4.392057] CPU: 1 PID: 306 Comm: thermald Not tainted 
6.6.0-rc5-next-20231010-next-20231010-gc0a6edb636cb+ #1
<4>[4.392061] Hardware name: System manufacturer System Product 
Name/Z170M-PLUS, BIOS 3610 03/29/2018
<4>[4.392063] RIP: 0010:thermal_zone_trip_id+0x61/0x70
<4>[4.392066] Code: 74 0c 83 c0 01 39 c8 75 f0 b8 c3 ff ff ff 5b 5d c3 cc cc cc 
cc 48 8d bf f0 05 00 00 be ff ff ff ff e8 63 a4 2d 00 85 c0 75 b5 <0f> 0b eb b1 66 2e 
0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90
<4>[4.392069] RSP: 0018:c9000156bda8 EFLAGS: 00010246
<4>[4.392073] RAX:  RBX: 888103828ae8 RCX: 
0001
<4>[4.392075] RDX: 8000 RSI: 823de5ab RDI: 
823fdfba
<4>[4.392078] RBP: 888103a88800 R08: 888103828ae8 R09: 
0001
<4>[4.392080] R10: 0001 R11: 88811494d3c0 R12: 
888103a88818
<4>[4.392082] R13: 8881108bfa00 R14: 888103794408 R15: 
0001
<4>[4.392084] FS:  7f1f0d6d28c0() GS:88822e68() 
knlGS:
<4>[4.392087] CS:  0010 DS:  ES:  CR0: 80050033
<4>[4.392089] CR2: 55857c50b750 CR3: 000111efa005 CR4: 
003706f0
<4>[4.392091] DR0:  DR1:  DR2: 

<4>[4.392093] DR3:  DR6: fffe0ff0 DR7: 
0400
<4>[4.392095] Call Trace:
<4>[4.392097]  
<4>[4.392100]  ? __warn+0x7f/0x170
<4>[4.392104]  ? thermal_zone_trip_id+0x61/0x70
<4>[4.392109]  ? report_bug+0x1f8/0x200
<4>[4.392116]  ? handle_bug+0x3c/0x70
<4>[4.392119]  ? exc_invalid_op+0x18/0x70
<4>[4.392123]  ? asm_exc_invalid_op+0x1a/0x20
<4>[4.392133]  ? thermal_zone_trip_id+0x61/0x70
<4>[4.392137]  ? thermal_zone_trip_id+0x5d/0x70
<4>[4.392141]  trip_point_show+0x18/0x40
<4>[4.392145]  dev_attr_show+0x15/0x60
<4>[4.392149]  sysfs_kf_seq_show+0xb5/0x100
<4>[4.392154]  seq_read_iter+0x111/0x450
<4>[4.392158]  ? check_object+0x133/0x320
<4>[4.392164]  vfs_read+0x20d/0x300
<4>[4.392175]  ksys_read+0x64/0xe0
<4>[4.392180]  do_syscall_64+0x3c/0x90
<4>[4.392183]  entry_SYSCALL_64_after_hwframe+0x6e/0xd8
<4>[4.392187] RIP: 0033:0x7f1f0e193392

Can you please check what could be the reason for this issue?


Well, one more unuseful lockdep assertion has been added recently to the 
thermal core, sorry about that.


This commit

https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git/commit/?h=linux-next=108ffd12be24ba1d74b3314df8db32a0a6d55ba5

that will be merged into linux-next tomorrow if all goes well, should 
address this.


Thanks!



[1] 
https://intel-gfx-ci.01.org/tree/linux-next/next-20231010/fi-kbl-guc/boot0.txt

Regards

Chaitanya







From: Wysocki, Rafael J 
Sent: Saturday, October 7, 2023 2:01 AM
To: Borah, Chaitanya Kumar 
Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
; Saarinen, Jani

Subject: Re: Regression in linux-next

Hi,
On 10/5/2023 5:58 PM, Borah, Chaitanya Kumar wrote:
Hello Rafael,

Hope you are doing well. I am Chaitanya from the linux graphics team in

Intel.

This mail is regarding a regression we are seeing in our CI runs[1] on linux-

next repository.

Thanks for the report, I think that this is a lockdep assertion failing.
If that is correct, it should be straightforward to fix.
I'll take care of this early next week.
Thanks!

On next-20231003 [2], we are seeing the following error

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Drop redundant !modeset check

2023-10-11 Thread Ville Syrjälä

On Wed, Oct 11, 2023 at 04:47:00PM +0300, Lisovskiy, Stanislav wrote:
> On Thu, Sep 07, 2023 at 03:25:39PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä 
> > 
> > Since commit 7de5b6b54630 ("drm/i915: Don't flag both full
> > modeset and fastset at the same time")
> > intel_crtc_needs_fastset() and intel_crtc_needs_modeset() have
> > been mutually exclusive. Drop the redundant check.
> > 
> > Signed-off-by: Ville Syrjälä 
> 
> Let's see if the crash returns, however if it does then anyway
> its time to change/refactor bigjoiner logic(as we suspected it
> to be bigjoiner issue)

You must be thinking of some other patch.

> 
> Reviewed-by: Stanislav Lisovskiy 
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 83e1bc858b9f..526f38b502be 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -6606,7 +6606,7 @@ static void intel_update_crtc(struct 
> > intel_atomic_state *state,
> >  * valid pipe configuration from the BIOS we need to take care
> >  * of enabling them on the CRTC's first fastset.
> >  */
> > -   if (intel_crtc_needs_fastset(new_crtc_state) && !modeset &&
> > +   if (intel_crtc_needs_fastset(new_crtc_state) &&
> > old_crtc_state->inherited)
> > intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
> >  }
> > -- 
> > 2.41.0
> > 

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: enable W=1 warnings by default

2023-10-11 Thread Masahiro Yamada

On Wed, Oct 11, 2023 at 4:29 PM Jani Nikula  wrote:
>
> We enable a bunch more compiler warnings than the kernel
> defaults. However, they've drifted to become a unique set of warnings,
> and have increasingly fallen behind from the W=1 set.
>
> Align with the W=1 warnings from scripts/Makefile.extrawarn for clarity,
> by copy-pasting them with s/KBUILD_CFLAGS/subdir-ccflags-y/ to make it
> easier to compare in the future.
>
> Some of the -Wextra warnings do need to be disabled, just like in
> Makefile.extrawarn, but take care to not disable them for W=2 or W=3
> builds, depending on the warning.
>
> v2: Add back some -Wextra warning disables (Nathan)
>
> Cc: Arnd Bergmann 
> Cc: Nick Desaulniers 
> Cc: Nathan Chancellor 
> Cc: Masahiro Yamada 
> Reviewed-by: Nathan Chancellor 
> Signed-off-by: Jani Nikula 

Reviewed-by: Masahiro Yamada 


-- 
Best Regards
Masahiro Yamada

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: drop -Wall and related disables from cflags as redundant

2023-10-11 Thread Masahiro Yamada

On Wed, Oct 11, 2023 at 4:29 PM Jani Nikula  wrote:
>
> The kernel top level Makefile, and recently scripts/Makefile.extrawarn,
> have included -Wall, and the disables -Wno-format-security and
> $(call cc-disable-warning,frame-address,) for a very long time. They're
> redundant in our local subdir-ccflags-y and can be dropped.
>
> Cc: Arnd Bergmann 
> Cc: Nick Desaulniers 
> Cc: Nathan Chancellor 
> Cc: Masahiro Yamada 
> Reviewed-by: Nathan Chancellor 
> Acked-by: Nick Desaulniers 
> Signed-off-by: Jani Nikula 
> ---

Reviewed-by: Masahiro Yamada 



-- 
Best Regards
Masahiro Yamada

[Intel-gfx] [PATCH i-g-t v3 10/11] lib/kunit: Fetch a list of test cases in advance

2023-10-11 Thread Janusz Krzysztofik

Recent improvements to the kernel kunit framework allow us to obtain a
list of test cases provided by a kunit test module without actually
running them.  Use that feature to get a list of expected test cases
before we enter a loop around igt_dynamic().  Once done, enter the
igt_dynamic() section for each consecutive test case immediately, even
before first line of a related KTAP report appears, then look for a result
from that test case.  That should make our IGT results output still better
synchronized with related kernel messages.

The list of test cases provided by a kunit test module can be obtained by
loading the kunit base module with specific options, then loading the test
module.  For that to be possible, take care of unloading the kunit base
module before each kunit subtest (I was wrong when in one of my previous
commit messages I suggested that on final unload of a kunit test module
the kunit base module is unloaded automatically as its dependency,
however, that didn't matter before, then no separate fix was required).
Since that module can then be left loaded with non-default options if an
error occurs, unload it explicitly before returning from igt_kunit().

There are two possible ways of getting a list of test cases: by loading
the base kunit module with action=list module option, or by filtering
out all test cases from being executed while asking for SKIP results from
those filtered out.  Since the latter provides regular KTAP report that we
can already parse perfectly, use it instead of trying to identify an
unstructured list of test cases of unknown length submitted by the former.

If an IGT test that calls igt_kunit() provides a subtest name then use
that name to filter out potential test cases that don't belong to the
named test suite from the list.

To avoid loading any modules if no subtest is going to be executed (e.g.,
if a nonexistent subtest has been requested), load the kunit modules in
list mode from inside the igt_subtest_with_dynamic() section.  In order to
be free to skip the whole subtest on unmet requirements that need to be
verified after that list has been already populated, clean it up from a
follow up igt_fixture section.

Since we may now finish processing of all test cases / dynamic sub-
subtests before KTAP parsing completes, don't fail if we exit the loop of
dynamic sub-subtests with -EINPROGRESS error code returned by the parser.

v3: Preserve backward compatibility with kernels that can't provide
listings of kunit test cases when kunit core is built as a module.
v2: Split out changes in handling of modprobe errors and kernel taints to
separate patches (Kamil),
  - fix some string duplicates referenced from filtered out test cases not
freed,
  - don't check if next result is needed before fetching one, obviously
true in first dynamic sub-subtest, and we always free last result
before looping to next sub-subtest,
  - still break the loop of test cases on unexpected return codes from
kunit_kmsg_get_result(),
  - use kunit_results_free() helper,
  - fix typos (Kamil),
  - update commit description.

Signed-off-by: Janusz Krzysztofik 
Acked-by: Kamil Konieczny  # v2
---
 lib/igt_kmod.c | 277 ++---
 1 file changed, 264 insertions(+), 13 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 5d85732b08..c20c52d372 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -902,8 +902,9 @@ static void kunit_results_free(struct igt_list_head 
*results,
free(*suite_name);
 }
 
-static void
-__igt_kunit(struct igt_ktest *tst, const char *name, const char *opts)
+static void __igt_kunit_legacy(struct igt_ktest *tst,
+  const char *name,
+  const char *opts)
 {
struct modprobe_data modprobe = { tst->kmod, opts, 0, pthread_self(), };
char *suite_name = NULL, *case_name = NULL;
@@ -912,13 +913,7 @@ __igt_kunit(struct igt_ktest *tst, const char *name, const 
char *opts)
pthread_mutexattr_t attr;
IGT_LIST_HEAD(results);
unsigned long taints;
-   int flags, ret;
-
-   igt_skip_on_f(tst->kmsg < 0, "Could not open /dev/kmsg\n");
-
-   igt_skip_on((flags = fcntl(tst->kmsg, F_GETFL, 0), flags < 0));
-   igt_skip_on_f(fcntl(tst->kmsg, F_SETFL, flags & ~O_NONBLOCK) == -1,
- "Could not set /dev/kmsg to blocking mode\n");
+   int ret;
 
igt_skip_on(lseek(tst->kmsg, 0, SEEK_END) < 0);
 
@@ -1041,6 +1036,232 @@ __igt_kunit(struct igt_ktest *tst, const char *name, 
const char *opts)
igt_skip_on_f(ret, "KTAP parser failed\n");
 }
 
+static void kunit_get_tests(struct igt_list_head *tests,
+   struct igt_ktest *tst,
+   const char *filter,
+   const char *opts)
+{
+   char *suite_name = NULL, *case_name = NULL;
+   struct igt_ktap_result *r, *rn;
+   struct igt_ktap_results *ktap;
+

[Intel-gfx] [PATCH i-g-t v3 11/11] lib/kunit: Execute kunit test cases only when needed

2023-10-11 Thread Janusz Krzysztofik

IGT user interface allows to request execution of only those dynamic sub-
subtests that match a user provided name pattern.  If the user pattern
doesn't match any names of test cases provided by a kunit test module used
with the subtest to be run then no results from any dynamic sub-subtests
will be reported.  Since we already know the list of test cases provided
by the kunit test module, there is no need to load that module to execute
them unless the user pattern matches at least one of those test cases.

Don't load the kunit test module in execute mode before entering the loop
of dynamic sub-subtests, and do that only from the first actually executed
dynamic sub-subtest.

v2: Always pass last result to next dynamic sub-subtest, fetch first
result right after loading the kunit test module for execution.

Signed-off-by: Janusz Krzysztofik 
Reviewed-by: Kamil Konieczny 
---
 lib/igt_kmod.c | 66 ++
 1 file changed, 35 insertions(+), 31 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index c20c52d372..ca0356b1ca 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -1130,33 +1130,37 @@ static void __igt_kunit(struct igt_ktest *tst,
 
igt_skip_on(lseek(tst->kmsg, 0, SEEK_END) < 0);
 
-   igt_skip_on(pthread_mutexattr_init());
-   igt_skip_on(pthread_mutexattr_setrobust(, PTHREAD_MUTEX_ROBUST));
-   igt_skip_on(pthread_mutex_init(, ));
-
ktap = igt_ktap_alloc();
igt_require(ktap);
 
-   if (igt_debug_on(pthread_create(, NULL,
-   modprobe_task, ))) {
-   igt_ktap_free(ktap);
-   igt_skip("Failed to create a modprobe thread\n");
-   }
-
igt_list_for_each_entry(t, tests, link) {
igt_dynamic_f("%s%s%s",
  strcmp(t->suite_name, name) ?  t->suite_name : "",
  strcmp(t->suite_name, name) ? "-" : "",
  t->case_name) {
 
-   if (igt_list_empty()) {
+   if (!modprobe.thread) {
+   igt_assert_eq(pthread_mutexattr_init(), 0);
+   igt_assert_eq(pthread_mutexattr_setrobust(,
+ PTHREAD_MUTEX_ROBUST),
+ 0);
+   igt_assert_eq(pthread_mutex_init(,
+), 0);
+
+   modprobe.err = pthread_create(,
+ NULL,
+ modprobe_task,
+ );
+   igt_assert_eq(modprobe.err, 0);
+
+   igt_assert(igt_list_empty());
igt_assert_eq(ret, -EINPROGRESS);
ret = kunit_kmsg_result_get(, ,
tst->kmsg, ktap);
igt_fail_on(igt_list_empty());
-   }
 
-   r = igt_list_first_entry(, r, link);
+   r = igt_list_first_entry(, r, link);
+   }
 
while (igt_debug_on_f(strcmp(r->suite_name, 
t->suite_name),
  "suite_name expected: %s, got: 
%s\n",
@@ -1228,30 +1232,30 @@ static void __igt_kunit(struct igt_ktest *tst,
igt_assert_eq(igt_kernel_tainted(), 0);
}
 
-   kunit_result_free(, _name, _name);
-
if (igt_debug_on(ret != -EINPROGRESS))
break;
}
 
kunit_results_free(, _name, _name);
 
-   switch (pthread_mutex_lock()) {
-   case 0:
-   igt_debug_on(pthread_cancel(modprobe.thread));
-   igt_debug_on(pthread_mutex_unlock());
-   igt_debug_on(pthread_join(modprobe.thread, NULL));
-   break;
-   case EOWNERDEAD:
-   /* leave the mutex unrecoverable */
-   igt_debug_on(pthread_mutex_unlock());
-   break;
-   case ENOTRECOVERABLE:
-   break;
-   default:
-   igt_debug("pthread_mutex_lock() failed\n");
-   igt_debug_on(pthread_join(modprobe.thread, NULL));
-   break;
+   if (modprobe.thread) {
+   switch (pthread_mutex_lock()) {
+   case 0:
+   igt_debug_on(pthread_cancel(modprobe.thread));
+   igt_debug_on(pthread_mutex_unlock());
+   igt_debug_on(pthread_join(modprobe.thread, NULL));
+   break;
+   case EOWNERDEAD:
+   /* leave the mutex unrecoverable */
+

[Intel-gfx] [PATCH i-g-t v3 07/11] tests/kms_selftest: Let subtest names match suite names

2023-10-11 Thread Janusz Krzysztofik

There is a rule specified in Kunit Test Style and Nomenclature guidelines
[1] that states modules should be named after the test suite, followed by
_test.  Of course, that rule applies only to modules that provide one test
suite per module.

As long as that rule is obeyed by authors of Kunit test modules, there is
no need to hardcode related IGT subtest names in IGT source code.  We are
already able to derive subtest names from module names, with their _test
or _kunit suffixes stripped.  We may expect those names will match Kunit
suite names provided by the modules.

Drop custom subtest names from IGT Kunit tests that still use them.
However, keep the mechanism that allows us to provide a name that differs
from that derived from module name.  That will be required if we ever need
to support a kunit test module that provides multiple test suites (think
of i915 selftests code converted to kunit and the i915 module potentially
providing three test suites: mock, live and perf).

[1] https://docs.kernel.org/dev-tools/kunit/style.html

Signed-off-by: Janusz Krzysztofik 
Reviewed-by: Kamil Konieczny 
---
 tests/kms_selftest.c | 37 -
 1 file changed, 16 insertions(+), 21 deletions(-)

diff --git a/tests/kms_selftest.c b/tests/kms_selftest.c
index 080ffdf2c0..6618dbe50b 100644
--- a/tests/kms_selftest.c
+++ b/tests/kms_selftest.c
@@ -37,35 +37,30 @@
  *
  * arg[1]:
  *
- * @drm_cmdline:drm cmdline
- * @drm_damage: drm damage
- * @drm_dp_mst: drm dp mst
+ * @drm_cmdline_parser: drm cmdline parser
+ * @drm_damage_helper:  drm damage helper
+ * @drm_dp_mst_helper:  drm dp mst helper
  * @drm_format_helper:  drm format helper
  * @drm_format: drm format
- * @drm_plane:  drm plane
- * @framebuffer:framebuffer
+ * @drm_plane_helper:   drm plane helper
+ * @drm_framebuffer:drm framebuffer
  */
 
 IGT_TEST_DESCRIPTION("Basic sanity check of KMS selftests.");
 
-struct kms_kunittests {
-   const char *kunit;
-   const char *name;
-};
-
 igt_main
 {
-   static const struct kms_kunittests kunit_subtests[] = {
-   { "drm_cmdline_parser_test","drm_cmdline" },
-   { "drm_damage_helper_test", "drm_damage" },
-   { "drm_dp_mst_helper_test", "drm_dp_mst" },
-   { "drm_format_helper_test", "drm_format_helper" },
-   { "drm_format_test","drm_format" },
-   { "drm_framebuffer_test",   "framebuffer" },
-   { "drm_plane_helper_test",  "drm_plane" },
-   { NULL, NULL}
+   static const char *kunit_subtests[] = {
+   "drm_cmdline_parser_test",
+   "drm_damage_helper_test",
+   "drm_dp_mst_helper_test",
+   "drm_format_helper_test",
+   "drm_format_test",
+   "drm_framebuffer_test",
+   "drm_plane_helper_test",
+   NULL,
};
 
-   for (int i = 0; kunit_subtests[i].kunit != NULL; i++)
-   igt_kunit(kunit_subtests[i].kunit, kunit_subtests[i].name, 
NULL);
+   for (int i = 0; kunit_subtests[i] != NULL; i++)
+   igt_kunit(kunit_subtests[i], NULL, NULL);
 }
-- 
2.42.0

[Intel-gfx] [PATCH i-g-t v3 08/11] lib/kunit: Provide all results cleanup helper

2023-10-11 Thread Janusz Krzysztofik

Planned changes require a couple of loops around kunit_result_free().
Since we already have such loop, move it into a helper in preparation for
future uses.

Signed-off-by: Janusz Krzysztofik 
Reviewed-by: Kamil Konieczny 
---
 lib/igt_kmod.c | 20 ++--
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index d014644fb4..21c547bf42 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -888,13 +888,25 @@ static void kunit_result_free(struct igt_ktap_result **r,
*r = NULL;
 }
 
+static void kunit_results_free(struct igt_list_head *results,
+  char **suite_name, char **case_name)
+{
+   struct igt_ktap_result *r, *rn;
+
+   igt_list_for_each_entry_safe(r, rn, results, link)
+   kunit_result_free(, suite_name, case_name);
+
+   free(*case_name);
+   free(*suite_name);
+}
+
 static void
 __igt_kunit(struct igt_ktest *tst, const char *name, const char *opts)
 {
struct modprobe_data modprobe = { tst->kmod, opts, 0, pthread_self(), };
char *suite_name = NULL, *case_name = NULL;
-   struct igt_ktap_result *r, *rn;
struct igt_ktap_results *ktap;
+   struct igt_ktap_result *r;
pthread_mutexattr_t attr;
IGT_LIST_HEAD(results);
unsigned long taints;
@@ -1000,11 +1012,7 @@ __igt_kunit(struct igt_ktest *tst, const char *name, 
const char *opts)
 
} while (ret == -EINPROGRESS);
 
-   igt_list_for_each_entry_safe(r, rn, , link)
-   kunit_result_free(, _name, _name);
-
-   free(case_name);
-   free(suite_name);
+   kunit_results_free(, _name, _name);
 
switch (pthread_mutex_lock()) {
case 0:
-- 
2.42.0

[Intel-gfx] [PATCH i-g-t v3 09/11] lib/kunit: Prepare for KTAP parsing after modprobe completed

2023-10-11 Thread Janusz Krzysztofik

We are going to add support for reading a list of kunit test cases
provided by a kunit test module prior to executing those test cases.  That
will be done by first loading kunit modules in list only mode, then
reading the list from /dev/kmsg with our KTAP parser.  Since that parsing
will be performed after the kunit test module is successfully loaded and
there will be no concurrently running modprobe thread, we need to make
synchronization of reads from /dev/kmsg with potential errors modprobe
thread optional.

Signed-off-by: Janusz Krzysztofik 
Reviewed-by: Kamil Konieczny 
---
 lib/igt_kmod.c | 50 ++
 1 file changed, 26 insertions(+), 24 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 21c547bf42..5d85732b08 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -805,34 +805,36 @@ static int kunit_kmsg_result_get(struct igt_list_head 
*results,
if (igt_debug_on(igt_kernel_tainted()))
return -ENOTRECOVERABLE;
 
-   err = igt_debug_on(sigaction(SIGCHLD, , saved));
-   if (err == -1)
-   return -errno;
-   else if (unlikely(err))
-   return err;
-
-   err = pthread_mutex_lock(>lock);
-   switch (err) {
-   case EOWNERDEAD:
-   /* leave the mutex unrecoverable */
-   igt_debug_on(pthread_mutex_unlock(>lock));
-   __attribute__ ((fallthrough));
-   case ENOTRECOVERABLE:
-   igt_debug_on(sigaction(SIGCHLD, saved, NULL));
-   if (igt_debug_on(modprobe->err))
-   return modprobe->err;
-   break;
-   case 0:
-   break;
-   default:
-   igt_debug("pthread_mutex_lock() error: %d\n", err);
-   igt_debug_on(sigaction(SIGCHLD, saved, NULL));
-   return -err;
+   if (modprobe) {
+   err = igt_debug_on(sigaction(SIGCHLD, , saved));
+   if (err == -1)
+   return -errno;
+   else if (unlikely(err))
+   return err;
+
+   err = pthread_mutex_lock(>lock);
+   switch (err) {
+   case EOWNERDEAD:
+   /* leave the mutex unrecoverable */
+   
igt_debug_on(pthread_mutex_unlock(>lock));
+   __attribute__ ((fallthrough));
+   case ENOTRECOVERABLE:
+   igt_debug_on(sigaction(SIGCHLD, saved, NULL));
+   if (igt_debug_on(modprobe->err))
+   return modprobe->err;
+   break;
+   case 0:
+   break;
+   default:
+   igt_debug("pthread_mutex_lock() error: %d\n", 
err);
+   igt_debug_on(sigaction(SIGCHLD, saved, NULL));
+   return -err;
+   }
}
 
ret = read(fd, record, BUF_LEN);
 
-   if (!err) { /* pthread_mutex_lock() succeeded */
+   if (modprobe && !err) { /* pthread_mutex_lock() succeeded */
igt_debug_on(pthread_mutex_unlock(>lock));
igt_debug_on(sigaction(SIGCHLD, saved, NULL));
}
-- 
2.42.0

[Intel-gfx] [PATCH i-g-t v3 06/11] lib/kunit: Omit suite name prefix if the same as subtest name

2023-10-11 Thread Janusz Krzysztofik

Kunit test modules usually contain one test suite, named after the module
name with the trailing "_test" or "_kunit" suffix omitted.  Since we
follow the same convention when we derive subtest names from module names,
there is a great chance that those two names match.  Take this into
account when composing names for IGT dynamic sub-subtest names and drop
the leading test suite name component when it is the same as subtest name.

Signed-off-by: Janusz Krzysztofik 
Reviewed-by: Mauro Carvalho Chehab 
---
 lib/igt_kmod.c | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 93d9479219..d014644fb4 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -888,7 +888,8 @@ static void kunit_result_free(struct igt_ktap_result **r,
*r = NULL;
 }
 
-static void __igt_kunit(struct igt_ktest *tst, const char *opts)
+static void
+__igt_kunit(struct igt_ktest *tst, const char *name, const char *opts)
 {
struct modprobe_data modprobe = { tst->kmod, opts, 0, pthread_self(), };
char *suite_name = NULL, *case_name = NULL;
@@ -931,7 +932,11 @@ static void __igt_kunit(struct igt_ktest *tst, const char 
*opts)
 
r = igt_list_first_entry(, r, link);
 
-   igt_dynamic_f("%s-%s", r->suite_name, r->case_name) {
+   igt_dynamic_f("%s%s%s",
+ strcmp(r->suite_name, name) ?  r->suite_name : "",
+ strcmp(r->suite_name, name) ? "-" : "",
+ r->case_name) {
+
if (r->code == IGT_EXIT_INVALID) {
/* parametrized test case, get actual result */
kunit_result_free(, _name, _name);
@@ -1072,7 +1077,7 @@ void igt_kunit(const char *module_name, const char *name, 
const char *opts)
 * and for documentation.
 */
igt_subtest_with_dynamic(name)
-   __igt_kunit(, opts);
+   __igt_kunit(, name, opts);
 
igt_fixture
igt_ktest_end();
-- 
2.42.0

[Intel-gfx] [PATCH i-g-t v3 04/11] lib/kunit: Fix misplaced igt_kunit() doc

2023-10-11 Thread Janusz Krzysztofik

When igt_kunit() was converted to a helper and wrapped with a new function
promoted to take the name and role of the library API, related
documentation was left unchanged and still placed in front the demoted
function.  Update that documentation and move it to where it now belongs.

Signed-off-by: Janusz Krzysztofik 
Reviewed-by: Kamil Konieczny 
---
 lib/igt_kmod.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index df0e650d49..426ae5b26f 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -762,15 +762,6 @@ static void *modprobe_task(void *arg)
return NULL;
 }
 
-/**
- * igt_kunit:
- * @module_name: the name of the module
- * @opts: options to load the module
- *
- * Loads the test module, parses its (k)tap dmesg output, then unloads it
- *
- * Returns: IGT default codes
- */
 static void __igt_kunit(struct igt_ktest *tst, const char *opts)
 {
struct modprobe_data modprobe = { tst->kmod, opts, 0, };
@@ -849,6 +840,14 @@ static void __igt_kunit(struct igt_ktest *tst, const char 
*opts)
igt_skip_on_f(ret, "KTAP parser failed\n");
 }
 
+/**
+ * igt_kunit:
+ * @module_name: the name of the module
+ * @name: the name of subtest, if different from that derived from module name
+ * @opts: options to load the module
+ *
+ * Loads the test module, parses its (k)tap dmesg output, then unloads it
+ */
 void igt_kunit(const char *module_name, const char *name, const char *opts)
 {
struct igt_ktest tst = { .kmsg = -1, };
-- 
2.42.0

[Intel-gfx] [PATCH i-g-t v3 05/11] lib/kunit: Parse KTAP report from the main process thread

2023-10-11 Thread Janusz Krzysztofik

There was an attempt to parse KTAP reports in the background while a kunit
test module is loading.  However, since dynamic sub-subtests can be
executed only from the main thread, that attempt was not quite successful,
as IGT results from all executed kunit test cases were generated only
after loading of kunit test module completed.

Now that the parser maintains its state and we can call it separately for
each input line of a KTAP report, it is perfectly possible to call the
parser from the main thread while the module is loading in the background,
and convert results from kunit test cases immediately to results of IGT
dynamic sub-subtests by running an igt_dynamic() section for each result
as soon as returned by the parser.

Drop igt_ktap_parser() thread and execute igt_dynamic() for each kunit
result obtained from igt_ktap_parse() called from the main thread.

Also, drop no longer needed functions from igt_ktap soruces.

v4: Print debug message on pthread_kill() error once per loop (Mauro),
  - move "parent" field of the structure near other pthread_* type fields
(Kamil),
  - drop unneeded explicit return from noop void function (Kamil),
  - if (!err) looks strange, add a comment (Kamil),
  - preserve a link to KTAP standard in a comment above the winning
implementation of KTAP parser (Kamil).
v3: Fix ktap structure not freed on lseek error,
  - fix initial SIGCHLD handler not restored,
  - fix missing handling of potential errors returned by sigaction,
  - fix potential race of read() vs. ptherad_kill(), use robust mutex for
synchronization with modprobe thread,
  - fix potentially illegal use of igt_assert() called outside of
dynamic sub-subtest section,
  - fix unsupported exit code potentially passed to igt_fail(),
  - no need to fail a dynamic sub-subtest on potential KTAP parser error
after a valid result from the parser has been processed,
  - fix trailing newlines missing from error messages,
  - add more debug statements,
  - integrate common code around kunit_result_free() into it.
v2: Interrupt blocking read() on modprobe failure.

Signed-off-by: Janusz Krzysztofik 
Acked-by: Mauro Carvalho Chehab  # v2
---
 lib/igt_kmod.c | 264 +++
 lib/igt_ktap.c | 569 +
 lib/igt_ktap.h |  22 --
 3 files changed, 226 insertions(+), 629 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 426ae5b26f..93d9479219 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -1,5 +1,5 @@
 /*
- * Copyright © 2016 Intel Corporation
+ * Copyright © 2016-2023 Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -26,7 +26,12 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
+#include 
+
+#include "assembler/brw_compat.h"  /* [un]likely() */
 
 #include "igt_aux.h"
 #include "igt_core.h"
@@ -751,6 +756,9 @@ struct modprobe_data {
struct kmod_module *kmod;
const char *opts;
int err;
+   pthread_t parent;
+   pthread_mutex_t lock;
+   pthread_t thread;
 };
 
 static void *modprobe_task(void *arg)
@@ -759,16 +767,135 @@ static void *modprobe_task(void *arg)
 
data->err = modprobe(data->kmod, data->opts);
 
+   if (igt_debug_on(data->err)) {
+   bool once = false;
+   int err;
+
+   while (err = pthread_mutex_trylock(>lock),
+  err && !igt_debug_on(err != EBUSY)) {
+   igt_debug_on(pthread_kill(data->parent, SIGCHLD) &&
+!once);
+   once = true;
+   }
+   } else {
+   /* let main thread use mutex to detect modprobe completion */
+   igt_debug_on(pthread_mutex_lock(>lock));
+   }
+
return NULL;
 }
 
+static void kunit_sigchld_handler(int signal)
+{
+}
+
+static int kunit_kmsg_result_get(struct igt_list_head *results,
+struct modprobe_data *modprobe,
+int fd, struct igt_ktap_results *ktap)
+{
+   struct sigaction sigchld = { .sa_handler = kunit_sigchld_handler, },
+*saved;
+   char record[BUF_LEN + 1], *buf;
+   unsigned long taints;
+   int ret;
+
+   do {
+   int err;
+
+   if (igt_debug_on(igt_kernel_tainted()))
+   return -ENOTRECOVERABLE;
+
+   err = igt_debug_on(sigaction(SIGCHLD, , saved));
+   if (err == -1)
+   return -errno;
+   else if (unlikely(err))
+   return err;
+
+   err = pthread_mutex_lock(>lock);
+   switch (err) {
+   case EOWNERDEAD:
+   /* leave the mutex unrecoverable */
+   igt_debug_on(pthread_mutex_unlock(>lock));
+

[Intel-gfx] [PATCH i-g-t v3 03/11] lib/kunit: Be more verbose on errors

2023-10-11 Thread Janusz Krzysztofik

Use a more verbose variant of igt_fail() when failing a dynamic sub-
subtest on kernel taint.  Also, print a debug message on string
duplication failure.

Signed-off-by: Janusz Krzysztofik 
Reviewed-by: Kamil Konieczny 
---
 lib/igt_kmod.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 05ff178b27..df0e650d49 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -834,7 +834,7 @@ static void __igt_kunit(struct igt_ktest *tst, const char 
*opts)
if (!pthread_tryjoin_np(modprobe_thread, NULL))
igt_assert_eq(modprobe.err, 0);
 
-   igt_fail_on(igt_kernel_tainted());
+   igt_assert_eq(igt_kernel_tainted(), 0);
}
 
free(result);
@@ -861,7 +861,7 @@ void igt_kunit(const char *module_name, const char *name, 
const char *opts)
 */
if (!name) {
name = strdup(module_name);
-   if (name) {
+   if (!igt_debug_on(!name)) {
char *suffix = strstr(name, "_test");
 
if (!suffix)
-- 
2.42.0

[Intel-gfx] [PATCH i-g-t v3 02/11] lib/kunit: Fix handling of potential errors from F_GETFL

2023-10-11 Thread Janusz Krzysztofik

Function fcntl(..., F_GETFL, ...) that returns file status flags may also
return a negative error code.  Handle that error instead of blindly using
the returned value as flags.

Signed-off-by: Janusz Krzysztofik 
Reviewed-by: Kamil Konieczny 
---
 lib/igt_kmod.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index d98e6c5f9e..05ff178b27 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -783,8 +783,8 @@ static void __igt_kunit(struct igt_ktest *tst, const char 
*opts)
 
igt_skip_on_f(tst->kmsg < 0, "Could not open /dev/kmsg\n");
 
-   flags = fcntl(tst->kmsg, F_GETFL, 0) & ~O_NONBLOCK;
-   igt_skip_on_f(fcntl(tst->kmsg, F_SETFL, flags) == -1,
+   igt_skip_on((flags = fcntl(tst->kmsg, F_GETFL, 0), flags < 0));
+   igt_skip_on_f(fcntl(tst->kmsg, F_SETFL, flags & ~O_NONBLOCK) == -1,
  "Could not set /dev/kmsg to blocking mode\n");
 
igt_skip_on(lseek(tst->kmsg, 0, SEEK_END) < 0);
-- 
2.42.0

[Intel-gfx] [PATCH i-g-t v3 00/11] Kunit fixes and improvements

2023-10-11 Thread Janusz Krzysztofik

v3: Preserve backward compatibility with older kernels:
- drop "lib/ktap: Drop workaround for missing top level KTAP headers",
  add "lib/ktap: Improve TODO workaround description" instead,
- keep legacy processing patch when obtainig a list of test cases from
  kunit modules occurs not supported,
  - print debug message on pthread_kill() error once per loop (Mauro),
  - move "parent" field of the structure near other pthread_* type fields
(Kamil),
  - drop unneeded explicit return from noop void function (Kamil),
  - if (!err) looks strange, add a comment (Kamil),
  - preserve a link to KTAP standard in a comment above the winning
implementation of KTAP parser (Kamil).
v2: Add a new patch that provides all results cleanup helper,
  - split out changes in handling of modprobe errors and kernel taints from
"Fetch a list of test cases in advance" to separate patches (Kamil),
  - prepare for KTAP parsing after modprobe completed in a separate
patch,
  - drop other modprobe and kernel taint related changes from the series,
  - fix some string duplicates referenced from filtered out test cases not
freed,
  - always pass last result to next dynamic sub-subtest, fetch first
result right after loading the kunit test module for execution,
  - still break the loop of test cases on unexpected return codes from
kunit_kmsg_get_result(),
  - fix typos (Kamil),
  - update commit descriptions.

Janusz Krzysztofik (11):
  lib/ktap: Improve TODO workaround description
  lib/kunit: Fix handling of potential errors from F_GETFL
  lib/kunit: Be more verbose on errors
  lib/kunit: Fix misplaced igt_kunit() doc
  lib/kunit: Parse KTAP report from the main process thread
  lib/kunit: Omit suite name prefix if the same as subtest name
  tests/kms_selftest: Let subtest names match suite names
  lib/kunit: Provide all results cleanup helper
  lib/kunit: Prepare for KTAP parsing after modprobe completed
  lib/kunit: Fetch a list of test cases in advance
  lib/kunit: Execute kunit test cases only when needed

 lib/igt_kmod.c   | 571 +-
 lib/igt_ktap.c   | 582 +--
 lib/igt_ktap.h   |  22 --
 tests/kms_selftest.c |  37 ++-
 4 files changed, 540 insertions(+), 672 deletions(-)

-- 
2.42.0

[Intel-gfx] [PATCH i-g-t v3 01/11] lib/ktap: Improve TODO workaround description

2023-10-11 Thread Janusz Krzysztofik

A workaround was implemented in IGT KTAP parser so it could accepted KTAP
reports with missing top level KTAP version and test suite plan headers.
While the issue has been fixed by a kernel side commit c95e7c05c139
("kunit: Report the count of test suites in a module"), included in the
mainline kernel since v6.6-rc1, we still need to keep that workaround in
place to preserve IGT compatibility with LTS kernel version 6.1 as long as
it is used by major Linux distributions.

Update the comment with a reference to the kernel side fix and a
clarification on why we need to keep the workaround in place.

Signed-off-by: Janusz Krzysztofik 
---
 lib/igt_ktap.c | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/lib/igt_ktap.c b/lib/igt_ktap.c
index 5eac102417..3df4d6950d 100644
--- a/lib/igt_ktap.c
+++ b/lib/igt_ktap.c
@@ -91,9 +91,16 @@ int igt_ktap_parse(const char *buf, struct igt_ktap_results 
*ktap)
   "%*1[ ]%*1[ ]%*1[ ]%*1[ ]KTAP%*[ 
]version%*[ ]%u %n",
   , ) == 1 && len == strlen(buf))) {
/*
-* TODO: drop the following workaround as soon as
-* kernel side issue of missing lines with top level
-* KTAP version and test suite plan is fixed.
+* TODO: drop the following workaround, which addresses a kernel
+* side issue of missing lines that provide top level KTAP
+* version and test suite plan, as soon as no longer needed.
+*
+* The issue has been fixed in v6.6-rc1, commit c95e7c05c139
+* ("kunit: Report the count of test suites in a module"),
+* but we still need this workaround for as long as LTS kernel
+* version 6.1, with DRM selftests already converted to Kunit,
+* but without that missing Kunit headers issue fixed, is used
+* by major Linux distributions.
 */
if (ktap->expect == KTAP_START) {
ktap->suite_count = 1;
-- 
2.42.0

[Intel-gfx] [PATCH] drm/i915: drop gt/intel_gt.h include from skl_universal_plane.c

2023-10-11 Thread Jani Nikula

No longer needed after commit 94bcf876cb6a ("drm/i915/mtl: Drop
Wa_14017240301").

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 245a64332cc7..49e9d40d5e67 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -21,7 +21,6 @@
 #include "skl_scaler.h"
 #include "skl_universal_plane.h"
 #include "skl_watermark.h"
-#include "gt/intel_gt.h"
 #include "pxp/intel_pxp.h"
 
 static const u32 skl_plane_formats[] = {
-- 
2.39.2

Re: [Intel-gfx] [PATCH v2] drm/i915: Add new DG2 PCI IDs

2023-10-11 Thread Matt Roper

On Wed, Oct 11, 2023 at 01:30:39PM +0530, Shekhar Chauhan wrote:
> Add recently added PCI IDs for DG2
> 
> BSpec: 44477
> Signed-off-by: Shekhar Chauhan 

Reviewed-by: Matt Roper 

> ---
>  include/drm/i915_pciids.h | 6 +-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 1256770d3827..1c9ea6ab3eb9 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -718,7 +718,11 @@
>   INTEL_VGA_DEVICE(0x56A5, info), \
>   INTEL_VGA_DEVICE(0x56A6, info), \
>   INTEL_VGA_DEVICE(0x56B0, info), \
> - INTEL_VGA_DEVICE(0x56B1, info)
> + INTEL_VGA_DEVICE(0x56B1, info), \
> + INTEL_VGA_DEVICE(0x56BA, info), \
> + INTEL_VGA_DEVICE(0x56BB, info), \
> + INTEL_VGA_DEVICE(0x56BC, info), \
> + INTEL_VGA_DEVICE(0x56BD, info)
>  
>  #define INTEL_DG2_G12_IDS(info) \
>   INTEL_VGA_DEVICE(0x5696, info), \
> -- 
> 2.34.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [Intel-gfx] [PATCH] drm/i915: Add new DG2 PCI IDs

2023-10-11 Thread Matt Roper

On Wed, Oct 11, 2023 at 10:26:00AM +0530, Shekhar Chauhan wrote:
> Add new PCI IDs which are recently added.
> 
> BSpec: 44477
> Signed-off-by: Shekhar Chauhan 
> ---
>  include/drm/i915_pciids.h | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 1256770d3827..deb2eb0b4979 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -692,7 +692,7 @@
>   INTEL_VGA_DEVICE(0xA7A9, info), \
>   INTEL_VGA_DEVICE(0xA7AC, info), \
>   INTEL_VGA_DEVICE(0xA7AD, info)
> -
> +h

Looks like some stray garbage accidentally ended up on this line.

Aside from that, the actual changes below look good, so

Reviewed-by: Matt Roper 

with that cleaned up.


Matt

>  /* RPL-P */
>  #define INTEL_RPLP_IDS(info) \
>   INTEL_RPLU_IDS(info), \
> @@ -718,7 +718,11 @@
>   INTEL_VGA_DEVICE(0x56A5, info), \
>   INTEL_VGA_DEVICE(0x56A6, info), \
>   INTEL_VGA_DEVICE(0x56B0, info), \
> - INTEL_VGA_DEVICE(0x56B1, info)
> + INTEL_VGA_DEVICE(0x56B1, info), \
> + INTEL_VGA_DEVICE(0x56BA, info), \
> + INTEL_VGA_DEVICE(0x56BB, info), \
> + INTEL_VGA_DEVICE(0x56BC, info), \
> + INTEL_VGA_DEVICE(0x56BD, info)
>  
>  #define INTEL_DG2_G12_IDS(info) \
>   INTEL_VGA_DEVICE(0x5696, info), \
> -- 
> 2.34.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Do plane/etc. updates more atomically across pipes

2023-10-11 Thread Lisovskiy, Stanislav

On Thu, Sep 07, 2023 at 03:25:41PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Perform all the intel_pre_update_crtc() stuff for all pipes first,
> and only then do the intel_update_crtc() vblank evasion stuff for
> every pipe back to back. This should make it more likely that
> the plane updates from multiple pipes happen on the same frame
> (assuming the pipes are running in sync, eg. due to bigjoiner
> or port sync).

Reviewed-by: Stanislav Lisovskiy 

> 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 26 ++--
>  1 file changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 7c19a0f380ca..f96230232a47 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6711,6 +6711,12 @@ static void intel_commit_modeset_enables(struct 
> intel_atomic_state *state)
>  
>   intel_enable_crtc(state, crtc);
>   intel_pre_update_crtc(state, crtc);
> + }
> +
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + if (!new_crtc_state->hw.active)
> + continue;
> +
>   intel_update_crtc(state, crtc);
>   }
>  }
> @@ -6748,6 +6754,15 @@ static void skl_commit_modeset_enables(struct 
> intel_atomic_state *state)
>* So first lets enable all pipes that do not need a fullmodeset as
>* those don't have any external dependency.
>*/
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + enum pipe pipe = crtc->pipe;
> +
> + if ((update_pipes & BIT(pipe)) == 0)
> + continue;
> +
> + intel_pre_update_crtc(state, crtc);
> + }
> +
>   while (update_pipes) {
>   for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
>   new_crtc_state, i) {
> @@ -6763,7 +6778,6 @@ static void skl_commit_modeset_enables(struct 
> intel_atomic_state *state)
>   entries[pipe] = new_crtc_state->wm.skl.ddb;
>   update_pipes &= ~BIT(pipe);
>  
> - intel_pre_update_crtc(state, crtc);
>   intel_update_crtc(state, crtc);
>  
>   /*
> @@ -6819,6 +6833,15 @@ static void skl_commit_modeset_enables(struct 
> intel_atomic_state *state)
>   /*
>* Finally we do the plane updates/etc. for all pipes that got enabled.
>*/
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + enum pipe pipe = crtc->pipe;
> +
> + if ((update_pipes & BIT(pipe)) == 0)
> + continue;
> +
> + intel_pre_update_crtc(state, crtc);
> + }
> +
>   for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
>   enum pipe pipe = crtc->pipe;
>  
> @@ -6831,7 +6854,6 @@ static void skl_commit_modeset_enables(struct 
> intel_atomic_state *state)
>   entries[pipe] = new_crtc_state->wm.skl.ddb;
>   update_pipes &= ~BIT(pipe);
>  
> - intel_pre_update_crtc(state, crtc);
>   intel_update_crtc(state, crtc);
>   }
>  
> -- 
> 2.41.0
>

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Drop redundant !modeset check

2023-10-11 Thread Lisovskiy, Stanislav

On Thu, Sep 07, 2023 at 03:25:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Since commit 7de5b6b54630 ("drm/i915: Don't flag both full
> modeset and fastset at the same time")
> intel_crtc_needs_fastset() and intel_crtc_needs_modeset() have
> been mutually exclusive. Drop the redundant check.
> 
> Signed-off-by: Ville Syrjälä 

Let's see if the crash returns, however if it does then anyway
its time to change/refactor bigjoiner logic(as we suspected it
to be bigjoiner issue)

Reviewed-by: Stanislav Lisovskiy 

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 83e1bc858b9f..526f38b502be 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6606,7 +6606,7 @@ static void intel_update_crtc(struct intel_atomic_state 
> *state,
>* valid pipe configuration from the BIOS we need to take care
>* of enabling them on the CRTC's first fastset.
>*/
> - if (intel_crtc_needs_fastset(new_crtc_state) && !modeset &&
> + if (intel_crtc_needs_fastset(new_crtc_state) &&
>   old_crtc_state->inherited)
>   intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
>  }
> -- 
> 2.41.0
>

Re: [Intel-gfx] [PATCH v5 0/2] Refactor i915 HDCP for XE

2023-10-11 Thread Jani Nikula

On Mon, 09 Oct 2023, Suraj Kandpal  wrote:
> This patch series contains some refactors for i915 side of things
> which will help with a cleaner code and maximum reuse of code
> for XE going forward.
>
> Signed-off-by: Suraj Kandpal 

Acked-by: Jani Nikula 


>
> Suraj Kandpal (2):
>   drm/i915/hdcp: Move checks for gsc health status
>   drm/i915/hdcp: Move common message filling function to its own file
>
>  drivers/gpu/drm/i915/Makefile |   1 +
>  drivers/gpu/drm/i915/display/intel_hdcp.c |   8 +-
>  drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 617 +-
>  drivers/gpu/drm/i915/display/intel_hdcp_gsc.h |   1 +
>  .../drm/i915/display/intel_hdcp_gsc_message.c | 592 +
>  .../drm/i915/display/intel_hdcp_gsc_message.h |  72 ++
>  6 files changed, 692 insertions(+), 599 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.h

-- 
Jani Nikula, Intel

Re: [Intel-gfx] [PATCH 0/4] drm/i915/vlv_dsi: Add quirks for x86 android tablets (v3)

2023-10-11 Thread Jani Nikula

On Sun, 08 Oct 2023, Hans de Goede  wrote:
> Hi All,
>
> Ping what is the status of this now? This v3 addresses all review
> remarks from previous versions (specifically the request to file
> + link gitlab issues).
>
> So AFAICT this is ready for merging ?
>
> But I'm waiting for an ack for this before pushing it
> do drm-intel-next myself ...

There are maybe one or two things I could nitpick about, such as casting
away the const in there, but then I just don't have the time to look
into this much deeper, it's all fairly isolated, and, let's be honest,
you of all people probably have the best idea how well the vlv dsi code
works out in the real world.

Thanks for fixing all this stuff, and please just merge.

Acked-by: Jani Nikula 


>
> Regards,
>
> Hans
>
>
>
>
> On 9/20/23 21:56, Hans de Goede wrote:
>> Hi All,
>> 
>> Some vlv/chv tablets ship with Android as factory OS. The factory OS
>> BSP style kernel on these tablets does not use the normal x86 hw
>> autodetection instead it hardcodes a whole bunch of things including
>> using panel drivers instead of relying on VBT MIPI sequences to
>> turn the panel/backlight on/off.
>> 
>> The normal i915 driver (which does not use panel drivers) mostly works
>> since the VBT still needs to contain valid info for the GOP, but because
>> of the Android kernel relying on panel drivers with various things
>> hardcoded some DMI quirks are necessary to fix some issues on these
>> devices.
>> 
>> Some of these issues also are related to which I2C bus to use for
>> MIPI sequence elements which do I2C transfers. This series also
>> includes a patch adding some extra debugging to mipi_exec_i2c() to
>> help with debugging similar issues in the future.
>> 
>> These patches have been posted before but back then I did not get around
>> to follow up on the series:
>> https://lore.kernel.org/intel-gfx/20220225214934.383168-1-hdego...@redhat.com/
>> 
>> v2:
>> - Drop the changes how the I2C bus number is found, instead just have
>>   the quirks set the right number directly where necessary. This should
>>   avoid any chances of causing regressions on devices where the quirks
>>   do not apply.
>> - New quirk for backlight control issues on Lenovo Yoga Tab 3
>> - Address Jani Nikula's remark about __func__ being redundant when using
>>   drm_dbg_kms()
>> 
>> v3:
>> - File 3 gitlab issues with drm.debug=0xe dmesg output, VBT dump for all
>>   3 affected models. Add Closes: tags with links to gitlab issues
>> 
>> Regards,
>> 
>> Hans
>> 
>> 
>> Hans de Goede (4):
>>   drm/i915/vlv_dsi: Add DMI quirk for wrong panel modeline in BIOS on
>> Asus TF103C (v3)
>>   drm/i915/vlv_dsi: Add DMI quirk for wrong I2C bus and panel size on
>> Lenovo Yoga Tablet 2 series (v3)
>>   drm/i915/vlv_dsi: Add DMI quirk for backlight control issues on Lenovo
>> Yoga Tab 3 (v2)
>>   drm/i915/dsi: Add some debug logging to mipi_exec_i2c (v2)
>> 
>>  drivers/gpu/drm/i915/display/intel_dsi_vbt.c |   3 +
>>  drivers/gpu/drm/i915/display/vlv_dsi.c   | 124 +++
>>  2 files changed, 127 insertions(+)
>> 
>

-- 
Jani Nikula, Intel

Re: [Intel-gfx] [PATCH i-g-t v2 04/11] lib/kunit: Parse KTAP report from the main process thread

2023-10-11 Thread Kamil Konieczny

Hi Janusz,
On 2023-10-10 at 19:49:35 +0200, Janusz Krzysztofik wrote:
> Hi Kamil,
> 
> Thanks for review.
> 
> On Tuesday, 10 October 2023 17:59:56 CEST Kamil Konieczny wrote:
> > Hi Janusz,
> > On 2023-10-09 at 14:27:55 +0200, Janusz Krzysztofik wrote:
> > > There was an attempt to parse KTAP reports in the background while a kunit
> > > test module is loading.  However, since dynamic sub-subtests can be
> > > executed only from the main thread, that attempt was not quite successful,
> > > as IGT results from all executed kunit test cases were generated only
> > > after loading of kunit test module completed.
> > > 
> > > Now that the parser maintains its state and we can call it separately for
> > > each input line of a KTAP report, it is perfectly possible to call the
> > > parser from the main thread while the module is loading in the background,
> > > and convert results from kunit test cases immediately to results of IGT
> > > dynamic sub-subtests by running an igt_dynamic() section for each result
> > > as soon as returned by the parser.
> > > 
> > > Drop igt_ktap_parser() thread and execute igt_dynamic() for each kunit
> > > result obtained from igt_ktap_parse() called from the main thread.
> > > 
> > > Also, drop no longer needed functions from igt_ktap soruces.
> > > 
> > > v3: Fix ktap structure not freed on lseek error,
> > >   - fix initial SIGCHLD handler not restored,
> > >   - fix missing handling of potential errors returned by sigaction,
> > >   - fix potential race of read() vs. ptherad_kill(), use robust mutex for
> > > synchronization with modprobe thread,
> > >   - fix potentially illegal use of igt_assert() called outside of
> > > dynamic sub-subtest section,
> > >   - fix unsupported exit code potentially passed to igt_fail(),
> > >   - no need to fail a dynamic sub-subtest on potential KTAP parser error
> > > after a valid result from the parser has been processed,
> > >   - fix trailing newlines missing from error messages,
> > >   - add more debug statements,
> > >   - integrate common code around kunit_result_free() into it.
> > > v2: Interrupt blocking read() on modprobe failure.
> > > 
> > > Signed-off-by: Janusz Krzysztofik 
> > > Acked-by: Mauro Carvalho Chehab  # v2
> > > ---
> > >  lib/igt_kmod.c | 261 +++
> > >  lib/igt_ktap.c | 568 -
> > >  lib/igt_ktap.h |  22 --
> > >  3 files changed, 222 insertions(+), 629 deletions(-)
> > > 
> > > diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
> > > index 426ae5b26f..7bca4cdaab 100644
> > > --- a/lib/igt_kmod.c
> > > +++ b/lib/igt_kmod.c
> > > @@ -1,5 +1,5 @@
> > >  /*
> > > - * Copyright © 2016 Intel Corporation
> > > + * Copyright © 2016-2023 Intel Corporation
> > >   *
> > >   * Permission is hereby granted, free of charge, to any person obtaining 
> > > a
> > >   * copy of this software and associated documentation files (the 
> > > "Software"),
> > > @@ -26,7 +26,12 @@
> > >  #include 
> > >  #include 
> > >  #include 
> > > +#include 
> > > +#include 
> > >  #include 
> > > +#include 
> > > +
> > > +#include "assembler/brw_compat.h"/* [un]likely() */
> >  ^
> > Do we really need this?
> 
> I think the correct question is if wee really need [un]likely().  I'm using 
> it 
> to document unlikely cases, which is a widely accepted method of documenting 
> cases like that, I believe.  Having that clarified, I hope you just tell me 
> if 
> you think we need those cases documented, and how, if not that way.
> 

Now I see, it is for unlikely() - ok it can stay.

> > 
> > >  
> > >  #include "igt_aux.h"
> > >  #include "igt_core.h"
> > > @@ -748,9 +753,12 @@ void igt_kselftest_get_tests(struct kmod_module 
> > > *kmod,
> > >  }
> > >  
> > >  struct modprobe_data {
> > > + pthread_t parent;
> > --- 
> > Please move it below to other related thread data.
> > Also consider a comment why(or for what purpose)
> > did you put this here.
> 
> No problem to move it to the bottom, if that's important to you, but 
> regarding 
> the comment, do you think that the purpose of this field of the structure, 
> compared to other fields, is so unclear form review of the code, despite its 
> name, that it requires a comment, unlike the other fields?
> 

I am ok with only move.

> > 
> > >   struct kmod_module *kmod;
> > >   const char *opts;
> > >   int err;
> > > + pthread_mutex_t lock;
> > > + pthread_t thread;
> > >  };
> > >  
> > >  static void *modprobe_task(void *arg)
> > > @@ -759,16 +767,132 @@ static void *modprobe_task(void *arg)
> > >  
> > >   data->err = modprobe(data->kmod, data->opts);
> > >  
> > > + if (igt_debug_on(data->err)) {
> > > + int err;
> > > +
> > > + while (err = pthread_mutex_trylock(>lock),
> > > +err && !igt_debug_on(err != EBUSY))
> > > + igt_debug_on(pthread_kill(data->parent, SIGCHLD));
> > > + } else {
> > > + /* let main thread use mutex

Re: [Intel-gfx] [PATCH i-g-t 3/4] tools/intel_gpu_top: Optimise interactive display a bit

2023-10-11 Thread Kamil Konieczny

Hi Tvrtko,
On 2023-10-11 at 09:38:44 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin 
> 
> Padding the percentage bars and table columns with spaces happens quite a
> lot so lets do better than putchar at a time. Have a table of visually
> empty strings and build the required length out of those chunks.
> 
> While at it, also move the percentage bar table into its function scope.
> 
> v2:
>  * Fix checkpatch and use ARRAY_SIZE. (Kamil)
> 
> Signed-off-by: Tvrtko Ursulin 
> Cc: Kamil Konieczny 

Reviewed-by: Kamil Konieczny 

> ---
>  tools/intel_gpu_top.c | 38 +-
>  1 file changed, 33 insertions(+), 5 deletions(-)
> 
> diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
> index b6d1014f00b8..006879c4ae67 100644
> --- a/tools/intel_gpu_top.c
> +++ b/tools/intel_gpu_top.c
> @@ -926,14 +926,39 @@ static void free_display_clients(struct igt_drm_clients 
> *clients)
>   free(clients);
>  }
>  
> -static const char *bars[] = { " ", "▏", "▎", "▍", "▌", "▋", "▊", "▉", "█" };
> -
>  static int n_spaces(const int n)
>  {
> - int i;
> + static const char *spaces[] = {
> + " ",
> + "  ",
> + "   ",
> + "",
> + " ",
> + "  ",
> + "   ",
> + "",
> + " ",
> + "  ",
> + "   ",
> + "",
> + " ",
> + "  ",
> + "   ",
> + "",
> + " ",
> + "  ",
> + "   ",
> + };
> + int i, r = n;
>  
> - for (i = 0; i < n; i++)
> - putchar(' ');
> + while (r) {
> + if (r > ARRAY_SIZE(spaces))
> + i = ARRAY_SIZE(spaces) - 1;
> + else
> + i = r - 1;
> + fputs(spaces[i], stdout);
> + r -= i + 1;
> + }
>  
>   return n;
>  }
> @@ -941,6 +966,9 @@ static int n_spaces(const int n)
>  static void
>  print_percentage_bar(double percent, double max, int max_len, bool numeric)
>  {
> + static const char *bars[] = {
> + " ", "▏", "▎", "▍", "▌", "▋", "▊", "▉", "█"
> + };
>   int bar_len, i, len = max_len - 2;
>   const int w = 8;
>  
> -- 
> 2.39.2
>

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Temporarily force MTL into uncached mode (rev2)

2023-10-11 Thread Patchwork

== Series Details ==

Series: drm/i915/gt: Temporarily force MTL into uncached mode (rev2)
URL   : https://patchwork.freedesktop.org/series/124866/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13736_full -> Patchwork_124866v2_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_124866v2_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_124866v2_full, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (9 -> 9)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_124866v2_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-3:
- shard-dg2:  [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-dg2-6/igt@kms_cursor_crc@cursor-susp...@pipe-a-hdmi-a-3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-5/igt@kms_cursor_crc@cursor-susp...@pipe-a-hdmi-a-3.html

  * igt@perf_pmu@most-busy-idle-check-all@vcs0:
- shard-dg1:  [PASS][3] -> [DMESG-WARN][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-dg1-15/igt@perf_pmu@most-busy-idle-check-...@vcs0.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg1-19/igt@perf_pmu@most-busy-idle-check-...@vcs0.html

  
New tests
-

  New tests have been introduced between CI_DRM_13736_full and 
Patchwork_124866v2_full:

### New IGT tests (1) ###

  * igt@kms_content_protection@atomic@pipe-a-dp-4:
- Statuses : 1 timeout(s)
- Exec time: [0.0] s

  

Known issues


  Here are the changes found in Patchwork_124866v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2:  NOTRUN -> [SKIP][5] ([i915#8411])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-7/igt@api_intel...@blit-reloc-keep-cache.html
- shard-mtlp: NOTRUN -> [SKIP][6] ([i915#8411])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-mtlp-3/igt@api_intel...@blit-reloc-keep-cache.html

  * igt@device_reset@cold-reset-bound:
- shard-dg2:  NOTRUN -> [SKIP][7] ([i915#7701])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-7/igt@device_re...@cold-reset-bound.html

  * igt@drm_fdinfo@all-busy-idle-check-all:
- shard-dg2:  NOTRUN -> [SKIP][8] ([i915#8414]) +1 other test skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-1/igt@drm_fdi...@all-busy-idle-check-all.html

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl:  [PASS][9] -> [FAIL][10] ([i915#7742])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-rkl-6/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html

  * igt@gem_basic@multigpu-create-close:
- shard-dg2:  NOTRUN -> [SKIP][11] ([i915#7697])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-1/igt@gem_ba...@multigpu-create-close.html

  * igt@gem_ctx_persistence@legacy-engines-cleanup:
- shard-snb:  NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#1099])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-snb6/igt@gem_ctx_persiste...@legacy-engines-cleanup.html

  * igt@gem_ctx_sseu@mmap-args:
- shard-dg2:  NOTRUN -> [SKIP][13] ([i915#280])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-7/igt@gem_ctx_s...@mmap-args.html

  * igt@gem_eio@hibernate:
- shard-dg2:  NOTRUN -> [ABORT][14] ([i915#7975] / [i915#8213])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-7/igt@gem_...@hibernate.html

  * igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2:  NOTRUN -> [SKIP][15] ([i915#4812]) +1 other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-2/igt@gem_exec_balan...@bonded-false-hang.html

  * igt@gem_exec_capture@capture-invisible@lmem0:
- shard-dg2:  NOTRUN -> [SKIP][16] ([i915#6334]) +1 other test skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124866v2/shard-dg2-1/igt@gem_exec_capture@capture-invisi...@lmem0.html

  * igt@gem_exec_flush@basic-uc-pro-default:
- shard-dg2:  NOTRUN -> [SKIP][17] ([i915#3539] / [i915#4852])
   [17]:

[Intel-gfx] [PATCH v2] drm/i915: Prevent potential null-ptr-deref in engine_init_common

2023-10-11 Thread Nirmoy Das

If measure_breadcrumb_dw() returns an error and bce isn't created,
this commit ensures that intel_engine_destroy_pinned_context()
is not called with a NULL bce.

v2: Fix the subject s/UAF/null-ptr-deref(Jani)

Fixes: b35274993680 ("drm/i915: Create a kernel context for GGTT updates")
Cc: Oak Zeng 
Cc: Andi Shyti 
Cc: Jani Nikula 
Signed-off-by: Nirmoy Das 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 179d9546865b..4a11219e560e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1491,7 +1491,8 @@ static int engine_init_common(struct intel_engine_cs 
*engine)
return 0;
 
 err_bce_context:
-   intel_engine_destroy_pinned_context(bce);
+   if (bce)
+   intel_engine_destroy_pinned_context(bce);
 err_ce_context:
intel_engine_destroy_pinned_context(ce);
return ret;
-- 
2.41.0

Re: [Intel-gfx] [PATCH v2] drm/i915: Prevent potential null-ptr-deref in engine_init_common

2023-10-11 Thread Andi Shyti

Hi Nirmoy,

On Wed, Oct 11, 2023 at 02:25:47PM +0200, Nirmoy Das wrote:
> If measure_breadcrumb_dw() returns an error and bce isn't created,
> this commit ensures that intel_engine_destroy_pinned_context()
> is not called with a NULL bce.
> 
> v2: Fix the subject s/UAF/null-ptr-deref(Jani)
> 
> Fixes: b35274993680 ("drm/i915: Create a kernel context for GGTT updates")
> Cc: Oak Zeng 
> Cc: Andi Shyti 
> Cc: Jani Nikula 
> Signed-off-by: Nirmoy Das 

Reviewed-by: Andi Shyti  

Andi

Re: [Intel-gfx] [PATCH] drm/i915: Prevent potential UAF in engine_init_common

2023-10-11 Thread Nirmoy Das


Hi Andi,

On 10/11/2023 2:22 PM, Andi Shyti wrote:

Hi Nirmoy,

On Wed, Oct 11, 2023 at 01:54:51PM +0200, Nirmoy Das wrote:

If measure_breadcrumb_dw() returns an error and bce isn't created,
this commit ensures that intel_engine_destroy_pinned_context()
is not called with a NULL bce.

Fixes: b35274993680 ("drm/i915: Create a kernel context for GGTT updates")
Cc: Oak Zeng 
Cc: Andi Shyti 
Signed-off-by: Nirmoy Das 

Reviewed-by: Andi Shyti 


Resent with a fixed subject. Please check again.


Thanks,

Nirmoy



Andi

Re: [Intel-gfx] [PATCH] drm/i915: Prevent potential UAF in engine_init_common

2023-10-11 Thread Andi Shyti

Hi Nirmoy,

On Wed, Oct 11, 2023 at 01:54:51PM +0200, Nirmoy Das wrote:
> If measure_breadcrumb_dw() returns an error and bce isn't created,
> this commit ensures that intel_engine_destroy_pinned_context()
> is not called with a NULL bce.
> 
> Fixes: b35274993680 ("drm/i915: Create a kernel context for GGTT updates")
> Cc: Oak Zeng 
> Cc: Andi Shyti 
> Signed-off-by: Nirmoy Das 

Reviewed-by: Andi Shyti  

Andi

Re: [Intel-gfx] [PATCH] drm/i915: Prevent potential UAF in engine_init_common

2023-10-11 Thread Nirmoy Das




On 10/11/2023 2:20 PM, Jani Nikula wrote:

On Wed, 11 Oct 2023, Nirmoy Das  wrote:

If measure_breadcrumb_dw() returns an error and bce isn't created,
this commit ensures that intel_engine_destroy_pinned_context()
is not called with a NULL bce.

So it's a potential NULL pointer dereference, not use after free like
the subject says. Please fix the subject.


ah right. I will resend.


Thanks,

Nirmoy



BR,
Jani.



Fixes: b35274993680 ("drm/i915: Create a kernel context for GGTT updates")
Cc: Oak Zeng 
Cc: Andi Shyti 
Signed-off-by: Nirmoy Das 
---
  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 179d9546865b..4a11219e560e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1491,7 +1491,8 @@ static int engine_init_common(struct intel_engine_cs 
*engine)
return 0;
  
  err_bce_context:

-   intel_engine_destroy_pinned_context(bce);
+   if (bce)
+   intel_engine_destroy_pinned_context(bce);
  err_ce_context:
intel_engine_destroy_pinned_context(ce);
return ret;

Re: [Intel-gfx] [PATCH] drm/i915: Prevent potential UAF in engine_init_common

2023-10-11 Thread Jani Nikula

On Wed, 11 Oct 2023, Nirmoy Das  wrote:
> If measure_breadcrumb_dw() returns an error and bce isn't created,
> this commit ensures that intel_engine_destroy_pinned_context()
> is not called with a NULL bce.

So it's a potential NULL pointer dereference, not use after free like
the subject says. Please fix the subject.

BR,
Jani.


>
> Fixes: b35274993680 ("drm/i915: Create a kernel context for GGTT updates")
> Cc: Oak Zeng 
> Cc: Andi Shyti 
> Signed-off-by: Nirmoy Das 
> ---
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
> b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 179d9546865b..4a11219e560e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -1491,7 +1491,8 @@ static int engine_init_common(struct intel_engine_cs 
> *engine)
>   return 0;
>  
>  err_bce_context:
> - intel_engine_destroy_pinned_context(bce);
> + if (bce)
> + intel_engine_destroy_pinned_context(bce);
>  err_ce_context:
>   intel_engine_destroy_pinned_context(ce);
>   return ret;

-- 
Jani Nikula, Intel

[Intel-gfx] [PATCH] drm/i915: Prevent potential UAF in engine_init_common

2023-10-11 Thread Nirmoy Das

If measure_breadcrumb_dw() returns an error and bce isn't created,
this commit ensures that intel_engine_destroy_pinned_context()
is not called with a NULL bce.

Fixes: b35274993680 ("drm/i915: Create a kernel context for GGTT updates")
Cc: Oak Zeng 
Cc: Andi Shyti 
Signed-off-by: Nirmoy Das 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 179d9546865b..4a11219e560e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1491,7 +1491,8 @@ static int engine_init_common(struct intel_engine_cs 
*engine)
return 0;
 
 err_bce_context:
-   intel_engine_destroy_pinned_context(bce);
+   if (bce)
+   intel_engine_destroy_pinned_context(bce);
 err_ce_context:
intel_engine_destroy_pinned_context(ce);
return ret;
-- 
2.41.0

[Intel-gfx] ✗ Fi.CI.IGT: failure for Add drm_dbg_ratelimited()

2023-10-11 Thread Patchwork

== Series Details ==

Series: Add drm_dbg_ratelimited()
URL   : https://patchwork.freedesktop.org/series/124894/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13736_full -> Patchwork_124894v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_124894v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_124894v1_full, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (9 -> 9)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_124894v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc@pipe-b-edp-1:
- shard-mtlp: [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-mtlp-7/igt@kms_pipe_crc_basic@disable-crc-after-c...@pipe-b-edp-1.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-mtlp-2/igt@kms_pipe_crc_basic@disable-crc-after-c...@pipe-b-edp-1.html

  
New tests
-

  New tests have been introduced between CI_DRM_13736_full and 
Patchwork_124894v1_full:

### New IGT tests (1) ###

  * igt@kms_content_protection@atomic@pipe-a-dp-4:
- Statuses : 1 timeout(s)
- Exec time: [0.0] s

  

Known issues


  Here are the changes found in Patchwork_124894v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2:  NOTRUN -> [SKIP][3] ([i915#8411])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-dg2-10/igt@api_intel...@blit-reloc-keep-cache.html
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#8411])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-mtlp-5/igt@api_intel...@blit-reloc-keep-cache.html

  * igt@device_reset@cold-reset-bound:
- shard-dg2:  NOTRUN -> [SKIP][5] ([i915#7701])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-dg2-10/igt@device_re...@cold-reset-bound.html

  * igt@drm_fdinfo@all-busy-idle-check-all:
- shard-dg2:  NOTRUN -> [SKIP][6] ([i915#8414]) +1 other test skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-dg2-1/igt@drm_fdi...@all-busy-idle-check-all.html

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl:  [PASS][7] -> [FAIL][8] ([i915#7742])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html

  * igt@gem_basic@multigpu-create-close:
- shard-dg2:  NOTRUN -> [SKIP][9] ([i915#7697])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-dg2-1/igt@gem_ba...@multigpu-create-close.html

  * igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0:
- shard-dg2:  [PASS][10] -> [INCOMPLETE][11] ([i915#7297])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-dg2-11/igt@gem_ccs@suspend-res...@xmajor-compressed-compfmt0-lmem0-lmem0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-dg2-2/igt@gem_ccs@suspend-res...@xmajor-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_ctx_isolation@preservation-s3@vcs1:
- shard-mtlp: [PASS][12] -> [ABORT][13] ([i915#9262])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-mtlp-5/igt@gem_ctx_isolation@preservation...@vcs1.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-mtlp-4/igt@gem_ctx_isolation@preservation...@vcs1.html

  * igt@gem_ctx_sseu@mmap-args:
- shard-dg2:  NOTRUN -> [SKIP][14] ([i915#280])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-dg2-1/igt@gem_ctx_s...@mmap-args.html

  * igt@gem_eio@hibernate:
- shard-dg2:  NOTRUN -> [ABORT][15] ([i915#7975] / [i915#8213])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-dg2-6/igt@gem_...@hibernate.html

  * igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2:  NOTRUN -> [SKIP][16] ([i915#4812]) +1 other test skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124894v1/shard-dg2-7/igt@gem_exec_balan...@bonded-false-hang.html

  * igt@gem_exec_capture@capture-invisible@lmem0:
- shard-dg2:  NOTRUN -> [SKIP][17] ([i915#6334]) +1 other test skip
   [17]:

Re: [Intel-gfx] [PATCH 1/4] drm/i915/gvt: remove unused to_gvt() and reduce includes

2023-10-11 Thread Jani Nikula

On Wed, 11 Oct 2023, Zhenyu Wang  wrote:
> On 2023.10.11 10:04:09 +0300, Jani Nikula wrote:
>> On Wed, 11 Oct 2023, Zhenyu Wang  wrote:
>> > On 2023.10.04 15:54:11 +0300, Jani Nikula wrote:
>> >> On Tue, 26 Sep 2023, Jani Nikula  wrote:
>> >> > gvt.h has no need to include i915_drv.h once the unused to_gvt() has
>> >> > been removed.
>> >> >
>> >> > Signed-off-by: Jani Nikula 
>> >> 
>> >> Zhenyu, Zhi, ping?
>> >> 
>> >
>> > Sorry for late reply, as last week was full holiday here.
>> >
>> > Reviewed-by: Zhenyu Wang 
>> >
>> > I don't think I need to do extra pick and pull request for this or
>> > let me know if you has question.
>> 
>> Did you pick them up to gvt-next or shall I pick them up to
>> drm-intel-next?
>> 
>> If the former, I think I'd actually like a pull request, because
>> otherwise the trees will be out-of-sync for a long time.
>> 
>
> Sorry, I mean it's fine for me if you directly pick them for drm-intel-next.

Thanks for the review, pushed to drm-intel-next.

BR,
Jani.

-- 
Jani Nikula, Intel

[Intel-gfx] [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

2023-10-11 Thread Animesh Manna

Add debugfs support which will print source and sink status
per connector basis.

v1: Initial version. [rb-ed by Arun]
v2: Added check for DP 2.0 and connector type in connector_debugfs_add().

Cc: Jouni Högander 
Cc: Arun R Murthy 
Cc: Jani Nikula 
Signed-off-by: Animesh Manna 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 136 +--
 1 file changed, 102 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 80de831c2f60..399fc0a8e636 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2823,6 +2823,25 @@ static int psr_get_status_and_error_status(struct 
intel_dp *intel_dp,
return 0;
 }
 
+static int panel_replay_get_status_and_error_status(struct intel_dp *intel_dp,
+   u8 *status, u8 
*error_status)
+{
+   struct drm_dp_aux *aux = _dp->aux;
+   int ret;
+
+   ret = drm_dp_dpcd_readb(aux, DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, 
status);
+   if (ret != 1)
+   return ret;
+
+   ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS, 
error_status);
+   if (ret != 1)
+   return ret;
+
+   *status = *status & DP_PSR_SINK_STATE_MASK;
+
+   return 0;
+}
+
 static void psr_alpm_check(struct intel_dp *intel_dp)
 {
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct 
seq_file *m)
status = live_status[status_val];
}
 
-   seq_printf(m, "Source PSR status: %s [0x%08x]\n", status, val);
+   seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n", status, 
val);
 }
 
 static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
@@ -3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file *m, struct 
intel_dp *intel_dp)
bool enabled;
u32 val;
 
-   seq_printf(m, "Sink support: %s", str_yes_no(psr->sink_support));
-   if (psr->sink_support)
+   seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
+  str_yes_no(psr->sink_support),
+  str_yes_no(psr->sink_panel_replay_support));
+
+   if (psr->sink_support || psr->sink_panel_replay_support)
seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
seq_puts(m, "\n");
 
-   if (!psr->sink_support)
+   if (!(psr->sink_support || psr->sink_panel_replay_support))
return 0;
 
wakeref = intel_runtime_pm_get(_priv->runtime_pm);
mutex_lock(>lock);
 
-   if (psr->enabled)
+   if (psr->panel_replay_enabled)
+   status = "Panel Replay Enabled";
+   else if (psr->enabled)
status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled";
else
status = "disabled";
@@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file *m, struct 
intel_dp *intel_dp)
goto unlock;
}
 
-   if (psr->psr2_enabled) {
+   if (psr->panel_replay_enabled) {
+   val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder));
+   enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
+   } else if (psr->psr2_enabled) {
val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
enabled = val & EDP_PSR2_ENABLE;
} else {
val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv, 
cpu_transcoder));
enabled = val & EDP_PSR_ENABLE;
}
-   seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
+   seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
   str_enabled_disabled(enabled), val);
psr_source_status(intel_dp, m);
seq_printf(m, "Busy frontbuffer bits: 0x%08x\n",
@@ -3221,6 +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file *m, 
void *data)
 {
struct intel_connector *connector = m->private;
struct intel_dp *intel_dp = intel_attached_dp(connector);
+   struct intel_psr *psr = _dp->psr;
static const char * const sink_status[] = {
"inactive",
"transition to active, capture and display",
@@ -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct seq_file 
*m, void *data)
"reserved",
"sink internal error",
};
+   static const char * const panel_replay_status[] = {
+   "Sink device frame is locked to the Source device",
+   "Sink device is coasting, using the VTotal target",
+   "Sink device is governing the frame rate (frame rate unlock is 
granted)",
+   "Sink device in the process of re-locking with the Source 
device",
+   };
const char *str;
int ret;
u8 status, error_status;
 
-   if (!CAN_PSR(intel_dp)) {
-   seq_puts(m, "PSR

[Intel-gfx] [PATCH v7 5/6] drm/i915/panelreplay: enable/disable panel replay

2023-10-11 Thread Animesh Manna

TRANS_DP2_CTL register is programmed to enable panel replay from source
and sink is enabled through panel replay dpcd configuration address.

Bspec: 1407940617

v1: Initial version.
v2:
- Use pr_* flags instead psr_* flags. [Jouni]
- Remove intel_dp_is_edp check as edp1.5 also has panel replay. [Jouni]

v3: Cover letter updated and selective fetch condition check is added
before updating its bit in PSR2_MAN_TRK_CTL register. [Jouni]

v4: Selective fetch related PSR2_MAN_TRK_CTL programmming dropped. [Jouni]

v5: Added PSR2_MAN_TRK_CTL programming as needed for Continuous Full
Frame (CFF) update.

v6: Rebased on latest.

Note: Initial plan is to enable panel replay in  full-screen live active
frame update mode. In a incremental approach panel replay will be enabled
in selctive update mode if there is any gap in curent implementation.

Cc: Jouni Högander 
Cc: Arun R Murthy 
Cc: Jani Nikula 
Signed-off-by: Animesh Manna 
---
 drivers/gpu/drm/i915/display/intel_ddi.c  |  7 ++-
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_psr.c  | 63 ++-
 3 files changed, 55 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9151d5add960..16f98a7a5f20 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2717,10 +2717,15 @@ static void intel_ddi_pre_enable_dp(struct 
intel_atomic_state *state,
const struct drm_connector_state 
*conn_state)
 {
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+   struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
-   if (HAS_DP20(dev_priv))
+   if (HAS_DP20(dev_priv)) {
intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
crtc_state);
+   if (crtc_state->has_panel_replay)
+   drm_dp_dpcd_writeb(_dp->aux, PANEL_REPLAY_CONFIG,
+  DP_PANEL_REPLAY_ENABLE);
+   }
 
if (DISPLAY_VER(dev_priv) >= 14)
mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 95b318f7b2b8..d8f35054bc11 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1704,6 +1704,7 @@ struct intel_psr {
u16 su_y_granularity;
bool source_panel_replay_support;
bool sink_panel_replay_support;
+   bool panel_replay_enabled;
u32 dc3co_exitline;
u32 dc3co_exit_delay;
struct delayed_work dc3co_work;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index a2e0637c53fb..80de831c2f60 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -608,8 +608,11 @@ static void intel_psr_enable_sink(struct intel_dp 
*intel_dp)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
u8 dpcd_val = DP_PSR_ENABLE;
 
-   /* Enable ALPM at sink for psr2 */
+   if (intel_dp->psr.panel_replay_enabled)
+   return;
+
if (intel_dp->psr.psr2_enabled) {
+   /* Enable ALPM at sink for psr2 */
drm_dp_dpcd_writeb(_dp->aux, DP_RECEIVER_ALPM_CONFIG,
   DP_ALPM_ENABLE |
   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
@@ -759,6 +762,17 @@ static int psr2_block_count(struct intel_dp *intel_dp)
return psr2_block_count_lines(intel_dp) / 4;
 }
 
+static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
+{
+   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+   intel_de_rmw(dev_priv, PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder),
+0, ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
+
+   intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
+TRANS_DP2_PANEL_REPLAY_ENABLE);
+}
+
 static void hsw_activate_psr2(struct intel_dp *intel_dp)
 {
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1323,18 +1337,23 @@ void intel_psr_get_config(struct intel_encoder *encoder,
return;
 
intel_dp = _port->dp;
-   if (!CAN_PSR(intel_dp))
+   if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp)))
return;
 
mutex_lock(_dp->psr.lock);
if (!intel_dp->psr.enabled)
goto unlock;
 
-   /*
-* Not possible to read EDP_PSR/PSR2_CTL registers as it is
-* enabled/disabled because of frontbuffer tracking and others.
-*/
-   pipe_config->has_psr = true;
+   if (intel_dp->psr.panel_replay_enabled) {
+   pipe_config->has_panel_replay = true;
+   } else {
+   /*

[Intel-gfx] [PATCH v7 3/6] drm/i915/panelreplay: Initializaton and compute config for panel replay

2023-10-11 Thread Animesh Manna

Modify existing PSR implementation to enable panel replay feature of DP 2.0
which is similar to PSR feature of EDP panel. There is different DPCD
address to check panel capability compare to PSR and vsc sdp header
is different.

v1: Initial version.
v2:
- Set source_panel_replay_support flag under HAS_PANEL_REPLAY()
condition check. [Jouni]
- Code restructured around intel_panel_replay_init
and renamed to intel_panel_replay_init_dpcd. [Jouni]
- Remove the initial code modification around has_psr2 flag. [Jouni]
- Add CAN_PANEL_REPLAY() in intel_encoder_can_psr which is used to
enable in intel_psr_post_plane_update. [Jouni]
v3:
- Initialize both psr and panel-replay. [Jouni]
- Initialize both panel replay and psr if detected. [Jouni]
- Refactoring psr function by introducing _psr_compute_config(). [Jouni]
- Add check for !is_edp while deriving source_panel_replay_support. [Jouni]
- Enable panel replay dpcd initialization in a separate patch. [Jouni]

v4:
- HAS_PANEL_REPLAY() check not needed during sink capability check. [Jouni]
- Set either panel replay source support or psr. [Jouni]

v5:
- HAS_PANEL_REPLAY() removed and use HAS_DP20() instead. [Jouni]
- Move psr related code to intel_psr.c. [Jani]
- Reset sink_panel_replay_support flag during disconnection. [Jani]

v6: return statement restored which is removed by misatke. [Jouni]
v7: cosmetic changes. [Arun]

Cc: Jouni Högander 
Cc: Arun R Murthy 
Cc: Jani Nikula 
Signed-off-by: Animesh Manna 
---
 .../drm/i915/display/intel_display_types.h| 14 +--
 drivers/gpu/drm/i915/display/intel_dp.c   | 49 --
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +
 drivers/gpu/drm/i915/display/intel_psr.c  | 96 ++-
 drivers/gpu/drm/i915/display/intel_psr.h  |  7 ++
 5 files changed, 123 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8d8b2f8d37a9..95b318f7b2b8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1204,6 +1204,7 @@ struct intel_crtc_state {
bool has_psr2;
bool enable_psr2_sel_fetch;
bool req_psr2_sdp_prior_scanline;
+   bool has_panel_replay;
bool wm_level_disabled;
u32 dc3co_exitline;
u16 su_y_granularity;
@@ -1701,6 +1702,8 @@ struct intel_psr {
bool irq_aux_error;
u16 su_w_granularity;
u16 su_y_granularity;
+   bool source_panel_replay_support;
+   bool sink_panel_replay_support;
u32 dc3co_exitline;
u32 dc3co_exit_delay;
struct delayed_work dc3co_work;
@@ -1988,17 +1991,6 @@ dp_to_lspcon(struct intel_dp *intel_dp)
 
 #define dp_to_i915(__intel_dp) 
to_i915(dp_to_dig_port(__intel_dp)->base.base.dev)
 
-#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
-  (intel_dp)->psr.source_support)
-
-static inline bool intel_encoder_can_psr(struct intel_encoder *encoder)
-{
-   if (!intel_encoder_is_dp(encoder))
-   return false;
-
-   return CAN_PSR(enc_to_intel_dp(encoder));
-}
-
 static inline struct intel_digital_port *
 hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 0ef7cb8134b6..b038f1d2a7ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2432,12 +2432,22 @@ static void intel_dp_compute_vsc_colorimetry(const 
struct intel_crtc_state *crtc
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
-   /*
-* Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
-* VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
-* Colorimetry Format indication.
-*/
-   vsc->revision = 0x5;
+   if (crtc_state->has_panel_replay) {
+   /*
+* Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
+* VSC SDP supporting 3D stereo, Panel Replay, and Pixel
+* Encoding/Colorimetry Format indication.
+*/
+   vsc->revision = 0x7;
+   } else {
+   /*
+* Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
+* VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
+* Colorimetry Format indication.
+*/
+   vsc->revision = 0x5;
+   }
+
vsc->length = 0x13;
 
/* DP 1.4a spec, Table 2-120 */
@@ -2546,6 +2556,21 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp 
*intel_dp,
vsc->revision = 0x4;
vsc->length = 0xe;
}
+   } else if (crtc_state->has_panel_replay) {
+   if (intel_dp->psr.colorimetry_support &&
+

[Intel-gfx] [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

2023-10-11 Thread Animesh Manna

Due to similarity panel replay dpcd initialization got added in psr
function which is specific for edp panel. This patch enables panel
replay initialization for dp connector.

Cc: Jouni Högander 
Cc: Arun R Murthy 
Cc: Jani Nikula 
Signed-off-by: Animesh Manna 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index f9837001aa5f..a2e0637c53fb 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
return;
 
+   if (!intel_dp_is_edp(intel_dp))
+   intel_psr_init_dpcd(intel_dp);
+
/*
 * HSW spec explicitly says PSR is tied to port A.
 * BDW+ platforms have a instance of PSR registers per transcoder but
-- 
2.29.0

[Intel-gfx] [PATCH v7 2/6] drm/i915/psr: Move psr specific dpcd init into own function

2023-10-11 Thread Animesh Manna

From: Jouni Högander 

This patch is preparing adding panel replay specific dpcd init.

Cc: Arun R Murthy 
Cc: Jani Nikula 
Reviewed-by: Arun R Murthy 
Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 41 +---
 1 file changed, 23 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index bb65881e87cc..0669ab7a9191 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -474,27 +474,22 @@ static void intel_dp_get_su_granularity(struct intel_dp 
*intel_dp)
intel_dp->psr.su_y_granularity = y;
 }
 
-void intel_psr_init_dpcd(struct intel_dp *intel_dp)
+static void _psr_init_dpcd(struct intel_dp *intel_dp)
 {
-   struct drm_i915_private *dev_priv =
+   struct drm_i915_private *i915 =
to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
 
-   drm_dp_dpcd_read(_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
-sizeof(intel_dp->psr_dpcd));
-
-   if (!intel_dp->psr_dpcd[0])
-   return;
-   drm_dbg_kms(_priv->drm, "eDP panel supports PSR version %x\n",
+   drm_dbg_kms(>drm, "eDP panel supports PSR version %x\n",
intel_dp->psr_dpcd[0]);
 
if (drm_dp_has_quirk(_dp->desc, DP_DPCD_QUIRK_NO_PSR)) {
-   drm_dbg_kms(_priv->drm,
+   drm_dbg_kms(>drm,
"PSR support not currently available for this 
panel\n");
return;
}
 
if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) {
-   drm_dbg_kms(_priv->drm,
+   drm_dbg_kms(>drm,
"Panel lacks power state control, PSR cannot be 
enabled\n");
return;
}
@@ -503,8 +498,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
intel_dp->psr.sink_sync_latency =
intel_dp_get_sink_sync_latency(intel_dp);
 
-   if (DISPLAY_VER(dev_priv) >= 9 &&
-   (intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_IS_SUPPORTED)) {
+   if (DISPLAY_VER(i915) >= 9 &&
+   intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) {
bool y_req = intel_dp->psr_dpcd[1] &
 DP_PSR2_SU_Y_COORDINATE_REQUIRED;
bool alpm = intel_dp_get_alpm_status(intel_dp);
@@ -521,14 +516,24 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 * GTC first.
 */
intel_dp->psr.sink_psr2_support = y_req && alpm;
-   drm_dbg_kms(_priv->drm, "PSR2 %ssupported\n",
+   drm_dbg_kms(>drm, "PSR2 %ssupported\n",
intel_dp->psr.sink_psr2_support ? "" : "not ");
+   }
+}
 
-   if (intel_dp->psr.sink_psr2_support) {
-   intel_dp->psr.colorimetry_support =
-   intel_dp_get_colorimetry_status(intel_dp);
-   intel_dp_get_su_granularity(intel_dp);
-   }
+void intel_psr_init_dpcd(struct intel_dp *intel_dp)
+{
+   drm_dp_dpcd_read(_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
+sizeof(intel_dp->psr_dpcd));
+
+   if (intel_dp->psr_dpcd[0])
+   _psr_init_dpcd(intel_dp);
+   /* TODO: Add PR case here */
+
+   if (intel_dp->psr.sink_psr2_support) {
+   intel_dp->psr.colorimetry_support =
+   intel_dp_get_colorimetry_status(intel_dp);
+   intel_dp_get_su_granularity(intel_dp);
}
 }
 
-- 
2.29.0

[Intel-gfx] [PATCH v7 0/6] Panel replay phase1 implementation

2023-10-11 Thread Animesh Manna

Panel Replay is a power saving feature for DP 2.0 monitor and similar
to PSR on EDP.

These patches are basic enablement patches added on top of
existing psr framework to enable full-screen live active frame
update mode of panel replay. Panel replay also can be enabled
in selective update mode which will be enabled in a incremental
approach.

As per current design panel replay priority is higher than psr.
intel_dp->psr.panel_replay_enabled flag indicate panel replay is enabled.
intel_dp->psr.panel_replay_enabled + intel_dp->psr.psr2_enabled indicates
panel replay is enabled in selective update mode.
intel_dp->psr.panel_replay_enabled + intel_dp->psr.psr2_enabled +
intel_psr.selective_fetch enabled indicates panel replay is
enabled in selective update mode with selective fetch.
PSR replated flags remain same like before.

Note: The patches are under testing by using panel replay emulator and
panel is not avalible.

Cc: Jouni Högander 
Cc: Arun R Murthy 
Cc: Jani Nikula 
Signed-off-by: Animesh Manna 

Animesh Manna (5):
  drm/panelreplay: dpcd register definition for panelreplay
  drm/i915/panelreplay: Initializaton and compute config for panel
replay
  drm/i915/panelreplay: Enable panel replay dpcd initialization for DP
  drm/i915/panelreplay: enable/disable panel replay
  drm/i915/panelreplay: Debugfs support for panel replay

Jouni Högander (1):
  drm/i915/psr: Move psr specific dpcd init into own function

 drivers/gpu/drm/i915/display/intel_ddi.c  |   7 +-
 .../drm/i915/display/intel_display_types.h|  15 +-
 drivers/gpu/drm/i915/display/intel_dp.c   |  49 ++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   3 +
 drivers/gpu/drm/i915/display/intel_psr.c  | 335 +-
 drivers/gpu/drm/i915/display/intel_psr.h  |   7 +
 include/drm/display/drm_dp.h  |  23 ++
 7 files changed, 327 insertions(+), 112 deletions(-)

-- 
2.29.0

[Intel-gfx] [PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

2023-10-11 Thread Animesh Manna

Add DPCD register definition for discovering, enabling and
checking status of panel replay of the sink.

Cc: Jouni Högander 
Cc: Arun R Murthy 
Cc: Jani Nikula 
Reviewed-by: Arun R Murthy 
Signed-off-by: Animesh Manna 
---
 include/drm/display/drm_dp.h | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index e69cece404b3..fc42b622ef32 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -543,6 +543,10 @@
 /* DFP Capability Extension */
 #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT0x0a3   /* 2.0 */
 
+#define DP_PANEL_REPLAY_CAP 0x0b0  /* DP 2.0 */
+# define DP_PANEL_REPLAY_SUPPORT(1 << 0)
+# define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1)
+
 /* Link Configuration */
 #defineDP_LINK_BW_SET  0x100
 # define DP_LINK_RATE_TABLE0x00/* eDP 1.4 */
@@ -716,6 +720,13 @@
 #define DP_BRANCH_DEVICE_CTRL  0x1a1
 # define DP_BRANCH_DEVICE_IRQ_HPD  (1 << 0)
 
+#define PANEL_REPLAY_CONFIG 0x1b0  /* DP 2.0 */
+# define DP_PANEL_REPLAY_ENABLE (1 << 0)
+# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN (1 << 3)
+# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN   (1 << 4)
+# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN  (1 << 5)
+# define DP_PANEL_REPLAY_SU_ENABLE  (1 << 6)
+
 #define DP_PAYLOAD_ALLOCATE_SET0x1c0
 #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
 #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
@@ -1105,6 +1116,18 @@
 #define DP_LANE_ALIGN_STATUS_UPDATED_ESI   0x200e /* status same as 0x204 
*/
 #define DP_SINK_STATUS_ESI 0x200f /* status same as 0x205 
*/
 
+#define DP_PANEL_REPLAY_ERROR_STATUS   0x2020  /* DP 2.1*/
+# define DP_PANEL_REPLAY_LINK_CRC_ERROR(1 << 0)
+# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR (1 << 1)
+# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR   (1 << 2)
+
+#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS0x2022  /* DP 2.1 */
+# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK   (7 << 0)
+# define DP_SINK_FRAME_LOCKED_SHIFT3
+# define DP_SINK_FRAME_LOCKED_MASK (3 << 3)
+# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT   5
+# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK(1 << 5)
+
 /* Extended Receiver Capability: See DP_DPCD_REV for definitions */
 #define DP_DP13_DPCD_REV0x2200
 
-- 
2.29.0

Re: [Intel-gfx] [PATCH v11 4/7] drm/i915: No TLB invalidation on suspended GT

2023-10-11 Thread Nirmoy Das




On 10/11/2023 2:02 AM, Jonathan Cavitt wrote:

In case of GT is suspended, don't allow submission of new TLB invalidation
request and cancel all pending requests. The TLB entries will be
invalidated either during GuC reload or on system resume.

Signed-off-by: Fei Yang 
Signed-off-by: Jonathan Cavitt 
CC: John Harrison 
Reviewed-by: Andi Shyti 



Acked-by: Nirmoy Das 


---
  drivers/gpu/drm/i915/gt/uc/intel_guc.h|  1 +
  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 21 +--
  drivers/gpu/drm/i915/gt/uc/intel_uc.c |  7 +++
  3 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 6af65d44b1a02..9a743d7059628 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -536,4 +536,5 @@ int intel_guc_invalidate_tlb_engines(struct intel_guc *guc);
  int intel_guc_invalidate_tlb_guc(struct intel_guc *guc);
  int intel_guc_tlb_invalidation_done(struct intel_guc *guc,
const u32 *payload, u32 len);
+void wake_up_all_tlb_invalidate(struct intel_guc *guc);
  #endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 8e5a79ecfc2a2..9d5f8cccaa592 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1796,13 +1796,25 @@ static void __guc_reset_context(struct intel_context 
*ce, intel_engine_mask_t st
intel_context_put(parent);
  }
  
-void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled)

+void wake_up_all_tlb_invalidate(struct intel_guc *guc)
  {
struct intel_guc_tlb_wait *wait;
+   unsigned long i;
+
+   if (!HAS_GUC_TLB_INVALIDATION(guc_to_gt(guc)->i915))
+   return;
+
+   xa_lock_irq(>tlb_lookup);
+   xa_for_each(>tlb_lookup, i, wait)
+   wake_up(>wq);
+   xa_unlock_irq(>tlb_lookup);
+}
+
+void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t 
stalled)
+{
struct intel_context *ce;
unsigned long index;
unsigned long flags;
-   unsigned long i;
  
  	if (unlikely(!guc_submission_initialized(guc))) {

/* Reset called during driver load? GuC not yet initialised! */
@@ -1833,10 +1845,7 @@ void intel_guc_submission_reset(struct intel_guc *guc, 
intel_engine_mask_t stall
 * The full GT reset will have cleared the TLB caches and flushed the
 * G2H message queue; we can release all the blocked waiters.
 */
-   xa_lock_irq(>tlb_lookup);
-   xa_for_each(>tlb_lookup, i, wait)
-   wake_up(>wq);
-   xa_unlock_irq(>tlb_lookup);
+   wake_up_all_tlb_invalidate(guc);
  }
  
  static void guc_cancel_context_requests(struct intel_context *ce)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 98b103375b7ab..750cb63503dd7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -688,6 +688,8 @@ void intel_uc_suspend(struct intel_uc *uc)
/* flush the GSC worker */
intel_gsc_uc_flush_work(>gsc);
  
+	wake_up_all_tlb_invalidate(guc);

+
if (!intel_guc_is_ready(guc)) {
guc->interrupts.enabled = false;
return;
@@ -736,6 +738,11 @@ static int __uc_resume(struct intel_uc *uc, bool 
enable_communication)
  
  	intel_gsc_uc_resume(>gsc);
  
+	if (HAS_GUC_TLB_INVALIDATION(gt->i915)) {

+   intel_guc_invalidate_tlb_engines(guc);
+   intel_guc_invalidate_tlb_guc(guc);
+   }
+
return 0;
  }

Re: [Intel-gfx] [PATCH v1 0/3] scalable display feature configurations

2023-10-11 Thread Hogander, Jouni

On Wed, 2023-10-11 at 09:43 +, Hogander, Jouni wrote:
> On Sun, 2023-10-01 at 14:31 +0300, Vinod Govindapillai wrote:
> > Get the reported device capabilities and update DSC and scaler
> > feature support
> > 
> > v1: use defined field values instead of magic numbers (Jani Nikula)
> 
> For the whole set:
> 
> Reviewed-by: Jouni Högander 

These are now merged. Thank you for patches.

BR,

Jouni Högander
> 
> > 
> > Vinod Govindapillai (3):
> >   drm/i915/xe2lpd: display capability register definitions
> >   drm/i915/xe2lpd: update the dsc feature capability
> >   drm/i915/xe2lpd: update the scaler feature capability
> > 
> >  .../gpu/drm/i915/display/intel_display_device.c   | 15
> > +++
> >  drivers/gpu/drm/i915/i915_reg.h   |  7 +++
> >  2 files changed, 22 insertions(+)
> > 
>

[Intel-gfx] ✓ Fi.CI.IGT: success for Framework for display parameters (rev2)

2023-10-11 Thread Patchwork

== Series Details ==

Series: Framework for display parameters (rev2)
URL   : https://patchwork.freedesktop.org/series/124645/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13736_full -> Patchwork_124645v2_full


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/index.html

Participating hosts (9 -> 9)
--

  No changes in participating hosts

New tests
-

  New tests have been introduced between CI_DRM_13736_full and 
Patchwork_124645v2_full:

### New IGT tests (4) ###

  * igt@kms_universal_plane@universal-plane-functional@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_universal_plane@universal-plane-functional@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_universal_plane@universal-plane-functional@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_universal_plane@universal-plane-functional@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  

Known issues


  Here are the changes found in Patchwork_124645v2_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-apl:  ([PASS][1], [PASS][2], [PASS][3], [PASS][4], 
[PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], 
[PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], 
[PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], 
[PASS][24], [PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], 
[PASS][30], [PASS][31], [FAIL][32], [PASS][33], [PASS][34], [PASS][35], 
[PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], 
[PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], 
[PASS][48], [PASS][49], [PASS][50]) ([i915#8293])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl6/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl1/boot.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl1/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl1/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl1/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl2/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl2/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl2/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl2/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl3/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl3/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl3/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl3/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl3/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl4/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl4/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl4/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl4/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl6/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl6/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl6/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl7/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl7/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl7/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl7/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl4/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl3/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl3/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl3/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl3/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl3/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl7/boot.html
   [33]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl7/boot.html
   [34]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl7/boot.html
   [35]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v2/shard-apl7/boot.html
   [36]:

Re: [Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

2023-10-11 Thread Lobo, Melanie




> -Original Message-
> From: Jani Nikula 
> Sent: Wednesday, October 11, 2023 3:52 PM
> To: Lobo, Melanie ; intel-gfx@lists.freedesktop.org
> Cc: Heikkila, Juha-pekka 
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats
> on MTL
> 
> On Wed, 11 Oct 2023, Melanie Lobo  wrote:
> > MTL supports FP16 format which is a binary floating-point computer
> > number format that occupies 16 bits in computer memory.Platform shall
> > render compression in display engine to receive FP16 compressed formats.
> >
> > This kernel change was tested with IGT patch,
> > https://patchwork.freedesktop.org/patch/562014/
> >
> > Test-with: 20231011095520.10768-1-melanie.l...@intel.com
> >
> > Signed-off-by: Melanie Lobo 
> > ---
> >  drivers/gpu/drm/i915/display/intel_fb.c| 2 ++
> >  drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +--
> >  2 files changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
> > b/drivers/gpu/drm/i915/display/intel_fb.c
> > index e7678571b0d7..868cfc75e687 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > @@ -91,6 +91,8 @@ static const struct drm_format_info
> gen12_ccs_formats[] = {
> > { .format = DRM_FORMAT_P016, .num_planes = 4,
> >   .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
> > = { 1,
> 1, 1, 1 },
> >   .hsub = 2, .vsub = 2, .is_yuv = true },
> > +   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64,
> .num_planes = 2,
> > + .char_per_block = { 4, 1}, .block_w = { 1, 2}, .block_h = { 1, 1},
> > +.hsub = 1, .vsub = 1 },
> >  };
> >
> >  /*
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > index 245a64332cc7..64c1d6c2bd76 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > @@ -2122,8 +2122,7 @@ static bool
> gen12_plane_format_mod_supported(struct drm_plane *_plane,
> > case DRM_FORMAT_Y216:
> > case DRM_FORMAT_XVYU12_16161616:
> > case DRM_FORMAT_XVYU16161616:
> > -   if (!intel_fb_is_ccs_modifier(modifier))
> > -   return true;
> > +   return true;
> > fallthrough;
> 
> This becomes nop.

Thank you for your suggestion. I will float the next version by removing 
"fallthrough" statement.

Regards,
Melanie Lobo

> 
> BR,
> Jani.
> 
> > default:
> > return false;
> 
> --
> Jani Nikula, Intel

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Remove the 'force_probe' requirement for Meteor Lake

2023-10-11 Thread Karthik B S


Hi,

On 10/8/2023 10:18 PM, Andi Shyti wrote:

From: Radhakrishna Sripada 

Meteor Lake has demonstrated consistent stability for some time.
All user-space API modifications tide to its core platform
functions are operational.

The necessary firmware components are set up and comprehensive
testing has been condused over a period.

Given the recent faborable CI results, as well, we believe it's
time to eliminate the 'force_probe' prerequisite and activate the
platform by default.

Signed-off-by: Aditya Chauhan 
Signed-off-by: Andrzej Hajda 
Signed-off-by: Chris Wilson 
Signed-off-by: Janusz Krzysztofik 
Signed-off-by: Jonathan Cavitt 
Signed-off-by: Nirmoy Das 
Signed-off-by: Radhakrishna Sripada 
Signed-off-by: Andi Shyti 
Cc: Jani Nikula 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Tvrtko Ursulin 


Verified with the latest drmtip(CI_DRM_13736) on eDP+HDMI config on MTL. 
System is booting seamlessly into Ubuntu UI and played around with a few 
display settings as well.(Single display, clone and extended modes).


Also tried hot-unplug and plug for the HDMI and is working as expected. 
Basic video playback was also verified on both eDP and HDMI.


Tested-by: Karthik B S 


---
Hello,

This patch eliminates the 'force probe' for the MTL platforms. Over the recent
weeks, MTL has demonstrated stability, consistently passing BAT tests with
success rates ranging from 98% to 100%.

There's a single issue hindering us from achieving a 100% BAT test coverage.
Fortunately, we've identified the issue, and the proposed solution can be found
here[*]. The CI results are encouraging.

Once all reviews are addressed, we plan to submit this series with the "Fixes:"
tag.

Thank you and best regards,
Andi and Radhakrishna

[*] https://patchwork.freedesktop.org/series/124744/

  drivers/gpu/drm/i915/i915_pci.c | 1 -
  1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index df7c261410f7..fe748906c06f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -836,7 +836,6 @@ static const struct intel_device_info mtl_info = {
.has_pxp = 1,
.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
-   .require_force_probe = 1,
MTL_CACHELEVEL,
  };

Re: [Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

2023-10-11 Thread Jani Nikula

On Wed, 11 Oct 2023, Melanie Lobo  wrote:
> MTL supports FP16 format which is a binary floating-point computer
> number format that occupies 16 bits in computer memory.Platform shall
> render compression in display engine to receive FP16 compressed formats.
>
> This kernel change was tested with IGT patch,
> https://patchwork.freedesktop.org/patch/562014/
>
> Test-with: 20231011095520.10768-1-melanie.l...@intel.com
>
> Signed-off-by: Melanie Lobo 
> ---
>  drivers/gpu/drm/i915/display/intel_fb.c| 2 ++
>  drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +--
>  2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index e7678571b0d7..868cfc75e687 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -91,6 +91,8 @@ static const struct drm_format_info gen12_ccs_formats[] = {
>   { .format = DRM_FORMAT_P016, .num_planes = 4,
> .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
> = { 1, 1, 1, 1 },
> .hsub = 2, .vsub = 2, .is_yuv = true },
> + { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
> +   .char_per_block = { 4, 1}, .block_w = { 1, 2}, .block_h = { 1, 1}, 
> .hsub = 1, .vsub = 1 },
>  };
>  
>  /*
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 245a64332cc7..64c1d6c2bd76 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2122,8 +2122,7 @@ static bool gen12_plane_format_mod_supported(struct 
> drm_plane *_plane,
>   case DRM_FORMAT_Y216:
>   case DRM_FORMAT_XVYU12_16161616:
>   case DRM_FORMAT_XVYU16161616:
> - if (!intel_fb_is_ccs_modifier(modifier))
> - return true;
> + return true;
>   fallthrough;

This becomes nop.

BR,
Jani.

>   default:
>   return false;

-- 
Jani Nikula, Intel

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

2023-10-11 Thread Melanie Lobo

MTL supports FP16 format which is a binary floating-point computer
number format that occupies 16 bits in computer memory.Platform shall
render compression in display engine to receive FP16 compressed formats.

This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/patch/562014/

Test-with: 20231011095520.10768-1-melanie.l...@intel.com

Signed-off-by: Melanie Lobo 
---
 drivers/gpu/drm/i915/display/intel_fb.c| 2 ++
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index e7678571b0d7..868cfc75e687 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -91,6 +91,8 @@ static const struct drm_format_info gen12_ccs_formats[] = {
{ .format = DRM_FORMAT_P016, .num_planes = 4,
  .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
+   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 4, 1}, .block_w = { 1, 2}, .block_h = { 1, 1}, 
.hsub = 1, .vsub = 1 },
 };
 
 /*
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 245a64332cc7..64c1d6c2bd76 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2122,8 +2122,7 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_Y216:
case DRM_FORMAT_XVYU12_16161616:
case DRM_FORMAT_XVYU16161616:
-   if (!intel_fb_is_ccs_modifier(modifier))
-   return true;
+   return true;
fallthrough;
default:
return false;
-- 
2.17.1

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Store DSC DPCD capabilities in the connector (rev5)

2023-10-11 Thread Patchwork

== Series Details ==

Series: drm/i915: Store DSC DPCD capabilities in the connector (rev5)
URL   : https://patchwork.freedesktop.org/series/124723/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13736_full -> Patchwork_124723v5_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_124723v5_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_124723v5_full, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (9 -> 9)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_124723v5_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_vblank@pipe-d-ts-continuation-suspend:
- shard-mtlp: [PASS][1] -> [ABORT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-mtlp-1/igt@kms_vbl...@pipe-d-ts-continuation-suspend.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-mtlp-4/igt@kms_vbl...@pipe-d-ts-continuation-suspend.html

  
New tests
-

  New tests have been introduced between CI_DRM_13736_full and 
Patchwork_124723v5_full:

### New IGT tests (1) ###

  * igt@kms_content_protection@atomic@pipe-a-dp-4:
- Statuses : 1 timeout(s)
- Exec time: [0.0] s

  

Known issues


  Here are the changes found in Patchwork_124723v5_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2:  NOTRUN -> [SKIP][3] ([i915#8411])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-3/igt@api_intel...@blit-reloc-keep-cache.html
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#8411])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-mtlp-8/igt@api_intel...@blit-reloc-keep-cache.html

  * igt@device_reset@cold-reset-bound:
- shard-dg2:  NOTRUN -> [SKIP][5] ([i915#7701])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-3/igt@device_re...@cold-reset-bound.html

  * igt@drm_fdinfo@busy@ccs0:
- shard-dg2:  NOTRUN -> [SKIP][6] ([i915#8414]) +11 other tests skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-6/igt@drm_fdinfo@b...@ccs0.html

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl:  [PASS][7] -> [FAIL][8] ([i915#7742])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html

  * igt@gem_basic@multigpu-create-close:
- shard-dg2:  NOTRUN -> [SKIP][9] ([i915#7697])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-2/igt@gem_ba...@multigpu-create-close.html

  * igt@gem_ctx_persistence@legacy-engines-cleanup:
- shard-snb:  NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-snb4/igt@gem_ctx_persiste...@legacy-engines-cleanup.html

  * igt@gem_ctx_sseu@mmap-args:
- shard-dg2:  NOTRUN -> [SKIP][11] ([i915#280]) +1 other test skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-11/igt@gem_ctx_s...@mmap-args.html

  * igt@gem_eio@hibernate:
- shard-dg2:  NOTRUN -> [ABORT][12] ([i915#7975] / [i915#8213])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-6/igt@gem_...@hibernate.html

  * igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2:  NOTRUN -> [SKIP][13] ([i915#4812]) +2 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-5/igt@gem_exec_balan...@bonded-false-hang.html

  * igt@gem_exec_capture@capture-invisible@lmem0:
- shard-dg2:  NOTRUN -> [SKIP][14] ([i915#6334]) +1 other test skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-2/igt@gem_exec_capture@capture-invisi...@lmem0.html

  * igt@gem_exec_flush@basic-uc-pro-default:
- shard-dg2:  NOTRUN -> [SKIP][15] ([i915#3539] / [i915#4852]) +1 
other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-3/igt@gem_exec_fl...@basic-uc-pro-default.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
- shard-dg2:  NOTRUN -> [SKIP][16] ([i915#3281]) +16 other tests 
skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124723v5/shard-dg2-2/igt@gem_exec_re...@basic-cpu-gtt-noreloc.html

  *

Re: [Intel-gfx] [PATCH] drm/i915: Add wrapper for getting display step

2023-10-11 Thread Shankar, Uma




> -Original Message-
> From: Shankar, Uma
> Sent: Monday, October 9, 2023 3:06 PM
> To: Borah, Chaitanya Kumar ; intel-
> g...@lists.freedesktop.org
> Cc: Manna, Animesh 
> Subject: RE: [PATCH] drm/i915: Add wrapper for getting display step
> 
> 
> 
> > -Original Message-
> > From: Borah, Chaitanya Kumar 
> > Sent: Tuesday, October 3, 2023 12:22 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Shankar, Uma ; Borah, Chaitanya Kumar
> > ; Manna, Animesh
> > 
> > Subject: [PATCH] drm/i915: Add wrapper for getting display step
> >
> > Add a wrapper around intel_step_name that takes in driver data as an
> argument.
> > This wrapper will help maintain compatibility with the proposed xe driver.
> 
> Looks Good to me.
> Reviewed-by: Uma Shankar 

Pushed to drm-intel-next. Thanks for the patch.

Regards,
Uma Shankar

> > Signed-off-by: Chaitanya Kumar Borah 
> > Signed-off-by: Animesh Manna 
> > ---
> >  drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
> >  drivers/gpu/drm/i915/intel_step.c| 5 +
> >  drivers/gpu/drm/i915/intel_step.h| 1 +
> >  3 files changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> > b/drivers/gpu/drm/i915/display/intel_dmc.c
> > index 1623c0c5e8a1..63e080e07023 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> > @@ -309,7 +309,7 @@ static const struct stepping_info *
> > intel_get_stepping_info(struct drm_i915_private *i915,
> > struct stepping_info *si)
> >  {
> > -   const char *step_name = intel_step_name(RUNTIME_INFO(i915)-
> > >step.display_step);
> > +   const char *step_name = intel_display_step_name(i915);
> >
> > si->stepping = step_name[0];
> > si->substepping = step_name[1];
> > diff --git a/drivers/gpu/drm/i915/intel_step.c
> > b/drivers/gpu/drm/i915/intel_step.c
> > index ee4e5a2c0220..b4162f1be765 100644
> > --- a/drivers/gpu/drm/i915/intel_step.c
> > +++ b/drivers/gpu/drm/i915/intel_step.c
> > @@ -353,3 +353,8 @@ const char *intel_step_name(enum intel_step step)
> > return "**";
> > }
> >  }
> > +
> > +const char *intel_display_step_name(struct drm_i915_private *i915) {
> > +   return intel_step_name(RUNTIME_INFO(i915)->step.display_step);
> > +}
> > diff --git a/drivers/gpu/drm/i915/intel_step.h
> > b/drivers/gpu/drm/i915/intel_step.h
> > index 96dfca4cba73..b6f43b624774 100644
> > --- a/drivers/gpu/drm/i915/intel_step.h
> > +++ b/drivers/gpu/drm/i915/intel_step.h
> > @@ -78,5 +78,6 @@ enum intel_step {
> >
> >  void intel_step_init(struct drm_i915_private *i915);  const char
> > *intel_step_name(enum intel_step step);
> > +const char *intel_display_step_name(struct drm_i915_private *i915);
> >
> >  #endif /* __INTEL_STEP_H__ */
> > --
> > 2.25.1

Re: [Intel-gfx] [PATCH v1 0/3] scalable display feature configurations

2023-10-11 Thread Hogander, Jouni

On Sun, 2023-10-01 at 14:31 +0300, Vinod Govindapillai wrote:
> Get the reported device capabilities and update DSC and scaler
> feature support
> 
> v1: use defined field values instead of magic numbers (Jani Nikula)

For the whole set:

Reviewed-by: Jouni Högander 

> 
> Vinod Govindapillai (3):
>   drm/i915/xe2lpd: display capability register definitions
>   drm/i915/xe2lpd: update the dsc feature capability
>   drm/i915/xe2lpd: update the scaler feature capability
> 
>  .../gpu/drm/i915/display/intel_display_device.c   | 15
> +++
>  drivers/gpu/drm/i915/i915_reg.h   |  7 +++
>  2 files changed, 22 insertions(+)
>

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/print: Add drm_dbg_ratelimited (rev2)

2023-10-11 Thread Patchwork

== Series Details ==

Series: series starting with [1/2] drm/print: Add drm_dbg_ratelimited (rev2)
URL   : https://patchwork.freedesktop.org/series/112925/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13736_full -> Patchwork_112925v2_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (9 -> 10)
--

  Additional (1): shard-tglu0 

Known issues


  Here are the changes found in Patchwork_112925v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2:  NOTRUN -> [SKIP][1] ([i915#8411])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-7/igt@api_intel...@blit-reloc-keep-cache.html

  * igt@device_reset@cold-reset-bound:
- shard-dg2:  NOTRUN -> [SKIP][2] ([i915#7701])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-7/igt@device_re...@cold-reset-bound.html

  * igt@drm_fdinfo@busy@ccs0:
- shard-dg2:  NOTRUN -> [SKIP][3] ([i915#8414]) +11 other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-2/igt@drm_fdinfo@b...@ccs0.html

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl:  [PASS][4] -> [FAIL][5] ([i915#7742])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-rkl-6/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html

  * igt@gem_basic@multigpu-create-close:
- shard-dg2:  NOTRUN -> [SKIP][6] ([i915#7697])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-3/igt@gem_ba...@multigpu-create-close.html

  * igt@gem_ctx_persistence@legacy-engines-cleanup:
- shard-snb:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-snb5/igt@gem_ctx_persiste...@legacy-engines-cleanup.html

  * igt@gem_ctx_sseu@mmap-args:
- shard-dg2:  NOTRUN -> [SKIP][8] ([i915#280]) +1 other test skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-11/igt@gem_ctx_s...@mmap-args.html

  * igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2:  NOTRUN -> [SKIP][9] ([i915#4812]) +2 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-7/igt@gem_exec_balan...@bonded-false-hang.html

  * igt@gem_exec_capture@capture-invisible@lmem0:
- shard-dg2:  NOTRUN -> [SKIP][10] ([i915#6334]) +1 other test skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-3/igt@gem_exec_capture@capture-invisi...@lmem0.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl:  [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-apl6/igt@gem_exec_fair@basic-none-s...@rcs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-apl6/igt@gem_exec_fair@basic-none-s...@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk:  [PASS][13] -> [FAIL][14] ([i915#2842])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-glk5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-glk2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fence@parallel@rcs0:
- shard-mtlp: [PASS][15] -> [ABORT][16] ([i915#9262]) +1 other test 
abort
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13736/shard-mtlp-3/igt@gem_exec_fence@paral...@rcs0.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-mtlp-4/igt@gem_exec_fence@paral...@rcs0.html

  * igt@gem_exec_flush@basic-uc-pro-default:
- shard-dg2:  NOTRUN -> [SKIP][17] ([i915#3539] / [i915#4852])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-7/igt@gem_exec_fl...@basic-uc-pro-default.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
- shard-dg2:  NOTRUN -> [SKIP][18] ([i915#3281]) +13 other tests 
skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-dg2-3/igt@gem_exec_re...@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_schedule@semaphore-power:
- shard-mtlp: NOTRUN -> [SKIP][19] ([i915#4537] / [i915#4812])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112925v2/shard-mtlp-6/igt@gem_exec_sched...@semaphore-power.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
- shard-dg2:  NOTRUN -> [SKIP][20] ([i915#4860]) +1 other test skip
   [20]:

Re: [Intel-gfx] [PATCH v11 7/7] drm/i915: Enable GuC TLB invalidations for MTL

2023-10-11 Thread Nirmoy Das




On 10/11/2023 2:02 AM, Jonathan Cavitt wrote:

Enable GuC TLB invalidations for MTL.  Though more platforms than just
MTL support GuC TLB invalidations, MTL is presently the only platform
that requires it for any purpose, so only enable it there for now to
minimize cross-platform impact.

Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 


With a happy CI this is

Reviewed-by: Nirmoy Das 


---
  drivers/gpu/drm/i915/i915_pci.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index df7c261410f79..d4b51ececbb12 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -829,6 +829,7 @@ static const struct intel_device_info mtl_info = {
.has_flat_ccs = 0,
.has_gmd_id = 1,
.has_guc_deprivilege = 1,
+   .has_guc_tlb_invalidation = 1,
.has_llc = 0,
.has_mslice_steering = 0,
.has_snoop = 1,

Re: [Intel-gfx] [PATCH v11 6/7] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck

2023-10-11 Thread Nirmoy Das




On 10/11/2023 2:02 AM, Jonathan Cavitt wrote:

For the gt_tlb live selftest, when operating on the GSC engine,
increase the timeout from 10 ms to 200 ms because the GSC
engine is a bit slower than the rest.

Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 


Reviewed-by: Nirmoy Das 


---
  drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +--
  1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c 
b/drivers/gpu/drm/i915/gt/selftest_tlb.c
index 7e41f69fc818f..00b872b6380b1 100644
--- a/drivers/gpu/drm/i915/gt/selftest_tlb.c
+++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c
@@ -136,8 +136,15 @@ pte_tlbinv(struct intel_context *ce,
i915_request_get(rq);
i915_request_add(rq);
  
-	/* Short sleep to sanitycheck the batch is spinning before we begin */

-   msleep(10);
+   /*
+* Short sleep to sanitycheck the batch is spinning before we begin.
+* FIXME: Why is GSC so slow?
+*/
+   if (ce->engine->class == OTHER_CLASS)
+   msleep(200);
+   else
+   msleep(10);
+
if (va == vb) {
if (!i915_request_completed(rq)) {
pr_err("%s(%s): Semaphore sanitycheck failed %llx, with 
alignment %llx, using PTE size %x (phys %x, sg %x)\n",

Re: [Intel-gfx] [PATCH v11 5/7] drm/i915: No TLB invalidation on wedged GT

2023-10-11 Thread Nirmoy Das




On 10/11/2023 2:02 AM, Jonathan Cavitt wrote:

It is not an error for GuC TLB invalidations to fail when the GT is
wedged or disabled, so do not process a wait failure as one in
guc_send_invalidate_tlb.

Signed-off-by: Fei Yang 
Signed-off-by: Jonathan Cavitt 
CC: John Harrison 
Reviewed-by: Andi Shyti 


Acked-by: Nirmoy Das 


---
  .../gpu/drm/i915/gt/uc/intel_guc_submission.c  | 18 +-
  1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 9d5f8cccaa592..1914cba5f48dd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -32,6 +32,7 @@
  
  #include "i915_drv.h"

  #include "i915_reg.h"
+#include "i915_irq.h"
  #include "i915_trace.h"
  
  /**

@@ -1941,6 +1942,12 @@ void intel_guc_submission_cancel_requests(struct 
intel_guc *guc)
  
  	/* GuC is blown away, drop all references to contexts */

xa_destroy(>context_lookup);
+
+   /*
+* Wedged GT won't respond to any TLB invalidation request. Simply
+* release all the blocked waiters.
+*/
+   wake_up_all_tlb_invalidate(guc);
  }
  
  void intel_guc_submission_reset_finish(struct intel_guc *guc)

@@ -4740,6 +4747,14 @@ static long must_wait_woken(struct wait_queue_entry 
*wq_entry, long timeout)
return timeout;
  }
  
+static bool intel_gt_is_enabled(const struct intel_gt *gt)

+{
+   /* Check if GT is wedged or suspended */
+   if (intel_gt_is_wedged(gt) || !intel_irqs_enabled(gt->i915))
+   return false;
+   return true;
+}
+
  static int guc_send_invalidate_tlb(struct intel_guc *guc,
   enum intel_guc_tlb_invalidation_type type)
  {
@@ -4789,7 +4804,8 @@ static int guc_send_invalidate_tlb(struct intel_guc *guc,
if (err)
goto out;
  
-	if (!must_wait_woken(, intel_guc_ct_max_queue_time_jiffies())) {

+   if (intel_gt_is_enabled(guc_to_gt(guc)) &&
+   !must_wait_woken(, intel_guc_ct_max_queue_time_jiffies())) {
guc_err(guc,
"TLB invalidation response timed out for seqno %u\n", 
seqno);
err = -ETIME;

Re: [Intel-gfx] [PATCH v11 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-11 Thread Nirmoy Das




On 10/11/2023 2:02 AM, Jonathan Cavitt wrote:

From: Prathap Kumar Valsan 

The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation.  We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back to GT invalidation when the GuC is
disabled.
The invalidation is done by sending a request directly to the GuC
tlb_lookup that invalidates the table.  The invalidation is submitted as
a wait request and is performed in the CT event handler.  This means we
cannot perform this TLB invalidation path if the CT is not enabled.
If the request isn't fulfilled in two seconds, this would constitute
an error in the invalidation as that would constitute either a lost
request or a severe GuC overload.

With this new invalidation routine, we can perform GuC-based GGTT
invalidations.  GuC-based GGTT invalidation is incompatible with
MMIO invalidation so we should not perform MMIO invalidation when
GuC-based GGTT invalidation is expected.

The additional complexity incurred in this patch will be necessary for
range-based tlb invalidations, which will be platformed in the future.

Signed-off-by: Prathap Kumar Valsan 
Signed-off-by: Bruce Chang 
Signed-off-by: Chris Wilson 
Signed-off-by: Umesh Nerlige Ramappa 
Signed-off-by: Jonathan Cavitt 
Signed-off-by: Aravind Iddamsetty 
Signed-off-by: Fei Yang 
CC: Andi Shyti 
Reviewed-by: Andi Shyti 


Acked-by: Nirmoy Das 


---
  drivers/gpu/drm/i915/gt/intel_ggtt.c  |  34 +++-
  drivers/gpu/drm/i915/gt/intel_tlb.c   |  16 +-
  .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |  33 
  drivers/gpu/drm/i915/gt/uc/intel_guc.h|  21 ++
  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c |   4 +
  drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   1 +
  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 186 +-
  7 files changed, 283 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c 
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 4d7d88b92632b..a1f7bdc602996 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -206,22 +206,38 @@ static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
  }
  
+static void guc_ggtt_ct_invalidate(struct intel_gt *gt)

+{
+   struct intel_uncore *uncore = gt->uncore;
+   intel_wakeref_t wakeref;
+
+   with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
+   struct intel_guc *guc = >uc.guc;
+
+   intel_guc_invalidate_tlb_guc(guc);
+   }
+}
+
  static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
  {
struct drm_i915_private *i915 = ggtt->vm.i915;
+   struct intel_gt *gt;
  
-	gen8_ggtt_invalidate(ggtt);

-
-   if (GRAPHICS_VER(i915) >= 12) {
-   struct intel_gt *gt;
+   if (!HAS_GUC_TLB_INVALIDATION(i915))
+   gen8_ggtt_invalidate(ggtt);
  
-		list_for_each_entry(gt, >gt_list, ggtt_link)

+   list_for_each_entry(gt, >gt_list, ggtt_link) {
+   if (HAS_GUC_TLB_INVALIDATION(i915) &&
+   intel_guc_is_ready(>uc.guc)) {
+   guc_ggtt_ct_invalidate(gt);
+   } else if (GRAPHICS_VER(i915) >= 12) {
intel_uncore_write_fw(gt->uncore,
  GEN12_GUC_TLB_INV_CR,
  GEN12_GUC_TLB_INV_CR_INVALIDATE);
-   } else {
-   intel_uncore_write_fw(ggtt->vm.gt->uncore,
- GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+   } else {
+   intel_uncore_write_fw(gt->uncore,
+ GEN8_GTCR, GEN8_GTCR_INVALIDATE);
+   }
}
  }
  
@@ -1243,7 +1259,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)

ggtt->vm.raw_insert_page = gen8_ggtt_insert_page;
}
  
-	if (intel_uc_wants_guc(>vm.gt->uc))

+   if (intel_uc_wants_guc_submission(>vm.gt->uc))
ggtt->invalidate = guc_ggtt_invalidate;
else
ggtt->invalidate = gen8_ggtt_invalidate;
diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c 
b/drivers/gpu/drm/i915/gt/intel_tlb.c
index 139608c30d978..4bb13d1890e37 100644
--- a/drivers/gpu/drm/i915/gt/intel_tlb.c
+++ b/drivers/gpu/drm/i915/gt/intel_tlb.c
@@ -12,6 +12,7 @@
  #include "intel_gt_print.h"
  #include "intel_gt_regs.h"
  #include "intel_tlb.h"
+#include "uc/intel_guc.h"
  
  /*

   * HW architecture suggest typical invalidation time at 40us,
@@ -131,11 +132,24 @@ void intel_gt_invalidate_tlb_full(struct intel_gt *gt, 
u32 seqno)
return;
  
  	with_intel_gt_pm_if_awake(gt, wakeref) {

+   struct intel_guc *guc = >uc.guc;
+
mutex_lock(>tlb.invalidate_lock);
if

Re: [Intel-gfx] [PATCH v11 2/7] drm/i915/guc: Add CT size delay helper

2023-10-11 Thread Nirmoy Das




On 10/11/2023 2:02 AM, Jonathan Cavitt wrote:

Add a helper function to the GuC CT buffer that reports the expected
time to process all outstanding requests.  As of now, there is no
functionality to check number of requests in the buffer, so the helper
function just reports 2 seconds, or 1ms per request up to the maximum
number of requests the CT buffer can store.

Suggested-by: John Harrison 
Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 


Reviewed-by: Nirmoy Das 


---
  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 27 +++
  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h |  2 ++
  2 files changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index c33210ead1ef7..03b616ba4ebb7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -103,6 +103,33 @@ enum { CTB_SEND = 0, CTB_RECV = 1 };
  
  enum { CTB_OWNER_HOST = 0 };
  
+/*

+ * Some H2G commands involve a synchronous response that the driver needs
+ * to wait for. In such cases, a timeout is required to prevent the driver
+ * from waiting forever in the case of an error (either no error response
+ * is defined in the protocol or something has died and requires a reset).
+ * The specific command may be defined as having a time bound response but
+ * the CT is a queue and that time guarantee only starts from the point
+ * when the command reaches the head of the queue and is processed by GuC.
+ *
+ * Ideally there would be a helper to report the progress of a given
+ * command through the CT. However, that would require a significant
+ * amount of work in the CT layer. In the meantime, provide a reasonable
+ * estimation of the worst case latency it should take for the entire
+ * queue to drain. And therefore, how long a caller should wait before
+ * giving up on their request. The current estimate is based on empirical
+ * measurement of a test that fills the buffer with context creation and
+ * destruction requests as they seem to be the slowest operation.
+ */
+long intel_guc_ct_max_queue_time_jiffies(void)
+{
+   /*
+* A 4KB buffer full of context destroy commands takes a little
+* over a second to process so bump that to 2s to be super safe.
+*/
+   return (CTB_H2G_BUFFER_SIZE * HZ) / SZ_2K;
+}
+
  static void ct_receive_tasklet_func(struct tasklet_struct *t);
  static void ct_incoming_request_worker_func(struct work_struct *w);
  
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h

index 58e42901ff498..2c4bb9a941be6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
@@ -104,6 +104,8 @@ struct intel_guc_ct {
  #endif
  };
  
+long intel_guc_ct_max_queue_time_jiffies(void);

+
  void intel_guc_ct_init_early(struct intel_guc_ct *ct);
  int intel_guc_ct_init(struct intel_guc_ct *ct);
  void intel_guc_ct_fini(struct intel_guc_ct *ct);

Re: [Intel-gfx] [PATCH v11 1/7] drm/i915: Add GuC TLB Invalidation device info flags

2023-10-11 Thread Nirmoy Das




On 10/11/2023 2:02 AM, Jonathan Cavitt wrote:

Add device info flags for if GuC TLB Invalidation is enabled.

Signed-off-by: Jonathan Cavitt 
Reviewed-by: Andi Shyti 


Reviewed-by: Nirmoy Das 



---
  drivers/gpu/drm/i915/i915_drv.h  | 2 ++
  drivers/gpu/drm/i915/intel_device_info.h | 1 +
  2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cb60fc9cf8737..6a2a78c61f212 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -794,6 +794,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
  #define HAS_GUC_DEPRIVILEGE(i915) \
(INTEL_INFO(i915)->has_guc_deprivilege)
  
+#define HAS_GUC_TLB_INVALIDATION(i915)	(INTEL_INFO(i915)->has_guc_tlb_invalidation)

+
  #define HAS_3D_PIPELINE(i915) (INTEL_INFO(i915)->has_3d_pipeline)
  
  #define HAS_ONE_EU_PER_FUSE_BIT(i915)	(INTEL_INFO(i915)->has_one_eu_per_fuse_bit)

diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 39817490b13fd..eba2f0b919c87 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -153,6 +153,7 @@ enum intel_ppgtt_type {
func(has_heci_pxp); \
func(has_heci_gscfi); \
func(has_guc_deprivilege); \
+   func(has_guc_tlb_invalidation); \
func(has_l3_ccs_read); \
func(has_l3_dpf); \
func(has_llc); \

Re: [Intel-gfx] [PATCH] drm/i915: Add bigjoiner force enable option to debugfs

2023-10-11 Thread Lisovskiy, Stanislav

On Wed, Oct 11, 2023 at 11:49:38AM +0300, Jani Nikula wrote:
> On Mon, 09 Oct 2023, Stanislav Lisovskiy  
> wrote:
> > For validation purposes, it might be useful to be able to
> > force Bigjoiner mode, even if current dotclock/resolution
> > do not require that.
> > Lets add such to option to debugfs.
> >
> > v2: - Apparently intel_dp_need_bigjoiner can't be used, when
> >   debugfs entry is created so lets just check manually
> >   the DISPLAY_VER.
> >
> > Signed-off-by: Stanislav Lisovskiy 
> > ---
> >  .../drm/i915/display/intel_display_debugfs.c  | 71 +++
> >  .../drm/i915/display/intel_display_types.h|  2 +
> >  drivers/gpu/drm/i915/display/intel_dp.c   |  6 +-
> >  3 files changed, 78 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c 
> > b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > index f6d7c4d45fae..c806957cb902 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > @@ -1399,6 +1399,35 @@ out: 
> > drm_modeset_unlock(>mode_config.connection_mutex);
> > return ret;
> >  }
> >  
> > +static int i915_bigjoiner_enable_show(struct seq_file *m, void *data)
> > +{
> > +   struct drm_connector *connector = m->private;
> 
> struct intel_connector *connector, please. Yeah, this is copy-paste from
> other files, but they should be changed too.
> 
> > +   struct drm_device *dev = connector->dev;
> 
> struct drm_i915_private *i915, please.
> 
> > +   struct drm_crtc *crtc;
> > +   struct intel_encoder *encoder = 
> > intel_attached_encoder(to_intel_connector(connector));
> > +   struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > +   int ret;
> > +
> > +   if (!encoder)
> > +   return -ENODEV;
> > +
> > +   ret = 
> > drm_modeset_lock_single_interruptible(>mode_config.connection_mutex);
> > +   if (ret)
> > +   return ret;
> 
> Why does show need locking but write doesn't?
> 
> > +
> > +   crtc = connector->state->crtc;
> > +   if (connector->status != connector_status_connected || !crtc) {
> > +   ret = -ENODEV;
> > +   goto out;
> > +   }
> 
> I guess because of the above, but... do we need it? Or is this just
> copy-pasted from some other debugfs files, which copy-pasted from other
> debugfs files, which... ;)

Yeah, I would be honest here, had same question both for bool/int and crtc 
locking
however decided just to copy same approach, from other debugfs entries, assuming
that was done with some purpose :)

> 
> > +
> > +   seq_printf(m, "Bigjoiner enable: %d\n", intel_dp->force_bigjoiner_en);
> > +
> > +out:   drm_modeset_unlock(>mode_config.connection_mutex);
> > +
> > +   return ret;
> > +}
> > +
> >  static ssize_t i915_dsc_output_format_write(struct file *file,
> > const char __user *ubuf,
> > size_t len, loff_t *offp)
> > @@ -1420,12 +1449,39 @@ static ssize_t i915_dsc_output_format_write(struct 
> > file *file,
> > return len;
> >  }
> >  
> > +static ssize_t i915_bigjoiner_enable_fops_write(struct file *file,
> > +   const char __user *ubuf,
> > +   size_t len, loff_t *offp)
> > +{
> > +   struct drm_connector *connector =
> > +   ((struct seq_file *)file->private_data)->private;
> 
> I think this reads better with
> 
>   struct seq_file *m = file->private_data;
> struct intel_connector *connector = m->private;
> 
> > +   struct intel_encoder *encoder = 
> > intel_attached_encoder(to_intel_connector(connector));
> > +   struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > +   int bigjoiner_en = 0;
> > +   int ret;
> > +
> > +   ret = kstrtoint_from_user(ubuf, len, 0, _en);
> > +   if (ret < 0)
> > +   return ret;
> 
> If it's a bool, why kstrtoint? Yeah, because copy-paste, but why keep
> percolating the same mistakes?

Yeah, as I said above..

> 
> > +
> > +   intel_dp->force_bigjoiner_en = bigjoiner_en;
> > +   *offp += len;
> > +
> > +   return len;
> > +}
> > +
> >  static int i915_dsc_output_format_open(struct inode *inode,
> >struct file *file)
> >  {
> > return single_open(file, i915_dsc_output_format_show, inode->i_private);
> >  }
> >  
> > +static int i915_bigjoiner_enable_open(struct inode *inode,
> > + struct file *file)
> > +{
> > +   return single_open(file, i915_bigjoiner_enable_show, inode->i_private);
> > +}
> > +
> >  static const struct file_operations i915_dsc_output_format_fops = {
> > .owner = THIS_MODULE,
> > .open = i915_dsc_output_format_open,
> > @@ -1435,6 +1491,15 @@ static const struct file_operations 
> > i915_dsc_output_format_fops = {
> > .write = i915_dsc_output_format_write
> >  };
> >  
> > +static const struct file_operations i915_bigjoiner_enable_fops = {
> > +

Re: [Intel-gfx] [PATCH] drm/i915: Add bigjoiner force enable option to debugfs

2023-10-11 Thread Jani Nikula

On Mon, 09 Oct 2023, Stanislav Lisovskiy  wrote:
> For validation purposes, it might be useful to be able to
> force Bigjoiner mode, even if current dotclock/resolution
> do not require that.
> Lets add such to option to debugfs.
>
> v2: - Apparently intel_dp_need_bigjoiner can't be used, when
>   debugfs entry is created so lets just check manually
>   the DISPLAY_VER.
>
> Signed-off-by: Stanislav Lisovskiy 
> ---
>  .../drm/i915/display/intel_display_debugfs.c  | 71 +++
>  .../drm/i915/display/intel_display_types.h|  2 +
>  drivers/gpu/drm/i915/display/intel_dp.c   |  6 +-
>  3 files changed, 78 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c 
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index f6d7c4d45fae..c806957cb902 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1399,6 +1399,35 @@ out:   
> drm_modeset_unlock(>mode_config.connection_mutex);
>   return ret;
>  }
>  
> +static int i915_bigjoiner_enable_show(struct seq_file *m, void *data)
> +{
> + struct drm_connector *connector = m->private;

struct intel_connector *connector, please. Yeah, this is copy-paste from
other files, but they should be changed too.

> + struct drm_device *dev = connector->dev;

struct drm_i915_private *i915, please.

> + struct drm_crtc *crtc;
> + struct intel_encoder *encoder = 
> intel_attached_encoder(to_intel_connector(connector));
> + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> + int ret;
> +
> + if (!encoder)
> + return -ENODEV;
> +
> + ret = 
> drm_modeset_lock_single_interruptible(>mode_config.connection_mutex);
> + if (ret)
> + return ret;

Why does show need locking but write doesn't?

> +
> + crtc = connector->state->crtc;
> + if (connector->status != connector_status_connected || !crtc) {
> + ret = -ENODEV;
> + goto out;
> + }

I guess because of the above, but... do we need it? Or is this just
copy-pasted from some other debugfs files, which copy-pasted from other
debugfs files, which... ;)

> +
> + seq_printf(m, "Bigjoiner enable: %d\n", intel_dp->force_bigjoiner_en);
> +
> +out: drm_modeset_unlock(>mode_config.connection_mutex);
> +
> + return ret;
> +}
> +
>  static ssize_t i915_dsc_output_format_write(struct file *file,
>   const char __user *ubuf,
>   size_t len, loff_t *offp)
> @@ -1420,12 +1449,39 @@ static ssize_t i915_dsc_output_format_write(struct 
> file *file,
>   return len;
>  }
>  
> +static ssize_t i915_bigjoiner_enable_fops_write(struct file *file,
> + const char __user *ubuf,
> + size_t len, loff_t *offp)
> +{
> + struct drm_connector *connector =
> + ((struct seq_file *)file->private_data)->private;

I think this reads better with

struct seq_file *m = file->private_data;
struct intel_connector *connector = m->private;

> + struct intel_encoder *encoder = 
> intel_attached_encoder(to_intel_connector(connector));
> + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> + int bigjoiner_en = 0;
> + int ret;
> +
> + ret = kstrtoint_from_user(ubuf, len, 0, _en);
> + if (ret < 0)
> + return ret;

If it's a bool, why kstrtoint? Yeah, because copy-paste, but why keep
percolating the same mistakes?

> +
> + intel_dp->force_bigjoiner_en = bigjoiner_en;
> + *offp += len;
> +
> + return len;
> +}
> +
>  static int i915_dsc_output_format_open(struct inode *inode,
>  struct file *file)
>  {
>   return single_open(file, i915_dsc_output_format_show, inode->i_private);
>  }
>  
> +static int i915_bigjoiner_enable_open(struct inode *inode,
> +   struct file *file)
> +{
> + return single_open(file, i915_bigjoiner_enable_show, inode->i_private);
> +}
> +
>  static const struct file_operations i915_dsc_output_format_fops = {
>   .owner = THIS_MODULE,
>   .open = i915_dsc_output_format_open,
> @@ -1435,6 +1491,15 @@ static const struct file_operations 
> i915_dsc_output_format_fops = {
>   .write = i915_dsc_output_format_write
>  };
>  
> +static const struct file_operations i915_bigjoiner_enable_fops = {
> + .owner = THIS_MODULE,
> + .open = i915_bigjoiner_enable_open,
> + .read = seq_read,
> + .llseek = seq_lseek,
> + .release = single_release,
> + .write = i915_bigjoiner_enable_fops_write
> +};
> +
>  /*
>   * Returns the Current CRTC's bpc.
>   * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
> @@ -1514,6 +1579,12 @@ void intel_connector_debugfs_add(struct 
> intel_connector *intel_connector)
>

Re: [Intel-gfx] [PATCH 1/4] drm/i915/gvt: remove unused to_gvt() and reduce includes

2023-10-11 Thread Zhenyu Wang

On 2023.10.11 10:04:09 +0300, Jani Nikula wrote:
> On Wed, 11 Oct 2023, Zhenyu Wang  wrote:
> > On 2023.10.04 15:54:11 +0300, Jani Nikula wrote:
> >> On Tue, 26 Sep 2023, Jani Nikula  wrote:
> >> > gvt.h has no need to include i915_drv.h once the unused to_gvt() has
> >> > been removed.
> >> >
> >> > Signed-off-by: Jani Nikula 
> >> 
> >> Zhenyu, Zhi, ping?
> >> 
> >
> > Sorry for late reply, as last week was full holiday here.
> >
> > Reviewed-by: Zhenyu Wang 
> >
> > I don't think I need to do extra pick and pull request for this or
> > let me know if you has question.
> 
> Did you pick them up to gvt-next or shall I pick them up to
> drm-intel-next?
> 
> If the former, I think I'd actually like a pull request, because
> otherwise the trees will be out-of-sync for a long time.
> 

Sorry, I mean it's fine for me if you directly pick them for drm-intel-next.

thanks


signature.asc
Description: PGP signature

[Intel-gfx] [PATCH i-g-t 4/4] tools/intel_gpu_top: Handle narrow terminals more gracefully

2023-10-11 Thread Tvrtko Ursulin

From: Tvrtko Ursulin 

Instead of asserting just skip trying to print columns when terminal is
too narrow.

At the same time fix some type confusion to fix calculations going huge.

Signed-off-by: Tvrtko Ursulin 
Closes: https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/issues/143
Reviewed-by: Kamil Konieczny 
---
 tools/intel_gpu_top.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 006879c4ae67..00506c63db4e 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -972,7 +972,8 @@ print_percentage_bar(double percent, double max, int 
max_len, bool numeric)
int bar_len, i, len = max_len - 2;
const int w = 8;
 
-   assert(max_len > 0);
+   if (len < 2) /* For edge lines '|' */
+   return;
 
bar_len = ceil(w * percent * len / max);
if (bar_len > w * len)
@@ -986,6 +987,8 @@ print_percentage_bar(double percent, double max, int 
max_len, bool numeric)
printf("%s", bars[i]);
 
len -= (bar_len + (w - 1)) / w;
+   if (len < 1)
+   return;
n_spaces(len);
 
putchar('|');
@@ -2001,8 +2004,7 @@ print_clients_header(struct igt_drm_clients *clients, int 
lines,
 4 : clients->max_name_len; /* At least "NAME" 
*/
 
if (output_mode == INTERACTIVE) {
-   unsigned int num_active = 0;
-   int len;
+   int len, num_active = 0;
 
if (lines++ >= con_h)
return lines;
-- 
2.39.2

1 2 >

1 - 100 of 120 matches

Mail list logo