✗ Fi.CI.SPARSE: warning for XE HDCP Enablement (rev10)
== Series Details == Series: XE HDCP Enablement (rev10) URL : https://patchwork.freedesktop.org/series/129456/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old' +./include/asm-generic/bit
[PATCH v4 4/4] drm/ttm: Allow continued swapout after -ENOSPC falure
The -ENOSPC failure from ttm_bo_swapout() meant that the lru_lock
was dropped and simply restarting the iteration meant we'd likely
hit the same error again on the same resource. Now that we can
restart the iteration even if the lock was dropped, do that.
Cc: Christian König
Cc: Somalapuram Amaranath
Cc:
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/ttm/ttm_device.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index e8a6a1dab669..4a030b4bc848 100644
--- a/drivers/gpu/drm/ttm/ttm_device.c
+++ b/drivers/gpu/drm/ttm/ttm_device.c
@@ -168,15 +168,20 @@ int ttm_device_swapout(struct ttm_device *bdev, struct
ttm_operation_ctx *ctx,
num_pages = PFN_UP(bo->base.size);
ret = ttm_bo_swapout(bo, ctx, gfp_flags);
- /* ttm_bo_swapout has dropped the lru_lock */
- if (!ret) {
- ttm_resource_cursor_fini(&cursor);
- return num_pages;
- }
- if (ret != -EBUSY) {
- ttm_resource_cursor_fini(&cursor);
- return ret;
+ /* Couldn't swap out, and retained the lru_lock */
+ if (ret == -EBUSY)
+ continue;
+ /* Couldn't swap out and dropped the lru_lock */
+ if (ret == -ENOSPC) {
+ spin_lock(&bdev->lru_lock);
+ continue;
}
+ /*
+* Dropped the lock and either succeeded or
+* hit an error that forces us to break.
+*/
+ ttm_resource_cursor_fini(&cursor);
+ return ret ? ret : num_pages;
}
}
ttm_resource_cursor_fini_locked(&cursor);
--
2.44.0
[PATCH v4 1/4] drm/ttm: Allow TTM LRU list nodes of different types
To be able to handle list unlocking while traversing the LRU
list, we want the iterators not only to point to the next
position of the list traversal, but to insert themselves as
list nodes at that point to work around the fact that the
next node might otherwise disappear from the list while
the iterator is pointing to it.
These list nodes need to be easily distinguishable from other
list nodes so that others traversing the list can skip
over them.
So declare a struct ttm_lru_item, with a struct list_head member
and a type enum. This will slightly increase the size of a
struct ttm_resource.
v2:
- Update enum ttm_lru_item_type documentation.
Cc: Christian König
Cc: Somalapuram Amaranath
Cc:
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/ttm/ttm_device.c | 13 --
drivers/gpu/drm/ttm/ttm_resource.c | 70 ++
include/drm/ttm/ttm_resource.h | 51 +-
3 files changed, 110 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index 76027960054f..f27406e851e5 100644
--- a/drivers/gpu/drm/ttm/ttm_device.c
+++ b/drivers/gpu/drm/ttm/ttm_device.c
@@ -270,17 +270,22 @@ EXPORT_SYMBOL(ttm_device_fini);
static void ttm_device_clear_lru_dma_mappings(struct ttm_device *bdev,
struct list_head *list)
{
- struct ttm_resource *res;
+ struct ttm_lru_item *lru;
spin_lock(&bdev->lru_lock);
- while ((res = list_first_entry_or_null(list, typeof(*res), lru))) {
- struct ttm_buffer_object *bo = res->bo;
+ while ((lru = list_first_entry_or_null(list, typeof(*lru), link))) {
+ struct ttm_buffer_object *bo;
+
+ if (!ttm_lru_item_is_res(lru))
+ continue;
+
+ bo = ttm_lru_item_to_res(lru)->bo;
/* Take ref against racing releases once lru_lock is unlocked */
if (!ttm_bo_get_unless_zero(bo))
continue;
- list_del_init(&res->lru);
+ list_del_init(&bo->resource->lru.link);
spin_unlock(&bdev->lru_lock);
if (bo->ttm)
diff --git a/drivers/gpu/drm/ttm/ttm_resource.c
b/drivers/gpu/drm/ttm/ttm_resource.c
index 65155f2013ca..ee1865f82cb4 100644
--- a/drivers/gpu/drm/ttm/ttm_resource.c
+++ b/drivers/gpu/drm/ttm/ttm_resource.c
@@ -69,8 +69,8 @@ void ttm_lru_bulk_move_tail(struct ttm_lru_bulk_move *bulk)
dma_resv_assert_held(pos->last->bo->base.resv);
man = ttm_manager_type(pos->first->bo->bdev, i);
- list_bulk_move_tail(&man->lru[j], &pos->first->lru,
- &pos->last->lru);
+ list_bulk_move_tail(&man->lru[j], &pos->first->lru.link,
+ &pos->last->lru.link);
}
}
}
@@ -83,14 +83,38 @@ ttm_lru_bulk_move_pos(struct ttm_lru_bulk_move *bulk,
struct ttm_resource *res)
return &bulk->pos[res->mem_type][res->bo->priority];
}
+/* Return the previous resource on the list (skip over non-resource list
items) */
+static struct ttm_resource *ttm_lru_prev_res(struct ttm_resource *cur)
+{
+ struct ttm_lru_item *lru = &cur->lru;
+
+ do {
+ lru = list_prev_entry(lru, link);
+ } while (!ttm_lru_item_is_res(lru));
+
+ return ttm_lru_item_to_res(lru);
+}
+
+/* Return the next resource on the list (skip over non-resource list items) */
+static struct ttm_resource *ttm_lru_next_res(struct ttm_resource *cur)
+{
+ struct ttm_lru_item *lru = &cur->lru;
+
+ do {
+ lru = list_next_entry(lru, link);
+ } while (!ttm_lru_item_is_res(lru));
+
+ return ttm_lru_item_to_res(lru);
+}
+
/* Move the resource to the tail of the bulk move range */
static void ttm_lru_bulk_move_pos_tail(struct ttm_lru_bulk_move_pos *pos,
struct ttm_resource *res)
{
if (pos->last != res) {
if (pos->first == res)
- pos->first = list_next_entry(res, lru);
- list_move(&res->lru, &pos->last->lru);
+ pos->first = ttm_lru_next_res(res);
+ list_move(&res->lru.link, &pos->last->lru.link);
pos->last = res;
}
}
@@ -120,11 +144,11 @@ static void ttm_lru_bulk_move_del(struct
ttm_lru_bulk_move *bulk,
pos->first = NULL;
pos->last = NULL;
} else if (pos->first == res) {
- pos->first = list_next_entry(res, lru);
+ pos->first = ttm_lru_next_res(res);
} else if (pos->last == res) {
- pos->last = list_prev_entry(res, lru);
+ pos->last = ttm_lru_prev_res(res);
} else {
- list_move(&res->lru, &pos->last->lru);
+ list_move(&res->lru.link, &pos->last-
[PATCH v4 3/4] drm/ttm, drm/amdgpu, drm/xe: Consider hitch moves within bulk sublist moves
To address the problem with hitches moving when bulk move
sublists are lru-bumped, register the list cursors with the
ttm_lru_bulk_move structure when traversing its list, and
when lru-bumping the list, move the cursor hitch to the tail.
This also means it's mandatory for drivers to call
ttm_lru_bulk_move_init() and ttm_lru_bulk_move_fini() when
initializing and finalizing the bulk move structure, so add
those calls to the amdgpu- and xe driver.
Compared to v1 this is slightly more code but less fragile
and hopefully easier to understand.
v2:
- Completely rework the functionality
v3:
- Avoid a NULL pointer dereference assigning manager->mem_type
v4:
- Remove some leftover code causing build problems
Cc: Christian König
Cc: Somalapuram Amaranath
Cc:
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++
drivers/gpu/drm/ttm/ttm_resource.c | 90 +-
drivers/gpu/drm/xe/xe_vm.c | 4 ++
include/drm/ttm/ttm_device.h | 2 +
include/drm/ttm/ttm_resource.h | 55 ++--
5 files changed, 134 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index ed4a8c5d26d7..7c2ee5d12bc1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2264,6 +2264,8 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct
amdgpu_vm *vm,
if (r)
return r;
+ ttm_lru_bulk_move_init(&vm->lru_bulk_move);
+
vm->pte_support_ats = false;
vm->is_compute_context = false;
@@ -2324,6 +2326,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct
amdgpu_vm *vm,
error_free_delayed:
dma_fence_put(vm->last_tlb_flush);
dma_fence_put(vm->last_unlocked);
+ ttm_lru_bulk_move_fini(&adev->mman.bdev, &vm->lru_bulk_move);
amdgpu_vm_fini_entities(vm);
return r;
@@ -2497,6 +2500,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct
amdgpu_vm *vm)
}
}
+ ttm_lru_bulk_move_fini(&adev->mman.bdev, &vm->lru_bulk_move);
}
/**
diff --git a/drivers/gpu/drm/ttm/ttm_resource.c
b/drivers/gpu/drm/ttm/ttm_resource.c
index 971014fca10a..0acd4bf764b2 100644
--- a/drivers/gpu/drm/ttm/ttm_resource.c
+++ b/drivers/gpu/drm/ttm/ttm_resource.c
@@ -32,6 +32,49 @@
#include
+/* Detach the cursor from the bulk move list*/
+static void
+ttm_resource_cursor_clear_bulk(struct ttm_resource_cursor *cursor)
+{
+ cursor->bulk = NULL;
+ list_del_init(&cursor->bulk_link);
+}
+
+/* Move the cursor to the end of the bulk move list it's in */
+static void ttm_resource_cursor_move_bulk_tail(struct ttm_lru_bulk_move *bulk,
+ struct ttm_resource_cursor
*cursor)
+{
+ struct ttm_lru_bulk_move_pos *pos;
+
+ if (WARN_ON_ONCE(bulk != cursor->bulk)) {
+ list_del_init(&cursor->bulk_link);
+ return;
+ }
+
+ pos = &bulk->pos[cursor->man->mem_type][cursor->priority];
+ if (pos)
+ list_move(&cursor->hitch.link, &pos->last->lru.link);
+ ttm_resource_cursor_clear_bulk(cursor);
+}
+
+/* Move all cursors attached to a bulk move to its end */
+static void ttm_bulk_move_adjust_cursors(struct ttm_lru_bulk_move *bulk)
+{
+ struct ttm_resource_cursor *cursor, *next;
+
+ list_for_each_entry_safe(cursor, next, &bulk->cursor_list, bulk_link)
+ ttm_resource_cursor_move_bulk_tail(bulk, cursor);
+}
+
+/* Remove a cursor from an empty bulk move list */
+static void ttm_bulk_move_drop_cursors(struct ttm_lru_bulk_move *bulk)
+{
+ struct ttm_resource_cursor *cursor, *next;
+
+ list_for_each_entry_safe(cursor, next, &bulk->cursor_list, bulk_link)
+ ttm_resource_cursor_clear_bulk(cursor);
+}
+
/**
* ttm_resource_cursor_fini_locked() - Finalize the LRU list cursor usage
* @cursor: The struct ttm_resource_cursor to finalize.
@@ -44,6 +87,7 @@ void ttm_resource_cursor_fini_locked(struct
ttm_resource_cursor *cursor)
{
lockdep_assert_held(&cursor->man->bdev->lru_lock);
list_del_init(&cursor->hitch.link);
+ ttm_resource_cursor_clear_bulk(cursor);
}
/**
@@ -72,9 +116,27 @@ void ttm_resource_cursor_fini(struct ttm_resource_cursor
*cursor)
void ttm_lru_bulk_move_init(struct ttm_lru_bulk_move *bulk)
{
memset(bulk, 0, sizeof(*bulk));
+ INIT_LIST_HEAD(&bulk->cursor_list);
}
EXPORT_SYMBOL(ttm_lru_bulk_move_init);
+/**
+ * ttm_lru_bulk_move_fini - finalize a bulk move structure
+ * @bdev: The struct ttm_device
+ * @bulk: the structure to finalize
+ *
+ * Sanity checks that bulk moves don't have any
+ * resources left and hence no cursors attached.
+ */
+void ttm_lru_bulk_move_fini(struct ttm_device *bdev,
+ struct ttm_lru_bulk_move *bulk)
+{
+ spin_lock(&bdev->lru_lock);
+ ttm_bulk_move_drop_cursors(bulk);
+
[PATCH v4 2/4] drm/ttm: Use LRU hitches
Have iterators insert themselves into the list they are iterating
over using hitch list nodes. Since only the iterator owner
can remove these list nodes from the list, it's safe to unlock
the list and when continuing, use them as a starting point. Due to
the way LRU bumping works in TTM, newly added items will not be
missed, and bumped items will be iterated over a second time before
reaching the end of the list.
The exception is list with bulk move sublists. When bumping a
sublist, a hitch that is part of that sublist will also be moved
and we might miss items if restarting from it. This will be
addressed in a later patch.
v2:
- Updated ttm_resource_cursor_fini() documentation.
Cc: Christian König
Cc: Somalapuram Amaranath
Cc:
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/ttm/ttm_bo.c | 1 +
drivers/gpu/drm/ttm/ttm_device.c | 9 ++-
drivers/gpu/drm/ttm/ttm_resource.c | 94 --
include/drm/ttm/ttm_resource.h | 16 +++--
4 files changed, 82 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index e059b1e1b13b..b6f75a0ff2e5 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -622,6 +622,7 @@ int ttm_mem_evict_first(struct ttm_device *bdev,
if (locked)
dma_resv_unlock(res->bo->base.resv);
}
+ ttm_resource_cursor_fini_locked(&cursor);
if (!bo) {
if (busy_bo && !ttm_bo_get_unless_zero(busy_bo))
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index f27406e851e5..e8a6a1dab669 100644
--- a/drivers/gpu/drm/ttm/ttm_device.c
+++ b/drivers/gpu/drm/ttm/ttm_device.c
@@ -169,12 +169,17 @@ int ttm_device_swapout(struct ttm_device *bdev, struct
ttm_operation_ctx *ctx,
num_pages = PFN_UP(bo->base.size);
ret = ttm_bo_swapout(bo, ctx, gfp_flags);
/* ttm_bo_swapout has dropped the lru_lock */
- if (!ret)
+ if (!ret) {
+ ttm_resource_cursor_fini(&cursor);
return num_pages;
- if (ret != -EBUSY)
+ }
+ if (ret != -EBUSY) {
+ ttm_resource_cursor_fini(&cursor);
return ret;
+ }
}
}
+ ttm_resource_cursor_fini_locked(&cursor);
spin_unlock(&bdev->lru_lock);
return 0;
}
diff --git a/drivers/gpu/drm/ttm/ttm_resource.c
b/drivers/gpu/drm/ttm/ttm_resource.c
index ee1865f82cb4..971014fca10a 100644
--- a/drivers/gpu/drm/ttm/ttm_resource.c
+++ b/drivers/gpu/drm/ttm/ttm_resource.c
@@ -32,6 +32,37 @@
#include
+/**
+ * ttm_resource_cursor_fini_locked() - Finalize the LRU list cursor usage
+ * @cursor: The struct ttm_resource_cursor to finalize.
+ *
+ * The function pulls the LRU list cursor off any lists it was previusly
+ * attached to. Needs to be called with the LRU lock held. The function
+ * can be called multiple times after eachother.
+ */
+void ttm_resource_cursor_fini_locked(struct ttm_resource_cursor *cursor)
+{
+ lockdep_assert_held(&cursor->man->bdev->lru_lock);
+ list_del_init(&cursor->hitch.link);
+}
+
+/**
+ * ttm_resource_cursor_fini() - Finalize the LRU list cursor usage
+ * @cursor: The struct ttm_resource_cursor to finalize.
+ *
+ * The function pulls the LRU list cursor off any lists it was previusly
+ * attached to. Needs to be called without the LRU list lock held. The
+ * function can be called multiple times after eachother.
+ */
+void ttm_resource_cursor_fini(struct ttm_resource_cursor *cursor)
+{
+ spinlock_t *lru_lock = &cursor->man->bdev->lru_lock;
+
+ spin_lock(lru_lock);
+ ttm_resource_cursor_fini_locked(cursor);
+ spin_unlock(lru_lock);
+}
+
/**
* ttm_lru_bulk_move_init - initialize a bulk move structure
* @bulk: the structure to init
@@ -483,62 +514,63 @@ void ttm_resource_manager_debug(struct
ttm_resource_manager *man,
EXPORT_SYMBOL(ttm_resource_manager_debug);
/**
- * ttm_resource_manager_first
- *
- * @man: resource manager to iterate over
+ * ttm_resource_manager_next() - Continue iterating over the resource manager
+ * resources
* @cursor: cursor to record the position
*
- * Returns the first resource from the resource manager.
+ * Return: The next resource from the resource manager.
*/
struct ttm_resource *
-ttm_resource_manager_first(struct ttm_resource_manager *man,
- struct ttm_resource_cursor *cursor)
+ttm_resource_manager_next(struct ttm_resource_cursor *cursor)
{
+ struct ttm_resource_manager *man = cursor->man;
struct ttm_lru_item *lru;
lockdep_assert_held(&man->bdev->lru_lock);
- for (cursor->priority = 0; cursor->priority < TTM_MAX_BO_PRIORITY;
-++cursor->prio
[PATCH v4 0/4] TTM unlockable restartable LRU list iteration
This patch-set is a prerequisite for a standalone TTM shrinker and for exhaustive TTM eviction using sleeping dma_resv locks, which is the motivation for it. Currently when unlocking the TTM lru list lock, iteration needs to be restarted from the beginning, rather from the next LRU list node. This can potentially be a big problem, because if eviction or shrinking fails for whatever reason after unlock, restarting is likely to cause the same failure over and over again. There are various schemes to be able to continue the list iteration from where we left off. One such scheme used by the GEM LRU list traversal is to pull items already considered off the LRU list and reinsert them when iteration is done. This has the drawback that concurrent list iteration doesn't see the complete list (which is bad for exhaustive eviction) and also doesn't lend itself well to bulk-move sublists since these will be split in the process where items from those lists are temporarily pulled from the list and moved to the list tail. The approach taken here is that list iterators insert themselves into the list next position using a special list node. Iteration is then using that list node as starting point when restarting. Concurrent iterators just skip over the special list nodes. This is implemented in patch 1 and 2. For bulk move sublist the approach is the same, but when a bulk move sublist is moved to the tail, the iterator is also moved, causing us to skip parts of the list. That is undesirable. Patch 3 deals with that, and when iterator detects it is traversing a sublist, it registers with the ttm_lru_bulk_move struct using a linked list, and when that bulk move sublist is moved to the tail, any iterator registered with it will first be moved to the tail of the sublist. This is implemented in patch 3. The restartable property is used in patch 4 to restart swapout if needed, but the main purpose is this paves the way for shrinker- and exhaustive eviction. v2: - Rework patch 3 completely. v3: - Fix a NULL pointer dereference found by Xe CI. v4: - Remove some leftover code causing build problems. Cc: Somalapuram Amaranath Cc: Christian König Cc: Thomas Hellström (4): drm/ttm: Allow TTM LRU list nodes of different types drm/ttm: Use LRU hitches drm/ttm, drm/amdgpu, drm/xe: Consider hitch moves within bulk sublist moves drm/ttm: Allow continued swapout after -ENOSPC falure drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 + drivers/gpu/drm/ttm/ttm_bo.c | 1 + drivers/gpu/drm/ttm/ttm_device.c | 33 +++- drivers/gpu/drm/ttm/ttm_resource.c | 228 - drivers/gpu/drm/xe/xe_vm.c | 4 + include/drm/ttm/ttm_device.h | 2 + include/drm/ttm/ttm_resource.h | 96 +-- 7 files changed, 308 insertions(+), 60 deletions(-) -- 2.44.0
✓ Fi.CI.BAT: success for drm/i915/guc: Use context hints for GT frequency (rev2)
== Series Details == Series: drm/i915/guc: Use context hints for GT frequency (rev2) URL : https://patchwork.freedesktop.org/series/130698/ State : success == Summary == CI Bug Log - changes from CI_DRM_14395 -> Patchwork_130698v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130698v2/index.html Participating hosts (41 -> 38) -- Missing(3): bat-mtlp-8 fi-glk-j4005 fi-snb-2520m Known issues Here are the changes found in Patchwork_130698v2 that come from known issues: ### CI changes ### Issues hit * boot: - bat-arls-3: [PASS][1] -> [FAIL][2] ([i915#10234]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-arls-3/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130698v2/bat-arls-3/boot.html ### IGT changes ### Issues hit * igt@i915_selftest@live@execlists: - fi-bsw-n3050: [PASS][3] -> [ABORT][4] ([i915#9662]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/fi-bsw-n3050/igt@i915_selftest@l...@execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130698v2/fi-bsw-n3050/igt@i915_selftest@l...@execlists.html * igt@i915_selftest@live@hangcheck: - bat-atsm-1: [PASS][5] -> [ABORT][6] ([i915#10366]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-atsm-1/igt@i915_selftest@l...@hangcheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130698v2/bat-atsm-1/igt@i915_selftest@l...@hangcheck.html Possible fixes * igt@i915_selftest@live@migrate: - bat-arls-2: [INCOMPLETE][7] -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-arls-2/igt@i915_selftest@l...@migrate.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130698v2/bat-arls-2/igt@i915_selftest@l...@migrate.html [i915#10234]: https://gitlab.freedesktop.org/drm/intel/issues/10234 [i915#10366]: https://gitlab.freedesktop.org/drm/intel/issues/10366 [i915#9662]: https://gitlab.freedesktop.org/drm/intel/issues/9662 Build changes - * Linux: CI_DRM_14395 -> Patchwork_130698v2 CI-20190529: 20190529 CI_DRM_14395: dd08fd912fdc1b72984a39852fdbee49b97b8ce4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7746: 7746 Patchwork_130698v2: dd08fd912fdc1b72984a39852fdbee49b97b8ce4 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 830deae54cb3 drm/i915/guc: Use context hints for GT frequency == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130698v2/index.html
✗ Fi.CI.SPARSE: warning for drm/i915/guc: Use context hints for GT frequency (rev2)
== Series Details == Series: drm/i915/guc: Use context hints for GT frequency (rev2) URL : https://patchwork.freedesktop.org/series/130698/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[bug report] drm/i915/dp: Add support for DP tunnel BW allocation
Hello Imre Deak,
The patch 91888b5b1ad2: "drm/i915/dp: Add support for DP tunnel BW
allocation" from Feb 26, 2024 (linux-next), leads to the following
Smatch static checker warning:
drivers/gpu/drm/i915/display/intel_dp_tunnel.c:793
intel_dp_tunnel_mgr_init()
warn: 'tunnel_mgr' is not an error pointer
drivers/gpu/drm/i915/display/intel_dp_tunnel.c
776 int intel_dp_tunnel_mgr_init(struct drm_i915_private *i915)
777 {
778 struct drm_dp_tunnel_mgr *tunnel_mgr;
779 struct drm_connector_list_iter connector_list_iter;
780 struct intel_connector *connector;
781 int dp_connectors = 0;
782
783 drm_connector_list_iter_begin(&i915->drm, &connector_list_iter);
784 for_each_intel_connector_iter(connector, &connector_list_iter) {
785 if (connector->base.connector_type !=
DRM_MODE_CONNECTOR_DisplayPort)
786 continue;
787
788 dp_connectors++;
789 }
790 drm_connector_list_iter_end(&connector_list_iter);
791
792 tunnel_mgr = drm_dp_tunnel_mgr_create(&i915->drm,
dp_connectors);
--> 793 if (IS_ERR(tunnel_mgr))
The real implementation of drm_dp_tunnel_mgr_create() returns NULL but
the stub implementation returns ERR_PTR(-EOPNOTSUPP).
794 return PTR_ERR(tunnel_mgr);
795
796 i915->display.dp_tunnel_mgr = tunnel_mgr;
797
798 return 0;
799 }
regards,
dan carpenter
✗ Fi.CI.BAT: failure for Disable automatic load CCS load balancing (rev5)
== Series Details ==
Series: Disable automatic load CCS load balancing (rev5)
URL : https://patchwork.freedesktop.org/series/129951/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14395 -> Patchwork_129951v5
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_129951v5 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_129951v5, please notify your bug team
(i915-ci-in...@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/index.html
Participating hosts (41 -> 36)
--
Missing(5): bat-dg1-7 bat-arls-2 fi-snb-2520m fi-glk-j4005 bat-mtlp-8
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_129951v5:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@hangcheck:
- bat-atsm-1: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-atsm-1/igt@i915_selftest@l...@hangcheck.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/bat-atsm-1/igt@i915_selftest@l...@hangcheck.html
- bat-dg2-9: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-dg2-9/igt@i915_selftest@l...@hangcheck.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/bat-dg2-9/igt@i915_selftest@l...@hangcheck.html
- bat-dg2-8: [PASS][5] -> [DMESG-FAIL][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-dg2-8/igt@i915_selftest@l...@hangcheck.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/bat-dg2-8/igt@i915_selftest@l...@hangcheck.html
- bat-dg2-14: [PASS][7] -> [DMESG-FAIL][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-dg2-14/igt@i915_selftest@l...@hangcheck.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/bat-dg2-14/igt@i915_selftest@l...@hangcheck.html
Known issues
Here are the changes found in Patchwork_129951v5 that come from known issues:
### CI changes ###
Issues hit
* boot:
- fi-cfl-8109u: [PASS][9] -> [FAIL][10] ([i915#8293])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/fi-cfl-8109u/boot.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/fi-cfl-8109u/boot.html
### IGT changes ###
Issues hit
* igt@i915_selftest@live@client:
- bat-dg2-11: [PASS][11] -> [ABORT][12] ([i915#10366])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-dg2-11/igt@i915_selftest@l...@client.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/bat-dg2-11/igt@i915_selftest@l...@client.html
* igt@i915_selftest@live@hangcheck:
- fi-skl-guc: [PASS][13] -> [DMESG-FAIL][14] ([i915#10112])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/fi-skl-guc/igt@i915_selftest@l...@hangcheck.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/fi-skl-guc/igt@i915_selftest@l...@hangcheck.html
Possible fixes
* igt@i915_selftest@live@guc_hang:
- bat-arls-3: [DMESG-FAIL][15] ([i915#10262]) -> [PASS][16] +12
other tests pass
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-arls-3/igt@i915_selftest@live@guc_hang.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/bat-arls-3/igt@i915_selftest@live@guc_hang.html
* igt@i915_selftest@live@hangcheck:
- {bat-rpls-3}: [DMESG-WARN][17] ([i915#5591]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v5/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10112]: https://gitlab.freedesktop.org/drm/intel/issues/10112
[i915#10262]: https://gitlab.freedesktop.org/drm/intel/issues/10262
[i915#10366]: https://gitlab.freedesktop.org/drm/intel/issues/10366
[i915#10373]: https://gitlab.freedesktop.org/drm/intel/issues/10373
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
Build changes
-
* Linux: CI_DRM_14395 -> Patchwork_129951v5
CI-20190529: 20190529
CI_DRM_14395: dd08fd912fdc1b72984a39852fdbee49b97b8ce4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7746: 7746
Patchwork_129951v5: dd08fd912fdc1b72984a39852fdbee49b97b8ce4 @
git://anongi
✗ Fi.CI.CHECKPATCH: warning for Disable automatic load CCS load balancing (rev5)
== Series Details ==
Series: Disable automatic load CCS load balancing (rev5)
URL : https://patchwork.freedesktop.org/series/129951/
State : warning
== Summary ==
Error: dim checkpatch failed
5b93f1cd8989 drm/i915/gt: Disable HW load balancing for CCS
380b317702a8 drm/i915/gt: Refactor uabi engine class/instance list creation
-:55: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely
unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of
BUG() or variants
#55: FILE: drivers/gpu/drm/i915/gt/intel_engine_user.c:233:
+ GEM_BUG_ON(uabi_class >= ARRAY_SIZE(class_instance));
-:71: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely
unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of
BUG() or variants
#71: FILE: drivers/gpu/drm/i915/gt/intel_engine_user.c:247:
+ GEM_BUG_ON(uabi_class >=
total: 0 errors, 2 warnings, 0 checks, 56 lines checked
4cdfe2cf85b2 drm/i915/gt: Enable only one CCS for compute workload
-:16: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line
(possible unwrapped commit description?)
#16:
Requires: 97aba5e46038 ("drm/i915/gt: Refactor uabi engine class/instance list
creation")
-:104: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'cslice' may be better as
'(cslice)' to avoid precedence issues
#104: FILE: drivers/gpu/drm/i915/gt/intel_gt_regs.h:1486:
+#define XEHP_CCS_MODE_CSLICE(cslice, ccs)(ccs << (cslice *
XEHP_CCS_MODE_CSLICE_WIDTH))
-:104: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'ccs' may be better as
'(ccs)' to avoid precedence issues
#104: FILE: drivers/gpu/drm/i915/gt/intel_gt_regs.h:1486:
+#define XEHP_CCS_MODE_CSLICE(cslice, ccs)(ccs << (cslice *
XEHP_CCS_MODE_CSLICE_WIDTH))
total: 0 errors, 1 warnings, 2 checks, 69 lines checked
[PATCH 2/3] drm/i915/dsb: Fix DSB vblank waits when using VRR
From: Ville Syrjälä
Looks like the undelayed vblank gets signalled exactly when
the active period ends. That is a problem for DSB+VRR when
we are already in vblank and expect DSB to start executing
as soon as we send the push. Instead of starting the DSB
just keeps on waiting for the undelayed vblank which won't
signal until the end of the next frame's active period,
which is far too late.
The end result is that DSB won't have even started
executing by the time the flips/etc. have completed.
We then wait for an extra 1ms, after which we terminate
the DSB and report a timeout:
[drm] *ERROR* [CRTC:80:pipe A] DSB 0 timed out waiting for idle (current
head=0xfedf4000, head=0x0, tail=0x1080)
To fix this let's configure DSB to use the so called VRR
"safe window" instead of the undelayed vblank to trigger
the DSB vblank logic, when VRR is enabled.
Cc: sta...@vger.kernel.org
Fixes: 34d8311f4a1c ("drm/i915/dsb: Re-instate DSB for LUT updates")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9927
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
b/drivers/gpu/drm/i915/display/intel_dsb.c
index d62e050185e7..e4515bf92038 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -340,6 +340,17 @@ static int intel_dsb_dewake_scanline(const struct
intel_crtc_state *crtc_state)
return max(0, vblank_start - intel_usecs_to_scanlines(adjusted_mode,
latency));
}
+static u32 dsb_chicken(struct intel_crtc *crtc)
+{
+ if (crtc->mode_flags & I915_MODE_FLAG_VRR)
+ return DSB_CTRL_WAIT_SAFE_WINDOW |
+ DSB_CTRL_NO_WAIT_VBLANK |
+ DSB_INST_WAIT_SAFE_WINDOW |
+ DSB_INST_NO_WAIT_VBLANK;
+ else
+ return 0;
+}
+
static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
int dewake_scanline)
{
@@ -361,6 +372,9 @@ static void _intel_dsb_commit(struct intel_dsb *dsb, u32
ctrl,
intel_de_write_fw(dev_priv, DSB_CTRL(pipe, dsb->id),
ctrl | DSB_ENABLE);
+ intel_de_write_fw(dev_priv, DSB_CHICKEN(pipe, dsb->id),
+ dsb_chicken(crtc));
+
intel_de_write_fw(dev_priv, DSB_HEAD(pipe, dsb->id),
intel_dsb_buffer_ggtt_offset(&dsb->dsb_buf));
--
2.43.0
[PATCH 3/3] drm/i915/dsb: Always set DSB_SKIP_WAITS_EN
From: Ville Syrjälä
Bspec asks us to always set the DSB_SKIP_WAITS_EN bit in
DSB_CHICKEN. This seems to instruct DSB to skip vblank and
scanline waits when PSR is entered.
I don't think we have any cases currently where we would want
to enter PSR while DSB is waiting for something, but let's
set the bit anyway to align with Bspec's wishes.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
b/drivers/gpu/drm/i915/display/intel_dsb.c
index e4515bf92038..4baaa92ceaec 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -343,12 +343,13 @@ static int intel_dsb_dewake_scanline(const struct
intel_crtc_state *crtc_state)
static u32 dsb_chicken(struct intel_crtc *crtc)
{
if (crtc->mode_flags & I915_MODE_FLAG_VRR)
- return DSB_CTRL_WAIT_SAFE_WINDOW |
+ return DSB_SKIP_WAITS_EN |
+ DSB_CTRL_WAIT_SAFE_WINDOW |
DSB_CTRL_NO_WAIT_VBLANK |
DSB_INST_WAIT_SAFE_WINDOW |
DSB_INST_NO_WAIT_VBLANK;
else
- return 0;
+ return DSB_SKIP_WAITS_EN;
}
static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
--
2.43.0
[PATCH 1/3] drm/i915/vrr: Generate VRR "safe window" for DSB
From: Ville Syrjälä
Looks like TRANS_CHICKEN bit 31 means something totally different
depending on the platform:
TGL: generate VRR "safe window" for DSB
ADL/DG2: make TRANS_SET_CONTEXT_LATENCY effective with VRR
So far we've only set this on ADL/DG2, but when using DSB+VRR
we also need to set it on TGL.
And a quick test on MTL says it doesn't need this bit for either
of those purposes, even though it's still documented as valid
in bspec.
Cc: sta...@vger.kernel.org
Fixes: 34d8311f4a1c ("drm/i915/dsb: Re-instate DSB for LUT updates")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9927
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_vrr.c | 7 ---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 5d905f932cb4..eb5bd0743902 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -187,10 +187,11 @@ void intel_vrr_set_transcoder_timings(const struct
intel_crtc_state *crtc_state)
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
/*
-* TRANS_SET_CONTEXT_LATENCY with VRR enabled
-* requires this chicken bit on ADL/DG2.
+* This bit seems to have two meanings depending on the platform:
+* TGL: generate VRR "safe window" for DSB vblank waits
+* ADL/DG2: make TRANS_SET_CONTEXT_LATENCY effective with VRR
*/
- if (DISPLAY_VER(dev_priv) == 13)
+ if (IS_DISPLAY_VER(dev_priv, 12, 13))
intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder),
0, PIPE_VBLANK_WITH_DELAY);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e00557e1a57f..3b2e49ce29ba 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4599,7 +4599,7 @@
#define MTL_CHICKEN_TRANS(trans) _MMIO_TRANS((trans), \
_MTL_CHICKEN_TRANS_A, \
_MTL_CHICKEN_TRANS_B)
-#define PIPE_VBLANK_WITH_DELAY REG_BIT(31) /* ADL/DG2 */
+#define PIPE_VBLANK_WITH_DELAY REG_BIT(31) /* tgl+ */
#define SKL_UNMASK_VBL_TO_PIPE_IN_SRDREG_BIT(30) /* skl+ */
#define HSW_FRAME_START_DELAY_MASK REG_GENMASK(28, 27)
#define HSW_FRAME_START_DELAY(x)
REG_FIELD_PREP(HSW_FRAME_START_DELAY_MASK, x)
--
2.43.0
[PATCH 0/3] drm/i915: Fix DSB vblank waits with VRR
From: Ville Syrjälä Make DSB vblank waits work correctly when VRR is enabled. Ville Syrjälä (3): drm/i915/vrr: Generate VRR "safe window" for DSB drm/i915/dsb: Fix DSB vblank waits when using VRR drm/i915/dsb: Always set DSB_SKIP_WAITS_EN drivers/gpu/drm/i915/display/intel_dsb.c | 15 +++ drivers/gpu/drm/i915/display/intel_vrr.c | 7 --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 3 files changed, 20 insertions(+), 4 deletions(-) -- 2.43.0
✗ Fi.CI.BAT: failure for Enable Wa_14019159160 and Wa_16019325821 for MTL (rev4)
== Series Details ==
Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev4)
URL : https://patchwork.freedesktop.org/series/130335/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14395 -> Patchwork_130335v4
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_130335v4 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_130335v4, please notify your bug team
(i915-ci-in...@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/index.html
Participating hosts (41 -> 37)
--
Missing(4): bat-mtlp-8 bat-dg1-7 fi-glk-j4005 fi-snb-2520m
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_130335v4:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@memory_region:
- bat-arls-2: NOTRUN -> [DMESG-WARN][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/bat-arls-2/igt@i915_selftest@live@memory_region.html
Known issues
Here are the changes found in Patchwork_130335v4 that come from known issues:
### CI changes ###
Issues hit
* boot:
- fi-bsw-n3050: [PASS][2] -> [FAIL][3] ([i915#8293])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/fi-bsw-n3050/boot.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/fi-bsw-n3050/boot.html
- fi-apl-guc: [PASS][4] -> [FAIL][5] ([i915#8293])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/fi-apl-guc/boot.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/fi-apl-guc/boot.html
- fi-cfl-8109u: [PASS][6] -> [FAIL][7] ([i915#8293])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/fi-cfl-8109u/boot.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/fi-cfl-8109u/boot.html
### IGT changes ###
Issues hit
* igt@i915_selftest@live@ring_submission:
- bat-arls-2: NOTRUN -> [DMESG-FAIL][8] ([i915#10262]) +8 other
tests dmesg-fail
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/bat-arls-2/igt@i915_selftest@live@ring_submission.html
Possible fixes
* igt@i915_selftest@live@guc_hang:
- bat-arls-3: [DMESG-FAIL][9] ([i915#10262]) -> [PASS][10] +12
other tests pass
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-arls-3/igt@i915_selftest@live@guc_hang.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/bat-arls-3/igt@i915_selftest@live@guc_hang.html
* igt@i915_selftest@live@hangcheck:
- {bat-adls-6}: [DMESG-WARN][11] ([i915#5591]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-adls-6/igt@i915_selftest@l...@hangcheck.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/bat-adls-6/igt@i915_selftest@l...@hangcheck.html
* igt@i915_selftest@live@migrate:
- bat-arls-2: [INCOMPLETE][13] -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14395/bat-arls-2/igt@i915_selftest@l...@migrate.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/bat-arls-2/igt@i915_selftest@l...@migrate.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10262]: https://gitlab.freedesktop.org/drm/intel/issues/10262
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
Build changes
-
* Linux: CI_DRM_14395 -> Patchwork_130335v4
CI-20190529: 20190529
CI_DRM_14395: dd08fd912fdc1b72984a39852fdbee49b97b8ce4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7746: 7746
Patchwork_130335v4: dd08fd912fdc1b72984a39852fdbee49b97b8ce4 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
84d0a62517b3 drm/i915/guc: Enable Wa_14019159160
aff8e19b8f54 drm/i915/guc: Add support for w/a KLVs
0de9177394cd drm/i915: Enable Wa_16019325821
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130335v4/index.html
Re: [PATCH v3 3/5] drm/i915/psr: Calculate IO wake and fast wake lines for DISPLAY_VER < 12
Hi Jouni,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip next-20240305]
[cannot apply to drm-intel/for-linux-next-fixes linus/master v6.8-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Jouni-H-gander/drm-i915-display-Make-intel_dp_aux_fw_sync_len-available-for-PSR-code/20240305-200753
base: git://anongit.freedesktop.org/drm-intel for-linux-next
patch link:
https://lore.kernel.org/r/20240305120458.1275218-4-jouni.hogander%40intel.com
patch subject: [PATCH v3 3/5] drm/i915/psr: Calculate IO wake and fast wake
lines for DISPLAY_VER < 12
config: s390-allmodconfig
(https://download.01.org/0day-ci/archive/20240306/202403061144.nxw1e72o-...@intel.com/config)
compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project
325f51237252e6dab8e4e1ea1fa7acbb4faee1cd)
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20240306/202403061144.nxw1e72o-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202403061144.nxw1e72o-...@intel.com/
All warnings (new ones prefixed by >>):
In file included from include/linux/elf.h:6:
In file included from arch/s390/include/asm/elf.h:173:
In file included from arch/s390/include/asm/mmu_context.h:11:
In file included from arch/s390/include/asm/pgalloc.h:18:
In file included from include/linux/mm.h:2188:
include/linux/vmstat.h:508:43: warning: arithmetic between different
enumeration types ('enum zone_stat_item' and 'enum numa_stat_item')
[-Wenum-enum-conversion]
508 | return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
|~ ^
509 |item];
|
include/linux/vmstat.h:515:43: warning: arithmetic between different
enumeration types ('enum zone_stat_item' and 'enum numa_stat_item')
[-Wenum-enum-conversion]
515 | return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
|~ ^
516 |NR_VM_NUMA_EVENT_ITEMS +
|~~
include/linux/vmstat.h:522:36: warning: arithmetic between different
enumeration types ('enum node_stat_item' and 'enum lru_list')
[-Wenum-enum-conversion]
522 | return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
| ~~~ ^ ~~~
include/linux/vmstat.h:527:43: warning: arithmetic between different
enumeration types ('enum zone_stat_item' and 'enum numa_stat_item')
[-Wenum-enum-conversion]
527 | return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
|~ ^
528 |NR_VM_NUMA_EVENT_ITEMS +
|~~
include/linux/vmstat.h:536:43: warning: arithmetic between different
enumeration types ('enum zone_stat_item' and 'enum numa_stat_item')
[-Wenum-enum-conversion]
536 | return vmstat_text[NR_VM_ZONE_STAT_ITEMS +
|~ ^
537 |NR_VM_NUMA_EVENT_ITEMS +
|~~
In file included from drivers/gpu/drm/i915/display/intel_psr.c:28:
In file included from drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h:15:
In file included from
drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h:11:
In file included from drivers/gpu/drm/xe/xe_bo.h:11:
In file included from drivers/gpu/drm/xe/xe_bo_types.h:9:
In file included from include/linux/iosys-map.h:10:
In file included from include/linux/io.h:13:
In file included from arch/s390/include/asm/io.h:78:
include/asm-generic/io.h:547:31: warning: performing pointer arithmetic on a
null pointer has undefined behavior [-Wnull-pointer-arithmetic]
547 | val = __raw_readb(PCI_IOBASE + addr);
| ~~ ^
include/asm-generic/io.h:560:61: warning: performing pointer arithmetic on a
null pointer has undefined behavior [-Wnull-pointer-arithmetic]
560 | val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE +
addr));
| ~~ ^
include/uapi/linux/byteorder/big_
✗ Fi.CI.SPARSE: warning for Enable Wa_14019159160 and Wa_16019325821 for MTL (rev4)
== Series Details == Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev4) URL : https://patchwork.freedesktop.org/series/130335/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for Enable Wa_14019159160 and Wa_16019325821 for MTL (rev4)
== Series Details == Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev4) URL : https://patchwork.freedesktop.org/series/130335/ State : warning == Summary == Error: dim checkpatch failed cae3f3729701 drm/i915: Enable Wa_16019325821 2048664461bf drm/i915/guc: Add support for w/a KLVs -:105: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #105: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:829: + GEM_BUG_ON(iosys_map_is_null(&guc->ads_map)); total: 0 errors, 1 warnings, 0 checks, 159 lines checked 38e0cc5f7eed drm/i915/guc: Enable Wa_14019159160 -:101: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #101: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:830: + GEM_BUG_ON(remain < size); total: 0 errors, 1 warnings, 0 checks, 99 lines checked
✗ Fi.CI.BUILD: failure for Regression on linux-next (next-20240228)
== Series Details == Series: Regression on linux-next (next-20240228) URL : https://patchwork.freedesktop.org/series/130763/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/130763/revisions/1/mbox/ not applied Applying: Regression on linux-next (next-20240228) error: sha1 information is lacking or useless (mm/swap.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 Regression on linux-next (next-20240228) When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". Build failed, no error log produced
✗ Fi.CI.BUILD: failure for TTM unlockable restartable LRU list iteration (rev3)
== Series Details == Series: TTM unlockable restartable LRU list iteration (rev3) URL : https://patchwork.freedesktop.org/series/130001/ State : failure == Summary == Error: make failed CALLscripts/checksyscalls.sh DESCEND objtool INSTALL libsubcmd_headers CC [M] drivers/gpu/drm/i915/i915_driver.o In file included from ./include/drm/ttm/ttm_bo.h:39, from ./drivers/gpu/drm/i915/gem/i915_gem_object_types.h:13, from ./drivers/gpu/drm/i915/gem/i915_gem_object.h:15, from ./drivers/gpu/drm/i915/i915_vma.h:34, from drivers/gpu/drm/i915/display/intel_display_types.h:50, from drivers/gpu/drm/i915/i915_driver.c:52: ./include/drm/ttm/ttm_device.h: In function ‘ttm_set_driver_manager’: ./include/drm/ttm/ttm_device.h:286:31: error: variable ‘old’ set but not used [-Werror=unused-but-set-variable] 286 | struct ttm_resource_manager *old; | ^~~ cc1: all warnings being treated as errors make[6]: *** [scripts/Makefile.build:243: drivers/gpu/drm/i915/i915_driver.o] Error 1 make[5]: *** [scripts/Makefile.build:481: drivers/gpu/drm/i915] Error 2 make[4]: *** [scripts/Makefile.build:481: drivers/gpu/drm] Error 2 make[3]: *** [scripts/Makefile.build:481: drivers/gpu] Error 2 make[2]: *** [scripts/Makefile.build:481: drivers] Error 2 make[1]: *** [/home/kbuild2/kernel/Makefile:1921: .] Error 2 make: *** [Makefile:240: __sub-make] Error 2 Build failed, no error log produced
[PATCH] drm/i915/display: Fixed a screen flickering when turning on display from off
From: Gareth Yu
Turn on the panel from zero brightness of the last state, the panel was set
a maximum PWM in the flow. Once the panel initialization is completed, the
backlight is restored to zero brightness. There is a flckering generated.
Set the brightness to the minimum value when the brightness is less or equal
to the minimum value to fix this flickering
Cc : Tejas Upadhyay
Cc : Matt Roper
Cc : Ville Syrjälä
Signed-off-by: Gareth Yu
---
drivers/gpu/drm/i915/display/intel_backlight.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 3f3cd944a1c5..855d6ead905c 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -762,7 +762,7 @@ static void __intel_backlight_enable(const struct
intel_crtc_state *crtc_state,
WARN_ON(panel->backlight.max == 0);
if (panel->backlight.level <= panel->backlight.min) {
- panel->backlight.level = panel->backlight.max;
+ panel->backlight.level = panel->backlight.min;
if (panel->backlight.device)
panel->backlight.device->props.brightness =
scale_hw_to_user(connector,
--
2.25.1
[PATCH 1/4] drm/i915/hdcp: Move intel_hdcp_gsc_message def away from header file
Move intel_hdcp_gsc_message definition into intel_hdcp_gsc.c
so that intel_hdcp_gsc_message can be redefined for xe as needed.
--v2
-Correct commit message to reflect what patch is actually doing [Arun]
Signed-off-by: Suraj Kandpal
Reviewed-by: Arun R Murthy
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 6 ++
drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 7 +--
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
index 302bff75b06c..35823e1f65d6 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
@@ -13,6 +13,12 @@
#include "intel_hdcp_gsc.h"
#include "intel_hdcp_gsc_message.h"
+struct intel_hdcp_gsc_message {
+ struct i915_vma *vma;
+ void *hdcp_cmd_in;
+ void *hdcp_cmd_out;
+};
+
bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915)
{
return DISPLAY_VER(i915) >= 14;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
index eba2057c5a9e..5f610df61cc9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
@@ -10,12 +10,7 @@
#include
struct drm_i915_private;
-
-struct intel_hdcp_gsc_message {
- struct i915_vma *vma;
- void *hdcp_cmd_in;
- void *hdcp_cmd_out;
-};
+struct intel_hdcp_gsc_message;
bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915);
ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
--
2.43.2
[PATCH 2/4] drm/xe/hdcp: Use xe_device struct
Use xe_device struct instead of drm_i915_private so as to not
cause confusion and comply with Xe standards as drm_i915_private is
xe_device under the hood.
--v2
-Fix commit message [Daniele]
Signed-off-by: Suraj Kandpal
Reviewed-by: Arun R Murthy
---
drivers/gpu/drm/xe/display/xe_hdcp_gsc.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
index 0f11a39333e2..5d1d0054b578 100644
--- a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
+++ b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
@@ -3,30 +3,31 @@
* Copyright 2023, Intel Corporation.
*/
-#include "i915_drv.h"
+#include
#include "intel_hdcp_gsc.h"
+#include "xe_device_types.h"
-bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915)
+bool intel_hdcp_gsc_cs_required(struct xe_device *xe)
{
return true;
}
-bool intel_hdcp_gsc_check_status(struct drm_i915_private *i915)
+bool intel_hdcp_gsc_check_status(struct xe_device *xe)
{
return false;
}
-int intel_hdcp_gsc_init(struct drm_i915_private *i915)
+int intel_hdcp_gsc_init(struct xe_device *xe)
{
- drm_info(&i915->drm, "HDCP support not yet implemented\n");
+ drm_dbg_kms(&xe->drm, "HDCP support not yet implemented\n");
return -ENODEV;
}
-void intel_hdcp_gsc_fini(struct drm_i915_private *i915)
+void intel_hdcp_gsc_fini(struct xe_device *xe)
{
}
-ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
+ssize_t intel_hdcp_gsc_msg_send(struct xe_device *xe, u8 *msg_in,
size_t msg_in_len, u8 *msg_out,
size_t msg_out_len)
{
--
2.43.2
[PATCH 4/4] drm/xe/hdcp: Enable HDCP for XE
Enable HDCP for Xe by defining functions which take care of
interaction of HDCP as a client with the GSC CS interface.
Add intel_hdcp_gsc_message to Makefile and add corresponding
changes to xe_hdcp_gsc.c to make it build.
--v2
-add kfree at appropriate place [Daniele]
-remove useless define [Daniele]
-move host session logic to xe_gsc_submit.c [Daniele]
-call xe_gsc_check_and_update_pending directly in an if condition
[Daniele]
-use xe_device instead of drm_i915_private [Daniele]
--v3
-use xe prefix for newly exposed function [Daniele]
-remove client specific defines from intel_gsc_mtl_header [Daniele]
-add missing kfree() [Daniele]
-have NULL check for hdcp_message in finish function [Daniele]
-dont have too many variable declarations in the same line [Daniele]
--v4
-don't point the hdcp_message structure in xe_device to anything
until it properly gets initialized [Daniele]
--v5
-Squash commits for buildability
--v6
-Order includes alphabetically [Lucas]
Signed-off-by: Suraj Kandpal
Reviewed-by: Arun R Murthy
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/display/xe_hdcp_gsc.c | 202 ++-
drivers/gpu/drm/xe/xe_gsc_submit.c | 15 ++
drivers/gpu/drm/xe/xe_gsc_submit.h | 1 +
4 files changed, 214 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index c531210695db..2b654c908ff3 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -254,6 +254,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_global_state.o \
i915-display/intel_gmbus.o \
i915-display/intel_hdcp.o \
+ i915-display/intel_hdcp_gsc_message.o \
i915-display/intel_hdmi.o \
i915-display/intel_hotplug.o \
i915-display/intel_hotplug_irq.o \
diff --git a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
index 3af5a86db3aa..dcde1d0ac1f8 100644
--- a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
+++ b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
@@ -4,15 +4,32 @@
*/
#include
+#include
+#include
+#include "abi/gsc_command_header_abi.h"
#include "intel_hdcp_gsc.h"
-#include "xe_device_types.h"
+#include "intel_hdcp_gsc_message.h"
+#include "xe_bo.h"
#include "xe_device.h"
-#include "xe_gt.h"
+#include "xe_device_types.h"
#include "xe_gsc_proxy.h"
+#include "xe_gsc_submit.h"
+#include "xe_gt.h"
+#include "xe_map.h"
#include "xe_pm.h"
#include "xe_uc_fw.h"
+#define HECI_MEADDRESS_HDCP 18
+
+struct intel_hdcp_gsc_message {
+ struct xe_bo *hdcp_bo;
+ u64 hdcp_cmd_in;
+ u64 hdcp_cmd_out;
+};
+
+#define HDCP_GSC_HEADER_SIZE sizeof(struct intel_gsc_mtl_header)
+
bool intel_hdcp_gsc_cs_required(struct xe_device *xe)
{
return true;
@@ -44,19 +61,194 @@ bool intel_hdcp_gsc_check_status(struct xe_device *xe)
return ret;
}
+/*This function helps allocate memory for the command that we will send to gsc
cs */
+static int intel_hdcp_gsc_initialize_message(struct xe_device *xe,
+struct intel_hdcp_gsc_message
*hdcp_message)
+{
+ struct xe_bo *bo = NULL;
+ u64 cmd_in, cmd_out;
+ int ret = 0;
+
+ /* allocate object of two page for HDCP command memory and store it */
+ xe_device_mem_access_get(xe);
+ bo = xe_bo_create_pin_map(xe, xe_device_get_root_tile(xe), NULL,
PAGE_SIZE * 2,
+ ttm_bo_type_kernel,
+ XE_BO_CREATE_SYSTEM_BIT |
+ XE_BO_CREATE_GGTT_BIT);
+
+ if (IS_ERR(bo)) {
+ drm_err(&xe->drm, "Failed to allocate bo for HDCP streaming
command!\n");
+ ret = PTR_ERR(bo);
+ goto out;
+ }
+
+ cmd_in = xe_bo_ggtt_addr(bo);
+ cmd_out = cmd_in + PAGE_SIZE;
+ xe_map_memset(xe, &bo->vmap, 0, 0, bo->size);
+
+ hdcp_message->hdcp_bo = bo;
+ hdcp_message->hdcp_cmd_in = cmd_in;
+ hdcp_message->hdcp_cmd_out = cmd_out;
+out:
+ xe_device_mem_access_put(xe);
+ return ret;
+}
+
+static int intel_hdcp_gsc_hdcp2_init(struct xe_device *xe)
+{
+ struct intel_hdcp_gsc_message *hdcp_message;
+ int ret;
+
+ hdcp_message = kzalloc(sizeof(*hdcp_message), GFP_KERNEL);
+
+ if (!hdcp_message)
+ return -ENOMEM;
+
+ /*
+* NOTE: No need to lock the comp mutex here as it is already
+* going to be taken before this function called
+*/
+ ret = intel_hdcp_gsc_initialize_message(xe, hdcp_message);
+ if (ret) {
+ drm_err(&xe->drm, "Could not initialize hdcp_message\n");
+ kfree(hdcp_message);
+ return ret;
+ }
+
+ xe->display.hdcp.hdcp_message = hdcp_message;
+ return ret;
+}
+
+static const struct i915_hdcp_ops gsc_hdcp_ops = {
+ .initiate_hdcp2_session = intel_hdcp_gsc_initiate_session,
+ .verify_recei
[PATCH 3/4] drm/xe: Use gsc_proxy_init_done to check proxy status
Expose gsc_proxy_init_done so that we can check if gsc proxy has
been initialized or not.
--v2
-Check if GSC FW is enabled before taking forcewake ref [Daniele]
--v3
-Directly call proxy check function inside if condition
Signed-off-by: Suraj Kandpal
Reviewed-by: Arun R Murthy
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/xe/display/xe_hdcp_gsc.c | 29 +++-
drivers/gpu/drm/xe/xe_gsc_proxy.c| 4 ++--
drivers/gpu/drm/xe/xe_gsc_proxy.h| 1 +
3 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
index 5d1d0054b578..3af5a86db3aa 100644
--- a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
+++ b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
@@ -4,8 +4,14 @@
*/
#include
+
#include "intel_hdcp_gsc.h"
#include "xe_device_types.h"
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_gsc_proxy.h"
+#include "xe_pm.h"
+#include "xe_uc_fw.h"
bool intel_hdcp_gsc_cs_required(struct xe_device *xe)
{
@@ -14,7 +20,28 @@ bool intel_hdcp_gsc_cs_required(struct xe_device *xe)
bool intel_hdcp_gsc_check_status(struct xe_device *xe)
{
- return false;
+ struct xe_tile *tile = xe_device_get_root_tile(xe);
+ struct xe_gt *gt = tile->media_gt;
+ bool ret = true;
+
+ if (!xe_uc_fw_is_enabled(>->uc.gsc.fw))
+ return false;
+
+ xe_pm_runtime_get(xe);
+ if (xe_force_wake_get(gt_to_fw(gt), XE_FW_GSC)) {
+ drm_dbg_kms(&xe->drm,
+ "failed to get forcewake to check proxy status\n");
+ ret = false;
+ goto out;
+ }
+
+ if (!xe_gsc_proxy_init_done(>->uc.gsc))
+ ret = false;
+
+ xe_force_wake_put(gt_to_fw(gt), XE_FW_GSC);
+out:
+ xe_pm_runtime_put(xe);
+ return ret;
}
int intel_hdcp_gsc_init(struct xe_device *xe)
diff --git a/drivers/gpu/drm/xe/xe_gsc_proxy.c
b/drivers/gpu/drm/xe/xe_gsc_proxy.c
index 309ef80e3b95..1ced6b4d4946 100644
--- a/drivers/gpu/drm/xe/xe_gsc_proxy.c
+++ b/drivers/gpu/drm/xe/xe_gsc_proxy.c
@@ -66,7 +66,7 @@ static inline struct xe_device *kdev_to_xe(struct device
*kdev)
return dev_get_drvdata(kdev);
}
-static bool gsc_proxy_init_done(struct xe_gsc *gsc)
+bool xe_gsc_proxy_init_done(struct xe_gsc *gsc)
{
struct xe_gt *gt = gsc_to_gt(gsc);
u32 fwsts1 = xe_mmio_read32(gt, HECI_FWSTS1(MTL_GSC_HECI1_BASE));
@@ -528,7 +528,7 @@ int xe_gsc_proxy_start(struct xe_gsc *gsc)
if (err)
return err;
- if (!gsc_proxy_init_done(gsc)) {
+ if (!xe_gsc_proxy_init_done(gsc)) {
xe_gt_err(gsc_to_gt(gsc), "GSC FW reports proxy init not
completed\n");
return -EIO;
}
diff --git a/drivers/gpu/drm/xe/xe_gsc_proxy.h
b/drivers/gpu/drm/xe/xe_gsc_proxy.h
index 908f9441f093..c511ade6b863 100644
--- a/drivers/gpu/drm/xe/xe_gsc_proxy.h
+++ b/drivers/gpu/drm/xe/xe_gsc_proxy.h
@@ -11,6 +11,7 @@
struct xe_gsc;
int xe_gsc_proxy_init(struct xe_gsc *gsc);
+bool xe_gsc_proxy_init_done(struct xe_gsc *gsc);
void xe_gsc_proxy_remove(struct xe_gsc *gsc);
int xe_gsc_proxy_start(struct xe_gsc *gsc);
--
2.43.2
[PATCH 1/4] drm/i915/hdcp: Move intel_hdcp_gsc_message def away from header file
Move intel_hdcp_gsc_message definition into intel_hdcp_gsc.c
so that intel_hdcp_gsc_message can be redefined for xe as needed.
--v2
-Correct commit message to reflect what patch is actually doing [Arun]
Signed-off-by: Suraj Kandpal
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 6 ++
drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 7 +--
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
index 302bff75b06c..35823e1f65d6 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
@@ -13,6 +13,12 @@
#include "intel_hdcp_gsc.h"
#include "intel_hdcp_gsc_message.h"
+struct intel_hdcp_gsc_message {
+ struct i915_vma *vma;
+ void *hdcp_cmd_in;
+ void *hdcp_cmd_out;
+};
+
bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915)
{
return DISPLAY_VER(i915) >= 14;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
index eba2057c5a9e..5f610df61cc9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
@@ -10,12 +10,7 @@
#include
struct drm_i915_private;
-
-struct intel_hdcp_gsc_message {
- struct i915_vma *vma;
- void *hdcp_cmd_in;
- void *hdcp_cmd_out;
-};
+struct intel_hdcp_gsc_message;
bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915);
ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
--
2.43.2
[PATCH 0/4] XE HDCP Enablement
This patch series enables HDCP on XE. Mainly includes rewriting functions that were responsible for sending hdcp messages via gsc cs. Signed-off-by: Suraj Kandpal Acked-by: Lucas De Marchi Suraj Kandpal (4): drm/i915/hdcp: Move intel_hdcp_gsc_message def away from header file drm/xe/hdcp: Use xe_device struct drm/xe: Use gsc_proxy_init_done to check proxy status drm/xe/hdcp: Enable HDCP for XE drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 6 + drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 7 +- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/display/xe_hdcp_gsc.c | 240 +- drivers/gpu/drm/xe/xe_gsc_proxy.c | 4 +- drivers/gpu/drm/xe/xe_gsc_proxy.h | 1 + drivers/gpu/drm/xe/xe_gsc_submit.c| 15 ++ drivers/gpu/drm/xe/xe_gsc_submit.h| 1 + 8 files changed, 257 insertions(+), 18 deletions(-) -- 2.43.2
Re: [PATCH v2 3/3] drm/i915/bios: abstract child device expected size
On 3/5/2024 16:43, Jani Nikula wrote:
On Tue, 05 Mar 2024, "Chauhan, Shekhar" wrote:
On 2/26/2024 23:28, Jani Nikula wrote:
Add a function to return the expected child device size. Flip the if
ladder around and use the same versions as in documentation to make it
easier to verify. Return an error for unknown versions. No functional
changes.
v2: Move BUILD_BUG_ON() next to the expected sizes
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 40 ++-
1 file changed, 24 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index c0f41bd1f946..343726de9aa7 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2699,27 +2699,35 @@ static void parse_ddi_ports(struct drm_i915_private
*i915)
print_ddi_port(devdata);
}
+static int child_device_expected_size(u16 version)
+{
+ BUILD_BUG_ON(sizeof(struct child_device_config) < 40);
+
+ if (version > 256)
+ return -ENOENT;
+ else if (version >= 256)
Correct me if I'm wrong, but isn't version >= 256, a bit cryptic after
the first check?
Would it be wise to make it version > 256, return -ENOENT and if version
== 256, return 40?
It may look so right now, but consider these future cases:
- VBT version gets bumped, and we get the info that, say, version 270
still has size 40. What needs to be changed?
- VBT version gets bumped, and we get the info that, say, version 271
has size 41. What needs to be changed?
Note that VBT versions above are pure examples, and don't reflect the
spec in any way.
We know right now that versions >= 256 will have size 40. We don't want
to express that in a way that requires us to modify it in the
future. This is the difference to the old if ladder.
Understood. Thanks.
Indeed, we could already bump the first if to
if (version > 257)
because we now know version 257 has size 40.
BR,
Jani.
+ return 40;
+ else if (version >= 216)
+ return 39;
+ else if (version >= 196)
+ return 38;
+ else if (version >= 195)
+ return 37;
+ else if (version >= 111)
+ return LEGACY_CHILD_DEVICE_CONFIG_SIZE;
+ else if (version >= 106)
+ return 27;
+ else
+ return 22;
+}
+
static bool child_device_size_valid(struct drm_i915_private *i915, int size)
{
int expected_size;
- if (i915->display.vbt.version < 106) {
- expected_size = 22;
- } else if (i915->display.vbt.version < 111) {
- expected_size = 27;
- } else if (i915->display.vbt.version < 195) {
- expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
- } else if (i915->display.vbt.version == 195) {
- expected_size = 37;
- } else if (i915->display.vbt.version <= 215) {
- expected_size = 38;
- } else if (i915->display.vbt.version <= 255) {
- expected_size = 39;
- } else if (i915->display.vbt.version <= 256) {
- expected_size = 40;
- } else {
+ expected_size = child_device_expected_size(i915->display.vbt.version);
+ if (expected_size < 0) {
expected_size = sizeof(struct child_device_config);
- BUILD_BUG_ON(sizeof(struct child_device_config) < 40);
drm_dbg(&i915->drm,
"Expected child device config size for VBT version %u not
known; assuming %d\n",
i915->display.vbt.version, expected_size);
--
-shekhar
[PATCH v4] drm/i915/guc: Use context hints for GT frequency
Allow user to provide a low latency context hint. When set, KMD
sends a hint to GuC which results in special handling for this
context. SLPC will ramp the GT frequency aggressively every time
it switches to this context. The down freq threshold will also be
lower so GuC will ramp down the GT freq for this context more slowly.
We also disable waitboost for this context as that will interfere with
the strategy.
We need to enable the use of SLPC Compute strategy during init, but
it will apply only to contexts that set this bit during context
creation.
Userland can check whether this feature is supported using a new param-
I915_PARAM_HAS_CONTEXT_FREQ_HINT. This flag is true for all guc submission
enabled platforms as they use SLPC for frequency management.
The Mesa usage model for this flag is here -
https://gitlab.freedesktop.org/sushmave/mesa/-/commits/compute_hint
v2: Rename flags as per review suggestions (Rodrigo, Tvrtko).
Also, use flag bits in intel_context as it allows finer control for
toggling per engine if needed (Tvrtko).
v3: Minor review comments (Tvrtko)
v4: Update comment (Sushma)
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: Sushma Venkatesh Reddy
Reviewed-by: Rodrigo Vivi
Acked-by: Ivan Briano
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 16 --
.../gpu/drm/i915/gem/i915_gem_context_types.h | 1 +
drivers/gpu/drm/i915/gt/intel_context_types.h | 1 +
drivers/gpu/drm/i915/gt/intel_rps.c | 4
.../drm/i915/gt/uc/abi/guc_actions_slpc_abi.h | 21 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 1 +
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 6 ++
drivers/gpu/drm/i915/i915_getparam.c | 6 ++
include/uapi/drm/i915_drm.h | 15 +
10 files changed, 86 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index dcbfe32fd30c..81f65cab1330 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -879,6 +879,7 @@ static int set_proto_ctx_param(struct drm_i915_file_private
*fpriv,
struct i915_gem_proto_context *pc,
struct drm_i915_gem_context_param *args)
{
+ struct drm_i915_private *i915 = fpriv->i915;
int ret = 0;
switch (args->param) {
@@ -904,6 +905,13 @@ static int set_proto_ctx_param(struct
drm_i915_file_private *fpriv,
pc->user_flags &= ~BIT(UCONTEXT_BANNABLE);
break;
+ case I915_CONTEXT_PARAM_LOW_LATENCY:
+ if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))
+ pc->user_flags |= BIT(UCONTEXT_LOW_LATENCY);
+ else
+ ret = -EINVAL;
+ break;
+
case I915_CONTEXT_PARAM_RECOVERABLE:
if (args->size)
ret = -EINVAL;
@@ -992,6 +1000,9 @@ static int intel_context_set_gem(struct intel_context *ce,
if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS))
ret = intel_context_reconfigure_sseu(ce, sseu);
+ if (test_bit(UCONTEXT_LOW_LATENCY, &ctx->user_flags))
+ __set_bit(CONTEXT_LOW_LATENCY, &ce->flags);
+
return ret;
}
@@ -1630,6 +1641,9 @@ i915_gem_create_context(struct drm_i915_private *i915,
if (vm)
ctx->vm = vm;
+ /* Assign early so intel_context_set_gem can access these flags */
+ ctx->user_flags = pc->user_flags;
+
mutex_init(&ctx->engines_mutex);
if (pc->num_user_engines >= 0) {
i915_gem_context_set_user_engines(ctx);
@@ -1652,8 +1666,6 @@ i915_gem_create_context(struct drm_i915_private *i915,
* is no remap info, it will be a NOP. */
ctx->remap_slice = ALL_L3_SLICES(i915);
- ctx->user_flags = pc->user_flags;
-
for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index 03bc7f9d191b..b6d97da63d1f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -338,6 +338,7 @@ struct i915_gem_context {
#define UCONTEXT_BANNABLE 2
#define UCONTEXT_RECOVERABLE 3
#define UCONTEXT_PERSISTENCE 4
+#define UCONTEXT_LOW_LATENCY 5
/**
* @flags: small set of booleans
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 7eccbd70d89f..ed95a7b57cbb 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -130,6 +130,7
[PATCH v4 3/3] drm/i915/gt: Enable only one CCS for compute workload
Enable only one CCS engine by default with all the compute sices
allocated to it.
While generating the list of UABI engines to be exposed to the
user, exclude any additional CCS engines beyond the first
instance.
This change can be tested with igt i915_query.
Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Requires: 97aba5e46038 ("drm/i915/gt: Refactor uabi engine class/instance list
creation")
Signed-off-by: Andi Shyti
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matt Roper
Cc: # v6.2+
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 11 ++
drivers/gpu/drm/i915/gt/intel_gt.c | 23 +
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 5 +
3 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 11cc06c0c785..9ef1c4ce252d 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -208,6 +208,7 @@ void intel_engines_driver_register(struct drm_i915_private
*i915)
struct list_head *it, *next;
struct rb_node **p, *prev;
LIST_HEAD(engines);
+ u16 uabi_ccs = 0;
sort_engines(i915, &engines);
@@ -244,6 +245,16 @@ void intel_engines_driver_register(struct drm_i915_private
*i915)
if (uabi_class > I915_LAST_UABI_ENGINE_CLASS)
continue;
+ /*
+* The load is balanced among all the available compute
+* slices. Expose only the first instance of the compute
+* engine.
+*/
+ if (IS_DG2(i915) &&
+ uabi_class == I915_ENGINE_CLASS_COMPUTE &&
+ uabi_ccs++)
+ continue;
+
GEM_BUG_ON(uabi_class >=
ARRAY_SIZE(i915->engine_uabi_class_count));
i915->engine_uabi_class_count[uabi_class]++;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index a425db5ed3a2..0aac97439552 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -168,6 +168,26 @@ static void init_unused_rings(struct intel_gt *gt)
}
}
+static void intel_gt_apply_ccs_mode(struct intel_gt *gt)
+{
+ u32 mode;
+ int cslice;
+
+ if (!IS_DG2(gt->i915))
+ return;
+
+ /* Set '0' as a default CCS id to all the cslices */
+ mode = 0;
+
+ for (cslice = 0; cslice < hweight32(CCS_MASK(gt)); cslice++)
+ /* Write 0x7 if no CCS context dispatches to this cslice */
+ if (!(CCS_MASK(gt) & BIT(cslice)))
+ mode |= XEHP_CCS_MODE_CSLICE(cslice,
+XEHP_CCS_MODE_CSLICE_MASK);
+
+ intel_uncore_write(gt->uncore, XEHP_CCS_MODE, mode);
+}
+
int intel_gt_init_hw(struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
@@ -195,6 +215,9 @@ int intel_gt_init_hw(struct intel_gt *gt)
intel_gt_init_swizzling(gt);
+ /* Configure CCS mode */
+ intel_gt_apply_ccs_mode(gt);
+
/*
* At least 830 can leave some of the unused rings
* "active" (ie. head != tail) after resume which
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index cf709f6c05ae..8224dd99c7d7 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1480,6 +1480,11 @@
#define GEN12_RCU_MODE_CCS_ENABLEREG_BIT(0)
#define XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE REG_BIT(1)
+#define XEHP_CCS_MODE _MMIO(0x14804)
+#define XEHP_CCS_MODE_CSLICE_MASKREG_GENMASK(2, 0) /* CCS0-3 +
rsvd */
+#define XEHP_CCS_MODE_CSLICE_WIDTH ilog2(XEHP_CCS_MODE_CSLICE_MASK
+ 1)
+#define XEHP_CCS_MODE_CSLICE(cslice, ccs)(ccs << (cslice *
XEHP_CCS_MODE_CSLICE_WIDTH))
+
#define CHV_FUSE_GT_MMIO(VLV_GUNIT_BASE + 0x2168)
#define CHV_FGT_DISABLE_SS0 (1 << 10)
#define CHV_FGT_DISABLE_SS1 (1 << 11)
--
2.43.0
[PATCH v4 2/3] drm/i915/gt: Refactor uabi engine class/instance list creation
For the upcoming changes we need a cleaner way to build the list
of uabi engines.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Andi Shyti
Cc: # v6.2+
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 29 -
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 833987015b8b..11cc06c0c785 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -203,7 +203,7 @@ static void engine_rename(struct intel_engine_cs *engine,
const char *name, u16
void intel_engines_driver_register(struct drm_i915_private *i915)
{
- u16 name_instance, other_instance = 0;
+ u16 class_instance[I915_LAST_UABI_ENGINE_CLASS + 2] = { };
struct legacy_ring ring = {};
struct list_head *it, *next;
struct rb_node **p, *prev;
@@ -214,6 +214,8 @@ void intel_engines_driver_register(struct drm_i915_private
*i915)
prev = NULL;
p = &i915->uabi_engines.rb_node;
list_for_each_safe(it, next, &engines) {
+ u16 uabi_class;
+
struct intel_engine_cs *engine =
container_of(it, typeof(*engine), uabi_list);
@@ -222,15 +224,14 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
engine->uabi_class = uabi_classes[engine->class];
- if (engine->uabi_class == I915_NO_UABI_CLASS) {
- name_instance = other_instance++;
- } else {
- GEM_BUG_ON(engine->uabi_class >=
- ARRAY_SIZE(i915->engine_uabi_class_count));
- name_instance =
-
i915->engine_uabi_class_count[engine->uabi_class]++;
- }
- engine->uabi_instance = name_instance;
+
+ if (engine->uabi_class == I915_NO_UABI_CLASS)
+ uabi_class = I915_LAST_UABI_ENGINE_CLASS + 1;
+ else
+ uabi_class = engine->uabi_class;
+
+ GEM_BUG_ON(uabi_class >= ARRAY_SIZE(class_instance));
+ engine->uabi_instance = class_instance[uabi_class]++;
/*
* Replace the internal name with the final user and log facing
@@ -238,11 +239,15 @@ void intel_engines_driver_register(struct
drm_i915_private *i915)
*/
engine_rename(engine,
intel_engine_class_repr(engine->class),
- name_instance);
+ engine->uabi_instance);
- if (engine->uabi_class == I915_NO_UABI_CLASS)
+ if (uabi_class > I915_LAST_UABI_ENGINE_CLASS)
continue;
+ GEM_BUG_ON(uabi_class >=
+ ARRAY_SIZE(i915->engine_uabi_class_count));
+ i915->engine_uabi_class_count[uabi_class]++;
+
rb_link_node(&engine->uabi_node, prev, p);
rb_insert_color(&engine->uabi_node, &i915->uabi_engines);
--
2.43.0
[PATCH v4 1/3] drm/i915/gt: Disable HW load balancing for CCS
The hardware should not dynamically balance the load between CCS
engines. Wa_14019159160 recommends disabling it across all
platforms.
Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Signed-off-by: Andi Shyti
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matt Roper
Cc: # v6.2+
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 50962cfd1353..cf709f6c05ae 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1478,6 +1478,7 @@
#define GEN12_RCU_MODE _MMIO(0x14800)
#define GEN12_RCU_MODE_CCS_ENABLEREG_BIT(0)
+#define XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE REG_BIT(1)
#define CHV_FUSE_GT_MMIO(VLV_GUNIT_BASE + 0x2168)
#define CHV_FGT_DISABLE_SS0 (1 << 10)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index d67d44611c28..a2e78cf0b5f5 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2945,6 +2945,11 @@ general_render_compute_wa_init(struct intel_engine_cs
*engine, struct i915_wa_li
/* Wa_18028616096 */
wa_mcr_write_or(wal, LSC_CHICKEN_BIT_0_UDW,
UGM_FRAGMENT_THRESHOLD_TO_3);
+
+ /*
+* Wa_14019159160: disable the automatic CCS load balancing
+*/
+ wa_masked_en(wal, GEN12_RCU_MODE,
XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE);
}
if (IS_DG2_G11(i915)) {
--
2.43.0
[PATCH v4 0/3] Disable automatic load CCS load balancing
Hi, I have to admit that v3 was a lazy attempt. This one should be on the right path. this series does basically two things: 1. Disables automatic load balancing as adviced by the hardware workaround. 2. Assigns all the CCS slices to one single user engine. The user will then be able to query only one CCS engine I'm using here the "Requires: " tag, but I'm not sure the commit id will be valid, on the other hand, I don't know what commit id I should use. Thanks Tvrtko, Matt, John and Joonas for your reviews! Andi Changelog = v3 -> v4 - Reword correctly the comment in the workaround - Fix a buffer overflow (Thanks Joonas) - Handle properly the fused engines when setting the CCS mode. v2 -> v3 - Simplified the algorithm for creating the list of the exported uabi engines. (Patch 1) (Thanks, Tvrtko) - Consider the fused engines when creating the uabi engine list (Patch 2) (Thanks, Matt) - Patch 4 now uses a the refactoring from patch 1, in a cleaner outcome. v1 -> v2 - In Patch 1 use the correct workaround number (thanks Matt). - In Patch 2 do not add the extra CCS engines to the exposed UABI engine list and adapt the engine counting accordingly (thanks Tvrtko). - Reword the commit of Patch 2 (thanks John). Andi Shyti (3): drm/i915/gt: Disable HW load balancing for CCS drm/i915/gt: Refactor uabi engine class/instance list creation drm/i915/gt: Enable only one CCS for compute workload drivers/gpu/drm/i915/gt/intel_engine_user.c | 40 ++--- drivers/gpu/drm/i915/gt/intel_gt.c | 23 drivers/gpu/drm/i915/gt/intel_gt_regs.h | 6 drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++ 4 files changed, 62 insertions(+), 12 deletions(-) -- 2.43.0
✗ Fi.CI.BAT: failure for drm/i915: Fix VMA UAF on destroy against deactivate race (rev5)
== Series Details == Series: drm/i915: Fix VMA UAF on destroy against deactivate race (rev5) URL : https://patchwork.freedesktop.org/series/129026/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14393 -> Patchwork_129026v5 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_129026v5 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_129026v5, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/index.html Participating hosts (41 -> 38) -- Missing(3): bat-mtlp-8 fi-glk-j4005 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_129026v5: ### IGT changes ### Possible regressions * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-11: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html Known issues Here are the changes found in Patchwork_129026v5 that come from known issues: ### CI changes ### Issues hit * boot: - fi-apl-guc: [PASS][3] -> [FAIL][4] ([i915#8293]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/fi-apl-guc/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/fi-apl-guc/boot.html - fi-cfl-8109u: [PASS][5] -> [FAIL][6] ([i915#8293]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/fi-cfl-8109u/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/fi-cfl-8109u/boot.html Possible fixes * boot: - bat-jsl-1: [FAIL][7] ([i915#8293]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-jsl-1/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-jsl-1/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-jsl-1: NOTRUN -> [SKIP][9] ([i915#9318]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - bat-jsl-1: NOTRUN -> [SKIP][10] ([i915#2190]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-jsl-1/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@verify-random: - bat-jsl-1: NOTRUN -> [SKIP][11] ([i915#4613]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-arls-2: NOTRUN -> [SKIP][12] ([i915#4083]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][13] ([i915#10196] / [i915#4077]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-arls-2/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-2: NOTRUN -> [SKIP][14] ([i915#10197] / [i915#10211] / [i915#4079]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-arls-2/igt@gem_render_tiled_bl...@basic.html * igt@gem_softpin@allocator-basic: - bat-arls-2: NOTRUN -> [ABORT][15] ([i915#10237]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-arls-2/igt@gem_soft...@allocator-basic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-jsl-1: NOTRUN -> [SKIP][16] ([i915#4103]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-jsl-1: NOTRUN -> [SKIP][17] ([i915#3555] / [i915#9886]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-jsl-1/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-jsl-1: NOTRUN -> [SKIP][18] ([fdo#109285]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-jsl-1/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_setmode@basic-clone-single-crtc: - bat-jsl-1: NOTRUN -> [SKIP][19] ([i915#3555]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129026v5/bat-jsl-1/igt@kms_setm...@basic-clone-single-crtc.html Possible fixes * igt@gem_exec_fence@basic-await@ccs0: - bat-arls-2: [ABORT][20] -> [PA
✗ Fi.CI.SPARSE: warning for drm/i915: Fix VMA UAF on destroy against deactivate race (rev5)
== Series Details == Series: drm/i915: Fix VMA UAF on destroy against deactivate race (rev5) URL : https://patchwork.freedesktop.org/series/129026/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/uaccess_64.h:88:24: warning: cast removes address space '__user' of expression +./arch/x86/include/asm/uaccess_64.h:88:24: warning: cast removes address space '__user' of expression +./arch/x86/include/asm/uaccess_64.h:88:24: warning: cast removes address space '__user' of expression +./arch/x86/include/asm/uaccess_64.h:88:24: warning: cast removes address space '__user' of expression +./arch/x86/include/asm/uaccess_64.h:88:24: warning: cast removes address space '__user' of expression +./arch/x86/include/asm/uaccess_64.h:88:24: warning: cast removes address space '__user' of expression +./arch/x86/include/asm/uaccess_64.h:88:24: warning: cast removes address space '__user' of expression +./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-no
✓ Fi.CI.BAT: success for drm/i915: Unpin cursor fb only after vblank.
== Series Details == Series: drm/i915: Unpin cursor fb only after vblank. URL : https://patchwork.freedesktop.org/series/130746/ State : success == Summary == CI Bug Log - changes from CI_DRM_14393 -> Patchwork_130746v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/index.html Participating hosts (41 -> 36) -- Missing(5): bat-kbl-2 fi-snb-2520m fi-glk-j4005 bat-jsl-1 bat-mtlp-8 Known issues Here are the changes found in Patchwork_130746v1 that come from known issues: ### CI changes ### Issues hit * boot: - bat-arls-3: [PASS][1] -> [FAIL][2] ([i915#10234]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-arls-3/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-3/boot.html ### IGT changes ### Issues hit * igt@gem_lmem_swapping@verify-random: - bat-arls-2: NOTRUN -> [SKIP][3] ([i915#10213]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-arls-2: NOTRUN -> [SKIP][4] ([i915#4083]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][5] ([i915#10196] / [i915#4077]) +2 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-2: NOTRUN -> [SKIP][6] ([i915#10197] / [i915#10211] / [i915#4079]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-arls-2: NOTRUN -> [SKIP][7] ([i915#10206] / [i915#4079]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-arls-2: NOTRUN -> [SKIP][8] ([i915#10209]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-arls-2: NOTRUN -> [SKIP][9] ([i915#10200]) +9 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-arls-2: NOTRUN -> [SKIP][10] ([i915#10202]) +1 other test skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-arls-2: NOTRUN -> [SKIP][11] ([i915#9886]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-arls-2: NOTRUN -> [SKIP][12] ([i915#10207]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_psr@psr-primary-mmap-gtt@edp-1: - bat-arls-2: NOTRUN -> [SKIP][13] ([i915#10196] / [i915#4077] / [i915#9688]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@kms_psr@psr-primary-mmap-...@edp-1.html * igt@kms_setmode@basic-clone-single-crtc: - bat-arls-2: NOTRUN -> [SKIP][14] ([i915#10208] / [i915#8809]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-mmap: - bat-arls-2: NOTRUN -> [SKIP][15] ([i915#10196] / [i915#3708] / [i915#4077]) +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@prime_v...@basic-fence-mmap.html * igt@prime_vgem@basic-fence-read: - bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10212] / [i915#3708]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@prime_v...@basic-fence-read.html * igt@prime_vgem@basic-read: - bat-arls-2: NOTRUN -> [SKIP][17] ([i915#10214] / [i915#3708]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@prime_v...@basic-read.html * igt@prime_vgem@basic-write: - bat-arls-2: NOTRUN -> [SKIP][18] ([i915#10216] / [i915#3708]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130746v1/bat-arls-2/igt@prime_v...@basic-write.html Possible fixes * igt@gem_exec_fence@basic-await@ccs0: - bat-arls-2: [ABORT][19] -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-arls-
✗ Fi.CI.SPARSE: warning for drm/i915: Unpin cursor fb only after vblank.
== Series Details == Series: drm/i915: Unpin cursor fb only after vblank. URL : https://patchwork.freedesktop.org/series/130746/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/includ
✗ Fi.CI.CHECKPATCH: warning for drm/i915: Unpin cursor fb only after vblank.
== Series Details == Series: drm/i915: Unpin cursor fb only after vblank. URL : https://patchwork.freedesktop.org/series/130746/ State : warning == Summary == Error: dim checkpatch failed eb5c989a767b drm: Add drm_vblank_work_flush_all(). -:33: WARNING:WAITQUEUE_ACTIVE: waitqueue_active without comment #33: FILE: drivers/gpu/drm/drm_vblank_work.c:249: + waitqueue_active(&vblank->work_wait_queue), total: 0 errors, 1 warnings, 0 checks, 41 lines checked c719e1a3aa2b drm/i915: Use vblank worker to unpin old legacy cursor fb safely 710cf74ea635 drm/i915: Use the same vblank worker for atomic unpin -:107: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #107: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:641: + drm_crtc_accurate_vblank_count(&crtc->base) + 1, -:110: WARNING:LONG_LINE_COMMENT: line length of 110 exceeds 100 columns #110: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:644: + /* Remove plane from atomic state, cleanup/free is done from vblank worker. */ total: 0 errors, 2 warnings, 0 checks, 98 lines checked
✓ Fi.CI.BAT: success for IO and fast wake lines calculation and increase fw sync length (rev3)
== Series Details == Series: IO and fast wake lines calculation and increase fw sync length (rev3) URL : https://patchwork.freedesktop.org/series/130173/ State : success == Summary == CI Bug Log - changes from CI_DRM_14393 -> Patchwork_130173v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/index.html Participating hosts (41 -> 40) -- Additional (1): bat-dg1-7 Missing(2): fi-glk-j4005 fi-snb-2520m Known issues Here are the changes found in Patchwork_130173v3 that come from known issues: ### CI changes ### Issues hit * boot: - fi-tgl-1115g4: [PASS][1] -> [FAIL][2] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/fi-tgl-1115g4/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/fi-tgl-1115g4/boot.html - fi-apl-guc: [PASS][3] -> [FAIL][4] ([i915#8293]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/fi-apl-guc/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/fi-apl-guc/boot.html ### IGT changes ### Issues hit * igt@gem_lmem_swapping@verify-random: - bat-arls-2: NOTRUN -> [SKIP][5] ([i915#10213]) +3 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][6] ([i915#4083]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-dg1-7/igt@gem_m...@basic.html - bat-arls-2: NOTRUN -> [SKIP][7] ([i915#4083]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][8] ([i915#10196] / [i915#4077]) +2 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-arls-2/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-2: NOTRUN -> [SKIP][9] ([i915#10197] / [i915#10211] / [i915#4079]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-arls-2/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][10] ([i915#4077]) +2 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][11] ([i915#4079]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-dg1-7/igt@gem_tiled_pread_basic.html - bat-arls-2: NOTRUN -> [SKIP][12] ([i915#10206] / [i915#4079]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-arls-2/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#6621]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-dg1-7/igt@i915_pm_...@basic-api.html - bat-arls-2: NOTRUN -> [SKIP][14] ([i915#10209]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-arls-2/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_engines: - bat-dg2-8: [PASS][15] -> [FAIL][16] ([i915#10084]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-dg2-8/igt@i915_selftest@live@gt_engines.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-dg2-8/igt@i915_selftest@live@gt_engines.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][17] ([i915#4212]) +7 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-dg1-7/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-arls-2: NOTRUN -> [SKIP][18] ([i915#10200]) +9 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-7: NOTRUN -> [SKIP][19] ([i915#4215]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-dg1-7/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-arls-2: NOTRUN -> [SKIP][20] ([i915#10202]) +1 other test skip [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-arls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html - bat-dg1-7: NOTRUN -> [SKIP][21] ([i915#4103] / [i915#4213]) +1 other test skip [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v3/bat-dg1-7/igt@kms_cursor_leg...@basic-busy-fl
✗ Fi.CI.SPARSE: warning for IO and fast wake lines calculation and increase fw sync length (rev3)
== Series Details == Series: IO and fast wake lines calculation and increase fw sync length (rev3) URL : https://patchwork.freedesktop.org/series/130173/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning:
✗ Fi.CI.BAT: failure for drm/i915/dp: Enable AUX based backlight for HDR
== Series Details == Series: drm/i915/dp: Enable AUX based backlight for HDR URL : https://patchwork.freedesktop.org/series/130729/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14393 -> Patchwork_130729v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_130729v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_130729v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/index.html Participating hosts (41 -> 39) -- Additional (1): bat-dg1-7 Missing(3): bat-arls-4 bat-mtlp-8 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_130729v1: ### IGT changes ### Possible regressions * igt@i915_module_load@load: - bat-adlp-6: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-adlp-6/igt@i915_module_l...@load.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-adlp-6/igt@i915_module_l...@load.html - bat-adln-1: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-adln-1/igt@i915_module_l...@load.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-adln-1/igt@i915_module_l...@load.html * igt@kms_pm_rpm@basic-pci-d3-state: - bat-dg1-7: NOTRUN -> [ABORT][5] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-dg1-7/igt@kms_pm_...@basic-pci-d3-state.html Known issues Here are the changes found in Patchwork_130729v1 that come from known issues: ### CI changes ### Issues hit * boot: - bat-arls-3: [PASS][6] -> [FAIL][7] ([i915#10234]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-arls-3/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-arls-3/boot.html Possible fixes * boot: - bat-jsl-1: [FAIL][8] ([i915#8293]) -> [PASS][9] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-jsl-1/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-jsl-1/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-jsl-1: NOTRUN -> [SKIP][10] ([i915#9318]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - bat-jsl-1: NOTRUN -> [SKIP][11] ([i915#2190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-jsl-1/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@verify-random: - bat-arls-2: NOTRUN -> [SKIP][12] ([i915#10213]) +3 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html - bat-jsl-1: NOTRUN -> [SKIP][13] ([i915#4613]) +3 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][14] ([i915#4083]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-dg1-7/igt@gem_m...@basic.html - bat-arls-2: NOTRUN -> [SKIP][15] ([i915#4083]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10196] / [i915#4077]) +2 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-arls-2/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-2: NOTRUN -> [SKIP][17] ([i915#10197] / [i915#10211] / [i915#4079]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-arls-2/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][18] ([i915#4077]) +2 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][19] ([i915#4079]) +1 other test skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-dg1-7/igt@gem_tiled_pread_basic.html - bat-arls-2: NOTRUN -> [SKIP][20] ([i915#10206] / [i915#4079]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130729v1/bat-arls-2/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-arl
Re: [PATCH v3] drm/i915/guc: Use context hints for GT frequency
On Mon, Mar 04, 2024 at 03:34:50PM -0800, Vinay Belgaumkar wrote:
> Allow user to provide a low latency context hint. When set, KMD
> sends a hint to GuC which results in special handling for this
> context. SLPC will ramp the GT frequency aggressively every time
> it switches to this context. The down freq threshold will also be
> lower so GuC will ramp down the GT freq for this context more slowly.
> We also disable waitboost for this context as that will interfere with
> the strategy.
>
> We need to enable the use of SLPC Compute strategy during init, but
> it will apply only to contexts that set this bit during context
> creation.
>
> Userland can check whether this feature is supported using a new param-
> I915_PARAM_HAS_CONTEXT_FREQ_HINTS. This flag is true for all guc submission
> enabled platforms as they use SLPC for frequency management.
>
> The Mesa usage model for this flag is here -
> https://gitlab.freedesktop.org/sushmave/mesa/-/commits/compute_hint
>
> v2: Rename flags as per review suggestions (Rodrigo, Tvrtko).
> Also, use flag bits in intel_context as it allows finer control for
> toggling per engine if needed (Tvrtko).
>
> v3: Minor review comments (Tvrtko)
>
> Cc: Rodrigo Vivi
> Cc: Tvrtko Ursulin
> Cc: Sushma Venkatesh Reddy
> Acked-by: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Vinay Belgaumkar
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 16 --
> .../gpu/drm/i915/gem/i915_gem_context_types.h | 1 +
> drivers/gpu/drm/i915/gt/intel_context_types.h | 1 +
> drivers/gpu/drm/i915/gt/intel_rps.c | 4
> .../drm/i915/gt/uc/abi/guc_actions_slpc_abi.h | 21 +++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 +++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 1 +
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 6 ++
> drivers/gpu/drm/i915/i915_getparam.c | 6 ++
> include/uapi/drm/i915_drm.h | 15 +
> 10 files changed, 86 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index dcbfe32fd30c..81f65cab1330 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -879,6 +879,7 @@ static int set_proto_ctx_param(struct
> drm_i915_file_private *fpriv,
> struct i915_gem_proto_context *pc,
> struct drm_i915_gem_context_param *args)
> {
> + struct drm_i915_private *i915 = fpriv->i915;
> int ret = 0;
>
> switch (args->param) {
> @@ -904,6 +905,13 @@ static int set_proto_ctx_param(struct
> drm_i915_file_private *fpriv,
> pc->user_flags &= ~BIT(UCONTEXT_BANNABLE);
> break;
>
> + case I915_CONTEXT_PARAM_LOW_LATENCY:
> + if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))
> + pc->user_flags |= BIT(UCONTEXT_LOW_LATENCY);
> + else
> + ret = -EINVAL;
> + break;
> +
> case I915_CONTEXT_PARAM_RECOVERABLE:
> if (args->size)
> ret = -EINVAL;
> @@ -992,6 +1000,9 @@ static int intel_context_set_gem(struct intel_context
> *ce,
> if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS))
> ret = intel_context_reconfigure_sseu(ce, sseu);
>
> + if (test_bit(UCONTEXT_LOW_LATENCY, &ctx->user_flags))
> + __set_bit(CONTEXT_LOW_LATENCY, &ce->flags);
> +
> return ret;
> }
>
> @@ -1630,6 +1641,9 @@ i915_gem_create_context(struct drm_i915_private *i915,
> if (vm)
> ctx->vm = vm;
>
> + /* Assign early so intel_context_set_gem can access these flags */
> + ctx->user_flags = pc->user_flags;
> +
> mutex_init(&ctx->engines_mutex);
> if (pc->num_user_engines >= 0) {
> i915_gem_context_set_user_engines(ctx);
> @@ -1652,8 +1666,6 @@ i915_gem_create_context(struct drm_i915_private *i915,
>* is no remap info, it will be a NOP. */
> ctx->remap_slice = ALL_L3_SLICES(i915);
>
> - ctx->user_flags = pc->user_flags;
> -
> for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
> ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> index 03bc7f9d191b..b6d97da63d1f 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> @@ -338,6 +338,7 @@ struct i915_gem_context {
> #define UCONTEXT_BANNABLE2
> #define UCONTEXT_RECOVERABLE 3
> #define UCONTEXT_PERSISTENCE 4
> +#define UCONTEXT_LOW_LATENCY 5
>
> /**
>* @flags: small set of booleans
> diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
> b/drivers/
Re: [PATCH v3] drm/i915/guc: Use context hints for GT frequency
On Mon, Mar 4, 2024, at 3:34 PM, Vinay Belgaumkar wrote: > Allow user to provide a low latency context hint. When set, KMD > sends a hint to GuC which results in special handling for this > context. SLPC will ramp the GT frequency aggressively every time > it switches to this context. The down freq threshold will also be > lower so GuC will ramp down the GT freq for this context more slowly. > We also disable waitboost for this context as that will interfere with > the strategy. > > We need to enable the use of SLPC Compute strategy during init, but > it will apply only to contexts that set this bit during context > creation. > > Userland can check whether this feature is supported using a new param- > I915_PARAM_HAS_CONTEXT_FREQ_HINTS. This flag is true for all guc submission > enabled platforms as they use SLPC for frequency management. > > The Mesa usage model for this flag is here - > https://gitlab.freedesktop.org/sushmave/mesa/-/commits/compute_hint > > v2: Rename flags as per review suggestions (Rodrigo, Tvrtko). > Also, use flag bits in intel_context as it allows finer control for > toggling per engine if needed (Tvrtko). > > v3: Minor review comments (Tvrtko) > > Cc: Rodrigo Vivi > Cc: Tvrtko Ursulin > Cc: Sushma Venkatesh Reddy > Acked-by: Rodrigo Vivi > Signed-off-by: Vinay Belgaumkar > --- Acked-by: Ivan Briano
Re: [PATCH v3 3/4] drm/ttm, drm/amdgpu, drm/xe: Consider hitch moves within bulk sublist moves
Hi Thomas,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next-fixes linus/master v6.8-rc7
next-20240305]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Thomas-Hellstr-m/drm-ttm-Allow-TTM-LRU-list-nodes-of-different-types/20240306-000453
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20240305160202.3555-4-thomas.hellstrom%40linux.intel.com
patch subject: [PATCH v3 3/4] drm/ttm, drm/amdgpu, drm/xe: Consider hitch moves
within bulk sublist moves
config: arm-defconfig
(https://download.01.org/0day-ci/archive/20240306/202403060640.zcxpvobi-...@intel.com/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project.git
f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20240306/202403060640.zcxpvobi-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202403060640.zcxpvobi-...@intel.com/
All warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/drm_gem_ttm_helper.c:5:
In file included from include/drm/drm_gem_ttm_helper.h:10:
In file included from include/drm/ttm/ttm_bo.h:39:
>> include/drm/ttm/ttm_device.h:286:31: warning: variable 'old' set but not
>> used [-Wunused-but-set-variable]
struct ttm_resource_manager *old;
^
1 warning generated.
vim +/old +286 include/drm/ttm/ttm_device.h
282
283 static inline void ttm_set_driver_manager(struct ttm_device *bdev, int
type,
284struct ttm_resource_manager
*manager)
285 {
> 286 struct ttm_resource_manager *old;
287
288 BUILD_BUG_ON(__builtin_constant_p(type) && type >=
TTM_NUM_MEM_TYPES);
289 old = bdev->man_drv[type];
290 bdev->man_drv[type] = manager;
291 if (manager)
292 manager->mem_type = type;
293 }
294
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
✗ Fi.CI.BAT: failure for drm/ci: update device type for volteer devices (rev2)
== Series Details == Series: drm/ci: update device type for volteer devices (rev2) URL : https://patchwork.freedesktop.org/series/130723/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14393 -> Patchwork_130723v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_130723v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_130723v2, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/index.html Participating hosts (41 -> 40) -- Additional (1): bat-dg1-7 Missing(2): fi-glk-j4005 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_130723v2: ### IGT changes ### Possible regressions * igt@gem_exec_parallel@engines@fds: - bat-arls-2: NOTRUN -> [ABORT][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-arls-2/igt@gem_exec_parallel@engi...@fds.html * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-11: [PASS][2] -> [FAIL][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html * igt@i915_selftest@live@active: - bat-dg2-9: [PASS][4] -> [ABORT][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-dg2-9/igt@i915_selftest@l...@active.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-dg2-9/igt@i915_selftest@l...@active.html New tests - New tests have been introduced between CI_DRM_14393 and Patchwork_130723v2: ### New IGT tests (1) ### * igt@gem_lmem_swapping: - Statuses : - Exec time: [None] s Known issues Here are the changes found in Patchwork_130723v2 that come from known issues: ### CI changes ### Issues hit * boot: - fi-apl-guc: [PASS][6] -> [FAIL][7] ([i915#8293]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/fi-apl-guc/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/fi-apl-guc/boot.html - fi-cfl-8109u: [PASS][8] -> [FAIL][9] ([i915#8293]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/fi-cfl-8109u/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/fi-cfl-8109u/boot.html Possible fixes * boot: - bat-jsl-1: [FAIL][10] ([i915#8293]) -> [PASS][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-jsl-1/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-jsl-1/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-jsl-1: NOTRUN -> [SKIP][12] ([i915#9318]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - bat-jsl-1: NOTRUN -> [SKIP][13] ([i915#2190]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-jsl-1/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@verify-random: - bat-jsl-1: NOTRUN -> [SKIP][14] ([i915#4613]) +3 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][15] ([i915#4083]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-dg1-7/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][16] ([i915#4077]) +2 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][17] ([i915#4079]) +1 other test skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-dg1-7/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][18] ([i915#6621]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-dg1-7/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][19] ([i915#4212]) +7 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130723v2/bat-dg1-7/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-7: NOTRUN -> [SKIP][20] ([i915#4215])
✗ Fi.CI.CHECKPATCH: warning for drm/ci: update device type for volteer devices (rev2)
== Series Details ==
Series: drm/ci: update device type for volteer devices (rev2)
URL : https://patchwork.freedesktop.org/series/130723/
State : warning
== Summary ==
Error: dim checkpatch failed
1f2ef535a742 drm/ci: update device type for volteer devices
-:16: WARNING:BAD_FIXES_TAG: Please use correct Fixes: style 'Fixes: <12 chars
of sha1> ("")' - ie: 'Fixes: 0119c894ab0d ("drm: Add initial ci/
subdirectory")'
#16:
Fixes: 0119c894ab0dc ("drm: Add initial ci/ subdirectory")
total: 0 errors, 1 warnings, 0 checks, 14 lines checked
Re: [PATCH v3 2/4] drm/i915/gt: Do not exposed fused off engines.
On Fri, Mar 01, 2024 at 12:28:57AM +0100, Andi Shyti wrote:
> Some of the CCS engines are disabled. They should not be listed
> in the uabi_engine list, that is the list of engines that the
> user can see.
Fused off engines already aren't visible to userspace (or to the kernel
for that matter). For CCS engines engine_mask_apply_compute_fuses()
removes the fused off engines from the runtime engine mask; other engine
types are handled in similar functions. Any engine that doesn't appear
in the filtered down engine_mask won't even have a 'struct
intel_engine_cs' allocated for it.
Matt
>
> Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
> Requires: 4e4f77d74878 ("drm/i915/gt: Refactor uabi engine class/instance
> list creation")
> Signed-off-by: Andi Shyti
> ---
> drivers/gpu/drm/i915/gt/intel_engine_user.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
> b/drivers/gpu/drm/i915/gt/intel_engine_user.c
> index cf8f24ad88f6..ec5bcd1c1ec4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
> @@ -244,6 +244,18 @@ void intel_engines_driver_register(struct
> drm_i915_private *i915)
> if (uabi_class > I915_LAST_UABI_ENGINE_CLASS)
> continue;
>
> + /*
> + * If the CCS engine is fused off, the corresponding bit
> + * in the engine mask is disabled. Do not expose it
> + * to the user.
> + *
> + * By default at least one engine is enabled (check
> + * the engine_mask_apply_compute_fuses() function.
> + */
> + if (!(engine->gt->info.engine_mask &
> + BIT(_CCS(engine->uabi_instance
> + continue;
> +
> GEM_BUG_ON(uabi_class >=
> ARRAY_SIZE(i915->engine_uabi_class_count));
> i915->engine_uabi_class_count[uabi_class]++;
> --
> 2.43.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
✗ Fi.CI.BAT: failure for drm/i915: Use drm_printer more (rev5)
== Series Details == Series: drm/i915: Use drm_printer more (rev5) URL : https://patchwork.freedesktop.org/series/129956/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14393 -> Patchwork_129956v5 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_129956v5 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_129956v5, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/index.html Participating hosts (41 -> 41) -- Additional (1): bat-dg1-7 Missing(1): fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_129956v5: ### IGT changes ### Possible regressions * igt@i915_selftest@live@active: - bat-dg2-9: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-dg2-9/igt@i915_selftest@l...@active.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-dg2-9/igt@i915_selftest@l...@active.html Known issues Here are the changes found in Patchwork_129956v5 that come from known issues: ### CI changes ### Issues hit * boot: - bat-arls-3: [PASS][3] -> [FAIL][4] ([i915#10234]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-arls-3/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-arls-3/boot.html - fi-cfl-8109u: [PASS][5] -> [FAIL][6] ([i915#8293]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/fi-cfl-8109u/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/fi-cfl-8109u/boot.html Possible fixes * boot: - bat-jsl-1: [FAIL][7] ([i915#8293]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14393/bat-jsl-1/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-jsl-1/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-jsl-1: NOTRUN -> [SKIP][9] ([i915#9318]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - bat-jsl-1: NOTRUN -> [SKIP][10] ([i915#2190]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-jsl-1/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@verify-random: - bat-arls-2: NOTRUN -> [SKIP][11] ([i915#10213]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html - bat-jsl-1: NOTRUN -> [SKIP][12] ([i915#4613]) +3 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#4083]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-dg1-7/igt@gem_m...@basic.html - bat-arls-2: NOTRUN -> [SKIP][14] ([i915#4083]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][15] ([i915#10196] / [i915#4077]) +2 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-arls-2/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10197] / [i915#10211] / [i915#4079]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-arls-2/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][17] ([i915#4077]) +2 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][18] ([i915#4079]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-dg1-7/igt@gem_tiled_pread_basic.html - bat-arls-2: NOTRUN -> [SKIP][19] ([i915#10206] / [i915#4079]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-arls-2/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][20] ([i915#6621]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v5/bat-dg1-7/igt@i915_pm_...@basic-api.html - bat-arls-2: NOTRUN -> [SKIP][21] ([i915#10209]) [21]: https://intel-gfx-ci.01.org/tree/
✗ Fi.CI.BUILD: failure for drm: enable W=1 warnings by default across the subsystem (rev4)
== Series Details == Series: drm: enable W=1 warnings by default across the subsystem (rev4) URL : https://patchwork.freedesktop.org/series/127072/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/127072/revisions/4/mbox/ not applied Applying: drm: enable (most) W=1 warnings by default across the subsystem Using index info to reconstruct a base tree... M drivers/gpu/drm/Makefile Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/Makefile CONFLICT (content): Merge conflict in drivers/gpu/drm/Makefile error: Failed to merge in the changes. hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm: enable (most) W=1 warnings by default across the subsystem When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". Build failed, no error log produced
✗ Fi.CI.SPARSE: warning for drm/i915: Use drm_printer more (rev5)
== Series Details == Series: drm/i915: Use drm_printer more (rev5) URL : https://patchwork.freedesktop.org/series/129956/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for drm/i915: Use drm_printer more (rev5)
== Series Details == Series: drm/i915: Use drm_printer more (rev5) URL : https://patchwork.freedesktop.org/series/129956/ State : warning == Summary == Error: dim checkpatch failed 3de64739aac8 drm/i915: Indicate which pipe failed the fastset check overall 84cc770bca09 drm/i915: Include CRTC info in infoframe mismatch prints 6eb483ba05e9 drm/i915: Include CRTC info in VSC SDP mismatch prints fac65f8b6b24 drm/i915: Convert pipe_config_infoframe_mismatch() to drm_printer 48cfcfeda76c drm/i915: Convert pipe_config_buffer_mismatch() to drm_printer 91dc61352e6f drm/i915: Convert intel_dpll_dump_hw_state() to drm_printer 39de565068c5 drm/i915: Use drm_printer more extensively in intel_crtc_state_dump() 7e59567a32c8 drm/i915: Convert the remaining state dump to drm_printer -:128: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #128: FILE: drivers/gpu/drm/i915/display/intel_crtc_state_dump.c:139: + plane_state->hw.rotation, plane_state->scaler_id, plane_state->hw.scaling_filter); total: 0 errors, 1 warnings, 0 checks, 236 lines checked 492d7ada8c7d drm/i915: Skip intel_crtc_state_dump() if debugs aren't enabled d84007ca4eba drm/i915: Relocate pipe_config_mismatch() 0deb3c61591c drm/i915: Reuse pipe_config_mismatch() more 9e61deffa643 drm/i915: Create the printer only once in intel_pipe_config_compare()
✗ Fi.CI.BAT: failure for drm/i915: Make crtc disable more atomic
== Series Details == Series: drm/i915: Make crtc disable more atomic URL : https://patchwork.freedesktop.org/series/130715/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14392 -> Patchwork_130715v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_130715v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_130715v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/index.html Participating hosts (37 -> 40) -- Additional (4): bat-dg1-7 fi-glk-j4005 bat-arls-2 fi-bsw-n3050 Missing(1): fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_130715v1: ### IGT changes ### Possible regressions * igt@kms_flip@basic-flip-vs-modeset@a-edp1: - bat-arls-2: NOTRUN -> [ABORT][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-arls-2/igt@kms_flip@basic-flip-vs-mode...@a-edp1.html Known issues Here are the changes found in Patchwork_130715v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-arls-2: NOTRUN -> [SKIP][2] ([i915#9318]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-arls-2/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - fi-glk-j4005: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@random-engines: - fi-bsw-n3050: NOTRUN -> [SKIP][5] ([fdo#109271]) +19 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][6] ([i915#4083]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-dg1-7/igt@gem_m...@basic.html - bat-arls-2: NOTRUN -> [SKIP][7] ([i915#4083]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][8] ([i915#10196] / [i915#4077]) +2 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-arls-2/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-2: NOTRUN -> [SKIP][9] ([i915#10197] / [i915#10211] / [i915#4079]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-arls-2/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][10] ([i915#4077]) +2 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][11] ([i915#4079]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-dg1-7/igt@gem_tiled_pread_basic.html - bat-arls-2: NOTRUN -> [SKIP][12] ([i915#10206] / [i915#4079]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-arls-2/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#6621]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-dg1-7/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][14] ([i915#4212]) +7 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-dg1-7/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-arls-2: NOTRUN -> [SKIP][15] ([i915#10200]) +9 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-7: NOTRUN -> [SKIP][16] ([i915#4215]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130715v1/bat-dg1-7/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-glk-j4005: NOTRUN -> [SKIP][17] ([fdo#109271]
Re: [PATCH 2/2] drm/i915: Implement vblank synchronized MBUS join changes
On Wed, Feb 28, 2024 at 10:02:13AM +0200, Stanislav Lisovskiy wrote: > Currently we can't change MBUS join status without doing a modeset, > because we are lacking mechanism to synchronize those with vblank. > However then this means that we can't do a fastset, if there is a need > to change MBUS join state. Fix that by implementing such change. > We already call correspondent check and update at pre_plane dbuf update, > so the only thing left is to have a non-modeset version of that. > If active pipes stay the same then fastset is possible and only MBUS > join state/ddb allocation updates would be committed. > > v2: Implement additional changes according to BSpec. > Vblank wait is needed after MBus/Dbuf programming in case if > no modeset is done and we are switching from single to multiple > displays, i.e mbus join state switches from "joined" to "non-joined" > state. Otherwise vblank wait is not needed according to spec. > > v3: Split mbus and dbox programming into to pre/post plane update parts, > how it should be done according to BSpec. > > v4: - Place "single display to multiple displays scenario" MBUS/DBOX > programming > after DDB reallocation, but before crtc enabling(that is where is has > to be according to spec). > - Check if crtc is still active, not only the old state. > - Do a vblank wait if MBUX DBOX register was modified. > - And of course do vblank wait only if crtc was active. > - Do vblank wait only if we are not doing a modeset, if we are doing > something before *commit_modeset_enables, because all crtcs might be > disabled at this moment, so we will get WARN if try waiting for vblank > then. > - Still getting FIFO underrun so try waiting for vblank in pre_plane > update > as well. > - Write also pipe that we need to sync with to MBUS_CTL register. > > v5: - Do vblank wait only for the first pipe, if mbus is joined > - Check also if new/old_dbuf_state is not NULL, before getting single pipe > and active pipes. > > Signed-off-by: Stanislav Lisovskiy Thank you for this patch, Stanislav! We tested it on a MTL-U based Chromebook (Screebo), using different configurations (eDP, eDP + HDMI, HDMI, etc.), and it worked well -- joined the mbus + no visual issues or i915 errors. Tested-by: Paz Zcharya Just a small note, checkpatch.pl is complaining about a few things. I assume you probably saw it, but flagging just in case.
Re: [PATCH 1/2] drm/i915: Update mbus in intel_dbuf_mbus_update and do it properly
On Wed, Feb 28, 2024 at 10:02:12AM +0200, Stanislav Lisovskiy wrote: > According to BSpec we need to do correspondent MBUS updates before > or after DBUF reallocation, depending on whether we are reducing > or increasing amount of pipes(typical scenario is swithing between > multiple and single displays). > > As of BSpec 49213 if we are swithing from multiple to single display > MBUS registers should be updated with correspondent values _before_ > Dbuf reallocation happens, however if we are switching from single > display to multiple then it should happen _after_ DDB reallocation(i.e > plane programming). > > Signed-off-by: Stanislav Lisovskiy Thank you for this patch, Stanislav! We tested it on a MTL-U based Chromebook (Screebo), using different configurations (eDP, eDP + HDMI, HDMI, etc.), and it worked well -- joined the mbus + no visual issues or i915 errors. Tested-by: Paz Zcharya
Re: ✗ Fi.CI.IGT: failure for drm/i915/dp: Fix connector DSC HW state readout (rev2)
On Fri, Mar 01, 2024 at 08:00:41PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: Fix connector DSC HW state readout (rev2)
> URL : https://patchwork.freedesktop.org/series/129540/
> State : failure
Thanks for the report/testing and review, patch is pushed to
drm-intel-next. The failure is unrelated see below.
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_14368_full -> Patchwork_129540v2_full
>
>
> Summary
> ---
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_129540v2_full absolutely need
> to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_129540v2_full, please notify your bug team
> (i915-ci-in...@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Participating hosts (7 -> 8)
> --
>
> Additional (1): shard-glk-0
>
> Possible new issues
> ---
>
> Here are the unknown changes that may have been introduced in
> Patchwork_129540v2_full:
>
> ### IGT changes ###
>
> Possible regressions
>
> * igt@kms_pm_rpm@i2c:
> - shard-dg1: [PASS][1] -> [ABORT][2] +1 other test abort
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-dg1-12/igt@kms_pm_...@i2c.html
>[2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129540v2/shard-dg1-19/igt@kms_pm_...@i2c.html
The above is due to:
<4> [479.015131] 827b6a68 (acpi_wakeup_lock){+.+.}-{3:3}, at:
acpi_device_wakeup_disable+0x12/0x50
<4> [479.015141] but task is already holding lock:
<4> [479.015143] 888105342a40 (&hwmon->hwmon_lock){+.+.}-{3:3}, at:
hwm_energy+0x4b/0x100 [i915]
which looks equivalent to:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14378/bat-dg2-9/igt@kms_pm_...@basic-pci-d3-state.html#dmesg-warnings426
<4> [192.005528] 82764d80 (fs_reclaim){+.+.}-{0:0}, at:
__kmalloc+0x9a/0x350
<4> [192.005538] but task is already holding lock:
<4> [192.005540] 888154108640 (&hwmon->hwmon_lock){+.+.}-{3:3}, at:
hwm_energy+0x4b/0x100 [i915]
since fs_reclaim is also part of the dependency chain in the former
case.
> New tests
> -
>
> New tests have been introduced between CI_DRM_14368_full and
> Patchwork_129540v2_full:
>
> ### New IGT tests (4) ###
>
> * igt@kms_cursor_edge_walk@64x64-top-edge@pipe-a-dp-4:
> - Statuses : 1 pass(s)
> - Exec time: [3.45] s
>
> * igt@kms_cursor_edge_walk@64x64-top-edge@pipe-d-dp-4:
> - Statuses : 1 pass(s)
> - Exec time: [3.29] s
>
> *
> igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-modifiers@pipe-c-dp-4:
> - Statuses : 1 pass(s)
> - Exec time: [0.93] s
>
> *
> igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-c-dp-4:
> - Statuses : 1 pass(s)
> - Exec time: [0.21] s
>
>
>
> Known issues
>
>
> Here are the changes found in Patchwork_129540v2_full that come from known
> issues:
>
> ### CI changes ###
>
> Issues hit
>
> * boot:
> - shard-glk: ([PASS][3], [PASS][4], [PASS][5], [PASS][6],
> [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12],
> [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18],
> [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24],
> [PASS][25], [PASS][26], [PASS][27]) -> ([PASS][28], [PASS][29], [PASS][30],
> [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [FAIL][36],
> [PASS][37], [FAIL][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42],
> [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48],
> [PASS][49], [FAIL][50], [PASS][51]) ([i915#8293])
>[3]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk9/boot.html
>[4]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk9/boot.html
>[5]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk9/boot.html
>[6]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk1/boot.html
>[7]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk1/boot.html
>[8]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk9/boot.html
>[9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk8/boot.html
>[10]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk8/boot.html
>[11]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk8/boot.html
>[12]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk7/boot.html
>[13]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk7/boot.html
>[14]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk7/boot.html
>[15]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14368/shard-glk5/b
✓ Fi.CI.BAT: success for drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostly
== Series Details == Series: drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostly URL : https://patchwork.freedesktop.org/series/130714/ State : success == Summary == CI Bug Log - changes from CI_DRM_14392 -> Patchwork_130714v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/index.html Participating hosts (37 -> 40) -- Additional (4): bat-dg1-7 fi-glk-j4005 bat-arls-2 fi-bsw-n3050 Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_130714v1 that come from known issues: ### CI changes ### Issues hit * boot: - fi-bsw-n3050: NOTRUN -> [FAIL][1] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/fi-bsw-n3050/boot.html - bat-arls-3: [PASS][2] -> [FAIL][3] ([i915#10234]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14392/bat-arls-3/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-3/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-arls-2: NOTRUN -> [SKIP][4] ([i915#9318]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-2/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - fi-glk-j4005: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@verify-random: - bat-arls-2: NOTRUN -> [SKIP][7] ([i915#10213]) +3 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-2/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][8] ([i915#4083]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-dg1-7/igt@gem_m...@basic.html - bat-arls-2: NOTRUN -> [SKIP][9] ([i915#4083]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-2/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-arls-2: NOTRUN -> [SKIP][10] ([i915#10196] / [i915#4077]) +2 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-2/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-2: NOTRUN -> [SKIP][11] ([i915#10197] / [i915#10211] / [i915#4079]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-2/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][12] ([i915#4077]) +2 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#4079]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-dg1-7/igt@gem_tiled_pread_basic.html - bat-arls-2: NOTRUN -> [SKIP][14] ([i915#10206] / [i915#4079]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-2/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][15] ([i915#6621]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-dg1-7/igt@i915_pm_...@basic-api.html - bat-arls-2: NOTRUN -> [SKIP][16] ([i915#10209]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-2/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][17] ([i915#4212]) +7 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-dg1-7/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-arls-2: NOTRUN -> [SKIP][18] ([i915#10200]) +9 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-arls-2/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-7: NOTRUN -> [SKIP][19] ([i915#4215]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/bat-dg1-7/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-glk-j4005: NOTRUN -> [SKIP][20] ([fdo#109271]) +10 other tests skip [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130714v1/fi-glk
✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostly
== Series Details == Series: drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostly URL : https://patchwork.freedesktop.org/series/130714/ State : warning == Summary == Error: dim checkpatch failed 916e57569f78 drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostly -:37: WARNING:COMMIT_LOG_USE_LINK: Unknown link reference 'References:', use 'Link:' or 'Closes:' instead #37: References: https://gitlab.freedesktop.org/drm/intel/-/issues/10071 total: 0 errors, 1 warnings, 0 checks, 74 lines checked
Re: [RESEND v3 0/2] drm: enable W=1 warnings by default across the subsystem
On Tue, 05 Mar 2024, Lucas De Marchi wrote: > On Tue, Mar 05, 2024 at 07:43:07PM +0200, Jani Nikula wrote: >>Thanks everyone for acks and reviews, pushed to drm-misc-next. > > should we start removing the now duplicate ones in i915 and xe? After the drm-misc-next to drm-next merge and subsequent backmerge to drm-intel-next and drm-xe-next i.e. sometime after the merge window. BR, Jani. -- Jani Nikula, Intel
Re: Regression on linux-next (next-20240228)
On Tue, Mar 05, 2024 at 06:49:16AM +, Borah, Chaitanya Kumar wrote:
> Issue is still seen with the following changes
>
> void put_pages_list(struct list_head *pages)
>
> folio_batch_init(&fbatch);
> list_for_each_entry(folio, pages, lru) {
> - if (!folio_put_testzero(folio))
> + if (!folio_put_testzero(folio)) {
> + list_del(&folio->lru);
> continue;
> + }
> if (folio_test_large(folio)) {
> __folio_put_large(folio);
> + list_del(&folio->lru);
> continue;
> }
Thanks for testing. Sorry about this. I think I figured out what
the problem actually is. I switched from list_for_each_entry_safe()
to list_for_each_entry() since I was no longer deleting the entries
from the list. Unfortunately, I was still freeing the entries as I
walked the list! So it would dereference folio->lru.next after giving
folio back to the page allocator (which probably put it on the PCP list,
where it would point to another free folio?)
Anyway, this should do the job, without the change I asked you to test
above. If this doesn't do the job by itself, you could try combining
the two changes, but I don't think that will be necessary.
diff --git a/mm/swap.c b/mm/swap.c
index a910af21ba68..1d4b7713605d 100644
--- a/mm/swap.c
+++ b/mm/swap.c
@@ -139,10 +139,10 @@ EXPORT_SYMBOL(__folio_put);
void put_pages_list(struct list_head *pages)
{
struct folio_batch fbatch;
- struct folio *folio;
+ struct folio *folio, *next;
folio_batch_init(&fbatch);
- list_for_each_entry(folio, pages, lru) {
+ list_for_each_entry_safe(folio, next, pages, lru) {
if (!folio_put_testzero(folio))
continue;
if (folio_test_hugetlb(folio)) {
Re: [RESEND v3 0/2] drm: enable W=1 warnings by default across the subsystem
On Tue, Mar 05, 2024 at 07:43:07PM +0200, Jani Nikula wrote: On Tue, 05 Mar 2024, "Maxime Ripard" wrote: On Tue, 5 Mar 2024 11:07:34 +0200, Jani Nikula wrote: Resend of [1] with an intent to merge after the CI results come in. This is aiming for v6.10, so we'll have maximal time to find all the issues my configs didn't catch. I built this on x86-64 (both gcc and clang), arm and arm64, and [ ... ] Acked-by: Maxime Ripard Thanks everyone for acks and reviews, pushed to drm-misc-next. should we start removing the now duplicate ones in i915 and xe? Lucas De Marchi BR, Jani. -- Jani Nikula, Intel
Re: [RESEND v3 0/2] drm: enable W=1 warnings by default across the subsystem
On Tue, 05 Mar 2024, "Maxime Ripard" wrote: > On Tue, 5 Mar 2024 11:07:34 +0200, Jani Nikula wrote: >> Resend of [1] with an intent to merge after the CI results come in. This >> is aiming for v6.10, so we'll have maximal time to find all the issues >> my configs didn't catch. >> >> I built this on x86-64 (both gcc and clang), arm and arm64, and >> >> [ ... ] > > Acked-by: Maxime Ripard Thanks everyone for acks and reviews, pushed to drm-misc-next. BR, Jani. -- Jani Nikula, Intel
Re: [PATCH] drm/i915/selftests: Fix dependency of some timeouts on HZ
Hi Janusz,
On Thu, Feb 22, 2024 at 12:32:40PM +0100, Janusz Krzysztofik wrote:
> Third argument of i915_request_wait() accepts a timeout value in jiffies.
> Most users pass either a simple HZ based expression, or a result of
> msecs_to_jiffies(), or MAX_SCHEDULE_TIMEOUT, or a very small number not
> exceeding 4 if applicable as that value. However, there is one user --
> intel_selftest_wait_for_rq() -- that passes a WAIT_FOR_RESET_TIME symbol,
> defined as a large constant value that most probably represents a desired
> timeout in ms. While that usage results in the intended value of timeout
> on usual x86_64 kernel configurations, it is not portable across different
> architectures and custom kernel configs.
>
> Rename the symbol to clearly indicate intended units and convert it to
> jiffies before use.
>
> Fixes: 3a4bfa091c46 ("drm/i915/selftest: Fix workarounds selftest for GuC
> submission")
> Signed-off-by: Janusz Krzysztofik
> Cc: Rahul Kumar Singh
> Cc: John Harrison
> Cc: Matthew Brost
pushed in drm-intel-gt-next.
Thank you,
Andi
Re: [PATCH] drm/i915/selftest_hangcheck: Check sanity with more patience
Hi Janusz, On Wed, Feb 28, 2024 at 04:24:41PM +0100, Janusz Krzysztofik wrote: > While trying to reproduce some other issues reported by CI for i915 > hangcheck live selftest, I found them hidden behind timeout failures > reported by igt_hang_sanitycheck -- the very first hangcheck test case > executed. > > Feb 22 19:49:06 DUT1394ACMR kernel: calling mei_gsc_driver_init+0x0/0xff0 > [mei_gsc] @ 121074 > Feb 22 19:49:06 DUT1394ACMR kernel: i915 :03:00.0: [drm] DRM_I915_DEBUG > enabled > Feb 22 19:49:06 DUT1394ACMR kernel: i915 :03:00.0: [drm] Cannot find any > crtc or sizes > Feb 22 19:49:06 DUT1394ACMR kernel: probe of i915.mei-gsc.768 returned 0 > after 1475 usecs > Feb 22 19:49:06 DUT1394ACMR kernel: probe of i915.mei-gscfi.768 returned 0 > after 1441 usecs > Feb 22 19:49:06 DUT1394ACMR kernel: initcall mei_gsc_driver_init+0x0/0xff0 > [mei_gsc] returned 0 after 3010 usecs > Feb 22 19:49:06 DUT1394ACMR kernel: i915 :03:00.0: [drm] > DRM_I915_DEBUG_GEM enabled > Feb 22 19:49:06 DUT1394ACMR kernel: i915 :03:00.0: [drm] > DRM_I915_DEBUG_RUNTIME_PM enabled > Feb 22 19:49:06 DUT1394ACMR kernel: i915: Performing live selftests with > st_random_seed=0x4c26c048 st_timeout=500 > Feb 22 19:49:07 DUT1394ACMR kernel: i915: Running hangcheck > Feb 22 19:49:07 DUT1394ACMR kernel: calling mei_hdcp_driver_init+0x0/0xff0 > [mei_hdcp] @ 121074 > Feb 22 19:49:07 DUT1394ACMR kernel: i915: Running > intel_hangcheck_live_selftests/igt_hang_sanitycheck > Feb 22 19:49:07 DUT1394ACMR kernel: probe of > :00:16.0-b638ab7e-94e2-4ea2-a552-d1c54b627f04 returned 0 after 1398 usecs > Feb 22 19:49:07 DUT1394ACMR kernel: probe of > i915.mei-gsc.768-b638ab7e-94e2-4ea2-a552-d1c54b627f04 returned 0 after 97 > usecs > Feb 22 19:49:07 DUT1394ACMR kernel: initcall mei_hdcp_driver_init+0x0/0xff0 > [mei_hdcp] returned 0 after 101960 usecs > Feb 22 19:49:07 DUT1394ACMR kernel: calling mei_pxp_driver_init+0x0/0xff0 > [mei_pxp] @ 121094 > Feb 22 19:49:07 DUT1394ACMR kernel: probe of > :00:16.0-fbf6fcf1-96cf-4e2e-a6a6-1bab8cbe36b1 returned 0 after 435 usecs > Feb 22 19:49:07 DUT1394ACMR kernel: mei_pxp > i915.mei-gsc.768-fbf6fcf1-96cf-4e2e-a6a6-1bab8cbe36b1: bound :03:00.0 > (ops i915_pxp_tee_component_ops [i915]) > Feb 22 19:49:07 DUT1394ACMR kernel: 100ms wait for request failed on rcs0, > err=-62 > Feb 22 19:49:07 DUT1394ACMR kernel: probe of > i915.mei-gsc.768-fbf6fcf1-96cf-4e2e-a6a6-1bab8cbe36b1 returned 0 after 158425 > usecs > Feb 22 19:49:07 DUT1394ACMR kernel: initcall mei_pxp_driver_init+0x0/0xff0 > [mei_pxp] returned 0 after 224159 usecs > Feb 22 19:49:07 DUT1394ACMR kernel: i915/intel_hangcheck_live_selftests: > igt_hang_sanitycheck failed with error -5 > Feb 22 19:49:07 DUT1394ACMR kernel: i915: probe of :03:00.0 failed with > error -5 > > Those request waits, once timed out after 100ms, have never been > confirmed to still persist over another 100ms, always being able to > complete within the originally requested wait time doubled. > > Taking into account potentially significant additional concurrent workload > generated by new auxiliary drivers that didn't exist before and now are > loaded in parallel with the i915 module also when loaded in selftest mode, > relax our expectations on time consumed by the sanity check request before > it completes. > > Signed-off-by: Janusz Krzysztofik pushed to drm-intel-gt-next. Thank you, Andi
Re: [PATCH] drm/i915/display: Disable AuxCCS framebuffers if built for Xe
On Wed, 28 Feb 2024, Juha-Pekka Heikkila wrote:
> AuxCCS framebuffers don't work on Xe driver hence disable them
> from plane capabilities until they are fixed. FlatCCS framebuffers
> work and they are left enabled. CCS is left untouched for i915
> driver.
>
> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/933
> Signed-off-by: Juha-Pekka Heikkila
Acked-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index e941e2e4fd14..860574d04f88 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2295,6 +2295,9 @@ static u8 skl_get_plane_caps(struct drm_i915_private
> *i915,
> if (HAS_4TILE(i915))
> caps |= INTEL_PLANE_CAP_TILING_4;
>
> + if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(i915))
> + return caps;
> +
> if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) {
> caps |= INTEL_PLANE_CAP_CCS_RC;
> if (DISPLAY_VER(i915) >= 12)
--
Jani Nikula, Intel
Re: [PATCH v7 2/6] drm/i915: Unregister in-kernel clients
On Tue, 05 Mar 2024, Rodrigo Vivi wrote:
> On Fri, Mar 01, 2024 at 02:42:55PM +0100, Thomas Zimmermann wrote:
>> Unregister all in-kernel clients before unloading the i915 driver. For
>> other drivers, drm_dev_unregister() does this automatically. As i915
>> does not use this helper, it has to perform the call by itself. For xe,
>> do the same in xe_device_remove()
>>
>> Note that there are currently no in-kernel clients in i915 or xe. The
>> patch prepares the drivers for a related update of their fbdev support.
>>
>> v7:
>> * update xe driver
>>
>> Signed-off-by: Thomas Zimmermann
>> ---
>> drivers/gpu/drm/i915/i915_driver.c | 3 +++
>> drivers/gpu/drm/xe/xe_device.c | 3 +++
>> 2 files changed, 6 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_driver.c
>> b/drivers/gpu/drm/i915/i915_driver.c
>> index 9ee902d5b72c4..97910a85e3917 100644
>> --- a/drivers/gpu/drm/i915/i915_driver.c
>> +++ b/drivers/gpu/drm/i915/i915_driver.c
>> @@ -41,6 +41,7 @@
>>
>> #include
>> #include
>> +#include
>> #include
>> #include
>> #include
>> @@ -852,6 +853,8 @@ void i915_driver_remove(struct drm_i915_private *i915)
>> {
>> intel_wakeref_t wakeref;
>>
>> +drm_client_dev_unregister(&i915->drm);
>> +
>> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>>
>> i915_driver_unregister(i915);
>> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>> index 919ad88f0495a..7f41f0ec819f0 100644
>> --- a/drivers/gpu/drm/xe/xe_device.c
>> +++ b/drivers/gpu/drm/xe/xe_device.c
>
> probably deserves a separate patch since this is one here is named 'drm/i915:'
Or do this for both in intel_display_driver_unregister()?
BR,
Jani.
>
>> @@ -9,6 +9,7 @@
>>
>> #include
>> #include
>> +#include
>> #include
>> #include
>> #include
>> @@ -614,6 +615,8 @@ void xe_device_remove(struct xe_device *xe)
>> struct xe_gt *gt;
>> u8 id;
>>
>> +drm_client_dev_unregister(&xe->drm);
>> +
>> xe_device_remove_display(xe);
>>
>> xe_display_fini(xe);
>> --
>> 2.43.2
>>
--
Jani Nikula, Intel
Re: [PATCH v7 2/6] drm/i915: Unregister in-kernel clients
On Fri, Mar 01, 2024 at 02:42:55PM +0100, Thomas Zimmermann wrote:
> Unregister all in-kernel clients before unloading the i915 driver. For
> other drivers, drm_dev_unregister() does this automatically. As i915
> does not use this helper, it has to perform the call by itself. For xe,
> do the same in xe_device_remove()
>
> Note that there are currently no in-kernel clients in i915 or xe. The
> patch prepares the drivers for a related update of their fbdev support.
>
> v7:
> * update xe driver
>
> Signed-off-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/i915/i915_driver.c | 3 +++
> drivers/gpu/drm/xe/xe_device.c | 3 +++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c
> b/drivers/gpu/drm/i915/i915_driver.c
> index 9ee902d5b72c4..97910a85e3917 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -41,6 +41,7 @@
>
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -852,6 +853,8 @@ void i915_driver_remove(struct drm_i915_private *i915)
> {
> intel_wakeref_t wakeref;
>
> + drm_client_dev_unregister(&i915->drm);
> +
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> i915_driver_unregister(i915);
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 919ad88f0495a..7f41f0ec819f0 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
probably deserves a separate patch since this is one here is named 'drm/i915:'
> @@ -9,6 +9,7 @@
>
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -614,6 +615,8 @@ void xe_device_remove(struct xe_device *xe)
> struct xe_gt *gt;
> u8 id;
>
> + drm_client_dev_unregister(&xe->drm);
> +
> xe_device_remove_display(xe);
>
> xe_display_fini(xe);
> --
> 2.43.2
>
[PATCH v3 4/4] drm/ttm: Allow continued swapout after -ENOSPC falure
The -ENOSPC failure from ttm_bo_swapout() meant that the lru_lock
was dropped and simply restarting the iteration meant we'd likely
hit the same error again on the same resource. Now that we can
restart the iteration even if the lock was dropped, do that.
Cc: Christian König
Cc: Somalapuram Amaranath
Cc:
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/ttm/ttm_device.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index e8a6a1dab669..4a030b4bc848 100644
--- a/drivers/gpu/drm/ttm/ttm_device.c
+++ b/drivers/gpu/drm/ttm/ttm_device.c
@@ -168,15 +168,20 @@ int ttm_device_swapout(struct ttm_device *bdev, struct
ttm_operation_ctx *ctx,
num_pages = PFN_UP(bo->base.size);
ret = ttm_bo_swapout(bo, ctx, gfp_flags);
- /* ttm_bo_swapout has dropped the lru_lock */
- if (!ret) {
- ttm_resource_cursor_fini(&cursor);
- return num_pages;
- }
- if (ret != -EBUSY) {
- ttm_resource_cursor_fini(&cursor);
- return ret;
+ /* Couldn't swap out, and retained the lru_lock */
+ if (ret == -EBUSY)
+ continue;
+ /* Couldn't swap out and dropped the lru_lock */
+ if (ret == -ENOSPC) {
+ spin_lock(&bdev->lru_lock);
+ continue;
}
+ /*
+* Dropped the lock and either succeeded or
+* hit an error that forces us to break.
+*/
+ ttm_resource_cursor_fini(&cursor);
+ return ret ? ret : num_pages;
}
}
ttm_resource_cursor_fini_locked(&cursor);
--
2.44.0
[PATCH v3 1/4] drm/ttm: Allow TTM LRU list nodes of different types
To be able to handle list unlocking while traversing the LRU
list, we want the iterators not only to point to the next
position of the list traversal, but to insert themselves as
list nodes at that point to work around the fact that the
next node might otherwise disappear from the list while
the iterator is pointing to it.
These list nodes need to be easily distinguishable from other
list nodes so that others traversing the list can skip
over them.
So declare a struct ttm_lru_item, with a struct list_head member
and a type enum. This will slightly increase the size of a
struct ttm_resource.
v2:
- Update enum ttm_lru_item_type documentation.
Cc: Christian König
Cc: Somalapuram Amaranath
Cc:
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/ttm/ttm_device.c | 13 --
drivers/gpu/drm/ttm/ttm_resource.c | 70 ++
include/drm/ttm/ttm_resource.h | 51 +-
3 files changed, 110 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index 76027960054f..f27406e851e5 100644
--- a/drivers/gpu/drm/ttm/ttm_device.c
+++ b/drivers/gpu/drm/ttm/ttm_device.c
@@ -270,17 +270,22 @@ EXPORT_SYMBOL(ttm_device_fini);
static void ttm_device_clear_lru_dma_mappings(struct ttm_device *bdev,
struct list_head *list)
{
- struct ttm_resource *res;
+ struct ttm_lru_item *lru;
spin_lock(&bdev->lru_lock);
- while ((res = list_first_entry_or_null(list, typeof(*res), lru))) {
- struct ttm_buffer_object *bo = res->bo;
+ while ((lru = list_first_entry_or_null(list, typeof(*lru), link))) {
+ struct ttm_buffer_object *bo;
+
+ if (!ttm_lru_item_is_res(lru))
+ continue;
+
+ bo = ttm_lru_item_to_res(lru)->bo;
/* Take ref against racing releases once lru_lock is unlocked */
if (!ttm_bo_get_unless_zero(bo))
continue;
- list_del_init(&res->lru);
+ list_del_init(&bo->resource->lru.link);
spin_unlock(&bdev->lru_lock);
if (bo->ttm)
diff --git a/drivers/gpu/drm/ttm/ttm_resource.c
b/drivers/gpu/drm/ttm/ttm_resource.c
index 65155f2013ca..ee1865f82cb4 100644
--- a/drivers/gpu/drm/ttm/ttm_resource.c
+++ b/drivers/gpu/drm/ttm/ttm_resource.c
@@ -69,8 +69,8 @@ void ttm_lru_bulk_move_tail(struct ttm_lru_bulk_move *bulk)
dma_resv_assert_held(pos->last->bo->base.resv);
man = ttm_manager_type(pos->first->bo->bdev, i);
- list_bulk_move_tail(&man->lru[j], &pos->first->lru,
- &pos->last->lru);
+ list_bulk_move_tail(&man->lru[j], &pos->first->lru.link,
+ &pos->last->lru.link);
}
}
}
@@ -83,14 +83,38 @@ ttm_lru_bulk_move_pos(struct ttm_lru_bulk_move *bulk,
struct ttm_resource *res)
return &bulk->pos[res->mem_type][res->bo->priority];
}
+/* Return the previous resource on the list (skip over non-resource list
items) */
+static struct ttm_resource *ttm_lru_prev_res(struct ttm_resource *cur)
+{
+ struct ttm_lru_item *lru = &cur->lru;
+
+ do {
+ lru = list_prev_entry(lru, link);
+ } while (!ttm_lru_item_is_res(lru));
+
+ return ttm_lru_item_to_res(lru);
+}
+
+/* Return the next resource on the list (skip over non-resource list items) */
+static struct ttm_resource *ttm_lru_next_res(struct ttm_resource *cur)
+{
+ struct ttm_lru_item *lru = &cur->lru;
+
+ do {
+ lru = list_next_entry(lru, link);
+ } while (!ttm_lru_item_is_res(lru));
+
+ return ttm_lru_item_to_res(lru);
+}
+
/* Move the resource to the tail of the bulk move range */
static void ttm_lru_bulk_move_pos_tail(struct ttm_lru_bulk_move_pos *pos,
struct ttm_resource *res)
{
if (pos->last != res) {
if (pos->first == res)
- pos->first = list_next_entry(res, lru);
- list_move(&res->lru, &pos->last->lru);
+ pos->first = ttm_lru_next_res(res);
+ list_move(&res->lru.link, &pos->last->lru.link);
pos->last = res;
}
}
@@ -120,11 +144,11 @@ static void ttm_lru_bulk_move_del(struct
ttm_lru_bulk_move *bulk,
pos->first = NULL;
pos->last = NULL;
} else if (pos->first == res) {
- pos->first = list_next_entry(res, lru);
+ pos->first = ttm_lru_next_res(res);
} else if (pos->last == res) {
- pos->last = list_prev_entry(res, lru);
+ pos->last = ttm_lru_prev_res(res);
} else {
- list_move(&res->lru, &pos->last->lru);
+ list_move(&res->lru.link, &pos->last-
[PATCH v3 3/4] drm/ttm, drm/amdgpu, drm/xe: Consider hitch moves within bulk sublist moves
To address the problem with hitches moving when bulk move
sublists are lru-bumped, register the list cursors with the
ttm_lru_bulk_move structure when traversing its list, and
when lru-bumping the list, move the cursor hitch to the tail.
This also means it's mandatory for drivers to call
ttm_lru_bulk_move_init() and ttm_lru_bulk_move_fini() when
initializing and finalizing the bulk move structure, so add
those calls to the amdgpu- and xe driver.
Compared to v1 this is slightly more code but less fragile
and hopefully easier to understand.
v2:
- Completely rework the functionality
v3:
- Avoid a NULL pointer dereference assigning manager->mem_type
Cc: Christian König
Cc: Somalapuram Amaranath
Cc:
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++
drivers/gpu/drm/ttm/ttm_resource.c | 90 +-
drivers/gpu/drm/xe/xe_vm.c | 4 ++
include/drm/ttm/ttm_device.h | 5 ++
include/drm/ttm/ttm_resource.h | 55 ++--
5 files changed, 137 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index ed4a8c5d26d7..7c2ee5d12bc1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2264,6 +2264,8 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct
amdgpu_vm *vm,
if (r)
return r;
+ ttm_lru_bulk_move_init(&vm->lru_bulk_move);
+
vm->pte_support_ats = false;
vm->is_compute_context = false;
@@ -2324,6 +2326,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct
amdgpu_vm *vm,
error_free_delayed:
dma_fence_put(vm->last_tlb_flush);
dma_fence_put(vm->last_unlocked);
+ ttm_lru_bulk_move_fini(&adev->mman.bdev, &vm->lru_bulk_move);
amdgpu_vm_fini_entities(vm);
return r;
@@ -2497,6 +2500,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct
amdgpu_vm *vm)
}
}
+ ttm_lru_bulk_move_fini(&adev->mman.bdev, &vm->lru_bulk_move);
}
/**
diff --git a/drivers/gpu/drm/ttm/ttm_resource.c
b/drivers/gpu/drm/ttm/ttm_resource.c
index 971014fca10a..0acd4bf764b2 100644
--- a/drivers/gpu/drm/ttm/ttm_resource.c
+++ b/drivers/gpu/drm/ttm/ttm_resource.c
@@ -32,6 +32,49 @@
#include
+/* Detach the cursor from the bulk move list*/
+static void
+ttm_resource_cursor_clear_bulk(struct ttm_resource_cursor *cursor)
+{
+ cursor->bulk = NULL;
+ list_del_init(&cursor->bulk_link);
+}
+
+/* Move the cursor to the end of the bulk move list it's in */
+static void ttm_resource_cursor_move_bulk_tail(struct ttm_lru_bulk_move *bulk,
+ struct ttm_resource_cursor
*cursor)
+{
+ struct ttm_lru_bulk_move_pos *pos;
+
+ if (WARN_ON_ONCE(bulk != cursor->bulk)) {
+ list_del_init(&cursor->bulk_link);
+ return;
+ }
+
+ pos = &bulk->pos[cursor->man->mem_type][cursor->priority];
+ if (pos)
+ list_move(&cursor->hitch.link, &pos->last->lru.link);
+ ttm_resource_cursor_clear_bulk(cursor);
+}
+
+/* Move all cursors attached to a bulk move to its end */
+static void ttm_bulk_move_adjust_cursors(struct ttm_lru_bulk_move *bulk)
+{
+ struct ttm_resource_cursor *cursor, *next;
+
+ list_for_each_entry_safe(cursor, next, &bulk->cursor_list, bulk_link)
+ ttm_resource_cursor_move_bulk_tail(bulk, cursor);
+}
+
+/* Remove a cursor from an empty bulk move list */
+static void ttm_bulk_move_drop_cursors(struct ttm_lru_bulk_move *bulk)
+{
+ struct ttm_resource_cursor *cursor, *next;
+
+ list_for_each_entry_safe(cursor, next, &bulk->cursor_list, bulk_link)
+ ttm_resource_cursor_clear_bulk(cursor);
+}
+
/**
* ttm_resource_cursor_fini_locked() - Finalize the LRU list cursor usage
* @cursor: The struct ttm_resource_cursor to finalize.
@@ -44,6 +87,7 @@ void ttm_resource_cursor_fini_locked(struct
ttm_resource_cursor *cursor)
{
lockdep_assert_held(&cursor->man->bdev->lru_lock);
list_del_init(&cursor->hitch.link);
+ ttm_resource_cursor_clear_bulk(cursor);
}
/**
@@ -72,9 +116,27 @@ void ttm_resource_cursor_fini(struct ttm_resource_cursor
*cursor)
void ttm_lru_bulk_move_init(struct ttm_lru_bulk_move *bulk)
{
memset(bulk, 0, sizeof(*bulk));
+ INIT_LIST_HEAD(&bulk->cursor_list);
}
EXPORT_SYMBOL(ttm_lru_bulk_move_init);
+/**
+ * ttm_lru_bulk_move_fini - finalize a bulk move structure
+ * @bdev: The struct ttm_device
+ * @bulk: the structure to finalize
+ *
+ * Sanity checks that bulk moves don't have any
+ * resources left and hence no cursors attached.
+ */
+void ttm_lru_bulk_move_fini(struct ttm_device *bdev,
+ struct ttm_lru_bulk_move *bulk)
+{
+ spin_lock(&bdev->lru_lock);
+ ttm_bulk_move_drop_cursors(bulk);
+ spin_unlock(&bdev->lru_lock);
+}
+EXPORT_SYMBOL(ttm_l
[PATCH v3 2/4] drm/ttm: Use LRU hitches
Have iterators insert themselves into the list they are iterating
over using hitch list nodes. Since only the iterator owner
can remove these list nodes from the list, it's safe to unlock
the list and when continuing, use them as a starting point. Due to
the way LRU bumping works in TTM, newly added items will not be
missed, and bumped items will be iterated over a second time before
reaching the end of the list.
The exception is list with bulk move sublists. When bumping a
sublist, a hitch that is part of that sublist will also be moved
and we might miss items if restarting from it. This will be
addressed in a later patch.
v2:
- Updated ttm_resource_cursor_fini() documentation.
Cc: Christian König
Cc: Somalapuram Amaranath
Cc:
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/ttm/ttm_bo.c | 1 +
drivers/gpu/drm/ttm/ttm_device.c | 9 ++-
drivers/gpu/drm/ttm/ttm_resource.c | 94 --
include/drm/ttm/ttm_resource.h | 16 +++--
4 files changed, 82 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index e059b1e1b13b..b6f75a0ff2e5 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -622,6 +622,7 @@ int ttm_mem_evict_first(struct ttm_device *bdev,
if (locked)
dma_resv_unlock(res->bo->base.resv);
}
+ ttm_resource_cursor_fini_locked(&cursor);
if (!bo) {
if (busy_bo && !ttm_bo_get_unless_zero(busy_bo))
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index f27406e851e5..e8a6a1dab669 100644
--- a/drivers/gpu/drm/ttm/ttm_device.c
+++ b/drivers/gpu/drm/ttm/ttm_device.c
@@ -169,12 +169,17 @@ int ttm_device_swapout(struct ttm_device *bdev, struct
ttm_operation_ctx *ctx,
num_pages = PFN_UP(bo->base.size);
ret = ttm_bo_swapout(bo, ctx, gfp_flags);
/* ttm_bo_swapout has dropped the lru_lock */
- if (!ret)
+ if (!ret) {
+ ttm_resource_cursor_fini(&cursor);
return num_pages;
- if (ret != -EBUSY)
+ }
+ if (ret != -EBUSY) {
+ ttm_resource_cursor_fini(&cursor);
return ret;
+ }
}
}
+ ttm_resource_cursor_fini_locked(&cursor);
spin_unlock(&bdev->lru_lock);
return 0;
}
diff --git a/drivers/gpu/drm/ttm/ttm_resource.c
b/drivers/gpu/drm/ttm/ttm_resource.c
index ee1865f82cb4..971014fca10a 100644
--- a/drivers/gpu/drm/ttm/ttm_resource.c
+++ b/drivers/gpu/drm/ttm/ttm_resource.c
@@ -32,6 +32,37 @@
#include
+/**
+ * ttm_resource_cursor_fini_locked() - Finalize the LRU list cursor usage
+ * @cursor: The struct ttm_resource_cursor to finalize.
+ *
+ * The function pulls the LRU list cursor off any lists it was previusly
+ * attached to. Needs to be called with the LRU lock held. The function
+ * can be called multiple times after eachother.
+ */
+void ttm_resource_cursor_fini_locked(struct ttm_resource_cursor *cursor)
+{
+ lockdep_assert_held(&cursor->man->bdev->lru_lock);
+ list_del_init(&cursor->hitch.link);
+}
+
+/**
+ * ttm_resource_cursor_fini() - Finalize the LRU list cursor usage
+ * @cursor: The struct ttm_resource_cursor to finalize.
+ *
+ * The function pulls the LRU list cursor off any lists it was previusly
+ * attached to. Needs to be called without the LRU list lock held. The
+ * function can be called multiple times after eachother.
+ */
+void ttm_resource_cursor_fini(struct ttm_resource_cursor *cursor)
+{
+ spinlock_t *lru_lock = &cursor->man->bdev->lru_lock;
+
+ spin_lock(lru_lock);
+ ttm_resource_cursor_fini_locked(cursor);
+ spin_unlock(lru_lock);
+}
+
/**
* ttm_lru_bulk_move_init - initialize a bulk move structure
* @bulk: the structure to init
@@ -483,62 +514,63 @@ void ttm_resource_manager_debug(struct
ttm_resource_manager *man,
EXPORT_SYMBOL(ttm_resource_manager_debug);
/**
- * ttm_resource_manager_first
- *
- * @man: resource manager to iterate over
+ * ttm_resource_manager_next() - Continue iterating over the resource manager
+ * resources
* @cursor: cursor to record the position
*
- * Returns the first resource from the resource manager.
+ * Return: The next resource from the resource manager.
*/
struct ttm_resource *
-ttm_resource_manager_first(struct ttm_resource_manager *man,
- struct ttm_resource_cursor *cursor)
+ttm_resource_manager_next(struct ttm_resource_cursor *cursor)
{
+ struct ttm_resource_manager *man = cursor->man;
struct ttm_lru_item *lru;
lockdep_assert_held(&man->bdev->lru_lock);
- for (cursor->priority = 0; cursor->priority < TTM_MAX_BO_PRIORITY;
-++cursor->prio
[PATCH v3 0/4] TTM unlockable restartable LRU list iteration
This patch-set is a prerequisite for a standalone TTM shrinker and for exhaustive TTM eviction using sleeping dma_resv locks, which is the motivation for it. Currently when unlocking the TTM lru list lock, iteration needs to be restarted from the beginning, rather from the next LRU list node. This can potentially be a big problem, because if eviction or shrinking fails for whatever reason after unlock, restarting is likely to cause the same failure over and over again. There are various schemes to be able to continue the list iteration from where we left off. One such scheme used by the GEM LRU list traversal is to pull items already considered off the LRU list and reinsert them when iteration is done. This has the drawback that concurrent list iteration doesn't see the complete list (which is bad for exhaustive eviction) and also doesn't lend itself well to bulk-move sublists since these will be split in the process where items from those lists are temporarily pulled from the list and moved to the list tail. The approach taken here is that list iterators insert themselves into the list next position using a special list node. Iteration is then using that list node as starting point when restarting. Concurrent iterators just skip over the special list nodes. This is implemented in patch 1 and 2. For bulk move sublist the approach is the same, but when a bulk move sublist is moved to the tail, the iterator is also moved, causing us to skip parts of the list. That is undesirable. Patch 3 deals with that, and when iterator detects it is traversing a sublist, it registers with the ttm_lru_bulk_move struct using a linked list, and when that bulk move sublist is moved to the tail, any iterator registered with it will first be moved to the tail of the sublist. This is implemented in patch 3. The restartable property is used in patch 4 to restart swapout if needed, but the main purpose is this paves the way for shrinker- and exhaustive eviction. v2: - Rework patch 3 completely. v3: - Fix a NULL pointer dereference found by Xe CI. Cc: Somalapuram Amaranath Cc: Christian König Cc: Thomas Hellström (4): drm/ttm: Allow TTM LRU list nodes of different types drm/ttm: Use LRU hitches drm/ttm, drm/amdgpu, drm/xe: Consider hitch moves within bulk sublist moves drm/ttm: Allow continued swapout after -ENOSPC falure drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 + drivers/gpu/drm/ttm/ttm_bo.c | 1 + drivers/gpu/drm/ttm/ttm_device.c | 33 +++- drivers/gpu/drm/ttm/ttm_resource.c | 228 - drivers/gpu/drm/xe/xe_vm.c | 4 + include/drm/ttm/ttm_device.h | 5 + include/drm/ttm/ttm_resource.h | 96 +-- 7 files changed, 311 insertions(+), 60 deletions(-) -- 2.44.0
Re: [PATCH] drm/i915/scaler: Update Pipe src size check for DISPLAY_VER >= 12
On Mon, Feb 19, 2024 at 11:22:55AM +0530, Ankit Nautiyal wrote:
> For Earlier platforms, the Pipe source size is 12-bits so
> max pipe source width and height is 4096. For newer platforms it is
> 13-bits so theoretically max height is 8192, but maximum width
> supported on a single pipe is 5120, beyond which we need to use
> bigjoiner.
>
> Currently we are using max scaler source size to make sure that the
> pipe source size is programmed within limits, before using scaler.
> This creates a problem, for MTL where scaler source size is 4096, but
> max pipe source width can be 5120.
>
> Update the check to use the aforementioned limits.
>
> Signed-off-by: Ankit Nautiyal
> ---
> drivers/gpu/drm/i915/display/skl_scaler.c | 19 +++
> 1 file changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 8a934bada624..36342142efaa 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -115,6 +115,7 @@ skl_update_scaler(struct intel_crtc_state *crtc_state,
> bool force_detach,
> int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
> int min_src_w, min_src_h, min_dst_w, min_dst_h;
> int max_src_w, max_src_h, max_dst_w, max_dst_h;
> + int max_pipe_src_w, max_pipe_src_h;
>
> /*
>* Src coordinates are already rotated by 270 degrees for
> @@ -212,11 +213,21 @@ skl_update_scaler(struct intel_crtc_state *crtc_state,
> bool force_detach,
> /*
>* The pipe scaler does not use all the bits of PIPESRC, at least
>* on the earlier platforms. So even when we're scaling a plane
> - * the *pipe* source size must not be too large. For simplicity
> - * we assume the limits match the scaler source size limits. Might
> - * not be 100% accurate on all platforms, but good enough for now.
> + * the *pipe* source size must not be too large.
> + *
> + * For Earlier platforms, the Pipe source size is 12-bits so
> + * max pipe src width and height is 4096. For newer platforms it is
> 13-bits.
> + * Theoretically maximum pipe src height supported on a single pipe is
> 8192,
> + * but maximum pipe src width supported on a single pipe is 5120.
>*/
> - if (pipe_src_w > max_src_w || pipe_src_h > max_src_h) {
> + if (DISPLAY_VER(dev_priv) < 12) {
> + max_pipe_src_w = 4096;
> + max_pipe_src_h = 4096;
That doesn't seem right.
Hmm. We should probably we able to just switch this to check
against the max dst size instead of the max src size.
> + } else {
> + max_pipe_src_w = 5120;
> + max_pipe_src_h = 8192;
> + }
> + if (pipe_src_w > max_pipe_src_w || pipe_src_h > max_pipe_src_h) {
> drm_dbg_kms(&dev_priv->drm,
> "scaler_user index %u.%u: pipe src size %ux%u "
> "is out of scaler range\n",
> --
> 2.40.1
--
Ville Syrjälä
Intel
Re: [PATCH 3/4] drm/i915: Use pw_idx to derive PHY for ICL_LANE_ENABLE_AUX override
On Thu, Feb 29, 2024 at 10:03:56PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We don't actually know whether we should be picking the PHY
> simply based on the AUX_CH/power well, or based on the VBT
> defined AUX_CH->DDI->PHY relationship. At the moment we are
> doing the former for the ANAOVRD workaround, and the latter
> for the ICL_LANE_ENABLE_AUX override. Windows seems to use the
> first approach for everything. So let's unify this to follow
> that same approach for both.
>
> Eventually we should try to figure out which is actually
> correct, or whether any of this even matters (ie. whether there
> are any real machines where the DDI and its AUX_CH do not match
> 1:1).
>
> Note that this also changes the behaviour if we do end up
> poking an AUX power well not associated with any port (as
> per VBT). Previously we would have skipped the PHY register
> write, but now we always write it.
>
> Signed-off-by: Ville Syrjälä
> ---
> .../i915/display/intel_display_power_well.c | 21 +++
> 1 file changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index a1edac6ce31f..f25ad7d2c784 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -419,10 +419,12 @@ icl_combo_phy_aux_power_well_enable(struct
> drm_i915_private *dev_priv,
>
> intel_de_rmw(dev_priv, regs->driver, 0, HSW_PWR_WELL_CTL_REQ(pw_idx));
>
> - /* FIXME this is a mess */
> - if (phy != PHY_NONE)
> - intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy),
> - 0, ICL_LANE_ENABLE_AUX);
> + /*
> + * FIXME not sure if we should derive the PHY from the pw_idx, or
> + * from the VBT defined AUX_CH->DDI->PHY mapping.
> + */
> + intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(ICL_AUX_PW_TO_PHY(pw_idx)),
> + 0, ICL_LANE_ENABLE_AUX);
I wonder if the same PW -> PHY mapping could be used in
icl_aux_power_well_enable/disable() as well (to make it more consistent
if there is no encoder using the PW). Cross connecting combo, TC PHY AUX
channels doesn't work anyway I think (maybe this could be actually
checked in intel_bios_dp_aux_ch()).
On the patchset:
Reviewed-by: Imre Deak
>
> hsw_wait_for_power_well_enable(dev_priv, power_well, false);
>
> @@ -439,14 +441,15 @@ icl_combo_phy_aux_power_well_disable(struct
> drm_i915_private *dev_priv,
> {
> const struct i915_power_well_regs *regs = power_well->desc->ops->regs;
> int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
> - enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well);
>
> drm_WARN_ON(&dev_priv->drm, !IS_ICELAKE(dev_priv));
>
> - /* FIXME this is a mess */
> - if (phy != PHY_NONE)
> - intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(phy),
> - ICL_LANE_ENABLE_AUX, 0);
> + /*
> + * FIXME not sure if we should derive the PHY from the pw_idx, or
> + * from the VBT defined AUX_CH->DDI->PHY mapping.
> + */
> + intel_de_rmw(dev_priv, ICL_PORT_CL_DW12(ICL_AUX_PW_TO_PHY(pw_idx)),
> + ICL_LANE_ENABLE_AUX, 0);
>
> intel_de_rmw(dev_priv, regs->driver, HSW_PWR_WELL_CTL_REQ(pw_idx), 0);
>
> --
> 2.43.0
>
Re: [PATCH v7 2/3] drm/i915: Remove extra multi-gt pm-references
On 3/5/2024 3:35 PM, Janusz Krzysztofik wrote:
There was an attempt to fix an issue of illegal attempts to free a still
active i915 VMA object when parking a GT believed to be idle, reported by
CI on 2-GT Meteor Lake. As a solution, an extra wakeref for a Primary GT
was acquired from i915_gem_do_execbuffer() -- see commit f56fe3e91787
("drm/i915: Fix a VMA UAF for multi-gt platform").
However, that fix occurred insufficient -- the issue was still reported by
CI. That wakeref was released on exit from i915_gem_do_execbuffer(), then
potentially before completion of the request and deactivation of its
associated VMAs. Moreover, CI reports indicated that single-GT platforms
also suffered sporadically from the same race.
Since the issue has now been fixed by a preceding patch "drm/i915/vma: Fix
UAF on destroy against retire race", drop the no longer useful changes
introduced by that insufficient fix.
v3: Also drop the no longer used .wakeref_gt0 field from struct
i915_execbuffer.
v2: Avoid the word "revert" in commit message (Rodrigo),
- update commit description reusing relevant chunks dropped from the
description of the proper fix (Rodrigo).
Signed-off-by: Janusz Krzysztofik
Cc: Nirmoy Das
Cc: Rodrigo Vivi
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index d3a771afb083e..3f20fe3811999 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -255,7 +255,6 @@ struct i915_execbuffer {
struct intel_context *context; /* logical state for the request */
struct i915_gem_context *gem_context; /** caller's context */
intel_wakeref_t wakeref;
- intel_wakeref_t wakeref_gt0;
/** our requests to build */
struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];
@@ -2686,7 +2685,6 @@ static int
eb_select_engine(struct i915_execbuffer *eb)
{
struct intel_context *ce, *child;
- struct intel_gt *gt;
unsigned int idx;
int err;
@@ -2710,17 +2708,10 @@ eb_select_engine(struct i915_execbuffer *eb)
}
}
eb->num_batches = ce->parallel.number_children + 1;
- gt = ce->engine->gt;
for_each_child(ce, child)
intel_context_get(child);
eb->wakeref = intel_gt_pm_get(ce->engine->gt);
- /*
-* Keep GT0 active on MTL so that i915_vma_parked() doesn't
-* free VMAs while execbuf ioctl is validating VMAs.
-*/
- if (gt->info.id)
- eb->wakeref_gt0 = intel_gt_pm_get(to_gt(gt->i915));
if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
err = intel_context_alloc_state(ce);
@@ -2759,9 +2750,6 @@ eb_select_engine(struct i915_execbuffer *eb)
return err;
err:
- if (gt->info.id)
- intel_gt_pm_put(to_gt(gt->i915), eb->wakeref_gt0);
-
intel_gt_pm_put(ce->engine->gt, eb->wakeref);
for_each_child(ce, child)
intel_context_put(child);
@@ -2775,12 +2763,6 @@ eb_put_engine(struct i915_execbuffer *eb)
struct intel_context *child;
i915_vm_put(eb->context->vm);
- /*
-* This works in conjunction with eb_select_engine() to prevent
-* i915_vma_parked() from interfering while execbuf validates vmas.
-*/
- if (eb->gt->info.id)
- intel_gt_pm_put(to_gt(eb->gt->i915), eb->wakeref_gt0);
intel_gt_pm_put(eb->context->engine->gt, eb->wakeref);
for_each_child(eb->context, child)
intel_context_put(child);
Re: [PATCH v7 1/3] drm/i915/vma: Fix UAF on destroy against retire race
On 3/5/2024 3:35 PM, Janusz Krzysztofik wrote:
Object debugging tools were sporadically reporting illegal attempts to
free a still active i915 VMA object when parking a GT believed to be idle.
[161.359441] ODEBUG: free active (active state 0) object: 88811643b958
object type: i915_active hint: __i915_vma_active+0x0/0x50 [i915]
[161.360082] WARNING: CPU: 5 PID: 276 at lib/debugobjects.c:514
debug_print_object+0x80/0xb0
...
[161.360304] CPU: 5 PID: 276 Comm: kworker/5:2 Not tainted
6.5.0-rc1-CI_DRM_13375-g003f860e5577+ #1
[161.360314] Hardware name: Intel Corporation Rocket Lake Client
Platform/RocketLake S UDIMM 6L RVP, BIOS RKLSFWI1.R00.3173.A03.2204210138
04/21/2022
[161.360322] Workqueue: i915-unordered __intel_wakeref_put_work [i915]
[161.360592] RIP: 0010:debug_print_object+0x80/0xb0
...
[161.361347] debug_object_free+0xeb/0x110
[161.361362] i915_active_fini+0x14/0x130 [i915]
[161.361866] release_references+0xfe/0x1f0 [i915]
[161.362543] i915_vma_parked+0x1db/0x380 [i915]
[161.363129] __gt_park+0x121/0x230 [i915]
[161.363515] intel_wakeref_put_last+0x1f/0x70 [i915]
That has been tracked down to be happening when another thread is
deactivating the VMA inside __active_retire() helper, after the VMA's
active counter has been already decremented to 0, but before deactivation
of the VMA's object is reported to the object debugging tool.
We could prevent from that race by serializing i915_active_fini() with
__active_retire() via ref->tree_lock, but that wouldn't stop the VMA from
being used, e.g. from __i915_vma_retire() called at the end of
__active_retire(), after that VMA has been already freed by a concurrent
i915_vma_destroy() on return from the i915_active_fini(). Then, we should
rather fix the issue at the VMA level, not in i915_active.
Since __i915_vma_parked() is called from __gt_park() on last put of the
GT's wakeref, the issue could be addressed by holding the GT wakeref long
enough for __active_retire() to complete before that wakeref is released
and the GT parked.
I believe the issue was introduced by commit d93939730347 ("drm/i915:
Remove the vma refcount") which moved a call to i915_active_fini() from
a dropped i915_vma_release(), called on last put of the removed VMA kref,
to i915_vma_parked() processing path called on last put of a GT wakeref.
However, its visibility to the object debugging tool was suppressed by a
bug in i915_active that was fixed two weeks later with commit e92eb246feb9
("drm/i915/active: Fix missing debug object activation").
A VMA associated with a request doesn't acquire a GT wakeref by itself.
Instead, it depends on a wakeref held directly by the request's active
intel_context for a GT associated with its VM, and indirectly on that
intel_context's engine wakeref if the engine belongs to the same GT as the
VMA's VM. Those wakerefs are released asynchronously to VMA deactivation.
Fix the issue by getting a wakeref for the VMA's GT when activating it,
and putting that wakeref only after the VMA is deactivated. However,
exclude global GTT from that processing path, otherwise the GPU never goes
idle. Since __i915_vma_retire() may be called from atomic contexts, use
async variant of wakeref put. Also, to avoid circular locking dependency,
take care of acquiring the wakeref before VM mutex when both are needed.
v7: Add inline comments with justifications for:
- using untracked variants of intel_gt_pm_get/put() (Nirmoy),
- using async variant of _put(),
- not getting the wakeref in case of a global GTT,
- always getting the first wakeref outside vm->mutex.
v6: Since __i915_vma_active/retire() callbacks are not serialized, storing
a wakeref tracking handle inside struct i915_vma is not safe, and
there is no other good place for that. Use untracked variants of
intel_gt_pm_get/put_async().
v5: Replace "tile" with "GT" across commit description (Rodrigo),
- avoid mentioning multi-GT case in commit description (Rodrigo),
- explain why we need to take a temporary wakeref unconditionally inside
i915_vma_pin_ww() (Rodrigo).
v4: Refresh on top of commit 5e4e06e4087e ("drm/i915: Track gt pm
wakerefs") (Andi),
- for more easy backporting, split out removal of former insufficient
workarounds and move them to separate patches (Nirmoy).
- clean up commit message and description a bit.
v3: Identify root cause more precisely, and a commit to blame,
- identify and drop former workarounds,
- update commit message and description.
v2: Get the wakeref before VM mutex to avoid circular locking dependency,
- drop questionable Fixes: tag.
Fixes: d93939730347 ("drm/i915: Remove the vma refcount")
Closes:https://gitlab.freedesktop.org/drm/intel/issues/8875
Signed-off-by: Janusz Krzysztofik
Cc: Thomas Hellström
Cc: Nirmoy Das
Cc: Andi Shyti
Cc: Rodrigo Vivi
Cc:sta...@vger.kernel.org # v5.19+
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i915/i915_vma.c | 50 -
1 f
Re: [PATCH v7 3/3] Revert "drm/i915: Wait for active retire before i915_active_fini()"
On 3/5/2024 3:35 PM, Janusz Krzysztofik wrote: This reverts commit 7a2280e8dcd2f1f436db9631287c0b21cf6a92b0, obsoleted by "drm/i915/vma: Fix UAF on destroy against retire race". Signed-off-by: Janusz Krzysztofik Cc: Nirmoy Das Reviewed-by: Nirmoy Das --- drivers/gpu/drm/i915/i915_vma.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index b70715b1411d6..d2f064d2525cc 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -1776,8 +1776,6 @@ static void release_references(struct i915_vma *vma, struct intel_gt *gt, if (vm_ddestroy) i915_vm_resv_put(vma->vm); - /* Wait for async active retire */ - i915_active_wait(&vma->active); i915_active_fini(&vma->active); GEM_WARN_ON(vma->resource); i915_vma_free(vma);
Re: [PATCH 1/8] drm/i915: Rename the crtc/crtc_states in the top level DDI hooks/etc
On Tue, 05 Mar 2024, Ville Syrjälä wrote: > If the spec got updated then we should probably just do a full rename > pass over the whole codebase instead of confusing things more by > mixing up the terminology. For example: Bspec 54142 for display version 12+ has some mixed old/new terminology. Bspec 68847 for xe2lpd+ only has new terminology. > Also we should probably s/bigjoiner/joiner/ to make it clear that > all of it also applies to uncompressed joiner as well. Ack. BR, Jani. -- Jani Nikula, Intel
Re: [PATCH 5/8] drm/i915: Add mdclk_cdclk_ratio to intel_dbuf_state
Quoting Matt Roper (2024-03-04 20:25:31-03:00)
>On Mon, Mar 04, 2024 at 03:30:24PM -0300, Gustavo Sousa wrote:
>> CDCLK programming Xe2LPD always selects the CDCLK PLL as source for the
>
>I think something got a bit muddled while rewriting this sentence.
>Maybe the first two words were supposed to be dropped?
Yeah. The original intention here was "CDCLK programming for Xe2LPD
...". Dropping the first two words also works :-)
Will reword this in v2.
>
>Otherwise,
>
>Reviewed-by: Matt Roper
Thanks!
--
Gustavo Sousa
>
>> MDCLK. Because of that, the ratio between MDCLK and CDCLK is not be
>> constant anymore. As such, make sure to have the current ratio available
>> in intel_dbuf_state so that it can be used during dbuf programming.
>>
>> Note that we write-lock the global state instead of serializing to a
>> hardware commit because a change in the ratio should be rather handled
>> in the CDCLK change sequence, which will need to take care of updating
>> the necessary registers in that case. We will implement that in upcoming
>> changes.
>>
>> That said, changes in the MBus joining state should be handled by the
>> DBUF/MBUS logic, just like it is already done, but the logic will need
>> to know the ratio to properly update the registers.
>>
>> Signed-off-by: Gustavo Sousa
>> ---
>> drivers/gpu/drm/i915/display/intel_cdclk.c | 26
>> drivers/gpu/drm/i915/display/intel_cdclk.h | 2 ++
>> drivers/gpu/drm/i915/display/skl_watermark.c | 18 +-
>> drivers/gpu/drm/i915/display/skl_watermark.h | 3 +++
>> 4 files changed, 48 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
>> b/drivers/gpu/drm/i915/display/intel_cdclk.c
>> index cdf3ae766f9e..04a6e9806254 100644
>> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
>> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
>> @@ -39,6 +39,7 @@
>> #include "intel_pcode.h"
>> #include "intel_psr.h"
>> #include "intel_vdsc.h"
>> +#include "skl_watermark.h"
>> #include "vlv_sideband.h"
>>
>> /**
>> @@ -1891,6 +1892,22 @@ static u32 xe2lpd_mdclk_source_sel(struct
>> drm_i915_private *i915)
>> return MDCLK_SOURCE_SEL_CD2XCLK;
>> }
>>
>> +u8 intel_mdclk_cdclk_ratio(struct drm_i915_private *i915,
>> + const struct intel_cdclk_config *cdclk_config)
>> +{
>> +u32 source_sel = xe2lpd_mdclk_source_sel(i915);
>> +
>> +switch (source_sel) {
>> +case MDCLK_SOURCE_SEL_CD2XCLK:
>> +return 2;
>> +case MDCLK_SOURCE_SEL_CDCLK_PLL:
>> +return DIV_ROUND_UP(cdclk_config->vco, cdclk_config->cdclk);
>> +default:
>> +MISSING_CASE(source_sel);
>> +return 2;
>> +}
>> +}
>> +
>> static bool cdclk_compute_crawl_and_squash_midpoint(struct drm_i915_private
>> *i915,
>> const struct
>> intel_cdclk_config *old_cdclk_config,
>> const struct
>> intel_cdclk_config *new_cdclk_config,
>> @@ -3281,6 +3298,15 @@ int intel_modeset_calc_cdclk(struct
>> intel_atomic_state *state)
>> "Modeset required for cdclk change\n");
>> }
>>
>> +if (intel_mdclk_cdclk_ratio(dev_priv, &old_cdclk_state->actual) !=
>> +intel_mdclk_cdclk_ratio(dev_priv, &new_cdclk_state->actual)) {
>> +u8 ratio = intel_mdclk_cdclk_ratio(dev_priv,
>> &new_cdclk_state->actual);
>> +
>> +ret = intel_dbuf_state_set_mdclk_cdclk_ratio(state, ratio);
>> +if (ret)
>> +return ret;
>> +}
>> +
>> drm_dbg_kms(&dev_priv->drm,
>> "New cdclk calculated to be logical %u kHz, actual %u
>> kHz\n",
>> new_cdclk_state->logical.cdclk,
>> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h
>> b/drivers/gpu/drm/i915/display/intel_cdclk.h
>> index fa301495e7f1..8e6e302bd599 100644
>> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
>> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
>> @@ -62,6 +62,8 @@ void intel_update_cdclk(struct drm_i915_private *dev_priv);
>> u32 intel_read_rawclk(struct drm_i915_private *dev_priv);
>> bool intel_cdclk_clock_changed(const struct intel_cdclk_config *a,
>> const struct intel_cdclk_config *b);
>> +u8 intel_mdclk_cdclk_ratio(struct drm_i915_private *i915,
>> + const struct intel_cdclk_config *cdclk_config);
>> void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state);
>> void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state);
>> void intel_cdclk_dump_config(struct drm_i915_private *i915,
>> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
>> b/drivers/gpu/drm/i915/display/skl_watermark.c
>> index d9e49cd60d3a..4410e21888ad 100644
>> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
>>
Re: [PATCH 1/4] drm/i915: Rename ICL_AUX_ANAOVRD1 to ICL_PORT_TX_DW6_AUX
On Thu, Feb 29, 2024 at 10:03:54PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> ICL_AUX_ANAOVRD1 is actually ICL_PORT_TX_DW6_AUX. Give it its proper
> name, and relocate to the correct file (intel_combo_phy_regs.h).
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_combo_phy_regs.h | 6 ++
> drivers/gpu/drm/i915/display/intel_display_power_well.c | 5 -
> drivers/gpu/drm/i915/i915_reg.h | 9 -
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
> b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
> index b0983edccf3f..1d931557cd79 100644
> --- a/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
> @@ -142,6 +142,12 @@
> #define RTERM_SELECT(x)((x) << 3)
> #define RTERM_SELECT_MASK (0x7 << 3)
>
> +#define ICL_PORT_TX_DW6_AUX(phy) _MMIO(_ICL_PORT_TX_DW_AUX(6,
> phy))
> +#define ICL_PORT_TX_DW6_GRP(phy) _MMIO(_ICL_PORT_TX_DW_GRP(6,
> phy))
> +#define ICL_PORT_TX_DW6_LN(ln, phy) _MMIO(_ICL_PORT_TX_DW_LN(6, ln,
> phy))
> +#define ICL_AUX_ANAOVRD1_LDO_BYPASS(1 << 7)
> +#define ICL_AUX_ANAOVRD1_ENABLE(1 << 0)
The above flags seemed to be swapped in the spec, even though this
doesn't matter in the code.
> +
> #define ICL_PORT_TX_DW7_AUX(phy) _MMIO(_ICL_PORT_TX_DW_AUX(7,
> phy))
> #define ICL_PORT_TX_DW7_GRP(phy) _MMIO(_ICL_PORT_TX_DW_GRP(7,
> phy))
> #define ICL_PORT_TX_DW7_LN(ln, phy) _MMIO(_ICL_PORT_TX_DW_LN(7, ln,
> phy))
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index c20e80aded35..a1edac6ce31f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -199,6 +199,9 @@ static void hsw_power_well_pre_disable(struct
> drm_i915_private *dev_priv,
> gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask);
> }
>
> +#define ICL_AUX_PW_TO_PHY(pw_idx)\
> + ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + PHY_A)
> +
> #define ICL_AUX_PW_TO_CH(pw_idx) \
> ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
>
> @@ -426,7 +429,7 @@ icl_combo_phy_aux_power_well_enable(struct
> drm_i915_private *dev_priv,
> /* Display WA #1178: icl */
> if (pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <= ICL_PW_CTL_IDX_AUX_B &&
> !intel_port_is_edp(dev_priv, (enum port)phy))
> - intel_de_rmw(dev_priv, ICL_AUX_ANAOVRD1(pw_idx),
> + intel_de_rmw(dev_priv,
> ICL_PORT_TX_DW6_AUX(ICL_AUX_PW_TO_PHY(pw_idx)),
>0, ICL_AUX_ANAOVRD1_ENABLE |
> ICL_AUX_ANAOVRD1_LDO_BYPASS);
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e00557e1a57f..74e943f21475 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5566,15 +5566,6 @@ enum skl_power_gate {
> ((pw_idx) - ICL_PW_CTL_IDX_PW_1 + SKL_PG1)
> #define SKL_FUSE_PG_DIST_STATUS(pg) (1 << (27 - (pg)))
>
> -#define _ICL_AUX_REG_IDX(pw_idx) ((pw_idx) - ICL_PW_CTL_IDX_AUX_A)
> -#define _ICL_AUX_ANAOVRD1_A 0x162398
> -#define _ICL_AUX_ANAOVRD1_B 0x6C398
> -#define ICL_AUX_ANAOVRD1(pw_idx) _MMIO(_PICK(_ICL_AUX_REG_IDX(pw_idx), \
> - _ICL_AUX_ANAOVRD1_A, \
> - _ICL_AUX_ANAOVRD1_B))
> -#define ICL_AUX_ANAOVRD1_LDO_BYPASS(1 << 7)
> -#define ICL_AUX_ANAOVRD1_ENABLE(1 << 0)
> -
> /* Per-pipe DDI Function Control */
> #define _TRANS_DDI_FUNC_CTL_A0x60400
> #define _TRANS_DDI_FUNC_CTL_B0x61400
> --
> 2.43.0
>
Re: [PATCH 3/8] drm/i915/cdclk: Only compute squash waveform when necessary
Quoting Matt Roper (2024-03-04 19:04:19-03:00)
>On Mon, Mar 04, 2024 at 03:30:22PM -0300, Gustavo Sousa wrote:
>> It is no use computing the squash waveform if we are not going to use
>> it. Move the call to cdclk_squash_waveform() inside the block guarded by
>> HAS_CDCLK_SQUASH(dev_priv).
>>
>> Signed-off-by: Gustavo Sousa
>
>You could also move the 'u32 waveform' declaration from the top of the
>function inside the block too to help prevent any future mistakes of
>using it unitialized.
Yep, makes sense. Will do that in v2.
>
>Either way,
>
>Reviewed-by: Matt Roper
Thanks!
--
Gustavo Sousa
>
>> ---
>> drivers/gpu/drm/i915/display/intel_cdclk.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
>> b/drivers/gpu/drm/i915/display/intel_cdclk.c
>> index bf84bf27213f..cdf3ae766f9e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
>> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
>> @@ -2023,10 +2023,11 @@ static void _bxt_set_cdclk(struct drm_i915_private
>> *dev_priv,
>> } else
>> bxt_cdclk_pll_update(dev_priv, vco);
>>
>> -waveform = cdclk_squash_waveform(dev_priv, cdclk);
>> +if (HAS_CDCLK_SQUASH(dev_priv)) {
>> +waveform = cdclk_squash_waveform(dev_priv, cdclk);
>>
>> -if (HAS_CDCLK_SQUASH(dev_priv))
>> dg2_cdclk_squash_program(dev_priv, waveform);
>> +}
>>
>> intel_de_write(dev_priv, CDCLK_CTL, bxt_cdclk_ctl(dev_priv,
>> cdclk_config, pipe));
>>
>> --
>> 2.44.0
>>
>
>--
>Matt Roper
>Graphics Software Engineer
>Linux GPU Platform Enablement
>Intel Corporation
Re: [PATCH 2/8] drm/i915/cdclk: Add and use xe2lpd_mdclk_source_sel()
Quoting Matt Roper (2024-03-04 18:58:34-03:00)
>On Mon, Mar 04, 2024 at 03:30:21PM -0300, Gustavo Sousa wrote:
>> There will be future changes that rely on the source of the MDCLK. Let's
>> have xe2lpd_mdclk_source_sel() as the function responsible for reporting
>> that information.
>>
>> Bspec: 69090
>> Signed-off-by: Gustavo Sousa
>> ---
>> drivers/gpu/drm/i915/display/intel_cdclk.c | 17 -
>> drivers/gpu/drm/i915/i915_reg.h| 4 +++-
>> 2 files changed, 19 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
>> b/drivers/gpu/drm/i915/display/intel_cdclk.c
>> index 407bd541eb46..bf84bf27213f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
>> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
>> @@ -1876,6 +1876,21 @@ static bool cdclk_pll_is_unknown(unsigned int vco)
>> return vco == ~0;
>> }
>>
>> +static u32 xe2lpd_mdclk_source_sel(struct drm_i915_private *i915)
>> +{
>> +if (DISPLAY_VER(i915) >= 20)
>> +return MDCLK_SOURCE_SEL_CDCLK_PLL;
>> +
>> +/*
>> + * Earlier display IPs do not provide means of selecting the
>> + * MDCLK source, but MDCLK_SOURCE_SEL_CD2XCLK is a nice default,
>> + * since it reflects the source used for those and allows
>> + * xe2lpd_mdclk_source_sel() to be used in logic that depends on
>> + * it.
>> + */
>> +return MDCLK_SOURCE_SEL_CD2XCLK;
>
>At the moment this function only gets called on Xe2 and beyond where the
>register field exists; if that's going to change soon, then wouldn't it
>be more natural to just use an early exit to highlight that there's
>nothing we need to OR into the CDCLK_CTL for earlier platforms?
>
>/* Not configurable for older platforms; they always use CD2XCLK */
>if (DISPLAY_VER(i915) < 20)
>return 0;
>
>Functionally it's the same, but it feels more intuitive to me.
>
>If we aren't expecting to call this from common codepaths that aren't
>already protected by a display version check, then we could make this a
>drm_WARN_ON() to assert that we haven't deviated from expected behavior.
Well, the intention here was for this function to serve 2 purposes: (i)
to give the value of the "MDCLK Source Select" field of CDCLK_CTL and
also (ii) tell which was the source of the MDCLK for displays pre and
post (including) Xe2LPD, because we will need that information in
"drm/i915: Add mdclk_cdclk_ratio to intel_dbuf_state".
I was hoping to do that instead of creating a new enum, but maybe it
will just cause confusion?
Should we have one function to tell us the source and another for
giving the value of the register field?
--
Gustavo Sousa
>
>
>Matt
>
>> +}
>> +
>> static bool cdclk_compute_crawl_and_squash_midpoint(struct drm_i915_private
>> *i915,
>> const struct
>> intel_cdclk_config *old_cdclk_config,
>> const struct
>> intel_cdclk_config *new_cdclk_config,
>> @@ -1980,7 +1995,7 @@ static u32 bxt_cdclk_ctl(struct drm_i915_private *i915,
>> val |= BXT_CDCLK_SSA_PRECHARGE_ENABLE;
>>
>> if (DISPLAY_VER(i915) >= 20)
>> -val |= MDCLK_SOURCE_SEL_CDCLK_PLL;
>> +val |= xe2lpd_mdclk_source_sel(i915);
>> else
>> val |= skl_cdclk_decimal(cdclk);
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h
>> b/drivers/gpu/drm/i915/i915_reg.h
>> index e00557e1a57f..eb953ed1f113 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -5900,7 +5900,9 @@ enum skl_power_gate {
>> #define CDCLK_FREQ_540REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK,
>> 1)
>> #define CDCLK_FREQ_337_308
>> REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 2)
>> #define CDCLK_FREQ_675_617
>> REG_FIELD_PREP(CDCLK_FREQ_SEL_MASK, 3)
>> -#define MDCLK_SOURCE_SEL_CDCLK_PLLREG_BIT(25)
>> +#define MDCLK_SOURCE_SEL_MASKREG_GENMASK(25, 25)
>> +#define MDCLK_SOURCE_SEL_CD2XCLK
>> REG_FIELD_PREP(MDCLK_SOURCE_SEL_MASK, 0)
>> +#define MDCLK_SOURCE_SEL_CDCLK_PLL
>> REG_FIELD_PREP(MDCLK_SOURCE_SEL_MASK, 1)
>> #define BXT_CDCLK_CD2X_DIV_SEL_MASKREG_GENMASK(23, 22)
>> #define BXT_CDCLK_CD2X_DIV_SEL_1
>> REG_FIELD_PREP(BXT_CDCLK_CD2X_DIV_SEL_MASK, 0)
>> #define BXT_CDCLK_CD2X_DIV_SEL_1_5
>> REG_FIELD_PREP(BXT_CDCLK_CD2X_DIV_SEL_MASK, 1)
>> --
>> 2.44.0
>>
>
>--
>Matt Roper
>Graphics Software Engineer
>Linux GPU Platform Enablement
>Intel Corporation
✗ Fi.CI.BAT: failure for drm/i915/dp: Fix the computation for compressed_bpp for DISPLAY < 13
== Series Details == Series: drm/i915/dp: Fix the computation for compressed_bpp for DISPLAY < 13 URL : https://patchwork.freedesktop.org/series/130710/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14388 -> Patchwork_130710v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_130710v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_130710v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/index.html Participating hosts (40 -> 39) -- Additional (2): bat-kbl-2 bat-mtlp-8 Missing(3): fi-glk-j4005 bat-jsl-1 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_130710v1: ### IGT changes ### Possible regressions * igt@kms_pm_rpm@basic-pci-d3-state: - bat-dg1-7: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14388/bat-dg1-7/igt@kms_pm_...@basic-pci-d3-state.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-dg1-7/igt@kms_pm_...@basic-pci-d3-state.html Known issues Here are the changes found in Patchwork_130710v1 that come from known issues: ### CI changes ### Issues hit * boot: - fi-bsw-n3050: [PASS][3] -> [FAIL][4] ([i915#8293]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14388/fi-bsw-n3050/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/fi-bsw-n3050/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#9318]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1849]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-kbl-2/igt@fb...@info.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][7] ([fdo#109271]) +39 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4083]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4077]) +2 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4079]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#6621]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#5190]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#4212]) +8 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#4213]) +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#3555] / [i915#3840] / [i915#9159]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-mtlp-8: NOTRUN -> [SKIP][17] ([fdo#109285]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130710v1/bat-mtlp-8/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: -
[PATCH v7 3/3] Revert "drm/i915: Wait for active retire before i915_active_fini()"
This reverts commit 7a2280e8dcd2f1f436db9631287c0b21cf6a92b0, obsoleted by "drm/i915/vma: Fix UAF on destroy against retire race". Signed-off-by: Janusz Krzysztofik Cc: Nirmoy Das --- drivers/gpu/drm/i915/i915_vma.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index b70715b1411d6..d2f064d2525cc 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -1776,8 +1776,6 @@ static void release_references(struct i915_vma *vma, struct intel_gt *gt, if (vm_ddestroy) i915_vm_resv_put(vma->vm); - /* Wait for async active retire */ - i915_active_wait(&vma->active); i915_active_fini(&vma->active); GEM_WARN_ON(vma->resource); i915_vma_free(vma); -- 2.43.0
[PATCH v7 2/3] drm/i915: Remove extra multi-gt pm-references
There was an attempt to fix an issue of illegal attempts to free a still
active i915 VMA object when parking a GT believed to be idle, reported by
CI on 2-GT Meteor Lake. As a solution, an extra wakeref for a Primary GT
was acquired from i915_gem_do_execbuffer() -- see commit f56fe3e91787
("drm/i915: Fix a VMA UAF for multi-gt platform").
However, that fix occurred insufficient -- the issue was still reported by
CI. That wakeref was released on exit from i915_gem_do_execbuffer(), then
potentially before completion of the request and deactivation of its
associated VMAs. Moreover, CI reports indicated that single-GT platforms
also suffered sporadically from the same race.
Since the issue has now been fixed by a preceding patch "drm/i915/vma: Fix
UAF on destroy against retire race", drop the no longer useful changes
introduced by that insufficient fix.
v3: Also drop the no longer used .wakeref_gt0 field from struct
i915_execbuffer.
v2: Avoid the word "revert" in commit message (Rodrigo),
- update commit description reusing relevant chunks dropped from the
description of the proper fix (Rodrigo).
Signed-off-by: Janusz Krzysztofik
Cc: Nirmoy Das
Cc: Rodrigo Vivi
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index d3a771afb083e..3f20fe3811999 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -255,7 +255,6 @@ struct i915_execbuffer {
struct intel_context *context; /* logical state for the request */
struct i915_gem_context *gem_context; /** caller's context */
intel_wakeref_t wakeref;
- intel_wakeref_t wakeref_gt0;
/** our requests to build */
struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];
@@ -2686,7 +2685,6 @@ static int
eb_select_engine(struct i915_execbuffer *eb)
{
struct intel_context *ce, *child;
- struct intel_gt *gt;
unsigned int idx;
int err;
@@ -2710,17 +2708,10 @@ eb_select_engine(struct i915_execbuffer *eb)
}
}
eb->num_batches = ce->parallel.number_children + 1;
- gt = ce->engine->gt;
for_each_child(ce, child)
intel_context_get(child);
eb->wakeref = intel_gt_pm_get(ce->engine->gt);
- /*
-* Keep GT0 active on MTL so that i915_vma_parked() doesn't
-* free VMAs while execbuf ioctl is validating VMAs.
-*/
- if (gt->info.id)
- eb->wakeref_gt0 = intel_gt_pm_get(to_gt(gt->i915));
if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
err = intel_context_alloc_state(ce);
@@ -2759,9 +2750,6 @@ eb_select_engine(struct i915_execbuffer *eb)
return err;
err:
- if (gt->info.id)
- intel_gt_pm_put(to_gt(gt->i915), eb->wakeref_gt0);
-
intel_gt_pm_put(ce->engine->gt, eb->wakeref);
for_each_child(ce, child)
intel_context_put(child);
@@ -2775,12 +2763,6 @@ eb_put_engine(struct i915_execbuffer *eb)
struct intel_context *child;
i915_vm_put(eb->context->vm);
- /*
-* This works in conjunction with eb_select_engine() to prevent
-* i915_vma_parked() from interfering while execbuf validates vmas.
-*/
- if (eb->gt->info.id)
- intel_gt_pm_put(to_gt(eb->gt->i915), eb->wakeref_gt0);
intel_gt_pm_put(eb->context->engine->gt, eb->wakeref);
for_each_child(eb->context, child)
intel_context_put(child);
--
2.43.0
[PATCH v7 1/3] drm/i915/vma: Fix UAF on destroy against retire race
Object debugging tools were sporadically reporting illegal attempts to
free a still active i915 VMA object when parking a GT believed to be idle.
[161.359441] ODEBUG: free active (active state 0) object: 88811643b958
object type: i915_active hint: __i915_vma_active+0x0/0x50 [i915]
[161.360082] WARNING: CPU: 5 PID: 276 at lib/debugobjects.c:514
debug_print_object+0x80/0xb0
...
[161.360304] CPU: 5 PID: 276 Comm: kworker/5:2 Not tainted
6.5.0-rc1-CI_DRM_13375-g003f860e5577+ #1
[161.360314] Hardware name: Intel Corporation Rocket Lake Client
Platform/RocketLake S UDIMM 6L RVP, BIOS RKLSFWI1.R00.3173.A03.2204210138
04/21/2022
[161.360322] Workqueue: i915-unordered __intel_wakeref_put_work [i915]
[161.360592] RIP: 0010:debug_print_object+0x80/0xb0
...
[161.361347] debug_object_free+0xeb/0x110
[161.361362] i915_active_fini+0x14/0x130 [i915]
[161.361866] release_references+0xfe/0x1f0 [i915]
[161.362543] i915_vma_parked+0x1db/0x380 [i915]
[161.363129] __gt_park+0x121/0x230 [i915]
[161.363515] intel_wakeref_put_last+0x1f/0x70 [i915]
That has been tracked down to be happening when another thread is
deactivating the VMA inside __active_retire() helper, after the VMA's
active counter has been already decremented to 0, but before deactivation
of the VMA's object is reported to the object debugging tool.
We could prevent from that race by serializing i915_active_fini() with
__active_retire() via ref->tree_lock, but that wouldn't stop the VMA from
being used, e.g. from __i915_vma_retire() called at the end of
__active_retire(), after that VMA has been already freed by a concurrent
i915_vma_destroy() on return from the i915_active_fini(). Then, we should
rather fix the issue at the VMA level, not in i915_active.
Since __i915_vma_parked() is called from __gt_park() on last put of the
GT's wakeref, the issue could be addressed by holding the GT wakeref long
enough for __active_retire() to complete before that wakeref is released
and the GT parked.
I believe the issue was introduced by commit d93939730347 ("drm/i915:
Remove the vma refcount") which moved a call to i915_active_fini() from
a dropped i915_vma_release(), called on last put of the removed VMA kref,
to i915_vma_parked() processing path called on last put of a GT wakeref.
However, its visibility to the object debugging tool was suppressed by a
bug in i915_active that was fixed two weeks later with commit e92eb246feb9
("drm/i915/active: Fix missing debug object activation").
A VMA associated with a request doesn't acquire a GT wakeref by itself.
Instead, it depends on a wakeref held directly by the request's active
intel_context for a GT associated with its VM, and indirectly on that
intel_context's engine wakeref if the engine belongs to the same GT as the
VMA's VM. Those wakerefs are released asynchronously to VMA deactivation.
Fix the issue by getting a wakeref for the VMA's GT when activating it,
and putting that wakeref only after the VMA is deactivated. However,
exclude global GTT from that processing path, otherwise the GPU never goes
idle. Since __i915_vma_retire() may be called from atomic contexts, use
async variant of wakeref put. Also, to avoid circular locking dependency,
take care of acquiring the wakeref before VM mutex when both are needed.
v7: Add inline comments with justifications for:
- using untracked variants of intel_gt_pm_get/put() (Nirmoy),
- using async variant of _put(),
- not getting the wakeref in case of a global GTT,
- always getting the first wakeref outside vm->mutex.
v6: Since __i915_vma_active/retire() callbacks are not serialized, storing
a wakeref tracking handle inside struct i915_vma is not safe, and
there is no other good place for that. Use untracked variants of
intel_gt_pm_get/put_async().
v5: Replace "tile" with "GT" across commit description (Rodrigo),
- avoid mentioning multi-GT case in commit description (Rodrigo),
- explain why we need to take a temporary wakeref unconditionally inside
i915_vma_pin_ww() (Rodrigo).
v4: Refresh on top of commit 5e4e06e4087e ("drm/i915: Track gt pm
wakerefs") (Andi),
- for more easy backporting, split out removal of former insufficient
workarounds and move them to separate patches (Nirmoy).
- clean up commit message and description a bit.
v3: Identify root cause more precisely, and a commit to blame,
- identify and drop former workarounds,
- update commit message and description.
v2: Get the wakeref before VM mutex to avoid circular locking dependency,
- drop questionable Fixes: tag.
Fixes: d93939730347 ("drm/i915: Remove the vma refcount")
Closes: https://gitlab.freedesktop.org/drm/intel/issues/8875
Signed-off-by: Janusz Krzysztofik
Cc: Thomas Hellström
Cc: Nirmoy Das
Cc: Andi Shyti
Cc: Rodrigo Vivi
Cc: sta...@vger.kernel.org # v5.19+
---
drivers/gpu/drm/i915/i915_vma.c | 50 -
1 file changed, 43 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_vma.c
[PATCH v7 0/3] drm/i915: Fix VMA UAF on destroy against deactivate race
Object debugging tools were sporadically reporting illegal attempts to
free a still active i915 VMA object when parking a GT believed to be idle.
[161.359441] ODEBUG: free active (active state 0) object: 88811643b958
object type: i915_active hint: __i915_vma_active+0x0/0x50 [i915]
[161.360082] WARNING: CPU: 5 PID: 276 at lib/debugobjects.c:514
debug_print_object+0x80/0xb0
...
[161.360304] CPU: 5 PID: 276 Comm: kworker/5:2 Not tainted
6.5.0-rc1-CI_DRM_13375-g003f860e5577+ #1
[161.360314] Hardware name: Intel Corporation Rocket Lake Client
Platform/RocketLake S UDIMM 6L RVP, BIOS RKLSFWI1.R00.3173.A03.2204210138
04/21/2022
[161.360322] Workqueue: i915-unordered __intel_wakeref_put_work [i915]
[161.360592] RIP: 0010:debug_print_object+0x80/0xb0
...
[161.361347] debug_object_free+0xeb/0x110
[161.361362] i915_active_fini+0x14/0x130 [i915]
[161.361866] release_references+0xfe/0x1f0 [i915]
[161.362543] i915_vma_parked+0x1db/0x380 [i915]
[161.363129] __gt_park+0x121/0x230 [i915]
[161.363515] intel_wakeref_put_last+0x1f/0x70 [i915]
That has been tracked down to be happening when another thread is
deactivating the VMA inside __active_retire() helper, after the VMA's
active counter has been already decremented to 0, but before deactivation
of the VMA's object is reported to the object debugging tool.
We could prevent from that race by serializing i915_active_fini() with
__active_retire() via ref->tree_lock, but that wouldn't stop the VMA from
being used, e.g. from __i915_vma_retire() called at the end of
__active_retire(), after that VMA has been already freed by a concurrent
i915_vma_destroy() on return from the i915_active_fini(). Then, we should
rather fix the issue at the VMA level, not in i915_active.
Since __i915_vma_parked() is called from __gt_park() on last put of the
GT's wakeref, the issue could be addressed by holding the GT wakeref long
enough for __active_retire() to complete before that wakeref is released
and the GT parked.
A VMA associated with a request doesn't acquire a GT wakeref by itself.
Instead, it depends on a wakeref held directly by the request's active
intel_context for a GT associated with its VM, and indirectly on that
intel_context's engine wakeref if the engine belongs to the same GT as the
VMA's VM. Those wakerefs are released asynchronously to VMA deactivation.
In case of single-GT platforms, at least one of those wakerefs is usually
held long enough for the request's VMA to be deactivated on time, before
it is destroyed on last put of its VM GT wakeref. However, on multi-GT
platforms, a request may use a VMA from a GT other than the one that hosts
the request's engine, then it is protected only with the intel_context's
VM GT wakeref.
There was an attempt to fix the issue on 2-GT Meteor Lake by acquiring an
extra wakeref for a Primary GT from i915_gem_do_execbuffer() -- see commit
f56fe3e91787 ("drm/i915: Fix a VMA UAF for multi-gt platform"). However,
that fix occurred insufficient -- the issue was still reported by CI.
That wakeref was released on exit from i915_gem_do_execbuffer(), then
potentially before completion of the request and deactivation of its
associated VMAs. Moreover, CI reports indicated that single-GT platforms
also suffered sporadically from the same race.
I believe the issue was introduced by commit d93939730347 ("drm/i915:
Remove the vma refcount") which moved a call to i915_active_fini() from
a dropped i915_vma_release(), called on last put of the removed VMA kref,
to i915_vma_parked() processing path called on last put of a GT wakeref.
However, its visibility to the object debugging tool was suppressed by a
bug in i915_active that was fixed two weeks later with commit e92eb246feb9
("drm/i915/active: Fix missing debug object activation").
Fix the issue by getting a wakeref for the VMA's GT when activating it,
and putting that wakeref only after the VMA is deactivated. However,
exclude global GTT from that processing path, otherwise the GPU never goes
idle. Since __i915_vma_retire() may be called from atomic contexts, use
async variant of wakeref put. Also, to avoid circular locking dependency,
take care of acquiring the wakeref before VM mutex when both are needed.
Having that fixed, stop explicitly acquiring the extra GT0 wakeref from
inside i915_gem_do_execbuffer(), and also drop an extra call to
i915_active_wait(), introduced by commit 7a2280e8dcd2 ("drm/i915: Wait for
active retire before i915_active_fini()") as another insufficient fix for
this UAF race.
v7: Add inline comments with justifications for:
- using untracked variants of intel_gt_pm_get/put() (Nirmoy),
- using async variant of _put(),
- not getting the wakeref in case of a global GTT,
- always getting the first wakeref outside vm->mutex.
v6: Since __i915_vma_active/retire() callbacks are not serialized, storing
a wakeref tracking handle inside struct i915_vma is not safe, and
there is no other good place for that. Use untracked variants of
Re: [PATCH 1/8] drm/i915: Rename the crtc/crtc_states in the top level DDI hooks/etc
On Tue, Mar 05, 2024 at 04:07:45PM +0200, Jani Nikula wrote: > On Tue, 05 Mar 2024, Ville Syrjälä wrote: > > On Tue, Mar 05, 2024 at 10:41:49AM +0200, Lisovskiy, Stanislav wrote: > >> I also wonder whether should we really emphasize things like > >> "master"/"slave" > >> in function names. I thought that one idea in our refactoring was to unify > >> joined pipes handling so that there are no(or at least almost no) explicit > >> code > >> paths/function names for masters/slaves. > > > > There are no master vs. slave functions. The split is going to be > > transcoder/port vs. pipe. > > Besides, for modern platforms the spec has already been changed to use > primary/secondary terminology. When renaming or refactoring stuff, > please switch to them instead of sticking with master/slave. If the spec got updated then we should probably just do a full rename pass over the whole codebase instead of confusing things more by mixing up the terminology. Also we should probably s/bigjoiner/joiner/ to make it clear that all of it also applies to uncompressed joiner as well. -- Ville Syrjälä Intel
[PATCH v2 2/3] drm/i915: Use vblank worker to unpin old legacy cursor fb safely
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased accessing it. The simplest approach is to just use a vblank
work here to do the delayed unpin.
Not 100% sure it's a good idea to put this onto the same high
priority vblank worker as eg. our timing critical gamma updates.
But let's keep it simple for now, and it we later discover that
this is causing problems we can think about adding a lower
priority worker for such things.
This patch is slightly reworked by Maarten
Cc: Maarten Lankhorst
Signed-off-by: Ville Syrjälä
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_cursor.c | 26 +--
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
.../drm/i915/display/intel_display_types.h| 3 +++
3 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index f8b33999d43f..9021c0c1683d 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -654,6 +654,17 @@ static bool intel_cursor_format_mod_supported(struct
drm_plane *_plane,
return format == DRM_FORMAT_ARGB;
}
+static void intel_cursor_unpin_work(struct kthread_work *base)
+{
+ struct drm_vblank_work *work = to_drm_vblank_work(base);
+ struct intel_plane_state *plane_state =
+ container_of(work, typeof(*plane_state), unpin_work);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+
+ intel_plane_unpin_fb(plane_state);
+ intel_plane_destroy_state(&plane->base, &plane_state->uapi);
+}
+
static int
intel_legacy_cursor_update(struct drm_plane *_plane,
struct drm_crtc *_crtc,
@@ -797,14 +808,25 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
intel_psr_unlock(crtc_state);
- intel_plane_unpin_fb(old_plane_state);
+ if (old_plane_state->ggtt_vma != new_plane_state->ggtt_vma) {
+ drm_vblank_work_init(&old_plane_state->unpin_work, &crtc->base,
+intel_cursor_unpin_work);
+
+ drm_vblank_work_schedule(&old_plane_state->unpin_work,
+
drm_crtc_accurate_vblank_count(&crtc->base) + 1,
+false);
+
+ old_plane_state = NULL;
+ } else {
+ intel_plane_unpin_fb(old_plane_state);
+ }
out_free:
if (new_crtc_state)
intel_crtc_destroy_state(&crtc->base, &new_crtc_state->uapi);
if (ret)
intel_plane_destroy_state(&plane->base, &new_plane_state->uapi);
- else
+ else if (old_plane_state)
intel_plane_destroy_state(&plane->base, &old_plane_state->uapi);
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index ab2f52d21bad..1b56197a1183 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -65,6 +65,7 @@
#include "intel_crt.h"
#include "intel_crtc.h"
#include "intel_crtc_state_dump.h"
+#include "intel_cursor.h"
#include "intel_ddi.h"
#include "intel_de.h"
#include "intel_display_driver.h"
@@ -6784,6 +6785,8 @@ static void intel_commit_modeset_disables(struct
intel_atomic_state *state)
continue;
intel_crtc_disable_planes(state, crtc);
+
+ drm_vblank_work_flush_all(&crtc->base);
}
/* Only disable port sync and MST slaves */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 860e867586f4..9b7113cd86fc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -721,6 +721,9 @@ struct intel_plane_state {
struct intel_fb_view view;
+ /* for legacy cursor fb unpin */
+ struct drm_vblank_work unpin_work;
+
/* Plane pxp decryption state */
bool decrypt;
--
2.43.0
[PATCH v2 3/3] drm/i915: Use the same vblank worker for atomic unpin
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old commit that
wasn't cleaned up.
The only option remaining is to remove the plane from the atomic commit,
and use the same path as the legacy cursor update to clean the state
after vblank.
Changes since previous version:
- Call the memset for plane state immediately when scheduling vblank,
this prevents a use-after-free in cursor cleanup.
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 13 +++-
.../gpu/drm/i915/display/intel_atomic_plane.h | 2 ++
drivers/gpu/drm/i915/display/intel_crtc.c | 31 +++
drivers/gpu/drm/i915/display/intel_cursor.c | 2 +-
drivers/gpu/drm/i915/display/intel_cursor.h | 3 ++
5 files changed, 49 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 76d77d5a0409..ab01c2d15afd 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -42,6 +42,7 @@
#include "i915_reg.h"
#include "intel_atomic_plane.h"
#include "intel_cdclk.h"
+#include "intel_cursor.h"
#include "intel_display_rps.h"
#include "intel_display_trace.h"
#include "intel_display_types.h"
@@ -1163,7 +1164,6 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
intel_display_rps_mark_interactive(dev_priv, state, false);
- /* Should only be called after a successful intel_prepare_plane_fb()! */
intel_plane_unpin_fb(old_plane_state);
}
@@ -1176,3 +1176,14 @@ void intel_plane_helper_add(struct intel_plane *plane)
{
drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
}
+
+void intel_plane_init_cursor_vblank_work(struct intel_plane_state
*old_plane_state,
+struct intel_plane_state
*new_plane_state)
+{
+ if (!old_plane_state->ggtt_vma ||
+ old_plane_state->ggtt_vma == new_plane_state->ggtt_vma)
+ return;
+
+ drm_vblank_work_init(&old_plane_state->unpin_work,
old_plane_state->uapi.crtc,
+intel_cursor_unpin_work);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 191dad0efc8e..5a897cf6fa02 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -66,5 +66,7 @@ int intel_plane_check_src_coordinates(struct
intel_plane_state *plane_state);
void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state);
void intel_plane_helper_add(struct intel_plane *plane);
+void intel_plane_init_cursor_vblank_work(struct intel_plane_state
*old_plane_state,
+struct intel_plane_state
*new_plane_state);
#endif /* __INTEL_ATOMIC_PLANE_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
b/drivers/gpu/drm/i915/display/intel_crtc.c
index 25593f6aae7d..7f935c88726e 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -500,6 +500,19 @@ void intel_pipe_update_start(struct intel_atomic_state
*state,
if (intel_crtc_needs_vblank_work(new_crtc_state))
intel_crtc_vblank_work_init(new_crtc_state);
+ if (state->base.legacy_cursor_update) {
+ struct intel_plane *plane;
+ struct intel_plane_state *old_plane_state, *new_plane_state;
+ int i;
+
+ for_each_oldnew_intel_plane_in_state(state, plane,
old_plane_state,
+new_plane_state, i) {
+ if (old_plane_state->uapi.crtc == &crtc->base)
+
intel_plane_init_cursor_vblank_work(old_plane_state,
+
new_plane_state);
+ }
+ }
+
intel_vblank_evade_init(old_crtc_state, new_crtc_state, &evade);
if (drm_WARN_ON(&dev_priv->drm, drm_crtc_vblank_get(&crtc->base)))
@@ -616,6 +629,24 @@ void intel_pipe_update_end(struct intel_atomic_state
*state,
new_crtc_state->uapi.event = NULL;
}
+ if (state->base.legacy_cursor_update) {
+ struct intel_plane *plane;
+ struct intel_plane_state *old_plane_state;
+ int i;
+
+ for_each_old_intel_plane_in_state(state, plane,
old_plane_state, i) {
+ if (old_plane_state->uapi.crtc == &crtc->base &&
+ old_plane_state->unpin_work.vblank) {
+
drm_vblank_work_schedule(&old_plane_s
[PATCH v2 0/3] drm/i915: Unpin cursor fb only after vblank.
Fix legacy cursor updates on xe by enforcing wait between updating registers and unpin. In comparison with previous version, there was a small bug in the atomic unpin path. In intel_plane_cleanup_fb we tried to deference plane_state after calling vblank schedule. Remove plane from atomic state immediately after scheduling to prevent this issue. It's unsafe to deference plane_state as soon as schedule occured. Maarten Lankhorst (2): drm: Add drm_vblank_work_flush_all(). drm/i915: Use the same vblank worker for atomic unpin Ville Syrjälä (1): drm/i915: Use vblank worker to unpin old legacy cursor fb safely drivers/gpu/drm/drm_vblank_work.c | 22 + .../gpu/drm/i915/display/intel_atomic_plane.c | 13 +++- .../gpu/drm/i915/display/intel_atomic_plane.h | 2 ++ drivers/gpu/drm/i915/display/intel_crtc.c | 31 +++ drivers/gpu/drm/i915/display/intel_cursor.c | 26 ++-- drivers/gpu/drm/i915/display/intel_cursor.h | 3 ++ drivers/gpu/drm/i915/display/intel_display.c | 3 ++ .../drm/i915/display/intel_display_types.h| 3 ++ include/drm/drm_vblank_work.h | 2 ++ 9 files changed, 102 insertions(+), 3 deletions(-) -- 2.43.0
[PATCH v2 1/3] drm: Add drm_vblank_work_flush_all().
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/drm_vblank_work.c
b/drivers/gpu/drm/drm_vblank_work.c
index 43cd5c0f4f6f..ff86f2b2e052 100644
--- a/drivers/gpu/drm/drm_vblank_work.c
+++ b/drivers/gpu/drm/drm_vblank_work.c
@@ -232,6 +232,28 @@ void drm_vblank_work_flush(struct drm_vblank_work *work)
}
EXPORT_SYMBOL(drm_vblank_work_flush);
+/**
+ * drm_vblank_work_flush_all - flush all currently pending vblank work on crtc.
+ * @crtc: crtc for which vblank work to flush
+ *
+ * Wait until all currently queued vblank work on @crtc
+ * has finished executing once.
+ */
+void drm_vblank_work_flush_all(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_vblank_crtc *vblank = &dev->vblank[drm_crtc_index(crtc)];
+
+ spin_lock_irq(&dev->event_lock);
+ wait_event_lock_irq(vblank->work_wait_queue,
+ waitqueue_active(&vblank->work_wait_queue),
+ dev->event_lock);
+ spin_unlock_irq(&dev->event_lock);
+
+ kthread_flush_worker(vblank->worker);
+}
+EXPORT_SYMBOL(drm_vblank_work_flush_all);
+
/**
* drm_vblank_work_init - initialize a vblank work item
* @work: vblank work item
diff --git a/include/drm/drm_vblank_work.h b/include/drm/drm_vblank_work.h
index eb41d0810c4f..e04d436b7297 100644
--- a/include/drm/drm_vblank_work.h
+++ b/include/drm/drm_vblank_work.h
@@ -17,6 +17,7 @@ struct drm_crtc;
* drm_vblank_work_init()
* drm_vblank_work_cancel_sync()
* drm_vblank_work_flush()
+ * drm_vblank_work_flush_all()
*/
struct drm_vblank_work {
/**
@@ -67,5 +68,6 @@ void drm_vblank_work_init(struct drm_vblank_work *work,
struct drm_crtc *crtc,
void (*func)(struct kthread_work *work));
bool drm_vblank_work_cancel_sync(struct drm_vblank_work *work);
void drm_vblank_work_flush(struct drm_vblank_work *work);
+void drm_vblank_work_flush_all(struct drm_crtc *crtc);
#endif /* !_DRM_VBLANK_WORK_H_ */
--
2.43.0
Re: [PATCH] drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostly
On Tue, 05 Mar 2024, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Reinstate commit 88b065943cb5 ("drm/i915/dsi: Do display on
> sequence later on icl+"), for the most part. Turns out some
> machines (eg. Chuwi Minibook X) really do need that updated order.
> It is also the order the Windows driver uses.
>
> However we can't just undo the revert since that would again
> break Lenovo 82TQ. After staring at the VBT sequences for both
> machines I've concluded that the Lenovo 82TQ sequences look
> somewhat broken:
> - INIT_OTP is not present at all
> - what should be in INIT_OTP is found in DISPLAY_ON
> - what should be in DISPLAY_ON is found in BACKLIGHT_ON
>(along with the actual backlight stuff)
>
> The Chuwi Minibook X on the other hand has a full complement
> of sequences in its VBT.
>
> So let's try to deal with the broken sequences in the
> Lenovo 82TQ VBT by simply swapping the (non-existent)
> INIT_OTP sequence with the DISPLAY_ON sequence. Thus we
> execute DISPLAY_ON when intending to execute INIT_OTP,
> and execute nothing at all when intending to execute
> DISPLAY_ON. That should be 100% equivalent to the
> revert, for such broken VBTs.
>
> Cc: sta...@vger.kernel.org
> Fixes: dc524d05974f ("Revert "drm/i915/dsi: Do display on sequence later on
> icl+"")
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/10071
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10334
> Signed-off-by: Ville Syrjälä
Yuck.
Acked-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c| 3 +-
> drivers/gpu/drm/i915/display/intel_bios.c | 43 +++
> 2 files changed, 39 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index eda4a8b88590..ac456a2275db 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1155,7 +1155,6 @@ static void gen11_dsi_powerup_panel(struct
> intel_encoder *encoder)
> }
>
> intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);
> - intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
>
> /* ensure all panel commands dispatched before enabling transcoder */
> wait_for_cmds_dispatched_to_panel(encoder);
> @@ -1256,6 +1255,8 @@ static void gen11_dsi_enable(struct intel_atomic_state
> *state,
> /* step6d: enable dsi transcoder */
> gen11_dsi_enable_transcoder(encoder);
>
> + intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
> +
> /* step7: enable backlight */
> intel_backlight_enable(crtc_state, conn_state);
> intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 343726de9aa7..373291d10af9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1955,16 +1955,12 @@ static int get_init_otp_deassert_fragment_len(struct
> drm_i915_private *i915,
> * these devices we split the init OTP sequence into a deassert sequence and
> * the actual init OTP part.
> */
> -static void fixup_mipi_sequences(struct drm_i915_private *i915,
> - struct intel_panel *panel)
> +static void vlv_fixup_mipi_sequences(struct drm_i915_private *i915,
> + struct intel_panel *panel)
> {
> u8 *init_otp;
> int len;
>
> - /* Limit this to VLV for now. */
> - if (!IS_VALLEYVIEW(i915))
> - return;
> -
> /* Limit this to v1 vid-mode sequences */
> if (panel->vbt.dsi.config->is_cmd_mode ||
> panel->vbt.dsi.seq_version != 1)
> @@ -2000,6 +1996,41 @@ static void fixup_mipi_sequences(struct
> drm_i915_private *i915,
> panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
> }
>
> +/*
> + * Some machines (eg. Lenovo 82TQ) appear to have broken
> + * VBT sequences:
> + * - INIT_OTP is not present at all
> + * - what should be in INIT_OTP is in DISPLAY_ON
> + * - what should be in DISPLAY_ON is in BACKLIGHT_ON
> + * (along with the actual backlight stuff)
> + *
> + * To make those work we simply swap DISPLAY_ON and INIT_OTP.
> + *
> + * TODO: Do we need to limit this to specific machines,
> + * or examine the contents of the sequences to
> + * avoid false positives?
> + */
> +static void icl_fixup_mipi_sequences(struct drm_i915_private *i915,
> + struct intel_panel *panel)
> +{
> + if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] &&
> + panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) {
> + drm_dbg_kms(&i915->drm, "Broken VBT: Swapping INIT_OTP and
> DISPLAY_ON sequences\n");
> +
> + swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP],
> + panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]);
> + }
> +}
> +
> +static void fixup_mipi_sequences(struct d
Re: [PATCH 1/8] drm/i915: Rename the crtc/crtc_states in the top level DDI hooks/etc
On Tue, 05 Mar 2024, Ville Syrjälä wrote: > On Tue, Mar 05, 2024 at 10:41:49AM +0200, Lisovskiy, Stanislav wrote: >> I also wonder whether should we really emphasize things like "master"/"slave" >> in function names. I thought that one idea in our refactoring was to unify >> joined pipes handling so that there are no(or at least almost no) explicit >> code >> paths/function names for masters/slaves. > > There are no master vs. slave functions. The split is going to be > transcoder/port vs. pipe. Besides, for modern platforms the spec has already been changed to use primary/secondary terminology. When renaming or refactoring stuff, please switch to them instead of sticking with master/slave. BR, Jani. -- Jani Nikula, Intel
Re: [PATCH] drm/i915/dp: Enable AUX based backlight for HDR
On Tue, 05 Mar 2024, Suraj Kandpal wrote:
> As of now whenerver HDR is switched on we use the PWM to change the
> backlight as opposed to AUX based backlight changes in terms of nits.
> This patch writes to the appropriate DPCD registers to enable aux
> based backlight using values in nits.
>
> Signed-off-by: Suraj Kandpal
> ---
> .../drm/i915/display/intel_dp_aux_backlight.c | 29 ++-
> 1 file changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 4f58efdc688a..14144347f13f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -40,11 +40,6 @@
> #include "intel_dp.h"
> #include "intel_dp_aux_backlight.h"
>
> -/* TODO:
> - * Implement HDR, right now we just implement the bare minimum to bring us
> back into SDR mode so we
> - * can make people's backlights work in the mean time
> - */
> -
> /*
> * DP AUX registers for Intel's proprietary HDR backlight interface. We
> define
> * them here since we'll likely be the only driver to ever use these.
> @@ -221,7 +216,7 @@ intel_dp_aux_hdr_set_backlight(const struct
> drm_connector_state *conn_state, u32
> struct intel_connector *connector =
> to_intel_connector(conn_state->connector);
> struct intel_panel *panel = &connector->panel;
>
> - if (panel->backlight.edp.intel.sdr_uses_aux) {
> + if (panel->backlight.edp.intel.sdr_uses_aux ||
> conn_state->hdr_output_metadata) {
> intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> } else {
> const u32 pwm_level = intel_backlight_level_to_pwm(connector,
> level);
> @@ -251,8 +246,15 @@ intel_dp_aux_hdr_enable_backlight(const struct
> intel_crtc_state *crtc_state,
> }
>
> ctrl = old_ctrl;
> - if (panel->backlight.edp.intel.sdr_uses_aux) {
> + if (panel->backlight.edp.intel.sdr_uses_aux ||
> conn_state->hdr_output_metadata) {
> ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
> +
> + if (conn_state->hdr_output_metadata) {
> + ctrl |= INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLE;
> + ctrl |= INTEL_EDP_HDR_TCON_2084_DECODE_ENABLE;
> + ctrl |= INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE;
> + }
> +
> intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> } else {
> u32 pwm_level = intel_backlight_level_to_pwm(connector, level);
> @@ -292,9 +294,11 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector
> *connector, enum pipe pi
> {
> struct drm_i915_private *i915 = to_i915(connector->base.dev);
> struct intel_panel *panel = &connector->panel;
> + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
> struct drm_luminance_range_info *luminance_range =
> &connector->base.display_info.luminance_range;
> int ret;
> + u8 buf[4];
>
> drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] SDR backlight is controlled
> through %s\n",
> connector->base.base.id, connector->base.name,
> @@ -318,11 +322,20 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector
> *connector, enum pipe pi
> panel->backlight.min = 0;
> }
>
> + buf[0] = panel->backlight.max & 0xFF;
> + buf[1] = (panel->backlight.max & 0xFF00) >> 8;
> + buf[2] = (connector->base.hdr_sink_metadata.hdmi_type1.max_fall & 0xFF)
> >> 16;
> + buf[3] = (connector->base.hdr_sink_metadata.hdmi_type1.max_fall &
> 0xFF00) >> 24;
These last two lines will always be 0, which, without looking at any
specs, is not right...
> +
> + ret = drm_dp_dpcd_write(&intel_dp->aux,
> INTEL_EDP_HDR_CONTENT_LUMINANCE, buf,
> + sizeof(buf) != sizeof(buf));
...but then this doesn't write it to the sink anyway, and it's unclear
to me what this actually ends up doing or returning. For certain it's
all wrong.
Someone(tm) will still need to properly review the rest of the patch,
these just caught my eye at a quick glance.
BR,
Jani.
> + if (ret)
> + drm_dbg_kms(&i915->drm, "Not able to write content luminence to
> DPCD register\n");
> +
> drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Using AUX HDR interface for
> backlight control (range %d..%d)\n",
> connector->base.base.id, connector->base.name,
> panel->backlight.min, panel->backlight.max);
>
> -
> panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector,
> pipe);
> panel->backlight.enabled = panel->backlight.level != 0;
--
Jani Nikula, Intel
Re: [PATCH 0/4] XE HDCP Enablement
On Tue, Feb 27, 2024 at 11:02:00AM +0530, Suraj Kandpal wrote: This patch series enables HDCP on XE. Mainly includes rewriting functions that were responsible for sending hdcp messages via gsc cs. Signed-off-by: Suraj Kandpal Suraj Kandpal (4): drm/i915/hdcp: Move intel_hdcp_gsc_message def away from header file drm/xe/hdcp: Use xe_device struct drm/xe: Use gsc_proxy_init_done to check proxy status drm/xe/hdcp: Enable HDCP for XE please double check your includes to follow the convention used in the driver. I commented in one of them. Other than that and with CI passing, Acked-by: Lucas De Marchi Lucas De Marchi drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 6 + drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 7 +- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/display/xe_hdcp_gsc.c | 241 +- drivers/gpu/drm/xe/xe_gsc_proxy.c | 4 +- drivers/gpu/drm/xe/xe_gsc_proxy.h | 1 + drivers/gpu/drm/xe/xe_gsc_submit.c| 15 ++ drivers/gpu/drm/xe/xe_gsc_submit.h| 1 + 8 files changed, 258 insertions(+), 18 deletions(-) -- 2.43.2
Re: [PATCH 4/4] drm/xe/hdcp: Enable HDCP for XE
On Tue, Feb 27, 2024 at 11:02:04AM +0530, Suraj Kandpal wrote:
Enable HDCP for Xe by defining functions which take care of
interaction of HDCP as a client with the GSC CS interface.
Add intel_hdcp_gsc_message to Makefile and add corresponding
changes to xe_hdcp_gsc.c to make it build.
--v2
-add kfree at appropriate place [Daniele]
-remove useless define [Daniele]
-move host session logic to xe_gsc_submit.c [Daniele]
-call xe_gsc_check_and_update_pending directly in an if condition
[Daniele]
-use xe_device instead of drm_i915_private [Daniele]
--v3
-use xe prefix for newly exposed function [Daniele]
-remove client specific defines from intel_gsc_mtl_header [Daniele]
-add missing kfree() [Daniele]
-have NULL check for hdcp_message in finish function [Daniele]
-dont have too many variable declarations in the same line [Daniele]
--v4
-don't point the hdcp_message structure in xe_device to anything
until it properly gets initialized [Daniele]
--v5
-Squash commits for buildability
Signed-off-by: Suraj Kandpal
Reviewed-by: Arun R Murthy
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/display/xe_hdcp_gsc.c | 198 ++-
drivers/gpu/drm/xe/xe_gsc_submit.c | 15 ++
drivers/gpu/drm/xe/xe_gsc_submit.h | 1 +
4 files changed, 212 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index c531210695db..2b654c908ff3 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -254,6 +254,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_global_state.o \
i915-display/intel_gmbus.o \
i915-display/intel_hdcp.o \
+ i915-display/intel_hdcp_gsc_message.o \
i915-display/intel_hdmi.o \
i915-display/intel_hotplug.o \
i915-display/intel_hotplug_irq.o \
diff --git a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
index 0de06e0373ef..bb3bddcd5747 100644
--- a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
+++ b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c
@@ -4,14 +4,31 @@
*/
#include
+#include
+#include
+#include "abi/gsc_command_header_abi.h"
#include "intel_hdcp_gsc.h"
+#include "intel_hdcp_gsc_message.h"
#include "xe_device_types.h"
#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gsc_proxy.h"
#include "xe_pm.h"
#include "xe_uc_fw.h"
+#include "xe_bo.h"
+#include "xe_map.h"
+#include "xe_gsc_submit.h"
don't append includes here, please follow the alphabetical order.
+
+#define HECI_MEADDRESS_HDCP 18
+
+struct intel_hdcp_gsc_message {
+ struct xe_bo *hdcp_bo;
+ u64 hdcp_cmd_in;
+ u64 hdcp_cmd_out;
+};
+
+#define HDCP_GSC_HEADER_SIZE sizeof(struct intel_gsc_mtl_header)
bool intel_hdcp_gsc_cs_required(struct xe_device *xe)
{
@@ -45,19 +62,194 @@ bool intel_hdcp_gsc_check_status(struct xe_device *xe)
return ret;
}
+/*This function helps allocate memory for the command that we will send to gsc
cs */
+static int intel_hdcp_gsc_initialize_message(struct xe_device *xe,
+struct intel_hdcp_gsc_message
*hdcp_message)
+{
+ struct xe_bo *bo = NULL;
+ u64 cmd_in, cmd_out;
+ int ret = 0;
+
+ /* allocate object of two page for HDCP command memory and store it */
+ xe_device_mem_access_get(xe);
+ bo = xe_bo_create_pin_map(xe, xe_device_get_root_tile(xe), NULL,
PAGE_SIZE * 2,
+ ttm_bo_type_kernel,
+ XE_BO_CREATE_SYSTEM_BIT |
+ XE_BO_CREATE_GGTT_BIT);
+
+ if (IS_ERR(bo)) {
+ drm_err(&xe->drm, "Failed to allocate bo for HDCP streaming
command!\n");
+ ret = PTR_ERR(bo);
+ goto out;
+ }
+
+ cmd_in = xe_bo_ggtt_addr(bo);
+ cmd_out = cmd_in + PAGE_SIZE;
+ xe_map_memset(xe, &bo->vmap, 0, 0, bo->size);
+
+ hdcp_message->hdcp_bo = bo;
+ hdcp_message->hdcp_cmd_in = cmd_in;
+ hdcp_message->hdcp_cmd_out = cmd_out;
+out:
+ xe_device_mem_access_put(xe);
+ return ret;
+}
+
+static int intel_hdcp_gsc_hdcp2_init(struct xe_device *xe)
+{
+ struct intel_hdcp_gsc_message *hdcp_message;
+ int ret;
+
+ hdcp_message = kzalloc(sizeof(*hdcp_message), GFP_KERNEL);
+
+ if (!hdcp_message)
+ return -ENOMEM;
+
+ /*
+* NOTE: No need to lock the comp mutex here as it is already
+* going to be taken before this function called
+*/
+ ret = intel_hdcp_gsc_initialize_message(xe, hdcp_message);
+ if (ret) {
+ drm_err(&xe->drm, "Could not initialize hdcp_message\n");
+ kfree(hdcp_message);
+ return ret;
+ }
+
+ xe->display.hdcp.hdcp_message = hdcp_message;
+ return ret;
+}
+
+static const struct i915_hdcp_ops gsc_hdcp_ops = {
+ .initiate_hdcp2_session = intel_hdcp_gsc_initiate_session,
+ .verify_receive
drm-tip Migration to Gitlab
Hi, In order to prepare for the drm-misc migration that should happen next week, Benjamin and I just migrated drm-tip to Gitlab. It should be effective as of 5 minutes ago, the old cgit repo being currently marked read-only, and will be setup as a mirror. Thanks to the work done last week, we should be able to smoothly transition any dim user after running dim ub twice. However, this is the first time we're migrating a repository that users write to, so it might cause some issues for people that haven't setup their Gitlab account, and especially their SSH key. If that's the case, you should add your SSH key in Gitlab. See the documentation here: https://docs.gitlab.com/ee/user/ssh.html#add-an-ssh-key-to-your-gitlab-account If it still doesn't work, please reach out to me. Maxime signature.asc Description: PGP signature
Re: [PATCH v2] drm/i915/panelreplay: Move out psr_init_dpcd() from init_connector()
On Thu, Feb 29, 2024 at 10:07:16AM +0530, Animesh Manna wrote: > Move psr_init_dpcd() from init-connector to connector-detect > function. The dpcd probe for checking panel replay capability > for external dp connector is causing delay during boot which can > be optimized by moving dpcd probe to connector specific detect(). > > v1: Initial version. > v2: Add details in commit description. [Jani] > > Suggested-by: Ville Syrjälä > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10284 > Signed-off-by: Animesh Manna > --- > drivers/gpu/drm/i915/display/intel_dp.c | 3 +++ > drivers/gpu/drm/i915/display/intel_psr.c | 3 --- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 6ece2c563c7a..b485ec320085 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -5709,6 +5709,9 @@ intel_dp_detect(struct drm_connector *connector, > if (ret == 1) > intel_connector->base.epoch_counter++; > > + if (!intel_dp_is_edp(intel_dp)) > + intel_psr_init_dpcd(intel_dp); > + > intel_dp_detect_dsc_caps(intel_dp, intel_connector); > > intel_dp_configure_mst(intel_dp); What is the story with panel replay vs. mst? > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 72cadad09db5..6927785fd6ff 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -2883,9 +2883,6 @@ void intel_psr_init(struct intel_dp *intel_dp) > if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv))) > return; > > - if (!intel_dp_is_edp(intel_dp)) > - intel_psr_init_dpcd(intel_dp); > - > /* >* HSW spec explicitly says PSR is tied to port A. >* BDW+ platforms have a instance of PSR registers per transcoder but > -- > 2.29.0 -- Ville Syrjälä Intel
Re: [PATCH v8 3/3] drm/buddy: Add user for defragmentation
Am 05.03.24 um 12:14 schrieb Paneer Selvam, Arunpravin:
On 3/5/2024 4:33 PM, Paneer Selvam, Arunpravin wrote:
Hi Christian,
On 3/4/2024 10:09 PM, Christian König wrote:
Am 04.03.24 um 17:32 schrieb Arunpravin Paneer Selvam:
Add amdgpu driver as user for the drm buddy
defragmentation.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 17 +++--
drivers/gpu/drm/drm_buddy.c | 1 +
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index e494f5bf136a..cff8a526c622 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -533,8 +533,21 @@ static int amdgpu_vram_mgr_new(struct
ttm_resource_manager *man,
min_block_size,
&vres->blocks,
vres->flags);
- if (unlikely(r))
- goto error_free_blocks;
+ if (unlikely(r)) {
+ if (r == -ENOSPC) {
+ drm_buddy_defrag(mm, min_block_size);
+ r = drm_buddy_alloc_blocks(mm, fpfn,
+ lpfn,
+ size,
+ min_block_size,
+ &vres->blocks,
+ vres->flags);
That doesn't looks like something we should do.
We might fallback when contiguous memory is requested, but certainly
not on normal allocation failure.
yes, defrag here not useful for normal allocations. But worried about
the bigger min_block_size normal allocations.
In such cases, I think we should move this drm_buddy_defrag() call
into buddy allocator file. For example if the required
size is 1024KiB and if min_block_size is 256KiB, the allocator first
tries to find the 1024KiB block, when there is no single 1024KiB block,
the allocator goes one level below in freelist and tries to search
for two 512KiB blocks and goes on. At one point of time if we have
less space,
we might go further levels below to search four 256KiB blocks to
satisfy the request.
Assuming if the allocator cannot find the first 256KiB block, that
time I think we might need to merge the two 128KiB blocks
through defragmentation function. And again for the second 256KiB
block, we might need to call the defragmentation again to
merge two 128KiB blocks or four 64KiB blocks to form minimum
alignment size of 256KiB. This goes on for the third and fourth
256KiB blocks to complete the required size allocation of 1024KiB.
Please let me know if my understanding is not correct.
I don't think we should do that. We essentially have to support two
different use cases:
1. Non contiguous allocation with 2MiB min_block_size for everything
larger than 2MiB. Using a block size as large as possible is desirable,
but not something we enforce.
2. Contiguous allocations for display, firmware etc.. Here we need to
enforce a large block size and can live with the additional overhead
caused by force merging.
As you have suggested we can also rename this as force merge or some
other names.
Yeah, but just an suggestion. You are way deeper in the code and
handling than I'm, so feel free to name it whatever you think fits best.
Regards,
Christian.
Thanks,
Arun.
Thanks,
Arun.
Regards,
Christian.
+ if (unlikely(r))
+ goto error_free_blocks;
+ } else {
+ goto error_free_blocks;
+ }
+ }
if (size > remaining_size)
remaining_size = 0;
diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c
index 40131ed9b0cd..19440f8caec0 100644
--- a/drivers/gpu/drm/drm_buddy.c
+++ b/drivers/gpu/drm/drm_buddy.c
@@ -396,6 +396,7 @@ void drm_buddy_defrag(struct drm_buddy *mm,
}
}
}
+EXPORT_SYMBOL(drm_buddy_defrag);
/**
* drm_buddy_free_block - free a block
