[CI 5/6] drm/i915: Drop dead code for pvc
PCI IDs for PVC were never added and platform always marked with
force_probe. Drop what's not used and rename some places as needed.
The registers not used anymore are also removed.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
.../gpu/drm/i915/gem/i915_gem_object_types.h | 2 +-
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 3 -
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 33
drivers/gpu/drm/i915/gt/intel_gt_mcr.c| 30 +---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 9 --
drivers/gpu/drm/i915/gt/intel_mocs.c | 19 ---
drivers/gpu/drm/i915/gt/intel_rps.c | 4 +-
drivers/gpu/drm/i915/gt/intel_sseu.c | 9 +-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 82 +-
.../gpu/drm/i915/gt/intel_workarounds.c.rej | 18 +++
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 4 -
drivers/gpu/drm/i915/i915_debugfs.c | 12 --
drivers/gpu/drm/i915/i915_drv.h | 9 --
drivers/gpu/drm/i915/i915_pci.c | 36 -
drivers/gpu/drm/i915/i915_reg.h | 1 -
drivers/gpu/drm/i915/intel_clock_gating.c | 16 +-
drivers/gpu/drm/i915/intel_device_info.c | 1 -
drivers/gpu/drm/i915/intel_device_info.h | 1 -
drivers/gpu/drm/i915/intel_step.c | 70 +
drivers/gpu/drm/i915/intel_uncore.c | 142 --
drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 -
.../gpu/drm/xe/compat-i915-headers/i915_drv.h | 4 -
22 files changed, 27 insertions(+), 480 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/intel_workarounds.c.rej
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 0c5cdab278b69..1495b60744928 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -386,7 +386,7 @@ struct drm_i915_gem_object {
* and kernel mode driver for caching policy control after GEN12.
* In the meantime platform specific tables are created to translate
* i915_cache_level into pat index, for more details check the macros
-* defined i915/i915_pci.c, e.g. PVC_CACHELEVEL.
+* defined i915/i915_pci.c, e.g. TGL_CACHELEVEL.
* For backward compatibility, this field contains values exactly match
* the entries of enum i915_cache_level for pre-GEN12 platforms (See
* LEGACY_CACHELEVEL), so that the PTE encode functions for these
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index f59914df6b5a7..e9f65f27b53fb 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -189,9 +189,6 @@ static bool gen12_needs_ccs_aux_inv(struct intel_engine_cs
*engine)
{
i915_reg_t reg = gen12_get_aux_inv_reg(engine);
- if (IS_PONTEVECCHIO(engine->i915))
- return false;
-
/*
* So far platforms supported by i915 having flat ccs do not require
* AUX invalidation. Check also whether the engine requires it.
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 75bde8c1aa5da..396f5fe993c3f 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -839,38 +839,6 @@ static void engine_mask_apply_compute_fuses(struct
intel_gt *gt)
}
}
-static void engine_mask_apply_copy_fuses(struct intel_gt *gt)
-{
- struct drm_i915_private *i915 = gt->i915;
- struct intel_gt_info *info = >->info;
- unsigned long meml3_mask;
- unsigned long quad;
-
- if (!(GRAPHICS_VER_FULL(i915) >= IP_VER(12, 60) &&
- GRAPHICS_VER_FULL(i915) < IP_VER(12, 70)))
- return;
-
- meml3_mask = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
- meml3_mask = REG_FIELD_GET(GEN12_MEML3_EN_MASK, meml3_mask);
-
- /*
-* Link Copy engines may be fused off according to meml3_mask. Each
-* bit is a quad that houses 2 Link Copy and two Sub Copy engines.
-*/
- for_each_clear_bit(quad, &meml3_mask, GEN12_MAX_MSLICES) {
- unsigned int instance = quad * 2 + 1;
- intel_engine_mask_t mask = GENMASK(_BCS(instance + 1),
- _BCS(instance));
-
- if (mask & info->engine_mask) {
- gt_dbg(gt, "bcs%u fused off\n", instance);
- gt_dbg(gt, "bcs%u fused off\n", instance + 1);
-
- info->engine_mask &= ~mask;
- }
- }
-}
-
/*
* Determine which engines are fused off in our particular hardware.
* Note that we have a catch-22 situation where we need to be able to access
@@ -889,7 +857,6 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt
*gt)
engine_mask_apply_media_fuses(gt);
engin
[CI 6/6] drm/i915: Remove special handling for !RCS_MASK()
With both XEHPSDV and PVC removed (as platforms, most of their code remain used by others), there's no need to handle !RCS_MASK() as other platforms don't ever have fused-off render. Remove those code paths and the special WA flag when initializing GuC. Reviewed-by: Matt Roper Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 ++--- drivers/gpu/drm/i915/gt/uc/intel_guc.c| 4 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 396f5fe993c3f..476651bd0a210 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -497,9 +497,8 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id, engine->logical_mask = BIT(logical_instance); __sprint_engine_name(engine); - if ((engine->class == COMPUTE_CLASS && !RCS_MASK(engine->gt) && -__ffs(CCS_MASK(engine->gt)) == engine->instance) || -engine->class == RENDER_CLASS) + if ((engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS) && + __ffs(CCS_MASK(engine->gt) | RCS_MASK(engine->gt)) == engine->instance) engine->flags |= I915_ENGINE_FIRST_RENDER_COMPUTE; /* features common between engines sharing EUs */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index 217277329546c..3dd7699f2ad3b 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -320,10 +320,6 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc) if (IS_DG2_G11(gt->i915)) flags |= GUC_WA_CONTEXT_ISOLATION; - /* Wa_18020744125 */ - if (!RCS_MASK(gt)) - flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST; - /* * Wa_14018913170: Applicable to all platforms supported by i915 so * don't bother testing for all X/Y/Z platforms explicitly. -- 2.43.0
[CI 1/6] drm/i915: Drop dead code for xehpsdv
PCI IDs for XEHPSDV were never added and platform always marked with
force_probe. Drop what's not used and rename some places to either be
xehp or dg2, depending on the platform/IP checks.
The registers not used anymore are also removed.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
Documentation/gpu/rfc/i915_vm_bind.h | 11 +--
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 40
drivers/gpu/drm/i915/gt/intel_gsc.c | 15 ---
drivers/gpu/drm/i915/gt/intel_gt_mcr.c| 20 +---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 50 --
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 21 ++--
drivers/gpu/drm/i915/gt/intel_lrc.c | 43 -
drivers/gpu/drm/i915/gt/intel_migrate.c | 18 ++--
drivers/gpu/drm/i915/gt/intel_mocs.c | 31 --
drivers/gpu/drm/i915/gt/intel_rps.c | 2 -
drivers/gpu/drm/i915/gt/intel_workarounds.c | 95 ---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 4 +-
drivers/gpu/drm/i915/i915_drv.h | 4 -
drivers/gpu/drm/i915/i915_hwmon.c | 6 --
drivers/gpu/drm/i915/i915_pci.c | 17
drivers/gpu/drm/i915/i915_perf.c | 11 +--
drivers/gpu/drm/i915/i915_reg.h | 3 +-
drivers/gpu/drm/i915/intel_clock_gating.c | 10 --
drivers/gpu/drm/i915/intel_device_info.c | 1 -
drivers/gpu/drm/i915/intel_device_info.h | 1 -
drivers/gpu/drm/i915/intel_step.c | 10 --
drivers/gpu/drm/i915/intel_uncore.c | 23 +
drivers/gpu/drm/i915/selftests/intel_uncore.c | 1 -
.../gpu/drm/xe/compat-i915-headers/i915_drv.h | 2 -
24 files changed, 55 insertions(+), 384 deletions(-)
diff --git a/Documentation/gpu/rfc/i915_vm_bind.h
b/Documentation/gpu/rfc/i915_vm_bind.h
index 8a8fcd4fceac6..bc26dc1261041 100644
--- a/Documentation/gpu/rfc/i915_vm_bind.h
+++ b/Documentation/gpu/rfc/i915_vm_bind.h
@@ -93,12 +93,11 @@ struct drm_i915_gem_timeline_fence {
* Multiple VA mappings can be created to the same section of the object
* (aliasing).
*
- * The @start, @offset and @length must be 4K page aligned. However the DG2
- * and XEHPSDV has 64K page size for device local memory and has compact page
- * table. On those platforms, for binding device local-memory objects, the
- * @start, @offset and @length must be 64K aligned. Also, UMDs should not mix
- * the local memory 64K page and the system memory 4K page bindings in the same
- * 2M range.
+ * The @start, @offset and @length must be 4K page aligned. However the DG2 has
+ * 64K page size for device local memory and has compact page table. On that
+ * platform, for binding device local-memory objects, the @start, @offset and
+ * @length must be 64K aligned. Also, UMDs should not mix the local memory 64K
+ * page and the system memory 4K page bindings in the same 2M range.
*
* Error code -EINVAL will be returned if @start, @offset and @length are not
* properly aligned. In version 1 (See I915_PARAM_VM_BIND_VERSION), error code
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index fa46d2308b0ed..1bd0e041e15c2 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -500,11 +500,11 @@ gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt,
}
static void
-xehpsdv_ppgtt_insert_huge(struct i915_address_space *vm,
- struct i915_vma_resource *vma_res,
- struct sgt_dma *iter,
- unsigned int pat_index,
- u32 flags)
+xehp_ppgtt_insert_huge(struct i915_address_space *vm,
+ struct i915_vma_resource *vma_res,
+ struct sgt_dma *iter,
+ unsigned int pat_index,
+ u32 flags)
{
const gen8_pte_t pte_encode = vm->pte_encode(0, pat_index, flags);
unsigned int rem = sg_dma_len(iter->sg);
@@ -741,8 +741,8 @@ static void gen8_ppgtt_insert(struct i915_address_space *vm,
struct sgt_dma iter = sgt_dma(vma_res);
if (vma_res->bi.page_sizes.sg > I915_GTT_PAGE_SIZE) {
- if (GRAPHICS_VER_FULL(vm->i915) >= IP_VER(12, 50))
- xehpsdv_ppgtt_insert_huge(vm, vma_res, &iter,
pat_index, flags);
+ if (GRAPHICS_VER_FULL(vm->i915) >= IP_VER(12, 55))
+ xehp_ppgtt_insert_huge(vm, vma_res, &iter, pat_index,
flags);
else
gen8_ppgtt_insert_huge(vm, vma_res, &iter, pat_index,
flags);
} else {
@@ -781,11 +781,11 @@ static void gen8_ppgtt_insert_entry(struct
i915_address_space *vm,
drm_clflush_virt_range(&vaddr[gen8_pd_index(idx, 0)], sizeof(*vaddr));
}
-static void __xehpsdv_ppgtt_insert_entry_lm(struct i915_address_space *vm,
- dma_addr_t addr,
- u64 offset,
-
[CI 4/6] drm/i915: Update IP_VER(12, 50)
With no platform using graphics/media IP_VER(12, 50), replace the
checks throughout the code with IP_VER(12, 55) so the code makes sense
by itself with no additional explanation of previous baggage.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gem/selftests/huge_pages.c| 4 ++--
.../gpu/drm/i915/gem/selftests/i915_gem_client_blt.c | 8
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 ++---
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 10 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_mcr.h | 2 +-
drivers/gpu/drm/i915/gt/intel_gtt.c| 2 +-
drivers/gpu/drm/i915/gt/intel_lrc.c| 8
drivers/gpu/drm/i915/gt/intel_migrate.c| 4 ++--
drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_sseu.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_workarounds.c| 4 ++--
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 4 ++--
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
drivers/gpu/drm/i915/i915_getparam.c | 4 ++--
drivers/gpu/drm/i915/i915_gpu_error.c | 5 ++---
drivers/gpu/drm/i915/i915_perf.c | 8
drivers/gpu/drm/i915/i915_query.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c| 2 +-
23 files changed, 46 insertions(+), 48 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index 3ff3d8889c6cc..edb54903be0a2 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -713,7 +713,7 @@ static int igt_ppgtt_huge_fill(void *arg)
{
struct drm_i915_private *i915 = arg;
unsigned int supported = RUNTIME_INFO(i915)->page_sizes;
- bool has_pte64 = GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50);
+ bool has_pte64 = GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55);
struct i915_address_space *vm;
struct i915_gem_context *ctx;
unsigned long max_pages;
@@ -857,7 +857,7 @@ static int igt_ppgtt_huge_fill(void *arg)
static int igt_ppgtt_64K(void *arg)
{
struct drm_i915_private *i915 = arg;
- bool has_pte64 = GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50);
+ bool has_pte64 = GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55);
struct drm_i915_gem_object *obj;
struct i915_address_space *vm;
struct i915_gem_context *ctx;
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
index 10a7847f1b049..bac15196b4d24 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
@@ -117,7 +117,7 @@ static bool fastblit_supports_x_tiling(const struct
drm_i915_private *i915)
if (gen < 12)
return true;
- if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50))
+ if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 55))
return false;
return HAS_DISPLAY(i915);
@@ -166,7 +166,7 @@ static int prepare_blit(const struct tiled_blits *t,
src_pitch = t->width; /* in dwords */
if (src->tiling == CLIENT_TILING_Y) {
src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
- if (GRAPHICS_VER_FULL(to_i915(batch->base.dev)) >=
IP_VER(12, 50))
+ if (GRAPHICS_VER_FULL(to_i915(batch->base.dev)) >=
IP_VER(12, 55))
src_4t = XY_FAST_COPY_BLT_D1_SRC_TILE4;
} else if (src->tiling == CLIENT_TILING_X) {
src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(TILE_X);
@@ -177,7 +177,7 @@ static int prepare_blit(const struct tiled_blits *t,
dst_pitch = t->width; /* in dwords */
if (dst->tiling == CLIENT_TILING_Y) {
dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
- if (GRAPHICS_VER_FULL(to_i915(batch->base.dev)) >=
IP_VER(12, 50))
+ if (GRAPHICS_VER_FULL(to_i915(batch->base.dev)) >=
IP_VER(12, 55))
dst_4t = XY_FAST_COPY_BLT_D1_DST_TILE4;
} else if (dst->tiling == CLIENT_TILING_X) {
dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(TILE_X);
@@ -365,7 +365,7 @@ static u64 tiled_offset(const struct intel_gt *gt,
v += x;
swizzle = gt->ggtt->bit_6_swizz
[CI 3/6] drm/i915: Stop inheriting IP_VER(12, 50)
All the platforms that inherit the media/graphics version
from XE_HPM_FEATURES / XE_HP_FEATURES just override it to another
version. Just set the version directly in the respective struct
and remove the versions from the _FEATURES macros. Since that was the
only use for XE_HPM_FEATURES, remove it completely.
Reviewed-by: Gustavo Sousa
Reviewed-by: Matt Roper
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_pci.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index b318b7c6bf737..8b673fdcf178f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -705,8 +705,6 @@ static const struct intel_device_info adl_p_info = {
I915_GTT_PAGE_SIZE_2M
#define XE_HP_FEATURES \
- .__runtime.graphics.ip.ver = 12, \
- .__runtime.graphics.ip.rel = 50, \
XE_HP_PAGE_SIZES, \
TGL_CACHELEVEL, \
.dma_mask_size = 46, \
@@ -730,15 +728,12 @@ static const struct intel_device_info adl_p_info = {
.__runtime.ppgtt_size = 48, \
.__runtime.ppgtt_type = INTEL_PPGTT_FULL
-#define XE_HPM_FEATURES \
- .__runtime.media.ip.ver = 12, \
- .__runtime.media.ip.rel = 50
-
#define DG2_FEATURES \
XE_HP_FEATURES, \
- XE_HPM_FEATURES, \
DGFX_FEATURES, \
+ .__runtime.graphics.ip.ver = 12, \
.__runtime.graphics.ip.rel = 55, \
+ .__runtime.media.ip.ver = 12, \
.__runtime.media.ip.rel = 55, \
PLATFORM(INTEL_DG2), \
.has_64k_pages = 1, \
@@ -773,9 +768,10 @@ static const struct intel_device_info ats_m_info = {
__maybe_unused
static const struct intel_device_info pvc_info = {
XE_HPC_FEATURES,
- XE_HPM_FEATURES,
DGFX_FEATURES,
+ .__runtime.graphics.ip.ver = 12,
.__runtime.graphics.ip.rel = 60,
+ .__runtime.media.ip.ver = 12,
.__runtime.media.ip.rel = 60,
PLATFORM(INTEL_PONTEVECCHIO),
.has_flat_ccs = 0,
--
2.43.0
[CI 2/6] drm/i915: Remove XEHP_FWRANGES()
Now that DG2 is the only user of this forcewake table, remove the macro
and use FORCEWAKE_RENDER explicitly for range 0xd800 - 0xd87f.
Suggested-by: Matt Roper
Reviewed-by: Matt Roper
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_uncore.c | 297 ++--
1 file changed, 145 insertions(+), 152 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 7695bb946fff4..b525318dbd53b 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1471,159 +1471,152 @@ static const struct intel_forcewake_range
__gen12_fw_ranges[] = {
0x1d3f00 - 0x1d3fff: VD2 */
};
-/*
- * Graphics IP version 12.55 brings a slight change to the 0xd800 range,
- * switching it from the GT domain to the render domain.
- */
-#define XEHP_FWRANGES(FW_RANGE_D800) \
- GEN_FW_RANGE(0x0, 0x1fff, 0), /*
\
- 0x0 - 0xaff: reserved
\
- 0xb00 - 0x1fff: always on */
\
- GEN_FW_RANGE(0x2000, 0x26ff, FORCEWAKE_RENDER),
\
- GEN_FW_RANGE(0x2700, 0x4aff, FORCEWAKE_GT),
\
- GEN_FW_RANGE(0x4b00, 0x51ff, 0), /*
\
- 0x4b00 - 0x4fff: reserved
\
- 0x5000 - 0x51ff: always on */
\
- GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER),
\
- GEN_FW_RANGE(0x8000, 0x813f, FORCEWAKE_GT),
\
- GEN_FW_RANGE(0x8140, 0x815f, FORCEWAKE_RENDER),
\
- GEN_FW_RANGE(0x8160, 0x81ff, 0), /*
\
- 0x8160 - 0x817f: reserved
\
- 0x8180 - 0x81ff: always on */
\
- GEN_FW_RANGE(0x8200, 0x82ff, FORCEWAKE_GT),
\
- GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER),
\
- GEN_FW_RANGE(0x8500, 0x8cff, FORCEWAKE_GT), /*
\
- 0x8500 - 0x87ff: gt
\
- 0x8800 - 0x8c7f: reserved
\
- 0x8c80 - 0x8cff: gt (DG2 only) */
\
- GEN_FW_RANGE(0x8d00, 0x8fff, FORCEWAKE_RENDER), /*
\
- 0x8d00 - 0x8dff: render (DG2 only)
\
- 0x8e00 - 0x8fff: reserved */
\
- GEN_FW_RANGE(0x9000, 0x94cf, FORCEWAKE_GT), /*
\
- 0x9000 - 0x947f: gt
\
- 0x9480 - 0x94cf: reserved */
\
- GEN_FW_RANGE(0x94d0, 0x955f, FORCEWAKE_RENDER),
\
- GEN_FW_RANGE(0x9560, 0x967f, 0), /*
\
- 0x9560 - 0x95ff: always on
\
- 0x9600 - 0x967f: reserved */
\
- GEN_FW_RANGE(0x9680, 0x97ff, FORCEWAKE_RENDER), /*
\
- 0x9680 - 0x96ff: render (DG2 only)
\
- 0x9700 - 0x97ff: reserved */
\
- GEN_FW_RANGE(0x9800, 0xcfff, FORCEWAKE_GT), /*
\
- 0x9800 - 0xb4ff: gt
\
- 0xb500 - 0xbfff: reserved
\
- 0xc000 - 0xcfff: gt */
\
- GEN_FW_RANGE(0xd000, 0xd7ff, 0),
\
- GEN_FW_RANGE(0xd800, 0xd87f, FW_RANGE_D800),\
- GEN_FW_RANGE(0xd880, 0xdbff, FORCEWAKE_GT),
\
- GEN_FW_RANGE(0xdc00, 0xdcff, FORCEWAKE_RENDER),
\
- GEN_FW_RANGE(0xdd00, 0xde7f, FORCEWAKE_GT), /*
\
- 0xdd00 - 0xddff: gt
\
- 0xde00 - 0xde7f: reserved */
\
- GEN_FW_RANGE(0xde80, 0xe8ff, FORCEWAKE_RENDER), /*
\
- 0xde80 - 0xdfff: render
\
- 0xe000 - 0xe0ff: reserved
\
- 0xe100 - 0xe8ff: render */
\
- GEN_FW_RANGE(0xe900, 0x, FORCEWAKE_GT), /*
\
- 0xe9
[CI 0/6] drm/i915: cleanup dead code
For CI coverage. No change from previous version except the rebase. See 20240312235145.2443975-1-lucas.demar...@intel.com and 20240312235145.2443975-1-lucas.demar...@intel.com for details. I will probably wait the drm-next backmerge anyway so drm-intel-next and drm-intel-gt-next are back in sync. Lucas De Marchi (6): drm/i915: Drop dead code for xehpsdv drm/i915: Remove XEHP_FWRANGES() drm/i915: Stop inheriting IP_VER(12, 50) drm/i915: Update IP_VER(12, 50) drm/i915: Drop dead code for pvc drm/i915: Remove special handling for !RCS_MASK() Documentation/gpu/rfc/i915_vm_bind.h | 11 +- .../gpu/drm/i915/gem/i915_gem_object_types.h | 2 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 4 +- .../i915/gem/selftests/i915_gem_client_blt.c | 8 +- drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 5 +- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 40 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 43 +- .../drm/i915/gt/intel_execlists_submission.c | 10 +- drivers/gpu/drm/i915/gt/intel_gsc.c | 15 - drivers/gpu/drm/i915/gt/intel_gt.c| 4 +- drivers/gpu/drm/i915/gt/intel_gt_mcr.c| 52 +-- drivers/gpu/drm/i915/gt/intel_gt_mcr.h| 2 +- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 59 --- drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 21 +- drivers/gpu/drm/i915/gt/intel_gtt.c | 2 +- drivers/gpu/drm/i915/gt/intel_lrc.c | 51 +-- drivers/gpu/drm/i915/gt/intel_migrate.c | 22 +- drivers/gpu/drm/i915/gt/intel_mocs.c | 52 +-- drivers/gpu/drm/i915/gt/intel_rps.c | 6 +- drivers/gpu/drm/i915/gt/intel_sseu.c | 13 +- drivers/gpu/drm/i915/gt/intel_workarounds.c | 181 + .../gpu/drm/i915/gt/intel_workarounds.c.rej | 18 + drivers/gpu/drm/i915/gt/uc/intel_guc.c| 6 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 4 +- drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 2 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 4 - drivers/gpu/drm/i915/i915_debugfs.c | 12 - drivers/gpu/drm/i915/i915_drv.h | 13 - drivers/gpu/drm/i915/i915_getparam.c | 4 +- drivers/gpu/drm/i915/i915_gpu_error.c | 5 +- drivers/gpu/drm/i915/i915_hwmon.c | 6 - drivers/gpu/drm/i915/i915_pci.c | 61 +-- drivers/gpu/drm/i915/i915_perf.c | 19 +- drivers/gpu/drm/i915/i915_query.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 4 +- drivers/gpu/drm/i915/intel_clock_gating.c | 26 +- drivers/gpu/drm/i915/intel_device_info.c | 2 - drivers/gpu/drm/i915/intel_device_info.h | 2 - drivers/gpu/drm/i915/intel_step.c | 80 +--- drivers/gpu/drm/i915/intel_uncore.c | 380 +- drivers/gpu/drm/i915/selftests/intel_uncore.c | 3 - .../gpu/drm/xe/compat-i915-headers/i915_drv.h | 6 - 43 files changed, 232 insertions(+), 1032 deletions(-) create mode 100644 drivers/gpu/drm/i915/gt/intel_workarounds.c.rej -- 2.43.0
✓ Fi.CI.BAT: success for Enable Adaptive Sync SDP Support for DP (rev21)
== Series Details == Series: Enable Adaptive Sync SDP Support for DP (rev21) URL : https://patchwork.freedesktop.org/series/126829/ State : success == Summary == CI Bug Log - changes from CI_DRM_14452 -> Patchwork_126829v21 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/index.html Participating hosts (37 -> 36) -- Additional (1): bat-dg1-7 Missing(2): bat-kbl-2 fi-snb-2520m Known issues Here are the changes found in Patchwork_126829v21 that come from known issues: ### CI changes ### Issues hit * boot: - fi-apl-guc: [PASS][1] -> [FAIL][2] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14452/fi-apl-guc/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/fi-apl-guc/boot.html Possible fixes * boot: - fi-cfl-8109u: [FAIL][3] ([i915#8293]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14452/fi-cfl-8109u/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/fi-cfl-8109u/boot.html ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-cfl-8109u: NOTRUN -> [SKIP][5] ([i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@verify-random: - fi-cfl-8109u: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][7] ([i915#4083]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][10] ([i915#6621]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][11] ([i915#4212]) +7 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-7: NOTRUN -> [SKIP][12] ([i915#4215]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#4103] / [i915#4213]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-dg1-7: NOTRUN -> [SKIP][14] ([i915#3555] / [i915#3840]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg1-7: NOTRUN -> [SKIP][15] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_hdmi_inject@inject-audio: - bat-dg1-7: NOTRUN -> [SKIP][16] ([i915#433]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pm_backlight@basic-brightness: - bat-dg1-7: NOTRUN -> [SKIP][17] ([i915#5354]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_pm_backli...@basic-brightness.html - fi-cfl-8109u: NOTRUN -> [SKIP][18] +11 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/fi-cfl-8109u/igt@kms_pm_backli...@basic-brightness.html * igt@kms_psr@psr-primary-page-flip: - bat-dg1-7: NOTRUN -> [SKIP][19] ([i915#9732]) +3 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_...@psr-primary-page-flip.html * igt@kms_setmode@basic-clone-single-crtc: - bat-dg1-7: NOTRUN -> [SKIP][20] ([i915#3555]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v21/bat-dg1-7/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basi
✗ Fi.CI.SPARSE: warning for Enable Adaptive Sync SDP Support for DP (rev21)
== Series Details == Series: Enable Adaptive Sync SDP Support for DP (rev21) URL : https://patchwork.freedesktop.org/series/126829/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for Enable Adaptive Sync SDP Support for DP (rev21)
== Series Details ==
Series: Enable Adaptive Sync SDP Support for DP (rev21)
URL : https://patchwork.freedesktop.org/series/126829/
State : warning
== Summary ==
Error: dim checkpatch failed
7c4053f5d9d2 drm/dp: Add support to indicate if sink supports AS SDP
3a1ee66b1f6d drm: Add Adaptive Sync SDP logging
2a06f2ce9d6c drm/i915/display: Add crtc state dump for Adaptive Sync SDP
382882903214 drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
1ed40e1d8720 drm/i915/dp: Add wrapper function to check AS SDP
687e48c73585 drm/i915/display: Compute AS SDP parameters
555da9c229a2 drm/i915/display: Add state checker for Adaptive Sync SDP
-:72: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible
side-effects?
#72: FILE: drivers/gpu/drm/i915/display/intel_display.c:5116:
+#define PIPE_CONF_CHECK_DP_AS_SDP(name) do { \
+ if (!intel_compare_dp_as_sdp(¤t_config->infoframes.name, \
+ &pipe_config->infoframes.name)) { \
+ pipe_config_dp_as_sdp_mismatch(dev_priv, fastset,
__stringify(name), \
+
¤t_config->infoframes.name, \
+ &pipe_config->infoframes.name);
\
+ ret = false; \
+ } \
+} while (0)
total: 0 errors, 0 warnings, 1 checks, 70 lines checked
4b2d46f36104 drm/i915/display: Compute vrr_vsync params
-:26: WARNING:TYPO_SPELLING: 'befor' may be misspelled - perhaps 'before'?
#26:
- Add TRANS_VRR_VSYNC befor enabling VRR as per bspec. (Ankit)
^
total: 0 errors, 1 warnings, 0 checks, 102 lines checked
f5e840600698 drm/i915/display: Read/Write Adaptive Sync SDP
Re: [PATCH v2 6/6] drm/i915: Remove special handling for !RCS_MASK()
On Thu, Mar 14, 2024 at 01:57:46PM -0700, Matt Roper wrote: On Tue, Mar 12, 2024 at 04:51:45PM -0700, Lucas De Marchi wrote: With both XEHPSDV and PVC removed (as platforms, most of their code remain used by others), there's no need to handle !RCS_MASK() as other platforms don't ever have fused-off render. Remove those code paths and the special WA flag when initializing GuC. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 ++--- drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 - 3 files changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 396f5fe993c3..476651bd0a21 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -497,9 +497,8 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id, engine->logical_mask = BIT(logical_instance); __sprint_engine_name(engine); - if ((engine->class == COMPUTE_CLASS && !RCS_MASK(engine->gt) && -__ffs(CCS_MASK(engine->gt)) == engine->instance) || -engine->class == RENDER_CLASS) + if ((engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS) && + __ffs(CCS_MASK(engine->gt) | RCS_MASK(engine->gt)) == engine->instance) engine->flags |= I915_ENGINE_FIRST_RENDER_COMPUTE; Given that we expect all i915 platforms to have a render engine now, we could simplify this down to just if (engine->class == RENDER) engine->flags |= I915_ENGINE_FIRST_RENDER_COMPUTE; makes sense, but I'd rather add a patch on top to get rid of I915_ENGINE_FIRST_RENDER_COMPUTE and make this assumption "we always have a render engine" explicit. It seems that there's more that can be simplified when we do that. But either way, Reviewed-by: Matt Roper I will keep this patch as is for now. Thanks Lucas De Marchi /* features common between engines sharing EUs */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index 217277329546..3dd7699f2ad3 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -320,10 +320,6 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc) if (IS_DG2_G11(gt->i915)) flags |= GUC_WA_CONTEXT_ISOLATION; - /* Wa_18020744125 */ - if (!RCS_MASK(gt)) - flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST; - /* * Wa_14018913170: Applicable to all platforms supported by i915 so * don't bother testing for all X/Y/Z platforms explicitly. diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h index 14797e80bc92..1ad31a743197 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h @@ -101,7 +101,6 @@ #define GUC_WA_RCS_CCS_SWITCHOUT BIT(16) #define GUC_WA_HOLD_CCS_SWITCHOUTBIT(17) #define GUC_WA_POLLCSBIT(18) -#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21) #define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22) #define GUC_CTL_FEATURE2 -- 2.43.0 -- Matt Roper Graphics Software Engineer Linux GPU Platform Enablement Intel Corporation
[PATCH v20 8/9] drm/i915/display: Compute vrr_vsync params
Compute vrr_vsync_start/end, which sets the position
for hardware to send the Vsync at a fixed position
relative to the end of the Vblank.
--v2:
- Updated VSYNC_START/END macros to VRR_VSYNC_START/END. (Ankit)
- Updated bit fields of VRR_VSYNC_START/END. (Ankit)
--v3:
- Add PIPE_CONF_CHECK_I(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
--v4:
- Use VRR_SYNC_START/END macros correctly.
--v5:
- Send AS SDP only when VRR is enabled.
--v6:
- Add TRANS_VRR_VSYNC befor enabling VRR as per bspec. (Ankit)
Signed-off-by: Mitul Golani
Reviewed-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 33 +--
drivers/gpu/drm/i915/i915_reg.h | 7
4 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index eb8f36b38c41..9e5924e21eee 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5356,6 +5356,8 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
PIPE_CONF_CHECK_I(vrr.flipline);
PIPE_CONF_CHECK_I(vrr.pipeline_full);
PIPE_CONF_CHECK_I(vrr.guardband);
+ PIPE_CONF_CHECK_I(vrr.vsync_start);
+ PIPE_CONF_CHECK_I(vrr.vsync_end);
}
#undef PIPE_CONF_CHECK_X
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 36fcded7564a..95da3cf27188 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1431,6 +1431,7 @@ struct intel_crtc_state {
bool enable, in_range;
u8 pipeline_full;
u16 flipline, vmin, vmax, guardband;
+ u32 vsync_end, vsync_start;
} vrr;
/* Stream Splitter for eDP MSO */
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index eb5bd0743902..856378f8b90e 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -9,6 +9,7 @@
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_vrr.h"
+#include "intel_dp.h"
bool intel_vrr_is_capable(struct intel_connector *connector)
{
@@ -113,6 +114,7 @@ intel_vrr_compute_config(struct intel_crtc_state
*crtc_state,
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
struct intel_connector *connector =
to_intel_connector(conn_state->connector);
+ struct intel_dp *intel_dp = intel_attached_dp(connector);
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
const struct drm_display_info *info = &connector->base.display_info;
int vmin, vmax;
@@ -165,6 +167,14 @@ intel_vrr_compute_config(struct intel_crtc_state
*crtc_state,
if (crtc_state->uapi.vrr_enabled) {
crtc_state->vrr.enable = true;
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+ if (intel_dp_as_sdp_supported(intel_dp)) {
+ crtc_state->vrr.vsync_start =
+ (crtc_state->hw.adjusted_mode.crtc_vtotal -
+
crtc_state->hw.adjusted_mode.vsync_start);
+ crtc_state->vrr.vsync_end =
+ (crtc_state->hw.adjusted_mode.crtc_vtotal -
+ crtc_state->hw.adjusted_mode.vsync_end);
+ }
}
}
@@ -240,6 +250,12 @@ void intel_vrr_enable(const struct intel_crtc_state
*crtc_state)
return;
intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN);
+
+ if (HAS_AS_SDP(dev_priv))
+ intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder),
+ VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
+ VRR_VSYNC_START(crtc_state->vrr.vsync_start));
+
intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder),
VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
}
@@ -258,13 +274,16 @@ void intel_vrr_disable(const struct intel_crtc_state
*old_crtc_state)
intel_de_wait_for_clear(dev_priv, TRANS_VRR_STATUS(cpu_transcoder),
VRR_STATUS_VRR_EN_LIVE, 1000);
intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0);
+
+ if (HAS_AS_SDP(dev_priv))
+ intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), 0);
}
void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
-
RE: [PATCH v19 8/9] drm/i915/display: Compute vrr_vsync params
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Monday, March 18, 2024 4:42 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Golani, Mitulkumar Ajitkumar
> Subject: [PATCH v19 8/9] drm/i915/display: Compute vrr_vsync params
>
> Compute vrr_vsync_start/end, which sets the position for hardware to send the
> Vsync at a fixed position relative to the end of the Vblank.
>
> --v2:
> - Updated VSYNC_START/END macros to VRR_VSYNC_START/END. (Ankit)
> - Updated bit fields of VRR_VSYNC_START/END. (Ankit)
>
> --v3:
> - Add PIPE_CONF_CHECK_I(vrr.vsync_start/end).
> - Read/write vrr_vsync params only when we intend to send adaptive_sync sdp.
>
> --v4:
> - Use VRR_SYNC_START/END macros correctly.
>
> --v5:
> - Send AS SDP only when VRR is enabled.
> Signed-off-by: Mitul Golani
Reviewed-by: Arun R Murthy
Thanks and Regards,
Arun R Murthy
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 ++
> .../drm/i915/display/intel_display_types.h| 1 +
> drivers/gpu/drm/i915/display/intel_vrr.c | 33 +--
> drivers/gpu/drm/i915/i915_reg.h | 7
> 4 files changed, 41 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 8f1d948408d3..fed4ed18d53b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5377,6 +5377,8 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> PIPE_CONF_CHECK_I(vrr.flipline);
> PIPE_CONF_CHECK_I(vrr.pipeline_full);
> PIPE_CONF_CHECK_I(vrr.guardband);
> + PIPE_CONF_CHECK_I(vrr.vsync_start);
> + PIPE_CONF_CHECK_I(vrr.vsync_end);
> }
>
> #undef PIPE_CONF_CHECK_X
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 8a286751dc39..c2e08f641989 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1430,6 +1430,7 @@ struct intel_crtc_state {
> bool enable, in_range;
> u8 pipeline_full;
> u16 flipline, vmin, vmax, guardband;
> + u32 vsync_end, vsync_start;
> } vrr;
>
> /* Stream Splitter for eDP MSO */
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
> b/drivers/gpu/drm/i915/display/intel_vrr.c
> index eb5bd0743902..1d53623e7e0b 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -9,6 +9,7 @@
> #include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_vrr.h"
> +#include "intel_dp.h"
>
> bool intel_vrr_is_capable(struct intel_connector *connector) { @@ -113,6
> +114,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
> struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> struct intel_connector *connector =
> to_intel_connector(conn_state->connector);
> + struct intel_dp *intel_dp = intel_attached_dp(connector);
> struct drm_display_mode *adjusted_mode = &crtc_state-
> >hw.adjusted_mode;
> const struct drm_display_info *info = &connector->base.display_info;
> int vmin, vmax;
> @@ -165,6 +167,14 @@ intel_vrr_compute_config(struct intel_crtc_state
> *crtc_state,
> if (crtc_state->uapi.vrr_enabled) {
> crtc_state->vrr.enable = true;
> crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
> + if (intel_dp_as_sdp_supported(intel_dp)) {
> + crtc_state->vrr.vsync_start =
> + (crtc_state->hw.adjusted_mode.crtc_vtotal -
> + crtc_state-
> >hw.adjusted_mode.vsync_start);
> + crtc_state->vrr.vsync_end =
> + (crtc_state->hw.adjusted_mode.crtc_vtotal -
> + crtc_state-
> >hw.adjusted_mode.vsync_end);
> + }
> }
> }
>
> @@ -242,6 +252,12 @@ void intel_vrr_enable(const struct intel_crtc_state
> *crtc_state)
> intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder),
> TRANS_PUSH_EN);
> intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder),
> VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> +
> + if (HAS_AS_SDP(dev_priv)) {
> + intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder),
> +VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
> +VRR_VSYNC_START(crtc_state->vrr.vsync_start));
> + }
> }
>
> void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) @@ -
> 258,13 +274,16 @@ void intel_vrr_disable(const struct intel_crtc_state
> *old_crtc_state)
> intel_de_wait_for_clear(dev_priv,
> TRANS_VRR_STATUS(cpu_transcoder),
>
Re: [PATCH] drm/xe/display: check for error on drmm_mutex_init
On Tue, Mar 19, 2024 at 08:33:41AM +0530, Arun R Murthy wrote:
Check return value for drmm_mutex_init as it can fail and return on
failure.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/xe/display/xe_display.c | 24 ++--
1 file changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_display.c
b/drivers/gpu/drm/xe/display/xe_display.c
index e4db069f0db3..c59fa832758d 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -107,12 +107,24 @@ int xe_display_create(struct xe_device *xe)
xe->display.hotplug.dp_wq = alloc_ordered_workqueue("xe-dp", 0);
- drmm_mutex_init(&xe->drm, &xe->sb_lock);
- drmm_mutex_init(&xe->drm, &xe->display.backlight.lock);
- drmm_mutex_init(&xe->drm, &xe->display.audio.mutex);
- drmm_mutex_init(&xe->drm, &xe->display.wm.wm_mutex);
- drmm_mutex_init(&xe->drm, &xe->display.pps.mutex);
- drmm_mutex_init(&xe->drm, &xe->display.hdcp.hdcp_mutex);
+ err = drmm_mutex_init(&xe->drm, &xe->sb_lock);
+ if (err)
+ return err;
+ err = drmm_mutex_init(&xe->drm, &xe->display.backlight.lock);
+ if (err)
+ return err;
+ err = drmm_mutex_init(&xe->drm, &xe->display.audio.mutex);
+ if (err)
+ return err;
+ err = drmm_mutex_init(&xe->drm, &xe->display.wm.wm_mutex);
+ if (err)
+ return err;
+ err = drmm_mutex_init(&xe->drm, &xe->display.pps.mutex);
+ if (err)
+ return err;
+ err = drmm_mutex_init(&xe->drm, &xe->display.hdcp.hdcp_mutex);
+ if (err)
+ return err;
humn... but not very pretty. What about?
if ((err = drmm_mutex_init(&xe->drm, &xe->sb_lock)) ||
(err = drmm_mutex_init(&xe->drm, &xe->display.backlight.lock)) ||
(err = ...))
return err;
I think there are few places in life for assignment + check in single
statement, but IMO this is one of them where the alternative is uglier
and more error prone.
thoughts?
Lucas De Marchi
xe->enabled_irq_mask = ~0;
err = drmm_add_action_or_reset(&xe->drm, display_destroy, NULL);
--
2.25.1
✓ Fi.CI.BAT: success for drm/i915/xelpg: Add Wa_14020495402 (rev2)
== Series Details == Series: drm/i915/xelpg: Add Wa_14020495402 (rev2) URL : https://patchwork.freedesktop.org/series/131291/ State : success == Summary == CI Bug Log - changes from CI_DRM_14451 -> Patchwork_131291v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/index.html Participating hosts (38 -> 35) -- Missing(3): fi-glk-j4005 bat-kbl-2 fi-snb-2520m Known issues Here are the changes found in Patchwork_131291v2 that come from known issues: ### CI changes ### Issues hit * boot: - fi-apl-guc: [PASS][1] -> [FAIL][2] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14451/fi-apl-guc/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/fi-apl-guc/boot.html ### IGT changes ### Issues hit * igt@gem_lmem_swapping@verify-random: - bat-mtlp-6: NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@gem_lmem_swapp...@verify-random.html * igt@i915_pm_rps@basic-api: - bat-mtlp-6: NOTRUN -> [SKIP][4] ([i915#6621]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_lrc: - bat-dg2-8: [PASS][5] -> [ABORT][6] ([i915#10366]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14451/bat-dg2-8/igt@i915_selftest@live@gt_lrc.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-dg2-8/igt@i915_selftest@live@gt_lrc.html * igt@i915_selftest@live@gt_pm: - bat-jsl-3: [PASS][7] -> [DMESG-FAIL][8] ([i915#10444]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14451/bat-jsl-3/igt@i915_selftest@live@gt_pm.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-jsl-3/igt@i915_selftest@live@gt_pm.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-mtlp-6: NOTRUN -> [SKIP][9] ([i915#5274] / [i915#9792]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_frontbuffer_tracking@basic: - bat-mtlp-6: NOTRUN -> [SKIP][10] ([i915#4342] / [i915#5354] / [i915#9792]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@kms_frontbuffer_track...@basic.html * igt@kms_pipe_crc_basic@hang-read-crc: - bat-mtlp-6: NOTRUN -> [SKIP][11] ([i915#9792]) +7 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@kms_pipe_crc_ba...@hang-read-crc.html * igt@kms_pm_backlight@basic-brightness: - bat-mtlp-6: NOTRUN -> [SKIP][12] ([i915#5354] / [i915#9792]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@kms_pm_backli...@basic-brightness.html * igt@kms_psr@psr-cursor-plane-move: - bat-mtlp-6: NOTRUN -> [SKIP][13] ([i915#9673] / [i915#9732] / [i915#9792]) +3 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@kms_...@psr-cursor-plane-move.html * igt@kms_setmode@basic-clone-single-crtc: - bat-mtlp-6: NOTRUN -> [SKIP][14] ([i915#3555] / [i915#8809] / [i915#9792]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-flip: - bat-mtlp-6: NOTRUN -> [SKIP][15] ([i915#3708] / [i915#9792]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@prime_v...@basic-fence-flip.html * igt@prime_vgem@basic-fence-mmap: - bat-mtlp-6: NOTRUN -> [SKIP][16] ([i915#3708] / [i915#4077]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@prime_v...@basic-fence-mmap.html * igt@prime_vgem@basic-read: - bat-mtlp-6: NOTRUN -> [SKIP][17] ([i915#3708]) +1 other test skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@prime_v...@basic-read.html * igt@prime_vgem@basic-write: - bat-mtlp-6: NOTRUN -> [SKIP][18] ([i915#10216] / [i915#3708]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131291v2/bat-mtlp-6/igt@prime_v...@basic-write.html [i915#10216]: https://gitlab.freedesktop.org/drm/intel/issues/10216 [i915#10366]: https://gitlab.freedesktop.org/drm/intel/issues/10366 [i915#10444]: https://gitlab.freedesktop.org/drm/intel/issues/10444 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4342]: https://gitlab.freedeskt
✗ Fi.CI.BAT: failure for Wa_16021440873 and early transport fixes
== Series Details == Series: Wa_16021440873 and early transport fixes URL : https://patchwork.freedesktop.org/series/131324/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14451 -> Patchwork_131324v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_131324v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_131324v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/index.html Participating hosts (38 -> 37) -- Missing(1): fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_131324v1: ### IGT changes ### Possible regressions * igt@kms_force_connector_basic@force-connector-state: - bat-dg2-8: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14451/bat-dg2-8/igt@kms_force_connector_ba...@force-connector-state.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-dg2-8/igt@kms_force_connector_ba...@force-connector-state.html Known issues Here are the changes found in Patchwork_131324v1 that come from known issues: ### CI changes ### Issues hit * boot: - bat-arls-3: [PASS][3] -> [FAIL][4] ([i915#10234]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14451/bat-arls-3/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-arls-3/boot.html Possible fixes * boot: - bat-jsl-1: [FAIL][5] ([i915#8293]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14451/bat-jsl-1/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-jsl-1/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-jsl-1: NOTRUN -> [SKIP][7] ([i915#9318]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - bat-jsl-1: NOTRUN -> [SKIP][8] ([i915#2190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-jsl-1/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-6: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-mtlp-6/igt@gem_lmem_swapp...@verify-random.html - bat-jsl-1: NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html * igt@i915_pm_rps@basic-api: - bat-mtlp-6: NOTRUN -> [SKIP][11] ([i915#6621]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-mtlp-6/igt@i915_pm_...@basic-api.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-jsl-1: NOTRUN -> [SKIP][12] ([i915#4103]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-jsl-1: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9886]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-jsl-1/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-jsl-1: NOTRUN -> [SKIP][14] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-jsl-1/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-mtlp-6: NOTRUN -> [SKIP][15] ([i915#5274] / [i915#9792]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-mtlp-6/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_frontbuffer_tracking@basic: - bat-mtlp-6: NOTRUN -> [SKIP][16] ([i915#4342] / [i915#5354] / [i915#9792]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-mtlp-6/igt@kms_frontbuffer_track...@basic.html * igt@kms_pipe_crc_basic@hang-read-crc: - bat-mtlp-6: NOTRUN -> [SKIP][17] ([i915#9792]) +7 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-mtlp-6/igt@kms_pipe_crc_ba...@hang-read-crc.html * igt@kms_pm_backlight@basic-brightness: - bat-mtlp-6: NOTRUN -> [SKIP][18] ([i915#5354] / [i915#9792]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131324v1/bat-mtlp-6/igt@kms_pm_backli...@basic-brightness.html * igt@kms_psr@psr-cursor-plane-move: - bat-mtlp-6:
✗ Fi.CI.SPARSE: warning for Wa_16021440873 and early transport fixes
== Series Details == Series: Wa_16021440873 and early transport fixes URL : https://patchwork.freedesktop.org/series/131324/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/as
✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/bios: Tolerate devdata==NULL in intel_bios_encoder_supports_dp_dual_mode()
== Series Details == Series: series starting with [1/2] drm/i915/bios: Tolerate devdata==NULL in intel_bios_encoder_supports_dp_dual_mode() URL : https://patchwork.freedesktop.org/series/131316/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14450 -> Patchwork_131316v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_131316v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_131316v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/index.html Participating hosts (37 -> 36) -- Additional (2): bat-dg1-7 bat-dg2-11 Missing(3): fi-glk-j4005 fi-snb-2520m fi-kbl-8809g Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_131316v1: ### CI changes ### Possible regressions * boot: - bat-dg2-11: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-dg2-11/boot.html Known issues Here are the changes found in Patchwork_131316v1 that come from known issues: ### CI changes ### Issues hit * boot: - bat-jsl-1: [PASS][2] -> [FAIL][3] ([i915#8293]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14450/bat-jsl-1/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-jsl-1/boot.html Possible fixes * boot: - bat-arls-3: [FAIL][4] ([i915#10234]) -> [PASS][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14450/bat-arls-3/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-arls-3/boot.html - fi-apl-guc: [FAIL][6] ([i915#8293]) -> [PASS][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14450/fi-apl-guc/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/fi-apl-guc/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-arls-3: NOTRUN -> [SKIP][8] ([i915#9318]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@gem_lmem_swapping@basic: - fi-apl-guc: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/fi-apl-guc/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-arls-3: NOTRUN -> [SKIP][10] ([i915#10213]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][11] ([i915#4083]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-dg1-7/igt@gem_m...@basic.html - bat-arls-3: NOTRUN -> [SKIP][12] ([i915#4083]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-arls-3/igt@gem_m...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][13] ([i915#10197] / [i915#10211] / [i915#4079]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][14] ([i915#10196] / [i915#4077]) +2 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][15] ([i915#4077]) +2 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][16] ([i915#4079]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-dg1-7/igt@gem_tiled_pread_basic.html - bat-arls-3: NOTRUN -> [SKIP][17] ([i915#10206] / [i915#4079]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-arls-3/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][18] ([i915#6621]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-dg1-7/igt@i915_pm_...@basic-api.html - bat-arls-3: NOTRUN -> [SKIP][19] ([i915#10209]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131316v1/bat-arls-3/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-legacy: - bat-arls-3: NOTRUN -> [SKIP][20] ([i915#10200]) +9 other tests skip [20
v6.7+ stable backport request for drm/i915
Hi stable team,
Please backport the following the commits to 6.7/6.8 to fix
some i915 type-c/thunderbolt PLL issues:
commit 92b47c3b8b24 ("drm/i915: Replace a memset() with zero initialization")
commit ba407525f824 ("drm/i915: Try to preserve the current shared_dpll for
fastset on type-c ports")
commit d283ee5662c6 ("drm/i915: Include the PLL name in the debug messages")
commit 33c7760226c7 ("drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT
PLLs")
6.7 will need two additional dependencies:
commit f215038f4133 ("drm/i915: Use named initializers for DPLL info")
commit 58046e6cf811 ("drm/i915: Stop printing pipe name as hex")
Thanks.
--
Ville Syrjälä
Intel
✓ Fi.CI.BAT: success for drm/i915/mst: enable MST mode for 128b/132b single-stream sideband (rev5)
== Series Details == Series: drm/i915/mst: enable MST mode for 128b/132b single-stream sideband (rev5) URL : https://patchwork.freedesktop.org/series/129468/ State : success == Summary == CI Bug Log - changes from CI_DRM_14450 -> Patchwork_129468v5 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/index.html Participating hosts (37 -> 35) -- Additional (1): bat-dg2-11 Missing(3): fi-glk-j4005 fi-snb-2520m fi-kbl-8809g Known issues Here are the changes found in Patchwork_129468v5 that come from known issues: ### CI changes ### Issues hit * boot: - bat-jsl-1: [PASS][1] -> [FAIL][2] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14450/bat-jsl-1/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-jsl-1/boot.html Possible fixes * boot: - bat-arls-3: [FAIL][3] ([i915#10234]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14450/bat-arls-3/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-arls-3: NOTRUN -> [SKIP][5] ([i915#9318]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-arls-3: NOTRUN -> [SKIP][6] ([i915#10213]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-dg2-11: NOTRUN -> [SKIP][7] ([i915#4083]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-dg2-11/igt@gem_m...@basic.html - bat-arls-3: NOTRUN -> [SKIP][8] ([i915#4083]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/igt@gem_m...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][9] ([i915#10197] / [i915#10211] / [i915#4079]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][10] ([i915#10196] / [i915#4077]) +2 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg2-11: NOTRUN -> [SKIP][11] ([i915#4077]) +2 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-dg2-11/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-11: NOTRUN -> [SKIP][12] ([i915#4079]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-dg2-11/igt@gem_tiled_pread_basic.html - bat-arls-3: NOTRUN -> [SKIP][13] ([i915#10206] / [i915#4079]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-11: NOTRUN -> [SKIP][14] ([i915#6621]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-dg2-11/igt@i915_pm_...@basic-api.html - bat-arls-3: NOTRUN -> [SKIP][15] ([i915#10209]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-legacy: - bat-arls-3: NOTRUN -> [SKIP][16] ([i915#10200]) +9 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-arls-3/igt@kms_addfb_ba...@addfb25-x-tiled-legacy.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg2-11: NOTRUN -> [SKIP][17] ([i915#4212]) +7 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-dg2-11/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-11: NOTRUN -> [SKIP][18] ([i915#5190]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-dg2-11/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-11: NOTRUN -> [SKIP][19] ([i915#4215] / [i915#5190]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-dg2-11/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - bat-dg2-11: NOTRUN -> [SKIP][20] ([i915#4103] / [i915#4213]) +1 other test skip [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129468v5/bat-dg2-11/igt@kms_cursor_leg...@basic-busy-flip-before-curso
✗ Fi.CI.SPARSE: warning for drm/i915/mst: enable MST mode for 128b/132b single-stream sideband (rev5)
== Series Details == Series: drm/i915/mst: enable MST mode for 128b/132b single-stream sideband (rev5) URL : https://patchwork.freedesktop.org/series/129468/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for drm/i915/mst: enable MST mode for 128b/132b single-stream sideband (rev5)
== Series Details == Series: drm/i915/mst: enable MST mode for 128b/132b single-stream sideband (rev5) URL : https://patchwork.freedesktop.org/series/129468/ State : warning == Summary == Error: dim checkpatch failed aa23c24a5c13 drm/mst: read sideband messaging cap -:132: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #132: FILE: include/drm/display/drm_dp_mst_helper.h:841: +enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]); total: 0 errors, 1 warnings, 0 checks, 90 lines checked 4176b5c372c7 drm/i915/mst: improve debug logging of DP MST mode detect c9d2516fb791 drm/i915/mst: abstract choosing the MST mode to use 8200460c833d drm/i915/mst: use the MST mode detected previously d8ea505f4da0 drm/i915/mst: add intel_dp_mst_disconnect() 5b4970c517a8 drm/i915/mst: enable MST mode for 128b/132b single-stream sideband
RE: [PATCH i-g-t v3 0/5] lib/kunit: Execute test cases synchronously
-Original Message- From: Janusz Krzysztofik Sent: Monday, March 18, 2024 3:13 AM To: igt-...@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org; Kamil Konieczny ; Mauro Carvalho Chehab ; Cavitt, Jonathan ; De Marchi, Lucas Subject: [PATCH i-g-t v3 0/5] lib/kunit: Execute test cases synchronously > > Up to now we were loading a KUnit test module in test execution mode only > once per subtest, in background, and then, in parallel with execution of > test cases while the module was loading, we were looking through dmesg for > KTAP results from each expected test case. As a consequence, our IGT > messages were more or less delayed, never in full sync with kernel > messages. Moreover, parsing of KTAP results from already completed test > cases could be abandoned on a failure from loading the test module or > kernel taint caused by a subsequent test case. Also, parsing of KTAP > results from all subsequent test cases could be abandoned on a failure of > the parser caused by any test case. Other than that, if a user requested > a single dynamic sub-subtest, all test cases were executed anyway while > results from only one of them that corresponded to the selected dynamic > sub-subtest were reported. That way, kernel messages from unrelated test > cases, not only the selected one, could contribute to dmesg-fail or dmesg- > warn CI results from that sub-subtest. > > Since recent KUnit implementation is capable of executing only those test > cases that match a user filter, stop executing all of them asynchronously > and parsing their KTAP results as they appear. Instead, reload the test > module once per each dynamic sub-subtest with a filter that selects a > specific test case and wait for its completion. If successful and no > kernel taint has occurred then parse the whole KTAP report from a single > test case it has produced and translate it to IGT result of that single > corresponding sub-subtest. > > v3: Insert new patches 1-3 that fix an infinite loop when we try to get a > list of test cases from an unexpectedly missing KTAP report. > v2: Refresh the series on top of changes to KUnit filters handling, > - move the code of a new helper from a previous patch 1 to a previous > patch 2 which now becomes patch 1, > - actually limit the scope of the helper to fetching a KTAP report from > a file descriptor, and let the callers decide on how other steps, like > setting up filters or loading a test module, and errors they return > are handled, > - update commit description with a more detailed justification of why we > need these changes, > - rebase the former patch 1 on top of the new patch 1, update its commit > message and description and provide it as patch 2. > > Janusz Krzysztofik (5): > lib/kunit: Store igt_ktap_results pointer in a central location > lib/kunit: Let igt_ktap_free() take care of pointer reset > lib/kunit: Time out promptly on missing KTAP report > lib/kunit: Execute test cases synchronously > lib/kunit: Minimize code duplication > Acked-by: Jonathan Cavitt Ack applies to all patches in series. It seems that Kamil is giving a proper review to all the individual patches, so I'd wait until that's done before moving forward. -Jonathan Cavitt > lib/igt_kmod.c | 193 ++-- > lib/igt_ktap.c | 5 +- > lib/igt_ktap.h | 2 +- > lib/tests/igt_ktap_parser.c | 24 ++--- > 4 files changed, 93 insertions(+), 131 deletions(-) > > -- > 2.43.0 > >
Re: [PATCH i-g-t v3 3/5] lib/kunit: Time out promptly on missing KTAP report
Hi Janusz,
On 2024-03-18 at 11:13:29 +0100, Janusz Krzysztofik wrote:
> If a test provides a subtest name that doesn't match any test suites
> provided by the requested KUnit test module then no KTAP report appears in
> dmesg, not even an empty one as one may expect. As a consequence, we now
> loop endlessly around reading potential lines of the missing report from
> /dev/kmsg, until killed by IGT runner on timeout.
>
> When trying to collect names of test cases from a KTAP report generated in
> all skip mode, set an alarm that fires up 10 seconds after we start
> waiting for the report, interrupts blocking read() if pending, and
> terminates the subtest with SKIP result.
>
> As soon as we have collected a non-empty list of test cases, we may as
> well expect a non-empty KTAP report from actual execution of those test
> cases, assuming successful load of the KUnit test module in execution
> mode. Then, there is no need to set up a similar timeout before we start
> to extract and parse that report.
>
> Suggested-by: Kamil Konieczny
> Signed-off-by: Janusz Krzysztofik
Reviewed-by: Kamil Konieczny
> ---
> lib/igt_kmod.c | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
> index 8a6824ea7e..f0e4d5ec76 100644
> --- a/lib/igt_kmod.c
> +++ b/lib/igt_kmod.c
> @@ -1204,12 +1204,19 @@ static void __igt_kunit_legacy(struct igt_ktest *tst,
> igt_skip_on_f(ret, "KTAP parser failed\n");
> }
>
> +static void kunit_get_tests_timeout(int signal)
> +{
> + igt_skip("Timed out while trying to extract a list of KUnit test cases
> from /dev/kmsg\n");
> +}
> +
> static bool kunit_get_tests(struct igt_list_head *tests,
> struct igt_ktest *tst,
> const char *suite,
> const char *opts,
> struct igt_ktap_results **ktap)
> {
> + struct sigaction sigalrm = { .sa_handler = kunit_get_tests_timeout, },
> + *saved;
> struct igt_ktap_result *r, *rn;
> unsigned long taints;
> int flags, err;
> @@ -1239,10 +1246,16 @@ static bool kunit_get_tests(struct igt_list_head
> *tests,
> *ktap = igt_ktap_alloc(tests);
> igt_require(*ktap);
>
> + igt_skip_on(sigaction(SIGALRM, &sigalrm, saved));
> + alarm(10);
> +
> do
> err = kunit_kmsg_result_get(tests, NULL, tst->kmsg, *ktap);
> while (err == -EINPROGRESS);
>
> + alarm(0);
> + igt_debug_on(sigaction(SIGALRM, saved, NULL));
> +
> igt_ktap_free(ktap);
>
> igt_skip_on_f(err,
> --
> 2.43.0
>
Re: [PATCH i-g-t v3 2/5] lib/kunit: Let igt_ktap_free() take care of pointer reset
Hi Janusz,
On 2024-03-18 at 11:13:28 +0100, Janusz Krzysztofik wrote:
> Users who store a pointer to struct igt_ktap_results, obtained from
> igt_ktap_alloc(), in a central location and then call igt_ktap_free() when
> no longer needed, now have to reset that pointer to NULL to avoid double
> free on final cleanup. For their convenience, teach igt_ktap_free() to
> accept that location as an argument and reset the pointer after freeing
> the structure.
>
> Signed-off-by: Janusz Krzysztofik
LGTM,
Reviewed-by: Kamil Konieczny
> ---
> lib/igt_kmod.c | 12 +---
> lib/igt_ktap.c | 5 +++--
> lib/igt_ktap.h | 2 +-
> lib/tests/igt_ktap_parser.c | 24
> 4 files changed, 21 insertions(+), 22 deletions(-)
>
> diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
> index ca20012a97..8a6824ea7e 100644
> --- a/lib/igt_kmod.c
> +++ b/lib/igt_kmod.c
> @@ -1094,7 +1094,7 @@ static void __igt_kunit_legacy(struct igt_ktest *tst,
>
> if (igt_debug_on(pthread_create(&modprobe.thread, NULL,
> modprobe_task, &modprobe))) {
> - igt_ktap_free(ktap);
> + igt_ktap_free(&ktap);
> igt_skip("Failed to create a modprobe thread\n");
> }
>
> @@ -1197,7 +1197,7 @@ static void __igt_kunit_legacy(struct igt_ktest *tst,
> break;
> }
>
> - igt_ktap_free(ktap);
> + igt_ktap_free(&ktap);
>
> igt_skip_on(modprobe.err);
> igt_skip_on(igt_kernel_tainted(&taints));
> @@ -1243,8 +1243,7 @@ static bool kunit_get_tests(struct igt_list_head *tests,
> err = kunit_kmsg_result_get(tests, NULL, tst->kmsg, *ktap);
> while (err == -EINPROGRESS);
>
> - igt_ktap_free(*ktap);
> - *ktap = NULL;
> + igt_ktap_free(ktap);
>
> igt_skip_on_f(err,
> "KTAP parser failed while getting a list of test
> cases\n");
> @@ -1405,8 +1404,7 @@ static void __igt_kunit(struct igt_ktest *tst,
> }
> }
>
> - igt_ktap_free(*ktap);
> - *ktap = NULL;
> + igt_ktap_free(ktap);
>
> igt_skip_on(modprobe.err);
> igt_skip_on(igt_kernel_tainted(&taints));
> @@ -1487,7 +1485,7 @@ void igt_kunit(const char *module_name, const char
> *suite, const char *opts)
> igt_fixture {
> char *suite_name = NULL, *case_name = NULL;
>
> - igt_ktap_free(ktap);
> + igt_ktap_free(&ktap);
>
> kunit_results_free(&tests, &suite_name, &case_name);
>
> diff --git a/lib/igt_ktap.c b/lib/igt_ktap.c
> index aa7ea84476..300fb2bb5a 100644
> --- a/lib/igt_ktap.c
> +++ b/lib/igt_ktap.c
> @@ -310,7 +310,8 @@ struct igt_ktap_results *igt_ktap_alloc(struct
> igt_list_head *results)
> return ktap;
> }
>
> -void igt_ktap_free(struct igt_ktap_results *ktap)
> +void igt_ktap_free(struct igt_ktap_results **ktap)
> {
> - free(ktap);
> + free(*ktap);
> + *ktap = NULL;
> }
> diff --git a/lib/igt_ktap.h b/lib/igt_ktap.h
> index c422636bfc..7684e859b3 100644
> --- a/lib/igt_ktap.h
> +++ b/lib/igt_ktap.h
> @@ -41,6 +41,6 @@ struct igt_ktap_results;
>
> struct igt_ktap_results *igt_ktap_alloc(struct igt_list_head *results);
> int igt_ktap_parse(const char *buf, struct igt_ktap_results *ktap);
> -void igt_ktap_free(struct igt_ktap_results *ktap);
> +void igt_ktap_free(struct igt_ktap_results **ktap);
>
> #endif /* IGT_KTAP_H */
> diff --git a/lib/tests/igt_ktap_parser.c b/lib/tests/igt_ktap_parser.c
> index 6357bdf6a5..8c2d16080d 100644
> --- a/lib/tests/igt_ktap_parser.c
> +++ b/lib/tests/igt_ktap_parser.c
> @@ -45,7 +45,7 @@ static void ktap_list(void)
> igt_assert_eq(igt_ktap_parse("ok 4 test_case_4 # SKIP\n", ktap),
> -EINPROGRESS);
> igt_assert_eq(igt_ktap_parse("ok 3 test_suite_3\n", ktap), 0);
>
> - igt_ktap_free(ktap);
> + igt_ktap_free(&ktap);
>
> igt_assert_eq(igt_list_length(&results), 8);
>
> @@ -107,7 +107,7 @@ static void ktap_results(void)
> igt_assert_eq(igt_ktap_parse("ok 1 test_case\n", ktap),
> -EINPROGRESS);
> igt_assert_eq(igt_ktap_parse("not ok 1 test_suite\n", ktap), 0);
>
> - igt_ktap_free(ktap);
> + igt_ktap_free(&ktap);
>
> igt_assert_eq(igt_list_length(&results), 2);
>
> @@ -162,7 +162,7 @@ static void ktap_success(void)
> igt_assert_eq(igt_ktap_parse("not ok 1 test_suite\n", ktap), 0);
> igt_assert_eq(igt_list_length(&results), 2);
>
> - igt_ktap_free(ktap);
> + igt_ktap_free(&ktap);
>
> result = igt_list_last_entry(&results, result, link);
> igt_list_del(&result->link);
> @@ -186,48 +186,48 @@ static void ktap_top_version(void)
> ktap = igt_ktap_alloc(&results);
> igt_require(ktap);
> igt_assert_eq(igt_ktap_parse("1..1\n", ktap), -EPROTO);
> - igt_ktap_free(ktap);
> + igt_ktap_free(&ktap);
>
> ktap = igt_ktap_alloc(&results);
> igt_require(ktap);
>
Re: [PATCH i-g-t v3 1/5] lib/kunit: Store igt_ktap_results pointer in a central location
Hi Janusz,
On 2024-03-18 at 11:13:27 +0100, Janusz Krzysztofik wrote:
> To give more freedom to future enhancements of KUnit library (legacy path
> excluded) in using IGT fails and skips, maintain a pointer to struct
> igt_ktap_results, allocated by several functions, in a single central
> location, and free it from a closing igt_fixture section before return.
>
> Signed-off-by: Janusz Krzysztofik
Reviewed-by: Kamil Konieczny
> ---
> lib/igt_kmod.c | 35 ---
> 1 file changed, 20 insertions(+), 15 deletions(-)
>
> diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
> index b4b8848983..ca20012a97 100644
> --- a/lib/igt_kmod.c
> +++ b/lib/igt_kmod.c
> @@ -1207,10 +1207,10 @@ static void __igt_kunit_legacy(struct igt_ktest *tst,
> static bool kunit_get_tests(struct igt_list_head *tests,
> struct igt_ktest *tst,
> const char *suite,
> - const char *opts)
> + const char *opts,
> + struct igt_ktap_results **ktap)
> {
> struct igt_ktap_result *r, *rn;
> - struct igt_ktap_results *ktap;
> unsigned long taints;
> int flags, err;
>
> @@ -1236,14 +1236,15 @@ static bool kunit_get_tests(struct igt_list_head
> *tests,
> igt_skip_on(modprobe(tst->kmod, opts));
> igt_skip_on(igt_kernel_tainted(&taints));
>
> - ktap = igt_ktap_alloc(tests);
> - igt_require(ktap);
> + *ktap = igt_ktap_alloc(tests);
> + igt_require(*ktap);
>
> do
> - err = kunit_kmsg_result_get(tests, NULL, tst->kmsg, ktap);
> + err = kunit_kmsg_result_get(tests, NULL, tst->kmsg, *ktap);
> while (err == -EINPROGRESS);
>
> - igt_ktap_free(ktap);
> + igt_ktap_free(*ktap);
> + *ktap = NULL;
>
> igt_skip_on_f(err,
> "KTAP parser failed while getting a list of test
> cases\n");
> @@ -1261,12 +1262,12 @@ static void __igt_kunit(struct igt_ktest *tst,
> const char *subtest,
> const char *suite,
> const char *opts,
> - struct igt_list_head *tests)
> + struct igt_list_head *tests,
> + struct igt_ktap_results **ktap)
> {
> struct modprobe_data modprobe = { tst->kmod, opts, 0, pthread_self(), };
> char *suite_name = NULL, *case_name = NULL;
> struct igt_ktap_result *t, *r = NULL;
> - struct igt_ktap_results *ktap;
> pthread_mutexattr_t attr;
> IGT_LIST_HEAD(results);
> int ret = -EINPROGRESS;
> @@ -1274,8 +1275,8 @@ static void __igt_kunit(struct igt_ktest *tst,
>
> igt_skip_on(lseek(tst->kmsg, 0, SEEK_END) < 0);
>
> - ktap = igt_ktap_alloc(&results);
> - igt_require(ktap);
> + *ktap = igt_ktap_alloc(&results);
> + igt_require(*ktap);
>
> igt_list_for_each_entry(t, tests, link) {
> igt_dynamic_f("%s%s%s",
> @@ -1302,7 +1303,7 @@ static void __igt_kunit(struct igt_ktest *tst,
> igt_assert(igt_list_empty(&results));
> igt_assert_eq(ret, -EINPROGRESS);
> ret = kunit_kmsg_result_get(&results, &modprobe,
> - tst->kmsg, ktap);
> + tst->kmsg, *ktap);
> igt_fail_on(igt_list_empty(&results));
>
> r = igt_list_first_entry(&results, r, link);
> @@ -1324,7 +1325,7 @@ static void __igt_kunit(struct igt_ktest *tst,
> ret = kunit_kmsg_result_get(&results,
> &modprobe,
> tst->kmsg,
> - ktap);
> + *ktap);
> igt_fail_on(igt_list_empty(&results));
> }
>
> @@ -1404,7 +1405,8 @@ static void __igt_kunit(struct igt_ktest *tst,
> }
> }
>
> - igt_ktap_free(ktap);
> + igt_ktap_free(*ktap);
> + *ktap = NULL;
>
> igt_skip_on(modprobe.err);
> igt_skip_on(igt_kernel_tainted(&taints));
> @@ -1427,6 +1429,7 @@ static void __igt_kunit(struct igt_ktest *tst,
> void igt_kunit(const char *module_name, const char *suite, const char *opts)
> {
> struct igt_ktest tst = { .kmsg = -1, };
> + struct igt_ktap_results *ktap = NULL;
> const char *subtest = suite;
> IGT_LIST_HEAD(tests);
>
> @@ -1475,15 +1478,17 @@ void igt_kunit(const char *module_name, const char
> *suite, const char *opts)
>* LTS kernels not capable of using KUnit filters for
>* listing test cases in KTAP for
Re: [PATCH 1/2] drm/i915/bios: Tolerate devdata==NULL in intel_bios_encoder_supports_dp_dual_mode()
On Tue, Mar 19, 2024 at 11:29:14AM +0200, Jani Nikula wrote:
> On Tue, 19 Mar 2024, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > If we have no VBT, or the VBT didn't declare the encoder
> > in question, we won't have the 'devdata' for the encoder.
> > Instead of oopsing just bail early.
> >
> > We won't be able to tell whether the port is DP++ or not,
> > but so be it.
> >
> > Cc: sta...@vger.kernel.org
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10464
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/display/intel_bios.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> > b/drivers/gpu/drm/i915/display/intel_bios.c
> > index c7841b3eede8..c13a98431a7b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> > @@ -3458,6 +3458,9 @@ bool intel_bios_encoder_supports_dp_dual_mode(const
> > struct intel_bios_encoder_da
> > {
> > const struct child_device_config *child = &devdata->child;
>
> The above oopses already.
Nope. It's just taking the address of the thing.
>
> BR,
> Jani.
>
> >
> > + if (!devdata)
> > + return false;
> > +
> > if (!intel_bios_encoder_supports_dp(devdata) ||
> > !intel_bios_encoder_supports_hdmi(devdata))
> > return false;
>
> --
> Jani Nikula, Intel
--
Ville Syrjälä
Intel
✗ Fi.CI.BAT: failure for Bigjoiner refactoring (rev13)
== Series Details == Series: Bigjoiner refactoring (rev13) URL : https://patchwork.freedesktop.org/series/128311/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14447 -> Patchwork_128311v13 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_128311v13 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_128311v13, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/index.html Participating hosts (37 -> 36) -- Additional (2): bat-dg1-7 fi-kbl-8809g Missing(3): fi-glk-j4005 fi-apl-guc fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_128311v13: ### CI changes ### Possible regressions * boot: - bat-dg2-11: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14447/bat-dg2-11/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-dg2-11/boot.html Known issues Here are the changes found in Patchwork_128311v13 that come from known issues: ### CI changes ### Possible fixes * boot: - bat-arls-3: [FAIL][3] ([i915#10234]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14447/bat-arls-3/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-arls-3/boot.html - fi-cfl-8109u: [FAIL][5] ([i915#8293]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14447/fi-cfl-8109u/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/fi-cfl-8109u/boot.html ### IGT changes ### Issues hit * igt@core_hotunplug@unbind-rebind: - fi-kbl-8809g: NOTRUN -> [DMESG-WARN][7] ([i915#10462]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/fi-kbl-8809g/igt@core_hotunp...@unbind-rebind.html * igt@debugfs_test@basic-hwmon: - bat-arls-3: NOTRUN -> [SKIP][8] ([i915#9318]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@info: - fi-kbl-8809g: NOTRUN -> [SKIP][9] ([i915#1849]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/fi-kbl-8809g/igt@fb...@info.html * igt@gem_huc_copy@huc-copy: - fi-cfl-8109u: NOTRUN -> [SKIP][10] ([i915#2190]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html - fi-kbl-8809g: NOTRUN -> [SKIP][11] ([i915#2190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-8809g: NOTRUN -> [SKIP][12] ([i915#4613]) +3 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/fi-kbl-8809g/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-arls-3: NOTRUN -> [SKIP][13] ([i915#10213]) +3 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-cfl-8109u: NOTRUN -> [SKIP][14] ([i915#4613]) +3 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][15] ([i915#4083]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-dg1-7/igt@gem_m...@basic.html - bat-arls-3: NOTRUN -> [SKIP][16] ([i915#4083]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-arls-3/igt@gem_m...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][17] ([i915#10197] / [i915#10211] / [i915#4079]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][18] ([i915#10196] / [i915#4077]) +2 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][19] ([i915#4077]) +2 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v13/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][20] ([i915#4079]) +1 other test skip [20]: htt
✗ Fi.CI.SPARSE: warning for Bigjoiner refactoring (rev13)
== Series Details == Series: Bigjoiner refactoring (rev13) URL : https://patchwork.freedesktop.org/series/128311/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:
✗ Fi.CI.CHECKPATCH: warning for Bigjoiner refactoring (rev13)
== Series Details ==
Series: Bigjoiner refactoring (rev13)
URL : https://patchwork.freedesktop.org/series/128311/
State : warning
== Summary ==
Error: dim checkpatch failed
999dde986c7d drm/i915: Add a small helper to compute the set of pipes for crtc
6cbe4e0e2f3e drm/i915: Extract intel_ddi_post_disable_hdmi_or_sst()
-:77: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#77: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3136:
+{
+
total: 0 errors, 0 warnings, 1 checks, 57 lines checked
9cb9a8701ff1 drm/i915: Utilize intel_crtc_joined_pipe_mask() more
48d5877ce2c4 drm/i915: Handle joined pipes inside hsw_crtc_disable()
-:130: ERROR:CODE_INDENT: code indent should use tabs where possible
#130: FILE: drivers/gpu/drm/i915/display/intel_display.c:6819:
+if (intel_crtc_is_bigjoiner_slave(old_crtc_state))$
-:130: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#130: FILE: drivers/gpu/drm/i915/display/intel_display.c:6819:
+if (intel_crtc_is_bigjoiner_slave(old_crtc_state))$
-:131: ERROR:CODE_INDENT: code indent should use tabs where possible
#131: FILE: drivers/gpu/drm/i915/display/intel_display.c:6820:
+continue;$
-:131: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#131: FILE: drivers/gpu/drm/i915/display/intel_display.c:6820:
+continue;$
total: 2 errors, 2 warnings, 0 checks, 111 lines checked
29738fb9d7e0 drm/i915: Handle joined pipes inside hsw_crtc_enable()
-:8: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible
unwrapped commit description?)
#8:
That way we can also remove a bunch of checks like
intel_crtc_is_bigjoiner_slave.
-:278: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a
separate line
#278: FILE: drivers/gpu/drm/i915/display/intel_display.c:1718:
+* to change the workaround. */
-:331: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in
parentheses
#331: FILE: drivers/gpu/drm/i915/display/intel_display.h:315:
+#define for_each_intel_crtc_in_pipe_mask_reverse(dev, intel_crtc, pipe_mask)
\
+ list_for_each_entry_reverse(intel_crtc,
\
+ &(dev)->mode_config.crtc_list,
\
+ base.head)
\
+ for_each_if((pipe_mask) & BIT(intel_crtc->pipe))
-:331: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_crtc' - possible
side-effects?
#331: FILE: drivers/gpu/drm/i915/display/intel_display.h:315:
+#define for_each_intel_crtc_in_pipe_mask_reverse(dev, intel_crtc, pipe_mask)
\
+ list_for_each_entry_reverse(intel_crtc,
\
+ &(dev)->mode_config.crtc_list,
\
+ base.head)
\
+ for_each_if((pipe_mask) & BIT(intel_crtc->pipe))
total: 1 errors, 2 warnings, 1 checks, 304 lines checked
9c75440ef274 drm/i915: Allow bigjoiner for MST
Re: [PATCH 02/11] drm/xe: Introduce intel_runtime_pm_get_noresume at compat-i915-headers for display
On Thu, Mar 14, 2024 at 07:04:02PM +0100, Francois Dugast wrote:
> Hi,
>
> On Thu, Mar 14, 2024 at 10:10:12AM -0400, Rodrigo Vivi wrote:
> > The i915-display will start using the intel_runtime_pm_noresume.
> > So we need to add the compat header before it.
>
> Or "So we need to add it to the compat header before"?
>
> >
> > Signed-off-by: Rodrigo Vivi
> > ---
> > drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 8
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> > b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> > index fef969112b1d..ecaaef3df4bf 100644
> > --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> > +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> > @@ -176,6 +176,14 @@ static inline intel_wakeref_t
> > intel_runtime_pm_get_if_in_use(struct xe_runtime_p
> > return xe_pm_runtime_get_if_in_use(xe);
> > }
> >
> > +static inline intel_wakeref_t intel_runtime_pm_get_noresume(struct
> > xe_runtime_pm *pm)
> > +{
> > + struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm);
> > +
> > + xe_pm_runtime_get_noresume(xe);
> > + return true;
> > +}
> > +
>
> LGTM but wondering if this and the next patch in the series should be
> combined in order to have at least one use of this new definition.
I preferred to keep separate because they are in different drivers and
because the compilation doesn't break without the user here.
(I just double checked that).
>
> Either way:
> Reviewed-by: Francois Dugast
>
> Francois
>
> > static inline void intel_runtime_pm_put_unchecked(struct xe_runtime_pm *pm)
> > {
> > struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm);
> > --
> > 2.44.0
> >
Re: [PATCH] drm/xe/display: fix type of intel_uncore_read*() functions
On Tue, 2024-03-19 at 17:06 +0200, Jani Nikula wrote: > On Tue, 19 Mar 2024, Lucas De Marchi wrote: > > On Thu, Mar 14, 2024 at 08:52:21AM +0200, Luca Coelho wrote: > > > Some of the backported intel_uncore_read*() functions used the wrong > > > types. Change the function declarations accordingly. > > > > > > Reviewed-by: Gustavo Sousa > > > Signed-off-by: Luca Coelho > > > > if a patch affects xe, please always Cc the xe mailing list so it > > triggers CI on those machines > > Indeed. I just bounced the patch to intel-xe to trigger CI. Thanks, guys! I'll do it always from now on. -- Cheers, Luca.
Re: [PATCH] drm/xe/display: fix type of intel_uncore_read*() functions
On Tue, 19 Mar 2024, Lucas De Marchi wrote: > On Thu, Mar 14, 2024 at 08:52:21AM +0200, Luca Coelho wrote: >>Some of the backported intel_uncore_read*() functions used the wrong >>types. Change the function declarations accordingly. >> >>Reviewed-by: Gustavo Sousa >>Signed-off-by: Luca Coelho > > if a patch affects xe, please always Cc the xe mailing list so it > triggers CI on those machines Indeed. I just bounced the patch to intel-xe to trigger CI. BR, Jani. > > Lucas De Marchi -- Jani Nikula, Intel
Re: [PATCH] drm/xe/display: fix type of intel_uncore_read*() functions
On Thu, Mar 14, 2024 at 08:52:21AM +0200, Luca Coelho wrote: Some of the backported intel_uncore_read*() functions used the wrong types. Change the function declarations accordingly. Reviewed-by: Gustavo Sousa Signed-off-by: Luca Coelho if a patch affects xe, please always Cc the xe mailing list so it triggers CI on those machines Lucas De Marchi
✗ Fi.CI.IGT: failure for Enable Adaptive Sync SDP Support for DP (rev20)
== Series Details == Series: Enable Adaptive Sync SDP Support for DP (rev20) URL : https://patchwork.freedesktop.org/series/126829/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14445_full -> Patchwork_126829v20_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126829v20_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126829v20_full, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (8 -> 8) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126829v20_full: ### IGT changes ### Possible regressions * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2: - shard-dg2: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-dg2-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-...@pipe-c-hdmi-a-2.html * igt@kms_flip@flip-vs-panning-vs-hang@b-vga1: - shard-snb: [PASS][2] -> [ABORT][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/shard-snb2/igt@kms_flip@flip-vs-panning-vs-h...@b-vga1.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-snb7/igt@kms_flip@flip-vs-panning-vs-h...@b-vga1.html * igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a4: - shard-dg1: [PASS][4] -> [FAIL][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/shard-dg1-19/igt@kms_flip@plain-flip-ts-check-interrupti...@b-hdmi-a4.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-dg1-16/igt@kms_flip@plain-flip-ts-check-interrupti...@b-hdmi-a4.html * igt@runner@aborted: - shard-glk: NOTRUN -> ([FAIL][6], [FAIL][7]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-glk9/igt@run...@aborted.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-glk2/igt@run...@aborted.html New tests - New tests have been introduced between CI_DRM_14445_full and Patchwork_126829v20_full: ### New IGT tests (1) ### * igt@kms_flip: - Statuses : - Exec time: [None] s Known issues Here are the changes found in Patchwork_126829v20_full that come from known issues: ### IGT changes ### Issues hit * igt@api_intel_bb@blit-reloc-purge-cache: - shard-mtlp: NOTRUN -> [SKIP][8] ([i915#8411]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-mtlp-4/igt@api_intel...@blit-reloc-purge-cache.html - shard-dg2: NOTRUN -> [SKIP][9] ([i915#8411]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-dg2-8/igt@api_intel...@blit-reloc-purge-cache.html * igt@api_intel_bb@object-reloc-keep-cache: - shard-dg1: NOTRUN -> [SKIP][10] ([i915#8411]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-dg1-15/igt@api_intel...@object-reloc-keep-cache.html * igt@device_reset@unbind-cold-reset-rebind: - shard-rkl: NOTRUN -> [SKIP][11] ([i915#7701]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-rkl-3/igt@device_re...@unbind-cold-reset-rebind.html * igt@drm_fdinfo@all-busy-idle-check-all: - shard-dg1: NOTRUN -> [SKIP][12] ([i915#8414]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-dg1-15/igt@drm_fdi...@all-busy-idle-check-all.html * igt@gem_ccs@ctrl-surf-copy: - shard-mtlp: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-mtlp-8/igt@gem_...@ctrl-surf-copy.html * igt@gem_ccs@suspend-resume: - shard-mtlp: NOTRUN -> [SKIP][14] ([i915#9323]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-mtlp-4/igt@gem_...@suspend-resume.html * igt@gem_close_race@multigpu-basic-threads: - shard-dg2: NOTRUN -> [SKIP][15] ([i915#7697]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-dg2-10/igt@gem_close_r...@multigpu-basic-threads.html - shard-rkl: NOTRUN -> [SKIP][16] ([i915#7697]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-rkl-4/igt@gem_close_r...@multigpu-basic-threads.html * igt@gem_create@create-ext-cpu-access-sanity-check: - shard-mtlp: NOTRUN -> [SKIP][17] ([i915#6335]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/shard-mtlp-4/igt@gem_cre...@create-ext-cpu-access-sanity-check.html * igt@gem_ctx_sseu@engines: -
[PATCH 4/5] drm/i915/display: Add definition for MCURSOR_MODE_64_2B
MCURSOR_MODE_64_2B is used in Wa_16021440873. Add define for it. Bspec: 69837 Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/i915_reg.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d6193c858a74..9bae815ac6c4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3053,6 +3053,7 @@ #define MCURSOR_MODE_DISABLE 0x00 #define MCURSOR_MODE_128_32B_AX 0x02 #define MCURSOR_MODE_256_32B_AX 0x03 +#define MCURSOR_MODE_64_2B 0x04 #define MCURSOR_MODE_64_32B_AX 0x07 #define MCURSOR_MODE_128_ARGB_AX (0x20 | MCURSOR_MODE_128_32B_AX) #define MCURSOR_MODE_256_ARGB_AX (0x20 | MCURSOR_MODE_256_32B_AX) -- 2.34.1
[PATCH 5/5] drm/i915/display: Implement Wa_16021440873
This patch is implementing Wa_16021440873.
Bspec: 74151
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_cursor.c | 24 -
drivers/gpu/drm/i915/display/intel_psr.c| 20 +++--
2 files changed, 37 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index f8b33999d43f..838d1a723ff1 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -511,6 +511,24 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct
intel_plane *plane,
intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0);
}
+static void wa_16021440873(struct intel_plane *plane,
+ const struct intel_crtc_state *crtc_state,
+ const struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ u32 ctl = plane_state->ctl;
+ int et_y_position = drm_rect_height(&crtc_state->pipe_src) + 1;
+ enum pipe pipe = plane->pipe;
+
+ ctl &= ~MCURSOR_MODE_MASK;
+ ctl |= MCURSOR_MODE_64_2B;
+
+ intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), ctl);
+
+ intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe),
+ PIPESRC_HEIGHT(et_y_position));
+}
+
static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane,
const struct intel_crtc_state
*crtc_state,
const struct intel_plane_state
*plane_state)
@@ -531,7 +549,11 @@ static void i9xx_cursor_update_sel_fetch_arm(struct
intel_plane *plane,
intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe,
plane->id),
plane_state->ctl);
} else {
- i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state);
+ /* Wa_16021440873 */
+ if (crtc_state->enable_psr2_su_region_et)
+ wa_16021440873(plane, crtc_state, plane_state);
+ else
+ i9xx_cursor_disable_sel_fetch_arm(plane, crtc_state);
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index e1a9399aa503..7ecf1b35c1ef 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2082,14 +2082,19 @@ static void psr2_man_trk_ctl_calc(struct
intel_crtc_state *crtc_state,
crtc_state->psr2_man_track_ctl = val;
}
-static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
- bool full_update)
+static u32
+psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
+ bool full_update, bool cursor_in_su_area)
{
int width, height;
if (!crtc_state->enable_psr2_su_region_et || full_update)
return 0;
+ if (!cursor_in_su_area)
+ return PIPESRC_WIDTH(0) |
+ PIPESRC_HEIGHT(drm_rect_height(&crtc_state->pipe_src));
+
width = drm_rect_width(&crtc_state->psr2_su_area);
height = drm_rect_height(&crtc_state->psr2_su_area);
@@ -2141,7 +2146,8 @@ static void intel_psr2_sel_fetch_pipe_alignment(struct
intel_crtc_state *crtc_st
*/
static void
intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+ struct intel_crtc *crtc,
+ bool *cursor_in_su_area)
{
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_plane_state *new_plane_state;
@@ -2169,6 +2175,7 @@ intel_psr2_sel_fetch_et_alignment(struct
intel_atomic_state *state,
clip_area_update(&crtc_state->psr2_su_area,
&new_plane_state->uapi.dst,
&crtc_state->pipe_src);
+ *cursor_in_su_area = true;
}
}
@@ -2214,7 +2221,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state
*state,
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_plane_state *new_plane_state, *old_plane_state;
struct intel_plane *plane;
- bool full_update = false;
+ bool full_update = false, cursor_in_su_area = false;
int i, ret;
if (!crtc_state->enable_psr2_sel_fetch)
@@ -2331,7 +2338,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state
*state,
* drm_atomic_add_affected_planes to ensure visible cursor is added into
* affected planes even when cursor is not updated by itself.
*/
- intel_psr2_sel_fetch_et_alignment(state, crtc);
+ intel_psr2_sel_fetch_et_alignment(state, crtc, &cursor_in_su_area);
intel_psr2_sel_
[PATCH 2/5] drm/i915/psr: Move writing early transport pipe src
Currently PIPE_SRCSZ_ERLY_TPT is written in
intel_display.c:intel_set_pipe_src_size. This doesn't work as
intel_set_pipe_src_size is called only on modeset.
Bspec: 68927
Fixes: 3291bbb93e16 ("drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2
early transport")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display.c | 9 -
drivers/gpu/drm/i915/display/intel_psr.c | 7 +++
2 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index d366a103a707..55c2a0fbd797 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2709,15 +2709,6 @@ static void intel_set_pipe_src_size(const struct
intel_crtc_state *crtc_state)
*/
intel_de_write(dev_priv, PIPESRC(pipe),
PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));
-
- if (!crtc_state->enable_psr2_su_region_et)
- return;
-
- width = drm_rect_width(&crtc_state->psr2_su_area);
- height = drm_rect_height(&crtc_state->psr2_su_area);
-
- intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe),
- PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));
}
static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index cbf9495c7072..961f92d10241 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2018,6 +2018,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp
*intel_dp)
void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state
*crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
struct intel_encoder *encoder;
@@ -2037,6 +2038,12 @@ void intel_psr2_program_trans_man_trk_ctl(const struct
intel_crtc_state *crtc_st
intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder),
crtc_state->psr2_man_track_ctl);
+
+ if (!crtc_state->enable_psr2_su_region_et)
+ return;
+
+ intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),
+ crtc_state->pipe_srcsz_early_tpt);
}
static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
--
2.34.1
[PATCH 3/5] drm/i915/display/intel_psr: Fix intel_psr2_sel_fetch_et_alignment usage
Currently we are not aligning selective update area to cover cursor fully
when cursor is not updated by itself but still in the selective update
area. Fix this by checking cursor separately after
drm_atomic_add_affected_planes.
Bspec: 68927
Fixes: 1bff93b8bc27 ("drm/i915/psr: Extend SU area to cover cursor fully if
needed")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 55 ++--
1 file changed, 33 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 961f92d10241..e1a9399aa503 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2140,21 +2140,36 @@ static void intel_psr2_sel_fetch_pipe_alignment(struct
intel_crtc_state *crtc_st
* cursor fully when cursor is in SU area.
*/
static void
-intel_psr2_sel_fetch_et_alignment(struct intel_crtc_state *crtc_state,
- struct intel_plane_state *cursor_state)
+intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct drm_rect inter;
+ struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
+ struct intel_plane_state *new_plane_state;
+ struct intel_plane *plane;
+ int i;
- if (!crtc_state->enable_psr2_su_region_et ||
- !cursor_state->uapi.visible)
+ if (!crtc_state->enable_psr2_su_region_et)
return;
- inter = crtc_state->psr2_su_area;
- if (!drm_rect_intersect(&inter, &cursor_state->uapi.dst))
- return;
+ for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {
+ struct drm_rect inter;
- clip_area_update(&crtc_state->psr2_su_area, &cursor_state->uapi.dst,
-&crtc_state->pipe_src);
+ if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc)
+ continue;
+
+ if (plane->id != PLANE_CURSOR)
+ continue;
+
+ if (!new_plane_state->uapi.visible)
+ continue;
+
+ inter = crtc_state->psr2_su_area;
+ if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst))
+ continue;
+
+ clip_area_update(&crtc_state->psr2_su_area,
&new_plane_state->uapi.dst,
+&crtc_state->pipe_src);
+ }
}
/*
@@ -2197,8 +2212,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state
*state,
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_plane_state *new_plane_state, *old_plane_state,
- *cursor_plane_state = NULL;
+ struct intel_plane_state *new_plane_state, *old_plane_state;
struct intel_plane *plane;
bool full_update = false;
int i, ret;
@@ -2283,13 +2297,6 @@ int intel_psr2_sel_fetch_update(struct
intel_atomic_state *state,
damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1;
clip_area_update(&crtc_state->psr2_su_area, &damaged_area,
&crtc_state->pipe_src);
-
- /*
-* Cursor plane new state is stored to adjust su area to cover
-* cursor are fully.
-*/
- if (plane->id == PLANE_CURSOR)
- cursor_plane_state = new_plane_state;
}
/*
@@ -2318,9 +2325,13 @@ int intel_psr2_sel_fetch_update(struct
intel_atomic_state *state,
if (ret)
return ret;
- /* Adjust su area to cover cursor fully as necessary */
- if (cursor_plane_state)
- intel_psr2_sel_fetch_et_alignment(crtc_state,
cursor_plane_state);
+ /*
+* Adjust su area to cover cursor fully as necessary (early
+* transport). This needs to be done after
+* drm_atomic_add_affected_planes to ensure visible cursor is added into
+* affected planes even when cursor is not updated by itself.
+*/
+ intel_psr2_sel_fetch_et_alignment(state, crtc);
intel_psr2_sel_fetch_pipe_alignment(crtc_state);
--
2.34.1
[PATCH 1/5] drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT value
When early transport is enabled we need to write PIPE_SRCSZ_ERLY_TPT on
every flip doing selective update. This patch calculates
PIPE_SRCSZ_ERLY_TPT same way as is done for PSR2_MAN_TRK_CTL value and
stores i in intel_crtc_state->pipe_srcsz_early_tpt to be written later
during flip.
Bspec: 68927
Signed-off-by: Jouni Högander
---
.../gpu/drm/i915/display/intel_display_types.h | 2 ++
drivers/gpu/drm/i915/display/intel_psr.c | 16
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8b9860cefaae..ba573490fd87 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1423,6 +1423,8 @@ struct intel_crtc_state {
u32 psr2_man_track_ctl;
+ u32 pipe_srcsz_early_tpt;
+
struct drm_rect psr2_su_area;
/* Variable Refresh Rate state */
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 747761efa4be..cbf9495c7072 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2075,6 +2075,20 @@ static void psr2_man_trk_ctl_calc(struct
intel_crtc_state *crtc_state,
crtc_state->psr2_man_track_ctl = val;
}
+static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
+ bool full_update)
+{
+ int width, height;
+
+ if (!crtc_state->enable_psr2_su_region_et || full_update)
+ return 0;
+
+ width = drm_rect_width(&crtc_state->psr2_su_area);
+ height = drm_rect_height(&crtc_state->psr2_su_area);
+
+ return PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1);
+}
+
static void clip_area_update(struct drm_rect *overlap_damage_area,
struct drm_rect *damage_area,
struct drm_rect *pipe_src)
@@ -2362,6 +2376,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state
*state,
skip_sel_fetch_set_loop:
psr2_man_trk_ctl_calc(crtc_state, full_update);
+ crtc_state->pipe_srcsz_early_tpt =
+ psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);
return 0;
}
--
2.34.1
[PATCH 0/5] Wa_16021440873 and early transport fixes
This patch set is implementing Wa_16021440873 and fixing some problems with cursor su area alignment and PIPE_SRCSZ_ERLY_TPT writing. Jouni Högander (5): drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT value drm/i915/psr: Move writing early transport pipe src drm/i915/display/intel_psr: Fix intel_psr2_sel_fetch_et_alignment usage drm/i915/display: Add definition for MCURSOR_MODE_64_2B drm/i915/display: Implement Wa_16021440873 drivers/gpu/drm/i915/display/intel_cursor.c | 24 - drivers/gpu/drm/i915/display/intel_display.c | 9 -- .../drm/i915/display/intel_display_types.h| 2 + drivers/gpu/drm/i915/display/intel_psr.c | 88 ++- drivers/gpu/drm/i915/i915_reg.h | 1 + 5 files changed, 91 insertions(+), 33 deletions(-) -- 2.34.1
Re: ✗ Fi.CI.BAT: failure for drm/i915/display: DMC wakelock implementation (rev2)
Hi,
This bug I'm hitting is unrelated to my patch and after a bit of
investigation with JaniS, we noticed that this is happening in order
machines from time to time.
So this possible regression:
> Possible regressions * igt@i915_selftest@live@hangcheck:bat-adln-1: PASS ->
> ABORT
..is the same problem that is happening from time to time in adlp-6:
> Possible fixes * igt@i915_selftest@live@hangcheck:bat-adlp-6: ABORT
> (i915#10021) -
>> PASS
It is the same failure as this one:
http://gfx-ci.igk.intel.com/cibuglog-ng/issue/10977?query_key=6ae0d29cf197dafc63e8bf36c8e1c04fe395749f
Can you please add ADL_N machines to the filter as well?
Thanks!
--
Cheers,
Luca.
On Mon, 2024-03-18 at 21:55 +, Patchwork wrote:
> Patch Details
> Series:drm/i915/display: DMC wakelock implementation (rev2)
> URL:https://patchwork.freedesktop.org/series/131124/
> State:failure
> Details:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131124v2/index.html
> CI Bug Log - changes from CI_DRM_14443 -> Patchwork_131124v2SummaryFAILURE
> Serious unknown changes coming with Patchwork_131124v2 absolutely
> need to be
> verified manually.
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_131124v2, please notify your bug team (I915-
> ci-in...@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives
> in CI.
> External URL: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_131124v2/index.html
> Participating hosts (35 -> 35)Additional (2): bat-arls-4 bat-jsl-1
> Missing (2): bat-dg2-11 fi-snb-2520m
> Possible new issuesHere are the unknown changes that may have been introduced
> in
> Patchwork_131124v2:
> IGT changesPossible regressions *
> igt@i915_selftest@live@hangcheck:bat-adln-1: PASS -> ABORT
> Known issuesHere are the changes found in Patchwork_131124v2 that come from
> known
> issues:
> CI changesIssues hit * boot:bat-arls-3: PASS -> FAIL (i915#10234)bat-jsl-1:
> NOTRUN -> FAIL
>(i915#8293)fi-apl-guc: PASS -> FAIL (i915#8293)
> Possible fixes * boot:fi-cfl-8109u: FAIL (i915#8293) -> PASS
> IGT changesIssues hit * igt@dmabuf@all-tests@dma_fence_chain:fi-kbl-8809g:
> PASS ->
>INCOMPLETE (i915#10454)
> * igt@gem_huc_copy@huc-copy:fi-cfl-8109u: NOTRUN -> SKIP (i915#2190)
> * igt@gem_lmem_swapping@verify-random:fi-cfl-8109u: NOTRUN -> SKIP
>(i915#4613) +3 other tests skip
> * igt@i915_selftest@live@gem:bat-dg2-8: PASS -> ABORT (i915#10366)
> * igt@kms_pm_backlight@basic-brightness:fi-cfl-8109u: NOTRUN -> SKIP
>+11 other tests skip
> Possible fixes * igt@i915_selftest@live@hangcheck:bat-adlp-6: ABORT
> (i915#10021) ->
>PASS
> {name}: This element is suppressed. This means it is ignored when
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
> Build changes * Linux: CI_DRM_14443 -> Patchwork_131124v2
> CI-20190529: 20190529
> CI_DRM_14443: ce8cc731d53f9197a853b0d00386d7835f2b80e6 @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGT_7769: 7769
> Patchwork_131124v2: ce8cc731d53f9197a853b0d00386d7835f2b80e6 @
> git://anongit.freedesktop.org/gfx-ci/linux
> Linux commits2ef377f406a9 drm/i915/display: tie DMC wakelock to DC5/6 state
> transitions
> 65265f211717 drm/i915/display: add module parameter to enable DMC
> wakelock
> b6649b71e886 drm/i915/display: don't allow DMC wakelock on older
> hardware
> 42bb743a04e4 drm/i915/display: add support for DMC wakelocks
Re: ✗ Fi.CI.IGT: failure for drm/xe/display: fix type of intel_uncore_read*() functions
Hi, FTR, this failure is not related to my patch. It seems to be happening sporadically on this machine. -- Cheers, Luca. On Thu, 2024-03-14 at 23:16 +, Patchwork wrote: > Patch Details > Series:drm/xe/display: fix type of intel_uncore_read*() functions > URL:https://patchwork.freedesktop.org/series/131122/ > State:failure > Details: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131122v1/index.html > CI Bug Log - changes from CI_DRM_14429_full -> > Patchwork_131122v1_fullSummaryFAILURE > Serious unknown changes coming with Patchwork_131122v1_full > absolutely need to be > verified manually. > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_131122v1_full, please notify your bug team > (i915-ci-in...@lists.freedesktop.org) to allow them > to document this new failure mode, which will reduce false positives > in CI. > Participating hosts (9 -> 8)Missing (1): shard-snb-0 > Possible new issuesHere are the unknown changes that may have been introduced > in > Patchwork_131122v1_full: > IGT changesPossible regressions * > igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ab-vga1-hdmi-a1:shard- >snb: PASS -> ABORT > Known issuesHere are the changes found in Patchwork_131122v1_full that come > from > known issues: > IGT changesIssues hit * igt@api_intel_bb@blit-reloc-purge-cache:shard-dg2: > NOTRUN -> SKIP >(i915#8411) > * igt@debugfs_test@basic-hwmon:shard-mtlp: NOTRUN -> SKIP (i915#9318) > * igt@drm_fdinfo@busy-hang@rcs0:shard-mtlp: NOTRUN -> SKIP (i915#8414) >+5 other tests skip > * igt@drm_fdinfo@most-busy-idle-check-all@vecs1:shard-dg2: NOTRUN -> >SKIP (i915#8414) +19 other tests skip > * igt@drm_fdinfo@virtual-idle:shard-rkl: PASS -> FAIL (i915#7742) +2 >other tests fail > * igt@gem_basic@multigpu-create-close:shard-tglu: NOTRUN -> SKIP >(i915#7697) +1 other test skip > * igt@gem_busy@semaphore:shard-mtlp: NOTRUN -> SKIP (i915#3936) > * igt@gem_close_race@multigpu-basic-threads:shard-dg2: NOTRUN -> SKIP >(i915#7697) > * igt@gem_create@create-ext-set-pat:shard-dg1: NOTRUN -> SKIP >(i915#8562) > * igt@gem_ctx_exec@basic-nohangcheck:shard-tglu: PASS -> FAIL >(i915#6268) > * igt@gem_ctx_persistence@file:shard-snb: NOTRUN -> SKIP (i915#1099) >+1 other test skip > * igt@gem_ctx_persistence@heartbeat-hang:shard-dg2: NOTRUN -> SKIP >(i915#8555) > * igt@gem_ctx_sseu@mmap-args:shard-dg1: NOTRUN -> SKIP (i915#280) > * igt@gem_eio@unwedge-stress:shard-snb: NOTRUN -> FAIL (i915#8898) > * igt@gem_exec_balancer@bonded-dual:shard-mtlp: NOTRUN -> SKIP >(i915#4771) +1 other test skip > * igt@gem_exec_capture@many-4k-zero:shard-dg2: NOTRUN -> FAIL >(i915#9606) > * igt@gem_exec_fair@basic-none-share:shard-dg2: NOTRUN -> SKIP >(i915#3539 / i915#4852) +2 other tests skip > * igt@gem_exec_fair@basic-none-solo@rcs0:shard-rkl: PASS -> FAIL >(i915#2842) > * igt@gem_exec_fair@basic-pace:shard-mtlp: NOTRUN -> SKIP (i915#4473 / >i915#4771) > * igt@gem_exec_fair@basic-pace-solo@rcs0:shard-glk: NOTRUN -> FAIL >(i915#2842) > * igt@gem_exec_fence@submit3:shard-dg2: NOTRUN -> SKIP (i915#4812) +1 >other test skip > * igt@gem_exec_flush@basic-uc-ro-default:shard-dg1: NOTRUN -> SKIP >(i915#3539 / i915#4852) +1 other test skip > * igt@gem_exec_gttfill@multigpu-basic:shard-mtlp: NOTRUN -> SKIP >(i915#7697)shard-dg1: NOTRUN -> SKIP (i915#7697) > * igt@gem_exec_reloc@basic-gtt-cpu-active:shard-dg2: NOTRUN -> SKIP >(i915#3281) +4 other tests skip > * igt@gem_exec_reloc@basic-gtt-noreloc:shard-mtlp: NOTRUN -> SKIP >(i915#3281) +4 other tests skip > * igt@gem_exec_reloc@basic-scanout:shard-dg1: NOTRUN -> SKIP >(i915#3281) +3 other tests skip > * igt@gem_exec_schedule@preempt-queue:shard-dg2: NOTRUN -> SKIP >(i915#4537 / i915#4812) > * igt@gem_exec_schedule@preempt-queue-contexts-chain:shard-mtlp: >NOTRUN -> SKIP (i915#4537 / i915#4812) +1 other test skip > * igt@gem_exec_schedule@semaphore-power:shard-dg1: NOTRUN -> SKIP >(i915#4812) +1 other test skip > * igt@gem_fence_thrash@bo-write-verify-threaded-none:shard-dg1: NOTRUN >-> SKIP (i915#4860) +1 other test skip > * igt@gem_lmem_swapping@heavy-multi:shard-tglu: NOTRUN -> SKIP >(i915#4613) +1 other test skip > * igt@gem_lmem_swapping@heavy-random@lmem0:shard-dg1: NOTRUN -> FAIL >(i915#10378) > * igt@gem_lmem_swapping@heavy-verify-multi-ccs:shard-mtlp: NOTRUN -> >SKIP (i915#4613) +3 other tests skip > * igt@gem_lmem_swapping@heavy-verify-multi@lmem0:shard-dg2: PASS -> >FAIL (i915#10378) > * igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:shard-dg1: >NOTRUN -> SKIP (i915#4565) > * igt@gem_lmem_swapping@verify-random-ccs:shard-glk: NOTRUN -> SKIP >(i915#4613) > * igt@gem_media_vme:shard-dg2: NOTRUN -> SKIP (i915#284) > * igt@gem_mmap@basic-small-bo:shard-mtlp: NOTRUN -> SKIP (i915#4083) >+3 other tests skip > * igt@gem_mmap_gtt@cpuset-medium-copy-xy:shard-dg2: NOTRUN ->
Re: [RESEND v3 1/6] drm/mst: read sideband messaging cap
On 3/19/24 10:20, Jani Nikula wrote:
On Tue, 19 Mar 2024, Jani Nikula wrote:
Amend drm_dp_read_mst_cap() to return an enum, indicating "SST", "SST
with sideband messaging", or "MST". Modify all call sites to take the
new return value into account.
drm-misc and nouveau maintainers, ack for merging this via drm-intel,
please?
Sure, please go ahead.
Thanks,
Danilo
BR,
Jani.
v2:
- Rename enumerators (Ville)
Cc: Arun R Murthy
Cc: Ville Syrjälä
Cc: Karol Herbst
Cc: Lyude Paul
Cc: Danilo Krummrich
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 20 ++--
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
drivers/gpu/drm/nouveau/nouveau_dp.c | 2 +-
include/drm/display/drm_dp_mst_helper.h | 23 ++-
4 files changed, 38 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 03d528209426..c193be3577f7 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -3608,24 +3608,30 @@ fixed20_12 drm_dp_get_vc_payload_bw(const struct
drm_dp_mst_topology_mgr *mgr,
EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
/**
- * drm_dp_read_mst_cap() - check whether or not a sink supports MST
+ * drm_dp_read_mst_cap() - Read the sink's MST mode capability
* @aux: The DP AUX channel to use
* @dpcd: A cached copy of the DPCD capabilities for this sink
*
- * Returns: %True if the sink supports MST, %false otherwise
+ * Returns: enum drm_dp_mst_mode to indicate MST mode capability
*/
-bool drm_dp_read_mst_cap(struct drm_dp_aux *aux,
-const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux,
+const u8 dpcd[DP_RECEIVER_CAP_SIZE])
{
u8 mstm_cap;
if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
- return false;
+ return DRM_DP_SST;
if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1)
- return false;
+ return DRM_DP_SST;
+
+ if (mstm_cap & DP_MST_CAP)
+ return DRM_DP_MST;
+
+ if (mstm_cap & DP_SINGLE_STREAM_SIDEBAND_MSG)
+ return DRM_DP_SST_SIDEBAND_MSG;
- return mstm_cap & DP_MST_CAP;
+ return DRM_DP_SST;
}
EXPORT_SYMBOL(drm_dp_read_mst_cap);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index af7ca00e9bc0..91c42949ac7e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4046,7 +4046,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
return i915->display.params.enable_dp_mst &&
intel_dp_mst_source_support(intel_dp) &&
- drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
+ drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) ==
DRM_DP_MST;
}
static void
@@ -4055,7 +4055,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_encoder *encoder =
&dp_to_dig_port(intel_dp)->base;
- bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
+ bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd)
== DRM_DP_MST;
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam:
%s\n",
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index 7de7707ec6a8..fb06ee17d9e5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -181,7 +181,7 @@ nouveau_dp_probe_dpcd(struct nouveau_connector
*nv_connector,
if (nouveau_mst) {
mstm = outp->dp.mstm;
if (mstm)
- mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd);
+ mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd) ==
DRM_DP_MST;
}
if (nouveau_dp_has_sink_count(connector, outp)) {
diff --git a/include/drm/display/drm_dp_mst_helper.h
b/include/drm/display/drm_dp_mst_helper.h
index 3ae88a383a41..cbcb49cb6a46 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -817,7 +817,28 @@ int drm_dp_mst_topology_mgr_init(struct
drm_dp_mst_topology_mgr *mgr,
void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr);
-bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
+/**
+ * enum drm_dp_mst_mode - sink's MST mode capability
+ */
+enum drm_dp_mst_mode {
+ /**
+* @DRM_DP_SST: The sink does not support MST nor single stream sideband
+* messaging.
+*/
+ DRM_DP_SST,
+ /**
+* @DRM_DP_MST: Sink supports MST, more than one stream and
Re: [RESEND v3 1/6] drm/mst: read sideband messaging cap
On 3/19/24 10:12, Jani Nikula wrote:
Amend drm_dp_read_mst_cap() to return an enum, indicating "SST", "SST
with sideband messaging", or "MST". Modify all call sites to take the
new return value into account.
v2:
- Rename enumerators (Ville)
Cc: Arun R Murthy
Cc: Ville Syrjälä
Cc: Karol Herbst
Cc: Lyude Paul
Cc: Danilo Krummrich
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
Acked-by: Danilo Krummrich
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 20 ++--
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
drivers/gpu/drm/nouveau/nouveau_dp.c | 2 +-
include/drm/display/drm_dp_mst_helper.h | 23 ++-
4 files changed, 38 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 03d528209426..c193be3577f7 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -3608,24 +3608,30 @@ fixed20_12 drm_dp_get_vc_payload_bw(const struct
drm_dp_mst_topology_mgr *mgr,
EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
/**
- * drm_dp_read_mst_cap() - check whether or not a sink supports MST
+ * drm_dp_read_mst_cap() - Read the sink's MST mode capability
* @aux: The DP AUX channel to use
* @dpcd: A cached copy of the DPCD capabilities for this sink
*
- * Returns: %True if the sink supports MST, %false otherwise
+ * Returns: enum drm_dp_mst_mode to indicate MST mode capability
*/
-bool drm_dp_read_mst_cap(struct drm_dp_aux *aux,
-const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux,
+const u8 dpcd[DP_RECEIVER_CAP_SIZE])
{
u8 mstm_cap;
if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
- return false;
+ return DRM_DP_SST;
if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1)
- return false;
+ return DRM_DP_SST;
+
+ if (mstm_cap & DP_MST_CAP)
+ return DRM_DP_MST;
+
+ if (mstm_cap & DP_SINGLE_STREAM_SIDEBAND_MSG)
+ return DRM_DP_SST_SIDEBAND_MSG;
- return mstm_cap & DP_MST_CAP;
+ return DRM_DP_SST;
}
EXPORT_SYMBOL(drm_dp_read_mst_cap);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index af7ca00e9bc0..91c42949ac7e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4046,7 +4046,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
return i915->display.params.enable_dp_mst &&
intel_dp_mst_source_support(intel_dp) &&
- drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
+ drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) ==
DRM_DP_MST;
}
static void
@@ -4055,7 +4055,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_encoder *encoder =
&dp_to_dig_port(intel_dp)->base;
- bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
+ bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd)
== DRM_DP_MST;
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam:
%s\n",
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index 7de7707ec6a8..fb06ee17d9e5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -181,7 +181,7 @@ nouveau_dp_probe_dpcd(struct nouveau_connector
*nv_connector,
if (nouveau_mst) {
mstm = outp->dp.mstm;
if (mstm)
- mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd);
+ mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd) ==
DRM_DP_MST;
}
if (nouveau_dp_has_sink_count(connector, outp)) {
diff --git a/include/drm/display/drm_dp_mst_helper.h
b/include/drm/display/drm_dp_mst_helper.h
index 3ae88a383a41..cbcb49cb6a46 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -817,7 +817,28 @@ int drm_dp_mst_topology_mgr_init(struct
drm_dp_mst_topology_mgr *mgr,
void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr);
-bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
+/**
+ * enum drm_dp_mst_mode - sink's MST mode capability
+ */
+enum drm_dp_mst_mode {
+ /**
+* @DRM_DP_SST: The sink does not support MST nor single stream sideband
+* messaging.
+*/
+ DRM_DP_SST,
+ /**
+* @DRM_DP_MST: Sink supports MST, more than one stream and single
+* stream sideband messaging.
+*/
+ DRM_DP_MST,
+ /**
+* @DRM_DP_SST_SIDEBAND_MSG: Sink supports only one
Re: [PATCH 2/2] drm/i915/bios: Use the platform's port_mask when there is no VBT
On Tue, 19 Mar 2024, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> When we have no VBT we currently assume ports A-F are
> all pontially valid for every platform. That is nonsense.
> Grab the bitmask of valid ports from the runtime info
> instead.
>
> Although the defaults we actually fill here look semi-sensible
> only for hsw-skl era hardware. Dunno if we should try to do
> something more appropriate here for other platforms,
> or just try to nuke the whole thing?
Seems like doing something appropriate is an endless task. We should
never have added the defaults, but here we are. Can we remove them for
newer platforms? There's only one way to find out...
Commit 828ccb31cf41 ("drm/i915/icl: Add TypeC ports only if VBT is
present") fails to mention if this was to address a real issue on ICL
without VBT, or just playing it safe.
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index c13a98431a7b..2abd2d7ceda2 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -2890,9 +2890,8 @@ init_vbt_panel_defaults(struct intel_panel *panel)
> static void
> init_vbt_missing_defaults(struct drm_i915_private *i915)
> {
> + unsigned int ports = DISPLAY_RUNTIME_INFO(i915)->port_mask;
> enum port port;
> - int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
> - BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
I was wondering why we don't just
-#define for_each_port(__port) \
- for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++)
+#define for_each_port(__i915, __port) \
+ for_each_set_bit(__port, &DISPLAY_RUNTIME_INFO(__i915)->port_mask,
sizeof(DISPLAY_RUNTIME_INFO(__i915)->port_mask))
but then we have DSI code that relies on it returning PORT_A for DSI.
Ugh. It's all so brittle.
Anyway, the patch is
Reviewed-by: Jani Nikula
>
> if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
> return;
--
Jani Nikula, Intel
✓ Fi.CI.BAT: success for Enable Adaptive Sync SDP Support for DP (rev20)
== Series Details == Series: Enable Adaptive Sync SDP Support for DP (rev20) URL : https://patchwork.freedesktop.org/series/126829/ State : success == Summary == CI Bug Log - changes from CI_DRM_14445 -> Patchwork_126829v20 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/index.html Participating hosts (34 -> 34) -- Additional (1): bat-kbl-2 Missing(1): fi-snb-2520m Known issues Here are the changes found in Patchwork_126829v20 that come from known issues: ### CI changes ### Issues hit * boot: - bat-arls-3: [PASS][1] -> [FAIL][2] ([i915#10234]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/bat-arls-3/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-arls-3/boot.html - bat-jsl-1: [PASS][3] -> [FAIL][4] ([i915#8293]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/bat-jsl-1/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-jsl-1/boot.html - fi-apl-guc: [PASS][5] -> [FAIL][6] ([i915#8293]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/fi-apl-guc/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/fi-apl-guc/boot.html ### IGT changes ### Issues hit * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][7] ([i915#1849]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-kbl-2/igt@fb...@info.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][8] +39 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@i915_module_load@load: - bat-dg2-9: [PASS][9] -> [DMESG-WARN][10] ([i915#10014]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/bat-dg2-9/igt@i915_module_l...@load.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-dg2-9/igt@i915_module_l...@load.html * igt@i915_selftest@live@hangcheck: - bat-adls-6: NOTRUN -> [DMESG-WARN][11] ([i915#5591]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-adls-6/igt@i915_selftest@l...@hangcheck.html Possible fixes * igt@i915_selftest@live@gt_engines: - bat-adls-6: [TIMEOUT][12] ([i915#10026]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/bat-adls-6/igt@i915_selftest@live@gt_engines.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-adls-6/igt@i915_selftest@live@gt_engines.html [i915#10014]: https://gitlab.freedesktop.org/drm/intel/issues/10014 [i915#10026]: https://gitlab.freedesktop.org/drm/intel/issues/10026 [i915#10234]: https://gitlab.freedesktop.org/drm/intel/issues/10234 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591 [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293 Build changes - * Linux: CI_DRM_14445 -> Patchwork_126829v20 CI-20190529: 20190529 CI_DRM_14445: 5dc888452748e07057461297746e83b1e630b226 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7769: 7769 Patchwork_126829v20: 5dc888452748e07057461297746e83b1e630b226 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 923001805958 drm/i915/display: Read/Write Adaptive Sync SDP 6c6f05f66ddb drm/i915/display: Compute vrr_vsync params 282a83ceed9b drm/i915/display: Add state checker for Adaptive Sync SDP 4231a57cad4b drm/i915/display: Compute AS SDP parameters c0104fba0907 drm/i915/dp: Add wrapper function to check AS SDP d6acb0b04f1c drm/i915/dp: Add Read/Write support for Adaptive Sync SDP e5873f1b4767 drm/i915/display: Add crtc state dump for Adaptive Sync SDP 70571f7cf956 drm: Add Adaptive Sync SDP logging 4b7ad0af9ae6 drm/dp: Add support to indicate if sink supports AS SDP == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/index.html
Re: [RESEND v3 1/6] drm/mst: read sideband messaging cap
On Tue, Mar 19, 2024 at 11:20:16AM +0200, Jani Nikula wrote: > On Tue, 19 Mar 2024, Jani Nikula wrote: > > Amend drm_dp_read_mst_cap() to return an enum, indicating "SST", "SST > > with sideband messaging", or "MST". Modify all call sites to take the > > new return value into account. > > drm-misc and nouveau maintainers, ack for merging this via drm-intel, > please? Ack Maxime signature.asc Description: PGP signature
Re: [PATCH v17 0/9] Enable Adaptive Sync SDP Support for DP
On Mon, Mar 18, 2024 at 04:37:58PM +0200, Jani Nikula wrote: > On Mon, 11 Mar 2024, Mitul Golani > wrote: > > An Adaptive-Sync-capable DP protocol converter indicates its > > support by setting the related bit in the DPCD register. This > > is valid for DP and edp as well. > > > > Computes AS SDP values based on the display configuration, > > ensuring proper handling of Variable Refresh Rate (VRR) > > in the context of Adaptive Sync. > > [snip] > > > Mitul Golani (9): > > drm/dp: Add support to indicate if sink supports AS SDP > > drm: Add Adaptive Sync SDP logging > > Maarten, Maxime, Thomas, ack for merging these two patches via > drm-intel-next? Ack Maxime signature.asc Description: PGP signature
Re: [PATCH 1/2] drm/i915/bios: Tolerate devdata==NULL in intel_bios_encoder_supports_dp_dual_mode()
On Tue, 19 Mar 2024, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> If we have no VBT, or the VBT didn't declare the encoder
> in question, we won't have the 'devdata' for the encoder.
> Instead of oopsing just bail early.
>
> We won't be able to tell whether the port is DP++ or not,
> but so be it.
>
> Cc: sta...@vger.kernel.org
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10464
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index c7841b3eede8..c13a98431a7b 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -3458,6 +3458,9 @@ bool intel_bios_encoder_supports_dp_dual_mode(const
> struct intel_bios_encoder_da
> {
> const struct child_device_config *child = &devdata->child;
The above oopses already.
BR,
Jani.
>
> + if (!devdata)
> + return false;
> +
> if (!intel_bios_encoder_supports_dp(devdata) ||
> !intel_bios_encoder_supports_hdmi(devdata))
> return false;
--
Jani Nikula, Intel
Re: [PATCH v3 0/2] drm: Add plane SIZE_HINTS property
On Mon, Mar 18, 2024 at 10:44:06PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Final final version I hope. Mainly for CI to test against the > new IGTs. > > Real userspace implementation: > https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/3165 > > > IGT: > https://patchwork.freedesktop.org/series/131199/ CI said the IGT was correctly skipping without the kernel patches, and passed on all i915 supported machines with the kernel patches in place. So looks like we're all good to merge this, as soon as I get someone to review thew i915 patch... PS. I forgot to cc dri-devel with this series, but bounced the whole thing there now. > > Changes from v2: > - Limit to cursor planes only (Simon) > > Test-with: 20240315191505.27620-1-ville.syrj...@linux.intel.com > Cc: Simon Ser > Cc: Jonas Ådahl > Cc: Daniel Stone > Cc: Sameer Lattannavar > Cc: Sebastian Wick > Cc: Harry Wentland > Cc: Pekka Paalanen > > Ville Syrjälä (2): > drm: Introduce plane SIZE_HINTS property > drm/i915: Add SIZE_HINTS property for cursors > > drivers/gpu/drm/drm_mode_config.c | 7 +++ > drivers/gpu/drm/drm_plane.c | 56 + > drivers/gpu/drm/i915/display/intel_cursor.c | 24 + > include/drm/drm_mode_config.h | 5 ++ > include/drm/drm_plane.h | 4 ++ > include/uapi/drm/drm_mode.h | 11 > 6 files changed, 107 insertions(+) > > -- > 2.43.2 -- Ville Syrjälä Intel
[PATCH 2/2] drm/i915/bios: Use the platform's port_mask when there is no VBT
From: Ville Syrjälä
When we have no VBT we currently assume ports A-F are
all pontially valid for every platform. That is nonsense.
Grab the bitmask of valid ports from the runtime info
instead.
Although the defaults we actually fill here look semi-sensible
only for hsw-skl era hardware. Dunno if we should try to do
something more appropriate here for other platforms,
or just try to nuke the whole thing?
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index c13a98431a7b..2abd2d7ceda2 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2890,9 +2890,8 @@ init_vbt_panel_defaults(struct intel_panel *panel)
static void
init_vbt_missing_defaults(struct drm_i915_private *i915)
{
+ unsigned int ports = DISPLAY_RUNTIME_INFO(i915)->port_mask;
enum port port;
- int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
- BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
return;
--
2.43.2
[PATCH 1/2] drm/i915/bios: Tolerate devdata==NULL in intel_bios_encoder_supports_dp_dual_mode()
From: Ville Syrjälä
If we have no VBT, or the VBT didn't declare the encoder
in question, we won't have the 'devdata' for the encoder.
Instead of oopsing just bail early.
We won't be able to tell whether the port is DP++ or not,
but so be it.
Cc: sta...@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10464
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index c7841b3eede8..c13a98431a7b 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3458,6 +3458,9 @@ bool intel_bios_encoder_supports_dp_dual_mode(const
struct intel_bios_encoder_da
{
const struct child_device_config *child = &devdata->child;
+ if (!devdata)
+ return false;
+
if (!intel_bios_encoder_supports_dp(devdata) ||
!intel_bios_encoder_supports_hdmi(devdata))
return false;
--
2.43.2
Re: [RESEND v3 1/6] drm/mst: read sideband messaging cap
On Tue, 19 Mar 2024, Jani Nikula wrote:
> Amend drm_dp_read_mst_cap() to return an enum, indicating "SST", "SST
> with sideband messaging", or "MST". Modify all call sites to take the
> new return value into account.
drm-misc and nouveau maintainers, ack for merging this via drm-intel,
please?
BR,
Jani.
>
> v2:
> - Rename enumerators (Ville)
>
> Cc: Arun R Murthy
> Cc: Ville Syrjälä
> Cc: Karol Herbst
> Cc: Lyude Paul
> Cc: Danilo Krummrich
> Reviewed-by: Ville Syrjälä
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/display/drm_dp_mst_topology.c | 20 ++--
> drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
> drivers/gpu/drm/nouveau/nouveau_dp.c | 2 +-
> include/drm/display/drm_dp_mst_helper.h | 23 ++-
> 4 files changed, 38 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 03d528209426..c193be3577f7 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -3608,24 +3608,30 @@ fixed20_12 drm_dp_get_vc_payload_bw(const struct
> drm_dp_mst_topology_mgr *mgr,
> EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
>
> /**
> - * drm_dp_read_mst_cap() - check whether or not a sink supports MST
> + * drm_dp_read_mst_cap() - Read the sink's MST mode capability
> * @aux: The DP AUX channel to use
> * @dpcd: A cached copy of the DPCD capabilities for this sink
> *
> - * Returns: %True if the sink supports MST, %false otherwise
> + * Returns: enum drm_dp_mst_mode to indicate MST mode capability
> */
> -bool drm_dp_read_mst_cap(struct drm_dp_aux *aux,
> - const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> +enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux,
> + const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> {
> u8 mstm_cap;
>
> if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
> - return false;
> + return DRM_DP_SST;
>
> if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1)
> - return false;
> + return DRM_DP_SST;
> +
> + if (mstm_cap & DP_MST_CAP)
> + return DRM_DP_MST;
> +
> + if (mstm_cap & DP_SINGLE_STREAM_SIDEBAND_MSG)
> + return DRM_DP_SST_SIDEBAND_MSG;
>
> - return mstm_cap & DP_MST_CAP;
> + return DRM_DP_SST;
> }
> EXPORT_SYMBOL(drm_dp_read_mst_cap);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index af7ca00e9bc0..91c42949ac7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4046,7 +4046,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
>
> return i915->display.params.enable_dp_mst &&
> intel_dp_mst_source_support(intel_dp) &&
> - drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
> + drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) ==
> DRM_DP_MST;
> }
>
> static void
> @@ -4055,7 +4055,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> struct intel_encoder *encoder =
> &dp_to_dig_port(intel_dp)->base;
> - bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
> + bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd)
> == DRM_DP_MST;
>
> drm_dbg_kms(&i915->drm,
> "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam:
> %s\n",
> diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
> b/drivers/gpu/drm/nouveau/nouveau_dp.c
> index 7de7707ec6a8..fb06ee17d9e5 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_dp.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
> @@ -181,7 +181,7 @@ nouveau_dp_probe_dpcd(struct nouveau_connector
> *nv_connector,
> if (nouveau_mst) {
> mstm = outp->dp.mstm;
> if (mstm)
> - mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd);
> + mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd) ==
> DRM_DP_MST;
> }
>
> if (nouveau_dp_has_sink_count(connector, outp)) {
> diff --git a/include/drm/display/drm_dp_mst_helper.h
> b/include/drm/display/drm_dp_mst_helper.h
> index 3ae88a383a41..cbcb49cb6a46 100644
> --- a/include/drm/display/drm_dp_mst_helper.h
> +++ b/include/drm/display/drm_dp_mst_helper.h
> @@ -817,7 +817,28 @@ int drm_dp_mst_topology_mgr_init(struct
> drm_dp_mst_topology_mgr *mgr,
>
> void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr);
>
> -bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8
> dpcd[DP_RECEIVER_CAP_SIZE]);
> +/**
> + * enum drm_dp_mst_mode - sink's MST mode capability
> + */
> +enum drm_dp_mst_mode {
> + /**
> + * @DRM_DP_SST: The sink does not support MST nor single stream sideband
> + * messaging.
> + */
> + DRM_D
[RESEND v3 5/6] drm/i915/mst: add intel_dp_mst_disconnect()
Abstract the MST mode disconnect to a separate function.
Cc: Arun R Murthy
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index e2f77855e4a0..9b8bd85c1a4e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4104,6 +4104,20 @@ intel_dp_mst_configure(struct intel_dp *intel_dp)
intel_dp->mst_detect = DRM_DP_SST;
}
+static void
+intel_dp_mst_disconnect(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+ if (!intel_dp->is_mst)
+ return;
+
+ drm_dbg_kms(&i915->drm, "MST device may have disappeared %d vs %d\n",
+ intel_dp->is_mst, intel_dp->mst_mgr.mst_state);
+ intel_dp->is_mst = false;
+ drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst);
+}
+
static bool
intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *esi)
{
@@ -5711,15 +5725,7 @@ intel_dp_detect(struct drm_connector *connector,
memset(intel_connector->dp.dsc_dpcd, 0,
sizeof(intel_connector->dp.dsc_dpcd));
intel_dp->psr.sink_panel_replay_support = false;
- if (intel_dp->is_mst) {
- drm_dbg_kms(&dev_priv->drm,
- "MST device may have disappeared %d vs
%d\n",
- intel_dp->is_mst,
- intel_dp->mst_mgr.mst_state);
- intel_dp->is_mst = false;
- drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
- intel_dp->is_mst);
- }
+ intel_dp_mst_disconnect(intel_dp);
intel_dp_tunnel_disconnect(intel_dp);
--
2.39.2
[RESEND v3 6/6] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband
If the sink supports 128b/132b and single-stream sideband messaging, enable MST mode. With this, the topology manager will still write DP_MSTM_CTRL, which should be ignored by the sink. In the future, the topology manager should probably only set the sideband messaging related parts of the register. Cc: Arun R Murthy Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9b8bd85c1a4e..254f758e8dcd 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4061,7 +4061,8 @@ intel_dp_mst_mode_choose(struct intel_dp *intel_dp, if (!intel_dp_mst_source_support(intel_dp)) return DRM_DP_SST; - if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG) + if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG && + !(intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B)) return DRM_DP_SST; return sink_mst_mode; -- 2.39.2
[RESEND v3 3/6] drm/i915/mst: abstract choosing the MST mode to use
Clarify the conditions for choosing the MST mode to use by adding a new
function intel_dp_mst_mode_choose(). This also prepares for being able
to extend the MST modes to single-stream sideband messaging.
Cc: Arun R Murthy
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 9590c8c2c4f3..127b5a89502d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4049,6 +4049,24 @@ static const char *intel_dp_mst_mode_str(enum
drm_dp_mst_mode mst_mode)
return "SST";
}
+static enum drm_dp_mst_mode
+intel_dp_mst_mode_choose(struct intel_dp *intel_dp,
+enum drm_dp_mst_mode sink_mst_mode)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+ if (!i915->display.params.enable_dp_mst)
+ return DRM_DP_SST;
+
+ if (!intel_dp_mst_source_support(intel_dp))
+ return DRM_DP_SST;
+
+ if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG)
+ return DRM_DP_SST;
+
+ return sink_mst_mode;
+}
+
static enum drm_dp_mst_mode
intel_dp_mst_detect(struct intel_dp *intel_dp)
{
@@ -4059,12 +4077,7 @@ intel_dp_mst_detect(struct intel_dp *intel_dp)
sink_mst_mode = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
- if (i915->display.params.enable_dp_mst &&
- intel_dp_mst_source_support(intel_dp) &&
- sink_mst_mode == DRM_DP_MST)
- mst_detect = DRM_DP_MST;
- else
- mst_detect = DRM_DP_SST;
+ mst_detect = intel_dp_mst_mode_choose(intel_dp, sink_mst_mode);
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam:
%s -> enable: %s\n",
--
2.39.2
[RESEND v3 4/6] drm/i915/mst: use the MST mode detected previously
Drop the duplicate read of DP_MSTM_CAP DPCD register, and the duplicate
logic for choosing MST mode, and store the chosen mode in struct
intel_dp. Rename intel_dp_configure_mst() to intel_dp_mst_configure()
while at it.
v2: Rebase on drm_dp_mst_detect() returning the mode, not bool
Cc: Arun R Murthy
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 21 ---
2 files changed, 10 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8b9860cefaae..8a35fb6b2ade 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1804,6 +1804,7 @@ struct intel_dp {
bool is_mst;
int active_mst_links;
+ enum drm_dp_mst_mode mst_detect;
/* connector directly attached - won't be use for modeset in mst world
*/
struct intel_connector *attached_connector;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 127b5a89502d..e2f77855e4a0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4091,19 +4091,17 @@ intel_dp_mst_detect(struct intel_dp *intel_dp)
}
static void
-intel_dp_configure_mst(struct intel_dp *intel_dp)
+intel_dp_mst_configure(struct intel_dp *intel_dp)
{
- struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd)
== DRM_DP_MST;
-
if (!intel_dp_mst_source_support(intel_dp))
return;
- intel_dp->is_mst = sink_can_mst &&
- i915->display.params.enable_dp_mst;
+ intel_dp->is_mst = intel_dp->mst_detect != DRM_DP_SST;
- drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
- intel_dp->is_mst);
+ drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst);
+
+ /* Avoid stale info on the next detect cycle. */
+ intel_dp->mst_detect = DRM_DP_SST;
}
static bool
@@ -5384,7 +5382,6 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
- enum drm_dp_mst_mode mst_detect;
u8 *dpcd = intel_dp->dpcd;
u8 type;
@@ -5396,7 +5393,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
if (!intel_dp_get_dpcd(intel_dp))
return connector_status_disconnected;
- mst_detect = intel_dp_mst_detect(intel_dp);
+ intel_dp->mst_detect = intel_dp_mst_detect(intel_dp);
/* if there's no downstream port, we're done */
if (!drm_dp_is_branch(dpcd))
@@ -5409,7 +5406,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
connector_status_connected : connector_status_disconnected;
}
- if (mst_detect == DRM_DP_MST)
+ if (intel_dp->mst_detect == DRM_DP_MST)
return connector_status_connected;
/* If no HPD, poke DDC gently */
@@ -5741,7 +5738,7 @@ intel_dp_detect(struct drm_connector *connector,
intel_dp_detect_dsc_caps(intel_dp, intel_connector);
- intel_dp_configure_mst(intel_dp);
+ intel_dp_mst_configure(intel_dp);
/*
* TODO: Reset link params when switching to MST mode, until MST
--
2.39.2
[RESEND v3 2/6] drm/i915/mst: improve debug logging of DP MST mode detect
Rename intel_dp_can_mst() to intel_dp_mst_detect(), and move all DP MST
detect debug logging there. Debug log the sink's MST capability,
including single-stream sideband messaging support, and the decision
whether to enable MST mode or not. Do this regardless of whether we're
actually enabling MST or not.
We need to detect MST in intel_dp_detect_dpcd() before the earlier
returns, but try not to change the logic otherwise.
v2:
- Use "MST", "SST w/ sideband messaging", and "SST" for logging (Ville)
- Return MST mode from intel_dp_mst_detect()
- Do MST detect before early returns from intel_dp_detect_dpcd()
Cc: Arun R Murthy
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 52 ++---
1 file changed, 37 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 91c42949ac7e..9590c8c2c4f3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4039,31 +4039,50 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
intel_dp->downstream_ports) == 0;
}
-static bool
-intel_dp_can_mst(struct intel_dp *intel_dp)
+static const char *intel_dp_mst_mode_str(enum drm_dp_mst_mode mst_mode)
+{
+ if (mst_mode == DRM_DP_MST)
+ return "MST";
+ else if (mst_mode == DRM_DP_SST_SIDEBAND_MSG)
+ return "SST w/ sideband messaging";
+ else
+ return "SST";
+}
+
+static enum drm_dp_mst_mode
+intel_dp_mst_detect(struct intel_dp *intel_dp)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ enum drm_dp_mst_mode sink_mst_mode;
+ enum drm_dp_mst_mode mst_detect;
+
+ sink_mst_mode = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
+
+ if (i915->display.params.enable_dp_mst &&
+ intel_dp_mst_source_support(intel_dp) &&
+ sink_mst_mode == DRM_DP_MST)
+ mst_detect = DRM_DP_MST;
+ else
+ mst_detect = DRM_DP_SST;
- return i915->display.params.enable_dp_mst &&
- intel_dp_mst_source_support(intel_dp) &&
- drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) ==
DRM_DP_MST;
+ drm_dbg_kms(&i915->drm,
+ "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam:
%s -> enable: %s\n",
+ encoder->base.base.id, encoder->base.name,
+ str_yes_no(intel_dp_mst_source_support(intel_dp)),
+ intel_dp_mst_mode_str(sink_mst_mode),
+ str_yes_no(i915->display.params.enable_dp_mst),
+ intel_dp_mst_mode_str(mst_detect));
+
+ return mst_detect;
}
static void
intel_dp_configure_mst(struct intel_dp *intel_dp)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- struct intel_encoder *encoder =
- &dp_to_dig_port(intel_dp)->base;
bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd)
== DRM_DP_MST;
- drm_dbg_kms(&i915->drm,
- "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam:
%s\n",
- encoder->base.base.id, encoder->base.name,
- str_yes_no(intel_dp_mst_source_support(intel_dp)),
- str_yes_no(sink_can_mst),
- str_yes_no(i915->display.params.enable_dp_mst));
-
if (!intel_dp_mst_source_support(intel_dp))
return;
@@ -5352,6 +5371,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+ enum drm_dp_mst_mode mst_detect;
u8 *dpcd = intel_dp->dpcd;
u8 type;
@@ -5363,6 +5383,8 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
if (!intel_dp_get_dpcd(intel_dp))
return connector_status_disconnected;
+ mst_detect = intel_dp_mst_detect(intel_dp);
+
/* if there's no downstream port, we're done */
if (!drm_dp_is_branch(dpcd))
return connector_status_connected;
@@ -5374,7 +5396,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
connector_status_connected : connector_status_disconnected;
}
- if (intel_dp_can_mst(intel_dp))
+ if (mst_detect == DRM_DP_MST)
return connector_status_connected;
/* If no HPD, poke DDC gently */
--
2.39.2
[RESEND v3 1/6] drm/mst: read sideband messaging cap
Amend drm_dp_read_mst_cap() to return an enum, indicating "SST", "SST
with sideband messaging", or "MST". Modify all call sites to take the
new return value into account.
v2:
- Rename enumerators (Ville)
Cc: Arun R Murthy
Cc: Ville Syrjälä
Cc: Karol Herbst
Cc: Lyude Paul
Cc: Danilo Krummrich
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 20 ++--
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
drivers/gpu/drm/nouveau/nouveau_dp.c | 2 +-
include/drm/display/drm_dp_mst_helper.h | 23 ++-
4 files changed, 38 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display/drm_dp_mst_topology.c
index 03d528209426..c193be3577f7 100644
--- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
@@ -3608,24 +3608,30 @@ fixed20_12 drm_dp_get_vc_payload_bw(const struct
drm_dp_mst_topology_mgr *mgr,
EXPORT_SYMBOL(drm_dp_get_vc_payload_bw);
/**
- * drm_dp_read_mst_cap() - check whether or not a sink supports MST
+ * drm_dp_read_mst_cap() - Read the sink's MST mode capability
* @aux: The DP AUX channel to use
* @dpcd: A cached copy of the DPCD capabilities for this sink
*
- * Returns: %True if the sink supports MST, %false otherwise
+ * Returns: enum drm_dp_mst_mode to indicate MST mode capability
*/
-bool drm_dp_read_mst_cap(struct drm_dp_aux *aux,
-const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux,
+const u8 dpcd[DP_RECEIVER_CAP_SIZE])
{
u8 mstm_cap;
if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
- return false;
+ return DRM_DP_SST;
if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1)
- return false;
+ return DRM_DP_SST;
+
+ if (mstm_cap & DP_MST_CAP)
+ return DRM_DP_MST;
+
+ if (mstm_cap & DP_SINGLE_STREAM_SIDEBAND_MSG)
+ return DRM_DP_SST_SIDEBAND_MSG;
- return mstm_cap & DP_MST_CAP;
+ return DRM_DP_SST;
}
EXPORT_SYMBOL(drm_dp_read_mst_cap);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index af7ca00e9bc0..91c42949ac7e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4046,7 +4046,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
return i915->display.params.enable_dp_mst &&
intel_dp_mst_source_support(intel_dp) &&
- drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
+ drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) ==
DRM_DP_MST;
}
static void
@@ -4055,7 +4055,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_encoder *encoder =
&dp_to_dig_port(intel_dp)->base;
- bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
+ bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd)
== DRM_DP_MST;
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam:
%s\n",
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index 7de7707ec6a8..fb06ee17d9e5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -181,7 +181,7 @@ nouveau_dp_probe_dpcd(struct nouveau_connector
*nv_connector,
if (nouveau_mst) {
mstm = outp->dp.mstm;
if (mstm)
- mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd);
+ mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd) ==
DRM_DP_MST;
}
if (nouveau_dp_has_sink_count(connector, outp)) {
diff --git a/include/drm/display/drm_dp_mst_helper.h
b/include/drm/display/drm_dp_mst_helper.h
index 3ae88a383a41..cbcb49cb6a46 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -817,7 +817,28 @@ int drm_dp_mst_topology_mgr_init(struct
drm_dp_mst_topology_mgr *mgr,
void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr);
-bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8
dpcd[DP_RECEIVER_CAP_SIZE]);
+/**
+ * enum drm_dp_mst_mode - sink's MST mode capability
+ */
+enum drm_dp_mst_mode {
+ /**
+* @DRM_DP_SST: The sink does not support MST nor single stream sideband
+* messaging.
+*/
+ DRM_DP_SST,
+ /**
+* @DRM_DP_MST: Sink supports MST, more than one stream and single
+* stream sideband messaging.
+*/
+ DRM_DP_MST,
+ /**
+* @DRM_DP_SST_SIDEBAND_MSG: Sink supports only one stream and single
+* stream sideband messaging.
+*/
+
[RESEND v3 0/6] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband
Resend because I forgot to Cc: dri-devel on the original submission. Jani Nikula (6): drm/mst: read sideband messaging cap drm/i915/mst: improve debug logging of DP MST mode detect drm/i915/mst: abstract choosing the MST mode to use drm/i915/mst: use the MST mode detected previously drm/i915/mst: add intel_dp_mst_disconnect() drm/i915/mst: enable MST mode for 128b/132b single-stream sideband drivers/gpu/drm/display/drm_dp_mst_topology.c | 20 ++-- .../drm/i915/display/intel_display_types.h| 1 + drivers/gpu/drm/i915/display/intel_dp.c | 95 +-- drivers/gpu/drm/nouveau/nouveau_dp.c | 2 +- include/drm/display/drm_dp_mst_helper.h | 23 - 5 files changed, 104 insertions(+), 37 deletions(-) -- 2.39.2
Re: [PATCH] drm/i915: Add includes for BUG_ON/BUILD_BUG_ON in i915_memcpy.c
Pushed this, thanks for the review. Regards, Joonas Quoting Vivi, Rodrigo (2024-03-18 14:40:56) > On Thu, 2024-03-14 at 14:48 +0200, Joonas Lahtinen wrote: > > Quoting Rodrigo Vivi (2024-03-08 16:58:04) > > > On Fri, Mar 08, 2024 at 04:46:43PM +0200, Joonas Lahtinen wrote: > > > > Add standalone includes for BUG_ON and BUILD_BUG_ON to avoid > > > > build failure > > > > after linux-next include refactoring. > > > > > > any lore link so we can use with a 'Closes:' tag? > > > and perhaps a reported-by? > > > > The build failure seems to have happened in intel-gfx-ci.01.org but > > the > > failing build results are not uploaded so it's only visible in the > > background. > > > > From the CI page[1] we can see next-20240304 is the last successful > > build[2]. > > Failure seems to have started next-20240305 after which the results > > are > > not uploaded due to the failure. > > > > For future, I asked if we could improve the CI dashboard by alos > > showing the > > failing builds in the CI view. > > > > However, for now we don't have a reference, I guess. > > > > [1] https://intel-gfx-ci.01.org/tree/linux-next/combined-alt.html? > > [2] https://intel-gfx-ci.01.org/tree/linux-next/next- > > 20240304/filelist.html > > > > > > > > > > > > > Signed-off-by: Joonas Lahtinen > > > > Cc: Chris Wilson > > > > Cc: Jani Nikula > > > > Cc: Rodrigo Vivi > > > > Cc: Tvrtko Ursulin > > > > --- > > > > drivers/gpu/drm/i915/i915_memcpy.c | 2 ++ > > > > 1 file changed, 2 insertions(+) > > > > > > > > diff --git a/drivers/gpu/drm/i915/i915_memcpy.c > > > > b/drivers/gpu/drm/i915/i915_memcpy.c > > > > index ba82277254b7..cc41974cee74 100644 > > > > --- a/drivers/gpu/drm/i915/i915_memcpy.c > > > > +++ b/drivers/gpu/drm/i915/i915_memcpy.c > > > > @@ -25,6 +25,8 @@ > > > > #include > > > > #include > > > > #include > > > > +#include > > > > +#include > > > > > > git grep BUILD_BUG_ON drivers/gpu/drm/i915/ > > > output > > > > > > vs > > > > > > git grep build_bug.h drivers/gpu/drm/i915/ > > > output > > > > > > tells me that we likely need this in many more files... > > > > > > but not opposed to move with this faster and come back later with > > > other fixes if this unblocks people: > > > > Yeah, I made the same observation. > > > > Are you fine to merge this with the R-b even without the reference? > > sorry for having missed this. > > yes, the rv-b can be used even without the reference, let's just get > this in and fix the build issue. > > > > > Regards, Joonas > > > > > > > > Reviewed-by: Rodrigo Vivi > > > > > > > #include > > > > > > > > #include "i915_memcpy.h" > > > > -- > > > > 2.43.2 > > > > >
✗ Fi.CI.BAT: failure for Enable Adaptive Sync SDP Support for DP (rev20)
== Series Details == Series: Enable Adaptive Sync SDP Support for DP (rev20) URL : https://patchwork.freedesktop.org/series/126829/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14445 -> Patchwork_126829v20 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126829v20 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126829v20, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/index.html Participating hosts (34 -> 34) -- Additional (1): bat-kbl-2 Missing(1): fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126829v20: ### IGT changes ### Possible regressions * igt@i915_module_load@load: - bat-dg2-9: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/bat-dg2-9/igt@i915_module_l...@load.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-dg2-9/igt@i915_module_l...@load.html Known issues Here are the changes found in Patchwork_126829v20 that come from known issues: ### CI changes ### Issues hit * boot: - bat-arls-3: [PASS][3] -> [FAIL][4] ([i915#10234]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/bat-arls-3/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-arls-3/boot.html - bat-jsl-1: [PASS][5] -> [FAIL][6] ([i915#8293]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/bat-jsl-1/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-jsl-1/boot.html - fi-apl-guc: [PASS][7] -> [FAIL][8] ([i915#8293]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/fi-apl-guc/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/fi-apl-guc/boot.html ### IGT changes ### Issues hit * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][9] ([i915#1849]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-kbl-2/igt@fb...@info.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][10] +39 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@i915_selftest@live@hangcheck: - bat-adls-6: NOTRUN -> [DMESG-WARN][11] ([i915#5591]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-adls-6/igt@i915_selftest@l...@hangcheck.html Possible fixes * igt@i915_selftest@live@gt_engines: - bat-adls-6: [TIMEOUT][12] ([i915#10026]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14445/bat-adls-6/igt@i915_selftest@live@gt_engines.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/bat-adls-6/igt@i915_selftest@live@gt_engines.html [i915#10026]: https://gitlab.freedesktop.org/drm/intel/issues/10026 [i915#10234]: https://gitlab.freedesktop.org/drm/intel/issues/10234 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591 [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293 Build changes - * Linux: CI_DRM_14445 -> Patchwork_126829v20 CI-20190529: 20190529 CI_DRM_14445: 5dc888452748e07057461297746e83b1e630b226 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7769: 7769 Patchwork_126829v20: 5dc888452748e07057461297746e83b1e630b226 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 923001805958 drm/i915/display: Read/Write Adaptive Sync SDP 6c6f05f66ddb drm/i915/display: Compute vrr_vsync params 282a83ceed9b drm/i915/display: Add state checker for Adaptive Sync SDP 4231a57cad4b drm/i915/display: Compute AS SDP parameters c0104fba0907 drm/i915/dp: Add wrapper function to check AS SDP d6acb0b04f1c drm/i915/dp: Add Read/Write support for Adaptive Sync SDP e5873f1b4767 drm/i915/display: Add crtc state dump for Adaptive Sync SDP 70571f7cf956 drm: Add Adaptive Sync SDP logging 4b7ad0af9ae6 drm/dp: Add support to indicate if sink supports AS SDP == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126829v20/index.html
✗ Fi.CI.SPARSE: warning for Enable Adaptive Sync SDP Support for DP (rev20)
== Series Details == Series: Enable Adaptive Sync SDP Support for DP (rev20) URL : https://patchwork.freedesktop.org/series/126829/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for Enable Adaptive Sync SDP Support for DP (rev20)
== Series Details ==
Series: Enable Adaptive Sync SDP Support for DP (rev20)
URL : https://patchwork.freedesktop.org/series/126829/
State : warning
== Summary ==
Error: dim checkpatch failed
8881e3d928c3 drm/dp: Add support to indicate if sink supports AS SDP
2468b16d56e8 drm: Add Adaptive Sync SDP logging
4ea83bf720b4 drm/i915/display: Add crtc state dump for Adaptive Sync SDP
e06cff7ad5a6 drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
bfac1ef47375 drm/i915/dp: Add wrapper function to check AS SDP
9342fb44a3b9 drm/i915/display: Compute AS SDP parameters
6cfdd53c7dd6 drm/i915/display: Add state checker for Adaptive Sync SDP
-:72: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible
side-effects?
#72: FILE: drivers/gpu/drm/i915/display/intel_display.c:5116:
+#define PIPE_CONF_CHECK_DP_AS_SDP(name) do { \
+ if (!intel_compare_dp_as_sdp(¤t_config->infoframes.name, \
+ &pipe_config->infoframes.name)) { \
+ pipe_config_dp_as_sdp_mismatch(dev_priv, fastset,
__stringify(name), \
+
¤t_config->infoframes.name, \
+ &pipe_config->infoframes.name);
\
+ ret = false; \
+ } \
+} while (0)
total: 0 errors, 0 warnings, 1 checks, 70 lines checked
99beb6119427 drm/i915/display: Compute vrr_vsync params
ec9141f1d1f7 drm/i915/display: Read/Write Adaptive Sync SDP
[PATCH v18 3/9] drm/i915/display: Add crtc state dump for Adaptive Sync SDP
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
--v1:
- Rebase Patches to latest.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index cd78c200d483..ccaa4cb2809b 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -286,6 +286,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state
*pipe_config,
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(DP_SDP_VSC))
drm_dp_vsc_sdp_log(&p, &pipe_config->infoframes.vsc);
+ if (pipe_config->infoframes.enable &
+ intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC))
+ drm_dp_as_sdp_log(&p, &pipe_config->infoframes.as_sdp);
if (pipe_config->has_audio)
intel_dump_buffer("ELD: ", pipe_config->eld,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8b9860cefaae..36fcded7564a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1346,6 +1346,7 @@ struct intel_crtc_state {
union hdmi_infoframe hdmi;
union hdmi_infoframe drm;
struct drm_dp_vsc_sdp vsc;
+ struct drm_dp_as_sdp as_sdp;
} infoframes;
u8 eld[MAX_ELD_BYTES];
--
2.25.1
