✓ Fi.CI.BAT: success for QGV/SAGV related fixes (rev10)
== Series Details == Series: QGV/SAGV related fixes (rev10) URL : https://patchwork.freedesktop.org/series/126962/ State : success == Summary == CI Bug Log - changes from CI_DRM_14533 -> Patchwork_126962v10 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/index.html Participating hosts (38 -> 38) -- Additional (3): bat-dg1-7 fi-glk-j4005 fi-elk-e7500 Missing(3): bat-mtlp-8 bat-dg2-11 fi-snb-2520m Known issues Here are the changes found in Patchwork_126962v10 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_parallel@engines@fds: - bat-arls-2: [PASS][1] -> [ABORT][2] ([i915#10698]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14533/bat-arls-2/igt@gem_exec_parallel@engi...@fds.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-arls-2/igt@gem_exec_parallel@engi...@fds.html * igt@gem_huc_copy@huc-copy: - fi-glk-j4005: NOTRUN -> [SKIP][3] ([i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][5] ([i915#4083]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][6] ([i915#4077]) +2 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][7] ([i915#4079]) +1 other test skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][8] ([i915#6621]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][9] ([i915#4212]) +7 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-7: NOTRUN -> [SKIP][10] ([i915#4215]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-glk-j4005: NOTRUN -> [SKIP][11] +10 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/fi-glk-j4005/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg1-7: NOTRUN -> [SKIP][12] ([i915#4103] / [i915#4213]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#3840]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg1-7: NOTRUN -> [SKIP][14] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_hdmi_inject@inject-audio: - bat-dg1-7: NOTRUN -> [SKIP][15] ([i915#433]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pm_backlight@basic-brightness: - bat-dg1-7: NOTRUN -> [SKIP][16] ([i915#5354]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_pm_backli...@basic-brightness.html * igt@kms_pm_rpm@basic-pci-d3-state: - fi-elk-e7500: NOTRUN -> [SKIP][17] +24 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/fi-elk-e7500/igt@kms_pm_...@basic-pci-d3-state.html * igt@kms_psr@psr-primary-page-flip: - bat-dg1-7: NOTRUN -> [SKIP][18] ([i915#1072] / [i915#9732]) +3 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_...@psr-primary-page-flip.html * igt@kms_setmode@basic-clone-single-crtc: - bat-dg1-7: NOTRUN -> [SKIP][19] ([i915#3555]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patch
✗ Fi.CI.BAT: failure for drm/i915/guc: Update w/a 14019159160 (rev2)
== Series Details == Series: drm/i915/guc: Update w/a 14019159160 (rev2) URL : https://patchwork.freedesktop.org/series/130890/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14537 -> Patchwork_130890v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_130890v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_130890v2, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/index.html Participating hosts (33 -> 36) -- Additional (6): bat-dg1-7 fi-glk-j4005 bat-atsm-1 fi-blb-e6850 bat-dg2-11 bat-mtlp-8 Missing(3): bat-jsl-1 bat-arls-1 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_130890v2: ### IGT changes ### Possible regressions * igt@i915_module_load@reload: - bat-dg2-14: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/bat-dg2-14/igt@i915_module_l...@reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-dg2-14/igt@i915_module_l...@reload.html Known issues Here are the changes found in Patchwork_130890v2 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#9318]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - bat-atsm-1: NOTRUN -> [FAIL][4] ([i915#10563]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-atsm-1/igt@gem_huc_c...@huc-copy.html - fi-glk-j4005: NOTRUN -> [SKIP][5] ([i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-9: NOTRUN -> [FAIL][7] ([i915#10378]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-atsm-1: NOTRUN -> [SKIP][9] ([i915#4083]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-atsm-1/igt@gem_m...@basic.html - bat-dg1-7: NOTRUN -> [SKIP][10] ([i915#4083]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-dg1-7/igt@gem_m...@basic.html - bat-dg2-11: NOTRUN -> [SKIP][11] ([i915#4083]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-dg2-11/igt@gem_m...@basic.html - bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4083]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-mtlp-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#4077]) +2 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#4079]) +1 other test skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][15] ([i915#4077]) +2 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html - bat-dg2-11: NOTRUN -> [SKIP][16] ([i915#4077]) +2 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-dg2-11/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-atsm-1: NOTRUN -> [SKIP][17] ([i915#4079]) +1 other test skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-atsm-1/igt@gem_tiled_pread_basic.html - bat-dg1-7: NOTRUN -> [SKIP][18] ([i915#4079]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130890v2/bat-dg1-7/igt@gem_tiled_pread_basic.html - bat-dg2-11: NOTRUN -> [SKIP][19] ([i915#4079]) +1 other test skip [19]: https://intel-gfx-ci.01.or
✗ Fi.CI.SPARSE: warning for drm/i915/guc: Update w/a 14019159160 (rev2)
== Series Details == Series: drm/i915/guc: Update w/a 14019159160 (rev2) URL : https://patchwork.freedesktop.org/series/130890/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update w/a 14019159160 (rev2)
== Series Details == Series: drm/i915/guc: Update w/a 14019159160 (rev2) URL : https://patchwork.freedesktop.org/series/130890/ State : warning == Summary == Error: dim checkpatch failed ff350c317bfe drm/i915/guc: Update w/a 14019159160 -:20: WARNING:LONG_LINE_COMMENT: line length of 108 exceeds 100 columns #20: FILE: drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h:108: + GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE = 0x9001, /* Wa_14019159160 */ -:21: WARNING:LONG_LINE_COMMENT: line length of 108 exceeds 100 columns #21: FILE: drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h:109: + GUC_WORKAROUND_KLV_AVOID_GFX_CLEAR_WHILE_ACTIVE = 0x9006, /* Wa_14019159160 */ -:62: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #62: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:829: + GEM_BUG_ON(*remain < size); total: 0 errors, 3 warnings, 0 checks, 62 lines checked
✗ Fi.CI.BAT: failure for drm/i915/display: Introduce Display Metrics info
== Series Details == Series: drm/i915/display: Introduce Display Metrics info URL : https://patchwork.freedesktop.org/series/132108/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14537 -> Patchwork_132108v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_132108v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_132108v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/index.html Participating hosts (33 -> 35) -- Additional (4): fi-glk-j4005 fi-blb-e6850 bat-dg2-11 bat-dg1-7 Missing(2): fi-snb-2520m fi-kbl-8809g Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_132108v1: ### IGT changes ### Possible regressions * igt@i915_module_load@load: - fi-kbl-x1275: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/fi-kbl-x1275/igt@i915_module_l...@load.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/fi-kbl-x1275/igt@i915_module_l...@load.html - fi-kbl-guc: [PASS][3] -> [ABORT][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/fi-kbl-guc/igt@i915_module_l...@load.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/fi-kbl-guc/igt@i915_module_l...@load.html * igt@i915_selftest@live@mman: - bat-adlm-1: [PASS][5] -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/bat-adlm-1/igt@i915_selftest@l...@mman.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/bat-adlm-1/igt@i915_selftest@l...@mman.html * igt@kms_busy@basic@flip: - fi-kbl-7567u: [PASS][7] -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/fi-kbl-7567u/igt@kms_busy@ba...@flip.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/fi-kbl-7567u/igt@kms_busy@ba...@flip.html - fi-elk-e7500: [PASS][9] -> [INCOMPLETE][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/fi-elk-e7500/igt@kms_busy@ba...@flip.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/fi-elk-e7500/igt@kms_busy@ba...@flip.html - fi-cfl-8109u: [PASS][11] -> [INCOMPLETE][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/fi-cfl-8109u/igt@kms_busy@ba...@flip.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/fi-cfl-8109u/igt@kms_busy@ba...@flip.html - fi-pnv-d510:[PASS][13] -> [ABORT][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/fi-pnv-d510/igt@kms_busy@ba...@flip.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/fi-pnv-d510/igt@kms_busy@ba...@flip.html - bat-dg1-7: NOTRUN -> [ABORT][15] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/bat-dg1-7/igt@kms_busy@ba...@flip.html * igt@kms_busy@basic@modeset: - bat-adln-1: [PASS][16] -> [INCOMPLETE][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/bat-adln-1/igt@kms_busy@ba...@modeset.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/bat-adln-1/igt@kms_busy@ba...@modeset.html - bat-rplp-1: [PASS][18] -> [INCOMPLETE][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/bat-rplp-1/igt@kms_busy@ba...@modeset.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/bat-rplp-1/igt@kms_busy@ba...@modeset.html - bat-adls-6: [PASS][20] -> [ABORT][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/bat-adls-6/igt@kms_busy@ba...@modeset.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/bat-adls-6/igt@kms_busy@ba...@modeset.html - fi-ilk-650: [PASS][22] -> [INCOMPLETE][23] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/fi-ilk-650/igt@kms_busy@ba...@modeset.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/fi-ilk-650/igt@kms_busy@ba...@modeset.html - bat-adlp-6: [PASS][24] -> [ABORT][25] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/bat-adlp-6/igt@kms_busy@ba...@modeset.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132108v1/bat-adlp-6/igt@kms_busy@ba...@modeset.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-ivb-3770:[PASS][26] -> [INCOMPLETE][27] [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/fi-ivb-3770/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html [27]: https://intel-gfx-ci.01.org/tree/d
✗ Fi.CI.SPARSE: warning for drm/i915/display: Introduce Display Metrics info
== Series Details == Series: drm/i915/display: Introduce Display Metrics info URL : https://patchwork.freedesktop.org/series/132108/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: Introduce Display Metrics info
== Series Details == Series: drm/i915/display: Introduce Display Metrics info URL : https://patchwork.freedesktop.org/series/132108/ State : warning == Summary == Error: dim checkpatch failed 1aaf96febc0d drm/i915/display: Introduce Display Metrics info Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' Traceback (most recent call last): File "scripts/spdxcheck.py", line 6, in from ply import lex, yacc ModuleNotFoundError: No module named 'ply' -:221: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #221: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 558 lines checked
[PATCH] drm/i915/display: Introduce Display Metrics info
Introduce a display metrics information through debugfs
for a better view of the vblank and page flips, in special
Async flips behavior.
There is currently an overall expectation that whenever
vblank_mode=0 is used with an graphics application, that
automatically async_flips are happening. However, while
implementing the Display Metrics for GuC SLPC, it was observed
that it is not necessarily true for many of the expected cases.
So, while the GuC SLPC side of the metrics doesn't get ready,
let's at least bring the debugfs view of it so we can work
to understand and fix any potential issue around our async vblanks.
Please notice that the every struct here follows exactly the
GuC shared data buffer, so the next step of the integration
would be smooth and almost transparent to this intel_metrics
on the display side.
Cc: Uma Shankar
Cc: Vandita Kulkarni
Cc: Naveen Kumar
Cc: Jani Nikula
Cc: Vinay Belgaumkar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 15 +-
.../gpu/drm/i915/display/intel_display_core.h | 2 +
.../drm/i915/display/intel_display_debugfs.c | 12 +
.../drm/i915/display/intel_display_driver.c | 5 +
.../gpu/drm/i915/display/intel_display_irq.c | 3 +
drivers/gpu/drm/i915/display/intel_metrics.c | 356 ++
drivers/gpu/drm/i915/display/intel_metrics.h | 27 ++
.../drm/i915/display/skl_universal_plane.c| 3 +
drivers/gpu/drm/xe/Makefile | 1 +
10 files changed, 424 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_metrics.c
create mode 100644 drivers/gpu/drm/i915/display/intel_metrics.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index af9e871daf1d..a3c8d9f5614c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -291,6 +291,7 @@ i915-y += \
display/intel_link_bw.o \
display/intel_load_detect.o \
display/intel_lpe_audio.o \
+ display/intel_metrics.o \
display/intel_modeset_lock.o \
display/intel_modeset_setup.o \
display/intel_modeset_verify.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index a481c9218138..ca30b8d48e1f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -94,6 +94,7 @@
#include "intel_link_bw.h"
#include "intel_lvds.h"
#include "intel_lvds_regs.h"
+#include "intel_metrics.h"
#include "intel_modeset_setup.h"
#include "intel_modeset_verify.h"
#include "intel_overlay.h"
@@ -1021,11 +1022,15 @@ static void intel_post_plane_update(struct
intel_atomic_state *state,
struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_display *display = &dev_priv->display;
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
enum pipe pipe = crtc->pipe;
+ const struct intel_plane_state __maybe_unused *plane_state;
+ struct intel_plane *plane;
+ int i;
intel_psr_post_plane_update(state, crtc);
@@ -1057,6 +1062,12 @@ static void intel_post_plane_update(struct
intel_atomic_state *state,
if (audio_enabling(old_crtc_state, new_crtc_state))
intel_encoders_audio_enable(state, crtc);
+
+ if (!new_crtc_state->do_async_flip) {
+ for_each_new_intel_plane_in_state(state, plane, plane_state, i)
+ intel_metrics_flip(display, new_crtc_state, plane->id,
+ false);
+ }
}
static void intel_crtc_enable_flip_done(struct intel_atomic_state *state,
@@ -7139,6 +7150,7 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
{
struct drm_device *dev = state->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = &dev_priv->display;
struct intel_crtc_state *new_crtc_state, *old_crtc_state;
struct intel_crtc *crtc;
struct intel_power_domain_mask put_domains[I915_MAX_PIPES] = {};
@@ -7261,7 +7273,6 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
if (new_crtc_state->do_async_flip)
intel_crtc_disable_flip_done(state, crtc);
-
intel_color_wait_commit(new_crtc_state);
}
@@ -7314,6 +7325,8 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
* FIXME get rid of this funny new->old swapping
*/
old_crtc_state->dsb = fetch_and_zero(&new_crtc_s
✗ Fi.CI.BAT: failure for drm/i915: use check_add_overflow() and drop local variants
== Series Details == Series: drm/i915: use check_add_overflow() and drop local variants URL : https://patchwork.freedesktop.org/series/132104/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14537 -> Patchwork_132104v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_132104v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_132104v1, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/index.html Participating hosts (33 -> 37) -- Additional (6): bat-kbl-2 fi-glk-j4005 bat-atsm-1 fi-blb-e6850 bat-mtlp-8 bat-arls-3 Missing(2): fi-bsw-nick fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_132104v1: ### IGT changes ### Possible regressions * igt@i915_selftest@live@hangcheck: - bat-arls-2: NOTRUN -> [ABORT][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-arls-2/igt@i915_selftest@l...@hangcheck.html Known issues Here are the changes found in Patchwork_132104v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][2] ([i915#9318]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html - bat-arls-3: NOTRUN -> [SKIP][3] ([i915#9318]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][4] ([i915#1849]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-kbl-2/igt@fb...@info.html * igt@gem_huc_copy@huc-copy: - bat-atsm-1: NOTRUN -> [FAIL][5] ([i915#10563]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-atsm-1/igt@gem_huc_c...@huc-copy.html - fi-glk-j4005: NOTRUN -> [SKIP][6] ([i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][8] +39 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html - bat-arls-3: NOTRUN -> [SKIP][9] ([i915#10213]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-atsm-1: NOTRUN -> [SKIP][11] ([i915#4083]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-atsm-1/igt@gem_m...@basic.html - bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4083]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-mtlp-8/igt@gem_m...@basic.html - bat-arls-3: NOTRUN -> [SKIP][13] ([i915#4083]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-arls-3/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#4077]) +2 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#4079]) +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html - bat-arls-3: NOTRUN -> [SKIP][16] ([i915#10197] / [i915#10211] / [i915#4079]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][17] ([i915#10196] / [i915#4077]) +2 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132104v1/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-atsm-1: NOTRUN -> [SKIP][18] ([i915#4079]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_
✗ Fi.CI.SPARSE: warning for drm/i915: use check_add_overflow() and drop local variants
== Series Details == Series: drm/i915: use check_add_overflow() and drop local variants URL : https://patchwork.freedesktop.org/series/132104/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [PATCH 01/12] drm/client: Fully protect modes[] with dev->mode_config.mutex
On Fri, Apr 05, 2024 at 11:39:33PM +0300, Dmitry Baryshkov wrote:
> On Fri, 5 Apr 2024 at 22:17, Ville Syrjälä
> wrote:
> >
> > On Fri, Apr 05, 2024 at 06:24:01AM +0300, Dmitry Baryshkov wrote:
> > > On Thu, Apr 04, 2024 at 11:33:25PM +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
> > > >
> > > > The modes[] array contains pointers to modes on the connectors'
> > > > mode lists, which are protected by dev->mode_config.mutex.
> > > > Thus we need to extend modes[] the same protection or by the
> > > > time we use it the elements may already be pointing to
> > > > freed/reused memory.
> > > >
> > > > Cc: sta...@vger.kernel.org
> > > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10583
> > > > Signed-off-by: Ville Syrjälä
> > >
> > > Reviewed-by: Dmitry Baryshkov
> > >
> > > I tried looking for the proper Fixes tag, but it looks like it might be
> > > something like 386516744ba4 ("drm/fb: fix fbdev object model + cleanup
> > > properly.")
> >
> > The history is rather messy. I think it was originally completely
> > lockless and broken, and got fixed piecemeal later in these:
> > commit 7394371d8569 ("drm: Take lock around probes for
> > drm_fb_helper_hotplug_event")
> > commit 966a6a13c666 ("drm: Hold mode_config.lock to prevent hotplug whilst
> > setting up crtcs")
> >
> > commit e13a05831050 ("drm/fb-helper: Stop using mode_config.mutex for
> > internals")
> > looks to me like where the race might have been re-introduced.
> > But didn't do a thorough analysis so not 100% sure. It's all
> > rather ancient history by now so a Fixes tag doesn't seem all
> > that useful anyway.
>
> Well, you have added stable to cc list, so you expect to have this
> patch backported. Then it should either have a kernel version as a
> 'starting' point or a Fixes tag to assist the sable team.
It'll get backported just fine without either.
--
Ville Syrjälä
Intel
Re: [PATCH 01/12] drm/client: Fully protect modes[] with dev->mode_config.mutex
On Fri, 5 Apr 2024 at 22:17, Ville Syrjälä
wrote:
>
> On Fri, Apr 05, 2024 at 06:24:01AM +0300, Dmitry Baryshkov wrote:
> > On Thu, Apr 04, 2024 at 11:33:25PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > The modes[] array contains pointers to modes on the connectors'
> > > mode lists, which are protected by dev->mode_config.mutex.
> > > Thus we need to extend modes[] the same protection or by the
> > > time we use it the elements may already be pointing to
> > > freed/reused memory.
> > >
> > > Cc: sta...@vger.kernel.org
> > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10583
> > > Signed-off-by: Ville Syrjälä
> >
> > Reviewed-by: Dmitry Baryshkov
> >
> > I tried looking for the proper Fixes tag, but it looks like it might be
> > something like 386516744ba4 ("drm/fb: fix fbdev object model + cleanup
> > properly.")
>
> The history is rather messy. I think it was originally completely
> lockless and broken, and got fixed piecemeal later in these:
> commit 7394371d8569 ("drm: Take lock around probes for
> drm_fb_helper_hotplug_event")
> commit 966a6a13c666 ("drm: Hold mode_config.lock to prevent hotplug whilst
> setting up crtcs")
>
> commit e13a05831050 ("drm/fb-helper: Stop using mode_config.mutex for
> internals")
> looks to me like where the race might have been re-introduced.
> But didn't do a thorough analysis so not 100% sure. It's all
> rather ancient history by now so a Fixes tag doesn't seem all
> that useful anyway.
Well, you have added stable to cc list, so you expect to have this
patch backported. Then it should either have a kernel version as a
'starting' point or a Fixes tag to assist the sable team.
--
With best wishes
Dmitry
✓ Fi.CI.BAT: success for drm/xe/display: Fix double mutex initialization
== Series Details == Series: drm/xe/display: Fix double mutex initialization URL : https://patchwork.freedesktop.org/series/132100/ State : success == Summary == CI Bug Log - changes from CI_DRM_14537 -> Patchwork_132100v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/index.html Participating hosts (33 -> 36) -- Additional (7): bat-kbl-2 fi-glk-j4005 bat-atsm-1 fi-blb-e6850 bat-dg2-11 bat-mtlp-8 bat-arls-3 Missing(4): bat-rpls-3 bat-jsl-1 fi-snb-2520m fi-kbl-8809g Known issues Here are the changes found in Patchwork_132100v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html - bat-arls-3: NOTRUN -> [SKIP][2] ([i915#9318]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][3] ([i915#1849]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-kbl-2/igt@fb...@info.html * igt@gem_huc_copy@huc-copy: - bat-atsm-1: NOTRUN -> [FAIL][4] ([i915#10563]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-atsm-1/igt@gem_huc_c...@huc-copy.html - fi-glk-j4005: NOTRUN -> [SKIP][5] ([i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-11: NOTRUN -> [FAIL][7] ([i915#10378]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][8] +39 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html - bat-arls-3: NOTRUN -> [SKIP][9] ([i915#10213]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-atsm-1: NOTRUN -> [SKIP][11] ([i915#4083]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-atsm-1/igt@gem_m...@basic.html - bat-dg2-11: NOTRUN -> [SKIP][12] ([i915#4083]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-dg2-11/igt@gem_m...@basic.html - bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#4083]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-mtlp-8/igt@gem_m...@basic.html - bat-arls-3: NOTRUN -> [SKIP][14] ([i915#4083]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-arls-3/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#4077]) +2 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#4079]) +1 other test skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html - bat-arls-3: NOTRUN -> [SKIP][17] ([i915#10197] / [i915#10211] / [i915#4079]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][18] ([i915#10196] / [i915#4077]) +2 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg2-11: NOTRUN -> [SKIP][19] ([i915#4077]) +2 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-dg2-11/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-atsm-1: NOTRUN -> [SKIP][20] ([i915#4079]) +1 other test skip [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132100v1/bat-atsm-1/igt@gem_tiled_pread_basic.html - bat-dg2-11: NOTRUN -> [
Re: [PATCH 0/6] drm/i915 and drm/xe display integration cleanups
On Fri, Apr 05, 2024 at 10:37:37PM +0300, Jani Nikula wrote:
Some cleanups on i915 side, and subsequent cleanups on xe side. I'd like
to merge all of these via drm-intel-next.
For the entire series:
Reviewed-by: Lucas De Marchi
and ack on merging via drm-intel-next.
Lucas De Marchi
BR,
Jani.
Jani Nikula (6):
drm/i915: use IS_JASPERLAKE()/IS_ELKHARTLAKE() instead of
IS_PLATFORM()
drm/i915/dmc: define firmware URL locally
drm/i915: move i915_fixed.h to display/intel_fixed.h
drm/xe/display: clean up a lot of cruft from compat i915_drv.h
drm/xe/display: remove compat i915_gem.h
drm/xe/display: clean up compat i915_vgpu.h
.../drm/i915/display/intel_ddi_buf_trans.c| 4 +--
drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++-
.../{i915_fixed.h => display/intel_fixed.h} | 0
drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
.../gpu/drm/xe/compat-i915-headers/i915_drv.h | 34 ---
.../drm/xe/compat-i915-headers/i915_fixed.h | 6
.../gpu/drm/xe/compat-i915-headers/i915_gem.h | 9 -
.../drm/xe/compat-i915-headers/i915_vgpu.h| 26 --
.../drm/xe/compat-i915-headers/intel_uc_fw.h | 11 --
9 files changed, 6 insertions(+), 90 deletions(-)
rename drivers/gpu/drm/i915/{i915_fixed.h => display/intel_fixed.h} (100%)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
--
2.39.2
Re: [PATCH] drm/xe/display: Fix double mutex initialization
On Fri, 05 Apr 2024, Lucas De Marchi wrote:
> All of these mutexes are already initialized by the display side since
> commit 3fef3e6ff86a ("drm/i915: move display mutex inits to display
> code"), so the xe shouldn´t initialize them.
>
> Fixes: 44e694958b95 ("drm/xe/display: Implement display support")
> Cc: Jani Nikula
> Cc: Arun R Murthy
> Signed-off-by: Lucas De Marchi
Yeah, whether they should be initialized with drmm_* is another matter.
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/xe/display/xe_display.c | 5 -
> 1 file changed, 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c
> b/drivers/gpu/drm/xe/display/xe_display.c
> index e4db069f0db3..6ec375c1c4b6 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -108,11 +108,6 @@ int xe_display_create(struct xe_device *xe)
> xe->display.hotplug.dp_wq = alloc_ordered_workqueue("xe-dp", 0);
>
> drmm_mutex_init(&xe->drm, &xe->sb_lock);
> - drmm_mutex_init(&xe->drm, &xe->display.backlight.lock);
> - drmm_mutex_init(&xe->drm, &xe->display.audio.mutex);
> - drmm_mutex_init(&xe->drm, &xe->display.wm.wm_mutex);
> - drmm_mutex_init(&xe->drm, &xe->display.pps.mutex);
> - drmm_mutex_init(&xe->drm, &xe->display.hdcp.hdcp_mutex);
> xe->enabled_irq_mask = ~0;
>
> err = drmm_add_action_or_reset(&xe->drm, display_destroy, NULL);
--
Jani Nikula, Intel
Re: [PATCH 2/6] drm/i915/dmc: define firmware URL locally
On Fri, Apr 05, 2024 at 10:37:39PM +0300, Jani Nikula wrote:
Avoid the dependency on intel_uc_fw.h, and allow removal of xe compat
intel_uc_fw.h. If there needs to be duplication of the URL, at least
have the duplication in a sensible way.
Cc: Lucas De Marchi
Signed-off-by: Jani Nikula
Reviewed-by: Lucas De Marchi
but see below. +Josh
---
drivers/gpu/drm/i915/display/intel_dmc.c | 4 +++-
drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h| 1 -
drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h | 11 ---
3 files changed, 3 insertions(+), 13 deletions(-)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display/intel_dmc.c
index 3fa851b5c7a6..e61e9c1b8947 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -38,6 +38,8 @@
* low-power state and comes back to normal.
*/
+#define INTEL_DMC_FIRMWARE_URL
"https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git";
repo recently moved to gitlab, but as far as I know the one on
kernel.org will still work. Do we want to change it?
https://gitlab.com/kernel-firmware/linux-firmware
thanks
Lucas De Marchi
+
enum intel_dmc_id {
DMC_FW_MAIN = 0,
DMC_FW_PIPEA,
@@ -953,7 +955,7 @@ static void dmc_load_work_fn(struct work_struct *work)
" Disabling runtime power management.\n",
dmc->fw_path);
drm_notice(&i915->drm, "DMC firmware homepage: %s",
- INTEL_UC_FIRMWARE_URL);
+ INTEL_DMC_FIRMWARE_URL);
}
release_firmware(fw);
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index a01d1b869c2d..837e95e3604e 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -26,7 +26,6 @@
#include "i915_utils.h"
#include "intel_gt_types.h"
#include "intel_step.h"
-#include "intel_uc_fw.h"
#include "intel_uncore.h"
#include "intel_runtime_pm.h"
#include
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
b/drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
deleted file mode 100644
index 009745328992..
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef _INTEL_UC_FW_H_
-#define _INTEL_UC_FW_H_
-
-#define INTEL_UC_FIRMWARE_URL
"https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git";
-
-#endif
--
2.39.2
[PATCH] drm/i915: use check_add_overflow() and drop local variants
Prefer common check_add_overflow() from overflow.h over the locally
rolled versions of it. While check_add_overflow() does require a
variable to assign to, unlike add_overflows_t(), it's still better than
having multiple versions around.
Cc: Kees Cook
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_fb.c | 6 +++---
drivers/gpu/drm/i915/i915_utils.h | 14 --
2 files changed, 3 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
b/drivers/gpu/drm/i915/display/intel_fb.c
index 3ea6470d6d92..86b443433e8b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -1106,7 +1106,7 @@ static int intel_fb_offset_to_xy(int *x, int *y,
{
struct drm_i915_private *i915 = to_i915(fb->dev);
unsigned int height;
- u32 alignment;
+ u32 alignment, unused;
if (DISPLAY_VER(i915) >= 12 &&
!intel_fb_needs_pot_stride_remap(to_intel_framebuffer(fb)) &&
@@ -1128,8 +1128,8 @@ static int intel_fb_offset_to_xy(int *x, int *y,
height = ALIGN(height, intel_tile_height(fb, color_plane));
/* Catch potential overflows early */
- if (add_overflows_t(u32, mul_u32_u32(height, fb->pitches[color_plane]),
- fb->offsets[color_plane])) {
+ if (check_add_overflow(mul_u32_u32(height, fb->pitches[color_plane]),
+ fb->offsets[color_plane], &unused)) {
drm_dbg_kms(&i915->drm,
"Bad offset 0x%08x or pitch %d for color plane
%d\n",
fb->offsets[color_plane], fb->pitches[color_plane],
diff --git a/drivers/gpu/drm/i915/i915_utils.h
b/drivers/gpu/drm/i915/i915_utils.h
index b45ef0560611..06ec6ceb61d5 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -73,20 +73,6 @@ bool i915_error_injected(void);
__i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \
fmt, ##__VA_ARGS__)
-#if defined(GCC_VERSION) && GCC_VERSION >= 7
-#define add_overflows_t(T, A, B) \
- __builtin_add_overflow_p((A), (B), (T)0)
-#else
-#define add_overflows_t(T, A, B) ({ \
- typeof(A) a = (A); \
- typeof(B) b = (B); \
- (T)(a + b) < a; \
-})
-#endif
-
-#define add_overflows(A, B) \
- add_overflows_t(typeof((A) + (B)), (A), (B))
-
#define range_overflows(start, size, max) ({ \
typeof(start) start__ = (start); \
typeof(size) size__ = (size); \
--
2.39.2
Re: [PATCH 10/12] drm/client: Use [CONNECTOR:%d:%s] formatting
On Fri, Apr 05, 2024 at 11:23:01AM +0300, Jani Nikula wrote:
> On Thu, 04 Apr 2024, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Switch to the canonical [CONNECTOR:%d:%s] etc. format for
> > printing out kms objects.
>
> I've been pinging for reviews on [1] for a while now. :/
>
> I'm just doing what you do in patches 9-10 in one go, and I very much
> prefer having the [CONNECTOR:%d:%s] bit as the first thing in the
> debug. For an individual line your style might read better, but for
> reading a log with a bunch of consecutive lines, I think having it as a
> prefix reads better.
>
> BR,
> Jani.
>
>
> [1]
> https://lore.kernel.org/r/f580f7a20bdea45178cef3940b636d491ae3dd92.1709843865.git.jani.nik...@intel.com
>
Looks like you have rbs now. I can rebase this
(and see what's left) after your stuff lands.
>
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/drm_client_modeset.c | 65 +++-
> > 1 file changed, 35 insertions(+), 30 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_client_modeset.c
> > b/drivers/gpu/drm/drm_client_modeset.c
> > index 1751162b7d5c..415d1799337b 100644
> > --- a/drivers/gpu/drm/drm_client_modeset.c
> > +++ b/drivers/gpu/drm/drm_client_modeset.c
> > @@ -251,8 +251,10 @@ static void drm_client_connectors_enabled(struct
> > drm_device *dev,
> > for (i = 0; i < connector_count; i++) {
> > connector = connectors[i];
> > enabled[i] = drm_connector_enabled(connector, true);
> > - drm_dbg_kms(dev, "connector %d enabled? %s\n",
> > connector->base.id,
> > - connector->display_info.non_desktop ? "non desktop"
> > : str_yes_no(enabled[i]));
> > + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] enabled? %s\n",
> > + connector->base.id, connector->name,
> > + connector->display_info.non_desktop ?
> > + "non desktop" : str_yes_no(enabled[i]));
> >
> > any_enabled |= enabled[i];
> > }
> > @@ -368,8 +370,8 @@ static int drm_client_get_tile_offsets(struct
> > drm_device *dev,
> > continue;
> >
> > if (!modes[i] && (h_idx || v_idx)) {
> > - drm_dbg_kms(dev, "no modes for connector tiled %d %d\n",
> > - i, connector->base.id);
> > + drm_dbg_kms(dev, "no modes for tiled
> > [CONNECTOR:%d:%s]\n",
> > + connector->base.id, connector->name);
> > continue;
> > }
> > if (connector->tile_h_loc < h_idx)
> > @@ -438,14 +440,15 @@ static bool drm_client_target_preferred(struct
> > drm_device *dev,
> > drm_client_get_tile_offsets(dev, connectors,
> > connector_count, modes, offsets, i,
> > connector->tile_h_loc,
> > connector->tile_v_loc);
> > }
> > - drm_dbg_kms(dev, "looking for cmdline mode on connector %d\n",
> > - connector->base.id);
> > + drm_dbg_kms(dev, "looking for cmdline mode on
> > [CONNECTOR:%d:%s]\n",
> > + connector->base.id, connector->name);
> >
> > /* got for command line mode first */
> > modes[i] = drm_connector_pick_cmdline_mode(connector);
> > if (!modes[i]) {
> > - drm_dbg_kms(dev, "looking for preferred mode on
> > connector %d %d\n",
> > - connector->base.id, connector->tile_group ?
> > connector->tile_group->id : 0);
> > + drm_dbg_kms(dev, "looking for preferred mode on
> > [CONNECTOR:%d:%s] (tile group: %d)\n",
> > + connector->base.id, connector->name,
> > + connector->tile_group ?
> > connector->tile_group->id : 0);
> > modes[i] = drm_connector_preferred_mode(connector,
> > width, height);
> > }
> > /* No preferred modes, pick one off the list */
> > @@ -465,8 +468,8 @@ static bool drm_client_target_preferred(struct
> > drm_device *dev,
> > (connector->tile_h_loc == 0 &&
> > connector->tile_v_loc == 0 &&
> > !drm_connector_get_tiled_mode(connector))) {
> > - drm_dbg_kms(dev, "Falling back to non tiled
> > mode on Connector %d\n",
> > - connector->base.id);
> > + drm_dbg_kms(dev, "Falling back to non tiled
> > mode on [CONNECTOR:%d:%s]\n",
> > + connector->base.id,
> > connector->name);
> > modes[i] =
> > drm_connector_fallback_non_tiled_mode(connector);
> > } else {
> > modes[i] =
> > drm_connector_get_tiled_mode(connector);
> > @@ -634,15 +637,15 @@ static bool drm_clie
✓ Fi.CI.BAT: success for drm/i915 and drm/xe display integration cleanups
== Series Details == Series: drm/i915 and drm/xe display integration cleanups URL : https://patchwork.freedesktop.org/series/132097/ State : success == Summary == CI Bug Log - changes from CI_DRM_14537 -> Patchwork_132097v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/index.html Participating hosts (33 -> 36) -- Additional (7): bat-dg1-7 bat-kbl-2 fi-glk-j4005 bat-atsm-1 bat-dg2-11 bat-mtlp-8 bat-arls-3 Missing(4): bat-jsl-1 fi-bsw-nick fi-snb-2520m fi-kbl-8809g Known issues Here are the changes found in Patchwork_132097v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html - bat-arls-3: NOTRUN -> [SKIP][2] ([i915#9318]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][3] ([i915#1849]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-kbl-2/igt@fb...@info.html * igt@gem_huc_copy@huc-copy: - bat-atsm-1: NOTRUN -> [FAIL][4] ([i915#10563]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-atsm-1/igt@gem_huc_c...@huc-copy.html - fi-glk-j4005: NOTRUN -> [SKIP][5] ([i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-8: [PASS][7] -> [FAIL][8] ([i915#10378]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14537/bat-dg2-8/igt@gem_lmem_swapping@ba...@lmem0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-dg2-8/igt@gem_lmem_swapping@ba...@lmem0.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][9] +39 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html - bat-arls-3: NOTRUN -> [SKIP][10] ([i915#10213]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4613]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-atsm-1: NOTRUN -> [SKIP][12] ([i915#4083]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-atsm-1/igt@gem_m...@basic.html - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#4083]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-dg1-7/igt@gem_m...@basic.html - bat-dg2-11: NOTRUN -> [SKIP][14] ([i915#4083]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-dg2-11/igt@gem_m...@basic.html - bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#4083]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-mtlp-8/igt@gem_m...@basic.html - bat-arls-3: NOTRUN -> [SKIP][16] ([i915#4083]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-arls-3/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][17] ([i915#4077]) +2 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][18] ([i915#4079]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html - bat-arls-3: NOTRUN -> [SKIP][19] ([i915#10197] / [i915#10211] / [i915#4079]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][20] ([i915#10196] / [i915#4077]) +2 other tests skip [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][21] ([i915#4077]) +2 other tests skip [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132097v1/bat-dg1-7/igt@gem_tiled_fenc
[PATCH] drm/xe/display: Fix double mutex initialization
All of these mutexes are already initialized by the display side since
commit 3fef3e6ff86a ("drm/i915: move display mutex inits to display
code"), so the xe shouldn´t initialize them.
Fixes: 44e694958b95 ("drm/xe/display: Implement display support")
Cc: Jani Nikula
Cc: Arun R Murthy
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/xe/display/xe_display.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_display.c
b/drivers/gpu/drm/xe/display/xe_display.c
index e4db069f0db3..6ec375c1c4b6 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -108,11 +108,6 @@ int xe_display_create(struct xe_device *xe)
xe->display.hotplug.dp_wq = alloc_ordered_workqueue("xe-dp", 0);
drmm_mutex_init(&xe->drm, &xe->sb_lock);
- drmm_mutex_init(&xe->drm, &xe->display.backlight.lock);
- drmm_mutex_init(&xe->drm, &xe->display.audio.mutex);
- drmm_mutex_init(&xe->drm, &xe->display.wm.wm_mutex);
- drmm_mutex_init(&xe->drm, &xe->display.pps.mutex);
- drmm_mutex_init(&xe->drm, &xe->display.hdcp.hdcp_mutex);
xe->enabled_irq_mask = ~0;
err = drmm_add_action_or_reset(&xe->drm, display_destroy, NULL);
--
2.43.0
✗ Fi.CI.SPARSE: warning for drm/i915 and drm/xe display integration cleanups
== Series Details == Series: drm/i915 and drm/xe display integration cleanups URL : https://patchwork.freedesktop.org/series/132097/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +drivers/gpu/drm/i915/display/intel_display_types.h:2076:16: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/display/intel_display_typ
✗ Fi.CI.CHECKPATCH: warning for drm/i915 and drm/xe display integration cleanups
== Series Details == Series: drm/i915 and drm/xe display integration cleanups URL : https://patchwork.freedesktop.org/series/132097/ State : warning == Summary == Error: dim checkpatch failed b8ca0bbab20e drm/i915: use IS_JASPERLAKE()/IS_ELKHARTLAKE() instead of IS_PLATFORM() 0706baf1630e drm/i915/dmc: define firmware URL locally -:48: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #48: deleted file mode 100644 total: 0 errors, 1 warnings, 0 checks, 23 lines checked 24728e5266d9 drm/i915: move i915_fixed.h to display/intel_fixed.h -:16: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #16: rename from drivers/gpu/drm/i915/i915_fixed.h total: 0 errors, 1 warnings, 0 checks, 14 lines checked ab38df8faf7d drm/xe/display: clean up a lot of cruft from compat i915_drv.h 52d4d76384b5 drm/xe/display: remove compat i915_gem.h -:25: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #25: deleted file mode 100644 total: 0 errors, 1 warnings, 0 checks, 7 lines checked 43aaa037346c drm/xe/display: clean up compat i915_vgpu.h
Re: [PATCH 11/12] drm/client: Streamline mode selection debugs
On Fri, Apr 05, 2024 at 09:57:07AM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 04.04.24 um 22:33 schrieb Ville Syrjala:
> > From: Ville Syrjälä
> >
> > Get rid of all the redundant debugs and just wait until the end
> > to print which mode (and of which type) we picked.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/drm_client_modeset.c | 65 +---
> > 1 file changed, 31 insertions(+), 34 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_client_modeset.c
> > b/drivers/gpu/drm/drm_client_modeset.c
> > index 415d1799337b..ad88c11037d8 100644
> > --- a/drivers/gpu/drm/drm_client_modeset.c
> > +++ b/drivers/gpu/drm/drm_client_modeset.c
> > @@ -408,6 +408,8 @@ static bool drm_client_target_preferred(struct
> > drm_device *dev,
> >
> > retry:
> > for (i = 0; i < connector_count; i++) {
> > + const char *mode_type;
> > +
> > connector = connectors[i];
> >
> > if (conn_configured & BIT_ULL(i))
> > @@ -440,20 +442,20 @@ static bool drm_client_target_preferred(struct
> > drm_device *dev,
> > drm_client_get_tile_offsets(dev, connectors,
> > connector_count, modes, offsets, i,
> > connector->tile_h_loc,
> > connector->tile_v_loc);
> > }
> > - drm_dbg_kms(dev, "looking for cmdline mode on
> > [CONNECTOR:%d:%s]\n",
> > - connector->base.id, connector->name);
> >
> > - /* got for command line mode first */
> > + mode_type = "cmdline";
> > modes[i] = drm_connector_pick_cmdline_mode(connector);
> > +
> > if (!modes[i]) {
> > - drm_dbg_kms(dev, "looking for preferred mode on
> > [CONNECTOR:%d:%s] (tile group: %d)\n",
> > - connector->base.id, connector->name,
> > - connector->tile_group ?
> > connector->tile_group->id : 0);
> > + mode_type = "preferred";
> > modes[i] = drm_connector_preferred_mode(connector,
> > width, height);
> > }
> > - /* No preferred modes, pick one off the list */
> > - if (!modes[i])
> > +
> > + if (!modes[i]) {
> > + mode_type = "first";
> > modes[i] = drm_connector_first_mode(connector);
> > + }
> > +
> > /*
> > * In case of tiled mode if all tiles not present fallback to
> > * first available non tiled mode.
> > @@ -468,16 +470,20 @@ static bool drm_client_target_preferred(struct
> > drm_device *dev,
> > (connector->tile_h_loc == 0 &&
> > connector->tile_v_loc == 0 &&
> > !drm_connector_get_tiled_mode(connector))) {
> > - drm_dbg_kms(dev, "Falling back to non tiled
> > mode on [CONNECTOR:%d:%s]\n",
> > - connector->base.id,
> > connector->name);
> > + mode_type = "non tiled";
> > modes[i] =
> > drm_connector_fallback_non_tiled_mode(connector);
> > } else {
> > + mode_type = "tiled";
> > modes[i] =
> > drm_connector_get_tiled_mode(connector);
> > }
> > }
> >
> > - drm_dbg_kms(dev, "found mode %s\n",
> > - modes[i] ? modes[i]->name : "none");
> > + if (!modes[i])
> > + mode_type = "no";
> > +
> > + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] found %s mode: %s\n",
> > + connector->base.id, connector->name,
> > + mode_type, modes[i] ? modes[i]->name : "none");
>
> Instead of tracking the whole mode_type thing, maybe just do
>
> if (!modes[i])
> drm_dbg_kms(dev, "[CONNECTOR:%d:%s] found mode: " DRM_MODE_FMT,
> DRM_MODE_ARG(modes[i]) );
>
> to print the full mode.
The point of the mode_type is to indicate how we derived
that mode. Printing the full modeline doesn't help with that.
--
Ville Syrjälä
Intel
Re: [PATCH v2 01/17] drm/i915: Update pipes in reverse order for bigjoiner
On Fri, Apr 05, 2024 at 01:42:49PM +, Kulkarni, Vandita wrote: > > -Original Message- > > From: Intel-gfx On Behalf Of Ville > > Syrjala > > Sent: Friday, April 5, 2024 3:04 AM > > To: intel-gfx@lists.freedesktop.org > > Subject: [PATCH v2 01/17] drm/i915: Update pipes in reverse order for > > bigjoiner > > > > From: Ville Syrjälä > > > > With bigjoiner the master crtc is the one that will send out the uapi > > event/etc. We want that to happen after all the slaves are done, so let's > > try > > to do the commits in reverse order so that the master comes last. > > > > Even worse, the modeset helper will simply complete the commit on the > > slave pipe immediately as it consider the crtc to be inactive (it can't see > > our > > crtc_state->hw.active/etc.). > > > > With regular sync updates this generally doesn't matter all that much as the > > slave pipe should typically finish its work during the same frame as the > > master pipe. However in case the slave pipe's commit slips into the next > > frame we end up in a bit of trouble. This is most visible with either async > > flips > > (currently disabled with bigjoiner exactly for this reason), and DSB gamma > > updates. With DSB the problem happens because the DSB itself will wait until > > the next start vblank before starting to execute. So if the master pipe > > already > > finished its commit and the DSB on the slave pipe is still waiting for the > > next > > vblank we will assume the DSB as gotten stuck and terminate it. > > > > Reversing the commit order should ameliarate this for the most part as the > > master pipe is guaranteed to start its commit after the slave pipe started. > > The > > one thing that can still screw us over is the fact that we aren't > > necessarily > > going to commit the pipes in the reverse order as the actual order is > > dictated > > by the DDB overlap avoidance. > > But that can only happen while other pipes are being enabled/disabled, and > > so in the normal steady state we should be safe. > > > > The full fix will involve making the commit machinery aware of the slave > > pipes and not finish their commits prematurely. But that will involve a bit > > more work than this. And this commit order reversal will still be > > beneficial to > > avoid userspace getting an -EBUSY from the following page flip if the second > > pipe's commit does stretch into the next frame. > > > > LGTM. > Reviewed-by: Vandita Kulkarni > > I had just one query though, > Will there be a case where we can get vblank between slave update and master > update, > if so do you think there will be any problem due to that? It can happen, in which case you may observe a vertical tear. Since we've disabled all the fancy transcoder level stuff (vrr/lrr/etc.) that should be the worst of it. -- Ville Syrjälä Intel
Re: [PATCH 04/12] drm/client: Add a FIXME around crtc->mode usage
On Fri, Apr 05, 2024 at 06:32:46AM +0300, Dmitry Baryshkov wrote:
> On Thu, Apr 04, 2024 at 11:33:28PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > crtc->mode is legacy junk and shouldn't really be used with
> > atomic drivers.
> >
> > Most (all?) atomic drivers do end up still calling
> > drm_atomic_helper_update_legacy_modeset_state() at some
> > point, so crtc->mode does still get populated, and this
> > does work for now. But eventually would be nice to eliminate
> > all the legacy stuff from atomic drivers.
> >
> > Switching to crtc->state->mode would require some bigger
> > changes however, as we currently drop the crtc->mutex
> > before we're done using the mode. So leave the junk in
> > for now and just add a FIXME to remind us that this
> > needs fixing.
>
>
> What about using allocated duplicate modes to fill modes[] array? This
> requires additional allocations, but it will solve most if not all modes
> lifetime issues.
I think there are two obvious solutions:
1. drm_mode_duplicate() as you suggest
upside: existing 'modes[i] != NULL' checks work as is
downside: introduces more error paths due to potential kmalloc() fails
2. Make modes[] and array of structs rather than pointers
up/downsides: the opposite of option 1
So neither is a trivial search and replace job.
>
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/drm_client_modeset.c | 4
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_client_modeset.c
> > b/drivers/gpu/drm/drm_client_modeset.c
> > index 2b7d0be04911..8ef03608b424 100644
> > --- a/drivers/gpu/drm/drm_client_modeset.c
> > +++ b/drivers/gpu/drm/drm_client_modeset.c
> > @@ -699,6 +699,10 @@ static bool drm_client_firmware_config(struct
> > drm_client_dev *client,
> > *
> > * This is crtc->mode and not crtc->state->mode for the
> > * fastboot check to work correctly.
> > +*
> > +* FIXME using legacy crtc->mode with atomic drivers
> > +* is dodgy. Switch to crtc->state->mode, after taking
> > +* care of the resulting locking/lifetime issues.
> > */
> > DRM_DEBUG_KMS("looking for current mode on connector
> > %s\n",
> > connector->name);
> > --
> > 2.43.2
> >
>
> --
> With best wishes
> Dmitry
--
Ville Syrjälä
Intel
[PATCH 6/6] drm/xe/display: clean up compat i915_vgpu.h
There's a bunch of unnecessary stuff not needed by display code. Remove.
Cc: Lucas De Marchi
Signed-off-by: Jani Nikula
---
.../drm/xe/compat-i915-headers/i915_vgpu.h| 26 ---
1 file changed, 26 deletions(-)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
b/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
index 80b024d435dc..4931c7198f13 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
@@ -9,36 +9,10 @@
#include
struct drm_i915_private;
-struct i915_ggtt;
-static inline void intel_vgpu_detect(struct drm_i915_private *i915)
-{
-}
static inline bool intel_vgpu_active(struct drm_i915_private *i915)
{
return false;
}
-static inline void intel_vgpu_register(struct drm_i915_private *i915)
-{
-}
-static inline bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *i915)
-{
- return false;
-}
-static inline bool intel_vgpu_has_hwsp_emulation(struct drm_i915_private *i915)
-{
- return false;
-}
-static inline bool intel_vgpu_has_huge_gtt(struct drm_i915_private *i915)
-{
- return false;
-}
-static inline int intel_vgt_balloon(struct i915_ggtt *ggtt)
-{
- return 0;
-}
-static inline void intel_vgt_deballoon(struct i915_ggtt *ggtt)
-{
-}
#endif /* _I915_VGPU_H_ */
--
2.39.2
[PATCH 5/6] drm/xe/display: remove compat i915_gem.h
It's only there for GEM_BUG_ON(), but the display code no longer uses it. Good riddance. Cc: Lucas De Marchi Signed-off-by: Jani Nikula --- drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 1 - drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h | 9 - 2 files changed, 10 deletions(-) delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h index a922aa7ad11e..2792a497257e 100644 --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h @@ -19,7 +19,6 @@ #include "xe_bo.h" #include "xe_pm.h" #include "xe_step.h" -#include "i915_gem.h" #include "i915_gem_stolen.h" #include "i915_gpu_error.h" #include "i915_reg_defs.h" diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h deleted file mode 100644 index 06b723a479c5.. --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Copyright © 2023 Intel Corporation - */ - -#ifndef __I915_GEM_H__ -#define __I915_GEM_H__ -#define GEM_BUG_ON -#endif -- 2.39.2
[PATCH 4/6] drm/xe/display: clean up a lot of cruft from compat i915_drv.h
There's a bunch of unused cruft. Just throw away.
Cc: Lucas De Marchi
Signed-off-by: Jani Nikula
---
.../gpu/drm/xe/compat-i915-headers/i915_drv.h | 32 ---
1 file changed, 32 deletions(-)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index 837e95e3604e..a922aa7ad11e 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -40,12 +40,8 @@ static inline struct drm_i915_private *kdev_to_i915(struct
device *kdev)
return dev_get_drvdata(kdev);
}
-
-#define INTEL_JASPERLAKE 0
-#define INTEL_ELKHARTLAKE 0
#define IS_PLATFORM(xe, x) ((xe)->info.platform == x)
#define INTEL_INFO(dev_priv) (&((dev_priv)->info))
-#define INTEL_DEVID(dev_priv) ((dev_priv)->info.devid)
#define IS_I830(dev_priv) (dev_priv && 0)
#define IS_I845G(dev_priv) (dev_priv && 0)
#define IS_I85X(dev_priv) (dev_priv && 0)
@@ -94,19 +90,12 @@ static inline struct drm_i915_private *kdev_to_i915(struct
device *kdev)
#define IP_VER(ver, rel)((ver) << 8 | (rel))
-#define INTEL_DISPLAY_ENABLED(xe) (HAS_DISPLAY((xe)) &&
!intel_opregion_headless_sku((xe)))
-
-#define IS_GRAPHICS_VER(xe, first, last) \
- ((xe)->info.graphics_verx100 >= first * 100 && \
-(xe)->info.graphics_verx100 <= (last*100 + 99))
#define IS_MOBILE(xe) (xe && 0)
-#define HAS_LLC(xe) (!IS_DGFX((xe)))
#define HAS_GMD_ID(xe) GRAPHICS_VERx100(xe) >= 1270
/* Workarounds not handled yet */
#define IS_DISPLAY_STEP(xe, first, last) ({u8 __step =
(xe)->info.step.display; first <= __step && __step <= last; })
-#define IS_GRAPHICS_STEP(xe, first, last) ({u8 __step =
(xe)->info.step.graphics; first <= __step && __step <= last; })
#define IS_LP(xe) (0)
#define IS_GEN9_LP(xe) (0)
@@ -123,23 +112,6 @@ static inline struct drm_i915_private *kdev_to_i915(struct
device *kdev)
#define IS_KABYLAKE_ULT(xe) (xe && 0)
#define IS_SKYLAKE_ULT(xe) (xe && 0)
-#define IS_DG1_GRAPHICS_STEP(xe, first, last) (IS_DG1(xe) &&
IS_GRAPHICS_STEP(xe, first, last))
-#define IS_DG2_GRAPHICS_STEP(xe, variant, first, last) \
- ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_ ## variant && \
-IS_GRAPHICS_STEP(xe, first, last))
-
-#define IS_TIGERLAKE_DISPLAY_STEP(xe, first, last) (IS_TIGERLAKE(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-#define IS_ROCKETLAKE_DISPLAY_STEP(xe, first, last) (IS_ROCKETLAKE(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-#define IS_DG1_DISPLAY_STEP(xe, first, last) (IS_DG1(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-#define IS_DG2_DISPLAY_STEP(xe, first, last) (IS_DG2(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-#define IS_ADLP_DISPLAY_STEP(xe, first, last) (IS_ALDERLAKE_P(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-#define IS_ADLS_DISPLAY_STEP(xe, first, last) (IS_ALDERLAKE_S(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-#define IS_JSL_EHL_DISPLAY_STEP(xe, first, last) (IS_JSL_EHL(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-#define IS_MTL_DISPLAY_STEP(xe, first, last) (IS_METEORLAKE(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-
-/* FIXME: Add subplatform here */
-#define IS_MTL_GRAPHICS_STEP(xe, sub, first, last) (IS_METEORLAKE(xe) &&
IS_DISPLAY_STEP(xe, first, last))
-
#define IS_DG2_G10(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G10)
#define IS_DG2_G11(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G11)
#define IS_DG2_G12(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G12)
@@ -147,12 +119,9 @@ static inline struct drm_i915_private *kdev_to_i915(struct
device *kdev)
#define IS_ICL_WITH_PORT_F(xe) (xe && 0)
#define HAS_FLAT_CCS(xe) (xe_device_has_flat_ccs(xe))
#define to_intel_bo(x) gem_to_xe_bo((x))
-#define mkwrite_device_info(xe) (INTEL_INFO(xe))
#define HAS_128_BYTE_Y_TILING(xe) (xe || 1)
-#define intel_has_gpu_reset(a) (a && 0)
-
#include "intel_wakeref.h"
static inline intel_wakeref_t intel_runtime_pm_get(struct xe_runtime_pm *pm)
@@ -206,7 +175,6 @@ struct i915_sched_attr {
#define RUNTIME_INFO(xe) (&(xe)->info.i915_runtime)
#define FORCEWAKE_ALL XE_FORCEWAKE_ALL
-#define HPD_STORM_DEFAULT_THRESHOLD 50
#ifdef CONFIG_ARM64
/*
--
2.39.2
[PATCH 3/6] drm/i915: move i915_fixed.h to display/intel_fixed.h
All the users are in display, move the fixed point header under
display. We could also consider making these more general purpose
things, but that takes a bunch more effort. This allows the immediate
cleanup of xe compat i915_fixed.h.
Cc: Lucas De Marchi
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/{i915_fixed.h => display/intel_fixed.h}| 0
drivers/gpu/drm/i915/display/skl_watermark.c| 2 +-
drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h | 6 --
3 files changed, 1 insertion(+), 7 deletions(-)
rename drivers/gpu/drm/i915/{i915_fixed.h => display/intel_fixed.h} (100%)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
diff --git a/drivers/gpu/drm/i915/i915_fixed.h
b/drivers/gpu/drm/i915/display/intel_fixed.h
similarity index 100%
rename from drivers/gpu/drm/i915/i915_fixed.h
rename to drivers/gpu/drm/i915/display/intel_fixed.h
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
b/drivers/gpu/drm/i915/display/skl_watermark.c
index 50ec51065118..8436af8525da 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -6,7 +6,6 @@
#include
#include "i915_drv.h"
-#include "i915_fixed.h"
#include "i915_reg.h"
#include "i9xx_wm.h"
#include "intel_atomic.h"
@@ -19,6 +18,7 @@
#include "intel_display_power.h"
#include "intel_display_types.h"
#include "intel_fb.h"
+#include "intel_fixed.h"
#include "intel_pcode.h"
#include "intel_wm.h"
#include "skl_watermark.h"
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
b/drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
deleted file mode 100644
index 12c671fd5235..
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../i915/i915_fixed.h"
--
2.39.2
[PATCH 2/6] drm/i915/dmc: define firmware URL locally
Avoid the dependency on intel_uc_fw.h, and allow removal of xe compat
intel_uc_fw.h. If there needs to be duplication of the URL, at least
have the duplication in a sensible way.
Cc: Lucas De Marchi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dmc.c | 4 +++-
drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h| 1 -
drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h | 11 ---
3 files changed, 3 insertions(+), 13 deletions(-)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display/intel_dmc.c
index 3fa851b5c7a6..e61e9c1b8947 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -38,6 +38,8 @@
* low-power state and comes back to normal.
*/
+#define INTEL_DMC_FIRMWARE_URL
"https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git";
+
enum intel_dmc_id {
DMC_FW_MAIN = 0,
DMC_FW_PIPEA,
@@ -953,7 +955,7 @@ static void dmc_load_work_fn(struct work_struct *work)
" Disabling runtime power management.\n",
dmc->fw_path);
drm_notice(&i915->drm, "DMC firmware homepage: %s",
- INTEL_UC_FIRMWARE_URL);
+ INTEL_DMC_FIRMWARE_URL);
}
release_firmware(fw);
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index a01d1b869c2d..837e95e3604e 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -26,7 +26,6 @@
#include "i915_utils.h"
#include "intel_gt_types.h"
#include "intel_step.h"
-#include "intel_uc_fw.h"
#include "intel_uncore.h"
#include "intel_runtime_pm.h"
#include
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
b/drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
deleted file mode 100644
index 009745328992..
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef _INTEL_UC_FW_H_
-#define _INTEL_UC_FW_H_
-
-#define INTEL_UC_FIRMWARE_URL
"https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git";
-
-#endif
--
2.39.2
[PATCH 1/6] drm/i915: use IS_JASPERLAKE()/IS_ELKHARTLAKE() instead of IS_PLATFORM()
Avoid direct IS_PLATFORM() usage when we have the platform helpers.
Cc: Lucas De Marchi
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 39e0ae6734ae..4d21ce734343 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1726,9 +1726,9 @@ void intel_ddi_buf_trans_init(struct intel_encoder
*encoder)
else
encoder->get_buf_trans = tgl_get_dkl_buf_trans;
} else if (DISPLAY_VER(i915) == 11) {
- if (IS_PLATFORM(i915, INTEL_JASPERLAKE))
+ if (IS_JASPERLAKE(i915))
encoder->get_buf_trans = jsl_get_combo_buf_trans;
- else if (IS_PLATFORM(i915, INTEL_ELKHARTLAKE))
+ else if (IS_ELKHARTLAKE(i915))
encoder->get_buf_trans = ehl_get_combo_buf_trans;
else if (intel_encoder_is_combo(encoder))
encoder->get_buf_trans = icl_get_combo_buf_trans;
--
2.39.2
[PATCH 0/6] drm/i915 and drm/xe display integration cleanups
Some cleanups on i915 side, and subsequent cleanups on xe side. I'd like
to merge all of these via drm-intel-next.
BR,
Jani.
Jani Nikula (6):
drm/i915: use IS_JASPERLAKE()/IS_ELKHARTLAKE() instead of
IS_PLATFORM()
drm/i915/dmc: define firmware URL locally
drm/i915: move i915_fixed.h to display/intel_fixed.h
drm/xe/display: clean up a lot of cruft from compat i915_drv.h
drm/xe/display: remove compat i915_gem.h
drm/xe/display: clean up compat i915_vgpu.h
.../drm/i915/display/intel_ddi_buf_trans.c| 4 +--
drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++-
.../{i915_fixed.h => display/intel_fixed.h} | 0
drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
.../gpu/drm/xe/compat-i915-headers/i915_drv.h | 34 ---
.../drm/xe/compat-i915-headers/i915_fixed.h | 6
.../gpu/drm/xe/compat-i915-headers/i915_gem.h | 9 -
.../drm/xe/compat-i915-headers/i915_vgpu.h| 26 --
.../drm/xe/compat-i915-headers/intel_uc_fw.h | 11 --
9 files changed, 6 insertions(+), 90 deletions(-)
rename drivers/gpu/drm/i915/{i915_fixed.h => display/intel_fixed.h} (100%)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
--
2.39.2
Re: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
On Fri, Apr 05, 2024 at 06:58:44AM +, Hogander, Jouni wrote:
> On Fri, 2024-04-05 at 00:34 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Bigjoiner seem to be causing all kinds of grief to the PSR
> > code currently. I don't believe there is any hardware issue
> > but the code simply not handling this correctly. For now
> > just disable PSR when bigjoiner is needed.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 11 +++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index eef62983e9db..a3ff916b53f9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1584,6 +1584,17 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> > return;
> > }
> >
> > + /*
> > + * FIXME figure out what is wrong with PSR+bigjoiner and
> > + * fix it. Presumably something related to the fact that
> > + * PSR is a transcoder level feature.
> > + */
> > + if (crtc_state->bigjoiner_pipes) {
> > + drm_dbg_kms(&dev_priv->drm,
> > + "PSR disabled due to bigjoiner\n");
> > + return;
> > + }
> > +
>
> Are these problems with both PSR1 and PSR2?
I didn't look at he logs in that much detail.
It's now happening in CI because the bigjoiner force knob is
getting leaked to all kinds of tests. Eg. this might be one:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14519/re-mtlp-1/igt@kms_b...@basic.html
--
Ville Syrjälä
Intel
Re: [PATCH 01/12] drm/client: Fully protect modes[] with dev->mode_config.mutex
On Fri, Apr 05, 2024 at 06:24:01AM +0300, Dmitry Baryshkov wrote:
> On Thu, Apr 04, 2024 at 11:33:25PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > The modes[] array contains pointers to modes on the connectors'
> > mode lists, which are protected by dev->mode_config.mutex.
> > Thus we need to extend modes[] the same protection or by the
> > time we use it the elements may already be pointing to
> > freed/reused memory.
> >
> > Cc: sta...@vger.kernel.org
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10583
> > Signed-off-by: Ville Syrjälä
>
> Reviewed-by: Dmitry Baryshkov
>
> I tried looking for the proper Fixes tag, but it looks like it might be
> something like 386516744ba4 ("drm/fb: fix fbdev object model + cleanup
> properly.")
The history is rather messy. I think it was originally completely
lockless and broken, and got fixed piecemeal later in these:
commit 7394371d8569 ("drm: Take lock around probes for
drm_fb_helper_hotplug_event")
commit 966a6a13c666 ("drm: Hold mode_config.lock to prevent hotplug whilst
setting up crtcs")
commit e13a05831050 ("drm/fb-helper: Stop using mode_config.mutex for
internals")
looks to me like where the race might have been re-introduced.
But didn't do a thorough analysis so not 100% sure. It's all
rather ancient history by now so a Fixes tag doesn't seem all
that useful anyway.
--
Ville Syrjälä
Intel
✓ Fi.CI.BAT: success for drm/dp: correct struct member name in documentation
== Series Details == Series: drm/dp: correct struct member name in documentation URL : https://patchwork.freedesktop.org/series/132062/ State : success == Summary == CI Bug Log - changes from CI_DRM_14531 -> Patchwork_132062v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/index.html Participating hosts (37 -> 36) -- Additional (2): fi-kbl-8809g bat-arls-3 Missing(3): bat-mtlp-8 bat-jsl-1 fi-snb-2520m Known issues Here are the changes found in Patchwork_132062v1 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-arls-3: NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-arls-3: NOTRUN -> [SKIP][2] ([i915#10213]) +3 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-arls-3: NOTRUN -> [SKIP][3] ([i915#4083]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@gem_m...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][4] ([i915#10197] / [i915#10211] / [i915#4079]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][5] ([i915#10196] / [i915#4077]) +2 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-arls-3: NOTRUN -> [SKIP][6] ([i915#10206] / [i915#4079]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@gem_tiled_pread_basic.html * igt@i915_module_load@reload: - bat-arls-2: [PASS][7] -> [ABORT][8] ([i915#10373]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14531/bat-arls-2/igt@i915_module_l...@reload.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-2/igt@i915_module_l...@reload.html * igt@i915_pm_rps@basic-api: - bat-arls-3: NOTRUN -> [SKIP][9] ([i915#10209]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@execlists: - bat-dg2-11: [PASS][10] -> [ABORT][11] ([i915#10366]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14531/bat-dg2-11/igt@i915_selftest@l...@execlists.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-dg2-11/igt@i915_selftest@l...@execlists.html * igt@kms_addfb_basic@addfb25-x-tiled-legacy: - bat-arls-3: NOTRUN -> [SKIP][12] ([i915#10200]) +9 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@kms_addfb_ba...@addfb25-x-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - bat-arls-3: NOTRUN -> [SKIP][13] ([i915#10202]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_dsc@dsc-basic: - bat-arls-3: NOTRUN -> [SKIP][14] ([i915#9886]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-edid: - bat-dg2-9: [PASS][15] -> [INCOMPLETE][16] ([i915#10583]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14531/bat-dg2-9/igt@kms_force_connector_ba...@force-edid.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-dg2-9/igt@kms_force_connector_ba...@force-edid.html * igt@kms_force_connector_basic@force-load-detect: - bat-arls-3: NOTRUN -> [SKIP][17] ([i915#10207]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_pm_backlight@basic-brightness: - bat-arls-3: NOTRUN -> [SKIP][18] ([i915#9812]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@kms_pm_backli...@basic-brightness.html * igt@kms_psr@psr-primary-mmap-gtt: - bat-arls-3: NOTRUN -> [SKIP][19] ([i915#9732]) +3 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-arls-3/igt@kms_...@psr-primary-mmap-gtt.html * igt@kms_setmode@basic-clone-single-crtc: - bat-arls-3: NOTRUN -> [SKIP][20] ([i915#10208] / [i915#8809]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132062v1/bat-a
Re: [PATCH 1/6] drm/modes: add drm_mode_print() to dump mode in drm_printer
On Fri, Apr 05, 2024 at 10:45:42AM +0200, Thomas Zimmermann wrote: > Hi > > Am 07.03.24 um 21:39 schrieb Jani Nikula: > > Add a printer based function for dumping the modeline, so it's not > > limited to KMS debug. > > > > Note: The printed output intentionally does not have the "Modeline" > > prefix. Prefix, if any, is for the caller to decide when initializing > > drm_printer. > > > > Signed-off-by: Jani Nikula > > --- > > drivers/gpu/drm/drm_modes.c | 13 + > > include/drm/drm_modes.h | 2 ++ > > 2 files changed, 15 insertions(+) > > > > diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c > > index c4f88c3a93b7..711750ab57c7 100644 > > --- a/drivers/gpu/drm/drm_modes.c > > +++ b/drivers/gpu/drm/drm_modes.c > > @@ -49,6 +49,19 @@ > > > > #include "drm_crtc_internal.h" > > > > +/** > > + * drm_mode_print - print a mode to drm printer > > + * @p: drm printer > > + * @mode: mode to print > > + * > > + * Write @mode description to struct drm_printer @p. > > + */ > > +void drm_mode_print(struct drm_printer *p, const struct drm_display_mode > > *mode) > > Could this be a printf function with a trailing format string as final > argument? The printed mode could then be part of another string instead > of just at the end of it. All this seems pretty much redundant. We already have DRM_MODE_FMT/ARGS so people can include the mode in any kind of format string they want. I would just nuke drm_mode_print() and all its ilk and let people format things themselves. -- Ville Syrjälä Intel
Re: [PATCH v0 13/14] drm/nouveau: Make I2C terminology more inclusive
On Fri, 2024-04-05 at 09:30 -0700, Easwar Hariharan wrote: > > Thanks for the review, and for the appetite to go further! So we are > on the same page, you would prefer > renaming to controller/target like the feedback on other drm drivers > (i915, gma500, radeon)? FWIW I'm in support of this as well! As long as we make sure it gets renamed everywhere :) > > Thanks, > Easwar > -- Cheers, Lyude Paul (she/her) Software Engineer at Red Hat
Re: [5/7] drm/i915/dp: Enable AUX based backlight for HDR
On Thu, Apr 04, 2024 at 08:59:29AM +0530, Suraj Kandpal wrote:
> As of now whenerver HDR is switched on we use the PWM to change the
> backlight as opposed to AUX based backlight changes in terms of nits.
> This patch writes to the appropriate DPCD registers to enable aux
> based backlight using values in nits.
>
> --v2
> -Fix max_cll and max_fall assignment [Jani]
> -Fix the size sent in drm_dpcd_write [Jani]
>
> --v3
> -Content Luminance needs to be sent only for pre-ICL after that
> it is directly picked up from hdr metadata [Ville]
>
> --v4
> -Add checks for HDR TCON cap bits [Ville]
> -Check eotf of hdr_output_data and sets bits base of that value.
>
> --v5
> -Fix capability check bits.
> -Check colorspace before setting BT2020
>
> --v6
> -Use intel_dp_has_gamut_dip to check if we have capability
> to send sdp [Ville]
> -Seprate filling of all hdr tcon related bits into it's
> own function.
> -Check eotf data to make sure we are in HDR mode [Sebastian]
>
> Signed-off-by: Suraj Kandpal
> ---
> .../drm/i915/display/intel_dp_aux_backlight.c | 105 --
> 1 file changed, 94 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 2d50a4734823..7af876e2d210 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -40,11 +40,6 @@
> #include "intel_dp.h"
> #include "intel_dp_aux_backlight.h"
>
> -/* TODO:
> - * Implement HDR, right now we just implement the bare minimum to bring us
> back into SDR mode so we
> - * can make people's backlights work in the mean time
> - */
> -
> /*
> * DP AUX registers for Intel's proprietary HDR backlight interface. We
> define
> * them here since we'll likely be the only driver to ever use these.
> @@ -127,9 +122,6 @@ intel_dp_aux_supports_hdr_backlight(struct
> intel_connector *connector)
> if (ret != sizeof(tcon_cap))
> return false;
>
> - if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP))
> - return false;
> -
> drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Detected %s HDR backlight
> interface version %d\n",
> connector->base.base.id, connector->base.name,
> is_intel_tcon_cap(tcon_cap) ? "Intel" : "unsupported",
> tcon_cap[0]);
> @@ -137,6 +129,9 @@ intel_dp_aux_supports_hdr_backlight(struct
> intel_connector *connector)
> if (!is_intel_tcon_cap(tcon_cap))
> return false;
>
> + if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP))
> + return false;
> +
> /*
>* If we don't have HDR static metadata there is no way to
>* runtime detect used range for nits based control. For now
> @@ -225,13 +220,27 @@ intel_dp_aux_hdr_set_aux_backlight(const struct
> drm_connector_state *conn_state,
> connector->base.base.id, connector->base.name);
> }
>
> +static bool
> +intel_dp_aux_in_hdr_mode(const struct drm_connector_state *conn_state)
> +{
> + struct hdr_output_metadata *hdr_metadata;
> +
> + if (!conn_state->hdr_output_metadata)
> + return false;
> +
> + hdr_metadata = conn_state->hdr_output_metadata->data;
> +
> + return hdr_metadata->hdmi_metadata_type1.eotf !=
> HDMI_EOTF_TRADITIONAL_GAMMA_SDR;
This line worries me a bit. The TCON only supports PQ HDR mode so when
the metadata request HLG or traditional gamma HDR then only the
segmented backlight is enable in intel_dp_aux_fill_hdr_tcon_params but
it uses HDR backlight.
Did you test that this doesn't result in a black screen? Maybe change
this to `eotf == HDMI_EOTF_SMPTE_ST2084` instead?
> +}
> +
> static void
> intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state,
> u32 level)
> {
> struct intel_connector *connector =
> to_intel_connector(conn_state->connector);
> struct intel_panel *panel = &connector->panel;
>
> - if (panel->backlight.edp.intel.sdr_uses_aux) {
> + if (intel_dp_aux_in_hdr_mode(conn_state) ||
> + panel->backlight.edp.intel.sdr_uses_aux) {
> intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> } else {
> const u32 pwm_level = intel_backlight_level_to_pwm(connector,
> level);
> @@ -240,6 +249,70 @@ intel_dp_aux_hdr_set_backlight(const struct
> drm_connector_state *conn_state, u32
> }
> }
>
> +static void
> +intel_dp_aux_write_content_luminance(struct intel_connector *connector,
> + struct hdr_output_metadata *hdr_metadata)
> +{
> + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
> + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + int ret;
> + u8 buf[4];
> +
> + if (!intel_dp_has_gamut_metadata_dip(connector->encoder))
> + return;
I don't entirely understand intel_dp_has_gamut_me
[PATCH i-g-t v2] lib/kunit: Read results from debugfs
KUnit can provide KTAP reports from test modules via debugfs files, one
per test suite. Using that source of test results instead of extracting
them from dmesg, where they may be interleaved with other kernel messages,
seems more easy to handle and less error prone. Switch to it.
If KUnit debugfs support is found not configured then fall back to legacy
processing path.
v2: Check validity of debugfs argument before calling kunit_get_tests()
(Kamil),
- replace multiple openat() + fdopen/fdopendir(), each followed by an
error check, with less expensive fopen/opendir() of file/dir pathname
components concatentated to a local buffer, protected from buffer
overflow or truncation with a single check for enough buffer space
(Lucas),
- avoid confusing 'if' statement condition (Lucas).
Signed-off-by: Janusz Krzysztofik
Cc: Kamil Konieczny
Cc: Lucas De Marchi
---
lib/igt_kmod.c | 131 +++--
1 file changed, 94 insertions(+), 37 deletions(-)
diff --git a/lib/igt_kmod.c b/lib/igt_kmod.c
index 1ec9c8a602..243785873d 100644
--- a/lib/igt_kmod.c
+++ b/lib/igt_kmod.c
@@ -28,6 +28,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -39,6 +40,7 @@
#include "igt_aux.h"
#include "igt_core.h"
+#include "igt_debugfs.h"
#include "igt_kmod.h"
#include "igt_ktap.h"
#include "igt_sysfs.h"
@@ -864,6 +866,19 @@ static int open_parameters(const char *module_name)
return open(path, O_RDONLY);
}
+static void kunit_debugfs_path(char *kunit_path)
+{
+ const char *debugfs_path = igt_debugfs_mount();
+
+ if (igt_debug_on(!debugfs_path))
+ return;
+
+ if (igt_debug_on(strlen(debugfs_path) + strlen("/kunit/") >= PATH_MAX))
+ return;
+
+ strcpy(stpcpy(kunit_path, debugfs_path), "/kunit/");
+}
+
static bool kunit_set_filtering(const char *filter_glob, const char *filter,
const char *filter_action)
{
@@ -1071,21 +1086,41 @@ static void kunit_results_free(struct igt_list_head
*results,
free(*suite_name);
}
-static int kunit_get_results(struct igt_list_head *results, int kmsg_fd,
-struct igt_ktap_results **ktap)
+static int kunit_get_results(struct igt_list_head *results, const char
*debugfs_path,
+const char *suite, struct igt_ktap_results **ktap)
{
+ char results_path[PATH_MAX];
+ FILE *results_stream;
+ char *buf = NULL;
+ size_t size = 0;
+ ssize_t len;
int err;
+ if (igt_debug_on(strlen(debugfs_path) + strlen(suite) +
strlen("/results") >= PATH_MAX))
+ return -ENOSPC;
+
+ strcpy(stpcpy(stpcpy(results_path, debugfs_path), suite), "/results");
+ results_stream = fopen(results_path, "r");
+ if (igt_debug_on(!results_stream))
+ return -errno;
+
*ktap = igt_ktap_alloc(results);
- if (igt_debug_on(!*ktap))
- return -ENOMEM;
+ if (igt_debug_on(!*ktap)) {
+ err = -ENOMEM;
+ goto out_fclose;
+ }
- do
- igt_debug_on((err = kunit_kmsg_result_get(results, NULL,
kmsg_fd, *ktap),
- err && err != -EINPROGRESS));
- while (err == -EINPROGRESS);
+ while (len = getline(&buf, &size, results_stream), len > 0) {
+ err = igt_ktap_parse(buf, *ktap);
+ if (err != -EINPROGRESS)
+ break;
+ }
+
+ free(buf);
igt_ktap_free(ktap);
+out_fclose:
+ fclose(results_stream);
return err;
}
@@ -1101,7 +1136,13 @@ static void __igt_kunit_legacy(struct igt_ktest *tst,
pthread_mutexattr_t attr;
IGT_LIST_HEAD(results);
unsigned long taints;
- int ret;
+ int flags, ret;
+
+ igt_skip_on_f(tst->kmsg < 0, "Could not open /dev/kmsg\n");
+
+ igt_skip_on((flags = fcntl(tst->kmsg, F_GETFL, 0), flags < 0));
+ igt_skip_on_f(fcntl(tst->kmsg, F_SETFL, flags & ~O_NONBLOCK) == -1,
+ "Could not set /dev/kmsg to blocking mode\n");
igt_skip_on(lseek(tst->kmsg, 0, SEEK_END) < 0);
@@ -1224,30 +1265,17 @@ static void __igt_kunit_legacy(struct igt_ktest *tst,
igt_skip_on_f(ret, "KTAP parser failed\n");
}
-static void kunit_get_tests_timeout(int signal)
-{
- igt_skip("Timed out while trying to extract a list of KUnit test cases
from /dev/kmsg\n");
-}
-
static bool kunit_get_tests(struct igt_list_head *tests,
struct igt_ktest *tst,
const char *suite,
const char *opts,
+ const char *debugfs_path,
+ DIR **debugfs_dir,
struct igt_ktap_results **ktap)
{
- struct sigaction sigalrm = { .sa_handler = kunit_get_tests_timeout, },
-*saved
Re: [7/7] drm/i915/dp: Limit brightness level to vbt min brightness
On Fri, Apr 05, 2024 at 02:07:05PM +0530, Suraj Kandpal wrote:
> Limit minimum brightness to vbt min brightness when using aux
> based brightness control to avoid letting the screen
> from going completely blank.
> Sometimes vbt can have some bogus values hence clamping the value
> for sanity in case of corner case.
So, you're completely ignoring the value from the EDID now instead?
>
> --v2
> -Use something same mechanism to limit minimum brightness
> that PWM method uses [Jani]
>
> Signed-off-by: Suraj Kandpal
> ---
> drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 20dd5a6a0f3f..eb2a7225dfaa 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -411,6 +411,8 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector
> *connector, enum pipe pi
> struct intel_panel *panel = &connector->panel;
> struct drm_luminance_range_info *luminance_range =
> &connector->base.display_info.luminance_range;
> + u32 min_level = clamp_t(u32,
> + connector->panel.vbt.backlight.min_brightness,
> 0, 64);
> int ret;
>
> drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] SDR backlight is controlled
> through %s\n",
> @@ -427,14 +429,12 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector
> *connector, enum pipe pi
> }
> }
>
> - if (luminance_range->max_luminance) {
> + if (luminance_range->max_luminance)
> panel->backlight.max = luminance_range->max_luminance;
> - panel->backlight.min = luminance_range->min_luminance;
> - } else {
> + else
> panel->backlight.max = 512;
> - panel->backlight.min = 0;
> - }
>
> + panel->backlight.min = min_level;
> intel_dp_aux_write_panel_luminance_override(connector);
>
> drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Using AUX HDR interface for
> backlight control (range %d..%d)\n",
RE: [4/7] drm/i915/dp: Fix comments on EDP HDR DPCD registers
> -Original Message- > From: Sebastian Wick > Sent: Friday, April 5, 2024 10:55 PM > To: Kandpal, Suraj > Cc: intel-gfx@lists.freedesktop.org; Borah, Chaitanya Kumar > ; Shankar, Uma > ; Nautiyal, Ankit K ; > Murthy, Arun R ; Syrjala, Ville > ; Kumar, Naveen1 > Subject: Re: [4/7] drm/i915/dp: Fix comments on EDP HDR DPCD registers > > On Thu, Apr 04, 2024 at 08:59:28AM +0530, Suraj Kandpal wrote: > > Change comments from Pre-TGL+ to Pre-ICL as mentioned in specs > > > > Signed-off-by: Suraj Kandpal > > --- > > drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > index 3d9723714c96..2d50a4734823 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > @@ -69,14 +69,14 @@ > > #define INTEL_EDP_HDR_GETSET_CTRL_PARAMS > > 0x344 > > # define INTEL_EDP_HDR_TCON_2084_DECODE_ENABLE > BIT(0) > > # define INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE > BIT(1) > > -# define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE > BIT(2) /* Pre-TGL+ */ > > +# define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE > BIT(2) /* Pre-ICL */ > > Technically that's also true for 2084_DECODE_ENABLE and > 2020_GAMUT_ENABLE. Maybe just drop the comment? What is enabled > when should become clear from the code. Sure will drop the comments altogether. Regards, Suraj Kandpal > > > # define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLE > BIT(3) > > # define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE > BIT(4) > > # define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLE > BIT(5) > > /* Bit 6 is reserved */ > > # define INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX > BIT(7) > > > > -#define INTEL_EDP_HDR_CONTENT_LUMINANCE > > 0x346 > /* Pre-TGL+ */ > > +#define INTEL_EDP_HDR_CONTENT_LUMINANCE > > 0x346 > /* Pre-ICL */ > > #define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE > 0x34A > > #define INTEL_EDP_SDR_LUMINANCE_LEVEL > > 0x352 > > #define INTEL_EDP_BRIGHTNESS_NITS_LSB > > 0x354
RE: [6/7] drm/i915/dp: Write panel override luminance values
> -Original Message-
> From: Sebastian Wick
> Sent: Friday, April 5, 2024 11:02 PM
> To: Kandpal, Suraj
> Cc: intel-gfx@lists.freedesktop.org; Borah, Chaitanya Kumar
> ; Shankar, Uma
> ; Nautiyal, Ankit K ;
> Murthy, Arun R ; Syrjala, Ville
> ; Kumar, Naveen1
> Subject: Re: [6/7] drm/i915/dp: Write panel override luminance values
>
> On Thu, Apr 04, 2024 at 08:59:30AM +0530, Suraj Kandpal wrote:
> > Write panel override luminance values which helps the TCON decide if
> > tone mapping needs to be enabled or not.
> >
> > Signed-off-by: Suraj Kandpal
> > ---
> > .../drm/i915/display/intel_dp_aux_backlight.c | 25
> > +++
> > 1 file changed, 25 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > index 7af876e2d210..20dd5a6a0f3f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > @@ -381,6 +381,29 @@ static const char *dpcd_vs_pwm_str(bool aux)
> > return aux ? "DPCD" : "PWM";
> > }
> >
> > +static void
> > +intel_dp_aux_write_panel_luminance_override(struct intel_connector
> > +*connector) {
> > + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> > + struct intel_panel *panel = &connector->panel;
> > + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
> > + int ret;
> > + u8 buf[4] = {};
> > +
> > + buf[0] = panel->backlight.min & 0xFF;
> > + buf[1] = (panel->backlight.min & 0xFF00) >> 8;
> > + buf[2] = panel->backlight.max & 0xFF;
> > + buf[3] = (panel->backlight.max & 0xFF00) >> 8;
> > +
> > + ret = drm_dp_dpcd_write(&intel_dp->aux,
> > +
> INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE,
> > + buf, sizeof(buf));
> > + if (ret < 0)
> > + drm_dbg_kms(&i915->drm,
> > + "Panel Luminance DPCD reg write failed, err:-
> %d\n",
> > + ret);
> > +}
> > +
> > static int
> > intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector,
> > enum pipe pipe) { @@ -412,6 +435,8 @@
> > intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum
> pipe pi
> > panel->backlight.min = 0;
> > }
> >
> > + intel_dp_aux_write_panel_luminance_override(connector);
> > +
>
> Should this really always be set? It says override. Doesn't the TCON have
> some values already that we're overriding?
Yes we calculate our own min and max panel luminance these values always need
to be sent to the TCON as it takes these values into account before it takes
the decision to enable or disable tone mapping.
Note: TM is enablement is a TCON decision ICL onwards and before that its
always disable (According to internal specs)
Regards,
Suraj Kandpal
>
> > drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Using AUX HDR
> interface for backlight control (range %d..%d)\n",
> > connector->base.base.id, connector->base.name,
> > panel->backlight.min, panel->backlight.max);
RE: [3/7] drm/i915/dp: Fix Register bit naming
> -Original Message- > From: Sebastian Wick > Sent: Friday, April 5, 2024 10:46 PM > To: Kandpal, Suraj > Cc: intel-gfx@lists.freedesktop.org; Borah, Chaitanya Kumar > ; Shankar, Uma > ; Nautiyal, Ankit K ; > Murthy, Arun R ; Syrjala, Ville > ; Kumar, Naveen1 > Subject: Re: [3/7] drm/i915/dp: Fix Register bit naming > > On Thu, Apr 04, 2024 at 08:59:27AM +0530, Suraj Kandpal wrote: > > Change INTEL_EDP_HDR_TCON_SDP_COLORIMETRY enable to > > INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX as this bit is tells TCON to > > ignore DPCD colorimetry values and take the one's sent through SDP. > > I actually like the original name because it tells the TCON to enable > processing > of SDP Colorimetry. The new name is okay as well. But what this bit actually tells the TCON is to ignore the values in set content_luminance, edp_hdr_getset_params dpcd register which were set through aux. Hence to keep in line what this bit actually tell us renamed it Regards, Suraj Kandpal > > > > > Signed-off-by: Suraj Kandpal > > --- > > drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > index 94edf982eff8..3d9723714c96 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > @@ -74,7 +74,7 @@ > > # define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE > BIT(4) > > # define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLE > BIT(5) > > /* Bit 6 is reserved */ > > -# define INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_ENABLE > BIT(7) > > +# define INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX > BIT(7) > > > > #define INTEL_EDP_HDR_CONTENT_LUMINANCE > > 0x346 /* > Pre-TGL+ */ > > #define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE > 0x34A
Re: [6/7] drm/i915/dp: Write panel override luminance values
On Thu, Apr 04, 2024 at 08:59:30AM +0530, Suraj Kandpal wrote:
> Write panel override luminance values which helps the TCON decide
> if tone mapping needs to be enabled or not.
>
> Signed-off-by: Suraj Kandpal
> ---
> .../drm/i915/display/intel_dp_aux_backlight.c | 25 +++
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 7af876e2d210..20dd5a6a0f3f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -381,6 +381,29 @@ static const char *dpcd_vs_pwm_str(bool aux)
> return aux ? "DPCD" : "PWM";
> }
>
> +static void
> +intel_dp_aux_write_panel_luminance_override(struct intel_connector
> *connector)
> +{
> + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + struct intel_panel *panel = &connector->panel;
> + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
> + int ret;
> + u8 buf[4] = {};
> +
> + buf[0] = panel->backlight.min & 0xFF;
> + buf[1] = (panel->backlight.min & 0xFF00) >> 8;
> + buf[2] = panel->backlight.max & 0xFF;
> + buf[3] = (panel->backlight.max & 0xFF00) >> 8;
> +
> + ret = drm_dp_dpcd_write(&intel_dp->aux,
> + INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE,
> + buf, sizeof(buf));
> + if (ret < 0)
> + drm_dbg_kms(&i915->drm,
> + "Panel Luminance DPCD reg write failed, err:-%d\n",
> + ret);
> +}
> +
> static int
> intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum
> pipe pipe)
> {
> @@ -412,6 +435,8 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector
> *connector, enum pipe pi
> panel->backlight.min = 0;
> }
>
> + intel_dp_aux_write_panel_luminance_override(connector);
> +
Should this really always be set? It says override. Doesn't the TCON
have some values already that we're overriding?
> drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Using AUX HDR interface for
> backlight control (range %d..%d)\n",
> connector->base.base.id, connector->base.name,
> panel->backlight.min, panel->backlight.max);
Re: [4/7] drm/i915/dp: Fix comments on EDP HDR DPCD registers
On Thu, Apr 04, 2024 at 08:59:28AM +0530, Suraj Kandpal wrote: > Change comments from Pre-TGL+ to Pre-ICL as mentioned in specs > > Signed-off-by: Suraj Kandpal > --- > drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > index 3d9723714c96..2d50a4734823 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > @@ -69,14 +69,14 @@ > #define INTEL_EDP_HDR_GETSET_CTRL_PARAMS 0x344 > # define INTEL_EDP_HDR_TCON_2084_DECODE_ENABLEBIT(0) > # define INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE BIT(1) > -# define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE BIT(2) > /* Pre-TGL+ */ > +# define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE BIT(2) > /* Pre-ICL */ Technically that's also true for 2084_DECODE_ENABLE and 2020_GAMUT_ENABLE. Maybe just drop the comment? What is enabled when should become clear from the code. > # define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLEBIT(3) > # define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE BIT(4) > # define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLEBIT(5) > /* Bit 6 is reserved */ > # define INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX BIT(7) > > -#define INTEL_EDP_HDR_CONTENT_LUMINANCE0x346 > /* Pre-TGL+ */ > +#define INTEL_EDP_HDR_CONTENT_LUMINANCE0x346 > /* Pre-ICL */ > #define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE 0x34A > #define INTEL_EDP_SDR_LUMINANCE_LEVEL 0x352 > #define INTEL_EDP_BRIGHTNESS_NITS_LSB 0x354
Re: [3/7] drm/i915/dp: Fix Register bit naming
On Thu, Apr 04, 2024 at 08:59:27AM +0530, Suraj Kandpal wrote: > Change INTEL_EDP_HDR_TCON_SDP_COLORIMETRY enable to > INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX as this bit is tells TCON to > ignore DPCD colorimetry values and take the one's sent through > SDP. I actually like the original name because it tells the TCON to enable processing of SDP Colorimetry. The new name is okay as well. > > Signed-off-by: Suraj Kandpal > --- > drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > index 94edf982eff8..3d9723714c96 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > @@ -74,7 +74,7 @@ > # define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE BIT(4) > # define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLEBIT(5) > /* Bit 6 is reserved */ > -# define INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_ENABLEBIT(7) > +# define INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX BIT(7) > > #define INTEL_EDP_HDR_CONTENT_LUMINANCE0x346 > /* Pre-TGL+ */ > #define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE 0x34A
Re: [Intel-gfx] [PATCH v5 0/7] Introduce __xchg, non-atomic xchg
On 05.04.2024 16:47, Jani Nikula wrote: On Mon, 27 Feb 2023, Peter Zijlstra wrote: On Thu, Feb 23, 2023 at 10:24:19PM +0100, Andrzej Hajda wrote: On 22.02.2023 18:04, Peter Zijlstra wrote: On Wed, Jan 18, 2023 at 04:35:22PM +0100, Andrzej Hajda wrote: Andrzej Hajda (7): arch: rename all internal names __xchg to __arch_xchg linux/include: add non-atomic version of xchg arch/*/uprobes: simplify arch_uretprobe_hijack_return_addr llist: simplify __llist_del_all io_uring: use __xchg if possible qed: use __xchg if possible drm/i915/gt: use __xchg instead of internal helper Nothing crazy in here I suppose, I somewhat wonder why you went through the trouble, but meh. If you are asking why I have proposed this patchset, then the answer is simple, 1st I've tried to find a way to move internal i915 helper to core (see patch 7). Then I was looking for possible other users of this helper. And apparently there are many of them, patches 3-7 shows some. You want me to take this through te locking tree (for the next cycle, not this one) where I normally take atomic things or does someone else want this? If you could take it I will be happy. OK, I'll go queue it in tip/locking/core after -rc1. Thanks! Is this where the series fell between the cracks, or was there some follow-up that I missed? I think this would still be useful. Andrzej, would you mind rebasing and resending if there are no objections? The patchset was rejected/dropped by Linus at the pull-request stage. He didn't like many things, but the most __xchg name. However he was quite positive about i915 name fetch_and_zero. I can try to revive patchset with fetch_and_zero, and maybe fetch_and_set, instead of __xchg. Regards Andrzej BR, Jani.
Re: [PR] i915: Add DG2 HuC to 7.10.15
On Mon, Apr 1, 2024 at 2:50 PM Daniele Ceraolo Spurio wrote: > > The following changes since commit 93f329774542b9b7d57abb18ea8b6542f2d8feac: > > Merge branch 'robot/pr-0-1709214990' into 'main' (2024-02-29 14:10:53 +) > > are available in the Git repository at: > > g...@gitlab.freedesktop.org:drm/firmware.git tags/intel-2024-04-01 Merged and pushed out. https://gitlab.com/kernel-firmware/linux-firmware/-/merge_requests/188 josh > > for you to fetch changes up to ab144168469a77f54ad539ac98dede7ce4c6a75d: > > i915: Add DG2 HuC 7.10.15 (2024-03-28 13:45:41 -0700) > > > Daniele Ceraolo Spurio (1): > i915: Add DG2 HuC 7.10.15 > > WHENCE | 2 +- > i915/dg2_huc_gsc.bin | Bin 622592 -> 630784 bytes > 2 files changed, 1 insertion(+), 1 deletion(-) > mode change 100755 => 100644 i915/dg2_huc_gsc.bin
Re: [PATCH v0 13/14] drm/nouveau: Make I2C terminology more inclusive
Hi Easwar,
On 3/29/24 18:00, Easwar Hariharan wrote:
I2C v7, SMBus 3.2, and I3C specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/gpu/drm/nouveau/dispnv04/dfp.c | 14 +++---
.../gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h | 2 +-
drivers/gpu/drm/nouveau/nouveau_bios.c | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dfp.c
b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
index d5b129dc623b..65b791006b19 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
@@ -149,7 +149,7 @@ void nv04_dfp_update_fp_control(struct drm_encoder
*encoder, int mode)
}
}
-static struct drm_encoder *get_tmds_slave(struct drm_encoder *encoder)
+static struct drm_encoder *get_tmds_client(struct drm_encoder *encoder)
{
struct drm_device *dev = encoder->dev;
struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
@@ -172,7 +172,7 @@ static struct drm_encoder *get_tmds_slave(struct
drm_encoder *encoder)
struct dcb_output *slave_dcb = nouveau_encoder(slave)->dcb;
if (slave_dcb->type == DCB_OUTPUT_TMDS && get_slave_funcs(slave) &&
- slave_dcb->tmdsconf.slave_addr == dcb->tmdsconf.slave_addr)
+ slave_dcb->tmdsconf.client_addr ==
dcb->tmdsconf.client_addr)
return slave;
While, personally, I think master/slave was well suiting for the device
relationship
on those busses, I think that if we change it up to conform with the change in
specification, we should make sure to update drivers consistently.
We should make sure to also change the names of the sourrounding structures and
variable
names, otherwise we just make this code harder to read.
- Danilo
}
@@ -471,7 +471,7 @@ static void nv04_dfp_commit(struct drm_encoder *encoder)
NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL +
nv04_dac_output_offset(encoder), 0x0010);
/* Init external transmitters */
- slave_encoder = get_tmds_slave(encoder);
+ slave_encoder = get_tmds_client(encoder);
if (slave_encoder)
get_slave_funcs(slave_encoder)->mode_set(
slave_encoder, &nv_encoder->mode, &nv_encoder->mode);
@@ -621,7 +621,7 @@ static void nv04_dfp_destroy(struct drm_encoder *encoder)
kfree(nv_encoder);
}
-static void nv04_tmds_slave_init(struct drm_encoder *encoder)
+static void nv04_tmds_client_init(struct drm_encoder *encoder)
{
struct drm_device *dev = encoder->dev;
struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
@@ -632,7 +632,7 @@ static void nv04_tmds_slave_init(struct drm_encoder
*encoder)
{
{
.type = "sil164",
- .addr = (dcb->tmdsconf.slave_addr == 0x7 ? 0x3a : 0x38),
+ .addr = (dcb->tmdsconf.client_addr == 0x7 ? 0x3a :
0x38),
.platform_data = &(struct sil164_encoder_params) {
SIL164_INPUT_EDGE_RISING
}
@@ -642,7 +642,7 @@ static void nv04_tmds_slave_init(struct drm_encoder
*encoder)
};
int type;
- if (!nv_gf4_disp_arch(dev) || !bus || get_tmds_slave(encoder))
+ if (!nv_gf4_disp_arch(dev) || !bus || get_tmds_client(encoder))
return;
type = nvkm_i2c_bus_probe(bus, "TMDS transmitter", info, NULL, NULL);
@@ -716,7 +716,7 @@ nv04_dfp_create(struct drm_connector *connector, struct
dcb_output *entry)
if (entry->type == DCB_OUTPUT_TMDS &&
entry->location != DCB_LOC_ON_CHIP)
- nv04_tmds_slave_init(encoder);
+ nv04_tmds_client_init(encoder);
drm_connector_attach_encoder(connector, encoder);
return 0;
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h
b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h
index 73f9d9947e7e..5da40cf74b1a 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h
@@ -50,7 +50,7 @@ struct dcb_output {
} dpconf;
struct {
struct sor_conf sor;
- int slave_addr;
+ int client_addr;
} tmdsconf;
};
bool i2c_upper_default;
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c
b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 479effcf607e..a91a5d3df3ca 100644
--- a/drivers/gp
RE: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
Forgot to add my Rb
Reviewed-by: Arun R Murthy
Thanks and Regards,
Arun R Murthy
> -Original Message-
> From: Murthy, Arun R
> Sent: Friday, April 5, 2024 6:30 PM
> To: Hogander, Jouni ; ville.syrj...@linux.intel.com;
> intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
>
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of
> > Hogander, Jouni
> > Sent: Friday, April 5, 2024 12:29 PM
> > To: ville.syrj...@linux.intel.com; intel-gfx@lists.freedesktop.org
> > Subject: Re: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner
> > is used
> >
> > On Fri, 2024-04-05 at 00:34 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Bigjoiner seem to be causing all kinds of grief to the PSR code
> > > currently. I don't believe there is any hardware issue but the code
> > > simply not handling this correctly. For now just disable PSR when
> > > bigjoiner is needed.
> > >
> > > Signed-off-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/i915/display/intel_psr.c | 11 +++
> > > 1 file changed, 11 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index eef62983e9db..a3ff916b53f9 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1584,6 +1584,17 @@ void intel_psr_compute_config(struct intel_dp
> > > *intel_dp,
> > > return;
> > > }
> > >
> > > + /*
> > > + * FIXME figure out what is wrong with PSR+bigjoiner and
> > > + * fix it. Presumably something related to the fact that
> > > + * PSR is a transcoder level feature.
> > > + */
> > > + if (crtc_state->bigjoiner_pipes) {
> > > + drm_dbg_kms(&dev_priv->drm,
> > > + "PSR disabled due to bigjoiner\n");
> > > + return;
> > > + }
> > > +
> >
> > Are these problems with both PSR1 and PSR2?
>
> Yes, as per the code this would have impact on both PSR1 and PSR2. So better
> to disable.
> Looks good to me.
>
> Thanks and Regards,
> Arun R Murthy
>
> >
> > BR,
> >
> > Jouni Högander
> >
> > > if (CAN_PANEL_REPLAY(intel_dp))
> > > crtc_state->has_panel_replay = true;
> > > else
Re: [linux-next:master] BUILD REGRESSION 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
On Fri, Apr 5, 2024 at 8:37 AM kernel test robot wrote: > > tree/branch: > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master > branch HEAD: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc Add linux-next > specific files for 20240405 > > Error/Warning reports: > > https://lore.kernel.org/oe-kbuild-all/202404051333.7und7ppw-...@intel.com > https://lore.kernel.org/oe-kbuild-all/202404051423.eiaxlwhx-...@intel.com > https://lore.kernel.org/oe-kbuild-all/202404051659.aawukguq-...@intel.com > https://lore.kernel.org/oe-kbuild-all/202404052022.cwf2ilbp-...@intel.com > > Error/Warning: (recently discovered and may have been fixed) > > aarch64-linux-ld: kernel/bpf/verifier.c:20223:(.text+0xdbb4): undefined > reference to `__SCK__perf_snapshot_branch_stack' > aarch64-linux-ld: verifier.c:(.text+0x17c3c): undefined reference to > `__SCK__perf_snapshot_branch_stack' > drivers/i2c/busses/i2c-i801.c:1407:(.text+0x1d2ef4a): undefined reference to > `i2c_root_adapter' > kernel/bpf/verifier.c:20223:(.text+0xdba4): dangerous relocation: unsupported > relocation > loongarch64-linux-ld: kernel/bpf/verifier.c:20223:(.text+0xa818): undefined > reference to `__SCK__perf_snapshot_branch_stack' > loongarch64-linux-ld: verifier.c:(.text+0xa964): undefined reference to > `__SCK__perf_snapshot_branch_stack' > mips64el-linux-ld: verifier.c:(.text.do_misc_fixups+0xd9c): undefined > reference to `__SCK__perf_snapshot_branch_stack' > riscv32-linux-ld: section .data LMA [00369000,00907967] overlaps section > .text LMA [0007899c,01a6a6af] > s390-linux-ld: verifier.c:(.text+0x13038): undefined reference to > `__SCK__perf_snapshot_branch_stack' > verifier.c:(.text+0x17c14): relocation truncated to fit: > R_AARCH64_ADR_PREL_PG_HI21 against undefined symbol > `__SCK__perf_snapshot_branch_stack' > verifier.c:(.text+0xa960): undefined reference to > `__SCK__perf_snapshot_branch_stack' > verifier.c:(.text+0xadd0): dangerous relocation: unsupported relocation > verifier.c:(.text.do_misc_fixups+0xd98): undefined reference to > `__SCK__perf_snapshot_branch_stack' Fixed in bpf-next with commit: https://lore.kernel.org/all/20240405142637.577046-1-a...@kernel.org/
[linux-next:master] BUILD REGRESSION 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc Add linux-next specific files for 20240405 Error/Warning reports: https://lore.kernel.org/oe-kbuild-all/202404051333.7und7ppw-...@intel.com https://lore.kernel.org/oe-kbuild-all/202404051423.eiaxlwhx-...@intel.com https://lore.kernel.org/oe-kbuild-all/202404051659.aawukguq-...@intel.com https://lore.kernel.org/oe-kbuild-all/202404052022.cwf2ilbp-...@intel.com Error/Warning: (recently discovered and may have been fixed) aarch64-linux-ld: kernel/bpf/verifier.c:20223:(.text+0xdbb4): undefined reference to `__SCK__perf_snapshot_branch_stack' aarch64-linux-ld: verifier.c:(.text+0x17c3c): undefined reference to `__SCK__perf_snapshot_branch_stack' drivers/i2c/busses/i2c-i801.c:1407:(.text+0x1d2ef4a): undefined reference to `i2c_root_adapter' kernel/bpf/verifier.c:20223:(.text+0xdba4): dangerous relocation: unsupported relocation loongarch64-linux-ld: kernel/bpf/verifier.c:20223:(.text+0xa818): undefined reference to `__SCK__perf_snapshot_branch_stack' loongarch64-linux-ld: verifier.c:(.text+0xa964): undefined reference to `__SCK__perf_snapshot_branch_stack' mips64el-linux-ld: verifier.c:(.text.do_misc_fixups+0xd9c): undefined reference to `__SCK__perf_snapshot_branch_stack' riscv32-linux-ld: section .data LMA [00369000,00907967] overlaps section .text LMA [0007899c,01a6a6af] s390-linux-ld: verifier.c:(.text+0x13038): undefined reference to `__SCK__perf_snapshot_branch_stack' verifier.c:(.text+0x17c14): relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21 against undefined symbol `__SCK__perf_snapshot_branch_stack' verifier.c:(.text+0xa960): undefined reference to `__SCK__perf_snapshot_branch_stack' verifier.c:(.text+0xadd0): dangerous relocation: unsupported relocation verifier.c:(.text.do_misc_fixups+0xd98): undefined reference to `__SCK__perf_snapshot_branch_stack' Unverified Error/Warning (likely false positive, please contact us if interested): lib/alloc_tag.c:142 alloc_tag_init() warn: passing zero to 'PTR_ERR' Error/Warning ids grouped by kconfigs: gcc_recent_errors |-- alpha-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- alpha-randconfig-r123-20240405 | `-- kernel-bpf-verifier.c:sparse:sparse:cast-truncates-bits-from-constant-value-(fffc-becomes-) |-- arm-allmodconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- arm-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- arm-hisi_defconfig | |-- drm_dp_mst_topology.c:(.text):undefined-reference-to-__drm_atomic_helper_private_obj_duplicate_state | `-- drm_dp_mst_topology.c:(.text):undefined-reference-to-drm_kms_helper_hotplug_event |-- arm64-randconfig-c041-20221104 | |-- aarch64-linux-ld:kernel-bpf-verifier.c:(.text):undefined-reference-to-__SCK__perf_snapshot_branch_stack | `-- kernel-bpf-verifier.c:(.text):dangerous-relocation:unsupported-relocation |-- arm64-randconfig-r013-20230703 | |-- aarch64-linux-ld:verifier.c:(.text):undefined-reference-to-__SCK__perf_snapshot_branch_stack | `-- verifier.c:(.text):relocation-truncated-to-fit:R_AARCH64_ADR_PREL_PG_HI21-against-undefined-symbol-__SCK__perf_snapshot_branch_stack |-- arm64-randconfig-r032-20220702 | `-- verifier.c:(.text):dangerous-relocation:unsupported-relocation |-- csky-allmodconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- csky-allyesconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size |-- loongarch-allmodconfig | |-- drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and | `-- drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-w
✓ Fi.CI.BAT: success for drm/i915: PREEMPT_RT related fixups. (rev5)
== Series Details ==
Series: drm/i915: PREEMPT_RT related fixups. (rev5)
URL : https://patchwork.freedesktop.org/series/95463/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14534 -> Patchwork_95463v5
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/index.html
Participating hosts (41 -> 35)
--
Missing(6): bat-kbl-2 fi-snb-2520m fi-glk-j4005 fi-cfl-8109u bat-mtlp-8
bat-arls-3
Known issues
Here are the changes found in Patchwork_95463v5 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlm-1: NOTRUN -> [SKIP][1] ([i915#4613]) +3 other tests skip
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@i915_pm_rps@basic-api:
- bat-adlm-1: NOTRUN -> [SKIP][2] ([i915#6621])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@i915_pm_...@basic-api.html
* igt@i915_selftest@live@guc_multi_lrc:
- bat-dg2-8: NOTRUN -> [ABORT][3] ([i915#10366])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-dg2-8/igt@i915_selftest@live@guc_multi_lrc.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adlm-1: NOTRUN -> [SKIP][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@kms_force_connector_ba...@force-load-detect.html
* igt@kms_frontbuffer_tracking@basic:
- bat-adlm-1: NOTRUN -> [SKIP][5] ([i915#1849] / [i915#4342])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@kms_frontbuffer_track...@basic.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-adlm-1: NOTRUN -> [SKIP][6] ([i915#9875] / [i915#9900]) +6
other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@kms_pipe_crc_ba...@hang-read-crc.html
* igt@kms_pm_backlight@basic-brightness:
- bat-adlm-1: NOTRUN -> [SKIP][7] ([i915#5354])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@kms_pm_backli...@basic-brightness.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-adlm-1: NOTRUN -> [SKIP][8] ([i915#1072] / [i915#9673] /
[i915#9732]) +3 other tests skip
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@kms_...@psr-sprite-plane-onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adlm-1: NOTRUN -> [SKIP][9] ([i915#3555])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@kms_setm...@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-adlm-1: NOTRUN -> [SKIP][10] ([i915#3708] / [i915#9900])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@prime_v...@basic-fence-flip.html
* igt@prime_vgem@basic-write:
- bat-adlm-1: NOTRUN -> [SKIP][11] ([i915#3708]) +2 other tests skip
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-adlm-1/igt@prime_v...@basic-write.html
Possible fixes
* igt@i915_selftest@live@active:
- bat-dg2-14: [ABORT][12] ([i915#10366] / [i915#10461]) ->
[PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14534/bat-dg2-14/igt@i915_selftest@l...@active.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-dg2-14/igt@i915_selftest@l...@active.html
* igt@i915_selftest@live@execlists:
- bat-dg2-8: [INCOMPLETE][14] -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14534/bat-dg2-8/igt@i915_selftest@l...@execlists.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_95463v5/bat-dg2-8/igt@i915_selftest@l...@execlists.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10366]: https://gitlab.freedesktop.org/drm/intel/issues/10366
[i915#10436]: https://gitlab.freedesktop.org/drm/intel/issues/10436
[i915#10461]: https://gitlab.freedesktop.org/drm/intel/issues/10461
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500
[i9
✗ Fi.CI.SPARSE: warning for drm/i915: PREEMPT_RT related fixups. (rev5)
== Series Details == Series: drm/i915: PREEMPT_RT related fixups. (rev5) URL : https://patchwork.freedesktop.org/series/95463/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for drm/i915: PREEMPT_RT related fixups. (rev5)
== Series Details ==
Series: drm/i915: PREEMPT_RT related fixups. (rev5)
URL : https://patchwork.freedesktop.org/series/95463/
State : warning
== Summary ==
Error: dim checkpatch failed
12b51e744085 drm/i915: Use preempt_disable/enable_rt() where recommended
-:7: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible
unwrapped commit description?)
#7:
ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into kms
driver.")
total: 0 errors, 1 warnings, 0 checks, 67 lines checked
bf5381b4bdd9 drm/i915: Don't disable interrupts on PREEMPT_RT during atomic
updates
-:10: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line
(possible unwrapped commit description?)
#10:
started disabling interrupts across atomic updates. This breaks on PREEMPT_RT
total: 0 errors, 1 warnings, 0 checks, 42 lines checked
0ce8ac1a64c7 drm/i915: Don't check for atomic context on PREEMPT_RT
441aeddcb4fd drm/i915: Disable tracing points on PREEMPT_RT
-:26: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed
by Closes: with a URL to the report
#26:
Reported-by: Luca Abeni
Cc: Steven Rostedt
total: 0 errors, 1 warnings, 0 checks, 10 lines checked
84c51ed412a0 drm/i915: skip DRM_I915_LOW_LEVEL_TRACEPOINTS with NOTRACE
ef030f5079c5 drm/i915/gt: Queue and wait for the irq_work item.
-:21: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed
by Closes: with a URL to the report
#21:
Reported-by: Clark Williams
Signed-off-by: Sebastian Andrzej Siewior
total: 0 errors, 1 warnings, 0 checks, 12 lines checked
801d82f5f4d5 drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() +
spin_lock()
-:22: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed
by Closes: with a URL to the report
#22:
Reported-by: Clark Williams
Signed-off-by: Sebastian Andrzej Siewior
total: 0 errors, 1 warnings, 0 checks, 53 lines checked
0413be7caa1a drm/i915: Drop the irqs_disabled() check
-:16: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed
by Closes: with a URL to the report
#16:
Reported-by: Maarten Lankhorst
Signed-off-by: Sebastian Andrzej Siewior
total: 0 errors, 1 warnings, 0 checks, 14 lines checked
c71c5db40f04 drm/i915/guc: Consider also RCU depth in busy loop.
-:13: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed
by Closes: with a URL to the report
#13:
Reported-by: "John B. Wyatt IV"
Signed-off-by: Sebastian Andrzej Siewior
-:25: ERROR:IN_ATOMIC: do not use in_atomic in drivers
#25: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc.h:365:
+ bool not_atomic = !in_atomic() && !irqs_disabled() &&
!rcu_preempt_depth();
total: 1 errors, 1 warnings, 0 checks, 8 lines checked
18e2862209d7 Revert "drm/i915: Depend on !PREEMPT_RT."
✗ Fi.CI.BAT: failure for series starting with [v2] drm: Add drm_vblank_work_flush_all(). (rev2)
== Series Details == Series: series starting with [v2] drm: Add drm_vblank_work_flush_all(). (rev2) URL : https://patchwork.freedesktop.org/series/132028/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14534 -> Patchwork_132028v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_132028v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_132028v2, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/index.html Participating hosts (41 -> 36) -- Missing(5): bat-dg1-7 fi-snb-2520m fi-kbl-8809g bat-dg2-11 bat-arls-3 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_132028v2: ### IGT changes ### Possible regressions * igt@gem_exec_create@basic@smem: - bat-arls-2: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14534/bat-arls-2/igt@gem_exec_create@ba...@smem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-arls-2/igt@gem_exec_create@ba...@smem.html * igt@i915_selftest@live@memory_region: - bat-mtlp-8: [PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14534/bat-mtlp-8/igt@i915_selftest@live@memory_region.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-mtlp-8/igt@i915_selftest@live@memory_region.html Known issues Here are the changes found in Patchwork_132028v2 that come from known issues: ### IGT changes ### Issues hit * igt@gem_lmem_swapping@parallel-random-engines: - bat-adlm-1: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@i915_pm_rps@basic-api: - bat-adlm-1: NOTRUN -> [SKIP][6] ([i915#6621]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@i915_pm_...@basic-api.html * igt@kms_force_connector_basic@force-load-detect: - bat-adlm-1: NOTRUN -> [SKIP][7] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_frontbuffer_tracking@basic: - bat-adlm-1: NOTRUN -> [SKIP][8] ([i915#1849] / [i915#4342]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@kms_frontbuffer_track...@basic.html * igt@kms_pipe_crc_basic@hang-read-crc: - bat-adlm-1: NOTRUN -> [SKIP][9] ([i915#9875] / [i915#9900]) +6 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@kms_pipe_crc_ba...@hang-read-crc.html * igt@kms_pm_backlight@basic-brightness: - bat-adlm-1: NOTRUN -> [SKIP][10] ([i915#5354]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@kms_pm_backli...@basic-brightness.html * igt@kms_psr@psr-sprite-plane-onoff: - bat-adlm-1: NOTRUN -> [SKIP][11] ([i915#1072] / [i915#9673] / [i915#9732]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@kms_...@psr-sprite-plane-onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-adlm-1: NOTRUN -> [SKIP][12] ([i915#3555]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-flip: - bat-adlm-1: NOTRUN -> [SKIP][13] ([i915#3708] / [i915#9900]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@prime_v...@basic-fence-flip.html * igt@prime_vgem@basic-write: - bat-adlm-1: NOTRUN -> [SKIP][14] ([i915#3708]) +2 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-adlm-1/igt@prime_v...@basic-write.html Possible fixes * igt@i915_selftest@live@active: - bat-dg2-14: [ABORT][15] ([i915#10366] / [i915#10461]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14534/bat-dg2-14/igt@i915_selftest@l...@active.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-dg2-14/igt@i915_selftest@l...@active.html * igt@i915_selftest@live@execlists: - bat-dg2-8: [INCOMPLETE][17] -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14534/bat-dg2-8/igt@i915_selftest@l...@execlists.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132028v2/bat-dg2-8/igt@i915_selftest@l...@exe
Re: [Intel-gfx] [PATCH v5 0/7] Introduce __xchg, non-atomic xchg
On Mon, 27 Feb 2023, Peter Zijlstra wrote: > On Thu, Feb 23, 2023 at 10:24:19PM +0100, Andrzej Hajda wrote: >> On 22.02.2023 18:04, Peter Zijlstra wrote: >> > On Wed, Jan 18, 2023 at 04:35:22PM +0100, Andrzej Hajda wrote: >> > >> > > Andrzej Hajda (7): >> > >arch: rename all internal names __xchg to __arch_xchg >> > >linux/include: add non-atomic version of xchg >> > >arch/*/uprobes: simplify arch_uretprobe_hijack_return_addr >> > >llist: simplify __llist_del_all >> > >io_uring: use __xchg if possible >> > >qed: use __xchg if possible >> > >drm/i915/gt: use __xchg instead of internal helper >> > >> > Nothing crazy in here I suppose, I somewhat wonder why you went through >> > the trouble, but meh. >> >> If you are asking why I have proposed this patchset, then the answer is >> simple, 1st I've tried to find a way to move internal i915 helper to core >> (see patch 7). >> Then I was looking for possible other users of this helper. And apparently >> there are many of them, patches 3-7 shows some. >> >> >> > >> > You want me to take this through te locking tree (for the next cycle, >> > not this one) where I normally take atomic things or does someone else >> > want this? >> >> If you could take it I will be happy. > > OK, I'll go queue it in tip/locking/core after -rc1. Thanks! Is this where the series fell between the cracks, or was there some follow-up that I missed? I think this would still be useful. Andrzej, would you mind rebasing and resending if there are no objections? BR, Jani. -- Jani Nikula, Intel
✗ Fi.CI.SPARSE: warning for series starting with [v2] drm: Add drm_vblank_work_flush_all(). (rev2)
== Series Details == Series: series starting with [v2] drm: Add drm_vblank_work_flush_all(). (rev2) URL : https://patchwork.freedesktop.org/series/132028/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol '
✗ Fi.CI.CHECKPATCH: warning for series starting with [v2] drm: Add drm_vblank_work_flush_all(). (rev2)
== Series Details == Series: series starting with [v2] drm: Add drm_vblank_work_flush_all(). (rev2) URL : https://patchwork.freedesktop.org/series/132028/ State : warning == Summary == Error: dim checkpatch failed 484c7f370590 drm: Add drm_vblank_work_flush_all(). -:33: WARNING:WAITQUEUE_ACTIVE: waitqueue_active without comment #33: FILE: drivers/gpu/drm/drm_vblank_work.c:249: + !waitqueue_active(&vblank->work_wait_queue), total: 0 errors, 1 warnings, 0 checks, 41 lines checked 724ee45e12da drm/i915: Use vblank worker to unpin old legacy cursor fb safely f83322c6afc4 drm/i915: Use the same vblank worker for atomic unpin -:107: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #107: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:641: + drm_crtc_accurate_vblank_count(&crtc->base) + 1, -:110: WARNING:LONG_LINE_COMMENT: line length of 110 exceeds 100 columns #110: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:644: + /* Remove plane from atomic state, cleanup/free is done from vblank worker. */ total: 0 errors, 2 warnings, 0 checks, 98 lines checked
[PATCH 10/10] Revert "drm/i915: Depend on !PREEMPT_RT."
Once the known issues are addressed, it should be safe to enable the driver. Signed-off-by: Sebastian Andrzej Siewior --- drivers/gpu/drm/i915/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index 5932024f8f954..a02162d6b710e 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -3,7 +3,6 @@ config DRM_I915 tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics" depends on DRM depends on X86 && PCI - depends on !PREEMPT_RT select INTEL_GTT if X86 select INTERVAL_TREE # we need shmfs for the swappable backing store, and in particular -- 2.43.0
[PATCH 06/10] drm/i915/gt: Queue and wait for the irq_work item.
Disabling interrupts and invoking the irq_work function directly breaks
on PREEMPT_RT.
PREEMPT_RT does not invoke all irq_work from hardirq context because
some of the user have spinlock_t locking in the callback function.
These locks are then turned into a sleeping locks which can not be
acquired with disabled interrupts.
Using irq_work_queue() has the benefit that the irqwork will be invoked
in the regular context. In general there is "no" delay between enqueuing
the callback and its invocation because the interrupt is raised right
away on architectures which support it (which includes x86).
Use irq_work_queue() + irq_work_sync() instead invoking the callback
directly.
Reported-by: Clark Williams
Signed-off-by: Sebastian Andrzej Siewior
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
index d650beb8ed22f..3dd3e516b80c1 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
@@ -317,10 +317,9 @@ void __intel_breadcrumbs_park(struct intel_breadcrumbs *b)
/* Kick the work once more to drain the signalers, and disarm the irq */
irq_work_sync(&b->irq_work);
while (READ_ONCE(b->irq_armed) && !atomic_read(&b->active)) {
- local_irq_disable();
- signal_irq_work(&b->irq_work);
- local_irq_enable();
+ irq_work_queue(&b->irq_work);
cond_resched();
+ irq_work_sync(&b->irq_work);
}
}
--
2.43.0
[PATCH 02/10] drm/i915: Don't disable interrupts on PREEMPT_RT during atomic updates
From: Mike Galbraith
Commit
8d7849db3eab7 ("drm/i915: Make sprite updates atomic")
started disabling interrupts across atomic updates. This breaks on PREEMPT_RT
because within this section the code attempt to acquire spinlock_t locks which
are sleeping locks on PREEMPT_RT.
According to the comment the interrupts are disabled to avoid random delays and
not required for protection or synchronisation.
If this needs to happen with disabled interrupts on PREEMPT_RT, and the
whole section is restricted to register access then all sleeping locks
need to be acquired before interrupts are disabled and some function
maybe moved after enabling interrupts again.
This includes:
- prepare_to_wait() + finish_wait() due its wake queue.
- drm_crtc_vblank_put() -> vblank_disable_fn() drm_device::vbl_lock.
- skl_pfit_enable(), intel_update_plane(), vlv_atomic_update_fifo() and
maybe others due to intel_uncore::lock
- drm_crtc_arm_vblank_event() due to drm_device::event_lock and
drm_device::vblank_time_lock.
Don't disable interrupts on PREEMPT_RT during atomic updates.
[bigeasy: drop local locks, commit message]
Signed-off-by: Mike Galbraith
Signed-off-by: Sebastian Andrzej Siewior
---
drivers/gpu/drm/i915/display/intel_crtc.c | 9 ++---
drivers/gpu/drm/i915/display/intel_vblank.c | 6 --
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
b/drivers/gpu/drm/i915/display/intel_crtc.c
index 25593f6aae7de..22b80004574fa 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -512,7 +512,8 @@ void intel_pipe_update_start(struct intel_atomic_state
*state,
*/
intel_psr_wait_for_idle_locked(new_crtc_state);
- local_irq_disable();
+ if (!IS_ENABLED(CONFIG_PREEMPT_RT))
+ local_irq_disable();
crtc->debug.min_vbl = evade.min;
crtc->debug.max_vbl = evade.max;
@@ -530,7 +531,8 @@ void intel_pipe_update_start(struct intel_atomic_state
*state,
return;
irq_disable:
- local_irq_disable();
+ if (!IS_ENABLED(CONFIG_PREEMPT_RT))
+ local_irq_disable();
}
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
@@ -632,7 +634,8 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
*/
intel_vrr_send_push(new_crtc_state);
- local_irq_enable();
+ if (!IS_ENABLED(CONFIG_PREEMPT_RT))
+ local_irq_enable();
if (intel_vgpu_active(dev_priv))
goto out;
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index 71d6071121460..d639b51a49195 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -700,11 +700,13 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx
*evade)
break;
}
- local_irq_enable();
+ if (!IS_ENABLED(CONFIG_PREEMPT_RT))
+ local_irq_enable();
timeout = schedule_timeout(timeout);
- local_irq_disable();
+ if (!IS_ENABLED(CONFIG_PREEMPT_RT))
+ local_irq_disable();
}
finish_wait(wq, &wait);
--
2.43.0
[PATCH 07/10] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()
execlists_dequeue() is invoked from a function which uses
local_irq_disable() to disable interrupts so the spin_lock() behaves
like spin_lock_irq().
This breaks PREEMPT_RT because local_irq_disable() + spin_lock() is not
the same as spin_lock_irq().
execlists_dequeue_irq() and execlists_dequeue() has each one caller
only. If intel_engine_cs::active::lock is acquired and released with the
_irq suffix then it behaves almost as if execlists_dequeue() would be
invoked with disabled interrupts. The difference is the last part of the
function which is then invoked with enabled interrupts.
I can't tell if this makes a difference. From looking at it, it might
work to move the last unlock at the end of the function as I didn't find
anything that would acquire the lock again.
Reported-by: Clark Williams
Signed-off-by: Sebastian Andrzej Siewior
Reviewed-by: Maarten Lankhorst
---
.../drm/i915/gt/intel_execlists_submission.c| 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index b061a0a0d6b08..80240ec45cb9f 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1303,7 +1303,7 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
* and context switches) submission.
*/
- spin_lock(&sched_engine->lock);
+ spin_lock_irq(&sched_engine->lock);
/*
* If the queue is higher priority than the last
@@ -1403,7 +1403,7 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
* Even if ELSP[1] is occupied and not worthy
* of timeslices, our queue might be.
*/
- spin_unlock(&sched_engine->lock);
+ spin_unlock_irq(&sched_engine->lock);
return;
}
}
@@ -1429,7 +1429,7 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
if (last && !can_merge_rq(last, rq)) {
spin_unlock(&ve->base.sched_engine->lock);
- spin_unlock(&engine->sched_engine->lock);
+ spin_unlock_irq(&engine->sched_engine->lock);
return; /* leave this for another sibling */
}
@@ -1591,7 +1591,7 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
*/
sched_engine->queue_priority_hint = queue_prio(sched_engine);
i915_sched_engine_reset_on_empty(sched_engine);
- spin_unlock(&sched_engine->lock);
+ spin_unlock_irq(&sched_engine->lock);
/*
* We can skip poking the HW if we ended up with exactly the same set
@@ -1617,13 +1617,6 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
}
}
-static void execlists_dequeue_irq(struct intel_engine_cs *engine)
-{
- local_irq_disable(); /* Suspend interrupts across request submission */
- execlists_dequeue(engine);
- local_irq_enable(); /* flush irq_work (e.g. breadcrumb enabling) */
-}
-
static void clear_ports(struct i915_request **ports, int count)
{
memset_p((void **)ports, NULL, count);
@@ -2478,7 +2471,7 @@ static void execlists_submission_tasklet(struct
tasklet_struct *t)
}
if (!engine->execlists.pending[0]) {
- execlists_dequeue_irq(engine);
+ execlists_dequeue(engine);
start_timeslice(engine);
}
--
2.43.0
[PATCH 08/10] drm/i915: Drop the irqs_disabled() check
The !irqs_disabled() check triggers on PREEMPT_RT even with i915_sched_engine::lock acquired. The reason is the lock is transformed into a sleeping lock on PREEMPT_RT and does not disable interrupts. There is no need to check for disabled interrupts. The lockdep annotation below already check if the lock has been acquired by the caller and will yell if the interrupts are not disabled. Remove the !irqs_disabled() check. Reported-by: Maarten Lankhorst Signed-off-by: Sebastian Andrzej Siewior --- drivers/gpu/drm/i915/i915_request.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c index 519e096c607cd..466b5ee8ed6d2 100644 --- a/drivers/gpu/drm/i915/i915_request.c +++ b/drivers/gpu/drm/i915/i915_request.c @@ -608,7 +608,6 @@ bool __i915_request_submit(struct i915_request *request) RQ_TRACE(request, "\n"); - GEM_BUG_ON(!irqs_disabled()); lockdep_assert_held(&engine->sched_engine->lock); /* @@ -717,7 +716,6 @@ void __i915_request_unsubmit(struct i915_request *request) */ RQ_TRACE(request, "\n"); - GEM_BUG_ON(!irqs_disabled()); lockdep_assert_held(&engine->sched_engine->lock); /* -- 2.43.0
[PATCH 01/10] drm/i915: Use preempt_disable/enable_rt() where recommended
From: Mike Galbraith
Mario Kleiner suggest in commit
ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into kms
driver.")
a spots where preemption should be disabled on PREEMPT_RT. The
difference is that on PREEMPT_RT the intel_uncore::lock disables neither
preemption nor interrupts and so region remains preemptible.
The area covers only register reads and writes. The part that worries me
is:
- __intel_get_crtc_scanline() the worst case is 100us if no match is
found.
- intel_crtc_scanlines_since_frame_timestamp() not sure how long this
may take in the worst case.
It was in the RT queue for a while and nobody complained.
Disable preemption on PREEPMPT_RT during timestamping.
[bigeasy: patch description.]
Cc: Mario Kleiner
Signed-off-by: Mike Galbraith
Signed-off-by: Thomas Gleixner
Signed-off-by: Sebastian Andrzej Siewior
---
drivers/gpu/drm/i915/display/intel_vblank.c | 38 +++--
1 file changed, 28 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index baf7354cb6e2c..71d6071121460 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -276,6 +276,26 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int
scanline)
* all register accesses to the same cacheline to be serialized,
* otherwise they may hang.
*/
+static void intel_vblank_section_enter_irqsave(struct drm_i915_private *i915,
unsigned long *flags)
+ __acquires(i915->uncore.lock)
+{
+#ifdef I915
+ spin_lock_irqsave(&i915->uncore.lock, *flags);
+#else
+ *flags = 0;
+#endif
+}
+
+static void intel_vblank_section_exit_irqrestore(struct drm_i915_private
*i915, unsigned long flags)
+ __releases(i915->uncore.lock)
+{
+#ifdef I915
+ spin_unlock_irqrestore(&i915->uncore.lock, flags);
+#else
+ if (flags)
+ return;
+#endif
+}
static void intel_vblank_section_enter(struct drm_i915_private *i915)
__acquires(i915->uncore.lock)
{
@@ -333,10 +353,10 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc
*_crtc,
* timing critical raw register reads, potentially with
* preemption disabled, so the following code must not block.
*/
- local_irq_save(irqflags);
- intel_vblank_section_enter(dev_priv);
+ intel_vblank_section_enter_irqsave(dev_priv, &irqflags);
- /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
+ if (IS_ENABLED(CONFIG_PREEMPT_RT))
+ preempt_disable();
/* Get optional system timestamp before query. */
if (stime)
@@ -400,10 +420,10 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc
*_crtc,
if (etime)
*etime = ktime_get();
- /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
+ if (IS_ENABLED(CONFIG_PREEMPT_RT))
+ preempt_enable();
- intel_vblank_section_exit(dev_priv);
- local_irq_restore(irqflags);
+ intel_vblank_section_exit_irqrestore(dev_priv, irqflags);
/*
* While in vblank, position will be negative
@@ -441,13 +461,11 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
unsigned long irqflags;
int position;
- local_irq_save(irqflags);
- intel_vblank_section_enter(dev_priv);
+ intel_vblank_section_enter_irqsave(dev_priv, &irqflags);
position = __intel_get_crtc_scanline(crtc);
- intel_vblank_section_exit(dev_priv);
- local_irq_restore(irqflags);
+ intel_vblank_section_exit_irqrestore(dev_priv, irqflags);
return position;
}
--
2.43.0
[PATCH 04/10] drm/i915: Disable tracing points on PREEMPT_RT
Luca Abeni reported this: | BUG: scheduling while atomic: kworker/u8:2/15203/0x0003 | CPU: 1 PID: 15203 Comm: kworker/u8:2 Not tainted 4.19.1-rt3 #10 | Call Trace: | rt_spin_lock+0x3f/0x50 | gen6_read32+0x45/0x1d0 [i915] | g4x_get_vblank_counter+0x36/0x40 [i915] | trace_event_raw_event_i915_pipe_update_start+0x7d/0xf0 [i915] The tracing events use trace_i915_pipe_update_start() among other events use functions acquire spinlock_t locks which are transformed into sleeping locks on PREEMPT_RT. A few trace points use intel_get_crtc_scanline(), others use ->get_vblank_counter() wich also might acquire a sleeping locks on PREEMPT_RT. At the time the arguments are evaluated within trace point, preemption is disabled and so the locks must not be acquired on PREEMPT_RT. Based on this I don't see any other way than disable trace points on PREMPT_RT. Reported-by: Luca Abeni Cc: Steven Rostedt Signed-off-by: Sebastian Andrzej Siewior --- drivers/gpu/drm/i915/i915_trace.h | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index ce1cbee1b39dd..c54653cf72c95 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -6,6 +6,10 @@ #if !defined(_I915_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) #define _I915_TRACE_H_ +#ifdef CONFIG_PREEMPT_RT +#define NOTRACE +#endif + #include #include #include -- 2.43.0
[PATCH 05/10] drm/i915: skip DRM_I915_LOW_LEVEL_TRACEPOINTS with NOTRACE
The order of the header files is important. If this header file is included after tracepoint.h was included then the NOTRACE here becomes a nop. Currently this happens for two .c files which use the tracepoitns behind DRM_I915_LOW_LEVEL_TRACEPOINTS. Cc: Steven Rostedt Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Thomas Gleixner --- drivers/gpu/drm/i915/i915_trace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index c54653cf72c95..3c51620d011b1 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -326,7 +326,7 @@ DEFINE_EVENT(i915_request, i915_request_add, TP_ARGS(rq) ); -#if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) +#if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) && !defined(NOTRACE) DEFINE_EVENT(i915_request, i915_request_guc_submit, TP_PROTO(struct i915_request *rq), TP_ARGS(rq) -- 2.43.0
[PATCH 00/10] drm/i915: PREEMPT_RT related fixups.
Hi, The following patches are from the PREEMPT_RT queue. It is mostly about disabling interrupts/preemption which leads to problems. Unfortunately DRM_I915_LOW_LEVEL_TRACEPOINTS had to be disabled because it acquires locks from within trace points. Making the lock a raw_spinlock_t led to higher latencies during video playback https://lore.kernel.org/all/20211006164628.s2mtsdd2jdbfy...@linutronix.de/ and I'm not sure if I hit the worse case here. I tested it on a SandyBridge with built-in i915 by using X, OpenGL and playing videos without noticing any warnings. However, some code paths were not entered. I carry them for some time now and most issues were reported by other people and they reported that things work for them since. Sebastian
[PATCH 09/10] drm/i915/guc: Consider also RCU depth in busy loop.
intel_guc_send_busy_loop() looks at in_atomic() and irqs_disabled() to
decide if it should busy-spin while waiting or if it may sleep.
Both checks will report false on PREEMPT_RT if sleeping spinlocks are
acquired leading to RCU splats while the function sleeps.
Check also if RCU has been disabled.
Reported-by: "John B. Wyatt IV"
Signed-off-by: Sebastian Andrzej Siewior
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index be70c46604b49..387cc1911302f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -360,7 +360,7 @@ static inline int intel_guc_send_busy_loop(struct intel_guc
*guc,
{
int err;
unsigned int sleep_period_ms = 1;
- bool not_atomic = !in_atomic() && !irqs_disabled();
+ bool not_atomic = !in_atomic() && !irqs_disabled() &&
!rcu_preempt_depth();
/*
* FIXME: Have caller pass in if we are in an atomic context to avoid
--
2.43.0
[PATCH 03/10] drm/i915: Don't check for atomic context on PREEMPT_RT
The !in_atomic() check in _wait_for_atomic() triggers on PREEMPT_RT
because the uncore::lock is a spinlock_t and does not disable
preemption or interrupts.
Changing the uncore:lock to a raw_spinlock_t doubles the worst case
latency on an otherwise idle testbox during testing. Therefore I'm
currently unsure about changing this.
Link: https://lore.kernel.org/all/20211006164628.s2mtsdd2jdbfy...@linutronix.de/
Signed-off-by: Sebastian Andrzej Siewior
---
drivers/gpu/drm/i915/i915_utils.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_utils.h
b/drivers/gpu/drm/i915/i915_utils.h
index b45ef0560611a..7c6077d2d3dc0 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -288,7 +288,7 @@ wait_remaining_ms_from_jiffies(unsigned long
timestamp_jiffies, int to_wait_ms)
#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)
/* If CONFIG_PREEMPT_COUNT is disabled, in_atomic() always reports false. */
-#if defined(CONFIG_DRM_I915_DEBUG) && defined(CONFIG_PREEMPT_COUNT)
+#if defined(CONFIG_DRM_I915_DEBUG) && defined(CONFIG_PREEMPT_COUNT) &&
!defined(CONFIG_PREEMPT_RT)
# define _WAIT_FOR_ATOMIC_CHECK(ATOMIC) WARN_ON_ONCE((ATOMIC) && !in_atomic())
#else
# define _WAIT_FOR_ATOMIC_CHECK(ATOMIC) do { } while (0)
--
2.43.0
RE: [PATCH v2 01/17] drm/i915: Update pipes in reverse order for bigjoiner
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, April 5, 2024 3:04 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH v2 01/17] drm/i915: Update pipes in reverse order for
> bigjoiner
>
> From: Ville Syrjälä
>
> With bigjoiner the master crtc is the one that will send out the uapi
> event/etc. We want that to happen after all the slaves are done, so let's try
> to do the commits in reverse order so that the master comes last.
>
> Even worse, the modeset helper will simply complete the commit on the
> slave pipe immediately as it consider the crtc to be inactive (it can't see
> our
> crtc_state->hw.active/etc.).
>
> With regular sync updates this generally doesn't matter all that much as the
> slave pipe should typically finish its work during the same frame as the
> master pipe. However in case the slave pipe's commit slips into the next
> frame we end up in a bit of trouble. This is most visible with either async
> flips
> (currently disabled with bigjoiner exactly for this reason), and DSB gamma
> updates. With DSB the problem happens because the DSB itself will wait until
> the next start vblank before starting to execute. So if the master pipe
> already
> finished its commit and the DSB on the slave pipe is still waiting for the
> next
> vblank we will assume the DSB as gotten stuck and terminate it.
>
> Reversing the commit order should ameliarate this for the most part as the
> master pipe is guaranteed to start its commit after the slave pipe started.
> The
> one thing that can still screw us over is the fact that we aren't necessarily
> going to commit the pipes in the reverse order as the actual order is dictated
> by the DDB overlap avoidance.
> But that can only happen while other pipes are being enabled/disabled, and
> so in the normal steady state we should be safe.
>
> The full fix will involve making the commit machinery aware of the slave
> pipes and not finish their commits prematurely. But that will involve a bit
> more work than this. And this commit order reversal will still be beneficial
> to
> avoid userspace getting an -EBUSY from the following page flip if the second
> pipe's commit does stretch into the next frame.
>
LGTM.
Reviewed-by: Vandita Kulkarni
I had just one query though,
Will there be a case where we can get vblank between slave update and master
update,
if so do you think there will be any problem due to that?
Thanks,
Vandita
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 14 +++---
> drivers/gpu/drm/i915/display/intel_display.h | 8
> 2 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index a481c9218138..0086a7422e86 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6956,8 +6956,12 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> intel_dbuf_mbus_pre_ddb_update(state);
>
> while (update_pipes) {
> - for_each_oldnew_intel_crtc_in_state(state, crtc,
> old_crtc_state,
> - new_crtc_state, i) {
> + /*
> + * Commit in reverse order to make bigjoiner master
> + * send the uapi events after slaves are done.
> + */
> + for_each_oldnew_intel_crtc_in_state_reverse(state, crtc,
> old_crtc_state,
> + new_crtc_state, i) {
> enum pipe pipe = crtc->pipe;
>
> if ((update_pipes & BIT(pipe)) == 0) @@ -7036,7
> +7040,11 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> intel_pre_update_crtc(state, crtc);
> }
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + /*
> + * Commit in reverse order to make bigjoiner master
> + * send the uapi events after slaves are done.
> + */
> + for_each_new_intel_crtc_in_state_reverse(state, crtc,
> new_crtc_state,
> +i) {
> enum pipe pipe = crtc->pipe;
>
> if ((update_pipes & BIT(pipe)) == 0)
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 986ec77490de..423074d6947a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -344,6 +344,14 @@ enum phy_fia {
>(__i)++) \
> for_each_if(crtc)
>
> +#define for_each_new_intel_crtc_in_state_reverse(__state, crtc,
> new_crtc_state, __i) \
> + for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
> + (__i) >= 0 && \
> + ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
> + (new_crtc_state) = to_intel_crtc_state((__sta
Re: [rebase 1/3] drm: Add drm_vblank_work_flush_all().
what does "rebase" instead of "PATCH" is supposed to mean here?
And then we have a "PATCH v2" as reply to this one.
Shouldn't this go to dri-devel (too)?
Lucas De Marchi
On Thu, Apr 04, 2024 at 12:48:11PM +0200, Maarten Lankhorst wrote:
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/drm_vblank_work.c
b/drivers/gpu/drm/drm_vblank_work.c
index 43cd5c0f4f6f..ff86f2b2e052 100644
--- a/drivers/gpu/drm/drm_vblank_work.c
+++ b/drivers/gpu/drm/drm_vblank_work.c
@@ -232,6 +232,28 @@ void drm_vblank_work_flush(struct drm_vblank_work *work)
}
EXPORT_SYMBOL(drm_vblank_work_flush);
+/**
+ * drm_vblank_work_flush_all - flush all currently pending vblank work on crtc.
+ * @crtc: crtc for which vblank work to flush
+ *
+ * Wait until all currently queued vblank work on @crtc
+ * has finished executing once.
+ */
+void drm_vblank_work_flush_all(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_vblank_crtc *vblank = &dev->vblank[drm_crtc_index(crtc)];
+
+ spin_lock_irq(&dev->event_lock);
+ wait_event_lock_irq(vblank->work_wait_queue,
+ waitqueue_active(&vblank->work_wait_queue),
+ dev->event_lock);
+ spin_unlock_irq(&dev->event_lock);
+
+ kthread_flush_worker(vblank->worker);
+}
+EXPORT_SYMBOL(drm_vblank_work_flush_all);
+
/**
* drm_vblank_work_init - initialize a vblank work item
* @work: vblank work item
diff --git a/include/drm/drm_vblank_work.h b/include/drm/drm_vblank_work.h
index eb41d0810c4f..e04d436b7297 100644
--- a/include/drm/drm_vblank_work.h
+++ b/include/drm/drm_vblank_work.h
@@ -17,6 +17,7 @@ struct drm_crtc;
* drm_vblank_work_init()
* drm_vblank_work_cancel_sync()
* drm_vblank_work_flush()
+ * drm_vblank_work_flush_all()
*/
struct drm_vblank_work {
/**
@@ -67,5 +68,6 @@ void drm_vblank_work_init(struct drm_vblank_work *work,
struct drm_crtc *crtc,
void (*func)(struct kthread_work *work));
bool drm_vblank_work_cancel_sync(struct drm_vblank_work *work);
void drm_vblank_work_flush(struct drm_vblank_work *work);
+void drm_vblank_work_flush_all(struct drm_crtc *crtc);
#endif /* !_DRM_VBLANK_WORK_H_ */
--
2.43.0
✓ Fi.CI.BAT: success for Panel Replay fixes and clean ups
== Series Details == Series: Panel Replay fixes and clean ups URL : https://patchwork.freedesktop.org/series/132073/ State : success == Summary == CI Bug Log - changes from CI_DRM_14533 -> Patchwork_132073v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/index.html Participating hosts (38 -> 39) -- Additional (3): bat-dg1-7 fi-glk-j4005 fi-elk-e7500 Missing(2): bat-arls-2 fi-snb-2520m Known issues Here are the changes found in Patchwork_132073v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-glk-j4005: NOTRUN -> [SKIP][1] ([i915#2190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][2] ([i915#4613]) +3 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][3] ([i915#4083]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][4] ([i915#4077]) +2 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][5] ([i915#4079]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][6] ([i915#6621]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@active: - fi-cfl-guc: [PASS][7] -> [DMESG-FAIL][8] ([i915#10606]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14533/fi-cfl-guc/igt@i915_selftest@l...@active.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/fi-cfl-guc/igt@i915_selftest@l...@active.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][9] ([i915#4212]) +7 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-7: NOTRUN -> [SKIP][10] ([i915#4215]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-glk-j4005: NOTRUN -> [SKIP][11] +10 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/fi-glk-j4005/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg1-7: NOTRUN -> [SKIP][12] ([i915#4103] / [i915#4213]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#3840]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-edid: - bat-dg2-8: [PASS][14] -> [INCOMPLETE][15] ([i915#10583]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14533/bat-dg2-8/igt@kms_force_connector_ba...@force-edid.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg2-8/igt@kms_force_connector_ba...@force-edid.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg1-7: NOTRUN -> [SKIP][16] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_hdmi_inject@inject-audio: - bat-dg1-7: NOTRUN -> [SKIP][17] ([i915#433]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pm_backlight@basic-brightness: - bat-dg1-7: NOTRUN -> [SKIP][18] ([i915#5354]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/bat-dg1-7/igt@kms_pm_backli...@basic-brightness.html * igt@kms_pm_rpm@basic-pci-d3-state: - fi-elk-e7500: NOTRUN -> [SKIP][19] +24 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132073v1/fi-elk-e7500/igt@kms_pm_...@basic-pci-d3-state.html * igt@kms_psr@psr-primary-page-flip: - bat-dg1-7: NOTRUN -> [SKIP][20] ([
[PATCH v2] drm: Add drm_vblank_work_flush_all().
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 ++
2 files changed, 24 insertions(+)
Changes since v1:
Check in flush_all for waitqueue_active was inverted.
diff --git a/drivers/gpu/drm/drm_vblank_work.c
b/drivers/gpu/drm/drm_vblank_work.c
index 43cd5c0f4f6f..6a53cede547a 100644
--- a/drivers/gpu/drm/drm_vblank_work.c
+++ b/drivers/gpu/drm/drm_vblank_work.c
@@ -232,6 +232,28 @@ void drm_vblank_work_flush(struct drm_vblank_work *work)
}
EXPORT_SYMBOL(drm_vblank_work_flush);
+/**
+ * drm_vblank_work_flush_all - flush all currently pending vblank work on crtc.
+ * @crtc: crtc for which vblank work to flush
+ *
+ * Wait until all currently queued vblank work on @crtc
+ * has finished executing once.
+ */
+void drm_vblank_work_flush_all(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_vblank_crtc *vblank = &dev->vblank[drm_crtc_index(crtc)];
+
+ spin_lock_irq(&dev->event_lock);
+ wait_event_lock_irq(vblank->work_wait_queue,
+ !waitqueue_active(&vblank->work_wait_queue),
+ dev->event_lock);
+ spin_unlock_irq(&dev->event_lock);
+
+ kthread_flush_worker(vblank->worker);
+}
+EXPORT_SYMBOL(drm_vblank_work_flush_all);
+
/**
* drm_vblank_work_init - initialize a vblank work item
* @work: vblank work item
diff --git a/include/drm/drm_vblank_work.h b/include/drm/drm_vblank_work.h
index eb41d0810c4f..e04d436b7297 100644
--- a/include/drm/drm_vblank_work.h
+++ b/include/drm/drm_vblank_work.h
@@ -17,6 +17,7 @@ struct drm_crtc;
* drm_vblank_work_init()
* drm_vblank_work_cancel_sync()
* drm_vblank_work_flush()
+ * drm_vblank_work_flush_all()
*/
struct drm_vblank_work {
/**
@@ -67,5 +68,6 @@ void drm_vblank_work_init(struct drm_vblank_work *work,
struct drm_crtc *crtc,
void (*func)(struct kthread_work *work));
bool drm_vblank_work_cancel_sync(struct drm_vblank_work *work);
void drm_vblank_work_flush(struct drm_vblank_work *work);
+void drm_vblank_work_flush_all(struct drm_crtc *crtc);
#endif /* !_DRM_VBLANK_WORK_H_ */
--
2.43.0
RE: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
> -Original Message-
> From: Intel-gfx On Behalf Of
> Hogander, Jouni
> Sent: Friday, April 5, 2024 12:29 PM
> To: ville.syrj...@linux.intel.com; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
>
> On Fri, 2024-04-05 at 00:34 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Bigjoiner seem to be causing all kinds of grief to the PSR code
> > currently. I don't believe there is any hardware issue but the code
> > simply not handling this correctly. For now just disable PSR when
> > bigjoiner is needed.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 11 +++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index eef62983e9db..a3ff916b53f9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1584,6 +1584,17 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> > return;
> > }
> >
> > + /*
> > + * FIXME figure out what is wrong with PSR+bigjoiner and
> > + * fix it. Presumably something related to the fact that
> > + * PSR is a transcoder level feature.
> > + */
> > + if (crtc_state->bigjoiner_pipes) {
> > + drm_dbg_kms(&dev_priv->drm,
> > + "PSR disabled due to bigjoiner\n");
> > + return;
> > + }
> > +
>
> Are these problems with both PSR1 and PSR2?
Yes, as per the code this would have impact on both PSR1 and PSR2. So better to
disable.
Looks good to me.
Thanks and Regards,
Arun R Murthy
>
> BR,
>
> Jouni Högander
>
> > if (CAN_PANEL_REPLAY(intel_dp))
> > crtc_state->has_panel_replay = true;
> > else
RE: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
> -Original Message-
> From: Intel-gfx On Behalf Of
> Hogander, Jouni
> Sent: Friday, April 5, 2024 12:29 PM
> To: ville.syrj...@linux.intel.com; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
>
> On Fri, 2024-04-05 at 00:34 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Bigjoiner seem to be causing all kinds of grief to the PSR code
> > currently. I don't believe there is any hardware issue but the code
> > simply not handling this correctly. For now just disable PSR when
> > bigjoiner is needed.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 11 +++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index eef62983e9db..a3ff916b53f9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1584,6 +1584,17 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> > return;
> > }
> >
> > + /*
> > + * FIXME figure out what is wrong with PSR+bigjoiner and
> > + * fix it. Presumably something related to the fact that
> > + * PSR is a transcoder level feature.
> > + */
> > + if (crtc_state->bigjoiner_pipes) {
> > + drm_dbg_kms(&dev_priv->drm,
> > + "PSR disabled due to bigjoiner\n");
> > + return;
> > + }
> > +
>
> Are these problems with both PSR1 and PSR2?
>
> BR,
>
> Jouni Högander
>
> > if (CAN_PANEL_REPLAY(intel_dp))
> > crtc_state->has_panel_replay = true;
> > else
RE: [PATCH v2 01/17] drm/i915: Update pipes in reverse order for bigjoiner
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, April 5, 2024 3:04 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH v2 01/17] drm/i915: Update pipes in reverse order for
> bigjoiner
>
> From: Ville Syrjälä
>
> With bigjoiner the master crtc is the one that will send out the uapi
> event/etc.
> We want that to happen after all the slaves are done, so let's try to do the
> commits in reverse order so that the master comes last.
>
> Even worse, the modeset helper will simply complete the commit on the slave
> pipe immediately as it consider the crtc to be inactive (it can't see our
> crtc_state->hw.active/etc.).
>
> With regular sync updates this generally doesn't matter all that much as the
> slave pipe should typically finish its work during the same frame as the
> master
> pipe. However in case the slave pipe's commit slips into the next frame we end
> up in a bit of trouble. This is most visible with either async flips
> (currently
> disabled with bigjoiner exactly for this reason), and DSB gamma updates. With
> DSB the problem happens because the DSB itself will wait until the next start
> vblank before starting to execute. So if the master pipe already finished its
> commit and the DSB on the slave pipe is still waiting for the next vblank we
> will
> assume the DSB as gotten stuck and terminate it.
>
> Reversing the commit order should ameliarate this for the most part as the
> master pipe is guaranteed to start its commit after the slave pipe started.
> The
> one thing that can still screw us over is the fact that we aren't necessarily
> going
> to commit the pipes in the reverse order as the actual order is dictated by
> the
> DDB overlap avoidance.
> But that can only happen while other pipes are being enabled/disabled, and so
> in the normal steady state we should be safe.
>
> The full fix will involve making the commit machinery aware of the slave pipes
> and not finish their commits prematurely. But that will involve a bit more
> work
> than this. And this commit order reversal will still be beneficial to avoid
> userspace getting an -EBUSY from the following page flip if the second pipe's
> commit does stretch into the next frame.
Can there be a possibility of seeing a flicker/corruption in that case?
Also should this be added a TODO in the driver so that it will not be missed
out?
Above comment is for clarification and if a TODO is required, can be taken up
while merging the patch. Remaining logic looks good to me.
Reviewed-by: Arun R Murthy
Thanks and Regards,
Arun R Murthy
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 14 +++---
> drivers/gpu/drm/i915/display/intel_display.h | 8
> 2 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index a481c9218138..0086a7422e86 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6956,8 +6956,12 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> intel_dbuf_mbus_pre_ddb_update(state);
>
> while (update_pipes) {
> - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> - new_crtc_state, i) {
> + /*
> + * Commit in reverse order to make bigjoiner master
> + * send the uapi events after slaves are done.
> + */
> + for_each_oldnew_intel_crtc_in_state_reverse(state, crtc,
> old_crtc_state,
> + new_crtc_state, i) {
> enum pipe pipe = crtc->pipe;
>
> if ((update_pipes & BIT(pipe)) == 0) @@ -7036,7
> +7040,11 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> intel_pre_update_crtc(state, crtc);
> }
>
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> + /*
> + * Commit in reverse order to make bigjoiner master
> + * send the uapi events after slaves are done.
> + */
> + for_each_new_intel_crtc_in_state_reverse(state, crtc, new_crtc_state,
> +i) {
> enum pipe pipe = crtc->pipe;
>
> if ((update_pipes & BIT(pipe)) == 0)
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 986ec77490de..423074d6947a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -344,6 +344,14 @@ enum phy_fia {
>(__i)++) \
> for_each_if(crtc)
>
> +#define for_each_new_intel_crtc_in_state_reverse(__state, crtc,
> new_crtc_state, __i) \
> + for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
> +
✗ Fi.CI.CHECKPATCH: warning for Panel Replay fixes and clean ups
== Series Details == Series: Panel Replay fixes and clean ups URL : https://patchwork.freedesktop.org/series/132073/ State : warning == Summary == Error: dim checkpatch failed c17cab9b7282 drm/i915/psr: Add some documentation of variables used in psr code 01e4b2f7edc9 drm/i915/psr: Set intel_crtc_state->has_psr on panel replay as well -:44: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided #44: FILE: drivers/gpu/drm/i915/display/intel_psr.c:1636: + pipe_config->has_psr = pipe_config->has_panel_replay = true; total: 0 errors, 0 warnings, 1 checks, 30 lines checked 149228bf7462 drm/i915/psr: Intel_psr_pause/resume needs to support panel replay e478a4ad888e drm/i915/psr: Do not update phy power state in case of non-eDP panel replay fa2ba29d782d drm/i915/psr: Check possible errors for panel replay as well 158886c33897 drm/i915/psr: Do not write registers/bits not applicable for panel replay b13d8baa224a drm/i915/psr: Unify panel replay enable/disable sink c5757c034dac drm/i915/psr: Panel replay has to be enabled before link training -:80: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_dp' - possible side-effects? #80: FILE: drivers/gpu/drm/i915/display/intel_psr.h:24: +#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support && \ + (intel_dp)->psr.source_panel_replay_support) total: 0 errors, 0 warnings, 1 checks, 50 lines checked
✗ Fi.CI.BAT: failure for QGV/SAGV related fixes (rev10)
== Series Details == Series: QGV/SAGV related fixes (rev10) URL : https://patchwork.freedesktop.org/series/126962/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14533 -> Patchwork_126962v10 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126962v10 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126962v10, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/index.html Participating hosts (38 -> 38) -- Additional (3): bat-dg1-7 fi-glk-j4005 fi-elk-e7500 Missing(3): bat-mtlp-8 bat-dg2-11 fi-snb-2520m Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126962v10: ### IGT changes ### Possible regressions * igt@gem_exec_parallel@engines@fds: - bat-arls-2: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14533/bat-arls-2/igt@gem_exec_parallel@engi...@fds.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-arls-2/igt@gem_exec_parallel@engi...@fds.html Known issues Here are the changes found in Patchwork_126962v10 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-glk-j4005: NOTRUN -> [SKIP][3] ([i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-glk-j4005: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][5] ([i915#4083]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg1-7: NOTRUN -> [SKIP][6] ([i915#4077]) +2 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-7: NOTRUN -> [SKIP][7] ([i915#4079]) +1 other test skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][8] ([i915#6621]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][9] ([i915#4212]) +7 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-7: NOTRUN -> [SKIP][10] ([i915#4215]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-glk-j4005: NOTRUN -> [SKIP][11] +10 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/fi-glk-j4005/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg1-7: NOTRUN -> [SKIP][12] ([i915#4103] / [i915#4213]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-dg1-7: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#3840]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg1-7: NOTRUN -> [SKIP][14] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_hdmi_inject@inject-audio: - bat-dg1-7: NOTRUN -> [SKIP][15] ([i915#433]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_hdmi_inj...@inject-audio.html * igt@kms_pm_backlight@basic-brightness: - bat-dg1-7: NOTRUN -> [SKIP][16] ([i915#5354]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126962v10/bat-dg1-7/igt@kms_pm_backli...@basic-brightness.html * igt@kms_pm_rpm@basic-pci-d3-state: - fi-elk-e7500: NOTRUN -> [SKIP][17] +24 other tests skip [17]: https://intel-g
[PULL] drm-misc-next
Hi Dave, Sima,
Everyone seems to be out on vacation, so the pull request is pretty empty.
Cheers,
~Maarten
drm-misc-next-2024-04-05:
drm-misc-next for v6.10:
Core Changes:
- Fix DRM_DISPLAY_DP_HELPER dependencies.
Driver Changes:
- i2c and polling fixes to ast.
- Small fixes to panthor.
- Allow IRQ to share GPIO pins in bridge/adv7511.
The following changes since commit 39cd87c4eb2b893354f3b850f916353f2658ae6f:
Linux 6.9-rc2 (2024-03-31 14:32:39 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/misc/kernel.git
tags/drm-misc-next-2024-04-05
for you to fetch changes up to d1ef8fc18be6adbbffdee06fbb5b33699e2852be:
drm: fix DRM_DISPLAY_DP_HELPER dependencies (2024-04-04 16:20:57 +0200)
drm-misc-next for v6.10:
Core Changes:
- Fix DRM_DISPLAY_DP_HELPER dependencies.
Driver Changes:
- i2c and polling fixes to ast.
- Small fixes to panthor.
- Allow IRQ to share GPIO pins in bridge/adv7511.
Adam Ford (1):
drm/bridge: adv7511: Allow IRQ to share GPIO pins
Adrián Larumbe (1):
ABI: sysfs-driver-panfrost-profiling: fix indentation problem
Arnd Bergmann (1):
drm: fix DRM_DISPLAY_DP_HELPER dependencies
Boris Brezillon (3):
drm/panthor: Fix IO-page mmap() for 32-bit userspace on 64-bit kernel
drm/panthor: Fix ordering in _irq_suspend()
drm/panthor: Drop the dev_enter/exit() sections in
_irq_suspend/resume()
Chris Morgan (3):
dt-bindings: vendor-prefix: Add prefix for GameForce
dt-bindings: display: Add GameForce Chi Panel
drm/panel: st7703: Add GameForce Chi Panel Support
Christian Hewitt (1):
drm/meson: vclk: fix calculation of 59.94 fractional rates
Dan Carpenter (3):
drm/panthor: Fix a couple -ENOMEM error codes
drm/panthor: Fix error code in panthor_gpu_init()
drm/panthor: Fix off by one in panthor_fw_get_cs_iface()
Harshit Mogalapalli (2):
drm/panthor: Fix NULL vs IS_ERR() bug in panthor_probe()
drm/panthor: Don't return NULL from panthor_vm_get_heap_pool()
Ian Forbes (1):
drm/vmwgfx: Remove unused code
Liviu Dudau (2):
drm/panthor: Cleanup unused variable 'cookie'
drm/panthor: Fix some kerneldoc warnings
Nathan Chancellor (1):
drm/panthor: Fix clang -Wunused-but-set-variable in tick_ctx_apply()
Thomas Zimmermann (14):
Merge drm/drm-next into drm-misc-next
drm/ast: Include where necessary
drm/ast: Fail probing if DDC channel could not be initialized
drm/ast: Remove struct ast_{vga,sil165}_connector
drm/ast: Allocate instance of struct ast_i2c_chan with managed
helpers
drm/ast: Move DDC code to ast_ddc.{c,h}
drm/ast: Rename struct ast_i2c_chan to struct ast_ddc
drm/ast: Pass AST device to ast_ddc_create()
drm/ast: Store AST device in struct ast_ddc
drm/ast: Rename struct i2c_algo_bit_data callbacks and their
parameters
drm/ast: Acquire I/O-register lock in DDC code
drm/ast: Use drm_connector_helper_get_modes()
drm/ast: Implement polling for VGA and SIL164 connectors
drm/ast: Automatically clean up poll helper
.../ABI/testing/sysfs-driver-panfrost-profiling| 10 +
.../bindings/display/bridge/lvds-codec.yaml|1 +
.../bindings/display/panel/ilitek,ili9881c.yaml|1 +
.../bindings/display/panel/novatek,nt35950.yaml|3 +-
.../bindings/display/panel/novatek,nt36523.yaml| 25 +-
.../bindings/display/panel/panel-common-dual.yaml | 47 +
.../bindings/display/panel/panel-simple-dsi.yaml |2 +
.../bindings/display/panel/panel-simple.yaml |4 +
.../display/panel/rocktech,jh057n00900.yaml|2 +
.../bindings/display/panel/sony,td4353-jdi.yaml|2 +
.../bindings/gpu/arm,mali-valhall-csf.yaml | 147 +
.../devicetree/bindings/vendor-prefixes.yaml |4 +
Documentation/gpu/driver-uapi.rst |5 +
Documentation/gpu/panfrost.rst |9 +
MAINTAINERS| 183 +-
arch/m68k/include/asm/pgtable.h|2 +
arch/parisc/configs/generic-32bit_defconfig|2 +-
drivers/gpu/drm/Kconfig| 23 +-
drivers/gpu/drm/Makefile | 29 +
drivers/gpu/drm/amd/amdgpu/Kconfig | 12 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |6 +
drivers/gpu/drm/ast/Makefile | 10 +-
drivers/gpu/drm/ast/{ast_i2c.c => ast_ddc.c} | 120 +-
drivers/gpu/drm/ast/ast_ddc.h | 20 +
drivers/gpu/drm/ast/ast_drv.c |1 +
drivers/gpu/drm/ast/ast_drv.h | 39 +-
drivers/gpu/drm/ast/ast_main.c |1 +
drivers/gpu/drm/ast/ast_mode.c | 147 +-
drivers/gpu/drm/bridge/Kconf
✗ Fi.CI.SPARSE: warning for QGV/SAGV related fixes (rev10)
== Series Details == Series: QGV/SAGV related fixes (rev10) URL : https://patchwork.freedesktop.org/series/126962/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x8
[PATCH 5/8] drm/i915/psr: Check possible errors for panel replay as well
On HPD interrupt we want to check if the reason for HPD was some panel
replay error detected by monitor/panel. This is already done for PSR. We
want to do this for panel replay as well. Modify intel_psr_short_pulse to
support panel replay as well.
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_psr.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 07c1ddec2d86..d7547eefc2fa 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3256,6 +3256,13 @@ static void psr_capability_changed_check(struct intel_dp
*intel_dp)
}
}
+/*
+ * On common bits:
+ * DP_PSR_RFB_STORAGE_ERROR == DP_PANEL_REPLAY_RFB_STORAGE_ERROR
+ * DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR ==
DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR
+ * DP_PSR_LINK_CRC_ERROR == DP_PANEL_REPLAY_LINK_CRC_ERROR
+ * this function is relying on PSR definitions
+ */
void intel_psr_short_pulse(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -3265,7 +3272,7 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
DP_PSR_LINK_CRC_ERROR;
- if (!CAN_PSR(intel_dp))
+ if (!CAN_PSR(intel_dp) && !CAN_PANEL_REPLAY(intel_dp))
return;
mutex_lock(&psr->lock);
@@ -3279,12 +3286,14 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
goto exit;
}
- if (status == DP_PSR_SINK_INTERNAL_ERROR || (error_status & errors)) {
+ if ((!psr->panel_replay_enabled && status ==
DP_PSR_SINK_INTERNAL_ERROR) ||
+ (error_status & errors)) {
intel_psr_disable_locked(intel_dp);
psr->sink_not_reliable = true;
}
- if (status == DP_PSR_SINK_INTERNAL_ERROR && !error_status)
+ if (!psr->panel_replay_enabled && status == DP_PSR_SINK_INTERNAL_ERROR
&&
+ !error_status)
drm_dbg_kms(&dev_priv->drm,
"PSR sink internal error, disabling PSR\n");
if (error_status & DP_PSR_RFB_STORAGE_ERROR)
@@ -3304,8 +3313,10 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
/* clear status register */
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, error_status);
- psr_alpm_check(intel_dp);
- psr_capability_changed_check(intel_dp);
+ if (!psr->panel_replay_enabled) {
+ psr_alpm_check(intel_dp);
+ psr_capability_changed_check(intel_dp);
+ }
exit:
mutex_unlock(&psr->lock);
--
2.34.1
[PATCH 7/8] drm/i915/psr: Unify panel replay enable/disable sink
Unify enabling and disabling of psr/panel replay for a sink. Modify
intel_psr_enable_sink accordingly and use it for both cases.
v3:
- move psr2_su_region_et_valid to be check for PSR2 only
v2:
- enable panel replay for sink before link training
- write ALPM_CONFIG only for PSR
- add DP_PSR_CRC_VERIFICATION only for PSR
- take care of disable sink as well
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_ddi.c | 11 ++---
drivers/gpu/drm/i915/display/intel_psr.c | 60 +---
drivers/gpu/drm/i915/display/intel_psr.h | 2 +
3 files changed, 50 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 0654e989f45f..8a4dfd561c34 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2809,15 +2809,14 @@ static void intel_ddi_pre_enable_dp(struct
intel_atomic_state *state,
const struct drm_connector_state
*conn_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- if (HAS_DP20(dev_priv)) {
+ if (HAS_DP20(dev_priv))
intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
crtc_state);
- if (crtc_state->has_panel_replay)
- drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG,
- DP_PANEL_REPLAY_ENABLE);
- }
+
+ /* Panel replay has to be enabled in sink dpcd before link training. */
+ if (crtc_state->has_panel_replay)
+ intel_psr_enable_sink(enc_to_intel_dp(encoder), crtc_state);
if (DISPLAY_VER(dev_priv) >= 14)
mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index b7538a4405b8..4355fb02d8fd 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -638,40 +638,59 @@ static bool psr2_su_region_et_valid(struct intel_dp
*intel_dp)
return false;
}
-static void intel_psr_enable_sink(struct intel_dp *intel_dp)
+static unsigned int intel_psr_get_enable_sink_offset(struct intel_dp *intel_dp)
+{
+ return intel_dp->psr.panel_replay_enabled ?
+ PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG;
+}
+
+/*
+ * Note: Most of the bits are same in PANEL_REPLAY_CONFIG and DP_PSR_EN_CFG. We
+ * are relying on PSR definitions on these "common" bits.
+ */
+void intel_psr_enable_sink(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
u8 dpcd_val = DP_PSR_ENABLE;
- if (intel_dp->psr.panel_replay_enabled)
- return;
-
- if (intel_dp->psr.psr2_enabled) {
+ if (crtc_state->has_psr2) {
/* Enable ALPM at sink for psr2 */
- drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
- DP_ALPM_ENABLE |
- DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
+ if (!crtc_state->has_panel_replay) {
+ drm_dp_dpcd_writeb(&intel_dp->aux,
+ DP_RECEIVER_ALPM_CONFIG,
+ DP_ALPM_ENABLE |
+ DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
+
+ if (psr2_su_region_et_valid(intel_dp))
+ dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET;
+ }
dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
- if (psr2_su_region_et_valid(intel_dp))
- dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET;
} else {
if (intel_dp->psr.link_standby)
dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
- if (DISPLAY_VER(dev_priv) >= 8)
+ if (!crtc_state->has_panel_replay && DISPLAY_VER(dev_priv) >= 8)
dpcd_val |= DP_PSR_CRC_VERIFICATION;
}
- if (intel_dp->psr.req_psr2_sdp_prior_scanline)
+ if (crtc_state->has_panel_replay)
+ dpcd_val |= DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN |
+ DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN;
+
+ if (crtc_state->req_psr2_sdp_prior_scanline)
dpcd_val |= DP_PSR_SU_REGION_SCANLINE_CAPTURE;
if (intel_dp->psr.entry_setup_frames > 0)
dpcd_val |= DP_PSR_FRAME_CAPTURE;
- drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
+ drm_dp_dpcd_writeb(&intel_dp->aux,
+ intel_psr_get_enable_sink_offset(intel_dp),
+ dpcd_val);
-
[PATCH 8/8] drm/i915/psr: Panel replay has to be enabled before link training
Panel replay has to be enabled on sink side before link training. Take this
into account in fastset check and in initial fastset check.
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_display.c | 12
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_psr.c | 3 ---
drivers/gpu/drm/i915/display/intel_psr.h | 3 +++
4 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index a481c9218138..dc23312bc808 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5298,6 +5298,18 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
PIPE_CONF_CHECK_CSC(output_csc);
}
+ /*
+* Panel replay has to be enabled before link training. PSR doesn't have
+* this requirement -> check these only if using panel replay
+*/
+ if (current_config->has_panel_replay || pipe_config->has_panel_replay) {
+ PIPE_CONF_CHECK_BOOL(has_psr);
+ PIPE_CONF_CHECK_BOOL(has_psr2);
+ PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
+ PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et);
+ PIPE_CONF_CHECK_BOOL(has_panel_replay);
+ }
+
PIPE_CONF_CHECK_BOOL(double_wide);
if (dev_priv->display.dpll.mgr)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 8b67cd62f188..20f2d4d9d7b9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3386,6 +3386,14 @@ bool intel_dp_initial_fastset_check(struct intel_encoder
*encoder,
fastset = false;
}
+ if (CAN_PANEL_REPLAY(intel_dp)) {
+ drm_dbg_kms(&i915->drm,
+ "[ENCODER:%d:%s] Forcing full modeset to compute
panel replay state\n",
+ encoder->base.base.id, encoder->base.name);
+ crtc_state->uapi.mode_changed = true;
+ fastset = false;
+ }
+
return fastset;
}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 4355fb02d8fd..4db6c19731e9 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -192,9 +192,6 @@
#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
(intel_dp)->psr.source_support)
-#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support
&& \
- (intel_dp)->psr.source_panel_replay_support)
-
bool intel_encoder_can_psr(struct intel_encoder *encoder)
{
if (intel_encoder_is_dp(encoder) || encoder->type ==
INTEL_OUTPUT_DP_MST)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
b/drivers/gpu/drm/i915/display/intel_psr.h
index 2537dcb8765c..d483c85870e1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -21,6 +21,9 @@ struct intel_encoder;
struct intel_plane;
struct intel_plane_state;
+#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support
&& \
+ (intel_dp)->psr.source_panel_replay_support)
+
bool intel_encoder_can_psr(struct intel_encoder *encoder);
void intel_psr_init_dpcd(struct intel_dp *intel_dp);
void intel_psr_enable_sink(struct intel_dp *intel_dp,
--
2.34.1
[PATCH 4/8] drm/i915/psr: Do not update phy power state in case of non-eDP panel replay
Currently panel replay is supporting only main link on mode -> Do not
update phy power state for non-eDP panel replay.
Bspec: 53370
v2: use intel_dp_is_edp to differentiate
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_psr.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index bd99b9953274..07c1ddec2d86 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1930,13 +1930,16 @@ static void intel_psr_enable_locked(struct intel_dp
*intel_dp,
if (!psr_interrupt_error_check(intel_dp))
return;
- if (intel_dp->psr.panel_replay_enabled)
+ if (intel_dp->psr.panel_replay_enabled) {
drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
- else
+ } else {
drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
intel_dp->psr.psr2_enabled ? "2" : "1");
+ }
+
+ if (intel_dp_is_edp(intel_dp))
+ intel_snps_phy_update_psr_power_state(&dig_port->base, true);
- intel_snps_phy_update_psr_power_state(&dig_port->base, true);
intel_psr_enable_sink(intel_dp);
intel_psr_enable_source(intel_dp, crtc_state);
intel_dp->psr.enabled = true;
@@ -2041,7 +2044,8 @@ static void intel_psr_disable_locked(struct intel_dp
*intel_dp)
CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);
}
- intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base,
false);
+ if (intel_dp_is_edp(intel_dp))
+
intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false);
/* Panel Replay on eDP is always using ALPM aux less. */
if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
--
2.34.1
[PATCH 6/8] drm/i915/psr: Do not write registers/bits not applicable for panel replay
Bspec is saying this
mask register: Only PSR_MASK[Mask FBC modify] and PSR_MASK[Mask Hotplug]
are used in panel replay mode.
Status register: Only SRD_STATUS[SRD state] field is used in panel replay
mode.
Due to this stop writing and reading registers and bits not used by panel
replay if panel replay is used.
Bspec: 53370, 68920
v2:
- use intel_dp_is_edp with PSR_MASK register
- handle LunarLake as well
- hanle ALPM configuration as well
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_psr.c | 70 +++-
1 file changed, 45 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index d7547eefc2fa..b7538a4405b8 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -346,6 +346,9 @@ static void psr_irq_control(struct intel_dp *intel_dp)
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
u32 mask;
+ if (intel_dp->psr.panel_replay_enabled)
+ return;
+
mask = psr_irq_psr_error_bit_get(intel_dp);
if (intel_dp->psr.debug & I915_PSR_DEBUG_IRQ)
mask |= psr_irq_post_exit_bit_get(intel_dp) |
@@ -1783,7 +1786,7 @@ static void intel_psr_enable_source(struct intel_dp
*intel_dp,
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
- u32 mask;
+ u32 mask = 0;
/*
* Only HSW and BDW have PSR AUX registers that need to be setup.
@@ -1797,34 +1800,46 @@ static void intel_psr_enable_source(struct intel_dp
*intel_dp,
* mask LPSP to avoid dependency on other drivers that might block
* runtime_pm besides preventing other hw tracking issues now we
* can rely on frontbuffer tracking.
+*
+* From bspec prior LunarLake:
+* Only PSR_MASK[Mask FBC modify] and PSR_MASK[Mask Hotplug] are used in
+* panel replay mode.
+*
+* From bspec beyod LunarLake:
+* Panel Replay on DP: No bits are applicable
+* Panel Replay on eDP: All bits are applicable
*/
- mask = EDP_PSR_DEBUG_MASK_MEMUP |
- EDP_PSR_DEBUG_MASK_HPD;
+ if (DISPLAY_VER(dev_priv) < 20 || intel_dp_is_edp(intel_dp))
+ mask = EDP_PSR_DEBUG_MASK_HPD;
- /*
-* For some unknown reason on HSW non-ULT (or at least on
-* Dell Latitude E6540) external displays start to flicker
-* when PSR is enabled on the eDP. SR/PC6 residency is much
-* higher than should be possible with an external display.
-* As a workaround leave LPSP unmasked to prevent PSR entry
-* when external displays are active.
-*/
- if (DISPLAY_VER(dev_priv) >= 8 || IS_HASWELL_ULT(dev_priv))
- mask |= EDP_PSR_DEBUG_MASK_LPSP;
+ if (intel_dp_is_edp(intel_dp)) {
+ mask |= EDP_PSR_DEBUG_MASK_MEMUP;
- if (DISPLAY_VER(dev_priv) < 20)
- mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
+ /*
+* For some unknown reason on HSW non-ULT (or at least on
+* Dell Latitude E6540) external displays start to flicker
+* when PSR is enabled on the eDP. SR/PC6 residency is much
+* higher than should be possible with an external display.
+* As a workaround leave LPSP unmasked to prevent PSR entry
+* when external displays are active.
+*/
+ if (DISPLAY_VER(dev_priv) >= 8 || IS_HASWELL_ULT(dev_priv))
+ mask |= EDP_PSR_DEBUG_MASK_LPSP;
- /*
-* No separate pipe reg write mask on hsw/bdw, so have to unmask all
-* registers in order to keep the CURSURFLIVE tricks working :(
-*/
- if (IS_DISPLAY_VER(dev_priv, 9, 10))
- mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE;
+ if (DISPLAY_VER(dev_priv) < 20)
+ mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
- /* allow PSR with sprite enabled */
- if (IS_HASWELL(dev_priv))
- mask |= EDP_PSR_DEBUG_MASK_SPRITE_ENABLE;
+ /*
+* No separate pipe reg write mask on hsw/bdw, so have to
unmask all
+* registers in order to keep the CURSURFLIVE tricks working :(
+*/
+ if (IS_DISPLAY_VER(dev_priv, 9, 10))
+ mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE;
+
+ /* allow PSR with sprite enabled */
+ if (IS_HASWELL(dev_priv))
+ mask |= EDP_PSR_DEBUG_MASK_SPRITE_ENABLE;
+ }
intel_de_write(dev_priv, psr_debug_reg(dev_priv, cpu_transcoder), mask);
@@ -1843,7 +1858,8 @@ static void intel_psr_enable_source(struct intel_dp
*intel_dp,
intel_dp->psr.psr2_sel_f
[PATCH 1/8] drm/i915/psr: Add some documentation of variables used in psr code
We are adding more boolean variable into intel_psr and intel_crtc_state structs. Add some documentation about these for sake of clarity. v2: Modify has_psr + has_panel_replay to mean panel replay Signed-off-by: Jouni Högander Reviewed-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_psr.c | 16 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index eef62983e9db..45d13e042ade 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -171,6 +171,22 @@ * * The rest of the bits are more self-explanatory and/or * irrelevant for normal operation. + * + * Description of intel_crtc_state variables. has_psr, has_panel_replay and + * has_sel_update: + * + * has_psr (alone): PSR1 + * has_psr + has_sel_update: PSR2 + * has_psr + has_panel_replay:Panel Replay + * has_psr + has_panel_replay + has_sel_update: Panel Replay Selective Update + * + * Description of some intel_psr varibles. enabled, panel_replay_enabled, + * sel_update_enabled + * + * enabled (alone): PSR1 + * enabled + sel_update_enabled: PSR2 + * enabled + panel_replay_enabled:Panel Replay + * enabled + panel_replay_enabled + sel_update_enabled: Panel Replay SU */ #define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \ -- 2.34.1
[PATCH 3/8] drm/i915/psr: Intel_psr_pause/resume needs to support panel replay
Currently intel_psr_pause and intel_psr_resume do nothing in case of panel
replay. Change them to perform pause and return also in case of panel
replay.
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 10a7795cdb6f..bd99b9953274 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2104,7 +2104,7 @@ void intel_psr_pause(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_psr *psr = &intel_dp->psr;
- if (!CAN_PSR(intel_dp))
+ if (!CAN_PSR(intel_dp) && !CAN_PANEL_REPLAY(intel_dp))
return;
mutex_lock(&psr->lock);
@@ -2137,7 +2137,7 @@ void intel_psr_resume(struct intel_dp *intel_dp)
{
struct intel_psr *psr = &intel_dp->psr;
- if (!CAN_PSR(intel_dp))
+ if (!CAN_PSR(intel_dp) && !CAN_PANEL_REPLAY(intel_dp))
return;
mutex_lock(&psr->lock);
--
2.34.1
[PATCH 2/8] drm/i915/psr: Set intel_crtc_state->has_psr on panel replay as well
Current code is setting only intel_crtc_state->has_panel_replay in panel
replay case. There are lots of stuff behind intel_crtc_state->has_psr that
is needed for panel replay as well. Instead of converting each check to
has_psr || has_panel_replay set has_psr in case of panel replay as
well. Code can then differentiate between psr and panel replay by using
intel_crtc_state->has_panel_replay.
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_psr.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 45d13e042ade..10a7795cdb6f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1602,10 +1602,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
if (CAN_PANEL_REPLAY(intel_dp))
crtc_state->has_panel_replay = true;
- else
- crtc_state->has_psr = _psr_compute_config(intel_dp, crtc_state);
- if (!(crtc_state->has_panel_replay || crtc_state->has_psr))
+ crtc_state->has_psr = crtc_state->has_panel_replay ? true :
+ _psr_compute_config(intel_dp, crtc_state);
+
+ if (!crtc_state->has_psr)
return;
crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
@@ -1632,7 +1633,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,
goto unlock;
if (intel_dp->psr.panel_replay_enabled) {
- pipe_config->has_panel_replay = true;
+ pipe_config->has_psr = pipe_config->has_panel_replay = true;
} else {
/*
* Not possible to read EDP_PSR/PSR2_CTL registers as it is
@@ -2651,7 +2652,7 @@ void intel_psr_post_plane_update(struct
intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_encoder *encoder;
- if (!(crtc_state->has_psr || crtc_state->has_panel_replay))
+ if (!crtc_state->has_psr)
return;
for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
--
2.34.1
[PATCH 0/8] Panel Replay fixes and clean ups
This patch set is a subset of Panel Replay selective update support set: https://patchwork.freedesktop.org/series/128193/ It contains fixes and clean ups to current Panel Replay implementation: Several needed functions are not executed for panel replay Ensure link training follows enabling panel replay on sink side Do not update phy power state for panel replay. Do not apply workarounds not applicable for panel replay Do not write registers/bits not applicable for panel replay Unify panel replay enable/disable sink Document boolean variables used by PSR code All patches are reviewed. Sending now as a standalone set for CI results before merging. Jouni Högander (8): drm/i915/psr: Add some documentation of variables used in psr code drm/i915/psr: Set intel_crtc_state->has_psr on panel replay as well drm/i915/psr: Intel_psr_pause/resume needs to support panel replay drm/i915/psr: Do not update phy power state in case of non-eDP panel replay drm/i915/psr: Check possible errors for panel replay as well drm/i915/psr: Do not write registers/bits not applicable for panel replay drm/i915/psr: Unify panel replay enable/disable sink drm/i915/psr: Panel replay has to be enabled before link training drivers/gpu/drm/i915/display/intel_ddi.c | 11 +- drivers/gpu/drm/i915/display/intel_display.c | 12 ++ drivers/gpu/drm/i915/display/intel_dp.c | 8 + drivers/gpu/drm/i915/display/intel_psr.c | 197 +-- drivers/gpu/drm/i915/display/intel_psr.h | 5 + 5 files changed, 166 insertions(+), 67 deletions(-) -- 2.34.1
[PATCH v10 6/6] drm/i915/display: force qgv check after the hw state readout
The current intel_bw_atomic_check do not check the possbility
of a sagv configuration change after the hw state readout.
Hence cannot update the sagv configuration until some other
relevant changes like data rates, number of planes etc. happen.
Introduce a flag to force qgv check in such cases.
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_bw.c | 8 ++--
drivers/gpu/drm/i915/display/intel_bw.h | 6 ++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index 6fb228a1a28f..1b190be745a0 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -755,6 +755,7 @@ void intel_bw_crtc_update(struct intel_bw_state *bw_state,
intel_bw_crtc_data_rate(crtc_state);
bw_state->num_active_planes[crtc->pipe] =
intel_bw_crtc_num_active_planes(crtc_state);
+ bw_state->force_check_qgv = true;
drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n",
pipe_name(crtc->pipe),
@@ -1339,8 +1340,9 @@ int intel_bw_atomic_check(struct intel_atomic_state
*state)
new_bw_state = intel_atomic_get_new_bw_state(state);
if (new_bw_state &&
- intel_can_enable_sagv(i915, old_bw_state) !=
- intel_can_enable_sagv(i915, new_bw_state))
+ (intel_can_enable_sagv(i915, old_bw_state) !=
+intel_can_enable_sagv(i915, new_bw_state) ||
+new_bw_state->force_check_qgv))
changed = true;
/*
@@ -1354,6 +1356,8 @@ int intel_bw_atomic_check(struct intel_atomic_state
*state)
if (ret)
return ret;
+ new_bw_state->force_check_qgv = false;
+
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_bw.h
b/drivers/gpu/drm/i915/display/intel_bw.h
index fa1e924ec961..161813cca473 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.h
+++ b/drivers/gpu/drm/i915/display/intel_bw.h
@@ -47,6 +47,12 @@ struct intel_bw_state {
*/
u16 qgv_points_mask;
+ /*
+* Flag to force the QGV comparison in atomic check right after the
+* hw state readout
+*/
+ bool force_check_qgv;
+
int min_cdclk[I915_MAX_PIPES];
unsigned int data_rate[I915_MAX_PIPES];
u8 num_active_planes[I915_MAX_PIPES];
--
2.34.1
[PATCH v10 5/6] drm/i915/display: handle systems with duplicate psf gv points
From: Stanislav Lisovskiy
There could be multiple qgv and psf gv points with similar values.
Apparently pcode's handling og psf and qgv points are different. For
qgv case, pcode sets whatever is asked by the driver. But in case
of psf gv points, it compares the bw from points before setting the
mask. This can cause problems in scenarios where we have to disable
sagv by setting the highest bw point and there could be multiple
points with highest bw. So to set the maximum psf gv point, find
out all the points with the highest bw and set all together.
v1: - use the same treatment to qgv points as well (Vinod)
v2: - pcode confirms that for qgv points, it sets whatever the
driver sets (Vinod)
Signed-off-by: Stanislav Lisovskiy
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_bw.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index 5f4f93524bef..6fb228a1a28f 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -874,6 +874,8 @@ static unsigned int icl_max_bw_psf_gv_point_mask(struct
drm_i915_private *i915)
if (max_data_rate > max_bw) {
max_bw_point_mask = BIT(i);
max_bw = max_data_rate;
+ } else if (max_data_rate == max_bw) {
+ max_bw_point_mask |= BIT(i);
}
}
--
2.34.1
[PATCH v10 4/6] drm/i915/display: Disable SAGV on bw init, to force QGV point recalculation
From: Stanislav Lisovskiy
Problem is that on some platforms, we do get QGV point mask in wrong
state on boot. However driver assumes it is set to 0
(i.e all points allowed), however in reality we might get them all
restricted, causing issues.
Lets disable SAGV initially to force proper QGV point state.
If more QGV points are available, driver will recalculate and update
those then after next commit.
v2: - Added trace to see which QGV/PSF GV point is used when SAGV is
disabled.
v3: - Move force disable function to intel_bw_init in order to initialize
bw state as well, so that hw/sw are immediately in sync after init.
v4: - Don't try sending PCode request, seems like it is not possible at
intel_bw_init, however assigning bw->state to be restricted as if
SAGV is off, still forces driveer to send PCode request anyway on
next modeset, so the solution still works.
However we still need to address the case, when no display is
connected, which anyway requires much more changes.
v5: - Put PCode request back and apply temporary hack to make the
request succeed(in case if there 2 PSF GV points with same BW, PCode
accepts only if both points are restricted/unrestricted same time)
- Fix argument sequence for adl_qgv_bw(Ville Syrjälä)
v6: - Fix wrong platform checks, not to break everything else.
v7: - Split the handling of quplicate QGV/PSF GV points (Vinod)
Restrict force disable to display version below 14 (Vinod)
v8: - Simplify icl_force_disable_sagv (Vinod)
Signed-off-by: Stanislav Lisovskiy
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_bw.c | 50 ++--
drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
drivers/gpu/drm/i915/display/skl_watermark.h | 1 +
3 files changed, 49 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index 4fed84869e09..5f4f93524bef 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -162,7 +162,9 @@ int icl_pcode_restrict_qgv_points(struct drm_i915_private
*dev_priv,
1);
if (ret < 0) {
- drm_err(&dev_priv->drm, "Failed to disable qgv points (%d)
points: 0x%x\n", ret, points_mask);
+ drm_err(&dev_priv->drm,
+ "Failed to disable qgv points (0x%x) points: 0x%x\n",
+ ret, points_mask);
return ret;
}
@@ -859,6 +861,41 @@ static u16 icl_prepare_qgv_points_mask(struct
drm_i915_private *i915,
ADLS_PCODE_REQ_PSF_PT(psf_points)) & icl_qgv_points_mask(i915);
}
+static unsigned int icl_max_bw_psf_gv_point_mask(struct drm_i915_private *i915)
+{
+ unsigned int num_psf_gv_points =
i915->display.bw.max[0].num_psf_gv_points;
+ unsigned int max_bw_point_mask = 0;
+ unsigned int max_bw = 0;
+ int i;
+
+ for (i = 0; i < num_psf_gv_points; i++) {
+ unsigned int max_data_rate = adl_psf_bw(i915, i);
+
+ if (max_data_rate > max_bw) {
+ max_bw_point_mask = BIT(i);
+ max_bw = max_data_rate;
+ }
+ }
+
+ return max_bw_point_mask;
+}
+
+static void icl_force_disable_sagv(struct drm_i915_private *i915,
+ struct intel_bw_state *bw_state)
+{
+ unsigned int qgv_points = icl_max_bw_qgv_point_mask(i915, 0);
+ unsigned int psf_points = icl_max_bw_psf_gv_point_mask(i915);
+
+ bw_state->qgv_points_mask = icl_prepare_qgv_points_mask(i915,
+ qgv_points,
+ psf_points);
+
+ drm_dbg_kms(&i915->drm, "Forcing SAGV disable: mask 0x%x\n",
+ bw_state->qgv_points_mask);
+
+ icl_pcode_restrict_qgv_points(i915, bw_state->qgv_points_mask);
+}
+
static int mtl_find_qgv_points(struct drm_i915_private *i915,
unsigned int data_rate,
unsigned int num_active_planes,
@@ -1341,7 +1378,7 @@ static const struct intel_global_state_funcs
intel_bw_funcs = {
.atomic_destroy_state = intel_bw_destroy_state,
};
-int intel_bw_init(struct drm_i915_private *dev_priv)
+int intel_bw_init(struct drm_i915_private *i915)
{
struct intel_bw_state *state;
@@ -1349,8 +1386,15 @@ int intel_bw_init(struct drm_i915_private *dev_priv)
if (!state)
return -ENOMEM;
- intel_atomic_global_obj_init(dev_priv, &dev_priv->display.bw.obj,
+ intel_atomic_global_obj_init(i915, &i915->display.bw.obj,
&state->base, &intel_bw_funcs);
+ /*
+* Limit this only if we have SAGV. And for Display version 14 onwards
+* sagv is handled though pmdemand requests
+*/
+
[PATCH v10 3/6] drm/i915/display: extract code to prepare qgv points mask
Extract the code to prepare the QGV points mask as per the
format expected by the pcode as this could be utlized from
multiple points.
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_bw.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index c00094e5f11c..4fed84869e09 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -851,6 +851,14 @@ static unsigned int icl_max_bw_qgv_point_mask(struct
drm_i915_private *i915,
return max_bw_point_mask;
}
+static u16 icl_prepare_qgv_points_mask(struct drm_i915_private *i915,
+ unsigned int qgv_points,
+ unsigned int psf_points)
+{
+ return ~(ICL_PCODE_REQ_QGV_PT(qgv_points) |
+ADLS_PCODE_REQ_PSF_PT(psf_points)) & icl_qgv_points_mask(i915);
+}
+
static int mtl_find_qgv_points(struct drm_i915_private *i915,
unsigned int data_rate,
unsigned int num_active_planes,
@@ -994,11 +1002,9 @@ static int icl_find_qgv_points(struct drm_i915_private
*i915,
* We store the ones which need to be masked as that is what PCode
* actually accepts as a parameter.
*/
- new_bw_state->qgv_points_mask =
- ~(ICL_PCODE_REQ_QGV_PT(qgv_points) |
- ADLS_PCODE_REQ_PSF_PT(psf_points)) &
- icl_qgv_points_mask(i915);
-
+ new_bw_state->qgv_points_mask = icl_prepare_qgv_points_mask(i915,
+ qgv_points,
+ psf_points);
/*
* If the actual mask had changed we need to make sure that
* the commits are serialized(in case this is a nomodeset, nonblocking)
--
2.34.1
[PATCH v10 1/6] drm/i915/display: Add meaningful traces for QGV point info error handling
From: Stanislav Lisovskiy
For debug purposes we need those - error path won't flood the log,
however there has been already numerous cases, when due to lack
of debugs, we couldn't immediately tell what was the problem on
customer machine, which slowed down the investigation, requiring
to get access to target device and adding those traces manually.
v2: - Make the debug more generic and move it to intel_dram_detect
(Gustavo Sousa)
v3: - Use %u for unsigned variable in debug prints (Gustavo)
Reviewed-by: Gustavo Sousa
Signed-off-by: Stanislav Lisovskiy
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_bw.c | 4 +++-
drivers/gpu/drm/i915/soc/intel_dram.c | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index 7f2a50b4f494..77886cc21211 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -290,8 +290,10 @@ static int icl_get_qgv_points(struct drm_i915_private
*dev_priv,
struct intel_qgv_point *sp = &qi->points[i];
ret = intel_read_qgv_point_info(dev_priv, sp, i);
- if (ret)
+ if (ret) {
+ drm_dbg_kms(&dev_priv->drm, "Could not read QGV %d
info\n", i);
return ret;
+ }
drm_dbg_kms(&dev_priv->drm,
"QGV %d: DCLK=%d tRP=%d tRDPRE=%d tRAS=%d tRCD=%d
tRC=%d\n",
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c
b/drivers/gpu/drm/i915/soc/intel_dram.c
index 15492b69f698..e3287f1de774 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -681,6 +681,8 @@ void intel_dram_detect(struct drm_i915_private *i915)
if (ret)
return;
+ drm_dbg_kms(&i915->drm, "Num qgv points %u\n",
dram_info->num_qgv_points);
+
drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
drm_dbg_kms(&i915->drm, "Watermark level 0 adjustment needed: %s\n",
--
2.34.1
[PATCH v10 2/6] drm/i915/display: Extract code required to calculate max qgv/psf gv point
From: Stanislav Lisovskiy
We need that in order to force disable SAGV in next patch.
Also it is beneficial to separate that code, as in majority cases,
when SAGV is enabled, we don't even need those calculations.
Also we probably need to determine max PSF GV point as well, however
currently we don't do that when we disable SAGV, which might be
actually causing some issues in that case.
v2: - Introduce helper adl_qgv_bw(counterpart to adl_psf_bw)
(Ville Syrjälä)
- Don't restrict psf gv points for SAGV disable case
(Ville Syrjälä)
v3: - Update icl_max_bw_qgv_point_mask to return max qgv point
mask (Vinod)
v4: - Minor changes in icl_find_qgv_points (Vinod)
Signed-off-by: Stanislav Lisovskiy
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_bw.c | 80 +++--
1 file changed, 50 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index 77886cc21211..c00094e5f11c 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -661,6 +661,22 @@ static unsigned int adl_psf_bw(struct drm_i915_private
*dev_priv,
return bi->psf_bw[psf_gv_point];
}
+static unsigned int icl_qgv_bw(struct drm_i915_private *i915,
+ int num_active_planes, int qgv_point)
+{
+ unsigned int idx;
+
+ if (DISPLAY_VER(i915) >= 12)
+ idx = tgl_max_bw_index(i915, num_active_planes, qgv_point);
+ else
+ idx = icl_max_bw_index(i915, num_active_planes, qgv_point);
+
+ if (idx >= ARRAY_SIZE(i915->display.bw.max))
+ return 0;
+
+ return i915->display.bw.max[idx].deratedbw[qgv_point];
+}
+
void intel_bw_init_hw(struct drm_i915_private *dev_priv)
{
if (!HAS_DISPLAY(dev_priv))
@@ -806,6 +822,35 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state)
return to_intel_bw_state(bw_state);
}
+static unsigned int icl_max_bw_qgv_point_mask(struct drm_i915_private *i915,
+ int num_active_planes)
+{
+ unsigned int num_qgv_points = i915->display.bw.max[0].num_qgv_points;
+ unsigned int max_bw_point_mask = 0;
+ unsigned int max_bw = 0;
+ int i;
+
+ for (i = 0; i < num_qgv_points; i++) {
+ unsigned int max_data_rate =
+ icl_qgv_bw(i915, num_active_planes, i);
+
+ /*
+* We need to know which qgv point gives us
+* maximum bandwidth in order to disable SAGV
+* if we find that we exceed SAGV block time
+* with watermarks. By that moment we already
+* have those, as it is calculated earlier in
+* intel_atomic_check,
+*/
+ if (max_data_rate > max_bw) {
+ max_bw_point_mask = BIT(i);
+ max_bw = max_data_rate;
+ }
+ }
+
+ return max_bw_point_mask;
+}
+
static int mtl_find_qgv_points(struct drm_i915_private *i915,
unsigned int data_rate,
unsigned int num_active_planes,
@@ -883,8 +928,6 @@ static int icl_find_qgv_points(struct drm_i915_private
*i915,
const struct intel_bw_state *old_bw_state,
struct intel_bw_state *new_bw_state)
{
- unsigned int max_bw_point = 0;
- unsigned int max_bw = 0;
unsigned int num_psf_gv_points =
i915->display.bw.max[0].num_psf_gv_points;
unsigned int num_qgv_points = i915->display.bw.max[0].num_qgv_points;
u16 psf_points = 0;
@@ -897,31 +940,8 @@ static int icl_find_qgv_points(struct drm_i915_private
*i915,
return ret;
for (i = 0; i < num_qgv_points; i++) {
- unsigned int idx;
- unsigned int max_data_rate;
-
- if (DISPLAY_VER(i915) >= 12)
- idx = tgl_max_bw_index(i915, num_active_planes, i);
- else
- idx = icl_max_bw_index(i915, num_active_planes, i);
-
- if (idx >= ARRAY_SIZE(i915->display.bw.max))
- continue;
-
- max_data_rate = i915->display.bw.max[idx].deratedbw[i];
-
- /*
-* We need to know which qgv point gives us
-* maximum bandwidth in order to disable SAGV
-* if we find that we exceed SAGV block time
-* with watermarks. By that moment we already
-* have those, as it is calculated earlier in
-* intel_atomic_check,
-*/
- if (max_data_rate > max_bw) {
- max_bw_point = i;
- max_bw = max_data_rate;
- }
+ unsigned int max_data_rate = icl_qgv_bw(i915,
+
[PATCH v10 0/6] QGV/SAGV related fixes
We have couple of customer issues, related to SAGV/QGV point calculation. Those patches contain fixes plus some additional debugs for those issues. Stanislav Lisovskiy (4): drm/i915/display: Add meaningful traces for QGV point info error handling drm/i915/display: Extract code required to calculate max qgv/psf gv point drm/i915/display: Disable SAGV on bw init, to force QGV point recalculation drm/i915/display: handle systems with duplicate psf gv points Vinod Govindapillai (2): drm/i915/display: extract code to prepare qgv points mask drm/i915/display: force qgv check after the hw state readout drivers/gpu/drm/i915/display/intel_bw.c | 160 ++- drivers/gpu/drm/i915/display/intel_bw.h | 6 + drivers/gpu/drm/i915/display/skl_watermark.c | 2 +- drivers/gpu/drm/i915/display/skl_watermark.h | 1 + drivers/gpu/drm/i915/soc/intel_dram.c| 2 + 5 files changed, 129 insertions(+), 42 deletions(-) -- 2.34.1
RE: [PATCH v5 08/19] drm/i915/psr: Unify panel replay enable/disable sink
> -Original Message-
> From: Hogander, Jouni
> Sent: Wednesday, April 3, 2024 2:30 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v5 08/19] drm/i915/psr: Unify panel replay enable/disable
> sink
>
> Unify enabling and disabling of psr/panel replay for a sink. Modify
> intel_psr_enable_sink accordingly and use it for both cases.
>
> v3:
> - move psr2_su_region_et_valid to be check for PSR2 only
> v2:
> - enable panel replay for sink before link training
> - write ALPM_CONFIG only for PSR
> - add DP_PSR_CRC_VERIFICATION only for PSR
> - take care of disable sink as well
>
> Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 11 ++---
> drivers/gpu/drm/i915/display/intel_psr.c | 60 +---
> drivers/gpu/drm/i915/display/intel_psr.h | 2 +
> 3 files changed, 50 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index a3d3d4942eb1..4cdc218653b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2809,15 +2809,14 @@ static void intel_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
> const struct drm_connector_state
> *conn_state) {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> - struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> - if (HAS_DP20(dev_priv)) {
> + if (HAS_DP20(dev_priv))
> intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
> crtc_state);
> - if (crtc_state->has_panel_replay)
> - drm_dp_dpcd_writeb(&intel_dp->aux,
> PANEL_REPLAY_CONFIG,
> -DP_PANEL_REPLAY_ENABLE);
> - }
> +
> + /* Panel replay has to be enabled in sink dpcd before link training. */
> + if (crtc_state->has_panel_replay)
> + intel_psr_enable_sink(enc_to_intel_dp(encoder), crtc_state);
>
> if (DISPLAY_VER(dev_priv) >= 14)
> mtl_ddi_pre_enable_dp(state, encoder, crtc_state,
> conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index b7538a4405b8..4355fb02d8fd 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -638,40 +638,59 @@ static bool psr2_su_region_et_valid(struct intel_dp
> *intel_dp)
> return false;
> }
>
> -static void intel_psr_enable_sink(struct intel_dp *intel_dp)
> +static unsigned int intel_psr_get_enable_sink_offset(struct intel_dp
> +*intel_dp) {
> + return intel_dp->psr.panel_replay_enabled ?
> + PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG;
> +}
> +
> +/*
> + * Note: Most of the bits are same in PANEL_REPLAY_CONFIG and
> +DP_PSR_EN_CFG. We
> + * are relying on PSR definitions on these "common" bits.
> + */
> +void intel_psr_enable_sink(struct intel_dp *intel_dp,
> +const struct intel_crtc_state *crtc_state)
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> u8 dpcd_val = DP_PSR_ENABLE;
>
> - if (intel_dp->psr.panel_replay_enabled)
> - return;
> -
> - if (intel_dp->psr.psr2_enabled) {
> + if (crtc_state->has_psr2) {
> /* Enable ALPM at sink for psr2 */
> - drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_RECEIVER_ALPM_CONFIG,
> -DP_ALPM_ENABLE |
> -
> DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
> + if (!crtc_state->has_panel_replay) {
> + drm_dp_dpcd_writeb(&intel_dp->aux,
> +DP_RECEIVER_ALPM_CONFIG,
> +DP_ALPM_ENABLE |
> +
> DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
> +
> + if (psr2_su_region_et_valid(intel_dp))
> + dpcd_val |=
> DP_PSR_ENABLE_SU_REGION_ET;
> + }
>
> dpcd_val |= DP_PSR_ENABLE_PSR2 |
> DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
> - if (psr2_su_region_et_valid(intel_dp))
> - dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET;
> } else {
> if (intel_dp->psr.link_standby)
> dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
>
> - if (DISPLAY_VER(dev_priv) >= 8)
> + if (!crtc_state->has_panel_replay && DISPLAY_VER(dev_priv)
> >= 8)
> dpcd_val |= DP_PSR_CRC_VERIFICATION;
> }
>
> - if (intel_dp->psr.req_psr2_sdp_prior_scanline)
> + if (crtc_state->has_panel_replay)
> + dpcd_val |=
> DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN |
> + DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN;
> +
> + if (crtc_state->req_psr2_sdp_prior_scanline)
> dpcd_val |= DP_PSR_SU_REGION_SCANLINE_CAPTURE;
>
> if (in
RE: [PATCH v5 06/19] drm/i915/psr: Do not write registers/bits not applicable for panel replay
> -Original Message-
> From: Hogander, Jouni
> Sent: Wednesday, April 3, 2024 2:30 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v5 06/19] drm/i915/psr: Do not write registers/bits not
> applicable for panel replay
>
> Bspec is saying this
> mask register: Only PSR_MASK[Mask FBC modify] and PSR_MASK[Mask
> Hotplug] are used in panel replay mode.
>
> Status register: Only SRD_STATUS[SRD state] field is used in panel replay
> mode.
>
> Due to this stop writing and reading registers and bits not used by panel
> replay if panel replay is used.
>
> Bspec: 53370, 68920
>
> v2:
> - use intel_dp_is_edp with PSR_MASK register
> - handle LunarLake as well
> - hanle ALPM configuration as well
>
> Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 70 +++-
> 1 file changed, 45 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index d7547eefc2fa..b7538a4405b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -346,6 +346,9 @@ static void psr_irq_control(struct intel_dp *intel_dp)
> enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
> u32 mask;
>
> + if (intel_dp->psr.panel_replay_enabled)
> + return;
> +
> mask = psr_irq_psr_error_bit_get(intel_dp);
> if (intel_dp->psr.debug & I915_PSR_DEBUG_IRQ)
> mask |= psr_irq_post_exit_bit_get(intel_dp) | @@ -1783,7
> +1786,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
> - u32 mask;
> + u32 mask = 0;
>
> /*
>* Only HSW and BDW have PSR AUX registers that need to be setup.
> @@ -1797,34 +1800,46 @@ static void intel_psr_enable_source(struct
> intel_dp *intel_dp,
>* mask LPSP to avoid dependency on other drivers that might block
>* runtime_pm besides preventing other hw tracking issues now we
>* can rely on frontbuffer tracking.
> + *
> + * From bspec prior LunarLake:
> + * Only PSR_MASK[Mask FBC modify] and PSR_MASK[Mask Hotplug]
> are used in
> + * panel replay mode.
> + *
> + * From bspec beyod LunarLake:
> + * Panel Replay on DP: No bits are applicable
> + * Panel Replay on eDP: All bits are applicable
>*/
> - mask = EDP_PSR_DEBUG_MASK_MEMUP |
> -EDP_PSR_DEBUG_MASK_HPD;
> + if (DISPLAY_VER(dev_priv) < 20 || intel_dp_is_edp(intel_dp))
> + mask = EDP_PSR_DEBUG_MASK_HPD;
>
> - /*
> - * For some unknown reason on HSW non-ULT (or at least on
> - * Dell Latitude E6540) external displays start to flicker
> - * when PSR is enabled on the eDP. SR/PC6 residency is much
> - * higher than should be possible with an external display.
> - * As a workaround leave LPSP unmasked to prevent PSR entry
> - * when external displays are active.
> - */
> - if (DISPLAY_VER(dev_priv) >= 8 || IS_HASWELL_ULT(dev_priv))
> - mask |= EDP_PSR_DEBUG_MASK_LPSP;
> + if (intel_dp_is_edp(intel_dp)) {
> + mask |= EDP_PSR_DEBUG_MASK_MEMUP;
>
> - if (DISPLAY_VER(dev_priv) < 20)
> - mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
> + /*
> + * For some unknown reason on HSW non-ULT (or at least on
> + * Dell Latitude E6540) external displays start to flicker
> + * when PSR is enabled on the eDP. SR/PC6 residency is much
> + * higher than should be possible with an external display.
> + * As a workaround leave LPSP unmasked to prevent PSR
> entry
> + * when external displays are active.
> + */
> + if (DISPLAY_VER(dev_priv) >= 8 ||
> IS_HASWELL_ULT(dev_priv))
> + mask |= EDP_PSR_DEBUG_MASK_LPSP;
>
> - /*
> - * No separate pipe reg write mask on hsw/bdw, so have to unmask
> all
> - * registers in order to keep the CURSURFLIVE tricks working :(
> - */
> - if (IS_DISPLAY_VER(dev_priv, 9, 10))
> - mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE;
> + if (DISPLAY_VER(dev_priv) < 20)
> + mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
>
> - /* allow PSR with sprite enabled */
> - if (IS_HASWELL(dev_priv))
> - mask |= EDP_PSR_DEBUG_MASK_SPRITE_ENABLE;
> + /*
> + * No separate pipe reg write mask on hsw/bdw, so have to
> unmask all
> + * registers in order to keep the CURSURFLIVE tricks working
> :(
> + */
> + if (IS_DISPLAY_VER(dev_priv, 9, 10))
> + mask |= EDP_PSR_DEBUG_MASK_DISP_REG_WRITE;
> +
> + /* allow PSR
RE: [PATCH v5 04/19] drm/i915/psr: Do not update phy power state in case of non-eDP panel replay
> -Original Message-
> From: Hogander, Jouni
> Sent: Wednesday, April 3, 2024 2:30 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v5 04/19] drm/i915/psr: Do not update phy power state in
> case of non-eDP panel replay
>
> Currently panel replay is supporting only main link on mode -> Do not update
> phy power state for non-eDP panel replay.
>
> Bspec: 53370
>
> v2: use intel_dp_is_edp to differentiate
>
> Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 12
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index bd99b9953274..07c1ddec2d86 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1930,13 +1930,16 @@ static void intel_psr_enable_locked(struct
> intel_dp *intel_dp,
> if (!psr_interrupt_error_check(intel_dp))
> return;
>
> - if (intel_dp->psr.panel_replay_enabled)
> + if (intel_dp->psr.panel_replay_enabled) {
> drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
> - else
> + } else {
> drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
> intel_dp->psr.psr2_enabled ? "2" : "1");
> + }
> +
> + if (intel_dp_is_edp(intel_dp))
> + intel_snps_phy_update_psr_power_state(&dig_port->base,
> true);
>
> - intel_snps_phy_update_psr_power_state(&dig_port->base, true);
> intel_psr_enable_sink(intel_dp);
> intel_psr_enable_source(intel_dp, crtc_state);
> intel_dp->psr.enabled = true;
> @@ -2041,7 +2044,8 @@ static void intel_psr_disable_locked(struct intel_dp
> *intel_dp)
>CLKGATE_DIS_MISC_DMASC_GATING_DIS,
> 0);
> }
>
> -
> intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)
> ->base, false);
> + if (intel_dp_is_edp(intel_dp))
> +
> +intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)-
> >base,
> +false);
>
> /* Panel Replay on eDP is always using ALPM aux less. */
> if (intel_dp->psr.panel_replay_enabled &&
> intel_dp_is_edp(intel_dp)) {
> --
> 2.34.1
