[Intel-gfx] [PATCH] drm/i915/adl_s: Add gmbus pin mapping
Add table to map the GMBUS pin pairs to GPIO registers and port to DDC mapping for ADL_S as per below Bspec. Bspec:20124, 53597. Cc: Aditya Swarup Cc: Matt Roper Cc: Lucas De Marchi Signed-off-by: Anand Moon --- drivers/gpu/drm/i915/display/intel_gmbus.c | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c index 0c952e1d720e..58b8e42d4f90 100644 --- a/drivers/gpu/drm/i915/display/intel_gmbus.c +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c @@ -52,6 +52,14 @@ static const struct gmbus_pin gmbus_pins[] = { [GMBUS_PIN_DPD] = { "dpd", GPIOF }, }; +static const struct gmbus_pin gmbus_pins_adls[] = { + [GMBUS_PIN_1_BXT] = { "edp", GPIOA }, + [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOD }, + [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOE }, + [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOF }, + [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOG }, +}; + static const struct gmbus_pin gmbus_pins_bdw[] = { [GMBUS_PIN_VGADDC] = { "vga", GPIOA }, [GMBUS_PIN_DPC] = { "dpc", GPIOD }, @@ -101,7 +109,9 @@ static const struct gmbus_pin gmbus_pins_dg1[] = { static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *dev_priv, unsigned int pin) { - if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) + if (INTEL_PCH_TYPE(dev_priv) == PCH_ADP) + return _pins_adls[pin]; + else if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) return _pins_dg1[pin]; else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) return _pins_icp[pin]; @@ -122,7 +132,9 @@ bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv, { unsigned int size; - if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) + if (INTEL_PCH_TYPE(dev_priv) == PCH_ADP) + size = ARRAY_SIZE(gmbus_pins_adls); + else if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) size = ARRAY_SIZE(gmbus_pins_dg1); else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) size = ARRAY_SIZE(gmbus_pins_icp); -- 2.30.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gem: Add a check for object size for corner cases
Add check for object size to return appropriate error -E2BIG or -EINVAL to avoid WARM_ON and sucessfull return for some testcase. Cc: Chris Wilson Cc: Matthew Auld Signed-off-by: Anand Moon --- VLK-17702: Since these object size is U64 these corner case will not come into real test senario. IGT testcase: sudo ./gem_create --r create-massive sudo ./gem_userptr_blits --r input-checking --- drivers/gpu/drm/i915/gem/i915_gem_object.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h index 366d23afbb1a..afc37546da20 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -33,6 +33,9 @@ static inline bool i915_gem_object_size_2big(u64 size) { struct drm_i915_gem_object *obj; + if (size == -1 || size == (-1ull << 32)) + return true; + if (GEM_CHECK_SIZE_OVERFLOW(size)) return true; -- 2.30.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/adl_s: ADL-S platform Update PCI ids for Mobile BGA
As per Bspec: 53655 Update PCI ids for Mobile BGA. Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: David Airlie Cc: Daniel Vetter Signed-off-by: Anand Moon diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index ebd0dd1c35b3..3be25768321d 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -640,6 +640,8 @@ INTEL_VGA_DEVICE(0x4681, info), \ INTEL_VGA_DEVICE(0x4682, info), \ INTEL_VGA_DEVICE(0x4683, info), \ + INTEL_VGA_DEVICE(0x4688, info), \ + INTEL_VGA_DEVICE(0x4689, info), \ INTEL_VGA_DEVICE(0x4690, info), \ INTEL_VGA_DEVICE(0x4691, info), \ INTEL_VGA_DEVICE(0x4692, info), \ -- 2.30.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx