Re: [Intel-gfx] [PATCH libdrm] headers: Sync with drm-next
On Thu, Apr 11, 2019 at 07:20:32AM +0100, Eric Engestrom wrote:
> On Wednesday, 2019-04-10 21:49:33 -0400, Rob Clark wrote:
> > On Tue, Apr 9, 2019 at 8:27 AM Eric Engestrom
> > wrote:
> > > > > diff --git a/include/drm/msm_drm.h b/include/drm/msm_drm.h
> > > > > index c06d0a5..91a16b3 100644
> > > > > --- a/include/drm/msm_drm.h
> > > > > +++ b/include/drm/msm_drm.h
> > > > > @@ -105,14 +105,24 @@ struct drm_msm_gem_new {
> > > > > __u32 handle; /* out */
> > > > > };
> > > > >
> > > > > -#define MSM_INFO_IOVA 0x01
> > > > > -
> > > > > -#define MSM_INFO_FLAGS (MSM_INFO_IOVA)
> > > > > +/* Get or set GEM buffer info. The requested value can be passed
> > > > > + * directly in 'value', or for data larger than 64b 'value' is a
> > > > > + * pointer to userspace buffer, with 'len' specifying the number of
> > > > > + * bytes copied into that buffer. For info returned by pointer,
> > > > > + * calling the GEM_INFO ioctl with null 'value' will return the
> > > > > + * required buffer size in 'len'
> > > > > + */
> > > > > +#define MSM_INFO_GET_OFFSET0x00 /* get mmap() offset,
> > > > > returned by value */
> > > > > +#define MSM_INFO_GET_IOVA 0x01 /* get iova, returned by value */
> > > > > +#define MSM_INFO_SET_NAME 0x02 /* set the debug name (by pointer)
> > > > > */
> > > > > +#define MSM_INFO_GET_NAME 0x03 /* get debug name, returned by
> > > > > pointer */
> > > > >
> > > > > struct drm_msm_gem_info {
> > > > > __u32 handle; /* in */
> > > > > - __u32 flags; /* in - combination of MSM_INFO_* flags */
> > > > > - __u64 offset; /* out, mmap() offset or iova */
> > > > > + __u32 info; /* in - one of MSM_INFO_* */
> > > > > + __u64 value; /* in or out */
> > > > > + __u32 len;/* in or out */
> > > > > + __u32 pad;
> > >
> > > freedreno/msm/msm_bo.c needs to be updated to reflect those changes.
> >
> >
> > I think you can just rename flags->info and offset->value, the rest of
> > the struct should be zero-initialized.. if in doubt you can check
> > $mesa/src/freedreno/drm/msm_bo.c
> >
> > side-note: the libdrm_freedreno code was folded into mesa in 19.0, so
> > at *some* point we can probably disable libdrm_freedreno build by
> > default.
>
> Right now, freedreno's `auto` enables it by default on arm and disables it on
> everything else.
>
> I always enable everything to at least build-test it, but Ayan was using
> the defaults which is why he didn't see this issue at first.
>
> Btw, the GitLab CI builds everything, so it hopefully won't bitrot unnoticed.
My bad, I was not aware that there is repo of libdrm in gitlab when I
submitted my v1 patch. I have taken care of it in my v2 patch ([PATCH
libdrm v2] headers: Sync with drm-next) and have also raised a merge
request
(https://gitlab.freedesktop.org/ayan.halder/drm/merge_requests/1/diffs)
to execute the gitlab ci tools.
Please be requested to have a look at my v2 patch.
>
> > (I'd kinda still like to keep the code around for some misc
> > standalone tools I have, but that is the sort of thing where I can fix
> > libdrm if it gets broken). When to switch to disabled by default I
> > guess comes down to how long we want to support mesa 18.x with latest
> > libdrm?? Maybe after 19.1, since (selfishly motivated) that gives me
> > a long enough window back in case I find myself needing to bisect for
> > some regression..
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH libdrm] headers: Sync with drm-next
On Wed, Apr 10, 2019 at 09:49:33PM -0400, Rob Clark wrote:
> On Tue, Apr 9, 2019 at 8:27 AM Eric Engestrom
> wrote:
> >
> > On Tuesday, 2019-04-09 12:59:13 +0100, Eric Engestrom wrote:
> > > On Tuesday, 2019-04-09 11:35:14 +, Ayan Halder wrote:
> > > > Generated using make headers_install from the drm-next
> > > > tree - git://anongit.freedesktop.org/drm/drm
> > > > branch - drm-next
> > > > commit - 14d2bd53a47a7e1cb3e03d00a6b952734cf90f3f
> > > >
> > > > The changes were as follows :-
> > > >
> > > > core: (drm.h, drm_fourcc.h, drm_mode.h)
> > > > - Added 'struct drm_syncobj_transfer', 'struct
> > > > drm_syncobj_timeline_wait' and 'struct drm_syncobj_timeline_array'
> > > > - Added various DRM_IOCTL_SYNCOBJ_ ioctls
> > > > - Added some new RGB and YUV formats
> > > > - Added 'DRM_FORMAT_MOD_VENDOR_ALLWINNER'
> > > > - Added 'SAMSUNG' and Arm's 'AFBC' and 'ALLWINNER' format modifiers
> > > > - Added 'struct drm_mode_rect'
> > > >
> > > > i915:
> > > > - Added struct 'struct i915_user_extension' and various 'struct
> > > > drm_i915_gem_context_'
> > > > - Added different modes of per-process Graphics Translation Table
> > > >
> > > > msm:
> > > > - Added various get or set GEM buffer info flags
> > > > - Added some MSM_SUBMIT_BO_ macros
> > > > - Modified 'struct drm_msm_gem_info'
> > > >
> > > > Signed-off-by: Ayan Kumar halder
> > >
> > > This looks sane, and applies cleanly :)
> > > Acked-by: Eric Engestrom
> >
> > Actually, revoking that, as this patch breaks the build; see below.
> >
> > >
> > > > ---
> > > > include/drm/drm.h| 36 +++
> > > > include/drm/drm_fourcc.h | 136 +++
> > > > include/drm/drm_mode.h | 23 -
> > > > include/drm/i915_drm.h | 237
> > > > ---
> > > > include/drm/msm_drm.h| 25 +++--
> > > > 5 files changed, 415 insertions(+), 42 deletions(-)
> > > >
> > [snip]
> > > > diff --git a/include/drm/msm_drm.h b/include/drm/msm_drm.h
> > > > index c06d0a5..91a16b3 100644
> > > > --- a/include/drm/msm_drm.h
> > > > +++ b/include/drm/msm_drm.h
> > > > @@ -105,14 +105,24 @@ struct drm_msm_gem_new {
> > > > __u32 handle; /* out */
> > > > };
> > > >
> > > > -#define MSM_INFO_IOVA 0x01
> > > > -
> > > > -#define MSM_INFO_FLAGS (MSM_INFO_IOVA)
> > > > +/* Get or set GEM buffer info. The requested value can be passed
> > > > + * directly in 'value', or for data larger than 64b 'value' is a
> > > > + * pointer to userspace buffer, with 'len' specifying the number of
> > > > + * bytes copied into that buffer. For info returned by pointer,
> > > > + * calling the GEM_INFO ioctl with null 'value' will return the
> > > > + * required buffer size in 'len'
> > > > + */
> > > > +#define MSM_INFO_GET_OFFSET0x00 /* get mmap() offset,
> > > > returned by value */
> > > > +#define MSM_INFO_GET_IOVA 0x01 /* get iova, returned by value */
> > > > +#define MSM_INFO_SET_NAME 0x02 /* set the debug name (by pointer) */
> > > > +#define MSM_INFO_GET_NAME 0x03 /* get debug name, returned by
> > > > pointer */
> > > >
> > > > struct drm_msm_gem_info {
> > > > __u32 handle; /* in */
> > > > - __u32 flags; /* in - combination of MSM_INFO_* flags */
> > > > - __u64 offset; /* out, mmap() offset or iova */
> > > > + __u32 info; /* in - one of MSM_INFO_* */
> > > > + __u64 value; /* in or out */
> > > > + __u32 len;/* in or out */
> > > > + __u32 pad;
> >
> > freedreno/msm/msm_bo.c needs to be updated to reflect those changes.
>
>
> I think you can just rename flags->info and offset->value, the rest of
> the struct should be zero-initialized.. if in doubt you can check
> $mesa/src/freedreno/drm/msm_bo.c
Sorry, I had dropped the changes to 'msm_drm.h' in my v2 patch (which
I had sent 10th April, 2019 titled '[PATCH libdrm v2] headers: Sync
with drm-next ') as I wasn't sure about the changes.
>
> side-note: the libdrm_freedreno code was folded into mesa in 19.
[Intel-gfx] [PATCH libdrm v2] headers: Sync with drm-next
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 14d2bd53a47a7e1cb3e03d00a6b952734cf90f3f
The changes were as follows :-
core: (drm.h, drm_fourcc.h, drm_mode.h)
- Added 'struct drm_syncobj_transfer', 'struct drm_syncobj_timeline_wait' and
'struct drm_syncobj_timeline_array'
- Added various DRM_IOCTL_SYNCOBJ_ ioctls
- Added some new RGB and YUV formats
- Added 'DRM_FORMAT_MOD_VENDOR_ALLWINNER'
- Added 'SAMSUNG' and Arm's 'AFBC' and 'ALLWINNER' format modifiers
- Added 'struct drm_mode_rect'
i915:
- Added struct 'struct i915_user_extension' and various 'struct
drm_i915_gem_context_'
- Added different modes of per-process Graphics Translation Table
Changes from v1:-
- Removed the changes to 'msm_drm.h' as it breaks the build for 'freedreno'
platform.
Signed-off-by: Ayan Kumar halder
/-- Note to reviewer:-
Please ignore the previous patch in this email thread.
--/
---
include/drm/drm.h| 36 +++
include/drm/drm_fourcc.h | 136 +++
include/drm/drm_mode.h | 23 -
include/drm/i915_drm.h | 237 ---
4 files changed, 396 insertions(+), 36 deletions(-)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 85c685a..c893f3b 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -729,8 +729,18 @@ struct drm_syncobj_handle {
__u32 pad;
};
+struct drm_syncobj_transfer {
+ __u32 src_handle;
+ __u32 dst_handle;
+ __u64 src_point;
+ __u64 dst_point;
+ __u32 flags;
+ __u32 pad;
+};
+
#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
+#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point
to become available */
struct drm_syncobj_wait {
__u64 handles;
/* absolute timeout */
@@ -741,12 +751,33 @@ struct drm_syncobj_wait {
__u32 pad;
};
+struct drm_syncobj_timeline_wait {
+ __u64 handles;
+ /* wait on specific timeline point for every handles*/
+ __u64 points;
+ /* absolute timeout */
+ __s64 timeout_nsec;
+ __u32 count_handles;
+ __u32 flags;
+ __u32 first_signaled; /* only valid when not waiting all */
+ __u32 pad;
+};
+
+
struct drm_syncobj_array {
__u64 handles;
__u32 count_handles;
__u32 pad;
};
+struct drm_syncobj_timeline_array {
+ __u64 handles;
+ __u64 points;
+ __u32 count_handles;
+ __u32 pad;
+};
+
+
/* Query current scanout sequence number */
struct drm_crtc_get_sequence {
__u32 crtc_id; /* requested crtc_id */
@@ -903,6 +934,11 @@ extern "C" {
#define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct
drm_mode_get_lease)
#define DRM_IOCTL_MODE_REVOKE_LEASEDRM_IOWR(0xC9, struct
drm_mode_revoke_lease)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAITDRM_IOWR(0xCA, struct
drm_syncobj_timeline_wait)
+#define DRM_IOCTL_SYNCOBJ_QUERYDRM_IOWR(0xCB, struct
drm_syncobj_timeline_array)
+#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct
drm_syncobj_transfer)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct
drm_syncobj_timeline_array)
+
/**
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x9f.
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index 139632b..3feeaa3 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -144,6 +144,17 @@ extern "C" {
#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0]
R:G:B:A 10:10:10:2 little endian */
#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0]
B:G:R:A 10:10:10:2 little endian */
+/*
+ * Floating point 64bpp RGB
+ * IEEE 754-2008 binary16 half-precision float
+ * [15:0] sign:exponent:mantissa 1:5:10
+ */
+#define DRM_FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0]
x:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0]
x:B:G:R 16:16:16:16 little endian */
+
+#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0]
A:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0]
A:B:G:R 16:16:16:16 little endian */
+
/* packed YCbCr */
#define DRM_FORMAT_YUYVfourcc_code('Y', 'U', 'Y', 'V') /*
[31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
#define DRM_FORMAT_YVYUfourcc_code('Y', 'V', 'Y', 'U') /*
[31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
@@ -151,6 +162,52 @@ extern "C" {
#define DRM_FORMAT_VYUYfourcc_code('V', 'Y', 'U', 'Y') /*
[31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUVfourcc_code('A', 'Y', 'U', 'V') /*
[31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
+#define
[Intel-gfx] [PATCH libdrm v2] headers: Sync with drm-next
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 14d2bd53a47a7e1cb3e03d00a6b952734cf90f3f
The changes were as follows :-
core: (drm.h, drm_fourcc.h, drm_mode.h)
- Added 'struct drm_syncobj_transfer', 'struct drm_syncobj_timeline_wait' and
'struct drm_syncobj_timeline_array'
- Added various DRM_IOCTL_SYNCOBJ_ ioctls
- Added some new RGB and YUV formats
- Added 'DRM_FORMAT_MOD_VENDOR_ALLWINNER'
- Added 'SAMSUNG' and Arm's 'AFBC' and 'ALLWINNER' format modifiers
- Added 'struct drm_mode_rect'
i915:
- Added struct 'struct i915_user_extension' and various 'struct
drm_i915_gem_context_'
- Added different modes of per-process Graphics Translation Table
Changes from v2:-
- Removed the changes to 'msm_drm.h' as it breaks the build for 'freedreno'
platform.
Change-Id: Ibfa8d4ceceae6f5bdc9d5f6b7ac658864ec03fc1
Signed-off-by: Ayan Kumar halder
---
include/drm/drm.h| 36 +++
include/drm/drm_fourcc.h | 136 +++
include/drm/drm_mode.h | 23 -
include/drm/i915_drm.h | 237 ---
4 files changed, 396 insertions(+), 36 deletions(-)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 85c685a..c893f3b 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -729,8 +729,18 @@ struct drm_syncobj_handle {
__u32 pad;
};
+struct drm_syncobj_transfer {
+ __u32 src_handle;
+ __u32 dst_handle;
+ __u64 src_point;
+ __u64 dst_point;
+ __u32 flags;
+ __u32 pad;
+};
+
#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
+#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point
to become available */
struct drm_syncobj_wait {
__u64 handles;
/* absolute timeout */
@@ -741,12 +751,33 @@ struct drm_syncobj_wait {
__u32 pad;
};
+struct drm_syncobj_timeline_wait {
+ __u64 handles;
+ /* wait on specific timeline point for every handles*/
+ __u64 points;
+ /* absolute timeout */
+ __s64 timeout_nsec;
+ __u32 count_handles;
+ __u32 flags;
+ __u32 first_signaled; /* only valid when not waiting all */
+ __u32 pad;
+};
+
+
struct drm_syncobj_array {
__u64 handles;
__u32 count_handles;
__u32 pad;
};
+struct drm_syncobj_timeline_array {
+ __u64 handles;
+ __u64 points;
+ __u32 count_handles;
+ __u32 pad;
+};
+
+
/* Query current scanout sequence number */
struct drm_crtc_get_sequence {
__u32 crtc_id; /* requested crtc_id */
@@ -903,6 +934,11 @@ extern "C" {
#define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct
drm_mode_get_lease)
#define DRM_IOCTL_MODE_REVOKE_LEASEDRM_IOWR(0xC9, struct
drm_mode_revoke_lease)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAITDRM_IOWR(0xCA, struct
drm_syncobj_timeline_wait)
+#define DRM_IOCTL_SYNCOBJ_QUERYDRM_IOWR(0xCB, struct
drm_syncobj_timeline_array)
+#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct
drm_syncobj_transfer)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct
drm_syncobj_timeline_array)
+
/**
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x9f.
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index 139632b..3feeaa3 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -144,6 +144,17 @@ extern "C" {
#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0]
R:G:B:A 10:10:10:2 little endian */
#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0]
B:G:R:A 10:10:10:2 little endian */
+/*
+ * Floating point 64bpp RGB
+ * IEEE 754-2008 binary16 half-precision float
+ * [15:0] sign:exponent:mantissa 1:5:10
+ */
+#define DRM_FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0]
x:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0]
x:B:G:R 16:16:16:16 little endian */
+
+#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0]
A:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0]
A:B:G:R 16:16:16:16 little endian */
+
/* packed YCbCr */
#define DRM_FORMAT_YUYVfourcc_code('Y', 'U', 'Y', 'V') /*
[31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
#define DRM_FORMAT_YVYUfourcc_code('Y', 'V', 'Y', 'U') /*
[31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
@@ -151,6 +162,52 @@ extern "C" {
#define DRM_FORMAT_VYUYfourcc_code('V', 'Y', 'U', 'Y') /*
[31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUVfourcc_code('A', 'Y', 'U', 'V') /*
[31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
+#define DRM_FORMAT_XYUVfourcc_code('X', 'Y', 'U',
[Intel-gfx] [PATCH libdrm] headers: Sync with drm-next
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 14d2bd53a47a7e1cb3e03d00a6b952734cf90f3f
The changes were as follows :-
core: (drm.h, drm_fourcc.h, drm_mode.h)
- Added 'struct drm_syncobj_transfer', 'struct drm_syncobj_timeline_wait' and
'struct drm_syncobj_timeline_array'
- Added various DRM_IOCTL_SYNCOBJ_ ioctls
- Added some new RGB and YUV formats
- Added 'DRM_FORMAT_MOD_VENDOR_ALLWINNER'
- Added 'SAMSUNG' and Arm's 'AFBC' and 'ALLWINNER' format modifiers
- Added 'struct drm_mode_rect'
i915:
- Added struct 'struct i915_user_extension' and various 'struct
drm_i915_gem_context_'
- Added different modes of per-process Graphics Translation Table
msm:
- Added various get or set GEM buffer info flags
- Added some MSM_SUBMIT_BO_ macros
- Modified 'struct drm_msm_gem_info'
Signed-off-by: Ayan Kumar halder
---
include/drm/drm.h| 36 +++
include/drm/drm_fourcc.h | 136 +++
include/drm/drm_mode.h | 23 -
include/drm/i915_drm.h | 237 ---
include/drm/msm_drm.h| 25 +++--
5 files changed, 415 insertions(+), 42 deletions(-)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 85c685a..c893f3b 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -729,8 +729,18 @@ struct drm_syncobj_handle {
__u32 pad;
};
+struct drm_syncobj_transfer {
+ __u32 src_handle;
+ __u32 dst_handle;
+ __u64 src_point;
+ __u64 dst_point;
+ __u32 flags;
+ __u32 pad;
+};
+
#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
+#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point
to become available */
struct drm_syncobj_wait {
__u64 handles;
/* absolute timeout */
@@ -741,12 +751,33 @@ struct drm_syncobj_wait {
__u32 pad;
};
+struct drm_syncobj_timeline_wait {
+ __u64 handles;
+ /* wait on specific timeline point for every handles*/
+ __u64 points;
+ /* absolute timeout */
+ __s64 timeout_nsec;
+ __u32 count_handles;
+ __u32 flags;
+ __u32 first_signaled; /* only valid when not waiting all */
+ __u32 pad;
+};
+
+
struct drm_syncobj_array {
__u64 handles;
__u32 count_handles;
__u32 pad;
};
+struct drm_syncobj_timeline_array {
+ __u64 handles;
+ __u64 points;
+ __u32 count_handles;
+ __u32 pad;
+};
+
+
/* Query current scanout sequence number */
struct drm_crtc_get_sequence {
__u32 crtc_id; /* requested crtc_id */
@@ -903,6 +934,11 @@ extern "C" {
#define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct
drm_mode_get_lease)
#define DRM_IOCTL_MODE_REVOKE_LEASEDRM_IOWR(0xC9, struct
drm_mode_revoke_lease)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAITDRM_IOWR(0xCA, struct
drm_syncobj_timeline_wait)
+#define DRM_IOCTL_SYNCOBJ_QUERYDRM_IOWR(0xCB, struct
drm_syncobj_timeline_array)
+#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct
drm_syncobj_transfer)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct
drm_syncobj_timeline_array)
+
/**
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x9f.
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index 139632b..3feeaa3 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -144,6 +144,17 @@ extern "C" {
#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0]
R:G:B:A 10:10:10:2 little endian */
#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0]
B:G:R:A 10:10:10:2 little endian */
+/*
+ * Floating point 64bpp RGB
+ * IEEE 754-2008 binary16 half-precision float
+ * [15:0] sign:exponent:mantissa 1:5:10
+ */
+#define DRM_FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0]
x:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0]
x:B:G:R 16:16:16:16 little endian */
+
+#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0]
A:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0]
A:B:G:R 16:16:16:16 little endian */
+
/* packed YCbCr */
#define DRM_FORMAT_YUYVfourcc_code('Y', 'U', 'Y', 'V') /*
[31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
#define DRM_FORMAT_YVYUfourcc_code('Y', 'V', 'Y', 'U') /*
[31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
@@ -151,6 +162,52 @@ extern "C" {
#define DRM_FORMAT_VYUYfourcc_code('V', 'Y', 'U', 'Y') /*
[31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUVfourcc_code('A', 'Y', 'U', 'V') /*
[31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
+#define DRM_FORMAT_XYUVfourcc_code('X',
[Intel-gfx] [PATCH libdrm] headers: Sync with drm-next
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 14d2bd53a47a7e1cb3e03d00a6b952734cf90f3f
The changes were as follows :-
core: (drm.h, drm_fourcc.h, drm_mode.h)
- Added 'struct drm_syncobj_transfer', 'struct drm_syncobj_timeline_wait' and
'struct drm_syncobj_timeline_array'
- Added various DRM_IOCTL_SYNCOBJ_ ioctls
- Added some new RGB and YUV formats
- Added 'DRM_FORMAT_MOD_VENDOR_ALLWINNER'
- Added 'SAMSUNG' and Arm's 'AFBC' and 'ALLWINNER' format modifiers
- Added 'struct drm_mode_rect'
i915:
- Added struct 'struct i915_user_extension' and various 'struct
drm_i915_gem_context_'
- Added different modes of per-process Graphics Translation Table
msm:
- Added various get or set GEM buffer info flags
- Added some MSM_SUBMIT_BO_ macros
- Modified 'struct drm_msm_gem_info'
Signed-off-by: Ayan Kumar halder
---
include/drm/drm.h| 36 +++
include/drm/drm_fourcc.h | 136 +++
include/drm/drm_mode.h | 23 -
include/drm/i915_drm.h | 237 ---
include/drm/msm_drm.h| 25 +++--
5 files changed, 415 insertions(+), 42 deletions(-)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 85c685a..c893f3b 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -729,8 +729,18 @@ struct drm_syncobj_handle {
__u32 pad;
};
+struct drm_syncobj_transfer {
+__u32 src_handle;
+__u32 dst_handle;
+__u64 src_point;
+__u64 dst_point;
+__u32 flags;
+__u32 pad;
+};
+
#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
+#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point
to become available */
struct drm_syncobj_wait {
__u64 handles;
/* absolute timeout */
@@ -741,12 +751,33 @@ struct drm_syncobj_wait {
__u32 pad;
};
+struct drm_syncobj_timeline_wait {
+__u64 handles;
+/* wait on specific timeline point for every handles*/
+__u64 points;
+/* absolute timeout */
+__s64 timeout_nsec;
+__u32 count_handles;
+__u32 flags;
+__u32 first_signaled; /* only valid when not waiting all */
+__u32 pad;
+};
+
+
struct drm_syncobj_array {
__u64 handles;
__u32 count_handles;
__u32 pad;
};
+struct drm_syncobj_timeline_array {
+__u64 handles;
+__u64 points;
+__u32 count_handles;
+__u32 pad;
+};
+
+
/* Query current scanout sequence number */
struct drm_crtc_get_sequence {
__u32 crtc_id;/* requested crtc_id */
@@ -903,6 +934,11 @@ extern "C" {
#define DRM_IOCTL_MODE_GET_LEASEDRM_IOWR(0xC8, struct drm_mode_get_lease)
#define DRM_IOCTL_MODE_REVOKE_LEASEDRM_IOWR(0xC9, struct drm_mode_revoke_lease)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAITDRM_IOWR(0xCA, struct
drm_syncobj_timeline_wait)
+#define DRM_IOCTL_SYNCOBJ_QUERYDRM_IOWR(0xCB, struct
drm_syncobj_timeline_array)
+#define DRM_IOCTL_SYNCOBJ_TRANSFERDRM_IOWR(0xCC, struct drm_syncobj_transfer)
+#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNALDRM_IOWR(0xCD, struct
drm_syncobj_timeline_array)
+
/**
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x9f.
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index 139632b..3feeaa3 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -144,6 +144,17 @@ extern "C" {
#define DRM_FORMAT_RGBA1010102fourcc_code('R', 'A', '3', '0') /* [31:0]
R:G:B:A 10:10:10:2 little endian */
#define DRM_FORMAT_BGRA1010102fourcc_code('B', 'A', '3', '0') /* [31:0]
B:G:R:A 10:10:10:2 little endian */
+/*
+ * Floating point 64bpp RGB
+ * IEEE 754-2008 binary16 half-precision float
+ * [15:0] sign:exponent:mantissa 1:5:10
+ */
+#define DRM_FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0]
x:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0]
x:B:G:R 16:16:16:16 little endian */
+
+#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0]
A:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0]
A:B:G:R 16:16:16:16 little endian */
+
/* packed YCbCr */
#define DRM_FORMAT_YUYVfourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0
8:8:8:8 little endian */
#define DRM_FORMAT_YVYUfourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0
8:8:8:8 little endian */
@@ -151,6 +162,52 @@ extern "C" {
#define DRM_FORMAT_VYUYfourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0
8:8:8:8 little endian */
#define DRM_FORMAT_AYUVfourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr
8:8:8:8 little endian */
+#define DRM_FORMAT_XYUVfourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr
8:8:8:8 little endian */
+#define DRM_FORMAT_VUY888fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y
8:8:8 little endian */
+#define DRM_FORMAT_VUY101010fourcc_code('V', 'U', '3', '0') /* Y followed by U
then V, 10:10:10. Non-linear modifier only */
+
+/*
+ * packed Y2xx indicate for each
Re: [Intel-gfx] [PATCH] drm/fourcc: Fix conflicting Y41x definitions
On Tue, Mar 19, 2019 at 01:17:02PM +0100, Maarten Lankhorst wrote:
> There has unfortunately been a conflict with the following 3 commits:
>
> commit e9961ab95af81b8d29054361cd5f0c575102cf87
> Author: Ayan Kumar Halder
> Date: Fri Nov 9 17:21:12 2018 +
> drm: Added a new format DRM_FORMAT_XVYU2101010
>
> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
> Author: Brian Starkey
> Date: Fri Oct 5 10:27:00 2018 +0100
>
> drm/fourcc: Add AFBC yuv fourccs for Mali
>
> and
>
> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
> Author: Swati Sharma
> Date: Mon Mar 4 17:26:33 2019 +0530
>
> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
>
> Unfortunately gcc didn't warn about the redefinitions, because the
>
> Fix this by using new XYVU for i915, without alpha, and making the
> Y41x definitions match msdn, with alpha.
>
> Fortunately we caught it early, and the conflict hasn't even landed in
> drm-next yet.
>
> Signed-off-by: Maarten Lankhorst
> Cc: Brian Starkey
> Cc: Swati Sharma
> Cc: Ayan Kumar Halder
> Cc: mal...@foss.arm.com
> Cc: Daniel Vetter
> Cc: Maxime Ripard
> Cc: Sean Paul
> Cc: Dave Airlie
> Cc: Liviu Dudau
> ---
> drivers/gpu/drm/drm_fourcc.c | 12 +--
> drivers/gpu/drm/i915/intel_display.c | 18 -
> drivers/gpu/drm/i915/intel_sprite.c | 30 ++--
> include/uapi/drm/drm_fourcc.h| 21 +--
> 4 files changed, 41 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index b914b16db9b2..6ea55fb4526d 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -229,17 +229,17 @@ const struct drm_format_info *__drm_format_info(u32
> format)
> { .format = DRM_FORMAT_UYVY,.depth = 0,
> .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_VYUY,.depth = 0,
> .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_XYUV,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y210,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_VUY888, .depth = 0,
> .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y410,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true,
> .is_yuv = true },
> { .format = DRM_FORMAT_AYUV,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true,
> .is_yuv = true },
> - { .format = DRM_FORMAT_XVYU2101010, .depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y210,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y212,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y216,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y410,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y412,.depth = 0,
> .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y416,.depth = 0,
> .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y410,.depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true,
> .is_yuv = true },
> + { .format = DRM_FORMAT_Y412,.depth = 0,
> .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true,
> .is_yuv = true },
> + { .format = DRM_FORMAT_Y416,.depth = 0,
> .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true,
> .is_yuv = true },
> + { .format = DRM_FORMAT_XVYU2101010, .depth = 0,
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_XVYU12_16161616, .depth = 0,
> .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_XVYU16161616,.depth = 0,
> .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y0L0,.depth = 0,
> .num_planes = 1,
>
Re: [Intel-gfx] [PATCH 5/5] drm/sun4i: Substitute sun4i_backend_format_is_yuv() with format->is_yuv
On Wed, Jul 18, 2018 at 01:15:40PM +0300, Ville Syrj?l? wrote:
Hi Ville,
> On Tue, Jul 17, 2018 at 06:13:46PM +0100, Ayan Kumar Halder wrote:
> > drm_format_info table has a field 'is_yuv' to denote if the format
> > is yuv or not. The driver is expected to use this instead of
> > having a function for the same purpose.
> >
> > Signed-off-by: Ayan Kumar halder
> > ---
> > drivers/gpu/drm/sun4i/sun4i_backend.c | 12 +++-
> > 1 file changed, 3 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
> > b/drivers/gpu/drm/sun4i/sun4i_backend.c
> > index de0a76d..d7950b5 100644
> > --- a/drivers/gpu/drm/sun4i/sun4i_backend.c
> > +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
> > @@ -86,12 +86,6 @@ static inline bool
> > sun4i_backend_format_is_packed_yuv422(uint32_t format)
> > }
> > }
> >
> > -static inline bool sun4i_backend_format_is_yuv(uint32_t format)
> > -{
> > - return sun4i_backend_format_is_planar_yuv(format) ||
> > - sun4i_backend_format_is_packed_yuv422(format);
> > -}
>
> sun4i_backend_format_is_planar_yuv() is now unused so could be nuked.
> Also the one remaining use of sun4i_backend_format_is_packed_yuv422()
> could be replaced with 'is_yuv && num_planes == 1', so that one could
> be easily killed off ass well.
I will have this in a separate patch.
> > -
> > static void sun4i_backend_apply_color_correction(struct sunxi_engine
> > *engine)
> > {
> > int i;
> > @@ -304,7 +298,7 @@ int sun4i_backend_update_layer_formats(struct
> > sun4i_backend *backend,
> >SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN,
> >val);
> >
> > - if (sun4i_backend_format_is_yuv(fb->format->format))
> > + if (fb->format->is_yuv)
> > return sun4i_backend_update_yuv_format(backend, layer, plane);
> >
> > ret = sun4i_backend_drm_format_to_layer(fb->format->format, );
> > @@ -384,7 +378,7 @@ int sun4i_backend_update_layer_buffer(struct
> > sun4i_backend *backend,
> > */
> > paddr -= PHYS_OFFSET;
> >
> > - if (sun4i_backend_format_is_yuv(fb->format->format))
> > + if (fb->format->is_yuv)
> > return sun4i_backend_update_yuv_buffer(backend, fb, paddr);
> >
> > /* Write the 32 lower bits of the address (in bits) */
> > @@ -502,7 +496,7 @@ static int sun4i_backend_atomic_check(struct
> > sunxi_engine *engine,
> > if (fb->format->has_alpha || (plane_state->alpha !=
> > DRM_BLEND_ALPHA_OPAQUE))
> > num_alpha_planes++;
> >
> > - if (sun4i_backend_format_is_yuv(fb->format->format)) {
> > + if (fb->format->is_yuv) {
> > DRM_DEBUG_DRIVER("Plane FB format is YUV\n");
> > num_yuv_planes++;
> > }
> > --
> > 2.7.4
> >
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrj?l?
> Intel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Query about INTEL modifiers referred in intel_display.c
Hi,
I was going through drivers/gpu/drm/i915/intel_display.c to get an
understanding about how framebuffer modifiers are used in the drm
subsystem.
I could see the following in intel_framebuffer_init(),
(added in commit 2e2adb0573)
<< some code >>
switch (mode_cmd->modifier[0]) {
case I915_FORMAT_MOD_Y_TILED_CCS:
case I915_FORMAT_MOD_Yf_TILED_CCS:
switch (mode_cmd->pixel_format) {
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ABGR:
case DRM_FORMAT_XRGB:
case DRM_FORMAT_ARGB:
break;
default:
DRM_DEBUG_KMS("RC supported only with RGB formats\n");
goto err;
}
<< some code >>
And I see the following intel_primary_plane_format_mod_supported() -->
skl_mod_supported()
(added in commit 714244e280)
<< some code >>
switch (format) {
case DRM_FORMAT_XRGB:
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ARGB:
case DRM_FORMAT_ABGR:
if (modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_CCS)
return true;
<< some code >>
Is it a case of duplicacy? If we are checking for valid
combination of formats and modifiers in intel_framebuffer_init(), then why do
we
need to check it again in skl_mod_supported()?
Can we just check the valid combination only in
skl_mod_supported() and not in intel_framebuffer_init() ?
Please let me know if I misunderstood something.
Thanks,
Ayan Kumar Halder
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
