Re: [Intel-gfx] [PATCH v5] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled
On 6/21/2018 11:43 AM, Kumar, Abhay wrote: + Wenkai -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Abhay Kumar Sent: Tuesday, June 19, 2018 3:01 PM To: intel-gfx@lists.freedesktop.org; Syrjala, Ville Cc: Nikula, Jani Subject: [Intel-gfx] [PATCH v5] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled From: Ville Syrjälä CDCLK has to be at least twice the BLCK regardless of audio. Audio driver has to probe using this hook and increase the clock even in absence of any display. v2: Use atomic refcount for get_power, put_power so that we can call each once(Abhay). v3: Reset power well 2 to avoid any transaction on iDisp link during cdclk change(Abhay). v4: Remove Power well 2 reset workaround(Ville). v5: Remove unwanted Power well 2 register defined in v4(Abhay). Signed-off-by: Ville Syrjälä Signed-off-by: Abhay Kumar Tested-by: Wenkai Du --- drivers/gpu/drm/i915/i915_drv.h | 3 ++ drivers/gpu/drm/i915/intel_audio.c | 67 +--- drivers/gpu/drm/i915/intel_cdclk.c | 29 +--- drivers/gpu/drm/i915/intel_display.c | 7 +++- drivers/gpu/drm/i915/intel_drv.h | 2 ++ 5 files changed, 83 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6104d7115054..a4a386a5db69 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1702,6 +1702,7 @@ struct drm_i915_private { unsigned int hpll_freq; unsigned int fdi_pll_freq; unsigned int czclk_freq; + u32 get_put_refcount; struct { /* @@ -1719,6 +1720,8 @@ struct drm_i915_private { struct intel_cdclk_state actual; /* The current hardware cdclk state */ struct intel_cdclk_state hw; + + int force_min_cdclk; } cdclk; /** diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 3ea566f99450..ca8f04c7cbb3 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c @@ -618,7 +618,6 @@ void intel_audio_codec_enable(struct intel_encoder *encoder, if (!connector->eld[0]) return; - DRM_DEBUG_DRIVER("ELD on [CONNECTOR:%d:%s], [ENCODER:%d:%s]\n", connector->base.id, connector->name, @@ -713,14 +712,74 @@ void intel_init_audio_hooks(struct drm_i915_private *dev_priv) } } +static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv, + bool enable) +{ + struct drm_modeset_acquire_ctx ctx; + struct drm_atomic_state *state; + int ret; + + drm_modeset_acquire_init(&ctx, 0); + state = drm_atomic_state_alloc(&dev_priv->drm); + if (WARN_ON(!state)) + return; + + state->acquire_ctx = &ctx; + +retry: + to_intel_atomic_state(state)->modeset = true; + to_intel_atomic_state(state)->cdclk.force_min_cdclk = + enable ? 2 * 96000 : 0; + + /* +* Protects dev_priv->cdclk.force_min_cdclk +* Need to lock this here in case we have no active pipes +* and thus wouldn't lock it during the commit otherwise. +*/ + ret = drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex, &ctx); + if (!ret) + ret = drm_atomic_commit(state); + + if (ret == -EDEADLK) { + drm_atomic_state_clear(state); + drm_modeset_backoff(&ctx); + goto retry; + } + + WARN_ON(ret); + + drm_atomic_state_put(state); + + drm_modeset_drop_locks(&ctx); + drm_modeset_acquire_fini(&ctx); +} + static void i915_audio_component_get_power(struct device *kdev) { - intel_display_power_get(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO); + struct drm_i915_private *dev_priv = kdev_to_i915(kdev); + + dev_priv->get_put_refcount++; + + /* Force cdclk to 2*BCLK during first time get power call */ + if (dev_priv->get_put_refcount == 1) + if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) + glk_force_audio_cdclk(dev_priv, true); + + intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO); } static void i915_audio_component_put_power(struct device *kdev) { - intel_display_power_put(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO); + struct drm_i915_private *dev_priv = kdev_to_i915(kdev); + + dev_priv->get_put_refcount--; + + /* Force required cdclk during last time put power call */ + if (dev_priv->get_put_refcount == 0) + if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) + glk_force_audio_cdclk(dev_priv, false); + + intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO); } static void i915_audio_component_codec
Re: [Intel-gfx] [PATCH] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled
On 4/29/2018 1:39 PM, Abhay Kumar wrote: CDCLK has to be at least twice the BLCK regardless of audio. Audio driver has to probe using this hook and increase the clock even in absence of any display. Signed-off-by: Ville Syrjälä Signed-off-by: Abhay Kumar Tested-by: Wenkai Du Thanks, Wenkai --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_audio.c | 46 drivers/gpu/drm/i915/intel_cdclk.c | 34 +++--- drivers/gpu/drm/i915/intel_display.c | 7 +- drivers/gpu/drm/i915/intel_drv.h | 1 + 5 files changed, 63 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 193176bcddf5..34c31ef0761e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1708,6 +1708,8 @@ struct drm_i915_private { struct intel_cdclk_state actual; /* The current hardware cdclk state */ struct intel_cdclk_state hw; + + int force_min_cdclk; } cdclk; /** diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 3ea566f99450..f001fcf05d3a 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c @@ -594,6 +594,7 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder, I915_WRITE(aud_config, tmp); } + /** * intel_audio_codec_enable - Enable the audio codec for HD audio * @encoder: encoder on which to enable audio @@ -713,6 +714,48 @@ void intel_init_audio_hooks(struct drm_i915_private *dev_priv) } } +static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv, + bool enable) +{ + struct drm_modeset_acquire_ctx ctx; + struct drm_atomic_state *state; + int ret; + + drm_modeset_acquire_init(&ctx, 0); + state = drm_atomic_state_alloc(&dev_priv->drm); + if (WARN_ON(!state)) + return; + + state->acquire_ctx = &ctx; + +retry: + to_intel_atomic_state(state)->modeset = true; + to_intel_atomic_state(state)->cdclk.force_min_cdclk = + enable ? 2 * 96000 : 0; + + /* +* Protects dev_priv->cdclk.force_min_cdclk +* Need to lock this here in case we have no active pipes +* and thus wouldn't lock it during the commit otherwise. +*/ + ret = drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex, &ctx); + if (!ret) + ret = drm_atomic_commit(state); + + if (ret == -EDEADLK) { + drm_atomic_state_clear(state); + drm_modeset_backoff(&ctx); + goto retry; + } + + WARN_ON(ret); + + drm_atomic_state_put(state); + + drm_modeset_drop_locks(&ctx); + drm_modeset_acquire_fini(&ctx); +} + static void i915_audio_component_get_power(struct device *kdev) { intel_display_power_get(kdev_to_i915(kdev), POWER_DOMAIN_AUDIO); @@ -732,6 +775,9 @@ static void i915_audio_component_codec_wake_override(struct device *kdev, if (!IS_GEN9(dev_priv)) return; + if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) + glk_force_audio_cdclk(dev_priv, true); + i915_audio_component_get_power(kdev); /* diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index ebca83a44d9b..4086730018f9 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -2141,24 +2141,6 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state) } /* -* According to BSpec, "The CD clock frequency must be at least twice -* the frequency of the Azalia BCLK." and BCLK is 96 MHz by default. -* -* FIXME: Check the actual, not default, BCLK being used. -* -* FIXME: This does not depend on ->has_audio because the higher CDCLK -* is required for audio probe, also when there are no audio capable -* displays connected at probe time. This leads to unnecessarily high -* CDCLK when audio is not required. -* -* FIXME: This limit is only applied when there are displays connected -* at probe time. If we probe without displays, we'll still end up using -* the platform minimum CDCLK, failing audio probe. -*/ - if (INTEL_GEN(dev_priv) >= 9) - min_cdclk = max(2 * 96000, min_cdclk); - - /* * On Valleyview some DSI panels lose (v|h)sync when the clock is lower * than 32KHz. */ @@ -2195,7 +2177,7 @@ static int intel_compute_min_cdclk(struct drm_atomic_state *state) intel_state->min_cdclk[i] = min_cdclk; } - min_cdclk = 0; + min_cdclk = intel_state->cdclk.force_min_cdclk; for_each_pip
Re: [Intel-gfx] [PATCH v3] drm/i915: set minimum CD clock to twice the BCLK.
On 4/17/2018 12:17 PM, Kumar, Abhay wrote: On 4/17/2018 12:06 PM, Abhay Kumar wrote: In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup. This result in no audio forever as cdclk is < 96Mhz. This change will ensure CD clock to be twice of BCLK. v2: - Address comment (Jani) - New design approach v3: - Typo fix on top of v1 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937 Signed-off-by: Abhay Kumar Reviewed-by: Wenkai Du Tested-by: Wenkai Du Regards, Wenkai --- drivers/gpu/drm/i915/intel_cdclk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index dc7db8a2caf8..6e93af4a46ea 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -2143,7 +2143,7 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock frequency must be at least twice * the frequency of the Azalia BCLK." and BCLK is 96 MHz by default. */ - if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9) + if (INTEL_GEN(dev_priv) >= 9) min_cdclk = max(2 * 96000, min_cdclk); /* Hi Ville, Jani, Since right version of this patch is taking time(doing modeset and cdclk bump) as we need to poke sound driver. Can we please get this v3(same as v1 with typo fix in comment) version of patch merged. This works all the time and will unblock Audio and lot of folks. without this patch audio card is not getting detected at all and blocking basic audio feature. Regards, Abhay ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/audio: Fix audio detection issue on GLK
On 4/17/2018 11:22 AM, Gaurav K Singh wrote: On Geminilake, sometimes audio card is not getting detected after reboot. This is a spurious issue happening on Geminilake. HW codec and HD audio controller link was going out of sync for which there was a fix in i915 driver but was not getting invoked for GLK. Extending this fix to GLK as well. Tested by Du,Wenkai on GLK board. Bspec: 21829 v2: Instead of checking GEN9_BC, BXT and GLK macros, use IS_GEN9 macro (Jani N) Signed-off-by: Gaurav K Singh Reviewed-by: Abhay Kumar Reviewed-by: Wenkai Du Tested-by: Wenkai Du Regards, Wenkai --- drivers/gpu/drm/i915/intel_audio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 656f6c931341..3ea566f99450 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c @@ -729,7 +729,7 @@ static void i915_audio_component_codec_wake_override(struct device *kdev, struct drm_i915_private *dev_priv = kdev_to_i915(kdev); u32 tmp; - if (!IS_GEN9_BC(dev_priv) && !IS_BROXTON(dev_priv)) + if (!IS_GEN9(dev_priv)) return; i915_audio_component_get_power(kdev); ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx