from:"Melanie Lobo"

[PATCH] drm/i915: Support RGB16161616_64B compressed formats

2024-06-04 Thread Melanie Lobo

Add support for a RGB64(FP16) format where each color component is a
16-bit floating point value. FP16 format which is a binary
floating-point computer number format that occupies 16 bits in computer
memory. Platform shall render compression in display engine to receive
FP16 compressed formats.

This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/series/134353/
https://lore.kernel.org/all/20240603081607.30930-1-melanie.l...@intel.com/

Test-with: 20240603081607.30930-1-melanie.l...@intel.com

Credits: Juha-Pekka 
Cc: Juha-Pekka Heikkila 
Cc: Bhanuprakash Modem 
Cc: Swati Sharma 
Signed-off-by: Melanie Lobo 
---
 drivers/gpu/drm/i915/display/intel_fb.c| 5 +
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 ++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index b6638726949d..91f2def14243 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -91,6 +91,11 @@ static const struct drm_format_info gen12_ccs_formats[] = {
{ .format = DRM_FORMAT_P016, .num_planes = 4,
  .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
+   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 8, 1}, .block_w = { 1, 4}, .block_h = { 1, 2}, 
.hsub = 1, .vsub = 1},
+   { .format = DRM_FORMAT_ARGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 8, 1}, .block_w = { 1, 4}, .block_h = { 1, 2},
+ .hsub = 1, .vsub = 1, .has_alpha = true},
 };
 
 /*
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 1aa70fc35b9d..7719cb04bdf8 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2242,6 +2242,8 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ARGB:
case DRM_FORMAT_ABGR:
+   case DRM_FORMAT_XRGB16161616F:
+   case DRM_FORMAT_ARGB16161616F:
if (intel_fb_is_ccs_modifier(modifier))
return true;
fallthrough;
@@ -2266,8 +2268,6 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_C8:
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ABGR16161616F:
-   case DRM_FORMAT_XRGB16161616F:
-   case DRM_FORMAT_ARGB16161616F:
case DRM_FORMAT_Y210:
case DRM_FORMAT_Y212:
case DRM_FORMAT_Y216:
-- 
2.17.1

[PATCH] drm/i915: Support RGB16161616_64B compressed formats

2024-06-04 Thread Melanie Lobo

Add support for a RGB64(FP16) format where each color component is a
16-bit floating point value. FP16 format which is a binary
floating-point computer number format that occupies 16 bits in computer
memory. Platform shall render compression in display engine to receive
FP16 compressed formats.

This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/series/134353/
https://lore.kernel.org/all/20240603081607.30930-1-melanie.l...@intel.com/

Test-with: 20240603081607.30930-1-melanie.l...@intel.com

Credits: Juha-Pekka 
Cc: Juha-Pekka Heikkila 
Cc: Bhanuprakash Modem 
Cc: Swati Sharma 
Signed-off-by: Melanie Lobo 
---
 drivers/gpu/drm/i915/display/intel_fb.c| 5 +
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 ++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index b6638726949d..91f2def14243 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -91,6 +91,11 @@ static const struct drm_format_info gen12_ccs_formats[] = {
{ .format = DRM_FORMAT_P016, .num_planes = 4,
  .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
+   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 8, 1}, .block_w = { 1, 4}, .block_h = { 1, 2}, 
.hsub = 1, .vsub = 1},
+   { .format = DRM_FORMAT_ARGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 8, 1}, .block_w = { 1, 4}, .block_h = { 1, 2},
+ .hsub = 1, .vsub = 1, .has_alpha = true},
 };
 
 /*
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 1aa70fc35b9d..ac8435a002fd 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2188,6 +2188,8 @@ static bool skl_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ARGB:
case DRM_FORMAT_ABGR:
+   case DRM_FORMAT_XRGB16161616F:
+   case DRM_FORMAT_ARGB16161616F:
if (intel_fb_is_ccs_modifier(modifier))
return true;
fallthrough;
@@ -2212,8 +2214,6 @@ static bool skl_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_C8:
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ABGR16161616F:
-   case DRM_FORMAT_XRGB16161616F:
-   case DRM_FORMAT_ARGB16161616F:
case DRM_FORMAT_Y210:
case DRM_FORMAT_Y212:
case DRM_FORMAT_Y216:
-- 
2.17.1

[PATCH] drm/i915: Support RGB16161616_64B compressed formats

2024-06-03 Thread Melanie Lobo

Add support for a RGB64(FP16) format where each color component is a
16-bit floating point value. FP16 format which is a binary
floating-point computer number format that occupies 16 bits in computer
memory. Platform shall render compression in display engine to receive
FP16 compressed formats.

This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/series/134353/
https://lore.kernel.org/all/20240603081607.30930-1-melanie.l...@intel.com/

Test-with: 20240603081607.30930-1-melanie.l...@intel.com

Credits: Juha-Pekka 
Cc: Juha-Pekka Heikkila 
Cc: Bhanuprakash Modem 
Cc: Swati Sharma 
Signed-off-by: Melanie Lobo 
---
 drivers/gpu/drm/i915/display/intel_fb.c| 18 ++
 .../gpu/drm/i915/display/skl_universal_plane.c |  4 ++--
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index b6638726949d..88b8489f4ed2 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -91,6 +91,11 @@ static const struct drm_format_info gen12_ccs_formats[] = {
{ .format = DRM_FORMAT_P016, .num_planes = 4,
  .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
+   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 8, 1}, .block_w = { 1, 4}, .block_h = { 1, 2}, 
.hsub = 1, .vsub = 1},
+   { .format = DRM_FORMAT_ARGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 8, 1}, .block_w = { 1, 4}, .block_h = { 1, 2},
+ .hsub = 1, .vsub = 1, .has_alpha = true},
 };
 
 /*
@@ -421,6 +426,8 @@ static bool plane_has_modifier(struct drm_i915_private 
*i915,
   u8 plane_caps,
   const struct intel_modifier_desc *md)
 {
+   const struct drm_format_info *info;
+
if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until))
return false;
 
@@ -435,6 +442,17 @@ static bool plane_has_modifier(struct drm_i915_private 
*i915,
HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
return false;
 
+   /* Check if CSS modifier and FP16 format is supported on different 
platforms */
+   info = lookup_format_info(md->formats, md->format_count, 
DRM_FORMAT_XRGB16161616F);
+   if (intel_fb_is_ccs_modifier(md->modifier) && info &&
+   info->format == DRM_FORMAT_XRGB16161616F && DISPLAY_VER(i915) < 12)
+  return false;
+
+   info = lookup_format_info(md->formats, md->format_count, 
DRM_FORMAT_ARGB16161616F);
+   if (intel_fb_is_ccs_modifier(md->modifier) && info &&
+   info->format == DRM_FORMAT_ARGB16161616F && DISPLAY_VER(i915) < 12)
+   return false;
+
return true;
 }
 
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index b7678b8a7f3d..9255affed543 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2184,6 +2184,8 @@ static bool skl_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ARGB:
case DRM_FORMAT_ABGR:
+   case DRM_FORMAT_XRGB16161616F:
+   case DRM_FORMAT_ARGB16161616F:
if (intel_fb_is_ccs_modifier(modifier))
return true;
fallthrough;
@@ -2208,8 +2210,6 @@ static bool skl_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_C8:
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ABGR16161616F:
-   case DRM_FORMAT_XRGB16161616F:
-   case DRM_FORMAT_ARGB16161616F:
case DRM_FORMAT_Y210:
case DRM_FORMAT_Y212:
case DRM_FORMAT_Y216:
-- 
2.17.1

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

2023-12-01 Thread Melanie Lobo

Supports FP16 format which is a binary floating-point computer
number format that occupies 16 bits in computer memory.Platform shall
render compression in display engine to receive FP16 compressed formats.

This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/patch/562014/

Test-with: 20231011095520.10768-1-melanie.l...@intel.com

Credits: Juha-Pekka 
Cc: Juha-Pekka Heikkila 
Cc: Bhanuprakash Modem 
Cc: Swati Sharma 
Reported-by: kernel test robot 
Reported-by: Dan Carpenter 
Closes: https://lore.kernel.org/r/202310150454.s9qf86bl-...@intel.com/HEAD 
detached at 29b1181aa95a
Signed-off-by: Melanie Lobo 
---
 drivers/gpu/drm/i915/display/intel_fb.c| 10 ++
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  2 +-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index e7678571b0d7..494baf20f76b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -91,6 +91,8 @@ static const struct drm_format_info gen12_ccs_formats[] = {
{ .format = DRM_FORMAT_P016, .num_planes = 4,
  .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
+   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 8, 1}, .block_w = { 1, 4}, .block_h = { 1, 2}, 
.hsub = 1, .vsub = 1 },
 };
 
 /*
@@ -394,6 +396,9 @@ static bool plane_has_modifier(struct drm_i915_private 
*i915,
   u8 plane_caps,
   const struct intel_modifier_desc *md)
 {
+   const struct drm_format_info *info =
+   lookup_format_info(md->formats, md->format_count, 
DRM_FORMAT_XRGB16161616F);
+
if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until))
return false;
 
@@ -408,6 +413,11 @@ static bool plane_has_modifier(struct drm_i915_private 
*i915,
HAS_FLAT_CCS(i915) != !md->ccs.packed_aux_planes)
return false;
 
+   /* Check if CSS modifier and FP16 format is supported on different 
platforms */
+   if (intel_fb_is_ccs_modifier(md->modifier) && info &&
+   info->format == DRM_FORMAT_XRGB16161616F && DISPLAY_VER(i915) < 14)
+  return false;
+
return true;
 }
 
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 245a64332cc7..f5e9be57a74b 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2091,6 +2091,7 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ARGB:
case DRM_FORMAT_ABGR:
+   case DRM_FORMAT_XRGB16161616F:
if (intel_fb_is_ccs_modifier(modifier))
return true;
fallthrough;
@@ -2115,7 +2116,6 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_C8:
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ABGR16161616F:
-   case DRM_FORMAT_XRGB16161616F:
case DRM_FORMAT_ARGB16161616F:
case DRM_FORMAT_Y210:
case DRM_FORMAT_Y212:
-- 
2.17.1

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

2023-10-23 Thread Melanie Lobo

MTL supports FP16 format which is a binary floating-point computer
number format that occupies 16 bits in computer memory.Platform shall
render compression in display engine to receive FP16 compressed formats.

This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/patch/562014/

Test-with: 20231011095520.10768-1-melanie.l...@intel.com

Credits: Juha-Pekka 
Signed-off-by: Melanie Lobo 
Reported-by: kernel test robot 
Reported-by: Dan Carpenter 
Closes: https://lore.kernel.org/r/202310150454.s9qf86bl-...@intel.com/

---
 drivers/gpu/drm/i915/display/intel_fb.c| 2 ++
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 +---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index e7678571b0d7..d48f0daf89e7 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -91,6 +91,8 @@ static const struct drm_format_info gen12_ccs_formats[] = {
{ .format = DRM_FORMAT_P016, .num_planes = 4,
  .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
+   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 8, 1}, .block_w = { 1, 4}, .block_h = { 1, 2}, 
.hsub = 1, .vsub = 1 },
 };
 
 /*
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 245a64332cc7..6ec5b96904c3 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2122,9 +2122,7 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_Y216:
case DRM_FORMAT_XVYU12_16161616:
case DRM_FORMAT_XVYU16161616:
-   if (!intel_fb_is_ccs_modifier(modifier))
-   return true;
-   fallthrough;
+   return true;
default:
return false;
}
-- 
2.17.1

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

2023-10-12 Thread Melanie Lobo

MTL supports FP16 format which is a binary floating-point computer
number format that occupies 16 bits in computer memory.Platform shall
render compression in display engine to receive FP16 compressed formats.

This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/patch/562014/

Test-with: 20231011095520.10768-1-melanie.l...@intel.com

Signed-off-by: Melanie Lobo 
---
 drivers/gpu/drm/i915/display/intel_fb.c| 2 ++
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 +---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index e7678571b0d7..868cfc75e687 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -91,6 +91,8 @@ static const struct drm_format_info gen12_ccs_formats[] = {
{ .format = DRM_FORMAT_P016, .num_planes = 4,
  .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
+   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 4, 1}, .block_w = { 1, 2}, .block_h = { 1, 1}, 
.hsub = 1, .vsub = 1 },
 };
 
 /*
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 245a64332cc7..6ec5b96904c3 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2122,9 +2122,7 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_Y216:
case DRM_FORMAT_XVYU12_16161616:
case DRM_FORMAT_XVYU16161616:
-   if (!intel_fb_is_ccs_modifier(modifier))
-   return true;
-   fallthrough;
+   return true;
default:
return false;
}
-- 
2.17.1

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

2023-10-11 Thread Melanie Lobo

MTL supports FP16 format which is a binary floating-point computer
number format that occupies 16 bits in computer memory.Platform shall
render compression in display engine to receive FP16 compressed formats.

This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/patch/562014/

Test-with: 20231011095520.10768-1-melanie.l...@intel.com

Signed-off-by: Melanie Lobo 
---
 drivers/gpu/drm/i915/display/intel_fb.c| 2 ++
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index e7678571b0d7..868cfc75e687 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -91,6 +91,8 @@ static const struct drm_format_info gen12_ccs_formats[] = {
{ .format = DRM_FORMAT_P016, .num_planes = 4,
  .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
+   { .format = DRM_FORMAT_XRGB16161616F, .depth = 64, .num_planes = 2,
+ .char_per_block = { 4, 1}, .block_w = { 1, 2}, .block_h = { 1, 1}, 
.hsub = 1, .vsub = 1 },
 };
 
 /*
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 245a64332cc7..64c1d6c2bd76 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2122,8 +2122,7 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_Y216:
case DRM_FORMAT_XVYU12_16161616:
case DRM_FORMAT_XVYU16161616:
-   if (!intel_fb_is_ccs_modifier(modifier))
-   return true;
+   return true;
fallthrough;
default:
return false;
-- 
2.17.1

[PATCH] drm/i915: Support RGB16161616_64B compressed formats

[PATCH] drm/i915: Support RGB16161616_64B compressed formats

[PATCH] drm/i915: Support RGB16161616_64B compressed formats

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

[Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats on MTL

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