Re: [Intel-gfx] [PATCH 1/3] RFC: drm: Restrict vblank ioctl to master
Hi Daniel,
We are in beta for v18. I expect release in September.
I don't think we have to consider users who run older Kodi versions on
systems with latest kernels. The feature the patch would disable won't
make Kodi completely unusable when absent. I'd say you can merge
the patch short after v18 has been released.
Cheers,
Rainer
On Wed, Aug 8, 2018 at 6:59 PM, Daniel Vetter wrote:
> Hi Rainer,
>
> Awesome, thanks a lot for doing this! Any idea for when this will ship
> in a release, and for how long your users are generally using older
> releases? Just to have a rough indication for when we could attempt to
> merge this patch here.
>
> Cheers, Daniel
>
> On Wed, Aug 8, 2018 at 5:35 PM, Rainer Hochecker wrote:
>> Finally we removed this code from Kodi.
>>
>> Regards,
>> Rainer
>>
>> On Tue, Jun 14, 2016 at 11:02 AM, Daniel Vetter
>> wrote:
>>> Somehow this escaped us, this is a KMS ioctl which should only be used
>>> by the master (which is the thing that's also in control of kms
>>> resources). Everything else is bound to result in fail.
>>>
>>> Clients shouldn't have a trouble coping with this, since a pile of
>>> drivers don't support vblank waits (or just randomly fall over when
>>> using them). Note that the big motivation for abusing this like mad
>>> seems to be that EGL doesn't have OML_sync, but somehow it didn't
>>> cross anyone's mind that adding OML_sync to EGL would be useful. This
>>> patch is meant to essentially start kicking that can from the back
>>> end.
>>>
>>> Cc: frit...@kodi.tv
>>> Cc: fernetme...@kodi.tv
>>> Signed-off-by: Daniel Vetter
>>> ---
>>> drivers/gpu/drm/drm_ioctl.c | 4 ++--
>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
>>> index 0510675eec5d..6cc78d648393 100644
>>> --- a/drivers/gpu/drm/drm_ioctl.c
>>> +++ b/drivers/gpu/drm/drm_ioctl.c
>>> @@ -529,9 +529,9 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
>>> DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_legacy_sg_alloc,
>>> DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
>>> DRM_IOCTL_DEF(DRM_IOCTL_SG_FREE, drm_legacy_sg_free,
>>> DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
>>>
>>> - DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank, DRM_UNLOCKED),
>>> + DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank,
>>> DRM_MASTER|DRM_UNLOCKED),
>>>
>>> - DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, 0),
>>> + DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, DRM_MASTER),
>>>
>>> DRM_IOCTL_DEF(DRM_IOCTL_UPDATE_DRAW, drm_noop,
>>> DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
>>>
>>> --
>>> 2.8.1
>>>
>
>
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH 1/3] RFC: drm: Restrict vblank ioctl to master
Finally we removed this code from Kodi.
Regards,
Rainer
On Tue, Jun 14, 2016 at 11:02 AM, Daniel Vetter wrote:
> Somehow this escaped us, this is a KMS ioctl which should only be used
> by the master (which is the thing that's also in control of kms
> resources). Everything else is bound to result in fail.
>
> Clients shouldn't have a trouble coping with this, since a pile of
> drivers don't support vblank waits (or just randomly fall over when
> using them). Note that the big motivation for abusing this like mad
> seems to be that EGL doesn't have OML_sync, but somehow it didn't
> cross anyone's mind that adding OML_sync to EGL would be useful. This
> patch is meant to essentially start kicking that can from the back
> end.
>
> Cc: frit...@kodi.tv
> Cc: fernetme...@kodi.tv
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_ioctl.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
> index 0510675eec5d..6cc78d648393 100644
> --- a/drivers/gpu/drm/drm_ioctl.c
> +++ b/drivers/gpu/drm/drm_ioctl.c
> @@ -529,9 +529,9 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
> DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_legacy_sg_alloc,
> DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
> DRM_IOCTL_DEF(DRM_IOCTL_SG_FREE, drm_legacy_sg_free,
> DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
>
> - DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank, DRM_UNLOCKED),
> + DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank,
> DRM_MASTER|DRM_UNLOCKED),
>
> - DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, 0),
> + DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, DRM_MASTER),
>
> DRM_IOCTL_DEF(DRM_IOCTL_UPDATE_DRAW, drm_noop,
> DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
>
> --
> 2.8.1
>
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[Intel-gfx] [PATCH v6] drm: add fourcc codes for 16bit R and RG
From: Rainer Hochecker
This adds fourcc codes for 16bit planes required for DRM buffer
export to mesa.
Signed-off-by: Rainer Hochecker
---
include/uapi/drm/drm_fourcc.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..d230e58 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R
little endian */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88fourcc_code('R', 'G', '8', '8') /*
[15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88fourcc_code('G', 'R', '8', '8') /*
[15:0] G:R 8:8 little endian */
+/* 32 bpp RG */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G
16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R
16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B
3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R
2:3:3 */
--
2.9.3
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[Intel-gfx] [PATCH v5] drm: add fourcc codes for 16bit R and RG
From: Rainer Hochecker
Thanks for bearing with me. My ml skills have greatly improved now :)
v5 of patch:
This adds fourcc codes for 16bit planes required for DRM buffer
export to mesa.
Signed-off-by: Rainer Hochecker
---
include/uapi/drm/drm_fourcc.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..e7f6bcd 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88fourcc_code('R', 'G', '8', '8') /*
[15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88fourcc_code('G', 'R', '8', '8') /*
[15:0] G:R 8:8 little endian */
+/* 32 bpp RG */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G
16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R
16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B
3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R
2:3:3 */
--
2.9.3
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[Intel-gfx] [PATCH v4] drm: add fourcc codes for 16bit R and RG
From: Rainer Hochecker
Signed-off-by: Rainer Hochecker
---
include/uapi/drm/drm_fourcc.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..4d65fb6 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88fourcc_code('R', 'G', '8', '8') /*
[15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88fourcc_code('G', 'R', '8', '8') /*
[15:0] G:R 8:8 little endian */
+/* 32 bpp RG */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R
16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R
16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B
3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R
2:3:3 */
--
2.9.3
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[Intel-gfx] [PATCH v3] drm: add fourcc codes for 16bit R and RG
From: Rainer Hochecker
This adds fourcc codes for 16bit planes required for DRM buffer
export to mesa.
Signed-off-by: Rainer Hochecker
---
include/uapi/drm/drm_fourcc.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..85079cd 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88fourcc_code('R', 'G', '8', '8') /*
[15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88fourcc_code('G', 'R', '8', '8') /*
[15:0] G:R 8:8 little endian */
+/* 32 bpp GR */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R
16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R
16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B
3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R
2:3:3 */
--
2.9.3
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[Intel-gfx] [PATCH v2] drm: add fourcc codes for 16bit R and GR
From: Rainer Hochecker
Now sent with git send-email:
Signed-off-by: Rainer Hochecker
---
include/uapi/drm/drm_fourcc.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..f1ef9cb 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88fourcc_code('R', 'G', '8', '8') /*
[15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88fourcc_code('G', 'R', '8', '8') /*
[15:0] G:R 8:8 little endian */
+/* 32 bpp GR */
+#define DRM_FORMAT_RG32fourcc_code('R', 'G', '3', '2') /*
[31:0] G:R 16:16 little endian */
+#define DRM_FORMAT_GR32fourcc_code('G', 'R', '3', '2') /*
[31:0] G:R 16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B
3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R
2:3:3 */
--
2.9.3
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Re: [Intel-gfx] [PATCH] drm: add fourcc codes for 16bit R and GR
On Mon, Jan 2, 2017 at 3:31 PM, Rainer Hochecker wrote:
>
> I chose GR16 because that matches with Mesa texture formats. Unfortunately
> RG16 is already taken by DRM_FORMAT_RGB565
> So GR32 / RG32 might be better. All other codes in fourcc.h seem to sum up
> all planes.
>
> (sorry, gmail included some html links on last attempt)
>
> On Mon, Jan 2, 2017 at 3:05 PM, Ville Syrjälä
> wrote:
>>
>> On Mon, Jan 02, 2017 at 01:23:23PM +0100, David Herrmann wrote:
>> > Hi
>> >
>> > On Mon, Jan 2, 2017 at 11:41 AM, Rainer Hochecker
>> > wrote:
>> > > From: Rainer Hochecker
>> > >
>> > > Add fourcc codes for 16bit planes. Required by mesa for
>> > > eglCreateImageKHR to access P010 surfaces created by vaapi.
>> > >
>> > > Signed-off-by: Rainer Hochecker
>> > > ---
>> > > include/uapi/drm/drm_fourcc.h | 6 ++
>> > > 1 file changed, 6 insertions(+)
>> > >
>> > > diff --git a/include/uapi/drm/drm_fourcc.h
>> > > b/include/uapi/drm/drm_fourcc.h
>> > > index a5890bf..e6ab638 100644
>> > > --- a/include/uapi/drm/drm_fourcc.h
>> > > +++ b/include/uapi/drm/drm_fourcc.h
>> > > @@ -41,10 +41,16 @@ extern "C" {
>> > > /* 8 bpp Red */
>> > > #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0]
>> > > R */
>> > >
>> > > +/* 16 bpp Red */
>> > > +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /*
>> > > [15:0] R */
>> > > +
>> > > /* 16 bpp RG */
>> > > #define DRM_FORMAT_RG88fourcc_code('R', 'G', '8', '8')
>> > > /* [15:0] R:G 8:8 little endian */
>> > > #define DRM_FORMAT_GR88fourcc_code('G', 'R', '8', '8')
>> > > /* [15:0] G:R 8:8 little endian */
>> > >
>> > > +/* 32 bpp GR */
>> > > +#define DRM_FORMAT_GR16fourcc_code('G', 'R', '1', '6')
>> > > /* [31:0] G:R 16:16 little endian */
>> > > +
>> >
>> > Shouldn't it be 'G', 'R', '3', '2'?
>>
>> The name should be _GR1616. Using GR16 for the fourcc seems OK to me
>> since we can't fit in the full GR1616 in there. Althogh GR32 could work
>> too I suppose.
>>
>> And what about RG16?
>>
>> >
>> > Also, please put dri-devel on CC.
>> >
>> > Thanks
>> > David
>> >
>> > > /* 8 bpp RGB */
>> > > #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0]
>> > > R:G:B 3:3:2 */
>> > > #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0]
>> > > B:G:R 2:3:3 */
>> > > --
>> > > 2.9.3
>> > >
>> > ___
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>> > dri-de...@lists.freedesktop.org
>> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
>>
>> --
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>> Intel OTC
>
>
Updated patch as suggested by Ville Syrjälä
From 29e74ff96e0b7c7a11d1b4131891b83adde621c1 Mon Sep 17 00:00:00 2001
From: Rainer Hochecker
Date: Mon, 2 Jan 2017 11:25:18 +0100
Subject: [PATCH] drm: add fourcc codes for 16bit R and GR
Signed-off-by: Rainer Hochecker
---
include/uapi/drm/drm_fourcc.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..f1ef9cb 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G
8:8 little endian */
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R
8:8 little endian */
+/* 32 bpp GR */
+#define DRM_FORMAT_RG32 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R
16:16 little endian */
+#define DRM_FORMAT_GR32 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R
16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0]
R:G:B 3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0]
B:G:R 2:3:3 */
--
2.9.3
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