[Intel-gfx] source-based replacement for video bios on ivybridge -- I'm stuck!
Dear intel graphics experts: I am looking at trying to get coreboot to move away from binary video bios on google chromebook platforms. The current target is an ivybridge system. We'd like to get minimal graphics going with a source-based startup code in coreboot, such that we can avoid the issues that come with binary video bioses. The good news is that the kernel driver works fine without a video bios having been run -- the new samsung chromebox/chromebook work in this manner. As an experiment, I have used cocinnelle to extract the relevant driver functions from the kernel (in this case 3.4.2) and am running them in user mode. I've had good luck with prototyping hardware drivers for coreboot in user mode, and this approach is *almost* working on this graphics hardware. You can see the result here: http://pastebin.com/3e77Y66C The I2C is working, and I'm recovering EDID and the mode. I can control the panel backlight. I can easily program the GTT and other simple functions. The issue now is that I am not able to get the link trained. I figure I'm misordering or missing some crucial step, and on the off chance that some one of you can look at that output and say "Ron you idiot! You're missing *this* step" I've posted it. If anyone has any thoughts on this I'd welcome them. This thing is close, and I feel it is possible, but I've obviously got something wrong. Thanks in advance for any help or advice you can give me! ron ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] intel_ddi.c
As I read this new (to me) file I get the impression that it really applies to haswell and not the earlier parts, is that correct? thanks ron ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] source-based replacement for video bios on ivybridge -- I'm stuck!
Thanks for the suggestions, I did move forward to 3.6-rc1. It gives me lots of messages I expect, but does not yet work... http://pastebin.com/RLp5qjQX I'm still convinced there is some basic thing I'm not setting up right; still getting these pipe0 stuck messages. Now, the one thing I'm definitely doing different than the driver, after a discussion with Jesse, is not setting up the ring or status page. It's not supposed to be needed for this basic set up. It all starts to go sour here: [00.0] [drm:ironlake_edp_panel_on], Turn eDP power on [00.0] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle [00.0] [drm:ironlake_wait_panel_status], mask b80f value status control abcd0008 [00.0] [drm:ironlake_wait_panel_on], Wait for panel power on [00.0] [drm:ironlake_wait_panel_status], mask b00f value 8008 status 000a control abcd000b [00.0] [drm:ironlake_edp_panel_vdd_off], Turn eDP VDD off 1 [00.0] [drm:ironlake_panel_vdd_off_sync], PCH_PP_STATUS: 0x8008 PCH_PP_CONTROL: 0xabcd0003 [00.0] [drm:intel_dp_start_link_train], too many voltage retries, give up And then we get no further (after several iterations) than the voltage retries. Any further suggestions welcome :-) ron ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] source-based replacement for video bios on ivybridge -- I'm stuck!
OK, thanks to the great suggestions and help I found on this list I am now lighting up the display, i.e. clock recovery and so on work, the display is trained, and it seems I am getting data from memory to the display. Now I'm trying to understand some other things. I can set the GTT entries, and as an experiment I set them to start at physical 0. i.e. [0] = 1, [1] = 4097, and so on. The low order bits are the same as the BIOS settings: Valid is set but no other bits. Now, as I change the GTT entries to point at different windows of low memory, what is on the display changes -- I'm essentially looking at kernel memory. But what surprised me a bit was I was hoping to get a pretty dynamic display as the contents of kernel memory changed. Such is not the case -- the display is static. So I think I'm missing something else, any ideas? I think the display hardware is kind of running as each time I change the gtt the image on the screen changes in a very consistent way, e.g. if I increase the value of all gtt's by 1 MiB then the screen scrolls up. Next, the GSM on this system is at ADA0. If I leave the entries set to what the bios sets, e..g [0] = 0xada0001 [1] - 0xada1001 etc. then I would expect I can mmap bar[2] and store into that region. But what happens instead, is that nothing changes when I write to the mmap'ed region. Is there some other issue I am getting wrong here? Finally, if I dump what the data I mmap at bar[2], then change the gtt, then dump it again, it does change. I think I have the bar values right, but ... Thanks again for your help. ron ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] scaling on ivy bridge
I have a display that is, e.g., 2560x1600 on an ivybridge. I'd like to set it up so that the software sees a display with half that resolution, i.e. the software that draws into the frame buffer (this is a bios) can draw into what it sees as a 1280x800 display. I've tried a few things but I'm realizing I don't understand the ivybridge panel fitter at all. This display is on PIPEA. It appears on sandybridge one can write PFA_VSCALE, PFA_HSCALE, PFA_WIN_SZ, and PFA_WIN_POS and _PFA_CTL_1 and it all works. On Ivybridge it seems far more complex. Or am I missing something? I don't see any fitting code in the drm driver itself, so I'm not quite sure how it's done. Thanks in advance, as always. ron ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] scaling on ivy bridge
On Tue, Oct 9, 2012 at 12:35 PM, Paulo Zanoni wrote: > Take a look at this tool: > http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/tree/tools/intel_panel_fitter.c very interesting! i note that tool sets WIN_POS and WIN_SZ, but not the HSCALE and VSCALE ... is there something I'm not understanding (yes)? Are HSCALE and VSCALE intended to be read? I'm going to try it of course but I'm confused :-) thanks! ron ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
