Re: [Intel-gfx] [BXT MIPI PATCH v5 11/14] drm/i915/bxt: Modify BXT BLC according to VBT changes

[Daniel Vetter]

On Wed, Sep 30, 2015 at 10:34:57PM +0530, Uma Shankar wrote:
> From: Sunil Kamath 
> 
> Latest VBT mentions which set of registers will be used for BLC,
> as controller number field. Making use of this field in BXT
> BLC implementation. Also, the registers are used in case control
> pin indicates display DDI. Adding a check for this.
> According to Bspec, BLC_PWM_*_2 uses the display utility pin for output.
> To use backlight 2, enable the utility pin with mode = PWM
>v2: Jani's review comments
>addressed
>- Add a prefix _ to BXT BLC registers definitions.
>- Add "bxt only" comment for u8 controller
>- Remove control_pin check for DDI controller
>- Check for valid controller values
>- Set pipe bits in UTIL_PIN_CTL
>- Enable/Disable UTIL_PIN_CTL in enable/disable_backlight()
>- If BLC 2 is used, read active_low_pwm from UTIL_PIN polarity
>Satheesh's review comment addressed
>- If UTIL PIN is already enabled, BIOS would have programmed it. No
>need to disable and enable again.
>v3: Jani's review comments
>- add UTIL_PIN_PIPE_MASK and UTIL_PIN_MODE_MASK
>- Disable UTIL_PIN if controller 1 is used
>- Mask out UTIL_PIN_PIPE_MASK and UTIL_PIN_MODE_MASK before enabling
>UTIL_PIN
>- check valid controller value in intel_bios.c
>- add backlight.util_pin_active_low
>- disable util pin before enabling
>v4: Change for BXT-PO branch:
>Stubbed unwanted definition which was existing before
>because of DC6 patch.
>UTIL_PIN_MODE_PWM (0x1b << 24)
> 
> v2: Fixed Jani's review comment.
> 
> v3: Split the backight PWM frequency programming into separate patch,
> in cases BIOS doesn't initializes it.
> 
> v4: Starting afresh and not modifying existing state for backlight, as
> per Jani's recommendation.
> 
> v5: Fixed Jani's review comment wrt util pin enable
> 
> Signed-off-by: Vandana Kannan 
> Signed-off-by: Sunil Kamath 
> Signed-off-by: Uma Shankar 
> ---
>  drivers/gpu/drm/i915/i915_reg.h|   28 
>  drivers/gpu/drm/i915/intel_drv.h   |2 +
>  drivers/gpu/drm/i915/intel_panel.c |   83 
> 
>  3 files changed, 88 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 88a16e2..519f764 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3512,17 +3512,29 @@ enum skl_disp_power_wells {
>  #define UTIL_PIN_CTL 0x48400
>  #define   UTIL_PIN_ENABLE(1 << 31)
>  
> +#define   UTIL_PIN_PIPE(x) ((x) << 29)
> +#define   UTIL_PIN_PIPE_MASK   (3 << 29)
> +#define   UTIL_PIN_MODE_PWM(1 << 24)
> +#define   UTIL_PIN_MODE_MASK   (0xf << 24)
> +#define   UTIL_PIN_POLARITY(1 << 22)
> +
>  /* BXT backlight register definition. */
> -#define BXT_BLC_PWM_CTL1 0xC8250
> +#define _BXT_BLC_PWM_CTL10xC8250
>  #define   BXT_BLC_PWM_ENABLE (1 << 31)
>  #define   BXT_BLC_PWM_POLARITY   (1 << 29)
> -#define BXT_BLC_PWM_FREQ10xC8254
> -#define BXT_BLC_PWM_DUTY10xC8258
> -
> -#define BXT_BLC_PWM_CTL2 0xC8350
> -#define BXT_BLC_PWM_FREQ20xC8354
> -#define BXT_BLC_PWM_DUTY20xC8358
> -
> +#define _BXT_BLC_PWM_FREQ1   0xC8254
> +#define _BXT_BLC_PWM_DUTY1   0xC8258
> +
> +#define _BXT_BLC_PWM_CTL20xC8350
> +#define _BXT_BLC_PWM_FREQ2   0xC8354
> +#define _BXT_BLC_PWM_DUTY2   0xC8358
> +
> +#define BXT_BLC_PWM_CTL(controller)_PIPE(controller, \
> + _BXT_BLC_PWM_CTL1, _BXT_BLC_PWM_CTL2)
> +#define BXT_BLC_PWM_FREQ(controller)   _PIPE(controller, \
> + _BXT_BLC_PWM_FREQ1, _BXT_BLC_PWM_FREQ2)
> +#define BXT_BLC_PWM_DUTY(controller)   _PIPE(controller, \
> + _BXT_BLC_PWM_DUTY1, _BXT_BLC_PWM_DUTY2)
>  
>  #define PCH_GTC_CTL  0xe7000
>  #define   PCH_GTC_ENABLE (1 << 31)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 1059283..d8ca075 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -182,7 +182,9 @@ struct intel_panel {
>   bool enabled;
>   bool combination_mode;  /* gen 2/4 only */
>   bool active_low_pwm;
> + bool util_pin_active_low;   /* bxt+ */
>   struct backlight_device *device;
> + u8 controller;  /* bxt+ only */
>   } backlight;
>  
>   void (*backlight_power)(struct intel_connector *, bool enable);
> diff --git a/drivers/gpu/drm/i915/intel_panel.c 
> 

Re: [Intel-gfx] [BXT MIPI PATCH v5 11/14] drm/i915/bxt: Modify BXT BLC according to VBT changes

[Jani Nikula]

On Wed, 30 Sep 2015, Uma Shankar  wrote:
> From: Sunil Kamath 
>
> Latest VBT mentions which set of registers will be used for BLC,
> as controller number field. Making use of this field in BXT
> BLC implementation. Also, the registers are used in case control
> pin indicates display DDI. Adding a check for this.
> According to Bspec, BLC_PWM_*_2 uses the display utility pin for output.
> To use backlight 2, enable the utility pin with mode = PWM
>v2: Jani's review comments
>addressed
>- Add a prefix _ to BXT BLC registers definitions.
>- Add "bxt only" comment for u8 controller
>- Remove control_pin check for DDI controller
>- Check for valid controller values
>- Set pipe bits in UTIL_PIN_CTL
>- Enable/Disable UTIL_PIN_CTL in enable/disable_backlight()
>- If BLC 2 is used, read active_low_pwm from UTIL_PIN polarity
>Satheesh's review comment addressed
>- If UTIL PIN is already enabled, BIOS would have programmed it. No
>need to disable and enable again.
>v3: Jani's review comments
>- add UTIL_PIN_PIPE_MASK and UTIL_PIN_MODE_MASK
>- Disable UTIL_PIN if controller 1 is used
>- Mask out UTIL_PIN_PIPE_MASK and UTIL_PIN_MODE_MASK before enabling
>UTIL_PIN
>- check valid controller value in intel_bios.c
>- add backlight.util_pin_active_low
>- disable util pin before enabling
>v4: Change for BXT-PO branch:
>Stubbed unwanted definition which was existing before
>because of DC6 patch.
>UTIL_PIN_MODE_PWM (0x1b << 24)
>
> v2: Fixed Jani's review comment.
>
> v3: Split the backight PWM frequency programming into separate patch,
> in cases BIOS doesn't initializes it.
>
> v4: Starting afresh and not modifying existing state for backlight, as
> per Jani's recommendation.
>
> v5: Fixed Jani's review comment wrt util pin enable
>
> Signed-off-by: Vandana Kannan 
> Signed-off-by: Sunil Kamath 
> Signed-off-by: Uma Shankar 

Reviewed-by: Jani Nikula 


> ---
>  drivers/gpu/drm/i915/i915_reg.h|   28 
>  drivers/gpu/drm/i915/intel_drv.h   |2 +
>  drivers/gpu/drm/i915/intel_panel.c |   83 
> 
>  3 files changed, 88 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 88a16e2..519f764 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3512,17 +3512,29 @@ enum skl_disp_power_wells {
>  #define UTIL_PIN_CTL 0x48400
>  #define   UTIL_PIN_ENABLE(1 << 31)
>  
> +#define   UTIL_PIN_PIPE(x) ((x) << 29)
> +#define   UTIL_PIN_PIPE_MASK   (3 << 29)
> +#define   UTIL_PIN_MODE_PWM(1 << 24)
> +#define   UTIL_PIN_MODE_MASK   (0xf << 24)
> +#define   UTIL_PIN_POLARITY(1 << 22)
> +
>  /* BXT backlight register definition. */
> -#define BXT_BLC_PWM_CTL1 0xC8250
> +#define _BXT_BLC_PWM_CTL10xC8250
>  #define   BXT_BLC_PWM_ENABLE (1 << 31)
>  #define   BXT_BLC_PWM_POLARITY   (1 << 29)
> -#define BXT_BLC_PWM_FREQ10xC8254
> -#define BXT_BLC_PWM_DUTY10xC8258
> -
> -#define BXT_BLC_PWM_CTL2 0xC8350
> -#define BXT_BLC_PWM_FREQ20xC8354
> -#define BXT_BLC_PWM_DUTY20xC8358
> -
> +#define _BXT_BLC_PWM_FREQ1   0xC8254
> +#define _BXT_BLC_PWM_DUTY1   0xC8258
> +
> +#define _BXT_BLC_PWM_CTL20xC8350
> +#define _BXT_BLC_PWM_FREQ2   0xC8354
> +#define _BXT_BLC_PWM_DUTY2   0xC8358
> +
> +#define BXT_BLC_PWM_CTL(controller)_PIPE(controller, \
> + _BXT_BLC_PWM_CTL1, _BXT_BLC_PWM_CTL2)
> +#define BXT_BLC_PWM_FREQ(controller)   _PIPE(controller, \
> + _BXT_BLC_PWM_FREQ1, _BXT_BLC_PWM_FREQ2)
> +#define BXT_BLC_PWM_DUTY(controller)   _PIPE(controller, \
> + _BXT_BLC_PWM_DUTY1, _BXT_BLC_PWM_DUTY2)
>  
>  #define PCH_GTC_CTL  0xe7000
>  #define   PCH_GTC_ENABLE (1 << 31)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 1059283..d8ca075 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -182,7 +182,9 @@ struct intel_panel {
>   bool enabled;
>   bool combination_mode;  /* gen 2/4 only */
>   bool active_low_pwm;
> + bool util_pin_active_low;   /* bxt+ */
>   struct backlight_device *device;
> + u8 controller;  /* bxt+ only */
>   } backlight;
>  
>   void (*backlight_power)(struct intel_connector *, bool enable);
> diff 

[Intel-gfx] [BXT MIPI PATCH v5 11/14] drm/i915/bxt: Modify BXT BLC according to VBT changes

[Uma Shankar]

From: Sunil Kamath 

Latest VBT mentions which set of registers will be used for BLC,
as controller number field. Making use of this field in BXT
BLC implementation. Also, the registers are used in case control
pin indicates display DDI. Adding a check for this.
According to Bspec, BLC_PWM_*_2 uses the display utility pin for output.
To use backlight 2, enable the utility pin with mode = PWM
   v2: Jani's review comments
   addressed
   - Add a prefix _ to BXT BLC registers definitions.
   - Add "bxt only" comment for u8 controller
   - Remove control_pin check for DDI controller
   - Check for valid controller values
   - Set pipe bits in UTIL_PIN_CTL
   - Enable/Disable UTIL_PIN_CTL in enable/disable_backlight()
   - If BLC 2 is used, read active_low_pwm from UTIL_PIN polarity
   Satheesh's review comment addressed
   - If UTIL PIN is already enabled, BIOS would have programmed it. No
   need to disable and enable again.
   v3: Jani's review comments
   - add UTIL_PIN_PIPE_MASK and UTIL_PIN_MODE_MASK
   - Disable UTIL_PIN if controller 1 is used
   - Mask out UTIL_PIN_PIPE_MASK and UTIL_PIN_MODE_MASK before enabling
   UTIL_PIN
   - check valid controller value in intel_bios.c
   - add backlight.util_pin_active_low
   - disable util pin before enabling
   v4: Change for BXT-PO branch:
   Stubbed unwanted definition which was existing before
   because of DC6 patch.
   UTIL_PIN_MODE_PWM (0x1b << 24)

v2: Fixed Jani's review comment.

v3: Split the backight PWM frequency programming into separate patch,
in cases BIOS doesn't initializes it.

v4: Starting afresh and not modifying existing state for backlight, as
per Jani's recommendation.

v5: Fixed Jani's review comment wrt util pin enable

Signed-off-by: Vandana Kannan 
Signed-off-by: Sunil Kamath 
Signed-off-by: Uma Shankar 
---
 drivers/gpu/drm/i915/i915_reg.h|   28 
 drivers/gpu/drm/i915/intel_drv.h   |2 +
 drivers/gpu/drm/i915/intel_panel.c |   83 
 3 files changed, 88 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 88a16e2..519f764 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3512,17 +3512,29 @@ enum skl_disp_power_wells {
 #define UTIL_PIN_CTL   0x48400
 #define   UTIL_PIN_ENABLE  (1 << 31)
 
+#define   UTIL_PIN_PIPE(x) ((x) << 29)
+#define   UTIL_PIN_PIPE_MASK   (3 << 29)
+#define   UTIL_PIN_MODE_PWM(1 << 24)
+#define   UTIL_PIN_MODE_MASK   (0xf << 24)
+#define   UTIL_PIN_POLARITY(1 << 22)
+
 /* BXT backlight register definition. */
-#define BXT_BLC_PWM_CTL1   0xC8250
+#define _BXT_BLC_PWM_CTL1  0xC8250
 #define   BXT_BLC_PWM_ENABLE   (1 << 31)
 #define   BXT_BLC_PWM_POLARITY (1 << 29)
-#define BXT_BLC_PWM_FREQ1  0xC8254
-#define BXT_BLC_PWM_DUTY1  0xC8258
-
-#define BXT_BLC_PWM_CTL2   0xC8350
-#define BXT_BLC_PWM_FREQ2  0xC8354
-#define BXT_BLC_PWM_DUTY2  0xC8358
-
+#define _BXT_BLC_PWM_FREQ1 0xC8254
+#define _BXT_BLC_PWM_DUTY1 0xC8258
+
+#define _BXT_BLC_PWM_CTL2  0xC8350
+#define _BXT_BLC_PWM_FREQ2 0xC8354
+#define _BXT_BLC_PWM_DUTY2 0xC8358
+
+#define BXT_BLC_PWM_CTL(controller)_PIPE(controller, \
+   _BXT_BLC_PWM_CTL1, _BXT_BLC_PWM_CTL2)
+#define BXT_BLC_PWM_FREQ(controller)   _PIPE(controller, \
+   _BXT_BLC_PWM_FREQ1, _BXT_BLC_PWM_FREQ2)
+#define BXT_BLC_PWM_DUTY(controller)   _PIPE(controller, \
+   _BXT_BLC_PWM_DUTY1, _BXT_BLC_PWM_DUTY2)
 
 #define PCH_GTC_CTL0xe7000
 #define   PCH_GTC_ENABLE   (1 << 31)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1059283..d8ca075 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -182,7 +182,9 @@ struct intel_panel {
bool enabled;
bool combination_mode;  /* gen 2/4 only */
bool active_low_pwm;
+   bool util_pin_active_low;   /* bxt+ */
struct backlight_device *device;
+   u8 controller;  /* bxt+ only */
} backlight;
 
void (*backlight_power)(struct intel_connector *, bool enable);
diff --git a/drivers/gpu/drm/i915/intel_panel.c 
b/drivers/gpu/drm/i915/intel_panel.c
index 55aad23..0d21715 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -539,9 +539,10 @@ static u32 vlv_get_backlight(struct intel_connector 
*connector)