Re: [Intel-gfx] [PATCH] drm/i915/dmc: Load DMC on MTL

2023-03-02 Thread Matt Roper
On Thu, Mar 02, 2023 at 12:05:50PM -0300, Gustavo Sousa wrote:
> From: Madhumitha Tolakanahalli Pradeep 
> 
> 
> Add support to load DMC on MTL.
> 
> Signed-off-by: Madhumitha Tolakanahalli Pradeep 
> 
> Signed-off-by: Gustavo Sousa 
> ---
>  drivers/gpu/drm/i915/display/intel_dmc.c | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c 
> b/drivers/gpu/drm/i915/display/intel_dmc.c
> index f70ada2357dc..dedf40cb85a2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -60,6 +60,10 @@
>  
>  #define DISPLAY_VER12_DMC_MAX_FW_SIZEICL_DMC_MAX_FW_SIZE
>  
> +#define MTL_DMC_PATH DMC_PATH(mtl)
> +#define MTL_DMC_MAX_FW_SIZE  0x1

Is there a reference somewhere in the bspec for the max DMC payload
size?  It seems unusual that it would have reduced from ADL to MTL,
although the payloads in the current firmware do indeed fit within this
reduced limit.


Matt

> +MODULE_FIRMWARE(MTL_DMC_PATH);
> +
>  #define DG2_DMC_PATH DMC_LEGACY_PATH(dg2, 2, 08)
>  MODULE_FIRMWARE(DG2_DMC_PATH);
>  
> @@ -943,7 +947,10 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
>*/
>   intel_dmc_runtime_pm_get(dev_priv);
>  
> - if (IS_DG2(dev_priv)) {
> + if (IS_METEORLAKE(dev_priv)) {
> + dmc->fw_path = MTL_DMC_PATH;
> + dmc->max_fw_size = MTL_DMC_MAX_FW_SIZE;
> + } else if (IS_DG2(dev_priv)) {
>   dmc->fw_path = DG2_DMC_PATH;
>   dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
>   } else if (IS_ALDERLAKE_P(dev_priv)) {
> -- 
> 2.39.2
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation


Re: [Intel-gfx] [PATCH] drm/i915/dmc: Load DMC on MTL

2023-03-02 Thread Rodrigo Vivi
On Thu, Mar 02, 2023 at 12:05:50PM -0300, Gustavo Sousa wrote:
> From: Madhumitha Tolakanahalli Pradeep 
> 
> 
> Add support to load DMC on MTL.
> 
> Signed-off-by: Madhumitha Tolakanahalli Pradeep 
> 
> Signed-off-by: Gustavo Sousa 
> ---
>  drivers/gpu/drm/i915/display/intel_dmc.c | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c 
> b/drivers/gpu/drm/i915/display/intel_dmc.c
> index f70ada2357dc..dedf40cb85a2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -60,6 +60,10 @@
>  
>  #define DISPLAY_VER12_DMC_MAX_FW_SIZEICL_DMC_MAX_FW_SIZE
>  
> +#define MTL_DMC_PATH DMC_PATH(mtl)
> +#define MTL_DMC_MAX_FW_SIZE  0x1

I thought the goal was to sync on the display_verN_*_size...
Why is MTL size so different than the similar versions?
If being different is still a thing, why were we adding the
version sizes above and simply not go with the individual platform
then?

Btw, do we get the max size from spec or from the dmc release notes?

Thanks,
Rodrigo.

> +MODULE_FIRMWARE(MTL_DMC_PATH);
> +
>  #define DG2_DMC_PATH DMC_LEGACY_PATH(dg2, 2, 08)
>  MODULE_FIRMWARE(DG2_DMC_PATH);
>  
> @@ -943,7 +947,10 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
>*/
>   intel_dmc_runtime_pm_get(dev_priv);
>  
> - if (IS_DG2(dev_priv)) {
> + if (IS_METEORLAKE(dev_priv)) {
> + dmc->fw_path = MTL_DMC_PATH;
> + dmc->max_fw_size = MTL_DMC_MAX_FW_SIZE;
> + } else if (IS_DG2(dev_priv)) {
>   dmc->fw_path = DG2_DMC_PATH;
>   dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
>   } else if (IS_ALDERLAKE_P(dev_priv)) {
> -- 
> 2.39.2
> 


[Intel-gfx] [PATCH] drm/i915/dmc: Load DMC on MTL

2023-03-02 Thread Gustavo Sousa
From: Madhumitha Tolakanahalli Pradeep 


Add support to load DMC on MTL.

Signed-off-by: Madhumitha Tolakanahalli Pradeep 

Signed-off-by: Gustavo Sousa 
---
 drivers/gpu/drm/i915/display/intel_dmc.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c 
b/drivers/gpu/drm/i915/display/intel_dmc.c
index f70ada2357dc..dedf40cb85a2 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -60,6 +60,10 @@
 
 #define DISPLAY_VER12_DMC_MAX_FW_SIZE  ICL_DMC_MAX_FW_SIZE
 
+#define MTL_DMC_PATH   DMC_PATH(mtl)
+#define MTL_DMC_MAX_FW_SIZE0x1
+MODULE_FIRMWARE(MTL_DMC_PATH);
+
 #define DG2_DMC_PATH   DMC_LEGACY_PATH(dg2, 2, 08)
 MODULE_FIRMWARE(DG2_DMC_PATH);
 
@@ -943,7 +947,10 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
 */
intel_dmc_runtime_pm_get(dev_priv);
 
-   if (IS_DG2(dev_priv)) {
+   if (IS_METEORLAKE(dev_priv)) {
+   dmc->fw_path = MTL_DMC_PATH;
+   dmc->max_fw_size = MTL_DMC_MAX_FW_SIZE;
+   } else if (IS_DG2(dev_priv)) {
dmc->fw_path = DG2_DMC_PATH;
dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
} else if (IS_ALDERLAKE_P(dev_priv)) {
-- 
2.39.2