Re: [Intel-gfx] [PATCH] drm/i915: Move skip_intermediate_wm handling into ilk_compute_intermediate_wm()

2018-11-13 Thread Ville Syrjälä 
On Thu, Nov 08, 2018 at 05:10:13PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> No point in cluttering the common codepaths with the
> skip_intermediate_wm handling. Just move it into
> ilk_compute_intermediate_wm() as those are the only
> platforms using this.
> 
> Signed-off-by: Ville Syrjälä 

Pushed with Maarten's irc r-b.

> ---
>  drivers/gpu/drm/i915/intel_display.c | 7 +--
>  drivers/gpu/drm/i915/intel_pm.c  | 3 ++-
>  2 files changed, 3 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 71b7bff85e52..00e775f22a45 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10817,7 +10817,6 @@ static int intel_crtc_atomic_check(struct drm_crtc 
> *crtc,
>   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   struct intel_crtc_state *pipe_config =
>   to_intel_crtc_state(crtc_state);
> - struct drm_atomic_state *state = crtc_state->state;
>   int ret;
>   bool mode_changed = needs_modeset(crtc_state);
>  
> @@ -10854,8 +10853,7 @@ static int intel_crtc_atomic_check(struct drm_crtc 
> *crtc,
>   }
>   }
>  
> - if (dev_priv->display.compute_intermediate_wm &&
> - !to_intel_atomic_state(state)->skip_intermediate_wm) {
> + if (dev_priv->display.compute_intermediate_wm) {
>   if (WARN_ON(!dev_priv->display.compute_pipe_wm))
>   return 0;
>  
> @@ -10871,9 +10869,6 @@ static int intel_crtc_atomic_check(struct drm_crtc 
> *crtc,
>   DRM_DEBUG_KMS("No valid intermediate pipe watermarks 
> are possible\n");
>   return ret;
>   }
> - } else if (dev_priv->display.compute_intermediate_wm) {
> - if (HAS_PCH_SPLIT(dev_priv) && INTEL_GEN(dev_priv) < 9)
> - pipe_config->wm.ilk.intermediate = 
> pipe_config->wm.ilk.optimal;
>   }
>  
>   if (INTEL_GEN(dev_priv) >= 9) {
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9da8ff263d36..2b57e360c043 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3159,7 +3159,8 @@ static int ilk_compute_intermediate_wm(struct 
> drm_device *dev,
>* and after the vblank.
>*/
>   *a = newstate->wm.ilk.optimal;
> - if (!newstate->base.active || 
> drm_atomic_crtc_needs_modeset(>base))
> + if (!newstate->base.active || 
> drm_atomic_crtc_needs_modeset(>base) ||
> + intel_state->skip_intermediate_wm)
>   return 0;
>  
>   a->pipe_enabled |= b->pipe_enabled;
> -- 
> 2.18.1

-- 
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH] drm/i915: Move skip_intermediate_wm handling into ilk_compute_intermediate_wm()

2018-11-08 Thread Ville Syrjala 
From: Ville Syrjälä 

No point in cluttering the common codepaths with the
skip_intermediate_wm handling. Just move it into
ilk_compute_intermediate_wm() as those are the only
platforms using this.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_display.c | 7 +--
 drivers/gpu/drm/i915/intel_pm.c  | 3 ++-
 2 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 71b7bff85e52..00e775f22a45 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10817,7 +10817,6 @@ static int intel_crtc_atomic_check(struct drm_crtc 
*crtc,
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc_state);
-   struct drm_atomic_state *state = crtc_state->state;
int ret;
bool mode_changed = needs_modeset(crtc_state);
 
@@ -10854,8 +10853,7 @@ static int intel_crtc_atomic_check(struct drm_crtc 
*crtc,
}
}
 
-   if (dev_priv->display.compute_intermediate_wm &&
-   !to_intel_atomic_state(state)->skip_intermediate_wm) {
+   if (dev_priv->display.compute_intermediate_wm) {
if (WARN_ON(!dev_priv->display.compute_pipe_wm))
return 0;
 
@@ -10871,9 +10869,6 @@ static int intel_crtc_atomic_check(struct drm_crtc 
*crtc,
DRM_DEBUG_KMS("No valid intermediate pipe watermarks 
are possible\n");
return ret;
}
-   } else if (dev_priv->display.compute_intermediate_wm) {
-   if (HAS_PCH_SPLIT(dev_priv) && INTEL_GEN(dev_priv) < 9)
-   pipe_config->wm.ilk.intermediate = 
pipe_config->wm.ilk.optimal;
}
 
if (INTEL_GEN(dev_priv) >= 9) {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9da8ff263d36..2b57e360c043 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3159,7 +3159,8 @@ static int ilk_compute_intermediate_wm(struct drm_device 
*dev,
 * and after the vblank.
 */
*a = newstate->wm.ilk.optimal;
-   if (!newstate->base.active || 
drm_atomic_crtc_needs_modeset(>base))
+   if (!newstate->base.active || 
drm_atomic_crtc_needs_modeset(>base) ||
+   intel_state->skip_intermediate_wm)
return 0;
 
a->pipe_enabled |= b->pipe_enabled;
-- 
2.18.1

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