Re: [Intel-gfx] [PATCH] drm/i915:gen9: restrict WaC6DisallowByGfxPause

2016-07-19 Thread Gore, Tim


Tim GoreĀ 
Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ

> -Original Message-
> From: Kamble, Sagar A
> Sent: Tuesday, July 19, 2016 7:56 AM
> To: Gore, Tim
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915:gen9: restrict
> WaC6DisallowByGfxPause
> 
> 
> 
> On 7/15/2016 7:19 PM, tim.g...@intel.com wrote:
> > From: Tim Gore 
> >
> > WaC6DisallowByGfxPause is currently applied unconditionally but is not
> > required in all revisions.
> >
> > References: HSD#2133391
> > Signed-off-by: Tim Gore 
> > ---
> >   drivers/gpu/drm/i915/intel_guc_loader.c | 4 +++-
> >   1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c
> > b/drivers/gpu/drm/i915/intel_guc_loader.c
> > index 605c696..173dcef 100644
> > --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> > @@ -349,7 +349,9 @@ static int guc_ucode_xfer(struct drm_i915_private
> *dev_priv)
> > }
> >
> > /* WaC6DisallowByGfxPause*/
> > -   I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
> > +   if (IS_SKL_REVID(dev, 0, SKL_REVID_B0) ||
> > +   IS_BXT_REVID(dev, 0, BXT_REVID_A1))
> I see this is applicable till BXT B0 and SKL C0 in wa_database. Am I missing
> something?

  The HSD (ref'd above) indicates that this problem is fixed in Bxt B0 and Skl 
C0.
I wasn't sure whether to follow the HSD or prior art.?

> > +   I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
> >
> > if (IS_BROXTON(dev))
> > I915_WRITE(GEN9LP_GT_PM_CONFIG,
> GT_DOORBELL_ENABLE);

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Re: [Intel-gfx] [PATCH] drm/i915:gen9: restrict WaC6DisallowByGfxPause

2016-07-18 Thread Kamble, Sagar A



On 7/15/2016 7:19 PM, tim.g...@intel.com wrote:

From: Tim Gore 

WaC6DisallowByGfxPause is currently applied unconditionally
but is not required in all revisions.

References: HSD#2133391
Signed-off-by: Tim Gore 
---
  drivers/gpu/drm/i915/intel_guc_loader.c | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c 
b/drivers/gpu/drm/i915/intel_guc_loader.c
index 605c696..173dcef 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -349,7 +349,9 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
}
  
  	/* WaC6DisallowByGfxPause*/

-   I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
+   if (IS_SKL_REVID(dev, 0, SKL_REVID_B0) ||
+   IS_BXT_REVID(dev, 0, BXT_REVID_A1))
I see this is applicable till BXT B0 and SKL C0 in wa_database. Am I 
missing something?

+   I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
  
  	if (IS_BROXTON(dev))

I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);


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[Intel-gfx] [PATCH] drm/i915:gen9: restrict WaC6DisallowByGfxPause

2016-07-15 Thread tim . gore
From: Tim Gore 

WaC6DisallowByGfxPause is currently applied unconditionally
but is not required in all revisions.

References: HSD#2133391
Signed-off-by: Tim Gore 
---
 drivers/gpu/drm/i915/intel_guc_loader.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c 
b/drivers/gpu/drm/i915/intel_guc_loader.c
index 605c696..173dcef 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -349,7 +349,9 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
}
 
/* WaC6DisallowByGfxPause*/
-   I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
+   if (IS_SKL_REVID(dev, 0, SKL_REVID_B0) ||
+   IS_BXT_REVID(dev, 0, BXT_REVID_A1))
+   I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
 
if (IS_BROXTON(dev))
I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
-- 
1.9.1

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