[Intel-gfx] [PATCH] i915: fix shift warning
From: Arnd Bergmann Randconfig builds on 32-bit machines show lots of warnings for the i915 driver for incorrect bit masks like: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2584:9: error: shift count >= width of type [-Werror,-Wshift-count-overflow] return hweight64(VDBOX_MASK(&i915->gt)); ^~~~ include/asm-generic/bitops/const_hweight.h:29:49: note: expanded from macro 'hweight64' #define hweight64(w) (__builtin_constant_p(w) ? __const_hweight64(w) : __arch_hweight64(w)) Since this is a 64-bit mask, use GENMASK_ULL instead of GENMASK. Signed-off-by: Arnd Bergmann --- drivers/gpu/drm/i915/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 0a3ee4f9dc0a..ca32fa0d6a57 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1624,7 +1624,7 @@ tgl_revids_get(struct drm_i915_private *dev_priv) unsigned int first__ = (first); \ unsigned int count__ = (count); \ ((gt)->info.engine_mask & \ -GENMASK(first__ + count__ - 1, first__)) >> first__; \ +GENMASK_ULL(first__ + count__ - 1, first__)) >> first__; \ }) #define VDBOX_MASK(gt) \ ENGINE_INSTANCES_MASK(gt, VCS0, I915_MAX_VCS) -- 2.29.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] i915: fix shift warning
On Wed, Dec 30, 2020 at 4:56 PM Chris Wilson wrote:
>
> Quoting Arnd Bergmann (2020-12-30 15:39:14)
> > From: Arnd Bergmann
> >
> > Randconfig builds on 32-bit machines show lots of warnings for
> > the i915 driver for incorrect bit masks like:
>
> mask is a u8.
>
> VCS0 is 2, I915_MAX_VCS 4
>
> (u8 & GENMASK(5, 2)) >> 2
Ah right, I misread the warning then.
> > drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2584:9: error: shift count
> > >= width of type [-Werror,-Wshift-count-overflow]
> > return hweight64(VDBOX_MASK(&i915->gt));
> >^~~~
> > include/asm-generic/bitops/const_hweight.h:29:49: note: expanded from macro
> > 'hweight64'
> > #define hweight64(w) (__builtin_constant_p(w) ? __const_hweight64(w) :
> > __arch_hweight64(w))
>
> So it's upset by hweight64() on the unsigned long?
I suspect what is going on is that clang once again warns because it performs
more code checks before dead-code elimination than gcc does. The warning is
for the __const_hweight64() case, which is not actually used here because the
input is not a compile-time constant.
> So hweight_long?
That seems to work, I'll send a new version with that.
> Or use a cast, hweight8((intel_engine_mask_t)VDMASK())?
>
> static __always_inline int engine_count(intel_engine_mask_t mask)
> {
> return sizeof(mask) == 1 ? hweight8(mask) :
> sizeof(mask) == 2 ? hweight16(mask) :
> sizeof(mask) == 4 ? hweight32(mask) :
> hweight64(mask);
> }
Fine with me as well. If you prefer that way, I'll let you handle that.
Arnd
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Re: [Intel-gfx] [PATCH] i915: fix shift warning
Quoting Arnd Bergmann (2021-01-02 11:23:20)
> On Wed, Dec 30, 2020 at 4:56 PM Chris Wilson wrote:
> >
> > Quoting Arnd Bergmann (2020-12-30 15:39:14)
> > > From: Arnd Bergmann
> > >
> > > Randconfig builds on 32-bit machines show lots of warnings for
> > > the i915 driver for incorrect bit masks like:
> >
> > mask is a u8.
> >
> > VCS0 is 2, I915_MAX_VCS 4
> >
> > (u8 & GENMASK(5, 2)) >> 2
>
> Ah right, I misread the warning then.
>
> > > drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2584:9: error: shift count
> > > >= width of type [-Werror,-Wshift-count-overflow]
> > > return hweight64(VDBOX_MASK(&i915->gt));
> > >^~~~
> > > include/asm-generic/bitops/const_hweight.h:29:49: note: expanded from
> > > macro 'hweight64'
> > > #define hweight64(w) (__builtin_constant_p(w) ? __const_hweight64(w) :
> > > __arch_hweight64(w))
> >
> > So it's upset by hweight64() on the unsigned long?
>
> I suspect what is going on is that clang once again warns because it performs
> more code checks before dead-code elimination than gcc does. The warning is
> for the __const_hweight64() case, which is not actually used here because the
> input is not a compile-time constant.
>
> > So hweight_long?
>
> That seems to work, I'll send a new version with that.
>
> > Or use a cast, hweight8((intel_engine_mask_t)VDMASK())?
> >
> > static __always_inline int engine_count(intel_engine_mask_t mask)
> > {
> > return sizeof(mask) == 1 ? hweight8(mask) :
> > sizeof(mask) == 2 ? hweight16(mask) :
> > sizeof(mask) == 4 ? hweight32(mask) :
> > hweight64(mask);
> > }
>
> Fine with me as well. If you prefer that way, I'll let you handle that.
While we wait for a generic hweight(), lets use hweight_long() here.
-Chris
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Re: [Intel-gfx] [PATCH] i915: fix shift warning
Quoting Arnd Bergmann (2020-12-30 15:39:14)
> From: Arnd Bergmann
>
> Randconfig builds on 32-bit machines show lots of warnings for
> the i915 driver for incorrect bit masks like:
mask is a u8.
VCS0 is 2, I915_MAX_VCS 4
(u8 & GENMASK(5, 2)) >> 2
> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2584:9: error: shift count >=
> width of type [-Werror,-Wshift-count-overflow]
> return hweight64(VDBOX_MASK(&i915->gt));
>^~~~
> include/asm-generic/bitops/const_hweight.h:29:49: note: expanded from macro
> 'hweight64'
> #define hweight64(w) (__builtin_constant_p(w) ? __const_hweight64(w) :
> __arch_hweight64(w))
So it's upset by hweight64() on the unsigned long?
So hweight_long?
Or use a cast, hweight8((intel_engine_mask_t)VDMASK())?
static __always_inline int engine_count(intel_engine_mask_t mask)
{
return sizeof(mask) == 1 ? hweight8(mask) :
sizeof(mask) == 2 ? hweight16(mask) :
sizeof(mask) == 4 ? hweight32(mask) :
hweight64(mask);
}
-Chris
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