[Intel-gfx] [PATCH] intel_audio_dump: add support for Cherryview
From ebfde852d9efbd7213c391e91be9d0741813bb16 Mon Sep 17 00:00:00 2001
From: Libin Yang libin.y...@intel.com
Date: Wed, 7 Jan 2015 10:56:18 +0800
Subject: [PATCH] intel_audio_dump: add support for Cherryview
This patch adds support for dumping audio registers of Cherryview.
Signed-off-by: Libin Yang libin.y...@intel.com
---
lib/intel_reg.h | 2 ++
tools/intel_audio_dump.c | 93 ++--
2 files changed, 92 insertions(+), 3 deletions(-)
diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index fcc9d7c..ade1c0c 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -1274,6 +1274,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define SDVO_PIPE_B_SELECT (1 30)
#define SDVO_STALL_SELECT (1 29)
#define SDVO_INTERRUPT_ENABLE (1 26)
+
+#define DISPLAY_HOTPLUG_CTL 0x61164
/*
* 915G/GM SDVO pixel multiplier.
*
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index f3bb9eb..b673288 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -69,19 +69,19 @@ static int disp_reg_base = 0; /* base address of
display registers */
#define dump_reg(reg, desc)\
do {\
dword = INREG(reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define dump_disp_reg(reg, desc) \
do {\
dword = INREG(disp_reg_base + reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define dump_aud_reg(reg, desc)\
do {\
dword = INREG(aud_reg_base + reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define read_aud_reg(reg) INREG(aud_reg_base + (reg))
@@ -1771,6 +1771,9 @@ static void dump_aud_hdmi_status(void)
#define HDMI_CTL_B 0x1140
#define HDMI_CTL_C 0x1150
#define HDMI_CTL_D 0x1160
+#define BSW_HDMI_CTL_B 0x1140
+#define BSW_HDMI_CTL_C 0x1160
+#define BSW_HDMI_CTL_D 0x116c
/* VLV HDMI port ctrl */
#define SDVO_HDMI_CTL_B0x1140
@@ -2108,6 +2111,10 @@ static void dump_hsw_plus(void)
set_aud_reg_base(0x65000);
+ dump_reg(PORT_HOTPLUG_EN, port hotplug enable);
+ dump_reg(PORT_HOTPLUG_STAT, port hotplug status);
+ dump_reg(DISPLAY_HOTPLUG_CTL, display hotplug control);
+
/* HSW DDI Buffer */
dump_reg(DDI_BUF_CTL_A,DDI Buffer Controler A);
dump_reg(DDI_BUF_CTL_B,DDI Buffer Controler B);
@@ -2267,6 +2274,83 @@ static void dump_hsw_plus(void)
printf(\n);
}
+/* offset of hotplug enable */
+#define PORT_HOTPLUG_EN_OFFSET 0x1110
+/* offset of hotplug status */
+#define PORT_HOTPLUG_STAT_OFFSET 0x1114
+/* offset of hotplug control*/
+#define DISPLAY_HOTPLUG_CTL_OFFSET 0x1164
+/* dump the braswell registers for audio */
+static void dump_braswell(void)
+{
+ uint32_t dword;
+
+ /* set_aud_reg_base(0x62000 + VLV_DISPLAY_BASE); */
+ set_reg_base(0x6 + VLV_DISPLAY_BASE, 0x2000);
+
+
+ dump_disp_reg(PORT_HOTPLUG_EN_OFFSET, port hotplug enable);
+ dump_disp_reg(PORT_HOTPLUG_STAT_OFFSET, port hotplug status);
+ dump_disp_reg(DISPLAY_HOTPLUG_CTL_OFFSET, display hotplug control);
+
+ dump_disp_reg(BSW_HDMI_CTL_B, sDVO/HDMI Port B Control);
+ dump_disp_reg(BSW_HDMI_CTL_C, HDMI Port C Control); // The
address is wrong?
+ dump_disp_reg(BSW_HDMI_CTL_D, HDMI Port D Control);
+
+ dump_disp_reg(DP_CTL_B, DisplayPort B Control
Register);
+ dump_disp_reg(DP_CTL_C, DisplayPort C Control
Register);
+ dump_disp_reg(DP_CTL_D, DisplayPort D Control Register);
+
+ /* HSW North Display Audio */
+ dump_aud_reg(AUD_TCA_CONFIG, Audio Configuration -
Transcoder A);
+ dump_aud_reg(AUD_TCB_CONFIG, Audio Configuration -
Transcoder B);
+ dump_aud_reg(AUD_TCC_CONFIG, Audio Configuration -
Transcoder C);
+ dump_aud_reg(AUD_C1_MISC_CTRL, Audio Converter 1 MISC
Control);
+ dump_aud_reg(AUD_C2_MISC_CTRL, Audio Converter 2 MISC
Control);
+ dump_aud_reg(AUD_C3_MISC_CTRL, Audio Converter 3 MISC
Control);
+ dump_aud_reg(AUD_VID_DID, Audio Vendor ID / Device ID);
+
Re: [Intel-gfx] [PATCH] intel_audio_dump: add support for Cherryview
On 2015.01.12 01:38:34 +, Yang, Libin wrote: From ebfde852d9efbd7213c391e91be9d0741813bb16 Mon Sep 17 00:00:00 2001 From: Libin Yang libin.y...@intel.com Date: Wed, 7 Jan 2015 10:56:18 +0800 Subject: [PATCH] intel_audio_dump: add support for Cherryview This patch adds support for dumping audio registers of Cherryview. Signed-off-by: Libin Yang libin.y...@intel.com Just clean up your commit message and pushed the patch. -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: Digital signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] intel_audio_dump: add support for Cherryview
Hi Maintainers,
Any comments?
Regards,
Libin
-Original Message-
From: Yang, Libin
Sent: Wednesday, January 07, 2015 12:56 PM
To: intel-gfx@lists.freedesktop.org
Cc: Yang, Libin; Lin, Mengdong
Subject: [PATCH] intel_audio_dump: add support for Cherryview
From: Libin Yang libin.y...@intel.com
This patch adds support for dumping audio registers of Cherryview.
Signed-off-by: Libin Yang libin.y...@intel.com
---
lib/intel_reg.h | 2 ++
tools/intel_audio_dump.c | 89
++--
2 files changed, 88 insertions(+), 3 deletions(-)
diff --git a/lib/intel_reg.h b/lib/intel_reg.h index fcc9d7c..ade1c0c 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -1274,6 +1274,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
#define SDVO_PIPE_B_SELECT (1 30)
#define SDVO_STALL_SELECT(1 29)
#define SDVO_INTERRUPT_ENABLE(1 26)
+
+#define DISPLAY_HOTPLUG_CTL 0x61164
/*
* 915G/GM SDVO pixel multiplier.
*
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c index
f3bb9eb..baa42a9 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -69,19 +69,19 @@ static int disp_reg_base = 0; /* base address of
display registers */
#define dump_reg(reg, desc) \
do {\
dword = INREG(reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define dump_disp_reg(reg, desc) \
do {\
dword = INREG(disp_reg_base + reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define dump_aud_reg(reg, desc) \
do {\
dword = INREG(aud_reg_base + reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define read_aud_reg(reg)INREG(aud_reg_base + (reg))
@@ -1771,6 +1771,9 @@ static void dump_aud_hdmi_status(void)
#define HDMI_CTL_B 0x1140
#define HDMI_CTL_C 0x1150
#define HDMI_CTL_D 0x1160
+#define BSW_HDMI_CTL_B 0x1140
+#define BSW_HDMI_CTL_C 0x1160
+#define BSW_HDMI_CTL_D 0x116c
/* VLV HDMI port ctrl */
#define SDVO_HDMI_CTL_B0x1140
@@ -2108,6 +2111,10 @@ static void dump_hsw_plus(void)
set_aud_reg_base(0x65000);
+ dump_reg(PORT_HOTPLUG_EN, port hotplug enable);
+ dump_reg(PORT_HOTPLUG_STAT, port hotplug status);
+ dump_reg(DISPLAY_HOTPLUG_CTL, display hotplug control);
+
/* HSW DDI Buffer */
dump_reg(DDI_BUF_CTL_A,DDI Buffer Controler A);
dump_reg(DDI_BUF_CTL_B,DDI Buffer Controler B);
@@ -2267,6 +2274,79 @@ static void dump_hsw_plus(void)
printf(\n);
}
+#define PORT_HOTPLUG_EN_OFFSET 0x1110
+#define PORT_HOTPLUG_STAT_OFFSET 0x1114 #define
+DISPLAY_HOTPLUG_CTL_OFFSET 0x1164 static void dump_braswell(void) {
+ uint32_t dword;
+
+ /* set_aud_reg_base(0x62000 + VLV_DISPLAY_BASE); */
+ set_reg_base(0x6 + VLV_DISPLAY_BASE, 0x2000);
+
+
+ dump_disp_reg(PORT_HOTPLUG_EN_OFFSET, port hotplug
enable);
+ dump_disp_reg(PORT_HOTPLUG_STAT_OFFSET, port hotplug
status);
+ dump_disp_reg(DISPLAY_HOTPLUG_CTL_OFFSET, display hotplug
control);
+
+ dump_disp_reg(BSW_HDMI_CTL_B, sDVO/HDMI Port B
Control);
+ dump_disp_reg(BSW_HDMI_CTL_C, HDMI Port C Control); //
The address is wrong?
+ dump_disp_reg(BSW_HDMI_CTL_D, HDMI Port D Control);
+
+ dump_disp_reg(DP_CTL_B, DisplayPort B Control
Register);
+ dump_disp_reg(DP_CTL_C, DisplayPort C Control
Register);
+ dump_disp_reg(DP_CTL_D, DisplayPort D Control Register);
+
+ /* HSW North Display Audio */
+ dump_aud_reg(AUD_TCA_CONFIG, Audio Configuration -
Transcoder A);
+ dump_aud_reg(AUD_TCB_CONFIG, Audio Configuration -
Transcoder B);
+ dump_aud_reg(AUD_TCC_CONFIG, Audio Configuration -
Transcoder C);
+ dump_aud_reg(AUD_C1_MISC_CTRL, Audio Converter 1 MISC
Control);
+ dump_aud_reg(AUD_C2_MISC_CTRL, Audio Converter 2 MISC
Control);
+ dump_aud_reg(AUD_C3_MISC_CTRL, Audio Converter 3 MISC
Control);
+ dump_aud_reg(AUD_VID_DID, Audio Vendor ID / Device ID);
+ dump_aud_reg(AUD_RID,
[Intel-gfx] [PATCH] intel_audio_dump: add support for Cherryview
From: Libin Yang libin.y...@intel.com
This patch adds support for dumping audio registers of Cherryview.
Signed-off-by: Libin Yang libin.y...@intel.com
---
lib/intel_reg.h | 2 ++
tools/intel_audio_dump.c | 89 ++--
2 files changed, 88 insertions(+), 3 deletions(-)
diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index fcc9d7c..ade1c0c 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -1274,6 +1274,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define SDVO_PIPE_B_SELECT (1 30)
#define SDVO_STALL_SELECT (1 29)
#define SDVO_INTERRUPT_ENABLE (1 26)
+
+#define DISPLAY_HOTPLUG_CTL 0x61164
/*
* 915G/GM SDVO pixel multiplier.
*
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index f3bb9eb..baa42a9 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -69,19 +69,19 @@ static int disp_reg_base = 0; /* base address of
display registers */
#define dump_reg(reg, desc)\
do {\
dword = INREG(reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define dump_disp_reg(reg, desc) \
do {\
dword = INREG(disp_reg_base + reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define dump_aud_reg(reg, desc)\
do {\
dword = INREG(aud_reg_base + reg); \
- printf(%-21s 0x%08x %s\n, # reg, dword, desc); \
+ printf(%-21s(%#x) 0x%08x %s\n, # reg, reg, dword, desc);
\
} while (0)
#define read_aud_reg(reg) INREG(aud_reg_base + (reg))
@@ -1771,6 +1771,9 @@ static void dump_aud_hdmi_status(void)
#define HDMI_CTL_B 0x1140
#define HDMI_CTL_C 0x1150
#define HDMI_CTL_D 0x1160
+#define BSW_HDMI_CTL_B 0x1140
+#define BSW_HDMI_CTL_C 0x1160
+#define BSW_HDMI_CTL_D 0x116c
/* VLV HDMI port ctrl */
#define SDVO_HDMI_CTL_B0x1140
@@ -2108,6 +2111,10 @@ static void dump_hsw_plus(void)
set_aud_reg_base(0x65000);
+ dump_reg(PORT_HOTPLUG_EN, port hotplug enable);
+ dump_reg(PORT_HOTPLUG_STAT, port hotplug status);
+ dump_reg(DISPLAY_HOTPLUG_CTL, display hotplug control);
+
/* HSW DDI Buffer */
dump_reg(DDI_BUF_CTL_A,DDI Buffer Controler A);
dump_reg(DDI_BUF_CTL_B,DDI Buffer Controler B);
@@ -2267,6 +2274,79 @@ static void dump_hsw_plus(void)
printf(\n);
}
+#define PORT_HOTPLUG_EN_OFFSET 0x1110
+#define PORT_HOTPLUG_STAT_OFFSET 0x1114
+#define DISPLAY_HOTPLUG_CTL_OFFSET 0x1164
+static void dump_braswell(void)
+{
+ uint32_t dword;
+
+ /* set_aud_reg_base(0x62000 + VLV_DISPLAY_BASE); */
+ set_reg_base(0x6 + VLV_DISPLAY_BASE, 0x2000);
+
+
+ dump_disp_reg(PORT_HOTPLUG_EN_OFFSET, port hotplug enable);
+ dump_disp_reg(PORT_HOTPLUG_STAT_OFFSET, port hotplug status);
+ dump_disp_reg(DISPLAY_HOTPLUG_CTL_OFFSET, display hotplug control);
+
+ dump_disp_reg(BSW_HDMI_CTL_B, sDVO/HDMI Port B Control);
+ dump_disp_reg(BSW_HDMI_CTL_C, HDMI Port C Control); // The
address is wrong?
+ dump_disp_reg(BSW_HDMI_CTL_D, HDMI Port D Control);
+
+ dump_disp_reg(DP_CTL_B, DisplayPort B Control
Register);
+ dump_disp_reg(DP_CTL_C, DisplayPort C Control
Register);
+ dump_disp_reg(DP_CTL_D, DisplayPort D Control Register);
+
+ /* HSW North Display Audio */
+ dump_aud_reg(AUD_TCA_CONFIG, Audio Configuration -
Transcoder A);
+ dump_aud_reg(AUD_TCB_CONFIG, Audio Configuration -
Transcoder B);
+ dump_aud_reg(AUD_TCC_CONFIG, Audio Configuration -
Transcoder C);
+ dump_aud_reg(AUD_C1_MISC_CTRL, Audio Converter 1 MISC
Control);
+ dump_aud_reg(AUD_C2_MISC_CTRL, Audio Converter 2 MISC
Control);
+ dump_aud_reg(AUD_C3_MISC_CTRL, Audio Converter 3 MISC
Control);
+ dump_aud_reg(AUD_VID_DID, Audio Vendor ID / Device ID);
+ dump_aud_reg(AUD_RID, Audio Revision ID);
+ dump_aud_reg(AUD_TCA_M_CTS_ENABLE, Audio M CTS Programming
Enable - Transcoder A);
+ dump_aud_reg(AUD_TCB_M_CTS_ENABLE, Audio M CTS Programming
Enable - Transcoder B);
+ dump_aud_reg(AUD_TCC_M_CTS_ENABLE, Audio M CTS
