On Tue, 12 Apr 2016, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Here is the remainder of my DSI/DPLL series [1]. Everything else got merged
> already. The first patch in the series is the only one to lack an r-b.
>
> Tested on BYT FFRD8 only, BXT stuff is not tested.
I didn't run IGT, but this fixes a dpll related state checker warning.
Tested-by: Jani Nikula
>
> [1] https://lists.freedesktop.org/archives/intel-gfx/2016-March/089782.html
>
> Ville Syrjälä (5):
> drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV
> drm/i915: Compute DSI PLL parameters during .compute_config()
> drm/i915: Eliminate {vlv,bxt}_configure_dsi_pll()
> drm/i915: Hook up pfit for DSI
> drm/i915: Reject 'Center' scaling mode for eDP/DSI on GMCH platforms
>
> drivers/gpu/drm/i915/intel_display.c | 123 ++
> drivers/gpu/drm/i915/intel_dp.c | 5 ++
> drivers/gpu/drm/i915/intel_drv.h | 5 ++
> drivers/gpu/drm/i915/intel_dsi.c | 113 ---
> drivers/gpu/drm/i915/intel_dsi.h | 14 ++--
> drivers/gpu/drm/i915/intel_dsi_pll.c | 144
> +--
> 6 files changed, 252 insertions(+), 152 deletions(-)
--
Jani Nikula, Intel Open Source Technology Center
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