Re: [Intel-gfx] [PATCH 02/49] drm/i915/bxt: BXT FBC enablement

2015-03-30 Thread Antti Koskipää 
Reviewed-by: Antti Koskipää 

On 03/17/2015 11:39 AM, Imre Deak wrote:
> From: Daisy Sun 
> 
> Enable FBC feature on Broxton
> 
> Issue: VIZ-3784
> Signed-off-by: Daisy Sun 
> Signed-off-by: Damien Lespiau 
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 4d50785..48434cb6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -388,6 +388,7 @@ static const struct intel_device_info intel_broxton_info 
> = {
>   .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>   .num_pipes = 3,
>   .has_ddi = 1,
> + .has_fbc = 1,
>   GEN_DEFAULT_PIPEOFFSETS,
>   IVB_CURSOR_OFFSETS,
>  };
> 

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Re: [Intel-gfx] [PATCH 02/49] drm/i915/bxt: BXT FBC enablement

2015-03-30 Thread Antti Koskipää 
Reviewed-by: Antti Koskipää 

On 03/17/2015 11:39 AM, Imre Deak wrote:
> From: Daisy Sun 
> 
> Enable FBC feature on Broxton
> 
> Issue: VIZ-3784
> Signed-off-by: Daisy Sun 
> Signed-off-by: Damien Lespiau 
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 4d50785..48434cb6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -388,6 +388,7 @@ static const struct intel_device_info intel_broxton_info 
> = {
>   .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>   .num_pipes = 3,
>   .has_ddi = 1,
> + .has_fbc = 1,
>   GEN_DEFAULT_PIPEOFFSETS,
>   IVB_CURSOR_OFFSETS,
>  };
> 

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Re: [Intel-gfx] [PATCH 02/49] drm/i915/bxt: BXT FBC enablement

2015-03-25 Thread Imre Deak 
On Tue, 2015-03-17 at 10:49 -0700, Rodrigo Vivi wrote:
> Does BXT really has fbc?

Yes.

> And same implementation and registers as HSW?

Yes, but actually the selection for BXT would be incorrect in
i915_setup_compression(), I can follow up with a fix for that in this
patchset. In addition we also need to add BXT specific workarounds, but
I would suggest doing that as a follow-up to this enabling patchset.

--Imre

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Re: [Intel-gfx] [PATCH 02/49] drm/i915/bxt: BXT FBC enablement

2015-03-17 Thread Rodrigo Vivi 
Does BXT really has fbc? And same implementation and registers as HSW?

On Tue, Mar 17, 2015 at 2:39 AM, Imre Deak  wrote:
> From: Daisy Sun 
>
> Enable FBC feature on Broxton
>
> Issue: VIZ-3784
> Signed-off-by: Daisy Sun 
> Signed-off-by: Damien Lespiau 
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 4d50785..48434cb6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -388,6 +388,7 @@ static const struct intel_device_info intel_broxton_info 
> = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> .num_pipes = 3,
> .has_ddi = 1,
> +   .has_fbc = 1,
> GEN_DEFAULT_PIPEOFFSETS,
> IVB_CURSOR_OFFSETS,
>  };
> --
> 2.1.0
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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[Intel-gfx] [PATCH 02/49] drm/i915/bxt: BXT FBC enablement

2015-03-17 Thread Imre Deak 
From: Daisy Sun 

Enable FBC feature on Broxton

Issue: VIZ-3784
Signed-off-by: Daisy Sun 
Signed-off-by: Damien Lespiau 
---
 drivers/gpu/drm/i915/i915_drv.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 4d50785..48434cb6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -388,6 +388,7 @@ static const struct intel_device_info intel_broxton_info = {
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_pipes = 3,
.has_ddi = 1,
+   .has_fbc = 1,
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
 };
-- 
2.1.0

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