Re: [Intel-gfx] [PATCH 09/12] drm/i915/uc: Move intel functions to intel_uc

2019-07-10 Thread Michal Wajdeczko
On Wed, 10 Jul 2019 02:54:34 +0200, Daniele Ceraolo Spurio  
 wrote:



All the intel_uc_* can now be moved to work on the intel_uc structure
for better encapsulation of uc-related actions.

Note: I've introduced uc_to_gt instead of uc_to_i915 because the aim is
to move everything to be gt-focused in the medium term, so we would've
had to replace it soon anyway.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c |   6 +-
 drivers/gpu/drm/i915/gt/intel_gt.h |   5 +
 drivers/gpu/drm/i915/gt/intel_reset.c  |   2 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c  | 184 -
 drivers/gpu/drm/i915/gt/uc/intel_uc.h  |  34 ++---
 drivers/gpu/drm/i915/i915_drv.c|  14 +-
 drivers/gpu/drm/i915/i915_drv.h|   6 +-
 drivers/gpu/drm/i915/i915_gem.c|  18 +--
 8 files changed, 137 insertions(+), 132 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c  
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c

index 4d774376f5b8..3c674c952a78 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -173,7 +173,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
i915_gem_drain_freed_objects(i915);
-   intel_uc_suspend(i915);
+   intel_uc_suspend(>gt.uc);
 }
static struct drm_i915_gem_object *first_mm_object(struct list_head  
*list)
@@ -238,7 +238,7 @@ void i915_gem_suspend_late(struct drm_i915_private  
*i915)

}
spin_unlock_irqrestore(>mm.obj_lock, flags);
-   intel_uc_sanitize(i915);
+   intel_uc_sanitize(>gt.uc);
i915_gem_sanitize(i915);
 }
@@ -265,7 +265,7 @@ void i915_gem_resume(struct drm_i915_private *i915)
if (intel_gt_resume(>gt))
goto err_wedged;
-   intel_uc_resume(i915);
+   intel_uc_resume(>gt.uc);
/* Always reload a context for powersaving. */
if (!i915_gem_load_power_context(i915))
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h  
b/drivers/gpu/drm/i915/gt/intel_gt.h

index 1093dcf36f63..880be05a3f4a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -11,6 +11,11 @@
struct drm_i915_private;
+static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
+{
+   return container_of(uc, struct intel_gt, uc);
+}
+
 void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private  
*i915);

 void intel_gt_init_hw(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c  
b/drivers/gpu/drm/i915/gt/intel_reset.c

index ccedea636ba3..be23f4557111 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -720,7 +720,7 @@ static intel_engine_mask_t reset_prepare(struct  
drm_i915_private *i915)

reset_prepare_engine(engine);
}
-   intel_uc_reset_prepare(i915);
+   intel_uc_reset_prepare(>gt.uc);
return awake;
 }
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c  
b/drivers/gpu/drm/i915/gt/uc/intel_uc.c

index e2080da2e1e4..2062e7ff05e8 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -22,19 +22,22 @@
  *
  */
+#include "gt/intel_gt.h"
 #include "gt/intel_reset.h"
-#include "intel_uc.h"
 #include "intel_guc.h"


we don't need this, it's included by "intel_uc.h"


 #include "intel_guc_ads.h"
 #include "intel_guc_submission.h"
+#include "intel_uc.h"
+
 #include "i915_drv.h"
static void guc_free_load_err_log(struct intel_guc *guc);
/* Reset GuC providing us with fresh state for both GuC and HuC.
  */
-static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv)
+static int __intel_uc_reset_hw(struct intel_uc *uc)
 {
+   struct drm_i915_private *dev_priv = uc_to_gt(uc)->i915;
int ret;
u32 guc_status;
@@ -52,10 +55,10 @@ static int __intel_uc_reset_hw(struct  
drm_i915_private *dev_priv)

return ret;
 }
-static int __get_platform_enable_guc(struct drm_i915_private *i915)
+static int __get_platform_enable_guc(struct intel_uc *uc)
 {
-   struct intel_uc_fw *guc_fw = >gt.uc.guc.fw;
-   struct intel_uc_fw *huc_fw = >gt.uc.huc.fw;
+   struct intel_uc_fw *guc_fw = >guc.fw;
+   struct intel_uc_fw *huc_fw = >huc.fw;
int enable_guc = 0;
/* Default is to use HuC if we know GuC and HuC firmwares */
@@ -67,12 +70,11 @@ static int __get_platform_enable_guc(struct  
drm_i915_private *i915)

return enable_guc;
 }
-static int __get_default_guc_log_level(struct drm_i915_private *i915)
+static int __get_default_guc_log_level(struct intel_uc *uc)
 {
int guc_log_level;
-   if (!intel_uc_fw_supported(>gt.uc.guc.fw) ||
-   !intel_uc_is_using_guc(i915))
+   if (!intel_uc_fw_supported(>guc.fw) || !intel_uc_is_using_guc(uc))
guc_log_level = GUC_LOG_LEVEL_DISABLED;
else if (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
 IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
@@ -87,7 +89,7 @@ static int 

[Intel-gfx] [PATCH 09/12] drm/i915/uc: Move intel functions to intel_uc

2019-07-09 Thread Daniele Ceraolo Spurio
All the intel_uc_* can now be moved to work on the intel_uc structure
for better encapsulation of uc-related actions.

Note: I've introduced uc_to_gt instead of uc_to_i915 because the aim is
to move everything to be gt-focused in the medium term, so we would've
had to replace it soon anyway.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c |   6 +-
 drivers/gpu/drm/i915/gt/intel_gt.h |   5 +
 drivers/gpu/drm/i915/gt/intel_reset.c  |   2 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c  | 184 -
 drivers/gpu/drm/i915/gt/uc/intel_uc.h  |  34 ++---
 drivers/gpu/drm/i915/i915_drv.c|  14 +-
 drivers/gpu/drm/i915/i915_drv.h|   6 +-
 drivers/gpu/drm/i915/i915_gem.c|  18 +--
 8 files changed, 137 insertions(+), 132 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 4d774376f5b8..3c674c952a78 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -173,7 +173,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
 
i915_gem_drain_freed_objects(i915);
 
-   intel_uc_suspend(i915);
+   intel_uc_suspend(>gt.uc);
 }
 
 static struct drm_i915_gem_object *first_mm_object(struct list_head *list)
@@ -238,7 +238,7 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
}
spin_unlock_irqrestore(>mm.obj_lock, flags);
 
-   intel_uc_sanitize(i915);
+   intel_uc_sanitize(>gt.uc);
i915_gem_sanitize(i915);
 }
 
@@ -265,7 +265,7 @@ void i915_gem_resume(struct drm_i915_private *i915)
if (intel_gt_resume(>gt))
goto err_wedged;
 
-   intel_uc_resume(i915);
+   intel_uc_resume(>gt.uc);
 
/* Always reload a context for powersaving. */
if (!i915_gem_load_power_context(i915))
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h 
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 1093dcf36f63..880be05a3f4a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -11,6 +11,11 @@
 
 struct drm_i915_private;
 
+static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
+{
+   return container_of(uc, struct intel_gt, uc);
+}
+
 void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
 void intel_gt_init_hw(struct drm_i915_private *i915);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c 
b/drivers/gpu/drm/i915/gt/intel_reset.c
index ccedea636ba3..be23f4557111 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -720,7 +720,7 @@ static intel_engine_mask_t reset_prepare(struct 
drm_i915_private *i915)
reset_prepare_engine(engine);
}
 
-   intel_uc_reset_prepare(i915);
+   intel_uc_reset_prepare(>gt.uc);
 
return awake;
 }
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index e2080da2e1e4..2062e7ff05e8 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -22,19 +22,22 @@
  *
  */
 
+#include "gt/intel_gt.h"
 #include "gt/intel_reset.h"
-#include "intel_uc.h"
 #include "intel_guc.h"
 #include "intel_guc_ads.h"
 #include "intel_guc_submission.h"
+#include "intel_uc.h"
+
 #include "i915_drv.h"
 
 static void guc_free_load_err_log(struct intel_guc *guc);
 
 /* Reset GuC providing us with fresh state for both GuC and HuC.
  */
-static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv)
+static int __intel_uc_reset_hw(struct intel_uc *uc)
 {
+   struct drm_i915_private *dev_priv = uc_to_gt(uc)->i915;
int ret;
u32 guc_status;
 
@@ -52,10 +55,10 @@ static int __intel_uc_reset_hw(struct drm_i915_private 
*dev_priv)
return ret;
 }
 
-static int __get_platform_enable_guc(struct drm_i915_private *i915)
+static int __get_platform_enable_guc(struct intel_uc *uc)
 {
-   struct intel_uc_fw *guc_fw = >gt.uc.guc.fw;
-   struct intel_uc_fw *huc_fw = >gt.uc.huc.fw;
+   struct intel_uc_fw *guc_fw = >guc.fw;
+   struct intel_uc_fw *huc_fw = >huc.fw;
int enable_guc = 0;
 
/* Default is to use HuC if we know GuC and HuC firmwares */
@@ -67,12 +70,11 @@ static int __get_platform_enable_guc(struct 
drm_i915_private *i915)
return enable_guc;
 }
 
-static int __get_default_guc_log_level(struct drm_i915_private *i915)
+static int __get_default_guc_log_level(struct intel_uc *uc)
 {
int guc_log_level;
 
-   if (!intel_uc_fw_supported(>gt.uc.guc.fw) ||
-   !intel_uc_is_using_guc(i915))
+   if (!intel_uc_fw_supported(>guc.fw) || !intel_uc_is_using_guc(uc))
guc_log_level = GUC_LOG_LEVEL_DISABLED;
else if (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
 IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
@@ -87,7 +89,7 @@ static int __get_default_guc_log_level(struct 
drm_i915_private *i915)
 
 /**
  * sanitize_options_early - sanitize