[Intel-gfx] [PATCH 09/12] intel: Provide IS_GENX() macros taking a drm_intel_device as argument
Time to switch over all the IS_GENX() macros to the new device object. Nothing more than a mechanical search replace here. Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- intel/intel_bufmgr_gem.c | 7 +- intel/intel_chipset.h | 158 -- intel/intel_decode.c | 41 ++-- intel/intel_device_priv.h | 8 +++ 4 files changed, 31 insertions(+), 183 deletions(-) diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index 58543a2..011fa5b 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -3451,8 +3451,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) bufmgr_gem-pci_device = drm_intel_device_get_devid(bufmgr_gem-dev); bufmgr_gem-gen = bufmgr_gem-dev-gen; - if (IS_GEN3(bufmgr_gem-pci_device) - bufmgr_gem-gtt_size 256*1024*1024) { + if (IS_GEN3(bufmgr_gem-dev) bufmgr_gem-gtt_size 256*1024*1024) { /* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't * be used for tiled blits. To simplify the accounting, just * substract the unmappable part (fixed to 256MB on all known @@ -3494,8 +3493,8 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) /* Kernel does not supports HAS_LLC query, fallback to GPU * generation detection and assume that we have LLC on GEN6/7 */ - bufmgr_gem-has_llc = IS_GEN6(bufmgr_gem-pci_device) || - IS_GEN7(bufmgr_gem-pci_device); + bufmgr_gem-has_llc = IS_GEN6(bufmgr_gem-dev) || + IS_GEN7(bufmgr_gem-dev); } else bufmgr_gem-has_llc = *gp.value; diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 241d700..134c877 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -181,162 +181,4 @@ #define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A #define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D -#define IS_ILD(devid) ((devid) == PCI_CHIP_ILD_G) -#define IS_ILM(devid) ((devid) == PCI_CHIP_ILM_G) - -#define IS_915(devid) ((devid) == PCI_CHIP_I915_G || \ -(devid) == PCI_CHIP_E7221_G || \ -(devid) == PCI_CHIP_I915_GM) - -#define IS_945GM(devid)((devid) == PCI_CHIP_I945_GM || \ -(devid) == PCI_CHIP_I945_GME) - -#define IS_945(devid) ((devid) == PCI_CHIP_I945_G || \ -(devid) == PCI_CHIP_I945_GM || \ -(devid) == PCI_CHIP_I945_GME || \ -IS_G33(devid)) - -#define IS_G33(devid) ((devid) == PCI_CHIP_G33_G || \ -(devid) == PCI_CHIP_Q33_G || \ -(devid) == PCI_CHIP_Q35_G || IS_IGD(devid)) - -#define IS_GEN2(devid) ((devid) == PCI_CHIP_I830_M || \ -(devid) == PCI_CHIP_845_G || \ -(devid) == PCI_CHIP_I855_GM || \ -(devid) == PCI_CHIP_I865_G) - -#define IS_GEN3(devid) (IS_945(devid) || IS_915(devid)) - -#define IS_GEN5(devid) (IS_ILD(devid) || IS_ILM(devid)) - -#define IS_GEN6(devid) ((devid) == PCI_CHIP_SANDYBRIDGE_GT1 || \ -(devid) == PCI_CHIP_SANDYBRIDGE_GT2 || \ -(devid) == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \ -(devid) == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ -(devid) == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ -(devid) == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ -(devid) == PCI_CHIP_SANDYBRIDGE_S) - -#define IS_GEN7(devid) (IS_IVYBRIDGE(devid) || \ -IS_HASWELL(devid) || \ -IS_VALLEYVIEW(devid)) - -#define IS_IVYBRIDGE(devid)((devid) == PCI_CHIP_IVYBRIDGE_GT1 || \ -(devid) == PCI_CHIP_IVYBRIDGE_GT2 || \ -(devid) == PCI_CHIP_IVYBRIDGE_M_GT1 || \ -(devid) == PCI_CHIP_IVYBRIDGE_M_GT2 || \ -(devid) == PCI_CHIP_IVYBRIDGE_S || \ -(devid) == PCI_CHIP_IVYBRIDGE_S_GT2) - -#define IS_VALLEYVIEW(devid) ((devid) == PCI_CHIP_VALLEYVIEW_PO || \ -(devid) == PCI_CHIP_VALLEYVIEW_1 || \ -(devid) == PCI_CHIP_VALLEYVIEW_2 || \ -(devid) == PCI_CHIP_VALLEYVIEW_3) - -#define IS_HSW_GT1(devid) ((devid) == PCI_CHIP_HASWELL_GT1 || \ -(devid) == PCI_CHIP_HASWELL_M_GT1 || \ -(devid) == PCI_CHIP_HASWELL_S_GT1 || \ -
Re: [Intel-gfx] [PATCH 09/12] intel: Provide IS_GENX() macros taking a drm_intel_device as argument
On 03/05/2015 08:20 AM, Damien Lespiau wrote: Time to switch over all the IS_GENX() macros to the new device object. Nothing more than a mechanical search replace here. Hmm... why not just do the comparisons directly? The macros seem superfluous. Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- intel/intel_bufmgr_gem.c | 7 +- intel/intel_chipset.h | 158 -- intel/intel_decode.c | 41 ++-- intel/intel_device_priv.h | 8 +++ 4 files changed, 31 insertions(+), 183 deletions(-) diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index 58543a2..011fa5b 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -3451,8 +3451,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) bufmgr_gem-pci_device = drm_intel_device_get_devid(bufmgr_gem-dev); bufmgr_gem-gen = bufmgr_gem-dev-gen; - if (IS_GEN3(bufmgr_gem-pci_device) - bufmgr_gem-gtt_size 256*1024*1024) { + if (IS_GEN3(bufmgr_gem-dev) bufmgr_gem-gtt_size 256*1024*1024) { /* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't * be used for tiled blits. To simplify the accounting, just * substract the unmappable part (fixed to 256MB on all known @@ -3494,8 +3493,8 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) /* Kernel does not supports HAS_LLC query, fallback to GPU * generation detection and assume that we have LLC on GEN6/7 */ - bufmgr_gem-has_llc = IS_GEN6(bufmgr_gem-pci_device) || - IS_GEN7(bufmgr_gem-pci_device); + bufmgr_gem-has_llc = IS_GEN6(bufmgr_gem-dev) || + IS_GEN7(bufmgr_gem-dev); } else bufmgr_gem-has_llc = *gp.value; diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 241d700..134c877 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -181,162 +181,4 @@ #define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A #define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D -#define IS_ILD(devid)((devid) == PCI_CHIP_ILD_G) -#define IS_ILM(devid)((devid) == PCI_CHIP_ILM_G) - -#define IS_915(devid)((devid) == PCI_CHIP_I915_G || \ - (devid) == PCI_CHIP_E7221_G || \ - (devid) == PCI_CHIP_I915_GM) - -#define IS_945GM(devid) ((devid) == PCI_CHIP_I945_GM || \ - (devid) == PCI_CHIP_I945_GME) - -#define IS_945(devid)((devid) == PCI_CHIP_I945_G || \ - (devid) == PCI_CHIP_I945_GM || \ - (devid) == PCI_CHIP_I945_GME || \ - IS_G33(devid)) - -#define IS_G33(devid)((devid) == PCI_CHIP_G33_G || \ - (devid) == PCI_CHIP_Q33_G || \ - (devid) == PCI_CHIP_Q35_G || IS_IGD(devid)) - -#define IS_GEN2(devid) ((devid) == PCI_CHIP_I830_M || \ - (devid) == PCI_CHIP_845_G || \ - (devid) == PCI_CHIP_I855_GM || \ - (devid) == PCI_CHIP_I865_G) - -#define IS_GEN3(devid) (IS_945(devid) || IS_915(devid)) - -#define IS_GEN5(devid) (IS_ILD(devid) || IS_ILM(devid)) - -#define IS_GEN6(devid) ((devid) == PCI_CHIP_SANDYBRIDGE_GT1 || \ - (devid) == PCI_CHIP_SANDYBRIDGE_GT2 || \ - (devid) == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \ - (devid) == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ - (devid) == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ - (devid) == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ - (devid) == PCI_CHIP_SANDYBRIDGE_S) - -#define IS_GEN7(devid) (IS_IVYBRIDGE(devid) || \ - IS_HASWELL(devid) || \ - IS_VALLEYVIEW(devid)) - -#define IS_IVYBRIDGE(devid) ((devid) == PCI_CHIP_IVYBRIDGE_GT1 || \ - (devid) == PCI_CHIP_IVYBRIDGE_GT2 || \ - (devid) == PCI_CHIP_IVYBRIDGE_M_GT1 || \ - (devid) == PCI_CHIP_IVYBRIDGE_M_GT2 || \ - (devid) == PCI_CHIP_IVYBRIDGE_S || \ - (devid) == PCI_CHIP_IVYBRIDGE_S_GT2) - -#define IS_VALLEYVIEW(devid) ((devid) == PCI_CHIP_VALLEYVIEW_PO || \ - (devid) == PCI_CHIP_VALLEYVIEW_1 || \ - (devid) == PCI_CHIP_VALLEYVIEW_2 || \ - (devid) == PCI_CHIP_VALLEYVIEW_3) - -#define IS_HSW_GT1(devid)((devid) ==