Re: [Intel-gfx] [PATCH 1/2] drm/i915: Use intel_ types more consistently for watermark code
On Thu, Dec 06, 2018 at 04:54:00PM -0800, Matt Roper wrote:
> Try to be more consistent about intel_* types rather than drm_* types
> for lower-level driver functions.
>
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 +-
> drivers/gpu/drm/i915/intel_display.c | 32 ++---
> drivers/gpu/drm/i915/intel_drv.h | 10 +-
> drivers/gpu/drm/i915/intel_pm.c | 250
> ---
> 4 files changed, 134 insertions(+), 163 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 0689e67c966e..7469a7785253 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -281,8 +281,7 @@ struct drm_i915_display_funcs {
> int (*get_fifo_size)(struct drm_i915_private *dev_priv,
>enum i9xx_plane_id i9xx_plane);
> int (*compute_pipe_wm)(struct intel_crtc_state *cstate);
> - int (*compute_intermediate_wm)(struct drm_device *dev,
> -struct intel_crtc *intel_crtc,
> + int (*compute_intermediate_wm)(struct intel_crtc *intel_crtc,
We could omit this argument too since it can be derived from the crtc
state.
Anyways, patch is
Reviewed-by: Ville Syrjälä
> struct intel_crtc_state *newstate);
> void (*initial_watermarks)(struct intel_atomic_state *state,
> struct intel_crtc_state *cstate);
> @@ -290,7 +289,7 @@ struct drm_i915_display_funcs {
>struct intel_crtc_state *cstate);
> void (*optimize_watermarks)(struct intel_atomic_state *state,
> struct intel_crtc_state *cstate);
> - int (*compute_global_watermarks)(struct drm_atomic_state *state);
> + int (*compute_global_watermarks)(struct intel_atomic_state *state);
> void (*update_wm)(struct intel_crtc *crtc);
> int (*modeset_calc_cdclk)(struct drm_atomic_state *state);
> /* Returns the active state of the crtc, and if the crtc is active,
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 07c861884c70..db6004a883c7 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10661,12 +10661,9 @@ static void intel_crtc_destroy(struct drm_crtc *crtc)
> *
> * Returns true or false.
> */
> -static bool intel_wm_need_update(struct drm_plane *plane,
> - struct drm_plane_state *state)
> +static bool intel_wm_need_update(struct intel_plane_state *cur,
> + struct intel_plane_state *new)
> {
> - struct intel_plane_state *new = to_intel_plane_state(state);
> - struct intel_plane_state *cur = to_intel_plane_state(plane->state);
> -
> /* Update watermarks on tiling or size changes. */
> if (new->base.visible != cur->base.visible)
> return true;
> @@ -10775,7 +10772,8 @@ int intel_plane_atomic_calc_changes(const struct
> intel_crtc_state *old_crtc_stat
> /* must disable cxsr around plane enable/disable */
> if (plane->id != PLANE_CURSOR)
> pipe_config->disable_cxsr = true;
> - } else if (intel_wm_need_update(>base, plane_state)) {
> + } else if (intel_wm_need_update(to_intel_plane_state(plane->base.state),
> + to_intel_plane_state(plane_state))) {
> if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) {
> /* FIXME bollocks */
> pipe_config->update_wm_pre = true;
> @@ -10954,8 +10952,7 @@ static int icl_check_nv12_planes(struct
> intel_crtc_state *crtc_state)
> static int intel_crtc_atomic_check(struct drm_crtc *crtc,
> struct drm_crtc_state *crtc_state)
> {
> - struct drm_device *dev = crtc->dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> struct intel_crtc_state *pipe_config =
> to_intel_crtc_state(crtc_state);
> @@ -11004,8 +11001,7 @@ static int intel_crtc_atomic_check(struct drm_crtc
> *crtc,
>* old state and the new state. We can program these
>* immediately.
>*/
> - ret = dev_priv->display.compute_intermediate_wm(dev,
> - intel_crtc,
> + ret = dev_priv->display.compute_intermediate_wm(intel_crtc,
> pipe_config);
> if (ret) {
> DRM_DEBUG_KMS("No valid intermediate pipe watermarks
> are possible\n");
> @@ -11964,7 +11960,7 @@ static void verify_wm_state(struct drm_crtc *crtc,
> if (INTEL_GEN(dev_priv) < 9 ||
[Intel-gfx] [PATCH 1/2] drm/i915: Use intel_ types more consistently for watermark code
Try to be more consistent about intel_* types rather than drm_* types
for lower-level driver functions.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_drv.h | 5 +-
drivers/gpu/drm/i915/intel_display.c | 32 ++---
drivers/gpu/drm/i915/intel_drv.h | 10 +-
drivers/gpu/drm/i915/intel_pm.c | 250 ---
4 files changed, 134 insertions(+), 163 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0689e67c966e..7469a7785253 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -281,8 +281,7 @@ struct drm_i915_display_funcs {
int (*get_fifo_size)(struct drm_i915_private *dev_priv,
enum i9xx_plane_id i9xx_plane);
int (*compute_pipe_wm)(struct intel_crtc_state *cstate);
- int (*compute_intermediate_wm)(struct drm_device *dev,
- struct intel_crtc *intel_crtc,
+ int (*compute_intermediate_wm)(struct intel_crtc *intel_crtc,
struct intel_crtc_state *newstate);
void (*initial_watermarks)(struct intel_atomic_state *state,
struct intel_crtc_state *cstate);
@@ -290,7 +289,7 @@ struct drm_i915_display_funcs {
struct intel_crtc_state *cstate);
void (*optimize_watermarks)(struct intel_atomic_state *state,
struct intel_crtc_state *cstate);
- int (*compute_global_watermarks)(struct drm_atomic_state *state);
+ int (*compute_global_watermarks)(struct intel_atomic_state *state);
void (*update_wm)(struct intel_crtc *crtc);
int (*modeset_calc_cdclk)(struct drm_atomic_state *state);
/* Returns the active state of the crtc, and if the crtc is active,
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 07c861884c70..db6004a883c7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10661,12 +10661,9 @@ static void intel_crtc_destroy(struct drm_crtc *crtc)
*
* Returns true or false.
*/
-static bool intel_wm_need_update(struct drm_plane *plane,
-struct drm_plane_state *state)
+static bool intel_wm_need_update(struct intel_plane_state *cur,
+struct intel_plane_state *new)
{
- struct intel_plane_state *new = to_intel_plane_state(state);
- struct intel_plane_state *cur = to_intel_plane_state(plane->state);
-
/* Update watermarks on tiling or size changes. */
if (new->base.visible != cur->base.visible)
return true;
@@ -10775,7 +10772,8 @@ int intel_plane_atomic_calc_changes(const struct
intel_crtc_state *old_crtc_stat
/* must disable cxsr around plane enable/disable */
if (plane->id != PLANE_CURSOR)
pipe_config->disable_cxsr = true;
- } else if (intel_wm_need_update(>base, plane_state)) {
+ } else if (intel_wm_need_update(to_intel_plane_state(plane->base.state),
+ to_intel_plane_state(plane_state))) {
if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) {
/* FIXME bollocks */
pipe_config->update_wm_pre = true;
@@ -10954,8 +10952,7 @@ static int icl_check_nv12_planes(struct
intel_crtc_state *crtc_state)
static int intel_crtc_atomic_check(struct drm_crtc *crtc,
struct drm_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(crtc->dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc_state);
@@ -11004,8 +11001,7 @@ static int intel_crtc_atomic_check(struct drm_crtc
*crtc,
* old state and the new state. We can program these
* immediately.
*/
- ret = dev_priv->display.compute_intermediate_wm(dev,
- intel_crtc,
+ ret = dev_priv->display.compute_intermediate_wm(intel_crtc,
pipe_config);
if (ret) {
DRM_DEBUG_KMS("No valid intermediate pipe watermarks
are possible\n");
@@ -11964,7 +11960,7 @@ static void verify_wm_state(struct drm_crtc *crtc,
if (INTEL_GEN(dev_priv) < 9 || !new_state->active)
return;
- skl_pipe_wm_get_hw_state(crtc, _wm);
+ skl_pipe_wm_get_hw_state(intel_crtc, _wm);
sw_wm = _intel_crtc_state(new_state)->wm.skl.optimal;
skl_pipe_ddb_get_hw_state(intel_crtc, hw_ddb_y, hw_ddb_uv);
@@
